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953f4b75a9
This code kicks in when the target is compiled with
CONFIG_POLLING_UART defined.
This ensures that each message sent to the console is drained
completely before the code proceeds, which helps debugging early
bringup issues.
BRANCH=none
BUG=chrome-os-partner:43791
TEST=with this code enabled was able to debug cr50 bringup on the new
core version.
Change-Id: Iab42370d64d17ecc5210bd4db1f2c5f19b40bce8
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/291853
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
36 lines
1.2 KiB
Makefile
36 lines
1.2 KiB
Makefile
# -*- makefile -*-
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# Copyright (c) 2014 The Chromium OS Authors. All rights reserved.
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# Use of this source code is governed by a BSD-style license that can be
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# found in the LICENSE file.
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#
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CORE:=cortex-m
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CFLAGS_CPU+=-march=armv7-m -mcpu=cortex-m3
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# Extract the hardware version we are building against
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ver_defs := GC___MAJOR_REV__ GC___MINOR_REV__
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bld_defs := GC_SWDP_BUILD_DATE_DEFAULT GC_SWDP_BUILD_TIME_DEFAULT
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ver_params := $(shell echo "$(ver_defs) $(bld_defs)" | $(CPP) $(CPPFLAGS) -P \
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-imacros chip/g/${CHIP_VARIANT}_regdefs.h | sed -e "s/__REV\([A-Z]\)__/\1/")
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ver_str := $(shell printf "%s%s %d_%d" $(ver_params))
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CPPFLAGS+= -DGC_REVISION="$(ver_str)"
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# Required chip modules
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chip-y=clock.o gpio.o hwtimer.o jtag.o system.o
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ifeq ($(CONFIG_POLLING_UART),y)
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chip-y += polling_uart.o
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else
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chip-y += uart.o
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endif
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chip-y+= pmu.o
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chip-$(CONFIG_SPS)+= sps.o
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chip-$(CONFIG_HOSTCMD_SPS)+=sps_hc.o
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chip-$(CONFIG_TPM_SPS)+=sps_tpm.o
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chip-$(CONFIG_WATCHDOG)+=watchdog.o
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chip-$(CONFIG_USB)+=usb.o usb_endpoints.o
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chip-$(CONFIG_USB_CONSOLE)+=usb_console.o
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chip-$(CONFIG_USB_HID)+=usb_hid.o
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# TODO(wfrichar): Document this (and all other CONFIG_USB_*) in config.h
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chip-$(CONFIG_USB_BLOB)+=usb_blob.o
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