Divya Jyothi 9aea3710b2 mec1322: lfw loader + RO/RW architecture ...

mec1322 only has 96KB program memory, vs 256KB
flash space on lm4.We no longer have enough program
memory to load both RO and RW at boot. We'll want to
implement a small loader program that will load either
RO or RW from flash, and then jump to the loaded image.

CONFIG_FW_INCLUDE_RO is enabled to include RO image into
the build.

pack.py script is altered to load the (lfw + R)O on boot.

Software sync is not added.Distinguish between
RO/RW is yet to be added.

flash_ec is altered to support padding 0xFFs to 256k ec.bin
to match the size of the SPI flash of the board.

BUG=chromium:37510
BRANCH=None
TEST=Make -j buildall,Verified ec.bin to be 256k.
Verified RW image at offset 0h and (lfw + RO) at offset 2000h.
On boot sysjump to lfw. lfw checks in shared SRAM (currently RO)
and jumps to RO image.

Change-Id: Ib9b114e2f24a615d5e5bd8b3803be621d1e5bd17
Signed-off-by: Divya Jyothi <divya.jyothi@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/265807
Reviewed-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Icarus W Sparry <icarus.w.sparry@intel.com>

2015-04-23 07:04:41 +00:00

..

pack_ec.py

mec1322: lfw loader + RO/RW architecture

2015-04-23 07:04:41 +00:00

rsakey_sign_header.pem

mec1322: Add signing key

2013-12-27 07:51:00 +00:00

rsakey_sign_payload.pem

mec1322: Add signing key

2013-12-27 07:51:00 +00:00