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14dc626061
This moves the STM32-specific code out of the common header file and into the chip directory where it belongs. Note that this doesn't actually change the code for non-STM32 SoCs; that will happen in a separate CL for clarity. BUG=chrome-os-partner:40693 BRANCH=none TEST=make buildall Change-Id: Ifdf0086e86a1088fb011b9ac4d6c70ab8da47aec Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/273577 Reviewed-by: Randall Spangler <rspangler@chromium.org>
86 lines
3.2 KiB
C
86 lines
3.2 KiB
C
/* Copyright 2015 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*/
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#ifndef __CROS_EC_USB_HW_H
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#define __CROS_EC_USB_HW_H
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/*
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* The STM32 has dedicated USB RAM visible on the APB1 bus (so all reads &
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* writes are 16-bits wide). The endpoint tables and the data buffers live in
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* this RAM.
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*/
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/* Primitive to access the words in USB RAM */
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typedef CONFIG_USB_RAM_ACCESS_TYPE usb_uint;
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/* Linker symbol for start of USB RAM */
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extern usb_uint __usb_ram_start[];
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/* Attribute to define a buffer variable in USB RAM */
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#define __usb_ram __attribute__((section(".usb_ram.data")))
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struct stm32_endpoint {
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volatile usb_uint tx_addr;
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volatile usb_uint tx_count;
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volatile usb_uint rx_addr;
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volatile usb_uint rx_count;
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};
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extern struct stm32_endpoint btable_ep[];
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/* Attribute to put the endpoint table in USB RAM */
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#define __usb_btable __attribute__((section(".usb_ram.btable")))
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/* Read from USB RAM into a usb_setup_packet struct */
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struct usb_setup_packet;
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void usb_read_setup_packet(usb_uint *buffer, struct usb_setup_packet *packet);
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/*
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* Copy data to and from the USB dedicated RAM and take care of the weird
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* addressing. These functions correctly handle unaligned accesses to the USB
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* memory. They have the same prototype as memcpy, allowing them to be used
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* in places that expect memcpy. The void pointer used to represent a location
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* in the USB dedicated RAM should be the offset in that address space, not the
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* AHB address space.
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*
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* The USB packet RAM is attached to the processor via the AHB2APB bridge. This
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* bridge performs manipulations of read and write accesses as per the note in
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* section 2.1 of RM0091. The upshot is that custom memcpy-like routines need
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* to be employed.
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*/
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void *memcpy_to_usbram(void *dest, const void *src, size_t n);
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void *memcpy_from_usbram(void *dest, const void *src, size_t n);
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/* Compute the address inside dedicate SRAM for the USB controller */
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#define usb_sram_addr(x) ((x - __usb_ram_start) * sizeof(uint16_t))
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/* Helpers for endpoint declaration */
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#define _EP_HANDLER2(num, suffix) CONCAT3(ep_, num, suffix)
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#define _EP_TX_HANDLER(num) _EP_HANDLER2(num, _tx)
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#define _EP_RX_HANDLER(num) _EP_HANDLER2(num, _rx)
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#define _EP_RESET_HANDLER(num) _EP_HANDLER2(num, _rst)
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#define USB_DECLARE_EP(num, tx_handler, rx_handler, rst_handler) \
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void _EP_TX_HANDLER(num)(void) \
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__attribute__ ((alias(STRINGIFY(tx_handler)))); \
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void _EP_RX_HANDLER(num)(void) \
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__attribute__ ((alias(STRINGIFY(rx_handler)))); \
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void _EP_RESET_HANDLER(num)(void) \
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__attribute__ ((alias(STRINGIFY(rst_handler))));
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/* arrays with all endpoint callbacks */
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extern void (*usb_ep_tx[]) (void);
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extern void (*usb_ep_rx[]) (void);
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extern void (*usb_ep_reset[]) (void);
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/* array with interface-specific control request callbacks */
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extern int (*usb_iface_request[]) (usb_uint *ep0_buf_rx, usb_uint *ep0_buf_tx);
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#define _IFACE_HANDLER(num) CONCAT3(iface_, num, _request)
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#define USB_DECLARE_IFACE(num, handler) \
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int _IFACE_HANDLER(num)(usb_uint *ep0_buf_rx, \
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usb_uint *epo_buf_tx) \
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__attribute__ ((alias(STRINGIFY(handler))));
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#endif /* __CROS_EC_USB_HW_H */
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