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4626177c3b
The atomic_* functions are often used in contexts where the data they will operate on are volatile (due to being shared between tasks or a task and an interrupt handler). Adding volatile here makes using the atomic_* functions a little easier in those cases and removes a cast from the call sites (which could be obscuring a bug, if for instance the variable was modified to be a uint16_t). Signed-off-by: Anton Staaf <robotboy@chromium.org> BRANCH=None BUG=None TEST=make buildall -j Change-Id: I71356eb3cf2c0506df38532eee767c7d78f9240e Reviewed-on: https://chromium-review.googlesource.com/287516 Trybot-Ready: Anton Staaf <robotboy@chromium.org> Tested-by: Anton Staaf <robotboy@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Commit-Queue: Anton Staaf <robotboy@chromium.org>
68 lines
1.8 KiB
C
68 lines
1.8 KiB
C
/* Copyright (c) 2012 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*/
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/* Atomic operations for ARMv7 */
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#ifndef __CROS_EC_ATOMIC_H
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#define __CROS_EC_ATOMIC_H
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#include "common.h"
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/**
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* Implements atomic arithmetic operations on 32-bit integers.
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*
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* It used load/store exclusive.
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* If you write directly the integer used as an atomic variable,
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* you must either clear explicitly the exclusive monitor (using clrex)
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* or do it in exception context (which clears the monitor).
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*/
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#define ATOMIC_OP(asm_op, a, v) do { \
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uint32_t reg0, reg1; \
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\
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__asm__ __volatile__("1: ldrex %0, [%2]\n" \
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#asm_op" %0, %0, %3\n" \
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" strex %1, %0, [%2]\n" \
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" teq %1, #0\n" \
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" bne 1b" \
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: "=&r" (reg0), "=&r" (reg1) \
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: "r" (a), "r" (v) : "cc"); \
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} while (0)
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static inline void atomic_clear(uint32_t volatile *addr, uint32_t bits)
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{
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ATOMIC_OP(bic, addr, bits);
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}
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static inline void atomic_or(uint32_t volatile *addr, uint32_t bits)
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{
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ATOMIC_OP(orr, addr, bits);
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}
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static inline void atomic_add(uint32_t volatile *addr, uint32_t value)
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{
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ATOMIC_OP(add, addr, value);
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}
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static inline void atomic_sub(uint32_t volatile *addr, uint32_t value)
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{
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ATOMIC_OP(sub, addr, value);
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}
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static inline uint32_t atomic_read_clear(uint32_t volatile *addr)
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{
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uint32_t ret, tmp;
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__asm__ __volatile__(" mov %3, #0\n"
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"1: ldrex %0, [%2]\n"
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" strex %1, %3, [%2]\n"
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" teq %1, #0\n"
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" bne 1b"
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: "=&r" (ret), "=&r" (tmp)
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: "r" (addr), "r" (0) : "cc");
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return ret;
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}
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#endif /* __CROS_EC_ATOMIC_H */
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