mirror of
https://github.com/Telecominfraproject/OpenCellular.git
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f0b564b4a0
Add generic routines to read or write a byte to battery-backed RAM, and implement vbnvcontext get/set using these routines. BUG=chrome-os-partner:62952 BRANCH=reef TEST=On reef, with subsequent commit, run "cutoff" on the console, reattach AC, and verify device successfully wakes. Also verify Rp is dropped on console 'reboot' and F3 + power from RW. Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: I14691923f2e5198e901b6b5199e92c58c68cd18d Reviewed-on: https://chromium-review.googlesource.com/444444 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
126 lines
2.7 KiB
C
126 lines
2.7 KiB
C
/* Copyright (c) 2014 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*/
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/* System module for Chrome EC : hardware specific implementation */
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#include "common.h"
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#include "console.h"
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#include "registers.h"
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#include "system.h"
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#include "task.h"
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#include "cpu.h"
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/* Console output macros */
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#define CPUTS(outstr) cputs(CC_SYSTEM, outstr)
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#define CPRINTS(format, args...) cprints(CC_SYSTEM, format, ## args)
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const char *system_get_chip_vendor(void)
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{
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return "nrf";
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}
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const char *system_get_chip_name(void)
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{
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return "nrf51822";
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}
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const char *system_get_chip_revision(void)
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{
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return "";
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}
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void system_hibernate(uint32_t seconds, uint32_t microseconds)
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{
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/* Flush console before hibernating */
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cflush();
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if (board_hibernate)
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board_hibernate();
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/* chip specific standby mode */
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CPRINTS("TODO: implement %s()", __func__);
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}
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static void check_reset_cause(void)
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{
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uint32_t flags = 0;
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uint32_t raw_cause = NRF51_POWER_RESETREAS;
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if (raw_cause & NRF51_POWER_RESETREAS_RESETPIN)
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flags |= RESET_FLAG_RESET_PIN;
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if (raw_cause & NRF51_POWER_RESETREAS_DOG)
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flags |= RESET_FLAG_WATCHDOG;
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/* Note that the programmer uses a soft reset in debug mode. */
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if (raw_cause & NRF51_POWER_RESETREAS_SREQ)
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flags |= RESET_FLAG_SOFT;
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if (raw_cause & (NRF51_POWER_RESETREAS_OFF |
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NRF51_POWER_RESETREAS_LPCOMP))
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flags |= RESET_FLAG_WAKE_PIN;
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if (raw_cause & (NRF51_POWER_RESETREAS_LOCKUP |
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NRF51_POWER_RESETREAS_DIF))
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flags |= RESET_FLAG_OTHER;
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system_set_reset_flags(flags);
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/* clear it by writing 1's */
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NRF51_POWER_RESETREAS = raw_cause;
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}
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static void system_watchdog_reset(void)
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{
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if (NRF51_WDT_TIMEOUT != 0) {
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/* Hard reset the WDT */
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NRF51_WDT_POWER = 0;
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NRF51_WDT_POWER = 1;
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}
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/* NRF51_WDT_CONFIG_HALT_RUN breaks this */
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NRF51_WDT_CONFIG = NRF51_WDT_CONFIG_SLEEP_RUN;
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NRF51_WDT_RREN = NRF51_WDT_RREN_BIT(0);
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NRF51_WDT_CRV = 3; /* @32KHz */
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NRF51_WDT_START = 1;
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}
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void system_reset(int flags)
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{
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/* Disable interrupts to avoid task swaps during reboot */
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interrupt_disable();
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if (flags & SYSTEM_RESET_HARD)
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/* Ask the watchdog to trigger a hard reboot */
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system_watchdog_reset();
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else {
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/* Use SYSRESETREQ to trigger a soft reboot */
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CPU_NVIC_APINT = 0x05fa0004;
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}
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/* Spin and wait for reboot; should never return */
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while (1)
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;
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}
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int system_get_bbram(enum system_bbram_idx idx, uint8_t *value)
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{
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CPRINTS("TODO: implement %s()", __func__);
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return EC_ERROR_UNIMPLEMENTED;
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}
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int system_set_bbram(enum system_bbram_idx idx, uint8_t value)
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{
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CPRINTS("TODO: implement %s()", __func__);
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return EC_ERROR_UNIMPLEMENTED;
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}
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void system_pre_init(void)
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{
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check_reset_cause();
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}
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