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We have a limitation for EC interrupt vector registers. System may read incorrect interrupt number in ISR so we need to add a workaround to prevent it. The following is a example that got incorrect interrupt number: 1. REG IVCTx = 0x10. (no interrupt pending) 2. EC INT6 interrupt occurs (IVCTx = 0x16) and jump to ISR. 3. Read interrupt vector register to determine interrupt number. 4. Higher priority interrupt of same interrupt group occurs (for example: INT134, IVCTx = 0x96) while the system is reading the interrupt vector register for EC INT6, we may end up with an incorrect interrupt number between 0x16 and 0x96. Signed-off-by: Dino Li <dino.li@ite.com.tw> BRANCH=none BUG=none TEST=1. EC interrupts work normally: WUI (GPIO interrupt), timer, uart, LPC, I2C, and PECI. 2. Console command 'taskinfo'. Change-Id: I54e61f417ad506eb3b4cd5d0652f64eed9a28a17 Reviewed-on: https://chromium-review.googlesource.com/322097 Commit-Ready: Dino Li <dino.li@ite.com.tw> Tested-by: Dino Li <dino.li@ite.com.tw> Reviewed-by: Randall Spangler <rspangler@chromium.org>