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22d0ca0ceb
The Exynos family and most ARM products are SoC, not just CPU. We used to put ARM code in src/cpu to avoid polluting the code base for what was essentially an experiment at the time. Now that it's past the experimental phase and we're going to see more SoCs (including intel/baytrail) in coreboot. Change-Id: I5ea1f822664244edf5f77087bc8018d7c535f81c Reviewed-on: https://chromium-review.googlesource.com/170891 Tested-by: Hung-Te Lin <hungte@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Ronald Minnich <rminnich@chromium.org> Commit-Queue: Hung-Te Lin <hungte@chromium.org> (cherry picked from commit c8bb8fe0b20be37465f93c738d80e7e43033670a) Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com> Reviewed-on: http://review.coreboot.org/6739 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
60 lines
2.3 KiB
Makefile
60 lines
2.3 KiB
Makefile
################################################################################
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## Subdirectories
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################################################################################
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subdirs-y += allwinner
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subdirs-y += amd
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subdirs-y += dmp
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subdirs-y += armltd
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subdirs-y += intel
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subdirs-y += ti
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subdirs-y += via
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subdirs-y += x86
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subdirs-$(CONFIG_CPU_QEMU_X86) += qemu-x86
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$(eval $(call create_class_compiler,cpu_microcode,x86_32))
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################################################################################
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## Rules for building the microcode blob in CBFS
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################################################################################
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cpu_ucode_cbfs_name = cpu_microcode_blob.bin
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# External microcode file, or are we generating one ?
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ifeq ($(CONFIG_CPU_MICROCODE_CBFS_EXTERNAL), y)
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cpu_ucode_cbfs_file = $(call strip_quotes,$(CONFIG_CPU_MICROCODE_FILE))
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cbfs_include_ucode = y
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endif
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ifeq ($(CONFIG_CPU_MICROCODE_CBFS_GENERATE), y)
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cpu_ucode_cbfs_file = $(obj)/cpu_microcode_blob.bin
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cbfs_include_ucode = y
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endif
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ifneq ($(CONFIG_CPU_MICROCODE_CBFS_LOC), 0)
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cpu_ucode_cbfs_offset = "-b $(CONFIG_CPU_MICROCODE_CBFS_LOC)"
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else
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cpu_ucode_cbfs_offset = "-b"
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endif
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# In case we have more than one "source" (cough) files containing microcode, we
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# link them together in one large blob, so that we get all the microcode updates
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# in one file. This makes it easier for objcopy in the final step.
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# The --entry=0 is just here to suppress the LD warning. It does not affect the
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# final microcode file.
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$(obj)/cpu_microcode_blob.o: $$(cpu_microcode-objs)
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@printf " LD $(subst $(obj)/,,$(@))\n"
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$(LD_cpu_microcode) -static --entry=0 $+ -o $@
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# We have a lot of useless data in the large blob, and we are only interested in
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# the data section, so we only copy that part to the final microcode file
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$(obj)/cpu_microcode_blob.bin: $(obj)/cpu_microcode_blob.o
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@printf " MICROCODE $(subst $(obj)/,,$(@))\n"
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$(OBJCOPY_cpu_microcode) -j .data -O binary $< $@
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ifeq ($(cbfs_include_ucode),y)
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# Add CPU microcode to specified rom image $(1)
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add-cpu-microcode-to-cbfs = \
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$(CBFSTOOL) $(1) locate -f $(cpu_ucode_cbfs_file) -n $(cpu_ucode_cbfs_name) -a 16 | xargs $(CBFSTOOL) $(1) add -n $(cpu_ucode_cbfs_name) -f $(cpu_ucode_cbfs_file) -t 0x53 $(cpu_ucode_cbfs_offset)
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else
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add-cpu-microcode-to-cbfs = true
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endif
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