mirror of
https://github.com/Telecominfraproject/OpenCellular.git
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af77729737
We've been declaring a bunch of statically-sized arrays:
extern struct foo_t foo[FOO_COUNT];
And then initializing them like so:
struct foo_t foo[FOO_COUNT] = {
/* blah */
};
That only catches cases where we initialize with too many entries. It
doesn't catch cases where we haven't initialized enough. This change tests
for both cases like so:
extern struct foo_t foo[];
struct foo_t foo[] = {
/* blah */
};
BUILD_ASSERT(ARRAY_SIZE(foo) == FOO_COUNT);
The affected arrays are:
adc_channels[ADC_CH_COUNT]
gpio_list[GPIO_COUNT]
temp_sensors[TEMP_SENSOR_COUNT]
x86_signal_list[X86_SIGNAL_COUNT]
i2c_ports[I2C_PORTS_USED]
BUG=chrome-os-partner:18343
BRANCH=falco,peppy
TEST=build all platforms
All platforms should still build, all tests should still pass.
Change-Id: Ibb16dc3201f32df7cdc875648e89ba4ffb09f733
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/63833
Reviewed-by: Randall Spangler <rspangler@chromium.org>
235 lines
8.8 KiB
C
235 lines
8.8 KiB
C
/* Copyright (c) 2013 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*/
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/* EC for Slippy board configuration */
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#include "adc.h"
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#include "backlight.h"
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#include "chip_temp_sensor.h"
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#include "chipset_haswell.h"
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#include "chipset_x86_common.h"
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#include "common.h"
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#include "ec_commands.h"
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#include "extpower.h"
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#include "gpio.h"
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#include "host_command.h"
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#include "i2c.h"
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#include "keyboard_scan.h"
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#include "lid_switch.h"
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#include "lm4_adc.h"
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#include "peci.h"
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#include "power_button.h"
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#include "registers.h"
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#include "switch.h"
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#include "temp_sensor.h"
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#include "temp_sensor_g781.h"
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#include "timer.h"
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#include "util.h"
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/* GPIO signal list. Must match order from enum gpio_signal. */
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const struct gpio_info gpio_list[] = {
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/* Inputs with interrupt handlers are first for efficiency */
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{"POWER_BUTTON_L", LM4_GPIO_A, (1<<2), GPIO_INT_BOTH,
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power_button_interrupt},
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{"LID_OPEN", LM4_GPIO_A, (1<<3), GPIO_INT_BOTH,
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lid_interrupt},
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{"AC_PRESENT", LM4_GPIO_H, (1<<3), GPIO_INT_BOTH,
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extpower_interrupt},
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{"PCH_BKLTEN", LM4_GPIO_M, (1<<3), GPIO_INT_BOTH,
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backlight_interrupt},
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{"PCH_SLP_S0_L", LM4_GPIO_G, (1<<6), GPIO_INT_BOTH,
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x86_interrupt},
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{"PCH_SLP_S3_L", LM4_GPIO_G, (1<<7), GPIO_INT_BOTH,
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x86_interrupt},
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{"PCH_SLP_S5_L", LM4_GPIO_H, (1<<1), GPIO_INT_BOTH,
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x86_interrupt},
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{"PCH_SLP_SUS_L", LM4_GPIO_G, (1<<3), GPIO_INT_BOTH,
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x86_interrupt},
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{"PP1050_PGOOD", LM4_GPIO_H, (1<<4), GPIO_INT_BOTH,
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x86_interrupt},
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{"PP1350_PGOOD", LM4_GPIO_H, (1<<6), GPIO_INT_BOTH,
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x86_interrupt},
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{"PP5000_PGOOD", LM4_GPIO_N, (1<<0), GPIO_INT_BOTH,
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x86_interrupt},
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{"VCORE_PGOOD", LM4_GPIO_C, (1<<6), GPIO_INT_BOTH,
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x86_interrupt},
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{"PCH_EDP_VDD_EN", LM4_GPIO_J, (1<<1), GPIO_INT_BOTH,
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haswell_interrupt},
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{"RECOVERY_L", LM4_GPIO_A, (1<<5), GPIO_PULL_UP|GPIO_INT_BOTH,
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switch_interrupt},
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{"WP_L", LM4_GPIO_A, (1<<4), GPIO_INT_BOTH,
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switch_interrupt},
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/* Other inputs */
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{"FAN_ALERT_L", LM4_GPIO_B, (1<<0), GPIO_INPUT, NULL},
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{"PCH_SUSWARN_L", LM4_GPIO_G, (1<<2), GPIO_INT_BOTH, NULL},
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{"USB1_OC_L", LM4_GPIO_E, (1<<7), GPIO_INPUT, NULL},
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{"USB2_OC_L", LM4_GPIO_E, (1<<0), GPIO_INPUT, NULL},
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{"BOARD_VERSION1", LM4_GPIO_Q, (1<<5), GPIO_INPUT, NULL},
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{"BOARD_VERSION2", LM4_GPIO_Q, (1<<6), GPIO_INPUT, NULL},
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{"BOARD_VERSION3", LM4_GPIO_Q, (1<<7), GPIO_INPUT, NULL},
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{"CPU_PGOOD", LM4_GPIO_C, (1<<4), GPIO_INPUT, NULL},
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{"BAT_DETECT_L", LM4_GPIO_B, (1<<4), GPIO_INPUT, NULL},
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/* Outputs; all unasserted by default except for reset signals */
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{"CPU_PROCHOT", LM4_GPIO_B, (1<<1), GPIO_OUT_LOW, NULL},
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{"PP1350_EN", LM4_GPIO_H, (1<<5), GPIO_OUT_LOW, NULL},
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{"PP3300_DSW_GATED_EN", LM4_GPIO_J, (1<<3), GPIO_OUT_LOW, NULL},
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{"PP3300_DX_EN", LM4_GPIO_J, (1<<2), GPIO_OUT_LOW, NULL},
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{"PP3300_LTE_EN", LM4_GPIO_D, (1<<2), GPIO_OUT_LOW, NULL},
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{"PP3300_WLAN_EN", LM4_GPIO_J, (1<<0), GPIO_OUT_LOW, NULL},
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{"SUSP_VR_EN", LM4_GPIO_C, (1<<7), GPIO_OUT_LOW, NULL},
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{"VCORE_EN", LM4_GPIO_C, (1<<5), GPIO_OUT_LOW, NULL},
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{"PP5000_EN", LM4_GPIO_H, (1<<7), GPIO_OUT_LOW, NULL},
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{"SYS_PWROK", LM4_GPIO_H, (1<<2), GPIO_OUT_LOW, NULL},
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{"WLAN_OFF_L", LM4_GPIO_J, (1<<4), GPIO_OUT_LOW, NULL},
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{"CHARGE_L", LM4_GPIO_E, (1<<6), GPIO_OUT_LOW, NULL},
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{"ENABLE_BACKLIGHT", LM4_GPIO_M, (1<<7), GPIO_OUT_LOW, NULL},
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{"ENABLE_TOUCHPAD", LM4_GPIO_N, (1<<1), GPIO_OUT_LOW, NULL},
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{"ENTERING_RW", LM4_GPIO_D, (1<<3), GPIO_OUT_LOW, NULL},
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{"PCH_DPWROK", LM4_GPIO_G, (1<<0), GPIO_OUT_LOW, NULL},
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/*
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* HDA_SDO is technically an output, but we need to leave it as an
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* input until we drive it high. So can't use open-drain (HI_Z).
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*/
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{"PCH_HDA_SDO", LM4_GPIO_G, (1<<1), GPIO_INPUT, NULL},
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{"PCH_WAKE_L", LM4_GPIO_F, (1<<0), GPIO_OUT_HIGH, NULL},
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{"PCH_NMI_L", LM4_GPIO_F, (1<<2), GPIO_OUT_HIGH, NULL},
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{"PCH_PWRBTN_L", LM4_GPIO_H, (1<<0), GPIO_OUT_HIGH, NULL},
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{"PCH_PWROK", LM4_GPIO_F, (1<<5), GPIO_OUT_LOW, NULL},
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/* FIXME: Why does PL6 not honor open drain semantics? Setting it to 1
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* drives the pin low while setting it to 0 drives the pin high. To
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* work around this PCH_RCIN_L is set to an input. It will only
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* be set to an output when it needs to be driven to 0. */
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{"PCH_RCIN_L", LM4_GPIO_L, (1<<6), GPIO_INPUT, NULL},
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{"PCH_RSMRST_L", LM4_GPIO_F, (1<<1), GPIO_OUT_LOW, NULL},
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{"PCH_SMI_L", LM4_GPIO_F, (1<<4), GPIO_ODR_HIGH, NULL},
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{"TOUCHSCREEN_RESET_L", LM4_GPIO_N, (1<<7), GPIO_OUT_LOW, NULL},
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{"EC_EDP_VDD_EN", LM4_GPIO_J, (1<<5), GPIO_OUT_LOW, NULL},
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{"LPC_CLKRUN_L", LM4_GPIO_M, (1<<2), GPIO_ODR_HIGH, NULL},
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{"USB1_ENABLE", LM4_GPIO_E, (1<<4), GPIO_OUT_LOW, NULL},
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{"USB2_ENABLE", LM4_GPIO_D, (1<<5), GPIO_OUT_LOW, NULL},
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{"PCH_SUSACK_L", LM4_GPIO_F, (1<<3), GPIO_OUT_HIGH, NULL},
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{"PCH_RTCRST_L", LM4_GPIO_F, (1<<6), GPIO_ODR_HIGH, NULL},
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{"PCH_SRTCRST_L", LM4_GPIO_F, (1<<7), GPIO_ODR_HIGH, NULL},
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{"BAT_LED0_L", LM4_GPIO_N, (1<<6), GPIO_ODR_HIGH, NULL},
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{"BAT_LED1_L", LM4_GPIO_N, (1<<4), GPIO_ODR_HIGH, NULL},
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};
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BUILD_ASSERT(ARRAY_SIZE(gpio_list) == GPIO_COUNT);
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/* x86 signal list. Must match order of enum x86_signal. */
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const struct x86_signal_info x86_signal_list[] = {
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{GPIO_PP5000_PGOOD, 1, "PGOOD_PP5000"},
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{GPIO_PP1350_PGOOD, 1, "PGOOD_PP1350"},
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{GPIO_PP1050_PGOOD, 1, "PGOOD_PP1050"},
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{GPIO_VCORE_PGOOD, 1, "PGOOD_VCORE"},
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{GPIO_PCH_SLP_S0_L, 1, "SLP_S0#_DEASSERTED"},
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{GPIO_PCH_SLP_S3_L, 1, "SLP_S3#_DEASSERTED"},
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{GPIO_PCH_SLP_S5_L, 1, "SLP_S5#_DEASSERTED"},
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{GPIO_PCH_SLP_SUS_L, 1, "SLP_SUS#_DEASSERTED"},
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};
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BUILD_ASSERT(ARRAY_SIZE(x86_signal_list) == X86_SIGNAL_COUNT);
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/* ADC channels. Must be in the exactly same order as in enum adc_channel. */
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const struct adc_t adc_channels[] = {
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/* EC internal temperature is calculated by
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* 273 + (295 - 450 * ADC_VALUE / ADC_READ_MAX) / 2
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* = -225 * ADC_VALUE / ADC_READ_MAX + 420.5
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*/
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{"ECTemp", LM4_ADC_SEQ0, -225, ADC_READ_MAX, 420,
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LM4_AIN_NONE, 0x0e /* TS0 | IE0 | END0 */, 0, 0},
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/* IOUT == ICMNT is on PE3/AIN0 */
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/* We have 0.01-ohm resistors, and IOUT is 20X the differential
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* voltage, so 1000mA ==> 200mV.
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* ADC returns 0x000-0xFFF, which maps to 0.0-3.3V (as configured).
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* mA = 1000 * ADC_VALUE / ADC_READ_MAX * 3300 / 200
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*/
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{"ChargerCurrent", LM4_ADC_SEQ1, 33000, ADC_READ_MAX * 2, 0,
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LM4_AIN(0), 0x06 /* IE0 | END0 */, LM4_GPIO_E, (1<<3)},
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};
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BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT);
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/* I2C ports */
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const struct i2c_port_t i2c_ports[] = {
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/* Note: battery and charger share a port. Only include it once in
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* this list so we don't double-initialize it. */
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{"batt_chg", I2C_PORT_BATTERY, 100},
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{"thermal", I2C_PORT_THERMAL, 100},
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};
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BUILD_ASSERT(ARRAY_SIZE(i2c_ports) == I2C_PORTS_USED);
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/* Temperature sensors data; must be in same order as enum temp_sensor_id. */
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const struct temp_sensor_t temp_sensors[] = {
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{"PECI", TEMP_SENSOR_TYPE_CPU, peci_temp_sensor_get_val, 0, 2},
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{"ECInternal", TEMP_SENSOR_TYPE_BOARD, chip_temp_sensor_get_val, 0, 4},
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{"G781Internal", TEMP_SENSOR_TYPE_BOARD, g781_get_val, 0, 4},
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{"G781External", TEMP_SENSOR_TYPE_BOARD, g781_get_val, 1, 4},
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};
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BUILD_ASSERT(ARRAY_SIZE(temp_sensors) == TEMP_SENSOR_COUNT);
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struct keyboard_scan_config keyscan_config = {
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.output_settle_us = 40,
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.debounce_down_us = 6 * MSEC,
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.debounce_up_us = 30 * MSEC,
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.scan_period_us = 1500,
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.min_post_scan_delay_us = 1000,
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.poll_timeout_us = SECOND,
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.actual_key_mask = {
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0x14, 0xff, 0xff, 0xff, 0xff, 0xf5, 0xff,
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0xa4, 0xff, 0xf6, 0x55, 0xfa, 0xc8 /* full set */
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},
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};
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/**
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* Configure the GPIOs for the pwm module.
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*/
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void configure_fan_gpios(void)
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{
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/* PN2:3 alternate function 1 = channel 0 PWM/tach */
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gpio_set_alternate_function(LM4_GPIO_N, 0x0c, 1);
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}
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/**
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* Perform necessary actions on host wake events.
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*/
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void board_process_wake_events(uint32_t active_wake_events)
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{
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uint32_t power_button_mask;
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power_button_mask = EC_HOST_EVENT_MASK(EC_HOST_EVENT_POWER_BUTTON);
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/* If there are other events aside from the power button press drive
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* the wake pin. Otherwise ensure it is high. */
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if (active_wake_events & ~power_button_mask)
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gpio_set_level(GPIO_PCH_WAKE_L, 0);
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else
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gpio_set_level(GPIO_PCH_WAKE_L, 1);
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}
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/**
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* Board-specific g781 power state.
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*/
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int board_g781_has_power(void)
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{
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return gpio_get_level(GPIO_PP3300_DX_EN);
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}
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/**
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* Discharge battery when on AC power for factory test.
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*/
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int board_discharge_on_ac(int enable)
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{
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if (enable)
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gpio_set_level(GPIO_CHARGE_L, 1);
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else
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gpio_set_level(GPIO_CHARGE_L, 0);
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return EC_SUCCESS;
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}
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