Damien Roth bedbd67e64 cpu/amd: Update/Add license headers ...

These license headers were either not compliant with the coreboot
standard or were missing completely.

Change-Id: I0c46ad9ba7f3d950b3eff96ee6e9c36acbf1a3a5
Signed-off-by: Damien Roth <yves.r.roth@gmail.com>
Reviewed-on: https://review.coreboot.org/13288
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>

2016-02-14 22:47:37 +01:00

..

acpi

acpi/: add missing license header

2016-01-14 22:52:11 +01:00

arch

x86: make bootblock size for C_ENVIRONMENT_BOOTBLOCK configurable

2016-02-13 01:15:36 +01:00

commonlib

commonlib: move uefi includes out of commonlib includes

2016-02-02 14:27:03 +01:00

console

console: Disable SQUELCH_EARLY_SMP if SMP is not selected

2016-02-09 17:14:50 +01:00

cpu

cpu/amd: Update/Add license headers

2016-02-14 22:47:37 +01:00

device

arch/x86: Drop arch/pciconf.h

2016-01-26 20:22:44 +01:00

drivers

intel/fsp1_0: Allow the MRC cache to live in a FMAP region

2016-02-10 16:27:12 +01:00

ec

ASL: Remove unused modulo recipient.

2016-02-09 22:56:00 +01:00

include

lzma: Port size-checking ulzman() version to coreboot

2016-02-12 22:00:55 +01:00

lib

FMAP: Clean up debug output

2016-02-13 20:03:14 +01:00

mainboard

sandybridge: Always include MRC if not using native RAM init.

2016-02-13 08:25:25 +01:00

northbridge

sandybridge: Always include MRC if not using native RAM init.

2016-02-13 08:25:25 +01:00

soc

soc/intel/apollolake: add assert for pad constraints

2016-02-13 01:16:27 +01:00

southbridge

Make MRC vs native a config rather than making a separate chipset for it.

2016-02-12 17:09:05 +01:00

superio

superio/nuvoton/nct5572d: Add PS/2 presence detect

2016-02-09 20:34:15 +01:00

vendorcode

chromeos/Kconfig: Remove dependency on GBB_HAVE_BMPFV

2016-02-10 16:53:55 +01:00

Kconfig

timestamp: Remove HAS_PRECBMEM_TIMESTAMP_REGION Kconfig

2016-02-12 21:54:52 +01:00