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baff7ae621
The new vendor command takes the CCD state machine through necessary transitions leaving it in the CCD locked state. It succeeds only if user password is not set and CCD capabilities are right, which is guaranteed to be the case after an RMA unlock. BRANCH=cr50 BUG=b:68213540 TEST=tested using the modified gsctool utility. Change-Id: Ic2cce34e74b1ff476841cfa1a99f50d6a947c315 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/784352 Reviewed-by: Randall Spangler <rspangler@chromium.org>
103 lines
3.0 KiB
C
103 lines
3.0 KiB
C
/* Copyright 2016 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*/
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#ifndef __INCLUDE_TPM_VENDOR_CMDS_H
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#define __INCLUDE_TPM_VENDOR_CMDS_H
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/*
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* This file includes definitions of extended/vendor TPM2 commands and their
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* return codes. The definitions are shared between the embedded code and the
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* gsctool utility running on the host.
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*/
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/* Extension and vendor commands. */
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enum vendor_cmd_cc {
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/* Original extension commands */
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EXTENSION_AES = 0,
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EXTENSION_HASH = 1,
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EXTENSION_RSA = 2,
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EXTENSION_ECC = 3,
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EXTENSION_FW_UPGRADE = 4,
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EXTENSION_HKDF = 5,
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EXTENSION_ECIES = 6,
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EXTENSION_POST_RESET = 7,
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LAST_EXTENSION_COMMAND = 15,
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/* Our TPMv2 vendor-specific command codes. 16 bits available. */
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VENDOR_CC_GET_LOCK = 16,
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VENDOR_CC_SET_LOCK = 17,
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VENDOR_CC_SYSINFO = 18,
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VENDOR_CC_IMMEDIATE_RESET = 19,
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VENDOR_CC_INVALIDATE_INACTIVE_RW = 20,
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VENDOR_CC_COMMIT_NVMEM = 21,
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/* A gap left for the deep sleep control command. */
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VENDOR_CC_REPORT_TPM_STATE = 23,
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VENDOR_CC_TURN_UPDATE_ON = 24,
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VENDOR_CC_GET_BOARD_ID = 25,
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VENDOR_CC_SET_BOARD_ID = 26,
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VENDOR_CC_U2F_APDU = 27,
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VENDOR_CC_POP_LOG_ENTRY = 28,
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VENDOR_CC_GET_REC_BTN = 29,
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VENDOR_CC_RMA_CHALLENGE_RESPONSE = 30,
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VENDOR_CC_CCD_PASSWORD = 31,
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VENDOR_CC_DISABLE_RMA = 32,
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LAST_VENDOR_COMMAND = 65535,
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};
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/* Error codes reported by extension and vendor commands. */
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enum vendor_cmd_rc {
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/* EXTENSION_HASH error codes */
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/* Attempt to start a session on an active handle. */
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EXC_HASH_DUPLICATED_HANDLE = 1,
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EXC_HASH_TOO_MANY_HANDLES = 2, /* No room to allocate a new context. */
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/* Continuation/finish on unknown context. */
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EXC_HASH_UNKNOWN_CONTEXT = 3,
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/* Our TPMv2 vendor-specific response codes. */
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VENDOR_RC_SUCCESS = 0,
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VENDOR_RC_BOGUS_ARGS = 1,
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VENDOR_RC_READ_FLASH_FAIL = 2,
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VENDOR_RC_WRITE_FLASH_FAIL = 3,
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VENDOR_RC_REQUEST_TOO_BIG = 4,
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VENDOR_RC_RESPONSE_TOO_BIG = 5,
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VENDOR_RC_INTERNAL_ERROR = 6,
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/* Only 7 bits available; max is 127 */
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VENDOR_RC_NO_SUCH_COMMAND = 127,
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};
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/*
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* The TPMv2 Spec mandates that vendor-specific command codes have bit 29 set,
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* while bits 15-0 indicate the command. All other bits should be zero.
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* We will define one of those 16-bit command values for Cr50 purposes, and use
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* the subcommand_code in struct tpm_cmd_header to further distinguish the
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* desired operation.
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*/
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#define TPM_CC_VENDOR_BIT_MASK 0x20000000
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#define VENDOR_CC_MASK 0x0000ffff
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/* Our vendor-specific command codes go here */
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#define TPM_CC_VENDOR_CR50 0x0000
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/*
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* The TPM response code is all zero for success.
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* Errors are a little complicated:
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*
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* Bits 31:12 must be zero.
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*
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* Bit 11 S=0 Error
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* Bit 10 T=1 Vendor defined response code
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* Bit 9 r=0 reserved
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* Bit 8 V=1 Conforms to TPMv2 spec
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* Bit 7 F=0 Confirms to Table 14, Format-Zero Response Codes
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* Bits 6:0 num 128 possible failure reasons
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*/
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#define VENDOR_RC_ERR 0x00000500
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#endif /* __INCLUDE_TPM_VENDOR_CMDS_H */
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