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02d0ce1526
Use the EC to check if PD MCU has crashed. The EC knows this by checking the PD status bits: if PD MCU was in RW, and is now in RO, AND it did not get to RO via a sysjump, then it must have crashed. When the EC detects this, the EC will also panic and reboot the entire system, so that we can software sync to a known good state. Also, when EC panics due to PD crash, it will log panic info. BUG=chrome-os-partner:36636 BRANCH=samus TEST=load onto samus EC and PD, try sysjump'ing back and forth on PD MCU console and verify EC does not do anything. Crash the PD MCU when in RW by reboot command and crash divzero command, and make sure the EC panics with PD crash panic message. Crash the PD MCU when in RO (before sysjumping to RW) and make sure EC does not panic. Change-Id: I57961028e6b23a878b8e477a9d8e180cb121a742 Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/250100 Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
25 lines
790 B
C
25 lines
790 B
C
/* Copyright (c) 2015 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*
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* Software panic constants. This file must be parsable by the assembler.
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*/
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#ifndef __CROS_EC_SOFTWARE_PANIC_H
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#define __CROS_EC_SOFTWARE_PANIC_H
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/* Holds software panic reason PANIC_SW_* */
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#define SOFTWARE_PANIC_REASON_REG r4
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#define SOFTWARE_PANIC_INFO_REG r5
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#define PANIC_SW_BASE 0xDEAD6660
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/* Software panic reasons */
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#define PANIC_SW_DIV_ZERO (PANIC_SW_BASE + 0)
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#define PANIC_SW_STACK_OVERFLOW (PANIC_SW_BASE + 1)
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#define PANIC_SW_PD_CRASH (PANIC_SW_BASE + 2)
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#define PANIC_SW_ASSERT (PANIC_SW_BASE + 3)
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#define PANIC_SW_WATCHDOG (PANIC_SW_BASE + 4)
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#endif /* __CROS_EC_SOFTWARE_PANIC_H */
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