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21df67ecd4
The cannonlake FSP enables PchLockDownRtcMemoryLock by default, but we need this memory to be writable. We normally over-ride this in the SoC chip init code, so we'll do the same on cannonlake. BUG=b:71722386 BRANCH=none TEST=Filled /dev/nvram with 0xff and 0x00 bytes to verify we can flip all the bits. Change-Id: I7cdd4abc2b3795d7dd82236fbe3c112428ee882b Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://review.coreboot.org/25069 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>