Timothy Pearson cbda504eec southbridge/amd/sr5650: Remove unnecessary register configuration ...

Do not hardcode the CPU downstream non-posted request limit; the
value of this register is CPU family specific and is set appropriately
in the corresponding CPU driver code.

Change-Id: I432b942f114243cba23c9a8d916cf6d07bc4740b
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: http://review.coreboot.org/11935
Tested-by: build bot (Jenkins)
Reviewed-by: Peter Stuge <peter@stuge.se>

2015-10-16 21:25:28 +00:00

..

acpi

acpi/sata: add generic sata ssdt port generator

2015-06-07 01:24:47 +02:00

arch

arch/x86/smbios: Add Crucial DIMM manufacturer ID

2015-10-16 20:26:01 +00:00

commonlib

vboot: prepare for x86 verstage

2015-10-11 23:57:29 +00:00

console

x86: add standalone verstage support

2015-10-14 17:07:52 +00:00

cpu

cpu/amd/model_10xxx: Install AMD-provided microcode files in CBFS

2015-10-16 02:41:37 +00:00

device

x86: add standalone verstage support

2015-10-14 17:07:52 +00:00

drivers

cpu/mtrr.h: Fix macro names for MTRR registers

2015-10-15 03:52:49 +00:00

ec

ec/google: Move label to BOL to satisfy lint-tests

2015-10-15 07:36:26 +00:00

include

cpu/mtrr.h: Fix macro names for MTRR registers

2015-10-15 03:52:49 +00:00

lib

bootblock: Link timestamp.c only with EARLY_CBMEM_INIT

2015-10-16 11:58:45 +00:00

mainboard

pcengines/apu1: Fill serial number in SMBIOS

2015-10-15 12:11:05 +00:00

northbridge

cpu/mtrr.h: Fix macro names for MTRR registers

2015-10-15 03:52:49 +00:00

soc

soc/intel/broadwell: fix USBDEBUG copy-pasta

2015-10-15 17:48:17 +00:00

southbridge

southbridge/amd/sr5650: Remove unnecessary register configuration

2015-10-16 21:25:28 +00:00

superio

superio/smsc: Add support for SMSC DME1737

2015-07-13 17:11:00 +02:00

vendorcode

Revert "Remove FSP Rangeley SOC and mohonpeak board support"

2015-10-14 22:49:03 +00:00

Kconfig

Kconfig: Hide RAM_CODE_SUPPORT.

2015-10-11 15:34:37 +00:00