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77abb5072e
Modified hibernate funcs to support hibernate_wake_pins on weatley, npcx_evb and npcx_evb_arm. For better power consumption, we disable ADC, tri-state spi pins, all inputs of wake-ups to prevent leakage current caused by input floating and set necessary GPIOs' states in hibernate function. Modified drivers: 1. npcx_evb/board.c: Add hibernate_wake_pins array for hibernate. 2. npcx_evb_arm/board.c: : Add hibernate_wake_pins array for hibernate. 3. wheatley/board.c: Add hibernate_wake_pins array for hibernate. 4. wheatley/board.c: Add board_set_gpio_state_hibernate func for adjusting GPIOs' status related to board for better power consumption. 5. hwtimer.c: Remove unnecessary interrupt_enable/disable funcs. Interrupt will disable before it is called. 6. register.h: Add WKINEN definition and declarations used for hibernate. 7. system.c: Add system_set_gpios_and_wakeup_inputs_hibernate to set GPIOs' state and wake-up inputs before entering hibernate. 8. system_chip.h: Remove unused BBRM_DATA_INDEX_PBUTTON field. 9. gpio.c: Enable WKINEN in gpio_set_flags_by_mask func. BUG=chrome-os-partner:34346 TEST=make buildall -j; test nuvoton IC specific drivers BRANCH=none Change-Id: Ic85814065464095fdcb7a75964c2c528d8f8e62f Signed-off-by: Mulin Chao <mlchao@nuvoton.com> Reviewed-on: https://chromium-review.googlesource.com/321466 Reviewed-by: Randall Spangler <rspangler@chromium.org>
33 lines
1.2 KiB
C
33 lines
1.2 KiB
C
/* Copyright (c) 2014 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*/
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/* NPCX-specific SIB module for Chrome EC */
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#ifndef __CROS_EC_SYSTEM_CHIP_H
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#define __CROS_EC_SYSTEM_CHIP_H
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/* Indices for battery-backed ram (BBRAM) data position */
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enum bbram_data_index {
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BBRM_DATA_INDEX_SCRATCHPAD = 0, /* General-purpose scratchpad */
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BBRM_DATA_INDEX_SAVED_RESET_FLAGS = 4, /* Saved reset flags */
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BBRM_DATA_INDEX_WAKE = 8, /* Wake reasons for hibernate */
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BBRM_DATA_INDEX_VBNVCNTXT = 16, /* VbNvContext for ARM arch */
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BBRM_DATA_INDEX_RAMLOG = 32, /* RAM log for Booter */
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};
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/* Issue a watchdog reset*/
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void system_watchdog_reset(void);
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/* Check reset cause and return reset flags */
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void system_check_reset_cause(void);
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/* End address for the .lpram section; defined in linker script */
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extern unsigned int __lpram_fw_end;
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/* Begin flash address for the lpram codes; defined in linker script */
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extern unsigned int __flash_lpfw_start;
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/* End flash address for the lpram codes; defined in linker script */
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extern unsigned int __flash_lpfw_end;
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#endif /* __CROS_EC_SYSTEM_CHIP_H */
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