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b9b457173e
Add initial serial driver for mdcp2850 dp->hdmi converter. Driver implements 'get information' (cmd:0x40) to provide rudimentary method to test mcdp for functionality and assert GPIO if successful. Future CLs may expose more serial functionality if necessary. Signed-off-by: Todd Broch <tbroch@chromium.org> BRANCH=samus BUG=chrome-os-partner:34122 TEST=manual, when compiles with #define MCDP_DEBUG see successful serial communication and result from get info. buf:[00]0x04 [01]0x40 [02]0x00 [03]0xbc ... buf:[00]0x0f [01]0x40 [02]0x00 [03]0x0e [04]0x00 [05]0x01 [06]0x01 [07]0x00 [08]0x00 [09]0x00 [10]0x00 [11]0x00 [12]0x00 [13]0x00 family:000e chipid:0001 irom:1.0.0 fw:0.0.0 Change-Id: I35f9d9b0437633d1bd6a6c9fa14413bedb12f5c2 Reviewed-on: https://chromium-review.googlesource.com/235930 Trybot-Ready: Todd Broch <tbroch@chromium.org> Tested-by: Todd Broch <tbroch@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Commit-Queue: Todd Broch <tbroch@chromium.org>
104 lines
2.5 KiB
C
104 lines
2.5 KiB
C
/* Copyright (c) 2014 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*/
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/* Hoho dongle configuration */
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#ifndef __BOARD_H
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#define __BOARD_H
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/* 48 MHz SYSCLK clock frequency */
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#define CPU_CLOCK 48000000
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/* the UART console is on USART1 (PA9/PA10) */
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#define CONFIG_UART_CONSOLE 1
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/* Optional features */
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#define CONFIG_STM_HWTIMER32
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#define CONFIG_ADC
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#define CONFIG_BOARD_PRE_INIT
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#define CONFIG_CMD_SPI_FLASH
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#define CONFIG_HW_CRC
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#define CONFIG_RSA
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#define CONFIG_RWSIG
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#define CONFIG_SHA256
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/* TODO(tbroch) Re-enable once STM spi master can be inhibited at boot so it
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doesn't interfere with HDMI loading its f/w */
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#undef CONFIG_SPI_FLASH
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#define CONFIG_SPI_FLASH_SIZE 1048576
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#define CONFIG_SPI_MASTER_PORT 2
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#define CONFIG_SPI_CS_GPIO GPIO_PD_MCDP_SPI_CS_L
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#define CONFIG_USB
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#define CONFIG_USB_BOS
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#define CONFIG_USB_INHIBIT_CONNECT
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#define CONFIG_USB_POWER_DELIVERY
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#define CONFIG_USB_PD_ALT_MODE
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#define CONFIG_USB_PD_HW_DEV_ID_BOARD_MAJOR USB_PD_HW_DEV_ID_HOHO
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#define CONFIG_USB_PD_HW_DEV_ID_BOARD_MINOR 1
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#define CONFIG_USB_PD_DUAL_ROLE
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#define CONFIG_USB_PD_CUSTOM_VDM
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#define CONFIG_USB_PD_FLASH
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#define CONFIG_USB_PD_INTERNAL_COMP
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#define CONFIG_USB_PD_IDENTITY_HW_VERS 1
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#define CONFIG_USB_PD_IDENTITY_SW_VERS 1
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#define CONFIG_USB_PD_NO_VBUS_DETECT
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/* mcdp2850 serial interface */
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#define CONFIG_MCDP28X0 usart3_hw
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#define CONFIG_STREAM
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#define CONFIG_STREAM_USART
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#define CONFIG_STREAM_USART3
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#undef CONFIG_WATCHDOG_HELP
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#undef CONFIG_LID_SWITCH
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#undef CONFIG_TASK_PROFILING
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/* USB configuration */
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#define CONFIG_USB_PID 0x5010
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#define CONFIG_USB_BCD_DEV 0x0001 /* v 0.01 */
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/*
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* Allow dangerous commands all the time, since we don't have a write protect
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* switch.
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*/
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#define CONFIG_SYSTEM_UNLOCKED
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#ifndef __ASSEMBLER__
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/* Timer selection */
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#define TIM_CLOCK32 2
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#define TIM_ADC 3
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#include "gpio_signal.h"
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/* ADC signal */
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enum adc_channel {
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ADC_CH_CC1_PD = 0,
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/* Number of ADC channels */
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ADC_CH_COUNT
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};
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/* USB string indexes */
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enum usb_strings {
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USB_STR_DESC = 0,
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USB_STR_VENDOR,
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USB_STR_PRODUCT,
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USB_STR_VERSION,
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USB_STR_BB_URL,
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USB_STR_COUNT
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};
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#endif /* !__ASSEMBLER__ */
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/* USB Device class */
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#define USB_DEV_CLASS USB_CLASS_BILLBOARD
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/* USB interface indexes (use define rather than enum to expand them) */
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#define USB_IFACE_COUNT 0
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/* USB endpoint indexes (use define rather than enum to expand them) */
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#define USB_EP_CONTROL 0
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#define USB_EP_COUNT 1
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#endif /* __BOARD_H */
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