Files
OpenCellular/chip/mec1322/adc.c
Vincent Palatin 7aab81edce force the compiler to use a valid register allocation for irq handlers
When we are calling the re-scheduling routine at the end of an irq
handling routine, we need to ensure that the high registers are not
currently saved on the system stack.
On Cortex-M3/M4, the compiler is normally doing tail-call optimization
there and behaving properly, but this fixes the fact that insanely large
interrupt handling routines where sometimes not compile and not running
properly (aka issue 24515).

This also prepares for one more core-specific DECLARE_IRQ routine on
Cortex-M0.

Note: now on, the IRQ handling routines should no longer be "static".

Signed-off-by: Vincent Palatin <vpalatin@chromium.org>

BRANCH=none
BUG=chrome-os-partner:24515
TEST=make -j buildall
revert the workaround for 24515, see the issue happening only without
this CL.

Change-Id: Ic419369231925568df05815fd079ed191a5446db
Reviewed-on: https://chromium-review.googlesource.com/189153
Reviewed-by: Vic Yang <victoryang@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
2014-03-11 05:52:37 +00:00

108 lines
2.3 KiB
C

/* Copyright (c) 2013 The Chromium OS Authors. All rights reserved.
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
#include "adc.h"
#include "adc_chip.h"
#include "common.h"
#include "console.h"
#include "hooks.h"
#include "registers.h"
#include "task.h"
#include "timer.h"
#include "util.h"
/*
* Conversion on a single channel takes less than 12 ms. Set timeout to
* 15 ms so that we have a 3-ms margin.
*/
#define ADC_SINGLE_READ_TIME 15000
struct mutex adc_lock;
static task_id_t task_waiting;
static int start_single_and_wait(int timeout)
{
int event;
task_waiting = task_get_current();
/* Start conversion */
MEC1322_ADC_CTRL |= 1 << 1;
/* Wait for interrupt */
event = task_wait_event(timeout);
task_waiting = TASK_ID_INVALID;
return event != TASK_EVENT_TIMER;
}
int adc_read_channel(enum adc_channel ch)
{
const struct adc_t *adc = adc_channels + ch;
int value;
mutex_lock(&adc_lock);
MEC1322_ADC_SINGLE = 1 << adc->channel;
if (start_single_and_wait(ADC_SINGLE_READ_TIME))
value = MEC1322_ADC_READ(adc->channel) * adc->factor_mul /
adc->factor_div + adc->shift;
else
value = ADC_READ_ERROR;
mutex_unlock(&adc_lock);
return value;
}
int adc_read_all_channels(int *data)
{
int i;
int ret = EC_SUCCESS;
const struct adc_t *adc;
mutex_lock(&adc_lock);
MEC1322_ADC_SINGLE = 0;
for (i = 0; i < ADC_CH_COUNT; ++i)
MEC1322_ADC_SINGLE |= 1 << adc_channels[i].channel;
if (!start_single_and_wait(ADC_SINGLE_READ_TIME * ADC_CH_COUNT))
goto exit_all_channels;
for (i = 0; i < ADC_CH_COUNT; ++i) {
adc = adc_channels + i;
data[i] = MEC1322_ADC_READ(adc->channel) * adc->factor_mul /
adc->factor_div + adc->shift;
}
exit_all_channels:
mutex_unlock(&adc_lock);
return ret;
}
static void adc_init(void)
{
/* Activate ADC module */
MEC1322_ADC_CTRL |= 1 << 0;
/* Enable interrupt */
task_waiting = TASK_ID_INVALID;
MEC1322_INT_ENABLE(17) |= 1 << 10;
MEC1322_INT_BLK_EN |= 1 << 17;
task_enable_irq(MEC1322_IRQ_ADC_SNGL);
}
DECLARE_HOOK(HOOK_INIT, adc_init, HOOK_PRIO_DEFAULT);
void adc_interrupt(void)
{
/* Clear interrupt status bit */
MEC1322_ADC_CTRL |= 1 << 7;
if (task_waiting != TASK_ID_INVALID)
task_wake(task_waiting);
}
DECLARE_IRQ(MEC1322_IRQ_ADC_SNGL, adc_interrupt, 2);