Kyoung Kim fa1cec0b60 ISH: fix UART reference clock ...

UART reference clock is 100KHz for ISH4 and 120MHz for ISH3

BUG=none
BRANCH=None
TEST=`make buildall -j`

Change-Id: Ie33e0bd33e0a0c8e56a58fcf4a48677d38c9d61e
Signed-off-by: Kyoung Kim <kyoung.il.kim@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/409594
Commit-Ready: Kyoung Il Kim <kyoung.il.kim@intel.com>
Tested-by: Kyoung Il Kim <kyoung.il.kim@intel.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

2016-11-11 00:12:33 -08:00

..

g

cr50: disable sleep

2016-11-10 18:34:21 -08:00

host

NvMem: Added NV Memory module to ec/common/

2016-05-26 16:17:27 -07:00

ish

ISH: fix UART reference clock

2016-11-11 00:12:33 -08:00

it83xx

hibernate: Re-init GPIO levels on hibernate wake

2016-10-07 16:47:00 -07:00

lm4

Support alignment for EC host command structures

2016-10-19 20:07:09 -07:00

mec1322

hibernate: Re-init GPIO levels on hibernate wake

2016-10-07 16:47:00 -07:00

npcx

npcx: hwtimer: Fix 'slow' timer count just before overflow

2016-11-09 21:14:09 -08:00

nrf51

cleanup: DECLARE_CONSOLE_COMMAND only needs 4 args

2016-08-24 16:30:10 +00:00

rotor

rotor: Add DMA & SPI master drivers.

2016-09-13 22:21:44 -07:00

stm32

stm32f0: Allow change of external int priorities

2016-11-09 18:40:00 -08:00