Files
OpenCellular/common/firmware_image.lds.S
Vincent Palatin 03de7bee72 Move core-specific toolchain configuration to core/ directory
This is preparatory work to introduce a second core architecture.

Signed-off-by: Vincent Palatin <vpalatin@chromium.org>

BRANCH=none
BUG=chrome-os-partner:23574
TEST=./util/make_all.sh

Change-Id: Icae8a7e475a4ba2a13f0d8f95629e8498a5a61da
Reviewed-on: https://chromium-review.googlesource.com/175419
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
2013-11-07 22:36:05 +00:00

29 lines
813 B
ArmAsm

/* Copyright (c) 2012 The Chromium OS Authors. All rights reserved.
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
#include "config.h"
OUTPUT_FORMAT(BFD_FORMAT, BFD_FORMAT, BFD_FORMAT)
OUTPUT_ARCH(BFD_ARCH)
MEMORY
{
FLASH (rx) : ORIGIN = CONFIG_FLASH_BASE, LENGTH = CONFIG_FLASH_SIZE
}
SECTIONS
{
. = ALIGN(CONFIG_FLASH_BANK_SIZE);
.image.RO : AT(CONFIG_FLASH_BASE + CONFIG_FW_RO_OFF) {
*(.image.RO)
} > FLASH =0xff
. = ALIGN(CONFIG_FLASH_BANK_SIZE);
.image.RW : AT(CONFIG_FLASH_BASE + CONFIG_FW_RW_OFF) {
*(.image.RW)
BYTE(0xEA) /* Mark end explicitly */
} > FLASH =0xff
.padding : AT(CONFIG_FLASH_BASE + CONFIG_FLASH_SIZE - 1) {
BYTE(0xff);
} > FLASH =0xff
}