Mulin Chao d809d1614f npcx: Enable VW's valid bits of SCI#/SMI# if no CONFIG_SCI_GPIO. ...

Enable valid bits of SCI#/SMI# of eSPI's VW if there's no CONFIG_SCI_GPIO
definition in board-level driver. This CL also fixed the order of VW
event bits in comments.

Modified sources:
1. espi.c: Enable valid bits of SCI#/SMI#.

BRANCH=none
BUG=chrome-os-partner:34346
TEST=make all; test nuvoton IC specific drivers

Change-Id: I8d094513284b4ed42c5c26fe1975d71bbf050aa4
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Reviewed-on: https://chromium-review.googlesource.com/396618
Reviewed-by: Duncan Laurie <dlaurie@google.com>

2016-10-11 23:01:37 -07:00

..

g

cr50: add press and release options to powerbtn command

2016-10-11 01:48:21 -07:00

host

NvMem: Added NV Memory module to ec/common/

2016-05-26 16:17:27 -07:00

it83xx

hibernate: Re-init GPIO levels on hibernate wake

2016-10-07 16:47:00 -07:00

lm4

spi: Add lock around spi_transaction

2016-10-04 16:33:21 -07:00

mec1322

hibernate: Re-init GPIO levels on hibernate wake

2016-10-07 16:47:00 -07:00

npcx

npcx: Enable VW's valid bits of SCI#/SMI# if no CONFIG_SCI_GPIO.

2016-10-11 23:01:37 -07:00

nrf51

cleanup: DECLARE_CONSOLE_COMMAND only needs 4 args

2016-08-24 16:30:10 +00:00

rotor

rotor: Add DMA & SPI master drivers.

2016-09-13 22:21:44 -07:00

stm32

cts: Add I2C tests for read8/16/32 and write8/16/32

2016-10-05 20:58:20 -07:00