Scott Duplichan d9a634c756 Switch processor cores to pstate 0 early to reduce boot time. ...

Signed-off-by: Scott Duplichan <scott@notabs.org>
Acked-by: Marc Jones <marcj303@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6583 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

2011-05-15 21:51:31 +00:00

..

arch/x86

Add support for memory mapped UARTs to coreboot and add the OXPCIe952 as an

2011-04-26 23:47:04 +00:00

boot

more ifdef -> if fixes.

2011-04-21 21:26:58 +00:00

console

Add support for memory mapped UARTs to coreboot and add the OXPCIe952 as an

2011-04-26 23:47:04 +00:00

cpu

Correct the number of MCA error reporting banks cleared.

2011-05-15 21:06:30 +00:00

devices

more ifdef -> if fixes

2011-04-21 20:45:45 +00:00

drivers

Add support for memory mapped UARTs to coreboot and add the OXPCIe952 as an

2011-04-26 23:47:04 +00:00

ec

Thinkpad: Enable Battery events

2011-04-28 09:29:06 +00:00

include

Enable AHCI mode and hide IDE controller to reduce boot time.

2011-05-15 21:38:08 +00:00

lib

Change read_option() to a macro that wraps some API uglyness

2011-05-10 21:53:13 +00:00

mainboard

Switch processor cores to pstate 0 early to reduce boot time.

2011-05-15 21:51:31 +00:00

northbridge

Build device paths for AP cores so that coreboot will report them to the OS.

2011-05-15 21:45:46 +00:00

pc80

Change read_option() to a macro that wraps some API uglyness

2011-05-10 21:53:13 +00:00

southbridge

Program the I/O APIC ID.

2011-05-15 21:41:00 +00:00

superio

some ifdef --> if fixes

2011-04-21 20:24:43 +00:00

vendorcode

Move mmconf base from e0000000 to f8000000 to avoid conflict with UMA BAR.

2011-05-15 21:26:04 +00:00

Kconfig

Add option 'compress ramstage'

2011-05-02 19:53:04 +00:00

Kconfig.deprecated_options

some ifdef --> if fixes

2011-04-21 20:24:43 +00:00