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2431602575
Some chips previously defined CONFIG_I2C and others didn't. Standardize the usage by removing CONFIG_I2C from all config_chip files and force it to be defined at the board level. Also, make boards define CONFIG_I2C_MASTER and/or CONFIG_I2C_SLAVE based on the I2C interfaces they will use - this will assist with some later cleanup. BUG=chromium:550206 TEST=`make buildall -j` BRANCH=None Change-Id: I2f0970e494ea49611abc315587c7c9aa0bc2d14a Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/310070 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Alec Berg <alecaberg@chromium.org>
123 lines
2.5 KiB
C
123 lines
2.5 KiB
C
/* Copyright (c) 2013 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*/
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/* IT8380 development board configuration */
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#ifndef __CROS_EC_BOARD_H
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#define __CROS_EC_BOARD_H
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/* Optional features */
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#define CHIP_FAMILY_IT839X
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#define CONFIG_BATTERY_SMART
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#define CONFIG_FANS 1
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#define CONFIG_I2C
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#define CONFIG_I2C_MASTER
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#define CONFIG_IT83XX_KEYBOARD_KSI_WUC_INT
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#define CONFIG_IT83XX_LPC_ACCESS_INT
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#define CONFIG_IT83XX_PECI_WITH_INTERRUPT
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#define CONFIG_IT83XX_SMCLK2_ON_GPC7
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#define CONFIG_KEYBOARD_BOARD_CONFIG
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#define CONFIG_KEYBOARD_PROTOCOL_8042
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#define CONFIG_LOW_POWER_IDLE
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#define CONFIG_PECI_TJMAX 100
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#define CONFIG_POWER_BUTTON
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/* Use CS0 of SSPI */
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#define CONFIG_SPI_FLASH_PORT 0
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#define CONFIG_UART_HOST
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/* Optional console commands */
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#define CONFIG_CMD_FLASH
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#define CONFIG_CMD_SCRATCHPAD
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#define CONFIG_CMD_STACKOVERFLOW
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/* Debug */
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#undef CONFIG_CMD_FORCETIME
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#undef CONFIG_HOOK_DEBUG
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#undef CONFIG_KEYBOARD_DEBUG
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#undef CONFIG_UART_TX_BUF_SIZE
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#define CONFIG_UART_TX_BUF_SIZE 4096
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#ifndef __ASSEMBLER__
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#define I2C_PORT_CHARGER 2
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#define I2C_PORT_BATTERY 2
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#include "gpio_signal.h"
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enum pwm_channel {
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PWM_CH_FAN,
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PWM_CH_1,
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PWM_CH_2,
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PWM_CH_3,
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PWM_CH_4,
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PWM_CH_5,
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PWM_CH_7,
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/* Number of PWM channels */
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PWM_CH_COUNT
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};
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enum adc_channel {
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ADC_CH_0,
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ADC_CH_1,
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ADC_CH_2,
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ADC_CH_3,
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ADC_CH_4,
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ADC_CH_5,
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ADC_CH_6,
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ADC_CH_7,
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/* Number of ADC channels */
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ADC_CH_COUNT
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};
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enum ec2i_setting {
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EC2I_SET_KB_LDN,
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EC2I_SET_KB_IRQ,
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EC2I_SET_KB_ENABLE,
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EC2I_SET_MOUSE_LDN,
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EC2I_SET_MOUSE_IRQ,
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EC2I_SET_MOUSE_ENABLE,
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EC2I_SET_PMC1_LDN,
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EC2I_SET_PMC1_IRQ,
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EC2I_SET_PMC1_ENABLE,
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EC2I_SET_PMC2_LDN,
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EC2I_SET_PMC2_BASE0_MSB,
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EC2I_SET_PMC2_BASE0_LSB,
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EC2I_SET_PMC2_BASE1_MSB,
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EC2I_SET_PMC2_BASE1_LSB,
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EC2I_SET_PMC2_IRQ,
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EC2I_SET_PMC2_ENABLE,
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EC2I_SET_SMFI_LDN,
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EC2I_SET_SMFI_H2RAM_IO_BASE,
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EC2I_SET_SMFI_H2RAM_MAP_LPC_IO,
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EC2I_SET_SMFI_ENABLE,
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EC2I_SET_PMC3_LDN,
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EC2I_SET_PMC3_BASE0_MSB,
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EC2I_SET_PMC3_BASE0_LSB,
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EC2I_SET_PMC3_BASE1_MSB,
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EC2I_SET_PMC3_BASE1_LSB,
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EC2I_SET_PMC3_IRQ,
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EC2I_SET_PMC3_ENABLE,
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EC2I_SET_RTCT_LDN,
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EC2I_SET_RTCT_P80LB,
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EC2I_SET_RTCT_P80LE,
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EC2I_SET_RTCT_P80LC,
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#ifdef CONFIG_UART_HOST
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EC2I_SET_UART2_LDN,
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EC2I_SET_UART2_IO_BASE_MSB,
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EC2I_SET_UART2_IO_BASE_LSB,
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EC2I_SET_UART2_IRQ,
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EC2I_SET_UART2_IRQ_TYPE,
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EC2I_SET_UART2_ENABLE,
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#endif
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/* Number of EC2I settings */
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EC2I_SETTING_COUNT
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};
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#endif /* !__ASSEMBLER__ */
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#endif /* __CROS_EC_BOARD_H */
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