Duncan Laurie df7be71374 haswell: Add ULT device IDs ...

Device IDs for northbridge and GPU.

Also mask off the lock bit in the memory map registers.

Change-Id: I9a4955d4541b938285712e82dd0b1696fa272b63
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: http://review.coreboot.org/2646
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marc.jones@se-eng.com>

2013-03-14 18:24:20 +01:00

..

arch

Eliminate do_div().

2013-03-08 23:14:26 +01:00

console

Eliminate do_div().

2013-03-08 23:14:26 +01:00

cpu

haswell: Properly Guard Engergy Policy by CPUID

2013-03-14 05:10:32 +01:00

device

GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«

2013-03-01 10:16:08 +01:00

drivers

GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«

2013-03-01 10:16:08 +01:00

ec

Support ITE IT8518 embedded controller running Quanta's firmware

2013-03-14 04:54:21 +01:00

include

haswell: add PCI id support

2013-03-14 05:10:13 +01:00

lib

Eliminate do_div().

2013-03-08 23:14:26 +01:00

mainboard

graysreef: update platform information

2013-03-14 18:23:05 +01:00

northbridge

haswell: Add ULT device IDs

2013-03-14 18:24:20 +01:00

southbridge

lynxpoint: Add Kconfig entry for Low Power chipset

2013-03-14 18:24:14 +01:00

superio

AMD SB800: don't switch clock from 14 to 48 MHz for smscsuperio

2013-03-06 19:07:28 +01:00

vendorcode

AGESA: Fix CR0_PE bit define

2013-03-08 07:30:06 +01:00

Kconfig

bump SeaBIOS to 1.7.2.1

2013-03-04 11:00:17 +01:00