mirror of
https://github.com/Telecominfraproject/OpenCellular.git
synced 2026-01-08 16:41:55 +00:00
8cbf285173
In order to improve the performance of sysjump, the CL increases the clock freq of ec to 50M HZ (The maximum freq rate for SPI flash.). Once ec jumps into the other region successfully, the clock freq is restored to the default value (15MHz) in main routine. Modified sources: 1. clock.c: Add clock_turbo for speed up clock's freq to max. 2. clock_chip.h: The declarartion for clock_turbo. 3. system.c: Speed up clock rate before downloading FW. BRANCH=none BUG=chrome-os-partner:34346 TEST=make BOARD=npcx_evb; test nuvoton IC specific drivers Change-Id: I996e35fff336e6292599497feb1ee6c2f95becba Signed-off-by: Mulin Chao <mlchao@nuvoton.com> Reviewed-on: https://chromium-review.googlesource.com/381799 Reviewed-by: Aaron Durbin <adurbin@chromium.org>
30 lines
666 B
C
30 lines
666 B
C
/* Copyright (c) 2014 The Chromium OS Authors. All rights reserved.
|
|
* Use of this source code is governed by a BSD-style license that can be
|
|
* found in the LICENSE file.
|
|
*/
|
|
|
|
/* NPCX-specific clock module for Chrome EC */
|
|
|
|
#ifndef __CROS_EC_CLOCK_CHIP_H
|
|
#define __CROS_EC_CLOCK_CHIP_H
|
|
|
|
/* Default is 40MHz (target is 15MHz) */
|
|
#define OSC_CLK 15000000
|
|
|
|
/**
|
|
* Return the current APB1 clock frequency in Hz.
|
|
*/
|
|
int clock_get_apb1_freq(void);
|
|
|
|
/**
|
|
* Return the current APB2 clock frequency in Hz.
|
|
*/
|
|
int clock_get_apb2_freq(void);
|
|
|
|
/**
|
|
* Set the CPU clock to maximum freq for better performance.
|
|
*/
|
|
void clock_turbo(void);
|
|
|
|
#endif /* __CROS_EC_CLOCK_CHIP_H */
|