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0f73a129b4
The Cortex-M0 core is based on ARMv6-M instruction set rather than ARMv7-M as Cortex-M3 and M4. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=none BUG=none TEST=run console on STM32F072, and pass all available unit-tests on target. Change-Id: I9bdf6637132ba4a3e739d388580a72b4c84e930e Reviewed-on: https://chromium-review.googlesource.com/188982 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org>
82 lines
2.7 KiB
ArmAsm
82 lines
2.7 KiB
ArmAsm
/* Copyright (c) 2014 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*
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* Context swtching
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*/
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#include "config.h"
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.text
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.syntax unified
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.code 16
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/**
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* Task context switching
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*
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* Change the task scheduled after returning from the exception.
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*
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* Save the registers of the current task below the exception context on
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* its task, then restore the live registers of the next task and set the
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* process stack pointer to the new stack.
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*
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* r0: pointer to the task to switch from
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* r1: pointer to the task to switch to
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*
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* must be called from interrupt context
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*
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* the structure of the saved context on the stack is :
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* r8, r9, r10, r11, r4, r5, r6, r7, r0, r1, r2, r3, r12, lr, pc, psr
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* additional registers <|> exception frame
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*/
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.global __switchto
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.thumb_func
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__switchto:
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mrs r2, psp @ get the task stack where the context has been saved
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mov r3, sp
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mov sp, r2
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push {r4-r7} @ save additional r4-r7 in the task stack
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mov r4, r8
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mov r5, r9
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mov r6, r10
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mov r7, r11
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push {r4-r7} @ save additional r8-r11 in the task stack
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mov r2, sp @ prepare to save former task stack pointer
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mov sp, r3 @ restore system stack pointer
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str r2, [r0] @ save the task stack pointer in its context
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ldr r2, [r1] @ get the new scheduled task stack pointer
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ldmia r2!, {r4-r7} @ restore r8-r11 for the next task context
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mov r8, r4
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mov r9, r5
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mov r10, r6
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mov r11, r7
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ldmia r2!, {r4-r7} @ restore r4-r7 for the next task context
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msr psp, r2 @ set the process stack pointer to exception context
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bx lr @ return from exception
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/**
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* Start the task scheduling. r0 is a pointer to task_stack_ready, which is
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* set to 1 after the task stack is set up.
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*/
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.global __task_start
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.thumb_func
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__task_start:
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ldr r2,=scratchpad @ area used as dummy thread stack for the first switch
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movs r3, #2 @ use : priv. mode / thread stack / no floating point
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adds r2, #17*4 @ put the pointer at the top of the stack
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movs r1, #0 @ __Schedule parameter : re-schedule nothing
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msr psp, r2 @ setup a thread stack up to the first context switch
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movs r2, #1
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isb @ ensure the write is done
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msr control, r3
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movs r3, r0
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movs r0, #0 @ __Schedule parameter : de-schedule nothing
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isb @ ensure the write is done
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str r2, [r3] @ Task scheduling is now active
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bl __schedule @ execute the task with the highest priority
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/* we should never return here */
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movs r0, #1 @ set to EC_ERROR_UNKNOWN
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bx lr
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