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e54ac8da05
If the EC got reset while some device on the bus was midway through a transaction, the bus may we wedged and all of our i2c transactions will fail. Try our best to unwedge the bus at bootup. Do this even if the bus doens't look wedeged because some device on the bus may be in a quiescent state at the moment but be waiting to pounce on the bus when it sees the clock start running. BUG=chrome-os-partner:13378 TEST=Capture scope trace in normal bootup TEST=Capture scope trace in failure bootup with an extra print statement in the code when scl/sda were not high at bootup. Forced this case by looping i2c transactions to tpschrome and rebooting midway through. BRANCH=snow Signed-off-by: Doug Anderson <dianders@chromium.org> Signed-off-by: David Hendricks <dhendrix@chromium.org> (Note: Credit for this patch goes to Doug, I just uploaded the initial work-in-progress version to gerrit --dhendrix) Change-Id: I8da69b5294160048f91461159c039f8f2093e971 Reviewed-on: https://gerrit.chromium.org/gerrit/32168 Commit-Ready: David Hendricks <dhendrix@chromium.org> Tested-by: David Hendricks <dhendrix@chromium.org> Reviewed-by: Doug Anderson <dianders@chromium.org>