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https://github.com/Telecominfraproject/OpenCellular.git
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81b2654dc9
Add console and usb_spi commands to enable or disable IOs to the socket, so that it will not be powered if a chip is inserted, and control reset and boot_cfg. BUG=b:36910757 BRANCH=None TEST=Check no voltage when socket is disabled. Full spiflash compatibility. Change-Id: Ie4ce0613a868030833abfdccd827acce2753dc6f Reviewed-on: https://chromium-review.googlesource.com/509072 Commit-Ready: Nick Sanders <nsanders@chromium.org> Tested-by: Nick Sanders <nsanders@chromium.org> Reviewed-by: Mary Ruthven <mruthven@chromium.org>
125 lines
4.8 KiB
C
125 lines
4.8 KiB
C
/* -*- mode:c -*-
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* Copyright 2017 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*/
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/*
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* This file describes GPIO mapping for the cr50 code running on the H1 chip.
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*
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* For the purposes of this file H1 core has the following logical and
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* physical items and properties:
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*
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* - 32 internal GPIOs, which are split into two ports of 16 bits each.
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* Ports' architecture and programmig is described in "ARM Cortex-M System
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* Design Kit TRM" DDIO47B.
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*
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* - a set of peripherals - slave and master SPI and I2C controllers, UARTs,
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* interrupt controller, etc.
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*
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* - 28 pins on the package named DIOA0..14, DIOB0..7 and DIOM0..4
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*
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* - a PINMUX - a unit which allows to interconnect objects from the three
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* groups listed above. Note that some peripherals are attached to some
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* pins directly, so in case those peripherals are used the pins should
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* not be connected by PINMUX to any other outputs.
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*
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* The below macros are somewhat misleading (apparently for historical
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* reasons), as PIN(p, b) component in fact refers not to the external pin,
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* but to the GPIO (bit b on port p), where bit is in 0..15 range, and port is
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* in 0..1 range.
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*
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* To describe routing of an external signal two macro instantiations are
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* required:
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*
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* The GPIO_INT() or GPIO() macro assigns the signal a name and assigns it to
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* the internal GPIO port, (again, defining the port using the PIN(port, bit)
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* component of the macro invocation). GPIO_INT definitions assign their
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* respective signals to interrupts and ISRs.
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*
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* The PINMUX macro assigns the previously defined GPIO to another object,
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* most commonly to an external pin, but possibly to some internal component.
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*/
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/* Declare symbolic names for all the GPIOs that we care about.
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* Note: Those with interrupt handlers must be declared first. */
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/* Use these to reset/flash the DUT haven */
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GPIO(DUT_PWR_EN, PIN(0, 2), GPIO_OUT_LOW) /* DIOB5 */
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GPIO(DUT_PWRGOOD, PIN(0, 3), GPIO_INPUT) /* DIOB7 */
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/* These GPIOS are switched between input/output by socket enable. */
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GPIO(DUT_BOOT_CFG, PIN(0, 0), GPIO_OUT_LOW) /* DIOB2 */
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GPIO(DUT_RST_L, PIN(0, 1), GPIO_OUT_LOW) /* DIOB3 */
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GPIO(LED_B_L, PIN(0, 4), GPIO_ODR_HIGH) /* DIOA9 */
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GPIO(LED_R_L, PIN(0, 5), GPIO_ODR_HIGH) /* DIOA13 */
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GPIO(LED_G_L, PIN(0, 6), GPIO_ODR_HIGH) /* DIOA14 */
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GPIO(LED_L, PIN(0, 11), GPIO_ODR_HIGH) /* DIOB6 */
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/* GPIOs used to tristate the SPI bus */
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GPIO(SPI_MOSI, PIN(0, 7), GPIO_INPUT) /* DIOA4 */
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GPIO(SPI_CLK, PIN(0, 8), GPIO_INPUT) /* DIOA8 */
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GPIO(SPI_CS_L, PIN(0, 9), GPIO_INPUT) /* DIOA14 */
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GPIO(SPI_CS_ALT_L, PIN(0, 10), GPIO_INPUT) /* DIOA5 */
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/* Unimplemented signals which we need to emulate for now */
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/* TODO(wfrichar): Half the boards don't use this signal. Take it out. */
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UNIMPLEMENTED(ENTERING_RW)
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/*
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* If we are included by generic GPIO code that doesn't know about the PINMUX
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* macro we need to provide an empty definition so that the invocations don't
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* interfere with other GPIO processing.
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*/
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#ifndef PINMUX
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#define PINMUX(...)
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#endif
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/* GPIOs - mark outputs as inputs too, to read back from the driven pad */
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PINMUX(GPIO(DUT_BOOT_CFG), B2, DIO_INPUT)
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PINMUX(GPIO(DUT_RST_L), B3, DIO_INPUT)
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PINMUX(GPIO(DUT_PWR_EN), B5, DIO_INPUT)
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PINMUX(GPIO(DUT_PWRGOOD), B7, DIO_INPUT)
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PINMUX(GPIO(LED_B_L), A9, DIO_INPUT)
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PINMUX(GPIO(LED_R_L), A13, DIO_INPUT)
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PINMUX(GPIO(LED_G_L), A14, DIO_INPUT)
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PINMUX(GPIO(LED_L), B6, DIO_INPUT)
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/* UARTs */
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PINMUX(FUNC(UART0_TX), A0, DIO_OUTPUT) /* Cr50 console */
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PINMUX(FUNC(UART0_RX), A1, DIO_INPUT | DIO_WAKE_LOW)
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/*
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* UART1_TX will be enabled when the socket power is enabled,
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* to prevent backpowering.
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*
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* PINMUX(FUNC(UART1_TX), A7, DIO_OUTPUT)
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*/
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/* DUT console */
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PINMUX(FUNC(UART1_RX), A3, DIO_INPUT)
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/* I2C setup */
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PINMUX(FUNC(I2C0_SCL), B0, DIO_INPUT | DIO_OUTPUT)
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PINMUX(FUNC(I2C0_SDA), B1, DIO_INPUT | DIO_OUTPUT)
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/*
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* Both SPI master and slave buses are wired directly to specific pads
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*
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* If CONFIG_SPI_MASTER is defined, these pads are used:
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* DIOA4 = SPI_MOSI (output)
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* DIOA8 = SPI_CLK (output)
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* DIOA11 = SPI_MISO (input)
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* DIOA14 = SPI_CS_L (output) - mn50 doesn't use HS CS implementation.
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* The pads are only connected to the peripheral outputs when SPI is enabled to
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* avoid interfering with other things on the board.
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* Note: Double-check to be sure these are configured in spi_master.c
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*/
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PINMUX(GPIO(SPI_MOSI), A4, DIO_OUTPUT)
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PINMUX(GPIO(SPI_CLK), A8, DIO_OUTPUT)
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PINMUX(GPIO(SPI_CS_ALT_L), A5, DIO_OUTPUT)
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#undef PINMUX
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