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9f37e4a655
BUG=b:62594071 BRANCH=scarlet TEST=boot scarlet and confirm it's in tablet mode Change-Id: I85cc53bb66d70acc9f5c77bd7c428447159dabb0 Reviewed-on: https://chromium-review.googlesource.com/534937 Commit-Ready: Philip Chen <philipchen@chromium.org> Tested-by: Philip Chen <philipchen@chromium.org> Reviewed-by: Alexandru M Stan <amstan@chromium.org>
260 lines
7.2 KiB
C
260 lines
7.2 KiB
C
/* Copyright 2016 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*/
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/* Configuration for Nuvoton M4 EB */
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#ifndef __CROS_EC_BOARD_H
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#define __CROS_EC_BOARD_H
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/* Optional modules */
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#define CONFIG_ADC
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#define CONFIG_CHIPSET_RK3399
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#define CONFIG_CMD_ACCELS
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#define CONFIG_CMD_RTC
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#define CONFIG_HOSTCMD_RTC
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#define CONFIG_HOSTCMD_SPS
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#define CONFIG_I2C
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#define CONFIG_I2C_MASTER
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#define CONFIG_I2C_VIRTUAL_BATTERY
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#define CONFIG_I2C_PASSTHRU_RESTRICTED
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#define CONFIG_LED_COMMON
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#define CONFIG_LOW_POWER_IDLE
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#define CONFIG_POWER_COMMON
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#define CONFIG_PWM
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#define CONFIG_PWM_DISPLIGHT
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#define CONFIG_SPI
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#define CONFIG_SPI_MASTER
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#define CONFIG_SPI_FLASH_GD25LQ40
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#define CONFIG_SPI_FLASH_REGS
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#define CONFIG_SYSTEM_UNLOCKED /* Allow dangerous commands for testing */
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/*
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* We are code space-constrained on scarlet, so take 10K that is normally used
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* as data RAM (was 30K, now 22K) and use it for code RAM (was 96K, now 104K)
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*/
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#define RAM_SHIFT_SIZE (8 * 1024)
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#undef CONFIG_RO_SIZE
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#define CONFIG_RO_SIZE (NPCX_PROGRAM_MEMORY_SIZE + RAM_SHIFT_SIZE)
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#undef CONFIG_RAM_BASE
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#define CONFIG_RAM_BASE (0x200C0000 + RAM_SHIFT_SIZE)
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#undef CONFIG_RAM_SIZE
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#define CONFIG_RAM_SIZE (0x00008000 - 0x800 - RAM_SHIFT_SIZE)
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/* Region sizes are no longer a power of 2 so we can't enable MPU */
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#undef CONFIG_MPU
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/* Enable a different power-on sequence than the one on gru */
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#undef CONFIG_CHIPSET_POWER_SEQ_VERSION
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#define CONFIG_CHIPSET_POWER_SEQ_VERSION 1
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/* Optional features */
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#define CONFIG_BOARD_VERSION
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#define CONFIG_BOARD_SPECIFIC_VERSION
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#define CONFIG_BUTTON_COUNT 2
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#define CONFIG_BUTTON_RECOVERY
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#define CONFIG_FLASH_SIZE 0x00080000 /* 512KB spi flash */
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#define CONFIG_HOST_COMMAND_STATUS
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/* By default, set hcdebug to off */
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#undef CONFIG_HOSTCMD_DEBUG_MODE
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#define CONFIG_HOSTCMD_DEBUG_MODE HCDEBUG_OFF
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#define CONFIG_LTO
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#define CONFIG_POWER_BUTTON
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#define CONFIG_POWER_BUTTON_IGNORE_LID
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#define CONFIG_POWER_TRACK_HOST_SLEEP_STATE
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#define CONFIG_SOFTWARE_PANIC
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#define CONFIG_VBOOT_HASH
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#define CONFIG_CHARGER
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#define CONFIG_CHARGER_BD99955
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#define CONFIG_CHARGER_INPUT_CURRENT 512
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#define CONFIG_CHARGER_MAINTAIN_VBAT
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#define CONFIG_CHARGER_V2
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#define CONFIG_CHARGER_MIN_BAT_PCT_FOR_POWER_ON 2
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#define CONFIG_CHARGER_LIMIT_POWER_THRESH_BAT_PCT 2
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#define CONFIG_CHARGER_LIMIT_POWER_THRESH_CHG_MW 15000
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#define CONFIG_CHARGER_PROFILE_OVERRIDE
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#define CONFIG_USB_CHARGER
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#define CONFIG_USB_MUX_VIRTUAL
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/* Increase tx buffer size, as we'd like to stream EC log to AP. */
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#undef CONFIG_UART_TX_BUF_SIZE
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#define CONFIG_UART_TX_BUF_SIZE 4096
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/* Motion Sensors */
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#define CONFIG_ACCELGYRO_BMI160
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#define CONFIG_ACCEL_INTERRUPTS
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#define CONFIG_ACCELGYRO_BMI160_INT_EVENT TASK_EVENT_CUSTOM(4)
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#define CONFIG_BARO_BMP280
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/* Temp Sensors */
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#define CONFIG_TEMP_SENSOR
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#define CONFIG_TEMP_SENSOR_TMP432
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/* To be able to indicate the device is in tablet mode. */
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#define CONFIG_TABLET_MODE_SWITCH
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/* FIFO size is in power of 2. */
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#define CONFIG_ACCEL_FIFO 256
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#define CONFIG_ACCEL_FIFO_THRES (CONFIG_ACCEL_FIFO / 3)
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/* Sensors without hardware FIFO are in forced mode. */
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#define CONFIG_ACCEL_FORCE_MODE_MASK (1 << LID_BARO)
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/* USB PD config */
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#define CONFIG_CASE_CLOSED_DEBUG_EXTERNAL
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#define CONFIG_CHARGE_MANAGER
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#define CONFIG_USB_POWER_DELIVERY
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#define CONFIG_USB_PD_ALT_MODE
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#define CONFIG_USB_PD_ALT_MODE_DFP
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#define CONFIG_USB_PD_CUSTOM_VDM
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#define CONFIG_USB_PD_DISCHARGE
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#define CONFIG_USB_PD_DISCHARGE_GPIO
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#define CONFIG_USB_PD_DUAL_ROLE
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#define CONFIG_USB_PD_LOGGING
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#define CONFIG_USB_PD_LOG_SIZE 512
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#define CONFIG_USB_PD_PORT_COUNT 1
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#define CONFIG_USB_PD_TCPM_FUSB302
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#define CONFIG_USB_PD_MAX_SINGLE_SOURCE_CURRENT TYPEC_RP_3A0
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#define CONFIG_USB_PD_VBUS_DETECT_CHARGER
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#define CONFIG_USB_PD_TRY_SRC
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#define CONFIG_USBC_SS_MUX
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#define CONFIG_USBC_VCONN
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#define CONFIG_USBC_VCONN_SWAP
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#define CONFIG_USB_PD_COMM_LOCKED
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#define CONFIG_BATTERY_CUT_OFF
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#define CONFIG_BATTERY_PRESENT_GPIO GPIO_EC_BATT_PRES_L
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#define CONFIG_BATTERY_RETRY_NACK
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#define CONFIG_BATTERY_REVIVE_DISCONNECT
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#define CONFIG_BATTERY_SMART
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#define PD_OPERATING_POWER_MW 15000
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#define PD_MAX_POWER_MW 60000
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#define PD_MAX_CURRENT_MA 3000
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#define PD_MAX_VOLTAGE_MV 20000
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#define PD_POWER_SUPPLY_TURN_ON_DELAY 30000 /* us */
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#define PD_POWER_SUPPLY_TURN_OFF_DELAY 50000 /* us */
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#define PD_VCONN_SWAP_DELAY 5000 /* us */
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/* Optional features for test commands */
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#define CONFIG_CMD_CHARGER_PSYS
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/* Set PSYS gain for 50W max measurement */
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#define BD99955_PSYS_GAIN_SELECT \
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BD99955_CMD_PMON_IOUT_CTRL_SET_PMON_GAIN_SET_08UAW
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#define CONFIG_UART_HOST 0
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/* Optional feature - used by nuvoton */
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#define NPCX_UART_MODULE2 1 /* 0:GPIO10/11 1:GPIO64/65 as UART */
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#define NPCX_JTAG_MODULE2 0 /* 0:GPIO21/17/16/20 1:GPIOD5/E2/D4/E5 as JTAG*/
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#define NPCX_TACH_SEL2 0 /* 0:GPIO40/A4 1:GPIO93/D3 as TACH */
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/* Enable SHI PU on transition to S0. Disable the PU otherwise for leakage. */
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#define NPCX_SHI_CS_PU
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#define NPCX_SHI_BYPASS_OVER_256B
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/* Optional for testing */
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#undef CONFIG_PECI
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#undef CONFIG_PSTORE
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/* Modules we want to exclude */
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#undef CONFIG_CMD_BATTFAKE
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#undef CONFIG_CMD_CHARGER_PSYS
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#undef CONFIG_CMD_FLASH
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#undef CONFIG_CMD_HASH
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#undef CONFIG_CMD_I2C_SCAN
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#undef CONFIG_CMD_MD
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#undef CONFIG_CMD_POWERINDEBUG
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#undef CONFIG_CMD_TIMERINFO
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#undef CONFIG_CONSOLE_CMDHELP
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#undef CONFIG_CONSOLE_HISTORY
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/*
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* Remove task profiling to improve SHI interrupt latency.
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* TODO(crosbug.com/p/55710): Re-define once interrupt latency is within
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* tolerance.
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*/
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#undef CONFIG_TASK_PROFILING
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#define I2C_PORT_TCPC0 NPCX_I2C_PORT0_0
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#define I2C_PORT_BARO NPCX_I2C_PORT1
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#define I2C_PORT_CHARGER NPCX_I2C_PORT2
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#define I2C_PORT_THERMAL NPCX_I2C_PORT2
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#define I2C_PORT_BATTERY NPCX_I2C_PORT3
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#define I2C_PORT_VIRTUAL_BATTERY I2C_PORT_BATTERY
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/* Enable Accel over SPI */
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#define CONFIG_SPI_ACCEL_PORT 0 /* SPI master port (SPIP) form BMI160 */
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#define CONFIG_KEYBOARD_PROTOCOL_MKBP
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#define CONFIG_MKBP_EVENT
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/* Define the MKBP events which are allowed to wakeup AP in S3. */
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#define CONFIG_MKBP_WAKEUP_MASK \
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(EC_HOST_EVENT_MASK(EC_HOST_EVENT_LID_OPEN) |\
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EC_HOST_EVENT_MASK(EC_HOST_EVENT_POWER_BUTTON) |\
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EC_HOST_EVENT_MASK(EC_HOST_EVENT_KEY_PRESSED) |\
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EC_HOST_EVENT_MASK(EC_HOST_EVENT_RTC))
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#ifndef __ASSEMBLER__
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enum adc_channel {
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/* Real ADC channels begin here */
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ADC_BOARD_ID = 0,
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ADC_PP900_AP,
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ADC_PP1200_LPDDR,
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ADC_PPVAR_CLOGIC,
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ADC_PPVAR_LOGIC,
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ADC_CH_COUNT
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};
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enum button {
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BUTTON_VOLUME_DOWN = 0,
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BUTTON_VOLUME_UP = 1,
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BUTTON_COUNT
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};
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#ifdef CONFIG_TEMP_SENSOR_TMP432
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enum temp_sensor_id {
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/* TMP432 local and remote sensors */
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TEMP_SENSOR_I2C_TMP432_LOCAL,
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TEMP_SENSOR_I2C_TMP432_REMOTE1,
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TEMP_SENSOR_I2C_TMP432_REMOTE2,
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TEMP_SENSOR_COUNT
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};
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#endif
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enum pwm_channel {
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PWM_CH_DISPLIGHT,
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/* Number of PWM channels */
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PWM_CH_COUNT
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};
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/* power signal definitions */
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enum power_signal {
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PP5000_PWR_GOOD = 0,
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SYS_PWR_GOOD,
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AP_PWR_GOOD,
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SUSPEND_DEASSERTED,
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/* Number of signals */
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POWER_SIGNAL_COUNT,
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};
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/* Motion sensors */
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enum sensor_id {
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LID_ACCEL = 0,
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LID_GYRO,
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LID_BARO,
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};
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#include "gpio_signal.h"
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#include "registers.h"
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void board_reset_pd_mcu(void);
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int board_get_version(void);
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#endif /* !__ASSEMBLER__ */
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#endif /* __CROS_EC_BOARD_H */
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