mirror of
https://github.com/Telecominfraproject/OpenCellular.git
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a04fc68e72
This combines stm32 and chip/g usb_i2c interfaces so they will not diverge. Note that this fixes the chip/g implementation to use 8-bit i2c addresses. BUG=chrome-os-partner:57059 BRANCH=none TEST=servod interacts with servo_micro and servo_v4 Change-Id: Ibff217d84b132556202c8a71e3d42c07d546c634 Reviewed-on: https://chromium-review.googlesource.com/405108 Commit-Ready: Nick Sanders <nsanders@chromium.org> Tested-by: Nick Sanders <nsanders@chromium.org> Reviewed-by: Mary Ruthven <mruthven@chromium.org>
115 lines
2.6 KiB
C
115 lines
2.6 KiB
C
/* Copyright 2016 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*/
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/* Servo micro configuration */
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#ifndef __CROS_EC_BOARD_H
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#define __CROS_EC_BOARD_H
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/* 48 MHz SYSCLK clock frequency */
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#define CPU_CLOCK 48000000
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/* Enable USART1,3,4 and USB streams */
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#define CONFIG_STREAM_USART
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#define CONFIG_STREAM_USART2
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#define CONFIG_STREAM_USART3
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#define CONFIG_STREAM_USART4
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#define CONFIG_STREAM_USB
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#define CONFIG_CMD_USART_INFO
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/* The UART console is on USART1 (PA9/PA10) */
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#undef CONFIG_UART_CONSOLE
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#define CONFIG_UART_CONSOLE 1
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#undef CONFIG_UART_TX_DMA
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#undef CONFIG_UART_RX_DMA
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/* Optional features */
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#define CONFIG_STM_HWTIMER32
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#define CONFIG_HW_CRC
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/* USB Configuration */
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#define CONFIG_USB
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#define CONFIG_USB_PID 0x501a
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#define CONFIG_USB_CONSOLE
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#define CONFIG_USB_UPDATE
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#undef CONFIG_USB_MAXPOWER_MA
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#define CONFIG_USB_MAXPOWER_MA 100
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#define CONFIG_USB_SERIALNO
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#define DEFAULT_SERIALNO "Uninitialized"
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/* USB interface indexes (use define rather than enum to expand them) */
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#define USB_IFACE_USART4_STREAM 0
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#define USB_IFACE_UPDATE 1
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#define USB_IFACE_SPI 2
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#define USB_IFACE_CONSOLE 3
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#define USB_IFACE_I2C 4
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#define USB_IFACE_USART3_STREAM 5
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#define USB_IFACE_USART2_STREAM 6
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#define USB_IFACE_COUNT 7
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/* USB endpoint indexes (use define rather than enum to expand them) */
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#define USB_EP_CONTROL 0
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#define USB_EP_USART4_STREAM 1
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#define USB_EP_UPDATE 2
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#define USB_EP_SPI 3
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#define USB_EP_CONSOLE 4
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#define USB_EP_I2C 5
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#define USB_EP_USART3_STREAM 6
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#define USB_EP_USART2_STREAM 7
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#define USB_EP_COUNT 8
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/* Enable console recasting of GPIO type. */
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#define CONFIG_CMD_GPIO_EXTENDED
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/* Enable control of SPI over USB */
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#define CONFIG_USB_SPI
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#define CONFIG_SPI_MASTER
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#define CONFIG_SPI_FLASH_PORT 0 /* First SPI master port */
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/* This is not actually an EC so disable some features. */
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#undef CONFIG_WATCHDOG_HELP
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#undef CONFIG_LID_SWITCH
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/* Enable control of I2C over USB */
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#define CONFIG_USB_I2C
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#define CONFIG_I2C
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#define CONFIG_I2C_MASTER
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#define I2C_PORT_MASTER 0
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/*
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* Allow dangerous commands all the time, since we don't have a write protect
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* switch.
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*/
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#define CONFIG_SYSTEM_UNLOCKED
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#ifndef __ASSEMBLER__
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/* Timer selection */
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#define TIM_CLOCK32 2
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#include "gpio_signal.h"
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/* USB string indexes */
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enum usb_strings {
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USB_STR_DESC = 0,
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USB_STR_VENDOR,
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USB_STR_PRODUCT,
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USB_STR_SERIALNO,
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USB_STR_VERSION,
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USB_STR_I2C_NAME,
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USB_STR_USART4_STREAM_NAME,
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USB_STR_CONSOLE_NAME,
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USB_STR_USART3_STREAM_NAME,
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USB_STR_USART2_STREAM_NAME,
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USB_STR_UPDATE_NAME,
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USB_STR_COUNT
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};
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#endif /* !__ASSEMBLER__ */
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#endif /* __CROS_EC_BOARD_H */
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