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https://github.com/Telecominfraproject/OpenCellular.git
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edb727f8a3
Adding fix of event timer for CL:358730. Signed-off-by: Dino Li <dino.li@ite.com.tw> BRANCH=none BUG=chrome-os-partner:55044 TEST=We simulate the delay time between first and second read, and prove this method can avoid latch fail. Change-Id: I82cd4ce470ffc9a8262d9303e3fd390812c89cac Reviewed-on: https://chromium-review.googlesource.com/380349 Commit-Ready: Dino Li <Dino.Li@ite.com.tw> Tested-by: Dino Li <Dino.Li@ite.com.tw> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
81 lines
2.2 KiB
C
81 lines
2.2 KiB
C
/* Copyright 2015 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*/
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/* External timers control module for IT83xx. */
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#ifndef __CROS_EC_HWTIMER_CHIP_H
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#define __CROS_EC_HWTIMER_CHIP_H
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#define TIMER_COUNT_1US_SHIFT 3
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/* Microseconds to event timer counter setting register */
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#define EVENT_TIMER_US_TO_COUNT(us) ((us) << TIMER_COUNT_1US_SHIFT)
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/* Event timer counter observation value to microseconds */
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#define EVENT_TIMER_COUNT_TO_US(cnt) ((cnt) >> TIMER_COUNT_1US_SHIFT)
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#define FREE_EXT_TIMER_L EXT_TIMER_3
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#define FREE_EXT_TIMER_H EXT_TIMER_4
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#define FAN_CTRL_EXT_TIMER EXT_TIMER_5
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#define EVENT_EXT_TIMER EXT_TIMER_6
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#define WDT_EXT_TIMER EXT_TIMER_7
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#define LOW_POWER_EXT_TIMER EXT_TIMER_8
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enum ext_timer_clock_source {
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EXT_PSR_32P768K_HZ = 0,
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EXT_PSR_1P024K_HZ = 1,
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EXT_PSR_32_HZ = 2,
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EXT_PSR_8M_HZ = 3
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};
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/*
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* 24-bit timers: external timer 3, 5, and 7
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* 32-bit timers: external timer 4, 6, and 8
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*/
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enum ext_timer_sel {
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/* timer 3 and 4 combine mode for free running timer */
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EXT_TIMER_3 = 0,
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EXT_TIMER_4,
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/* For fan control */
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EXT_TIMER_5,
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/* timer 6 for event timer */
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EXT_TIMER_6,
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/* For WDT capture important state information before being reset */
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EXT_TIMER_7,
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/* HW timer for low power mode */
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EXT_TIMER_8,
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EXT_TIMER_COUNT,
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};
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struct ext_timer_ctrl_t {
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volatile uint8_t *mode;
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volatile uint8_t *polarity;
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volatile uint8_t *isr;
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uint8_t mask;
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uint8_t irq;
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};
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extern const struct ext_timer_ctrl_t et_ctrl_regs[];
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/* TODO(crosbug.com/p/55044) */
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uint32_t __ram_code ext_observation_reg_read(enum ext_timer_sel ext_timer);
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void ext_timer_start(enum ext_timer_sel ext_timer, int en_irq);
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void ext_timer_stop(enum ext_timer_sel ext_timer, int dis_irq);
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void fan_ext_timer_interrupt(void);
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void update_exc_start_time(void);
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/**
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* Config a external timer.
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*
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* @param raw (!=0) timer count equal to param "ms" no conversion.
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*/
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int ext_timer_ms(enum ext_timer_sel ext_timer,
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enum ext_timer_clock_source ext_timer_clock,
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int start,
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int et_int,
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int32_t ms,
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int first_time_enable,
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int raw);
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#endif /* __CROS_EC_HWTIMER_CHIP_H */
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