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In order to support rpm mode, we use a TICK function (fan_tick_func) to monitor tacho value and adjust PWM duty. In this version, fan driver always enables clock source of MFT to make sure it can present real-time tacho value. For better performance, the feedback value to adjust PWM duty is various. We also change fan & pwm settings for SUNUN 4-pins pwm-type fan. Modified drivers: 1. npcx_evb/board.h: Modified fan_t & pwm_t structures for SUNON fan spec. 2. npcx_evb_arm/board.h: Modified fan_t & pwm_t structures for SUNON fan spec. 3. fan_chip.h: Remove unnecessary default_count field of mft_t structure 4. fan.c: Add support for rpm mode BUG=chrome-os-partner:34346 TEST=make buildall -j; test nuvoton IC specific drivers BRANCH=none Change-Id: I25e7bd2f3f726b40fd4e0d9a1049a4d82bbd830d Signed-off-by: Mulin Chao <mlchao@nuvoton.com> Reviewed-on: https://chromium-review.googlesource.com/320510 Reviewed-by: Randall Spangler <rspangler@chromium.org>
40 lines
834 B
C
40 lines
834 B
C
/* Copyright (c) 2014 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*/
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/* NPCX-specific MFT module for Chrome EC */
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#ifndef __CROS_EC_FAN_CHIP_H
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#define __CROS_EC_FAN_CHIP_H
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/* MFT module select */
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enum npcx_mft_module {
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NPCX_MFT_MODULE_1,
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NPCX_MFT_MODULE_2,
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NPCX_MFT_MODULE_3,
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/* Number of MFT modules */
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NPCX_MFT_MODULE_COUNT
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};
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/* MFT clock source */
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enum npcx_mft_clk_src {
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TCKC_NOCLK = 0,
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TCKC_PRESCALE_APB1_CLK = 1,
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TCKC_LFCLK = 5,
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};
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/* Data structure to define MFT channels. */
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struct mft_t {
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/* MFT module ID */
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enum npcx_mft_module module;
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/* MFT clock source */
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enum npcx_mft_clk_src clk_src;
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/* PWM id */
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int pwm_id;
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};
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extern const struct mft_t mft_channels[];
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#endif /* __CROS_EC_FAN_CHIP_H */
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