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957638c78c
Add npcx_evb_arm board-level driver for arm-based platform. Add header.c: for booting from NPCX5M5G A3 Booter. Remove lfw folder due to those functionalitie have been replaced with Booter Modified drivers for Patch Set 1: 1. flash.c: Implement UMA lock, tri-state and selection register lock functionalities 2. hwtimer.c: Add ITIM32 for hwtimer 3. lpc.c: Add checking for LRESET 4. system.c: Modified CODERAM_ARCH functions for NPCX5M5G A3 Booter. 5. uart.c: Add support for module 2 Patch Set 2: 6. lpc.c: Modified lpc_get_pltrst_asserted() func Patch Set 3: 7. minimize the changes for CONFIG_CODERAM_ARCH in common layer 8. comments of Patch Set1/2 Patch Set 4: 9. Modified CONFIG_RO_MEM_OFF point to ro image and keep header as a part of ec.RO.flat. 10. Fixed RO_FRID and RW_FRID issues which caused by CONFIG_CODERAM_ARCH. Patch Set 5: 11. Modified system.c in common folder for supporting *_STORAGE_OFF. 12. Use *_STORAGE_OFF in firmware_image.lds.S to indicate flat file layout in flash. Patch Set 6: 13. rebase to newest version 14. system.c: Modified for the newest include/system.h Patch Set 7: 15. Merge from version 0625 BUG=chrome-os-partner:34346 TEST=make buildall -j; test nuvoton IC specific drivers BRANCH=none Change-Id: Ifd7c10b81b5781ccd75bb2558dc236486976e8ed Signed-off-by: Ian Chao <mlchao@nuvoton.com> Reviewed-on: https://chromium-review.googlesource.com/272034 Reviewed-by: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Commit-Queue: Shawn N <shawnn@chromium.org>
67 lines
2.2 KiB
C
67 lines
2.2 KiB
C
/* Copyright (c) 2015 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*/
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#ifndef __CROS_EC_ROM_CHIP_H_
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#define __CROS_EC_ROM_CHIP_H_
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/******************************************************************************/
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/*
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* Enumerations of ROM api functions
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*/
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enum API_SIGN_OPTIONS_T {
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SIGN_NO_CHECK = 0,
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SIGN_CRC_CHECK = 1,
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};
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enum API_RETURN_STATUS_T {
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/* Successful download */
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API_RET_STATUS_OK = 0,
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/* Address is outside of flash or not 4 bytes aligned. */
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API_RET_STATUS_INVALID_SRC_ADDR = 1,
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/* Address is outside of RAM or not 4 bytes aligned. */
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API_RET_STATUS_INVALID_DST_ADDR = 2,
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/* Size is 0 or not 4 bytes aligned. */
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API_RET_STATUS_INVALID_SIZE = 3,
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/* Flash Address + Size is out of flash. */
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API_RET_STATUS_INVALID_SIZE_OUT_OF_FLASH = 4,
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/* RAM Address + Size is out of RAM. */
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API_RET_STATUS_INVALID_SIZE_OUT_OF_RAM = 5,
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/* Wrong sign option. */
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API_RET_STATUS_INVALID_SIGN = 6,
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/* Error during Code copy. */
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API_RET_STATUS_COPY_FAILED = 7,
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/* Execution Address is outside of RAM */
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API_RET_STATUS_INVALID_EXE_ADDR = 8,
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/* Bad CRC value */
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API_RET_STATUS_INVALID_SIGNATURE = 9,
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};
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/******************************************************************************/
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/*
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* Macro functions of ROM api functions
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*/
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#define ADDR_DOWNLOAD_FROM_FLASH (*(volatile uint32_t *) 0x40)
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#define download_from_flash(src_offset, dest_addr, size, sign, exe_addr, \
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status) \
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(((download_from_flash_ptr) ADDR_DOWNLOAD_FROM_FLASH) \
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(src_offset, dest_addr, size, sign, exe_addr, status))
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/******************************************************************************/
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/*
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* Declarations of ROM api functions
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*/
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typedef void (*download_from_flash_ptr) (
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uint32_t src_offset, /* The offset of the data to be downloaded */
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uint32_t dest_addr, /* The address of the downloaded data in the RAM*/
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uint32_t size, /* Number of bytes to download */
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enum API_SIGN_OPTIONS_T sign, /* Need CRC check or not */
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uint32_t exe_addr, /* jump to this address after download if not zero */
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enum API_RETURN_STATUS_T *status /* Status fo download */
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);
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#endif /* __CROS_EC_ROM_CHIP_H_ */
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