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3df2228c14
This adds a new function that can be use to apply USB EQ settings to the mux. It currently only exposes the Tx and Rx channel loss compensation. BUG=chrome-os-partner:47074 BRANCH=none TEST=build and boot on chell Change-Id: I1ec83cdcbb17da8e7289e6633509b64f01b14348 Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/313747 Reviewed-by: Shawn N <shawnn@chromium.org>
68 lines
2.2 KiB
C
68 lines
2.2 KiB
C
/* Copyright 2015 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*
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* Parade PS8740 USB port switch driver.
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*/
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#ifndef __CROS_EC_PS8740_H
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#define __CROS_EC_PS8740_H
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/* Mode register for setting mux */
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#define PS8740_REG_MODE 0x00
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#define PS8740_MODE_POLARITY_INVERTED (1 << 4)
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#define PS8740_MODE_USB_ENABLED (1 << 5)
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#define PS8740_MODE_DP_ENABLED (1 << 6)
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#define PS8740_MODE_POWER_DOWN (1 << 7)
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/* Status register for checking mux state */
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#define PS8740_REG_STATUS 0x09
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#define PS8740_STATUS_POLARITY_INVERTED (1 << 2)
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#define PS8740_STATUS_USB_ENABLED (1 << 3)
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#define PS8740_STATUS_DP_ENABLED (1 << 4)
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#define PS8740_STATUS_HPD_ASSERTED (1 << 7)
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/* Chip ID / revision registers and expected fused values */
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#define PS8740_REG_REVISION_ID1 0xf0
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#define PS8740_REVISION_ID1 0x00
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#define PS8740_REG_REVISION_ID2 0xf1
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#define PS8740_REVISION_ID2 0x0a
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#define PS8740_REG_CHIP_ID1 0xf2
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#define PS8740_CHIP_ID1 0x40
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#define PS8740_REG_CHIP_ID2 0xf3
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#define PS8740_CHIP_ID2 0x87
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/* USB equalization settings for Host to Mux */
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#define PS8740_REG_USB_EQ_TX 0x32
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#define PS8740_USB_EQ_TX_10_1_DB 0x00
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#define PS8740_USB_EQ_TX_14_3_DB 0x20
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#define PS8740_USB_EQ_TX_8_5_DB 0x40
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#define PS8740_USB_EQ_TX_6_5_DB 0x60
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#define PS8740_USB_EQ_TX_11_5_DB 0x80
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#define PS8740_USB_EQ_TX_9_5_DB 0xc0
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#define PS8740_USB_EQ_TX_7_5_DB 0xe0
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#define PS8740_USB_EQ_TERM_100_OHM (0 << 2)
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#define PS8740_USB_EQ_TERM_85_OHM (1 << 2)
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/* USB equalization settings for Connector to Mux */
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#define PS8740_REG_USB_EQ_RX 0x3b
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#define PS8740_USB_EQ_RX_4_4_DB 0x00
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#define PS8740_USB_EQ_RX_7_0_DB 0x10
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#define PS8740_USB_EQ_RX_8_2_DB 0x20
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#define PS8740_USB_EQ_RX_9_4_DB 0x30
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#define PS8740_USB_EQ_RX_10_2_DB 0x40
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#define PS8740_USB_EQ_RX_11_4_DB 0x50
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#define PS8740_USB_EQ_RX_14_3_DB 0x60
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#define PS8740_USB_EQ_RX_14_8_DB 0x70
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#define PS8740_USB_EQ_RX_15_2_DB 0x80
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#define PS8740_USB_EQ_RX_15_5_DB 0x90
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#define PS8740_USB_EQ_RX_16_2_DB 0xa0
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#define PS8740_USB_EQ_RX_17_3_DB 0xb0
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#define PS8740_USB_EQ_RX_18_4_DB 0xc0
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#define PS8740_USB_EQ_RX_20_1_DB 0xd0
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#define PS8740_USB_EQ_RX_21_3_DB 0xe0
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int ps8740_tune_usb_eq(int i2c_addr, uint8_t tx, uint8_t rx);
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#endif /* __CROS_EC_PS8740_H */
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