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30 lines
821 B
C
30 lines
821 B
C
/* flash.h - flash interface
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*
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* (Chromium license) */
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#ifndef __CHIP_INTERFACE_FLASH_H
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#define __CHIP_INTERFACE_FLASH_H
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/* returns the flash size and erase clock structure. */
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EcError CrFlashQuery(*size, *erase_block) {
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EcError CrFlashRead(addr_t offset, length, uint8_t *data);
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EcError CrFlashWrite(addr_t offset, length, uint8_t *data);
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EcError CrFlashErase(addr_t offset, length);
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EcError CrFlashSetWriteProtectRange(addr_t offset, length);
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/* TODO: change to Randall's new model */
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/* Set lock bit (the SRP bit in SPI) */
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EcError CrFlashEnableWriteProtect(void);
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/* TODO: change to Randall's new model */
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/* Always return FAILED because FMPPEn cannot be reset to 1
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* until a power-on reset or after committed (see p. 577).
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*/
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int CrFlashDisableWriteProtect(void);
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#endif /* __CHIP_INTERFACE_FLASH_H */
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