Dino Li 032846bc32 it8380dev: modify hwtimer and LPC wake up ...

1. In combinational mode and clock source is 8MHz,
   if timer 3 counter register always equals to 7, then timer 4 will be a
   32-bit MHz free-running counter.
2. Fix TIMER_32P768K_CNT_TO_US(), each count should be 30.5175 us,
   not 32.768us.
3. Fix TIMER_CNT_8M_32P768K().
4. Make sure LPC wake up interrupt is enabled before entering doze /
   deep doze mode.

Signed-off-by: Dino Li <dino.li@ite.com.tw>

BRANCH=none
BUG=none
TEST=1. Console commands: 'gettime', 'timerinfo', 'waitms', and 'forcetime'.
     2. Enabled Hook debug, no warning message received (48hrs).
     3. Tested ectool command 'version' x 2000.

Change-Id: I796d985361d3c18bc5813c58705b41923e28c5b1
Reviewed-on: https://chromium-review.googlesource.com/310039
Commit-Ready: Dino Li <dino.li@ite.com.tw>
Tested-by: Dino Li <dino.li@ite.com.tw>
Reviewed-by: Randall Spangler <rspangler@chromium.org>

2015-11-05 11:10:30 -08:00

..

cortex-m

system: Add support to reclaim space from loader.

2015-10-13 21:58:01 -07:00

cortex-m0

cleanup: Handle signed RW images a bit cleaner

2015-09-25 19:36:37 -07:00

host

host: mock i2c_xfer

2015-09-16 14:49:46 -07:00

nds32

it8380dev: modify hwtimer and LPC wake up

2015-11-05 11:10:30 -08:00