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In rare case, FW read the unexpected counter value of timer which source clock is 32K (Watchdog timer and ITIM16/32 which use 32K source clock). The root cause is the clocks between reading registers and timer's are asynchronous. It has a chance to get invalid counter value when timer is under transaction edge. The solution is using two consecutive equal readings to make sure the counter value is valid. Beside different source clocks of timer, we also found there's chip's bug which causes unexpected value of timer. If an interrupt that occurs very shortly before entering deep idle with instant wakeup, it might result in disruptive execution (such as skipping some instructions or hard fault) after "wfi". The workaround is adding the same bypass for idle in deep idle section. Modified sources: 1. clock.c: Add bypass for instant wakeup from deep sleep. 2. hwtimer.c: Add consecutive reading function for event timer. 3. watchdog.c: Add consecutive reading function for watchdog timer. BUG=chrome-os-partner:34346 TEST=make buildall -j; test nuvoton IC specific drivers BRANCH=none Change-Id: I7c9f1fb9618a3c29826d8f4599864a8dac4203bf Signed-off-by: Mulin Chao <mlchao@nuvoton.com> Reviewed-on: https://chromium-review.googlesource.com/327356 Reviewed-by: Shawn N <shawnn@chromium.org>