Caesar Wang f9ba21bee5 rockchip: Change dmc register accesses to ATF style for rk3399 ...

This changes the style of dmc register accesses to be a read/write on
a base address plus a register offset instead of reinterpretting a
base address as a struct and accessing members within that struct.

Change-Id: Iead097cd6afdb830d8bc193608cd39d01ce5a6bc
Signed-off-by: Derek Basehore <dbasehore@chromium.org>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>

2016-10-27 01:51:07 +08:00

..

arm

Introduce ARM SiP service

2016-10-12 15:36:45 +01:00

common

AArch32: Common changes needed for BL1/BL2

2016-09-21 16:27:15 +01:00

compat

AArch32: Add essential ARM platform and FVP support

2016-08-10 18:01:38 +01:00

mediatek

Remove MT6795 plat_sip_svc.c to fix Coverity analysis error.

2016-09-19 14:20:42 +08:00

nvidia/tegra

Migrate platform makefile to new console driver location

2016-08-09 17:33:57 +01:00

qemu

Migrate platform makefile to new console driver location

2016-08-09 17:33:57 +01:00

rockchip

rockchip: Change dmc register accesses to ATF style for rk3399

2016-10-27 01:51:07 +08:00

xilinx/zynqmp

zynqmp: Make MMIO write FW call synchronous

2016-09-13 09:19:03 -07:00