Hung-Te Lin fdfd89f213 selfboot: Report correct entry point address in debug message. ...

Entry point in payload segment header is a 64 bit integer (ntohll). The debug
message is currently reading that as a 32 bit integer (which will produce
00000000 for most platforms).

Change-Id: I931072bbb82c099ce7fae04f15c8a35afa02e510
Signed-off-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-on: http://review.coreboot.org/2535
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)

2013-02-27 10:26:26 +01:00

..

arch

IOAPIC: Divide setup_ioapic() in two parts.

2013-02-27 00:27:45 +01:00

console

console: Fix using CMOS for options

2013-02-08 10:00:12 +01:00

cpu

smm: Update rev 0x30101 SMM revision save state

2013-02-27 03:03:50 +01:00

device

sconfig: rename lapic_cluster -> cpu_cluster

2013-02-14 07:07:20 +01:00

drivers

Whitespace: Replace tab character in license text with two spaces

2013-02-20 23:30:45 +01:00

ec

Add support for Google ChromeEC

2013-02-22 23:10:01 +01:00

include

smm: Update rev 0x30101 SMM revision save state

2013-02-27 03:03:50 +01:00

lib

selfboot: Report correct entry point address in debug message.

2013-02-27 10:26:26 +01:00

mainboard

Mainboard SMI S state handler was using the wrong defines

2013-02-27 03:03:05 +01:00

northbridge

Whitespace: Replace tab character in license text with two spaces

2013-02-20 23:30:45 +01:00

southbridge

smm: Update rev 0x30101 SMM revision save state

2013-02-27 03:03:50 +01:00

superio

Remove assembly coded log2 function

2012-11-28 07:57:17 +01:00

vendorcode

google/snow: enable GPIO entries and CHROMEOS in building

2013-02-25 18:50:00 +01:00

Kconfig

build system: Retire REQUIRES_BLOB

2013-02-19 11:00:41 +01:00