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1bbcaa8df4
This CL added the support for additional 5 adc channels on npcx7 series
ec. The pin-mux functionality of adc channels was already introduced in
CL 481561.
BRANCH=none
BUG=none
TEST=No build errors for all boards using npcx5 series.
Build poppy board and upload FW to platform. No issues found.
All 10 adc channels passed the test on npcx796f evb.
Change-Id: I2c7458958ff659fce78f265eefa160050dee7daf
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Reviewed-on: https://chromium-review.googlesource.com/497526
Reviewed-by: Randall Spangler <rspangler@chromium.org>
49 lines
1.0 KiB
C
49 lines
1.0 KiB
C
/* Copyright (c) 2014 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*/
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/* NPCX-specific ADC module for Chrome EC */
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#ifndef __CROS_EC_ADC_CHIP_H
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#define __CROS_EC_ADC_CHIP_H
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/* Minimum and maximum values returned by raw ADC read. */
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#define ADC_READ_MIN 0
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#define ADC_READ_MAX 1023
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#define ADC_MAX_VOLT 2816
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/* ADC input channel select */
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enum npcx_adc_input_channel {
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NPCX_ADC_CH0 = 0,
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NPCX_ADC_CH1,
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NPCX_ADC_CH2,
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NPCX_ADC_CH3,
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NPCX_ADC_CH4,
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#if defined(CHIP_FAMILY_NPCX7)
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NPCX_ADC_CH5,
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NPCX_ADC_CH6,
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NPCX_ADC_CH7,
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NPCX_ADC_CH8,
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NPCX_ADC_CH9,
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#endif
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NPCX_ADC_CH_COUNT
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};
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/* Data structure to define ADC channels. */
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struct adc_t {
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const char *name;
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enum npcx_adc_input_channel input_ch;
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int factor_mul;
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int factor_div;
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int shift;
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};
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/*
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* Boards must provide this list of ADC channel definitions. This must match
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* the enum adc_channel list provided by the board.
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*/
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extern const struct adc_t adc_channels[];
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#endif /* __CROS_EC_ADC_CHIP_H */
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