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4ce529e25a
In case there is a sudden power loss to PCH, then there are no eSPI VW messages sent from the PCH to EC indicating power state transition into S5. Instead, the eSPI compatibility spec defines such events as global reset events. For global reset events, eSPI_Reset# signal is asserted without SLP_SUS# being asserted. This acts as an indication to the EC that there was a global reset event. Add a callback chipset_handle_espi_reset_assert that takes any necessary action whenever eSPI_Reset# pin is asserted. On skylake, it would check if power button was being pressed and release the button. BUG=chrome-os-partner:62014 BRANCH=None TEST=Verified that apshutdown works as expected. Change-Id: I409afa0d00faca55ae3aa577743cedac58d4d877 Signed-off-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/438935 Reviewed-by: Aaron Durbin <adurbin@chromium.org>
118 lines
3.2 KiB
C
118 lines
3.2 KiB
C
/* Copyright (c) 2012 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*/
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/*
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* Chipset module for Chrome EC.
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*
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* This is intended to be a platform/chipset-neutral interface, implemented by
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* all main chipsets (x86, gaia, etc.).
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*/
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#ifndef __CROS_EC_CHIPSET_H
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#define __CROS_EC_CHIPSET_H
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#include "common.h"
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#include "gpio.h"
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/*
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* Chipset state mask
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*
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* Note that this is a non-exhaustive list of states which the main chipset can
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* be in, and is potentially one-to-many for real, underlying chipset states.
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* That's why chipset_in_state() asks "Is the chipset in something
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* approximating this state?" and not "Tell me what state the chipset is in and
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* I'll compare it myself with the state(s) I want."
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*/
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enum chipset_state_mask {
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CHIPSET_STATE_HARD_OFF = 0x01, /* Hard off (G3) */
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CHIPSET_STATE_SOFT_OFF = 0x02, /* Soft off (S5) */
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CHIPSET_STATE_SUSPEND = 0x04, /* Suspend (S3) */
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CHIPSET_STATE_ON = 0x08, /* On (S0) */
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CHIPSET_STATE_STANDBY = 0x10, /* Standby (S0ix) */
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/* Common combinations */
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CHIPSET_STATE_ANY_OFF = (CHIPSET_STATE_HARD_OFF |
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CHIPSET_STATE_SOFT_OFF), /* Any off state */
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};
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#ifdef HAS_TASK_CHIPSET
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/**
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* Check if chipset is in a given state.
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*
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* @param state_mask Combination of one or more CHIPSET_STATE_* flags.
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*
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* @return non-zero if the chipset is in one of the states specified in the
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* mask.
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*/
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int chipset_in_state(int state_mask);
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/**
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* Ask the chipset to exit the hard off state.
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*
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* Does nothing if the chipset has already left the state, or was not in the
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* state to begin with.
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*/
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void chipset_exit_hard_off(void);
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/* This is a private chipset-specific implementation for use only by
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* throttle_ap() . Don't call this directly!
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*/
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void chipset_throttle_cpu(int throttle);
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/**
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* Immediately shut off power to main processor and chipset.
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*
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* This is intended for use when the system is too hot or battery power is
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* critical.
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*/
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void chipset_force_shutdown(void);
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/**
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* Reset the CPU and/or chipset.
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*
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* @param cold_reset If !=0, force a cold reset of the CPU and chipset;
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* if 0, just pulse the reset line to the CPU.
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*/
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void chipset_reset(int cold_reset);
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/**
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* Interrupt handler to power GPIO inputs.
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*/
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void power_interrupt(enum gpio_signal signal);
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/**
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* Handle assert of eSPI_Reset# pin.
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*/
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void chipset_handle_espi_reset_assert(void);
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#else /* !HAS_TASK_CHIPSET */
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/*
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* Allow other modules to compile if the chipset module is disabled. This is
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* commonly done during early stages of board bringup.
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*/
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static inline int chipset_in_state(int state_mask)
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{
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return 0;
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}
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static inline void chipset_exit_hard_off(void) { }
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static inline void chipset_throttle_cpu(int throttle) { }
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static inline void chipset_force_shutdown(void) { }
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static inline void chipset_reset(int cold_reset) { }
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static inline void power_interrupt(enum gpio_signal signal) { }
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static inline void chipset_handle_espi_reset_assert(void) { }
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#endif /* !HAS_TASK_CHIPSET */
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/**
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* Optional chipset check if PLTRST# is valid.
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*
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* @return non-zero if PLTRST# is valid, 0 if invalid.
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*/
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int chipset_pltrst_is_valid(void) __attribute__((weak));
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#endif /* __CROS_EC_CHIPSET_H */
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