From 1e0f9aca98625060a75cb3a77df6fef1b3da27dc Mon Sep 17 00:00:00 2001 From: "raymond.yc.huey" Date: Wed, 24 May 2017 18:19:56 +0800 Subject: [PATCH] Add Netberg Aurora 620 and Aurora 720 Platform Support --- ...er-i2c-bus-intel-ismt-netberg-aurora.patch | 16 + .../patches/driver-igb-netberg-aurora.patch | 599 ++ .../base/any/kernels/3.16-lts/patches/series | 2 + packages/platforms/netberg/Makefile | 1 + .../platforms/netberg/vendor-config/Makefile | 1 + .../platforms/netberg/vendor-config/PKG.yml | 1 + .../src/python/netberg/__init__.py | 7 + packages/platforms/netberg/x86-64/Makefile | 1 + .../platforms/netberg/x86-64/modules/Makefile | 1 + .../platforms/netberg/x86-64/modules/PKG.yml | 1 + .../netberg/x86-64/modules/builds/.gitignore | 1 + .../netberg/x86-64/modules/builds/Makefile | 6 + .../x86-64/modules/builds/hardware_monitor.c | 6362 +++++++++++++++++ .../.gitignore | 2 + .../Makefile | 1 + .../modules/Makefile | 1 + .../modules/PKG.yml | 1 + .../onlp/Makefile | 1 + .../onlp/PKG.yml | 1 + .../onlp/builds/Makefile | 2 + .../onlp/builds/lib/Makefile | 45 + .../onlp/builds/onlpdump/Makefile | 45 + .../.module | 1 + .../Makefile | 9 + .../module/auto/make.mk | 9 + .../x86_64_netberg_aurora_620_rangeley.yml | 114 + .../x86_64_netberg_aurora_620_rangeley.x | 14 + ...86_64_netberg_aurora_620_rangeley_config.h | 135 + .../x86_64_netberg_aurora_620_rangeley_dox.h | 26 + ...6_64_netberg_aurora_620_rangeley_porting.h | 87 + .../module/make.mk | 10 + .../module/src/Makefile | 9 + .../module/src/fani.c | 234 + .../module/src/ledi.c | 165 + .../module/src/make.mk | 9 + .../module/src/psui.c | 211 + .../module/src/sfpi.c | 389 + .../module/src/sysi.c | 139 + .../module/src/thermali.c | 173 + ...86_64_netberg_aurora_620_rangeley_config.c | 80 + ...x86_64_netberg_aurora_620_rangeley_enums.c | 10 + .../x86_64_netberg_aurora_620_rangeley_int.h | 239 + .../x86_64_netberg_aurora_620_rangeley_log.c | 18 + .../x86_64_netberg_aurora_620_rangeley_log.h | 12 + ...86_64_netberg_aurora_620_rangeley_module.c | 24 + .../x86_64_netberg_aurora_620_rangeley_ucli.c | 50 + .../platform-config/Makefile | 1 + .../platform-config/r0/Makefile | 1 + .../platform-config/r0/PKG.yml | 1 + .../x86-64-netberg-aurora-620-rangeley-r0.yml | 30 + .../__init__.py | 17 + .../.gitignore | 2 + .../Makefile | 1 + .../modules/Makefile | 1 + .../modules/PKG.yml | 1 + .../onlp/Makefile | 1 + .../onlp/PKG.yml | 1 + .../onlp/builds/Makefile | 2 + .../onlp/builds/lib/Makefile | 45 + .../onlp/builds/onlpdump/Makefile | 45 + .../.module | 1 + .../Makefile | 9 + .../module/auto/make.mk | 9 + .../x86_64_netberg_aurora_720_rangeley.yml | 114 + .../x86_64_netberg_aurora_720_rangeley.x | 14 + ...86_64_netberg_aurora_720_rangeley_config.h | 135 + .../x86_64_netberg_aurora_720_rangeley_dox.h | 26 + ...6_64_netberg_aurora_720_rangeley_porting.h | 87 + .../module/make.mk | 10 + .../module/src/Makefile | 9 + .../module/src/fani.c | 234 + .../module/src/ledi.c | 165 + .../module/src/make.mk | 9 + .../module/src/psui.c | 211 + .../module/src/sfpi.c | 389 + .../module/src/sysi.c | 139 + .../module/src/thermali.c | 173 + ...86_64_netberg_aurora_720_rangeley_config.c | 80 + ...x86_64_netberg_aurora_720_rangeley_enums.c | 10 + .../x86_64_netberg_aurora_720_rangeley_int.h | 239 + .../x86_64_netberg_aurora_720_rangeley_log.c | 18 + .../x86_64_netberg_aurora_720_rangeley_log.h | 12 + ...86_64_netberg_aurora_720_rangeley_module.c | 24 + .../x86_64_netberg_aurora_720_rangeley_ucli.c | 50 + .../platform-config/Makefile | 1 + .../platform-config/r0/Makefile | 1 + .../platform-config/r0/PKG.yml | 1 + .../x86-64-netberg-aurora-720-rangeley-r0.yml | 30 + .../__init__.py | 17 + 89 files changed, 11631 insertions(+) create mode 100644 packages/base/any/kernels/3.16-lts/patches/driver-i2c-bus-intel-ismt-netberg-aurora.patch create mode 100644 packages/base/any/kernels/3.16-lts/patches/driver-igb-netberg-aurora.patch mode change 100644 => 100755 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packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/platform-config/r0/src/lib/x86-64-netberg-aurora-720-rangeley-r0.yml create mode 100755 packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/platform-config/r0/src/python/x86_64_netberg_aurora_720_rangeley_r0/__init__.py diff --git a/packages/base/any/kernels/3.16-lts/patches/driver-i2c-bus-intel-ismt-netberg-aurora.patch b/packages/base/any/kernels/3.16-lts/patches/driver-i2c-bus-intel-ismt-netberg-aurora.patch new file mode 100644 index 00000000..c826f7d5 --- /dev/null +++ b/packages/base/any/kernels/3.16-lts/patches/driver-i2c-bus-intel-ismt-netberg-aurora.patch @@ -0,0 +1,16 @@ +diff -Nu a/drivers/i2c/busses/i2c-ismt.c b/drivers/i2c/busses/i2c-ismt.c +--- a/drivers/i2c/busses/i2c-ismt.c 2017-05-09 23:52:56.680565000 -0700 ++++ b/drivers/i2c/busses/i2c-ismt.c 2017-05-10 02:09:53.237489185 -0700 +@@ -614,6 +614,12 @@ + priv->head++; + priv->head %= ISMT_DESC_ENTRIES; + ++ if( ret != 0 ) ++ { ++ dev_dbg(dev, "Retry i2c-ismt access\n"); ++ return -EAGAIN; ++ } ++ + return ret; + } + diff --git a/packages/base/any/kernels/3.16-lts/patches/driver-igb-netberg-aurora.patch b/packages/base/any/kernels/3.16-lts/patches/driver-igb-netberg-aurora.patch new file mode 100644 index 00000000..08d2c2e0 --- /dev/null +++ b/packages/base/any/kernels/3.16-lts/patches/driver-igb-netberg-aurora.patch @@ -0,0 +1,599 @@ +diff -Nu a/drivers/net/ethernet/intel/igb/bcm_phy.c b/drivers/net/ethernet/intel/igb/bcm_phy.c +--- a/drivers/net/ethernet/intel/igb/bcm_phy.c 1969-12-31 16:00:00.000000000 -0800 ++++ b/drivers/net/ethernet/intel/igb/bcm_phy.c 2016-12-26 21:40:26.000000000 -0800 +@@ -0,0 +1,357 @@ ++ ++ ++ ++#include "e1000_hw.h" ++ ++/* ++ * 1000Base-T Control Register ++ */ ++#define MII_GB_CTRL_MS_MAN (1 << 12) /* Manual Master/Slave mode */ ++#define MII_GB_CTRL_MS (1 << 11) /* Master/Slave negotiation mode */ ++#define MII_GB_CTRL_PT (1 << 10) /* Port type */ ++#define MII_GB_CTRL_ADV_1000FD (1 << 9) /* Advertise 1000Base-T FD */ ++#define MII_GB_CTRL_ADV_1000HD (1 << 8) /* Advertise 1000Base-T HD */ ++ ++ ++#define MII_BCM54XX_ECR 0x10 /* BCM54xx extended control register */ ++#define MII_BCM54XX_ECR_IM 0x1000 /* Interrupt mask */ ++#define MII_BCM54XX_ECR_IF 0x0800 /* Interrupt force */ ++#define MII_BCM54XX_ESR 0x11 /* BCM54xx extended status register */ ++#define MII_BCM54XX_ESR_IS 0x1000 /* Interrupt status */ ++#define MII_BCM54XX_EXP_DATA 0x15 /* Expansion register data */ ++#define MII_BCM54XX_EXP_SEL 0x17 /* Expansion register select */ ++#define MII_BCM54XX_EXP_SEL_SSD 0x0e00 /* Secondary SerDes select */ ++#define MII_BCM54XX_EXP_SEL_ER 0x0f00 /* Expansion register select */ ++#define MII_BCM54XX_AUX_CTL 0x18 /* Auxiliary control register */ ++#define MII_BCM54XX_AUX_CTL_ENCODE(val) (((val & 0x7) << 12)|(val & 0x7)) ++#define MII_BCM54XX_ISR 0x1a /* BCM54xx interrupt status register */ ++#define MII_BCM54XX_IMR 0x1b /* BCM54xx interrupt mask register */ ++#define MII_BCM54XX_INT_CRCERR 0x0001 /* CRC error */ ++#define MII_BCM54XX_INT_LINK 0x0002 /* Link status changed */ ++#define MII_BCM54XX_INT_SPEED 0x0004 /* Link speed change */ ++#define MII_BCM54XX_INT_DUPLEX 0x0008 /* Duplex mode changed */ ++#define MII_BCM54XX_INT_LRS 0x0010 /* Local receiver status changed */ ++#define MII_BCM54XX_INT_RRS 0x0020 /* Remote receiver status changed */ ++#define MII_BCM54XX_INT_SSERR 0x0040 /* Scrambler synchronization error */ ++#define MII_BCM54XX_INT_UHCD 0x0080 /* Unsupported HCD negotiated */ ++#define MII_BCM54XX_INT_NHCD 0x0100 /* No HCD */ ++#define MII_BCM54XX_INT_NHCDL 0x0200 /* No HCD link */ ++#define MII_BCM54XX_INT_ANPR 0x0400 /* Auto-negotiation page received */ ++#define MII_BCM54XX_INT_LC 0x0800 /* All counters below 128 */ ++#define MII_BCM54XX_INT_HC 0x1000 /* Counter above 32768 */ ++#define MII_BCM54XX_INT_MDIX 0x2000 /* MDIX status change */ ++#define MII_BCM54XX_INT_PSERR 0x4000 /* Pair swap error */ ++ ++/* ++ * MII Link Advertisment ++ */ ++#define MII_ANA_ASF (1 << 0)/* Advertise Selector Field */ ++#define MII_ANA_HD_10 (1 << 5)/* Half duplex 10Mb/s supported */ ++#define MII_ANA_FD_10 (1 << 6)/* Full duplex 10Mb/s supported */ ++#define MII_ANA_HD_100 (1 << 7)/* Half duplex 100Mb/s supported */ ++#define MII_ANA_FD_100 (1 << 8)/* Full duplex 100Mb/s supported */ ++#define MII_ANA_T4 (1 << 9)/* T4 */ ++#define MII_ANA_PAUSE (1 << 10)/* Pause supported */ ++#define MII_ANA_ASYM_PAUSE (1 << 11)/* Asymmetric pause supported */ ++#define MII_ANA_RF (1 << 13)/* Remote fault */ ++#define MII_ANA_NP (1 << 15)/* Next Page */ ++ ++#define MII_ANA_ASF_802_3 (1) /* 802.3 PHY */ ++ ++ ++#define MII_BCM54XX_SHD 0x1c /* 0x1c shadow registers */ ++#define MII_BCM54XX_SHD_WRITE 0x8000 ++#define MII_BCM54XX_SHD_VAL(x) ((x & 0x1f) << 10) ++#define MII_BCM54XX_SHD_DATA(x) ((x & 0x3ff) << 0) ++ ++#define MII_BCM54XX_AUX_STATUS 0x19 /* Auxiliary status */ ++#define MII_BCM54XX_AUX_STATUS_LINKMODE_MASK 0x0700 ++#define MII_BCM54XX_AUX_STATUS_LINKMODE_SHIFT 8 ++#define MII_BCM54XX_SHD_WR_ENCODE(val, data) \ ++ (MII_BCM54XX_SHD_WRITE | MII_BCM54XX_SHD_VAL(val) | \ ++ MII_BCM54XX_SHD_DATA(data)) ++ ++/* ++ * AUXILIARY CONTROL SHADOW ACCESS REGISTERS. (PHY REG 0x18) ++ */ ++#define MII_BCM54XX_AUXCTL_SHDWSEL_AUXCTL 0x0000 ++#define MII_BCM54XX_AUXCTL_ACTL_TX_6DB 0x0400 ++#define MII_BCM54XX_AUXCTL_ACTL_SMDSP_ENA 0x0800 ++ ++#define MII_BCM54XX_AUXCTL_MISC_WREN 0x8000 ++#define MII_BCM54XX_AUXCTL_MISC_FORCE_AMDIX 0x0200 ++#define MII_BCM54XX_AUXCTL_MISC_RDSEL_MISC 0x7000 ++#define MII_BCM54XX_AUXCTL_SHDWSEL_MISC 0x0007 ++ ++#define MII_BCM54XX_AUXCTL_SHDWSEL_AUXCTL 0x0000 ++ ++/* ++ * Broadcom LED source encodings. These are used in BCM5461, BCM5481, ++ * BCM5482, and possibly some others. ++ */ ++#define BCM_LED_SRC_LINKSPD1 0x0 ++#define BCM_LED_SRC_LINKSPD2 0x1 ++#define BCM_LED_SRC_XMITLED 0x2 ++#define BCM_LED_SRC_ACTIVITYLED 0x3 ++#define BCM_LED_SRC_FDXLED 0x4 ++#define BCM_LED_SRC_SLAVE 0x5 ++#define BCM_LED_SRC_INTR 0x6 ++#define BCM_LED_SRC_QUALITY 0x7 ++#define BCM_LED_SRC_RCVLED 0x8 ++#define BCM_LED_SRC_MULTICOLOR1 0xa ++#define BCM_LED_SRC_OPENSHORT 0xb ++#define BCM_LED_SRC_OFF 0xe /* Tied high */ ++#define BCM_LED_SRC_ON 0xf /* Tied low */ ++ ++ /* ++ * BCM54XX: Shadow registers ++ * Shadow values go into bits [14:10] of register 0x1c to select a shadow ++ * register to access. ++ */ ++ ++#define BCM54XX_SHD_AUTODETECT 0x1e /* 11110: Auto detect Regisrer */ ++#define BCM54XX_SHD_MODE 0x1f /* 11111: Mode Control Register */ ++#define BCM54XX_SHD_MODE_COPPER 1<<7 ++#define BCM54XX_SHD_MODE_SER 1<<6 ++ /* ++ * EXPANSION SHADOW ACCESS REGISTERS. (PHY REG 0x15, 0x16, and 0x17) ++ */ ++ #define MII_BCM54XX_EXP_AADJ1CH0 0x001f ++ #define MII_BCM54XX_EXP_AADJ1CH0_SWP_ABCD_OEN 0x0200 ++ #define MII_BCM54XX_EXP_AADJ1CH0_SWSEL_THPF 0x0100 ++ #define MII_BCM54XX_EXP_AADJ1CH3 0x601f ++ #define MII_BCM54XX_EXP_AADJ1CH3_ADCCKADJ 0x0002 ++ #define MII_BCM54XX_EXP_EXP08 0x0F08 ++ #define MII_BCM54XX_EXP_EXP08_RJCT_2MHZ 0x0001 ++ #define MII_BCM54XX_EXP_EXP08_EARLY_DAC_WAKE 0x0200 ++ #define MII_BCM54XX_EXP_EXP75 0x0f75 ++ #define MII_BCM54XX_EXP_EXP75_VDACCTRL 0x003c ++ #define MII_BCM54XX_EXP_EXP96 0x0f96 ++ #define MII_BCM54XX_EXP_EXP96_MYST 0x0010 ++ #define MII_BCM54XX_EXP_EXP97 0x0f97 ++ #define MII_BCM54XX_EXP_EXP97_MYST 0x0c0c ++ ++ ++ ++ ++ /* ++ * Indirect register access functions for the 1000BASE-T/100BASE-TX/10BASE-T ++ * 0x1c shadow registers. ++ */ ++ ++int bcmphy_write(struct e1000_hw *hw,u32 reg,u16 regval){ ++ ++ u32 ret; ++ struct e1000_phy_info *phy = &hw->phy; ++ ret=phy->ops.write_reg(hw,reg,regval); ++ return ret; ++} ++ ++u16 bcmphy_read(struct e1000_hw *hw,u32 reg){ ++ ++ u16 val; ++ struct e1000_phy_info *phy = &hw->phy; ++ phy->ops.read_reg(hw,reg,&val); ++ return val; ++} ++ ++ ++static int bcm54xx_shadow_read(struct e1000_hw *hw, u16 shadow) ++{ ++ bcmphy_write(hw, MII_BCM54XX_SHD, MII_BCM54XX_SHD_VAL(shadow)); ++ return MII_BCM54XX_SHD_DATA(bcmphy_read(hw, MII_BCM54XX_SHD)); ++} ++ ++static int bcm54xx_shadow_write(struct e1000_hw *hw, u16 shadow, u16 val) ++ { ++ return bcmphy_write(hw, MII_BCM54XX_SHD, ++ MII_BCM54XX_SHD_WRITE | ++ MII_BCM54XX_SHD_VAL(shadow) | ++ MII_BCM54XX_SHD_DATA(val)); ++ } ++ ++ /* Indirect register access functions for the Expansion Registers */ ++ static int bcm54xx_exp_read(struct e1000_hw *hw, u8 regnum) ++ { ++ int val; ++ ++ val = bcmphy_write(hw, MII_BCM54XX_EXP_SEL, regnum); ++ if (val < 0) ++ return val; ++ ++ val = bcmphy_read(hw, MII_BCM54XX_EXP_DATA); ++ ++ /* Restore default value. It's O.K. if this write fails. */ ++ bcmphy_write(hw, MII_BCM54XX_EXP_SEL, 0); ++ ++ return val; ++ } ++ ++ static int bcm54xx_exp_write(struct e1000_hw *hw, u16 regnum, u16 val) ++ { ++ int ret; ++ ++ ret = bcmphy_write(hw, MII_BCM54XX_EXP_SEL, regnum); ++ if (ret < 0) ++ return ret; ++ ++ ret = bcmphy_write(hw, MII_BCM54XX_EXP_DATA, val); ++ ++ /* Restore default value. It's O.K. if this write fails. */ ++ bcmphy_write(hw, MII_BCM54XX_EXP_SEL, 0); ++ ++ return ret; ++ } ++ ++ static int bcm54xx_auxctl_write(struct e1000_hw *hw, u16 regnum, u16 val) ++ { ++ return bcmphy_write(hw, MII_BCM54XX_AUX_CTL, regnum | val); ++ } ++ ++static int bcm54xx_config_init(struct e1000_hw *hw) ++ { ++ int reg, err; ++ ++ reg = bcmphy_read(hw, MII_BCM54XX_ECR); ++ if (reg < 0) ++ return reg; ++ ++ /* Mask interrupts globally. */ ++ reg |= MII_BCM54XX_ECR_IM; ++ err = bcmphy_write(hw, MII_BCM54XX_ECR, reg); ++ if (err < 0) ++ return err; ++ ++ /* Unmask events we are interested in. */ ++ reg = ~(MII_BCM54XX_INT_DUPLEX | ++ MII_BCM54XX_INT_SPEED | ++ MII_BCM54XX_INT_LINK); ++ err = bcmphy_write(hw, MII_BCM54XX_IMR, reg); ++ if (err < 0) ++ return err; ++ ++ return 0; ++ } ++ ++void bcm54616s_linkup(struct e1000_hw *hw,int speed , int duplex) ++{ ++ u16 regval; ++ ++ /* set speed and full duplex*/ ++ regval=bcmphy_read(hw,PHY_CONTROL); ++ ++ regval &= ~(MII_CR_SPEED_SELECT_MSB | MII_CR_SPEED_SELECT_LSB |MII_CR_FULL_DUPLEX); ++ switch(speed){ ++ case SPEED_10: ++ regval |=MII_CR_SPEED_10; ++ break; ++ case SPEED_100: ++ regval |=MII_CR_SPEED_100; ++ break; ++ case SPEED_1000: ++ default: ++ regval |=MII_CR_SPEED_1000; ++ break; ++ } ++ switch(duplex){ ++ case FULL_DUPLEX: ++ regval |=MII_CR_FULL_DUPLEX; ++ break; ++ } ++ ++ bcmphy_write(hw,PHY_CONTROL,regval); ++ ++ #if 0 ++ /* set Master auto and cap*/ ++ regval=bcmphy_read(hw,PHY_1000T_CTRL); ++ regval &= ~(MII_GB_CTRL_MS_MAN); ++ regval |= MII_ANA_ASF_802_3; ++ regval |= MII_ANA_HD_10; ++ regval |= MII_ANA_HD_100; ++ regval |= MII_ANA_FD_10; ++ regval |= MII_ANA_FD_100; ++ regval |= MII_ANA_ASYM_PAUSE; ++ regval |= MII_ANA_PAUSE | MII_ANA_ASYM_PAUSE; ++ regval |= MII_ANA_PAUSE; ++ bcmphy_write(hw,PHY_1000T_CTRL,regval); ++ ++ regval=bcmphy_read(hw,PHY_CONTROL); ++ regval |= MII_CR_AUTO_NEG_EN | MII_CR_RESTART_AUTO_NEG; ++ bcmphy_write(hw,PHY_CONTROL,regval); ++ #endif ++ ++ regval=bcmphy_read(hw,PHY_CONTROL); ++ regval &=~(MII_CR_ISOLATE); ++ bcmphy_write(hw,PHY_CONTROL,regval); ++} ++ ++int bcm54616_config_init(struct e1000_hw *hw) ++ { ++ int err, reg; ++ u16 regval; ++ int i; ++ ++ /* reset PHY */ ++ regval=1<<15; ++ bcmphy_write(hw,PHY_CONTROL,regval); ++ ++ mdelay(10); ++ ++ /* disable Power down and iso */ ++ regval=bcmphy_read(hw,PHY_CONTROL); ++ regval &=~(MII_CR_POWER_DOWN|MII_CR_ISOLATE); ++ bcmphy_write(hw,PHY_CONTROL,regval); ++ ++ /* disable suport I */ ++ /*0000 0100 1100 0010 */ ++ bcm54xx_auxctl_write(hw,0,0x04c2); ++ ++ regval=bcmphy_read(hw,MII_BCM54XX_AUX_CTL); ++ ++ /* set 1000base-T */ ++ regval=bcmphy_read(hw,PHY_1000T_CTRL); ++ regval |=CR_1000T_FD_CAPS | CR_1000T_REPEATER_DTE; ++ bcmphy_write(hw,PHY_1000T_CTRL,regval); ++ ++ /* set ctrl */ ++ regval= MII_CR_SPEED_1000|MII_CR_FULL_DUPLEX|MII_CR_SPEED_SELECT_MSB; ++ bcmphy_write(hw,PHY_CONTROL,regval); ++ ++ ++ /* Setup read from auxilary control shadow register 7 */ ++ bcmphy_write(hw, MII_BCM54XX_AUX_CTL,MII_BCM54XX_AUX_CTL_ENCODE(7)); ++ ++ /* Read Misc Control register */ ++ reg = (bcmphy_read(hw, MII_BCM54XX_AUX_CTL) & 0x8FFF) | 0x8010; ++ bcmphy_write(hw, MII_BCM54XX_AUX_CTL, reg); ++ ++ /* Enable auto-detect and copper prefer */ ++ bcm54xx_shadow_write(hw,BCM54XX_SHD_AUTODETECT,0x31); ++ ++ err = bcm54xx_config_init(hw); ++ ++ /* set link parner */ ++ regval = MII_ANA_ASF_802_3; ++ regval |= MII_ANA_HD_10; ++ regval |= MII_ANA_HD_100; ++ regval |= MII_ANA_FD_10; ++ regval |= MII_ANA_FD_100; ++ regval |= MII_ANA_ASYM_PAUSE; ++ regval |= MII_ANA_PAUSE | MII_ANA_ASYM_PAUSE; ++ regval |= MII_ANA_PAUSE; ++ bcmphy_write(hw, PHY_AUTONEG_ADV, reg); ++ ++ i=0; ++ while (1) { ++ regval = bcm54xx_shadow_read(hw,BCM54XX_SHD_MODE); ++ if(regval & BCM54XX_SHD_MODE_SER) ++ break; ++ if (i++ > 500) { ++ //printk("SERDES no link %x\n",regval); ++ break; ++ } ++ mdelay(1); /* 1 ms */ ++ } ++ return err; ++ } ++ +diff -Nu a/drivers/net/ethernet/intel/igb/e1000_82575.c b/drivers/net/ethernet/intel/igb/e1000_82575.c +--- a/drivers/net/ethernet/intel/igb/e1000_82575.c 2017-05-09 23:52:56.728565000 -0700 ++++ b/drivers/net/ethernet/intel/igb/e1000_82575.c 2017-05-10 01:58:36.796075944 -0700 +@@ -317,6 +317,10 @@ + break; + case BCM54616_E_PHY_ID: + phy->type = e1000_phy_bcm54616; ++ //phy->ops.check_polarity = e1000_check_polarity_bcm; ++ phy->ops.get_info = igb_get_phy_info_bcm; ++ phy->ops.force_speed_duplex = igb_phy_force_speed_duplex_bcm; ++ bcm54616_config_init(hw); + break; + case BCM50210S_E_PHY_ID: + break; +@@ -1636,6 +1640,7 @@ + ret_val = igb_e1000_copper_link_setup_82577(hw); + break; + case e1000_phy_bcm54616: ++ ret_val = igb_copper_link_setup_bcm(hw); + break; + case e1000_phy_bcm5461s: + break; +diff -Nu a/drivers/net/ethernet/intel/igb/e1000_82575.h b/drivers/net/ethernet/intel/igb/e1000_82575.h +--- a/drivers/net/ethernet/intel/igb/e1000_82575.h 2017-05-09 23:52:56.608565000 -0700 ++++ b/drivers/net/ethernet/intel/igb/e1000_82575.h 2017-01-12 01:49:16.214072900 -0800 +@@ -25,6 +25,8 @@ + #ifndef _E1000_82575_H_ + #define _E1000_82575_H_ + ++extern void bcm54616s_linkup(struct e1000_hw *hw,int speed , int duplex); ++extern int bcm54616_config_init(struct e1000_hw *hw); + #define ID_LED_DEFAULT_82575_SERDES ((ID_LED_DEF1_DEF2 << 12) | \ + (ID_LED_DEF1_DEF2 << 8) | \ + (ID_LED_DEF1_DEF2 << 4) | \ +diff -Nu a/drivers/net/ethernet/intel/igb/e1000_defines.h b/drivers/net/ethernet/intel/igb/e1000_defines.h +--- a/drivers/net/ethernet/intel/igb/e1000_defines.h 2017-05-09 23:52:56.732565000 -0700 ++++ b/drivers/net/ethernet/intel/igb/e1000_defines.h 2017-05-10 01:57:15.622221274 -0700 +@@ -1186,7 +1186,7 @@ + #define IGP04E1000_E_PHY_ID 0x02A80391 + #define BCM54616_E_PHY_ID 0x3625D10 + #define BCM5461S_PHY_ID 0x002060C0 +-#define M88_VENDOR 0x0141 ++#define M88_VENDOR 0x0141 + #define BCM50210S_E_PHY_ID 0x600d8590 + + /* M88E1000 Specific Registers */ +diff -Nu a/drivers/net/ethernet/intel/igb/e1000_phy.c b/drivers/net/ethernet/intel/igb/e1000_phy.c +--- a/drivers/net/ethernet/intel/igb/e1000_phy.c 2017-05-09 23:52:56.672565000 -0700 ++++ b/drivers/net/ethernet/intel/igb/e1000_phy.c 2017-01-12 01:57:04.376530600 -0800 +@@ -1187,6 +1187,19 @@ + return E1000_SUCCESS; + } + ++s32 igb_copper_link_setup_bcm(struct e1000_hw *hw) ++{ ++ struct e1000_phy_info *phy = &hw->phy; ++ s32 ret_val; ++ u16 phy_data; ++ ++ ret_val = phy->ops.read_reg(hw, PHY_CONTROL, &phy_data); ++ phy_data &=~(MII_CR_ISOLATE); ++ ret_val = phy->ops.write_reg(hw, PHY_CONTROL, phy_data); ++ ++ return 0; ++} ++ + /** + * e1000_copper_link_setup_m88_gen2 - Setup m88 PHY's for copper link + * @hw: pointer to the HW structure +@@ -1720,6 +1733,62 @@ + return ret_val; + } + ++s32 igb_phy_force_speed_duplex_bcm(struct e1000_hw *hw) ++{ ++ struct e1000_phy_info *phy = &hw->phy; ++ s32 ret_val; ++ u16 phy_data; ++ bool link; ++ ++ ret_val = phy->ops.read_reg(hw, PHY_CONTROL, &phy_data); ++ if (ret_val) ++ return ret_val; ++ ++ e1000_phy_force_speed_duplex_setup(hw, &phy_data); ++ ++ phy_data &=~(MII_CR_POWER_DOWN|MII_CR_ISOLATE); ++ ret_val = phy->ops.write_reg(hw, PHY_CONTROL, phy_data); ++ if (ret_val) ++ return ret_val; ++ ++ /* Clear Auto-Crossover to force MDI manually. IGP requires MDI ++ * forced whenever speed and duplex are forced. ++ */ ++ #if 0 ++ ret_val = phy->ops.read_reg(hw, IGP01E1000_PHY_PORT_CTRL, &phy_data); ++ if (ret_val) ++ return ret_val; ++ ++ phy_data &= ~IGP01E1000_PSCR_AUTO_MDIX; ++ phy_data &= ~IGP01E1000_PSCR_FORCE_MDI_MDIX; ++ ++ ret_val = phy->ops.write_reg(hw, IGP01E1000_PHY_PORT_CTRL, phy_data); ++ if (ret_val) ++ return ret_val; ++ ++ hw_dbg("IGP PSCR: %X\n", phy_data); ++ #endif ++ udelay(1); ++ ++ if (phy->autoneg_wait_to_complete) { ++ DEBUGFUNC("Waiting for forced speed/duplex link on IGP phy.\n"); ++ ++ ret_val = e1000_phy_has_link_generic(hw, PHY_FORCE_LIMIT, ++ 100000, &link); ++ if (ret_val) ++ return ret_val; ++ ++ if (!link) ++ DEBUGFUNC("Link taking longer than expected.\n"); ++ ++ /* Try once more */ ++ ret_val = e1000_phy_has_link_generic(hw, PHY_FORCE_LIMIT, ++ 100000, &link); ++ } ++ ++ return ret_val; ++} ++ + /** + * e1000_phy_force_speed_duplex_m88 - Force speed/duplex for m88 PHY + * @hw: pointer to the HW structure +@@ -2146,6 +2215,25 @@ + return ret_val; + } + ++s32 e1000_check_polarity_bcm(struct e1000_hw *hw) ++{ ++ struct e1000_phy_info *phy = &hw->phy; ++ s32 ret_val; ++ u16 data; ++ ++ #if 0 ++ ret_val = phy->ops.read_reg(hw, M88E1000_PHY_SPEC_STATUS, &data); ++ ++ if (!ret_val) ++ phy->cable_polarity = ((data & M88E1000_PSSR_REV_POLARITY) ++ ? e1000_rev_polarity_reversed ++ : e1000_rev_polarity_normal); ++ #endif ++ ret_val=0; ++ phy->cable_polarity =e1000_rev_polarity_normal; ++ return ret_val; ++} ++ + /** + * igb_e1000_check_polarity_igp - Checks the polarity. + * @hw: pointer to the HW structure +@@ -2616,6 +2704,38 @@ + return ret_val; + } + ++s32 igb_get_phy_info_bcm(struct e1000_hw *hw) ++{ ++ struct e1000_phy_info *phy = &hw->phy; ++ s32 ret_val; ++ u16 phy_data; ++ bool link; ++ ++ if (phy->media_type != e1000_media_type_copper) { ++ DEBUGFUNC("Phy info is only valid for copper media\n"); ++ return -E1000_ERR_CONFIG; ++ } ++ ++ ret_val = e1000_phy_has_link_generic(hw, 1, 0, &link); ++ if (ret_val) ++ return ret_val; ++ ++ if (!link) { ++ DEBUGFUNC("Phy info is only valid if link is up\n"); ++ return -E1000_ERR_CONFIG; ++ } ++ ++ #if 0 ++ phy->polarity_correction =true; ++ phy->is_mdix = true; ++ phy->cable_length = E1000_CABLE_LENGTH_UNDEFINED; ++ phy->local_rx = e1000_1000t_rx_status_undefined; ++ phy->remote_rx = e1000_1000t_rx_status_undefined; ++ ret_val=0; ++ #endif ++ return ret_val; ++} ++ + /** + * e1000_get_phy_info_igp - Retrieve igp PHY information + * @hw: pointer to the HW structure +diff -Nu a/drivers/net/ethernet/intel/igb/e1000_phy.h b/drivers/net/ethernet/intel/igb/e1000_phy.h +--- a/drivers/net/ethernet/intel/igb/e1000_phy.h 2017-05-09 23:52:56.672565000 -0700 ++++ b/drivers/net/ethernet/intel/igb/e1000_phy.h 2017-01-12 01:58:07.074761900 -0800 +@@ -99,6 +99,10 @@ + s32 e1000_write_phy_reg_mphy(struct e1000_hw *hw, u32 address, u32 data, + bool line_override); + bool e1000_is_mphy_ready(struct e1000_hw *hw); ++s32 igb_check_polarity_bcm(struct e1000_hw *hw); ++s32 igb_copper_link_setup_bcm(struct e1000_hw *hw); ++s32 igb_phy_force_speed_duplex_bcm(struct e1000_hw *hw); ++s32 igb_get_phy_info_bcm(struct e1000_hw *hw); + + #define E1000_MAX_PHY_ADDR 8 + +diff -Nu a/drivers/net/ethernet/intel/igb/igb_main.c b/drivers/net/ethernet/intel/igb/igb_main.c +--- a/drivers/net/ethernet/intel/igb/igb_main.c 2017-05-09 23:52:56.676565000 -0700 ++++ b/drivers/net/ethernet/intel/igb/igb_main.c 2017-01-12 02:04:11.728846300 -0800 +@@ -4814,6 +4814,14 @@ + &adapter->link_speed, + &adapter->link_duplex); + ++ switch (hw->phy.type) { ++ case e1000_phy_bcm54616: ++ bcm54616s_linkup(hw, adapter->link_speed, adapter->link_duplex); ++ break; ++ default: ++ break; ++ } ++ + ctrl = E1000_READ_REG(hw, E1000_CTRL); + /* Links status message must follow this format */ + netdev_info(netdev, +diff -Nu a/drivers/net/ethernet/intel/igb/Makefile b/drivers/net/ethernet/intel/igb/Makefile +--- a/drivers/net/ethernet/intel/igb/Makefile 2017-05-09 23:52:56.600565000 -0700 ++++ b/drivers/net/ethernet/intel/igb/Makefile 2017-01-12 02:06:51.790832900 -0800 +@@ -35,4 +35,4 @@ + e1000_mac.o e1000_nvm.o e1000_phy.o e1000_mbx.o \ + e1000_i210.o igb_ptp.o igb_hwmon.o \ + e1000_manage.o igb_param.o kcompat.o e1000_api.o \ +- igb_vmdq.o igb_procfs.o igb_debugfs.o ++ igb_vmdq.o igb_procfs.o igb_debugfs.o bcm_phy.o diff --git a/packages/base/any/kernels/3.16-lts/patches/series b/packages/base/any/kernels/3.16-lts/patches/series old mode 100644 new mode 100755 index 473d70a2..963fb532 --- a/packages/base/any/kernels/3.16-lts/patches/series +++ b/packages/base/any/kernels/3.16-lts/patches/series @@ -25,3 +25,5 @@ platform-powerpc-85xx-Makefile.patch platform-powerpc-dni-7448-r0.patch platform-powerpc-quanta-lb9-r0.patch driver-support-intel-igb-bcm50210-phy.patch +driver-i2c-bus-intel-ismt-netberg-aurora.patch +driver-igb-netberg-aurora.patch diff --git a/packages/platforms/netberg/Makefile b/packages/platforms/netberg/Makefile new file mode 100755 index 00000000..003238cf --- /dev/null +++ b/packages/platforms/netberg/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/packages/platforms/netberg/vendor-config/Makefile b/packages/platforms/netberg/vendor-config/Makefile new file mode 100755 index 00000000..003238cf --- /dev/null +++ b/packages/platforms/netberg/vendor-config/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/packages/platforms/netberg/vendor-config/PKG.yml b/packages/platforms/netberg/vendor-config/PKG.yml new file mode 100755 index 00000000..a18474fc --- /dev/null +++ b/packages/platforms/netberg/vendor-config/PKG.yml @@ -0,0 +1 @@ +!include $ONL_TEMPLATES/platform-config-vendor.yml VENDOR=netberg Vendor=Netberg diff --git a/packages/platforms/netberg/vendor-config/src/python/netberg/__init__.py b/packages/platforms/netberg/vendor-config/src/python/netberg/__init__.py new file mode 100755 index 00000000..96061bb8 --- /dev/null +++ b/packages/platforms/netberg/vendor-config/src/python/netberg/__init__.py @@ -0,0 +1,7 @@ +#!/usr/bin/python + +from onl.platform.base import * + +class OnlPlatformNetberg(OnlPlatformBase): + MANUFACTURER='Netberg' + PRIVATE_ENTERPRISE_NUMBER=47294 diff --git a/packages/platforms/netberg/x86-64/Makefile b/packages/platforms/netberg/x86-64/Makefile new file mode 100755 index 00000000..003238cf --- /dev/null +++ b/packages/platforms/netberg/x86-64/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/packages/platforms/netberg/x86-64/modules/Makefile b/packages/platforms/netberg/x86-64/modules/Makefile new file mode 100755 index 00000000..003238cf --- /dev/null +++ b/packages/platforms/netberg/x86-64/modules/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/packages/platforms/netberg/x86-64/modules/PKG.yml b/packages/platforms/netberg/x86-64/modules/PKG.yml new file mode 100755 index 00000000..56db964b --- /dev/null +++ b/packages/platforms/netberg/x86-64/modules/PKG.yml @@ -0,0 +1 @@ +!include $ONL_TEMPLATES/arch-vendor-modules.yml ARCH=amd64 VENDOR=netberg KERNELS="onl-kernel-3.16-lts-x86-64-all:amd64" diff --git a/packages/platforms/netberg/x86-64/modules/builds/.gitignore b/packages/platforms/netberg/x86-64/modules/builds/.gitignore new file mode 100755 index 00000000..a65b4177 --- /dev/null +++ b/packages/platforms/netberg/x86-64/modules/builds/.gitignore @@ -0,0 +1 @@ +lib diff --git a/packages/platforms/netberg/x86-64/modules/builds/Makefile b/packages/platforms/netberg/x86-64/modules/builds/Makefile new file mode 100755 index 00000000..3b0a1bd2 --- /dev/null +++ b/packages/platforms/netberg/x86-64/modules/builds/Makefile @@ -0,0 +1,6 @@ +KERNELS := onl-kernel-3.16-lts-x86-64-all:amd64 +KMODULES := $(wildcard *.c) +VENDOR := netberg +BASENAME := common +ARCH := x86_64 +include $(ONL)/make/kmodule.mk diff --git a/packages/platforms/netberg/x86-64/modules/builds/hardware_monitor.c b/packages/platforms/netberg/x86-64/modules/builds/hardware_monitor.c new file mode 100755 index 00000000..9a2c2fa2 --- /dev/null +++ b/packages/platforms/netberg/x86-64/modules/builds/hardware_monitor.c @@ -0,0 +1,6362 @@ + +#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#if 0 +#include "hardware_monitor.h" +#else +enum platform_type { + HURACAN = 0, + NONE +}; + +#define W83795ADG_VENDOR_ID 0x5CA3 +#define W83795ADG_CHIP_ID 0x79 + +#define W83795ADG_TEMP_COUNT 2 +#define W83795ADG_FAN_COUNT 10 +#define W83795ADG_FAN_SPEED_FACTOR 1350000 /* 1.35 * 10^6 */ +#define W83795ADG_FAN_POLES_NUMBER 4 +#define W83795ADG_VSEN_COUNT 7 + +#define TEMP_DECIMAL_BASE 25 /* 0.25 degree C */ +#define VOL_MONITOR_UNIT 1000 /* 1000mV */ + +/* W83795ADG registeris */ +#define W83795ADG_REG_BANK 0x00 /* Bank Select */ + +#define W83795ADG_REG_VENDOR_ID 0xFD /* Vender ID */ +#define W83795ADG_REG_CHIP_ID 0xFE /* Chip ID */ +#define W83795ADG_REG_DEVICE_ID 0xFB /* Device ID */ + +/* Bank 0*/ +#define W83795ADG_REG_CONFIG 0x01 /* Configuration Register */ +#define W83795ADG_REG_TEMP_CTRL2 0x05 /* Temperature Monitoring Control Register */ +#define W83795ADG_REG_VSEN1 0x10 /* VSEN1 voltage readout high byte */ +#define W83795ADG_REG_VSEN2 0x11 /* VSEN2 voltage readout high byte */ +#define W83795ADG_REG_VSEN3 0x12 /* VSEN3 voltage readout high byte */ +#define W83795ADG_REG_VSEN4 0x13 /* VSEN4 voltage readout high byte */ +#define W83795ADG_REG_TR1 0x21 /* TR1 temperature Readout high byte */ +#define W83795ADG_REG_TR2 0x22 /* TR2 temperature Readout high byte */ + +#define W83795ADG_REG_FANIN1_COUNT 0x2E /* FAN1IN tachometer readout high byte */ +#define W83795ADG_REG_FANIN2_COUNT 0x2F /* FAN2IN tachometer readout high byte */ +#define W83795ADG_REG_FANIN3_COUNT 0x30 /* FAN3IN tachometer readout high byte */ +#define W83795ADG_REG_FANIN4_COUNT 0x31 /* FAN4IN tachometer readout high byte */ +#define W83795ADG_REG_FANIN5_COUNT 0x32 /* FAN5IN tachometer readout high byte */ +#define W83795ADG_REG_FANIN6_COUNT 0x33 /* FAN6IN tachometer readout high byte */ +#define W83795ADG_REG_FANIN7_COUNT 0x34 /* FAN7IN tachometer readout high byte */ +#define W83795ADG_REG_FANIN8_COUNT 0x35 /* FAN8IN tachometer readout high byte */ +#define W83795ADG_REG_FANIN9_COUNT 0x36 /* FAN9IN tachometer readout high byte */ +#define W83795ADG_REG_FANIN10_COUNT 0x37 /* FAN10IN tachometer readout high byte */ + +#define W83795ADG_REG_VR_LSB 0x3C /* Monitored channel readout low byte */ + +/* Bank 2 */ +#define W83795ADG_REG_FOMC 0x0F /* Fan Output Mode Control */ +#define W83795ADG_REG_F1OV 0x10 /* Fan Output Value for FANCTL1 */ +#define W83795ADG_REG_F2OV 0x11 /* Fan Output Value for FANCTL2 */ + +/* CPLD register */ +#define CPLD_REG_GENERAL_0x00 0x00 /* Board Type and Revision Register */ +#define CPLD_REG_GENERAL_0x01 0x01 /* CPLD Revision Register */ +#define CPLD_REG_GENERAL_0x02 0x02 /* Power Bank Power Good Status Register */ +#define CPLD_REG_GENERAL_0x03 0x03 /* Power Bank Power ABS Status Register */ +#define CPLD_REG_GENERAL_0x06 0x06 /* Watchdog Control Register */ + +#define CPLD_REG_RESET_0x30 0x30 /* System Reset Register */ +#define CPLD_REG_RESET_0x33 0x33 /* I2C Reset Register */ +#define CPLD_REG_RESET_0x34 0x34 /* QSFP28 LED Clear Register */ +#define CPLD_REG_RESET_0x35 0x35 /* MISC Reset Register */ + +#define CPLD_REG_LED_0x40 0x40 /* System LED Register */ +#define CPLD_REG_LED_0x43 0x43 /* PSU LED Register */ +#define CPLD_REG_LED_0x44 0x44 /* FAN LED Register */ + +#define CPLD_REG_LED 0x44 /* FAN LED */ + +/* 9548 Channel Index */ +#define PCA9548_CH00 0 +#define PCA9548_CH01 1 +#define PCA9548_CH02 2 +#define PCA9548_CH03 3 +#define PCA9548_CH04 4 +#define PCA9548_CH05 5 +#define PCA9548_CH06 6 +#define PCA9548_CH07 7 + +/* PCA9553 */ +#define PCA9553_SET_BIT(numberX, posX) ( numberX |= ( 0x1 << posX) ) +#define PCA9553_CLEAR_BIT(numberX, posX) ( numberX &= (~(0x1 << posX)) ) +#define PCA9553_TEST_BIT(numberX, posX) ( numberX & ( 0x1 << posX) ) + +/**************************************************************************************** + * Correlation between pca9553 I2C Read/Write bit Data and pca9553 port index assignment + * + * + * I2C First Data Byte I2C Second Data Byte + * --------------------------------------- -------------------------------------- + * | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 | |07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 | + * --------------------------------------- ---------------------------------------- + * P07 P06 P05 P04 P03 P02 P01 P00 P17 P16 P15 P14 P13 P12 P11 P10 + * + * P[X][Y] stands for Port X (0 or 1), Bit Y (0-7) + * + * + * NOTE: We combine first data byte and second data byte into a 16-bit integer, which + * is used for I2C transfer. The following macro each defines the port's respective + * bit position within the 16-bit integer. + *****************************************************************************************/ + +#define PCA9553_BIT_P00 0 +#define PCA9553_BIT_P01 1 +#define PCA9553_BIT_P02 2 +#define PCA9553_BIT_P03 3 +#define PCA9553_BIT_P04 4 +#define PCA9553_BIT_P05 5 +#define PCA9553_BIT_P06 6 +#define PCA9553_BIT_P07 7 + +#define PCA9553_BIT_P10 0 +#define PCA9553_BIT_P11 1 +#define PCA9553_BIT_P12 2 +#define PCA9553_BIT_P13 3 +#define PCA9553_BIT_P14 4 +#define PCA9553_BIT_P15 5 +#define PCA9553_BIT_P16 6 +#define PCA9553_BIT_P17 7 + + +/****************************************************************************************** + * PCA9553 I2C bus transactions + * + * - WRITE transaction, consisting of the following data sequence: + * + * Address byte (bit0:0) + Command byte + Data Byte 0 + ... + * + * + * + * - READ transaction, consissting of the following data sequence: + * + * Address byte (bit0:0) + Command byte + Address byte (bit0:1) + Data Byte 0 + ... + * or + * Address byte (bit0:1) + Data Byte 0 + ... + * + * + * EXPLANATION + * Address byte: 7-bit I2C slave address + 1-bit (Read|Write) + * + * Command byte: A pointer allowing the master device to select which PCA9535 + * register to interact with. + * + ******************************************************************************************/ + +/* Register-pointing command byte */ +#define PCA9553_COMMAND_BYTE_REG_INPUT_PORT_0 0x00 +#define PCA9553_COMMAND_BYTE_REG_INPUT_PORT_1 0x01 +#define PCA9553_COMMAND_BYTE_REG_OUTPUT_PORT_0 0x02 +#define PCA9553_COMMAND_BYTE_REG_OUTPUT_PORT_1 0x03 +#define PCA9553_COMMAND_BYTE_REG_POLARITY_INVERSION_0 0x04 +#define PCA9553_COMMAND_BYTE_REG_POLARITY_INVERSION_1 0x05 +#define PCA9553_COMMAND_BYTE_REG_CONFIGURATION_0 0x06 +#define PCA9553_COMMAND_BYTE_REG_CONFIGURATION_1 0x07 + +/* Model ID Definition */ +typedef enum +{ + HURACAN_WITH_BMC = 0x0, + HURACAN_WITHOUT_BMC, + CABRERAIII_WITH_BMC, + CABRERAIII_WITHOUT_BMC, + SESTO_WITH_BMC, + SESTO_WITHOUT_BMC, + NCIIX_WITH_BMC, + NCIIX_WITHOUT_BMC, + ASTERION_WITH_BMC, + ASTERION_WITHOUT_BMC, + HURACAN_A_WITH_BMC, + HURACAN_A_WITHOUT_BMC, + + MODEL_ID_LAST +} modelId_t; + +/* QSFP */ +#define QSFP_COUNT 64 +#define QSFP_DATA_SIZE 256 + +#define EEPROM_DATA_SIZE 256 + +typedef struct +{ + unsigned char tempLow2HighThreshold[3]; + unsigned char tempHigh2LowThreshold[3]; + unsigned char fanDutySet[3]; +} fanControlTable_t; + +static int w83795adg_hardware_monitor_probe(struct i2c_client *client, const struct i2c_device_id *id); +static int w83795adg_hardware_monitor_detect(struct i2c_client *client, struct i2c_board_info *info); +static int w83795adg_hardware_monitor_remove(struct i2c_client *client); +static void w83795adg_hardware_monitor_shutdown(struct i2c_client *client); + +typedef struct +{ + unsigned char portMaskBitForPCA9548_1; + unsigned char portMaskBitForPCA9548_2TO5; + unsigned char portMaskIOsForPCA9548_0; + unsigned char i2cAddrForPCA9535; + short portMaskBitForTxEnPin; +} SFP_PORT_DATA_t; + +#define SFP_PORT_DATA_PORT_NCIIX_1 {0x04, 0x01, 0x08, 0, 3} +#define SFP_PORT_DATA_PORT_NCIIX_2 {0x04, 0x02, 0x08, 0, 9} +#define SFP_PORT_DATA_PORT_NCIIX_3 {0x04, 0x04, 0x08, 1, 3} +#define SFP_PORT_DATA_PORT_NCIIX_4 {0x04, 0x08, 0x08, 1, 9} +#define SFP_PORT_DATA_PORT_NCIIX_5 {0x04, 0x10, 0x08, 2, 3} +#define SFP_PORT_DATA_PORT_NCIIX_6 {0x04, 0x20, 0x08, 2, 9} +#define SFP_PORT_DATA_PORT_NCIIX_7 {0x04, 0x40, 0x08, 3, 3} +#define SFP_PORT_DATA_PORT_NCIIX_8 {0x04, 0x80, 0x08, 3, 9} + +#define SFP_PORT_DATA_PORT_NCIIX_9 {0x08, 0x01, 0x10, 0, 3} +#define SFP_PORT_DATA_PORT_NCIIX_10 {0x08, 0x02, 0x10, 0, 9} +#define SFP_PORT_DATA_PORT_NCIIX_11 {0x08, 0x04, 0x10, 1, 3} +#define SFP_PORT_DATA_PORT_NCIIX_12 {0x08, 0x08, 0x10, 1, 9} +#define SFP_PORT_DATA_PORT_NCIIX_13 {0x08, 0x10, 0x10, 2, 3} +#define SFP_PORT_DATA_PORT_NCIIX_14 {0x08, 0x20, 0x10, 2, 9} +#define SFP_PORT_DATA_PORT_NCIIX_15 {0x08, 0x40, 0x10, 3, 3} +#define SFP_PORT_DATA_PORT_NCIIX_16 {0x08, 0x80, 0x10, 3, 9} + +#define SFP_PORT_DATA_PORT_NCIIX_17 {0x10, 0x01, 0x20, 0, 3} +#define SFP_PORT_DATA_PORT_NCIIX_18 {0x10, 0x02, 0x20, 0, 9} +#define SFP_PORT_DATA_PORT_NCIIX_19 {0x10, 0x04, 0x20, 1, 3} +#define SFP_PORT_DATA_PORT_NCIIX_20 {0x10, 0x08, 0x20, 1, 9} +#define SFP_PORT_DATA_PORT_NCIIX_21 {0x10, 0x10, 0x20, 2, 3} +#define SFP_PORT_DATA_PORT_NCIIX_22 {0x10, 0x20, 0x20, 2, 9} +#define SFP_PORT_DATA_PORT_NCIIX_23 {0x10, 0x40, 0x20, 3, 3} +#define SFP_PORT_DATA_PORT_NCIIX_24 {0x10, 0x80, 0x20, 3, 9} + +#define SFP_PORT_DATA_PORT_NCIIX_25 {0x20, 0x01, 0x40, 0, 3} +#define SFP_PORT_DATA_PORT_NCIIX_26 {0x20, 0x02, 0x40, 0, 9} +#define SFP_PORT_DATA_PORT_NCIIX_27 {0x20, 0x04, 0x40, 1, 3} +#define SFP_PORT_DATA_PORT_NCIIX_28 {0x20, 0x08, 0x40, 1, 9} +#define SFP_PORT_DATA_PORT_NCIIX_29 {0x20, 0x10, 0x40, 2, 3} +#define SFP_PORT_DATA_PORT_NCIIX_30 {0x20, 0x20, 0x40, 2, 9} +#define SFP_PORT_DATA_PORT_NCIIX_31 {0x20, 0x40, 0x40, 3, 3} +#define SFP_PORT_DATA_PORT_NCIIX_32 {0x20, 0x80, 0x40, 3, 9} + +#define SFP_PORT_DATA_PORT_NCIIX_33 {0x40, 0x01, 0x80, 0, 3} +#define SFP_PORT_DATA_PORT_NCIIX_34 {0x40, 0x02, 0x80, 0, 9} +#define SFP_PORT_DATA_PORT_NCIIX_35 {0x40, 0x04, 0x80, 1, 3} +#define SFP_PORT_DATA_PORT_NCIIX_36 {0x40, 0x08, 0x80, 1, 9} +#define SFP_PORT_DATA_PORT_NCIIX_37 {0x40, 0x10, 0x80, 2, 3} +#define SFP_PORT_DATA_PORT_NCIIX_38 {0x40, 0x20, 0x80, 2, 9} +#define SFP_PORT_DATA_PORT_NCIIX_39 {0x40, 0x40, 0x80, 3, 3} +#define SFP_PORT_DATA_PORT_NCIIX_40 {0x40, 0x80, 0x80, 3, 9} + +#define SFP_PORT_DATA_PORT_NCIIX_41 {0x80, 0x01, 0x01, 0, 3} +#define SFP_PORT_DATA_PORT_NCIIX_42 {0x80, 0x02, 0x01, 0, 9} +#define SFP_PORT_DATA_PORT_NCIIX_43 {0x80, 0x04, 0x01, 1, 3} +#define SFP_PORT_DATA_PORT_NCIIX_44 {0x80, 0x08, 0x01, 1, 9} +#define SFP_PORT_DATA_PORT_NCIIX_45 {0x80, 0x10, 0x01, 2, 3} +#define SFP_PORT_DATA_PORT_NCIIX_46 {0x80, 0x20, 0x01, 2, 9} +#define SFP_PORT_DATA_PORT_NCIIX_47 {0x80, 0x40, 0x01, 3, 3} +#define SFP_PORT_DATA_PORT_NCIIX_48 {0x80, 0x80, 0x01, 3, 9} + +#define QSFP_PORT_DATA_PORT_NCIIX_1 {0x02, 0x02, 0x08, 0, 0x0200} +#define QSFP_PORT_DATA_PORT_NCIIX_2 {0x02, 0x01, 0x08, 0, 0x0010} +#define QSFP_PORT_DATA_PORT_NCIIX_3 {0x02, 0x08, 0x08, 1, 0x0010} +#define QSFP_PORT_DATA_PORT_NCIIX_4 {0x02, 0x04, 0x08, 0, 0x4000} +#define QSFP_PORT_DATA_PORT_NCIIX_5 {0x02, 0x20, 0x08, 1, 0x4000} +#define QSFP_PORT_DATA_PORT_NCIIX_6 {0x02, 0x10, 0x08, 1, 0x0200} + +SFP_PORT_DATA_t sfpPortData_78F[] = { + SFP_PORT_DATA_PORT_NCIIX_1, SFP_PORT_DATA_PORT_NCIIX_2, SFP_PORT_DATA_PORT_NCIIX_3, SFP_PORT_DATA_PORT_NCIIX_4, + SFP_PORT_DATA_PORT_NCIIX_5, SFP_PORT_DATA_PORT_NCIIX_6, SFP_PORT_DATA_PORT_NCIIX_7, SFP_PORT_DATA_PORT_NCIIX_8, + SFP_PORT_DATA_PORT_NCIIX_9, SFP_PORT_DATA_PORT_NCIIX_10, SFP_PORT_DATA_PORT_NCIIX_11, SFP_PORT_DATA_PORT_NCIIX_12, + SFP_PORT_DATA_PORT_NCIIX_13, SFP_PORT_DATA_PORT_NCIIX_14, SFP_PORT_DATA_PORT_NCIIX_15, SFP_PORT_DATA_PORT_NCIIX_16, + SFP_PORT_DATA_PORT_NCIIX_17, SFP_PORT_DATA_PORT_NCIIX_18, SFP_PORT_DATA_PORT_NCIIX_19, SFP_PORT_DATA_PORT_NCIIX_20, + SFP_PORT_DATA_PORT_NCIIX_21, SFP_PORT_DATA_PORT_NCIIX_22, SFP_PORT_DATA_PORT_NCIIX_23, SFP_PORT_DATA_PORT_NCIIX_24, + SFP_PORT_DATA_PORT_NCIIX_25, SFP_PORT_DATA_PORT_NCIIX_26, SFP_PORT_DATA_PORT_NCIIX_27, SFP_PORT_DATA_PORT_NCIIX_28, + SFP_PORT_DATA_PORT_NCIIX_29, SFP_PORT_DATA_PORT_NCIIX_30, SFP_PORT_DATA_PORT_NCIIX_31, SFP_PORT_DATA_PORT_NCIIX_32, + SFP_PORT_DATA_PORT_NCIIX_33, SFP_PORT_DATA_PORT_NCIIX_34, SFP_PORT_DATA_PORT_NCIIX_35, SFP_PORT_DATA_PORT_NCIIX_36, + SFP_PORT_DATA_PORT_NCIIX_37, SFP_PORT_DATA_PORT_NCIIX_38, SFP_PORT_DATA_PORT_NCIIX_39, SFP_PORT_DATA_PORT_NCIIX_40, + SFP_PORT_DATA_PORT_NCIIX_41, SFP_PORT_DATA_PORT_NCIIX_42, SFP_PORT_DATA_PORT_NCIIX_43, SFP_PORT_DATA_PORT_NCIIX_44, + SFP_PORT_DATA_PORT_NCIIX_45, SFP_PORT_DATA_PORT_NCIIX_46, SFP_PORT_DATA_PORT_NCIIX_47, SFP_PORT_DATA_PORT_NCIIX_48, + QSFP_PORT_DATA_PORT_NCIIX_1, QSFP_PORT_DATA_PORT_NCIIX_2, QSFP_PORT_DATA_PORT_NCIIX_3, + QSFP_PORT_DATA_PORT_NCIIX_4, QSFP_PORT_DATA_PORT_NCIIX_5, QSFP_PORT_DATA_PORT_NCIIX_6 +}; + +/* CHL8325A for NC2X Platform */ +#define LOOP1_VID_OVERRIDE_ENABLE_REG 0xD0 +#define LOOP1_OVERRIDE_VID_SETTING_REG 0xD1 + +#define CHL8325_LOOP1_Enable 0x40 + +#define CHL8325_VID0 0x9C +#define CHL8325_VID1 0x8D +#define CHL8325_VID_DEFAULT (CHL8325_VID0) +#endif + +static struct i2c_client qsfpDataA0_client; +static struct i2c_client qsfpDataA2_client; + +/* i2c bus 0 */ +static struct i2c_client pca9535pwr_client; +static struct i2c_client cpld_client; +static struct i2c_client pca9548_client_bus0; +static struct i2c_client pca9535_client_bus0[4]; +static struct i2c_client eeprom_client_bus0; +static struct i2c_client mp2953agu_client; +static struct i2c_client chl8325a_client; +static struct i2c_client psu_eeprom_client_bus0; +static struct i2c_client psu_mcu_client_bus0; + +/* i2c bus 1 */ +static struct i2c_client pca9548_client[4]; +static struct i2c_client pca9535pwr_client_bus1[6]; + +static struct i2c_client eeprom_client; +static struct i2c_client eeprom_client_2; +static struct i2c_client psu_eeprom_client; +static struct i2c_client psu_mcu_client; + +static unsigned int FanErr[W83795ADG_FAN_COUNT] = {0}; +static unsigned int FanDir = 0; +static unsigned int isBMCSupport = 0; + +static unsigned int platformBuildRev = 0xffff; +static unsigned int platformHwRev = 0xffff; +static unsigned int platformModelId = 0xffff; + +static char platformPsuPG = 0; +static char platformPsuABS = 0; + +unsigned int SFPPortAbsStatus[QSFP_COUNT]; +unsigned int SFPPortRxLosStatus[QSFP_COUNT]; +char SFPPortDataValid[QSFP_COUNT]; +char SFPPortTxDisable[QSFP_COUNT]; + +struct i2c_bus0_hardware_monitor_data { + struct device *hwmon_dev; + struct attribute_group hwmon_group; + struct mutex lock; + struct task_struct *auto_update; + struct completion auto_update_stop; + + char hardware_monitor_data_valid; + unsigned long hardware_monitor_last_updated; /* In jiffies */ + + unsigned int venderId; + unsigned int chipId; + unsigned int dviceId; + + unsigned int buildRev; + unsigned int hwRev; + unsigned int modelId; + unsigned int cpldRev; + unsigned int cpldRel; + + unsigned int macTemp; + + unsigned int remoteTempIsPositive[W83795ADG_TEMP_COUNT]; + unsigned int remoteTempInt[W83795ADG_TEMP_COUNT]; + unsigned int remoteTempDecimal[W83795ADG_TEMP_COUNT]; + unsigned int fanDuty; + unsigned int fanSpeed[W83795ADG_FAN_COUNT]; + unsigned int vSen[W83795ADG_VSEN_COUNT]; + unsigned int vSenLsb[W83795ADG_VSEN_COUNT]; + + char psuPG; + char psuABS; + + char wdReg; + unsigned int wdEnable; + unsigned int wdRefreshControl; + unsigned int wdRefreshControlFlag; + unsigned int wdRefreshTimeSelect; + unsigned int wdRefreshTimeSelectFlag; + unsigned int wdTimeoutSelect; + unsigned int wdTimeoutSelectFlag; + + unsigned int rov; + }; + +struct i2c_bus1_hardware_monitor_data { + struct device *hwmon_dev; + struct attribute_group hwmon_group; + struct mutex lock; + struct task_struct *auto_update; + struct completion auto_update_stop; + + char hardware_monitor_data_valid; + unsigned long hardware_monitor_last_updated; /* In jiffies */ + + unsigned short qsfpPortAbsStatus[4]; + char qsfpPortDataA0[QSFP_COUNT][QSFP_DATA_SIZE]; + char qsfpPortDataA2[QSFP_COUNT][QSFP_DATA_SIZE]; + unsigned short qsfpPortDataValid[4]; + unsigned short sfpPortTxDisable[3]; + unsigned short sfpPortRateSelect[3]; + unsigned short sfpPortRxLosStatus[4]; + + unsigned short fanAbs[2]; + unsigned short fanDir[2]; + + unsigned short systemLedStatus; + unsigned short frontLedStatus; +}; + +/* Addresses to scan */ +static unsigned short w83795adg_normal_i2c[] = { 0x2F, 0x70, I2C_CLIENT_END }; + +static const struct i2c_device_id w83795adg_hardware_monitor_id[] = { + { "HURACAN", HURACAN }, + { } +}; + +MODULE_DEVICE_TABLE(i2c, w83795adg_hardware_monitor_id); + +static struct i2c_driver w83795adg_hardware_monitor_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "w83795adg_hardware_monitor", + }, + .probe = w83795adg_hardware_monitor_probe, + .remove = w83795adg_hardware_monitor_remove, + .shutdown = w83795adg_hardware_monitor_shutdown, + .id_table = w83795adg_hardware_monitor_id, + .detect = w83795adg_hardware_monitor_detect, + .address_list = w83795adg_normal_i2c, +}; + +/* Front to Back */ +static fanControlTable_t fanControlTable[] = +{ + /* Huracan */ + { + {77, 95, 105}, /* temperature threshold (going to up) */ + {72, 77, 95}, /* temperature threshold (going to down) */ + {0x6C, 0x9E, 0xFF} /* fan rpm : 8000, 12000, 16000 */ + }, + /* Sesto */ + { + {85, 95, 100}, /* temperature threshold (going to up) */ + {71, 85, 95}, /* temperature threshold (going to down) */ + {0x73, 0xCC, 0xFF} /* fan rpm : 9000, 14000, 16000 */ + }, + /* NC2X */ + { + {62, 70, 85}, /* temperature threshold (going to up) */ + {58, 66, 70}, /* temperature threshold (going to down) */ + {0x70, 0xB7, 0xFF} /* fan rpm : 8000, 13000, 16000 */ + } +}; + +/* Back to Front */ +static fanControlTable_t fanControlTable_B2F[] = +{ + /* Huracan */ + { + {70, 77, 105}, /* temperature threshold (going to up) */ + {60, 70, 77}, /* temperature threshold (going to down) */ + {0x6C, 0xC7, 0xFF} /* fan rpm : 8000, 14000, 16000 */ + }, + /* Sesto */ + { + {71, 81, 105}, /* temperature threshold (going to up) */ + {64, 81, 88}, /* temperature threshold (going to down) */ + {0x73, 0xCC, 0xFF} /* fan rpm : 9000, 14000, 16000 */ + }, + /* NC2X */ + { + {58, 63, 80}, /* temperature threshold (going to up) */ + {54, 60, 63}, /* temperature threshold (going to down) */ + {0x6F, 0xB7, 0xFF} /* fan rpm : 8000, 13000, 16000 */ + } +}; + +#if 0 +static int i2c_device_byte_write(const struct i2c_client *client, unsigned char command, unsigned char value) +{ + unsigned int retry = 10; + int ret; + + while(retry>=0) + { + ret = i2c_smbus_write_byte_data(client, command, value); + mdelay(10); + if (ret >=0) + break; + retry--; + } + + if (ret < 0) + printk(KERN_INFO "%s fail : slave addr 0x%02x, command = 0x%02x, value = 0x%02x\n", __func__, client->addr, command, value); + + return ret; +} +#endif + +static int i2c_device_word_write(const struct i2c_client *client, unsigned char command, unsigned short value) +{ + unsigned int retry = 10; + int ret; + + if (i2c_smbus_read_byte_data(client, command)<0) + return -1; + + while(retry>=0) + { + ret = i2c_smbus_write_word_data(client, command, value); + mdelay(10); + if (ret >=0) + break; + retry--; + } + + if (ret < 0) + printk(KERN_INFO "%s fail : slave addr 0x%02x, command = 0x%02x, value = 0x%04x\n", __func__, client->addr, command, value); + + return ret; +} + +int qsfpDataRead(struct i2c_client *client, char *buf) +{ +#if 0 + unsigned int index; + int value; + + for (index=0; indexlock); + + /* Get Fan Speed and display status */ + fanErr = 0; + for (i=0; i=8)&&(data->modelId!=ASTERION_WITH_BMC)&&(data->modelId!=ASTERION_WITHOUT_BMC)) + { + FanErr[i] = 0; + continue; + } + + fanSpeed = 0; + /* Choose W83795ADG bank 0 */ + i2c_smbus_write_byte_data(client, W83795ADG_REG_BANK, 0x00); + MNTFANM = (int) i2c_smbus_read_byte_data(client, (W83795ADG_REG_FANIN1_COUNT+i)); + MNTFANL = (int) i2c_smbus_read_byte_data(client, W83795ADG_REG_VR_LSB); + if ( !((MNTFANM == 0xFF) && (MNTFANL == 0xF0)) ) + { + /* FanSpeed (RPM) = 1.35 x 10^6 / ( (12-bitCountValue) x (FanPoles/4) ) */ + TEMP = (((MNTFANM << 4) + ((MNTFANL & 0xF0) >> 4)) * (W83795ADG_FAN_POLES_NUMBER / 4)); + if (TEMP != 0) + fanSpeed = W83795ADG_FAN_SPEED_FACTOR / TEMP; + } + if (fanSpeed == 0) + fanErr = FanErr[i] = 1; + else + FanErr[i] = 0; + data->fanSpeed[i] = fanSpeed; + } + + if ((data->modelId==HURACAN_WITH_BMC)||(data->modelId==HURACAN_WITHOUT_BMC)) + { + if (data->hwRev == 0x00) /* Proto */ + { + if (fanErr == 1) + i2c_smbus_write_byte_data(&pca9535pwr_client, PCA9553_COMMAND_BYTE_REG_OUTPUT_PORT_0, 0x80); + else + i2c_smbus_write_byte_data(&pca9535pwr_client, PCA9553_COMMAND_BYTE_REG_OUTPUT_PORT_0, 0x00); + } + else if (data->hwRev == 0x02) /* Beta */ + { + if (fanErr == 1) + i2c_smbus_write_byte_data(&cpld_client, CPLD_REG_LED_0x44, 0x01); + else + i2c_smbus_write_byte_data(&cpld_client, CPLD_REG_LED_0x44, 0x00); + } + } + + /* Get Voltage */ + for (i=0; ivSen[i] = (unsigned int) i2c_smbus_read_byte_data(client, (W83795ADG_REG_VSEN1+i)); + data->vSenLsb[i] = (unsigned int) i2c_smbus_read_byte_data(client, W83795ADG_REG_VR_LSB); + } + + /* Get Remote Temp */ + for (i=0; iremoteTempIsPositive[i] = 0; + cTemp = (((MNTRTD << 2) + ((MNTTD & 0xC0) >> 6)) ^ 0x1FF) + 1; /* calculate 2's complement */ + data->remoteTempDecimal[i] = (cTemp & 0x3) * TEMP_DECIMAL_BASE; + data->remoteTempInt[i] = cTemp >> 2; + } + else + { + data->remoteTempIsPositive[i] = 1; + data->remoteTempDecimal[i] = ((MNTTD & 0xC0) >> 6) * TEMP_DECIMAL_BASE; + data->remoteTempInt[i] = MNTRTD; + } + } + + if (fanCtrlDelay == 0) + { + /* Get Max. Temp */ + maxTemp = data->macTemp; + for (i=0; iremoteTempInt[i] > maxTemp) + maxTemp = data->remoteTempInt[i]; + } + + /* FAN Control */ + switch(platformModelId) + { + default: + case HURACAN_WITH_BMC: + case HURACAN_WITHOUT_BMC: + case HURACAN_A_WITH_BMC: + case HURACAN_A_WITHOUT_BMC: + if (FanDir != 0) + fanTable = &(fanControlTable[0]); + else + fanTable = &(fanControlTable_B2F[0]); + break; + + case SESTO_WITH_BMC: + case SESTO_WITHOUT_BMC: + if (FanDir != 0) + fanTable = &(fanControlTable[1]); + else + fanTable = &(fanControlTable_B2F[1]); + break; + + case NCIIX_WITH_BMC: + case NCIIX_WITHOUT_BMC: + if (FanDir != 0) + fanTable = &(fanControlTable[2]); + else + fanTable = &(fanControlTable_B2F[2]); + break; + } + + if (fanErr) + { + fanDuty = fanTable->fanDutySet[2]; + } + else + { + fanDuty = 0; + if (maxTemp > LastTemp) /* temp is going to up */ + { + if (maxTemp < fanTable->tempLow2HighThreshold[0]) + { + fanDuty = fanTable->fanDutySet[0]; + } + else if (maxTemp < fanTable->tempLow2HighThreshold[1]) + { + fanDuty = fanTable->fanDutySet[1]; + } + else if (maxTemp < fanTable->tempLow2HighThreshold[2]) + { + fanDuty = fanTable->fanDutySet[2]; + } + else /* shutdown system */ + { + i2c_smbus_write_byte_data(&cpld_client, CPLD_REG_RESET_0x30, 0xff); + } + } + else if (maxTemp < LastTemp)/* temp is going to down */ + { + if (maxTemp <= fanTable->tempHigh2LowThreshold[0]) + { + fanDuty = fanTable->fanDutySet[0]; + } + else if (maxTemp <= fanTable->tempHigh2LowThreshold[1]) + { + fanDuty = fanTable->fanDutySet[1]; + } + else + { + fanDuty = fanTable->fanDutySet[2]; + } + } + } + LastTemp = maxTemp; + + if ((fanDuty!=0)&&(data->fanDuty!=fanDuty)) + { + data->fanDuty = fanDuty; + + /* Choose W83795ADG bank 0 */ + i2c_smbus_write_byte_data(client, W83795ADG_REG_BANK, 0x00); + /* Disable monitoring operations */ + configByte = i2c_smbus_read_byte_data(client, W83795ADG_REG_CONFIG); + configByte &= 0xfe; + i2c_smbus_write_byte_data(client, W83795ADG_REG_CONFIG, configByte); + + /* Choose W83795ADG bank 2 */ + i2c_smbus_write_byte_data(client, W83795ADG_REG_BANK, 0x02); + i2c_smbus_write_byte_data(client, W83795ADG_REG_F1OV, fanDuty); + i2c_smbus_write_byte_data(client, W83795ADG_REG_F2OV, fanDuty); + + /* Choose W83795ADG bank 0 */ + i2c_smbus_write_byte_data(client, W83795ADG_REG_BANK, 0x00); + /* Enable monitoring operations */ + configByte |= 0x01; + i2c_smbus_write_byte_data(client, W83795ADG_REG_CONFIG, configByte); + } + } + + if (fanCtrlDelay > 0) + fanCtrlDelay --; + + data->psuPG = platformPsuPG = i2c_smbus_read_byte_data(&cpld_client, CPLD_REG_GENERAL_0x02); + data->psuABS = platformPsuABS = i2c_smbus_read_byte_data(&cpld_client, CPLD_REG_GENERAL_0x03); + switch(platformModelId) + { + case NCIIX_WITH_BMC: + case NCIIX_WITHOUT_BMC: + for (i=0; i<5 ; i++) + { + /* Turn on PCA9548#0 channel 3~7 on I2C-bus0 */ + i2c_smbus_write_byte_data(&pca9548_client_bus0, 0, (1<<(PCA9548_CH03+i))); + for (j=0; j<4; j++) + { + port_status = i2c_smbus_read_word_data(&(pca9535_client_bus0[j]), PCA9553_COMMAND_BYTE_REG_INPUT_PORT_0); + port = ((j*2)+(i*8)); + SFPPortAbsStatus[port] = (PCA9553_TEST_BIT(port_status, 1)==0); + SFPPortRxLosStatus[port] = (PCA9553_TEST_BIT(port_status, 2)==0); + port++; + SFPPortAbsStatus[port] = (PCA9553_TEST_BIT(port_status, 7)==0); + SFPPortRxLosStatus[port] = (PCA9553_TEST_BIT(port_status, 8)==0); + } + i2c_smbus_write_byte_data(&pca9548_client_bus0, 0, 0x00); + } + break; + + default: + break; + } + + /* Watchdog Control Register Support */ + if (data->cpldRev != 0) + { + if (data->wdEnable == 1) /* Watchdog Timer is enabled */ + { + if (data->wdRefreshControl == 0) /* Refresh Watchdog by Hardware Monitor */ + { + data->wdReg = i2c_smbus_read_byte_data(&cpld_client, CPLD_REG_GENERAL_0x06); + data->wdReg |= 0x01; /* clear timer */ + i2c_smbus_write_byte_data(&cpld_client, CPLD_REG_GENERAL_0x06, data->wdReg); + } + else if (data->wdRefreshControl == 1) /* Refresh Watchdog by application */ + { + if (data->wdRefreshControlFlag == 1) + { + data->wdReg = i2c_smbus_read_byte_data(&cpld_client, CPLD_REG_GENERAL_0x06); + data->wdReg |= 0x01; /* clear timer */ + i2c_smbus_write_byte_data(&cpld_client, CPLD_REG_GENERAL_0x06, data->wdReg); + data->wdRefreshControlFlag = 0; + } + } + + /* Watchdog Timer timeout setting */ + if (data->wdRefreshTimeSelectFlag == 1) + { + data->wdReg = i2c_smbus_read_byte_data(&cpld_client, CPLD_REG_GENERAL_0x06); + data->wdReg |= 0x01; /* clear timer */ + data->wdReg &= (~0x38); + switch(data->wdRefreshTimeSelect) + { + case 1: /* 8 second delay */ + data->wdReg |= 0x20; + break; + + case 2: /* 16 second delay */ + data->wdReg |= 0x10; + break; + + case 3: /* 24 second delay */ + data->wdReg |= 0x30; + break; + + case 4: /* 32 second delay */ + data->wdReg |= 0x08; + break; + + case 5: /* 40 second delay */ + data->wdReg |= 0x28; + break; + + case 6: /* 48 second delay */ + data->wdReg |= 0x18; + break; + + case 7: /* 56 second delay */ + data->wdReg |= 0x38; + break; + + default: /* 8 second delay */ + data->wdReg |= 0x20; + break; + } + i2c_smbus_write_byte_data(&cpld_client, CPLD_REG_GENERAL_0x06, data->wdReg); + data->wdRefreshTimeSelectFlag = 0; + } + + /* Watchdog Timeout occurrence */ + if (data->wdTimeoutSelectFlag == 1) + { + data->wdReg = i2c_smbus_read_byte_data(&cpld_client, CPLD_REG_GENERAL_0x06); + data->wdReg |= 0x01; /* clear timer */ + if (data->wdTimeoutSelect == 0) /* System reset */ + data->wdReg &= (~0x02); + else /* Power cycle */ + data->wdReg |= 0x02; + i2c_smbus_write_byte_data(&cpld_client, CPLD_REG_GENERAL_0x06, data->wdReg); + data->wdTimeoutSelectFlag = 0; + } + } + else /* Watchdog Timer is disabled */ + { + data->wdReg = i2c_smbus_read_byte_data(&cpld_client, CPLD_REG_GENERAL_0x06); + data->wdReg |= 0x01; /* Enable WD function */ +#if 0 + data->wdReg &= (~0x02); /* default select System reset */ +#else + data->wdReg |= 0x02; /* default select Power cycle */ + data->wdTimeoutSelect = 1; +#endif + data->wdReg &= (~0x38); + data->wdReg |= 0x20; /* default select 8 second delay */ + data->wdRefreshTimeSelect = 1; + i2c_smbus_write_byte_data(&cpld_client, CPLD_REG_GENERAL_0x06, data->wdReg); + data->wdEnable = 1; + } + } + mutex_unlock(&data->lock); + } + + if (kthread_should_stop()) + break; + msleep_interruptible(1000); + } + + complete_all(&data->auto_update_stop); + return 0; +} + +static int i2c_bus1_hardware_monitor_update_thread(void *p) +{ + struct i2c_client *client = p; + struct i2c_bus1_hardware_monitor_data *data = i2c_get_clientdata(client); + int i, ret; + unsigned short value, fanErr; + unsigned int step = 0; + unsigned char qsfpPortData[QSFP_DATA_SIZE]; + unsigned short port_status; + int j, port; + + while (!kthread_should_stop()) + { + mutex_lock(&data->lock); + switch(platformModelId) + { + case HURACAN_WITH_BMC: + case HURACAN_WITHOUT_BMC: + case HURACAN_A_WITH_BMC: + case HURACAN_A_WITHOUT_BMC: + switch (step) + { + case 0: + /* Turn on PCA9548 channel 4 on I2C-bus1 */ + ret = i2c_smbus_write_byte(client, (1<qsfpPortAbsStatus[i] = i2c_smbus_read_word_data(&(pca9535pwr_client_bus1[i]), PCA9553_COMMAND_BYTE_REG_INPUT_PORT_0); + + step = 1; + break; + + case 1: + if ((data->qsfpPortAbsStatus[0]&0x00ff)!=0x00ff) /* QSFP 0~7 ABS */ + { + /* Turn on PCA9548 channel 0 on I2C-bus1 */ + ret = i2c_smbus_write_byte(client, (1<qsfpPortAbsStatus[0], i) == 0) /* present */ + { + ret = i2c_smbus_write_byte(&(pca9548_client[0]), (1<=0) + { + ret = qsfpDataRead(&qsfpDataA0_client,qsfpPortData); + if (ret>=0) + { + memcpy(&(data->qsfpPortDataA0[i][0]), qsfpPortData, QSFP_DATA_SIZE); + PCA9553_SET_BIT(data->qsfpPortDataValid[0], i); + } + } + i2c_smbus_write_byte(&(pca9548_client[0]), 0x00); + } + else + { + memset(&(data->qsfpPortDataA0[i][0]), 0, QSFP_DATA_SIZE); + memset(&(data->qsfpPortDataA2[i][0]), 0, QSFP_DATA_SIZE); + PCA9553_CLEAR_BIT(data->qsfpPortDataValid[0], i); + } + } + } + else + { + for (i=0; i<8; i++) + { + memset(&(data->qsfpPortDataA0[i][0]), 0, QSFP_DATA_SIZE); + memset(&(data->qsfpPortDataA2[i][0]), 0, QSFP_DATA_SIZE); + PCA9553_CLEAR_BIT(data->qsfpPortDataValid[0], i); + } + } + + step = 2; + break; + + case 2: + if ((data->qsfpPortAbsStatus[0]&0xff00)!=0xff00) /* QSFP 8~15 ABS */ + { + /* Turn on PCA9548 channel 1 on I2C-bus1 */ + ret = i2c_smbus_write_byte(client, (1<qsfpPortAbsStatus[0], i) == 0) /* present */ + { + ret = i2c_smbus_write_byte(&(pca9548_client[1]), (1<<(i-8))); + if (ret>=0) + { + ret = qsfpDataRead(&qsfpDataA0_client,qsfpPortData); + if (ret>=0) + { + memcpy(&(data->qsfpPortDataA0[i][0]), qsfpPortData, QSFP_DATA_SIZE); + PCA9553_SET_BIT(data->qsfpPortDataValid[0], i); + } + } + i2c_smbus_write_byte(&(pca9548_client[1]), 0x00); + } + else + { + memset(&(data->qsfpPortDataA0[i][0]), 0, QSFP_DATA_SIZE); + memset(&(data->qsfpPortDataA2[i][0]), 0, QSFP_DATA_SIZE); + PCA9553_CLEAR_BIT(data->qsfpPortDataValid[0], i); + } + } + } + else + { + for (i=8; i<16; i++) + { + memset(&(data->qsfpPortDataA0[i][0]), 0, QSFP_DATA_SIZE); + memset(&(data->qsfpPortDataA2[i][0]), 0, QSFP_DATA_SIZE); + PCA9553_CLEAR_BIT(data->qsfpPortDataValid[0], i); + } + } + + step = 3; + break; + + case 3: + if ((data->qsfpPortAbsStatus[1]&0x00ff)!=0x00ff) /* QSFP 16~23 ABS */ + { + /* Turn on PCA9548 channel 2 on I2C-bus1 */ + ret = i2c_smbus_write_byte(client, (1<qsfpPortAbsStatus[1], i) == 0) /* present */ + { + ret = i2c_smbus_write_byte(&(pca9548_client[2]), (1<=0) + { + ret = qsfpDataRead(&qsfpDataA0_client,qsfpPortData); + if (ret>=0) + { + memcpy(&(data->qsfpPortDataA0[i+16][0]), qsfpPortData, QSFP_DATA_SIZE); + PCA9553_SET_BIT(data->qsfpPortDataValid[1], i); + } + } + i2c_smbus_write_byte(&(pca9548_client[2]), 0x00); + } + else + { + memset(&(data->qsfpPortDataA0[i+16][0]), 0, QSFP_DATA_SIZE); + memset(&(data->qsfpPortDataA2[i+16][0]), 0, QSFP_DATA_SIZE); + PCA9553_CLEAR_BIT(data->qsfpPortDataValid[1], i); + } + } + } + else + { + for (i=0; i<8; i++) + { + memset(&(data->qsfpPortDataA0[i+16][0]), 0, QSFP_DATA_SIZE); + memset(&(data->qsfpPortDataA2[i+16][0]), 0, QSFP_DATA_SIZE); + PCA9553_CLEAR_BIT(data->qsfpPortDataValid[1], i); + } + } + + step = 4; + break; + + case 4: + if ((data->qsfpPortAbsStatus[1]&0xff00)!=0xff00) /* QSFP 24~31 ABS */ + { + /* Turn on PCA9548 channel 3 on I2C-bus1 */ + ret = i2c_smbus_write_byte(client, (1<qsfpPortAbsStatus[1], i) == 0) /* present */ + { + ret = i2c_smbus_write_byte(&(pca9548_client[3]), (1<<(i-8))); + if (ret>=0) + { + ret = qsfpDataRead(&qsfpDataA0_client,qsfpPortData); + if (ret>=0) + { + memcpy(&(data->qsfpPortDataA0[i+16][0]), qsfpPortData, QSFP_DATA_SIZE); + PCA9553_SET_BIT(data->qsfpPortDataValid[1], i); + } + } + i2c_smbus_write_byte(&(pca9548_client[3]), 0x00); + } + else + { + memset(&(data->qsfpPortDataA0[i+16][0]), 0, QSFP_DATA_SIZE); + memset(&(data->qsfpPortDataA2[i+16][0]), 0, QSFP_DATA_SIZE); + PCA9553_CLEAR_BIT(data->qsfpPortDataValid[1], i); + } + } + } + else + { + for (i=8; i<16; i++) + { + memset(&(data->qsfpPortDataA0[i+16][0]), 0, QSFP_DATA_SIZE); + memset(&(data->qsfpPortDataA2[i+16][0]), 0, QSFP_DATA_SIZE); + PCA9553_CLEAR_BIT(data->qsfpPortDataValid[1], i); + } + } + + if (isBMCSupport == 0) + step = 5; + else + step = 0; + break; + + case 5: + /* Turn on PCA9548 channel 7 on I2C-bus1 */ + ret = i2c_smbus_write_byte(client, (1<frontLedStatus |= 0x00ff; + if (fanErr==0) + data->frontLedStatus &= (~0x0008); /* FAN_LED_G# */ + else + data->frontLedStatus &= (~0x0004); /* FAN_LED_Y# */ + + if ((platformPsuABS&0x01)==0x00) /* PSU1 Present */ + { + if (platformPsuPG&0x08) /* PSU1_PG_LDC Power Goodasserted */ + data->frontLedStatus &= (~0x0002); /* PSU1_LED_G# */ + else + data->frontLedStatus &= (~0x0001); /* PSU1_LED_Y# */ + } + if ((platformPsuABS&0x02)==0x00) /* PSU2 Present */ + { + if (platformPsuPG&0x10) /* PSU2_PG_LDC Power Goodasserted */ + data->frontLedStatus &= (~0x0020); /* PSU2_LED_G# */ + else + data->frontLedStatus &= (~0x0010); /* PSU2_LED_Y# */ + } + + switch (data->systemLedStatus) + { + default: + case 0: /* Booting */ + break; + + case 1: /* Critical*/ + data->frontLedStatus &= (~0x0040); /* SYS_LED_Y# */ + break; + + case 2: /* Normal */ + data->frontLedStatus &= (~0x0080); /* SYS_LED_G# */ + break; + } + + i2c_device_word_write(&(pca9535pwr_client_bus1[2]), PCA9553_COMMAND_BYTE_REG_OUTPUT_PORT_0, data->frontLedStatus); + } + + /* FAN Status */ + value = i2c_smbus_read_word_data(&(pca9535pwr_client_bus1[0]), PCA9553_COMMAND_BYTE_REG_INPUT_PORT_0); + data->fanAbs[0] = (value&0x4444); + data->fanDir[0] = (value&0x8888); + FanDir = data->fanDir[0]; + +/* + printk(KERN_INFO "Step %d, value = 0x%04x, fanAbs[0] = 0x%04x, fanDir[0] = 0x%04x\n", step, value, data->fanAbs[0], data->fanDir[0]); +*/ + step = 0; + break; + + default: + step = 0; + break; + } + i2c_smbus_write_byte_data(&cpld_client, CPLD_REG_RESET_0x33, 0x00); + i2c_smbus_write_byte_data(&cpld_client, CPLD_REG_RESET_0x33, 0xff); + break; + + case CABRERAIII_WITH_BMC: + case CABRERAIII_WITHOUT_BMC: + break; + + case SESTO_WITH_BMC: + case SESTO_WITHOUT_BMC: + switch (step) + { + case 0: + /* Turn on PCA9548#1 channel 0 on I2C-bus1 */ + ret = i2c_smbus_write_byte(&(pca9548_client[1]), (1<qsfpPortAbsStatus[i] = i2c_smbus_read_word_data(&(pca9535pwr_client_bus1[i]), PCA9553_COMMAND_BYTE_REG_INPUT_PORT_0); + + /* Turn on PCA9548#1 channel 1 on I2C-bus1 */ + ret = i2c_smbus_write_byte(&(pca9548_client[1]), (1<sfpPortRxLosStatus[i] = i2c_smbus_read_word_data(&(pca9535pwr_client_bus1[i]), PCA9553_COMMAND_BYTE_REG_INPUT_PORT_0); + + step = 1; + break; + + case 1: + if ((data->qsfpPortAbsStatus[0]&0x00ff)!=0x00ff) /* SFP 0~7 ABS */ + { + /* Turn on PCA9548#0 channel 0 on I2C-bus1 */ + ret = i2c_smbus_write_byte(client, (1<qsfpPortAbsStatus[0], i) == 0) /* present */ + { + ret = i2c_smbus_write_byte(&(pca9548_client[0]), (1<=0) + { + if (PCA9553_TEST_BIT(data->qsfpPortDataValid[0], i) == 0) + { + ret = qsfpDataRead(&qsfpDataA0_client,qsfpPortData); + if (ret>=0) + { + memcpy(&(data->qsfpPortDataA0[i][0]), qsfpPortData, QSFP_DATA_SIZE); + PCA9553_SET_BIT(data->qsfpPortDataValid[0], i); + } + } + ret = qsfpDataRead(&qsfpDataA2_client,qsfpPortData); + if (ret>=0) + memcpy(&(data->qsfpPortDataA2[i][0]), qsfpPortData, QSFP_DATA_SIZE); + } + i2c_smbus_write_byte(&(pca9548_client[0]), 0x00); + } + else + { + memset(&(data->qsfpPortDataA0[i][0]), 0, QSFP_DATA_SIZE); + memset(&(data->qsfpPortDataA2[i][0]), 0, QSFP_DATA_SIZE); + PCA9553_CLEAR_BIT(data->qsfpPortDataValid[0], i); + } + } + } + else + { + for (i=0; i<8; i++) + { + memset(&(data->qsfpPortDataA0[i][0]), 0, QSFP_DATA_SIZE); + memset(&(data->qsfpPortDataA2[i][0]), 0, QSFP_DATA_SIZE); + PCA9553_CLEAR_BIT(data->qsfpPortDataValid[0], i); + } + } + + step = 2; + break; + + case 2: + if ((data->qsfpPortAbsStatus[0]&0xff00)!=0xff00) /* SFP 8~15 ABS */ + { + /* Turn on PCA9548#0 channel 1 on I2C-bus1 */ + ret = i2c_smbus_write_byte(client, (1<qsfpPortAbsStatus[0], i) == 0) /* present */ + { + ret = i2c_smbus_write_byte(&(pca9548_client[0]), (1<<(i-8))); + if (ret>=0) + { + if (PCA9553_TEST_BIT(data->qsfpPortDataValid[0], i) == 0) + { + ret = qsfpDataRead(&qsfpDataA0_client,qsfpPortData); + if (ret>=0) + { + memcpy(&(data->qsfpPortDataA0[i][0]), qsfpPortData, QSFP_DATA_SIZE); + PCA9553_SET_BIT(data->qsfpPortDataValid[0], i); + } + } + ret = qsfpDataRead(&qsfpDataA2_client,qsfpPortData); + if (ret>=0) + memcpy(&(data->qsfpPortDataA2[i][0]), qsfpPortData, QSFP_DATA_SIZE); + } + i2c_smbus_write_byte(&(pca9548_client[0]), 0x00); + } + else + { + memset(&(data->qsfpPortDataA0[i][0]), 0, QSFP_DATA_SIZE); + memset(&(data->qsfpPortDataA2[i][0]), 0, QSFP_DATA_SIZE); + PCA9553_CLEAR_BIT(data->qsfpPortDataValid[0], i); + } + } + } + else + { + for (i=8; i<16; i++) + { + memset(&(data->qsfpPortDataA0[i][0]), 0, QSFP_DATA_SIZE); + memset(&(data->qsfpPortDataA2[i][0]), 0, QSFP_DATA_SIZE); + PCA9553_CLEAR_BIT(data->qsfpPortDataValid[0], i); + } + } + + step = 3; + break; + + case 3: + if ((data->qsfpPortAbsStatus[1]&0x00ff)!=0x00ff) /* SFP 16~23 ABS */ + { + /* Turn on PCA9548#0 channel 2 on I2C-bus1 */ + ret = i2c_smbus_write_byte(client, (1<qsfpPortAbsStatus[1], i) == 0) /* present */ + { + ret = i2c_smbus_write_byte(&(pca9548_client[0]), (1<=0) + { + if (PCA9553_TEST_BIT(data->qsfpPortDataValid[1], i) == 0) + { + ret = qsfpDataRead(&qsfpDataA0_client,qsfpPortData); + if (ret>=0) + { + memcpy(&(data->qsfpPortDataA0[i+16][0]), qsfpPortData, QSFP_DATA_SIZE); + PCA9553_SET_BIT(data->qsfpPortDataValid[1], i); + } + } + ret = qsfpDataRead(&qsfpDataA2_client,qsfpPortData); + if (ret>=0) + memcpy(&(data->qsfpPortDataA2[i+16][0]), qsfpPortData, QSFP_DATA_SIZE); + } + i2c_smbus_write_byte(&(pca9548_client[0]), 0x00); + } + else + { + memset(&(data->qsfpPortDataA0[i+16][0]), 0, QSFP_DATA_SIZE); + memset(&(data->qsfpPortDataA2[i+16][0]), 0, QSFP_DATA_SIZE); + PCA9553_CLEAR_BIT(data->qsfpPortDataValid[1], i); + } + } + } + else + { + for (i=0; i<8; i++) + { + memset(&(data->qsfpPortDataA0[i+16][0]), 0, QSFP_DATA_SIZE); + memset(&(data->qsfpPortDataA2[i+16][0]), 0, QSFP_DATA_SIZE); + PCA9553_CLEAR_BIT(data->qsfpPortDataValid[1], i); + } + } + + step = 4; + break; + + case 4: + if ((data->qsfpPortAbsStatus[1]&0xff00)!=0xff00) /* SFP 24~31 ABS */ + { + /* Turn on PCA9548#0 channel 3 on I2C-bus1 */ + ret = i2c_smbus_write_byte(client, (1<qsfpPortAbsStatus[1], i) == 0) /* present */ + { + ret = i2c_smbus_write_byte(&(pca9548_client[0]), (1<<(i-8))); + if (ret>=0) + { + if (PCA9553_TEST_BIT(data->qsfpPortDataValid[1], i) == 0) + { + ret = qsfpDataRead(&qsfpDataA0_client,qsfpPortData); + if (ret>=0) + { + memcpy(&(data->qsfpPortDataA0[i+16][0]), qsfpPortData, QSFP_DATA_SIZE); + PCA9553_SET_BIT(data->qsfpPortDataValid[1], i); + } + } + ret = qsfpDataRead(&qsfpDataA2_client,qsfpPortData); + if (ret>=0) + memcpy(&(data->qsfpPortDataA2[i+16][0]), qsfpPortData, QSFP_DATA_SIZE); + } + i2c_smbus_write_byte(&(pca9548_client[0]), 0x00); + } + else + { + memset(&(data->qsfpPortDataA0[i+16][0]), 0, QSFP_DATA_SIZE); + memset(&(data->qsfpPortDataA2[i+16][0]), 0, QSFP_DATA_SIZE); + PCA9553_CLEAR_BIT(data->qsfpPortDataValid[1], i); + } + } + } + else + { + for (i=8; i<16; i++) + { + memset(&(data->qsfpPortDataA0[i+16][0]), 0, QSFP_DATA_SIZE); + memset(&(data->qsfpPortDataA2[i+16][0]), 0, QSFP_DATA_SIZE); + PCA9553_CLEAR_BIT(data->qsfpPortDataValid[1], i); + } + } + + step = 5; + break; + + case 5: + if ((data->qsfpPortAbsStatus[2]&0x00ff)!=0x00ff) /* SFP 32~39 ABS */ + { + /* Turn on PCA9548#0 channel 4 on I2C-bus1 */ + ret = i2c_smbus_write_byte(client, (1<qsfpPortAbsStatus[2], i) == 0) /* present */ + { + ret = i2c_smbus_write_byte(&(pca9548_client[0]), (1<=0) + { + if (PCA9553_TEST_BIT(data->qsfpPortDataValid[2], i) == 0) + { + ret = qsfpDataRead(&qsfpDataA0_client,qsfpPortData); + if (ret>=0) + { + memcpy(&(data->qsfpPortDataA0[i+32][0]), qsfpPortData, QSFP_DATA_SIZE); + PCA9553_SET_BIT(data->qsfpPortDataValid[2], i); + } + } + ret = qsfpDataRead(&qsfpDataA2_client,qsfpPortData); + if (ret>=0) + memcpy(&(data->qsfpPortDataA2[i+32][0]), qsfpPortData, QSFP_DATA_SIZE); + } + i2c_smbus_write_byte(&(pca9548_client[0]), 0x00); + } + else + { + memset(&(data->qsfpPortDataA0[i+32][0]), 0, QSFP_DATA_SIZE); + memset(&(data->qsfpPortDataA2[i+32][0]), 0, QSFP_DATA_SIZE); + PCA9553_CLEAR_BIT(data->qsfpPortDataValid[2], i); + } + } + } + else + { + for (i=0; i<8; i++) + { + memset(&(data->qsfpPortDataA0[i+32][0]), 0, QSFP_DATA_SIZE); + memset(&(data->qsfpPortDataA2[i+32][0]), 0, QSFP_DATA_SIZE); + PCA9553_CLEAR_BIT(data->qsfpPortDataValid[2], i); + } + } + + step = 6; + break; + + case 6: + if ((data->qsfpPortAbsStatus[2]&0xff00)!=0xff00) /* SFP 40~47 ABS */ + { + /* Turn on PCA9548#0 channel 5 on I2C-bus1 */ + ret = i2c_smbus_write_byte(client, (1<qsfpPortAbsStatus[2], i) == 0) /* present */ + { + ret = i2c_smbus_write_byte(&(pca9548_client[0]), (1<<(i-8))); + if (ret>=0) + { + if (PCA9553_TEST_BIT(data->qsfpPortDataValid[2], i) == 0) + { + ret = qsfpDataRead(&qsfpDataA0_client,qsfpPortData); + if (ret>=0) + { + memcpy(&(data->qsfpPortDataA0[i+32][0]), qsfpPortData, QSFP_DATA_SIZE); + PCA9553_SET_BIT(data->qsfpPortDataValid[2], i); + } + } + ret = qsfpDataRead(&qsfpDataA2_client,qsfpPortData); + if (ret>=0) + memcpy(&(data->qsfpPortDataA2[i+32][0]), qsfpPortData, QSFP_DATA_SIZE); + } + i2c_smbus_write_byte(&(pca9548_client[0]), 0x00); + } + else + { + memset(&(data->qsfpPortDataA0[i+32][0]), 0, QSFP_DATA_SIZE); + memset(&(data->qsfpPortDataA2[i+32][0]), 0, QSFP_DATA_SIZE); + PCA9553_CLEAR_BIT(data->qsfpPortDataValid[2], i); + } + } + } + else + { + for (i=8; i<16; i++) + { + memset(&(data->qsfpPortDataA0[i+32][0]), 0, QSFP_DATA_SIZE); + memset(&(data->qsfpPortDataA2[i+32][0]), 0, QSFP_DATA_SIZE); + PCA9553_CLEAR_BIT(data->qsfpPortDataValid[2], i); + } + } + + step = 7; + break; + + case 7: + if ((data->qsfpPortAbsStatus[3]&0x00ff)!=0x00ff) /* QSFP 0~5 ABS */ + { + /* Turn on PCA9548#0 channel 6 on I2C-bus1 */ + ret = i2c_smbus_write_byte(client, (1<qsfpPortAbsStatus[3], i) == 0) /* present */ + { + ret = i2c_smbus_write_byte(&(pca9548_client[0]), (1<=0) + { + ret = qsfpDataRead(&qsfpDataA0_client,qsfpPortData); + if (ret>=0) + { + memcpy(&(data->qsfpPortDataA0[i+48][0]), qsfpPortData, QSFP_DATA_SIZE); + PCA9553_SET_BIT(data->qsfpPortDataValid[3], i); + } + } + i2c_smbus_write_byte(&(pca9548_client[0]), 0x00); + } + else + { + memset(&(data->qsfpPortDataA0[i+48][0]), 0, QSFP_DATA_SIZE); + memset(&(data->qsfpPortDataA2[i+48][0]), 0, QSFP_DATA_SIZE); + PCA9553_CLEAR_BIT(data->qsfpPortDataValid[3], i); + } + } + } + else + { + for (i=0; i<6; i++) + { + memset(&(data->qsfpPortDataA0[i+48][0]), 0, QSFP_DATA_SIZE); + memset(&(data->qsfpPortDataA2[i+48][0]), 0, QSFP_DATA_SIZE); + PCA9553_CLEAR_BIT(data->qsfpPortDataValid[3], i); + } + } + + if (isBMCSupport == 0) + step = 8; + else + step = 0; + break; + + case 8: + /* Turn on PCA9548#0 channel 7 on I2C-bus1 */ + ret = i2c_smbus_write_byte(client, (1<frontLedStatus |= 0x00ff; + if (fanErr==0) + data->frontLedStatus &= (~0x0008); /* FAN_LED_G# */ + else + data->frontLedStatus &= (~0x0004); /* FAN_LED_Y# */ + + if ((platformPsuABS&0x01)==0x00) /* PSU1 Present */ + { + if (platformPsuPG&0x08) /* PSU1_PG_LDC Power Goodasserted */ + data->frontLedStatus &= (~0x0002); /* PSU1_LED_G# */ + else + data->frontLedStatus &= (~0x0001); /* PSU1_LED_Y# */ + } + if ((platformPsuABS&0x02)==0x00) /* PSU2 Present */ + { + if (platformPsuPG&0x10) /* PSU2_PG_LDC Power Goodasserted */ + data->frontLedStatus &= (~0x0020); /* PSU2_LED_G# */ + else + data->frontLedStatus &= (~0x0010); /* PSU2_LED_Y# */ + } + + switch (data->systemLedStatus) + { + default: + case 0: /* Booting */ + break; + + case 1: /* Critical*/ + data->frontLedStatus &= (~0x0040); /* SYS_LED_Y# */ + break; + + case 2: /* Normal */ + data->frontLedStatus &= (~0x0080); /* SYS_LED_G# */ + break; + } + + i2c_device_word_write(&(pca9535pwr_client_bus1[2]), PCA9553_COMMAND_BYTE_REG_OUTPUT_PORT_0, data->frontLedStatus); + + /* FAN Status */ + value = i2c_smbus_read_word_data(&(pca9535pwr_client_bus1[0]), PCA9553_COMMAND_BYTE_REG_INPUT_PORT_0); + data->fanAbs[0] = (value&0x4444); + data->fanDir[0] = (value&0x8888); + FanDir = data->fanDir[0]; + + step = 0; + break; + + default: + step = 0; + break; + } + i2c_smbus_write_byte_data(&cpld_client, CPLD_REG_RESET_0x33, 0x00); + i2c_smbus_write_byte_data(&cpld_client, CPLD_REG_RESET_0x33, 0xff); + break; + + case NCIIX_WITH_BMC: + case NCIIX_WITHOUT_BMC: + switch (step) + { + case 0: + /* Turn on PCA9548#1 channel 0 on I2C-bus1 */ + ret = i2c_smbus_write_byte_data(client, 0, (1<frontLedStatus |= 0x00ff; + if (fanErr==0) + data->frontLedStatus &= (~0x0008); /* FAN_LED_G# */ + else + data->frontLedStatus &= (~0x0004); /* FAN_LED_Y# */ + + if ((platformPsuABS&0x01)==0x00) /* PSU1 Present */ + { + if (platformPsuPG&0x08) /* PSU1_PG_LDC Power Goodasserted */ + data->frontLedStatus &= (~0x0002); /* PSU1_LED_G# */ + else + data->frontLedStatus &= (~0x0001); /* PSU1_LED_Y# */ + } + if ((platformPsuABS&0x02)==0x00) /* PSU2 Present */ + { + if (platformPsuPG&0x10) /* PSU2_PG_LDC Power Goodasserted */ + data->frontLedStatus &= (~0x0020); /* PSU2_LED_G# */ + else + data->frontLedStatus &= (~0x0010); /* PSU2_LED_Y# */ + } + + switch (data->systemLedStatus) + { + default: + case 0: /* Booting */ + break; + + case 1: /* Critical*/ + data->frontLedStatus &= (~0x0040); /* SYS_LED_Y# */ + break; + + case 2: /* Normal */ + data->frontLedStatus &= (~0x0080); /* SYS_LED_G# */ + break; + } + + i2c_device_word_write(&(pca9535pwr_client_bus1[2]), PCA9553_COMMAND_BYTE_REG_OUTPUT_PORT_0, data->frontLedStatus); + + i2c_smbus_write_byte_data(client, 0, 0x00); + step = 2; + break; + + case 2: + /* Turn on PCA9548#1 channel 3 on I2C-bus1 */ + ret = i2c_smbus_write_byte_data(client, 0, (1<fanAbs[0] = (value&0x4444); + data->fanDir[0] = (value&0x8888); + FanDir = data->fanDir[0]; + + i2c_smbus_write_byte_data(client, 0, 0x00); + step = 4; + break; + + case 4: + for (i=0; i<54; i++) + { + if (SFPPortAbsStatus[i]) /*present*/ + { + i2c_smbus_write_byte_data(&(pca9548_client[1]), 0, sfpPortData_78F[i].portMaskBitForPCA9548_1); + i2c_smbus_write_byte_data(&(pca9548_client[0]), 0, sfpPortData_78F[i].portMaskBitForPCA9548_2TO5); + if ((SFPPortDataValid[i] == 0)||(i>=48)) + { + ret = qsfpDataRead(&qsfpDataA0_client,qsfpPortData); + if (ret>=0) + { + memcpy(&(data->qsfpPortDataA0[i][0]), qsfpPortData, QSFP_DATA_SIZE); + SFPPortDataValid[i] = 1; + } + } + if (i<48) + { + ret = qsfpDataRead(&qsfpDataA2_client,qsfpPortData); + if (ret>=0) + memcpy(&(data->qsfpPortDataA2[i][0]), qsfpPortData, QSFP_DATA_SIZE); + } + i2c_smbus_write_byte_data(&(pca9548_client[0]), 0, 0x00); + i2c_smbus_write_byte_data(&(pca9548_client[1]), 0, 0x00); + } + else + { + memset(&(data->qsfpPortDataA0[i][0]), 0, QSFP_DATA_SIZE); + memset(&(data->qsfpPortDataA2[i][0]), 0, QSFP_DATA_SIZE); + SFPPortDataValid[i] = 0; + } + } + step = 0; + break; + + default: + step = 0; + break; + } + break; + + case ASTERION_WITH_BMC: + case ASTERION_WITHOUT_BMC: + break; + + default: + break; + } + mutex_unlock(&data->lock); + + if (kthread_should_stop()) + break; + msleep_interruptible(200); + } /* End of while (!kthread_should_stop()) */ + + complete_all(&data->auto_update_stop); + return 0; +} + +static ssize_t show_chip_info(struct device *dev, struct device_attribute *devattr, char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct i2c_bus0_hardware_monitor_data *data = i2c_get_clientdata(client); + return sprintf(buf, "Vender ID = 0x%04X, Chip ID = 0x%04X, Device ID = 0x%04X\n", data->venderId, data->chipId, data->dviceId); +} + +static ssize_t show_board_build_revision(struct device *dev, struct device_attribute *devattr, char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct i2c_bus0_hardware_monitor_data *data = i2c_get_clientdata(client); + return sprintf(buf, "%d\n", data->buildRev); +} + +static ssize_t show_board_hardware_revision(struct device *dev, struct device_attribute *devattr, char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct i2c_bus0_hardware_monitor_data *data = i2c_get_clientdata(client); + return sprintf(buf, "%d\n", data->hwRev); +} + +static ssize_t show_board_model_id(struct device *dev, struct device_attribute *devattr, char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct i2c_bus0_hardware_monitor_data *data = i2c_get_clientdata(client); + return sprintf(buf, "%d\n", data->modelId); +} + +static ssize_t show_cpld_info(struct device *dev, struct device_attribute *devattr, char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct i2c_bus0_hardware_monitor_data *data = i2c_get_clientdata(client); + return sprintf(buf, "CPLD code Revision = 0x%02X, Release Bit = 0x%02X\n", data->cpldRev, data->cpldRel); +} + +static ssize_t show_psu_pg_sen(struct device *dev, struct device_attribute *devattr, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct i2c_client *client = to_i2c_client(dev); + struct i2c_bus0_hardware_monitor_data *data = i2c_get_clientdata(client); + unsigned int value; + + mutex_lock(&data->lock); + value = data->psuPG; + mutex_unlock(&data->lock); + + if (attr->index == 0) + value &= 0x08; + else + value &= 0x10; + return sprintf(buf, "%d\n", value?1:0); +} + +static ssize_t show_psu_abs_sen(struct device *dev, struct device_attribute *devattr, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct i2c_client *client = to_i2c_client(dev); + struct i2c_bus0_hardware_monitor_data *data = i2c_get_clientdata(client); + unsigned int value; + + mutex_lock(&data->lock); + value = data->psuABS; + mutex_unlock(&data->lock); + + if (attr->index == 0) + value &= 0x01; + else + value &= 0x02; + return sprintf(buf, "%d\n", value?0:1); +} + +static ssize_t show_fan_rpm(struct device *dev, struct device_attribute *devattr, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct i2c_client *client = to_i2c_client(dev); + struct i2c_bus0_hardware_monitor_data *data = i2c_get_clientdata(client); + unsigned int fanSpeed = 0; + + if (attr->index < W83795ADG_FAN_COUNT) + fanSpeed = data->fanSpeed[attr->index]; + return sprintf(buf, "%d\n", fanSpeed); +} + +static ssize_t show_fan_duty(struct device *dev, struct device_attribute *devattr, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct i2c_client *client = to_i2c_client(dev); + struct i2c_bus0_hardware_monitor_data *data = i2c_get_clientdata(client); + unsigned int fanDuty = 0; + + if (attr->index < W83795ADG_FAN_COUNT) + fanDuty = ((data->fanDuty*100)/0xff); + return sprintf(buf, "%d\n", fanDuty); +} + +static ssize_t show_remote_temp(struct device *dev, struct device_attribute *devattr, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct i2c_client *client = to_i2c_client(dev); + struct i2c_bus0_hardware_monitor_data *data = i2c_get_clientdata(client); + + if (data->remoteTempIsPositive[attr->index]==1) + return sprintf(buf, "%d.%d\n", data->remoteTempInt[attr->index], data->remoteTempDecimal[attr->index]); + else + return sprintf(buf, "-%d.%d\n", data->remoteTempInt[attr->index], data->remoteTempDecimal[attr->index]); +} + +static ssize_t show_mac_temp(struct device *dev, struct device_attribute *devattr, char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct i2c_bus0_hardware_monitor_data *data = i2c_get_clientdata(client); + + return sprintf(buf, "%d\n", data->macTemp); +} + +static ssize_t set_mac_temp(struct device *dev, struct device_attribute *devattr, const char *buf, + size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + struct i2c_bus0_hardware_monitor_data *data = i2c_get_clientdata(client); + long temp; + + if (kstrtol(buf, 10, &temp)) + return -EINVAL; + + temp = clamp_val(temp, 0, 120); + + mutex_lock(&data->lock); + data->macTemp = temp; + mutex_unlock(&data->lock); + + return count; +} + +static ssize_t show_wd_refresh(struct device *dev, struct device_attribute *devattr, char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct i2c_bus0_hardware_monitor_data *data = i2c_get_clientdata(client); + + return sprintf(buf, "%d\n", data->wdRefreshControlFlag); +} + +static ssize_t set_wd_refresh(struct device *dev, struct device_attribute *devattr, const char *buf, + size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + struct i2c_bus0_hardware_monitor_data *data = i2c_get_clientdata(client); + long temp; + + if (kstrtol(buf, 10, &temp)) + return -EINVAL; + + temp = clamp_val(temp, 0, 1); + + mutex_lock(&data->lock); + data->wdRefreshControlFlag = temp; + mutex_unlock(&data->lock); + + return count; +} + +static ssize_t show_wd_refresh_control(struct device *dev, struct device_attribute *devattr, char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct i2c_bus0_hardware_monitor_data *data = i2c_get_clientdata(client); + + return sprintf(buf, "%d\n", data->wdRefreshControl); +} + +static ssize_t set_wd_refresh_control(struct device *dev, struct device_attribute *devattr, const char *buf, + size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + struct i2c_bus0_hardware_monitor_data *data = i2c_get_clientdata(client); + long temp; + + if (kstrtol(buf, 10, &temp)) + return -EINVAL; + + temp = clamp_val(temp, 0, 1); + + mutex_lock(&data->lock); + data->wdRefreshControl = temp; + mutex_unlock(&data->lock); + + return count; +} + +static ssize_t show_wd_refresh_time(struct device *dev, struct device_attribute *devattr, char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct i2c_bus0_hardware_monitor_data *data = i2c_get_clientdata(client); + + return sprintf(buf, "%d\n", data->wdRefreshTimeSelect); +} + +static ssize_t set_wd_refresh_time(struct device *dev, struct device_attribute *devattr, const char *buf, + size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + struct i2c_bus0_hardware_monitor_data *data = i2c_get_clientdata(client); + long temp; + + if (kstrtol(buf, 10, &temp)) + return -EINVAL; + + temp = clamp_val(temp, 0, 10); + + mutex_lock(&data->lock); + data->wdRefreshTimeSelect = temp; + data->wdRefreshTimeSelectFlag = 1; + mutex_unlock(&data->lock); + + return count; +} + +static ssize_t show_wd_timeout_occurrence(struct device *dev, struct device_attribute *devattr, char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct i2c_bus0_hardware_monitor_data *data = i2c_get_clientdata(client); + + return sprintf(buf, "%d\n", data->wdTimeoutSelect); +} + +static ssize_t set_wd_timeout_occurrence(struct device *dev, struct device_attribute *devattr, const char *buf, + size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + struct i2c_bus0_hardware_monitor_data *data = i2c_get_clientdata(client); + long temp; + + if (kstrtol(buf, 10, &temp)) + return -EINVAL; + + temp = clamp_val(temp, 0, 1); + + mutex_lock(&data->lock); + data->wdTimeoutSelect = temp; + data->wdTimeoutSelectFlag = 1; + mutex_unlock(&data->lock); + + return count; +} + +static ssize_t show_rov(struct device *dev, struct device_attribute *devattr, char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct i2c_bus0_hardware_monitor_data *data = i2c_get_clientdata(client); + + return sprintf(buf, "%d\n", data->rov); +} + +static ssize_t set_rov(struct device *dev, struct device_attribute *devattr, const char *buf, + size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + struct i2c_bus0_hardware_monitor_data *data = i2c_get_clientdata(client); + long rov; + + if (kstrtol(buf, 10, &rov)) + return -EINVAL; + + rov = clamp_val(rov, 0, 16); + + mutex_lock(&data->lock); + switch (data->modelId) + { + case HURACAN_WITH_BMC: + case HURACAN_WITHOUT_BMC: + case ASTERION_WITH_BMC: + case ASTERION_WITHOUT_BMC: + case HURACAN_A_WITH_BMC: + case HURACAN_A_WITHOUT_BMC: + { + /* + - 4'b0000 = 1.2000V -> 0x47 + - 4'b0001 = 1.1750V -> 0x44 + - 4'b0010 = 1.1500V -> 0x42 + - 4'b0011 = 1.1250V -> 0x3f + - 4'b0100 = 1.1000V -> 0x3c + - 4'b0101 = 1.0750V -> 0x39 + - 4'b0110 = 1.0500V -> 0x37 + - 4'b0111 = 1.0250V -> 0x35 + - 4'b1000 = 1.0000V -> 0x33 + - 4'b1001 = 0.9750V -> 0x30 + - 4'b1010 = 0.9500V -> 0x2d + - 4'b1011 = 0.9250V -> 0x2b + - 4'b1100 = 0.9000V -> 0x28 + - 4'b1101 = 0.8750V -> 0x26 + - 4'b1110 = 0.8500V -> 0x23 + - 4'b1111 = 0.8250V -> 0x21 + */ + const unsigned short ROVtranslate[]= {0x47,0x44,0x42,0x3f,0x3c,0x39,0x37,0x35,0x33,0x30,0x2d,0x2b,0x28,0x26,0x23,0x21}; + + rov &= 0xf; + /* In "56960-DS111-RDS.pdf" page 58, the voltage range of BCM56960 for power supply is 0.95V to 1.025V. */ + if (rov<7) rov = 7; + + /* set rov to VOUT_COMMAND register */ + i2c_smbus_write_word_data(&mp2953agu_client, 0x21, ROVtranslate[rov]); + } + break; + + case SESTO_WITH_BMC: + case SESTO_WITHOUT_BMC: + { + /* + - 4'b0000 = 1.2000V -> 0x47 + - 4'b0001 = 1.1750V -> 0x44 + - 4'b0010 = 1.1500V -> 0x42 + - 4'b0011 = 1.1250V -> 0x3e + - 4'b0100 = 1.1000V -> 0x3c + - 4'b0101 = 1.0750V -> 0x39 + - 4'b0110 = 1.0500V -> 0x37 + - 4'b0111 = 1.0250V -> 0x34 + - 4'b1000 = 1.0000V -> 0x32 + - 4'b1001 = 0.9750V -> 0x2f + - 4'b1010 = 0.9500V -> 0x2d + - 4'b1011 = 0.9250V -> 0x2b + - 4'b1100 = 0.9000V -> 0x28 + - 4'b1101 = 0.8750V -> 0x26 + - 4'b1110 = 0.8500V -> 0x23 + - 4'b1111 = 0.8250V -> 0x21 + */ + const unsigned short ROVtranslate[]= {0x47,0x44,0x42,0x3e,0x3c,0x39,0x37,0x34,0x32,0x2f,0x2d,0x2b,0x28,0x26,0x23,0x21}; + + rov &= 0xf; + /* In "56960-DS111-RDS.pdf" page 58, the voltage range of BCM56960 for power supply is 0.95V to 1.025V. */ + if (rov<7) rov = 7; + + /* set rov to VOUT_COMMAND register */ + i2c_smbus_write_word_data(&mp2953agu_client, 0x21, ROVtranslate[rov]); + } + break; + + case NCIIX_WITH_BMC: + case NCIIX_WITHOUT_BMC: + { + /* + - 3'b000 = 1.025V -> 0x9C + - 3'b001 = 1.025V -> 0x9C + - 3'b010 = 0.95V -> 0x8D + - 3'b011 = RESV + - 3'b100 = RESV + - 3'b101 = RESV + - 3'b110 = RESV + - 3'b111 = RESV + */ + char getValue = 0; + char loop1_flag = 0; + const char ROVtranslate[]= {CHL8325_VID_DEFAULT,CHL8325_VID0,CHL8325_VID1}; + + rov &= 0xf; + /* In "56750_56850-PR103-RDS.pdf" page 926, 3b011 ~ 3'b111 are reserved. */ + if (rov>2) rov = 0; + + /* Turn on PCA9548#0 channel 0 on I2C-bus0 */ + i2c_smbus_write_byte_data(&pca9548_client_bus0, 0, 0x01); + + /* Step 1. Disable LOOP1_VID */ + /* Get D0 register value */ + getValue = i2c_smbus_read_byte_data(&chl8325a_client, LOOP1_VID_OVERRIDE_ENABLE_REG); + /* Disable CHL8325A PWM controller Loop1 */ + loop1_flag = getValue & (~CHL8325_LOOP1_Enable); + i2c_smbus_write_byte_data(&chl8325a_client, LOOP1_VID_OVERRIDE_ENABLE_REG, loop1_flag); + + /* Step 2. Config CHL8325A PWM controller */ + i2c_smbus_write_byte_data(&chl8325a_client, LOOP1_OVERRIDE_VID_SETTING_REG, ROVtranslate[rov]); + + /* Step 3. Get D0 register value */ + getValue = i2c_smbus_read_byte_data(&chl8325a_client, LOOP1_VID_OVERRIDE_ENABLE_REG); + + /* Step 4. Config CHL8325A PWM controller Loop1 */ + loop1_flag = getValue | CHL8325_LOOP1_Enable; + i2c_smbus_write_byte_data(&chl8325a_client, LOOP1_VID_OVERRIDE_ENABLE_REG, loop1_flag); + + i2c_smbus_write_byte(&pca9548_client_bus0, 0x00); + } + break; + + default: + break; + } + data->rov = rov; + mutex_unlock(&data->lock); + + return count; +} + +static ssize_t show_voltage_sen(struct device *dev, struct device_attribute *devattr, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct i2c_client *client = to_i2c_client(dev); + struct i2c_bus0_hardware_monitor_data *data = i2c_get_clientdata(client); + unsigned int MNTVSEN, MNTV; + unsigned int voltage; + + mutex_lock(&data->lock); + MNTVSEN = data->vSen[attr->index]; + MNTV = data->vSenLsb[attr->index]; + mutex_unlock(&data->lock); + + voltage = ((MNTVSEN << 2) + ((MNTV & 0xC0) >> 6)); + voltage *= ((2*VOL_MONITOR_UNIT)/VOL_MONITOR_UNIT); + + return sprintf(buf, "%d.%03d\n", (voltage/VOL_MONITOR_UNIT), (voltage%VOL_MONITOR_UNIT)); +} + +static DEVICE_ATTR(mac_temp, S_IWUSR | S_IRUGO, show_mac_temp, set_mac_temp); +static DEVICE_ATTR(chip_info, S_IRUGO, show_chip_info, NULL); +static DEVICE_ATTR(board_build_rev, S_IRUGO, show_board_build_revision, NULL); +static DEVICE_ATTR(board_hardware_rev, S_IRUGO, show_board_hardware_revision, NULL); +static DEVICE_ATTR(board_model_id, S_IRUGO, show_board_model_id, NULL); +static DEVICE_ATTR(cpld_info, S_IRUGO, show_cpld_info, NULL); +static DEVICE_ATTR(wd_refresh, S_IWUSR | S_IRUGO, show_wd_refresh, set_wd_refresh); +static DEVICE_ATTR(wd_refresh_control, S_IWUSR | S_IRUGO, show_wd_refresh_control, set_wd_refresh_control); +static DEVICE_ATTR(wd_refresh_time, S_IWUSR | S_IRUGO, show_wd_refresh_time, set_wd_refresh_time); +static DEVICE_ATTR(wd_timeout_occurrence, S_IWUSR | S_IRUGO, show_wd_timeout_occurrence, set_wd_timeout_occurrence); +static DEVICE_ATTR(rov, S_IWUSR | S_IRUGO, show_rov, set_rov); + +static SENSOR_DEVICE_ATTR(psu1_pg, S_IRUGO, show_psu_pg_sen, NULL, 0); +static SENSOR_DEVICE_ATTR(psu2_pg, S_IRUGO, show_psu_pg_sen, NULL, 1); +static SENSOR_DEVICE_ATTR(psu1_abs, S_IRUGO, show_psu_abs_sen, NULL, 0); +static SENSOR_DEVICE_ATTR(psu2_abs, S_IRUGO, show_psu_abs_sen, NULL, 1); + +static SENSOR_DEVICE_ATTR(fan1_rpm, S_IRUGO, show_fan_rpm, NULL, 0); +static SENSOR_DEVICE_ATTR(fan2_rpm, S_IRUGO, show_fan_rpm, NULL, 1); +static SENSOR_DEVICE_ATTR(fan3_rpm, S_IRUGO, show_fan_rpm, NULL, 2); +static SENSOR_DEVICE_ATTR(fan4_rpm, S_IRUGO, show_fan_rpm, NULL, 3); +static SENSOR_DEVICE_ATTR(fan5_rpm, S_IRUGO, show_fan_rpm, NULL, 4); +static SENSOR_DEVICE_ATTR(fan6_rpm, S_IRUGO, show_fan_rpm, NULL, 5); +static SENSOR_DEVICE_ATTR(fan7_rpm, S_IRUGO, show_fan_rpm, NULL, 6); +static SENSOR_DEVICE_ATTR(fan8_rpm, S_IRUGO, show_fan_rpm, NULL, 7); +static SENSOR_DEVICE_ATTR(fan9_rpm, S_IRUGO, show_fan_rpm, NULL, 8); +static SENSOR_DEVICE_ATTR(fan10_rpm, S_IRUGO, show_fan_rpm, NULL, 9); + +static SENSOR_DEVICE_ATTR(fan1_duty, S_IRUGO, show_fan_duty, NULL, 0); +static SENSOR_DEVICE_ATTR(fan2_duty, S_IRUGO, show_fan_duty, NULL, 1); +static SENSOR_DEVICE_ATTR(fan3_duty, S_IRUGO, show_fan_duty, NULL, 2); +static SENSOR_DEVICE_ATTR(fan4_duty, S_IRUGO, show_fan_duty, NULL, 3); +static SENSOR_DEVICE_ATTR(fan5_duty, S_IRUGO, show_fan_duty, NULL, 4); +static SENSOR_DEVICE_ATTR(fan6_duty, S_IRUGO, show_fan_duty, NULL, 5); +static SENSOR_DEVICE_ATTR(fan7_duty, S_IRUGO, show_fan_duty, NULL, 6); +static SENSOR_DEVICE_ATTR(fan8_duty, S_IRUGO, show_fan_duty, NULL, 7); +static SENSOR_DEVICE_ATTR(fan9_duty, S_IRUGO, show_fan_duty, NULL, 8); +static SENSOR_DEVICE_ATTR(fan10_duty, S_IRUGO, show_fan_duty, NULL, 9); + +static SENSOR_DEVICE_ATTR(remote_temp1, S_IRUGO, show_remote_temp, NULL, 0); +static SENSOR_DEVICE_ATTR(remote_temp2, S_IRUGO, show_remote_temp, NULL, 1); + +static SENSOR_DEVICE_ATTR(vsen1, S_IRUGO, show_voltage_sen, NULL, 0); +static SENSOR_DEVICE_ATTR(vsen2, S_IRUGO, show_voltage_sen, NULL, 1); +static SENSOR_DEVICE_ATTR(vsen3, S_IRUGO, show_voltage_sen, NULL, 2); +static SENSOR_DEVICE_ATTR(vsen4, S_IRUGO, show_voltage_sen, NULL, 3); +static SENSOR_DEVICE_ATTR(vsen5, S_IRUGO, show_voltage_sen, NULL, 4); +static SENSOR_DEVICE_ATTR(vsen7, S_IRUGO, show_voltage_sen, NULL, 6); + + static struct attribute *i2c_bus0_hardware_monitor_attr[] = { + &dev_attr_mac_temp.attr, + &dev_attr_chip_info.attr, + &dev_attr_board_build_rev.attr, + &dev_attr_board_hardware_rev.attr, + &dev_attr_board_model_id.attr, + &dev_attr_cpld_info.attr, + &dev_attr_wd_refresh.attr, + &dev_attr_wd_refresh_control.attr, + &dev_attr_wd_refresh_time.attr, + &dev_attr_wd_timeout_occurrence.attr, + &dev_attr_rov.attr, + + &sensor_dev_attr_psu1_pg.dev_attr.attr, + &sensor_dev_attr_psu2_pg.dev_attr.attr, + &sensor_dev_attr_psu1_abs.dev_attr.attr, + &sensor_dev_attr_psu2_abs.dev_attr.attr, + + &sensor_dev_attr_fan1_rpm.dev_attr.attr, + &sensor_dev_attr_fan2_rpm.dev_attr.attr, + &sensor_dev_attr_fan3_rpm.dev_attr.attr, + &sensor_dev_attr_fan4_rpm.dev_attr.attr, + &sensor_dev_attr_fan5_rpm.dev_attr.attr, + &sensor_dev_attr_fan6_rpm.dev_attr.attr, + &sensor_dev_attr_fan7_rpm.dev_attr.attr, + &sensor_dev_attr_fan8_rpm.dev_attr.attr, + + &sensor_dev_attr_fan1_duty.dev_attr.attr, + &sensor_dev_attr_fan2_duty.dev_attr.attr, + &sensor_dev_attr_fan3_duty.dev_attr.attr, + &sensor_dev_attr_fan4_duty.dev_attr.attr, + &sensor_dev_attr_fan5_duty.dev_attr.attr, + &sensor_dev_attr_fan6_duty.dev_attr.attr, + &sensor_dev_attr_fan7_duty.dev_attr.attr, + &sensor_dev_attr_fan8_duty.dev_attr.attr, + + &sensor_dev_attr_remote_temp1.dev_attr.attr, + &sensor_dev_attr_remote_temp2.dev_attr.attr, + + &sensor_dev_attr_vsen1.dev_attr.attr, + &sensor_dev_attr_vsen2.dev_attr.attr, + &sensor_dev_attr_vsen3.dev_attr.attr, + &sensor_dev_attr_vsen4.dev_attr.attr, + + NULL +}; + + static struct attribute *i2c_bus0_hardware_monitor_attr_asterion[] = { + &dev_attr_mac_temp.attr, + &dev_attr_chip_info.attr, + &dev_attr_board_build_rev.attr, + &dev_attr_board_hardware_rev.attr, + &dev_attr_board_model_id.attr, + &dev_attr_cpld_info.attr, + &dev_attr_wd_refresh.attr, + &dev_attr_wd_refresh_control.attr, + &dev_attr_wd_refresh_time.attr, + &dev_attr_wd_timeout_occurrence.attr, + &dev_attr_rov.attr, + + &sensor_dev_attr_psu1_pg.dev_attr.attr, + &sensor_dev_attr_psu2_pg.dev_attr.attr, + &sensor_dev_attr_psu1_abs.dev_attr.attr, + &sensor_dev_attr_psu2_abs.dev_attr.attr, + + &sensor_dev_attr_fan1_rpm.dev_attr.attr, + &sensor_dev_attr_fan2_rpm.dev_attr.attr, + &sensor_dev_attr_fan3_rpm.dev_attr.attr, + &sensor_dev_attr_fan4_rpm.dev_attr.attr, + &sensor_dev_attr_fan5_rpm.dev_attr.attr, + &sensor_dev_attr_fan6_rpm.dev_attr.attr, + &sensor_dev_attr_fan7_rpm.dev_attr.attr, + &sensor_dev_attr_fan8_rpm.dev_attr.attr, + &sensor_dev_attr_fan9_rpm.dev_attr.attr, + &sensor_dev_attr_fan10_rpm.dev_attr.attr, + + &sensor_dev_attr_fan1_duty.dev_attr.attr, + &sensor_dev_attr_fan2_duty.dev_attr.attr, + &sensor_dev_attr_fan3_duty.dev_attr.attr, + &sensor_dev_attr_fan4_duty.dev_attr.attr, + &sensor_dev_attr_fan5_duty.dev_attr.attr, + &sensor_dev_attr_fan6_duty.dev_attr.attr, + &sensor_dev_attr_fan7_duty.dev_attr.attr, + &sensor_dev_attr_fan8_duty.dev_attr.attr, + &sensor_dev_attr_fan9_duty.dev_attr.attr, + &sensor_dev_attr_fan10_duty.dev_attr.attr, + + &sensor_dev_attr_remote_temp1.dev_attr.attr, + &sensor_dev_attr_remote_temp2.dev_attr.attr, + + &sensor_dev_attr_vsen1.dev_attr.attr, + &sensor_dev_attr_vsen2.dev_attr.attr, + &sensor_dev_attr_vsen3.dev_attr.attr, + &sensor_dev_attr_vsen4.dev_attr.attr, + + NULL +}; + + static struct attribute *i2c_bus0_hardware_monitor_attr_nc2x[] = { + &dev_attr_mac_temp.attr, + &dev_attr_chip_info.attr, + &dev_attr_board_build_rev.attr, + &dev_attr_board_hardware_rev.attr, + &dev_attr_board_model_id.attr, + &dev_attr_cpld_info.attr, + &dev_attr_wd_refresh.attr, + &dev_attr_wd_refresh_control.attr, + &dev_attr_wd_refresh_time.attr, + &dev_attr_wd_timeout_occurrence.attr, + &dev_attr_rov.attr, + + &sensor_dev_attr_psu1_pg.dev_attr.attr, + &sensor_dev_attr_psu2_pg.dev_attr.attr, + &sensor_dev_attr_psu1_abs.dev_attr.attr, + &sensor_dev_attr_psu2_abs.dev_attr.attr, + + &sensor_dev_attr_fan1_rpm.dev_attr.attr, + &sensor_dev_attr_fan2_rpm.dev_attr.attr, + &sensor_dev_attr_fan3_rpm.dev_attr.attr, + &sensor_dev_attr_fan4_rpm.dev_attr.attr, + &sensor_dev_attr_fan5_rpm.dev_attr.attr, + &sensor_dev_attr_fan6_rpm.dev_attr.attr, + &sensor_dev_attr_fan7_rpm.dev_attr.attr, + &sensor_dev_attr_fan8_rpm.dev_attr.attr, + + &sensor_dev_attr_fan1_duty.dev_attr.attr, + &sensor_dev_attr_fan2_duty.dev_attr.attr, + &sensor_dev_attr_fan3_duty.dev_attr.attr, + &sensor_dev_attr_fan4_duty.dev_attr.attr, + &sensor_dev_attr_fan5_duty.dev_attr.attr, + &sensor_dev_attr_fan6_duty.dev_attr.attr, + &sensor_dev_attr_fan7_duty.dev_attr.attr, + &sensor_dev_attr_fan8_duty.dev_attr.attr, + + &sensor_dev_attr_remote_temp1.dev_attr.attr, + &sensor_dev_attr_remote_temp2.dev_attr.attr, + + &sensor_dev_attr_vsen1.dev_attr.attr, + &sensor_dev_attr_vsen4.dev_attr.attr, + &sensor_dev_attr_vsen5.dev_attr.attr, + &sensor_dev_attr_vsen7.dev_attr.attr, + + NULL +}; + +static ssize_t show_port_abs(struct device *dev, struct device_attribute *devattr, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct i2c_bus1_hardware_monitor_data *data = i2c_get_clientdata(&(pca9535pwr_client_bus1[0])); + int rc = 0; + + switch(platformModelId) + { + case NCIIX_WITH_BMC: + case NCIIX_WITHOUT_BMC: + rc = ((SFPPortAbsStatus[attr->index]==1)&&(SFPPortDataValid[attr->index]==1)); + break; + + default: + { + unsigned short qsfpPortAbs=0, index=0, bit=0; + unsigned short qsfpPortDataValid=0; + + index = (attr->index/16); + bit = (attr->index%16); + mutex_lock(&data->lock); + qsfpPortAbs = data->qsfpPortAbsStatus[index]; + qsfpPortDataValid = data->qsfpPortDataValid[index]; + mutex_unlock(&data->lock); + rc = ((PCA9553_TEST_BIT(qsfpPortAbs, bit)?0:1)&&(PCA9553_TEST_BIT(qsfpPortDataValid, bit))); + } + break; + } + + return sprintf(buf, "%d\n", rc); +} + +static ssize_t show_port_rxlos(struct device *dev, struct device_attribute *devattr, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct i2c_bus1_hardware_monitor_data *data = i2c_get_clientdata(&(pca9535pwr_client_bus1[0])); + int rc = 0; + + switch(platformModelId) + { + case NCIIX_WITH_BMC: + case NCIIX_WITHOUT_BMC: + rc = (SFPPortRxLosStatus[attr->index]?0:1); + break; + + case SESTO_WITH_BMC: + case SESTO_WITHOUT_BMC: + { + unsigned short qsfpPortRxLos=0, index=0, bit=0; + + index = (attr->index/16); + bit = (attr->index%16); + mutex_lock(&data->lock); + qsfpPortRxLos = data->sfpPortRxLosStatus[index]; + mutex_unlock(&data->lock); + rc = (PCA9553_TEST_BIT(qsfpPortRxLos, bit)?1:0); + } + break; + + default: + break; + } + + return sprintf(buf, "%d\n", rc); +} + +static ssize_t show_port_data_a0(struct device *dev, struct device_attribute *devattr, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct i2c_client *client = to_i2c_client(dev); + struct i2c_bus1_hardware_monitor_data *data = i2c_get_clientdata(client); + unsigned char qsfpPortData[QSFP_DATA_SIZE]; + ssize_t count = 0; + + memset(qsfpPortData, 0, QSFP_DATA_SIZE); + mutex_lock(&data->lock); + memcpy(qsfpPortData, &(data->qsfpPortDataA0[attr->index][0]), QSFP_DATA_SIZE); + mutex_unlock(&data->lock); +#if 0 +{ + unsigned int index; + char str[8]; + + count = 0; + for (index=0; indexlock); + memcpy(qsfpPortData, &(data->qsfpPortDataA2[attr->index][0]), QSFP_DATA_SIZE); + mutex_unlock(&data->lock); +#if 0 +{ + unsigned int index; + char str[8]; + + count = 0; + for (index=0; indexindex<4) + { + mutex_lock(&data->lock); + value = (unsigned int)data->fanAbs[0]; + mutex_unlock(&data->lock); + index = attr->index; + } + else + { + mutex_lock(&data->lock); + value = (unsigned int)data->fanAbs[1]; + mutex_unlock(&data->lock); + index = (attr->index-3); + } + value &= (0x0004<<(index*4)); + return sprintf(buf, "%d\n", value?0:1); +} + +static ssize_t show_fan_dir(struct device *dev, struct device_attribute *devattr, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct i2c_client *client = to_i2c_client(dev); + struct i2c_bus1_hardware_monitor_data *data = i2c_get_clientdata(client); + unsigned int value = 0; + unsigned int index = 0; + + if (attr->index<4) + { + mutex_lock(&data->lock); + value = (unsigned int)data->fanDir[0]; + mutex_unlock(&data->lock); + index = attr->index; + } + else + { + mutex_lock(&data->lock); + value = (unsigned int)data->fanDir[1]; + mutex_unlock(&data->lock); + index = (attr->index-3); + } + value &= (0x0004<<(index*4)); + return sprintf(buf, "%d\n", value?0:1); +} + +static ssize_t show_eeprom(struct device *dev, struct device_attribute *devattr, char *buf) +{ + unsigned char eepromData[EEPROM_DATA_SIZE]; + ssize_t count = 0; + unsigned int index; + char str[8]; + int ret = 0; + + memset(eepromData, 0, EEPROM_DATA_SIZE); + switch(platformModelId) + { + case HURACAN_WITH_BMC: + case HURACAN_WITHOUT_BMC: + case HURACAN_A_WITH_BMC: + case HURACAN_A_WITHOUT_BMC: + { + struct i2c_client *client = to_i2c_client(dev); + struct i2c_bus1_hardware_monitor_data *data = i2c_get_clientdata(client); + + mutex_lock(&data->lock); + /* Turn on PCA9548 channel 7 on I2C-bus1 */ + i2c_smbus_write_byte(client, 0x80); + i2c_smbus_write_byte_data(&eeprom_client, 0x00, 0x00); + ret = eepromDataRead(&eeprom_client, &(eepromData[0])); + i2c_smbus_write_byte(client, 0x00); + mutex_unlock(&data->lock); + } + break; + + case CABRERAIII_WITH_BMC: + case CABRERAIII_WITHOUT_BMC: + break; + + case SESTO_WITH_BMC: + case SESTO_WITHOUT_BMC: + { + struct i2c_client *client = to_i2c_client(dev); + struct i2c_bus1_hardware_monitor_data *data = i2c_get_clientdata(client); + + mutex_lock(&data->lock); + /* Turn on PCA9548#1 channel 7 on I2C-bus1 */ + i2c_smbus_write_byte(&(pca9548_client[1]), 0x80); + i2c_smbus_write_byte_data(&eeprom_client, 0x00, 0x00); + ret = eepromDataRead(&eeprom_client, &(eepromData[0])); + i2c_smbus_write_byte(&(pca9548_client[1]), 0x00); + mutex_unlock(&data->lock); + } + break; + + case NCIIX_WITH_BMC: + case NCIIX_WITHOUT_BMC: + { + if ((platformBuildRev == 0x01)&&(platformHwRev == 0x03)) /* PVT */ + { + struct i2c_client *client = to_i2c_client(dev); + struct i2c_bus1_hardware_monitor_data *data = i2c_get_clientdata(client); + + mutex_lock(&data->lock); + /* Turn on PCA9548#1 channel 2 on I2C-bus1 */ + i2c_smbus_write_byte(client, 0x04); + i2c_smbus_write_byte_data(&eeprom_client_2, 0x00, 0x00); + ret = eepromDataRead(&eeprom_client_2, &(eepromData[0])); + i2c_smbus_write_byte(client, 0x00); + mutex_unlock(&data->lock); + } + else + { + struct i2c_bus0_hardware_monitor_data *data = i2c_get_clientdata(&eeprom_client_bus0); + + mutex_lock(&data->lock); + i2c_smbus_write_byte_data(&eeprom_client_bus0, 0x00, 0x00); + ret = eepromDataRead(&eeprom_client_bus0, &(eepromData[0])); + mutex_unlock(&data->lock); + } + } + break; + + case ASTERION_WITH_BMC: + case ASTERION_WITHOUT_BMC: + { + struct i2c_client *client = to_i2c_client(dev); + struct i2c_bus1_hardware_monitor_data *data = i2c_get_clientdata(client); + + mutex_lock(&data->lock); + /* Turn on PCA9548 channel 5 on I2C-bus1 */ + i2c_smbus_write_byte(client, 0x20); + i2c_smbus_write_byte_data(&eeprom_client, 0x00, 0x00); + ret = eepromDataRead(&eeprom_client, &(eepromData[0])); + i2c_smbus_write_byte(client, 0x00); + mutex_unlock(&data->lock); + } + break; + + default: + break; + } + if (ret < 0) + memset(eepromData, 0, EEPROM_DATA_SIZE); +#if 1 + count = 0; + for (index=0; indexindex&0x1); + if (index&0x01) /* PSU 2 */ + { + if ((platformPsuABS&0x02)==0x00) /* PSU2 Present */ + psu_present = 1; + } + else /* PSU 1 */ + { + if ((platformPsuABS&0x01)==0x00) /* PSU1 Present */ + psu_present = 1; + } + memset(eepromData, 0, EEPROM_DATA_SIZE); + if (psu_present == 1) + { + switch(platformModelId) + { + case HURACAN_WITH_BMC: + case HURACAN_WITHOUT_BMC: + case ASTERION_WITH_BMC: + case ASTERION_WITHOUT_BMC: + case HURACAN_A_WITH_BMC: + case HURACAN_A_WITHOUT_BMC: + { + mutex_lock(&data->lock); + if (index) + /* Turn on PCA9548 channel 7 on I2C-bus1 */ + i2c_smbus_write_byte(client, 0x80); + else + /* Turn on PCA9548 channel 6 on I2C-bus1 */ + i2c_smbus_write_byte(client, 0x40); + ret = qsfpDataRead(&psu_eeprom_client, &(eepromData[0])); + i2c_smbus_write_byte(client, 0x00); + mutex_unlock(&data->lock); + } + break; + + case CABRERAIII_WITH_BMC: + case CABRERAIII_WITHOUT_BMC: + break; + + case SESTO_WITH_BMC: + case SESTO_WITHOUT_BMC: + { + mutex_lock(&data->lock); + if (index) + /* Turn on PCA9548#1 channel 7 on I2C-bus1 */ + i2c_smbus_write_byte(&(pca9548_client[1]), 0x80); + else + /* Turn on PCA9548#1 channel 6 on I2C-bus1 */ + i2c_smbus_write_byte(&(pca9548_client[1]), 0x40); + ret = qsfpDataRead(&psu_eeprom_client, &(eepromData[0])); + i2c_smbus_write_byte(&(pca9548_client[1]), 0x00); + mutex_unlock(&data->lock); + } + break; + + case NCIIX_WITH_BMC: + case NCIIX_WITHOUT_BMC: + { + struct i2c_bus0_hardware_monitor_data *data_bus0 = i2c_get_clientdata(&psu_eeprom_client_bus0); + + mutex_lock(&data_bus0->lock); + if (index) + /* Turn on PCA9548#0 channel 2 on I2C-bus0 */ + i2c_smbus_write_byte(&pca9548_client_bus0, 0x04); + else + /* Turn on PCA9548#0 channel 1 on I2C-bus0 */ + i2c_smbus_write_byte(&pca9548_client_bus0, 0x02); + ret = qsfpDataRead(&psu_eeprom_client_bus0, &(eepromData[0])); + i2c_smbus_write_byte(&pca9548_client_bus0, 0x00); + mutex_unlock(&data_bus0->lock); + } + break; + + default: + break; + } + if (ret < 0) + memset(eepromData, 0, EEPROM_DATA_SIZE); + } +#if 1 + count = 0; + for (index=0; indexindex&0x1); + if (index&0x01) /* PSU 2 */ + { + if ((platformPsuABS&0x02)==0x00) /* PSU2 Present */ + psu_present = 1; + } + else /* PSU 1 */ + { + if ((platformPsuABS&0x01)==0x00) /* PSU1 Present */ + psu_present = 1; + } + if (psu_present == 1) + { + switch(platformModelId) + { + case HURACAN_WITH_BMC: + case HURACAN_WITHOUT_BMC: + case ASTERION_WITH_BMC: + case ASTERION_WITHOUT_BMC: + case HURACAN_A_WITH_BMC: + case HURACAN_A_WITHOUT_BMC: + { + mutex_lock(&data->lock); + if (index) + /* Turn on PCA9548 channel 7 on I2C-bus1 */ + i2c_smbus_write_byte(client, 0x80); + else + /* Turn on PCA9548 channel 6 on I2C-bus1 */ + i2c_smbus_write_byte(client, 0x40); + valueN = i2c_smbus_read_byte_data(&psu_mcu_client, 0x20); + valueV = (unsigned int)i2c_smbus_read_word_data(&psu_mcu_client, 0x8B); + i2c_smbus_write_byte(client, 0x00); + mutex_unlock(&data->lock); + } + break; + + case CABRERAIII_WITH_BMC: + case CABRERAIII_WITHOUT_BMC: + break; + + case SESTO_WITH_BMC: + case SESTO_WITHOUT_BMC: + { + mutex_lock(&data->lock); + if (index) + /* Turn on PCA9548#1 channel 7 on I2C-bus1 */ + i2c_smbus_write_byte(&(pca9548_client[1]), 0x80); + else + /* Turn on PCA9548#1 channel 6 on I2C-bus1 */ + i2c_smbus_write_byte(&(pca9548_client[1]), 0x40); + valueN = i2c_smbus_read_byte_data(&psu_mcu_client, 0x20); + valueV = (unsigned int)i2c_smbus_read_word_data(&psu_mcu_client, 0x8B); + i2c_smbus_write_byte(&(pca9548_client[1]), 0x00); + mutex_unlock(&data->lock); + } + break; + + case NCIIX_WITH_BMC: + case NCIIX_WITHOUT_BMC: + { + struct i2c_bus0_hardware_monitor_data *data_bus0 = i2c_get_clientdata(&psu_eeprom_client_bus0); + + mutex_lock(&data_bus0->lock); + if (index) + /* Turn on PCA9548#0 channel 2 on I2C-bus0 */ + i2c_smbus_write_byte(&pca9548_client_bus0, 0x04); + else + /* Turn on PCA9548#0 channel 1 on I2C-bus0 */ + i2c_smbus_write_byte(&pca9548_client_bus0, 0x02); + valueN = i2c_smbus_read_byte_data(&psu_mcu_client_bus0, 0x20); + valueV = (unsigned int)i2c_smbus_read_word_data(&psu_mcu_client_bus0, 0x8B); + i2c_smbus_write_byte(&pca9548_client_bus0, 0x00); + mutex_unlock(&data_bus0->lock); + } + break; + + default: + break; + } + if (valueN & 0x10) + { + valueN = 0xF0 + (valueN & 0x0F); + valueN = (~valueN) +1; + temp = (unsigned int)(1<index&0x1); + if (index&0x01) /* PSU 2 */ + { + if ((platformPsuABS&0x02)==0x00) /* PSU2 Present */ + psu_present = 1; + } + else /* PSU 1 */ + { + if ((platformPsuABS&0x01)==0x00) /* PSU1 Present */ + psu_present = 1; + } + if (psu_present == 1) + { + switch(platformModelId) + { + case HURACAN_WITH_BMC: + case HURACAN_WITHOUT_BMC: + case ASTERION_WITH_BMC: + case ASTERION_WITHOUT_BMC: + case HURACAN_A_WITH_BMC: + case HURACAN_A_WITHOUT_BMC: + { + mutex_lock(&data->lock); + if (index) + /* Turn on PCA9548 channel 7 on I2C-bus1 */ + i2c_smbus_write_byte(client, 0x80); + else + /* Turn on PCA9548 channel 6 on I2C-bus1 */ + i2c_smbus_write_byte(client, 0x40); + value = i2c_smbus_read_word_data(&psu_mcu_client, 0x8C); + i2c_smbus_write_byte(client, 0x00); + mutex_unlock(&data->lock); + } + break; + + case CABRERAIII_WITH_BMC: + case CABRERAIII_WITHOUT_BMC: + break; + + case SESTO_WITH_BMC: + case SESTO_WITHOUT_BMC: + { + mutex_lock(&data->lock); + if (index) + /* Turn on PCA9548#1 channel 7 on I2C-bus1 */ + i2c_smbus_write_byte(&(pca9548_client[1]), 0x80); + else + /* Turn on PCA9548#1 channel 6 on I2C-bus1 */ + i2c_smbus_write_byte(&(pca9548_client[1]), 0x40); + value = i2c_smbus_read_word_data(&psu_mcu_client, 0x8C); + i2c_smbus_write_byte(&(pca9548_client[1]), 0x00); + mutex_unlock(&data->lock); + } + break; + + case NCIIX_WITH_BMC: + case NCIIX_WITHOUT_BMC: + { + struct i2c_bus0_hardware_monitor_data *data_bus0 = i2c_get_clientdata(&psu_eeprom_client_bus0); + + mutex_lock(&data_bus0->lock); + if (index) + /* Turn on PCA9548#0 channel 2 on I2C-bus0 */ + i2c_smbus_write_byte(&pca9548_client_bus0, 0x04); + else + /* Turn on PCA9548#0 channel 1 on I2C-bus0 */ + i2c_smbus_write_byte(&pca9548_client_bus0, 0x02); + value = i2c_smbus_read_word_data(&psu_mcu_client_bus0, 0x8C); + i2c_smbus_write_byte(&pca9548_client_bus0, 0x00); + mutex_unlock(&data_bus0->lock); + } + break; + + default: + break; + } + valueY = (value & 0x07FF); + if ((value & 0x8000)&&(valueY)) + { + valueN = 0xF0 + (((value) >> 11) & 0x0F); + valueN = (~valueN) +1; + temp = (unsigned int)(1<> 11) & 0x0F); + count = sprintf(buf, "%d\n", (valueY*(1<index&0x1); + if (index&0x01) /* PSU 2 */ + { + if ((platformPsuABS&0x02)==0x00) /* PSU2 Present */ + psu_present = 1; + } + else /* PSU 1 */ + { + if ((platformPsuABS&0x01)==0x00) /* PSU1 Present */ + psu_present = 1; + } + if (psu_present == 1) + { + switch(platformModelId) + { + case HURACAN_WITH_BMC: + case HURACAN_WITHOUT_BMC: + case ASTERION_WITH_BMC: + case ASTERION_WITHOUT_BMC: + case HURACAN_A_WITH_BMC: + case HURACAN_A_WITHOUT_BMC: + { + mutex_lock(&data->lock); + if (index) + /* Turn on PCA9548 channel 7 on I2C-bus1 */ + i2c_smbus_write_byte(client, 0x80); + else + /* Turn on PCA9548 channel 6 on I2C-bus1 */ + i2c_smbus_write_byte(client, 0x40); + value = i2c_smbus_read_word_data(&psu_mcu_client, 0x8D); + i2c_smbus_write_byte(client, 0x00); + mutex_unlock(&data->lock); + } + break; + + case CABRERAIII_WITH_BMC: + case CABRERAIII_WITHOUT_BMC: + break; + + case SESTO_WITH_BMC: + case SESTO_WITHOUT_BMC: + { + mutex_lock(&data->lock); + if (index) + /* Turn on PCA9548#1 channel 7 on I2C-bus1 */ + i2c_smbus_write_byte(&(pca9548_client[1]), 0x80); + else + /* Turn on PCA9548#1 channel 6 on I2C-bus1 */ + i2c_smbus_write_byte(&(pca9548_client[1]), 0x40); + value = i2c_smbus_read_word_data(&psu_mcu_client, 0x8D); + i2c_smbus_write_byte(&(pca9548_client[1]), 0x00); + mutex_unlock(&data->lock); + } + break; + + case NCIIX_WITH_BMC: + case NCIIX_WITHOUT_BMC: + { + struct i2c_bus0_hardware_monitor_data *data_bus0 = i2c_get_clientdata(&psu_eeprom_client_bus0); + + mutex_lock(&data_bus0->lock); + if (index) + /* Turn on PCA9548#0 channel 2 on I2C-bus0 */ + i2c_smbus_write_byte(&pca9548_client_bus0, 0x04); + else + /* Turn on PCA9548#0 channel 1 on I2C-bus0 */ + i2c_smbus_write_byte(&pca9548_client_bus0, 0x02); + value = i2c_smbus_read_word_data(&psu_mcu_client_bus0, 0x8D); + i2c_smbus_write_byte(&pca9548_client_bus0, 0x00); + mutex_unlock(&data_bus0->lock); + } + break; + + default: + break; + } + valueY = (value & 0x07FF); + if ((value & 0x8000)&&(valueY)) + { + valueN = 0xF0 + (((value) >> 11) & 0x0F); + valueN = (~valueN) +1; + temp = (unsigned int)(1<> 11) & 0x0F); + count = sprintf(buf, "%d\n", (valueY*(1<index&0x1); + if (index&0x01) /* PSU 2 */ + { + if ((platformPsuABS&0x02)==0x00) /* PSU2 Present */ + psu_present = 1; + } + else /* PSU 1 */ + { + if ((platformPsuABS&0x01)==0x00) /* PSU1 Present */ + psu_present = 1; + } + if (psu_present == 1) + { + switch(platformModelId) + { + case HURACAN_WITH_BMC: + case HURACAN_WITHOUT_BMC: + case ASTERION_WITH_BMC: + case ASTERION_WITHOUT_BMC: + case HURACAN_A_WITH_BMC: + case HURACAN_A_WITHOUT_BMC: + { + mutex_lock(&data->lock); + if (index) + /* Turn on PCA9548 channel 7 on I2C-bus1 */ + i2c_smbus_write_byte(client, 0x80); + else + /* Turn on PCA9548 channel 6 on I2C-bus1 */ + i2c_smbus_write_byte(client, 0x40); + value = i2c_smbus_read_word_data(&psu_mcu_client, 0x8E); + i2c_smbus_write_byte(client, 0x00); + mutex_unlock(&data->lock); + } + break; + + case CABRERAIII_WITH_BMC: + case CABRERAIII_WITHOUT_BMC: + break; + + case SESTO_WITH_BMC: + case SESTO_WITHOUT_BMC: + { + mutex_lock(&data->lock); + if (index) + /* Turn on PCA9548#1 channel 7 on I2C-bus1 */ + i2c_smbus_write_byte(&(pca9548_client[1]), 0x80); + else + /* Turn on PCA9548#1 channel 6 on I2C-bus1 */ + i2c_smbus_write_byte(&(pca9548_client[1]), 0x40); + value = i2c_smbus_read_word_data(&psu_mcu_client, 0x8E); + i2c_smbus_write_byte(&(pca9548_client[1]), 0x00); + mutex_unlock(&data->lock); + } + break; + + case NCIIX_WITH_BMC: + case NCIIX_WITHOUT_BMC: + { + struct i2c_bus0_hardware_monitor_data *data_bus0 = i2c_get_clientdata(&psu_eeprom_client_bus0); + + mutex_lock(&data_bus0->lock); + if (index) + /* Turn on PCA9548#0 channel 2 on I2C-bus0 */ + i2c_smbus_write_byte(&pca9548_client_bus0, 0x04); + else + /* Turn on PCA9548#0 channel 1 on I2C-bus0 */ + i2c_smbus_write_byte(&pca9548_client_bus0, 0x02); + value = i2c_smbus_read_word_data(&psu_mcu_client_bus0, 0x8E); + i2c_smbus_write_byte(&pca9548_client_bus0, 0x00); + mutex_unlock(&data_bus0->lock); + } + break; + + default: + break; + } + valueY = (value & 0x07FF); + if ((value & 0x8000)&&(valueY)) + { + valueN = 0xF0 + (((value) >> 11) & 0x0F); + valueN = (~valueN) +1; + temp = (unsigned int)(1<> 11) & 0x0F); + count = sprintf(buf, "%d\n", (valueY*(1<index&0x1); + if (index&0x01) /* PSU 2 */ + { + if ((platformPsuABS&0x02)==0x00) /* PSU2 Present */ + psu_present = 1; + } + else /* PSU 1 */ + { + if ((platformPsuABS&0x01)==0x00) /* PSU1 Present */ + psu_present = 1; + } + if (psu_present == 1) + { + switch(platformModelId) + { + case HURACAN_WITH_BMC: + case HURACAN_WITHOUT_BMC: + case ASTERION_WITH_BMC: + case ASTERION_WITHOUT_BMC: + case HURACAN_A_WITH_BMC: + case HURACAN_A_WITHOUT_BMC: + { + mutex_lock(&data->lock); + if (index) + /* Turn on PCA9548 channel 7 on I2C-bus1 */ + i2c_smbus_write_byte(client, 0x80); + else + /* Turn on PCA9548 channel 6 on I2C-bus1 */ + i2c_smbus_write_byte(client, 0x40); + value = i2c_smbus_read_word_data(&psu_mcu_client, 0x90); + i2c_smbus_write_byte(client, 0x00); + mutex_unlock(&data->lock); + } + break; + + case CABRERAIII_WITH_BMC: + case CABRERAIII_WITHOUT_BMC: + break; + + case SESTO_WITH_BMC: + case SESTO_WITHOUT_BMC: + { + mutex_lock(&data->lock); + if (index) + /* Turn on PCA9548#1 channel 7 on I2C-bus1 */ + i2c_smbus_write_byte(&(pca9548_client[1]), 0x80); + else + /* Turn on PCA9548#1 channel 6 on I2C-bus1 */ + i2c_smbus_write_byte(&(pca9548_client[1]), 0x40); + value = i2c_smbus_read_word_data(&psu_mcu_client, 0x90); + i2c_smbus_write_byte(&(pca9548_client[1]), 0x00); + mutex_unlock(&data->lock); + } + break; + + case NCIIX_WITH_BMC: + case NCIIX_WITHOUT_BMC: + { + struct i2c_bus0_hardware_monitor_data *data_bus0 = i2c_get_clientdata(&psu_eeprom_client_bus0); + + mutex_lock(&data_bus0->lock); + if (index) + /* Turn on PCA9548#0 channel 2 on I2C-bus0 */ + i2c_smbus_write_byte(&pca9548_client_bus0, 0x04); + else + /* Turn on PCA9548#0 channel 1 on I2C-bus0 */ + i2c_smbus_write_byte(&pca9548_client_bus0, 0x02); + value = i2c_smbus_read_word_data(&psu_mcu_client_bus0, 0x90); + i2c_smbus_write_byte(&pca9548_client_bus0, 0x00); + mutex_unlock(&data_bus0->lock); + } + break; + + default: + break; + } + temp = (unsigned int)value; + temp = (temp & 0x07FF) * (1 << ((temp >> 11) & 0x1F)); + } + return sprintf(buf, "%d\n", temp); +} + +static ssize_t show_psu_pout(struct device *dev, struct device_attribute *devattr, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct i2c_client *client = to_i2c_client(dev); + struct i2c_bus1_hardware_monitor_data *data = i2c_get_clientdata(client); + unsigned short value = 0; + unsigned short index = 0; + unsigned int valueY = 0; + unsigned char valueN = 0; + ssize_t count = 0; + unsigned int temp = 0; + unsigned int psu_present = 0; + + index = (attr->index&0x1); + if (index&0x01) /* PSU 2 */ + { + if ((platformPsuABS&0x02)==0x00) /* PSU2 Present */ + psu_present = 1; + } + else /* PSU 1 */ + { + if ((platformPsuABS&0x01)==0x00) /* PSU1 Present */ + psu_present = 1; + } + if (psu_present == 1) + { + switch(platformModelId) + { + case HURACAN_WITH_BMC: + case HURACAN_WITHOUT_BMC: + case ASTERION_WITH_BMC: + case ASTERION_WITHOUT_BMC: + case HURACAN_A_WITH_BMC: + case HURACAN_A_WITHOUT_BMC: + { + mutex_lock(&data->lock); + if (index) + /* Turn on PCA9548 channel 7 on I2C-bus1 */ + i2c_smbus_write_byte(client, 0x80); + else + /* Turn on PCA9548 channel 6 on I2C-bus1 */ + i2c_smbus_write_byte(client, 0x40); + value = i2c_smbus_read_word_data(&psu_mcu_client, 0x96); + i2c_smbus_write_byte(client, 0x00); + mutex_unlock(&data->lock); + } + break; + + case CABRERAIII_WITH_BMC: + case CABRERAIII_WITHOUT_BMC: + break; + + case SESTO_WITH_BMC: + case SESTO_WITHOUT_BMC: + { + mutex_lock(&data->lock); + if (index) + /* Turn on PCA9548#1 channel 7 on I2C-bus1 */ + i2c_smbus_write_byte(&(pca9548_client[1]), 0x80); + else + /* Turn on PCA9548#1 channel 6 on I2C-bus1 */ + i2c_smbus_write_byte(&(pca9548_client[1]), 0x40); + value = i2c_smbus_read_word_data(&psu_mcu_client, 0x96); + i2c_smbus_write_byte(&(pca9548_client[1]), 0x00); + mutex_unlock(&data->lock); + } + break; + + case NCIIX_WITH_BMC: + case NCIIX_WITHOUT_BMC: + { + struct i2c_bus0_hardware_monitor_data *data_bus0 = i2c_get_clientdata(&psu_eeprom_client_bus0); + + mutex_lock(&data_bus0->lock); + if (index) + /* Turn on PCA9548#0 channel 2 on I2C-bus0 */ + i2c_smbus_write_byte(&pca9548_client_bus0, 0x04); + else + /* Turn on PCA9548#0 channel 1 on I2C-bus0 */ + i2c_smbus_write_byte(&pca9548_client_bus0, 0x02); + value = i2c_smbus_read_word_data(&psu_mcu_client_bus0, 0x96); + i2c_smbus_write_byte(&pca9548_client_bus0, 0x00); + mutex_unlock(&data_bus0->lock); + } + break; + + default: + break; + } + valueY = (value & 0x07FF); + if ((value & 0x8000)&&(valueY)) + { + valueN = 0xF0 + (((value) >> 11) & 0x0F); + valueN = (~valueN) +1; + temp = (unsigned int)(1<> 11) & 0x0F); + count = sprintf(buf, "%d\n", (valueY*(1<index&0x1); + if (index&0x01) /* PSU 2 */ + { + if ((platformPsuABS&0x02)==0x00) /* PSU2 Present */ + psu_present = 1; + } + else /* PSU 1 */ + { + if ((platformPsuABS&0x01)==0x00) /* PSU1 Present */ + psu_present = 1; + } + if (psu_present == 1) + { + switch(platformModelId) + { + case HURACAN_WITH_BMC: + case HURACAN_WITHOUT_BMC: + case ASTERION_WITH_BMC: + case ASTERION_WITHOUT_BMC: + case HURACAN_A_WITH_BMC: + case HURACAN_A_WITHOUT_BMC: + { + mutex_lock(&data->lock); + if (index) + /* Turn on PCA9548 channel 7 on I2C-bus1 */ + i2c_smbus_write_byte(client, 0x80); + else + /* Turn on PCA9548 channel 6 on I2C-bus1 */ + i2c_smbus_write_byte(client, 0x40); + value = i2c_smbus_read_word_data(&psu_mcu_client, 0x97); + i2c_smbus_write_byte(client, 0x00); + mutex_unlock(&data->lock); + } + break; + + case CABRERAIII_WITH_BMC: + case CABRERAIII_WITHOUT_BMC: + break; + + case SESTO_WITH_BMC: + case SESTO_WITHOUT_BMC: + { + mutex_lock(&data->lock); + if (index) + /* Turn on PCA9548#1 channel 7 on I2C-bus1 */ + i2c_smbus_write_byte(&(pca9548_client[1]), 0x80); + else + /* Turn on PCA9548#1 channel 6 on I2C-bus1 */ + i2c_smbus_write_byte(&(pca9548_client[1]), 0x40); + value = i2c_smbus_read_word_data(&psu_mcu_client, 0x97); + i2c_smbus_write_byte(&(pca9548_client[1]), 0x00); + mutex_unlock(&data->lock); + } + break; + + case NCIIX_WITH_BMC: + case NCIIX_WITHOUT_BMC: + { + struct i2c_bus0_hardware_monitor_data *data_bus0 = i2c_get_clientdata(&psu_eeprom_client_bus0); + + mutex_lock(&data_bus0->lock); + if (index) + /* Turn on PCA9548#0 channel 2 on I2C-bus0 */ + i2c_smbus_write_byte(&pca9548_client_bus0, 0x04); + else + /* Turn on PCA9548#0 channel 1 on I2C-bus0 */ + i2c_smbus_write_byte(&pca9548_client_bus0, 0x02); + value = i2c_smbus_read_word_data(&psu_mcu_client_bus0, 0x97); + i2c_smbus_write_byte(&pca9548_client_bus0, 0x00); + mutex_unlock(&data_bus0->lock); + } + break; + + default: + break; + } + valueY = (value & 0x07FF); + if ((value & 0x8000)&&(valueY)) + { + valueN = 0xF0 + (((value) >> 11) & 0x0F); + valueN = (~valueN) +1; + temp = (unsigned int)(1<> 11) & 0x0F); + count = sprintf(buf, "%d\n", (valueY*(1<lock); + if ((platformPsuABS&0x01)==0x00) /* PSU1 Present */ + { + /* Turn on PCA9548#1 channel 6 on I2C-bus1 */ + i2c_smbus_write_byte(client, 0x40); + i2c_smbus_write_word_data(&psu_mcu_client, 0x02, cmd_data_1); + i2c_smbus_write_word_data(&psu_mcu_client, 0x01, cmd_data_2); + } + if ((platformPsuABS&0x02)==0x00) /* PSU2 Present */ + { + /* Turn on PCA9548#1 channel 7 on I2C-bus1 */ + i2c_smbus_write_byte(client, 0x80); + i2c_smbus_write_word_data(&psu_mcu_client, 0x02, cmd_data_1); + i2c_smbus_write_word_data(&psu_mcu_client, 0x01, cmd_data_2); + } + i2c_smbus_write_byte(client, 0x00); + mutex_unlock(&data->lock); + } + break; + + case SESTO_WITH_BMC: + case SESTO_WITHOUT_BMC: + { + unsigned short cmd_data_1 = 0x8F19; + unsigned short cmd_data_2 = 0xFF00; + + mutex_lock(&data->lock); + if ((platformPsuABS&0x01)==0x00) /* PSU1 Present */ + { + /* Turn on PCA9548#1 channel 6 on I2C-bus1 */ + i2c_smbus_write_byte(&(pca9548_client[1]), 0x40); + i2c_smbus_write_word_data(&psu_mcu_client, 0x02, cmd_data_1); + i2c_smbus_write_word_data(&psu_mcu_client, 0x01, cmd_data_2); + } + if ((platformPsuABS&0x02)==0x00) /* PSU2 Present */ + { + /* Turn on PCA9548#1 channel 7 on I2C-bus1 */ + i2c_smbus_write_byte(&(pca9548_client[1]), 0x80); + i2c_smbus_write_word_data(&psu_mcu_client, 0x02, cmd_data_1); + i2c_smbus_write_word_data(&psu_mcu_client, 0x01, cmd_data_2); + } + i2c_smbus_write_byte(&(pca9548_client[1]), 0x00); + mutex_unlock(&data->lock); + } + break; + + case NCIIX_WITH_BMC: + case NCIIX_WITHOUT_BMC: + { + struct i2c_bus0_hardware_monitor_data *data_bus0 = i2c_get_clientdata(&psu_eeprom_client_bus0); + /* + Setting the ON_OFF_CONFIG Command (02h) to type 9 (SW : turn-on/off by operation command). + I2C Command: B2 02 19 59 + address command data PEC(Packet Error Check) + */ + unsigned short cmd_data_1 = 0x5919; + /* + Setting the Operation Command (01h) to turn-off power immediately. + I2C Command: B2 01 00 29 + address command data PEC(Packet Error Check) + */ + unsigned short cmd_data_2 = 0x2900; + + mutex_lock(&data_bus0->lock); + if ((platformPsuABS&0x01)==0x00) /* PSU1 Present */ + { + /* Turn on PCA9548#0 channel 1 on I2C-bus0 */ + i2c_smbus_write_byte(&pca9548_client_bus0, 0x02); + i2c_smbus_write_word_data(&psu_mcu_client_bus0, 0x02, cmd_data_1); + i2c_smbus_write_word_data(&psu_mcu_client_bus0, 0x01, cmd_data_2); + } + if ((platformPsuABS&0x02)==0x00) /* PSU2 Present */ + { + /* Turn on PCA9548#0 channel 2 on I2C-bus0 */ + i2c_smbus_write_byte(&pca9548_client_bus0, 0x04); + i2c_smbus_write_word_data(&psu_mcu_client_bus0, 0x02, cmd_data_1); + i2c_smbus_write_word_data(&psu_mcu_client_bus0, 0x01, cmd_data_2); + } + i2c_smbus_write_byte(&pca9548_client_bus0, 0x00); + mutex_unlock(&data_bus0->lock); + } + break; + + default: + break; + } + + return count; +} + + +static ssize_t set_system_led(struct device *dev, struct device_attribute *devattr, const char *buf, + size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + struct i2c_bus1_hardware_monitor_data *data = i2c_get_clientdata(client); + long temp; + + if (kstrtol(buf, 10, &temp)) + return -EINVAL; + + temp = clamp_val(temp, 0, 2); + + mutex_lock(&data->lock); + data->systemLedStatus = temp; + mutex_unlock(&data->lock); + + return count; +} + +static ssize_t show_port_tx_disable(struct device *dev, struct device_attribute *devattr, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + int rc = 0; + + switch(platformModelId) + { + case SESTO_WITH_BMC: + case SESTO_WITHOUT_BMC: + { + struct i2c_client *client = to_i2c_client(dev); + struct i2c_bus1_hardware_monitor_data *data = i2c_get_clientdata(client); + unsigned short index=0, bit=0; + + index = (attr->index/16); + bit = (attr->index%16); + mutex_lock(&data->lock); + rc = (PCA9553_TEST_BIT(data->sfpPortTxDisable[index], bit)?1:0); + mutex_unlock(&data->lock); + } + break; + + case NCIIX_WITH_BMC: + case NCIIX_WITHOUT_BMC: + { + rc = (SFPPortTxDisable[attr->index]==1); + } + break; + + default: + break; + } + + + return sprintf(buf, "%d\n", rc); +} + +static ssize_t set_port_tx_disable(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct i2c_client *client = to_i2c_client(dev); + struct i2c_bus1_hardware_monitor_data *data = i2c_get_clientdata(client); + long temp; + + if (kstrtol(buf, 10, &temp)) + return -EINVAL; + temp = clamp_val(temp, 0, 1); + + switch(platformModelId) + { + case SESTO_WITH_BMC: + case SESTO_WITHOUT_BMC: + { + unsigned short index=0, bit=0; + + index = (attr->index/16); + bit = (attr->index%16); + + mutex_lock(&data->lock); + if (temp==1) + PCA9553_SET_BIT(data->sfpPortTxDisable[index], bit); + else + PCA9553_CLEAR_BIT(data->sfpPortTxDisable[index], bit); + i2c_smbus_write_byte(&(pca9548_client[1]), (1<sfpPortTxDisable[index]); + i2c_smbus_write_byte(&(pca9548_client[1]), 0x00); + mutex_unlock(&data->lock); + } + break; + + case NCIIX_WITH_BMC: + case NCIIX_WITHOUT_BMC: + { + unsigned short value = 0; + + SFPPortTxDisable[attr->index] = (temp&0x1); + if ((attr->index/8) == 5) /* SFP+ 40~47 */ + { + mutex_lock(&data->lock); + i2c_smbus_write_byte(client, sfpPortData_78F[attr->index].portMaskIOsForPCA9548_0); + value = i2c_smbus_read_word_data(&(pca9535pwr_client_bus1[sfpPortData_78F[attr->index].i2cAddrForPCA9535]), PCA9553_COMMAND_BYTE_REG_OUTPUT_PORT_0); + if (temp==1) + PCA9553_SET_BIT(value, sfpPortData_78F[attr->index].portMaskBitForTxEnPin); + else + PCA9553_CLEAR_BIT(value, sfpPortData_78F[attr->index].portMaskBitForTxEnPin); + i2c_device_word_write(&(pca9535pwr_client_bus1[sfpPortData_78F[attr->index].i2cAddrForPCA9535]), PCA9553_COMMAND_BYTE_REG_OUTPUT_PORT_0, value); + i2c_smbus_write_byte(client, 0x00); + mutex_unlock(&data->lock); + } + else /* SFP+ 0~39 */ + { + struct i2c_bus0_hardware_monitor_data *data_bus0 = i2c_get_clientdata(&pca9548_client_bus0); + + mutex_lock(&data_bus0->lock); + i2c_smbus_write_byte(&pca9548_client_bus0, sfpPortData_78F[attr->index].portMaskIOsForPCA9548_0); + value = i2c_smbus_read_word_data(&(pca9535_client_bus0[sfpPortData_78F[attr->index].i2cAddrForPCA9535]), PCA9553_COMMAND_BYTE_REG_OUTPUT_PORT_0); + if (temp==1) + PCA9553_SET_BIT(value, sfpPortData_78F[attr->index].portMaskBitForTxEnPin); + else + PCA9553_CLEAR_BIT(value, sfpPortData_78F[attr->index].portMaskBitForTxEnPin); + i2c_device_word_write(&(pca9535_client_bus0[sfpPortData_78F[attr->index].i2cAddrForPCA9535]), PCA9553_COMMAND_BYTE_REG_OUTPUT_PORT_0, value); + i2c_smbus_write_byte(&pca9548_client_bus0, 0x00); + mutex_unlock(&data_bus0->lock); + } + } + break; + + default: + break; + } + + return count; +} + +static ssize_t show_port_rate_select(struct device *dev, struct device_attribute *devattr, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + int rc = 0; + + switch(platformModelId) + { + case SESTO_WITH_BMC: + case SESTO_WITHOUT_BMC: + { + struct i2c_client *client = to_i2c_client(dev); + struct i2c_bus1_hardware_monitor_data *data = i2c_get_clientdata(client); + unsigned short index=0, bit=0; + + index = (attr->index/16); + bit = (attr->index%16); + mutex_lock(&data->lock); + rc = (PCA9553_TEST_BIT(data->sfpPortRateSelect[index], bit)?1:0); + mutex_unlock(&data->lock); + } + break; + + default: + break; + } + + + return sprintf(buf, "%d\n", rc); +} + +static ssize_t set_port_rate_select(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct i2c_client *client = to_i2c_client(dev); + struct i2c_bus1_hardware_monitor_data *data = i2c_get_clientdata(client); + long temp; + + if (kstrtol(buf, 10, &temp)) + return -EINVAL; + temp = clamp_val(temp, 0, 1); + + switch(platformModelId) + { + case SESTO_WITH_BMC: + case SESTO_WITHOUT_BMC: + { + unsigned short index=0, bit=0; + + index = (attr->index/16); + bit = (attr->index%16); + + mutex_lock(&data->lock); + if (temp==1) + PCA9553_SET_BIT(data->sfpPortRateSelect[index], bit); + else + PCA9553_CLEAR_BIT(data->sfpPortRateSelect[index], bit); + i2c_smbus_write_byte(&(pca9548_client[1]), (1<sfpPortRateSelect[0]); + break; + + case 1: + i2c_device_word_write(&(pca9535pwr_client_bus1[1]), PCA9553_COMMAND_BYTE_REG_OUTPUT_PORT_0, data->sfpPortRateSelect[1]); + break; + + case 2: + i2c_device_word_write(&(pca9535pwr_client_bus1[2]), PCA9553_COMMAND_BYTE_REG_OUTPUT_PORT_0, data->sfpPortRateSelect[2]); + break; + + default: + break; + } + i2c_smbus_write_byte(&(pca9548_client[1]), (1<sfpPortRateSelect[0]); + break; + + case 1: + i2c_device_word_write(&(pca9535pwr_client_bus1[1]), PCA9553_COMMAND_BYTE_REG_OUTPUT_PORT_0, data->sfpPortRateSelect[1]); + break; + + case 2: + i2c_device_word_write(&(pca9535pwr_client_bus1[2]), PCA9553_COMMAND_BYTE_REG_OUTPUT_PORT_0, data->sfpPortRateSelect[2]); + break; + + default: + break; + } + i2c_smbus_write_byte(&(pca9548_client[1]), 0x00); + mutex_unlock(&data->lock); + } + break; + + default: + break; + } + + return count; +} + +static DEVICE_ATTR(eeprom, S_IRUGO, show_eeprom, NULL); +static DEVICE_ATTR(system_led, S_IWUSR, NULL, set_system_led); + +static SENSOR_DEVICE_ATTR(port_1_data_a0, S_IRUGO, show_port_data_a0, NULL, 0); +static SENSOR_DEVICE_ATTR(port_2_data_a0, S_IRUGO, show_port_data_a0, NULL, 1); +static SENSOR_DEVICE_ATTR(port_3_data_a0, S_IRUGO, show_port_data_a0, NULL, 2); +static SENSOR_DEVICE_ATTR(port_4_data_a0, S_IRUGO, show_port_data_a0, NULL, 3); +static SENSOR_DEVICE_ATTR(port_5_data_a0, S_IRUGO, show_port_data_a0, NULL, 4); +static SENSOR_DEVICE_ATTR(port_6_data_a0, S_IRUGO, show_port_data_a0, NULL, 5); +static SENSOR_DEVICE_ATTR(port_7_data_a0, S_IRUGO, show_port_data_a0, NULL, 6); +static SENSOR_DEVICE_ATTR(port_8_data_a0, S_IRUGO, show_port_data_a0, NULL, 7); +static SENSOR_DEVICE_ATTR(port_9_data_a0, S_IRUGO, show_port_data_a0, NULL, 8); +static SENSOR_DEVICE_ATTR(port_10_data_a0, S_IRUGO, show_port_data_a0, NULL, 9); +static SENSOR_DEVICE_ATTR(port_11_data_a0, S_IRUGO, show_port_data_a0, NULL, 10); +static SENSOR_DEVICE_ATTR(port_12_data_a0, S_IRUGO, show_port_data_a0, NULL, 11); +static SENSOR_DEVICE_ATTR(port_13_data_a0, S_IRUGO, show_port_data_a0, NULL, 12); +static SENSOR_DEVICE_ATTR(port_14_data_a0, S_IRUGO, show_port_data_a0, NULL, 13); +static SENSOR_DEVICE_ATTR(port_15_data_a0, S_IRUGO, show_port_data_a0, NULL, 14); +static SENSOR_DEVICE_ATTR(port_16_data_a0, S_IRUGO, show_port_data_a0, NULL, 15); +static SENSOR_DEVICE_ATTR(port_17_data_a0, S_IRUGO, show_port_data_a0, NULL, 16); +static SENSOR_DEVICE_ATTR(port_18_data_a0, S_IRUGO, show_port_data_a0, NULL, 17); +static SENSOR_DEVICE_ATTR(port_19_data_a0, S_IRUGO, show_port_data_a0, NULL, 18); +static SENSOR_DEVICE_ATTR(port_20_data_a0, S_IRUGO, show_port_data_a0, NULL, 19); +static SENSOR_DEVICE_ATTR(port_21_data_a0, S_IRUGO, show_port_data_a0, NULL, 20); +static SENSOR_DEVICE_ATTR(port_22_data_a0, S_IRUGO, show_port_data_a0, NULL, 21); +static SENSOR_DEVICE_ATTR(port_23_data_a0, S_IRUGO, show_port_data_a0, NULL, 22); +static SENSOR_DEVICE_ATTR(port_24_data_a0, S_IRUGO, show_port_data_a0, NULL, 23); +static SENSOR_DEVICE_ATTR(port_25_data_a0, S_IRUGO, show_port_data_a0, NULL, 24); +static SENSOR_DEVICE_ATTR(port_26_data_a0, S_IRUGO, show_port_data_a0, NULL, 25); +static SENSOR_DEVICE_ATTR(port_27_data_a0, S_IRUGO, show_port_data_a0, NULL, 26); +static SENSOR_DEVICE_ATTR(port_28_data_a0, S_IRUGO, show_port_data_a0, NULL, 27); +static SENSOR_DEVICE_ATTR(port_29_data_a0, S_IRUGO, show_port_data_a0, NULL, 28); +static SENSOR_DEVICE_ATTR(port_30_data_a0, S_IRUGO, show_port_data_a0, NULL, 29); +static SENSOR_DEVICE_ATTR(port_31_data_a0, S_IRUGO, show_port_data_a0, NULL, 30); +static SENSOR_DEVICE_ATTR(port_32_data_a0, S_IRUGO, show_port_data_a0, NULL, 31); +static SENSOR_DEVICE_ATTR(port_33_data_a0, S_IRUGO, show_port_data_a0, NULL, 32); +static SENSOR_DEVICE_ATTR(port_34_data_a0, S_IRUGO, show_port_data_a0, NULL, 33); +static SENSOR_DEVICE_ATTR(port_35_data_a0, S_IRUGO, show_port_data_a0, NULL, 34); +static SENSOR_DEVICE_ATTR(port_36_data_a0, S_IRUGO, show_port_data_a0, NULL, 35); +static SENSOR_DEVICE_ATTR(port_37_data_a0, S_IRUGO, show_port_data_a0, NULL, 36); +static SENSOR_DEVICE_ATTR(port_38_data_a0, S_IRUGO, show_port_data_a0, NULL, 37); +static SENSOR_DEVICE_ATTR(port_39_data_a0, S_IRUGO, show_port_data_a0, NULL, 38); +static SENSOR_DEVICE_ATTR(port_40_data_a0, S_IRUGO, show_port_data_a0, NULL, 39); +static SENSOR_DEVICE_ATTR(port_41_data_a0, S_IRUGO, show_port_data_a0, NULL, 40); +static SENSOR_DEVICE_ATTR(port_42_data_a0, S_IRUGO, show_port_data_a0, NULL, 41); +static SENSOR_DEVICE_ATTR(port_43_data_a0, S_IRUGO, show_port_data_a0, NULL, 42); +static SENSOR_DEVICE_ATTR(port_44_data_a0, S_IRUGO, show_port_data_a0, NULL, 43); +static SENSOR_DEVICE_ATTR(port_45_data_a0, S_IRUGO, show_port_data_a0, NULL, 44); +static SENSOR_DEVICE_ATTR(port_46_data_a0, S_IRUGO, show_port_data_a0, NULL, 45); +static SENSOR_DEVICE_ATTR(port_47_data_a0, S_IRUGO, show_port_data_a0, NULL, 46); +static SENSOR_DEVICE_ATTR(port_48_data_a0, S_IRUGO, show_port_data_a0, NULL, 47); +static SENSOR_DEVICE_ATTR(port_49_data_a0, S_IRUGO, show_port_data_a0, NULL, 48); +static SENSOR_DEVICE_ATTR(port_50_data_a0, S_IRUGO, show_port_data_a0, NULL, 49); +static SENSOR_DEVICE_ATTR(port_51_data_a0, S_IRUGO, show_port_data_a0, NULL, 50); +static SENSOR_DEVICE_ATTR(port_52_data_a0, S_IRUGO, show_port_data_a0, NULL, 51); +static SENSOR_DEVICE_ATTR(port_53_data_a0, S_IRUGO, show_port_data_a0, NULL, 52); +static SENSOR_DEVICE_ATTR(port_54_data_a0, S_IRUGO, show_port_data_a0, NULL, 53); +static SENSOR_DEVICE_ATTR(port_55_data_a0, S_IRUGO, show_port_data_a0, NULL, 54); +static SENSOR_DEVICE_ATTR(port_56_data_a0, S_IRUGO, show_port_data_a0, NULL, 55); +static SENSOR_DEVICE_ATTR(port_57_data_a0, S_IRUGO, show_port_data_a0, NULL, 56); +static SENSOR_DEVICE_ATTR(port_58_data_a0, S_IRUGO, show_port_data_a0, NULL, 57); +static SENSOR_DEVICE_ATTR(port_59_data_a0, S_IRUGO, show_port_data_a0, NULL, 58); +static SENSOR_DEVICE_ATTR(port_60_data_a0, S_IRUGO, show_port_data_a0, NULL, 59); +static SENSOR_DEVICE_ATTR(port_61_data_a0, S_IRUGO, show_port_data_a0, NULL, 60); +static SENSOR_DEVICE_ATTR(port_62_data_a0, S_IRUGO, show_port_data_a0, NULL, 61); +static SENSOR_DEVICE_ATTR(port_63_data_a0, S_IRUGO, show_port_data_a0, NULL, 62); +static SENSOR_DEVICE_ATTR(port_64_data_a0, S_IRUGO, show_port_data_a0, NULL, 63); + +static SENSOR_DEVICE_ATTR(port_1_data_a2, S_IRUGO, show_port_data_a2, NULL, 0); +static SENSOR_DEVICE_ATTR(port_2_data_a2, S_IRUGO, show_port_data_a2, NULL, 1); +static SENSOR_DEVICE_ATTR(port_3_data_a2, S_IRUGO, show_port_data_a2, NULL, 2); +static SENSOR_DEVICE_ATTR(port_4_data_a2, S_IRUGO, show_port_data_a2, NULL, 3); +static SENSOR_DEVICE_ATTR(port_5_data_a2, S_IRUGO, show_port_data_a2, NULL, 4); +static SENSOR_DEVICE_ATTR(port_6_data_a2, S_IRUGO, show_port_data_a2, NULL, 5); +static SENSOR_DEVICE_ATTR(port_7_data_a2, S_IRUGO, show_port_data_a2, NULL, 6); +static SENSOR_DEVICE_ATTR(port_8_data_a2, S_IRUGO, show_port_data_a2, NULL, 7); +static SENSOR_DEVICE_ATTR(port_9_data_a2, S_IRUGO, show_port_data_a2, NULL, 8); +static SENSOR_DEVICE_ATTR(port_10_data_a2, S_IRUGO, show_port_data_a2, NULL, 9); +static SENSOR_DEVICE_ATTR(port_11_data_a2, S_IRUGO, show_port_data_a2, NULL, 10); +static SENSOR_DEVICE_ATTR(port_12_data_a2, S_IRUGO, show_port_data_a2, NULL, 11); +static SENSOR_DEVICE_ATTR(port_13_data_a2, S_IRUGO, show_port_data_a2, NULL, 12); +static SENSOR_DEVICE_ATTR(port_14_data_a2, S_IRUGO, show_port_data_a2, NULL, 13); +static SENSOR_DEVICE_ATTR(port_15_data_a2, S_IRUGO, show_port_data_a2, NULL, 14); +static SENSOR_DEVICE_ATTR(port_16_data_a2, S_IRUGO, show_port_data_a2, NULL, 15); +static SENSOR_DEVICE_ATTR(port_17_data_a2, S_IRUGO, show_port_data_a2, NULL, 16); +static SENSOR_DEVICE_ATTR(port_18_data_a2, S_IRUGO, show_port_data_a2, NULL, 17); +static SENSOR_DEVICE_ATTR(port_19_data_a2, S_IRUGO, show_port_data_a2, NULL, 18); +static SENSOR_DEVICE_ATTR(port_20_data_a2, S_IRUGO, show_port_data_a2, NULL, 19); +static SENSOR_DEVICE_ATTR(port_21_data_a2, S_IRUGO, show_port_data_a2, NULL, 20); +static SENSOR_DEVICE_ATTR(port_22_data_a2, S_IRUGO, show_port_data_a2, NULL, 21); +static SENSOR_DEVICE_ATTR(port_23_data_a2, S_IRUGO, show_port_data_a2, NULL, 22); +static SENSOR_DEVICE_ATTR(port_24_data_a2, S_IRUGO, show_port_data_a2, NULL, 23); +static SENSOR_DEVICE_ATTR(port_25_data_a2, S_IRUGO, show_port_data_a2, NULL, 24); +static SENSOR_DEVICE_ATTR(port_26_data_a2, S_IRUGO, show_port_data_a2, NULL, 25); +static SENSOR_DEVICE_ATTR(port_27_data_a2, S_IRUGO, show_port_data_a2, NULL, 26); +static SENSOR_DEVICE_ATTR(port_28_data_a2, S_IRUGO, show_port_data_a2, NULL, 27); +static SENSOR_DEVICE_ATTR(port_29_data_a2, S_IRUGO, show_port_data_a2, NULL, 28); +static SENSOR_DEVICE_ATTR(port_30_data_a2, S_IRUGO, show_port_data_a2, NULL, 29); +static SENSOR_DEVICE_ATTR(port_31_data_a2, S_IRUGO, show_port_data_a2, NULL, 30); +static SENSOR_DEVICE_ATTR(port_32_data_a2, S_IRUGO, show_port_data_a2, NULL, 31); +static SENSOR_DEVICE_ATTR(port_33_data_a2, S_IRUGO, show_port_data_a2, NULL, 32); +static SENSOR_DEVICE_ATTR(port_34_data_a2, S_IRUGO, show_port_data_a2, NULL, 33); +static SENSOR_DEVICE_ATTR(port_35_data_a2, S_IRUGO, show_port_data_a2, NULL, 34); +static SENSOR_DEVICE_ATTR(port_36_data_a2, S_IRUGO, show_port_data_a2, NULL, 35); +static SENSOR_DEVICE_ATTR(port_37_data_a2, S_IRUGO, show_port_data_a2, NULL, 36); +static SENSOR_DEVICE_ATTR(port_38_data_a2, S_IRUGO, show_port_data_a2, NULL, 37); +static SENSOR_DEVICE_ATTR(port_39_data_a2, S_IRUGO, show_port_data_a2, NULL, 38); +static SENSOR_DEVICE_ATTR(port_40_data_a2, S_IRUGO, show_port_data_a2, NULL, 39); +static SENSOR_DEVICE_ATTR(port_41_data_a2, S_IRUGO, show_port_data_a2, NULL, 40); +static SENSOR_DEVICE_ATTR(port_42_data_a2, S_IRUGO, show_port_data_a2, NULL, 41); +static SENSOR_DEVICE_ATTR(port_43_data_a2, S_IRUGO, show_port_data_a2, NULL, 42); +static SENSOR_DEVICE_ATTR(port_44_data_a2, S_IRUGO, show_port_data_a2, NULL, 43); +static SENSOR_DEVICE_ATTR(port_45_data_a2, S_IRUGO, show_port_data_a2, NULL, 44); +static SENSOR_DEVICE_ATTR(port_46_data_a2, S_IRUGO, show_port_data_a2, NULL, 45); +static SENSOR_DEVICE_ATTR(port_47_data_a2, S_IRUGO, show_port_data_a2, NULL, 46); +static SENSOR_DEVICE_ATTR(port_48_data_a2, S_IRUGO, show_port_data_a2, NULL, 47); +static SENSOR_DEVICE_ATTR(port_49_data_a2, S_IRUGO, show_port_data_a2, NULL, 48); +static SENSOR_DEVICE_ATTR(port_50_data_a2, S_IRUGO, show_port_data_a2, NULL, 49); +static SENSOR_DEVICE_ATTR(port_51_data_a2, S_IRUGO, show_port_data_a2, NULL, 50); +static SENSOR_DEVICE_ATTR(port_52_data_a2, S_IRUGO, show_port_data_a2, NULL, 51); +static SENSOR_DEVICE_ATTR(port_53_data_a2, S_IRUGO, show_port_data_a2, NULL, 52); +static SENSOR_DEVICE_ATTR(port_54_data_a2, S_IRUGO, show_port_data_a2, NULL, 53); +static SENSOR_DEVICE_ATTR(port_55_data_a2, S_IRUGO, show_port_data_a2, NULL, 54); +static SENSOR_DEVICE_ATTR(port_56_data_a2, S_IRUGO, show_port_data_a2, NULL, 55); +static SENSOR_DEVICE_ATTR(port_57_data_a2, S_IRUGO, show_port_data_a2, NULL, 56); +static SENSOR_DEVICE_ATTR(port_58_data_a2, S_IRUGO, show_port_data_a2, NULL, 57); +static SENSOR_DEVICE_ATTR(port_59_data_a2, S_IRUGO, show_port_data_a2, NULL, 58); +static SENSOR_DEVICE_ATTR(port_60_data_a2, S_IRUGO, show_port_data_a2, NULL, 59); +static SENSOR_DEVICE_ATTR(port_61_data_a2, S_IRUGO, show_port_data_a2, NULL, 60); +static SENSOR_DEVICE_ATTR(port_62_data_a2, S_IRUGO, show_port_data_a2, NULL, 61); +static SENSOR_DEVICE_ATTR(port_63_data_a2, S_IRUGO, show_port_data_a2, NULL, 62); +static SENSOR_DEVICE_ATTR(port_64_data_a2, S_IRUGO, show_port_data_a2, NULL, 63); + +static SENSOR_DEVICE_ATTR(port_1_abs, S_IRUGO, show_port_abs, NULL, 0); +static SENSOR_DEVICE_ATTR(port_2_abs, S_IRUGO, show_port_abs, NULL, 1); +static SENSOR_DEVICE_ATTR(port_3_abs, S_IRUGO, show_port_abs, NULL, 2); +static SENSOR_DEVICE_ATTR(port_4_abs, S_IRUGO, show_port_abs, NULL, 3); +static SENSOR_DEVICE_ATTR(port_5_abs, S_IRUGO, show_port_abs, NULL, 4); +static SENSOR_DEVICE_ATTR(port_6_abs, S_IRUGO, show_port_abs, NULL, 5); +static SENSOR_DEVICE_ATTR(port_7_abs, S_IRUGO, show_port_abs, NULL, 6); +static SENSOR_DEVICE_ATTR(port_8_abs, S_IRUGO, show_port_abs, NULL, 7); +static SENSOR_DEVICE_ATTR(port_9_abs, S_IRUGO, show_port_abs, NULL, 8); +static SENSOR_DEVICE_ATTR(port_10_abs, S_IRUGO, show_port_abs, NULL, 9); +static SENSOR_DEVICE_ATTR(port_11_abs, S_IRUGO, show_port_abs, NULL, 10); +static SENSOR_DEVICE_ATTR(port_12_abs, S_IRUGO, show_port_abs, NULL, 11); +static SENSOR_DEVICE_ATTR(port_13_abs, S_IRUGO, show_port_abs, NULL, 12); +static SENSOR_DEVICE_ATTR(port_14_abs, S_IRUGO, show_port_abs, NULL, 13); +static SENSOR_DEVICE_ATTR(port_15_abs, S_IRUGO, show_port_abs, NULL, 14); +static SENSOR_DEVICE_ATTR(port_16_abs, S_IRUGO, show_port_abs, NULL, 15); +static SENSOR_DEVICE_ATTR(port_17_abs, S_IRUGO, show_port_abs, NULL, 16); +static SENSOR_DEVICE_ATTR(port_18_abs, S_IRUGO, show_port_abs, NULL, 17); +static SENSOR_DEVICE_ATTR(port_19_abs, S_IRUGO, show_port_abs, NULL, 18); +static SENSOR_DEVICE_ATTR(port_20_abs, S_IRUGO, show_port_abs, NULL, 19); +static SENSOR_DEVICE_ATTR(port_21_abs, S_IRUGO, show_port_abs, NULL, 20); +static SENSOR_DEVICE_ATTR(port_22_abs, S_IRUGO, show_port_abs, NULL, 21); +static SENSOR_DEVICE_ATTR(port_23_abs, S_IRUGO, show_port_abs, NULL, 22); +static SENSOR_DEVICE_ATTR(port_24_abs, S_IRUGO, show_port_abs, NULL, 23); +static SENSOR_DEVICE_ATTR(port_25_abs, S_IRUGO, show_port_abs, NULL, 24); +static SENSOR_DEVICE_ATTR(port_26_abs, S_IRUGO, show_port_abs, NULL, 25); +static SENSOR_DEVICE_ATTR(port_27_abs, S_IRUGO, show_port_abs, NULL, 26); +static SENSOR_DEVICE_ATTR(port_28_abs, S_IRUGO, show_port_abs, NULL, 27); +static SENSOR_DEVICE_ATTR(port_29_abs, S_IRUGO, show_port_abs, NULL, 28); +static SENSOR_DEVICE_ATTR(port_30_abs, S_IRUGO, show_port_abs, NULL, 29); +static SENSOR_DEVICE_ATTR(port_31_abs, S_IRUGO, show_port_abs, NULL, 30); +static SENSOR_DEVICE_ATTR(port_32_abs, S_IRUGO, show_port_abs, NULL, 31); +static SENSOR_DEVICE_ATTR(port_33_abs, S_IRUGO, show_port_abs, NULL, 32); +static SENSOR_DEVICE_ATTR(port_34_abs, S_IRUGO, show_port_abs, NULL, 33); +static SENSOR_DEVICE_ATTR(port_35_abs, S_IRUGO, show_port_abs, NULL, 34); +static SENSOR_DEVICE_ATTR(port_36_abs, S_IRUGO, show_port_abs, NULL, 35); +static SENSOR_DEVICE_ATTR(port_37_abs, S_IRUGO, show_port_abs, NULL, 36); +static SENSOR_DEVICE_ATTR(port_38_abs, S_IRUGO, show_port_abs, NULL, 37); +static SENSOR_DEVICE_ATTR(port_39_abs, S_IRUGO, show_port_abs, NULL, 38); +static SENSOR_DEVICE_ATTR(port_40_abs, S_IRUGO, show_port_abs, NULL, 39); +static SENSOR_DEVICE_ATTR(port_41_abs, S_IRUGO, show_port_abs, NULL, 40); +static SENSOR_DEVICE_ATTR(port_42_abs, S_IRUGO, show_port_abs, NULL, 41); +static SENSOR_DEVICE_ATTR(port_43_abs, S_IRUGO, show_port_abs, NULL, 42); +static SENSOR_DEVICE_ATTR(port_44_abs, S_IRUGO, show_port_abs, NULL, 43); +static SENSOR_DEVICE_ATTR(port_45_abs, S_IRUGO, show_port_abs, NULL, 44); +static SENSOR_DEVICE_ATTR(port_46_abs, S_IRUGO, show_port_abs, NULL, 45); +static SENSOR_DEVICE_ATTR(port_47_abs, S_IRUGO, show_port_abs, NULL, 46); +static SENSOR_DEVICE_ATTR(port_48_abs, S_IRUGO, show_port_abs, NULL, 47); +static SENSOR_DEVICE_ATTR(port_49_abs, S_IRUGO, show_port_abs, NULL, 48); +static SENSOR_DEVICE_ATTR(port_50_abs, S_IRUGO, show_port_abs, NULL, 49); +static SENSOR_DEVICE_ATTR(port_51_abs, S_IRUGO, show_port_abs, NULL, 50); +static SENSOR_DEVICE_ATTR(port_52_abs, S_IRUGO, show_port_abs, NULL, 51); +static SENSOR_DEVICE_ATTR(port_53_abs, S_IRUGO, show_port_abs, NULL, 52); +static SENSOR_DEVICE_ATTR(port_54_abs, S_IRUGO, show_port_abs, NULL, 53); +static SENSOR_DEVICE_ATTR(port_55_abs, S_IRUGO, show_port_abs, NULL, 54); +static SENSOR_DEVICE_ATTR(port_56_abs, S_IRUGO, show_port_abs, NULL, 55); +static SENSOR_DEVICE_ATTR(port_57_abs, S_IRUGO, show_port_abs, NULL, 56); +static SENSOR_DEVICE_ATTR(port_58_abs, S_IRUGO, show_port_abs, NULL, 57); +static SENSOR_DEVICE_ATTR(port_59_abs, S_IRUGO, show_port_abs, NULL, 58); +static SENSOR_DEVICE_ATTR(port_60_abs, S_IRUGO, show_port_abs, NULL, 59); +static SENSOR_DEVICE_ATTR(port_61_abs, S_IRUGO, show_port_abs, NULL, 60); +static SENSOR_DEVICE_ATTR(port_62_abs, S_IRUGO, show_port_abs, NULL, 61); +static SENSOR_DEVICE_ATTR(port_63_abs, S_IRUGO, show_port_abs, NULL, 62); +static SENSOR_DEVICE_ATTR(port_64_abs, S_IRUGO, show_port_abs, NULL, 63); + +static SENSOR_DEVICE_ATTR(port_1_rxlos, S_IRUGO, show_port_rxlos, NULL, 0); +static SENSOR_DEVICE_ATTR(port_2_rxlos, S_IRUGO, show_port_rxlos, NULL, 1); +static SENSOR_DEVICE_ATTR(port_3_rxlos, S_IRUGO, show_port_rxlos, NULL, 2); +static SENSOR_DEVICE_ATTR(port_4_rxlos, S_IRUGO, show_port_rxlos, NULL, 3); +static SENSOR_DEVICE_ATTR(port_5_rxlos, S_IRUGO, show_port_rxlos, NULL, 4); +static SENSOR_DEVICE_ATTR(port_6_rxlos, S_IRUGO, show_port_rxlos, NULL, 5); +static SENSOR_DEVICE_ATTR(port_7_rxlos, S_IRUGO, show_port_rxlos, NULL, 6); +static SENSOR_DEVICE_ATTR(port_8_rxlos, S_IRUGO, show_port_rxlos, NULL, 7); +static SENSOR_DEVICE_ATTR(port_9_rxlos, S_IRUGO, show_port_rxlos, NULL, 8); +static SENSOR_DEVICE_ATTR(port_10_rxlos, S_IRUGO, show_port_rxlos, NULL, 9); +static SENSOR_DEVICE_ATTR(port_11_rxlos, S_IRUGO, show_port_rxlos, NULL, 10); +static SENSOR_DEVICE_ATTR(port_12_rxlos, S_IRUGO, show_port_rxlos, NULL, 11); +static SENSOR_DEVICE_ATTR(port_13_rxlos, S_IRUGO, show_port_rxlos, NULL, 12); +static SENSOR_DEVICE_ATTR(port_14_rxlos, S_IRUGO, show_port_rxlos, NULL, 13); +static SENSOR_DEVICE_ATTR(port_15_rxlos, S_IRUGO, show_port_rxlos, NULL, 14); +static SENSOR_DEVICE_ATTR(port_16_rxlos, S_IRUGO, show_port_rxlos, NULL, 15); +static SENSOR_DEVICE_ATTR(port_17_rxlos, S_IRUGO, show_port_rxlos, NULL, 16); +static SENSOR_DEVICE_ATTR(port_18_rxlos, S_IRUGO, show_port_rxlos, NULL, 17); +static SENSOR_DEVICE_ATTR(port_19_rxlos, S_IRUGO, show_port_rxlos, NULL, 18); +static SENSOR_DEVICE_ATTR(port_20_rxlos, S_IRUGO, show_port_rxlos, NULL, 19); +static SENSOR_DEVICE_ATTR(port_21_rxlos, S_IRUGO, show_port_rxlos, NULL, 20); +static SENSOR_DEVICE_ATTR(port_22_rxlos, S_IRUGO, show_port_rxlos, NULL, 21); +static SENSOR_DEVICE_ATTR(port_23_rxlos, S_IRUGO, show_port_rxlos, NULL, 22); +static SENSOR_DEVICE_ATTR(port_24_rxlos, S_IRUGO, show_port_rxlos, NULL, 23); +static SENSOR_DEVICE_ATTR(port_25_rxlos, S_IRUGO, show_port_rxlos, NULL, 24); +static SENSOR_DEVICE_ATTR(port_26_rxlos, S_IRUGO, show_port_rxlos, NULL, 25); +static SENSOR_DEVICE_ATTR(port_27_rxlos, S_IRUGO, show_port_rxlos, NULL, 26); +static SENSOR_DEVICE_ATTR(port_28_rxlos, S_IRUGO, show_port_rxlos, NULL, 27); +static SENSOR_DEVICE_ATTR(port_29_rxlos, S_IRUGO, show_port_rxlos, NULL, 28); +static SENSOR_DEVICE_ATTR(port_30_rxlos, S_IRUGO, show_port_rxlos, NULL, 29); +static SENSOR_DEVICE_ATTR(port_31_rxlos, S_IRUGO, show_port_rxlos, NULL, 30); +static SENSOR_DEVICE_ATTR(port_32_rxlos, S_IRUGO, show_port_rxlos, NULL, 31); +static SENSOR_DEVICE_ATTR(port_33_rxlos, S_IRUGO, show_port_rxlos, NULL, 32); +static SENSOR_DEVICE_ATTR(port_34_rxlos, S_IRUGO, show_port_rxlos, NULL, 33); +static SENSOR_DEVICE_ATTR(port_35_rxlos, S_IRUGO, show_port_rxlos, NULL, 34); +static SENSOR_DEVICE_ATTR(port_36_rxlos, S_IRUGO, show_port_rxlos, NULL, 35); +static SENSOR_DEVICE_ATTR(port_37_rxlos, S_IRUGO, show_port_rxlos, NULL, 36); +static SENSOR_DEVICE_ATTR(port_38_rxlos, S_IRUGO, show_port_rxlos, NULL, 37); +static SENSOR_DEVICE_ATTR(port_39_rxlos, S_IRUGO, show_port_rxlos, NULL, 38); +static SENSOR_DEVICE_ATTR(port_40_rxlos, S_IRUGO, show_port_rxlos, NULL, 39); +static SENSOR_DEVICE_ATTR(port_41_rxlos, S_IRUGO, show_port_rxlos, NULL, 40); +static SENSOR_DEVICE_ATTR(port_42_rxlos, S_IRUGO, show_port_rxlos, NULL, 41); +static SENSOR_DEVICE_ATTR(port_43_rxlos, S_IRUGO, show_port_rxlos, NULL, 42); +static SENSOR_DEVICE_ATTR(port_44_rxlos, S_IRUGO, show_port_rxlos, NULL, 43); +static SENSOR_DEVICE_ATTR(port_45_rxlos, S_IRUGO, show_port_rxlos, NULL, 44); +static SENSOR_DEVICE_ATTR(port_46_rxlos, S_IRUGO, show_port_rxlos, NULL, 45); +static SENSOR_DEVICE_ATTR(port_47_rxlos, S_IRUGO, show_port_rxlos, NULL, 46); +static SENSOR_DEVICE_ATTR(port_48_rxlos, S_IRUGO, show_port_rxlos, NULL, 47); + +static SENSOR_DEVICE_ATTR(port_1_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 0); +static SENSOR_DEVICE_ATTR(port_2_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 1); +static SENSOR_DEVICE_ATTR(port_3_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 2); +static SENSOR_DEVICE_ATTR(port_4_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 3); +static SENSOR_DEVICE_ATTR(port_5_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 4); +static SENSOR_DEVICE_ATTR(port_6_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 5); +static SENSOR_DEVICE_ATTR(port_7_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 6); +static SENSOR_DEVICE_ATTR(port_8_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 7); +static SENSOR_DEVICE_ATTR(port_9_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 8); +static SENSOR_DEVICE_ATTR(port_10_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 9); +static SENSOR_DEVICE_ATTR(port_11_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 10); +static SENSOR_DEVICE_ATTR(port_12_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 11); +static SENSOR_DEVICE_ATTR(port_13_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 12); +static SENSOR_DEVICE_ATTR(port_14_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 13); +static SENSOR_DEVICE_ATTR(port_15_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 14); +static SENSOR_DEVICE_ATTR(port_16_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 15); +static SENSOR_DEVICE_ATTR(port_17_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 16); +static SENSOR_DEVICE_ATTR(port_18_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 17); +static SENSOR_DEVICE_ATTR(port_19_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 18); +static SENSOR_DEVICE_ATTR(port_20_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 19); +static SENSOR_DEVICE_ATTR(port_21_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 20); +static SENSOR_DEVICE_ATTR(port_22_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 21); +static SENSOR_DEVICE_ATTR(port_23_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 22); +static SENSOR_DEVICE_ATTR(port_24_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 23); +static SENSOR_DEVICE_ATTR(port_25_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 24); +static SENSOR_DEVICE_ATTR(port_26_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 25); +static SENSOR_DEVICE_ATTR(port_27_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 26); +static SENSOR_DEVICE_ATTR(port_28_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 27); +static SENSOR_DEVICE_ATTR(port_29_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 28); +static SENSOR_DEVICE_ATTR(port_30_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 29); +static SENSOR_DEVICE_ATTR(port_31_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 30); +static SENSOR_DEVICE_ATTR(port_32_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 31); +static SENSOR_DEVICE_ATTR(port_33_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 32); +static SENSOR_DEVICE_ATTR(port_34_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 33); +static SENSOR_DEVICE_ATTR(port_35_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 34); +static SENSOR_DEVICE_ATTR(port_36_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 35); +static SENSOR_DEVICE_ATTR(port_37_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 36); +static SENSOR_DEVICE_ATTR(port_38_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 37); +static SENSOR_DEVICE_ATTR(port_39_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 38); +static SENSOR_DEVICE_ATTR(port_40_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 39); +static SENSOR_DEVICE_ATTR(port_41_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 40); +static SENSOR_DEVICE_ATTR(port_42_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 41); +static SENSOR_DEVICE_ATTR(port_43_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 42); +static SENSOR_DEVICE_ATTR(port_44_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 43); +static SENSOR_DEVICE_ATTR(port_45_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 44); +static SENSOR_DEVICE_ATTR(port_46_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 45); +static SENSOR_DEVICE_ATTR(port_47_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 46); +static SENSOR_DEVICE_ATTR(port_48_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 47); + +static SENSOR_DEVICE_ATTR(port_1_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 0); +static SENSOR_DEVICE_ATTR(port_2_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 1); +static SENSOR_DEVICE_ATTR(port_3_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 2); +static SENSOR_DEVICE_ATTR(port_4_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 3); +static SENSOR_DEVICE_ATTR(port_5_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 4); +static SENSOR_DEVICE_ATTR(port_6_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 5); +static SENSOR_DEVICE_ATTR(port_7_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 6); +static SENSOR_DEVICE_ATTR(port_8_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 7); +static SENSOR_DEVICE_ATTR(port_9_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 8); +static SENSOR_DEVICE_ATTR(port_10_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 9); +static SENSOR_DEVICE_ATTR(port_11_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 10); +static SENSOR_DEVICE_ATTR(port_12_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 11); +static SENSOR_DEVICE_ATTR(port_13_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 12); +static SENSOR_DEVICE_ATTR(port_14_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 13); +static SENSOR_DEVICE_ATTR(port_15_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 14); +static SENSOR_DEVICE_ATTR(port_16_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 15); +static SENSOR_DEVICE_ATTR(port_17_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 16); +static SENSOR_DEVICE_ATTR(port_18_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 17); +static SENSOR_DEVICE_ATTR(port_19_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 18); +static SENSOR_DEVICE_ATTR(port_20_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 19); +static SENSOR_DEVICE_ATTR(port_21_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 20); +static SENSOR_DEVICE_ATTR(port_22_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 21); +static SENSOR_DEVICE_ATTR(port_23_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 22); +static SENSOR_DEVICE_ATTR(port_24_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 23); +static SENSOR_DEVICE_ATTR(port_25_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 24); +static SENSOR_DEVICE_ATTR(port_26_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 25); +static SENSOR_DEVICE_ATTR(port_27_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 26); +static SENSOR_DEVICE_ATTR(port_28_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 27); +static SENSOR_DEVICE_ATTR(port_29_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 28); +static SENSOR_DEVICE_ATTR(port_30_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 29); +static SENSOR_DEVICE_ATTR(port_31_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 30); +static SENSOR_DEVICE_ATTR(port_32_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 31); +static SENSOR_DEVICE_ATTR(port_33_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 32); +static SENSOR_DEVICE_ATTR(port_34_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 33); +static SENSOR_DEVICE_ATTR(port_35_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 34); +static SENSOR_DEVICE_ATTR(port_36_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 35); +static SENSOR_DEVICE_ATTR(port_37_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 36); +static SENSOR_DEVICE_ATTR(port_38_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 37); +static SENSOR_DEVICE_ATTR(port_39_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 38); +static SENSOR_DEVICE_ATTR(port_40_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 39); +static SENSOR_DEVICE_ATTR(port_41_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 40); +static SENSOR_DEVICE_ATTR(port_42_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 41); +static SENSOR_DEVICE_ATTR(port_43_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 42); +static SENSOR_DEVICE_ATTR(port_44_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 43); +static SENSOR_DEVICE_ATTR(port_45_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 44); +static SENSOR_DEVICE_ATTR(port_46_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 45); +static SENSOR_DEVICE_ATTR(port_47_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 46); +static SENSOR_DEVICE_ATTR(port_48_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 47); + +static SENSOR_DEVICE_ATTR(fan1_abs, S_IRUGO, show_fan_abs, NULL, 0); +static SENSOR_DEVICE_ATTR(fan2_abs, S_IRUGO, show_fan_abs, NULL, 1); +static SENSOR_DEVICE_ATTR(fan3_abs, S_IRUGO, show_fan_abs, NULL, 2); +static SENSOR_DEVICE_ATTR(fan4_abs, S_IRUGO, show_fan_abs, NULL, 3); +static SENSOR_DEVICE_ATTR(fan5_abs, S_IRUGO, show_fan_abs, NULL, 4); + +static SENSOR_DEVICE_ATTR(fan1_dir, S_IRUGO, show_fan_dir, NULL, 0); +static SENSOR_DEVICE_ATTR(fan2_dir, S_IRUGO, show_fan_dir, NULL, 1); +static SENSOR_DEVICE_ATTR(fan3_dir, S_IRUGO, show_fan_dir, NULL, 2); +static SENSOR_DEVICE_ATTR(fan4_dir, S_IRUGO, show_fan_dir, NULL, 3); +static SENSOR_DEVICE_ATTR(fan5_dir, S_IRUGO, show_fan_dir, NULL, 4); + +static SENSOR_DEVICE_ATTR(psu1_eeprom, S_IRUGO, show_psu_eeprom, NULL, 0); +static SENSOR_DEVICE_ATTR(psu2_eeprom, S_IRUGO, show_psu_eeprom, NULL, 1); + +static SENSOR_DEVICE_ATTR(psu1_vout, S_IRUGO, show_psu_vout, NULL, 0); +static SENSOR_DEVICE_ATTR(psu1_iout, S_IRUGO, show_psu_iout, NULL, 0); +static SENSOR_DEVICE_ATTR(psu1_temp_1, S_IRUGO, show_psu_temp_1, NULL, 0); +static SENSOR_DEVICE_ATTR(psu1_temp_2, S_IRUGO, show_psu_temp_2, NULL, 0); +static SENSOR_DEVICE_ATTR(psu1_fan_speed, S_IRUGO, show_psu_fan_speed, NULL, 0); +static SENSOR_DEVICE_ATTR(psu1_pout, S_IRUGO, show_psu_pout, NULL, 0); +static SENSOR_DEVICE_ATTR(psu1_pin, S_IRUGO, show_psu_pin, NULL, 0); + +static SENSOR_DEVICE_ATTR(psu2_vout, S_IRUGO, show_psu_vout, NULL, 1); +static SENSOR_DEVICE_ATTR(psu2_iout, S_IRUGO, show_psu_iout, NULL, 1); +static SENSOR_DEVICE_ATTR(psu2_temp_1, S_IRUGO, show_psu_temp_1, NULL, 1); +static SENSOR_DEVICE_ATTR(psu2_temp_2, S_IRUGO, show_psu_temp_2, NULL, 1); +static SENSOR_DEVICE_ATTR(psu2_fan_speed, S_IRUGO, show_psu_fan_speed, NULL, 1); +static SENSOR_DEVICE_ATTR(psu2_pout, S_IRUGO, show_psu_pout, NULL, 1); +static SENSOR_DEVICE_ATTR(psu2_pin, S_IRUGO, show_psu_pin, NULL, 1); + +static DEVICE_ATTR(psu_power_off, S_IWUSR, NULL, set_psu_power_off); + +static struct attribute *i2c_bus1_hardware_monitor_attr_huracan[] = { + &dev_attr_eeprom.attr, + &dev_attr_system_led.attr, + + &sensor_dev_attr_port_1_data_a0.dev_attr.attr, + &sensor_dev_attr_port_2_data_a0.dev_attr.attr, + &sensor_dev_attr_port_3_data_a0.dev_attr.attr, + &sensor_dev_attr_port_4_data_a0.dev_attr.attr, + &sensor_dev_attr_port_5_data_a0.dev_attr.attr, + &sensor_dev_attr_port_6_data_a0.dev_attr.attr, + &sensor_dev_attr_port_7_data_a0.dev_attr.attr, + &sensor_dev_attr_port_8_data_a0.dev_attr.attr, + &sensor_dev_attr_port_9_data_a0.dev_attr.attr, + &sensor_dev_attr_port_10_data_a0.dev_attr.attr, + &sensor_dev_attr_port_11_data_a0.dev_attr.attr, + &sensor_dev_attr_port_12_data_a0.dev_attr.attr, + &sensor_dev_attr_port_13_data_a0.dev_attr.attr, + &sensor_dev_attr_port_14_data_a0.dev_attr.attr, + &sensor_dev_attr_port_15_data_a0.dev_attr.attr, + &sensor_dev_attr_port_16_data_a0.dev_attr.attr, + &sensor_dev_attr_port_17_data_a0.dev_attr.attr, + &sensor_dev_attr_port_18_data_a0.dev_attr.attr, + &sensor_dev_attr_port_19_data_a0.dev_attr.attr, + &sensor_dev_attr_port_20_data_a0.dev_attr.attr, + &sensor_dev_attr_port_21_data_a0.dev_attr.attr, + &sensor_dev_attr_port_22_data_a0.dev_attr.attr, + &sensor_dev_attr_port_23_data_a0.dev_attr.attr, + &sensor_dev_attr_port_24_data_a0.dev_attr.attr, + &sensor_dev_attr_port_25_data_a0.dev_attr.attr, + &sensor_dev_attr_port_26_data_a0.dev_attr.attr, + &sensor_dev_attr_port_27_data_a0.dev_attr.attr, + &sensor_dev_attr_port_28_data_a0.dev_attr.attr, + &sensor_dev_attr_port_29_data_a0.dev_attr.attr, + &sensor_dev_attr_port_30_data_a0.dev_attr.attr, + &sensor_dev_attr_port_31_data_a0.dev_attr.attr, + &sensor_dev_attr_port_32_data_a0.dev_attr.attr, + + &sensor_dev_attr_port_1_data_a2.dev_attr.attr, + &sensor_dev_attr_port_2_data_a2.dev_attr.attr, + &sensor_dev_attr_port_3_data_a2.dev_attr.attr, + &sensor_dev_attr_port_4_data_a2.dev_attr.attr, + &sensor_dev_attr_port_5_data_a2.dev_attr.attr, + &sensor_dev_attr_port_6_data_a2.dev_attr.attr, + &sensor_dev_attr_port_7_data_a2.dev_attr.attr, + &sensor_dev_attr_port_8_data_a2.dev_attr.attr, + &sensor_dev_attr_port_9_data_a2.dev_attr.attr, + &sensor_dev_attr_port_10_data_a2.dev_attr.attr, + &sensor_dev_attr_port_11_data_a2.dev_attr.attr, + &sensor_dev_attr_port_12_data_a2.dev_attr.attr, + &sensor_dev_attr_port_13_data_a2.dev_attr.attr, + &sensor_dev_attr_port_14_data_a2.dev_attr.attr, + &sensor_dev_attr_port_15_data_a2.dev_attr.attr, + &sensor_dev_attr_port_16_data_a2.dev_attr.attr, + &sensor_dev_attr_port_17_data_a2.dev_attr.attr, + &sensor_dev_attr_port_18_data_a2.dev_attr.attr, + &sensor_dev_attr_port_19_data_a2.dev_attr.attr, + &sensor_dev_attr_port_20_data_a2.dev_attr.attr, + &sensor_dev_attr_port_21_data_a2.dev_attr.attr, + &sensor_dev_attr_port_22_data_a2.dev_attr.attr, + &sensor_dev_attr_port_23_data_a2.dev_attr.attr, + &sensor_dev_attr_port_24_data_a2.dev_attr.attr, + &sensor_dev_attr_port_25_data_a2.dev_attr.attr, + &sensor_dev_attr_port_26_data_a2.dev_attr.attr, + &sensor_dev_attr_port_27_data_a2.dev_attr.attr, + &sensor_dev_attr_port_28_data_a2.dev_attr.attr, + &sensor_dev_attr_port_29_data_a2.dev_attr.attr, + &sensor_dev_attr_port_30_data_a2.dev_attr.attr, + &sensor_dev_attr_port_31_data_a2.dev_attr.attr, + &sensor_dev_attr_port_32_data_a2.dev_attr.attr, + + &sensor_dev_attr_port_1_abs.dev_attr.attr, + &sensor_dev_attr_port_2_abs.dev_attr.attr, + &sensor_dev_attr_port_3_abs.dev_attr.attr, + &sensor_dev_attr_port_4_abs.dev_attr.attr, + &sensor_dev_attr_port_5_abs.dev_attr.attr, + &sensor_dev_attr_port_6_abs.dev_attr.attr, + &sensor_dev_attr_port_7_abs.dev_attr.attr, + &sensor_dev_attr_port_8_abs.dev_attr.attr, + &sensor_dev_attr_port_9_abs.dev_attr.attr, + &sensor_dev_attr_port_10_abs.dev_attr.attr, + &sensor_dev_attr_port_11_abs.dev_attr.attr, + &sensor_dev_attr_port_12_abs.dev_attr.attr, + &sensor_dev_attr_port_13_abs.dev_attr.attr, + &sensor_dev_attr_port_14_abs.dev_attr.attr, + &sensor_dev_attr_port_15_abs.dev_attr.attr, + &sensor_dev_attr_port_16_abs.dev_attr.attr, + &sensor_dev_attr_port_17_abs.dev_attr.attr, + &sensor_dev_attr_port_18_abs.dev_attr.attr, + &sensor_dev_attr_port_19_abs.dev_attr.attr, + &sensor_dev_attr_port_20_abs.dev_attr.attr, + &sensor_dev_attr_port_21_abs.dev_attr.attr, + &sensor_dev_attr_port_22_abs.dev_attr.attr, + &sensor_dev_attr_port_23_abs.dev_attr.attr, + &sensor_dev_attr_port_24_abs.dev_attr.attr, + &sensor_dev_attr_port_25_abs.dev_attr.attr, + &sensor_dev_attr_port_26_abs.dev_attr.attr, + &sensor_dev_attr_port_27_abs.dev_attr.attr, + &sensor_dev_attr_port_28_abs.dev_attr.attr, + &sensor_dev_attr_port_29_abs.dev_attr.attr, + &sensor_dev_attr_port_30_abs.dev_attr.attr, + &sensor_dev_attr_port_31_abs.dev_attr.attr, + &sensor_dev_attr_port_32_abs.dev_attr.attr, + + &sensor_dev_attr_fan1_abs.dev_attr.attr, + &sensor_dev_attr_fan2_abs.dev_attr.attr, + &sensor_dev_attr_fan3_abs.dev_attr.attr, + &sensor_dev_attr_fan4_abs.dev_attr.attr, + + &sensor_dev_attr_fan1_dir.dev_attr.attr, + &sensor_dev_attr_fan2_dir.dev_attr.attr, + &sensor_dev_attr_fan3_dir.dev_attr.attr, + &sensor_dev_attr_fan4_dir.dev_attr.attr, + + &sensor_dev_attr_psu1_eeprom.dev_attr.attr, + &sensor_dev_attr_psu2_eeprom.dev_attr.attr, + + &sensor_dev_attr_psu1_vout.dev_attr.attr, + &sensor_dev_attr_psu1_iout.dev_attr.attr, + &sensor_dev_attr_psu1_temp_1.dev_attr.attr, + &sensor_dev_attr_psu1_temp_2.dev_attr.attr, + &sensor_dev_attr_psu1_fan_speed.dev_attr.attr, + &sensor_dev_attr_psu1_pout.dev_attr.attr, + &sensor_dev_attr_psu1_pin.dev_attr.attr, + + &sensor_dev_attr_psu2_vout.dev_attr.attr, + &sensor_dev_attr_psu2_iout.dev_attr.attr, + &sensor_dev_attr_psu2_temp_1.dev_attr.attr, + &sensor_dev_attr_psu2_temp_2.dev_attr.attr, + &sensor_dev_attr_psu2_fan_speed.dev_attr.attr, + &sensor_dev_attr_psu2_pout.dev_attr.attr, + &sensor_dev_attr_psu2_pin.dev_attr.attr, + + &dev_attr_psu_power_off.attr, + + NULL +}; + +static struct attribute *i2c_bus1_hardware_monitor_attr_sesto[] = { + &dev_attr_eeprom.attr, + &dev_attr_system_led.attr, + + &sensor_dev_attr_port_1_data_a0.dev_attr.attr, + &sensor_dev_attr_port_2_data_a0.dev_attr.attr, + &sensor_dev_attr_port_3_data_a0.dev_attr.attr, + &sensor_dev_attr_port_4_data_a0.dev_attr.attr, + &sensor_dev_attr_port_5_data_a0.dev_attr.attr, + &sensor_dev_attr_port_6_data_a0.dev_attr.attr, + &sensor_dev_attr_port_7_data_a0.dev_attr.attr, + &sensor_dev_attr_port_8_data_a0.dev_attr.attr, + &sensor_dev_attr_port_9_data_a0.dev_attr.attr, + &sensor_dev_attr_port_10_data_a0.dev_attr.attr, + &sensor_dev_attr_port_11_data_a0.dev_attr.attr, + &sensor_dev_attr_port_12_data_a0.dev_attr.attr, + &sensor_dev_attr_port_13_data_a0.dev_attr.attr, + &sensor_dev_attr_port_14_data_a0.dev_attr.attr, + &sensor_dev_attr_port_15_data_a0.dev_attr.attr, + &sensor_dev_attr_port_16_data_a0.dev_attr.attr, + &sensor_dev_attr_port_17_data_a0.dev_attr.attr, + &sensor_dev_attr_port_18_data_a0.dev_attr.attr, + &sensor_dev_attr_port_19_data_a0.dev_attr.attr, + &sensor_dev_attr_port_20_data_a0.dev_attr.attr, + &sensor_dev_attr_port_21_data_a0.dev_attr.attr, + &sensor_dev_attr_port_22_data_a0.dev_attr.attr, + &sensor_dev_attr_port_23_data_a0.dev_attr.attr, + &sensor_dev_attr_port_24_data_a0.dev_attr.attr, + &sensor_dev_attr_port_25_data_a0.dev_attr.attr, + &sensor_dev_attr_port_26_data_a0.dev_attr.attr, + &sensor_dev_attr_port_27_data_a0.dev_attr.attr, + &sensor_dev_attr_port_28_data_a0.dev_attr.attr, + &sensor_dev_attr_port_29_data_a0.dev_attr.attr, + &sensor_dev_attr_port_30_data_a0.dev_attr.attr, + &sensor_dev_attr_port_31_data_a0.dev_attr.attr, + &sensor_dev_attr_port_32_data_a0.dev_attr.attr, + &sensor_dev_attr_port_33_data_a0.dev_attr.attr, + &sensor_dev_attr_port_34_data_a0.dev_attr.attr, + &sensor_dev_attr_port_35_data_a0.dev_attr.attr, + &sensor_dev_attr_port_36_data_a0.dev_attr.attr, + &sensor_dev_attr_port_37_data_a0.dev_attr.attr, + &sensor_dev_attr_port_38_data_a0.dev_attr.attr, + &sensor_dev_attr_port_39_data_a0.dev_attr.attr, + &sensor_dev_attr_port_40_data_a0.dev_attr.attr, + &sensor_dev_attr_port_41_data_a0.dev_attr.attr, + &sensor_dev_attr_port_42_data_a0.dev_attr.attr, + &sensor_dev_attr_port_43_data_a0.dev_attr.attr, + &sensor_dev_attr_port_44_data_a0.dev_attr.attr, + &sensor_dev_attr_port_45_data_a0.dev_attr.attr, + &sensor_dev_attr_port_46_data_a0.dev_attr.attr, + &sensor_dev_attr_port_47_data_a0.dev_attr.attr, + &sensor_dev_attr_port_48_data_a0.dev_attr.attr, + &sensor_dev_attr_port_49_data_a0.dev_attr.attr, + &sensor_dev_attr_port_50_data_a0.dev_attr.attr, + &sensor_dev_attr_port_51_data_a0.dev_attr.attr, + &sensor_dev_attr_port_52_data_a0.dev_attr.attr, + &sensor_dev_attr_port_53_data_a0.dev_attr.attr, + &sensor_dev_attr_port_54_data_a0.dev_attr.attr, + + &sensor_dev_attr_port_1_data_a2.dev_attr.attr, + &sensor_dev_attr_port_2_data_a2.dev_attr.attr, + &sensor_dev_attr_port_3_data_a2.dev_attr.attr, + &sensor_dev_attr_port_4_data_a2.dev_attr.attr, + &sensor_dev_attr_port_5_data_a2.dev_attr.attr, + &sensor_dev_attr_port_6_data_a2.dev_attr.attr, + &sensor_dev_attr_port_7_data_a2.dev_attr.attr, + &sensor_dev_attr_port_8_data_a2.dev_attr.attr, + &sensor_dev_attr_port_9_data_a2.dev_attr.attr, + &sensor_dev_attr_port_10_data_a2.dev_attr.attr, + &sensor_dev_attr_port_11_data_a2.dev_attr.attr, + &sensor_dev_attr_port_12_data_a2.dev_attr.attr, + &sensor_dev_attr_port_13_data_a2.dev_attr.attr, + &sensor_dev_attr_port_14_data_a2.dev_attr.attr, + &sensor_dev_attr_port_15_data_a2.dev_attr.attr, + &sensor_dev_attr_port_16_data_a2.dev_attr.attr, + &sensor_dev_attr_port_17_data_a2.dev_attr.attr, + &sensor_dev_attr_port_18_data_a2.dev_attr.attr, + &sensor_dev_attr_port_19_data_a2.dev_attr.attr, + &sensor_dev_attr_port_20_data_a2.dev_attr.attr, + &sensor_dev_attr_port_21_data_a2.dev_attr.attr, + &sensor_dev_attr_port_22_data_a2.dev_attr.attr, + &sensor_dev_attr_port_23_data_a2.dev_attr.attr, + &sensor_dev_attr_port_24_data_a2.dev_attr.attr, + &sensor_dev_attr_port_25_data_a2.dev_attr.attr, + &sensor_dev_attr_port_26_data_a2.dev_attr.attr, + &sensor_dev_attr_port_27_data_a2.dev_attr.attr, + &sensor_dev_attr_port_28_data_a2.dev_attr.attr, + &sensor_dev_attr_port_29_data_a2.dev_attr.attr, + &sensor_dev_attr_port_30_data_a2.dev_attr.attr, + &sensor_dev_attr_port_31_data_a2.dev_attr.attr, + &sensor_dev_attr_port_32_data_a2.dev_attr.attr, + &sensor_dev_attr_port_33_data_a2.dev_attr.attr, + &sensor_dev_attr_port_34_data_a2.dev_attr.attr, + &sensor_dev_attr_port_35_data_a2.dev_attr.attr, + &sensor_dev_attr_port_36_data_a2.dev_attr.attr, + &sensor_dev_attr_port_37_data_a2.dev_attr.attr, + &sensor_dev_attr_port_38_data_a2.dev_attr.attr, + &sensor_dev_attr_port_39_data_a2.dev_attr.attr, + &sensor_dev_attr_port_40_data_a2.dev_attr.attr, + &sensor_dev_attr_port_41_data_a2.dev_attr.attr, + &sensor_dev_attr_port_42_data_a2.dev_attr.attr, + &sensor_dev_attr_port_43_data_a2.dev_attr.attr, + &sensor_dev_attr_port_44_data_a2.dev_attr.attr, + &sensor_dev_attr_port_45_data_a2.dev_attr.attr, + &sensor_dev_attr_port_46_data_a2.dev_attr.attr, + &sensor_dev_attr_port_47_data_a2.dev_attr.attr, + &sensor_dev_attr_port_48_data_a2.dev_attr.attr, + &sensor_dev_attr_port_49_data_a2.dev_attr.attr, + &sensor_dev_attr_port_50_data_a2.dev_attr.attr, + &sensor_dev_attr_port_51_data_a2.dev_attr.attr, + &sensor_dev_attr_port_52_data_a2.dev_attr.attr, + &sensor_dev_attr_port_53_data_a2.dev_attr.attr, + &sensor_dev_attr_port_54_data_a2.dev_attr.attr, + + &sensor_dev_attr_port_1_abs.dev_attr.attr, + &sensor_dev_attr_port_2_abs.dev_attr.attr, + &sensor_dev_attr_port_3_abs.dev_attr.attr, + &sensor_dev_attr_port_4_abs.dev_attr.attr, + &sensor_dev_attr_port_5_abs.dev_attr.attr, + &sensor_dev_attr_port_6_abs.dev_attr.attr, + &sensor_dev_attr_port_7_abs.dev_attr.attr, + &sensor_dev_attr_port_8_abs.dev_attr.attr, + &sensor_dev_attr_port_9_abs.dev_attr.attr, + &sensor_dev_attr_port_10_abs.dev_attr.attr, + &sensor_dev_attr_port_11_abs.dev_attr.attr, + &sensor_dev_attr_port_12_abs.dev_attr.attr, + &sensor_dev_attr_port_13_abs.dev_attr.attr, + &sensor_dev_attr_port_14_abs.dev_attr.attr, + &sensor_dev_attr_port_15_abs.dev_attr.attr, + &sensor_dev_attr_port_16_abs.dev_attr.attr, + &sensor_dev_attr_port_17_abs.dev_attr.attr, + &sensor_dev_attr_port_18_abs.dev_attr.attr, + &sensor_dev_attr_port_19_abs.dev_attr.attr, + &sensor_dev_attr_port_20_abs.dev_attr.attr, + &sensor_dev_attr_port_21_abs.dev_attr.attr, + &sensor_dev_attr_port_22_abs.dev_attr.attr, + &sensor_dev_attr_port_23_abs.dev_attr.attr, + &sensor_dev_attr_port_24_abs.dev_attr.attr, + &sensor_dev_attr_port_25_abs.dev_attr.attr, + &sensor_dev_attr_port_26_abs.dev_attr.attr, + &sensor_dev_attr_port_27_abs.dev_attr.attr, + &sensor_dev_attr_port_28_abs.dev_attr.attr, + &sensor_dev_attr_port_29_abs.dev_attr.attr, + &sensor_dev_attr_port_30_abs.dev_attr.attr, + &sensor_dev_attr_port_31_abs.dev_attr.attr, + &sensor_dev_attr_port_32_abs.dev_attr.attr, + &sensor_dev_attr_port_33_abs.dev_attr.attr, + &sensor_dev_attr_port_34_abs.dev_attr.attr, + &sensor_dev_attr_port_35_abs.dev_attr.attr, + &sensor_dev_attr_port_36_abs.dev_attr.attr, + &sensor_dev_attr_port_37_abs.dev_attr.attr, + &sensor_dev_attr_port_38_abs.dev_attr.attr, + &sensor_dev_attr_port_39_abs.dev_attr.attr, + &sensor_dev_attr_port_40_abs.dev_attr.attr, + &sensor_dev_attr_port_41_abs.dev_attr.attr, + &sensor_dev_attr_port_42_abs.dev_attr.attr, + &sensor_dev_attr_port_43_abs.dev_attr.attr, + &sensor_dev_attr_port_44_abs.dev_attr.attr, + &sensor_dev_attr_port_45_abs.dev_attr.attr, + &sensor_dev_attr_port_46_abs.dev_attr.attr, + &sensor_dev_attr_port_47_abs.dev_attr.attr, + &sensor_dev_attr_port_48_abs.dev_attr.attr, + &sensor_dev_attr_port_49_abs.dev_attr.attr, + &sensor_dev_attr_port_50_abs.dev_attr.attr, + &sensor_dev_attr_port_51_abs.dev_attr.attr, + &sensor_dev_attr_port_52_abs.dev_attr.attr, + &sensor_dev_attr_port_53_abs.dev_attr.attr, + &sensor_dev_attr_port_54_abs.dev_attr.attr, + + &sensor_dev_attr_port_1_rxlos.dev_attr.attr, + &sensor_dev_attr_port_2_rxlos.dev_attr.attr, + &sensor_dev_attr_port_3_rxlos.dev_attr.attr, + &sensor_dev_attr_port_4_rxlos.dev_attr.attr, + &sensor_dev_attr_port_5_rxlos.dev_attr.attr, + &sensor_dev_attr_port_6_rxlos.dev_attr.attr, + &sensor_dev_attr_port_7_rxlos.dev_attr.attr, + &sensor_dev_attr_port_8_rxlos.dev_attr.attr, + &sensor_dev_attr_port_9_rxlos.dev_attr.attr, + &sensor_dev_attr_port_10_rxlos.dev_attr.attr, + &sensor_dev_attr_port_11_rxlos.dev_attr.attr, + &sensor_dev_attr_port_12_rxlos.dev_attr.attr, + &sensor_dev_attr_port_13_rxlos.dev_attr.attr, + &sensor_dev_attr_port_14_rxlos.dev_attr.attr, + &sensor_dev_attr_port_15_rxlos.dev_attr.attr, + &sensor_dev_attr_port_16_rxlos.dev_attr.attr, + &sensor_dev_attr_port_17_rxlos.dev_attr.attr, + &sensor_dev_attr_port_18_rxlos.dev_attr.attr, + &sensor_dev_attr_port_19_rxlos.dev_attr.attr, + &sensor_dev_attr_port_20_rxlos.dev_attr.attr, + &sensor_dev_attr_port_21_rxlos.dev_attr.attr, + &sensor_dev_attr_port_22_rxlos.dev_attr.attr, + &sensor_dev_attr_port_23_rxlos.dev_attr.attr, + &sensor_dev_attr_port_24_rxlos.dev_attr.attr, + &sensor_dev_attr_port_25_rxlos.dev_attr.attr, + &sensor_dev_attr_port_26_rxlos.dev_attr.attr, + &sensor_dev_attr_port_27_rxlos.dev_attr.attr, + &sensor_dev_attr_port_28_rxlos.dev_attr.attr, + &sensor_dev_attr_port_29_rxlos.dev_attr.attr, + &sensor_dev_attr_port_30_rxlos.dev_attr.attr, + &sensor_dev_attr_port_31_rxlos.dev_attr.attr, + &sensor_dev_attr_port_32_rxlos.dev_attr.attr, + &sensor_dev_attr_port_33_rxlos.dev_attr.attr, + &sensor_dev_attr_port_34_rxlos.dev_attr.attr, + &sensor_dev_attr_port_35_rxlos.dev_attr.attr, + &sensor_dev_attr_port_36_rxlos.dev_attr.attr, + &sensor_dev_attr_port_37_rxlos.dev_attr.attr, + &sensor_dev_attr_port_38_rxlos.dev_attr.attr, + &sensor_dev_attr_port_39_rxlos.dev_attr.attr, + &sensor_dev_attr_port_40_rxlos.dev_attr.attr, + &sensor_dev_attr_port_41_rxlos.dev_attr.attr, + &sensor_dev_attr_port_42_rxlos.dev_attr.attr, + &sensor_dev_attr_port_43_rxlos.dev_attr.attr, + &sensor_dev_attr_port_44_rxlos.dev_attr.attr, + &sensor_dev_attr_port_45_rxlos.dev_attr.attr, + &sensor_dev_attr_port_46_rxlos.dev_attr.attr, + &sensor_dev_attr_port_47_rxlos.dev_attr.attr, + &sensor_dev_attr_port_48_rxlos.dev_attr.attr, + + &sensor_dev_attr_port_1_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_2_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_3_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_4_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_5_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_6_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_7_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_8_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_9_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_10_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_11_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_12_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_13_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_14_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_15_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_16_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_17_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_18_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_19_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_20_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_21_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_22_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_23_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_24_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_25_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_26_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_27_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_28_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_29_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_30_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_31_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_32_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_33_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_34_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_35_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_36_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_37_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_38_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_39_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_40_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_41_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_42_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_43_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_44_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_45_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_46_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_47_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_48_tx_disable.dev_attr.attr, + + &sensor_dev_attr_port_1_rate_select.dev_attr.attr, + &sensor_dev_attr_port_2_rate_select.dev_attr.attr, + &sensor_dev_attr_port_3_rate_select.dev_attr.attr, + &sensor_dev_attr_port_4_rate_select.dev_attr.attr, + &sensor_dev_attr_port_5_rate_select.dev_attr.attr, + &sensor_dev_attr_port_6_rate_select.dev_attr.attr, + &sensor_dev_attr_port_7_rate_select.dev_attr.attr, + &sensor_dev_attr_port_8_rate_select.dev_attr.attr, + &sensor_dev_attr_port_9_rate_select.dev_attr.attr, + &sensor_dev_attr_port_10_rate_select.dev_attr.attr, + &sensor_dev_attr_port_11_rate_select.dev_attr.attr, + &sensor_dev_attr_port_12_rate_select.dev_attr.attr, + &sensor_dev_attr_port_13_rate_select.dev_attr.attr, + &sensor_dev_attr_port_14_rate_select.dev_attr.attr, + &sensor_dev_attr_port_15_rate_select.dev_attr.attr, + &sensor_dev_attr_port_16_rate_select.dev_attr.attr, + &sensor_dev_attr_port_17_rate_select.dev_attr.attr, + &sensor_dev_attr_port_18_rate_select.dev_attr.attr, + &sensor_dev_attr_port_19_rate_select.dev_attr.attr, + &sensor_dev_attr_port_20_rate_select.dev_attr.attr, + &sensor_dev_attr_port_21_rate_select.dev_attr.attr, + &sensor_dev_attr_port_22_rate_select.dev_attr.attr, + &sensor_dev_attr_port_23_rate_select.dev_attr.attr, + &sensor_dev_attr_port_24_rate_select.dev_attr.attr, + &sensor_dev_attr_port_25_rate_select.dev_attr.attr, + &sensor_dev_attr_port_26_rate_select.dev_attr.attr, + &sensor_dev_attr_port_27_rate_select.dev_attr.attr, + &sensor_dev_attr_port_28_rate_select.dev_attr.attr, + &sensor_dev_attr_port_29_rate_select.dev_attr.attr, + &sensor_dev_attr_port_30_rate_select.dev_attr.attr, + &sensor_dev_attr_port_31_rate_select.dev_attr.attr, + &sensor_dev_attr_port_32_rate_select.dev_attr.attr, + &sensor_dev_attr_port_33_rate_select.dev_attr.attr, + &sensor_dev_attr_port_34_rate_select.dev_attr.attr, + &sensor_dev_attr_port_35_rate_select.dev_attr.attr, + &sensor_dev_attr_port_36_rate_select.dev_attr.attr, + &sensor_dev_attr_port_37_rate_select.dev_attr.attr, + &sensor_dev_attr_port_38_rate_select.dev_attr.attr, + &sensor_dev_attr_port_39_rate_select.dev_attr.attr, + &sensor_dev_attr_port_40_rate_select.dev_attr.attr, + &sensor_dev_attr_port_41_rate_select.dev_attr.attr, + &sensor_dev_attr_port_42_rate_select.dev_attr.attr, + &sensor_dev_attr_port_43_rate_select.dev_attr.attr, + &sensor_dev_attr_port_44_rate_select.dev_attr.attr, + &sensor_dev_attr_port_45_rate_select.dev_attr.attr, + &sensor_dev_attr_port_46_rate_select.dev_attr.attr, + &sensor_dev_attr_port_47_rate_select.dev_attr.attr, + &sensor_dev_attr_port_48_rate_select.dev_attr.attr, + + &sensor_dev_attr_fan1_abs.dev_attr.attr, + &sensor_dev_attr_fan2_abs.dev_attr.attr, + &sensor_dev_attr_fan3_abs.dev_attr.attr, + &sensor_dev_attr_fan4_abs.dev_attr.attr, + + &sensor_dev_attr_fan1_dir.dev_attr.attr, + &sensor_dev_attr_fan2_dir.dev_attr.attr, + &sensor_dev_attr_fan3_dir.dev_attr.attr, + &sensor_dev_attr_fan4_dir.dev_attr.attr, + + &sensor_dev_attr_psu1_eeprom.dev_attr.attr, + &sensor_dev_attr_psu2_eeprom.dev_attr.attr, + + &sensor_dev_attr_psu1_vout.dev_attr.attr, + &sensor_dev_attr_psu1_iout.dev_attr.attr, + &sensor_dev_attr_psu1_temp_1.dev_attr.attr, + &sensor_dev_attr_psu1_temp_2.dev_attr.attr, + &sensor_dev_attr_psu1_fan_speed.dev_attr.attr, + &sensor_dev_attr_psu1_pout.dev_attr.attr, + &sensor_dev_attr_psu1_pin.dev_attr.attr, + + &sensor_dev_attr_psu2_vout.dev_attr.attr, + &sensor_dev_attr_psu2_iout.dev_attr.attr, + &sensor_dev_attr_psu2_temp_1.dev_attr.attr, + &sensor_dev_attr_psu2_temp_2.dev_attr.attr, + &sensor_dev_attr_psu2_fan_speed.dev_attr.attr, + &sensor_dev_attr_psu2_pout.dev_attr.attr, + &sensor_dev_attr_psu2_pin.dev_attr.attr, + + &dev_attr_psu_power_off.attr, + + NULL +}; + +static struct attribute *i2c_bus1_hardware_monitor_attr_nc2x[] = { + &dev_attr_eeprom.attr, + &dev_attr_system_led.attr, + + &sensor_dev_attr_port_1_data_a0.dev_attr.attr, + &sensor_dev_attr_port_2_data_a0.dev_attr.attr, + &sensor_dev_attr_port_3_data_a0.dev_attr.attr, + &sensor_dev_attr_port_4_data_a0.dev_attr.attr, + &sensor_dev_attr_port_5_data_a0.dev_attr.attr, + &sensor_dev_attr_port_6_data_a0.dev_attr.attr, + &sensor_dev_attr_port_7_data_a0.dev_attr.attr, + &sensor_dev_attr_port_8_data_a0.dev_attr.attr, + &sensor_dev_attr_port_9_data_a0.dev_attr.attr, + &sensor_dev_attr_port_10_data_a0.dev_attr.attr, + &sensor_dev_attr_port_11_data_a0.dev_attr.attr, + &sensor_dev_attr_port_12_data_a0.dev_attr.attr, + &sensor_dev_attr_port_13_data_a0.dev_attr.attr, + &sensor_dev_attr_port_14_data_a0.dev_attr.attr, + &sensor_dev_attr_port_15_data_a0.dev_attr.attr, + &sensor_dev_attr_port_16_data_a0.dev_attr.attr, + &sensor_dev_attr_port_17_data_a0.dev_attr.attr, + &sensor_dev_attr_port_18_data_a0.dev_attr.attr, + &sensor_dev_attr_port_19_data_a0.dev_attr.attr, + &sensor_dev_attr_port_20_data_a0.dev_attr.attr, + &sensor_dev_attr_port_21_data_a0.dev_attr.attr, + &sensor_dev_attr_port_22_data_a0.dev_attr.attr, + &sensor_dev_attr_port_23_data_a0.dev_attr.attr, + &sensor_dev_attr_port_24_data_a0.dev_attr.attr, + &sensor_dev_attr_port_25_data_a0.dev_attr.attr, + &sensor_dev_attr_port_26_data_a0.dev_attr.attr, + &sensor_dev_attr_port_27_data_a0.dev_attr.attr, + &sensor_dev_attr_port_28_data_a0.dev_attr.attr, + &sensor_dev_attr_port_29_data_a0.dev_attr.attr, + &sensor_dev_attr_port_30_data_a0.dev_attr.attr, + &sensor_dev_attr_port_31_data_a0.dev_attr.attr, + &sensor_dev_attr_port_32_data_a0.dev_attr.attr, + &sensor_dev_attr_port_33_data_a0.dev_attr.attr, + &sensor_dev_attr_port_34_data_a0.dev_attr.attr, + &sensor_dev_attr_port_35_data_a0.dev_attr.attr, + &sensor_dev_attr_port_36_data_a0.dev_attr.attr, + &sensor_dev_attr_port_37_data_a0.dev_attr.attr, + &sensor_dev_attr_port_38_data_a0.dev_attr.attr, + &sensor_dev_attr_port_39_data_a0.dev_attr.attr, + &sensor_dev_attr_port_40_data_a0.dev_attr.attr, + &sensor_dev_attr_port_41_data_a0.dev_attr.attr, + &sensor_dev_attr_port_42_data_a0.dev_attr.attr, + &sensor_dev_attr_port_43_data_a0.dev_attr.attr, + &sensor_dev_attr_port_44_data_a0.dev_attr.attr, + &sensor_dev_attr_port_45_data_a0.dev_attr.attr, + &sensor_dev_attr_port_46_data_a0.dev_attr.attr, + &sensor_dev_attr_port_47_data_a0.dev_attr.attr, + &sensor_dev_attr_port_48_data_a0.dev_attr.attr, + &sensor_dev_attr_port_49_data_a0.dev_attr.attr, + &sensor_dev_attr_port_50_data_a0.dev_attr.attr, + &sensor_dev_attr_port_51_data_a0.dev_attr.attr, + &sensor_dev_attr_port_52_data_a0.dev_attr.attr, + &sensor_dev_attr_port_53_data_a0.dev_attr.attr, + &sensor_dev_attr_port_54_data_a0.dev_attr.attr, + + &sensor_dev_attr_port_1_data_a2.dev_attr.attr, + &sensor_dev_attr_port_2_data_a2.dev_attr.attr, + &sensor_dev_attr_port_3_data_a2.dev_attr.attr, + &sensor_dev_attr_port_4_data_a2.dev_attr.attr, + &sensor_dev_attr_port_5_data_a2.dev_attr.attr, + &sensor_dev_attr_port_6_data_a2.dev_attr.attr, + &sensor_dev_attr_port_7_data_a2.dev_attr.attr, + &sensor_dev_attr_port_8_data_a2.dev_attr.attr, + &sensor_dev_attr_port_9_data_a2.dev_attr.attr, + &sensor_dev_attr_port_10_data_a2.dev_attr.attr, + &sensor_dev_attr_port_11_data_a2.dev_attr.attr, + &sensor_dev_attr_port_12_data_a2.dev_attr.attr, + &sensor_dev_attr_port_13_data_a2.dev_attr.attr, + &sensor_dev_attr_port_14_data_a2.dev_attr.attr, + &sensor_dev_attr_port_15_data_a2.dev_attr.attr, + &sensor_dev_attr_port_16_data_a2.dev_attr.attr, + &sensor_dev_attr_port_17_data_a2.dev_attr.attr, + &sensor_dev_attr_port_18_data_a2.dev_attr.attr, + &sensor_dev_attr_port_19_data_a2.dev_attr.attr, + &sensor_dev_attr_port_20_data_a2.dev_attr.attr, + &sensor_dev_attr_port_21_data_a2.dev_attr.attr, + &sensor_dev_attr_port_22_data_a2.dev_attr.attr, + &sensor_dev_attr_port_23_data_a2.dev_attr.attr, + &sensor_dev_attr_port_24_data_a2.dev_attr.attr, + &sensor_dev_attr_port_25_data_a2.dev_attr.attr, + &sensor_dev_attr_port_26_data_a2.dev_attr.attr, + &sensor_dev_attr_port_27_data_a2.dev_attr.attr, + &sensor_dev_attr_port_28_data_a2.dev_attr.attr, + &sensor_dev_attr_port_29_data_a2.dev_attr.attr, + &sensor_dev_attr_port_30_data_a2.dev_attr.attr, + &sensor_dev_attr_port_31_data_a2.dev_attr.attr, + &sensor_dev_attr_port_32_data_a2.dev_attr.attr, + &sensor_dev_attr_port_33_data_a2.dev_attr.attr, + &sensor_dev_attr_port_34_data_a2.dev_attr.attr, + &sensor_dev_attr_port_35_data_a2.dev_attr.attr, + &sensor_dev_attr_port_36_data_a2.dev_attr.attr, + &sensor_dev_attr_port_37_data_a2.dev_attr.attr, + &sensor_dev_attr_port_38_data_a2.dev_attr.attr, + &sensor_dev_attr_port_39_data_a2.dev_attr.attr, + &sensor_dev_attr_port_40_data_a2.dev_attr.attr, + &sensor_dev_attr_port_41_data_a2.dev_attr.attr, + &sensor_dev_attr_port_42_data_a2.dev_attr.attr, + &sensor_dev_attr_port_43_data_a2.dev_attr.attr, + &sensor_dev_attr_port_44_data_a2.dev_attr.attr, + &sensor_dev_attr_port_45_data_a2.dev_attr.attr, + &sensor_dev_attr_port_46_data_a2.dev_attr.attr, + &sensor_dev_attr_port_47_data_a2.dev_attr.attr, + &sensor_dev_attr_port_48_data_a2.dev_attr.attr, + &sensor_dev_attr_port_49_data_a2.dev_attr.attr, + &sensor_dev_attr_port_50_data_a2.dev_attr.attr, + &sensor_dev_attr_port_51_data_a2.dev_attr.attr, + &sensor_dev_attr_port_52_data_a2.dev_attr.attr, + &sensor_dev_attr_port_53_data_a2.dev_attr.attr, + &sensor_dev_attr_port_54_data_a2.dev_attr.attr, + + &sensor_dev_attr_port_1_abs.dev_attr.attr, + &sensor_dev_attr_port_2_abs.dev_attr.attr, + &sensor_dev_attr_port_3_abs.dev_attr.attr, + &sensor_dev_attr_port_4_abs.dev_attr.attr, + &sensor_dev_attr_port_5_abs.dev_attr.attr, + &sensor_dev_attr_port_6_abs.dev_attr.attr, + &sensor_dev_attr_port_7_abs.dev_attr.attr, + &sensor_dev_attr_port_8_abs.dev_attr.attr, + &sensor_dev_attr_port_9_abs.dev_attr.attr, + &sensor_dev_attr_port_10_abs.dev_attr.attr, + &sensor_dev_attr_port_11_abs.dev_attr.attr, + &sensor_dev_attr_port_12_abs.dev_attr.attr, + &sensor_dev_attr_port_13_abs.dev_attr.attr, + &sensor_dev_attr_port_14_abs.dev_attr.attr, + &sensor_dev_attr_port_15_abs.dev_attr.attr, + &sensor_dev_attr_port_16_abs.dev_attr.attr, + &sensor_dev_attr_port_17_abs.dev_attr.attr, + &sensor_dev_attr_port_18_abs.dev_attr.attr, + &sensor_dev_attr_port_19_abs.dev_attr.attr, + &sensor_dev_attr_port_20_abs.dev_attr.attr, + &sensor_dev_attr_port_21_abs.dev_attr.attr, + &sensor_dev_attr_port_22_abs.dev_attr.attr, + &sensor_dev_attr_port_23_abs.dev_attr.attr, + &sensor_dev_attr_port_24_abs.dev_attr.attr, + &sensor_dev_attr_port_25_abs.dev_attr.attr, + &sensor_dev_attr_port_26_abs.dev_attr.attr, + &sensor_dev_attr_port_27_abs.dev_attr.attr, + &sensor_dev_attr_port_28_abs.dev_attr.attr, + &sensor_dev_attr_port_29_abs.dev_attr.attr, + &sensor_dev_attr_port_30_abs.dev_attr.attr, + &sensor_dev_attr_port_31_abs.dev_attr.attr, + &sensor_dev_attr_port_32_abs.dev_attr.attr, + &sensor_dev_attr_port_33_abs.dev_attr.attr, + &sensor_dev_attr_port_34_abs.dev_attr.attr, + &sensor_dev_attr_port_35_abs.dev_attr.attr, + &sensor_dev_attr_port_36_abs.dev_attr.attr, + &sensor_dev_attr_port_37_abs.dev_attr.attr, + &sensor_dev_attr_port_38_abs.dev_attr.attr, + &sensor_dev_attr_port_39_abs.dev_attr.attr, + &sensor_dev_attr_port_40_abs.dev_attr.attr, + &sensor_dev_attr_port_41_abs.dev_attr.attr, + &sensor_dev_attr_port_42_abs.dev_attr.attr, + &sensor_dev_attr_port_43_abs.dev_attr.attr, + &sensor_dev_attr_port_44_abs.dev_attr.attr, + &sensor_dev_attr_port_45_abs.dev_attr.attr, + &sensor_dev_attr_port_46_abs.dev_attr.attr, + &sensor_dev_attr_port_47_abs.dev_attr.attr, + &sensor_dev_attr_port_48_abs.dev_attr.attr, + &sensor_dev_attr_port_49_abs.dev_attr.attr, + &sensor_dev_attr_port_50_abs.dev_attr.attr, + &sensor_dev_attr_port_51_abs.dev_attr.attr, + &sensor_dev_attr_port_52_abs.dev_attr.attr, + &sensor_dev_attr_port_53_abs.dev_attr.attr, + &sensor_dev_attr_port_54_abs.dev_attr.attr, + + &sensor_dev_attr_port_1_rxlos.dev_attr.attr, + &sensor_dev_attr_port_2_rxlos.dev_attr.attr, + &sensor_dev_attr_port_3_rxlos.dev_attr.attr, + &sensor_dev_attr_port_4_rxlos.dev_attr.attr, + &sensor_dev_attr_port_5_rxlos.dev_attr.attr, + &sensor_dev_attr_port_6_rxlos.dev_attr.attr, + &sensor_dev_attr_port_7_rxlos.dev_attr.attr, + &sensor_dev_attr_port_8_rxlos.dev_attr.attr, + &sensor_dev_attr_port_9_rxlos.dev_attr.attr, + &sensor_dev_attr_port_10_rxlos.dev_attr.attr, + &sensor_dev_attr_port_11_rxlos.dev_attr.attr, + &sensor_dev_attr_port_12_rxlos.dev_attr.attr, + &sensor_dev_attr_port_13_rxlos.dev_attr.attr, + &sensor_dev_attr_port_14_rxlos.dev_attr.attr, + &sensor_dev_attr_port_15_rxlos.dev_attr.attr, + &sensor_dev_attr_port_16_rxlos.dev_attr.attr, + &sensor_dev_attr_port_17_rxlos.dev_attr.attr, + &sensor_dev_attr_port_18_rxlos.dev_attr.attr, + &sensor_dev_attr_port_19_rxlos.dev_attr.attr, + &sensor_dev_attr_port_20_rxlos.dev_attr.attr, + &sensor_dev_attr_port_21_rxlos.dev_attr.attr, + &sensor_dev_attr_port_22_rxlos.dev_attr.attr, + &sensor_dev_attr_port_23_rxlos.dev_attr.attr, + &sensor_dev_attr_port_24_rxlos.dev_attr.attr, + &sensor_dev_attr_port_25_rxlos.dev_attr.attr, + &sensor_dev_attr_port_26_rxlos.dev_attr.attr, + &sensor_dev_attr_port_27_rxlos.dev_attr.attr, + &sensor_dev_attr_port_28_rxlos.dev_attr.attr, + &sensor_dev_attr_port_29_rxlos.dev_attr.attr, + &sensor_dev_attr_port_30_rxlos.dev_attr.attr, + &sensor_dev_attr_port_31_rxlos.dev_attr.attr, + &sensor_dev_attr_port_32_rxlos.dev_attr.attr, + &sensor_dev_attr_port_33_rxlos.dev_attr.attr, + &sensor_dev_attr_port_34_rxlos.dev_attr.attr, + &sensor_dev_attr_port_35_rxlos.dev_attr.attr, + &sensor_dev_attr_port_36_rxlos.dev_attr.attr, + &sensor_dev_attr_port_37_rxlos.dev_attr.attr, + &sensor_dev_attr_port_38_rxlos.dev_attr.attr, + &sensor_dev_attr_port_39_rxlos.dev_attr.attr, + &sensor_dev_attr_port_40_rxlos.dev_attr.attr, + &sensor_dev_attr_port_41_rxlos.dev_attr.attr, + &sensor_dev_attr_port_42_rxlos.dev_attr.attr, + &sensor_dev_attr_port_43_rxlos.dev_attr.attr, + &sensor_dev_attr_port_44_rxlos.dev_attr.attr, + &sensor_dev_attr_port_45_rxlos.dev_attr.attr, + &sensor_dev_attr_port_46_rxlos.dev_attr.attr, + &sensor_dev_attr_port_47_rxlos.dev_attr.attr, + &sensor_dev_attr_port_48_rxlos.dev_attr.attr, + + &sensor_dev_attr_port_1_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_2_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_3_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_4_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_5_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_6_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_7_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_8_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_9_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_10_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_11_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_12_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_13_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_14_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_15_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_16_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_17_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_18_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_19_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_20_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_21_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_22_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_23_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_24_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_25_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_26_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_27_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_28_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_29_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_30_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_31_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_32_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_33_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_34_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_35_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_36_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_37_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_38_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_39_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_40_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_41_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_42_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_43_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_44_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_45_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_46_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_47_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_48_tx_disable.dev_attr.attr, + + &sensor_dev_attr_fan1_abs.dev_attr.attr, + &sensor_dev_attr_fan2_abs.dev_attr.attr, + &sensor_dev_attr_fan3_abs.dev_attr.attr, + &sensor_dev_attr_fan4_abs.dev_attr.attr, + + &sensor_dev_attr_fan1_dir.dev_attr.attr, + &sensor_dev_attr_fan2_dir.dev_attr.attr, + &sensor_dev_attr_fan3_dir.dev_attr.attr, + &sensor_dev_attr_fan4_dir.dev_attr.attr, + + &sensor_dev_attr_psu1_eeprom.dev_attr.attr, + &sensor_dev_attr_psu2_eeprom.dev_attr.attr, + + &sensor_dev_attr_psu1_vout.dev_attr.attr, + &sensor_dev_attr_psu1_iout.dev_attr.attr, + &sensor_dev_attr_psu1_temp_1.dev_attr.attr, + &sensor_dev_attr_psu1_temp_2.dev_attr.attr, + &sensor_dev_attr_psu1_fan_speed.dev_attr.attr, + &sensor_dev_attr_psu1_pout.dev_attr.attr, + &sensor_dev_attr_psu1_pin.dev_attr.attr, + + &sensor_dev_attr_psu2_vout.dev_attr.attr, + &sensor_dev_attr_psu2_iout.dev_attr.attr, + &sensor_dev_attr_psu2_temp_1.dev_attr.attr, + &sensor_dev_attr_psu2_temp_2.dev_attr.attr, + &sensor_dev_attr_psu2_fan_speed.dev_attr.attr, + &sensor_dev_attr_psu2_pout.dev_attr.attr, + &sensor_dev_attr_psu2_pin.dev_attr.attr, + + &dev_attr_psu_power_off.attr, + + NULL +}; + +static struct attribute *i2c_bus1_hardware_monitor_attr_asterion[] = { + &dev_attr_eeprom.attr, + &dev_attr_system_led.attr, + + &sensor_dev_attr_port_1_data_a0.dev_attr.attr, + &sensor_dev_attr_port_2_data_a0.dev_attr.attr, + &sensor_dev_attr_port_3_data_a0.dev_attr.attr, + &sensor_dev_attr_port_4_data_a0.dev_attr.attr, + &sensor_dev_attr_port_5_data_a0.dev_attr.attr, + &sensor_dev_attr_port_6_data_a0.dev_attr.attr, + &sensor_dev_attr_port_7_data_a0.dev_attr.attr, + &sensor_dev_attr_port_8_data_a0.dev_attr.attr, + &sensor_dev_attr_port_9_data_a0.dev_attr.attr, + &sensor_dev_attr_port_10_data_a0.dev_attr.attr, + &sensor_dev_attr_port_11_data_a0.dev_attr.attr, + &sensor_dev_attr_port_12_data_a0.dev_attr.attr, + &sensor_dev_attr_port_13_data_a0.dev_attr.attr, + &sensor_dev_attr_port_14_data_a0.dev_attr.attr, + &sensor_dev_attr_port_15_data_a0.dev_attr.attr, + &sensor_dev_attr_port_16_data_a0.dev_attr.attr, + &sensor_dev_attr_port_17_data_a0.dev_attr.attr, + &sensor_dev_attr_port_18_data_a0.dev_attr.attr, + &sensor_dev_attr_port_19_data_a0.dev_attr.attr, + &sensor_dev_attr_port_20_data_a0.dev_attr.attr, + &sensor_dev_attr_port_21_data_a0.dev_attr.attr, + &sensor_dev_attr_port_22_data_a0.dev_attr.attr, + &sensor_dev_attr_port_23_data_a0.dev_attr.attr, + &sensor_dev_attr_port_24_data_a0.dev_attr.attr, + &sensor_dev_attr_port_25_data_a0.dev_attr.attr, + &sensor_dev_attr_port_26_data_a0.dev_attr.attr, + &sensor_dev_attr_port_27_data_a0.dev_attr.attr, + &sensor_dev_attr_port_28_data_a0.dev_attr.attr, + &sensor_dev_attr_port_29_data_a0.dev_attr.attr, + &sensor_dev_attr_port_30_data_a0.dev_attr.attr, + &sensor_dev_attr_port_31_data_a0.dev_attr.attr, + &sensor_dev_attr_port_32_data_a0.dev_attr.attr, + &sensor_dev_attr_port_33_data_a0.dev_attr.attr, + &sensor_dev_attr_port_34_data_a0.dev_attr.attr, + &sensor_dev_attr_port_35_data_a0.dev_attr.attr, + &sensor_dev_attr_port_36_data_a0.dev_attr.attr, + &sensor_dev_attr_port_37_data_a0.dev_attr.attr, + &sensor_dev_attr_port_38_data_a0.dev_attr.attr, + &sensor_dev_attr_port_39_data_a0.dev_attr.attr, + &sensor_dev_attr_port_40_data_a0.dev_attr.attr, + &sensor_dev_attr_port_41_data_a0.dev_attr.attr, + &sensor_dev_attr_port_42_data_a0.dev_attr.attr, + &sensor_dev_attr_port_43_data_a0.dev_attr.attr, + &sensor_dev_attr_port_44_data_a0.dev_attr.attr, + &sensor_dev_attr_port_45_data_a0.dev_attr.attr, + &sensor_dev_attr_port_46_data_a0.dev_attr.attr, + &sensor_dev_attr_port_47_data_a0.dev_attr.attr, + &sensor_dev_attr_port_48_data_a0.dev_attr.attr, + &sensor_dev_attr_port_49_data_a0.dev_attr.attr, + &sensor_dev_attr_port_50_data_a0.dev_attr.attr, + &sensor_dev_attr_port_51_data_a0.dev_attr.attr, + &sensor_dev_attr_port_52_data_a0.dev_attr.attr, + &sensor_dev_attr_port_53_data_a0.dev_attr.attr, + &sensor_dev_attr_port_54_data_a0.dev_attr.attr, + &sensor_dev_attr_port_55_data_a0.dev_attr.attr, + &sensor_dev_attr_port_56_data_a0.dev_attr.attr, + &sensor_dev_attr_port_57_data_a0.dev_attr.attr, + &sensor_dev_attr_port_58_data_a0.dev_attr.attr, + &sensor_dev_attr_port_59_data_a0.dev_attr.attr, + &sensor_dev_attr_port_60_data_a0.dev_attr.attr, + &sensor_dev_attr_port_61_data_a0.dev_attr.attr, + &sensor_dev_attr_port_62_data_a0.dev_attr.attr, + &sensor_dev_attr_port_63_data_a0.dev_attr.attr, + &sensor_dev_attr_port_64_data_a0.dev_attr.attr, + + &sensor_dev_attr_port_1_data_a2.dev_attr.attr, + &sensor_dev_attr_port_2_data_a2.dev_attr.attr, + &sensor_dev_attr_port_3_data_a2.dev_attr.attr, + &sensor_dev_attr_port_4_data_a2.dev_attr.attr, + &sensor_dev_attr_port_5_data_a2.dev_attr.attr, + &sensor_dev_attr_port_6_data_a2.dev_attr.attr, + &sensor_dev_attr_port_7_data_a2.dev_attr.attr, + &sensor_dev_attr_port_8_data_a2.dev_attr.attr, + &sensor_dev_attr_port_9_data_a2.dev_attr.attr, + &sensor_dev_attr_port_10_data_a2.dev_attr.attr, + &sensor_dev_attr_port_11_data_a2.dev_attr.attr, + &sensor_dev_attr_port_12_data_a2.dev_attr.attr, + &sensor_dev_attr_port_13_data_a2.dev_attr.attr, + &sensor_dev_attr_port_14_data_a2.dev_attr.attr, + &sensor_dev_attr_port_15_data_a2.dev_attr.attr, + &sensor_dev_attr_port_16_data_a2.dev_attr.attr, + &sensor_dev_attr_port_17_data_a2.dev_attr.attr, + &sensor_dev_attr_port_18_data_a2.dev_attr.attr, + &sensor_dev_attr_port_19_data_a2.dev_attr.attr, + &sensor_dev_attr_port_20_data_a2.dev_attr.attr, + &sensor_dev_attr_port_21_data_a2.dev_attr.attr, + &sensor_dev_attr_port_22_data_a2.dev_attr.attr, + &sensor_dev_attr_port_23_data_a2.dev_attr.attr, + &sensor_dev_attr_port_24_data_a2.dev_attr.attr, + &sensor_dev_attr_port_25_data_a2.dev_attr.attr, + &sensor_dev_attr_port_26_data_a2.dev_attr.attr, + &sensor_dev_attr_port_27_data_a2.dev_attr.attr, + &sensor_dev_attr_port_28_data_a2.dev_attr.attr, + &sensor_dev_attr_port_29_data_a2.dev_attr.attr, + &sensor_dev_attr_port_30_data_a2.dev_attr.attr, + &sensor_dev_attr_port_31_data_a2.dev_attr.attr, + &sensor_dev_attr_port_32_data_a2.dev_attr.attr, + &sensor_dev_attr_port_33_data_a2.dev_attr.attr, + &sensor_dev_attr_port_34_data_a2.dev_attr.attr, + &sensor_dev_attr_port_35_data_a2.dev_attr.attr, + &sensor_dev_attr_port_36_data_a2.dev_attr.attr, + &sensor_dev_attr_port_37_data_a2.dev_attr.attr, + &sensor_dev_attr_port_38_data_a2.dev_attr.attr, + &sensor_dev_attr_port_39_data_a2.dev_attr.attr, + &sensor_dev_attr_port_40_data_a2.dev_attr.attr, + &sensor_dev_attr_port_41_data_a2.dev_attr.attr, + &sensor_dev_attr_port_42_data_a2.dev_attr.attr, + &sensor_dev_attr_port_43_data_a2.dev_attr.attr, + &sensor_dev_attr_port_44_data_a2.dev_attr.attr, + &sensor_dev_attr_port_45_data_a2.dev_attr.attr, + &sensor_dev_attr_port_46_data_a2.dev_attr.attr, + &sensor_dev_attr_port_47_data_a2.dev_attr.attr, + &sensor_dev_attr_port_48_data_a2.dev_attr.attr, + &sensor_dev_attr_port_49_data_a2.dev_attr.attr, + &sensor_dev_attr_port_50_data_a2.dev_attr.attr, + &sensor_dev_attr_port_51_data_a2.dev_attr.attr, + &sensor_dev_attr_port_52_data_a2.dev_attr.attr, + &sensor_dev_attr_port_53_data_a2.dev_attr.attr, + &sensor_dev_attr_port_54_data_a2.dev_attr.attr, + &sensor_dev_attr_port_55_data_a2.dev_attr.attr, + &sensor_dev_attr_port_56_data_a2.dev_attr.attr, + &sensor_dev_attr_port_57_data_a2.dev_attr.attr, + &sensor_dev_attr_port_58_data_a2.dev_attr.attr, + &sensor_dev_attr_port_59_data_a2.dev_attr.attr, + &sensor_dev_attr_port_60_data_a2.dev_attr.attr, + &sensor_dev_attr_port_61_data_a2.dev_attr.attr, + &sensor_dev_attr_port_62_data_a2.dev_attr.attr, + &sensor_dev_attr_port_63_data_a2.dev_attr.attr, + &sensor_dev_attr_port_64_data_a2.dev_attr.attr, + + &sensor_dev_attr_port_1_abs.dev_attr.attr, + &sensor_dev_attr_port_2_abs.dev_attr.attr, + &sensor_dev_attr_port_3_abs.dev_attr.attr, + &sensor_dev_attr_port_4_abs.dev_attr.attr, + &sensor_dev_attr_port_5_abs.dev_attr.attr, + &sensor_dev_attr_port_6_abs.dev_attr.attr, + &sensor_dev_attr_port_7_abs.dev_attr.attr, + &sensor_dev_attr_port_8_abs.dev_attr.attr, + &sensor_dev_attr_port_9_abs.dev_attr.attr, + &sensor_dev_attr_port_10_abs.dev_attr.attr, + &sensor_dev_attr_port_11_abs.dev_attr.attr, + &sensor_dev_attr_port_12_abs.dev_attr.attr, + &sensor_dev_attr_port_13_abs.dev_attr.attr, + &sensor_dev_attr_port_14_abs.dev_attr.attr, + &sensor_dev_attr_port_15_abs.dev_attr.attr, + &sensor_dev_attr_port_16_abs.dev_attr.attr, + &sensor_dev_attr_port_17_abs.dev_attr.attr, + &sensor_dev_attr_port_18_abs.dev_attr.attr, + &sensor_dev_attr_port_19_abs.dev_attr.attr, + &sensor_dev_attr_port_20_abs.dev_attr.attr, + &sensor_dev_attr_port_21_abs.dev_attr.attr, + &sensor_dev_attr_port_22_abs.dev_attr.attr, + &sensor_dev_attr_port_23_abs.dev_attr.attr, + &sensor_dev_attr_port_24_abs.dev_attr.attr, + &sensor_dev_attr_port_25_abs.dev_attr.attr, + &sensor_dev_attr_port_26_abs.dev_attr.attr, + &sensor_dev_attr_port_27_abs.dev_attr.attr, + &sensor_dev_attr_port_28_abs.dev_attr.attr, + &sensor_dev_attr_port_29_abs.dev_attr.attr, + &sensor_dev_attr_port_30_abs.dev_attr.attr, + &sensor_dev_attr_port_31_abs.dev_attr.attr, + &sensor_dev_attr_port_32_abs.dev_attr.attr, + &sensor_dev_attr_port_33_abs.dev_attr.attr, + &sensor_dev_attr_port_34_abs.dev_attr.attr, + &sensor_dev_attr_port_35_abs.dev_attr.attr, + &sensor_dev_attr_port_36_abs.dev_attr.attr, + &sensor_dev_attr_port_37_abs.dev_attr.attr, + &sensor_dev_attr_port_38_abs.dev_attr.attr, + &sensor_dev_attr_port_39_abs.dev_attr.attr, + &sensor_dev_attr_port_40_abs.dev_attr.attr, + &sensor_dev_attr_port_41_abs.dev_attr.attr, + &sensor_dev_attr_port_42_abs.dev_attr.attr, + &sensor_dev_attr_port_43_abs.dev_attr.attr, + &sensor_dev_attr_port_44_abs.dev_attr.attr, + &sensor_dev_attr_port_45_abs.dev_attr.attr, + &sensor_dev_attr_port_46_abs.dev_attr.attr, + &sensor_dev_attr_port_47_abs.dev_attr.attr, + &sensor_dev_attr_port_48_abs.dev_attr.attr, + &sensor_dev_attr_port_49_abs.dev_attr.attr, + &sensor_dev_attr_port_50_abs.dev_attr.attr, + &sensor_dev_attr_port_51_abs.dev_attr.attr, + &sensor_dev_attr_port_52_abs.dev_attr.attr, + &sensor_dev_attr_port_53_abs.dev_attr.attr, + &sensor_dev_attr_port_54_abs.dev_attr.attr, + &sensor_dev_attr_port_55_abs.dev_attr.attr, + &sensor_dev_attr_port_56_abs.dev_attr.attr, + &sensor_dev_attr_port_57_abs.dev_attr.attr, + &sensor_dev_attr_port_58_abs.dev_attr.attr, + &sensor_dev_attr_port_59_abs.dev_attr.attr, + &sensor_dev_attr_port_60_abs.dev_attr.attr, + &sensor_dev_attr_port_61_abs.dev_attr.attr, + &sensor_dev_attr_port_62_abs.dev_attr.attr, + &sensor_dev_attr_port_63_abs.dev_attr.attr, + &sensor_dev_attr_port_64_abs.dev_attr.attr, + + &sensor_dev_attr_port_1_rxlos.dev_attr.attr, + &sensor_dev_attr_port_2_rxlos.dev_attr.attr, + &sensor_dev_attr_port_3_rxlos.dev_attr.attr, + &sensor_dev_attr_port_4_rxlos.dev_attr.attr, + &sensor_dev_attr_port_5_rxlos.dev_attr.attr, + &sensor_dev_attr_port_6_rxlos.dev_attr.attr, + &sensor_dev_attr_port_7_rxlos.dev_attr.attr, + &sensor_dev_attr_port_8_rxlos.dev_attr.attr, + &sensor_dev_attr_port_9_rxlos.dev_attr.attr, + &sensor_dev_attr_port_10_rxlos.dev_attr.attr, + &sensor_dev_attr_port_11_rxlos.dev_attr.attr, + &sensor_dev_attr_port_12_rxlos.dev_attr.attr, + &sensor_dev_attr_port_13_rxlos.dev_attr.attr, + &sensor_dev_attr_port_14_rxlos.dev_attr.attr, + &sensor_dev_attr_port_15_rxlos.dev_attr.attr, + &sensor_dev_attr_port_16_rxlos.dev_attr.attr, + &sensor_dev_attr_port_17_rxlos.dev_attr.attr, + &sensor_dev_attr_port_18_rxlos.dev_attr.attr, + &sensor_dev_attr_port_19_rxlos.dev_attr.attr, + &sensor_dev_attr_port_20_rxlos.dev_attr.attr, + &sensor_dev_attr_port_21_rxlos.dev_attr.attr, + &sensor_dev_attr_port_22_rxlos.dev_attr.attr, + &sensor_dev_attr_port_23_rxlos.dev_attr.attr, + &sensor_dev_attr_port_24_rxlos.dev_attr.attr, + &sensor_dev_attr_port_25_rxlos.dev_attr.attr, + &sensor_dev_attr_port_26_rxlos.dev_attr.attr, + &sensor_dev_attr_port_27_rxlos.dev_attr.attr, + &sensor_dev_attr_port_28_rxlos.dev_attr.attr, + &sensor_dev_attr_port_29_rxlos.dev_attr.attr, + &sensor_dev_attr_port_30_rxlos.dev_attr.attr, + &sensor_dev_attr_port_31_rxlos.dev_attr.attr, + &sensor_dev_attr_port_32_rxlos.dev_attr.attr, + &sensor_dev_attr_port_33_rxlos.dev_attr.attr, + &sensor_dev_attr_port_34_rxlos.dev_attr.attr, + &sensor_dev_attr_port_35_rxlos.dev_attr.attr, + &sensor_dev_attr_port_36_rxlos.dev_attr.attr, + &sensor_dev_attr_port_37_rxlos.dev_attr.attr, + &sensor_dev_attr_port_38_rxlos.dev_attr.attr, + &sensor_dev_attr_port_39_rxlos.dev_attr.attr, + &sensor_dev_attr_port_40_rxlos.dev_attr.attr, + &sensor_dev_attr_port_41_rxlos.dev_attr.attr, + &sensor_dev_attr_port_42_rxlos.dev_attr.attr, + &sensor_dev_attr_port_43_rxlos.dev_attr.attr, + &sensor_dev_attr_port_44_rxlos.dev_attr.attr, + &sensor_dev_attr_port_45_rxlos.dev_attr.attr, + &sensor_dev_attr_port_46_rxlos.dev_attr.attr, + &sensor_dev_attr_port_47_rxlos.dev_attr.attr, + &sensor_dev_attr_port_48_rxlos.dev_attr.attr, + + &sensor_dev_attr_port_1_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_2_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_3_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_4_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_5_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_6_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_7_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_8_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_9_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_10_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_11_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_12_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_13_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_14_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_15_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_16_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_17_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_18_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_19_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_20_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_21_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_22_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_23_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_24_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_25_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_26_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_27_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_28_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_29_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_30_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_31_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_32_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_33_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_34_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_35_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_36_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_37_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_38_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_39_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_40_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_41_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_42_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_43_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_44_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_45_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_46_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_47_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_48_tx_disable.dev_attr.attr, + + &sensor_dev_attr_port_1_rate_select.dev_attr.attr, + &sensor_dev_attr_port_2_rate_select.dev_attr.attr, + &sensor_dev_attr_port_3_rate_select.dev_attr.attr, + &sensor_dev_attr_port_4_rate_select.dev_attr.attr, + &sensor_dev_attr_port_5_rate_select.dev_attr.attr, + &sensor_dev_attr_port_6_rate_select.dev_attr.attr, + &sensor_dev_attr_port_7_rate_select.dev_attr.attr, + &sensor_dev_attr_port_8_rate_select.dev_attr.attr, + &sensor_dev_attr_port_9_rate_select.dev_attr.attr, + &sensor_dev_attr_port_10_rate_select.dev_attr.attr, + &sensor_dev_attr_port_11_rate_select.dev_attr.attr, + &sensor_dev_attr_port_12_rate_select.dev_attr.attr, + &sensor_dev_attr_port_13_rate_select.dev_attr.attr, + &sensor_dev_attr_port_14_rate_select.dev_attr.attr, + &sensor_dev_attr_port_15_rate_select.dev_attr.attr, + &sensor_dev_attr_port_16_rate_select.dev_attr.attr, + &sensor_dev_attr_port_17_rate_select.dev_attr.attr, + &sensor_dev_attr_port_18_rate_select.dev_attr.attr, + &sensor_dev_attr_port_19_rate_select.dev_attr.attr, + &sensor_dev_attr_port_20_rate_select.dev_attr.attr, + &sensor_dev_attr_port_21_rate_select.dev_attr.attr, + &sensor_dev_attr_port_22_rate_select.dev_attr.attr, + &sensor_dev_attr_port_23_rate_select.dev_attr.attr, + &sensor_dev_attr_port_24_rate_select.dev_attr.attr, + &sensor_dev_attr_port_25_rate_select.dev_attr.attr, + &sensor_dev_attr_port_26_rate_select.dev_attr.attr, + &sensor_dev_attr_port_27_rate_select.dev_attr.attr, + &sensor_dev_attr_port_28_rate_select.dev_attr.attr, + &sensor_dev_attr_port_29_rate_select.dev_attr.attr, + &sensor_dev_attr_port_30_rate_select.dev_attr.attr, + &sensor_dev_attr_port_31_rate_select.dev_attr.attr, + &sensor_dev_attr_port_32_rate_select.dev_attr.attr, + &sensor_dev_attr_port_33_rate_select.dev_attr.attr, + &sensor_dev_attr_port_34_rate_select.dev_attr.attr, + &sensor_dev_attr_port_35_rate_select.dev_attr.attr, + &sensor_dev_attr_port_36_rate_select.dev_attr.attr, + &sensor_dev_attr_port_37_rate_select.dev_attr.attr, + &sensor_dev_attr_port_38_rate_select.dev_attr.attr, + &sensor_dev_attr_port_39_rate_select.dev_attr.attr, + &sensor_dev_attr_port_40_rate_select.dev_attr.attr, + &sensor_dev_attr_port_41_rate_select.dev_attr.attr, + &sensor_dev_attr_port_42_rate_select.dev_attr.attr, + &sensor_dev_attr_port_43_rate_select.dev_attr.attr, + &sensor_dev_attr_port_44_rate_select.dev_attr.attr, + &sensor_dev_attr_port_45_rate_select.dev_attr.attr, + &sensor_dev_attr_port_46_rate_select.dev_attr.attr, + &sensor_dev_attr_port_47_rate_select.dev_attr.attr, + &sensor_dev_attr_port_48_rate_select.dev_attr.attr, + + &sensor_dev_attr_fan1_abs.dev_attr.attr, + &sensor_dev_attr_fan2_abs.dev_attr.attr, + &sensor_dev_attr_fan3_abs.dev_attr.attr, + &sensor_dev_attr_fan4_abs.dev_attr.attr, + &sensor_dev_attr_fan5_abs.dev_attr.attr, + + &sensor_dev_attr_fan1_dir.dev_attr.attr, + &sensor_dev_attr_fan2_dir.dev_attr.attr, + &sensor_dev_attr_fan3_dir.dev_attr.attr, + &sensor_dev_attr_fan4_dir.dev_attr.attr, + &sensor_dev_attr_fan5_dir.dev_attr.attr, + + &sensor_dev_attr_psu1_eeprom.dev_attr.attr, + &sensor_dev_attr_psu2_eeprom.dev_attr.attr, + + &sensor_dev_attr_psu1_vout.dev_attr.attr, + &sensor_dev_attr_psu1_iout.dev_attr.attr, + &sensor_dev_attr_psu1_temp_1.dev_attr.attr, + &sensor_dev_attr_psu1_temp_2.dev_attr.attr, + &sensor_dev_attr_psu1_fan_speed.dev_attr.attr, + &sensor_dev_attr_psu1_pout.dev_attr.attr, + &sensor_dev_attr_psu1_pin.dev_attr.attr, + + &sensor_dev_attr_psu2_vout.dev_attr.attr, + &sensor_dev_attr_psu2_iout.dev_attr.attr, + &sensor_dev_attr_psu2_temp_1.dev_attr.attr, + &sensor_dev_attr_psu2_temp_2.dev_attr.attr, + &sensor_dev_attr_psu2_fan_speed.dev_attr.attr, + &sensor_dev_attr_psu2_pout.dev_attr.attr, + &sensor_dev_attr_psu2_pin.dev_attr.attr, + + &dev_attr_psu_power_off.attr, + + NULL +}; + +static void i2c_bus0_devices_client_address_init(struct i2c_client *client) +{ + int index; + + pca9535pwr_client = *client; + pca9535pwr_client.addr = 0x27; + + cpld_client = *client; + cpld_client.addr = 0x33; + + pca9548_client_bus0 = *client; + pca9548_client_bus0.addr = 0x70; + + for (index=0; index<4; index++) + { + pca9535_client_bus0[index] = *client; + pca9535_client_bus0[index].addr = (0x20+index); + } + + eeprom_client_bus0 = *client; + eeprom_client_bus0.addr = 0x56; + + mp2953agu_client = *client; + mp2953agu_client.addr = 0x21; + + chl8325a_client = *client; + chl8325a_client.addr = 0x32; + + psu_eeprom_client_bus0= *client; + psu_eeprom_client_bus0.addr = 0x51; + + psu_mcu_client_bus0= *client; + psu_mcu_client_bus0.addr = 0x59; +} + +static void i2c_bus0_hardware_monitor_hw_default_config(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct i2c_bus0_hardware_monitor_data *data = i2c_get_clientdata(client); + unsigned int hiByte, lowByte, configByte; + int i; + + i2c_bus0_devices_client_address_init(client); + + mutex_lock(&data->lock); + + /* Get Board Type and Revision */ + lowByte = i2c_smbus_read_byte_data(&cpld_client, CPLD_REG_GENERAL_0x00); + data->buildRev = (lowByte&0x03); + data->hwRev = ((lowByte>>2)&0x03); + data->modelId = ((lowByte>>4)&0x0f); + + platformBuildRev = data->buildRev; + platformHwRev = data->hwRev; + platformModelId = data->modelId; + + switch(data->modelId) + { + case HURACAN_WITH_BMC: /* 0000: Huracan with BMC */ + case CABRERAIII_WITH_BMC: /* 0010: Cabrera3 with BMC */ + case SESTO_WITH_BMC: /* 0100: Sesto with BMC */ + case NCIIX_WITH_BMC: /* 0110: New Cabrera-II X with BMC */ + case ASTERION_WITH_BMC: /* 1000: Asterion with BMC */ + case HURACAN_A_WITH_BMC: /* 1010: Huracan-A with BMC */ + isBMCSupport = 1; + break; + + default: + isBMCSupport = 0; + break; + } + + if (isBMCSupport == 0) + { + /* Choose W83795ADG bank 0 */ + i2c_smbus_write_byte_data(client, W83795ADG_REG_BANK, 0x00); + /* Disable monitoring operations */ + configByte = i2c_smbus_read_byte_data(client, W83795ADG_REG_CONFIG); + configByte &= 0xfe; + i2c_smbus_write_byte_data(client, W83795ADG_REG_CONFIG, configByte); + + /* Choose W83795ADG bank 2 */ + i2c_smbus_write_byte_data(client, W83795ADG_REG_BANK, 0x02); + lowByte = i2c_smbus_read_byte_data(client, W83795ADG_REG_VENDOR_ID); + i2c_smbus_write_byte_data(client, W83795ADG_REG_BANK, 0x82); + hiByte = i2c_smbus_read_byte_data(client, W83795ADG_REG_VENDOR_ID); + /* Get vender id */ + data->venderId = (hiByte<<8) + lowByte; + /* Get chip id */ + data->chipId= i2c_smbus_read_byte_data(client, W83795ADG_REG_CHIP_ID); + /* Get device id */ + data->dviceId= i2c_smbus_read_byte_data(client, W83795ADG_REG_DEVICE_ID); + + /* set FANCTL8 ¡V FANCTL1 output mode control to PWM output duty cycle mode. */ + i2c_smbus_write_byte_data(client, W83795ADG_REG_FOMC, 0x00); + i2c_smbus_write_byte_data(client, W83795ADG_REG_F1OV, 0xff); + i2c_smbus_write_byte_data(client, W83795ADG_REG_F2OV, 0xff); + + /* Choose W83795ADG bank 0 */ + i2c_smbus_write_byte_data(client, W83795ADG_REG_BANK, 0x00); + /* Enable TR1~TR4 thermistor temperature monitoring */ + i2c_smbus_write_byte_data(client, W83795ADG_REG_TEMP_CTRL2, 0xff); + /* Enable monitoring operations */ + configByte |= 0x01; + i2c_smbus_write_byte_data(client, W83795ADG_REG_CONFIG, configByte); + } + + /* CPLD Revision */ + lowByte = i2c_smbus_read_byte_data(&cpld_client, CPLD_REG_GENERAL_0x01); + data->cpldRev = (lowByte&0x3f); + data->cpldRel = ((lowByte>>6)&0x01); + + /* turn on all LEDs of front port */ + i2c_smbus_write_byte_data(&cpld_client, CPLD_REG_RESET_0x34, 0x10); + + switch(data->modelId) + { + case NCIIX_WITH_BMC: + case NCIIX_WITHOUT_BMC: + /* Turn on PCA9548#0 channel 3 on I2C-bus0 */ + i2c_smbus_write_byte(&pca9548_client_bus0, (1<lock); +} + +static void i2c_bus1_devices_client_address_init(struct i2c_client *client) +{ + int index; + + for (index=0; index<4; index++) + { + pca9548_client[index] = *client; + pca9548_client[index].addr = (0x71+index); + } + + for (index=0; index<6; index++) + { + pca9535pwr_client_bus1[index] = *client; + pca9535pwr_client_bus1[index].addr = (0x20+index); + } + + qsfpDataA0_client = *client; + qsfpDataA0_client.addr = 0x50; + + qsfpDataA2_client = *client; + qsfpDataA2_client.addr = 0x51; + + eeprom_client = *client; + eeprom_client.addr = 0x54; + + eeprom_client_2 = *client; + eeprom_client_2.addr = 0x56; + + psu_eeprom_client = *client; + psu_eeprom_client.addr = 0x50; + + psu_mcu_client = *client; + psu_mcu_client.addr = 0x58; + } + +static void i2c_bus1_io_expander_default_set(struct i2c_client *client) +{ + struct i2c_bus1_hardware_monitor_data *data = i2c_get_clientdata(client); + int i; + + switch (platformModelId) + { + case HURACAN_WITH_BMC: + case HURACAN_WITHOUT_BMC: + case HURACAN_A_WITH_BMC: + case HURACAN_A_WITHOUT_BMC: + /* Turn on PCA9548 channel 4 on I2C-bus1 */ + i2c_smbus_write_byte(client, (1<frontLedStatus); + i2c_device_word_write(&(pca9535pwr_client_bus1[2]), PCA9553_COMMAND_BYTE_REG_POLARITY_INVERSION_0, 0x0000); + i2c_device_word_write(&(pca9535pwr_client_bus1[2]), PCA9553_COMMAND_BYTE_REG_CONFIGURATION_0, 0x0000); + } + } + + /* Turn off PCA9548 all channels on I2C-bus1 */ + i2c_smbus_write_byte(client, 0x00); + break; + + case CABRERAIII_WITH_BMC: + case CABRERAIII_WITHOUT_BMC: + break; + + case SESTO_WITH_BMC: + case SESTO_WITHOUT_BMC: + /* Turn on PCA9548#1 channel 0 on I2C-bus1 - ABS# */ + i2c_smbus_write_byte(&(pca9548_client[1]), (1<frontLedStatus); + i2c_device_word_write(&(pca9535pwr_client_bus1[2]), PCA9553_COMMAND_BYTE_REG_POLARITY_INVERSION_0, 0x0000); + i2c_device_word_write(&(pca9535pwr_client_bus1[2]), PCA9553_COMMAND_BYTE_REG_CONFIGURATION_0, 0x0000); + /* Turn off PCA9548#0 all channels on I2C-bus1 */ + i2c_smbus_write_byte(client, 0x00); + } + + /* Turn off PCA9548#1 all channels on I2C-bus1 */ + i2c_smbus_write_byte(&(pca9548_client[1]), 0x00); + break; + + case NCIIX_WITH_BMC: + case NCIIX_WITHOUT_BMC: + /* Turn on PCA9548#1 channel 0 on I2C-bus1 */ + i2c_smbus_write_byte(client, (1<lock); + /* Turn off PCA9548 all channels on I2C-bus1 */ + i2c_smbus_write_byte(client, 0x00); + + data->frontLedStatus = 0x00aa; + for (i=0; i<3; i++) + data->sfpPortRateSelect[i] = 0xffff; + i2c_bus1_io_expander_default_set(client); + + mutex_unlock(&data->lock); +} + +/* Return 0 if detection is successful, -ENODEV otherwise */ +static int w83795adg_hardware_monitor_detect(struct i2c_client *client, + struct i2c_board_info *info) +{ + struct i2c_adapter *adapter = client->adapter; + + if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) + { + printk(KERN_ERR "i2c_check_functionality fail.\n"); + return -ENODEV; + } + + if(adapter->nr == 0x0) + { + unsigned int hiByte, lowByte, value; + + if (client->addr != 0x2F) + return -ENODEV; + + /* Choose W83795ADG bank 2 */ + i2c_smbus_write_byte_data(client, W83795ADG_REG_BANK, 0x02); + lowByte = i2c_smbus_read_byte_data(client, W83795ADG_REG_VENDOR_ID); + i2c_smbus_write_byte_data(client, W83795ADG_REG_BANK, 0x82); + hiByte = i2c_smbus_read_byte_data(client, W83795ADG_REG_VENDOR_ID); + /* Get vender id */ + value= (hiByte<<8) + lowByte; + if (value != W83795ADG_VENDOR_ID) + { + printk(KERN_ERR "%s(%d): W83795ADG_REG_VENDOR_ID fail.\n", __func__, __LINE__); + return -ENODEV; + } + + value = i2c_smbus_read_byte_data(client, W83795ADG_REG_CHIP_ID); + if (value != W83795ADG_CHIP_ID) + { + printk(KERN_ERR "%s(%d): W83795ADG_REG_CHIP_ID fail.\n", __func__, __LINE__); + return -ENODEV; + } + } + + strlcpy(info->type, "HURACAN", I2C_NAME_SIZE); + return 0; +} + +static int w83795adg_hardware_monitor_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + int err = 0; + + if(client->adapter->nr == 0x0) + { + struct i2c_bus0_hardware_monitor_data *data = NULL; + + if (client->addr != 0x2F) + return -ENODEV; + + data = devm_kzalloc(&client->dev, sizeof(struct i2c_bus0_hardware_monitor_data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + memset(data, 0, sizeof(struct i2c_bus0_hardware_monitor_data)); + mutex_init(&data->lock); + i2c_set_clientdata(client, data); + + dev_info(&client->dev, "%s device found on bus %d\n", client->name, client->adapter->nr); + + /* Set Pre-defined HW config */ + i2c_bus0_hardware_monitor_hw_default_config(client, id); + /* Register sysfs hooks */ + switch (platformModelId) + { + case NCIIX_WITH_BMC: + case NCIIX_WITHOUT_BMC: + data->hwmon_group.attrs = i2c_bus0_hardware_monitor_attr_nc2x; + break; + + case ASTERION_WITH_BMC: + case ASTERION_WITHOUT_BMC: + data->hwmon_group.attrs = i2c_bus0_hardware_monitor_attr_asterion; + w83795adg_normal_i2c[1] = 0x72; + break; + + default: + data->hwmon_group.attrs = i2c_bus0_hardware_monitor_attr; + break; + } + err = sysfs_create_group(&client->dev.kobj, &data->hwmon_group); + if (err) + { + printk(KERN_ERR "hwmon_group sysfs_create_group fail.\n"); + } + else + { + data->hwmon_dev = hwmon_device_register(&client->dev); + if (IS_ERR(data->hwmon_dev)) { + printk(KERN_ERR "hwmon_device_register fail.\n"); + err = PTR_ERR(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &data->hwmon_group); + } + + init_completion(&data->auto_update_stop); + data->auto_update = kthread_run(i2c_bus0_hardware_monitor_update_thread, client, dev_name(data->hwmon_dev)); + if (IS_ERR(data->auto_update)) { + err = PTR_ERR(data->auto_update); + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &data->hwmon_group); + } + } + } + else if(client->adapter->nr == 0x1) + { + struct i2c_bus1_hardware_monitor_data *data = NULL; + + data = devm_kzalloc(&client->dev, sizeof(struct i2c_bus1_hardware_monitor_data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + memset(data, 0, sizeof(struct i2c_bus1_hardware_monitor_data)); + mutex_init(&data->lock); + i2c_set_clientdata(client, data); + + dev_info(&client->dev, "%s device found on bus %d\n", client->name, client->adapter->nr); + + /* Set Pre-defined HW config */ + i2c_bus1_hardware_monitor_hw_default_config(client, id); + /* Register sysfs hooks */ + + switch (platformModelId) + { + default: + case HURACAN_WITH_BMC: + case HURACAN_WITHOUT_BMC: + case HURACAN_A_WITH_BMC: + case HURACAN_A_WITHOUT_BMC: + data->hwmon_group.attrs = i2c_bus1_hardware_monitor_attr_huracan; + break; + + case CABRERAIII_WITH_BMC: + case CABRERAIII_WITHOUT_BMC: + break; + + case SESTO_WITH_BMC: + case SESTO_WITHOUT_BMC: + data->hwmon_group.attrs = i2c_bus1_hardware_monitor_attr_sesto; + break; + + case NCIIX_WITH_BMC: + case NCIIX_WITHOUT_BMC: + data->hwmon_group.attrs = i2c_bus1_hardware_monitor_attr_nc2x; + break; + + case ASTERION_WITH_BMC: + case ASTERION_WITHOUT_BMC: + data->hwmon_group.attrs = i2c_bus1_hardware_monitor_attr_asterion; + break; + } + err = sysfs_create_group(&client->dev.kobj, &data->hwmon_group); + if (err) + { + printk(KERN_INFO "hwmon_group1 sysfs_create_group fail.\n"); + } + else + { + data->hwmon_dev = hwmon_device_register(&client->dev); + if (IS_ERR(data->hwmon_dev)) { + printk(KERN_INFO "hwmon_device_register1 fail.\n"); + err = PTR_ERR(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &data->hwmon_group); + } + else + { + init_completion(&data->auto_update_stop); + data->auto_update = kthread_run(i2c_bus1_hardware_monitor_update_thread, client, dev_name(data->hwmon_dev)); + if (IS_ERR(data->auto_update)) { + err = PTR_ERR(data->auto_update); + + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &data->hwmon_group); + } + } + } + } + + return err; +} + +static int w83795adg_hardware_monitor_remove(struct i2c_client *client) +{ + if(client->adapter->nr == 0x0) + { + struct i2c_bus0_hardware_monitor_data *data = i2c_get_clientdata(client); + kthread_stop(data->auto_update); + wait_for_completion(&data->auto_update_stop); + /* Watchdog Control Register Support */ + if (data->cpldRev != 0) + { + /* Disable WD function */ + i2c_smbus_write_byte_data(&cpld_client, CPLD_REG_GENERAL_0x06, 0x00); + } + + /* turn off all LEDs of front port */ + i2c_smbus_write_byte_data(&cpld_client, CPLD_REG_RESET_0x34, 0x00); + i2c_smbus_write_byte_data(&cpld_client, CPLD_REG_LED_0x40, 0x00); + i2c_smbus_write_byte_data(&cpld_client, CPLD_REG_LED_0x44, 0x00); + + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &data->hwmon_group); + } + else if(client->adapter->nr == 0x1) + { + struct i2c_bus1_hardware_monitor_data *data = i2c_get_clientdata(client); + kthread_stop(data->auto_update); + wait_for_completion(&data->auto_update_stop); + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &data->hwmon_group); + } + return 0; +} + +static void w83795adg_hardware_monitor_shutdown(struct i2c_client *client) +{ + if(client->adapter->nr == 0x0) + { + struct i2c_bus0_hardware_monitor_data *data = i2c_get_clientdata(client); + kthread_stop(data->auto_update); + wait_for_completion(&data->auto_update_stop); + /* Watchdog Control Register Support */ + if (data->cpldRev != 0) + { + /* Disable WD function */ + i2c_smbus_write_byte_data(&cpld_client, CPLD_REG_GENERAL_0x06, 0x00); + } + + /* turn off all LEDs of front port */ + i2c_smbus_write_byte_data(&cpld_client, CPLD_REG_RESET_0x34, 0x00); + i2c_smbus_write_byte_data(&cpld_client, CPLD_REG_LED_0x40, 0x00); + i2c_smbus_write_byte_data(&cpld_client, CPLD_REG_LED_0x44, 0x00); + /* reset MAC */ + i2c_smbus_write_byte_data(&cpld_client, CPLD_REG_RESET_0x30, 0x6e); + i2c_smbus_write_byte_data(&cpld_client, CPLD_REG_RESET_0x30, 0x6f); + + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &data->hwmon_group); + } + else if(client->adapter->nr == 0x1) + { + struct i2c_bus1_hardware_monitor_data *data = i2c_get_clientdata(client); + kthread_stop(data->auto_update); + wait_for_completion(&data->auto_update_stop); + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &data->hwmon_group); + } +} + +module_i2c_driver(w83795adg_hardware_monitor_driver); + +MODULE_AUTHOR("Raymond Huey "); +MODULE_DESCRIPTION("Foxconn W83795ADG Hardware Monitor driver"); +MODULE_LICENSE("GPL"); diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/.gitignore b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/.gitignore new file mode 100755 index 00000000..b0bf46e1 --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/.gitignore @@ -0,0 +1,2 @@ +*x86*64*netberg*aurora*620*rangeley*.mk +onlpdump.mk diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/Makefile b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/Makefile new file mode 100755 index 00000000..003238cf --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/modules/Makefile b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/modules/Makefile new file mode 100755 index 00000000..003238cf --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/modules/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/modules/PKG.yml b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/modules/PKG.yml new file mode 100755 index 00000000..ef81caea --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/modules/PKG.yml @@ -0,0 +1 @@ +!include $ONL_TEMPLATES/no-platform-modules.yml ARCH=amd64 VENDOR=netberg BASENAME=x86-64-netberg-aurora-620-rangeley diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/Makefile b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/Makefile new file mode 100755 index 00000000..003238cf --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/PKG.yml b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/PKG.yml new file mode 100755 index 00000000..3628e833 --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/PKG.yml @@ -0,0 +1 @@ +!include $ONL_TEMPLATES/onlp-platform-any.yml PLATFORM=x86-64-netberg-aurora-620-rangeley ARCH=amd64 TOOLCHAIN=x86_64-linux-gnu diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/Makefile b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/Makefile new file mode 100755 index 00000000..e7437cb2 --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/Makefile @@ -0,0 +1,2 @@ +FILTER=src +include $(ONL)/make/subdirs.mk diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/lib/Makefile b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/lib/Makefile new file mode 100755 index 00000000..473537ab --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/lib/Makefile @@ -0,0 +1,45 @@ +############################################################ +# +# +# Copyright 2014 BigSwitch Networks, Inc. +# +# Licensed under the Eclipse Public License, Version 1.0 (the +# "License"); you may not use this file except in compliance +# with the License. You may obtain a copy of the License at +# +# http://www.eclipse.org/legal/epl-v10.html +# +# Unless required by applicable law or agreed to in writing, +# software distributed under the License is distributed on an +# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, +# either express or implied. See the License for the specific +# language governing permissions and limitations under the +# License. +# +# +############################################################ +# +# +############################################################ +include $(ONL)/make/config.amd64.mk + +MODULE := libonlp-x86-64-netberg-aurora-620-rangeley +include $(BUILDER)/standardinit.mk + +DEPENDMODULES := AIM IOF x86_64_netberg_aurora_620_rangeley onlplib +DEPENDMODULE_HEADERS := sff + +include $(BUILDER)/dependmodules.mk + +SHAREDLIB := libonlp-x86-64-netberg-aurora-620-rangeley.so +$(SHAREDLIB)_TARGETS := $(ALL_TARGETS) +include $(BUILDER)/so.mk +.DEFAULT_GOAL := $(SHAREDLIB) + +GLOBAL_CFLAGS += -I$(onlp_BASEDIR)/module/inc +GLOBAL_CFLAGS += -DAIM_CONFIG_INCLUDE_MODULES_INIT=1 +GLOBAL_CFLAGS += -fPIC +GLOBAL_LINK_LIBS += -lpthread + +include $(BUILDER)/targets.mk + diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/onlpdump/Makefile b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/onlpdump/Makefile new file mode 100755 index 00000000..f9857a76 --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/onlpdump/Makefile @@ -0,0 +1,45 @@ +############################################################ +# +# +# Copyright 2014 BigSwitch Networks, Inc. +# +# Licensed under the Eclipse Public License, Version 1.0 (the +# "License"); you may not use this file except in compliance +# with the License. You may obtain a copy of the License at +# +# http://www.eclipse.org/legal/epl-v10.html +# +# Unless required by applicable law or agreed to in writing, +# software distributed under the License is distributed on an +# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, +# either express or implied. See the License for the specific +# language governing permissions and limitations under the +# License. +# +# +############################################################ +# +# +# +############################################################ +include $(ONL)/make/config.amd64.mk + +.DEFAULT_GOAL := onlpdump + +MODULE := onlpdump +include $(BUILDER)/standardinit.mk + +DEPENDMODULES := AIM IOF onlp x86_64_netberg_aurora_620_rangeley onlplib onlp_platform_defaults sff cjson cjson_util timer_wheel OS + +include $(BUILDER)/dependmodules.mk + +BINARY := onlpdump +$(BINARY)_LIBRARIES := $(LIBRARY_TARGETS) +include $(BUILDER)/bin.mk + +GLOBAL_CFLAGS += -DAIM_CONFIG_AIM_MAIN_FUNCTION=onlpdump_main +GLOBAL_CFLAGS += -DAIM_CONFIG_INCLUDE_MODULES_INIT=1 +GLOBAL_CFLAGS += -DAIM_CONFIG_INCLUDE_MAIN=1 +GLOBAL_LINK_LIBS += -lpthread -lm + +include $(BUILDER)/targets.mk diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/.module b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/.module new file mode 100755 index 00000000..6f21c84e --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/.module @@ -0,0 +1 @@ +name: x86_64_netberg_aurora_620_rangeley diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/Makefile b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/Makefile new file mode 100755 index 00000000..f52d7328 --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/Makefile @@ -0,0 +1,9 @@ +############################################################################### +# +# +# +############################################################################### +include $(ONL)/make/config.mk +MODULE := x86_64_netberg_aurora_620_rangeley +AUTOMODULE := x86_64_netberg_aurora_620_rangeley +include $(BUILDER)/definemodule.mk diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/auto/make.mk b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/auto/make.mk new file mode 100755 index 00000000..55fb2fb8 --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/auto/make.mk @@ -0,0 +1,9 @@ +############################################################################### +# +# x86_64_netberg_aurora_620_rangeley Autogeneration +# +############################################################################### +x86_64_netberg_aurora_620_rangeley_AUTO_DEFS := module/auto/x86_64_netberg_aurora_620_rangeley.yml +x86_64_netberg_aurora_620_rangeley_AUTO_DIRS := module/inc/x86_64_netberg_aurora_620_rangeley module/src +include $(BUILDER)/auto.mk + diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/auto/x86_64_netberg_aurora_620_rangeley.yml b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/auto/x86_64_netberg_aurora_620_rangeley.yml new file mode 100755 index 00000000..4f35e52b --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/auto/x86_64_netberg_aurora_620_rangeley.yml @@ -0,0 +1,114 @@ +############################################################################### +# +# x86_64_netberg_aurora_620_rangeley Autogeneration Definitions. +# +############################################################################### + +cdefs: &cdefs +- X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_INCLUDE_LOGGING: + doc: "Include or exclude logging." + default: 1 +- X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_LOG_OPTIONS_DEFAULT: + doc: "Default enabled log options." + default: AIM_LOG_OPTIONS_DEFAULT +- X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_LOG_BITS_DEFAULT: + doc: "Default enabled log bits." + default: AIM_LOG_BITS_DEFAULT +- X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_LOG_CUSTOM_BITS_DEFAULT: + doc: "Default enabled custom log bits." + default: 0 +- X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_PORTING_STDLIB: + doc: "Default all porting macros to use the C standard libraries." + default: 1 +- X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS: + doc: "Include standard library headers for stdlib porting macros." + default: X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_PORTING_STDLIB +- X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_INCLUDE_UCLI: + doc: "Include generic uCli support." + default: 0 +- X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_SYSFAN_RPM_FAILURE_THRESHOLD: + doc: "RPM Threshold at which the fan is considered to have failed." + default: 3000 + +definitions: + cdefs: + X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_HEADER: + defs: *cdefs + basename: x86_64_netberg_aurora_620_rangeley_config + + enum: &enums + + fan_id: + members: + - FAN1 : 1 + - FAN2 : 2 + - FAN3 : 3 + - FAN4 : 4 + - FAN5 : 5 + - FAN6 : 6 + - FAN7 : 7 + - FAN8 : 8 + - FAN9 : 9 + - FAN10 : 10 + + fan_oid: + members: + - FAN1 : ONLP_FAN_ID_CREATE(1) + - FAN2 : ONLP_FAN_ID_CREATE(2) + - FAN3 : ONLP_FAN_ID_CREATE(3) + - FAN4 : ONLP_FAN_ID_CREATE(4) + - FAN5 : ONLP_FAN_ID_CREATE(5) + - FAN6 : ONLP_FAN_ID_CREATE(6) + - FAN7 : ONLP_FAN_ID_CREATE(7) + - FAN8 : ONLP_FAN_ID_CREATE(8) + - FAN9 : ONLP_FAN_ID_CREATE(9) + - FAN10 : ONLP_FAN_ID_CREATE(10) + + psu_id: + members: + - PSU1 : 1 + - PSU2 : 2 + + psu_oid: + members: + - PSU1 : ONLP_PSU_ID_CREATE(1) + - PSU2 : ONLP_PSU_ID_CREATE(2) + + thermal_id: + members: + - THERMAL1 : 1 + - THERMAL2 : 2 + - THERMAL3 : 3 + - THERMAL4 : 4 + - THERMAL5 : 5 + - THERMAL6 : 6 + - THERMAL7 : 7 + + thermal_oid: + members: + - THERMAL1 : ONLP_THERMAL_ID_CREATE(1) + - THERMAL2 : ONLP_THERMAL_ID_CREATE(2) + - THERMAL3 : ONLP_THERMAL_ID_CREATE(3) + - THERMAL4 : ONLP_THERMAL_ID_CREATE(4) + - THERMAL5 : ONLP_THERMAL_ID_CREATE(5) + - THERMAL6 : ONLP_THERMAL_ID_CREATE(6) + - THERMAL7 : ONLP_THERMAL_ID_CREATE(7) + + led_id: + members: + - STAT : 1 + + led_oid: + members: + - STAT : ONLP_LED_ID_CREATE(1) + + + portingmacro: + X86_64_NETBERG_AURORA_620_RANGELEY: + macros: + - memset + - memcpy + - strncpy + - vsnprintf + - snprintf + - strlen diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/inc/x86_64_netberg_aurora_620_rangeley/x86_64_netberg_aurora_620_rangeley.x b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/inc/x86_64_netberg_aurora_620_rangeley/x86_64_netberg_aurora_620_rangeley.x new file mode 100755 index 00000000..c8ee3e74 --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/inc/x86_64_netberg_aurora_620_rangeley/x86_64_netberg_aurora_620_rangeley.x @@ -0,0 +1,14 @@ +/**************************************************************************//** + * + * + * + *****************************************************************************/ +#include + +/* <--auto.start.xmacro(ALL).define> */ +/* */ + +/* <--auto.start.xenum(ALL).define> */ +/* */ + + diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/inc/x86_64_netberg_aurora_620_rangeley/x86_64_netberg_aurora_620_rangeley_config.h b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/inc/x86_64_netberg_aurora_620_rangeley/x86_64_netberg_aurora_620_rangeley_config.h new file mode 100755 index 00000000..ecd344e3 --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/inc/x86_64_netberg_aurora_620_rangeley/x86_64_netberg_aurora_620_rangeley_config.h @@ -0,0 +1,135 @@ +/**************************************************************************//** + * + * @file + * @brief x86_64_netberg_aurora_620_rangeley Configuration Header + * + * @addtogroup x86_64_netberg_aurora_620_rangeley-config + * @{ + * + *****************************************************************************/ +#ifndef __X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_H__ +#define __X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_H__ + +#ifdef GLOBAL_INCLUDE_CUSTOM_CONFIG +#include +#endif +#ifdef X86_64_NETBERG_AURORA_620_RANGELEY_INCLUDE_CUSTOM_CONFIG +#include +#endif + +/* */ +#include +/** + * X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_INCLUDE_LOGGING + * + * Include or exclude logging. */ + + +#ifndef X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_INCLUDE_LOGGING +#define X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_INCLUDE_LOGGING 1 +#endif + +/** + * X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_LOG_OPTIONS_DEFAULT + * + * Default enabled log options. */ + + +#ifndef X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_LOG_OPTIONS_DEFAULT +#define X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_LOG_OPTIONS_DEFAULT AIM_LOG_OPTIONS_DEFAULT +#endif + +/** + * X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_LOG_BITS_DEFAULT + * + * Default enabled log bits. */ + + +#ifndef X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_LOG_BITS_DEFAULT +#define X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_LOG_BITS_DEFAULT AIM_LOG_BITS_DEFAULT +#endif + +/** + * X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_LOG_CUSTOM_BITS_DEFAULT + * + * Default enabled custom log bits. */ + + +#ifndef X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_LOG_CUSTOM_BITS_DEFAULT +#define X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_LOG_CUSTOM_BITS_DEFAULT 0 +#endif + +/** + * X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_PORTING_STDLIB + * + * Default all porting macros to use the C standard libraries. */ + + +#ifndef X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_PORTING_STDLIB +#define X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_PORTING_STDLIB 1 +#endif + +/** + * X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS + * + * Include standard library headers for stdlib porting macros. */ + + +#ifndef X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS +#define X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_PORTING_STDLIB +#endif + +/** + * X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_INCLUDE_UCLI + * + * Include generic uCli support. */ + + +#ifndef X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_INCLUDE_UCLI +#define X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_INCLUDE_UCLI 0 +#endif + +/** + * X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_SYSFAN_RPM_FAILURE_THRESHOLD + * + * RPM Threshold at which the fan is considered to have failed. */ + + +#ifndef X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_SYSFAN_RPM_FAILURE_THRESHOLD +#define X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_SYSFAN_RPM_FAILURE_THRESHOLD 3000 +#endif + +/** + * All compile time options can be queried or displayed + */ + +/** Configuration settings structure. */ +typedef struct x86_64_netberg_aurora_620_rangeley_config_settings_s { + /** name */ + const char* name; + /** value */ + const char* value; +} x86_64_netberg_aurora_620_rangeley_config_settings_t; + +/** Configuration settings table. */ +/** x86_64_netberg_aurora_620_rangeley_config_settings table. */ +extern x86_64_netberg_aurora_620_rangeley_config_settings_t x86_64_netberg_aurora_620_rangeley_config_settings[]; + +/** + * @brief Lookup a configuration setting. + * @param setting The name of the configuration option to lookup. + */ +const char* x86_64_netberg_aurora_620_rangeley_config_lookup(const char* setting); + +/** + * @brief Show the compile-time configuration. + * @param pvs The output stream. + */ +int x86_64_netberg_aurora_620_rangeley_config_show(struct aim_pvs_s* pvs); + +/* */ + +#include "x86_64_netberg_aurora_620_rangeley_porting.h" + +#endif /* __X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_H__ */ +/* @} */ diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/inc/x86_64_netberg_aurora_620_rangeley/x86_64_netberg_aurora_620_rangeley_dox.h b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/inc/x86_64_netberg_aurora_620_rangeley/x86_64_netberg_aurora_620_rangeley_dox.h new file mode 100755 index 00000000..9f1e463a --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/inc/x86_64_netberg_aurora_620_rangeley/x86_64_netberg_aurora_620_rangeley_dox.h @@ -0,0 +1,26 @@ +/**************************************************************************//** + * + * x86_64_netberg_aurora_620_rangeley Doxygen Header + * + *****************************************************************************/ +#ifndef __X86_64_NETBERG_AURORA_620_RANGELEY_DOX_H__ +#define __X86_64_NETBERG_AURORA_620_RANGELEY_DOX_H__ + +/** + * @defgroup x86_64_netberg_aurora_620_rangeley x86_64_netberg_aurora_620_rangeley - x86_64_netberg_aurora_620_rangeley Description + * + +The documentation overview for this module should go here. + + * + * @{ + * + * @defgroup x86_64_netberg_aurora_620_rangeley-x86_64_netberg_aurora_620_rangeley Public Interface + * @defgroup x86_64_netberg_aurora_620_rangeley-config Compile Time Configuration + * @defgroup x86_64_netberg_aurora_620_rangeley-porting Porting Macros + * + * @} + * + */ + +#endif /* __X86_64_NETBERG_AURORA_620_RANGELEY_DOX_H__ */ diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/inc/x86_64_netberg_aurora_620_rangeley/x86_64_netberg_aurora_620_rangeley_porting.h b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/inc/x86_64_netberg_aurora_620_rangeley/x86_64_netberg_aurora_620_rangeley_porting.h new file mode 100755 index 00000000..0de01c60 --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/inc/x86_64_netberg_aurora_620_rangeley/x86_64_netberg_aurora_620_rangeley_porting.h @@ -0,0 +1,87 @@ +/**************************************************************************//** + * + * @file + * @brief x86_64_netberg_aurora_620_rangeley Porting Macros. + * + * @addtogroup x86_64_netberg_aurora_620_rangeley-porting + * @{ + * + *****************************************************************************/ +#ifndef __X86_64_NETBERG_AURORA_620_RANGELEY_PORTING_H__ +#define __X86_64_NETBERG_AURORA_620_RANGELEY_PORTING_H__ + + +/* */ +#if X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS == 1 +#include +#include +#include +#include +#include +#endif + +#ifndef X86_64_NETBERG_AURORA_620_RANGELEY_MEMSET + #if defined(GLOBAL_MEMSET) + #define X86_64_NETBERG_AURORA_620_RANGELEY_MEMSET GLOBAL_MEMSET + #elif X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_PORTING_STDLIB == 1 + #define X86_64_NETBERG_AURORA_620_RANGELEY_MEMSET memset + #else + #error The macro X86_64_NETBERG_AURORA_620_RANGELEY_MEMSET is required but cannot be defined. + #endif +#endif + +#ifndef X86_64_NETBERG_AURORA_620_RANGELEY_MEMCPY + #if defined(GLOBAL_MEMCPY) + #define X86_64_NETBERG_AURORA_620_RANGELEY_MEMCPY GLOBAL_MEMCPY + #elif X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_PORTING_STDLIB == 1 + #define X86_64_NETBERG_AURORA_620_RANGELEY_MEMCPY memcpy + #else + #error The macro X86_64_NETBERG_AURORA_620_RANGELEY_MEMCPY is required but cannot be defined. + #endif +#endif + +#ifndef X86_64_NETBERG_AURORA_620_RANGELEY_STRNCPY + #if defined(GLOBAL_STRNCPY) + #define X86_64_NETBERG_AURORA_620_RANGELEY_STRNCPY GLOBAL_STRNCPY + #elif X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_PORTING_STDLIB == 1 + #define X86_64_NETBERG_AURORA_620_RANGELEY_STRNCPY strncpy + #else + #error The macro X86_64_NETBERG_AURORA_620_RANGELEY_STRNCPY is required but cannot be defined. + #endif +#endif + +#ifndef X86_64_NETBERG_AURORA_620_RANGELEY_VSNPRINTF + #if defined(GLOBAL_VSNPRINTF) + #define X86_64_NETBERG_AURORA_620_RANGELEY_VSNPRINTF GLOBAL_VSNPRINTF + #elif X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_PORTING_STDLIB == 1 + #define X86_64_NETBERG_AURORA_620_RANGELEY_VSNPRINTF vsnprintf + #else + #error The macro X86_64_NETBERG_AURORA_620_RANGELEY_VSNPRINTF is required but cannot be defined. + #endif +#endif + +#ifndef X86_64_NETBERG_AURORA_620_RANGELEY_SNPRINTF + #if defined(GLOBAL_SNPRINTF) + #define X86_64_NETBERG_AURORA_620_RANGELEY_SNPRINTF GLOBAL_SNPRINTF + #elif X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_PORTING_STDLIB == 1 + #define X86_64_NETBERG_AURORA_620_RANGELEY_SNPRINTF snprintf + #else + #error The macro X86_64_NETBERG_AURORA_620_RANGELEY_SNPRINTF is required but cannot be defined. + #endif +#endif + +#ifndef X86_64_NETBERG_AURORA_620_RANGELEY_STRLEN + #if defined(GLOBAL_STRLEN) + #define X86_64_NETBERG_AURORA_620_RANGELEY_STRLEN GLOBAL_STRLEN + #elif X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_PORTING_STDLIB == 1 + #define X86_64_NETBERG_AURORA_620_RANGELEY_STRLEN strlen + #else + #error The macro X86_64_NETBERG_AURORA_620_RANGELEY_STRLEN is required but cannot be defined. + #endif +#endif + +/* */ + + +#endif /* __X86_64_NETBERG_AURORA_620_RANGELEY_PORTING_H__ */ +/* @} */ diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/make.mk b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/make.mk new file mode 100755 index 00000000..c8bda195 --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/make.mk @@ -0,0 +1,10 @@ +############################################################################### +# +# +# +############################################################################### +THIS_DIR := $(dir $(lastword $(MAKEFILE_LIST))) +x86_64_netberg_aurora_620_rangeley_INCLUDES := -I $(THIS_DIR)inc +x86_64_netberg_aurora_620_rangeley_INTERNAL_INCLUDES := -I $(THIS_DIR)src +x86_64_netberg_aurora_620_rangeley_DEPENDMODULE_ENTRIES := init:x86_64_netberg_aurora_620_rangeley ucli:x86_64_netberg_aurora_620_rangeley + diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/Makefile b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/Makefile new file mode 100755 index 00000000..20b8893c --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/Makefile @@ -0,0 +1,9 @@ +############################################################################### +# +# Local source generation targets. +# +############################################################################### + +ucli: + @../../../../tools/uclihandlers.py x86_64_netberg_aurora_620_rangeley_ucli.c + diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/fani.c b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/fani.c new file mode 100755 index 00000000..ea901954 --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/fani.c @@ -0,0 +1,234 @@ +/************************************************************ + * + * + * Copyright 2014 Big Switch Networks, Inc. + * + * Licensed under the Eclipse Public License, Version 1.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.eclipse.org/legal/epl-v10.html + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, + * either express or implied. See the License for the specific + * language governing permissions and limitations under the + * License. + * + * + ************************************************************ + * + * + * + ***********************************************************/ +#include +#include + +#include "x86_64_netberg_aurora_620_rangeley_int.h" +#include "x86_64_netberg_aurora_620_rangeley_log.h" + +#include + + +#define VALIDATE(_id) \ + do { \ + if(!ONLP_OID_IS_FAN(_id)) { \ + return ONLP_STATUS_E_INVALID; \ + } \ + } while(0) + +static int +sys_fan_info_get__(onlp_fan_info_t* info, int id) +{ + int value = 0; + int rv; + + rv = onlp_file_read_int(&value, SYS_HWMON2_PREFIX "/fan%d_abs", ((id/2)+1)); + if (rv != ONLP_STATUS_OK) + return rv; + + if (value == 0) + { + info->status = ONLP_FAN_STATUS_FAILED; + } + else + { + info->status = ONLP_FAN_STATUS_PRESENT; + + rv = onlp_file_read_int(&value, SYS_HWMON2_PREFIX "/fan%d_dir", ((id/2)+1)); + if (rv != ONLP_STATUS_OK) + return rv; + + if (value == 0) + { + info->status |= ONLP_FAN_STATUS_B2F; + info->caps |= ONLP_FAN_CAPS_B2F; + } + else + { + info->status |= ONLP_FAN_STATUS_F2B; + info->caps |= ONLP_FAN_CAPS_F2B; + } + + rv = onlp_file_read_int(&(info->rpm), SYS_HWMON1_PREFIX "/fan%d_rpm", (id+1)); + if (rv == ONLP_STATUS_E_INTERNAL) + return rv; + + if (rv == ONLP_STATUS_E_MISSING) + { + info->status &= ~1; + return 0; + } + + if (info->rpm <= X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_SYSFAN_RPM_FAILURE_THRESHOLD) + info->status |= ONLP_FAN_STATUS_FAILED; + + + rv = onlp_file_read_int(&(info->percentage), SYS_HWMON1_PREFIX "/fan%d_duty", (id+1)); + if (rv == ONLP_STATUS_E_INTERNAL) + return rv; + + if (rv == ONLP_STATUS_E_MISSING) + { + info->status &= ~1; + return 0; + } + } + return 0; +} + +static int +psu_fan_info_get__(onlp_fan_info_t* info, int id) +{ + return onlp_file_read_int(&(info->rpm), SYS_HWMON2_PREFIX "/psu%d_fan_speed", id); +} + +/* Onboard Fans */ +static onlp_fan_info_t fans__[] = { + { }, /* Not used */ + { { FAN_OID_FAN1, "Fan1_rotor1", 0}, ONLP_FAN_STATUS_PRESENT }, + { { FAN_OID_FAN2, "Fan1_rotor2", 0}, ONLP_FAN_STATUS_PRESENT }, + { { FAN_OID_FAN3, "Fan2_rotor1", 0}, ONLP_FAN_STATUS_PRESENT }, + { { FAN_OID_FAN4, "Fan2_rotor2", 0}, ONLP_FAN_STATUS_PRESENT }, + { { FAN_OID_FAN5, "Fan3_rotor1", 0}, ONLP_FAN_STATUS_PRESENT }, + { { FAN_OID_FAN6, "Fan3_rotor2", 0}, ONLP_FAN_STATUS_PRESENT }, + { { FAN_OID_FAN7, "Fan4_rotor1", 0}, ONLP_FAN_STATUS_PRESENT }, + { { FAN_OID_FAN8, "Fan4_rotor2", 0}, ONLP_FAN_STATUS_PRESENT }, + { { FAN_OID_FAN9, "PSU-1 Fan", 0 }, ONLP_FAN_STATUS_PRESENT }, + { { FAN_OID_FAN10, "PSU-2 Fan", 0 }, ONLP_FAN_STATUS_PRESENT }, +}; + +/* + * This function will be called prior to all of onlp_fani_* functions. + */ +int +onlp_fani_init(void) +{ + return ONLP_STATUS_OK; +} + +int +onlp_fani_info_get(onlp_oid_t id, onlp_fan_info_t* info) +{ + int fid; + + VALIDATE(id); + + memset(info, 0, sizeof(onlp_fan_info_t)); + fid = ONLP_OID_ID_GET(id); + *info = fans__[fid]; + + info->caps |= ONLP_FAN_CAPS_GET_RPM; + + switch(fid) + { + case FAN_ID_FAN1: + case FAN_ID_FAN2: + case FAN_ID_FAN3: + case FAN_ID_FAN4: + case FAN_ID_FAN5: + case FAN_ID_FAN6: + case FAN_ID_FAN7: + case FAN_ID_FAN8: + return sys_fan_info_get__(info, (fid - 1)); + break; + + case FAN_ID_FAN9: + case FAN_ID_FAN10: + return psu_fan_info_get__(info, (fid - FAN_ID_FAN9 + 1)); + break; + + default: + return ONLP_STATUS_E_INVALID; + break; + } + + return ONLP_STATUS_E_INVALID; +} + +/* + * This function sets the speed of the given fan in RPM. + * + * This function will only be called if the fan supprots the RPM_SET + * capability. + * + * It is optional if you have no fans at all with this feature. + */ +int +onlp_fani_rpm_set(onlp_oid_t id, int rpm) +{ + return ONLP_STATUS_E_UNSUPPORTED; +} + + +/* + * This function sets the fan speed of the given OID as a percentage. + * + * This will only be called if the OID has the PERCENTAGE_SET + * capability. + * + * It is optional if you have no fans at all with this feature. + */ +int +onlp_fani_percentage_set(onlp_oid_t id, int p) +{ + return ONLP_STATUS_E_UNSUPPORTED; +} + +/* + * This function sets the fan speed of the given OID as per + * the predefined ONLP fan speed modes: off, slow, normal, fast, max. + * + * Interpretation of these modes is up to the platform. + * + */ +int +onlp_fani_mode_set(onlp_oid_t id, onlp_fan_mode_t mode) +{ + return ONLP_STATUS_E_UNSUPPORTED; +} + +/* + * This function sets the fan direction of the given OID. + * + * This function is only relevant if the fan OID supports both direction + * capabilities. + * + * This function is optional unless the functionality is available. + */ +int +onlp_fani_dir_set(onlp_oid_t id, onlp_fan_dir_t dir) +{ + return ONLP_STATUS_E_UNSUPPORTED; +} + +/* + * Generic fan ioctl. Optional. + */ +int +onlp_fani_ioctl(onlp_oid_t id, va_list vargs) +{ + return ONLP_STATUS_E_UNSUPPORTED; +} + diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/ledi.c b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/ledi.c new file mode 100755 index 00000000..d988e81d --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/ledi.c @@ -0,0 +1,165 @@ +/************************************************************ + * + * + * Copyright 2014 Big Switch Networks, Inc. + * Copyright 2013 Accton Technology Corporation. + * + * Licensed under the Eclipse Public License, Version 1.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.eclipse.org/legal/epl-v10.html + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, + * either express or implied. See the License for the specific + * language governing permissions and limitations under the + * License. + * + * + ************************************************************ + * + * + * + ***********************************************************/ +#include +#include +#include "x86_64_netberg_aurora_620_rangeley_int.h" + +#define VALIDATE(_id) \ + do { \ + if(!ONLP_OID_IS_LED(_id)) { \ + return ONLP_STATUS_E_INVALID; \ + } \ + } while(0) + +/* LED related data + */ +enum led_light_mode { /*must be the same with the definition @ kernel driver */ + LED_MODE_OFF = 0, + LED_MODE_AMBER, + LED_MODE_GREEN, +}; + +int led_light_map_mode[][2] = +{ + {LED_MODE_OFF, ONLP_LED_MODE_OFF}, + {LED_MODE_AMBER, ONLP_LED_MODE_ORANGE}, + {LED_MODE_GREEN, ONLP_LED_MODE_GREEN}, +}; + +/* + * Get the information for the given LED OID. + */ +static onlp_led_info_t linfo[] = +{ + { }, /* Not used */ + { + { LED_OID_LED1, "Chassis LED 1 (STAT LED)", 0 }, + ONLP_LED_STATUS_PRESENT, + ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_ORANGE | ONLP_LED_CAPS_GREEN, + ONLP_LED_MODE_OFF, + }, +}; + +static int conver_led_light_mode_to_driver(int led_ligth_mode) +{ + int i, nsize = sizeof(led_light_map_mode)/sizeof(led_light_map_mode[0]); + for(i=0; i + * + ************************************************************ + * + * + * + ***********************************************************/ +#include +#include +#include +#include "x86_64_netberg_aurora_620_rangeley_int.h" +#include "x86_64_netberg_aurora_620_rangeley_log.h" + +extern int toHexValue(char ch); + +#define VALIDATE(_id) \ + do { \ + if(!ONLP_OID_IS_PSU(_id)) { \ + return ONLP_STATUS_E_INVALID; \ + } \ + } while(0) + +static onlp_psu_info_t psus__[] = { + { }, /* Not used */ + { + { + PSU_OID_PSU1, + "PSU-1", + 0, + { + FAN_OID_FAN9, + }, + } + }, + { + { + PSU_OID_PSU2, + "PSU-2", + 0, + { + FAN_OID_FAN10, + }, + } + }, +}; + +/* + * This function will be called prior to any other onlp_psui functions. + */ +int +onlp_psui_init(void) +{ + return ONLP_STATUS_OK; +} + +int +onlp_psui_info_get(onlp_oid_t id, onlp_psu_info_t* info) +{ + int rv; + int pid; + uint8_t buffer[512]; + uint8_t data[256]; + int value = -1; + int len; + double dvalue; + int i, j; + + VALIDATE(id); + + memset(info, 0, sizeof(onlp_psu_info_t)); + pid = ONLP_OID_ID_GET(id); + *info = psus__[pid]; + + rv = onlp_file_read_int(&value, SYS_HWMON1_PREFIX "/psu%d_abs", pid); + if (rv != ONLP_STATUS_OK) + return rv; + if (value == 0) + { + info->status = ONLP_PSU_STATUS_UNPLUGGED; + return ONLP_STATUS_OK; + } + + /* PSU is present. */ + info->status = ONLP_PSU_STATUS_PRESENT; + + memset(buffer, 0, sizeof(buffer)); + memset(data, 0, sizeof(data)); + rv = onlp_file_read(buffer, sizeof(buffer), &len, SYS_HWMON2_PREFIX "/psu%d_eeprom", pid); + if (rv == ONLP_STATUS_OK) + { + j = 0; + for (i=0; i<256; i++) + { + data[i] = (toHexValue(buffer[j])<<4) + toHexValue(buffer[j+1]); + j += 2; + } + i = 11; + + /* Manufacturer Name */ + len = (data[i]&0x0f); + i++; + i += len; + + /* Product Name */ + len = (data[i]&0x0f); + i++; + memcpy(info->model, (char *) &(data[i]), len); + i += len; + + /* Product part,model number */ + len = (data[i]&0x0f); + i++; + i += len; + + /* Product Version */ + len = (data[i]&0x0f); + i++; + i += len; + + /* Product Serial Number */ + len = (data[i]&0x0f); + i++; + memcpy(info->serial, (char *) &(data[i]), len); + } + else + { + strcpy(info->model, "Missing"); + strcpy(info->serial, "Missing"); + } + + info->caps |= ONLP_PSU_CAPS_AC; + +#if 0 + /* PSU is powered. */ + rv = onlp_file_read_int(&value, SYS_HWMON1_PREFIX "/psu%d_pg", pid); + if (rv != ONLP_STATUS_OK) + return rv; + if (value == 0) + { + info->status |= ONLP_PSU_STATUS_FAILED; + return ONLP_STATUS_OK; + } +#endif + + memset(buffer, 0, sizeof(buffer)); + rv = onlp_file_read(buffer, sizeof(buffer), &len, SYS_HWMON2_PREFIX "/psu%d_iout", pid); + if (rv == ONLP_STATUS_OK) + { + dvalue = atof((const char *)buffer); + if (dvalue > 0.0) + { + info->caps |= ONLP_PSU_CAPS_IOUT; + info->miout = (int)(dvalue * 1000); + } + } + + memset(buffer, 0, sizeof(buffer)); + rv = onlp_file_read(buffer, sizeof(buffer), &len, SYS_HWMON2_PREFIX "/psu%d_vout", pid); + if (rv == ONLP_STATUS_OK) + { + dvalue = atof((const char *)buffer); + if (dvalue > 0.0) + { + info->caps |= ONLP_PSU_CAPS_VOUT; + info->mvout = (int)(dvalue * 1000); + } + } + + memset(buffer, 0, sizeof(buffer)); + rv = onlp_file_read(buffer, sizeof(buffer), &len, SYS_HWMON2_PREFIX "/psu%d_pin", pid); + if (rv == ONLP_STATUS_OK) + { + dvalue = atof((const char *)buffer); + if (dvalue > 0.0) + { + info->caps |= ONLP_PSU_CAPS_PIN; + info->mpin = (int)(dvalue * 1000); + } + } + + memset(buffer, 0, sizeof(buffer)); + rv = onlp_file_read(buffer, sizeof(buffer), &len, SYS_HWMON2_PREFIX "/psu%d_pout", pid); + if (rv == ONLP_STATUS_OK) + { + dvalue = atof((const char *)buffer); + if (dvalue > 0.0) + { + info->caps |= ONLP_PSU_CAPS_POUT; + info->mpout = (int)(dvalue * 1000); + } + } + + return ONLP_STATUS_OK; +} + +/* + * This is an optional generic ioctl() interface. + * Its purpose is to allow future expansion and + * custom functionality that is not otherwise exposed + * in the standard interface. + * + * The semantics of this function are platform specific. + * This function is completely optional. + */ +int +onlp_psui_ioctl(onlp_oid_t pid, va_list vargs) +{ + return ONLP_STATUS_E_UNSUPPORTED; +} + diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/sfpi.c b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/sfpi.c new file mode 100755 index 00000000..bcb3c86e --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/sfpi.c @@ -0,0 +1,389 @@ +/************************************************************ + * + * + * Copyright 2014 Big Switch Networks, Inc. + * + * Licensed under the Eclipse Public License, Version 1.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.eclipse.org/legal/epl-v10.html + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, + * either express or implied. See the License for the specific + * language governing permissions and limitations under the + * License. + * + * + ************************************************************ + * + * SFPI Interface for the Aurora 620 Platform + * + ***********************************************************/ +#include +#include +#include +#include +#include +#include "x86_64_netberg_aurora_620_rangeley_int.h" +#include "x86_64_netberg_aurora_620_rangeley_log.h" + +#include +#include + +/* Model ID Definition */ +typedef enum +{ + HURACAN_WITH_BMC = 0x0, + HURACAN_WITHOUT_BMC, + CABRERAIII_WITH_BMC, + CABRERAIII_WITHOUT_BMC, + SESTO_WITH_BMC, + SESTO_WITHOUT_BMC, + NCIIX_WITH_BMC, + NCIIX_WITHOUT_BMC, + ASTERION_WITH_BMC, + ASTERION_WITHOUT_BMC, + HURACAN_A_WITH_BMC, + HURACAN_A_WITHOUT_BMC, + + MODEL_ID_LAST +} modelId_t; + +static int +onlp_board_model_id_get(void) +{ + static int board_model_id = MODEL_ID_LAST; + + if (board_model_id == MODEL_ID_LAST) + { + if (onlp_file_read_int(&board_model_id, SYS_HWMON1_PREFIX "/board_model_id") != ONLP_STATUS_OK) + return 0; + } + + return board_model_id; +} + +/* + * This function will be called prior to all other onlp_sfpi_* functions. + */ +int +onlp_sfpi_init(void) +{ + return ONLP_STATUS_OK; +} + +/* + * This function should populate the give bitmap with + * all valid, SFP-capable port numbers. + * + * Only port numbers in this bitmap will be queried by the the + * ONLP framework. + * + * No SFPI functions will be called with ports that are + * not in this bitmap. You can ignore all error checking + * on the incoming ports defined in this interface. + */ +int +onlp_sfpi_bitmap_get(onlp_sfp_bitmap_t* bmap) +{ + int p; + int total_port = 0; + int board_model_id = onlp_board_model_id_get(); + + switch (board_model_id) + { + case HURACAN_WITH_BMC: + case HURACAN_WITHOUT_BMC: + case HURACAN_A_WITH_BMC: + case HURACAN_A_WITHOUT_BMC: + total_port = 32; + break; + + case SESTO_WITH_BMC: + case SESTO_WITHOUT_BMC: + case NCIIX_WITH_BMC: + case NCIIX_WITHOUT_BMC: + total_port = 54; + break; + + case ASTERION_WITH_BMC: + case ASTERION_WITHOUT_BMC: + total_port = 64; + break; + + default: + break; + } + + AIM_BITMAP_CLR_ALL(bmap); + for(p = 0; p < total_port; p++) + AIM_BITMAP_SET(bmap, p); + + return ONLP_STATUS_OK; +} + +/* + * This function should return whether an SFP is inserted on the given + * port. + * + * Returns 1 if the SFP is present. + * Returns 0 if the SFP is not present. + * Returns ONLP_E_* if there was an error determining the status. + */ +int +onlp_sfpi_is_present(int port) +{ + int value = 0; + + onlp_file_read_int(&value, SYS_HWMON2_PREFIX "/port_%d_abs", (port+1)); + return value; +} + +int +onlp_sfpi_port_map(int port, int* rport) +{ + int board_model_id = onlp_board_model_id_get(); + + switch (board_model_id) + { + case HURACAN_WITH_BMC: + case HURACAN_WITHOUT_BMC: + case HURACAN_A_WITH_BMC: + case HURACAN_A_WITHOUT_BMC: + /* odd <=> even */ + if (port & 0x1) + *rport = (port - 1); + else + *rport = (port + 1); + break; + + default: + *rport = port; break; + } + + return ONLP_STATUS_OK; +} + +int +onlp_sfpi_presence_bitmap_get(onlp_sfp_bitmap_t* dst) +{ + return ONLP_STATUS_E_UNSUPPORTED; +} + +int +onlp_sfpi_rx_los_bitmap_get(onlp_sfp_bitmap_t* bmap) +{ + int p; + int total_port = 0; + int board_model_id = onlp_board_model_id_get(); + + switch (board_model_id) + { + case SESTO_WITH_BMC: + case SESTO_WITHOUT_BMC: + case NCIIX_WITH_BMC: + case NCIIX_WITHOUT_BMC: + case ASTERION_WITH_BMC: + case ASTERION_WITHOUT_BMC: + total_port = 48; + break; + + default: + break; + } + + AIM_BITMAP_CLR_ALL(bmap); + for(p = 0; p < total_port; p++) + AIM_BITMAP_SET(bmap, p); + + return ONLP_STATUS_OK; +} + +/* + * This function reads the SFPs idrom and returns in + * in the data buffer provided. + */ +int +onlp_sfpi_eeprom_read(int port, uint8_t data[256]) +{ + int rv = ONLP_STATUS_OK; + char fname[128]; + + memset(data, 0, 256); + memset(fname, 0, sizeof(fname)); + sprintf(fname, SYS_HWMON2_PREFIX "/port_%d_data_a0", (port+1)); + rv = onlplib_sfp_eeprom_read_file(fname, data); + if (rv != ONLP_STATUS_OK) + AIM_LOG_INFO("Unable to read eeprom from port(%d)\r\n", port); + + return rv; +} + +int +onlp_sfpi_dom_read(int port, uint8_t data[256]) +{ + int rv = ONLP_STATUS_OK; + char fname[128]; + + memset(data, 0, 256); + memset(fname, 0, sizeof(fname)); + sprintf(fname, SYS_HWMON2_PREFIX "/port_%d_data_a2", (port+1)); + rv = onlplib_sfp_eeprom_read_file(fname, data); + if (rv != ONLP_STATUS_OK) + AIM_LOG_INFO("Unable to read eeprom from port(%d)\r\n", port); + + return rv; +} + +/* + * Manually enable or disable the given SFP. + * + */ +int +onlp_sfpi_enable_set(int port, int enable) +{ + return ONLP_STATUS_E_UNSUPPORTED; +} + +/* + * Returns whether the SFP is currently enabled or disabled. + */ +int +onlp_sfpi_enable_get(int port, int* enable) +{ + return ONLP_STATUS_E_UNSUPPORTED; +} + +/* + * If the platform requires any setup or equalizer modifications + * based on the actual SFP that was inserted then that custom + * setup should be performed here. + * + * After a new SFP is detected by the ONLP framework this + * function will be called to perform the (optional) setup. + */ +int +onlp_sfpi_post_insert(int port, sff_info_t* sff_info) +{ + return ONLP_STATUS_E_UNSUPPORTED; +} + +/* + * Return the current status of the SFP. + * See onlp_sfp_status_t; + */ +int +onlp_sfpi_status_get(int port, uint32_t* status) +{ + return ONLP_STATUS_E_UNSUPPORTED; +} + +int onlp_sfpi_control_supported(int port, onlp_sfp_control_t control, int* supported) +{ + if (supported == NULL) + return ONLP_STATUS_E_PARAM; + + *supported = 0; + switch (control) + { + case ONLP_SFP_CONTROL_TX_DISABLE: + case ONLP_SFP_CONTROL_RX_LOS: + { + int board_model_id = onlp_board_model_id_get(); + + switch (board_model_id) + { + case SESTO_WITH_BMC: + case SESTO_WITHOUT_BMC: + case NCIIX_WITH_BMC: + case NCIIX_WITHOUT_BMC: + case ASTERION_WITH_BMC: + case ASTERION_WITHOUT_BMC: + if (port < 48) + *supported = 1; + break; + + default: + break; + } + } + break; + + default: + break; + } + + return ONLP_STATUS_OK; +} + +int +onlp_sfpi_control_set(int port, onlp_sfp_control_t control, int value) +{ + int rv = ONLP_STATUS_OK; + int supported = 0; + + if ((onlp_sfpi_control_supported(port, control, &supported) == ONLP_STATUS_OK) && (supported == 0)) + return ONLP_STATUS_E_UNSUPPORTED; + + switch (control) + { + case ONLP_SFP_CONTROL_TX_DISABLE: + rv = onlp_file_write_int(value, SYS_HWMON2_PREFIX "/port_%d_tx_disable", (port+1)); + break; + + default: + break; + } + return rv; +} + +int +onlp_sfpi_control_get(int port, onlp_sfp_control_t control, int* value) +{ + int rv = ONLP_STATUS_OK; + int supported = 0; + + if (value == NULL) + return ONLP_STATUS_E_PARAM; + + if ((onlp_sfpi_control_supported(port, control, &supported) == ONLP_STATUS_OK) && (supported == 0)) + return ONLP_STATUS_E_UNSUPPORTED; + + *value = 0; + switch (control) + { + case ONLP_SFP_CONTROL_RX_LOS: + rv = onlp_file_read_int(value, SYS_HWMON2_PREFIX "/port_%d_rxlos", (port+1)); + break; + + case ONLP_SFP_CONTROL_TX_DISABLE: + rv = onlp_file_read_int(value, SYS_HWMON2_PREFIX "/port_%d_tx_disable", (port+1)); + break; + + default: + break; + } + return rv; +} + +/* + * This is a generic ioctl interface. + */ +int +onlp_sfpi_ioctl(int port, va_list vargs) +{ + return ONLP_STATUS_E_UNSUPPORTED; +} + +/* + * De-initialize the SFPI subsystem. + */ +int +onlp_sfpi_denit(void) +{ + return ONLP_STATUS_OK; +} + diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/sysi.c b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/sysi.c new file mode 100755 index 00000000..820dd56c --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/sysi.c @@ -0,0 +1,139 @@ +/************************************************************ + * + * + ************************************************************ + * + * + * + ***********************************************************/ +#include +#include +#include "x86_64_netberg_aurora_620_rangeley_int.h" +#include "x86_64_netberg_aurora_620_rangeley_log.h" + +int toHexValue(char ch) +{ + if ((ch >= '0')&&(ch <= '9')) + { + return (ch-0x30); + } + else if (((ch >= 'a')&&(ch <= 'f'))||((ch >= 'A')&&(ch <= 'F'))) + { + return (ch-0x57); + } + return 0; +} + +/* + * This is the first function called by the ONLP framework. + * + * It should return the name of your platform driver. + * + * If the name of your platform driver is the same as the + * current platform then this driver will be used. + * + * If the name of the driver is different from the current + * platform, or the driver is capable of supporting multiple + * platform variants, see onlp_sysi_platform_set() below. + */ +const char* +onlp_sysi_platform_get(void) +{ + return "x86-64-netberg-aurora-620-rangeley-r0"; +} + +/* + * This function will be called if onlp_sysi_platform_get() + * returns a platform name that is not equal to the current platform. + * + * If you are compatible with the given platform then return ONLP_STATUS_OK. + * If you can are not compatible return ONLP_STATUS_E_UNSUPPORTED. + * - This is fatal and will abort platform initialization. + */ + +int +onlp_sysi_platform_set(const char* name) +{ + /* + * For the purposes of this example we + * accept all platforms. + */ + return ONLP_STATUS_OK; +} + +/* + * This is the first function the ONLP framework will call + * after it has validated the the platform is supported using the mechanisms + * described above. + * + * If this function does not return ONL_STATUS_OK + * then platform initialization is aborted. + */ +int +onlp_sysi_init(void) +{ + return ONLP_STATUS_OK; +} + +int +onlp_sysi_onie_info_get(onlp_onie_info_t* onie) +{ + int rv; + uint8_t buffer[512]; + uint8_t data[256]; + int len; + int i, j; + + memset(buffer, 0, sizeof(buffer)); + memset(data, 0, sizeof(data)); + rv = onlp_file_read(buffer, sizeof(buffer), &len, SYS_HWMON2_PREFIX "/eeprom"); + if (rv == ONLP_STATUS_OK) + { + j = 0; + for (i=0; i<256; i++) + { + data[i] = (toHexValue(buffer[j])<<4) + toHexValue(buffer[j+1]); + j += 2; + } + rv = onlp_onie_decode(onie, (uint8_t*)data, 256); + if(rv >= 0) + { + onie->platform_name = aim_strdup("x86-64-netberg-aurora-620-rangeley-r0"); + } + } + return rv; +} + +int +onlp_sysi_oids_get(onlp_oid_t* table, int max) +{ + onlp_oid_t* e = table; + memset(table, 0, max*sizeof(onlp_oid_t)); + int i; + int n_thermal=7, n_fan=10, n_led=1; + + /* 2 PSUs */ + *e++ = ONLP_PSU_ID_CREATE(1); + *e++ = ONLP_PSU_ID_CREATE(2); + + /* LEDs Item */ + for (i=1; i<=n_led; i++) + { + *e++ = ONLP_LED_ID_CREATE(i); + } + + /* THERMALs Item */ + for (i=1; i<=n_thermal; i++) + { + *e++ = ONLP_THERMAL_ID_CREATE(i); + } + + /* Fans Item */ + for (i=1; i<=n_fan; i++) + { + *e++ = ONLP_FAN_ID_CREATE(i); + } + + return 0; +} + diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/thermali.c b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/thermali.c new file mode 100755 index 00000000..3def10b8 --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/thermali.c @@ -0,0 +1,173 @@ +/************************************************************ + * + * + * Copyright 2014 Big Switch Networks, Inc. + * + * Licensed under the Eclipse Public License, Version 1.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.eclipse.org/legal/epl-v10.html + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, + * either express or implied. See the License for the specific + * language governing permissions and limitations under the + * License. + * + * + ************************************************************ + * + * + * + ***********************************************************/ +#include +#include +#include "x86_64_netberg_aurora_620_rangeley_int.h" +#include "x86_64_netberg_aurora_620_rangeley_log.h" + +#define VALIDATE(_id) \ + do { \ + if(!ONLP_OID_IS_THERMAL(_id)) { \ + return ONLP_STATUS_E_INVALID; \ + } \ + } while(0) + +static int +sys_thermal_info_get__(onlp_thermal_info_t* info, int id) +{ + int rv; + + if (id == THERMAL_ID_THERMAL3) + { + rv = onlp_file_read_int(&info->mcelsius, SYS_HWMON1_PREFIX "/mac_temp"); + info->mcelsius *= 1000; + } + else + { + uint8_t buffer[64]; + double dvalue; + int len; + + memset(buffer, 0, sizeof(buffer)); + rv = onlp_file_read(buffer, sizeof(buffer), &len, SYS_HWMON1_PREFIX "/remote_temp%d", id); + if (rv == ONLP_STATUS_OK) + { + dvalue = atof((const char *)buffer); + info->mcelsius = (int)(dvalue * 1000); + } + } + + if(rv == ONLP_STATUS_E_INTERNAL) + return rv; + + if(rv == ONLP_STATUS_E_MISSING) + { + info->status &= ~1; + return ONLP_STATUS_OK; + } + + return ONLP_STATUS_OK; +} + +static int +psu1_thermal_info_get__(onlp_thermal_info_t* info, int id) +{ + int rv; + uint8_t buffer[64]; + double dvalue; + int len; + + memset(buffer, 0, sizeof(buffer)); + rv = onlp_file_read(buffer, sizeof(buffer), &len, SYS_HWMON2_PREFIX "/psu1_temp_%d", id); + if (rv == ONLP_STATUS_OK) + { + dvalue = atof((const char *)buffer); + info->mcelsius = (int)(dvalue * 1000); + } + return rv; +} + +static int +psu2_thermal_info_get__(onlp_thermal_info_t* info, int id) +{ + int rv; + uint8_t buffer[64]; + double dvalue; + int len; + + memset(buffer, 0, sizeof(buffer)); + rv = onlp_file_read(buffer, sizeof(buffer), &len, SYS_HWMON2_PREFIX "/psu2_temp_%d", id); + if (rv == ONLP_STATUS_OK) + { + dvalue = atof((const char *)buffer); + info->mcelsius = (int)(dvalue * 1000); + } + return rv; +} + +static onlp_thermal_info_t temps__[] = +{ + { }, /* Not used */ + { { THERMAL_OID_THERMAL1, "Chassis Thermal 1 (Front of MAC)", 0}, ONLP_THERMAL_STATUS_PRESENT, ONLP_THERMAL_CAPS_GET_TEMPERATURE, 0}, + { { THERMAL_OID_THERMAL2, "Chassis Thermal 2 (Rear of MAC)", 0}, ONLP_THERMAL_STATUS_PRESENT, ONLP_THERMAL_CAPS_GET_TEMPERATURE, 0}, + { { THERMAL_OID_THERMAL3, "Chassis Thermal 3 (MAC)", 0}, ONLP_THERMAL_STATUS_PRESENT, ONLP_THERMAL_CAPS_GET_TEMPERATURE, 0}, + + { { THERMAL_OID_THERMAL4, "PSU-1 Thermal 1", PSU_OID_PSU1 }, ONLP_THERMAL_STATUS_PRESENT, ONLP_THERMAL_CAPS_GET_TEMPERATURE, 0}, + { { THERMAL_OID_THERMAL5, "PSU-1 Thermal 2", PSU_OID_PSU1 }, ONLP_THERMAL_STATUS_PRESENT, ONLP_THERMAL_CAPS_GET_TEMPERATURE, 0}, + + { { THERMAL_OID_THERMAL6, "PSU-2 Thermal 1", PSU_OID_PSU2 }, ONLP_THERMAL_STATUS_PRESENT, ONLP_THERMAL_CAPS_GET_TEMPERATURE, 0}, + { { THERMAL_OID_THERMAL7, "PSU-2 Thermal 2", PSU_OID_PSU2 }, ONLP_THERMAL_STATUS_PRESENT, ONLP_THERMAL_CAPS_GET_TEMPERATURE, 0}, +}; + + +/* + * This will be called to intiialize the thermali subsystem. + */ +int +onlp_thermali_init(void) +{ + return ONLP_STATUS_OK; +} + +/* + * Retrieve the information structure for the given thermal OID. + * + * If the OID is invalid, return ONLP_E_STATUS_INVALID. + * If an unexpected error occurs, return ONLP_E_STATUS_INTERNAL. + * Otherwise, return ONLP_STATUS_OK with the OID's information. + * + * Note -- it is expected that you fill out the information + * structure even if the sensor described by the OID is not present. + */ +int +onlp_thermali_info_get(onlp_oid_t id, onlp_thermal_info_t* info) +{ + int tid; + + VALIDATE(id); + + memset(info, 0, sizeof(onlp_thermal_info_t)); + tid = ONLP_OID_ID_GET(id); + *info = temps__[tid]; + + switch(tid) + { + case THERMAL_ID_THERMAL1: + case THERMAL_ID_THERMAL2: + case THERMAL_ID_THERMAL3: + return sys_thermal_info_get__(info, tid); + + case THERMAL_ID_THERMAL4: + case THERMAL_ID_THERMAL5: + return psu1_thermal_info_get__(info, (tid - THERMAL_ID_THERMAL4 + 1)); + + case THERMAL_ID_THERMAL6: + case THERMAL_ID_THERMAL7: + return psu2_thermal_info_get__(info, (tid - THERMAL_ID_THERMAL6 + 1)); + } + + return ONLP_STATUS_E_INVALID; +} + diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/x86_64_netberg_aurora_620_rangeley_config.c b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/x86_64_netberg_aurora_620_rangeley_config.c new file mode 100755 index 00000000..35ca655a --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/x86_64_netberg_aurora_620_rangeley_config.c @@ -0,0 +1,80 @@ +/**************************************************************************//** + * + * + * + *****************************************************************************/ +#include + +/* */ +#define __x86_64_netberg_aurora_620_rangeley_config_STRINGIFY_NAME(_x) #_x +#define __x86_64_netberg_aurora_620_rangeley_config_STRINGIFY_VALUE(_x) __x86_64_netberg_aurora_620_rangeley_config_STRINGIFY_NAME(_x) +x86_64_netberg_aurora_620_rangeley_config_settings_t x86_64_netberg_aurora_620_rangeley_config_settings[] = +{ +#ifdef X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_INCLUDE_LOGGING + { __x86_64_netberg_aurora_620_rangeley_config_STRINGIFY_NAME(X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_INCLUDE_LOGGING), __x86_64_netberg_aurora_620_rangeley_config_STRINGIFY_VALUE(X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_INCLUDE_LOGGING) }, +#else +{ X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_INCLUDE_LOGGING(__x86_64_netberg_aurora_620_rangeley_config_STRINGIFY_NAME), "__undefined__" }, +#endif +#ifdef X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_LOG_OPTIONS_DEFAULT + { __x86_64_netberg_aurora_620_rangeley_config_STRINGIFY_NAME(X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_LOG_OPTIONS_DEFAULT), __x86_64_netberg_aurora_620_rangeley_config_STRINGIFY_VALUE(X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_LOG_OPTIONS_DEFAULT) }, +#else +{ X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_LOG_OPTIONS_DEFAULT(__x86_64_netberg_aurora_620_rangeley_config_STRINGIFY_NAME), "__undefined__" }, +#endif +#ifdef X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_LOG_BITS_DEFAULT + { __x86_64_netberg_aurora_620_rangeley_config_STRINGIFY_NAME(X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_LOG_BITS_DEFAULT), __x86_64_netberg_aurora_620_rangeley_config_STRINGIFY_VALUE(X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_LOG_BITS_DEFAULT) }, +#else +{ X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_LOG_BITS_DEFAULT(__x86_64_netberg_aurora_620_rangeley_config_STRINGIFY_NAME), "__undefined__" }, +#endif +#ifdef X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_LOG_CUSTOM_BITS_DEFAULT + { __x86_64_netberg_aurora_620_rangeley_config_STRINGIFY_NAME(X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_LOG_CUSTOM_BITS_DEFAULT), __x86_64_netberg_aurora_620_rangeley_config_STRINGIFY_VALUE(X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_LOG_CUSTOM_BITS_DEFAULT) }, +#else +{ X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_LOG_CUSTOM_BITS_DEFAULT(__x86_64_netberg_aurora_620_rangeley_config_STRINGIFY_NAME), "__undefined__" }, +#endif +#ifdef X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_PORTING_STDLIB + { __x86_64_netberg_aurora_620_rangeley_config_STRINGIFY_NAME(X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_PORTING_STDLIB), __x86_64_netberg_aurora_620_rangeley_config_STRINGIFY_VALUE(X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_PORTING_STDLIB) }, +#else +{ X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_PORTING_STDLIB(__x86_64_netberg_aurora_620_rangeley_config_STRINGIFY_NAME), "__undefined__" }, +#endif +#ifdef X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS + { __x86_64_netberg_aurora_620_rangeley_config_STRINGIFY_NAME(X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS), __x86_64_netberg_aurora_620_rangeley_config_STRINGIFY_VALUE(X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS) }, +#else +{ X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS(__x86_64_netberg_aurora_620_rangeley_config_STRINGIFY_NAME), "__undefined__" }, +#endif +#ifdef X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_INCLUDE_UCLI + { __x86_64_netberg_aurora_620_rangeley_config_STRINGIFY_NAME(X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_INCLUDE_UCLI), __x86_64_netberg_aurora_620_rangeley_config_STRINGIFY_VALUE(X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_INCLUDE_UCLI) }, +#else +{ X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_INCLUDE_UCLI(__x86_64_netberg_aurora_620_rangeley_config_STRINGIFY_NAME), "__undefined__" }, +#endif +#ifdef X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_SYSFAN_RPM_FAILURE_THRESHOLD + { __x86_64_netberg_aurora_620_rangeley_config_STRINGIFY_NAME(X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_SYSFAN_RPM_FAILURE_THRESHOLD), __x86_64_netberg_aurora_620_rangeley_config_STRINGIFY_VALUE(X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_SYSFAN_RPM_FAILURE_THRESHOLD) }, +#else +{ X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_SYSFAN_RPM_FAILURE_THRESHOLD(__x86_64_netberg_aurora_620_rangeley_config_STRINGIFY_NAME), "__undefined__" }, +#endif + { NULL, NULL } +}; +#undef __x86_64_netberg_aurora_620_rangeley_config_STRINGIFY_VALUE +#undef __x86_64_netberg_aurora_620_rangeley_config_STRINGIFY_NAME + +const char* +x86_64_netberg_aurora_620_rangeley_config_lookup(const char* setting) +{ + int i; + for(i = 0; x86_64_netberg_aurora_620_rangeley_config_settings[i].name; i++) { + if(strcmp(x86_64_netberg_aurora_620_rangeley_config_settings[i].name, setting)) { + return x86_64_netberg_aurora_620_rangeley_config_settings[i].value; + } + } + return NULL; +} + +int +x86_64_netberg_aurora_620_rangeley_config_show(struct aim_pvs_s* pvs) +{ + int i; + for(i = 0; x86_64_netberg_aurora_620_rangeley_config_settings[i].name; i++) { + aim_printf(pvs, "%s = %s\n", x86_64_netberg_aurora_620_rangeley_config_settings[i].name, x86_64_netberg_aurora_620_rangeley_config_settings[i].value); + } + return i; +} + +/* */ diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/x86_64_netberg_aurora_620_rangeley_enums.c b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/x86_64_netberg_aurora_620_rangeley_enums.c new file mode 100755 index 00000000..118897f4 --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/x86_64_netberg_aurora_620_rangeley_enums.c @@ -0,0 +1,10 @@ +/**************************************************************************//** + * + * + * + *****************************************************************************/ +#include + +/* <--auto.start.enum(ALL).source> */ +/* */ + diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/x86_64_netberg_aurora_620_rangeley_int.h b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/x86_64_netberg_aurora_620_rangeley_int.h new file mode 100755 index 00000000..5b2d6901 --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/x86_64_netberg_aurora_620_rangeley_int.h @@ -0,0 +1,239 @@ +/**************************************************************************//** + * + * x86_64_netberg_aurora_620_rangeley Internal Header + * + *****************************************************************************/ +#ifndef __X86_64_NETBERG_AURORA_620_RANGELEY_INT_H__ +#define __X86_64_NETBERG_AURORA_620_RANGELEY_INT_H__ + +#include +#include + +/* */ +/** thermal_oid */ +typedef enum thermal_oid_e { + THERMAL_OID_THERMAL1 = ONLP_THERMAL_ID_CREATE(1), + THERMAL_OID_THERMAL2 = ONLP_THERMAL_ID_CREATE(2), + THERMAL_OID_THERMAL3 = ONLP_THERMAL_ID_CREATE(3), + THERMAL_OID_THERMAL4 = ONLP_THERMAL_ID_CREATE(4), + THERMAL_OID_THERMAL5 = ONLP_THERMAL_ID_CREATE(5), + THERMAL_OID_THERMAL6 = ONLP_THERMAL_ID_CREATE(6), + THERMAL_OID_THERMAL7 = ONLP_THERMAL_ID_CREATE(7), + THERMAL_OID_THERMAL8 = ONLP_THERMAL_ID_CREATE(8), + THERMAL_OID_THERMAL9 = ONLP_THERMAL_ID_CREATE(9), + THERMAL_OID_THERMAL10 = ONLP_THERMAL_ID_CREATE(10), +} thermal_oid_t; + +/** Enum names. */ +const char* thermal_oid_name(thermal_oid_t e); + +/** Enum values. */ +int thermal_oid_value(const char* str, thermal_oid_t* e, int substr); + +/** Enum descriptions. */ +const char* thermal_oid_desc(thermal_oid_t e); + +/** Enum validator. */ +int thermal_oid_valid(thermal_oid_t e); + +/** validator */ +#define THERMAL_OID_VALID(_e) \ + (thermal_oid_valid((_e))) + +/** thermal_oid_map table. */ +extern aim_map_si_t thermal_oid_map[]; +/** thermal_oid_desc_map table. */ +extern aim_map_si_t thermal_oid_desc_map[]; + +/** thermal_id */ +typedef enum thermal_id_e { + THERMAL_ID_THERMAL1 = 1, + THERMAL_ID_THERMAL2 = 2, + THERMAL_ID_THERMAL3 = 3, + THERMAL_ID_THERMAL4 = 4, + THERMAL_ID_THERMAL5 = 5, + THERMAL_ID_THERMAL6 = 6, + THERMAL_ID_THERMAL7 = 7, + THERMAL_ID_THERMAL8 = 8, + THERMAL_ID_THERMAL9 = 9, + THERMAL_ID_THERMAL10 = 10, +} thermal_id_t; + +/** Enum names. */ +const char* thermal_id_name(thermal_id_t e); + +/** Enum values. */ +int thermal_id_value(const char* str, thermal_id_t* e, int substr); + +/** Enum descriptions. */ +const char* thermal_id_desc(thermal_id_t e); + +/** Enum validator. */ +int thermal_id_valid(thermal_id_t e); + +/** validator */ +#define THERMAL_ID_VALID(_e) \ + (thermal_id_valid((_e))) + +/** thermal_id_map table. */ +extern aim_map_si_t thermal_id_map[]; +/** thermal_id_desc_map table. */ +extern aim_map_si_t thermal_id_desc_map[]; + + +/** psu_oid */ +typedef enum psu_oid_e { + PSU_OID_PSU1 = ONLP_PSU_ID_CREATE(1), + PSU_OID_PSU2 = ONLP_PSU_ID_CREATE(2), +} psu_oid_t; + +/** Enum names. */ +const char* psu_oid_name(psu_oid_t e); + +/** Enum values. */ +int psu_oid_value(const char* str, psu_oid_t* e, int substr); + +/** Enum descriptions. */ +const char* psu_oid_desc(psu_oid_t e); + +/** Enum validator. */ +int psu_oid_valid(psu_oid_t e); + +/** validator */ +#define PSU_OID_VALID(_e) \ + (psu_oid_valid((_e))) + +/** psu_oid_map table. */ +extern aim_map_si_t psu_oid_map[]; +/** psu_oid_desc_map table. */ +extern aim_map_si_t psu_oid_desc_map[]; + +/** psu_id */ +typedef enum psu_id_e { + PSU_ID_PSU1 = 1, + PSU_ID_PSU2 = 2, +} psu_id_t; + +/** Enum names. */ +const char* psu_id_name(psu_id_t e); + +/** Enum values. */ +int psu_id_value(const char* str, psu_id_t* e, int substr); + +/** Enum descriptions. */ +const char* psu_id_desc(psu_id_t e); + +/** Enum validator. */ +int psu_id_valid(psu_id_t e); + +/** validator */ +#define PSU_ID_VALID(_e) \ + (psu_id_valid((_e))) + +/** psu_id_map table. */ +extern aim_map_si_t psu_id_map[]; +/** psu_id_desc_map table. */ +extern aim_map_si_t psu_id_desc_map[]; + + + +/** fan_oid */ +typedef enum fan_oid_e { + FAN_OID_FAN1 = ONLP_FAN_ID_CREATE(1), + FAN_OID_FAN2 = ONLP_FAN_ID_CREATE(2), + FAN_OID_FAN3 = ONLP_FAN_ID_CREATE(3), + FAN_OID_FAN4 = ONLP_FAN_ID_CREATE(4), + FAN_OID_FAN5 = ONLP_FAN_ID_CREATE(5), + FAN_OID_FAN6 = ONLP_FAN_ID_CREATE(6), + FAN_OID_FAN7 = ONLP_FAN_ID_CREATE(7), + FAN_OID_FAN8 = ONLP_FAN_ID_CREATE(8), + FAN_OID_FAN9 = ONLP_FAN_ID_CREATE(9), + FAN_OID_FAN10 = ONLP_FAN_ID_CREATE(10), +} fan_oid_t; + +/** Enum names. */ +const char* fan_oid_name(fan_oid_t e); + +/** Enum values. */ +int fan_oid_value(const char* str, fan_oid_t* e, int substr); + +/** Enum descriptions. */ +const char* fan_oid_desc(fan_oid_t e); + +/** Enum validator. */ +int fan_oid_valid(fan_oid_t e); + +/** validator */ +#define FAN_OID_VALID(_e) \ + (fan_oid_valid((_e))) + +/** fan_oid_map table. */ +extern aim_map_si_t fan_oid_map[]; +/** fan_oid_desc_map table. */ +extern aim_map_si_t fan_oid_desc_map[]; + +/** fan_id */ +typedef enum fan_id_e { + FAN_ID_FAN1 = 1, + FAN_ID_FAN2 = 2, + FAN_ID_FAN3 = 3, + FAN_ID_FAN4 = 4, + FAN_ID_FAN5 = 5, + FAN_ID_FAN6 = 6, + FAN_ID_FAN7 = 7, + FAN_ID_FAN8 = 8, + FAN_ID_FAN9 = 9, + FAN_ID_FAN10 = 10, +} fan_id_t; + +/** Enum names. */ +const char* fan_id_name(fan_id_t e); + +/** Enum values. */ +int fan_id_value(const char* str, fan_id_t* e, int substr); + +/** Enum descriptions. */ +const char* fan_id_desc(fan_id_t e); + +/** Enum validator. */ +int fan_id_valid(fan_id_t e); + +/** validator */ +#define FAN_ID_VALID(_e) \ + (fan_id_valid((_e))) + +/** fan_id_map table. */ +extern aim_map_si_t fan_id_map[]; +/** fan_id_desc_map table. */ +extern aim_map_si_t fan_id_desc_map[]; + +/** led_oid */ +typedef enum led_oid_e { + LED_OID_LED1 = ONLP_LED_ID_CREATE(1), + LED_OID_LED2 = ONLP_LED_ID_CREATE(2), + LED_OID_LED3 = ONLP_LED_ID_CREATE(3), + LED_OID_LED4 = ONLP_LED_ID_CREATE(4), +} led_oid_t; + +/** led_id */ +typedef enum led_id_e { + LED_ID_LED1 = 1, + LED_ID_LED2 = 2, + LED_ID_LED3 = 3, + LED_ID_LED4 = 4, +} led_id_t; + +/* */ + +/* psu info table */ +struct psu_info_s { + char path[PATH_MAX]; + int present; + int busno; + int addr; +}; + +#define SYS_HWMON1_PREFIX "/sys/class/hwmon/hwmon1/device" +#define SYS_HWMON2_PREFIX "/sys/class/hwmon/hwmon2/device" + +#endif /* __X86_64_NETBERG_AURORA_620_RANGELEY_INT_H__ */ diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/x86_64_netberg_aurora_620_rangeley_log.c b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/x86_64_netberg_aurora_620_rangeley_log.c new file mode 100755 index 00000000..abf80730 --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/x86_64_netberg_aurora_620_rangeley_log.c @@ -0,0 +1,18 @@ +/**************************************************************************//** + * + * + * + *****************************************************************************/ +#include + +#include "x86_64_netberg_aurora_620_rangeley_log.h" +/* + * x86_64_netberg_aurora_620_rangeley log struct. + */ +AIM_LOG_STRUCT_DEFINE( + X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_LOG_OPTIONS_DEFAULT, + X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_LOG_BITS_DEFAULT, + NULL, /* Custom log map */ + X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_LOG_CUSTOM_BITS_DEFAULT + ); + diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/x86_64_netberg_aurora_620_rangeley_log.h b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/x86_64_netberg_aurora_620_rangeley_log.h new file mode 100755 index 00000000..4a2e994c --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/x86_64_netberg_aurora_620_rangeley_log.h @@ -0,0 +1,12 @@ +/**************************************************************************//** + * + * + * + *****************************************************************************/ +#ifndef __X86_64_NETBERG_AURORA_620_RANGELEY_LOG_H__ +#define __X86_64_NETBERG_AURORA_620_RANGELEY_LOG_H__ + +#define AIM_LOG_MODULE_NAME x86_64_netberg_aurora_620_rangeley +#include + +#endif /* __X86_64_NETBERG_AURORA_620_RANGELEY_LOG_H__ */ diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/x86_64_netberg_aurora_620_rangeley_module.c b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/x86_64_netberg_aurora_620_rangeley_module.c new file mode 100755 index 00000000..bdb59db4 --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/x86_64_netberg_aurora_620_rangeley_module.c @@ -0,0 +1,24 @@ +/**************************************************************************//** + * + * + * + *****************************************************************************/ +#include + +#include "x86_64_netberg_aurora_620_rangeley_log.h" + +static int +datatypes_init__(void) +{ +#define X86_64_NETBERG_AURORA_620_RANGELEY_ENUMERATION_ENTRY(_enum_name, _desc) AIM_DATATYPE_MAP_REGISTER(_enum_name, _enum_name##_map, _desc, AIM_LOG_INTERNAL); +#include + return 0; +} + +void __x86_64_netberg_aurora_620_rangeley_module_init__(void) +{ + AIM_LOG_STRUCT_REGISTER(); + datatypes_init__(); +} + +int __onlp_platform_version__ = 1; diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/x86_64_netberg_aurora_620_rangeley_ucli.c b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/x86_64_netberg_aurora_620_rangeley_ucli.c new file mode 100755 index 00000000..59bffca9 --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/x86_64_netberg_aurora_620_rangeley_ucli.c @@ -0,0 +1,50 @@ +/**************************************************************************//** + * + * + * + *****************************************************************************/ +#include + +#if X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_INCLUDE_UCLI == 1 + +#include +#include +#include + +static ucli_status_t +x86_64_netberg_aurora_620_rangeley_ucli_ucli__config__(ucli_context_t* uc) +{ + UCLI_HANDLER_MACRO_MODULE_CONFIG(x86_64_netberg_aurora_620_rangeley) +} + +/* */ +/* */ + +static ucli_module_t +x86_64_netberg_aurora_620_rangeley_ucli_module__ = + { + "x86_64_netberg_aurora_620_rangeley_ucli", + NULL, + x86_64_netberg_aurora_620_rangeley_ucli_ucli_handlers__, + NULL, + NULL, + }; + +ucli_node_t* +x86_64_netberg_aurora_620_rangeley_ucli_node_create(void) +{ + ucli_node_t* n; + ucli_module_init(&x86_64_netberg_aurora_620_rangeley_ucli_module__); + n = ucli_node_create("x86_64_netberg_aurora_620_rangeley", NULL, &x86_64_netberg_aurora_620_rangeley_ucli_module__); + ucli_node_subnode_add(n, ucli_module_log_node_create("x86_64_netberg_aurora_620_rangeley")); + return n; +} + +#else +void* +x86_64_netberg_aurora_620_rangeley_ucli_node_create(void) +{ + return NULL; +} +#endif + diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/platform-config/Makefile b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/platform-config/Makefile new file mode 100755 index 00000000..003238cf --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/platform-config/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/platform-config/r0/Makefile b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/platform-config/r0/Makefile new file mode 100755 index 00000000..003238cf --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/platform-config/r0/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/platform-config/r0/PKG.yml b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/platform-config/r0/PKG.yml new file mode 100755 index 00000000..87564008 --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/platform-config/r0/PKG.yml @@ -0,0 +1 @@ +!include $ONL_TEMPLATES/platform-config-platform.yml ARCH=amd64 VENDOR=netberg BASENAME=x86-64-netberg-aurora-620-rangeley REVISION=r0 diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/platform-config/r0/src/lib/x86-64-netberg-aurora-620-rangeley-r0.yml b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/platform-config/r0/src/lib/x86-64-netberg-aurora-620-rangeley-r0.yml new file mode 100755 index 00000000..ccecc53f --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/platform-config/r0/src/lib/x86-64-netberg-aurora-620-rangeley-r0.yml @@ -0,0 +1,30 @@ +--- + +###################################################################### +# +# platform-config for AURORA 620 +# +###################################################################### + +x86-64-netberg-aurora-620-rangeley-r0: + + grub: + + serial: >- + --port=0x2f8 + --speed=115200 + --word=8 + --parity=no + --stop=1 + + kernel: + <<: *kernel-3-16 + + args: >- + console=ttyS1,115200n8 + + ##network: + ## interfaces: + ## ma1: + ## name: ~ + ## syspath: pci0000:00/0000:00:14.0 diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/platform-config/r0/src/python/x86_64_netberg_aurora_620_rangeley_r0/__init__.py b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/platform-config/r0/src/python/x86_64_netberg_aurora_620_rangeley_r0/__init__.py new file mode 100755 index 00000000..cbd5f1ac --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/platform-config/r0/src/python/x86_64_netberg_aurora_620_rangeley_r0/__init__.py @@ -0,0 +1,17 @@ +from onl.platform.base import * +from onl.platform.netberg import * + +class OnlPlatform_x86_64_netberg_aurora_620_rangeley_r0(OnlPlatformNetberg, + OnlPlatformPortConfig_48x25_6x100): + PLATFORM='x86-64-netberg-aurora-620-rangeley-r0' + MODEL="AURORA620" + SYS_OBJECT_ID=".8.1" + + def baseconfig(self): + self.insmod("hardware_monitor") + + # make ds1339 as default rtc + os.system("ln -snf /dev/rtc1 /dev/rtc") + os.system("hwclock --hctosys") + + return True diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/.gitignore b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/.gitignore new file mode 100755 index 00000000..eeaa11a1 --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/.gitignore @@ -0,0 +1,2 @@ +*x86*64*netberg*aurora*720*rangeley*.mk +onlpdump.mk diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/Makefile b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/Makefile new file mode 100755 index 00000000..003238cf --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/modules/Makefile b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/modules/Makefile new file mode 100755 index 00000000..003238cf --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/modules/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/modules/PKG.yml b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/modules/PKG.yml new file mode 100755 index 00000000..bf665962 --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/modules/PKG.yml @@ -0,0 +1 @@ +!include $ONL_TEMPLATES/no-platform-modules.yml ARCH=amd64 VENDOR=netberg BASENAME=x86-64-netberg-aurora-720-rangeley diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/Makefile b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/Makefile new file mode 100755 index 00000000..003238cf --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/PKG.yml b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/PKG.yml new file mode 100755 index 00000000..8aa08b33 --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/PKG.yml @@ -0,0 +1 @@ +!include $ONL_TEMPLATES/onlp-platform-any.yml PLATFORM=x86-64-netberg-aurora-720-rangeley ARCH=amd64 TOOLCHAIN=x86_64-linux-gnu diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/Makefile b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/Makefile new file mode 100755 index 00000000..e7437cb2 --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/Makefile @@ -0,0 +1,2 @@ +FILTER=src +include $(ONL)/make/subdirs.mk diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/lib/Makefile b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/lib/Makefile new file mode 100755 index 00000000..bacf5db7 --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/lib/Makefile @@ -0,0 +1,45 @@ +############################################################ +# +# +# Copyright 2014 BigSwitch Networks, Inc. +# +# Licensed under the Eclipse Public License, Version 1.0 (the +# "License"); you may not use this file except in compliance +# with the License. You may obtain a copy of the License at +# +# http://www.eclipse.org/legal/epl-v10.html +# +# Unless required by applicable law or agreed to in writing, +# software distributed under the License is distributed on an +# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, +# either express or implied. See the License for the specific +# language governing permissions and limitations under the +# License. +# +# +############################################################ +# +# +############################################################ +include $(ONL)/make/config.amd64.mk + +MODULE := libonlp-x86-64-netberg-aurora-720-rangeley +include $(BUILDER)/standardinit.mk + +DEPENDMODULES := AIM IOF x86_64_netberg_aurora_720_rangeley onlplib +DEPENDMODULE_HEADERS := sff + +include $(BUILDER)/dependmodules.mk + +SHAREDLIB := libonlp-x86-64-netberg-aurora-720-rangeley.so +$(SHAREDLIB)_TARGETS := $(ALL_TARGETS) +include $(BUILDER)/so.mk +.DEFAULT_GOAL := $(SHAREDLIB) + +GLOBAL_CFLAGS += -I$(onlp_BASEDIR)/module/inc +GLOBAL_CFLAGS += -DAIM_CONFIG_INCLUDE_MODULES_INIT=1 +GLOBAL_CFLAGS += -fPIC +GLOBAL_LINK_LIBS += -lpthread + +include $(BUILDER)/targets.mk + diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/onlpdump/Makefile b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/onlpdump/Makefile new file mode 100755 index 00000000..01db18a4 --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/onlpdump/Makefile @@ -0,0 +1,45 @@ +############################################################ +# +# +# Copyright 2014 BigSwitch Networks, Inc. +# +# Licensed under the Eclipse Public License, Version 1.0 (the +# "License"); you may not use this file except in compliance +# with the License. You may obtain a copy of the License at +# +# http://www.eclipse.org/legal/epl-v10.html +# +# Unless required by applicable law or agreed to in writing, +# software distributed under the License is distributed on an +# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, +# either express or implied. See the License for the specific +# language governing permissions and limitations under the +# License. +# +# +############################################################ +# +# +# +############################################################ +include $(ONL)/make/config.amd64.mk + +.DEFAULT_GOAL := onlpdump + +MODULE := onlpdump +include $(BUILDER)/standardinit.mk + +DEPENDMODULES := AIM IOF onlp x86_64_netberg_aurora_720_rangeley onlplib onlp_platform_defaults sff cjson cjson_util timer_wheel OS + +include $(BUILDER)/dependmodules.mk + +BINARY := onlpdump +$(BINARY)_LIBRARIES := $(LIBRARY_TARGETS) +include $(BUILDER)/bin.mk + +GLOBAL_CFLAGS += -DAIM_CONFIG_AIM_MAIN_FUNCTION=onlpdump_main +GLOBAL_CFLAGS += -DAIM_CONFIG_INCLUDE_MODULES_INIT=1 +GLOBAL_CFLAGS += -DAIM_CONFIG_INCLUDE_MAIN=1 +GLOBAL_LINK_LIBS += -lpthread -lm + +include $(BUILDER)/targets.mk diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/.module b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/.module new file mode 100755 index 00000000..5e2f8b9e --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/.module @@ -0,0 +1 @@ +name: x86_64_netberg_aurora_720_rangeley diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/Makefile b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/Makefile new file mode 100755 index 00000000..633255c5 --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/Makefile @@ -0,0 +1,9 @@ +############################################################################### +# +# +# +############################################################################### +include $(ONL)/make/config.mk +MODULE := x86_64_netberg_aurora_720_rangeley +AUTOMODULE := x86_64_netberg_aurora_720_rangeley +include $(BUILDER)/definemodule.mk diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/auto/make.mk b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/auto/make.mk new file mode 100755 index 00000000..0e083d68 --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/auto/make.mk @@ -0,0 +1,9 @@ +############################################################################### +# +# x86_64_netberg_aurora_720_rangeley Autogeneration +# +############################################################################### +x86_64_netberg_aurora_720_rangeley_AUTO_DEFS := module/auto/x86_64_netberg_aurora_720_rangeley.yml +x86_64_netberg_aurora_720_rangeley_AUTO_DIRS := module/inc/x86_64_netberg_aurora_720_rangeley module/src +include $(BUILDER)/auto.mk + diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/auto/x86_64_netberg_aurora_720_rangeley.yml b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/auto/x86_64_netberg_aurora_720_rangeley.yml new file mode 100755 index 00000000..3d2d0957 --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/auto/x86_64_netberg_aurora_720_rangeley.yml @@ -0,0 +1,114 @@ +############################################################################### +# +# x86_64_netberg_aurora_720_rangeley Autogeneration Definitions. +# +############################################################################### + +cdefs: &cdefs +- X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_INCLUDE_LOGGING: + doc: "Include or exclude logging." + default: 1 +- X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_LOG_OPTIONS_DEFAULT: + doc: "Default enabled log options." + default: AIM_LOG_OPTIONS_DEFAULT +- X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_LOG_BITS_DEFAULT: + doc: "Default enabled log bits." + default: AIM_LOG_BITS_DEFAULT +- X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_LOG_CUSTOM_BITS_DEFAULT: + doc: "Default enabled custom log bits." + default: 0 +- X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_PORTING_STDLIB: + doc: "Default all porting macros to use the C standard libraries." + default: 1 +- X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS: + doc: "Include standard library headers for stdlib porting macros." + default: X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_PORTING_STDLIB +- X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_INCLUDE_UCLI: + doc: "Include generic uCli support." + default: 0 +- X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_SYSFAN_RPM_FAILURE_THRESHOLD: + doc: "RPM Threshold at which the fan is considered to have failed." + default: 3000 + +definitions: + cdefs: + X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_HEADER: + defs: *cdefs + basename: x86_64_netberg_aurora_720_rangeley_config + + enum: &enums + + fan_id: + members: + - FAN1 : 1 + - FAN2 : 2 + - FAN3 : 3 + - FAN4 : 4 + - FAN5 : 5 + - FAN6 : 6 + - FAN7 : 7 + - FAN8 : 8 + - FAN9 : 9 + - FAN10 : 10 + + fan_oid: + members: + - FAN1 : ONLP_FAN_ID_CREATE(1) + - FAN2 : ONLP_FAN_ID_CREATE(2) + - FAN3 : ONLP_FAN_ID_CREATE(3) + - FAN4 : ONLP_FAN_ID_CREATE(4) + - FAN5 : ONLP_FAN_ID_CREATE(5) + - FAN6 : ONLP_FAN_ID_CREATE(6) + - FAN7 : ONLP_FAN_ID_CREATE(7) + - FAN8 : ONLP_FAN_ID_CREATE(8) + - FAN9 : ONLP_FAN_ID_CREATE(9) + - FAN10 : ONLP_FAN_ID_CREATE(10) + + psu_id: + members: + - PSU1 : 1 + - PSU2 : 2 + + psu_oid: + members: + - PSU1 : ONLP_PSU_ID_CREATE(1) + - PSU2 : ONLP_PSU_ID_CREATE(2) + + thermal_id: + members: + - THERMAL1 : 1 + - THERMAL2 : 2 + - THERMAL3 : 3 + - THERMAL4 : 4 + - THERMAL5 : 5 + - THERMAL6 : 6 + - THERMAL7 : 7 + + thermal_oid: + members: + - THERMAL1 : ONLP_THERMAL_ID_CREATE(1) + - THERMAL2 : ONLP_THERMAL_ID_CREATE(2) + - THERMAL3 : ONLP_THERMAL_ID_CREATE(3) + - THERMAL4 : ONLP_THERMAL_ID_CREATE(4) + - THERMAL5 : ONLP_THERMAL_ID_CREATE(5) + - THERMAL6 : ONLP_THERMAL_ID_CREATE(6) + - THERMAL7 : ONLP_THERMAL_ID_CREATE(7) + + led_id: + members: + - STAT : 1 + + led_oid: + members: + - STAT : ONLP_LED_ID_CREATE(1) + + + portingmacro: + X86_64_NETBERG_AURORA_720_RANGELEY: + macros: + - memset + - memcpy + - strncpy + - vsnprintf + - snprintf + - strlen diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/inc/x86_64_netberg_aurora_720_rangeley/x86_64_netberg_aurora_720_rangeley.x b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/inc/x86_64_netberg_aurora_720_rangeley/x86_64_netberg_aurora_720_rangeley.x new file mode 100755 index 00000000..50417fcb --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/inc/x86_64_netberg_aurora_720_rangeley/x86_64_netberg_aurora_720_rangeley.x @@ -0,0 +1,14 @@ +/**************************************************************************//** + * + * + * + *****************************************************************************/ +#include + +/* <--auto.start.xmacro(ALL).define> */ +/* */ + +/* <--auto.start.xenum(ALL).define> */ +/* */ + + diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/inc/x86_64_netberg_aurora_720_rangeley/x86_64_netberg_aurora_720_rangeley_config.h b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/inc/x86_64_netberg_aurora_720_rangeley/x86_64_netberg_aurora_720_rangeley_config.h new file mode 100755 index 00000000..43e806f8 --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/inc/x86_64_netberg_aurora_720_rangeley/x86_64_netberg_aurora_720_rangeley_config.h @@ -0,0 +1,135 @@ +/**************************************************************************//** + * + * @file + * @brief x86_64_netberg_aurora_720_rangeley Configuration Header + * + * @addtogroup x86_64_netberg_aurora_720_rangeley-config + * @{ + * + *****************************************************************************/ +#ifndef __X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_H__ +#define __X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_H__ + +#ifdef GLOBAL_INCLUDE_CUSTOM_CONFIG +#include +#endif +#ifdef X86_64_NETBERG_AURORA_720_RANGELEY_INCLUDE_CUSTOM_CONFIG +#include +#endif + +/* */ +#include +/** + * X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_INCLUDE_LOGGING + * + * Include or exclude logging. */ + + +#ifndef X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_INCLUDE_LOGGING +#define X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_INCLUDE_LOGGING 1 +#endif + +/** + * X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_LOG_OPTIONS_DEFAULT + * + * Default enabled log options. */ + + +#ifndef X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_LOG_OPTIONS_DEFAULT +#define X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_LOG_OPTIONS_DEFAULT AIM_LOG_OPTIONS_DEFAULT +#endif + +/** + * X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_LOG_BITS_DEFAULT + * + * Default enabled log bits. */ + + +#ifndef X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_LOG_BITS_DEFAULT +#define X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_LOG_BITS_DEFAULT AIM_LOG_BITS_DEFAULT +#endif + +/** + * X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_LOG_CUSTOM_BITS_DEFAULT + * + * Default enabled custom log bits. */ + + +#ifndef X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_LOG_CUSTOM_BITS_DEFAULT +#define X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_LOG_CUSTOM_BITS_DEFAULT 0 +#endif + +/** + * X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_PORTING_STDLIB + * + * Default all porting macros to use the C standard libraries. */ + + +#ifndef X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_PORTING_STDLIB +#define X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_PORTING_STDLIB 1 +#endif + +/** + * X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS + * + * Include standard library headers for stdlib porting macros. */ + + +#ifndef X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS +#define X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_PORTING_STDLIB +#endif + +/** + * X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_INCLUDE_UCLI + * + * Include generic uCli support. */ + + +#ifndef X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_INCLUDE_UCLI +#define X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_INCLUDE_UCLI 0 +#endif + +/** + * X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_SYSFAN_RPM_FAILURE_THRESHOLD + * + * RPM Threshold at which the fan is considered to have failed. */ + + +#ifndef X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_SYSFAN_RPM_FAILURE_THRESHOLD +#define X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_SYSFAN_RPM_FAILURE_THRESHOLD 3000 +#endif + +/** + * All compile time options can be queried or displayed + */ + +/** Configuration settings structure. */ +typedef struct x86_64_netberg_aurora_720_rangeley_config_settings_s { + /** name */ + const char* name; + /** value */ + const char* value; +} x86_64_netberg_aurora_720_rangeley_config_settings_t; + +/** Configuration settings table. */ +/** x86_64_netberg_aurora_720_rangeley_config_settings table. */ +extern x86_64_netberg_aurora_720_rangeley_config_settings_t x86_64_netberg_aurora_720_rangeley_config_settings[]; + +/** + * @brief Lookup a configuration setting. + * @param setting The name of the configuration option to lookup. + */ +const char* x86_64_netberg_aurora_720_rangeley_config_lookup(const char* setting); + +/** + * @brief Show the compile-time configuration. + * @param pvs The output stream. + */ +int x86_64_netberg_aurora_720_rangeley_config_show(struct aim_pvs_s* pvs); + +/* */ + +#include "x86_64_netberg_aurora_720_rangeley_porting.h" + +#endif /* __X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_H__ */ +/* @} */ diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/inc/x86_64_netberg_aurora_720_rangeley/x86_64_netberg_aurora_720_rangeley_dox.h b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/inc/x86_64_netberg_aurora_720_rangeley/x86_64_netberg_aurora_720_rangeley_dox.h new file mode 100755 index 00000000..e4d0aa60 --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/inc/x86_64_netberg_aurora_720_rangeley/x86_64_netberg_aurora_720_rangeley_dox.h @@ -0,0 +1,26 @@ +/**************************************************************************//** + * + * x86_64_netberg_aurora_720_rangeley Doxygen Header + * + *****************************************************************************/ +#ifndef __X86_64_NETBERG_AURORA_720_RANGELEY_DOX_H__ +#define __X86_64_NETBERG_AURORA_720_RANGELEY_DOX_H__ + +/** + * @defgroup x86_64_netberg_aurora_720_rangeley x86_64_netberg_aurora_720_rangeley - x86_64_netberg_aurora_720_rangeley Description + * + +The documentation overview for this module should go here. + + * + * @{ + * + * @defgroup x86_64_netberg_aurora_720_rangeley-x86_64_netberg_aurora_720_rangeley Public Interface + * @defgroup x86_64_netberg_aurora_720_rangeley-config Compile Time Configuration + * @defgroup x86_64_netberg_aurora_720_rangeley-porting Porting Macros + * + * @} + * + */ + +#endif /* __X86_64_NETBERG_AURORA_720_RANGELEY_DOX_H__ */ diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/inc/x86_64_netberg_aurora_720_rangeley/x86_64_netberg_aurora_720_rangeley_porting.h b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/inc/x86_64_netberg_aurora_720_rangeley/x86_64_netberg_aurora_720_rangeley_porting.h new file mode 100755 index 00000000..be815368 --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/inc/x86_64_netberg_aurora_720_rangeley/x86_64_netberg_aurora_720_rangeley_porting.h @@ -0,0 +1,87 @@ +/**************************************************************************//** + * + * @file + * @brief x86_64_netberg_aurora_720_rangeley Porting Macros. + * + * @addtogroup x86_64_netberg_aurora_720_rangeley-porting + * @{ + * + *****************************************************************************/ +#ifndef __X86_64_NETBERG_AURORA_720_RANGELEY_PORTING_H__ +#define __X86_64_NETBERG_AURORA_720_RANGELEY_PORTING_H__ + + +/* */ +#if X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS == 1 +#include +#include +#include +#include +#include +#endif + +#ifndef X86_64_NETBERG_AURORA_720_RANGELEY_MEMSET + #if defined(GLOBAL_MEMSET) + #define X86_64_NETBERG_AURORA_720_RANGELEY_MEMSET GLOBAL_MEMSET + #elif X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_PORTING_STDLIB == 1 + #define X86_64_NETBERG_AURORA_720_RANGELEY_MEMSET memset + #else + #error The macro X86_64_NETBERG_AURORA_720_RANGELEY_MEMSET is required but cannot be defined. + #endif +#endif + +#ifndef X86_64_NETBERG_AURORA_720_RANGELEY_MEMCPY + #if defined(GLOBAL_MEMCPY) + #define X86_64_NETBERG_AURORA_720_RANGELEY_MEMCPY GLOBAL_MEMCPY + #elif X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_PORTING_STDLIB == 1 + #define X86_64_NETBERG_AURORA_720_RANGELEY_MEMCPY memcpy + #else + #error The macro X86_64_NETBERG_AURORA_720_RANGELEY_MEMCPY is required but cannot be defined. + #endif +#endif + +#ifndef X86_64_NETBERG_AURORA_720_RANGELEY_STRNCPY + #if defined(GLOBAL_STRNCPY) + #define X86_64_NETBERG_AURORA_720_RANGELEY_STRNCPY GLOBAL_STRNCPY + #elif X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_PORTING_STDLIB == 1 + #define X86_64_NETBERG_AURORA_720_RANGELEY_STRNCPY strncpy + #else + #error The macro X86_64_NETBERG_AURORA_720_RANGELEY_STRNCPY is required but cannot be defined. + #endif +#endif + +#ifndef X86_64_NETBERG_AURORA_720_RANGELEY_VSNPRINTF + #if defined(GLOBAL_VSNPRINTF) + #define X86_64_NETBERG_AURORA_720_RANGELEY_VSNPRINTF GLOBAL_VSNPRINTF + #elif X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_PORTING_STDLIB == 1 + #define X86_64_NETBERG_AURORA_720_RANGELEY_VSNPRINTF vsnprintf + #else + #error The macro X86_64_NETBERG_AURORA_720_RANGELEY_VSNPRINTF is required but cannot be defined. + #endif +#endif + +#ifndef X86_64_NETBERG_AURORA_720_RANGELEY_SNPRINTF + #if defined(GLOBAL_SNPRINTF) + #define X86_64_NETBERG_AURORA_720_RANGELEY_SNPRINTF GLOBAL_SNPRINTF + #elif X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_PORTING_STDLIB == 1 + #define X86_64_NETBERG_AURORA_720_RANGELEY_SNPRINTF snprintf + #else + #error The macro X86_64_NETBERG_AURORA_720_RANGELEY_SNPRINTF is required but cannot be defined. + #endif +#endif + +#ifndef X86_64_NETBERG_AURORA_720_RANGELEY_STRLEN + #if defined(GLOBAL_STRLEN) + #define X86_64_NETBERG_AURORA_720_RANGELEY_STRLEN GLOBAL_STRLEN + #elif X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_PORTING_STDLIB == 1 + #define X86_64_NETBERG_AURORA_720_RANGELEY_STRLEN strlen + #else + #error The macro X86_64_NETBERG_AURORA_720_RANGELEY_STRLEN is required but cannot be defined. + #endif +#endif + +/* */ + + +#endif /* __X86_64_NETBERG_AURORA_720_RANGELEY_PORTING_H__ */ +/* @} */ diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/make.mk b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/make.mk new file mode 100755 index 00000000..38ee23fe --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/make.mk @@ -0,0 +1,10 @@ +############################################################################### +# +# +# +############################################################################### +THIS_DIR := $(dir $(lastword $(MAKEFILE_LIST))) +x86_64_netberg_aurora_720_rangeley_INCLUDES := -I $(THIS_DIR)inc +x86_64_netberg_aurora_720_rangeley_INTERNAL_INCLUDES := -I $(THIS_DIR)src +x86_64_netberg_aurora_720_rangeley_DEPENDMODULE_ENTRIES := init:x86_64_netberg_aurora_720_rangeley ucli:x86_64_netberg_aurora_720_rangeley + diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/Makefile b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/Makefile new file mode 100755 index 00000000..0a2eb4ed --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/Makefile @@ -0,0 +1,9 @@ +############################################################################### +# +# Local source generation targets. +# +############################################################################### + +ucli: + @../../../../tools/uclihandlers.py x86_64_netberg_aurora_720_rangeley_ucli.c + diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/fani.c b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/fani.c new file mode 100755 index 00000000..3a4cc970 --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/fani.c @@ -0,0 +1,234 @@ +/************************************************************ + * + * + * Copyright 2014 Big Switch Networks, Inc. + * + * Licensed under the Eclipse Public License, Version 1.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.eclipse.org/legal/epl-v10.html + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, + * either express or implied. See the License for the specific + * language governing permissions and limitations under the + * License. + * + * + ************************************************************ + * + * + * + ***********************************************************/ +#include +#include + +#include "x86_64_netberg_aurora_720_rangeley_int.h" +#include "x86_64_netberg_aurora_720_rangeley_log.h" + +#include + + +#define VALIDATE(_id) \ + do { \ + if(!ONLP_OID_IS_FAN(_id)) { \ + return ONLP_STATUS_E_INVALID; \ + } \ + } while(0) + +static int +sys_fan_info_get__(onlp_fan_info_t* info, int id) +{ + int value = 0; + int rv; + + rv = onlp_file_read_int(&value, SYS_HWMON2_PREFIX "/fan%d_abs", ((id/2)+1)); + if (rv != ONLP_STATUS_OK) + return rv; + + if (value == 0) + { + info->status = ONLP_FAN_STATUS_FAILED; + } + else + { + info->status = ONLP_FAN_STATUS_PRESENT; + + rv = onlp_file_read_int(&value, SYS_HWMON2_PREFIX "/fan%d_dir", ((id/2)+1)); + if (rv != ONLP_STATUS_OK) + return rv; + + if (value == 0) + { + info->status |= ONLP_FAN_STATUS_B2F; + info->caps |= ONLP_FAN_CAPS_B2F; + } + else + { + info->status |= ONLP_FAN_STATUS_F2B; + info->caps |= ONLP_FAN_CAPS_F2B; + } + + rv = onlp_file_read_int(&(info->rpm), SYS_HWMON1_PREFIX "/fan%d_rpm", (id+1)); + if (rv == ONLP_STATUS_E_INTERNAL) + return rv; + + if (rv == ONLP_STATUS_E_MISSING) + { + info->status &= ~1; + return 0; + } + + if (info->rpm <= X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_SYSFAN_RPM_FAILURE_THRESHOLD) + info->status |= ONLP_FAN_STATUS_FAILED; + + + rv = onlp_file_read_int(&(info->percentage), SYS_HWMON1_PREFIX "/fan%d_duty", (id+1)); + if (rv == ONLP_STATUS_E_INTERNAL) + return rv; + + if (rv == ONLP_STATUS_E_MISSING) + { + info->status &= ~1; + return 0; + } + } + return 0; +} + +static int +psu_fan_info_get__(onlp_fan_info_t* info, int id) +{ + return onlp_file_read_int(&(info->rpm), SYS_HWMON2_PREFIX "/psu%d_fan_speed", id); +} + +/* Onboard Fans */ +static onlp_fan_info_t fans__[] = { + { }, /* Not used */ + { { FAN_OID_FAN1, "Fan1_rotor1", 0}, ONLP_FAN_STATUS_PRESENT }, + { { FAN_OID_FAN2, "Fan1_rotor2", 0}, ONLP_FAN_STATUS_PRESENT }, + { { FAN_OID_FAN3, "Fan2_rotor1", 0}, ONLP_FAN_STATUS_PRESENT }, + { { FAN_OID_FAN4, "Fan2_rotor2", 0}, ONLP_FAN_STATUS_PRESENT }, + { { FAN_OID_FAN5, "Fan3_rotor1", 0}, ONLP_FAN_STATUS_PRESENT }, + { { FAN_OID_FAN6, "Fan3_rotor2", 0}, ONLP_FAN_STATUS_PRESENT }, + { { FAN_OID_FAN7, "Fan4_rotor1", 0}, ONLP_FAN_STATUS_PRESENT }, + { { FAN_OID_FAN8, "Fan4_rotor2", 0}, ONLP_FAN_STATUS_PRESENT }, + { { FAN_OID_FAN9, "PSU-1 Fan", 0 }, ONLP_FAN_STATUS_PRESENT }, + { { FAN_OID_FAN10, "PSU-2 Fan", 0 }, ONLP_FAN_STATUS_PRESENT }, +}; + +/* + * This function will be called prior to all of onlp_fani_* functions. + */ +int +onlp_fani_init(void) +{ + return ONLP_STATUS_OK; +} + +int +onlp_fani_info_get(onlp_oid_t id, onlp_fan_info_t* info) +{ + int fid; + + VALIDATE(id); + + memset(info, 0, sizeof(onlp_fan_info_t)); + fid = ONLP_OID_ID_GET(id); + *info = fans__[fid]; + + info->caps |= ONLP_FAN_CAPS_GET_RPM; + + switch(fid) + { + case FAN_ID_FAN1: + case FAN_ID_FAN2: + case FAN_ID_FAN3: + case FAN_ID_FAN4: + case FAN_ID_FAN5: + case FAN_ID_FAN6: + case FAN_ID_FAN7: + case FAN_ID_FAN8: + return sys_fan_info_get__(info, (fid - 1)); + break; + + case FAN_ID_FAN9: + case FAN_ID_FAN10: + return psu_fan_info_get__(info, (fid - FAN_ID_FAN9 + 1)); + break; + + default: + return ONLP_STATUS_E_INVALID; + break; + } + + return ONLP_STATUS_E_INVALID; +} + +/* + * This function sets the speed of the given fan in RPM. + * + * This function will only be called if the fan supprots the RPM_SET + * capability. + * + * It is optional if you have no fans at all with this feature. + */ +int +onlp_fani_rpm_set(onlp_oid_t id, int rpm) +{ + return ONLP_STATUS_E_UNSUPPORTED; +} + + +/* + * This function sets the fan speed of the given OID as a percentage. + * + * This will only be called if the OID has the PERCENTAGE_SET + * capability. + * + * It is optional if you have no fans at all with this feature. + */ +int +onlp_fani_percentage_set(onlp_oid_t id, int p) +{ + return ONLP_STATUS_E_UNSUPPORTED; +} + +/* + * This function sets the fan speed of the given OID as per + * the predefined ONLP fan speed modes: off, slow, normal, fast, max. + * + * Interpretation of these modes is up to the platform. + * + */ +int +onlp_fani_mode_set(onlp_oid_t id, onlp_fan_mode_t mode) +{ + return ONLP_STATUS_E_UNSUPPORTED; +} + +/* + * This function sets the fan direction of the given OID. + * + * This function is only relevant if the fan OID supports both direction + * capabilities. + * + * This function is optional unless the functionality is available. + */ +int +onlp_fani_dir_set(onlp_oid_t id, onlp_fan_dir_t dir) +{ + return ONLP_STATUS_E_UNSUPPORTED; +} + +/* + * Generic fan ioctl. Optional. + */ +int +onlp_fani_ioctl(onlp_oid_t id, va_list vargs) +{ + return ONLP_STATUS_E_UNSUPPORTED; +} + diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/ledi.c b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/ledi.c new file mode 100755 index 00000000..d906a48c --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/ledi.c @@ -0,0 +1,165 @@ +/************************************************************ + * + * + * Copyright 2014 Big Switch Networks, Inc. + * Copyright 2013 Accton Technology Corporation. + * + * Licensed under the Eclipse Public License, Version 1.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.eclipse.org/legal/epl-v10.html + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, + * either express or implied. See the License for the specific + * language governing permissions and limitations under the + * License. + * + * + ************************************************************ + * + * + * + ***********************************************************/ +#include +#include +#include "x86_64_netberg_aurora_720_rangeley_int.h" + +#define VALIDATE(_id) \ + do { \ + if(!ONLP_OID_IS_LED(_id)) { \ + return ONLP_STATUS_E_INVALID; \ + } \ + } while(0) + +/* LED related data + */ +enum led_light_mode { /*must be the same with the definition @ kernel driver */ + LED_MODE_OFF = 0, + LED_MODE_AMBER, + LED_MODE_GREEN, +}; + +int led_light_map_mode[][2] = +{ + {LED_MODE_OFF, ONLP_LED_MODE_OFF}, + {LED_MODE_AMBER, ONLP_LED_MODE_ORANGE}, + {LED_MODE_GREEN, ONLP_LED_MODE_GREEN}, +}; + +/* + * Get the information for the given LED OID. + */ +static onlp_led_info_t linfo[] = +{ + { }, /* Not used */ + { + { LED_OID_LED1, "Chassis LED 1 (STAT LED)", 0 }, + ONLP_LED_STATUS_PRESENT, + ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_ORANGE | ONLP_LED_CAPS_GREEN, + ONLP_LED_MODE_OFF, + }, +}; + +static int conver_led_light_mode_to_driver(int led_ligth_mode) +{ + int i, nsize = sizeof(led_light_map_mode)/sizeof(led_light_map_mode[0]); + for(i=0; i + * + ************************************************************ + * + * + * + ***********************************************************/ +#include +#include +#include +#include "x86_64_netberg_aurora_720_rangeley_int.h" +#include "x86_64_netberg_aurora_720_rangeley_log.h" + +extern int toHexValue(char ch); + +#define VALIDATE(_id) \ + do { \ + if(!ONLP_OID_IS_PSU(_id)) { \ + return ONLP_STATUS_E_INVALID; \ + } \ + } while(0) + +static onlp_psu_info_t psus__[] = { + { }, /* Not used */ + { + { + PSU_OID_PSU1, + "PSU-1", + 0, + { + FAN_OID_FAN9, + }, + } + }, + { + { + PSU_OID_PSU2, + "PSU-2", + 0, + { + FAN_OID_FAN10, + }, + } + }, +}; + +/* + * This function will be called prior to any other onlp_psui functions. + */ +int +onlp_psui_init(void) +{ + return ONLP_STATUS_OK; +} + +int +onlp_psui_info_get(onlp_oid_t id, onlp_psu_info_t* info) +{ + int rv; + int pid; + uint8_t buffer[512]; + uint8_t data[256]; + int value = -1; + int len; + double dvalue; + int i, j; + + VALIDATE(id); + + memset(info, 0, sizeof(onlp_psu_info_t)); + pid = ONLP_OID_ID_GET(id); + *info = psus__[pid]; + + rv = onlp_file_read_int(&value, SYS_HWMON1_PREFIX "/psu%d_abs", pid); + if (rv != ONLP_STATUS_OK) + return rv; + if (value == 0) + { + info->status = ONLP_PSU_STATUS_UNPLUGGED; + return ONLP_STATUS_OK; + } + + /* PSU is present. */ + info->status = ONLP_PSU_STATUS_PRESENT; + + memset(buffer, 0, sizeof(buffer)); + memset(data, 0, sizeof(data)); + rv = onlp_file_read(buffer, sizeof(buffer), &len, SYS_HWMON2_PREFIX "/psu%d_eeprom", pid); + if (rv == ONLP_STATUS_OK) + { + j = 0; + for (i=0; i<256; i++) + { + data[i] = (toHexValue(buffer[j])<<4) + toHexValue(buffer[j+1]); + j += 2; + } + i = 11; + + /* Manufacturer Name */ + len = (data[i]&0x0f); + i++; + i += len; + + /* Product Name */ + len = (data[i]&0x0f); + i++; + memcpy(info->model, (char *) &(data[i]), len); + i += len; + + /* Product part,model number */ + len = (data[i]&0x0f); + i++; + i += len; + + /* Product Version */ + len = (data[i]&0x0f); + i++; + i += len; + + /* Product Serial Number */ + len = (data[i]&0x0f); + i++; + memcpy(info->serial, (char *) &(data[i]), len); + } + else + { + strcpy(info->model, "Missing"); + strcpy(info->serial, "Missing"); + } + + info->caps |= ONLP_PSU_CAPS_AC; + +#if 0 + /* PSU is powered. */ + rv = onlp_file_read_int(&value, SYS_HWMON1_PREFIX "/psu%d_pg", pid); + if (rv != ONLP_STATUS_OK) + return rv; + if (value == 0) + { + info->status |= ONLP_PSU_STATUS_FAILED; + return ONLP_STATUS_OK; + } +#endif + + memset(buffer, 0, sizeof(buffer)); + rv = onlp_file_read(buffer, sizeof(buffer), &len, SYS_HWMON2_PREFIX "/psu%d_iout", pid); + if (rv == ONLP_STATUS_OK) + { + dvalue = atof((const char *)buffer); + if (dvalue > 0.0) + { + info->caps |= ONLP_PSU_CAPS_IOUT; + info->miout = (int)(dvalue * 1000); + } + } + + memset(buffer, 0, sizeof(buffer)); + rv = onlp_file_read(buffer, sizeof(buffer), &len, SYS_HWMON2_PREFIX "/psu%d_vout", pid); + if (rv == ONLP_STATUS_OK) + { + dvalue = atof((const char *)buffer); + if (dvalue > 0.0) + { + info->caps |= ONLP_PSU_CAPS_VOUT; + info->mvout = (int)(dvalue * 1000); + } + } + + memset(buffer, 0, sizeof(buffer)); + rv = onlp_file_read(buffer, sizeof(buffer), &len, SYS_HWMON2_PREFIX "/psu%d_pin", pid); + if (rv == ONLP_STATUS_OK) + { + dvalue = atof((const char *)buffer); + if (dvalue > 0.0) + { + info->caps |= ONLP_PSU_CAPS_PIN; + info->mpin = (int)(dvalue * 1000); + } + } + + memset(buffer, 0, sizeof(buffer)); + rv = onlp_file_read(buffer, sizeof(buffer), &len, SYS_HWMON2_PREFIX "/psu%d_pout", pid); + if (rv == ONLP_STATUS_OK) + { + dvalue = atof((const char *)buffer); + if (dvalue > 0.0) + { + info->caps |= ONLP_PSU_CAPS_POUT; + info->mpout = (int)(dvalue * 1000); + } + } + + return ONLP_STATUS_OK; +} + +/* + * This is an optional generic ioctl() interface. + * Its purpose is to allow future expansion and + * custom functionality that is not otherwise exposed + * in the standard interface. + * + * The semantics of this function are platform specific. + * This function is completely optional. + */ +int +onlp_psui_ioctl(onlp_oid_t pid, va_list vargs) +{ + return ONLP_STATUS_E_UNSUPPORTED; +} + diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/sfpi.c b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/sfpi.c new file mode 100755 index 00000000..51e892e0 --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/sfpi.c @@ -0,0 +1,389 @@ +/************************************************************ + * + * + * Copyright 2014 Big Switch Networks, Inc. + * + * Licensed under the Eclipse Public License, Version 1.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.eclipse.org/legal/epl-v10.html + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, + * either express or implied. See the License for the specific + * language governing permissions and limitations under the + * License. + * + * + ************************************************************ + * + * SFPI Interface for the Aurora 720 Platform + * + ***********************************************************/ +#include +#include +#include +#include +#include +#include "x86_64_netberg_aurora_720_rangeley_int.h" +#include "x86_64_netberg_aurora_720_rangeley_log.h" + +#include +#include + +/* Model ID Definition */ +typedef enum +{ + HURACAN_WITH_BMC = 0x0, + HURACAN_WITHOUT_BMC, + CABRERAIII_WITH_BMC, + CABRERAIII_WITHOUT_BMC, + SESTO_WITH_BMC, + SESTO_WITHOUT_BMC, + NCIIX_WITH_BMC, + NCIIX_WITHOUT_BMC, + ASTERION_WITH_BMC, + ASTERION_WITHOUT_BMC, + HURACAN_A_WITH_BMC, + HURACAN_A_WITHOUT_BMC, + + MODEL_ID_LAST +} modelId_t; + +static int +onlp_board_model_id_get(void) +{ + static int board_model_id = MODEL_ID_LAST; + + if (board_model_id == MODEL_ID_LAST) + { + if (onlp_file_read_int(&board_model_id, SYS_HWMON1_PREFIX "/board_model_id") != ONLP_STATUS_OK) + return 0; + } + + return board_model_id; +} + +/* + * This function will be called prior to all other onlp_sfpi_* functions. + */ +int +onlp_sfpi_init(void) +{ + return ONLP_STATUS_OK; +} + +/* + * This function should populate the give bitmap with + * all valid, SFP-capable port numbers. + * + * Only port numbers in this bitmap will be queried by the the + * ONLP framework. + * + * No SFPI functions will be called with ports that are + * not in this bitmap. You can ignore all error checking + * on the incoming ports defined in this interface. + */ +int +onlp_sfpi_bitmap_get(onlp_sfp_bitmap_t* bmap) +{ + int p; + int total_port = 0; + int board_model_id = onlp_board_model_id_get(); + + switch (board_model_id) + { + case HURACAN_WITH_BMC: + case HURACAN_WITHOUT_BMC: + case HURACAN_A_WITH_BMC: + case HURACAN_A_WITHOUT_BMC: + total_port = 32; + break; + + case SESTO_WITH_BMC: + case SESTO_WITHOUT_BMC: + case NCIIX_WITH_BMC: + case NCIIX_WITHOUT_BMC: + total_port = 54; + break; + + case ASTERION_WITH_BMC: + case ASTERION_WITHOUT_BMC: + total_port = 64; + break; + + default: + break; + } + + AIM_BITMAP_CLR_ALL(bmap); + for(p = 0; p < total_port; p++) + AIM_BITMAP_SET(bmap, p); + + return ONLP_STATUS_OK; +} + +/* + * This function should return whether an SFP is inserted on the given + * port. + * + * Returns 1 if the SFP is present. + * Returns 0 if the SFP is not present. + * Returns ONLP_E_* if there was an error determining the status. + */ +int +onlp_sfpi_is_present(int port) +{ + int value = 0; + + onlp_file_read_int(&value, SYS_HWMON2_PREFIX "/port_%d_abs", (port+1)); + return value; +} + +int +onlp_sfpi_port_map(int port, int* rport) +{ + int board_model_id = onlp_board_model_id_get(); + + switch (board_model_id) + { + case HURACAN_WITH_BMC: + case HURACAN_WITHOUT_BMC: + case HURACAN_A_WITH_BMC: + case HURACAN_A_WITHOUT_BMC: + /* odd <=> even */ + if (port & 0x1) + *rport = (port - 1); + else + *rport = (port + 1); + break; + + default: + *rport = port; break; + } + + return ONLP_STATUS_OK; +} + +int +onlp_sfpi_presence_bitmap_get(onlp_sfp_bitmap_t* dst) +{ + return ONLP_STATUS_E_UNSUPPORTED; +} + +int +onlp_sfpi_rx_los_bitmap_get(onlp_sfp_bitmap_t* bmap) +{ + int p; + int total_port = 0; + int board_model_id = onlp_board_model_id_get(); + + switch (board_model_id) + { + case SESTO_WITH_BMC: + case SESTO_WITHOUT_BMC: + case NCIIX_WITH_BMC: + case NCIIX_WITHOUT_BMC: + case ASTERION_WITH_BMC: + case ASTERION_WITHOUT_BMC: + total_port = 48; + break; + + default: + break; + } + + AIM_BITMAP_CLR_ALL(bmap); + for(p = 0; p < total_port; p++) + AIM_BITMAP_SET(bmap, p); + + return ONLP_STATUS_OK; +} + +/* + * This function reads the SFPs idrom and returns in + * in the data buffer provided. + */ +int +onlp_sfpi_eeprom_read(int port, uint8_t data[256]) +{ + int rv = ONLP_STATUS_OK; + char fname[128]; + + memset(data, 0, 256); + memset(fname, 0, sizeof(fname)); + sprintf(fname, SYS_HWMON2_PREFIX "/port_%d_data_a0", (port+1)); + rv = onlplib_sfp_eeprom_read_file(fname, data); + if (rv != ONLP_STATUS_OK) + AIM_LOG_INFO("Unable to read eeprom from port(%d)\r\n", port); + + return rv; +} + +int +onlp_sfpi_dom_read(int port, uint8_t data[256]) +{ + int rv = ONLP_STATUS_OK; + char fname[128]; + + memset(data, 0, 256); + memset(fname, 0, sizeof(fname)); + sprintf(fname, SYS_HWMON2_PREFIX "/port_%d_data_a2", (port+1)); + rv = onlplib_sfp_eeprom_read_file(fname, data); + if (rv != ONLP_STATUS_OK) + AIM_LOG_INFO("Unable to read eeprom from port(%d)\r\n", port); + + return rv; +} + +/* + * Manually enable or disable the given SFP. + * + */ +int +onlp_sfpi_enable_set(int port, int enable) +{ + return ONLP_STATUS_E_UNSUPPORTED; +} + +/* + * Returns whether the SFP is currently enabled or disabled. + */ +int +onlp_sfpi_enable_get(int port, int* enable) +{ + return ONLP_STATUS_E_UNSUPPORTED; +} + +/* + * If the platform requires any setup or equalizer modifications + * based on the actual SFP that was inserted then that custom + * setup should be performed here. + * + * After a new SFP is detected by the ONLP framework this + * function will be called to perform the (optional) setup. + */ +int +onlp_sfpi_post_insert(int port, sff_info_t* sff_info) +{ + return ONLP_STATUS_E_UNSUPPORTED; +} + +/* + * Return the current status of the SFP. + * See onlp_sfp_status_t; + */ +int +onlp_sfpi_status_get(int port, uint32_t* status) +{ + return ONLP_STATUS_E_UNSUPPORTED; +} + +int onlp_sfpi_control_supported(int port, onlp_sfp_control_t control, int* supported) +{ + if (supported == NULL) + return ONLP_STATUS_E_PARAM; + + *supported = 0; + switch (control) + { + case ONLP_SFP_CONTROL_TX_DISABLE: + case ONLP_SFP_CONTROL_RX_LOS: + { + int board_model_id = onlp_board_model_id_get(); + + switch (board_model_id) + { + case SESTO_WITH_BMC: + case SESTO_WITHOUT_BMC: + case NCIIX_WITH_BMC: + case NCIIX_WITHOUT_BMC: + case ASTERION_WITH_BMC: + case ASTERION_WITHOUT_BMC: + if (port < 48) + *supported = 1; + break; + + default: + break; + } + } + break; + + default: + break; + } + + return ONLP_STATUS_OK; +} + +int +onlp_sfpi_control_set(int port, onlp_sfp_control_t control, int value) +{ + int rv = ONLP_STATUS_OK; + int supported = 0; + + if ((onlp_sfpi_control_supported(port, control, &supported) == ONLP_STATUS_OK) && (supported == 0)) + return ONLP_STATUS_E_UNSUPPORTED; + + switch (control) + { + case ONLP_SFP_CONTROL_TX_DISABLE: + rv = onlp_file_write_int(value, SYS_HWMON2_PREFIX "/port_%d_tx_disable", (port+1)); + break; + + default: + break; + } + return rv; +} + +int +onlp_sfpi_control_get(int port, onlp_sfp_control_t control, int* value) +{ + int rv = ONLP_STATUS_OK; + int supported = 0; + + if (value == NULL) + return ONLP_STATUS_E_PARAM; + + if ((onlp_sfpi_control_supported(port, control, &supported) == ONLP_STATUS_OK) && (supported == 0)) + return ONLP_STATUS_E_UNSUPPORTED; + + *value = 0; + switch (control) + { + case ONLP_SFP_CONTROL_RX_LOS: + rv = onlp_file_read_int(value, SYS_HWMON2_PREFIX "/port_%d_rxlos", (port+1)); + break; + + case ONLP_SFP_CONTROL_TX_DISABLE: + rv = onlp_file_read_int(value, SYS_HWMON2_PREFIX "/port_%d_tx_disable", (port+1)); + break; + + default: + break; + } + return rv; +} + +/* + * This is a generic ioctl interface. + */ +int +onlp_sfpi_ioctl(int port, va_list vargs) +{ + return ONLP_STATUS_E_UNSUPPORTED; +} + +/* + * De-initialize the SFPI subsystem. + */ +int +onlp_sfpi_denit(void) +{ + return ONLP_STATUS_OK; +} + diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/sysi.c b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/sysi.c new file mode 100755 index 00000000..0914b09c --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/sysi.c @@ -0,0 +1,139 @@ +/************************************************************ + * + * + ************************************************************ + * + * + * + ***********************************************************/ +#include +#include +#include "x86_64_netberg_aurora_720_rangeley_int.h" +#include "x86_64_netberg_aurora_720_rangeley_log.h" + +int toHexValue(char ch) +{ + if ((ch >= '0')&&(ch <= '9')) + { + return (ch-0x30); + } + else if (((ch >= 'a')&&(ch <= 'f'))||((ch >= 'A')&&(ch <= 'F'))) + { + return (ch-0x57); + } + return 0; +} + +/* + * This is the first function called by the ONLP framework. + * + * It should return the name of your platform driver. + * + * If the name of your platform driver is the same as the + * current platform then this driver will be used. + * + * If the name of the driver is different from the current + * platform, or the driver is capable of supporting multiple + * platform variants, see onlp_sysi_platform_set() below. + */ +const char* +onlp_sysi_platform_get(void) +{ + return "x86-64-netberg-aurora-720-rangeley-r0"; +} + +/* + * This function will be called if onlp_sysi_platform_get() + * returns a platform name that is not equal to the current platform. + * + * If you are compatible with the given platform then return ONLP_STATUS_OK. + * If you can are not compatible return ONLP_STATUS_E_UNSUPPORTED. + * - This is fatal and will abort platform initialization. + */ + +int +onlp_sysi_platform_set(const char* name) +{ + /* + * For the purposes of this example we + * accept all platforms. + */ + return ONLP_STATUS_OK; +} + +/* + * This is the first function the ONLP framework will call + * after it has validated the the platform is supported using the mechanisms + * described above. + * + * If this function does not return ONL_STATUS_OK + * then platform initialization is aborted. + */ +int +onlp_sysi_init(void) +{ + return ONLP_STATUS_OK; +} + +int +onlp_sysi_onie_info_get(onlp_onie_info_t* onie) +{ + int rv; + uint8_t buffer[512]; + uint8_t data[256]; + int len; + int i, j; + + memset(buffer, 0, sizeof(buffer)); + memset(data, 0, sizeof(data)); + rv = onlp_file_read(buffer, sizeof(buffer), &len, SYS_HWMON2_PREFIX "/eeprom"); + if (rv == ONLP_STATUS_OK) + { + j = 0; + for (i=0; i<256; i++) + { + data[i] = (toHexValue(buffer[j])<<4) + toHexValue(buffer[j+1]); + j += 2; + } + rv = onlp_onie_decode(onie, (uint8_t*)data, 256); + if(rv >= 0) + { + onie->platform_name = aim_strdup("x86-64-netberg-aurora-720-rangeley-r0"); + } + } + return rv; +} + +int +onlp_sysi_oids_get(onlp_oid_t* table, int max) +{ + onlp_oid_t* e = table; + memset(table, 0, max*sizeof(onlp_oid_t)); + int i; + int n_thermal=7, n_fan=10, n_led=1; + + /* 2 PSUs */ + *e++ = ONLP_PSU_ID_CREATE(1); + *e++ = ONLP_PSU_ID_CREATE(2); + + /* LEDs Item */ + for (i=1; i<=n_led; i++) + { + *e++ = ONLP_LED_ID_CREATE(i); + } + + /* THERMALs Item */ + for (i=1; i<=n_thermal; i++) + { + *e++ = ONLP_THERMAL_ID_CREATE(i); + } + + /* Fans Item */ + for (i=1; i<=n_fan; i++) + { + *e++ = ONLP_FAN_ID_CREATE(i); + } + + return 0; +} + diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/thermali.c b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/thermali.c new file mode 100755 index 00000000..07495f6f --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/thermali.c @@ -0,0 +1,173 @@ +/************************************************************ + * + * + * Copyright 2014 Big Switch Networks, Inc. + * + * Licensed under the Eclipse Public License, Version 1.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.eclipse.org/legal/epl-v10.html + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, + * either express or implied. See the License for the specific + * language governing permissions and limitations under the + * License. + * + * + ************************************************************ + * + * + * + ***********************************************************/ +#include +#include +#include "x86_64_netberg_aurora_720_rangeley_int.h" +#include "x86_64_netberg_aurora_720_rangeley_log.h" + +#define VALIDATE(_id) \ + do { \ + if(!ONLP_OID_IS_THERMAL(_id)) { \ + return ONLP_STATUS_E_INVALID; \ + } \ + } while(0) + +static int +sys_thermal_info_get__(onlp_thermal_info_t* info, int id) +{ + int rv; + + if (id == THERMAL_ID_THERMAL3) + { + rv = onlp_file_read_int(&info->mcelsius, SYS_HWMON1_PREFIX "/mac_temp"); + info->mcelsius *= 1000; + } + else + { + uint8_t buffer[64]; + double dvalue; + int len; + + memset(buffer, 0, sizeof(buffer)); + rv = onlp_file_read(buffer, sizeof(buffer), &len, SYS_HWMON1_PREFIX "/remote_temp%d", id); + if (rv == ONLP_STATUS_OK) + { + dvalue = atof((const char *)buffer); + info->mcelsius = (int)(dvalue * 1000); + } + } + + if(rv == ONLP_STATUS_E_INTERNAL) + return rv; + + if(rv == ONLP_STATUS_E_MISSING) + { + info->status &= ~1; + return ONLP_STATUS_OK; + } + + return ONLP_STATUS_OK; +} + +static int +psu1_thermal_info_get__(onlp_thermal_info_t* info, int id) +{ + int rv; + uint8_t buffer[64]; + double dvalue; + int len; + + memset(buffer, 0, sizeof(buffer)); + rv = onlp_file_read(buffer, sizeof(buffer), &len, SYS_HWMON2_PREFIX "/psu1_temp_%d", id); + if (rv == ONLP_STATUS_OK) + { + dvalue = atof((const char *)buffer); + info->mcelsius = (int)(dvalue * 1000); + } + return rv; +} + +static int +psu2_thermal_info_get__(onlp_thermal_info_t* info, int id) +{ + int rv; + uint8_t buffer[64]; + double dvalue; + int len; + + memset(buffer, 0, sizeof(buffer)); + rv = onlp_file_read(buffer, sizeof(buffer), &len, SYS_HWMON2_PREFIX "/psu2_temp_%d", id); + if (rv == ONLP_STATUS_OK) + { + dvalue = atof((const char *)buffer); + info->mcelsius = (int)(dvalue * 1000); + } + return rv; +} + +static onlp_thermal_info_t temps__[] = +{ + { }, /* Not used */ + { { THERMAL_OID_THERMAL1, "Chassis Thermal 1 (Front of MAC)", 0}, ONLP_THERMAL_STATUS_PRESENT, ONLP_THERMAL_CAPS_GET_TEMPERATURE, 0}, + { { THERMAL_OID_THERMAL2, "Chassis Thermal 2 (Rear of MAC)", 0}, ONLP_THERMAL_STATUS_PRESENT, ONLP_THERMAL_CAPS_GET_TEMPERATURE, 0}, + { { THERMAL_OID_THERMAL3, "Chassis Thermal 3 (MAC)", 0}, ONLP_THERMAL_STATUS_PRESENT, ONLP_THERMAL_CAPS_GET_TEMPERATURE, 0}, + + { { THERMAL_OID_THERMAL4, "PSU-1 Thermal 1", PSU_OID_PSU1 }, ONLP_THERMAL_STATUS_PRESENT, ONLP_THERMAL_CAPS_GET_TEMPERATURE, 0}, + { { THERMAL_OID_THERMAL5, "PSU-1 Thermal 2", PSU_OID_PSU1 }, ONLP_THERMAL_STATUS_PRESENT, ONLP_THERMAL_CAPS_GET_TEMPERATURE, 0}, + + { { THERMAL_OID_THERMAL6, "PSU-2 Thermal 1", PSU_OID_PSU2 }, ONLP_THERMAL_STATUS_PRESENT, ONLP_THERMAL_CAPS_GET_TEMPERATURE, 0}, + { { THERMAL_OID_THERMAL7, "PSU-2 Thermal 2", PSU_OID_PSU2 }, ONLP_THERMAL_STATUS_PRESENT, ONLP_THERMAL_CAPS_GET_TEMPERATURE, 0}, +}; + + +/* + * This will be called to intiialize the thermali subsystem. + */ +int +onlp_thermali_init(void) +{ + return ONLP_STATUS_OK; +} + +/* + * Retrieve the information structure for the given thermal OID. + * + * If the OID is invalid, return ONLP_E_STATUS_INVALID. + * If an unexpected error occurs, return ONLP_E_STATUS_INTERNAL. + * Otherwise, return ONLP_STATUS_OK with the OID's information. + * + * Note -- it is expected that you fill out the information + * structure even if the sensor described by the OID is not present. + */ +int +onlp_thermali_info_get(onlp_oid_t id, onlp_thermal_info_t* info) +{ + int tid; + + VALIDATE(id); + + memset(info, 0, sizeof(onlp_thermal_info_t)); + tid = ONLP_OID_ID_GET(id); + *info = temps__[tid]; + + switch(tid) + { + case THERMAL_ID_THERMAL1: + case THERMAL_ID_THERMAL2: + case THERMAL_ID_THERMAL3: + return sys_thermal_info_get__(info, tid); + + case THERMAL_ID_THERMAL4: + case THERMAL_ID_THERMAL5: + return psu1_thermal_info_get__(info, (tid - THERMAL_ID_THERMAL4 + 1)); + + case THERMAL_ID_THERMAL6: + case THERMAL_ID_THERMAL7: + return psu2_thermal_info_get__(info, (tid - THERMAL_ID_THERMAL6 + 1)); + } + + return ONLP_STATUS_E_INVALID; +} + diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/x86_64_netberg_aurora_720_rangeley_config.c b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/x86_64_netberg_aurora_720_rangeley_config.c new file mode 100755 index 00000000..9f8e2833 --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/x86_64_netberg_aurora_720_rangeley_config.c @@ -0,0 +1,80 @@ +/**************************************************************************//** + * + * + * + *****************************************************************************/ +#include + +/* */ +#define __x86_64_netberg_aurora_720_rangeley_config_STRINGIFY_NAME(_x) #_x +#define __x86_64_netberg_aurora_720_rangeley_config_STRINGIFY_VALUE(_x) __x86_64_netberg_aurora_720_rangeley_config_STRINGIFY_NAME(_x) +x86_64_netberg_aurora_720_rangeley_config_settings_t x86_64_netberg_aurora_720_rangeley_config_settings[] = +{ +#ifdef X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_INCLUDE_LOGGING + { __x86_64_netberg_aurora_720_rangeley_config_STRINGIFY_NAME(X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_INCLUDE_LOGGING), __x86_64_netberg_aurora_720_rangeley_config_STRINGIFY_VALUE(X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_INCLUDE_LOGGING) }, +#else +{ X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_INCLUDE_LOGGING(__x86_64_netberg_aurora_720_rangeley_config_STRINGIFY_NAME), "__undefined__" }, +#endif +#ifdef X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_LOG_OPTIONS_DEFAULT + { __x86_64_netberg_aurora_720_rangeley_config_STRINGIFY_NAME(X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_LOG_OPTIONS_DEFAULT), __x86_64_netberg_aurora_720_rangeley_config_STRINGIFY_VALUE(X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_LOG_OPTIONS_DEFAULT) }, +#else +{ X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_LOG_OPTIONS_DEFAULT(__x86_64_netberg_aurora_720_rangeley_config_STRINGIFY_NAME), "__undefined__" }, +#endif +#ifdef X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_LOG_BITS_DEFAULT + { __x86_64_netberg_aurora_720_rangeley_config_STRINGIFY_NAME(X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_LOG_BITS_DEFAULT), __x86_64_netberg_aurora_720_rangeley_config_STRINGIFY_VALUE(X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_LOG_BITS_DEFAULT) }, +#else +{ X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_LOG_BITS_DEFAULT(__x86_64_netberg_aurora_720_rangeley_config_STRINGIFY_NAME), "__undefined__" }, +#endif +#ifdef X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_LOG_CUSTOM_BITS_DEFAULT + { __x86_64_netberg_aurora_720_rangeley_config_STRINGIFY_NAME(X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_LOG_CUSTOM_BITS_DEFAULT), __x86_64_netberg_aurora_720_rangeley_config_STRINGIFY_VALUE(X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_LOG_CUSTOM_BITS_DEFAULT) }, +#else +{ X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_LOG_CUSTOM_BITS_DEFAULT(__x86_64_netberg_aurora_720_rangeley_config_STRINGIFY_NAME), "__undefined__" }, +#endif +#ifdef X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_PORTING_STDLIB + { __x86_64_netberg_aurora_720_rangeley_config_STRINGIFY_NAME(X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_PORTING_STDLIB), __x86_64_netberg_aurora_720_rangeley_config_STRINGIFY_VALUE(X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_PORTING_STDLIB) }, +#else +{ X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_PORTING_STDLIB(__x86_64_netberg_aurora_720_rangeley_config_STRINGIFY_NAME), "__undefined__" }, +#endif +#ifdef X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS + { __x86_64_netberg_aurora_720_rangeley_config_STRINGIFY_NAME(X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS), __x86_64_netberg_aurora_720_rangeley_config_STRINGIFY_VALUE(X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS) }, +#else +{ X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS(__x86_64_netberg_aurora_720_rangeley_config_STRINGIFY_NAME), "__undefined__" }, +#endif +#ifdef X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_INCLUDE_UCLI + { __x86_64_netberg_aurora_720_rangeley_config_STRINGIFY_NAME(X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_INCLUDE_UCLI), __x86_64_netberg_aurora_720_rangeley_config_STRINGIFY_VALUE(X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_INCLUDE_UCLI) }, +#else +{ X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_INCLUDE_UCLI(__x86_64_netberg_aurora_720_rangeley_config_STRINGIFY_NAME), "__undefined__" }, +#endif +#ifdef X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_SYSFAN_RPM_FAILURE_THRESHOLD + { __x86_64_netberg_aurora_720_rangeley_config_STRINGIFY_NAME(X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_SYSFAN_RPM_FAILURE_THRESHOLD), __x86_64_netberg_aurora_720_rangeley_config_STRINGIFY_VALUE(X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_SYSFAN_RPM_FAILURE_THRESHOLD) }, +#else +{ X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_SYSFAN_RPM_FAILURE_THRESHOLD(__x86_64_netberg_aurora_720_rangeley_config_STRINGIFY_NAME), "__undefined__" }, +#endif + { NULL, NULL } +}; +#undef __x86_64_netberg_aurora_720_rangeley_config_STRINGIFY_VALUE +#undef __x86_64_netberg_aurora_720_rangeley_config_STRINGIFY_NAME + +const char* +x86_64_netberg_aurora_720_rangeley_config_lookup(const char* setting) +{ + int i; + for(i = 0; x86_64_netberg_aurora_720_rangeley_config_settings[i].name; i++) { + if(strcmp(x86_64_netberg_aurora_720_rangeley_config_settings[i].name, setting)) { + return x86_64_netberg_aurora_720_rangeley_config_settings[i].value; + } + } + return NULL; +} + +int +x86_64_netberg_aurora_720_rangeley_config_show(struct aim_pvs_s* pvs) +{ + int i; + for(i = 0; x86_64_netberg_aurora_720_rangeley_config_settings[i].name; i++) { + aim_printf(pvs, "%s = %s\n", x86_64_netberg_aurora_720_rangeley_config_settings[i].name, x86_64_netberg_aurora_720_rangeley_config_settings[i].value); + } + return i; +} + +/* */ diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/x86_64_netberg_aurora_720_rangeley_enums.c b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/x86_64_netberg_aurora_720_rangeley_enums.c new file mode 100755 index 00000000..9e184483 --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/x86_64_netberg_aurora_720_rangeley_enums.c @@ -0,0 +1,10 @@ +/**************************************************************************//** + * + * + * + *****************************************************************************/ +#include + +/* <--auto.start.enum(ALL).source> */ +/* */ + diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/x86_64_netberg_aurora_720_rangeley_int.h b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/x86_64_netberg_aurora_720_rangeley_int.h new file mode 100755 index 00000000..a22db213 --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/x86_64_netberg_aurora_720_rangeley_int.h @@ -0,0 +1,239 @@ +/**************************************************************************//** + * + * x86_64_netberg_aurora_720_rangeley Internal Header + * + *****************************************************************************/ +#ifndef __X86_64_NETBERG_AURORA_720_RANGELEY_INT_H__ +#define __X86_64_NETBERG_AURORA_720_RANGELEY_INT_H__ + +#include +#include + +/* */ +/** thermal_oid */ +typedef enum thermal_oid_e { + THERMAL_OID_THERMAL1 = ONLP_THERMAL_ID_CREATE(1), + THERMAL_OID_THERMAL2 = ONLP_THERMAL_ID_CREATE(2), + THERMAL_OID_THERMAL3 = ONLP_THERMAL_ID_CREATE(3), + THERMAL_OID_THERMAL4 = ONLP_THERMAL_ID_CREATE(4), + THERMAL_OID_THERMAL5 = ONLP_THERMAL_ID_CREATE(5), + THERMAL_OID_THERMAL6 = ONLP_THERMAL_ID_CREATE(6), + THERMAL_OID_THERMAL7 = ONLP_THERMAL_ID_CREATE(7), + THERMAL_OID_THERMAL8 = ONLP_THERMAL_ID_CREATE(8), + THERMAL_OID_THERMAL9 = ONLP_THERMAL_ID_CREATE(9), + THERMAL_OID_THERMAL10 = ONLP_THERMAL_ID_CREATE(10), +} thermal_oid_t; + +/** Enum names. */ +const char* thermal_oid_name(thermal_oid_t e); + +/** Enum values. */ +int thermal_oid_value(const char* str, thermal_oid_t* e, int substr); + +/** Enum descriptions. */ +const char* thermal_oid_desc(thermal_oid_t e); + +/** Enum validator. */ +int thermal_oid_valid(thermal_oid_t e); + +/** validator */ +#define THERMAL_OID_VALID(_e) \ + (thermal_oid_valid((_e))) + +/** thermal_oid_map table. */ +extern aim_map_si_t thermal_oid_map[]; +/** thermal_oid_desc_map table. */ +extern aim_map_si_t thermal_oid_desc_map[]; + +/** thermal_id */ +typedef enum thermal_id_e { + THERMAL_ID_THERMAL1 = 1, + THERMAL_ID_THERMAL2 = 2, + THERMAL_ID_THERMAL3 = 3, + THERMAL_ID_THERMAL4 = 4, + THERMAL_ID_THERMAL5 = 5, + THERMAL_ID_THERMAL6 = 6, + THERMAL_ID_THERMAL7 = 7, + THERMAL_ID_THERMAL8 = 8, + THERMAL_ID_THERMAL9 = 9, + THERMAL_ID_THERMAL10 = 10, +} thermal_id_t; + +/** Enum names. */ +const char* thermal_id_name(thermal_id_t e); + +/** Enum values. */ +int thermal_id_value(const char* str, thermal_id_t* e, int substr); + +/** Enum descriptions. */ +const char* thermal_id_desc(thermal_id_t e); + +/** Enum validator. */ +int thermal_id_valid(thermal_id_t e); + +/** validator */ +#define THERMAL_ID_VALID(_e) \ + (thermal_id_valid((_e))) + +/** thermal_id_map table. */ +extern aim_map_si_t thermal_id_map[]; +/** thermal_id_desc_map table. */ +extern aim_map_si_t thermal_id_desc_map[]; + + +/** psu_oid */ +typedef enum psu_oid_e { + PSU_OID_PSU1 = ONLP_PSU_ID_CREATE(1), + PSU_OID_PSU2 = ONLP_PSU_ID_CREATE(2), +} psu_oid_t; + +/** Enum names. */ +const char* psu_oid_name(psu_oid_t e); + +/** Enum values. */ +int psu_oid_value(const char* str, psu_oid_t* e, int substr); + +/** Enum descriptions. */ +const char* psu_oid_desc(psu_oid_t e); + +/** Enum validator. */ +int psu_oid_valid(psu_oid_t e); + +/** validator */ +#define PSU_OID_VALID(_e) \ + (psu_oid_valid((_e))) + +/** psu_oid_map table. */ +extern aim_map_si_t psu_oid_map[]; +/** psu_oid_desc_map table. */ +extern aim_map_si_t psu_oid_desc_map[]; + +/** psu_id */ +typedef enum psu_id_e { + PSU_ID_PSU1 = 1, + PSU_ID_PSU2 = 2, +} psu_id_t; + +/** Enum names. */ +const char* psu_id_name(psu_id_t e); + +/** Enum values. */ +int psu_id_value(const char* str, psu_id_t* e, int substr); + +/** Enum descriptions. */ +const char* psu_id_desc(psu_id_t e); + +/** Enum validator. */ +int psu_id_valid(psu_id_t e); + +/** validator */ +#define PSU_ID_VALID(_e) \ + (psu_id_valid((_e))) + +/** psu_id_map table. */ +extern aim_map_si_t psu_id_map[]; +/** psu_id_desc_map table. */ +extern aim_map_si_t psu_id_desc_map[]; + + + +/** fan_oid */ +typedef enum fan_oid_e { + FAN_OID_FAN1 = ONLP_FAN_ID_CREATE(1), + FAN_OID_FAN2 = ONLP_FAN_ID_CREATE(2), + FAN_OID_FAN3 = ONLP_FAN_ID_CREATE(3), + FAN_OID_FAN4 = ONLP_FAN_ID_CREATE(4), + FAN_OID_FAN5 = ONLP_FAN_ID_CREATE(5), + FAN_OID_FAN6 = ONLP_FAN_ID_CREATE(6), + FAN_OID_FAN7 = ONLP_FAN_ID_CREATE(7), + FAN_OID_FAN8 = ONLP_FAN_ID_CREATE(8), + FAN_OID_FAN9 = ONLP_FAN_ID_CREATE(9), + FAN_OID_FAN10 = ONLP_FAN_ID_CREATE(10), +} fan_oid_t; + +/** Enum names. */ +const char* fan_oid_name(fan_oid_t e); + +/** Enum values. */ +int fan_oid_value(const char* str, fan_oid_t* e, int substr); + +/** Enum descriptions. */ +const char* fan_oid_desc(fan_oid_t e); + +/** Enum validator. */ +int fan_oid_valid(fan_oid_t e); + +/** validator */ +#define FAN_OID_VALID(_e) \ + (fan_oid_valid((_e))) + +/** fan_oid_map table. */ +extern aim_map_si_t fan_oid_map[]; +/** fan_oid_desc_map table. */ +extern aim_map_si_t fan_oid_desc_map[]; + +/** fan_id */ +typedef enum fan_id_e { + FAN_ID_FAN1 = 1, + FAN_ID_FAN2 = 2, + FAN_ID_FAN3 = 3, + FAN_ID_FAN4 = 4, + FAN_ID_FAN5 = 5, + FAN_ID_FAN6 = 6, + FAN_ID_FAN7 = 7, + FAN_ID_FAN8 = 8, + FAN_ID_FAN9 = 9, + FAN_ID_FAN10 = 10, +} fan_id_t; + +/** Enum names. */ +const char* fan_id_name(fan_id_t e); + +/** Enum values. */ +int fan_id_value(const char* str, fan_id_t* e, int substr); + +/** Enum descriptions. */ +const char* fan_id_desc(fan_id_t e); + +/** Enum validator. */ +int fan_id_valid(fan_id_t e); + +/** validator */ +#define FAN_ID_VALID(_e) \ + (fan_id_valid((_e))) + +/** fan_id_map table. */ +extern aim_map_si_t fan_id_map[]; +/** fan_id_desc_map table. */ +extern aim_map_si_t fan_id_desc_map[]; + +/** led_oid */ +typedef enum led_oid_e { + LED_OID_LED1 = ONLP_LED_ID_CREATE(1), + LED_OID_LED2 = ONLP_LED_ID_CREATE(2), + LED_OID_LED3 = ONLP_LED_ID_CREATE(3), + LED_OID_LED4 = ONLP_LED_ID_CREATE(4), +} led_oid_t; + +/** led_id */ +typedef enum led_id_e { + LED_ID_LED1 = 1, + LED_ID_LED2 = 2, + LED_ID_LED3 = 3, + LED_ID_LED4 = 4, +} led_id_t; + +/* */ + +/* psu info table */ +struct psu_info_s { + char path[PATH_MAX]; + int present; + int busno; + int addr; +}; + +#define SYS_HWMON1_PREFIX "/sys/class/hwmon/hwmon1/device" +#define SYS_HWMON2_PREFIX "/sys/class/hwmon/hwmon2/device" + +#endif /* __X86_64_NETBERG_AURORA_720_RANGELEY_INT_H__ */ diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/x86_64_netberg_aurora_720_rangeley_log.c b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/x86_64_netberg_aurora_720_rangeley_log.c new file mode 100755 index 00000000..c285fc27 --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/x86_64_netberg_aurora_720_rangeley_log.c @@ -0,0 +1,18 @@ +/**************************************************************************//** + * + * + * + *****************************************************************************/ +#include + +#include "x86_64_netberg_aurora_720_rangeley_log.h" +/* + * x86_64_netberg_aurora_720_rangeley log struct. + */ +AIM_LOG_STRUCT_DEFINE( + X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_LOG_OPTIONS_DEFAULT, + X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_LOG_BITS_DEFAULT, + NULL, /* Custom log map */ + X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_LOG_CUSTOM_BITS_DEFAULT + ); + diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/x86_64_netberg_aurora_720_rangeley_log.h b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/x86_64_netberg_aurora_720_rangeley_log.h new file mode 100755 index 00000000..659381e8 --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/x86_64_netberg_aurora_720_rangeley_log.h @@ -0,0 +1,12 @@ +/**************************************************************************//** + * + * + * + *****************************************************************************/ +#ifndef __X86_64_NETBERG_AURORA_720_RANGELEY_LOG_H__ +#define __X86_64_NETBERG_AURORA_720_RANGELEY_LOG_H__ + +#define AIM_LOG_MODULE_NAME x86_64_netberg_aurora_720_rangeley +#include + +#endif /* __X86_64_NETBERG_AURORA_720_RANGELEY_LOG_H__ */ diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/x86_64_netberg_aurora_720_rangeley_module.c b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/x86_64_netberg_aurora_720_rangeley_module.c new file mode 100755 index 00000000..a3eeab03 --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/x86_64_netberg_aurora_720_rangeley_module.c @@ -0,0 +1,24 @@ +/**************************************************************************//** + * + * + * + *****************************************************************************/ +#include + +#include "x86_64_netberg_aurora_720_rangeley_log.h" + +static int +datatypes_init__(void) +{ +#define X86_64_NETBERG_AURORA_720_RANGELEY_ENUMERATION_ENTRY(_enum_name, _desc) AIM_DATATYPE_MAP_REGISTER(_enum_name, _enum_name##_map, _desc, AIM_LOG_INTERNAL); +#include + return 0; +} + +void __x86_64_netberg_aurora_720_rangeley_module_init__(void) +{ + AIM_LOG_STRUCT_REGISTER(); + datatypes_init__(); +} + +int __onlp_platform_version__ = 1; diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/x86_64_netberg_aurora_720_rangeley_ucli.c b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/x86_64_netberg_aurora_720_rangeley_ucli.c new file mode 100755 index 00000000..8b972f2d --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/x86_64_netberg_aurora_720_rangeley_ucli.c @@ -0,0 +1,50 @@ +/**************************************************************************//** + * + * + * + *****************************************************************************/ +#include + +#if X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_INCLUDE_UCLI == 1 + +#include +#include +#include + +static ucli_status_t +x86_64_netberg_aurora_720_rangeley_ucli_ucli__config__(ucli_context_t* uc) +{ + UCLI_HANDLER_MACRO_MODULE_CONFIG(x86_64_netberg_aurora_720_rangeley) +} + +/* */ +/* */ + +static ucli_module_t +x86_64_netberg_aurora_720_rangeley_ucli_module__ = + { + "x86_64_netberg_aurora_720_rangeley_ucli", + NULL, + x86_64_netberg_aurora_720_rangeley_ucli_ucli_handlers__, + NULL, + NULL, + }; + +ucli_node_t* +x86_64_netberg_aurora_720_rangeley_ucli_node_create(void) +{ + ucli_node_t* n; + ucli_module_init(&x86_64_netberg_aurora_720_rangeley_ucli_module__); + n = ucli_node_create("x86_64_netberg_aurora_720_rangeley", NULL, &x86_64_netberg_aurora_720_rangeley_ucli_module__); + ucli_node_subnode_add(n, ucli_module_log_node_create("x86_64_netberg_aurora_720_rangeley")); + return n; +} + +#else +void* +x86_64_netberg_aurora_720_rangeley_ucli_node_create(void) +{ + return NULL; +} +#endif + diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/platform-config/Makefile b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/platform-config/Makefile new file mode 100755 index 00000000..003238cf --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/platform-config/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/platform-config/r0/Makefile b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/platform-config/r0/Makefile new file mode 100755 index 00000000..003238cf --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/platform-config/r0/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/platform-config/r0/PKG.yml b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/platform-config/r0/PKG.yml new file mode 100755 index 00000000..615dd7c4 --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/platform-config/r0/PKG.yml @@ -0,0 +1 @@ +!include $ONL_TEMPLATES/platform-config-platform.yml ARCH=amd64 VENDOR=netberg BASENAME=x86-64-netberg-aurora-720-rangeley REVISION=r0 diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/platform-config/r0/src/lib/x86-64-netberg-aurora-720-rangeley-r0.yml b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/platform-config/r0/src/lib/x86-64-netberg-aurora-720-rangeley-r0.yml new file mode 100755 index 00000000..b38d5fff --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/platform-config/r0/src/lib/x86-64-netberg-aurora-720-rangeley-r0.yml @@ -0,0 +1,30 @@ +--- + +###################################################################### +# +# platform-config for AURORA 720 +# +###################################################################### + +x86-64-netberg-aurora-720-rangeley-r0: + + grub: + + serial: >- + --port=0x2f8 + --speed=115200 + --word=8 + --parity=no + --stop=1 + + kernel: + <<: *kernel-3-16 + + args: >- + console=ttyS1,115200n8 + + ##network: + ## interfaces: + ## ma1: + ## name: ~ + ## syspath: pci0000:00/0000:00:14.0 diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/platform-config/r0/src/python/x86_64_netberg_aurora_720_rangeley_r0/__init__.py b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/platform-config/r0/src/python/x86_64_netberg_aurora_720_rangeley_r0/__init__.py new file mode 100755 index 00000000..49e5ef70 --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/platform-config/r0/src/python/x86_64_netberg_aurora_720_rangeley_r0/__init__.py @@ -0,0 +1,17 @@ +from onl.platform.base import * +from onl.platform.netberg import * + +class OnlPlatform_x86_64_netberg_aurora_720_rangeley_r0(OnlPlatformNetberg, + OnlPlatformPortConfig_32x100): + PLATFORM='x86-64-netberg-aurora-720-rangeley-r0' + MODEL="AURORA720" + SYS_OBJECT_ID=".8.1" + + def baseconfig(self): + self.insmod("hardware_monitor") + + # make ds1339 as default rtc + os.system("ln -snf /dev/rtc1 /dev/rtc") + os.system("hwclock --hctosys") + + return True