From 1e0f9aca98625060a75cb3a77df6fef1b3da27dc Mon Sep 17 00:00:00 2001 From: "raymond.yc.huey" Date: Wed, 24 May 2017 18:19:56 +0800 Subject: [PATCH 01/10] Add Netberg Aurora 620 and Aurora 720 Platform Support --- ...er-i2c-bus-intel-ismt-netberg-aurora.patch | 16 + .../patches/driver-igb-netberg-aurora.patch | 599 ++ .../base/any/kernels/3.16-lts/patches/series | 2 + packages/platforms/netberg/Makefile | 1 + .../platforms/netberg/vendor-config/Makefile | 1 + .../platforms/netberg/vendor-config/PKG.yml | 1 + .../src/python/netberg/__init__.py | 7 + packages/platforms/netberg/x86-64/Makefile | 1 + .../platforms/netberg/x86-64/modules/Makefile | 1 + .../platforms/netberg/x86-64/modules/PKG.yml | 1 + .../netberg/x86-64/modules/builds/.gitignore | 1 + .../netberg/x86-64/modules/builds/Makefile | 6 + .../x86-64/modules/builds/hardware_monitor.c | 6362 +++++++++++++++++ .../.gitignore | 2 + .../Makefile | 1 + .../modules/Makefile | 1 + .../modules/PKG.yml | 1 + .../onlp/Makefile | 1 + .../onlp/PKG.yml | 1 + .../onlp/builds/Makefile | 2 + .../onlp/builds/lib/Makefile | 45 + .../onlp/builds/onlpdump/Makefile | 45 + .../.module | 1 + .../Makefile | 9 + .../module/auto/make.mk | 9 + .../x86_64_netberg_aurora_620_rangeley.yml | 114 + .../x86_64_netberg_aurora_620_rangeley.x | 14 + ...86_64_netberg_aurora_620_rangeley_config.h | 135 + .../x86_64_netberg_aurora_620_rangeley_dox.h | 26 + ...6_64_netberg_aurora_620_rangeley_porting.h | 87 + .../module/make.mk | 10 + .../module/src/Makefile | 9 + .../module/src/fani.c | 234 + .../module/src/ledi.c | 165 + .../module/src/make.mk | 9 + .../module/src/psui.c | 211 + .../module/src/sfpi.c | 389 + .../module/src/sysi.c | 139 + .../module/src/thermali.c | 173 + ...86_64_netberg_aurora_620_rangeley_config.c | 80 + ...x86_64_netberg_aurora_620_rangeley_enums.c | 10 + .../x86_64_netberg_aurora_620_rangeley_int.h | 239 + .../x86_64_netberg_aurora_620_rangeley_log.c | 18 + .../x86_64_netberg_aurora_620_rangeley_log.h | 12 + ...86_64_netberg_aurora_620_rangeley_module.c | 24 + .../x86_64_netberg_aurora_620_rangeley_ucli.c | 50 + .../platform-config/Makefile | 1 + .../platform-config/r0/Makefile | 1 + .../platform-config/r0/PKG.yml | 1 + .../x86-64-netberg-aurora-620-rangeley-r0.yml | 30 + .../__init__.py | 17 + .../.gitignore | 2 + .../Makefile | 1 + .../modules/Makefile | 1 + .../modules/PKG.yml | 1 + .../onlp/Makefile | 1 + .../onlp/PKG.yml | 1 + .../onlp/builds/Makefile | 2 + .../onlp/builds/lib/Makefile | 45 + .../onlp/builds/onlpdump/Makefile | 45 + .../.module | 1 + .../Makefile | 9 + .../module/auto/make.mk | 9 + .../x86_64_netberg_aurora_720_rangeley.yml | 114 + .../x86_64_netberg_aurora_720_rangeley.x | 14 + ...86_64_netberg_aurora_720_rangeley_config.h | 135 + .../x86_64_netberg_aurora_720_rangeley_dox.h | 26 + ...6_64_netberg_aurora_720_rangeley_porting.h | 87 + .../module/make.mk | 10 + .../module/src/Makefile | 9 + .../module/src/fani.c | 234 + .../module/src/ledi.c | 165 + .../module/src/make.mk | 9 + .../module/src/psui.c | 211 + .../module/src/sfpi.c | 389 + .../module/src/sysi.c | 139 + .../module/src/thermali.c | 173 + ...86_64_netberg_aurora_720_rangeley_config.c | 80 + ...x86_64_netberg_aurora_720_rangeley_enums.c | 10 + .../x86_64_netberg_aurora_720_rangeley_int.h | 239 + .../x86_64_netberg_aurora_720_rangeley_log.c | 18 + .../x86_64_netberg_aurora_720_rangeley_log.h | 12 + ...86_64_netberg_aurora_720_rangeley_module.c | 24 + .../x86_64_netberg_aurora_720_rangeley_ucli.c | 50 + .../platform-config/Makefile | 1 + .../platform-config/r0/Makefile | 1 + .../platform-config/r0/PKG.yml | 1 + .../x86-64-netberg-aurora-720-rangeley-r0.yml | 30 + .../__init__.py | 17 + 89 files changed, 11631 insertions(+) create mode 100644 packages/base/any/kernels/3.16-lts/patches/driver-i2c-bus-intel-ismt-netberg-aurora.patch create mode 100644 packages/base/any/kernels/3.16-lts/patches/driver-igb-netberg-aurora.patch mode change 100644 => 100755 packages/base/any/kernels/3.16-lts/patches/series create mode 100755 packages/platforms/netberg/Makefile create mode 100755 packages/platforms/netberg/vendor-config/Makefile create mode 100755 packages/platforms/netberg/vendor-config/PKG.yml create mode 100755 packages/platforms/netberg/vendor-config/src/python/netberg/__init__.py create mode 100755 packages/platforms/netberg/x86-64/Makefile create mode 100755 packages/platforms/netberg/x86-64/modules/Makefile create mode 100755 packages/platforms/netberg/x86-64/modules/PKG.yml create mode 100755 packages/platforms/netberg/x86-64/modules/builds/.gitignore create mode 100755 packages/platforms/netberg/x86-64/modules/builds/Makefile create mode 100755 packages/platforms/netberg/x86-64/modules/builds/hardware_monitor.c create mode 100755 packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/.gitignore create mode 100755 packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/Makefile create mode 100755 packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/modules/Makefile create mode 100755 packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/modules/PKG.yml create mode 100755 packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/Makefile create mode 100755 packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/PKG.yml create mode 100755 packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/Makefile create mode 100755 packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/lib/Makefile create mode 100755 packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/onlpdump/Makefile create mode 100755 packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/.module create mode 100755 packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/Makefile create mode 100755 packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/auto/make.mk create mode 100755 packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/auto/x86_64_netberg_aurora_620_rangeley.yml create mode 100755 packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/inc/x86_64_netberg_aurora_620_rangeley/x86_64_netberg_aurora_620_rangeley.x create mode 100755 packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/inc/x86_64_netberg_aurora_620_rangeley/x86_64_netberg_aurora_620_rangeley_config.h create mode 100755 packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/inc/x86_64_netberg_aurora_620_rangeley/x86_64_netberg_aurora_620_rangeley_dox.h create mode 100755 packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/inc/x86_64_netberg_aurora_620_rangeley/x86_64_netberg_aurora_620_rangeley_porting.h create mode 100755 packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/make.mk create mode 100755 packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/Makefile create mode 100755 packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/fani.c create mode 100755 packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/ledi.c create mode 100755 packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/make.mk create mode 100755 packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/psui.c create mode 100755 packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/sfpi.c create mode 100755 packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/sysi.c create mode 100755 packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/thermali.c create mode 100755 packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/x86_64_netberg_aurora_620_rangeley_config.c create mode 100755 packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/x86_64_netberg_aurora_620_rangeley_enums.c create mode 100755 packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/x86_64_netberg_aurora_620_rangeley_int.h create mode 100755 packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/x86_64_netberg_aurora_620_rangeley_log.c create mode 100755 packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/x86_64_netberg_aurora_620_rangeley_log.h create mode 100755 packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/x86_64_netberg_aurora_620_rangeley_module.c create mode 100755 packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/x86_64_netberg_aurora_620_rangeley_ucli.c create mode 100755 packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/platform-config/Makefile create mode 100755 packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/platform-config/r0/Makefile create mode 100755 packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/platform-config/r0/PKG.yml create mode 100755 packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/platform-config/r0/src/lib/x86-64-netberg-aurora-620-rangeley-r0.yml create mode 100755 packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/platform-config/r0/src/python/x86_64_netberg_aurora_620_rangeley_r0/__init__.py create mode 100755 packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/.gitignore create mode 100755 packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/Makefile create mode 100755 packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/modules/Makefile create mode 100755 packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/modules/PKG.yml create mode 100755 packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/Makefile create mode 100755 packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/PKG.yml create mode 100755 packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/Makefile create mode 100755 packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/lib/Makefile create mode 100755 packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/onlpdump/Makefile create mode 100755 packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/.module create mode 100755 packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/Makefile create mode 100755 packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/auto/make.mk create mode 100755 packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/auto/x86_64_netberg_aurora_720_rangeley.yml create mode 100755 packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/inc/x86_64_netberg_aurora_720_rangeley/x86_64_netberg_aurora_720_rangeley.x create mode 100755 packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/inc/x86_64_netberg_aurora_720_rangeley/x86_64_netberg_aurora_720_rangeley_config.h create mode 100755 packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/inc/x86_64_netberg_aurora_720_rangeley/x86_64_netberg_aurora_720_rangeley_dox.h create mode 100755 packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/inc/x86_64_netberg_aurora_720_rangeley/x86_64_netberg_aurora_720_rangeley_porting.h create mode 100755 packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/make.mk create mode 100755 packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/Makefile create mode 100755 packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/fani.c create mode 100755 packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/ledi.c create mode 100755 packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/make.mk create mode 100755 packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/psui.c create mode 100755 packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/sfpi.c create mode 100755 packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/sysi.c create mode 100755 packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/thermali.c create mode 100755 packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/x86_64_netberg_aurora_720_rangeley_config.c create mode 100755 packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/x86_64_netberg_aurora_720_rangeley_enums.c create mode 100755 packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/x86_64_netberg_aurora_720_rangeley_int.h create mode 100755 packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/x86_64_netberg_aurora_720_rangeley_log.c create mode 100755 packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/x86_64_netberg_aurora_720_rangeley_log.h create mode 100755 packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/x86_64_netberg_aurora_720_rangeley_module.c create mode 100755 packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/x86_64_netberg_aurora_720_rangeley_ucli.c create mode 100755 packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/platform-config/Makefile create mode 100755 packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/platform-config/r0/Makefile create mode 100755 packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/platform-config/r0/PKG.yml create mode 100755 packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/platform-config/r0/src/lib/x86-64-netberg-aurora-720-rangeley-r0.yml create mode 100755 packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/platform-config/r0/src/python/x86_64_netberg_aurora_720_rangeley_r0/__init__.py diff --git a/packages/base/any/kernels/3.16-lts/patches/driver-i2c-bus-intel-ismt-netberg-aurora.patch b/packages/base/any/kernels/3.16-lts/patches/driver-i2c-bus-intel-ismt-netberg-aurora.patch new file mode 100644 index 00000000..c826f7d5 --- /dev/null +++ b/packages/base/any/kernels/3.16-lts/patches/driver-i2c-bus-intel-ismt-netberg-aurora.patch @@ -0,0 +1,16 @@ +diff -Nu a/drivers/i2c/busses/i2c-ismt.c b/drivers/i2c/busses/i2c-ismt.c +--- a/drivers/i2c/busses/i2c-ismt.c 2017-05-09 23:52:56.680565000 -0700 ++++ b/drivers/i2c/busses/i2c-ismt.c 2017-05-10 02:09:53.237489185 -0700 +@@ -614,6 +614,12 @@ + priv->head++; + priv->head %= ISMT_DESC_ENTRIES; + ++ if( ret != 0 ) ++ { ++ dev_dbg(dev, "Retry i2c-ismt access\n"); ++ return -EAGAIN; ++ } ++ + return ret; + } + diff --git a/packages/base/any/kernels/3.16-lts/patches/driver-igb-netberg-aurora.patch b/packages/base/any/kernels/3.16-lts/patches/driver-igb-netberg-aurora.patch new file mode 100644 index 00000000..08d2c2e0 --- /dev/null +++ b/packages/base/any/kernels/3.16-lts/patches/driver-igb-netberg-aurora.patch @@ -0,0 +1,599 @@ +diff -Nu a/drivers/net/ethernet/intel/igb/bcm_phy.c b/drivers/net/ethernet/intel/igb/bcm_phy.c +--- a/drivers/net/ethernet/intel/igb/bcm_phy.c 1969-12-31 16:00:00.000000000 -0800 ++++ b/drivers/net/ethernet/intel/igb/bcm_phy.c 2016-12-26 21:40:26.000000000 -0800 +@@ -0,0 +1,357 @@ ++ ++ ++ ++#include "e1000_hw.h" ++ ++/* ++ * 1000Base-T Control Register ++ */ ++#define MII_GB_CTRL_MS_MAN (1 << 12) /* Manual Master/Slave mode */ ++#define MII_GB_CTRL_MS (1 << 11) /* Master/Slave negotiation mode */ ++#define MII_GB_CTRL_PT (1 << 10) /* Port type */ ++#define MII_GB_CTRL_ADV_1000FD (1 << 9) /* Advertise 1000Base-T FD */ ++#define MII_GB_CTRL_ADV_1000HD (1 << 8) /* Advertise 1000Base-T HD */ ++ ++ ++#define MII_BCM54XX_ECR 0x10 /* BCM54xx extended control register */ ++#define MII_BCM54XX_ECR_IM 0x1000 /* Interrupt mask */ ++#define MII_BCM54XX_ECR_IF 0x0800 /* Interrupt force */ ++#define MII_BCM54XX_ESR 0x11 /* BCM54xx extended status register */ ++#define MII_BCM54XX_ESR_IS 0x1000 /* Interrupt status */ ++#define MII_BCM54XX_EXP_DATA 0x15 /* Expansion register data */ ++#define MII_BCM54XX_EXP_SEL 0x17 /* Expansion register select */ ++#define MII_BCM54XX_EXP_SEL_SSD 0x0e00 /* Secondary SerDes select */ ++#define MII_BCM54XX_EXP_SEL_ER 0x0f00 /* Expansion register select */ ++#define MII_BCM54XX_AUX_CTL 0x18 /* Auxiliary control register */ ++#define MII_BCM54XX_AUX_CTL_ENCODE(val) (((val & 0x7) << 12)|(val & 0x7)) ++#define MII_BCM54XX_ISR 0x1a /* BCM54xx interrupt status register */ ++#define MII_BCM54XX_IMR 0x1b /* BCM54xx interrupt mask register */ ++#define MII_BCM54XX_INT_CRCERR 0x0001 /* CRC error */ ++#define MII_BCM54XX_INT_LINK 0x0002 /* Link status changed */ ++#define MII_BCM54XX_INT_SPEED 0x0004 /* Link speed change */ ++#define MII_BCM54XX_INT_DUPLEX 0x0008 /* Duplex mode changed */ ++#define MII_BCM54XX_INT_LRS 0x0010 /* Local receiver status changed */ ++#define MII_BCM54XX_INT_RRS 0x0020 /* Remote receiver status changed */ ++#define MII_BCM54XX_INT_SSERR 0x0040 /* Scrambler synchronization error */ ++#define MII_BCM54XX_INT_UHCD 0x0080 /* Unsupported HCD negotiated */ ++#define MII_BCM54XX_INT_NHCD 0x0100 /* No HCD */ ++#define MII_BCM54XX_INT_NHCDL 0x0200 /* No HCD link */ ++#define MII_BCM54XX_INT_ANPR 0x0400 /* Auto-negotiation page received */ ++#define MII_BCM54XX_INT_LC 0x0800 /* All counters below 128 */ ++#define MII_BCM54XX_INT_HC 0x1000 /* Counter above 32768 */ ++#define MII_BCM54XX_INT_MDIX 0x2000 /* MDIX status change */ ++#define MII_BCM54XX_INT_PSERR 0x4000 /* Pair swap error */ ++ ++/* ++ * MII Link Advertisment ++ */ ++#define MII_ANA_ASF (1 << 0)/* Advertise Selector Field */ ++#define MII_ANA_HD_10 (1 << 5)/* Half duplex 10Mb/s supported */ ++#define MII_ANA_FD_10 (1 << 6)/* Full duplex 10Mb/s supported */ ++#define MII_ANA_HD_100 (1 << 7)/* Half duplex 100Mb/s supported */ ++#define MII_ANA_FD_100 (1 << 8)/* Full duplex 100Mb/s supported */ ++#define MII_ANA_T4 (1 << 9)/* T4 */ ++#define MII_ANA_PAUSE (1 << 10)/* Pause supported */ ++#define MII_ANA_ASYM_PAUSE (1 << 11)/* Asymmetric pause supported */ ++#define MII_ANA_RF (1 << 13)/* Remote fault */ ++#define MII_ANA_NP (1 << 15)/* Next Page */ ++ ++#define MII_ANA_ASF_802_3 (1) /* 802.3 PHY */ ++ ++ ++#define MII_BCM54XX_SHD 0x1c /* 0x1c shadow registers */ ++#define MII_BCM54XX_SHD_WRITE 0x8000 ++#define MII_BCM54XX_SHD_VAL(x) ((x & 0x1f) << 10) ++#define MII_BCM54XX_SHD_DATA(x) ((x & 0x3ff) << 0) ++ ++#define MII_BCM54XX_AUX_STATUS 0x19 /* Auxiliary status */ ++#define MII_BCM54XX_AUX_STATUS_LINKMODE_MASK 0x0700 ++#define MII_BCM54XX_AUX_STATUS_LINKMODE_SHIFT 8 ++#define MII_BCM54XX_SHD_WR_ENCODE(val, data) \ ++ (MII_BCM54XX_SHD_WRITE | MII_BCM54XX_SHD_VAL(val) | \ ++ MII_BCM54XX_SHD_DATA(data)) ++ ++/* ++ * AUXILIARY CONTROL SHADOW ACCESS REGISTERS. (PHY REG 0x18) ++ */ ++#define MII_BCM54XX_AUXCTL_SHDWSEL_AUXCTL 0x0000 ++#define MII_BCM54XX_AUXCTL_ACTL_TX_6DB 0x0400 ++#define MII_BCM54XX_AUXCTL_ACTL_SMDSP_ENA 0x0800 ++ ++#define MII_BCM54XX_AUXCTL_MISC_WREN 0x8000 ++#define MII_BCM54XX_AUXCTL_MISC_FORCE_AMDIX 0x0200 ++#define MII_BCM54XX_AUXCTL_MISC_RDSEL_MISC 0x7000 ++#define MII_BCM54XX_AUXCTL_SHDWSEL_MISC 0x0007 ++ ++#define MII_BCM54XX_AUXCTL_SHDWSEL_AUXCTL 0x0000 ++ ++/* ++ * Broadcom LED source encodings. These are used in BCM5461, BCM5481, ++ * BCM5482, and possibly some others. ++ */ ++#define BCM_LED_SRC_LINKSPD1 0x0 ++#define BCM_LED_SRC_LINKSPD2 0x1 ++#define BCM_LED_SRC_XMITLED 0x2 ++#define BCM_LED_SRC_ACTIVITYLED 0x3 ++#define BCM_LED_SRC_FDXLED 0x4 ++#define BCM_LED_SRC_SLAVE 0x5 ++#define BCM_LED_SRC_INTR 0x6 ++#define BCM_LED_SRC_QUALITY 0x7 ++#define BCM_LED_SRC_RCVLED 0x8 ++#define BCM_LED_SRC_MULTICOLOR1 0xa ++#define BCM_LED_SRC_OPENSHORT 0xb ++#define BCM_LED_SRC_OFF 0xe /* Tied high */ ++#define BCM_LED_SRC_ON 0xf /* Tied low */ ++ ++ /* ++ * BCM54XX: Shadow registers ++ * Shadow values go into bits [14:10] of register 0x1c to select a shadow ++ * register to access. ++ */ ++ ++#define BCM54XX_SHD_AUTODETECT 0x1e /* 11110: Auto detect Regisrer */ ++#define BCM54XX_SHD_MODE 0x1f /* 11111: Mode Control Register */ ++#define BCM54XX_SHD_MODE_COPPER 1<<7 ++#define BCM54XX_SHD_MODE_SER 1<<6 ++ /* ++ * EXPANSION SHADOW ACCESS REGISTERS. (PHY REG 0x15, 0x16, and 0x17) ++ */ ++ #define MII_BCM54XX_EXP_AADJ1CH0 0x001f ++ #define MII_BCM54XX_EXP_AADJ1CH0_SWP_ABCD_OEN 0x0200 ++ #define MII_BCM54XX_EXP_AADJ1CH0_SWSEL_THPF 0x0100 ++ #define MII_BCM54XX_EXP_AADJ1CH3 0x601f ++ #define MII_BCM54XX_EXP_AADJ1CH3_ADCCKADJ 0x0002 ++ #define MII_BCM54XX_EXP_EXP08 0x0F08 ++ #define MII_BCM54XX_EXP_EXP08_RJCT_2MHZ 0x0001 ++ #define MII_BCM54XX_EXP_EXP08_EARLY_DAC_WAKE 0x0200 ++ #define MII_BCM54XX_EXP_EXP75 0x0f75 ++ #define MII_BCM54XX_EXP_EXP75_VDACCTRL 0x003c ++ #define MII_BCM54XX_EXP_EXP96 0x0f96 ++ #define MII_BCM54XX_EXP_EXP96_MYST 0x0010 ++ #define MII_BCM54XX_EXP_EXP97 0x0f97 ++ #define MII_BCM54XX_EXP_EXP97_MYST 0x0c0c ++ ++ ++ ++ ++ /* ++ * Indirect register access functions for the 1000BASE-T/100BASE-TX/10BASE-T ++ * 0x1c shadow registers. ++ */ ++ ++int bcmphy_write(struct e1000_hw *hw,u32 reg,u16 regval){ ++ ++ u32 ret; ++ struct e1000_phy_info *phy = &hw->phy; ++ ret=phy->ops.write_reg(hw,reg,regval); ++ return ret; ++} ++ ++u16 bcmphy_read(struct e1000_hw *hw,u32 reg){ ++ ++ u16 val; ++ struct e1000_phy_info *phy = &hw->phy; ++ phy->ops.read_reg(hw,reg,&val); ++ return val; ++} ++ ++ ++static int bcm54xx_shadow_read(struct e1000_hw *hw, u16 shadow) ++{ ++ bcmphy_write(hw, MII_BCM54XX_SHD, MII_BCM54XX_SHD_VAL(shadow)); ++ return MII_BCM54XX_SHD_DATA(bcmphy_read(hw, MII_BCM54XX_SHD)); ++} ++ ++static int bcm54xx_shadow_write(struct e1000_hw *hw, u16 shadow, u16 val) ++ { ++ return bcmphy_write(hw, MII_BCM54XX_SHD, ++ MII_BCM54XX_SHD_WRITE | ++ MII_BCM54XX_SHD_VAL(shadow) | ++ MII_BCM54XX_SHD_DATA(val)); ++ } ++ ++ /* Indirect register access functions for the Expansion Registers */ ++ static int bcm54xx_exp_read(struct e1000_hw *hw, u8 regnum) ++ { ++ int val; ++ ++ val = bcmphy_write(hw, MII_BCM54XX_EXP_SEL, regnum); ++ if (val < 0) ++ return val; ++ ++ val = bcmphy_read(hw, MII_BCM54XX_EXP_DATA); ++ ++ /* Restore default value. It's O.K. if this write fails. */ ++ bcmphy_write(hw, MII_BCM54XX_EXP_SEL, 0); ++ ++ return val; ++ } ++ ++ static int bcm54xx_exp_write(struct e1000_hw *hw, u16 regnum, u16 val) ++ { ++ int ret; ++ ++ ret = bcmphy_write(hw, MII_BCM54XX_EXP_SEL, regnum); ++ if (ret < 0) ++ return ret; ++ ++ ret = bcmphy_write(hw, MII_BCM54XX_EXP_DATA, val); ++ ++ /* Restore default value. It's O.K. if this write fails. */ ++ bcmphy_write(hw, MII_BCM54XX_EXP_SEL, 0); ++ ++ return ret; ++ } ++ ++ static int bcm54xx_auxctl_write(struct e1000_hw *hw, u16 regnum, u16 val) ++ { ++ return bcmphy_write(hw, MII_BCM54XX_AUX_CTL, regnum | val); ++ } ++ ++static int bcm54xx_config_init(struct e1000_hw *hw) ++ { ++ int reg, err; ++ ++ reg = bcmphy_read(hw, MII_BCM54XX_ECR); ++ if (reg < 0) ++ return reg; ++ ++ /* Mask interrupts globally. */ ++ reg |= MII_BCM54XX_ECR_IM; ++ err = bcmphy_write(hw, MII_BCM54XX_ECR, reg); ++ if (err < 0) ++ return err; ++ ++ /* Unmask events we are interested in. */ ++ reg = ~(MII_BCM54XX_INT_DUPLEX | ++ MII_BCM54XX_INT_SPEED | ++ MII_BCM54XX_INT_LINK); ++ err = bcmphy_write(hw, MII_BCM54XX_IMR, reg); ++ if (err < 0) ++ return err; ++ ++ return 0; ++ } ++ ++void bcm54616s_linkup(struct e1000_hw *hw,int speed , int duplex) ++{ ++ u16 regval; ++ ++ /* set speed and full duplex*/ ++ regval=bcmphy_read(hw,PHY_CONTROL); ++ ++ regval &= ~(MII_CR_SPEED_SELECT_MSB | MII_CR_SPEED_SELECT_LSB |MII_CR_FULL_DUPLEX); ++ switch(speed){ ++ case SPEED_10: ++ regval |=MII_CR_SPEED_10; ++ break; ++ case SPEED_100: ++ regval |=MII_CR_SPEED_100; ++ break; ++ case SPEED_1000: ++ default: ++ regval |=MII_CR_SPEED_1000; ++ break; ++ } ++ switch(duplex){ ++ case FULL_DUPLEX: ++ regval |=MII_CR_FULL_DUPLEX; ++ break; ++ } ++ ++ bcmphy_write(hw,PHY_CONTROL,regval); ++ ++ #if 0 ++ /* set Master auto and cap*/ ++ regval=bcmphy_read(hw,PHY_1000T_CTRL); ++ regval &= ~(MII_GB_CTRL_MS_MAN); ++ regval |= MII_ANA_ASF_802_3; ++ regval |= MII_ANA_HD_10; ++ regval |= MII_ANA_HD_100; ++ regval |= MII_ANA_FD_10; ++ regval |= MII_ANA_FD_100; ++ regval |= MII_ANA_ASYM_PAUSE; ++ regval |= MII_ANA_PAUSE | MII_ANA_ASYM_PAUSE; ++ regval |= MII_ANA_PAUSE; ++ bcmphy_write(hw,PHY_1000T_CTRL,regval); ++ ++ regval=bcmphy_read(hw,PHY_CONTROL); ++ regval |= MII_CR_AUTO_NEG_EN | MII_CR_RESTART_AUTO_NEG; ++ bcmphy_write(hw,PHY_CONTROL,regval); ++ #endif ++ ++ regval=bcmphy_read(hw,PHY_CONTROL); ++ regval &=~(MII_CR_ISOLATE); ++ bcmphy_write(hw,PHY_CONTROL,regval); ++} ++ ++int bcm54616_config_init(struct e1000_hw *hw) ++ { ++ int err, reg; ++ u16 regval; ++ int i; ++ ++ /* reset PHY */ ++ regval=1<<15; ++ bcmphy_write(hw,PHY_CONTROL,regval); ++ ++ mdelay(10); ++ ++ /* disable Power down and iso */ ++ regval=bcmphy_read(hw,PHY_CONTROL); ++ regval &=~(MII_CR_POWER_DOWN|MII_CR_ISOLATE); ++ bcmphy_write(hw,PHY_CONTROL,regval); ++ ++ /* disable suport I */ ++ /*0000 0100 1100 0010 */ ++ bcm54xx_auxctl_write(hw,0,0x04c2); ++ ++ regval=bcmphy_read(hw,MII_BCM54XX_AUX_CTL); ++ ++ /* set 1000base-T */ ++ regval=bcmphy_read(hw,PHY_1000T_CTRL); ++ regval |=CR_1000T_FD_CAPS | CR_1000T_REPEATER_DTE; ++ bcmphy_write(hw,PHY_1000T_CTRL,regval); ++ ++ /* set ctrl */ ++ regval= MII_CR_SPEED_1000|MII_CR_FULL_DUPLEX|MII_CR_SPEED_SELECT_MSB; ++ bcmphy_write(hw,PHY_CONTROL,regval); ++ ++ ++ /* Setup read from auxilary control shadow register 7 */ ++ bcmphy_write(hw, MII_BCM54XX_AUX_CTL,MII_BCM54XX_AUX_CTL_ENCODE(7)); ++ ++ /* Read Misc Control register */ ++ reg = (bcmphy_read(hw, MII_BCM54XX_AUX_CTL) & 0x8FFF) | 0x8010; ++ bcmphy_write(hw, MII_BCM54XX_AUX_CTL, reg); ++ ++ /* Enable auto-detect and copper prefer */ ++ bcm54xx_shadow_write(hw,BCM54XX_SHD_AUTODETECT,0x31); ++ ++ err = bcm54xx_config_init(hw); ++ ++ /* set link parner */ ++ regval = MII_ANA_ASF_802_3; ++ regval |= MII_ANA_HD_10; ++ regval |= MII_ANA_HD_100; ++ regval |= MII_ANA_FD_10; ++ regval |= MII_ANA_FD_100; ++ regval |= MII_ANA_ASYM_PAUSE; ++ regval |= MII_ANA_PAUSE | MII_ANA_ASYM_PAUSE; ++ regval |= MII_ANA_PAUSE; ++ bcmphy_write(hw, PHY_AUTONEG_ADV, reg); ++ ++ i=0; ++ while (1) { ++ regval = bcm54xx_shadow_read(hw,BCM54XX_SHD_MODE); ++ if(regval & BCM54XX_SHD_MODE_SER) ++ break; ++ if (i++ > 500) { ++ //printk("SERDES no link %x\n",regval); ++ break; ++ } ++ mdelay(1); /* 1 ms */ ++ } ++ return err; ++ } ++ +diff -Nu a/drivers/net/ethernet/intel/igb/e1000_82575.c b/drivers/net/ethernet/intel/igb/e1000_82575.c +--- a/drivers/net/ethernet/intel/igb/e1000_82575.c 2017-05-09 23:52:56.728565000 -0700 ++++ b/drivers/net/ethernet/intel/igb/e1000_82575.c 2017-05-10 01:58:36.796075944 -0700 +@@ -317,6 +317,10 @@ + break; + case BCM54616_E_PHY_ID: + phy->type = e1000_phy_bcm54616; ++ //phy->ops.check_polarity = e1000_check_polarity_bcm; ++ phy->ops.get_info = igb_get_phy_info_bcm; ++ phy->ops.force_speed_duplex = igb_phy_force_speed_duplex_bcm; ++ bcm54616_config_init(hw); + break; + case BCM50210S_E_PHY_ID: + break; +@@ -1636,6 +1640,7 @@ + ret_val = igb_e1000_copper_link_setup_82577(hw); + break; + case e1000_phy_bcm54616: ++ ret_val = igb_copper_link_setup_bcm(hw); + break; + case e1000_phy_bcm5461s: + break; +diff -Nu a/drivers/net/ethernet/intel/igb/e1000_82575.h b/drivers/net/ethernet/intel/igb/e1000_82575.h +--- a/drivers/net/ethernet/intel/igb/e1000_82575.h 2017-05-09 23:52:56.608565000 -0700 ++++ b/drivers/net/ethernet/intel/igb/e1000_82575.h 2017-01-12 01:49:16.214072900 -0800 +@@ -25,6 +25,8 @@ + #ifndef _E1000_82575_H_ + #define _E1000_82575_H_ + ++extern void bcm54616s_linkup(struct e1000_hw *hw,int speed , int duplex); ++extern int bcm54616_config_init(struct e1000_hw *hw); + #define ID_LED_DEFAULT_82575_SERDES ((ID_LED_DEF1_DEF2 << 12) | \ + (ID_LED_DEF1_DEF2 << 8) | \ + (ID_LED_DEF1_DEF2 << 4) | \ +diff -Nu a/drivers/net/ethernet/intel/igb/e1000_defines.h b/drivers/net/ethernet/intel/igb/e1000_defines.h +--- a/drivers/net/ethernet/intel/igb/e1000_defines.h 2017-05-09 23:52:56.732565000 -0700 ++++ b/drivers/net/ethernet/intel/igb/e1000_defines.h 2017-05-10 01:57:15.622221274 -0700 +@@ -1186,7 +1186,7 @@ + #define IGP04E1000_E_PHY_ID 0x02A80391 + #define BCM54616_E_PHY_ID 0x3625D10 + #define BCM5461S_PHY_ID 0x002060C0 +-#define M88_VENDOR 0x0141 ++#define M88_VENDOR 0x0141 + #define BCM50210S_E_PHY_ID 0x600d8590 + + /* M88E1000 Specific Registers */ +diff -Nu a/drivers/net/ethernet/intel/igb/e1000_phy.c b/drivers/net/ethernet/intel/igb/e1000_phy.c +--- a/drivers/net/ethernet/intel/igb/e1000_phy.c 2017-05-09 23:52:56.672565000 -0700 ++++ b/drivers/net/ethernet/intel/igb/e1000_phy.c 2017-01-12 01:57:04.376530600 -0800 +@@ -1187,6 +1187,19 @@ + return E1000_SUCCESS; + } + ++s32 igb_copper_link_setup_bcm(struct e1000_hw *hw) ++{ ++ struct e1000_phy_info *phy = &hw->phy; ++ s32 ret_val; ++ u16 phy_data; ++ ++ ret_val = phy->ops.read_reg(hw, PHY_CONTROL, &phy_data); ++ phy_data &=~(MII_CR_ISOLATE); ++ ret_val = phy->ops.write_reg(hw, PHY_CONTROL, phy_data); ++ ++ return 0; ++} ++ + /** + * e1000_copper_link_setup_m88_gen2 - Setup m88 PHY's for copper link + * @hw: pointer to the HW structure +@@ -1720,6 +1733,62 @@ + return ret_val; + } + ++s32 igb_phy_force_speed_duplex_bcm(struct e1000_hw *hw) ++{ ++ struct e1000_phy_info *phy = &hw->phy; ++ s32 ret_val; ++ u16 phy_data; ++ bool link; ++ ++ ret_val = phy->ops.read_reg(hw, PHY_CONTROL, &phy_data); ++ if (ret_val) ++ return ret_val; ++ ++ e1000_phy_force_speed_duplex_setup(hw, &phy_data); ++ ++ phy_data &=~(MII_CR_POWER_DOWN|MII_CR_ISOLATE); ++ ret_val = phy->ops.write_reg(hw, PHY_CONTROL, phy_data); ++ if (ret_val) ++ return ret_val; ++ ++ /* Clear Auto-Crossover to force MDI manually. IGP requires MDI ++ * forced whenever speed and duplex are forced. ++ */ ++ #if 0 ++ ret_val = phy->ops.read_reg(hw, IGP01E1000_PHY_PORT_CTRL, &phy_data); ++ if (ret_val) ++ return ret_val; ++ ++ phy_data &= ~IGP01E1000_PSCR_AUTO_MDIX; ++ phy_data &= ~IGP01E1000_PSCR_FORCE_MDI_MDIX; ++ ++ ret_val = phy->ops.write_reg(hw, IGP01E1000_PHY_PORT_CTRL, phy_data); ++ if (ret_val) ++ return ret_val; ++ ++ hw_dbg("IGP PSCR: %X\n", phy_data); ++ #endif ++ udelay(1); ++ ++ if (phy->autoneg_wait_to_complete) { ++ DEBUGFUNC("Waiting for forced speed/duplex link on IGP phy.\n"); ++ ++ ret_val = e1000_phy_has_link_generic(hw, PHY_FORCE_LIMIT, ++ 100000, &link); ++ if (ret_val) ++ return ret_val; ++ ++ if (!link) ++ DEBUGFUNC("Link taking longer than expected.\n"); ++ ++ /* Try once more */ ++ ret_val = e1000_phy_has_link_generic(hw, PHY_FORCE_LIMIT, ++ 100000, &link); ++ } ++ ++ return ret_val; ++} ++ + /** + * e1000_phy_force_speed_duplex_m88 - Force speed/duplex for m88 PHY + * @hw: pointer to the HW structure +@@ -2146,6 +2215,25 @@ + return ret_val; + } + ++s32 e1000_check_polarity_bcm(struct e1000_hw *hw) ++{ ++ struct e1000_phy_info *phy = &hw->phy; ++ s32 ret_val; ++ u16 data; ++ ++ #if 0 ++ ret_val = phy->ops.read_reg(hw, M88E1000_PHY_SPEC_STATUS, &data); ++ ++ if (!ret_val) ++ phy->cable_polarity = ((data & M88E1000_PSSR_REV_POLARITY) ++ ? e1000_rev_polarity_reversed ++ : e1000_rev_polarity_normal); ++ #endif ++ ret_val=0; ++ phy->cable_polarity =e1000_rev_polarity_normal; ++ return ret_val; ++} ++ + /** + * igb_e1000_check_polarity_igp - Checks the polarity. + * @hw: pointer to the HW structure +@@ -2616,6 +2704,38 @@ + return ret_val; + } + ++s32 igb_get_phy_info_bcm(struct e1000_hw *hw) ++{ ++ struct e1000_phy_info *phy = &hw->phy; ++ s32 ret_val; ++ u16 phy_data; ++ bool link; ++ ++ if (phy->media_type != e1000_media_type_copper) { ++ DEBUGFUNC("Phy info is only valid for copper media\n"); ++ return -E1000_ERR_CONFIG; ++ } ++ ++ ret_val = e1000_phy_has_link_generic(hw, 1, 0, &link); ++ if (ret_val) ++ return ret_val; ++ ++ if (!link) { ++ DEBUGFUNC("Phy info is only valid if link is up\n"); ++ return -E1000_ERR_CONFIG; ++ } ++ ++ #if 0 ++ phy->polarity_correction =true; ++ phy->is_mdix = true; ++ phy->cable_length = E1000_CABLE_LENGTH_UNDEFINED; ++ phy->local_rx = e1000_1000t_rx_status_undefined; ++ phy->remote_rx = e1000_1000t_rx_status_undefined; ++ ret_val=0; ++ #endif ++ return ret_val; ++} ++ + /** + * e1000_get_phy_info_igp - Retrieve igp PHY information + * @hw: pointer to the HW structure +diff -Nu a/drivers/net/ethernet/intel/igb/e1000_phy.h b/drivers/net/ethernet/intel/igb/e1000_phy.h +--- a/drivers/net/ethernet/intel/igb/e1000_phy.h 2017-05-09 23:52:56.672565000 -0700 ++++ b/drivers/net/ethernet/intel/igb/e1000_phy.h 2017-01-12 01:58:07.074761900 -0800 +@@ -99,6 +99,10 @@ + s32 e1000_write_phy_reg_mphy(struct e1000_hw *hw, u32 address, u32 data, + bool line_override); + bool e1000_is_mphy_ready(struct e1000_hw *hw); ++s32 igb_check_polarity_bcm(struct e1000_hw *hw); ++s32 igb_copper_link_setup_bcm(struct e1000_hw *hw); ++s32 igb_phy_force_speed_duplex_bcm(struct e1000_hw *hw); ++s32 igb_get_phy_info_bcm(struct e1000_hw *hw); + + #define E1000_MAX_PHY_ADDR 8 + +diff -Nu a/drivers/net/ethernet/intel/igb/igb_main.c b/drivers/net/ethernet/intel/igb/igb_main.c +--- a/drivers/net/ethernet/intel/igb/igb_main.c 2017-05-09 23:52:56.676565000 -0700 ++++ b/drivers/net/ethernet/intel/igb/igb_main.c 2017-01-12 02:04:11.728846300 -0800 +@@ -4814,6 +4814,14 @@ + &adapter->link_speed, + &adapter->link_duplex); + ++ switch (hw->phy.type) { ++ case e1000_phy_bcm54616: ++ bcm54616s_linkup(hw, adapter->link_speed, adapter->link_duplex); ++ break; ++ default: ++ break; ++ } ++ + ctrl = E1000_READ_REG(hw, E1000_CTRL); + /* Links status message must follow this format */ + netdev_info(netdev, +diff -Nu a/drivers/net/ethernet/intel/igb/Makefile b/drivers/net/ethernet/intel/igb/Makefile +--- a/drivers/net/ethernet/intel/igb/Makefile 2017-05-09 23:52:56.600565000 -0700 ++++ b/drivers/net/ethernet/intel/igb/Makefile 2017-01-12 02:06:51.790832900 -0800 +@@ -35,4 +35,4 @@ + e1000_mac.o e1000_nvm.o e1000_phy.o e1000_mbx.o \ + e1000_i210.o igb_ptp.o igb_hwmon.o \ + e1000_manage.o igb_param.o kcompat.o e1000_api.o \ +- igb_vmdq.o igb_procfs.o igb_debugfs.o ++ igb_vmdq.o igb_procfs.o igb_debugfs.o bcm_phy.o diff --git a/packages/base/any/kernels/3.16-lts/patches/series b/packages/base/any/kernels/3.16-lts/patches/series old mode 100644 new mode 100755 index 473d70a2..963fb532 --- a/packages/base/any/kernels/3.16-lts/patches/series +++ b/packages/base/any/kernels/3.16-lts/patches/series @@ -25,3 +25,5 @@ platform-powerpc-85xx-Makefile.patch platform-powerpc-dni-7448-r0.patch platform-powerpc-quanta-lb9-r0.patch driver-support-intel-igb-bcm50210-phy.patch +driver-i2c-bus-intel-ismt-netberg-aurora.patch +driver-igb-netberg-aurora.patch diff --git a/packages/platforms/netberg/Makefile b/packages/platforms/netberg/Makefile new file mode 100755 index 00000000..003238cf --- /dev/null +++ b/packages/platforms/netberg/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/packages/platforms/netberg/vendor-config/Makefile b/packages/platforms/netberg/vendor-config/Makefile new file mode 100755 index 00000000..003238cf --- /dev/null +++ b/packages/platforms/netberg/vendor-config/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/packages/platforms/netberg/vendor-config/PKG.yml b/packages/platforms/netberg/vendor-config/PKG.yml new file mode 100755 index 00000000..a18474fc --- /dev/null +++ b/packages/platforms/netberg/vendor-config/PKG.yml @@ -0,0 +1 @@ +!include $ONL_TEMPLATES/platform-config-vendor.yml VENDOR=netberg Vendor=Netberg diff --git a/packages/platforms/netberg/vendor-config/src/python/netberg/__init__.py b/packages/platforms/netberg/vendor-config/src/python/netberg/__init__.py new file mode 100755 index 00000000..96061bb8 --- /dev/null +++ b/packages/platforms/netberg/vendor-config/src/python/netberg/__init__.py @@ -0,0 +1,7 @@ +#!/usr/bin/python + +from onl.platform.base import * + +class OnlPlatformNetberg(OnlPlatformBase): + MANUFACTURER='Netberg' + PRIVATE_ENTERPRISE_NUMBER=47294 diff --git a/packages/platforms/netberg/x86-64/Makefile b/packages/platforms/netberg/x86-64/Makefile new file mode 100755 index 00000000..003238cf --- /dev/null +++ b/packages/platforms/netberg/x86-64/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/packages/platforms/netberg/x86-64/modules/Makefile b/packages/platforms/netberg/x86-64/modules/Makefile new file mode 100755 index 00000000..003238cf --- /dev/null +++ b/packages/platforms/netberg/x86-64/modules/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/packages/platforms/netberg/x86-64/modules/PKG.yml b/packages/platforms/netberg/x86-64/modules/PKG.yml new file mode 100755 index 00000000..56db964b --- /dev/null +++ b/packages/platforms/netberg/x86-64/modules/PKG.yml @@ -0,0 +1 @@ +!include $ONL_TEMPLATES/arch-vendor-modules.yml ARCH=amd64 VENDOR=netberg KERNELS="onl-kernel-3.16-lts-x86-64-all:amd64" diff --git a/packages/platforms/netberg/x86-64/modules/builds/.gitignore b/packages/platforms/netberg/x86-64/modules/builds/.gitignore new file mode 100755 index 00000000..a65b4177 --- /dev/null +++ b/packages/platforms/netberg/x86-64/modules/builds/.gitignore @@ -0,0 +1 @@ +lib diff --git a/packages/platforms/netberg/x86-64/modules/builds/Makefile b/packages/platforms/netberg/x86-64/modules/builds/Makefile new file mode 100755 index 00000000..3b0a1bd2 --- /dev/null +++ b/packages/platforms/netberg/x86-64/modules/builds/Makefile @@ -0,0 +1,6 @@ +KERNELS := onl-kernel-3.16-lts-x86-64-all:amd64 +KMODULES := $(wildcard *.c) +VENDOR := netberg +BASENAME := common +ARCH := x86_64 +include $(ONL)/make/kmodule.mk diff --git a/packages/platforms/netberg/x86-64/modules/builds/hardware_monitor.c b/packages/platforms/netberg/x86-64/modules/builds/hardware_monitor.c new file mode 100755 index 00000000..9a2c2fa2 --- /dev/null +++ b/packages/platforms/netberg/x86-64/modules/builds/hardware_monitor.c @@ -0,0 +1,6362 @@ + +#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#if 0 +#include "hardware_monitor.h" +#else +enum platform_type { + HURACAN = 0, + NONE +}; + +#define W83795ADG_VENDOR_ID 0x5CA3 +#define W83795ADG_CHIP_ID 0x79 + +#define W83795ADG_TEMP_COUNT 2 +#define W83795ADG_FAN_COUNT 10 +#define W83795ADG_FAN_SPEED_FACTOR 1350000 /* 1.35 * 10^6 */ +#define W83795ADG_FAN_POLES_NUMBER 4 +#define W83795ADG_VSEN_COUNT 7 + +#define TEMP_DECIMAL_BASE 25 /* 0.25 degree C */ +#define VOL_MONITOR_UNIT 1000 /* 1000mV */ + +/* W83795ADG registeris */ +#define W83795ADG_REG_BANK 0x00 /* Bank Select */ + +#define W83795ADG_REG_VENDOR_ID 0xFD /* Vender ID */ +#define W83795ADG_REG_CHIP_ID 0xFE /* Chip ID */ +#define W83795ADG_REG_DEVICE_ID 0xFB /* Device ID */ + +/* Bank 0*/ +#define W83795ADG_REG_CONFIG 0x01 /* Configuration Register */ +#define W83795ADG_REG_TEMP_CTRL2 0x05 /* Temperature Monitoring Control Register */ +#define W83795ADG_REG_VSEN1 0x10 /* VSEN1 voltage readout high byte */ +#define W83795ADG_REG_VSEN2 0x11 /* VSEN2 voltage readout high byte */ +#define W83795ADG_REG_VSEN3 0x12 /* VSEN3 voltage readout high byte */ +#define W83795ADG_REG_VSEN4 0x13 /* VSEN4 voltage readout high byte */ +#define W83795ADG_REG_TR1 0x21 /* TR1 temperature Readout high byte */ +#define W83795ADG_REG_TR2 0x22 /* TR2 temperature Readout high byte */ + +#define W83795ADG_REG_FANIN1_COUNT 0x2E /* FAN1IN tachometer readout high byte */ +#define W83795ADG_REG_FANIN2_COUNT 0x2F /* FAN2IN tachometer readout high byte */ +#define W83795ADG_REG_FANIN3_COUNT 0x30 /* FAN3IN tachometer readout high byte */ +#define W83795ADG_REG_FANIN4_COUNT 0x31 /* FAN4IN tachometer readout high byte */ +#define W83795ADG_REG_FANIN5_COUNT 0x32 /* FAN5IN tachometer readout high byte */ +#define W83795ADG_REG_FANIN6_COUNT 0x33 /* FAN6IN tachometer readout high byte */ +#define W83795ADG_REG_FANIN7_COUNT 0x34 /* FAN7IN tachometer readout high byte */ +#define W83795ADG_REG_FANIN8_COUNT 0x35 /* FAN8IN tachometer readout high byte */ +#define W83795ADG_REG_FANIN9_COUNT 0x36 /* FAN9IN tachometer readout high byte */ +#define W83795ADG_REG_FANIN10_COUNT 0x37 /* FAN10IN tachometer readout high byte */ + +#define W83795ADG_REG_VR_LSB 0x3C /* Monitored channel readout low byte */ + +/* Bank 2 */ +#define W83795ADG_REG_FOMC 0x0F /* Fan Output Mode Control */ +#define W83795ADG_REG_F1OV 0x10 /* Fan Output Value for FANCTL1 */ +#define W83795ADG_REG_F2OV 0x11 /* Fan Output Value for FANCTL2 */ + +/* CPLD register */ +#define CPLD_REG_GENERAL_0x00 0x00 /* Board Type and Revision Register */ +#define CPLD_REG_GENERAL_0x01 0x01 /* CPLD Revision Register */ +#define CPLD_REG_GENERAL_0x02 0x02 /* Power Bank Power Good Status Register */ +#define CPLD_REG_GENERAL_0x03 0x03 /* Power Bank Power ABS Status Register */ +#define CPLD_REG_GENERAL_0x06 0x06 /* Watchdog Control Register */ + +#define CPLD_REG_RESET_0x30 0x30 /* System Reset Register */ +#define CPLD_REG_RESET_0x33 0x33 /* I2C Reset Register */ +#define CPLD_REG_RESET_0x34 0x34 /* QSFP28 LED Clear Register */ +#define CPLD_REG_RESET_0x35 0x35 /* MISC Reset Register */ + +#define CPLD_REG_LED_0x40 0x40 /* System LED Register */ +#define CPLD_REG_LED_0x43 0x43 /* PSU LED Register */ +#define CPLD_REG_LED_0x44 0x44 /* FAN LED Register */ + +#define CPLD_REG_LED 0x44 /* FAN LED */ + +/* 9548 Channel Index */ +#define PCA9548_CH00 0 +#define PCA9548_CH01 1 +#define PCA9548_CH02 2 +#define PCA9548_CH03 3 +#define PCA9548_CH04 4 +#define PCA9548_CH05 5 +#define PCA9548_CH06 6 +#define PCA9548_CH07 7 + +/* PCA9553 */ +#define PCA9553_SET_BIT(numberX, posX) ( numberX |= ( 0x1 << posX) ) +#define PCA9553_CLEAR_BIT(numberX, posX) ( numberX &= (~(0x1 << posX)) ) +#define PCA9553_TEST_BIT(numberX, posX) ( numberX & ( 0x1 << posX) ) + +/**************************************************************************************** + * Correlation between pca9553 I2C Read/Write bit Data and pca9553 port index assignment + * + * + * I2C First Data Byte I2C Second Data Byte + * --------------------------------------- -------------------------------------- + * | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 | |07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 | + * --------------------------------------- ---------------------------------------- + * P07 P06 P05 P04 P03 P02 P01 P00 P17 P16 P15 P14 P13 P12 P11 P10 + * + * P[X][Y] stands for Port X (0 or 1), Bit Y (0-7) + * + * + * NOTE: We combine first data byte and second data byte into a 16-bit integer, which + * is used for I2C transfer. The following macro each defines the port's respective + * bit position within the 16-bit integer. + *****************************************************************************************/ + +#define PCA9553_BIT_P00 0 +#define PCA9553_BIT_P01 1 +#define PCA9553_BIT_P02 2 +#define PCA9553_BIT_P03 3 +#define PCA9553_BIT_P04 4 +#define PCA9553_BIT_P05 5 +#define PCA9553_BIT_P06 6 +#define PCA9553_BIT_P07 7 + +#define PCA9553_BIT_P10 0 +#define PCA9553_BIT_P11 1 +#define PCA9553_BIT_P12 2 +#define PCA9553_BIT_P13 3 +#define PCA9553_BIT_P14 4 +#define PCA9553_BIT_P15 5 +#define PCA9553_BIT_P16 6 +#define PCA9553_BIT_P17 7 + + +/****************************************************************************************** + * PCA9553 I2C bus transactions + * + * - WRITE transaction, consisting of the following data sequence: + * + * Address byte (bit0:0) + Command byte + Data Byte 0 + ... + * + * + * + * - READ transaction, consissting of the following data sequence: + * + * Address byte (bit0:0) + Command byte + Address byte (bit0:1) + Data Byte 0 + ... + * or + * Address byte (bit0:1) + Data Byte 0 + ... + * + * + * EXPLANATION + * Address byte: 7-bit I2C slave address + 1-bit (Read|Write) + * + * Command byte: A pointer allowing the master device to select which PCA9535 + * register to interact with. + * + ******************************************************************************************/ + +/* Register-pointing command byte */ +#define PCA9553_COMMAND_BYTE_REG_INPUT_PORT_0 0x00 +#define PCA9553_COMMAND_BYTE_REG_INPUT_PORT_1 0x01 +#define PCA9553_COMMAND_BYTE_REG_OUTPUT_PORT_0 0x02 +#define PCA9553_COMMAND_BYTE_REG_OUTPUT_PORT_1 0x03 +#define PCA9553_COMMAND_BYTE_REG_POLARITY_INVERSION_0 0x04 +#define PCA9553_COMMAND_BYTE_REG_POLARITY_INVERSION_1 0x05 +#define PCA9553_COMMAND_BYTE_REG_CONFIGURATION_0 0x06 +#define PCA9553_COMMAND_BYTE_REG_CONFIGURATION_1 0x07 + +/* Model ID Definition */ +typedef enum +{ + HURACAN_WITH_BMC = 0x0, + HURACAN_WITHOUT_BMC, + CABRERAIII_WITH_BMC, + CABRERAIII_WITHOUT_BMC, + SESTO_WITH_BMC, + SESTO_WITHOUT_BMC, + NCIIX_WITH_BMC, + NCIIX_WITHOUT_BMC, + ASTERION_WITH_BMC, + ASTERION_WITHOUT_BMC, + HURACAN_A_WITH_BMC, + HURACAN_A_WITHOUT_BMC, + + MODEL_ID_LAST +} modelId_t; + +/* QSFP */ +#define QSFP_COUNT 64 +#define QSFP_DATA_SIZE 256 + +#define EEPROM_DATA_SIZE 256 + +typedef struct +{ + unsigned char tempLow2HighThreshold[3]; + unsigned char tempHigh2LowThreshold[3]; + unsigned char fanDutySet[3]; +} fanControlTable_t; + +static int w83795adg_hardware_monitor_probe(struct i2c_client *client, const struct i2c_device_id *id); +static int w83795adg_hardware_monitor_detect(struct i2c_client *client, struct i2c_board_info *info); +static int w83795adg_hardware_monitor_remove(struct i2c_client *client); +static void w83795adg_hardware_monitor_shutdown(struct i2c_client *client); + +typedef struct +{ + unsigned char portMaskBitForPCA9548_1; + unsigned char portMaskBitForPCA9548_2TO5; + unsigned char portMaskIOsForPCA9548_0; + unsigned char i2cAddrForPCA9535; + short portMaskBitForTxEnPin; +} SFP_PORT_DATA_t; + +#define SFP_PORT_DATA_PORT_NCIIX_1 {0x04, 0x01, 0x08, 0, 3} +#define SFP_PORT_DATA_PORT_NCIIX_2 {0x04, 0x02, 0x08, 0, 9} +#define SFP_PORT_DATA_PORT_NCIIX_3 {0x04, 0x04, 0x08, 1, 3} +#define SFP_PORT_DATA_PORT_NCIIX_4 {0x04, 0x08, 0x08, 1, 9} +#define SFP_PORT_DATA_PORT_NCIIX_5 {0x04, 0x10, 0x08, 2, 3} +#define SFP_PORT_DATA_PORT_NCIIX_6 {0x04, 0x20, 0x08, 2, 9} +#define SFP_PORT_DATA_PORT_NCIIX_7 {0x04, 0x40, 0x08, 3, 3} +#define SFP_PORT_DATA_PORT_NCIIX_8 {0x04, 0x80, 0x08, 3, 9} + +#define SFP_PORT_DATA_PORT_NCIIX_9 {0x08, 0x01, 0x10, 0, 3} +#define SFP_PORT_DATA_PORT_NCIIX_10 {0x08, 0x02, 0x10, 0, 9} +#define SFP_PORT_DATA_PORT_NCIIX_11 {0x08, 0x04, 0x10, 1, 3} +#define SFP_PORT_DATA_PORT_NCIIX_12 {0x08, 0x08, 0x10, 1, 9} +#define SFP_PORT_DATA_PORT_NCIIX_13 {0x08, 0x10, 0x10, 2, 3} +#define SFP_PORT_DATA_PORT_NCIIX_14 {0x08, 0x20, 0x10, 2, 9} +#define SFP_PORT_DATA_PORT_NCIIX_15 {0x08, 0x40, 0x10, 3, 3} +#define SFP_PORT_DATA_PORT_NCIIX_16 {0x08, 0x80, 0x10, 3, 9} + +#define SFP_PORT_DATA_PORT_NCIIX_17 {0x10, 0x01, 0x20, 0, 3} +#define SFP_PORT_DATA_PORT_NCIIX_18 {0x10, 0x02, 0x20, 0, 9} +#define SFP_PORT_DATA_PORT_NCIIX_19 {0x10, 0x04, 0x20, 1, 3} +#define SFP_PORT_DATA_PORT_NCIIX_20 {0x10, 0x08, 0x20, 1, 9} +#define SFP_PORT_DATA_PORT_NCIIX_21 {0x10, 0x10, 0x20, 2, 3} +#define SFP_PORT_DATA_PORT_NCIIX_22 {0x10, 0x20, 0x20, 2, 9} +#define SFP_PORT_DATA_PORT_NCIIX_23 {0x10, 0x40, 0x20, 3, 3} +#define SFP_PORT_DATA_PORT_NCIIX_24 {0x10, 0x80, 0x20, 3, 9} + +#define SFP_PORT_DATA_PORT_NCIIX_25 {0x20, 0x01, 0x40, 0, 3} +#define SFP_PORT_DATA_PORT_NCIIX_26 {0x20, 0x02, 0x40, 0, 9} +#define SFP_PORT_DATA_PORT_NCIIX_27 {0x20, 0x04, 0x40, 1, 3} +#define SFP_PORT_DATA_PORT_NCIIX_28 {0x20, 0x08, 0x40, 1, 9} +#define SFP_PORT_DATA_PORT_NCIIX_29 {0x20, 0x10, 0x40, 2, 3} +#define SFP_PORT_DATA_PORT_NCIIX_30 {0x20, 0x20, 0x40, 2, 9} +#define SFP_PORT_DATA_PORT_NCIIX_31 {0x20, 0x40, 0x40, 3, 3} +#define SFP_PORT_DATA_PORT_NCIIX_32 {0x20, 0x80, 0x40, 3, 9} + +#define SFP_PORT_DATA_PORT_NCIIX_33 {0x40, 0x01, 0x80, 0, 3} +#define SFP_PORT_DATA_PORT_NCIIX_34 {0x40, 0x02, 0x80, 0, 9} +#define SFP_PORT_DATA_PORT_NCIIX_35 {0x40, 0x04, 0x80, 1, 3} +#define SFP_PORT_DATA_PORT_NCIIX_36 {0x40, 0x08, 0x80, 1, 9} +#define SFP_PORT_DATA_PORT_NCIIX_37 {0x40, 0x10, 0x80, 2, 3} +#define SFP_PORT_DATA_PORT_NCIIX_38 {0x40, 0x20, 0x80, 2, 9} +#define SFP_PORT_DATA_PORT_NCIIX_39 {0x40, 0x40, 0x80, 3, 3} +#define SFP_PORT_DATA_PORT_NCIIX_40 {0x40, 0x80, 0x80, 3, 9} + +#define SFP_PORT_DATA_PORT_NCIIX_41 {0x80, 0x01, 0x01, 0, 3} +#define SFP_PORT_DATA_PORT_NCIIX_42 {0x80, 0x02, 0x01, 0, 9} +#define SFP_PORT_DATA_PORT_NCIIX_43 {0x80, 0x04, 0x01, 1, 3} +#define SFP_PORT_DATA_PORT_NCIIX_44 {0x80, 0x08, 0x01, 1, 9} +#define SFP_PORT_DATA_PORT_NCIIX_45 {0x80, 0x10, 0x01, 2, 3} +#define SFP_PORT_DATA_PORT_NCIIX_46 {0x80, 0x20, 0x01, 2, 9} +#define SFP_PORT_DATA_PORT_NCIIX_47 {0x80, 0x40, 0x01, 3, 3} +#define SFP_PORT_DATA_PORT_NCIIX_48 {0x80, 0x80, 0x01, 3, 9} + +#define QSFP_PORT_DATA_PORT_NCIIX_1 {0x02, 0x02, 0x08, 0, 0x0200} +#define QSFP_PORT_DATA_PORT_NCIIX_2 {0x02, 0x01, 0x08, 0, 0x0010} +#define QSFP_PORT_DATA_PORT_NCIIX_3 {0x02, 0x08, 0x08, 1, 0x0010} +#define QSFP_PORT_DATA_PORT_NCIIX_4 {0x02, 0x04, 0x08, 0, 0x4000} +#define QSFP_PORT_DATA_PORT_NCIIX_5 {0x02, 0x20, 0x08, 1, 0x4000} +#define QSFP_PORT_DATA_PORT_NCIIX_6 {0x02, 0x10, 0x08, 1, 0x0200} + +SFP_PORT_DATA_t sfpPortData_78F[] = { + SFP_PORT_DATA_PORT_NCIIX_1, SFP_PORT_DATA_PORT_NCIIX_2, SFP_PORT_DATA_PORT_NCIIX_3, SFP_PORT_DATA_PORT_NCIIX_4, + SFP_PORT_DATA_PORT_NCIIX_5, SFP_PORT_DATA_PORT_NCIIX_6, SFP_PORT_DATA_PORT_NCIIX_7, SFP_PORT_DATA_PORT_NCIIX_8, + SFP_PORT_DATA_PORT_NCIIX_9, SFP_PORT_DATA_PORT_NCIIX_10, SFP_PORT_DATA_PORT_NCIIX_11, SFP_PORT_DATA_PORT_NCIIX_12, + SFP_PORT_DATA_PORT_NCIIX_13, SFP_PORT_DATA_PORT_NCIIX_14, SFP_PORT_DATA_PORT_NCIIX_15, SFP_PORT_DATA_PORT_NCIIX_16, + SFP_PORT_DATA_PORT_NCIIX_17, SFP_PORT_DATA_PORT_NCIIX_18, SFP_PORT_DATA_PORT_NCIIX_19, SFP_PORT_DATA_PORT_NCIIX_20, + SFP_PORT_DATA_PORT_NCIIX_21, SFP_PORT_DATA_PORT_NCIIX_22, SFP_PORT_DATA_PORT_NCIIX_23, SFP_PORT_DATA_PORT_NCIIX_24, + SFP_PORT_DATA_PORT_NCIIX_25, SFP_PORT_DATA_PORT_NCIIX_26, SFP_PORT_DATA_PORT_NCIIX_27, SFP_PORT_DATA_PORT_NCIIX_28, + SFP_PORT_DATA_PORT_NCIIX_29, SFP_PORT_DATA_PORT_NCIIX_30, SFP_PORT_DATA_PORT_NCIIX_31, SFP_PORT_DATA_PORT_NCIIX_32, + SFP_PORT_DATA_PORT_NCIIX_33, SFP_PORT_DATA_PORT_NCIIX_34, SFP_PORT_DATA_PORT_NCIIX_35, SFP_PORT_DATA_PORT_NCIIX_36, + SFP_PORT_DATA_PORT_NCIIX_37, SFP_PORT_DATA_PORT_NCIIX_38, SFP_PORT_DATA_PORT_NCIIX_39, SFP_PORT_DATA_PORT_NCIIX_40, + SFP_PORT_DATA_PORT_NCIIX_41, SFP_PORT_DATA_PORT_NCIIX_42, SFP_PORT_DATA_PORT_NCIIX_43, SFP_PORT_DATA_PORT_NCIIX_44, + SFP_PORT_DATA_PORT_NCIIX_45, SFP_PORT_DATA_PORT_NCIIX_46, SFP_PORT_DATA_PORT_NCIIX_47, SFP_PORT_DATA_PORT_NCIIX_48, + QSFP_PORT_DATA_PORT_NCIIX_1, QSFP_PORT_DATA_PORT_NCIIX_2, QSFP_PORT_DATA_PORT_NCIIX_3, + QSFP_PORT_DATA_PORT_NCIIX_4, QSFP_PORT_DATA_PORT_NCIIX_5, QSFP_PORT_DATA_PORT_NCIIX_6 +}; + +/* CHL8325A for NC2X Platform */ +#define LOOP1_VID_OVERRIDE_ENABLE_REG 0xD0 +#define LOOP1_OVERRIDE_VID_SETTING_REG 0xD1 + +#define CHL8325_LOOP1_Enable 0x40 + +#define CHL8325_VID0 0x9C +#define CHL8325_VID1 0x8D +#define CHL8325_VID_DEFAULT (CHL8325_VID0) +#endif + +static struct i2c_client qsfpDataA0_client; +static struct i2c_client qsfpDataA2_client; + +/* i2c bus 0 */ +static struct i2c_client pca9535pwr_client; +static struct i2c_client cpld_client; +static struct i2c_client pca9548_client_bus0; +static struct i2c_client pca9535_client_bus0[4]; +static struct i2c_client eeprom_client_bus0; +static struct i2c_client mp2953agu_client; +static struct i2c_client chl8325a_client; +static struct i2c_client psu_eeprom_client_bus0; +static struct i2c_client psu_mcu_client_bus0; + +/* i2c bus 1 */ +static struct i2c_client pca9548_client[4]; +static struct i2c_client pca9535pwr_client_bus1[6]; + +static struct i2c_client eeprom_client; +static struct i2c_client eeprom_client_2; +static struct i2c_client psu_eeprom_client; +static struct i2c_client psu_mcu_client; + +static unsigned int FanErr[W83795ADG_FAN_COUNT] = {0}; +static unsigned int FanDir = 0; +static unsigned int isBMCSupport = 0; + +static unsigned int platformBuildRev = 0xffff; +static unsigned int platformHwRev = 0xffff; +static unsigned int platformModelId = 0xffff; + +static char platformPsuPG = 0; +static char platformPsuABS = 0; + +unsigned int SFPPortAbsStatus[QSFP_COUNT]; +unsigned int SFPPortRxLosStatus[QSFP_COUNT]; +char SFPPortDataValid[QSFP_COUNT]; +char SFPPortTxDisable[QSFP_COUNT]; + +struct i2c_bus0_hardware_monitor_data { + struct device *hwmon_dev; + struct attribute_group hwmon_group; + struct mutex lock; + struct task_struct *auto_update; + struct completion auto_update_stop; + + char hardware_monitor_data_valid; + unsigned long hardware_monitor_last_updated; /* In jiffies */ + + unsigned int venderId; + unsigned int chipId; + unsigned int dviceId; + + unsigned int buildRev; + unsigned int hwRev; + unsigned int modelId; + unsigned int cpldRev; + unsigned int cpldRel; + + unsigned int macTemp; + + unsigned int remoteTempIsPositive[W83795ADG_TEMP_COUNT]; + unsigned int remoteTempInt[W83795ADG_TEMP_COUNT]; + unsigned int remoteTempDecimal[W83795ADG_TEMP_COUNT]; + unsigned int fanDuty; + unsigned int fanSpeed[W83795ADG_FAN_COUNT]; + unsigned int vSen[W83795ADG_VSEN_COUNT]; + unsigned int vSenLsb[W83795ADG_VSEN_COUNT]; + + char psuPG; + char psuABS; + + char wdReg; + unsigned int wdEnable; + unsigned int wdRefreshControl; + unsigned int wdRefreshControlFlag; + unsigned int wdRefreshTimeSelect; + unsigned int wdRefreshTimeSelectFlag; + unsigned int wdTimeoutSelect; + unsigned int wdTimeoutSelectFlag; + + unsigned int rov; + }; + +struct i2c_bus1_hardware_monitor_data { + struct device *hwmon_dev; + struct attribute_group hwmon_group; + struct mutex lock; + struct task_struct *auto_update; + struct completion auto_update_stop; + + char hardware_monitor_data_valid; + unsigned long hardware_monitor_last_updated; /* In jiffies */ + + unsigned short qsfpPortAbsStatus[4]; + char qsfpPortDataA0[QSFP_COUNT][QSFP_DATA_SIZE]; + char qsfpPortDataA2[QSFP_COUNT][QSFP_DATA_SIZE]; + unsigned short qsfpPortDataValid[4]; + unsigned short sfpPortTxDisable[3]; + unsigned short sfpPortRateSelect[3]; + unsigned short sfpPortRxLosStatus[4]; + + unsigned short fanAbs[2]; + unsigned short fanDir[2]; + + unsigned short systemLedStatus; + unsigned short frontLedStatus; +}; + +/* Addresses to scan */ +static unsigned short w83795adg_normal_i2c[] = { 0x2F, 0x70, I2C_CLIENT_END }; + +static const struct i2c_device_id w83795adg_hardware_monitor_id[] = { + { "HURACAN", HURACAN }, + { } +}; + +MODULE_DEVICE_TABLE(i2c, w83795adg_hardware_monitor_id); + +static struct i2c_driver w83795adg_hardware_monitor_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "w83795adg_hardware_monitor", + }, + .probe = w83795adg_hardware_monitor_probe, + .remove = w83795adg_hardware_monitor_remove, + .shutdown = w83795adg_hardware_monitor_shutdown, + .id_table = w83795adg_hardware_monitor_id, + .detect = w83795adg_hardware_monitor_detect, + .address_list = w83795adg_normal_i2c, +}; + +/* Front to Back */ +static fanControlTable_t fanControlTable[] = +{ + /* Huracan */ + { + {77, 95, 105}, /* temperature threshold (going to up) */ + {72, 77, 95}, /* temperature threshold (going to down) */ + {0x6C, 0x9E, 0xFF} /* fan rpm : 8000, 12000, 16000 */ + }, + /* Sesto */ + { + {85, 95, 100}, /* temperature threshold (going to up) */ + {71, 85, 95}, /* temperature threshold (going to down) */ + {0x73, 0xCC, 0xFF} /* fan rpm : 9000, 14000, 16000 */ + }, + /* NC2X */ + { + {62, 70, 85}, /* temperature threshold (going to up) */ + {58, 66, 70}, /* temperature threshold (going to down) */ + {0x70, 0xB7, 0xFF} /* fan rpm : 8000, 13000, 16000 */ + } +}; + +/* Back to Front */ +static fanControlTable_t fanControlTable_B2F[] = +{ + /* Huracan */ + { + {70, 77, 105}, /* temperature threshold (going to up) */ + {60, 70, 77}, /* temperature threshold (going to down) */ + {0x6C, 0xC7, 0xFF} /* fan rpm : 8000, 14000, 16000 */ + }, + /* Sesto */ + { + {71, 81, 105}, /* temperature threshold (going to up) */ + {64, 81, 88}, /* temperature threshold (going to down) */ + {0x73, 0xCC, 0xFF} /* fan rpm : 9000, 14000, 16000 */ + }, + /* NC2X */ + { + {58, 63, 80}, /* temperature threshold (going to up) */ + {54, 60, 63}, /* temperature threshold (going to down) */ + {0x6F, 0xB7, 0xFF} /* fan rpm : 8000, 13000, 16000 */ + } +}; + +#if 0 +static int i2c_device_byte_write(const struct i2c_client *client, unsigned char command, unsigned char value) +{ + unsigned int retry = 10; + int ret; + + while(retry>=0) + { + ret = i2c_smbus_write_byte_data(client, command, value); + mdelay(10); + if (ret >=0) + break; + retry--; + } + + if (ret < 0) + printk(KERN_INFO "%s fail : slave addr 0x%02x, command = 0x%02x, value = 0x%02x\n", __func__, client->addr, command, value); + + return ret; +} +#endif + +static int i2c_device_word_write(const struct i2c_client *client, unsigned char command, unsigned short value) +{ + unsigned int retry = 10; + int ret; + + if (i2c_smbus_read_byte_data(client, command)<0) + return -1; + + while(retry>=0) + { + ret = i2c_smbus_write_word_data(client, command, value); + mdelay(10); + if (ret >=0) + break; + retry--; + } + + if (ret < 0) + printk(KERN_INFO "%s fail : slave addr 0x%02x, command = 0x%02x, value = 0x%04x\n", __func__, client->addr, command, value); + + return ret; +} + +int qsfpDataRead(struct i2c_client *client, char *buf) +{ +#if 0 + unsigned int index; + int value; + + for (index=0; indexlock); + + /* Get Fan Speed and display status */ + fanErr = 0; + for (i=0; i=8)&&(data->modelId!=ASTERION_WITH_BMC)&&(data->modelId!=ASTERION_WITHOUT_BMC)) + { + FanErr[i] = 0; + continue; + } + + fanSpeed = 0; + /* Choose W83795ADG bank 0 */ + i2c_smbus_write_byte_data(client, W83795ADG_REG_BANK, 0x00); + MNTFANM = (int) i2c_smbus_read_byte_data(client, (W83795ADG_REG_FANIN1_COUNT+i)); + MNTFANL = (int) i2c_smbus_read_byte_data(client, W83795ADG_REG_VR_LSB); + if ( !((MNTFANM == 0xFF) && (MNTFANL == 0xF0)) ) + { + /* FanSpeed (RPM) = 1.35 x 10^6 / ( (12-bitCountValue) x (FanPoles/4) ) */ + TEMP = (((MNTFANM << 4) + ((MNTFANL & 0xF0) >> 4)) * (W83795ADG_FAN_POLES_NUMBER / 4)); + if (TEMP != 0) + fanSpeed = W83795ADG_FAN_SPEED_FACTOR / TEMP; + } + if (fanSpeed == 0) + fanErr = FanErr[i] = 1; + else + FanErr[i] = 0; + data->fanSpeed[i] = fanSpeed; + } + + if ((data->modelId==HURACAN_WITH_BMC)||(data->modelId==HURACAN_WITHOUT_BMC)) + { + if (data->hwRev == 0x00) /* Proto */ + { + if (fanErr == 1) + i2c_smbus_write_byte_data(&pca9535pwr_client, PCA9553_COMMAND_BYTE_REG_OUTPUT_PORT_0, 0x80); + else + i2c_smbus_write_byte_data(&pca9535pwr_client, PCA9553_COMMAND_BYTE_REG_OUTPUT_PORT_0, 0x00); + } + else if (data->hwRev == 0x02) /* Beta */ + { + if (fanErr == 1) + i2c_smbus_write_byte_data(&cpld_client, CPLD_REG_LED_0x44, 0x01); + else + i2c_smbus_write_byte_data(&cpld_client, CPLD_REG_LED_0x44, 0x00); + } + } + + /* Get Voltage */ + for (i=0; ivSen[i] = (unsigned int) i2c_smbus_read_byte_data(client, (W83795ADG_REG_VSEN1+i)); + data->vSenLsb[i] = (unsigned int) i2c_smbus_read_byte_data(client, W83795ADG_REG_VR_LSB); + } + + /* Get Remote Temp */ + for (i=0; iremoteTempIsPositive[i] = 0; + cTemp = (((MNTRTD << 2) + ((MNTTD & 0xC0) >> 6)) ^ 0x1FF) + 1; /* calculate 2's complement */ + data->remoteTempDecimal[i] = (cTemp & 0x3) * TEMP_DECIMAL_BASE; + data->remoteTempInt[i] = cTemp >> 2; + } + else + { + data->remoteTempIsPositive[i] = 1; + data->remoteTempDecimal[i] = ((MNTTD & 0xC0) >> 6) * TEMP_DECIMAL_BASE; + data->remoteTempInt[i] = MNTRTD; + } + } + + if (fanCtrlDelay == 0) + { + /* Get Max. Temp */ + maxTemp = data->macTemp; + for (i=0; iremoteTempInt[i] > maxTemp) + maxTemp = data->remoteTempInt[i]; + } + + /* FAN Control */ + switch(platformModelId) + { + default: + case HURACAN_WITH_BMC: + case HURACAN_WITHOUT_BMC: + case HURACAN_A_WITH_BMC: + case HURACAN_A_WITHOUT_BMC: + if (FanDir != 0) + fanTable = &(fanControlTable[0]); + else + fanTable = &(fanControlTable_B2F[0]); + break; + + case SESTO_WITH_BMC: + case SESTO_WITHOUT_BMC: + if (FanDir != 0) + fanTable = &(fanControlTable[1]); + else + fanTable = &(fanControlTable_B2F[1]); + break; + + case NCIIX_WITH_BMC: + case NCIIX_WITHOUT_BMC: + if (FanDir != 0) + fanTable = &(fanControlTable[2]); + else + fanTable = &(fanControlTable_B2F[2]); + break; + } + + if (fanErr) + { + fanDuty = fanTable->fanDutySet[2]; + } + else + { + fanDuty = 0; + if (maxTemp > LastTemp) /* temp is going to up */ + { + if (maxTemp < fanTable->tempLow2HighThreshold[0]) + { + fanDuty = fanTable->fanDutySet[0]; + } + else if (maxTemp < fanTable->tempLow2HighThreshold[1]) + { + fanDuty = fanTable->fanDutySet[1]; + } + else if (maxTemp < fanTable->tempLow2HighThreshold[2]) + { + fanDuty = fanTable->fanDutySet[2]; + } + else /* shutdown system */ + { + i2c_smbus_write_byte_data(&cpld_client, CPLD_REG_RESET_0x30, 0xff); + } + } + else if (maxTemp < LastTemp)/* temp is going to down */ + { + if (maxTemp <= fanTable->tempHigh2LowThreshold[0]) + { + fanDuty = fanTable->fanDutySet[0]; + } + else if (maxTemp <= fanTable->tempHigh2LowThreshold[1]) + { + fanDuty = fanTable->fanDutySet[1]; + } + else + { + fanDuty = fanTable->fanDutySet[2]; + } + } + } + LastTemp = maxTemp; + + if ((fanDuty!=0)&&(data->fanDuty!=fanDuty)) + { + data->fanDuty = fanDuty; + + /* Choose W83795ADG bank 0 */ + i2c_smbus_write_byte_data(client, W83795ADG_REG_BANK, 0x00); + /* Disable monitoring operations */ + configByte = i2c_smbus_read_byte_data(client, W83795ADG_REG_CONFIG); + configByte &= 0xfe; + i2c_smbus_write_byte_data(client, W83795ADG_REG_CONFIG, configByte); + + /* Choose W83795ADG bank 2 */ + i2c_smbus_write_byte_data(client, W83795ADG_REG_BANK, 0x02); + i2c_smbus_write_byte_data(client, W83795ADG_REG_F1OV, fanDuty); + i2c_smbus_write_byte_data(client, W83795ADG_REG_F2OV, fanDuty); + + /* Choose W83795ADG bank 0 */ + i2c_smbus_write_byte_data(client, W83795ADG_REG_BANK, 0x00); + /* Enable monitoring operations */ + configByte |= 0x01; + i2c_smbus_write_byte_data(client, W83795ADG_REG_CONFIG, configByte); + } + } + + if (fanCtrlDelay > 0) + fanCtrlDelay --; + + data->psuPG = platformPsuPG = i2c_smbus_read_byte_data(&cpld_client, CPLD_REG_GENERAL_0x02); + data->psuABS = platformPsuABS = i2c_smbus_read_byte_data(&cpld_client, CPLD_REG_GENERAL_0x03); + switch(platformModelId) + { + case NCIIX_WITH_BMC: + case NCIIX_WITHOUT_BMC: + for (i=0; i<5 ; i++) + { + /* Turn on PCA9548#0 channel 3~7 on I2C-bus0 */ + i2c_smbus_write_byte_data(&pca9548_client_bus0, 0, (1<<(PCA9548_CH03+i))); + for (j=0; j<4; j++) + { + port_status = i2c_smbus_read_word_data(&(pca9535_client_bus0[j]), PCA9553_COMMAND_BYTE_REG_INPUT_PORT_0); + port = ((j*2)+(i*8)); + SFPPortAbsStatus[port] = (PCA9553_TEST_BIT(port_status, 1)==0); + SFPPortRxLosStatus[port] = (PCA9553_TEST_BIT(port_status, 2)==0); + port++; + SFPPortAbsStatus[port] = (PCA9553_TEST_BIT(port_status, 7)==0); + SFPPortRxLosStatus[port] = (PCA9553_TEST_BIT(port_status, 8)==0); + } + i2c_smbus_write_byte_data(&pca9548_client_bus0, 0, 0x00); + } + break; + + default: + break; + } + + /* Watchdog Control Register Support */ + if (data->cpldRev != 0) + { + if (data->wdEnable == 1) /* Watchdog Timer is enabled */ + { + if (data->wdRefreshControl == 0) /* Refresh Watchdog by Hardware Monitor */ + { + data->wdReg = i2c_smbus_read_byte_data(&cpld_client, CPLD_REG_GENERAL_0x06); + data->wdReg |= 0x01; /* clear timer */ + i2c_smbus_write_byte_data(&cpld_client, CPLD_REG_GENERAL_0x06, data->wdReg); + } + else if (data->wdRefreshControl == 1) /* Refresh Watchdog by application */ + { + if (data->wdRefreshControlFlag == 1) + { + data->wdReg = i2c_smbus_read_byte_data(&cpld_client, CPLD_REG_GENERAL_0x06); + data->wdReg |= 0x01; /* clear timer */ + i2c_smbus_write_byte_data(&cpld_client, CPLD_REG_GENERAL_0x06, data->wdReg); + data->wdRefreshControlFlag = 0; + } + } + + /* Watchdog Timer timeout setting */ + if (data->wdRefreshTimeSelectFlag == 1) + { + data->wdReg = i2c_smbus_read_byte_data(&cpld_client, CPLD_REG_GENERAL_0x06); + data->wdReg |= 0x01; /* clear timer */ + data->wdReg &= (~0x38); + switch(data->wdRefreshTimeSelect) + { + case 1: /* 8 second delay */ + data->wdReg |= 0x20; + break; + + case 2: /* 16 second delay */ + data->wdReg |= 0x10; + break; + + case 3: /* 24 second delay */ + data->wdReg |= 0x30; + break; + + case 4: /* 32 second delay */ + data->wdReg |= 0x08; + break; + + case 5: /* 40 second delay */ + data->wdReg |= 0x28; + break; + + case 6: /* 48 second delay */ + data->wdReg |= 0x18; + break; + + case 7: /* 56 second delay */ + data->wdReg |= 0x38; + break; + + default: /* 8 second delay */ + data->wdReg |= 0x20; + break; + } + i2c_smbus_write_byte_data(&cpld_client, CPLD_REG_GENERAL_0x06, data->wdReg); + data->wdRefreshTimeSelectFlag = 0; + } + + /* Watchdog Timeout occurrence */ + if (data->wdTimeoutSelectFlag == 1) + { + data->wdReg = i2c_smbus_read_byte_data(&cpld_client, CPLD_REG_GENERAL_0x06); + data->wdReg |= 0x01; /* clear timer */ + if (data->wdTimeoutSelect == 0) /* System reset */ + data->wdReg &= (~0x02); + else /* Power cycle */ + data->wdReg |= 0x02; + i2c_smbus_write_byte_data(&cpld_client, CPLD_REG_GENERAL_0x06, data->wdReg); + data->wdTimeoutSelectFlag = 0; + } + } + else /* Watchdog Timer is disabled */ + { + data->wdReg = i2c_smbus_read_byte_data(&cpld_client, CPLD_REG_GENERAL_0x06); + data->wdReg |= 0x01; /* Enable WD function */ +#if 0 + data->wdReg &= (~0x02); /* default select System reset */ +#else + data->wdReg |= 0x02; /* default select Power cycle */ + data->wdTimeoutSelect = 1; +#endif + data->wdReg &= (~0x38); + data->wdReg |= 0x20; /* default select 8 second delay */ + data->wdRefreshTimeSelect = 1; + i2c_smbus_write_byte_data(&cpld_client, CPLD_REG_GENERAL_0x06, data->wdReg); + data->wdEnable = 1; + } + } + mutex_unlock(&data->lock); + } + + if (kthread_should_stop()) + break; + msleep_interruptible(1000); + } + + complete_all(&data->auto_update_stop); + return 0; +} + +static int i2c_bus1_hardware_monitor_update_thread(void *p) +{ + struct i2c_client *client = p; + struct i2c_bus1_hardware_monitor_data *data = i2c_get_clientdata(client); + int i, ret; + unsigned short value, fanErr; + unsigned int step = 0; + unsigned char qsfpPortData[QSFP_DATA_SIZE]; + unsigned short port_status; + int j, port; + + while (!kthread_should_stop()) + { + mutex_lock(&data->lock); + switch(platformModelId) + { + case HURACAN_WITH_BMC: + case HURACAN_WITHOUT_BMC: + case HURACAN_A_WITH_BMC: + case HURACAN_A_WITHOUT_BMC: + switch (step) + { + case 0: + /* Turn on PCA9548 channel 4 on I2C-bus1 */ + ret = i2c_smbus_write_byte(client, (1<qsfpPortAbsStatus[i] = i2c_smbus_read_word_data(&(pca9535pwr_client_bus1[i]), PCA9553_COMMAND_BYTE_REG_INPUT_PORT_0); + + step = 1; + break; + + case 1: + if ((data->qsfpPortAbsStatus[0]&0x00ff)!=0x00ff) /* QSFP 0~7 ABS */ + { + /* Turn on PCA9548 channel 0 on I2C-bus1 */ + ret = i2c_smbus_write_byte(client, (1<qsfpPortAbsStatus[0], i) == 0) /* present */ + { + ret = i2c_smbus_write_byte(&(pca9548_client[0]), (1<=0) + { + ret = qsfpDataRead(&qsfpDataA0_client,qsfpPortData); + if (ret>=0) + { + memcpy(&(data->qsfpPortDataA0[i][0]), qsfpPortData, QSFP_DATA_SIZE); + PCA9553_SET_BIT(data->qsfpPortDataValid[0], i); + } + } + i2c_smbus_write_byte(&(pca9548_client[0]), 0x00); + } + else + { + memset(&(data->qsfpPortDataA0[i][0]), 0, QSFP_DATA_SIZE); + memset(&(data->qsfpPortDataA2[i][0]), 0, QSFP_DATA_SIZE); + PCA9553_CLEAR_BIT(data->qsfpPortDataValid[0], i); + } + } + } + else + { + for (i=0; i<8; i++) + { + memset(&(data->qsfpPortDataA0[i][0]), 0, QSFP_DATA_SIZE); + memset(&(data->qsfpPortDataA2[i][0]), 0, QSFP_DATA_SIZE); + PCA9553_CLEAR_BIT(data->qsfpPortDataValid[0], i); + } + } + + step = 2; + break; + + case 2: + if ((data->qsfpPortAbsStatus[0]&0xff00)!=0xff00) /* QSFP 8~15 ABS */ + { + /* Turn on PCA9548 channel 1 on I2C-bus1 */ + ret = i2c_smbus_write_byte(client, (1<qsfpPortAbsStatus[0], i) == 0) /* present */ + { + ret = i2c_smbus_write_byte(&(pca9548_client[1]), (1<<(i-8))); + if (ret>=0) + { + ret = qsfpDataRead(&qsfpDataA0_client,qsfpPortData); + if (ret>=0) + { + memcpy(&(data->qsfpPortDataA0[i][0]), qsfpPortData, QSFP_DATA_SIZE); + PCA9553_SET_BIT(data->qsfpPortDataValid[0], i); + } + } + i2c_smbus_write_byte(&(pca9548_client[1]), 0x00); + } + else + { + memset(&(data->qsfpPortDataA0[i][0]), 0, QSFP_DATA_SIZE); + memset(&(data->qsfpPortDataA2[i][0]), 0, QSFP_DATA_SIZE); + PCA9553_CLEAR_BIT(data->qsfpPortDataValid[0], i); + } + } + } + else + { + for (i=8; i<16; i++) + { + memset(&(data->qsfpPortDataA0[i][0]), 0, QSFP_DATA_SIZE); + memset(&(data->qsfpPortDataA2[i][0]), 0, QSFP_DATA_SIZE); + PCA9553_CLEAR_BIT(data->qsfpPortDataValid[0], i); + } + } + + step = 3; + break; + + case 3: + if ((data->qsfpPortAbsStatus[1]&0x00ff)!=0x00ff) /* QSFP 16~23 ABS */ + { + /* Turn on PCA9548 channel 2 on I2C-bus1 */ + ret = i2c_smbus_write_byte(client, (1<qsfpPortAbsStatus[1], i) == 0) /* present */ + { + ret = i2c_smbus_write_byte(&(pca9548_client[2]), (1<=0) + { + ret = qsfpDataRead(&qsfpDataA0_client,qsfpPortData); + if (ret>=0) + { + memcpy(&(data->qsfpPortDataA0[i+16][0]), qsfpPortData, QSFP_DATA_SIZE); + PCA9553_SET_BIT(data->qsfpPortDataValid[1], i); + } + } + i2c_smbus_write_byte(&(pca9548_client[2]), 0x00); + } + else + { + memset(&(data->qsfpPortDataA0[i+16][0]), 0, QSFP_DATA_SIZE); + memset(&(data->qsfpPortDataA2[i+16][0]), 0, QSFP_DATA_SIZE); + PCA9553_CLEAR_BIT(data->qsfpPortDataValid[1], i); + } + } + } + else + { + for (i=0; i<8; i++) + { + memset(&(data->qsfpPortDataA0[i+16][0]), 0, QSFP_DATA_SIZE); + memset(&(data->qsfpPortDataA2[i+16][0]), 0, QSFP_DATA_SIZE); + PCA9553_CLEAR_BIT(data->qsfpPortDataValid[1], i); + } + } + + step = 4; + break; + + case 4: + if ((data->qsfpPortAbsStatus[1]&0xff00)!=0xff00) /* QSFP 24~31 ABS */ + { + /* Turn on PCA9548 channel 3 on I2C-bus1 */ + ret = i2c_smbus_write_byte(client, (1<qsfpPortAbsStatus[1], i) == 0) /* present */ + { + ret = i2c_smbus_write_byte(&(pca9548_client[3]), (1<<(i-8))); + if (ret>=0) + { + ret = qsfpDataRead(&qsfpDataA0_client,qsfpPortData); + if (ret>=0) + { + memcpy(&(data->qsfpPortDataA0[i+16][0]), qsfpPortData, QSFP_DATA_SIZE); + PCA9553_SET_BIT(data->qsfpPortDataValid[1], i); + } + } + i2c_smbus_write_byte(&(pca9548_client[3]), 0x00); + } + else + { + memset(&(data->qsfpPortDataA0[i+16][0]), 0, QSFP_DATA_SIZE); + memset(&(data->qsfpPortDataA2[i+16][0]), 0, QSFP_DATA_SIZE); + PCA9553_CLEAR_BIT(data->qsfpPortDataValid[1], i); + } + } + } + else + { + for (i=8; i<16; i++) + { + memset(&(data->qsfpPortDataA0[i+16][0]), 0, QSFP_DATA_SIZE); + memset(&(data->qsfpPortDataA2[i+16][0]), 0, QSFP_DATA_SIZE); + PCA9553_CLEAR_BIT(data->qsfpPortDataValid[1], i); + } + } + + if (isBMCSupport == 0) + step = 5; + else + step = 0; + break; + + case 5: + /* Turn on PCA9548 channel 7 on I2C-bus1 */ + ret = i2c_smbus_write_byte(client, (1<frontLedStatus |= 0x00ff; + if (fanErr==0) + data->frontLedStatus &= (~0x0008); /* FAN_LED_G# */ + else + data->frontLedStatus &= (~0x0004); /* FAN_LED_Y# */ + + if ((platformPsuABS&0x01)==0x00) /* PSU1 Present */ + { + if (platformPsuPG&0x08) /* PSU1_PG_LDC Power Goodasserted */ + data->frontLedStatus &= (~0x0002); /* PSU1_LED_G# */ + else + data->frontLedStatus &= (~0x0001); /* PSU1_LED_Y# */ + } + if ((platformPsuABS&0x02)==0x00) /* PSU2 Present */ + { + if (platformPsuPG&0x10) /* PSU2_PG_LDC Power Goodasserted */ + data->frontLedStatus &= (~0x0020); /* PSU2_LED_G# */ + else + data->frontLedStatus &= (~0x0010); /* PSU2_LED_Y# */ + } + + switch (data->systemLedStatus) + { + default: + case 0: /* Booting */ + break; + + case 1: /* Critical*/ + data->frontLedStatus &= (~0x0040); /* SYS_LED_Y# */ + break; + + case 2: /* Normal */ + data->frontLedStatus &= (~0x0080); /* SYS_LED_G# */ + break; + } + + i2c_device_word_write(&(pca9535pwr_client_bus1[2]), PCA9553_COMMAND_BYTE_REG_OUTPUT_PORT_0, data->frontLedStatus); + } + + /* FAN Status */ + value = i2c_smbus_read_word_data(&(pca9535pwr_client_bus1[0]), PCA9553_COMMAND_BYTE_REG_INPUT_PORT_0); + data->fanAbs[0] = (value&0x4444); + data->fanDir[0] = (value&0x8888); + FanDir = data->fanDir[0]; + +/* + printk(KERN_INFO "Step %d, value = 0x%04x, fanAbs[0] = 0x%04x, fanDir[0] = 0x%04x\n", step, value, data->fanAbs[0], data->fanDir[0]); +*/ + step = 0; + break; + + default: + step = 0; + break; + } + i2c_smbus_write_byte_data(&cpld_client, CPLD_REG_RESET_0x33, 0x00); + i2c_smbus_write_byte_data(&cpld_client, CPLD_REG_RESET_0x33, 0xff); + break; + + case CABRERAIII_WITH_BMC: + case CABRERAIII_WITHOUT_BMC: + break; + + case SESTO_WITH_BMC: + case SESTO_WITHOUT_BMC: + switch (step) + { + case 0: + /* Turn on PCA9548#1 channel 0 on I2C-bus1 */ + ret = i2c_smbus_write_byte(&(pca9548_client[1]), (1<qsfpPortAbsStatus[i] = i2c_smbus_read_word_data(&(pca9535pwr_client_bus1[i]), PCA9553_COMMAND_BYTE_REG_INPUT_PORT_0); + + /* Turn on PCA9548#1 channel 1 on I2C-bus1 */ + ret = i2c_smbus_write_byte(&(pca9548_client[1]), (1<sfpPortRxLosStatus[i] = i2c_smbus_read_word_data(&(pca9535pwr_client_bus1[i]), PCA9553_COMMAND_BYTE_REG_INPUT_PORT_0); + + step = 1; + break; + + case 1: + if ((data->qsfpPortAbsStatus[0]&0x00ff)!=0x00ff) /* SFP 0~7 ABS */ + { + /* Turn on PCA9548#0 channel 0 on I2C-bus1 */ + ret = i2c_smbus_write_byte(client, (1<qsfpPortAbsStatus[0], i) == 0) /* present */ + { + ret = i2c_smbus_write_byte(&(pca9548_client[0]), (1<=0) + { + if (PCA9553_TEST_BIT(data->qsfpPortDataValid[0], i) == 0) + { + ret = qsfpDataRead(&qsfpDataA0_client,qsfpPortData); + if (ret>=0) + { + memcpy(&(data->qsfpPortDataA0[i][0]), qsfpPortData, QSFP_DATA_SIZE); + PCA9553_SET_BIT(data->qsfpPortDataValid[0], i); + } + } + ret = qsfpDataRead(&qsfpDataA2_client,qsfpPortData); + if (ret>=0) + memcpy(&(data->qsfpPortDataA2[i][0]), qsfpPortData, QSFP_DATA_SIZE); + } + i2c_smbus_write_byte(&(pca9548_client[0]), 0x00); + } + else + { + memset(&(data->qsfpPortDataA0[i][0]), 0, QSFP_DATA_SIZE); + memset(&(data->qsfpPortDataA2[i][0]), 0, QSFP_DATA_SIZE); + PCA9553_CLEAR_BIT(data->qsfpPortDataValid[0], i); + } + } + } + else + { + for (i=0; i<8; i++) + { + memset(&(data->qsfpPortDataA0[i][0]), 0, QSFP_DATA_SIZE); + memset(&(data->qsfpPortDataA2[i][0]), 0, QSFP_DATA_SIZE); + PCA9553_CLEAR_BIT(data->qsfpPortDataValid[0], i); + } + } + + step = 2; + break; + + case 2: + if ((data->qsfpPortAbsStatus[0]&0xff00)!=0xff00) /* SFP 8~15 ABS */ + { + /* Turn on PCA9548#0 channel 1 on I2C-bus1 */ + ret = i2c_smbus_write_byte(client, (1<qsfpPortAbsStatus[0], i) == 0) /* present */ + { + ret = i2c_smbus_write_byte(&(pca9548_client[0]), (1<<(i-8))); + if (ret>=0) + { + if (PCA9553_TEST_BIT(data->qsfpPortDataValid[0], i) == 0) + { + ret = qsfpDataRead(&qsfpDataA0_client,qsfpPortData); + if (ret>=0) + { + memcpy(&(data->qsfpPortDataA0[i][0]), qsfpPortData, QSFP_DATA_SIZE); + PCA9553_SET_BIT(data->qsfpPortDataValid[0], i); + } + } + ret = qsfpDataRead(&qsfpDataA2_client,qsfpPortData); + if (ret>=0) + memcpy(&(data->qsfpPortDataA2[i][0]), qsfpPortData, QSFP_DATA_SIZE); + } + i2c_smbus_write_byte(&(pca9548_client[0]), 0x00); + } + else + { + memset(&(data->qsfpPortDataA0[i][0]), 0, QSFP_DATA_SIZE); + memset(&(data->qsfpPortDataA2[i][0]), 0, QSFP_DATA_SIZE); + PCA9553_CLEAR_BIT(data->qsfpPortDataValid[0], i); + } + } + } + else + { + for (i=8; i<16; i++) + { + memset(&(data->qsfpPortDataA0[i][0]), 0, QSFP_DATA_SIZE); + memset(&(data->qsfpPortDataA2[i][0]), 0, QSFP_DATA_SIZE); + PCA9553_CLEAR_BIT(data->qsfpPortDataValid[0], i); + } + } + + step = 3; + break; + + case 3: + if ((data->qsfpPortAbsStatus[1]&0x00ff)!=0x00ff) /* SFP 16~23 ABS */ + { + /* Turn on PCA9548#0 channel 2 on I2C-bus1 */ + ret = i2c_smbus_write_byte(client, (1<qsfpPortAbsStatus[1], i) == 0) /* present */ + { + ret = i2c_smbus_write_byte(&(pca9548_client[0]), (1<=0) + { + if (PCA9553_TEST_BIT(data->qsfpPortDataValid[1], i) == 0) + { + ret = qsfpDataRead(&qsfpDataA0_client,qsfpPortData); + if (ret>=0) + { + memcpy(&(data->qsfpPortDataA0[i+16][0]), qsfpPortData, QSFP_DATA_SIZE); + PCA9553_SET_BIT(data->qsfpPortDataValid[1], i); + } + } + ret = qsfpDataRead(&qsfpDataA2_client,qsfpPortData); + if (ret>=0) + memcpy(&(data->qsfpPortDataA2[i+16][0]), qsfpPortData, QSFP_DATA_SIZE); + } + i2c_smbus_write_byte(&(pca9548_client[0]), 0x00); + } + else + { + memset(&(data->qsfpPortDataA0[i+16][0]), 0, QSFP_DATA_SIZE); + memset(&(data->qsfpPortDataA2[i+16][0]), 0, QSFP_DATA_SIZE); + PCA9553_CLEAR_BIT(data->qsfpPortDataValid[1], i); + } + } + } + else + { + for (i=0; i<8; i++) + { + memset(&(data->qsfpPortDataA0[i+16][0]), 0, QSFP_DATA_SIZE); + memset(&(data->qsfpPortDataA2[i+16][0]), 0, QSFP_DATA_SIZE); + PCA9553_CLEAR_BIT(data->qsfpPortDataValid[1], i); + } + } + + step = 4; + break; + + case 4: + if ((data->qsfpPortAbsStatus[1]&0xff00)!=0xff00) /* SFP 24~31 ABS */ + { + /* Turn on PCA9548#0 channel 3 on I2C-bus1 */ + ret = i2c_smbus_write_byte(client, (1<qsfpPortAbsStatus[1], i) == 0) /* present */ + { + ret = i2c_smbus_write_byte(&(pca9548_client[0]), (1<<(i-8))); + if (ret>=0) + { + if (PCA9553_TEST_BIT(data->qsfpPortDataValid[1], i) == 0) + { + ret = qsfpDataRead(&qsfpDataA0_client,qsfpPortData); + if (ret>=0) + { + memcpy(&(data->qsfpPortDataA0[i+16][0]), qsfpPortData, QSFP_DATA_SIZE); + PCA9553_SET_BIT(data->qsfpPortDataValid[1], i); + } + } + ret = qsfpDataRead(&qsfpDataA2_client,qsfpPortData); + if (ret>=0) + memcpy(&(data->qsfpPortDataA2[i+16][0]), qsfpPortData, QSFP_DATA_SIZE); + } + i2c_smbus_write_byte(&(pca9548_client[0]), 0x00); + } + else + { + memset(&(data->qsfpPortDataA0[i+16][0]), 0, QSFP_DATA_SIZE); + memset(&(data->qsfpPortDataA2[i+16][0]), 0, QSFP_DATA_SIZE); + PCA9553_CLEAR_BIT(data->qsfpPortDataValid[1], i); + } + } + } + else + { + for (i=8; i<16; i++) + { + memset(&(data->qsfpPortDataA0[i+16][0]), 0, QSFP_DATA_SIZE); + memset(&(data->qsfpPortDataA2[i+16][0]), 0, QSFP_DATA_SIZE); + PCA9553_CLEAR_BIT(data->qsfpPortDataValid[1], i); + } + } + + step = 5; + break; + + case 5: + if ((data->qsfpPortAbsStatus[2]&0x00ff)!=0x00ff) /* SFP 32~39 ABS */ + { + /* Turn on PCA9548#0 channel 4 on I2C-bus1 */ + ret = i2c_smbus_write_byte(client, (1<qsfpPortAbsStatus[2], i) == 0) /* present */ + { + ret = i2c_smbus_write_byte(&(pca9548_client[0]), (1<=0) + { + if (PCA9553_TEST_BIT(data->qsfpPortDataValid[2], i) == 0) + { + ret = qsfpDataRead(&qsfpDataA0_client,qsfpPortData); + if (ret>=0) + { + memcpy(&(data->qsfpPortDataA0[i+32][0]), qsfpPortData, QSFP_DATA_SIZE); + PCA9553_SET_BIT(data->qsfpPortDataValid[2], i); + } + } + ret = qsfpDataRead(&qsfpDataA2_client,qsfpPortData); + if (ret>=0) + memcpy(&(data->qsfpPortDataA2[i+32][0]), qsfpPortData, QSFP_DATA_SIZE); + } + i2c_smbus_write_byte(&(pca9548_client[0]), 0x00); + } + else + { + memset(&(data->qsfpPortDataA0[i+32][0]), 0, QSFP_DATA_SIZE); + memset(&(data->qsfpPortDataA2[i+32][0]), 0, QSFP_DATA_SIZE); + PCA9553_CLEAR_BIT(data->qsfpPortDataValid[2], i); + } + } + } + else + { + for (i=0; i<8; i++) + { + memset(&(data->qsfpPortDataA0[i+32][0]), 0, QSFP_DATA_SIZE); + memset(&(data->qsfpPortDataA2[i+32][0]), 0, QSFP_DATA_SIZE); + PCA9553_CLEAR_BIT(data->qsfpPortDataValid[2], i); + } + } + + step = 6; + break; + + case 6: + if ((data->qsfpPortAbsStatus[2]&0xff00)!=0xff00) /* SFP 40~47 ABS */ + { + /* Turn on PCA9548#0 channel 5 on I2C-bus1 */ + ret = i2c_smbus_write_byte(client, (1<qsfpPortAbsStatus[2], i) == 0) /* present */ + { + ret = i2c_smbus_write_byte(&(pca9548_client[0]), (1<<(i-8))); + if (ret>=0) + { + if (PCA9553_TEST_BIT(data->qsfpPortDataValid[2], i) == 0) + { + ret = qsfpDataRead(&qsfpDataA0_client,qsfpPortData); + if (ret>=0) + { + memcpy(&(data->qsfpPortDataA0[i+32][0]), qsfpPortData, QSFP_DATA_SIZE); + PCA9553_SET_BIT(data->qsfpPortDataValid[2], i); + } + } + ret = qsfpDataRead(&qsfpDataA2_client,qsfpPortData); + if (ret>=0) + memcpy(&(data->qsfpPortDataA2[i+32][0]), qsfpPortData, QSFP_DATA_SIZE); + } + i2c_smbus_write_byte(&(pca9548_client[0]), 0x00); + } + else + { + memset(&(data->qsfpPortDataA0[i+32][0]), 0, QSFP_DATA_SIZE); + memset(&(data->qsfpPortDataA2[i+32][0]), 0, QSFP_DATA_SIZE); + PCA9553_CLEAR_BIT(data->qsfpPortDataValid[2], i); + } + } + } + else + { + for (i=8; i<16; i++) + { + memset(&(data->qsfpPortDataA0[i+32][0]), 0, QSFP_DATA_SIZE); + memset(&(data->qsfpPortDataA2[i+32][0]), 0, QSFP_DATA_SIZE); + PCA9553_CLEAR_BIT(data->qsfpPortDataValid[2], i); + } + } + + step = 7; + break; + + case 7: + if ((data->qsfpPortAbsStatus[3]&0x00ff)!=0x00ff) /* QSFP 0~5 ABS */ + { + /* Turn on PCA9548#0 channel 6 on I2C-bus1 */ + ret = i2c_smbus_write_byte(client, (1<qsfpPortAbsStatus[3], i) == 0) /* present */ + { + ret = i2c_smbus_write_byte(&(pca9548_client[0]), (1<=0) + { + ret = qsfpDataRead(&qsfpDataA0_client,qsfpPortData); + if (ret>=0) + { + memcpy(&(data->qsfpPortDataA0[i+48][0]), qsfpPortData, QSFP_DATA_SIZE); + PCA9553_SET_BIT(data->qsfpPortDataValid[3], i); + } + } + i2c_smbus_write_byte(&(pca9548_client[0]), 0x00); + } + else + { + memset(&(data->qsfpPortDataA0[i+48][0]), 0, QSFP_DATA_SIZE); + memset(&(data->qsfpPortDataA2[i+48][0]), 0, QSFP_DATA_SIZE); + PCA9553_CLEAR_BIT(data->qsfpPortDataValid[3], i); + } + } + } + else + { + for (i=0; i<6; i++) + { + memset(&(data->qsfpPortDataA0[i+48][0]), 0, QSFP_DATA_SIZE); + memset(&(data->qsfpPortDataA2[i+48][0]), 0, QSFP_DATA_SIZE); + PCA9553_CLEAR_BIT(data->qsfpPortDataValid[3], i); + } + } + + if (isBMCSupport == 0) + step = 8; + else + step = 0; + break; + + case 8: + /* Turn on PCA9548#0 channel 7 on I2C-bus1 */ + ret = i2c_smbus_write_byte(client, (1<frontLedStatus |= 0x00ff; + if (fanErr==0) + data->frontLedStatus &= (~0x0008); /* FAN_LED_G# */ + else + data->frontLedStatus &= (~0x0004); /* FAN_LED_Y# */ + + if ((platformPsuABS&0x01)==0x00) /* PSU1 Present */ + { + if (platformPsuPG&0x08) /* PSU1_PG_LDC Power Goodasserted */ + data->frontLedStatus &= (~0x0002); /* PSU1_LED_G# */ + else + data->frontLedStatus &= (~0x0001); /* PSU1_LED_Y# */ + } + if ((platformPsuABS&0x02)==0x00) /* PSU2 Present */ + { + if (platformPsuPG&0x10) /* PSU2_PG_LDC Power Goodasserted */ + data->frontLedStatus &= (~0x0020); /* PSU2_LED_G# */ + else + data->frontLedStatus &= (~0x0010); /* PSU2_LED_Y# */ + } + + switch (data->systemLedStatus) + { + default: + case 0: /* Booting */ + break; + + case 1: /* Critical*/ + data->frontLedStatus &= (~0x0040); /* SYS_LED_Y# */ + break; + + case 2: /* Normal */ + data->frontLedStatus &= (~0x0080); /* SYS_LED_G# */ + break; + } + + i2c_device_word_write(&(pca9535pwr_client_bus1[2]), PCA9553_COMMAND_BYTE_REG_OUTPUT_PORT_0, data->frontLedStatus); + + /* FAN Status */ + value = i2c_smbus_read_word_data(&(pca9535pwr_client_bus1[0]), PCA9553_COMMAND_BYTE_REG_INPUT_PORT_0); + data->fanAbs[0] = (value&0x4444); + data->fanDir[0] = (value&0x8888); + FanDir = data->fanDir[0]; + + step = 0; + break; + + default: + step = 0; + break; + } + i2c_smbus_write_byte_data(&cpld_client, CPLD_REG_RESET_0x33, 0x00); + i2c_smbus_write_byte_data(&cpld_client, CPLD_REG_RESET_0x33, 0xff); + break; + + case NCIIX_WITH_BMC: + case NCIIX_WITHOUT_BMC: + switch (step) + { + case 0: + /* Turn on PCA9548#1 channel 0 on I2C-bus1 */ + ret = i2c_smbus_write_byte_data(client, 0, (1<frontLedStatus |= 0x00ff; + if (fanErr==0) + data->frontLedStatus &= (~0x0008); /* FAN_LED_G# */ + else + data->frontLedStatus &= (~0x0004); /* FAN_LED_Y# */ + + if ((platformPsuABS&0x01)==0x00) /* PSU1 Present */ + { + if (platformPsuPG&0x08) /* PSU1_PG_LDC Power Goodasserted */ + data->frontLedStatus &= (~0x0002); /* PSU1_LED_G# */ + else + data->frontLedStatus &= (~0x0001); /* PSU1_LED_Y# */ + } + if ((platformPsuABS&0x02)==0x00) /* PSU2 Present */ + { + if (platformPsuPG&0x10) /* PSU2_PG_LDC Power Goodasserted */ + data->frontLedStatus &= (~0x0020); /* PSU2_LED_G# */ + else + data->frontLedStatus &= (~0x0010); /* PSU2_LED_Y# */ + } + + switch (data->systemLedStatus) + { + default: + case 0: /* Booting */ + break; + + case 1: /* Critical*/ + data->frontLedStatus &= (~0x0040); /* SYS_LED_Y# */ + break; + + case 2: /* Normal */ + data->frontLedStatus &= (~0x0080); /* SYS_LED_G# */ + break; + } + + i2c_device_word_write(&(pca9535pwr_client_bus1[2]), PCA9553_COMMAND_BYTE_REG_OUTPUT_PORT_0, data->frontLedStatus); + + i2c_smbus_write_byte_data(client, 0, 0x00); + step = 2; + break; + + case 2: + /* Turn on PCA9548#1 channel 3 on I2C-bus1 */ + ret = i2c_smbus_write_byte_data(client, 0, (1<fanAbs[0] = (value&0x4444); + data->fanDir[0] = (value&0x8888); + FanDir = data->fanDir[0]; + + i2c_smbus_write_byte_data(client, 0, 0x00); + step = 4; + break; + + case 4: + for (i=0; i<54; i++) + { + if (SFPPortAbsStatus[i]) /*present*/ + { + i2c_smbus_write_byte_data(&(pca9548_client[1]), 0, sfpPortData_78F[i].portMaskBitForPCA9548_1); + i2c_smbus_write_byte_data(&(pca9548_client[0]), 0, sfpPortData_78F[i].portMaskBitForPCA9548_2TO5); + if ((SFPPortDataValid[i] == 0)||(i>=48)) + { + ret = qsfpDataRead(&qsfpDataA0_client,qsfpPortData); + if (ret>=0) + { + memcpy(&(data->qsfpPortDataA0[i][0]), qsfpPortData, QSFP_DATA_SIZE); + SFPPortDataValid[i] = 1; + } + } + if (i<48) + { + ret = qsfpDataRead(&qsfpDataA2_client,qsfpPortData); + if (ret>=0) + memcpy(&(data->qsfpPortDataA2[i][0]), qsfpPortData, QSFP_DATA_SIZE); + } + i2c_smbus_write_byte_data(&(pca9548_client[0]), 0, 0x00); + i2c_smbus_write_byte_data(&(pca9548_client[1]), 0, 0x00); + } + else + { + memset(&(data->qsfpPortDataA0[i][0]), 0, QSFP_DATA_SIZE); + memset(&(data->qsfpPortDataA2[i][0]), 0, QSFP_DATA_SIZE); + SFPPortDataValid[i] = 0; + } + } + step = 0; + break; + + default: + step = 0; + break; + } + break; + + case ASTERION_WITH_BMC: + case ASTERION_WITHOUT_BMC: + break; + + default: + break; + } + mutex_unlock(&data->lock); + + if (kthread_should_stop()) + break; + msleep_interruptible(200); + } /* End of while (!kthread_should_stop()) */ + + complete_all(&data->auto_update_stop); + return 0; +} + +static ssize_t show_chip_info(struct device *dev, struct device_attribute *devattr, char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct i2c_bus0_hardware_monitor_data *data = i2c_get_clientdata(client); + return sprintf(buf, "Vender ID = 0x%04X, Chip ID = 0x%04X, Device ID = 0x%04X\n", data->venderId, data->chipId, data->dviceId); +} + +static ssize_t show_board_build_revision(struct device *dev, struct device_attribute *devattr, char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct i2c_bus0_hardware_monitor_data *data = i2c_get_clientdata(client); + return sprintf(buf, "%d\n", data->buildRev); +} + +static ssize_t show_board_hardware_revision(struct device *dev, struct device_attribute *devattr, char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct i2c_bus0_hardware_monitor_data *data = i2c_get_clientdata(client); + return sprintf(buf, "%d\n", data->hwRev); +} + +static ssize_t show_board_model_id(struct device *dev, struct device_attribute *devattr, char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct i2c_bus0_hardware_monitor_data *data = i2c_get_clientdata(client); + return sprintf(buf, "%d\n", data->modelId); +} + +static ssize_t show_cpld_info(struct device *dev, struct device_attribute *devattr, char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct i2c_bus0_hardware_monitor_data *data = i2c_get_clientdata(client); + return sprintf(buf, "CPLD code Revision = 0x%02X, Release Bit = 0x%02X\n", data->cpldRev, data->cpldRel); +} + +static ssize_t show_psu_pg_sen(struct device *dev, struct device_attribute *devattr, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct i2c_client *client = to_i2c_client(dev); + struct i2c_bus0_hardware_monitor_data *data = i2c_get_clientdata(client); + unsigned int value; + + mutex_lock(&data->lock); + value = data->psuPG; + mutex_unlock(&data->lock); + + if (attr->index == 0) + value &= 0x08; + else + value &= 0x10; + return sprintf(buf, "%d\n", value?1:0); +} + +static ssize_t show_psu_abs_sen(struct device *dev, struct device_attribute *devattr, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct i2c_client *client = to_i2c_client(dev); + struct i2c_bus0_hardware_monitor_data *data = i2c_get_clientdata(client); + unsigned int value; + + mutex_lock(&data->lock); + value = data->psuABS; + mutex_unlock(&data->lock); + + if (attr->index == 0) + value &= 0x01; + else + value &= 0x02; + return sprintf(buf, "%d\n", value?0:1); +} + +static ssize_t show_fan_rpm(struct device *dev, struct device_attribute *devattr, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct i2c_client *client = to_i2c_client(dev); + struct i2c_bus0_hardware_monitor_data *data = i2c_get_clientdata(client); + unsigned int fanSpeed = 0; + + if (attr->index < W83795ADG_FAN_COUNT) + fanSpeed = data->fanSpeed[attr->index]; + return sprintf(buf, "%d\n", fanSpeed); +} + +static ssize_t show_fan_duty(struct device *dev, struct device_attribute *devattr, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct i2c_client *client = to_i2c_client(dev); + struct i2c_bus0_hardware_monitor_data *data = i2c_get_clientdata(client); + unsigned int fanDuty = 0; + + if (attr->index < W83795ADG_FAN_COUNT) + fanDuty = ((data->fanDuty*100)/0xff); + return sprintf(buf, "%d\n", fanDuty); +} + +static ssize_t show_remote_temp(struct device *dev, struct device_attribute *devattr, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct i2c_client *client = to_i2c_client(dev); + struct i2c_bus0_hardware_monitor_data *data = i2c_get_clientdata(client); + + if (data->remoteTempIsPositive[attr->index]==1) + return sprintf(buf, "%d.%d\n", data->remoteTempInt[attr->index], data->remoteTempDecimal[attr->index]); + else + return sprintf(buf, "-%d.%d\n", data->remoteTempInt[attr->index], data->remoteTempDecimal[attr->index]); +} + +static ssize_t show_mac_temp(struct device *dev, struct device_attribute *devattr, char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct i2c_bus0_hardware_monitor_data *data = i2c_get_clientdata(client); + + return sprintf(buf, "%d\n", data->macTemp); +} + +static ssize_t set_mac_temp(struct device *dev, struct device_attribute *devattr, const char *buf, + size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + struct i2c_bus0_hardware_monitor_data *data = i2c_get_clientdata(client); + long temp; + + if (kstrtol(buf, 10, &temp)) + return -EINVAL; + + temp = clamp_val(temp, 0, 120); + + mutex_lock(&data->lock); + data->macTemp = temp; + mutex_unlock(&data->lock); + + return count; +} + +static ssize_t show_wd_refresh(struct device *dev, struct device_attribute *devattr, char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct i2c_bus0_hardware_monitor_data *data = i2c_get_clientdata(client); + + return sprintf(buf, "%d\n", data->wdRefreshControlFlag); +} + +static ssize_t set_wd_refresh(struct device *dev, struct device_attribute *devattr, const char *buf, + size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + struct i2c_bus0_hardware_monitor_data *data = i2c_get_clientdata(client); + long temp; + + if (kstrtol(buf, 10, &temp)) + return -EINVAL; + + temp = clamp_val(temp, 0, 1); + + mutex_lock(&data->lock); + data->wdRefreshControlFlag = temp; + mutex_unlock(&data->lock); + + return count; +} + +static ssize_t show_wd_refresh_control(struct device *dev, struct device_attribute *devattr, char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct i2c_bus0_hardware_monitor_data *data = i2c_get_clientdata(client); + + return sprintf(buf, "%d\n", data->wdRefreshControl); +} + +static ssize_t set_wd_refresh_control(struct device *dev, struct device_attribute *devattr, const char *buf, + size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + struct i2c_bus0_hardware_monitor_data *data = i2c_get_clientdata(client); + long temp; + + if (kstrtol(buf, 10, &temp)) + return -EINVAL; + + temp = clamp_val(temp, 0, 1); + + mutex_lock(&data->lock); + data->wdRefreshControl = temp; + mutex_unlock(&data->lock); + + return count; +} + +static ssize_t show_wd_refresh_time(struct device *dev, struct device_attribute *devattr, char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct i2c_bus0_hardware_monitor_data *data = i2c_get_clientdata(client); + + return sprintf(buf, "%d\n", data->wdRefreshTimeSelect); +} + +static ssize_t set_wd_refresh_time(struct device *dev, struct device_attribute *devattr, const char *buf, + size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + struct i2c_bus0_hardware_monitor_data *data = i2c_get_clientdata(client); + long temp; + + if (kstrtol(buf, 10, &temp)) + return -EINVAL; + + temp = clamp_val(temp, 0, 10); + + mutex_lock(&data->lock); + data->wdRefreshTimeSelect = temp; + data->wdRefreshTimeSelectFlag = 1; + mutex_unlock(&data->lock); + + return count; +} + +static ssize_t show_wd_timeout_occurrence(struct device *dev, struct device_attribute *devattr, char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct i2c_bus0_hardware_monitor_data *data = i2c_get_clientdata(client); + + return sprintf(buf, "%d\n", data->wdTimeoutSelect); +} + +static ssize_t set_wd_timeout_occurrence(struct device *dev, struct device_attribute *devattr, const char *buf, + size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + struct i2c_bus0_hardware_monitor_data *data = i2c_get_clientdata(client); + long temp; + + if (kstrtol(buf, 10, &temp)) + return -EINVAL; + + temp = clamp_val(temp, 0, 1); + + mutex_lock(&data->lock); + data->wdTimeoutSelect = temp; + data->wdTimeoutSelectFlag = 1; + mutex_unlock(&data->lock); + + return count; +} + +static ssize_t show_rov(struct device *dev, struct device_attribute *devattr, char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct i2c_bus0_hardware_monitor_data *data = i2c_get_clientdata(client); + + return sprintf(buf, "%d\n", data->rov); +} + +static ssize_t set_rov(struct device *dev, struct device_attribute *devattr, const char *buf, + size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + struct i2c_bus0_hardware_monitor_data *data = i2c_get_clientdata(client); + long rov; + + if (kstrtol(buf, 10, &rov)) + return -EINVAL; + + rov = clamp_val(rov, 0, 16); + + mutex_lock(&data->lock); + switch (data->modelId) + { + case HURACAN_WITH_BMC: + case HURACAN_WITHOUT_BMC: + case ASTERION_WITH_BMC: + case ASTERION_WITHOUT_BMC: + case HURACAN_A_WITH_BMC: + case HURACAN_A_WITHOUT_BMC: + { + /* + - 4'b0000 = 1.2000V -> 0x47 + - 4'b0001 = 1.1750V -> 0x44 + - 4'b0010 = 1.1500V -> 0x42 + - 4'b0011 = 1.1250V -> 0x3f + - 4'b0100 = 1.1000V -> 0x3c + - 4'b0101 = 1.0750V -> 0x39 + - 4'b0110 = 1.0500V -> 0x37 + - 4'b0111 = 1.0250V -> 0x35 + - 4'b1000 = 1.0000V -> 0x33 + - 4'b1001 = 0.9750V -> 0x30 + - 4'b1010 = 0.9500V -> 0x2d + - 4'b1011 = 0.9250V -> 0x2b + - 4'b1100 = 0.9000V -> 0x28 + - 4'b1101 = 0.8750V -> 0x26 + - 4'b1110 = 0.8500V -> 0x23 + - 4'b1111 = 0.8250V -> 0x21 + */ + const unsigned short ROVtranslate[]= {0x47,0x44,0x42,0x3f,0x3c,0x39,0x37,0x35,0x33,0x30,0x2d,0x2b,0x28,0x26,0x23,0x21}; + + rov &= 0xf; + /* In "56960-DS111-RDS.pdf" page 58, the voltage range of BCM56960 for power supply is 0.95V to 1.025V. */ + if (rov<7) rov = 7; + + /* set rov to VOUT_COMMAND register */ + i2c_smbus_write_word_data(&mp2953agu_client, 0x21, ROVtranslate[rov]); + } + break; + + case SESTO_WITH_BMC: + case SESTO_WITHOUT_BMC: + { + /* + - 4'b0000 = 1.2000V -> 0x47 + - 4'b0001 = 1.1750V -> 0x44 + - 4'b0010 = 1.1500V -> 0x42 + - 4'b0011 = 1.1250V -> 0x3e + - 4'b0100 = 1.1000V -> 0x3c + - 4'b0101 = 1.0750V -> 0x39 + - 4'b0110 = 1.0500V -> 0x37 + - 4'b0111 = 1.0250V -> 0x34 + - 4'b1000 = 1.0000V -> 0x32 + - 4'b1001 = 0.9750V -> 0x2f + - 4'b1010 = 0.9500V -> 0x2d + - 4'b1011 = 0.9250V -> 0x2b + - 4'b1100 = 0.9000V -> 0x28 + - 4'b1101 = 0.8750V -> 0x26 + - 4'b1110 = 0.8500V -> 0x23 + - 4'b1111 = 0.8250V -> 0x21 + */ + const unsigned short ROVtranslate[]= {0x47,0x44,0x42,0x3e,0x3c,0x39,0x37,0x34,0x32,0x2f,0x2d,0x2b,0x28,0x26,0x23,0x21}; + + rov &= 0xf; + /* In "56960-DS111-RDS.pdf" page 58, the voltage range of BCM56960 for power supply is 0.95V to 1.025V. */ + if (rov<7) rov = 7; + + /* set rov to VOUT_COMMAND register */ + i2c_smbus_write_word_data(&mp2953agu_client, 0x21, ROVtranslate[rov]); + } + break; + + case NCIIX_WITH_BMC: + case NCIIX_WITHOUT_BMC: + { + /* + - 3'b000 = 1.025V -> 0x9C + - 3'b001 = 1.025V -> 0x9C + - 3'b010 = 0.95V -> 0x8D + - 3'b011 = RESV + - 3'b100 = RESV + - 3'b101 = RESV + - 3'b110 = RESV + - 3'b111 = RESV + */ + char getValue = 0; + char loop1_flag = 0; + const char ROVtranslate[]= {CHL8325_VID_DEFAULT,CHL8325_VID0,CHL8325_VID1}; + + rov &= 0xf; + /* In "56750_56850-PR103-RDS.pdf" page 926, 3b011 ~ 3'b111 are reserved. */ + if (rov>2) rov = 0; + + /* Turn on PCA9548#0 channel 0 on I2C-bus0 */ + i2c_smbus_write_byte_data(&pca9548_client_bus0, 0, 0x01); + + /* Step 1. Disable LOOP1_VID */ + /* Get D0 register value */ + getValue = i2c_smbus_read_byte_data(&chl8325a_client, LOOP1_VID_OVERRIDE_ENABLE_REG); + /* Disable CHL8325A PWM controller Loop1 */ + loop1_flag = getValue & (~CHL8325_LOOP1_Enable); + i2c_smbus_write_byte_data(&chl8325a_client, LOOP1_VID_OVERRIDE_ENABLE_REG, loop1_flag); + + /* Step 2. Config CHL8325A PWM controller */ + i2c_smbus_write_byte_data(&chl8325a_client, LOOP1_OVERRIDE_VID_SETTING_REG, ROVtranslate[rov]); + + /* Step 3. Get D0 register value */ + getValue = i2c_smbus_read_byte_data(&chl8325a_client, LOOP1_VID_OVERRIDE_ENABLE_REG); + + /* Step 4. Config CHL8325A PWM controller Loop1 */ + loop1_flag = getValue | CHL8325_LOOP1_Enable; + i2c_smbus_write_byte_data(&chl8325a_client, LOOP1_VID_OVERRIDE_ENABLE_REG, loop1_flag); + + i2c_smbus_write_byte(&pca9548_client_bus0, 0x00); + } + break; + + default: + break; + } + data->rov = rov; + mutex_unlock(&data->lock); + + return count; +} + +static ssize_t show_voltage_sen(struct device *dev, struct device_attribute *devattr, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct i2c_client *client = to_i2c_client(dev); + struct i2c_bus0_hardware_monitor_data *data = i2c_get_clientdata(client); + unsigned int MNTVSEN, MNTV; + unsigned int voltage; + + mutex_lock(&data->lock); + MNTVSEN = data->vSen[attr->index]; + MNTV = data->vSenLsb[attr->index]; + mutex_unlock(&data->lock); + + voltage = ((MNTVSEN << 2) + ((MNTV & 0xC0) >> 6)); + voltage *= ((2*VOL_MONITOR_UNIT)/VOL_MONITOR_UNIT); + + return sprintf(buf, "%d.%03d\n", (voltage/VOL_MONITOR_UNIT), (voltage%VOL_MONITOR_UNIT)); +} + +static DEVICE_ATTR(mac_temp, S_IWUSR | S_IRUGO, show_mac_temp, set_mac_temp); +static DEVICE_ATTR(chip_info, S_IRUGO, show_chip_info, NULL); +static DEVICE_ATTR(board_build_rev, S_IRUGO, show_board_build_revision, NULL); +static DEVICE_ATTR(board_hardware_rev, S_IRUGO, show_board_hardware_revision, NULL); +static DEVICE_ATTR(board_model_id, S_IRUGO, show_board_model_id, NULL); +static DEVICE_ATTR(cpld_info, S_IRUGO, show_cpld_info, NULL); +static DEVICE_ATTR(wd_refresh, S_IWUSR | S_IRUGO, show_wd_refresh, set_wd_refresh); +static DEVICE_ATTR(wd_refresh_control, S_IWUSR | S_IRUGO, show_wd_refresh_control, set_wd_refresh_control); +static DEVICE_ATTR(wd_refresh_time, S_IWUSR | S_IRUGO, show_wd_refresh_time, set_wd_refresh_time); +static DEVICE_ATTR(wd_timeout_occurrence, S_IWUSR | S_IRUGO, show_wd_timeout_occurrence, set_wd_timeout_occurrence); +static DEVICE_ATTR(rov, S_IWUSR | S_IRUGO, show_rov, set_rov); + +static SENSOR_DEVICE_ATTR(psu1_pg, S_IRUGO, show_psu_pg_sen, NULL, 0); +static SENSOR_DEVICE_ATTR(psu2_pg, S_IRUGO, show_psu_pg_sen, NULL, 1); +static SENSOR_DEVICE_ATTR(psu1_abs, S_IRUGO, show_psu_abs_sen, NULL, 0); +static SENSOR_DEVICE_ATTR(psu2_abs, S_IRUGO, show_psu_abs_sen, NULL, 1); + +static SENSOR_DEVICE_ATTR(fan1_rpm, S_IRUGO, show_fan_rpm, NULL, 0); +static SENSOR_DEVICE_ATTR(fan2_rpm, S_IRUGO, show_fan_rpm, NULL, 1); +static SENSOR_DEVICE_ATTR(fan3_rpm, S_IRUGO, show_fan_rpm, NULL, 2); +static SENSOR_DEVICE_ATTR(fan4_rpm, S_IRUGO, show_fan_rpm, NULL, 3); +static SENSOR_DEVICE_ATTR(fan5_rpm, S_IRUGO, show_fan_rpm, NULL, 4); +static SENSOR_DEVICE_ATTR(fan6_rpm, S_IRUGO, show_fan_rpm, NULL, 5); +static SENSOR_DEVICE_ATTR(fan7_rpm, S_IRUGO, show_fan_rpm, NULL, 6); +static SENSOR_DEVICE_ATTR(fan8_rpm, S_IRUGO, show_fan_rpm, NULL, 7); +static SENSOR_DEVICE_ATTR(fan9_rpm, S_IRUGO, show_fan_rpm, NULL, 8); +static SENSOR_DEVICE_ATTR(fan10_rpm, S_IRUGO, show_fan_rpm, NULL, 9); + +static SENSOR_DEVICE_ATTR(fan1_duty, S_IRUGO, show_fan_duty, NULL, 0); +static SENSOR_DEVICE_ATTR(fan2_duty, S_IRUGO, show_fan_duty, NULL, 1); +static SENSOR_DEVICE_ATTR(fan3_duty, S_IRUGO, show_fan_duty, NULL, 2); +static SENSOR_DEVICE_ATTR(fan4_duty, S_IRUGO, show_fan_duty, NULL, 3); +static SENSOR_DEVICE_ATTR(fan5_duty, S_IRUGO, show_fan_duty, NULL, 4); +static SENSOR_DEVICE_ATTR(fan6_duty, S_IRUGO, show_fan_duty, NULL, 5); +static SENSOR_DEVICE_ATTR(fan7_duty, S_IRUGO, show_fan_duty, NULL, 6); +static SENSOR_DEVICE_ATTR(fan8_duty, S_IRUGO, show_fan_duty, NULL, 7); +static SENSOR_DEVICE_ATTR(fan9_duty, S_IRUGO, show_fan_duty, NULL, 8); +static SENSOR_DEVICE_ATTR(fan10_duty, S_IRUGO, show_fan_duty, NULL, 9); + +static SENSOR_DEVICE_ATTR(remote_temp1, S_IRUGO, show_remote_temp, NULL, 0); +static SENSOR_DEVICE_ATTR(remote_temp2, S_IRUGO, show_remote_temp, NULL, 1); + +static SENSOR_DEVICE_ATTR(vsen1, S_IRUGO, show_voltage_sen, NULL, 0); +static SENSOR_DEVICE_ATTR(vsen2, S_IRUGO, show_voltage_sen, NULL, 1); +static SENSOR_DEVICE_ATTR(vsen3, S_IRUGO, show_voltage_sen, NULL, 2); +static SENSOR_DEVICE_ATTR(vsen4, S_IRUGO, show_voltage_sen, NULL, 3); +static SENSOR_DEVICE_ATTR(vsen5, S_IRUGO, show_voltage_sen, NULL, 4); +static SENSOR_DEVICE_ATTR(vsen7, S_IRUGO, show_voltage_sen, NULL, 6); + + static struct attribute *i2c_bus0_hardware_monitor_attr[] = { + &dev_attr_mac_temp.attr, + &dev_attr_chip_info.attr, + &dev_attr_board_build_rev.attr, + &dev_attr_board_hardware_rev.attr, + &dev_attr_board_model_id.attr, + &dev_attr_cpld_info.attr, + &dev_attr_wd_refresh.attr, + &dev_attr_wd_refresh_control.attr, + &dev_attr_wd_refresh_time.attr, + &dev_attr_wd_timeout_occurrence.attr, + &dev_attr_rov.attr, + + &sensor_dev_attr_psu1_pg.dev_attr.attr, + &sensor_dev_attr_psu2_pg.dev_attr.attr, + &sensor_dev_attr_psu1_abs.dev_attr.attr, + &sensor_dev_attr_psu2_abs.dev_attr.attr, + + &sensor_dev_attr_fan1_rpm.dev_attr.attr, + &sensor_dev_attr_fan2_rpm.dev_attr.attr, + &sensor_dev_attr_fan3_rpm.dev_attr.attr, + &sensor_dev_attr_fan4_rpm.dev_attr.attr, + &sensor_dev_attr_fan5_rpm.dev_attr.attr, + &sensor_dev_attr_fan6_rpm.dev_attr.attr, + &sensor_dev_attr_fan7_rpm.dev_attr.attr, + &sensor_dev_attr_fan8_rpm.dev_attr.attr, + + &sensor_dev_attr_fan1_duty.dev_attr.attr, + &sensor_dev_attr_fan2_duty.dev_attr.attr, + &sensor_dev_attr_fan3_duty.dev_attr.attr, + &sensor_dev_attr_fan4_duty.dev_attr.attr, + &sensor_dev_attr_fan5_duty.dev_attr.attr, + &sensor_dev_attr_fan6_duty.dev_attr.attr, + &sensor_dev_attr_fan7_duty.dev_attr.attr, + &sensor_dev_attr_fan8_duty.dev_attr.attr, + + &sensor_dev_attr_remote_temp1.dev_attr.attr, + &sensor_dev_attr_remote_temp2.dev_attr.attr, + + &sensor_dev_attr_vsen1.dev_attr.attr, + &sensor_dev_attr_vsen2.dev_attr.attr, + &sensor_dev_attr_vsen3.dev_attr.attr, + &sensor_dev_attr_vsen4.dev_attr.attr, + + NULL +}; + + static struct attribute *i2c_bus0_hardware_monitor_attr_asterion[] = { + &dev_attr_mac_temp.attr, + &dev_attr_chip_info.attr, + &dev_attr_board_build_rev.attr, + &dev_attr_board_hardware_rev.attr, + &dev_attr_board_model_id.attr, + &dev_attr_cpld_info.attr, + &dev_attr_wd_refresh.attr, + &dev_attr_wd_refresh_control.attr, + &dev_attr_wd_refresh_time.attr, + &dev_attr_wd_timeout_occurrence.attr, + &dev_attr_rov.attr, + + &sensor_dev_attr_psu1_pg.dev_attr.attr, + &sensor_dev_attr_psu2_pg.dev_attr.attr, + &sensor_dev_attr_psu1_abs.dev_attr.attr, + &sensor_dev_attr_psu2_abs.dev_attr.attr, + + &sensor_dev_attr_fan1_rpm.dev_attr.attr, + &sensor_dev_attr_fan2_rpm.dev_attr.attr, + &sensor_dev_attr_fan3_rpm.dev_attr.attr, + &sensor_dev_attr_fan4_rpm.dev_attr.attr, + &sensor_dev_attr_fan5_rpm.dev_attr.attr, + &sensor_dev_attr_fan6_rpm.dev_attr.attr, + &sensor_dev_attr_fan7_rpm.dev_attr.attr, + &sensor_dev_attr_fan8_rpm.dev_attr.attr, + &sensor_dev_attr_fan9_rpm.dev_attr.attr, + &sensor_dev_attr_fan10_rpm.dev_attr.attr, + + &sensor_dev_attr_fan1_duty.dev_attr.attr, + &sensor_dev_attr_fan2_duty.dev_attr.attr, + &sensor_dev_attr_fan3_duty.dev_attr.attr, + &sensor_dev_attr_fan4_duty.dev_attr.attr, + &sensor_dev_attr_fan5_duty.dev_attr.attr, + &sensor_dev_attr_fan6_duty.dev_attr.attr, + &sensor_dev_attr_fan7_duty.dev_attr.attr, + &sensor_dev_attr_fan8_duty.dev_attr.attr, + &sensor_dev_attr_fan9_duty.dev_attr.attr, + &sensor_dev_attr_fan10_duty.dev_attr.attr, + + &sensor_dev_attr_remote_temp1.dev_attr.attr, + &sensor_dev_attr_remote_temp2.dev_attr.attr, + + &sensor_dev_attr_vsen1.dev_attr.attr, + &sensor_dev_attr_vsen2.dev_attr.attr, + &sensor_dev_attr_vsen3.dev_attr.attr, + &sensor_dev_attr_vsen4.dev_attr.attr, + + NULL +}; + + static struct attribute *i2c_bus0_hardware_monitor_attr_nc2x[] = { + &dev_attr_mac_temp.attr, + &dev_attr_chip_info.attr, + &dev_attr_board_build_rev.attr, + &dev_attr_board_hardware_rev.attr, + &dev_attr_board_model_id.attr, + &dev_attr_cpld_info.attr, + &dev_attr_wd_refresh.attr, + &dev_attr_wd_refresh_control.attr, + &dev_attr_wd_refresh_time.attr, + &dev_attr_wd_timeout_occurrence.attr, + &dev_attr_rov.attr, + + &sensor_dev_attr_psu1_pg.dev_attr.attr, + &sensor_dev_attr_psu2_pg.dev_attr.attr, + &sensor_dev_attr_psu1_abs.dev_attr.attr, + &sensor_dev_attr_psu2_abs.dev_attr.attr, + + &sensor_dev_attr_fan1_rpm.dev_attr.attr, + &sensor_dev_attr_fan2_rpm.dev_attr.attr, + &sensor_dev_attr_fan3_rpm.dev_attr.attr, + &sensor_dev_attr_fan4_rpm.dev_attr.attr, + &sensor_dev_attr_fan5_rpm.dev_attr.attr, + &sensor_dev_attr_fan6_rpm.dev_attr.attr, + &sensor_dev_attr_fan7_rpm.dev_attr.attr, + &sensor_dev_attr_fan8_rpm.dev_attr.attr, + + &sensor_dev_attr_fan1_duty.dev_attr.attr, + &sensor_dev_attr_fan2_duty.dev_attr.attr, + &sensor_dev_attr_fan3_duty.dev_attr.attr, + &sensor_dev_attr_fan4_duty.dev_attr.attr, + &sensor_dev_attr_fan5_duty.dev_attr.attr, + &sensor_dev_attr_fan6_duty.dev_attr.attr, + &sensor_dev_attr_fan7_duty.dev_attr.attr, + &sensor_dev_attr_fan8_duty.dev_attr.attr, + + &sensor_dev_attr_remote_temp1.dev_attr.attr, + &sensor_dev_attr_remote_temp2.dev_attr.attr, + + &sensor_dev_attr_vsen1.dev_attr.attr, + &sensor_dev_attr_vsen4.dev_attr.attr, + &sensor_dev_attr_vsen5.dev_attr.attr, + &sensor_dev_attr_vsen7.dev_attr.attr, + + NULL +}; + +static ssize_t show_port_abs(struct device *dev, struct device_attribute *devattr, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct i2c_bus1_hardware_monitor_data *data = i2c_get_clientdata(&(pca9535pwr_client_bus1[0])); + int rc = 0; + + switch(platformModelId) + { + case NCIIX_WITH_BMC: + case NCIIX_WITHOUT_BMC: + rc = ((SFPPortAbsStatus[attr->index]==1)&&(SFPPortDataValid[attr->index]==1)); + break; + + default: + { + unsigned short qsfpPortAbs=0, index=0, bit=0; + unsigned short qsfpPortDataValid=0; + + index = (attr->index/16); + bit = (attr->index%16); + mutex_lock(&data->lock); + qsfpPortAbs = data->qsfpPortAbsStatus[index]; + qsfpPortDataValid = data->qsfpPortDataValid[index]; + mutex_unlock(&data->lock); + rc = ((PCA9553_TEST_BIT(qsfpPortAbs, bit)?0:1)&&(PCA9553_TEST_BIT(qsfpPortDataValid, bit))); + } + break; + } + + return sprintf(buf, "%d\n", rc); +} + +static ssize_t show_port_rxlos(struct device *dev, struct device_attribute *devattr, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct i2c_bus1_hardware_monitor_data *data = i2c_get_clientdata(&(pca9535pwr_client_bus1[0])); + int rc = 0; + + switch(platformModelId) + { + case NCIIX_WITH_BMC: + case NCIIX_WITHOUT_BMC: + rc = (SFPPortRxLosStatus[attr->index]?0:1); + break; + + case SESTO_WITH_BMC: + case SESTO_WITHOUT_BMC: + { + unsigned short qsfpPortRxLos=0, index=0, bit=0; + + index = (attr->index/16); + bit = (attr->index%16); + mutex_lock(&data->lock); + qsfpPortRxLos = data->sfpPortRxLosStatus[index]; + mutex_unlock(&data->lock); + rc = (PCA9553_TEST_BIT(qsfpPortRxLos, bit)?1:0); + } + break; + + default: + break; + } + + return sprintf(buf, "%d\n", rc); +} + +static ssize_t show_port_data_a0(struct device *dev, struct device_attribute *devattr, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct i2c_client *client = to_i2c_client(dev); + struct i2c_bus1_hardware_monitor_data *data = i2c_get_clientdata(client); + unsigned char qsfpPortData[QSFP_DATA_SIZE]; + ssize_t count = 0; + + memset(qsfpPortData, 0, QSFP_DATA_SIZE); + mutex_lock(&data->lock); + memcpy(qsfpPortData, &(data->qsfpPortDataA0[attr->index][0]), QSFP_DATA_SIZE); + mutex_unlock(&data->lock); +#if 0 +{ + unsigned int index; + char str[8]; + + count = 0; + for (index=0; indexlock); + memcpy(qsfpPortData, &(data->qsfpPortDataA2[attr->index][0]), QSFP_DATA_SIZE); + mutex_unlock(&data->lock); +#if 0 +{ + unsigned int index; + char str[8]; + + count = 0; + for (index=0; indexindex<4) + { + mutex_lock(&data->lock); + value = (unsigned int)data->fanAbs[0]; + mutex_unlock(&data->lock); + index = attr->index; + } + else + { + mutex_lock(&data->lock); + value = (unsigned int)data->fanAbs[1]; + mutex_unlock(&data->lock); + index = (attr->index-3); + } + value &= (0x0004<<(index*4)); + return sprintf(buf, "%d\n", value?0:1); +} + +static ssize_t show_fan_dir(struct device *dev, struct device_attribute *devattr, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct i2c_client *client = to_i2c_client(dev); + struct i2c_bus1_hardware_monitor_data *data = i2c_get_clientdata(client); + unsigned int value = 0; + unsigned int index = 0; + + if (attr->index<4) + { + mutex_lock(&data->lock); + value = (unsigned int)data->fanDir[0]; + mutex_unlock(&data->lock); + index = attr->index; + } + else + { + mutex_lock(&data->lock); + value = (unsigned int)data->fanDir[1]; + mutex_unlock(&data->lock); + index = (attr->index-3); + } + value &= (0x0004<<(index*4)); + return sprintf(buf, "%d\n", value?0:1); +} + +static ssize_t show_eeprom(struct device *dev, struct device_attribute *devattr, char *buf) +{ + unsigned char eepromData[EEPROM_DATA_SIZE]; + ssize_t count = 0; + unsigned int index; + char str[8]; + int ret = 0; + + memset(eepromData, 0, EEPROM_DATA_SIZE); + switch(platformModelId) + { + case HURACAN_WITH_BMC: + case HURACAN_WITHOUT_BMC: + case HURACAN_A_WITH_BMC: + case HURACAN_A_WITHOUT_BMC: + { + struct i2c_client *client = to_i2c_client(dev); + struct i2c_bus1_hardware_monitor_data *data = i2c_get_clientdata(client); + + mutex_lock(&data->lock); + /* Turn on PCA9548 channel 7 on I2C-bus1 */ + i2c_smbus_write_byte(client, 0x80); + i2c_smbus_write_byte_data(&eeprom_client, 0x00, 0x00); + ret = eepromDataRead(&eeprom_client, &(eepromData[0])); + i2c_smbus_write_byte(client, 0x00); + mutex_unlock(&data->lock); + } + break; + + case CABRERAIII_WITH_BMC: + case CABRERAIII_WITHOUT_BMC: + break; + + case SESTO_WITH_BMC: + case SESTO_WITHOUT_BMC: + { + struct i2c_client *client = to_i2c_client(dev); + struct i2c_bus1_hardware_monitor_data *data = i2c_get_clientdata(client); + + mutex_lock(&data->lock); + /* Turn on PCA9548#1 channel 7 on I2C-bus1 */ + i2c_smbus_write_byte(&(pca9548_client[1]), 0x80); + i2c_smbus_write_byte_data(&eeprom_client, 0x00, 0x00); + ret = eepromDataRead(&eeprom_client, &(eepromData[0])); + i2c_smbus_write_byte(&(pca9548_client[1]), 0x00); + mutex_unlock(&data->lock); + } + break; + + case NCIIX_WITH_BMC: + case NCIIX_WITHOUT_BMC: + { + if ((platformBuildRev == 0x01)&&(platformHwRev == 0x03)) /* PVT */ + { + struct i2c_client *client = to_i2c_client(dev); + struct i2c_bus1_hardware_monitor_data *data = i2c_get_clientdata(client); + + mutex_lock(&data->lock); + /* Turn on PCA9548#1 channel 2 on I2C-bus1 */ + i2c_smbus_write_byte(client, 0x04); + i2c_smbus_write_byte_data(&eeprom_client_2, 0x00, 0x00); + ret = eepromDataRead(&eeprom_client_2, &(eepromData[0])); + i2c_smbus_write_byte(client, 0x00); + mutex_unlock(&data->lock); + } + else + { + struct i2c_bus0_hardware_monitor_data *data = i2c_get_clientdata(&eeprom_client_bus0); + + mutex_lock(&data->lock); + i2c_smbus_write_byte_data(&eeprom_client_bus0, 0x00, 0x00); + ret = eepromDataRead(&eeprom_client_bus0, &(eepromData[0])); + mutex_unlock(&data->lock); + } + } + break; + + case ASTERION_WITH_BMC: + case ASTERION_WITHOUT_BMC: + { + struct i2c_client *client = to_i2c_client(dev); + struct i2c_bus1_hardware_monitor_data *data = i2c_get_clientdata(client); + + mutex_lock(&data->lock); + /* Turn on PCA9548 channel 5 on I2C-bus1 */ + i2c_smbus_write_byte(client, 0x20); + i2c_smbus_write_byte_data(&eeprom_client, 0x00, 0x00); + ret = eepromDataRead(&eeprom_client, &(eepromData[0])); + i2c_smbus_write_byte(client, 0x00); + mutex_unlock(&data->lock); + } + break; + + default: + break; + } + if (ret < 0) + memset(eepromData, 0, EEPROM_DATA_SIZE); +#if 1 + count = 0; + for (index=0; indexindex&0x1); + if (index&0x01) /* PSU 2 */ + { + if ((platformPsuABS&0x02)==0x00) /* PSU2 Present */ + psu_present = 1; + } + else /* PSU 1 */ + { + if ((platformPsuABS&0x01)==0x00) /* PSU1 Present */ + psu_present = 1; + } + memset(eepromData, 0, EEPROM_DATA_SIZE); + if (psu_present == 1) + { + switch(platformModelId) + { + case HURACAN_WITH_BMC: + case HURACAN_WITHOUT_BMC: + case ASTERION_WITH_BMC: + case ASTERION_WITHOUT_BMC: + case HURACAN_A_WITH_BMC: + case HURACAN_A_WITHOUT_BMC: + { + mutex_lock(&data->lock); + if (index) + /* Turn on PCA9548 channel 7 on I2C-bus1 */ + i2c_smbus_write_byte(client, 0x80); + else + /* Turn on PCA9548 channel 6 on I2C-bus1 */ + i2c_smbus_write_byte(client, 0x40); + ret = qsfpDataRead(&psu_eeprom_client, &(eepromData[0])); + i2c_smbus_write_byte(client, 0x00); + mutex_unlock(&data->lock); + } + break; + + case CABRERAIII_WITH_BMC: + case CABRERAIII_WITHOUT_BMC: + break; + + case SESTO_WITH_BMC: + case SESTO_WITHOUT_BMC: + { + mutex_lock(&data->lock); + if (index) + /* Turn on PCA9548#1 channel 7 on I2C-bus1 */ + i2c_smbus_write_byte(&(pca9548_client[1]), 0x80); + else + /* Turn on PCA9548#1 channel 6 on I2C-bus1 */ + i2c_smbus_write_byte(&(pca9548_client[1]), 0x40); + ret = qsfpDataRead(&psu_eeprom_client, &(eepromData[0])); + i2c_smbus_write_byte(&(pca9548_client[1]), 0x00); + mutex_unlock(&data->lock); + } + break; + + case NCIIX_WITH_BMC: + case NCIIX_WITHOUT_BMC: + { + struct i2c_bus0_hardware_monitor_data *data_bus0 = i2c_get_clientdata(&psu_eeprom_client_bus0); + + mutex_lock(&data_bus0->lock); + if (index) + /* Turn on PCA9548#0 channel 2 on I2C-bus0 */ + i2c_smbus_write_byte(&pca9548_client_bus0, 0x04); + else + /* Turn on PCA9548#0 channel 1 on I2C-bus0 */ + i2c_smbus_write_byte(&pca9548_client_bus0, 0x02); + ret = qsfpDataRead(&psu_eeprom_client_bus0, &(eepromData[0])); + i2c_smbus_write_byte(&pca9548_client_bus0, 0x00); + mutex_unlock(&data_bus0->lock); + } + break; + + default: + break; + } + if (ret < 0) + memset(eepromData, 0, EEPROM_DATA_SIZE); + } +#if 1 + count = 0; + for (index=0; indexindex&0x1); + if (index&0x01) /* PSU 2 */ + { + if ((platformPsuABS&0x02)==0x00) /* PSU2 Present */ + psu_present = 1; + } + else /* PSU 1 */ + { + if ((platformPsuABS&0x01)==0x00) /* PSU1 Present */ + psu_present = 1; + } + if (psu_present == 1) + { + switch(platformModelId) + { + case HURACAN_WITH_BMC: + case HURACAN_WITHOUT_BMC: + case ASTERION_WITH_BMC: + case ASTERION_WITHOUT_BMC: + case HURACAN_A_WITH_BMC: + case HURACAN_A_WITHOUT_BMC: + { + mutex_lock(&data->lock); + if (index) + /* Turn on PCA9548 channel 7 on I2C-bus1 */ + i2c_smbus_write_byte(client, 0x80); + else + /* Turn on PCA9548 channel 6 on I2C-bus1 */ + i2c_smbus_write_byte(client, 0x40); + valueN = i2c_smbus_read_byte_data(&psu_mcu_client, 0x20); + valueV = (unsigned int)i2c_smbus_read_word_data(&psu_mcu_client, 0x8B); + i2c_smbus_write_byte(client, 0x00); + mutex_unlock(&data->lock); + } + break; + + case CABRERAIII_WITH_BMC: + case CABRERAIII_WITHOUT_BMC: + break; + + case SESTO_WITH_BMC: + case SESTO_WITHOUT_BMC: + { + mutex_lock(&data->lock); + if (index) + /* Turn on PCA9548#1 channel 7 on I2C-bus1 */ + i2c_smbus_write_byte(&(pca9548_client[1]), 0x80); + else + /* Turn on PCA9548#1 channel 6 on I2C-bus1 */ + i2c_smbus_write_byte(&(pca9548_client[1]), 0x40); + valueN = i2c_smbus_read_byte_data(&psu_mcu_client, 0x20); + valueV = (unsigned int)i2c_smbus_read_word_data(&psu_mcu_client, 0x8B); + i2c_smbus_write_byte(&(pca9548_client[1]), 0x00); + mutex_unlock(&data->lock); + } + break; + + case NCIIX_WITH_BMC: + case NCIIX_WITHOUT_BMC: + { + struct i2c_bus0_hardware_monitor_data *data_bus0 = i2c_get_clientdata(&psu_eeprom_client_bus0); + + mutex_lock(&data_bus0->lock); + if (index) + /* Turn on PCA9548#0 channel 2 on I2C-bus0 */ + i2c_smbus_write_byte(&pca9548_client_bus0, 0x04); + else + /* Turn on PCA9548#0 channel 1 on I2C-bus0 */ + i2c_smbus_write_byte(&pca9548_client_bus0, 0x02); + valueN = i2c_smbus_read_byte_data(&psu_mcu_client_bus0, 0x20); + valueV = (unsigned int)i2c_smbus_read_word_data(&psu_mcu_client_bus0, 0x8B); + i2c_smbus_write_byte(&pca9548_client_bus0, 0x00); + mutex_unlock(&data_bus0->lock); + } + break; + + default: + break; + } + if (valueN & 0x10) + { + valueN = 0xF0 + (valueN & 0x0F); + valueN = (~valueN) +1; + temp = (unsigned int)(1<index&0x1); + if (index&0x01) /* PSU 2 */ + { + if ((platformPsuABS&0x02)==0x00) /* PSU2 Present */ + psu_present = 1; + } + else /* PSU 1 */ + { + if ((platformPsuABS&0x01)==0x00) /* PSU1 Present */ + psu_present = 1; + } + if (psu_present == 1) + { + switch(platformModelId) + { + case HURACAN_WITH_BMC: + case HURACAN_WITHOUT_BMC: + case ASTERION_WITH_BMC: + case ASTERION_WITHOUT_BMC: + case HURACAN_A_WITH_BMC: + case HURACAN_A_WITHOUT_BMC: + { + mutex_lock(&data->lock); + if (index) + /* Turn on PCA9548 channel 7 on I2C-bus1 */ + i2c_smbus_write_byte(client, 0x80); + else + /* Turn on PCA9548 channel 6 on I2C-bus1 */ + i2c_smbus_write_byte(client, 0x40); + value = i2c_smbus_read_word_data(&psu_mcu_client, 0x8C); + i2c_smbus_write_byte(client, 0x00); + mutex_unlock(&data->lock); + } + break; + + case CABRERAIII_WITH_BMC: + case CABRERAIII_WITHOUT_BMC: + break; + + case SESTO_WITH_BMC: + case SESTO_WITHOUT_BMC: + { + mutex_lock(&data->lock); + if (index) + /* Turn on PCA9548#1 channel 7 on I2C-bus1 */ + i2c_smbus_write_byte(&(pca9548_client[1]), 0x80); + else + /* Turn on PCA9548#1 channel 6 on I2C-bus1 */ + i2c_smbus_write_byte(&(pca9548_client[1]), 0x40); + value = i2c_smbus_read_word_data(&psu_mcu_client, 0x8C); + i2c_smbus_write_byte(&(pca9548_client[1]), 0x00); + mutex_unlock(&data->lock); + } + break; + + case NCIIX_WITH_BMC: + case NCIIX_WITHOUT_BMC: + { + struct i2c_bus0_hardware_monitor_data *data_bus0 = i2c_get_clientdata(&psu_eeprom_client_bus0); + + mutex_lock(&data_bus0->lock); + if (index) + /* Turn on PCA9548#0 channel 2 on I2C-bus0 */ + i2c_smbus_write_byte(&pca9548_client_bus0, 0x04); + else + /* Turn on PCA9548#0 channel 1 on I2C-bus0 */ + i2c_smbus_write_byte(&pca9548_client_bus0, 0x02); + value = i2c_smbus_read_word_data(&psu_mcu_client_bus0, 0x8C); + i2c_smbus_write_byte(&pca9548_client_bus0, 0x00); + mutex_unlock(&data_bus0->lock); + } + break; + + default: + break; + } + valueY = (value & 0x07FF); + if ((value & 0x8000)&&(valueY)) + { + valueN = 0xF0 + (((value) >> 11) & 0x0F); + valueN = (~valueN) +1; + temp = (unsigned int)(1<> 11) & 0x0F); + count = sprintf(buf, "%d\n", (valueY*(1<index&0x1); + if (index&0x01) /* PSU 2 */ + { + if ((platformPsuABS&0x02)==0x00) /* PSU2 Present */ + psu_present = 1; + } + else /* PSU 1 */ + { + if ((platformPsuABS&0x01)==0x00) /* PSU1 Present */ + psu_present = 1; + } + if (psu_present == 1) + { + switch(platformModelId) + { + case HURACAN_WITH_BMC: + case HURACAN_WITHOUT_BMC: + case ASTERION_WITH_BMC: + case ASTERION_WITHOUT_BMC: + case HURACAN_A_WITH_BMC: + case HURACAN_A_WITHOUT_BMC: + { + mutex_lock(&data->lock); + if (index) + /* Turn on PCA9548 channel 7 on I2C-bus1 */ + i2c_smbus_write_byte(client, 0x80); + else + /* Turn on PCA9548 channel 6 on I2C-bus1 */ + i2c_smbus_write_byte(client, 0x40); + value = i2c_smbus_read_word_data(&psu_mcu_client, 0x8D); + i2c_smbus_write_byte(client, 0x00); + mutex_unlock(&data->lock); + } + break; + + case CABRERAIII_WITH_BMC: + case CABRERAIII_WITHOUT_BMC: + break; + + case SESTO_WITH_BMC: + case SESTO_WITHOUT_BMC: + { + mutex_lock(&data->lock); + if (index) + /* Turn on PCA9548#1 channel 7 on I2C-bus1 */ + i2c_smbus_write_byte(&(pca9548_client[1]), 0x80); + else + /* Turn on PCA9548#1 channel 6 on I2C-bus1 */ + i2c_smbus_write_byte(&(pca9548_client[1]), 0x40); + value = i2c_smbus_read_word_data(&psu_mcu_client, 0x8D); + i2c_smbus_write_byte(&(pca9548_client[1]), 0x00); + mutex_unlock(&data->lock); + } + break; + + case NCIIX_WITH_BMC: + case NCIIX_WITHOUT_BMC: + { + struct i2c_bus0_hardware_monitor_data *data_bus0 = i2c_get_clientdata(&psu_eeprom_client_bus0); + + mutex_lock(&data_bus0->lock); + if (index) + /* Turn on PCA9548#0 channel 2 on I2C-bus0 */ + i2c_smbus_write_byte(&pca9548_client_bus0, 0x04); + else + /* Turn on PCA9548#0 channel 1 on I2C-bus0 */ + i2c_smbus_write_byte(&pca9548_client_bus0, 0x02); + value = i2c_smbus_read_word_data(&psu_mcu_client_bus0, 0x8D); + i2c_smbus_write_byte(&pca9548_client_bus0, 0x00); + mutex_unlock(&data_bus0->lock); + } + break; + + default: + break; + } + valueY = (value & 0x07FF); + if ((value & 0x8000)&&(valueY)) + { + valueN = 0xF0 + (((value) >> 11) & 0x0F); + valueN = (~valueN) +1; + temp = (unsigned int)(1<> 11) & 0x0F); + count = sprintf(buf, "%d\n", (valueY*(1<index&0x1); + if (index&0x01) /* PSU 2 */ + { + if ((platformPsuABS&0x02)==0x00) /* PSU2 Present */ + psu_present = 1; + } + else /* PSU 1 */ + { + if ((platformPsuABS&0x01)==0x00) /* PSU1 Present */ + psu_present = 1; + } + if (psu_present == 1) + { + switch(platformModelId) + { + case HURACAN_WITH_BMC: + case HURACAN_WITHOUT_BMC: + case ASTERION_WITH_BMC: + case ASTERION_WITHOUT_BMC: + case HURACAN_A_WITH_BMC: + case HURACAN_A_WITHOUT_BMC: + { + mutex_lock(&data->lock); + if (index) + /* Turn on PCA9548 channel 7 on I2C-bus1 */ + i2c_smbus_write_byte(client, 0x80); + else + /* Turn on PCA9548 channel 6 on I2C-bus1 */ + i2c_smbus_write_byte(client, 0x40); + value = i2c_smbus_read_word_data(&psu_mcu_client, 0x8E); + i2c_smbus_write_byte(client, 0x00); + mutex_unlock(&data->lock); + } + break; + + case CABRERAIII_WITH_BMC: + case CABRERAIII_WITHOUT_BMC: + break; + + case SESTO_WITH_BMC: + case SESTO_WITHOUT_BMC: + { + mutex_lock(&data->lock); + if (index) + /* Turn on PCA9548#1 channel 7 on I2C-bus1 */ + i2c_smbus_write_byte(&(pca9548_client[1]), 0x80); + else + /* Turn on PCA9548#1 channel 6 on I2C-bus1 */ + i2c_smbus_write_byte(&(pca9548_client[1]), 0x40); + value = i2c_smbus_read_word_data(&psu_mcu_client, 0x8E); + i2c_smbus_write_byte(&(pca9548_client[1]), 0x00); + mutex_unlock(&data->lock); + } + break; + + case NCIIX_WITH_BMC: + case NCIIX_WITHOUT_BMC: + { + struct i2c_bus0_hardware_monitor_data *data_bus0 = i2c_get_clientdata(&psu_eeprom_client_bus0); + + mutex_lock(&data_bus0->lock); + if (index) + /* Turn on PCA9548#0 channel 2 on I2C-bus0 */ + i2c_smbus_write_byte(&pca9548_client_bus0, 0x04); + else + /* Turn on PCA9548#0 channel 1 on I2C-bus0 */ + i2c_smbus_write_byte(&pca9548_client_bus0, 0x02); + value = i2c_smbus_read_word_data(&psu_mcu_client_bus0, 0x8E); + i2c_smbus_write_byte(&pca9548_client_bus0, 0x00); + mutex_unlock(&data_bus0->lock); + } + break; + + default: + break; + } + valueY = (value & 0x07FF); + if ((value & 0x8000)&&(valueY)) + { + valueN = 0xF0 + (((value) >> 11) & 0x0F); + valueN = (~valueN) +1; + temp = (unsigned int)(1<> 11) & 0x0F); + count = sprintf(buf, "%d\n", (valueY*(1<index&0x1); + if (index&0x01) /* PSU 2 */ + { + if ((platformPsuABS&0x02)==0x00) /* PSU2 Present */ + psu_present = 1; + } + else /* PSU 1 */ + { + if ((platformPsuABS&0x01)==0x00) /* PSU1 Present */ + psu_present = 1; + } + if (psu_present == 1) + { + switch(platformModelId) + { + case HURACAN_WITH_BMC: + case HURACAN_WITHOUT_BMC: + case ASTERION_WITH_BMC: + case ASTERION_WITHOUT_BMC: + case HURACAN_A_WITH_BMC: + case HURACAN_A_WITHOUT_BMC: + { + mutex_lock(&data->lock); + if (index) + /* Turn on PCA9548 channel 7 on I2C-bus1 */ + i2c_smbus_write_byte(client, 0x80); + else + /* Turn on PCA9548 channel 6 on I2C-bus1 */ + i2c_smbus_write_byte(client, 0x40); + value = i2c_smbus_read_word_data(&psu_mcu_client, 0x90); + i2c_smbus_write_byte(client, 0x00); + mutex_unlock(&data->lock); + } + break; + + case CABRERAIII_WITH_BMC: + case CABRERAIII_WITHOUT_BMC: + break; + + case SESTO_WITH_BMC: + case SESTO_WITHOUT_BMC: + { + mutex_lock(&data->lock); + if (index) + /* Turn on PCA9548#1 channel 7 on I2C-bus1 */ + i2c_smbus_write_byte(&(pca9548_client[1]), 0x80); + else + /* Turn on PCA9548#1 channel 6 on I2C-bus1 */ + i2c_smbus_write_byte(&(pca9548_client[1]), 0x40); + value = i2c_smbus_read_word_data(&psu_mcu_client, 0x90); + i2c_smbus_write_byte(&(pca9548_client[1]), 0x00); + mutex_unlock(&data->lock); + } + break; + + case NCIIX_WITH_BMC: + case NCIIX_WITHOUT_BMC: + { + struct i2c_bus0_hardware_monitor_data *data_bus0 = i2c_get_clientdata(&psu_eeprom_client_bus0); + + mutex_lock(&data_bus0->lock); + if (index) + /* Turn on PCA9548#0 channel 2 on I2C-bus0 */ + i2c_smbus_write_byte(&pca9548_client_bus0, 0x04); + else + /* Turn on PCA9548#0 channel 1 on I2C-bus0 */ + i2c_smbus_write_byte(&pca9548_client_bus0, 0x02); + value = i2c_smbus_read_word_data(&psu_mcu_client_bus0, 0x90); + i2c_smbus_write_byte(&pca9548_client_bus0, 0x00); + mutex_unlock(&data_bus0->lock); + } + break; + + default: + break; + } + temp = (unsigned int)value; + temp = (temp & 0x07FF) * (1 << ((temp >> 11) & 0x1F)); + } + return sprintf(buf, "%d\n", temp); +} + +static ssize_t show_psu_pout(struct device *dev, struct device_attribute *devattr, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct i2c_client *client = to_i2c_client(dev); + struct i2c_bus1_hardware_monitor_data *data = i2c_get_clientdata(client); + unsigned short value = 0; + unsigned short index = 0; + unsigned int valueY = 0; + unsigned char valueN = 0; + ssize_t count = 0; + unsigned int temp = 0; + unsigned int psu_present = 0; + + index = (attr->index&0x1); + if (index&0x01) /* PSU 2 */ + { + if ((platformPsuABS&0x02)==0x00) /* PSU2 Present */ + psu_present = 1; + } + else /* PSU 1 */ + { + if ((platformPsuABS&0x01)==0x00) /* PSU1 Present */ + psu_present = 1; + } + if (psu_present == 1) + { + switch(platformModelId) + { + case HURACAN_WITH_BMC: + case HURACAN_WITHOUT_BMC: + case ASTERION_WITH_BMC: + case ASTERION_WITHOUT_BMC: + case HURACAN_A_WITH_BMC: + case HURACAN_A_WITHOUT_BMC: + { + mutex_lock(&data->lock); + if (index) + /* Turn on PCA9548 channel 7 on I2C-bus1 */ + i2c_smbus_write_byte(client, 0x80); + else + /* Turn on PCA9548 channel 6 on I2C-bus1 */ + i2c_smbus_write_byte(client, 0x40); + value = i2c_smbus_read_word_data(&psu_mcu_client, 0x96); + i2c_smbus_write_byte(client, 0x00); + mutex_unlock(&data->lock); + } + break; + + case CABRERAIII_WITH_BMC: + case CABRERAIII_WITHOUT_BMC: + break; + + case SESTO_WITH_BMC: + case SESTO_WITHOUT_BMC: + { + mutex_lock(&data->lock); + if (index) + /* Turn on PCA9548#1 channel 7 on I2C-bus1 */ + i2c_smbus_write_byte(&(pca9548_client[1]), 0x80); + else + /* Turn on PCA9548#1 channel 6 on I2C-bus1 */ + i2c_smbus_write_byte(&(pca9548_client[1]), 0x40); + value = i2c_smbus_read_word_data(&psu_mcu_client, 0x96); + i2c_smbus_write_byte(&(pca9548_client[1]), 0x00); + mutex_unlock(&data->lock); + } + break; + + case NCIIX_WITH_BMC: + case NCIIX_WITHOUT_BMC: + { + struct i2c_bus0_hardware_monitor_data *data_bus0 = i2c_get_clientdata(&psu_eeprom_client_bus0); + + mutex_lock(&data_bus0->lock); + if (index) + /* Turn on PCA9548#0 channel 2 on I2C-bus0 */ + i2c_smbus_write_byte(&pca9548_client_bus0, 0x04); + else + /* Turn on PCA9548#0 channel 1 on I2C-bus0 */ + i2c_smbus_write_byte(&pca9548_client_bus0, 0x02); + value = i2c_smbus_read_word_data(&psu_mcu_client_bus0, 0x96); + i2c_smbus_write_byte(&pca9548_client_bus0, 0x00); + mutex_unlock(&data_bus0->lock); + } + break; + + default: + break; + } + valueY = (value & 0x07FF); + if ((value & 0x8000)&&(valueY)) + { + valueN = 0xF0 + (((value) >> 11) & 0x0F); + valueN = (~valueN) +1; + temp = (unsigned int)(1<> 11) & 0x0F); + count = sprintf(buf, "%d\n", (valueY*(1<index&0x1); + if (index&0x01) /* PSU 2 */ + { + if ((platformPsuABS&0x02)==0x00) /* PSU2 Present */ + psu_present = 1; + } + else /* PSU 1 */ + { + if ((platformPsuABS&0x01)==0x00) /* PSU1 Present */ + psu_present = 1; + } + if (psu_present == 1) + { + switch(platformModelId) + { + case HURACAN_WITH_BMC: + case HURACAN_WITHOUT_BMC: + case ASTERION_WITH_BMC: + case ASTERION_WITHOUT_BMC: + case HURACAN_A_WITH_BMC: + case HURACAN_A_WITHOUT_BMC: + { + mutex_lock(&data->lock); + if (index) + /* Turn on PCA9548 channel 7 on I2C-bus1 */ + i2c_smbus_write_byte(client, 0x80); + else + /* Turn on PCA9548 channel 6 on I2C-bus1 */ + i2c_smbus_write_byte(client, 0x40); + value = i2c_smbus_read_word_data(&psu_mcu_client, 0x97); + i2c_smbus_write_byte(client, 0x00); + mutex_unlock(&data->lock); + } + break; + + case CABRERAIII_WITH_BMC: + case CABRERAIII_WITHOUT_BMC: + break; + + case SESTO_WITH_BMC: + case SESTO_WITHOUT_BMC: + { + mutex_lock(&data->lock); + if (index) + /* Turn on PCA9548#1 channel 7 on I2C-bus1 */ + i2c_smbus_write_byte(&(pca9548_client[1]), 0x80); + else + /* Turn on PCA9548#1 channel 6 on I2C-bus1 */ + i2c_smbus_write_byte(&(pca9548_client[1]), 0x40); + value = i2c_smbus_read_word_data(&psu_mcu_client, 0x97); + i2c_smbus_write_byte(&(pca9548_client[1]), 0x00); + mutex_unlock(&data->lock); + } + break; + + case NCIIX_WITH_BMC: + case NCIIX_WITHOUT_BMC: + { + struct i2c_bus0_hardware_monitor_data *data_bus0 = i2c_get_clientdata(&psu_eeprom_client_bus0); + + mutex_lock(&data_bus0->lock); + if (index) + /* Turn on PCA9548#0 channel 2 on I2C-bus0 */ + i2c_smbus_write_byte(&pca9548_client_bus0, 0x04); + else + /* Turn on PCA9548#0 channel 1 on I2C-bus0 */ + i2c_smbus_write_byte(&pca9548_client_bus0, 0x02); + value = i2c_smbus_read_word_data(&psu_mcu_client_bus0, 0x97); + i2c_smbus_write_byte(&pca9548_client_bus0, 0x00); + mutex_unlock(&data_bus0->lock); + } + break; + + default: + break; + } + valueY = (value & 0x07FF); + if ((value & 0x8000)&&(valueY)) + { + valueN = 0xF0 + (((value) >> 11) & 0x0F); + valueN = (~valueN) +1; + temp = (unsigned int)(1<> 11) & 0x0F); + count = sprintf(buf, "%d\n", (valueY*(1<lock); + if ((platformPsuABS&0x01)==0x00) /* PSU1 Present */ + { + /* Turn on PCA9548#1 channel 6 on I2C-bus1 */ + i2c_smbus_write_byte(client, 0x40); + i2c_smbus_write_word_data(&psu_mcu_client, 0x02, cmd_data_1); + i2c_smbus_write_word_data(&psu_mcu_client, 0x01, cmd_data_2); + } + if ((platformPsuABS&0x02)==0x00) /* PSU2 Present */ + { + /* Turn on PCA9548#1 channel 7 on I2C-bus1 */ + i2c_smbus_write_byte(client, 0x80); + i2c_smbus_write_word_data(&psu_mcu_client, 0x02, cmd_data_1); + i2c_smbus_write_word_data(&psu_mcu_client, 0x01, cmd_data_2); + } + i2c_smbus_write_byte(client, 0x00); + mutex_unlock(&data->lock); + } + break; + + case SESTO_WITH_BMC: + case SESTO_WITHOUT_BMC: + { + unsigned short cmd_data_1 = 0x8F19; + unsigned short cmd_data_2 = 0xFF00; + + mutex_lock(&data->lock); + if ((platformPsuABS&0x01)==0x00) /* PSU1 Present */ + { + /* Turn on PCA9548#1 channel 6 on I2C-bus1 */ + i2c_smbus_write_byte(&(pca9548_client[1]), 0x40); + i2c_smbus_write_word_data(&psu_mcu_client, 0x02, cmd_data_1); + i2c_smbus_write_word_data(&psu_mcu_client, 0x01, cmd_data_2); + } + if ((platformPsuABS&0x02)==0x00) /* PSU2 Present */ + { + /* Turn on PCA9548#1 channel 7 on I2C-bus1 */ + i2c_smbus_write_byte(&(pca9548_client[1]), 0x80); + i2c_smbus_write_word_data(&psu_mcu_client, 0x02, cmd_data_1); + i2c_smbus_write_word_data(&psu_mcu_client, 0x01, cmd_data_2); + } + i2c_smbus_write_byte(&(pca9548_client[1]), 0x00); + mutex_unlock(&data->lock); + } + break; + + case NCIIX_WITH_BMC: + case NCIIX_WITHOUT_BMC: + { + struct i2c_bus0_hardware_monitor_data *data_bus0 = i2c_get_clientdata(&psu_eeprom_client_bus0); + /* + Setting the ON_OFF_CONFIG Command (02h) to type 9 (SW : turn-on/off by operation command). + I2C Command: B2 02 19 59 + address command data PEC(Packet Error Check) + */ + unsigned short cmd_data_1 = 0x5919; + /* + Setting the Operation Command (01h) to turn-off power immediately. + I2C Command: B2 01 00 29 + address command data PEC(Packet Error Check) + */ + unsigned short cmd_data_2 = 0x2900; + + mutex_lock(&data_bus0->lock); + if ((platformPsuABS&0x01)==0x00) /* PSU1 Present */ + { + /* Turn on PCA9548#0 channel 1 on I2C-bus0 */ + i2c_smbus_write_byte(&pca9548_client_bus0, 0x02); + i2c_smbus_write_word_data(&psu_mcu_client_bus0, 0x02, cmd_data_1); + i2c_smbus_write_word_data(&psu_mcu_client_bus0, 0x01, cmd_data_2); + } + if ((platformPsuABS&0x02)==0x00) /* PSU2 Present */ + { + /* Turn on PCA9548#0 channel 2 on I2C-bus0 */ + i2c_smbus_write_byte(&pca9548_client_bus0, 0x04); + i2c_smbus_write_word_data(&psu_mcu_client_bus0, 0x02, cmd_data_1); + i2c_smbus_write_word_data(&psu_mcu_client_bus0, 0x01, cmd_data_2); + } + i2c_smbus_write_byte(&pca9548_client_bus0, 0x00); + mutex_unlock(&data_bus0->lock); + } + break; + + default: + break; + } + + return count; +} + + +static ssize_t set_system_led(struct device *dev, struct device_attribute *devattr, const char *buf, + size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + struct i2c_bus1_hardware_monitor_data *data = i2c_get_clientdata(client); + long temp; + + if (kstrtol(buf, 10, &temp)) + return -EINVAL; + + temp = clamp_val(temp, 0, 2); + + mutex_lock(&data->lock); + data->systemLedStatus = temp; + mutex_unlock(&data->lock); + + return count; +} + +static ssize_t show_port_tx_disable(struct device *dev, struct device_attribute *devattr, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + int rc = 0; + + switch(platformModelId) + { + case SESTO_WITH_BMC: + case SESTO_WITHOUT_BMC: + { + struct i2c_client *client = to_i2c_client(dev); + struct i2c_bus1_hardware_monitor_data *data = i2c_get_clientdata(client); + unsigned short index=0, bit=0; + + index = (attr->index/16); + bit = (attr->index%16); + mutex_lock(&data->lock); + rc = (PCA9553_TEST_BIT(data->sfpPortTxDisable[index], bit)?1:0); + mutex_unlock(&data->lock); + } + break; + + case NCIIX_WITH_BMC: + case NCIIX_WITHOUT_BMC: + { + rc = (SFPPortTxDisable[attr->index]==1); + } + break; + + default: + break; + } + + + return sprintf(buf, "%d\n", rc); +} + +static ssize_t set_port_tx_disable(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct i2c_client *client = to_i2c_client(dev); + struct i2c_bus1_hardware_monitor_data *data = i2c_get_clientdata(client); + long temp; + + if (kstrtol(buf, 10, &temp)) + return -EINVAL; + temp = clamp_val(temp, 0, 1); + + switch(platformModelId) + { + case SESTO_WITH_BMC: + case SESTO_WITHOUT_BMC: + { + unsigned short index=0, bit=0; + + index = (attr->index/16); + bit = (attr->index%16); + + mutex_lock(&data->lock); + if (temp==1) + PCA9553_SET_BIT(data->sfpPortTxDisable[index], bit); + else + PCA9553_CLEAR_BIT(data->sfpPortTxDisable[index], bit); + i2c_smbus_write_byte(&(pca9548_client[1]), (1<sfpPortTxDisable[index]); + i2c_smbus_write_byte(&(pca9548_client[1]), 0x00); + mutex_unlock(&data->lock); + } + break; + + case NCIIX_WITH_BMC: + case NCIIX_WITHOUT_BMC: + { + unsigned short value = 0; + + SFPPortTxDisable[attr->index] = (temp&0x1); + if ((attr->index/8) == 5) /* SFP+ 40~47 */ + { + mutex_lock(&data->lock); + i2c_smbus_write_byte(client, sfpPortData_78F[attr->index].portMaskIOsForPCA9548_0); + value = i2c_smbus_read_word_data(&(pca9535pwr_client_bus1[sfpPortData_78F[attr->index].i2cAddrForPCA9535]), PCA9553_COMMAND_BYTE_REG_OUTPUT_PORT_0); + if (temp==1) + PCA9553_SET_BIT(value, sfpPortData_78F[attr->index].portMaskBitForTxEnPin); + else + PCA9553_CLEAR_BIT(value, sfpPortData_78F[attr->index].portMaskBitForTxEnPin); + i2c_device_word_write(&(pca9535pwr_client_bus1[sfpPortData_78F[attr->index].i2cAddrForPCA9535]), PCA9553_COMMAND_BYTE_REG_OUTPUT_PORT_0, value); + i2c_smbus_write_byte(client, 0x00); + mutex_unlock(&data->lock); + } + else /* SFP+ 0~39 */ + { + struct i2c_bus0_hardware_monitor_data *data_bus0 = i2c_get_clientdata(&pca9548_client_bus0); + + mutex_lock(&data_bus0->lock); + i2c_smbus_write_byte(&pca9548_client_bus0, sfpPortData_78F[attr->index].portMaskIOsForPCA9548_0); + value = i2c_smbus_read_word_data(&(pca9535_client_bus0[sfpPortData_78F[attr->index].i2cAddrForPCA9535]), PCA9553_COMMAND_BYTE_REG_OUTPUT_PORT_0); + if (temp==1) + PCA9553_SET_BIT(value, sfpPortData_78F[attr->index].portMaskBitForTxEnPin); + else + PCA9553_CLEAR_BIT(value, sfpPortData_78F[attr->index].portMaskBitForTxEnPin); + i2c_device_word_write(&(pca9535_client_bus0[sfpPortData_78F[attr->index].i2cAddrForPCA9535]), PCA9553_COMMAND_BYTE_REG_OUTPUT_PORT_0, value); + i2c_smbus_write_byte(&pca9548_client_bus0, 0x00); + mutex_unlock(&data_bus0->lock); + } + } + break; + + default: + break; + } + + return count; +} + +static ssize_t show_port_rate_select(struct device *dev, struct device_attribute *devattr, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + int rc = 0; + + switch(platformModelId) + { + case SESTO_WITH_BMC: + case SESTO_WITHOUT_BMC: + { + struct i2c_client *client = to_i2c_client(dev); + struct i2c_bus1_hardware_monitor_data *data = i2c_get_clientdata(client); + unsigned short index=0, bit=0; + + index = (attr->index/16); + bit = (attr->index%16); + mutex_lock(&data->lock); + rc = (PCA9553_TEST_BIT(data->sfpPortRateSelect[index], bit)?1:0); + mutex_unlock(&data->lock); + } + break; + + default: + break; + } + + + return sprintf(buf, "%d\n", rc); +} + +static ssize_t set_port_rate_select(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct i2c_client *client = to_i2c_client(dev); + struct i2c_bus1_hardware_monitor_data *data = i2c_get_clientdata(client); + long temp; + + if (kstrtol(buf, 10, &temp)) + return -EINVAL; + temp = clamp_val(temp, 0, 1); + + switch(platformModelId) + { + case SESTO_WITH_BMC: + case SESTO_WITHOUT_BMC: + { + unsigned short index=0, bit=0; + + index = (attr->index/16); + bit = (attr->index%16); + + mutex_lock(&data->lock); + if (temp==1) + PCA9553_SET_BIT(data->sfpPortRateSelect[index], bit); + else + PCA9553_CLEAR_BIT(data->sfpPortRateSelect[index], bit); + i2c_smbus_write_byte(&(pca9548_client[1]), (1<sfpPortRateSelect[0]); + break; + + case 1: + i2c_device_word_write(&(pca9535pwr_client_bus1[1]), PCA9553_COMMAND_BYTE_REG_OUTPUT_PORT_0, data->sfpPortRateSelect[1]); + break; + + case 2: + i2c_device_word_write(&(pca9535pwr_client_bus1[2]), PCA9553_COMMAND_BYTE_REG_OUTPUT_PORT_0, data->sfpPortRateSelect[2]); + break; + + default: + break; + } + i2c_smbus_write_byte(&(pca9548_client[1]), (1<sfpPortRateSelect[0]); + break; + + case 1: + i2c_device_word_write(&(pca9535pwr_client_bus1[1]), PCA9553_COMMAND_BYTE_REG_OUTPUT_PORT_0, data->sfpPortRateSelect[1]); + break; + + case 2: + i2c_device_word_write(&(pca9535pwr_client_bus1[2]), PCA9553_COMMAND_BYTE_REG_OUTPUT_PORT_0, data->sfpPortRateSelect[2]); + break; + + default: + break; + } + i2c_smbus_write_byte(&(pca9548_client[1]), 0x00); + mutex_unlock(&data->lock); + } + break; + + default: + break; + } + + return count; +} + +static DEVICE_ATTR(eeprom, S_IRUGO, show_eeprom, NULL); +static DEVICE_ATTR(system_led, S_IWUSR, NULL, set_system_led); + +static SENSOR_DEVICE_ATTR(port_1_data_a0, S_IRUGO, show_port_data_a0, NULL, 0); +static SENSOR_DEVICE_ATTR(port_2_data_a0, S_IRUGO, show_port_data_a0, NULL, 1); +static SENSOR_DEVICE_ATTR(port_3_data_a0, S_IRUGO, show_port_data_a0, NULL, 2); +static SENSOR_DEVICE_ATTR(port_4_data_a0, S_IRUGO, show_port_data_a0, NULL, 3); +static SENSOR_DEVICE_ATTR(port_5_data_a0, S_IRUGO, show_port_data_a0, NULL, 4); +static SENSOR_DEVICE_ATTR(port_6_data_a0, S_IRUGO, show_port_data_a0, NULL, 5); +static SENSOR_DEVICE_ATTR(port_7_data_a0, S_IRUGO, show_port_data_a0, NULL, 6); +static SENSOR_DEVICE_ATTR(port_8_data_a0, S_IRUGO, show_port_data_a0, NULL, 7); +static SENSOR_DEVICE_ATTR(port_9_data_a0, S_IRUGO, show_port_data_a0, NULL, 8); +static SENSOR_DEVICE_ATTR(port_10_data_a0, S_IRUGO, show_port_data_a0, NULL, 9); +static SENSOR_DEVICE_ATTR(port_11_data_a0, S_IRUGO, show_port_data_a0, NULL, 10); +static SENSOR_DEVICE_ATTR(port_12_data_a0, S_IRUGO, show_port_data_a0, NULL, 11); +static SENSOR_DEVICE_ATTR(port_13_data_a0, S_IRUGO, show_port_data_a0, NULL, 12); +static SENSOR_DEVICE_ATTR(port_14_data_a0, S_IRUGO, show_port_data_a0, NULL, 13); +static SENSOR_DEVICE_ATTR(port_15_data_a0, S_IRUGO, show_port_data_a0, NULL, 14); +static SENSOR_DEVICE_ATTR(port_16_data_a0, S_IRUGO, show_port_data_a0, NULL, 15); +static SENSOR_DEVICE_ATTR(port_17_data_a0, S_IRUGO, show_port_data_a0, NULL, 16); +static SENSOR_DEVICE_ATTR(port_18_data_a0, S_IRUGO, show_port_data_a0, NULL, 17); +static SENSOR_DEVICE_ATTR(port_19_data_a0, S_IRUGO, show_port_data_a0, NULL, 18); +static SENSOR_DEVICE_ATTR(port_20_data_a0, S_IRUGO, show_port_data_a0, NULL, 19); +static SENSOR_DEVICE_ATTR(port_21_data_a0, S_IRUGO, show_port_data_a0, NULL, 20); +static SENSOR_DEVICE_ATTR(port_22_data_a0, S_IRUGO, show_port_data_a0, NULL, 21); +static SENSOR_DEVICE_ATTR(port_23_data_a0, S_IRUGO, show_port_data_a0, NULL, 22); +static SENSOR_DEVICE_ATTR(port_24_data_a0, S_IRUGO, show_port_data_a0, NULL, 23); +static SENSOR_DEVICE_ATTR(port_25_data_a0, S_IRUGO, show_port_data_a0, NULL, 24); +static SENSOR_DEVICE_ATTR(port_26_data_a0, S_IRUGO, show_port_data_a0, NULL, 25); +static SENSOR_DEVICE_ATTR(port_27_data_a0, S_IRUGO, show_port_data_a0, NULL, 26); +static SENSOR_DEVICE_ATTR(port_28_data_a0, S_IRUGO, show_port_data_a0, NULL, 27); +static SENSOR_DEVICE_ATTR(port_29_data_a0, S_IRUGO, show_port_data_a0, NULL, 28); +static SENSOR_DEVICE_ATTR(port_30_data_a0, S_IRUGO, show_port_data_a0, NULL, 29); +static SENSOR_DEVICE_ATTR(port_31_data_a0, S_IRUGO, show_port_data_a0, NULL, 30); +static SENSOR_DEVICE_ATTR(port_32_data_a0, S_IRUGO, show_port_data_a0, NULL, 31); +static SENSOR_DEVICE_ATTR(port_33_data_a0, S_IRUGO, show_port_data_a0, NULL, 32); +static SENSOR_DEVICE_ATTR(port_34_data_a0, S_IRUGO, show_port_data_a0, NULL, 33); +static SENSOR_DEVICE_ATTR(port_35_data_a0, S_IRUGO, show_port_data_a0, NULL, 34); +static SENSOR_DEVICE_ATTR(port_36_data_a0, S_IRUGO, show_port_data_a0, NULL, 35); +static SENSOR_DEVICE_ATTR(port_37_data_a0, S_IRUGO, show_port_data_a0, NULL, 36); +static SENSOR_DEVICE_ATTR(port_38_data_a0, S_IRUGO, show_port_data_a0, NULL, 37); +static SENSOR_DEVICE_ATTR(port_39_data_a0, S_IRUGO, show_port_data_a0, NULL, 38); +static SENSOR_DEVICE_ATTR(port_40_data_a0, S_IRUGO, show_port_data_a0, NULL, 39); +static SENSOR_DEVICE_ATTR(port_41_data_a0, S_IRUGO, show_port_data_a0, NULL, 40); +static SENSOR_DEVICE_ATTR(port_42_data_a0, S_IRUGO, show_port_data_a0, NULL, 41); +static SENSOR_DEVICE_ATTR(port_43_data_a0, S_IRUGO, show_port_data_a0, NULL, 42); +static SENSOR_DEVICE_ATTR(port_44_data_a0, S_IRUGO, show_port_data_a0, NULL, 43); +static SENSOR_DEVICE_ATTR(port_45_data_a0, S_IRUGO, show_port_data_a0, NULL, 44); +static SENSOR_DEVICE_ATTR(port_46_data_a0, S_IRUGO, show_port_data_a0, NULL, 45); +static SENSOR_DEVICE_ATTR(port_47_data_a0, S_IRUGO, show_port_data_a0, NULL, 46); +static SENSOR_DEVICE_ATTR(port_48_data_a0, S_IRUGO, show_port_data_a0, NULL, 47); +static SENSOR_DEVICE_ATTR(port_49_data_a0, S_IRUGO, show_port_data_a0, NULL, 48); +static SENSOR_DEVICE_ATTR(port_50_data_a0, S_IRUGO, show_port_data_a0, NULL, 49); +static SENSOR_DEVICE_ATTR(port_51_data_a0, S_IRUGO, show_port_data_a0, NULL, 50); +static SENSOR_DEVICE_ATTR(port_52_data_a0, S_IRUGO, show_port_data_a0, NULL, 51); +static SENSOR_DEVICE_ATTR(port_53_data_a0, S_IRUGO, show_port_data_a0, NULL, 52); +static SENSOR_DEVICE_ATTR(port_54_data_a0, S_IRUGO, show_port_data_a0, NULL, 53); +static SENSOR_DEVICE_ATTR(port_55_data_a0, S_IRUGO, show_port_data_a0, NULL, 54); +static SENSOR_DEVICE_ATTR(port_56_data_a0, S_IRUGO, show_port_data_a0, NULL, 55); +static SENSOR_DEVICE_ATTR(port_57_data_a0, S_IRUGO, show_port_data_a0, NULL, 56); +static SENSOR_DEVICE_ATTR(port_58_data_a0, S_IRUGO, show_port_data_a0, NULL, 57); +static SENSOR_DEVICE_ATTR(port_59_data_a0, S_IRUGO, show_port_data_a0, NULL, 58); +static SENSOR_DEVICE_ATTR(port_60_data_a0, S_IRUGO, show_port_data_a0, NULL, 59); +static SENSOR_DEVICE_ATTR(port_61_data_a0, S_IRUGO, show_port_data_a0, NULL, 60); +static SENSOR_DEVICE_ATTR(port_62_data_a0, S_IRUGO, show_port_data_a0, NULL, 61); +static SENSOR_DEVICE_ATTR(port_63_data_a0, S_IRUGO, show_port_data_a0, NULL, 62); +static SENSOR_DEVICE_ATTR(port_64_data_a0, S_IRUGO, show_port_data_a0, NULL, 63); + +static SENSOR_DEVICE_ATTR(port_1_data_a2, S_IRUGO, show_port_data_a2, NULL, 0); +static SENSOR_DEVICE_ATTR(port_2_data_a2, S_IRUGO, show_port_data_a2, NULL, 1); +static SENSOR_DEVICE_ATTR(port_3_data_a2, S_IRUGO, show_port_data_a2, NULL, 2); +static SENSOR_DEVICE_ATTR(port_4_data_a2, S_IRUGO, show_port_data_a2, NULL, 3); +static SENSOR_DEVICE_ATTR(port_5_data_a2, S_IRUGO, show_port_data_a2, NULL, 4); +static SENSOR_DEVICE_ATTR(port_6_data_a2, S_IRUGO, show_port_data_a2, NULL, 5); +static SENSOR_DEVICE_ATTR(port_7_data_a2, S_IRUGO, show_port_data_a2, NULL, 6); +static SENSOR_DEVICE_ATTR(port_8_data_a2, S_IRUGO, show_port_data_a2, NULL, 7); +static SENSOR_DEVICE_ATTR(port_9_data_a2, S_IRUGO, show_port_data_a2, NULL, 8); +static SENSOR_DEVICE_ATTR(port_10_data_a2, S_IRUGO, show_port_data_a2, NULL, 9); +static SENSOR_DEVICE_ATTR(port_11_data_a2, S_IRUGO, show_port_data_a2, NULL, 10); +static SENSOR_DEVICE_ATTR(port_12_data_a2, S_IRUGO, show_port_data_a2, NULL, 11); +static SENSOR_DEVICE_ATTR(port_13_data_a2, S_IRUGO, show_port_data_a2, NULL, 12); +static SENSOR_DEVICE_ATTR(port_14_data_a2, S_IRUGO, show_port_data_a2, NULL, 13); +static SENSOR_DEVICE_ATTR(port_15_data_a2, S_IRUGO, show_port_data_a2, NULL, 14); +static SENSOR_DEVICE_ATTR(port_16_data_a2, S_IRUGO, show_port_data_a2, NULL, 15); +static SENSOR_DEVICE_ATTR(port_17_data_a2, S_IRUGO, show_port_data_a2, NULL, 16); +static SENSOR_DEVICE_ATTR(port_18_data_a2, S_IRUGO, show_port_data_a2, NULL, 17); +static SENSOR_DEVICE_ATTR(port_19_data_a2, S_IRUGO, show_port_data_a2, NULL, 18); +static SENSOR_DEVICE_ATTR(port_20_data_a2, S_IRUGO, show_port_data_a2, NULL, 19); +static SENSOR_DEVICE_ATTR(port_21_data_a2, S_IRUGO, show_port_data_a2, NULL, 20); +static SENSOR_DEVICE_ATTR(port_22_data_a2, S_IRUGO, show_port_data_a2, NULL, 21); +static SENSOR_DEVICE_ATTR(port_23_data_a2, S_IRUGO, show_port_data_a2, NULL, 22); +static SENSOR_DEVICE_ATTR(port_24_data_a2, S_IRUGO, show_port_data_a2, NULL, 23); +static SENSOR_DEVICE_ATTR(port_25_data_a2, S_IRUGO, show_port_data_a2, NULL, 24); +static SENSOR_DEVICE_ATTR(port_26_data_a2, S_IRUGO, show_port_data_a2, NULL, 25); +static SENSOR_DEVICE_ATTR(port_27_data_a2, S_IRUGO, show_port_data_a2, NULL, 26); +static SENSOR_DEVICE_ATTR(port_28_data_a2, S_IRUGO, show_port_data_a2, NULL, 27); +static SENSOR_DEVICE_ATTR(port_29_data_a2, S_IRUGO, show_port_data_a2, NULL, 28); +static SENSOR_DEVICE_ATTR(port_30_data_a2, S_IRUGO, show_port_data_a2, NULL, 29); +static SENSOR_DEVICE_ATTR(port_31_data_a2, S_IRUGO, show_port_data_a2, NULL, 30); +static SENSOR_DEVICE_ATTR(port_32_data_a2, S_IRUGO, show_port_data_a2, NULL, 31); +static SENSOR_DEVICE_ATTR(port_33_data_a2, S_IRUGO, show_port_data_a2, NULL, 32); +static SENSOR_DEVICE_ATTR(port_34_data_a2, S_IRUGO, show_port_data_a2, NULL, 33); +static SENSOR_DEVICE_ATTR(port_35_data_a2, S_IRUGO, show_port_data_a2, NULL, 34); +static SENSOR_DEVICE_ATTR(port_36_data_a2, S_IRUGO, show_port_data_a2, NULL, 35); +static SENSOR_DEVICE_ATTR(port_37_data_a2, S_IRUGO, show_port_data_a2, NULL, 36); +static SENSOR_DEVICE_ATTR(port_38_data_a2, S_IRUGO, show_port_data_a2, NULL, 37); +static SENSOR_DEVICE_ATTR(port_39_data_a2, S_IRUGO, show_port_data_a2, NULL, 38); +static SENSOR_DEVICE_ATTR(port_40_data_a2, S_IRUGO, show_port_data_a2, NULL, 39); +static SENSOR_DEVICE_ATTR(port_41_data_a2, S_IRUGO, show_port_data_a2, NULL, 40); +static SENSOR_DEVICE_ATTR(port_42_data_a2, S_IRUGO, show_port_data_a2, NULL, 41); +static SENSOR_DEVICE_ATTR(port_43_data_a2, S_IRUGO, show_port_data_a2, NULL, 42); +static SENSOR_DEVICE_ATTR(port_44_data_a2, S_IRUGO, show_port_data_a2, NULL, 43); +static SENSOR_DEVICE_ATTR(port_45_data_a2, S_IRUGO, show_port_data_a2, NULL, 44); +static SENSOR_DEVICE_ATTR(port_46_data_a2, S_IRUGO, show_port_data_a2, NULL, 45); +static SENSOR_DEVICE_ATTR(port_47_data_a2, S_IRUGO, show_port_data_a2, NULL, 46); +static SENSOR_DEVICE_ATTR(port_48_data_a2, S_IRUGO, show_port_data_a2, NULL, 47); +static SENSOR_DEVICE_ATTR(port_49_data_a2, S_IRUGO, show_port_data_a2, NULL, 48); +static SENSOR_DEVICE_ATTR(port_50_data_a2, S_IRUGO, show_port_data_a2, NULL, 49); +static SENSOR_DEVICE_ATTR(port_51_data_a2, S_IRUGO, show_port_data_a2, NULL, 50); +static SENSOR_DEVICE_ATTR(port_52_data_a2, S_IRUGO, show_port_data_a2, NULL, 51); +static SENSOR_DEVICE_ATTR(port_53_data_a2, S_IRUGO, show_port_data_a2, NULL, 52); +static SENSOR_DEVICE_ATTR(port_54_data_a2, S_IRUGO, show_port_data_a2, NULL, 53); +static SENSOR_DEVICE_ATTR(port_55_data_a2, S_IRUGO, show_port_data_a2, NULL, 54); +static SENSOR_DEVICE_ATTR(port_56_data_a2, S_IRUGO, show_port_data_a2, NULL, 55); +static SENSOR_DEVICE_ATTR(port_57_data_a2, S_IRUGO, show_port_data_a2, NULL, 56); +static SENSOR_DEVICE_ATTR(port_58_data_a2, S_IRUGO, show_port_data_a2, NULL, 57); +static SENSOR_DEVICE_ATTR(port_59_data_a2, S_IRUGO, show_port_data_a2, NULL, 58); +static SENSOR_DEVICE_ATTR(port_60_data_a2, S_IRUGO, show_port_data_a2, NULL, 59); +static SENSOR_DEVICE_ATTR(port_61_data_a2, S_IRUGO, show_port_data_a2, NULL, 60); +static SENSOR_DEVICE_ATTR(port_62_data_a2, S_IRUGO, show_port_data_a2, NULL, 61); +static SENSOR_DEVICE_ATTR(port_63_data_a2, S_IRUGO, show_port_data_a2, NULL, 62); +static SENSOR_DEVICE_ATTR(port_64_data_a2, S_IRUGO, show_port_data_a2, NULL, 63); + +static SENSOR_DEVICE_ATTR(port_1_abs, S_IRUGO, show_port_abs, NULL, 0); +static SENSOR_DEVICE_ATTR(port_2_abs, S_IRUGO, show_port_abs, NULL, 1); +static SENSOR_DEVICE_ATTR(port_3_abs, S_IRUGO, show_port_abs, NULL, 2); +static SENSOR_DEVICE_ATTR(port_4_abs, S_IRUGO, show_port_abs, NULL, 3); +static SENSOR_DEVICE_ATTR(port_5_abs, S_IRUGO, show_port_abs, NULL, 4); +static SENSOR_DEVICE_ATTR(port_6_abs, S_IRUGO, show_port_abs, NULL, 5); +static SENSOR_DEVICE_ATTR(port_7_abs, S_IRUGO, show_port_abs, NULL, 6); +static SENSOR_DEVICE_ATTR(port_8_abs, S_IRUGO, show_port_abs, NULL, 7); +static SENSOR_DEVICE_ATTR(port_9_abs, S_IRUGO, show_port_abs, NULL, 8); +static SENSOR_DEVICE_ATTR(port_10_abs, S_IRUGO, show_port_abs, NULL, 9); +static SENSOR_DEVICE_ATTR(port_11_abs, S_IRUGO, show_port_abs, NULL, 10); +static SENSOR_DEVICE_ATTR(port_12_abs, S_IRUGO, show_port_abs, NULL, 11); +static SENSOR_DEVICE_ATTR(port_13_abs, S_IRUGO, show_port_abs, NULL, 12); +static SENSOR_DEVICE_ATTR(port_14_abs, S_IRUGO, show_port_abs, NULL, 13); +static SENSOR_DEVICE_ATTR(port_15_abs, S_IRUGO, show_port_abs, NULL, 14); +static SENSOR_DEVICE_ATTR(port_16_abs, S_IRUGO, show_port_abs, NULL, 15); +static SENSOR_DEVICE_ATTR(port_17_abs, S_IRUGO, show_port_abs, NULL, 16); +static SENSOR_DEVICE_ATTR(port_18_abs, S_IRUGO, show_port_abs, NULL, 17); +static SENSOR_DEVICE_ATTR(port_19_abs, S_IRUGO, show_port_abs, NULL, 18); +static SENSOR_DEVICE_ATTR(port_20_abs, S_IRUGO, show_port_abs, NULL, 19); +static SENSOR_DEVICE_ATTR(port_21_abs, S_IRUGO, show_port_abs, NULL, 20); +static SENSOR_DEVICE_ATTR(port_22_abs, S_IRUGO, show_port_abs, NULL, 21); +static SENSOR_DEVICE_ATTR(port_23_abs, S_IRUGO, show_port_abs, NULL, 22); +static SENSOR_DEVICE_ATTR(port_24_abs, S_IRUGO, show_port_abs, NULL, 23); +static SENSOR_DEVICE_ATTR(port_25_abs, S_IRUGO, show_port_abs, NULL, 24); +static SENSOR_DEVICE_ATTR(port_26_abs, S_IRUGO, show_port_abs, NULL, 25); +static SENSOR_DEVICE_ATTR(port_27_abs, S_IRUGO, show_port_abs, NULL, 26); +static SENSOR_DEVICE_ATTR(port_28_abs, S_IRUGO, show_port_abs, NULL, 27); +static SENSOR_DEVICE_ATTR(port_29_abs, S_IRUGO, show_port_abs, NULL, 28); +static SENSOR_DEVICE_ATTR(port_30_abs, S_IRUGO, show_port_abs, NULL, 29); +static SENSOR_DEVICE_ATTR(port_31_abs, S_IRUGO, show_port_abs, NULL, 30); +static SENSOR_DEVICE_ATTR(port_32_abs, S_IRUGO, show_port_abs, NULL, 31); +static SENSOR_DEVICE_ATTR(port_33_abs, S_IRUGO, show_port_abs, NULL, 32); +static SENSOR_DEVICE_ATTR(port_34_abs, S_IRUGO, show_port_abs, NULL, 33); +static SENSOR_DEVICE_ATTR(port_35_abs, S_IRUGO, show_port_abs, NULL, 34); +static SENSOR_DEVICE_ATTR(port_36_abs, S_IRUGO, show_port_abs, NULL, 35); +static SENSOR_DEVICE_ATTR(port_37_abs, S_IRUGO, show_port_abs, NULL, 36); +static SENSOR_DEVICE_ATTR(port_38_abs, S_IRUGO, show_port_abs, NULL, 37); +static SENSOR_DEVICE_ATTR(port_39_abs, S_IRUGO, show_port_abs, NULL, 38); +static SENSOR_DEVICE_ATTR(port_40_abs, S_IRUGO, show_port_abs, NULL, 39); +static SENSOR_DEVICE_ATTR(port_41_abs, S_IRUGO, show_port_abs, NULL, 40); +static SENSOR_DEVICE_ATTR(port_42_abs, S_IRUGO, show_port_abs, NULL, 41); +static SENSOR_DEVICE_ATTR(port_43_abs, S_IRUGO, show_port_abs, NULL, 42); +static SENSOR_DEVICE_ATTR(port_44_abs, S_IRUGO, show_port_abs, NULL, 43); +static SENSOR_DEVICE_ATTR(port_45_abs, S_IRUGO, show_port_abs, NULL, 44); +static SENSOR_DEVICE_ATTR(port_46_abs, S_IRUGO, show_port_abs, NULL, 45); +static SENSOR_DEVICE_ATTR(port_47_abs, S_IRUGO, show_port_abs, NULL, 46); +static SENSOR_DEVICE_ATTR(port_48_abs, S_IRUGO, show_port_abs, NULL, 47); +static SENSOR_DEVICE_ATTR(port_49_abs, S_IRUGO, show_port_abs, NULL, 48); +static SENSOR_DEVICE_ATTR(port_50_abs, S_IRUGO, show_port_abs, NULL, 49); +static SENSOR_DEVICE_ATTR(port_51_abs, S_IRUGO, show_port_abs, NULL, 50); +static SENSOR_DEVICE_ATTR(port_52_abs, S_IRUGO, show_port_abs, NULL, 51); +static SENSOR_DEVICE_ATTR(port_53_abs, S_IRUGO, show_port_abs, NULL, 52); +static SENSOR_DEVICE_ATTR(port_54_abs, S_IRUGO, show_port_abs, NULL, 53); +static SENSOR_DEVICE_ATTR(port_55_abs, S_IRUGO, show_port_abs, NULL, 54); +static SENSOR_DEVICE_ATTR(port_56_abs, S_IRUGO, show_port_abs, NULL, 55); +static SENSOR_DEVICE_ATTR(port_57_abs, S_IRUGO, show_port_abs, NULL, 56); +static SENSOR_DEVICE_ATTR(port_58_abs, S_IRUGO, show_port_abs, NULL, 57); +static SENSOR_DEVICE_ATTR(port_59_abs, S_IRUGO, show_port_abs, NULL, 58); +static SENSOR_DEVICE_ATTR(port_60_abs, S_IRUGO, show_port_abs, NULL, 59); +static SENSOR_DEVICE_ATTR(port_61_abs, S_IRUGO, show_port_abs, NULL, 60); +static SENSOR_DEVICE_ATTR(port_62_abs, S_IRUGO, show_port_abs, NULL, 61); +static SENSOR_DEVICE_ATTR(port_63_abs, S_IRUGO, show_port_abs, NULL, 62); +static SENSOR_DEVICE_ATTR(port_64_abs, S_IRUGO, show_port_abs, NULL, 63); + +static SENSOR_DEVICE_ATTR(port_1_rxlos, S_IRUGO, show_port_rxlos, NULL, 0); +static SENSOR_DEVICE_ATTR(port_2_rxlos, S_IRUGO, show_port_rxlos, NULL, 1); +static SENSOR_DEVICE_ATTR(port_3_rxlos, S_IRUGO, show_port_rxlos, NULL, 2); +static SENSOR_DEVICE_ATTR(port_4_rxlos, S_IRUGO, show_port_rxlos, NULL, 3); +static SENSOR_DEVICE_ATTR(port_5_rxlos, S_IRUGO, show_port_rxlos, NULL, 4); +static SENSOR_DEVICE_ATTR(port_6_rxlos, S_IRUGO, show_port_rxlos, NULL, 5); +static SENSOR_DEVICE_ATTR(port_7_rxlos, S_IRUGO, show_port_rxlos, NULL, 6); +static SENSOR_DEVICE_ATTR(port_8_rxlos, S_IRUGO, show_port_rxlos, NULL, 7); +static SENSOR_DEVICE_ATTR(port_9_rxlos, S_IRUGO, show_port_rxlos, NULL, 8); +static SENSOR_DEVICE_ATTR(port_10_rxlos, S_IRUGO, show_port_rxlos, NULL, 9); +static SENSOR_DEVICE_ATTR(port_11_rxlos, S_IRUGO, show_port_rxlos, NULL, 10); +static SENSOR_DEVICE_ATTR(port_12_rxlos, S_IRUGO, show_port_rxlos, NULL, 11); +static SENSOR_DEVICE_ATTR(port_13_rxlos, S_IRUGO, show_port_rxlos, NULL, 12); +static SENSOR_DEVICE_ATTR(port_14_rxlos, S_IRUGO, show_port_rxlos, NULL, 13); +static SENSOR_DEVICE_ATTR(port_15_rxlos, S_IRUGO, show_port_rxlos, NULL, 14); +static SENSOR_DEVICE_ATTR(port_16_rxlos, S_IRUGO, show_port_rxlos, NULL, 15); +static SENSOR_DEVICE_ATTR(port_17_rxlos, S_IRUGO, show_port_rxlos, NULL, 16); +static SENSOR_DEVICE_ATTR(port_18_rxlos, S_IRUGO, show_port_rxlos, NULL, 17); +static SENSOR_DEVICE_ATTR(port_19_rxlos, S_IRUGO, show_port_rxlos, NULL, 18); +static SENSOR_DEVICE_ATTR(port_20_rxlos, S_IRUGO, show_port_rxlos, NULL, 19); +static SENSOR_DEVICE_ATTR(port_21_rxlos, S_IRUGO, show_port_rxlos, NULL, 20); +static SENSOR_DEVICE_ATTR(port_22_rxlos, S_IRUGO, show_port_rxlos, NULL, 21); +static SENSOR_DEVICE_ATTR(port_23_rxlos, S_IRUGO, show_port_rxlos, NULL, 22); +static SENSOR_DEVICE_ATTR(port_24_rxlos, S_IRUGO, show_port_rxlos, NULL, 23); +static SENSOR_DEVICE_ATTR(port_25_rxlos, S_IRUGO, show_port_rxlos, NULL, 24); +static SENSOR_DEVICE_ATTR(port_26_rxlos, S_IRUGO, show_port_rxlos, NULL, 25); +static SENSOR_DEVICE_ATTR(port_27_rxlos, S_IRUGO, show_port_rxlos, NULL, 26); +static SENSOR_DEVICE_ATTR(port_28_rxlos, S_IRUGO, show_port_rxlos, NULL, 27); +static SENSOR_DEVICE_ATTR(port_29_rxlos, S_IRUGO, show_port_rxlos, NULL, 28); +static SENSOR_DEVICE_ATTR(port_30_rxlos, S_IRUGO, show_port_rxlos, NULL, 29); +static SENSOR_DEVICE_ATTR(port_31_rxlos, S_IRUGO, show_port_rxlos, NULL, 30); +static SENSOR_DEVICE_ATTR(port_32_rxlos, S_IRUGO, show_port_rxlos, NULL, 31); +static SENSOR_DEVICE_ATTR(port_33_rxlos, S_IRUGO, show_port_rxlos, NULL, 32); +static SENSOR_DEVICE_ATTR(port_34_rxlos, S_IRUGO, show_port_rxlos, NULL, 33); +static SENSOR_DEVICE_ATTR(port_35_rxlos, S_IRUGO, show_port_rxlos, NULL, 34); +static SENSOR_DEVICE_ATTR(port_36_rxlos, S_IRUGO, show_port_rxlos, NULL, 35); +static SENSOR_DEVICE_ATTR(port_37_rxlos, S_IRUGO, show_port_rxlos, NULL, 36); +static SENSOR_DEVICE_ATTR(port_38_rxlos, S_IRUGO, show_port_rxlos, NULL, 37); +static SENSOR_DEVICE_ATTR(port_39_rxlos, S_IRUGO, show_port_rxlos, NULL, 38); +static SENSOR_DEVICE_ATTR(port_40_rxlos, S_IRUGO, show_port_rxlos, NULL, 39); +static SENSOR_DEVICE_ATTR(port_41_rxlos, S_IRUGO, show_port_rxlos, NULL, 40); +static SENSOR_DEVICE_ATTR(port_42_rxlos, S_IRUGO, show_port_rxlos, NULL, 41); +static SENSOR_DEVICE_ATTR(port_43_rxlos, S_IRUGO, show_port_rxlos, NULL, 42); +static SENSOR_DEVICE_ATTR(port_44_rxlos, S_IRUGO, show_port_rxlos, NULL, 43); +static SENSOR_DEVICE_ATTR(port_45_rxlos, S_IRUGO, show_port_rxlos, NULL, 44); +static SENSOR_DEVICE_ATTR(port_46_rxlos, S_IRUGO, show_port_rxlos, NULL, 45); +static SENSOR_DEVICE_ATTR(port_47_rxlos, S_IRUGO, show_port_rxlos, NULL, 46); +static SENSOR_DEVICE_ATTR(port_48_rxlos, S_IRUGO, show_port_rxlos, NULL, 47); + +static SENSOR_DEVICE_ATTR(port_1_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 0); +static SENSOR_DEVICE_ATTR(port_2_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 1); +static SENSOR_DEVICE_ATTR(port_3_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 2); +static SENSOR_DEVICE_ATTR(port_4_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 3); +static SENSOR_DEVICE_ATTR(port_5_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 4); +static SENSOR_DEVICE_ATTR(port_6_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 5); +static SENSOR_DEVICE_ATTR(port_7_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 6); +static SENSOR_DEVICE_ATTR(port_8_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 7); +static SENSOR_DEVICE_ATTR(port_9_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 8); +static SENSOR_DEVICE_ATTR(port_10_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 9); +static SENSOR_DEVICE_ATTR(port_11_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 10); +static SENSOR_DEVICE_ATTR(port_12_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 11); +static SENSOR_DEVICE_ATTR(port_13_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 12); +static SENSOR_DEVICE_ATTR(port_14_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 13); +static SENSOR_DEVICE_ATTR(port_15_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 14); +static SENSOR_DEVICE_ATTR(port_16_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 15); +static SENSOR_DEVICE_ATTR(port_17_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 16); +static SENSOR_DEVICE_ATTR(port_18_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 17); +static SENSOR_DEVICE_ATTR(port_19_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 18); +static SENSOR_DEVICE_ATTR(port_20_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 19); +static SENSOR_DEVICE_ATTR(port_21_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 20); +static SENSOR_DEVICE_ATTR(port_22_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 21); +static SENSOR_DEVICE_ATTR(port_23_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 22); +static SENSOR_DEVICE_ATTR(port_24_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 23); +static SENSOR_DEVICE_ATTR(port_25_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 24); +static SENSOR_DEVICE_ATTR(port_26_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 25); +static SENSOR_DEVICE_ATTR(port_27_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 26); +static SENSOR_DEVICE_ATTR(port_28_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 27); +static SENSOR_DEVICE_ATTR(port_29_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 28); +static SENSOR_DEVICE_ATTR(port_30_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 29); +static SENSOR_DEVICE_ATTR(port_31_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 30); +static SENSOR_DEVICE_ATTR(port_32_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 31); +static SENSOR_DEVICE_ATTR(port_33_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 32); +static SENSOR_DEVICE_ATTR(port_34_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 33); +static SENSOR_DEVICE_ATTR(port_35_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 34); +static SENSOR_DEVICE_ATTR(port_36_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 35); +static SENSOR_DEVICE_ATTR(port_37_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 36); +static SENSOR_DEVICE_ATTR(port_38_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 37); +static SENSOR_DEVICE_ATTR(port_39_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 38); +static SENSOR_DEVICE_ATTR(port_40_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 39); +static SENSOR_DEVICE_ATTR(port_41_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 40); +static SENSOR_DEVICE_ATTR(port_42_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 41); +static SENSOR_DEVICE_ATTR(port_43_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 42); +static SENSOR_DEVICE_ATTR(port_44_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 43); +static SENSOR_DEVICE_ATTR(port_45_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 44); +static SENSOR_DEVICE_ATTR(port_46_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 45); +static SENSOR_DEVICE_ATTR(port_47_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 46); +static SENSOR_DEVICE_ATTR(port_48_tx_disable, S_IWUSR | S_IRUGO, show_port_tx_disable, set_port_tx_disable, 47); + +static SENSOR_DEVICE_ATTR(port_1_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 0); +static SENSOR_DEVICE_ATTR(port_2_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 1); +static SENSOR_DEVICE_ATTR(port_3_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 2); +static SENSOR_DEVICE_ATTR(port_4_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 3); +static SENSOR_DEVICE_ATTR(port_5_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 4); +static SENSOR_DEVICE_ATTR(port_6_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 5); +static SENSOR_DEVICE_ATTR(port_7_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 6); +static SENSOR_DEVICE_ATTR(port_8_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 7); +static SENSOR_DEVICE_ATTR(port_9_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 8); +static SENSOR_DEVICE_ATTR(port_10_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 9); +static SENSOR_DEVICE_ATTR(port_11_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 10); +static SENSOR_DEVICE_ATTR(port_12_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 11); +static SENSOR_DEVICE_ATTR(port_13_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 12); +static SENSOR_DEVICE_ATTR(port_14_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 13); +static SENSOR_DEVICE_ATTR(port_15_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 14); +static SENSOR_DEVICE_ATTR(port_16_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 15); +static SENSOR_DEVICE_ATTR(port_17_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 16); +static SENSOR_DEVICE_ATTR(port_18_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 17); +static SENSOR_DEVICE_ATTR(port_19_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 18); +static SENSOR_DEVICE_ATTR(port_20_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 19); +static SENSOR_DEVICE_ATTR(port_21_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 20); +static SENSOR_DEVICE_ATTR(port_22_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 21); +static SENSOR_DEVICE_ATTR(port_23_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 22); +static SENSOR_DEVICE_ATTR(port_24_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 23); +static SENSOR_DEVICE_ATTR(port_25_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 24); +static SENSOR_DEVICE_ATTR(port_26_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 25); +static SENSOR_DEVICE_ATTR(port_27_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 26); +static SENSOR_DEVICE_ATTR(port_28_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 27); +static SENSOR_DEVICE_ATTR(port_29_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 28); +static SENSOR_DEVICE_ATTR(port_30_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 29); +static SENSOR_DEVICE_ATTR(port_31_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 30); +static SENSOR_DEVICE_ATTR(port_32_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 31); +static SENSOR_DEVICE_ATTR(port_33_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 32); +static SENSOR_DEVICE_ATTR(port_34_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 33); +static SENSOR_DEVICE_ATTR(port_35_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 34); +static SENSOR_DEVICE_ATTR(port_36_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 35); +static SENSOR_DEVICE_ATTR(port_37_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 36); +static SENSOR_DEVICE_ATTR(port_38_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 37); +static SENSOR_DEVICE_ATTR(port_39_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 38); +static SENSOR_DEVICE_ATTR(port_40_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 39); +static SENSOR_DEVICE_ATTR(port_41_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 40); +static SENSOR_DEVICE_ATTR(port_42_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 41); +static SENSOR_DEVICE_ATTR(port_43_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 42); +static SENSOR_DEVICE_ATTR(port_44_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 43); +static SENSOR_DEVICE_ATTR(port_45_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 44); +static SENSOR_DEVICE_ATTR(port_46_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 45); +static SENSOR_DEVICE_ATTR(port_47_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 46); +static SENSOR_DEVICE_ATTR(port_48_rate_select, S_IWUSR | S_IRUGO, show_port_rate_select, set_port_rate_select, 47); + +static SENSOR_DEVICE_ATTR(fan1_abs, S_IRUGO, show_fan_abs, NULL, 0); +static SENSOR_DEVICE_ATTR(fan2_abs, S_IRUGO, show_fan_abs, NULL, 1); +static SENSOR_DEVICE_ATTR(fan3_abs, S_IRUGO, show_fan_abs, NULL, 2); +static SENSOR_DEVICE_ATTR(fan4_abs, S_IRUGO, show_fan_abs, NULL, 3); +static SENSOR_DEVICE_ATTR(fan5_abs, S_IRUGO, show_fan_abs, NULL, 4); + +static SENSOR_DEVICE_ATTR(fan1_dir, S_IRUGO, show_fan_dir, NULL, 0); +static SENSOR_DEVICE_ATTR(fan2_dir, S_IRUGO, show_fan_dir, NULL, 1); +static SENSOR_DEVICE_ATTR(fan3_dir, S_IRUGO, show_fan_dir, NULL, 2); +static SENSOR_DEVICE_ATTR(fan4_dir, S_IRUGO, show_fan_dir, NULL, 3); +static SENSOR_DEVICE_ATTR(fan5_dir, S_IRUGO, show_fan_dir, NULL, 4); + +static SENSOR_DEVICE_ATTR(psu1_eeprom, S_IRUGO, show_psu_eeprom, NULL, 0); +static SENSOR_DEVICE_ATTR(psu2_eeprom, S_IRUGO, show_psu_eeprom, NULL, 1); + +static SENSOR_DEVICE_ATTR(psu1_vout, S_IRUGO, show_psu_vout, NULL, 0); +static SENSOR_DEVICE_ATTR(psu1_iout, S_IRUGO, show_psu_iout, NULL, 0); +static SENSOR_DEVICE_ATTR(psu1_temp_1, S_IRUGO, show_psu_temp_1, NULL, 0); +static SENSOR_DEVICE_ATTR(psu1_temp_2, S_IRUGO, show_psu_temp_2, NULL, 0); +static SENSOR_DEVICE_ATTR(psu1_fan_speed, S_IRUGO, show_psu_fan_speed, NULL, 0); +static SENSOR_DEVICE_ATTR(psu1_pout, S_IRUGO, show_psu_pout, NULL, 0); +static SENSOR_DEVICE_ATTR(psu1_pin, S_IRUGO, show_psu_pin, NULL, 0); + +static SENSOR_DEVICE_ATTR(psu2_vout, S_IRUGO, show_psu_vout, NULL, 1); +static SENSOR_DEVICE_ATTR(psu2_iout, S_IRUGO, show_psu_iout, NULL, 1); +static SENSOR_DEVICE_ATTR(psu2_temp_1, S_IRUGO, show_psu_temp_1, NULL, 1); +static SENSOR_DEVICE_ATTR(psu2_temp_2, S_IRUGO, show_psu_temp_2, NULL, 1); +static SENSOR_DEVICE_ATTR(psu2_fan_speed, S_IRUGO, show_psu_fan_speed, NULL, 1); +static SENSOR_DEVICE_ATTR(psu2_pout, S_IRUGO, show_psu_pout, NULL, 1); +static SENSOR_DEVICE_ATTR(psu2_pin, S_IRUGO, show_psu_pin, NULL, 1); + +static DEVICE_ATTR(psu_power_off, S_IWUSR, NULL, set_psu_power_off); + +static struct attribute *i2c_bus1_hardware_monitor_attr_huracan[] = { + &dev_attr_eeprom.attr, + &dev_attr_system_led.attr, + + &sensor_dev_attr_port_1_data_a0.dev_attr.attr, + &sensor_dev_attr_port_2_data_a0.dev_attr.attr, + &sensor_dev_attr_port_3_data_a0.dev_attr.attr, + &sensor_dev_attr_port_4_data_a0.dev_attr.attr, + &sensor_dev_attr_port_5_data_a0.dev_attr.attr, + &sensor_dev_attr_port_6_data_a0.dev_attr.attr, + &sensor_dev_attr_port_7_data_a0.dev_attr.attr, + &sensor_dev_attr_port_8_data_a0.dev_attr.attr, + &sensor_dev_attr_port_9_data_a0.dev_attr.attr, + &sensor_dev_attr_port_10_data_a0.dev_attr.attr, + &sensor_dev_attr_port_11_data_a0.dev_attr.attr, + &sensor_dev_attr_port_12_data_a0.dev_attr.attr, + &sensor_dev_attr_port_13_data_a0.dev_attr.attr, + &sensor_dev_attr_port_14_data_a0.dev_attr.attr, + &sensor_dev_attr_port_15_data_a0.dev_attr.attr, + &sensor_dev_attr_port_16_data_a0.dev_attr.attr, + &sensor_dev_attr_port_17_data_a0.dev_attr.attr, + &sensor_dev_attr_port_18_data_a0.dev_attr.attr, + &sensor_dev_attr_port_19_data_a0.dev_attr.attr, + &sensor_dev_attr_port_20_data_a0.dev_attr.attr, + &sensor_dev_attr_port_21_data_a0.dev_attr.attr, + &sensor_dev_attr_port_22_data_a0.dev_attr.attr, + &sensor_dev_attr_port_23_data_a0.dev_attr.attr, + &sensor_dev_attr_port_24_data_a0.dev_attr.attr, + &sensor_dev_attr_port_25_data_a0.dev_attr.attr, + &sensor_dev_attr_port_26_data_a0.dev_attr.attr, + &sensor_dev_attr_port_27_data_a0.dev_attr.attr, + &sensor_dev_attr_port_28_data_a0.dev_attr.attr, + &sensor_dev_attr_port_29_data_a0.dev_attr.attr, + &sensor_dev_attr_port_30_data_a0.dev_attr.attr, + &sensor_dev_attr_port_31_data_a0.dev_attr.attr, + &sensor_dev_attr_port_32_data_a0.dev_attr.attr, + + &sensor_dev_attr_port_1_data_a2.dev_attr.attr, + &sensor_dev_attr_port_2_data_a2.dev_attr.attr, + &sensor_dev_attr_port_3_data_a2.dev_attr.attr, + &sensor_dev_attr_port_4_data_a2.dev_attr.attr, + &sensor_dev_attr_port_5_data_a2.dev_attr.attr, + &sensor_dev_attr_port_6_data_a2.dev_attr.attr, + &sensor_dev_attr_port_7_data_a2.dev_attr.attr, + &sensor_dev_attr_port_8_data_a2.dev_attr.attr, + &sensor_dev_attr_port_9_data_a2.dev_attr.attr, + &sensor_dev_attr_port_10_data_a2.dev_attr.attr, + &sensor_dev_attr_port_11_data_a2.dev_attr.attr, + &sensor_dev_attr_port_12_data_a2.dev_attr.attr, + &sensor_dev_attr_port_13_data_a2.dev_attr.attr, + &sensor_dev_attr_port_14_data_a2.dev_attr.attr, + &sensor_dev_attr_port_15_data_a2.dev_attr.attr, + &sensor_dev_attr_port_16_data_a2.dev_attr.attr, + &sensor_dev_attr_port_17_data_a2.dev_attr.attr, + &sensor_dev_attr_port_18_data_a2.dev_attr.attr, + &sensor_dev_attr_port_19_data_a2.dev_attr.attr, + &sensor_dev_attr_port_20_data_a2.dev_attr.attr, + &sensor_dev_attr_port_21_data_a2.dev_attr.attr, + &sensor_dev_attr_port_22_data_a2.dev_attr.attr, + &sensor_dev_attr_port_23_data_a2.dev_attr.attr, + &sensor_dev_attr_port_24_data_a2.dev_attr.attr, + &sensor_dev_attr_port_25_data_a2.dev_attr.attr, + &sensor_dev_attr_port_26_data_a2.dev_attr.attr, + &sensor_dev_attr_port_27_data_a2.dev_attr.attr, + &sensor_dev_attr_port_28_data_a2.dev_attr.attr, + &sensor_dev_attr_port_29_data_a2.dev_attr.attr, + &sensor_dev_attr_port_30_data_a2.dev_attr.attr, + &sensor_dev_attr_port_31_data_a2.dev_attr.attr, + &sensor_dev_attr_port_32_data_a2.dev_attr.attr, + + &sensor_dev_attr_port_1_abs.dev_attr.attr, + &sensor_dev_attr_port_2_abs.dev_attr.attr, + &sensor_dev_attr_port_3_abs.dev_attr.attr, + &sensor_dev_attr_port_4_abs.dev_attr.attr, + &sensor_dev_attr_port_5_abs.dev_attr.attr, + &sensor_dev_attr_port_6_abs.dev_attr.attr, + &sensor_dev_attr_port_7_abs.dev_attr.attr, + &sensor_dev_attr_port_8_abs.dev_attr.attr, + &sensor_dev_attr_port_9_abs.dev_attr.attr, + &sensor_dev_attr_port_10_abs.dev_attr.attr, + &sensor_dev_attr_port_11_abs.dev_attr.attr, + &sensor_dev_attr_port_12_abs.dev_attr.attr, + &sensor_dev_attr_port_13_abs.dev_attr.attr, + &sensor_dev_attr_port_14_abs.dev_attr.attr, + &sensor_dev_attr_port_15_abs.dev_attr.attr, + &sensor_dev_attr_port_16_abs.dev_attr.attr, + &sensor_dev_attr_port_17_abs.dev_attr.attr, + &sensor_dev_attr_port_18_abs.dev_attr.attr, + &sensor_dev_attr_port_19_abs.dev_attr.attr, + &sensor_dev_attr_port_20_abs.dev_attr.attr, + &sensor_dev_attr_port_21_abs.dev_attr.attr, + &sensor_dev_attr_port_22_abs.dev_attr.attr, + &sensor_dev_attr_port_23_abs.dev_attr.attr, + &sensor_dev_attr_port_24_abs.dev_attr.attr, + &sensor_dev_attr_port_25_abs.dev_attr.attr, + &sensor_dev_attr_port_26_abs.dev_attr.attr, + &sensor_dev_attr_port_27_abs.dev_attr.attr, + &sensor_dev_attr_port_28_abs.dev_attr.attr, + &sensor_dev_attr_port_29_abs.dev_attr.attr, + &sensor_dev_attr_port_30_abs.dev_attr.attr, + &sensor_dev_attr_port_31_abs.dev_attr.attr, + &sensor_dev_attr_port_32_abs.dev_attr.attr, + + &sensor_dev_attr_fan1_abs.dev_attr.attr, + &sensor_dev_attr_fan2_abs.dev_attr.attr, + &sensor_dev_attr_fan3_abs.dev_attr.attr, + &sensor_dev_attr_fan4_abs.dev_attr.attr, + + &sensor_dev_attr_fan1_dir.dev_attr.attr, + &sensor_dev_attr_fan2_dir.dev_attr.attr, + &sensor_dev_attr_fan3_dir.dev_attr.attr, + &sensor_dev_attr_fan4_dir.dev_attr.attr, + + &sensor_dev_attr_psu1_eeprom.dev_attr.attr, + &sensor_dev_attr_psu2_eeprom.dev_attr.attr, + + &sensor_dev_attr_psu1_vout.dev_attr.attr, + &sensor_dev_attr_psu1_iout.dev_attr.attr, + &sensor_dev_attr_psu1_temp_1.dev_attr.attr, + &sensor_dev_attr_psu1_temp_2.dev_attr.attr, + &sensor_dev_attr_psu1_fan_speed.dev_attr.attr, + &sensor_dev_attr_psu1_pout.dev_attr.attr, + &sensor_dev_attr_psu1_pin.dev_attr.attr, + + &sensor_dev_attr_psu2_vout.dev_attr.attr, + &sensor_dev_attr_psu2_iout.dev_attr.attr, + &sensor_dev_attr_psu2_temp_1.dev_attr.attr, + &sensor_dev_attr_psu2_temp_2.dev_attr.attr, + &sensor_dev_attr_psu2_fan_speed.dev_attr.attr, + &sensor_dev_attr_psu2_pout.dev_attr.attr, + &sensor_dev_attr_psu2_pin.dev_attr.attr, + + &dev_attr_psu_power_off.attr, + + NULL +}; + +static struct attribute *i2c_bus1_hardware_monitor_attr_sesto[] = { + &dev_attr_eeprom.attr, + &dev_attr_system_led.attr, + + &sensor_dev_attr_port_1_data_a0.dev_attr.attr, + &sensor_dev_attr_port_2_data_a0.dev_attr.attr, + &sensor_dev_attr_port_3_data_a0.dev_attr.attr, + &sensor_dev_attr_port_4_data_a0.dev_attr.attr, + &sensor_dev_attr_port_5_data_a0.dev_attr.attr, + &sensor_dev_attr_port_6_data_a0.dev_attr.attr, + &sensor_dev_attr_port_7_data_a0.dev_attr.attr, + &sensor_dev_attr_port_8_data_a0.dev_attr.attr, + &sensor_dev_attr_port_9_data_a0.dev_attr.attr, + &sensor_dev_attr_port_10_data_a0.dev_attr.attr, + &sensor_dev_attr_port_11_data_a0.dev_attr.attr, + &sensor_dev_attr_port_12_data_a0.dev_attr.attr, + &sensor_dev_attr_port_13_data_a0.dev_attr.attr, + &sensor_dev_attr_port_14_data_a0.dev_attr.attr, + &sensor_dev_attr_port_15_data_a0.dev_attr.attr, + &sensor_dev_attr_port_16_data_a0.dev_attr.attr, + &sensor_dev_attr_port_17_data_a0.dev_attr.attr, + &sensor_dev_attr_port_18_data_a0.dev_attr.attr, + &sensor_dev_attr_port_19_data_a0.dev_attr.attr, + &sensor_dev_attr_port_20_data_a0.dev_attr.attr, + &sensor_dev_attr_port_21_data_a0.dev_attr.attr, + &sensor_dev_attr_port_22_data_a0.dev_attr.attr, + &sensor_dev_attr_port_23_data_a0.dev_attr.attr, + &sensor_dev_attr_port_24_data_a0.dev_attr.attr, + &sensor_dev_attr_port_25_data_a0.dev_attr.attr, + &sensor_dev_attr_port_26_data_a0.dev_attr.attr, + &sensor_dev_attr_port_27_data_a0.dev_attr.attr, + &sensor_dev_attr_port_28_data_a0.dev_attr.attr, + &sensor_dev_attr_port_29_data_a0.dev_attr.attr, + &sensor_dev_attr_port_30_data_a0.dev_attr.attr, + &sensor_dev_attr_port_31_data_a0.dev_attr.attr, + &sensor_dev_attr_port_32_data_a0.dev_attr.attr, + &sensor_dev_attr_port_33_data_a0.dev_attr.attr, + &sensor_dev_attr_port_34_data_a0.dev_attr.attr, + &sensor_dev_attr_port_35_data_a0.dev_attr.attr, + &sensor_dev_attr_port_36_data_a0.dev_attr.attr, + &sensor_dev_attr_port_37_data_a0.dev_attr.attr, + &sensor_dev_attr_port_38_data_a0.dev_attr.attr, + &sensor_dev_attr_port_39_data_a0.dev_attr.attr, + &sensor_dev_attr_port_40_data_a0.dev_attr.attr, + &sensor_dev_attr_port_41_data_a0.dev_attr.attr, + &sensor_dev_attr_port_42_data_a0.dev_attr.attr, + &sensor_dev_attr_port_43_data_a0.dev_attr.attr, + &sensor_dev_attr_port_44_data_a0.dev_attr.attr, + &sensor_dev_attr_port_45_data_a0.dev_attr.attr, + &sensor_dev_attr_port_46_data_a0.dev_attr.attr, + &sensor_dev_attr_port_47_data_a0.dev_attr.attr, + &sensor_dev_attr_port_48_data_a0.dev_attr.attr, + &sensor_dev_attr_port_49_data_a0.dev_attr.attr, + &sensor_dev_attr_port_50_data_a0.dev_attr.attr, + &sensor_dev_attr_port_51_data_a0.dev_attr.attr, + &sensor_dev_attr_port_52_data_a0.dev_attr.attr, + &sensor_dev_attr_port_53_data_a0.dev_attr.attr, + &sensor_dev_attr_port_54_data_a0.dev_attr.attr, + + &sensor_dev_attr_port_1_data_a2.dev_attr.attr, + &sensor_dev_attr_port_2_data_a2.dev_attr.attr, + &sensor_dev_attr_port_3_data_a2.dev_attr.attr, + &sensor_dev_attr_port_4_data_a2.dev_attr.attr, + &sensor_dev_attr_port_5_data_a2.dev_attr.attr, + &sensor_dev_attr_port_6_data_a2.dev_attr.attr, + &sensor_dev_attr_port_7_data_a2.dev_attr.attr, + &sensor_dev_attr_port_8_data_a2.dev_attr.attr, + &sensor_dev_attr_port_9_data_a2.dev_attr.attr, + &sensor_dev_attr_port_10_data_a2.dev_attr.attr, + &sensor_dev_attr_port_11_data_a2.dev_attr.attr, + &sensor_dev_attr_port_12_data_a2.dev_attr.attr, + &sensor_dev_attr_port_13_data_a2.dev_attr.attr, + &sensor_dev_attr_port_14_data_a2.dev_attr.attr, + &sensor_dev_attr_port_15_data_a2.dev_attr.attr, + &sensor_dev_attr_port_16_data_a2.dev_attr.attr, + &sensor_dev_attr_port_17_data_a2.dev_attr.attr, + &sensor_dev_attr_port_18_data_a2.dev_attr.attr, + &sensor_dev_attr_port_19_data_a2.dev_attr.attr, + &sensor_dev_attr_port_20_data_a2.dev_attr.attr, + &sensor_dev_attr_port_21_data_a2.dev_attr.attr, + &sensor_dev_attr_port_22_data_a2.dev_attr.attr, + &sensor_dev_attr_port_23_data_a2.dev_attr.attr, + &sensor_dev_attr_port_24_data_a2.dev_attr.attr, + &sensor_dev_attr_port_25_data_a2.dev_attr.attr, + &sensor_dev_attr_port_26_data_a2.dev_attr.attr, + &sensor_dev_attr_port_27_data_a2.dev_attr.attr, + &sensor_dev_attr_port_28_data_a2.dev_attr.attr, + &sensor_dev_attr_port_29_data_a2.dev_attr.attr, + &sensor_dev_attr_port_30_data_a2.dev_attr.attr, + &sensor_dev_attr_port_31_data_a2.dev_attr.attr, + &sensor_dev_attr_port_32_data_a2.dev_attr.attr, + &sensor_dev_attr_port_33_data_a2.dev_attr.attr, + &sensor_dev_attr_port_34_data_a2.dev_attr.attr, + &sensor_dev_attr_port_35_data_a2.dev_attr.attr, + &sensor_dev_attr_port_36_data_a2.dev_attr.attr, + &sensor_dev_attr_port_37_data_a2.dev_attr.attr, + &sensor_dev_attr_port_38_data_a2.dev_attr.attr, + &sensor_dev_attr_port_39_data_a2.dev_attr.attr, + &sensor_dev_attr_port_40_data_a2.dev_attr.attr, + &sensor_dev_attr_port_41_data_a2.dev_attr.attr, + &sensor_dev_attr_port_42_data_a2.dev_attr.attr, + &sensor_dev_attr_port_43_data_a2.dev_attr.attr, + &sensor_dev_attr_port_44_data_a2.dev_attr.attr, + &sensor_dev_attr_port_45_data_a2.dev_attr.attr, + &sensor_dev_attr_port_46_data_a2.dev_attr.attr, + &sensor_dev_attr_port_47_data_a2.dev_attr.attr, + &sensor_dev_attr_port_48_data_a2.dev_attr.attr, + &sensor_dev_attr_port_49_data_a2.dev_attr.attr, + &sensor_dev_attr_port_50_data_a2.dev_attr.attr, + &sensor_dev_attr_port_51_data_a2.dev_attr.attr, + &sensor_dev_attr_port_52_data_a2.dev_attr.attr, + &sensor_dev_attr_port_53_data_a2.dev_attr.attr, + &sensor_dev_attr_port_54_data_a2.dev_attr.attr, + + &sensor_dev_attr_port_1_abs.dev_attr.attr, + &sensor_dev_attr_port_2_abs.dev_attr.attr, + &sensor_dev_attr_port_3_abs.dev_attr.attr, + &sensor_dev_attr_port_4_abs.dev_attr.attr, + &sensor_dev_attr_port_5_abs.dev_attr.attr, + &sensor_dev_attr_port_6_abs.dev_attr.attr, + &sensor_dev_attr_port_7_abs.dev_attr.attr, + &sensor_dev_attr_port_8_abs.dev_attr.attr, + &sensor_dev_attr_port_9_abs.dev_attr.attr, + &sensor_dev_attr_port_10_abs.dev_attr.attr, + &sensor_dev_attr_port_11_abs.dev_attr.attr, + &sensor_dev_attr_port_12_abs.dev_attr.attr, + &sensor_dev_attr_port_13_abs.dev_attr.attr, + &sensor_dev_attr_port_14_abs.dev_attr.attr, + &sensor_dev_attr_port_15_abs.dev_attr.attr, + &sensor_dev_attr_port_16_abs.dev_attr.attr, + &sensor_dev_attr_port_17_abs.dev_attr.attr, + &sensor_dev_attr_port_18_abs.dev_attr.attr, + &sensor_dev_attr_port_19_abs.dev_attr.attr, + &sensor_dev_attr_port_20_abs.dev_attr.attr, + &sensor_dev_attr_port_21_abs.dev_attr.attr, + &sensor_dev_attr_port_22_abs.dev_attr.attr, + &sensor_dev_attr_port_23_abs.dev_attr.attr, + &sensor_dev_attr_port_24_abs.dev_attr.attr, + &sensor_dev_attr_port_25_abs.dev_attr.attr, + &sensor_dev_attr_port_26_abs.dev_attr.attr, + &sensor_dev_attr_port_27_abs.dev_attr.attr, + &sensor_dev_attr_port_28_abs.dev_attr.attr, + &sensor_dev_attr_port_29_abs.dev_attr.attr, + &sensor_dev_attr_port_30_abs.dev_attr.attr, + &sensor_dev_attr_port_31_abs.dev_attr.attr, + &sensor_dev_attr_port_32_abs.dev_attr.attr, + &sensor_dev_attr_port_33_abs.dev_attr.attr, + &sensor_dev_attr_port_34_abs.dev_attr.attr, + &sensor_dev_attr_port_35_abs.dev_attr.attr, + &sensor_dev_attr_port_36_abs.dev_attr.attr, + &sensor_dev_attr_port_37_abs.dev_attr.attr, + &sensor_dev_attr_port_38_abs.dev_attr.attr, + &sensor_dev_attr_port_39_abs.dev_attr.attr, + &sensor_dev_attr_port_40_abs.dev_attr.attr, + &sensor_dev_attr_port_41_abs.dev_attr.attr, + &sensor_dev_attr_port_42_abs.dev_attr.attr, + &sensor_dev_attr_port_43_abs.dev_attr.attr, + &sensor_dev_attr_port_44_abs.dev_attr.attr, + &sensor_dev_attr_port_45_abs.dev_attr.attr, + &sensor_dev_attr_port_46_abs.dev_attr.attr, + &sensor_dev_attr_port_47_abs.dev_attr.attr, + &sensor_dev_attr_port_48_abs.dev_attr.attr, + &sensor_dev_attr_port_49_abs.dev_attr.attr, + &sensor_dev_attr_port_50_abs.dev_attr.attr, + &sensor_dev_attr_port_51_abs.dev_attr.attr, + &sensor_dev_attr_port_52_abs.dev_attr.attr, + &sensor_dev_attr_port_53_abs.dev_attr.attr, + &sensor_dev_attr_port_54_abs.dev_attr.attr, + + &sensor_dev_attr_port_1_rxlos.dev_attr.attr, + &sensor_dev_attr_port_2_rxlos.dev_attr.attr, + &sensor_dev_attr_port_3_rxlos.dev_attr.attr, + &sensor_dev_attr_port_4_rxlos.dev_attr.attr, + &sensor_dev_attr_port_5_rxlos.dev_attr.attr, + &sensor_dev_attr_port_6_rxlos.dev_attr.attr, + &sensor_dev_attr_port_7_rxlos.dev_attr.attr, + &sensor_dev_attr_port_8_rxlos.dev_attr.attr, + &sensor_dev_attr_port_9_rxlos.dev_attr.attr, + &sensor_dev_attr_port_10_rxlos.dev_attr.attr, + &sensor_dev_attr_port_11_rxlos.dev_attr.attr, + &sensor_dev_attr_port_12_rxlos.dev_attr.attr, + &sensor_dev_attr_port_13_rxlos.dev_attr.attr, + &sensor_dev_attr_port_14_rxlos.dev_attr.attr, + &sensor_dev_attr_port_15_rxlos.dev_attr.attr, + &sensor_dev_attr_port_16_rxlos.dev_attr.attr, + &sensor_dev_attr_port_17_rxlos.dev_attr.attr, + &sensor_dev_attr_port_18_rxlos.dev_attr.attr, + &sensor_dev_attr_port_19_rxlos.dev_attr.attr, + &sensor_dev_attr_port_20_rxlos.dev_attr.attr, + &sensor_dev_attr_port_21_rxlos.dev_attr.attr, + &sensor_dev_attr_port_22_rxlos.dev_attr.attr, + &sensor_dev_attr_port_23_rxlos.dev_attr.attr, + &sensor_dev_attr_port_24_rxlos.dev_attr.attr, + &sensor_dev_attr_port_25_rxlos.dev_attr.attr, + &sensor_dev_attr_port_26_rxlos.dev_attr.attr, + &sensor_dev_attr_port_27_rxlos.dev_attr.attr, + &sensor_dev_attr_port_28_rxlos.dev_attr.attr, + &sensor_dev_attr_port_29_rxlos.dev_attr.attr, + &sensor_dev_attr_port_30_rxlos.dev_attr.attr, + &sensor_dev_attr_port_31_rxlos.dev_attr.attr, + &sensor_dev_attr_port_32_rxlos.dev_attr.attr, + &sensor_dev_attr_port_33_rxlos.dev_attr.attr, + &sensor_dev_attr_port_34_rxlos.dev_attr.attr, + &sensor_dev_attr_port_35_rxlos.dev_attr.attr, + &sensor_dev_attr_port_36_rxlos.dev_attr.attr, + &sensor_dev_attr_port_37_rxlos.dev_attr.attr, + &sensor_dev_attr_port_38_rxlos.dev_attr.attr, + &sensor_dev_attr_port_39_rxlos.dev_attr.attr, + &sensor_dev_attr_port_40_rxlos.dev_attr.attr, + &sensor_dev_attr_port_41_rxlos.dev_attr.attr, + &sensor_dev_attr_port_42_rxlos.dev_attr.attr, + &sensor_dev_attr_port_43_rxlos.dev_attr.attr, + &sensor_dev_attr_port_44_rxlos.dev_attr.attr, + &sensor_dev_attr_port_45_rxlos.dev_attr.attr, + &sensor_dev_attr_port_46_rxlos.dev_attr.attr, + &sensor_dev_attr_port_47_rxlos.dev_attr.attr, + &sensor_dev_attr_port_48_rxlos.dev_attr.attr, + + &sensor_dev_attr_port_1_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_2_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_3_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_4_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_5_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_6_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_7_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_8_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_9_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_10_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_11_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_12_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_13_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_14_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_15_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_16_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_17_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_18_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_19_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_20_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_21_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_22_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_23_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_24_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_25_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_26_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_27_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_28_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_29_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_30_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_31_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_32_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_33_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_34_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_35_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_36_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_37_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_38_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_39_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_40_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_41_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_42_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_43_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_44_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_45_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_46_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_47_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_48_tx_disable.dev_attr.attr, + + &sensor_dev_attr_port_1_rate_select.dev_attr.attr, + &sensor_dev_attr_port_2_rate_select.dev_attr.attr, + &sensor_dev_attr_port_3_rate_select.dev_attr.attr, + &sensor_dev_attr_port_4_rate_select.dev_attr.attr, + &sensor_dev_attr_port_5_rate_select.dev_attr.attr, + &sensor_dev_attr_port_6_rate_select.dev_attr.attr, + &sensor_dev_attr_port_7_rate_select.dev_attr.attr, + &sensor_dev_attr_port_8_rate_select.dev_attr.attr, + &sensor_dev_attr_port_9_rate_select.dev_attr.attr, + &sensor_dev_attr_port_10_rate_select.dev_attr.attr, + &sensor_dev_attr_port_11_rate_select.dev_attr.attr, + &sensor_dev_attr_port_12_rate_select.dev_attr.attr, + &sensor_dev_attr_port_13_rate_select.dev_attr.attr, + &sensor_dev_attr_port_14_rate_select.dev_attr.attr, + &sensor_dev_attr_port_15_rate_select.dev_attr.attr, + &sensor_dev_attr_port_16_rate_select.dev_attr.attr, + &sensor_dev_attr_port_17_rate_select.dev_attr.attr, + &sensor_dev_attr_port_18_rate_select.dev_attr.attr, + &sensor_dev_attr_port_19_rate_select.dev_attr.attr, + &sensor_dev_attr_port_20_rate_select.dev_attr.attr, + &sensor_dev_attr_port_21_rate_select.dev_attr.attr, + &sensor_dev_attr_port_22_rate_select.dev_attr.attr, + &sensor_dev_attr_port_23_rate_select.dev_attr.attr, + &sensor_dev_attr_port_24_rate_select.dev_attr.attr, + &sensor_dev_attr_port_25_rate_select.dev_attr.attr, + &sensor_dev_attr_port_26_rate_select.dev_attr.attr, + &sensor_dev_attr_port_27_rate_select.dev_attr.attr, + &sensor_dev_attr_port_28_rate_select.dev_attr.attr, + &sensor_dev_attr_port_29_rate_select.dev_attr.attr, + &sensor_dev_attr_port_30_rate_select.dev_attr.attr, + &sensor_dev_attr_port_31_rate_select.dev_attr.attr, + &sensor_dev_attr_port_32_rate_select.dev_attr.attr, + &sensor_dev_attr_port_33_rate_select.dev_attr.attr, + &sensor_dev_attr_port_34_rate_select.dev_attr.attr, + &sensor_dev_attr_port_35_rate_select.dev_attr.attr, + &sensor_dev_attr_port_36_rate_select.dev_attr.attr, + &sensor_dev_attr_port_37_rate_select.dev_attr.attr, + &sensor_dev_attr_port_38_rate_select.dev_attr.attr, + &sensor_dev_attr_port_39_rate_select.dev_attr.attr, + &sensor_dev_attr_port_40_rate_select.dev_attr.attr, + &sensor_dev_attr_port_41_rate_select.dev_attr.attr, + &sensor_dev_attr_port_42_rate_select.dev_attr.attr, + &sensor_dev_attr_port_43_rate_select.dev_attr.attr, + &sensor_dev_attr_port_44_rate_select.dev_attr.attr, + &sensor_dev_attr_port_45_rate_select.dev_attr.attr, + &sensor_dev_attr_port_46_rate_select.dev_attr.attr, + &sensor_dev_attr_port_47_rate_select.dev_attr.attr, + &sensor_dev_attr_port_48_rate_select.dev_attr.attr, + + &sensor_dev_attr_fan1_abs.dev_attr.attr, + &sensor_dev_attr_fan2_abs.dev_attr.attr, + &sensor_dev_attr_fan3_abs.dev_attr.attr, + &sensor_dev_attr_fan4_abs.dev_attr.attr, + + &sensor_dev_attr_fan1_dir.dev_attr.attr, + &sensor_dev_attr_fan2_dir.dev_attr.attr, + &sensor_dev_attr_fan3_dir.dev_attr.attr, + &sensor_dev_attr_fan4_dir.dev_attr.attr, + + &sensor_dev_attr_psu1_eeprom.dev_attr.attr, + &sensor_dev_attr_psu2_eeprom.dev_attr.attr, + + &sensor_dev_attr_psu1_vout.dev_attr.attr, + &sensor_dev_attr_psu1_iout.dev_attr.attr, + &sensor_dev_attr_psu1_temp_1.dev_attr.attr, + &sensor_dev_attr_psu1_temp_2.dev_attr.attr, + &sensor_dev_attr_psu1_fan_speed.dev_attr.attr, + &sensor_dev_attr_psu1_pout.dev_attr.attr, + &sensor_dev_attr_psu1_pin.dev_attr.attr, + + &sensor_dev_attr_psu2_vout.dev_attr.attr, + &sensor_dev_attr_psu2_iout.dev_attr.attr, + &sensor_dev_attr_psu2_temp_1.dev_attr.attr, + &sensor_dev_attr_psu2_temp_2.dev_attr.attr, + &sensor_dev_attr_psu2_fan_speed.dev_attr.attr, + &sensor_dev_attr_psu2_pout.dev_attr.attr, + &sensor_dev_attr_psu2_pin.dev_attr.attr, + + &dev_attr_psu_power_off.attr, + + NULL +}; + +static struct attribute *i2c_bus1_hardware_monitor_attr_nc2x[] = { + &dev_attr_eeprom.attr, + &dev_attr_system_led.attr, + + &sensor_dev_attr_port_1_data_a0.dev_attr.attr, + &sensor_dev_attr_port_2_data_a0.dev_attr.attr, + &sensor_dev_attr_port_3_data_a0.dev_attr.attr, + &sensor_dev_attr_port_4_data_a0.dev_attr.attr, + &sensor_dev_attr_port_5_data_a0.dev_attr.attr, + &sensor_dev_attr_port_6_data_a0.dev_attr.attr, + &sensor_dev_attr_port_7_data_a0.dev_attr.attr, + &sensor_dev_attr_port_8_data_a0.dev_attr.attr, + &sensor_dev_attr_port_9_data_a0.dev_attr.attr, + &sensor_dev_attr_port_10_data_a0.dev_attr.attr, + &sensor_dev_attr_port_11_data_a0.dev_attr.attr, + &sensor_dev_attr_port_12_data_a0.dev_attr.attr, + &sensor_dev_attr_port_13_data_a0.dev_attr.attr, + &sensor_dev_attr_port_14_data_a0.dev_attr.attr, + &sensor_dev_attr_port_15_data_a0.dev_attr.attr, + &sensor_dev_attr_port_16_data_a0.dev_attr.attr, + &sensor_dev_attr_port_17_data_a0.dev_attr.attr, + &sensor_dev_attr_port_18_data_a0.dev_attr.attr, + &sensor_dev_attr_port_19_data_a0.dev_attr.attr, + &sensor_dev_attr_port_20_data_a0.dev_attr.attr, + &sensor_dev_attr_port_21_data_a0.dev_attr.attr, + &sensor_dev_attr_port_22_data_a0.dev_attr.attr, + &sensor_dev_attr_port_23_data_a0.dev_attr.attr, + &sensor_dev_attr_port_24_data_a0.dev_attr.attr, + &sensor_dev_attr_port_25_data_a0.dev_attr.attr, + &sensor_dev_attr_port_26_data_a0.dev_attr.attr, + &sensor_dev_attr_port_27_data_a0.dev_attr.attr, + &sensor_dev_attr_port_28_data_a0.dev_attr.attr, + &sensor_dev_attr_port_29_data_a0.dev_attr.attr, + &sensor_dev_attr_port_30_data_a0.dev_attr.attr, + &sensor_dev_attr_port_31_data_a0.dev_attr.attr, + &sensor_dev_attr_port_32_data_a0.dev_attr.attr, + &sensor_dev_attr_port_33_data_a0.dev_attr.attr, + &sensor_dev_attr_port_34_data_a0.dev_attr.attr, + &sensor_dev_attr_port_35_data_a0.dev_attr.attr, + &sensor_dev_attr_port_36_data_a0.dev_attr.attr, + &sensor_dev_attr_port_37_data_a0.dev_attr.attr, + &sensor_dev_attr_port_38_data_a0.dev_attr.attr, + &sensor_dev_attr_port_39_data_a0.dev_attr.attr, + &sensor_dev_attr_port_40_data_a0.dev_attr.attr, + &sensor_dev_attr_port_41_data_a0.dev_attr.attr, + &sensor_dev_attr_port_42_data_a0.dev_attr.attr, + &sensor_dev_attr_port_43_data_a0.dev_attr.attr, + &sensor_dev_attr_port_44_data_a0.dev_attr.attr, + &sensor_dev_attr_port_45_data_a0.dev_attr.attr, + &sensor_dev_attr_port_46_data_a0.dev_attr.attr, + &sensor_dev_attr_port_47_data_a0.dev_attr.attr, + &sensor_dev_attr_port_48_data_a0.dev_attr.attr, + &sensor_dev_attr_port_49_data_a0.dev_attr.attr, + &sensor_dev_attr_port_50_data_a0.dev_attr.attr, + &sensor_dev_attr_port_51_data_a0.dev_attr.attr, + &sensor_dev_attr_port_52_data_a0.dev_attr.attr, + &sensor_dev_attr_port_53_data_a0.dev_attr.attr, + &sensor_dev_attr_port_54_data_a0.dev_attr.attr, + + &sensor_dev_attr_port_1_data_a2.dev_attr.attr, + &sensor_dev_attr_port_2_data_a2.dev_attr.attr, + &sensor_dev_attr_port_3_data_a2.dev_attr.attr, + &sensor_dev_attr_port_4_data_a2.dev_attr.attr, + &sensor_dev_attr_port_5_data_a2.dev_attr.attr, + &sensor_dev_attr_port_6_data_a2.dev_attr.attr, + &sensor_dev_attr_port_7_data_a2.dev_attr.attr, + &sensor_dev_attr_port_8_data_a2.dev_attr.attr, + &sensor_dev_attr_port_9_data_a2.dev_attr.attr, + &sensor_dev_attr_port_10_data_a2.dev_attr.attr, + &sensor_dev_attr_port_11_data_a2.dev_attr.attr, + &sensor_dev_attr_port_12_data_a2.dev_attr.attr, + &sensor_dev_attr_port_13_data_a2.dev_attr.attr, + &sensor_dev_attr_port_14_data_a2.dev_attr.attr, + &sensor_dev_attr_port_15_data_a2.dev_attr.attr, + &sensor_dev_attr_port_16_data_a2.dev_attr.attr, + &sensor_dev_attr_port_17_data_a2.dev_attr.attr, + &sensor_dev_attr_port_18_data_a2.dev_attr.attr, + &sensor_dev_attr_port_19_data_a2.dev_attr.attr, + &sensor_dev_attr_port_20_data_a2.dev_attr.attr, + &sensor_dev_attr_port_21_data_a2.dev_attr.attr, + &sensor_dev_attr_port_22_data_a2.dev_attr.attr, + &sensor_dev_attr_port_23_data_a2.dev_attr.attr, + &sensor_dev_attr_port_24_data_a2.dev_attr.attr, + &sensor_dev_attr_port_25_data_a2.dev_attr.attr, + &sensor_dev_attr_port_26_data_a2.dev_attr.attr, + &sensor_dev_attr_port_27_data_a2.dev_attr.attr, + &sensor_dev_attr_port_28_data_a2.dev_attr.attr, + &sensor_dev_attr_port_29_data_a2.dev_attr.attr, + &sensor_dev_attr_port_30_data_a2.dev_attr.attr, + &sensor_dev_attr_port_31_data_a2.dev_attr.attr, + &sensor_dev_attr_port_32_data_a2.dev_attr.attr, + &sensor_dev_attr_port_33_data_a2.dev_attr.attr, + &sensor_dev_attr_port_34_data_a2.dev_attr.attr, + &sensor_dev_attr_port_35_data_a2.dev_attr.attr, + &sensor_dev_attr_port_36_data_a2.dev_attr.attr, + &sensor_dev_attr_port_37_data_a2.dev_attr.attr, + &sensor_dev_attr_port_38_data_a2.dev_attr.attr, + &sensor_dev_attr_port_39_data_a2.dev_attr.attr, + &sensor_dev_attr_port_40_data_a2.dev_attr.attr, + &sensor_dev_attr_port_41_data_a2.dev_attr.attr, + &sensor_dev_attr_port_42_data_a2.dev_attr.attr, + &sensor_dev_attr_port_43_data_a2.dev_attr.attr, + &sensor_dev_attr_port_44_data_a2.dev_attr.attr, + &sensor_dev_attr_port_45_data_a2.dev_attr.attr, + &sensor_dev_attr_port_46_data_a2.dev_attr.attr, + &sensor_dev_attr_port_47_data_a2.dev_attr.attr, + &sensor_dev_attr_port_48_data_a2.dev_attr.attr, + &sensor_dev_attr_port_49_data_a2.dev_attr.attr, + &sensor_dev_attr_port_50_data_a2.dev_attr.attr, + &sensor_dev_attr_port_51_data_a2.dev_attr.attr, + &sensor_dev_attr_port_52_data_a2.dev_attr.attr, + &sensor_dev_attr_port_53_data_a2.dev_attr.attr, + &sensor_dev_attr_port_54_data_a2.dev_attr.attr, + + &sensor_dev_attr_port_1_abs.dev_attr.attr, + &sensor_dev_attr_port_2_abs.dev_attr.attr, + &sensor_dev_attr_port_3_abs.dev_attr.attr, + &sensor_dev_attr_port_4_abs.dev_attr.attr, + &sensor_dev_attr_port_5_abs.dev_attr.attr, + &sensor_dev_attr_port_6_abs.dev_attr.attr, + &sensor_dev_attr_port_7_abs.dev_attr.attr, + &sensor_dev_attr_port_8_abs.dev_attr.attr, + &sensor_dev_attr_port_9_abs.dev_attr.attr, + &sensor_dev_attr_port_10_abs.dev_attr.attr, + &sensor_dev_attr_port_11_abs.dev_attr.attr, + &sensor_dev_attr_port_12_abs.dev_attr.attr, + &sensor_dev_attr_port_13_abs.dev_attr.attr, + &sensor_dev_attr_port_14_abs.dev_attr.attr, + &sensor_dev_attr_port_15_abs.dev_attr.attr, + &sensor_dev_attr_port_16_abs.dev_attr.attr, + &sensor_dev_attr_port_17_abs.dev_attr.attr, + &sensor_dev_attr_port_18_abs.dev_attr.attr, + &sensor_dev_attr_port_19_abs.dev_attr.attr, + &sensor_dev_attr_port_20_abs.dev_attr.attr, + &sensor_dev_attr_port_21_abs.dev_attr.attr, + &sensor_dev_attr_port_22_abs.dev_attr.attr, + &sensor_dev_attr_port_23_abs.dev_attr.attr, + &sensor_dev_attr_port_24_abs.dev_attr.attr, + &sensor_dev_attr_port_25_abs.dev_attr.attr, + &sensor_dev_attr_port_26_abs.dev_attr.attr, + &sensor_dev_attr_port_27_abs.dev_attr.attr, + &sensor_dev_attr_port_28_abs.dev_attr.attr, + &sensor_dev_attr_port_29_abs.dev_attr.attr, + &sensor_dev_attr_port_30_abs.dev_attr.attr, + &sensor_dev_attr_port_31_abs.dev_attr.attr, + &sensor_dev_attr_port_32_abs.dev_attr.attr, + &sensor_dev_attr_port_33_abs.dev_attr.attr, + &sensor_dev_attr_port_34_abs.dev_attr.attr, + &sensor_dev_attr_port_35_abs.dev_attr.attr, + &sensor_dev_attr_port_36_abs.dev_attr.attr, + &sensor_dev_attr_port_37_abs.dev_attr.attr, + &sensor_dev_attr_port_38_abs.dev_attr.attr, + &sensor_dev_attr_port_39_abs.dev_attr.attr, + &sensor_dev_attr_port_40_abs.dev_attr.attr, + &sensor_dev_attr_port_41_abs.dev_attr.attr, + &sensor_dev_attr_port_42_abs.dev_attr.attr, + &sensor_dev_attr_port_43_abs.dev_attr.attr, + &sensor_dev_attr_port_44_abs.dev_attr.attr, + &sensor_dev_attr_port_45_abs.dev_attr.attr, + &sensor_dev_attr_port_46_abs.dev_attr.attr, + &sensor_dev_attr_port_47_abs.dev_attr.attr, + &sensor_dev_attr_port_48_abs.dev_attr.attr, + &sensor_dev_attr_port_49_abs.dev_attr.attr, + &sensor_dev_attr_port_50_abs.dev_attr.attr, + &sensor_dev_attr_port_51_abs.dev_attr.attr, + &sensor_dev_attr_port_52_abs.dev_attr.attr, + &sensor_dev_attr_port_53_abs.dev_attr.attr, + &sensor_dev_attr_port_54_abs.dev_attr.attr, + + &sensor_dev_attr_port_1_rxlos.dev_attr.attr, + &sensor_dev_attr_port_2_rxlos.dev_attr.attr, + &sensor_dev_attr_port_3_rxlos.dev_attr.attr, + &sensor_dev_attr_port_4_rxlos.dev_attr.attr, + &sensor_dev_attr_port_5_rxlos.dev_attr.attr, + &sensor_dev_attr_port_6_rxlos.dev_attr.attr, + &sensor_dev_attr_port_7_rxlos.dev_attr.attr, + &sensor_dev_attr_port_8_rxlos.dev_attr.attr, + &sensor_dev_attr_port_9_rxlos.dev_attr.attr, + &sensor_dev_attr_port_10_rxlos.dev_attr.attr, + &sensor_dev_attr_port_11_rxlos.dev_attr.attr, + &sensor_dev_attr_port_12_rxlos.dev_attr.attr, + &sensor_dev_attr_port_13_rxlos.dev_attr.attr, + &sensor_dev_attr_port_14_rxlos.dev_attr.attr, + &sensor_dev_attr_port_15_rxlos.dev_attr.attr, + &sensor_dev_attr_port_16_rxlos.dev_attr.attr, + &sensor_dev_attr_port_17_rxlos.dev_attr.attr, + &sensor_dev_attr_port_18_rxlos.dev_attr.attr, + &sensor_dev_attr_port_19_rxlos.dev_attr.attr, + &sensor_dev_attr_port_20_rxlos.dev_attr.attr, + &sensor_dev_attr_port_21_rxlos.dev_attr.attr, + &sensor_dev_attr_port_22_rxlos.dev_attr.attr, + &sensor_dev_attr_port_23_rxlos.dev_attr.attr, + &sensor_dev_attr_port_24_rxlos.dev_attr.attr, + &sensor_dev_attr_port_25_rxlos.dev_attr.attr, + &sensor_dev_attr_port_26_rxlos.dev_attr.attr, + &sensor_dev_attr_port_27_rxlos.dev_attr.attr, + &sensor_dev_attr_port_28_rxlos.dev_attr.attr, + &sensor_dev_attr_port_29_rxlos.dev_attr.attr, + &sensor_dev_attr_port_30_rxlos.dev_attr.attr, + &sensor_dev_attr_port_31_rxlos.dev_attr.attr, + &sensor_dev_attr_port_32_rxlos.dev_attr.attr, + &sensor_dev_attr_port_33_rxlos.dev_attr.attr, + &sensor_dev_attr_port_34_rxlos.dev_attr.attr, + &sensor_dev_attr_port_35_rxlos.dev_attr.attr, + &sensor_dev_attr_port_36_rxlos.dev_attr.attr, + &sensor_dev_attr_port_37_rxlos.dev_attr.attr, + &sensor_dev_attr_port_38_rxlos.dev_attr.attr, + &sensor_dev_attr_port_39_rxlos.dev_attr.attr, + &sensor_dev_attr_port_40_rxlos.dev_attr.attr, + &sensor_dev_attr_port_41_rxlos.dev_attr.attr, + &sensor_dev_attr_port_42_rxlos.dev_attr.attr, + &sensor_dev_attr_port_43_rxlos.dev_attr.attr, + &sensor_dev_attr_port_44_rxlos.dev_attr.attr, + &sensor_dev_attr_port_45_rxlos.dev_attr.attr, + &sensor_dev_attr_port_46_rxlos.dev_attr.attr, + &sensor_dev_attr_port_47_rxlos.dev_attr.attr, + &sensor_dev_attr_port_48_rxlos.dev_attr.attr, + + &sensor_dev_attr_port_1_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_2_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_3_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_4_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_5_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_6_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_7_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_8_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_9_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_10_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_11_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_12_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_13_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_14_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_15_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_16_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_17_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_18_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_19_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_20_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_21_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_22_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_23_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_24_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_25_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_26_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_27_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_28_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_29_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_30_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_31_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_32_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_33_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_34_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_35_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_36_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_37_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_38_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_39_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_40_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_41_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_42_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_43_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_44_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_45_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_46_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_47_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_48_tx_disable.dev_attr.attr, + + &sensor_dev_attr_fan1_abs.dev_attr.attr, + &sensor_dev_attr_fan2_abs.dev_attr.attr, + &sensor_dev_attr_fan3_abs.dev_attr.attr, + &sensor_dev_attr_fan4_abs.dev_attr.attr, + + &sensor_dev_attr_fan1_dir.dev_attr.attr, + &sensor_dev_attr_fan2_dir.dev_attr.attr, + &sensor_dev_attr_fan3_dir.dev_attr.attr, + &sensor_dev_attr_fan4_dir.dev_attr.attr, + + &sensor_dev_attr_psu1_eeprom.dev_attr.attr, + &sensor_dev_attr_psu2_eeprom.dev_attr.attr, + + &sensor_dev_attr_psu1_vout.dev_attr.attr, + &sensor_dev_attr_psu1_iout.dev_attr.attr, + &sensor_dev_attr_psu1_temp_1.dev_attr.attr, + &sensor_dev_attr_psu1_temp_2.dev_attr.attr, + &sensor_dev_attr_psu1_fan_speed.dev_attr.attr, + &sensor_dev_attr_psu1_pout.dev_attr.attr, + &sensor_dev_attr_psu1_pin.dev_attr.attr, + + &sensor_dev_attr_psu2_vout.dev_attr.attr, + &sensor_dev_attr_psu2_iout.dev_attr.attr, + &sensor_dev_attr_psu2_temp_1.dev_attr.attr, + &sensor_dev_attr_psu2_temp_2.dev_attr.attr, + &sensor_dev_attr_psu2_fan_speed.dev_attr.attr, + &sensor_dev_attr_psu2_pout.dev_attr.attr, + &sensor_dev_attr_psu2_pin.dev_attr.attr, + + &dev_attr_psu_power_off.attr, + + NULL +}; + +static struct attribute *i2c_bus1_hardware_monitor_attr_asterion[] = { + &dev_attr_eeprom.attr, + &dev_attr_system_led.attr, + + &sensor_dev_attr_port_1_data_a0.dev_attr.attr, + &sensor_dev_attr_port_2_data_a0.dev_attr.attr, + &sensor_dev_attr_port_3_data_a0.dev_attr.attr, + &sensor_dev_attr_port_4_data_a0.dev_attr.attr, + &sensor_dev_attr_port_5_data_a0.dev_attr.attr, + &sensor_dev_attr_port_6_data_a0.dev_attr.attr, + &sensor_dev_attr_port_7_data_a0.dev_attr.attr, + &sensor_dev_attr_port_8_data_a0.dev_attr.attr, + &sensor_dev_attr_port_9_data_a0.dev_attr.attr, + &sensor_dev_attr_port_10_data_a0.dev_attr.attr, + &sensor_dev_attr_port_11_data_a0.dev_attr.attr, + &sensor_dev_attr_port_12_data_a0.dev_attr.attr, + &sensor_dev_attr_port_13_data_a0.dev_attr.attr, + &sensor_dev_attr_port_14_data_a0.dev_attr.attr, + &sensor_dev_attr_port_15_data_a0.dev_attr.attr, + &sensor_dev_attr_port_16_data_a0.dev_attr.attr, + &sensor_dev_attr_port_17_data_a0.dev_attr.attr, + &sensor_dev_attr_port_18_data_a0.dev_attr.attr, + &sensor_dev_attr_port_19_data_a0.dev_attr.attr, + &sensor_dev_attr_port_20_data_a0.dev_attr.attr, + &sensor_dev_attr_port_21_data_a0.dev_attr.attr, + &sensor_dev_attr_port_22_data_a0.dev_attr.attr, + &sensor_dev_attr_port_23_data_a0.dev_attr.attr, + &sensor_dev_attr_port_24_data_a0.dev_attr.attr, + &sensor_dev_attr_port_25_data_a0.dev_attr.attr, + &sensor_dev_attr_port_26_data_a0.dev_attr.attr, + &sensor_dev_attr_port_27_data_a0.dev_attr.attr, + &sensor_dev_attr_port_28_data_a0.dev_attr.attr, + &sensor_dev_attr_port_29_data_a0.dev_attr.attr, + &sensor_dev_attr_port_30_data_a0.dev_attr.attr, + &sensor_dev_attr_port_31_data_a0.dev_attr.attr, + &sensor_dev_attr_port_32_data_a0.dev_attr.attr, + &sensor_dev_attr_port_33_data_a0.dev_attr.attr, + &sensor_dev_attr_port_34_data_a0.dev_attr.attr, + &sensor_dev_attr_port_35_data_a0.dev_attr.attr, + &sensor_dev_attr_port_36_data_a0.dev_attr.attr, + &sensor_dev_attr_port_37_data_a0.dev_attr.attr, + &sensor_dev_attr_port_38_data_a0.dev_attr.attr, + &sensor_dev_attr_port_39_data_a0.dev_attr.attr, + &sensor_dev_attr_port_40_data_a0.dev_attr.attr, + &sensor_dev_attr_port_41_data_a0.dev_attr.attr, + &sensor_dev_attr_port_42_data_a0.dev_attr.attr, + &sensor_dev_attr_port_43_data_a0.dev_attr.attr, + &sensor_dev_attr_port_44_data_a0.dev_attr.attr, + &sensor_dev_attr_port_45_data_a0.dev_attr.attr, + &sensor_dev_attr_port_46_data_a0.dev_attr.attr, + &sensor_dev_attr_port_47_data_a0.dev_attr.attr, + &sensor_dev_attr_port_48_data_a0.dev_attr.attr, + &sensor_dev_attr_port_49_data_a0.dev_attr.attr, + &sensor_dev_attr_port_50_data_a0.dev_attr.attr, + &sensor_dev_attr_port_51_data_a0.dev_attr.attr, + &sensor_dev_attr_port_52_data_a0.dev_attr.attr, + &sensor_dev_attr_port_53_data_a0.dev_attr.attr, + &sensor_dev_attr_port_54_data_a0.dev_attr.attr, + &sensor_dev_attr_port_55_data_a0.dev_attr.attr, + &sensor_dev_attr_port_56_data_a0.dev_attr.attr, + &sensor_dev_attr_port_57_data_a0.dev_attr.attr, + &sensor_dev_attr_port_58_data_a0.dev_attr.attr, + &sensor_dev_attr_port_59_data_a0.dev_attr.attr, + &sensor_dev_attr_port_60_data_a0.dev_attr.attr, + &sensor_dev_attr_port_61_data_a0.dev_attr.attr, + &sensor_dev_attr_port_62_data_a0.dev_attr.attr, + &sensor_dev_attr_port_63_data_a0.dev_attr.attr, + &sensor_dev_attr_port_64_data_a0.dev_attr.attr, + + &sensor_dev_attr_port_1_data_a2.dev_attr.attr, + &sensor_dev_attr_port_2_data_a2.dev_attr.attr, + &sensor_dev_attr_port_3_data_a2.dev_attr.attr, + &sensor_dev_attr_port_4_data_a2.dev_attr.attr, + &sensor_dev_attr_port_5_data_a2.dev_attr.attr, + &sensor_dev_attr_port_6_data_a2.dev_attr.attr, + &sensor_dev_attr_port_7_data_a2.dev_attr.attr, + &sensor_dev_attr_port_8_data_a2.dev_attr.attr, + &sensor_dev_attr_port_9_data_a2.dev_attr.attr, + &sensor_dev_attr_port_10_data_a2.dev_attr.attr, + &sensor_dev_attr_port_11_data_a2.dev_attr.attr, + &sensor_dev_attr_port_12_data_a2.dev_attr.attr, + &sensor_dev_attr_port_13_data_a2.dev_attr.attr, + &sensor_dev_attr_port_14_data_a2.dev_attr.attr, + &sensor_dev_attr_port_15_data_a2.dev_attr.attr, + &sensor_dev_attr_port_16_data_a2.dev_attr.attr, + &sensor_dev_attr_port_17_data_a2.dev_attr.attr, + &sensor_dev_attr_port_18_data_a2.dev_attr.attr, + &sensor_dev_attr_port_19_data_a2.dev_attr.attr, + &sensor_dev_attr_port_20_data_a2.dev_attr.attr, + &sensor_dev_attr_port_21_data_a2.dev_attr.attr, + &sensor_dev_attr_port_22_data_a2.dev_attr.attr, + &sensor_dev_attr_port_23_data_a2.dev_attr.attr, + &sensor_dev_attr_port_24_data_a2.dev_attr.attr, + &sensor_dev_attr_port_25_data_a2.dev_attr.attr, + &sensor_dev_attr_port_26_data_a2.dev_attr.attr, + &sensor_dev_attr_port_27_data_a2.dev_attr.attr, + &sensor_dev_attr_port_28_data_a2.dev_attr.attr, + &sensor_dev_attr_port_29_data_a2.dev_attr.attr, + &sensor_dev_attr_port_30_data_a2.dev_attr.attr, + &sensor_dev_attr_port_31_data_a2.dev_attr.attr, + &sensor_dev_attr_port_32_data_a2.dev_attr.attr, + &sensor_dev_attr_port_33_data_a2.dev_attr.attr, + &sensor_dev_attr_port_34_data_a2.dev_attr.attr, + &sensor_dev_attr_port_35_data_a2.dev_attr.attr, + &sensor_dev_attr_port_36_data_a2.dev_attr.attr, + &sensor_dev_attr_port_37_data_a2.dev_attr.attr, + &sensor_dev_attr_port_38_data_a2.dev_attr.attr, + &sensor_dev_attr_port_39_data_a2.dev_attr.attr, + &sensor_dev_attr_port_40_data_a2.dev_attr.attr, + &sensor_dev_attr_port_41_data_a2.dev_attr.attr, + &sensor_dev_attr_port_42_data_a2.dev_attr.attr, + &sensor_dev_attr_port_43_data_a2.dev_attr.attr, + &sensor_dev_attr_port_44_data_a2.dev_attr.attr, + &sensor_dev_attr_port_45_data_a2.dev_attr.attr, + &sensor_dev_attr_port_46_data_a2.dev_attr.attr, + &sensor_dev_attr_port_47_data_a2.dev_attr.attr, + &sensor_dev_attr_port_48_data_a2.dev_attr.attr, + &sensor_dev_attr_port_49_data_a2.dev_attr.attr, + &sensor_dev_attr_port_50_data_a2.dev_attr.attr, + &sensor_dev_attr_port_51_data_a2.dev_attr.attr, + &sensor_dev_attr_port_52_data_a2.dev_attr.attr, + &sensor_dev_attr_port_53_data_a2.dev_attr.attr, + &sensor_dev_attr_port_54_data_a2.dev_attr.attr, + &sensor_dev_attr_port_55_data_a2.dev_attr.attr, + &sensor_dev_attr_port_56_data_a2.dev_attr.attr, + &sensor_dev_attr_port_57_data_a2.dev_attr.attr, + &sensor_dev_attr_port_58_data_a2.dev_attr.attr, + &sensor_dev_attr_port_59_data_a2.dev_attr.attr, + &sensor_dev_attr_port_60_data_a2.dev_attr.attr, + &sensor_dev_attr_port_61_data_a2.dev_attr.attr, + &sensor_dev_attr_port_62_data_a2.dev_attr.attr, + &sensor_dev_attr_port_63_data_a2.dev_attr.attr, + &sensor_dev_attr_port_64_data_a2.dev_attr.attr, + + &sensor_dev_attr_port_1_abs.dev_attr.attr, + &sensor_dev_attr_port_2_abs.dev_attr.attr, + &sensor_dev_attr_port_3_abs.dev_attr.attr, + &sensor_dev_attr_port_4_abs.dev_attr.attr, + &sensor_dev_attr_port_5_abs.dev_attr.attr, + &sensor_dev_attr_port_6_abs.dev_attr.attr, + &sensor_dev_attr_port_7_abs.dev_attr.attr, + &sensor_dev_attr_port_8_abs.dev_attr.attr, + &sensor_dev_attr_port_9_abs.dev_attr.attr, + &sensor_dev_attr_port_10_abs.dev_attr.attr, + &sensor_dev_attr_port_11_abs.dev_attr.attr, + &sensor_dev_attr_port_12_abs.dev_attr.attr, + &sensor_dev_attr_port_13_abs.dev_attr.attr, + &sensor_dev_attr_port_14_abs.dev_attr.attr, + &sensor_dev_attr_port_15_abs.dev_attr.attr, + &sensor_dev_attr_port_16_abs.dev_attr.attr, + &sensor_dev_attr_port_17_abs.dev_attr.attr, + &sensor_dev_attr_port_18_abs.dev_attr.attr, + &sensor_dev_attr_port_19_abs.dev_attr.attr, + &sensor_dev_attr_port_20_abs.dev_attr.attr, + &sensor_dev_attr_port_21_abs.dev_attr.attr, + &sensor_dev_attr_port_22_abs.dev_attr.attr, + &sensor_dev_attr_port_23_abs.dev_attr.attr, + &sensor_dev_attr_port_24_abs.dev_attr.attr, + &sensor_dev_attr_port_25_abs.dev_attr.attr, + &sensor_dev_attr_port_26_abs.dev_attr.attr, + &sensor_dev_attr_port_27_abs.dev_attr.attr, + &sensor_dev_attr_port_28_abs.dev_attr.attr, + &sensor_dev_attr_port_29_abs.dev_attr.attr, + &sensor_dev_attr_port_30_abs.dev_attr.attr, + &sensor_dev_attr_port_31_abs.dev_attr.attr, + &sensor_dev_attr_port_32_abs.dev_attr.attr, + &sensor_dev_attr_port_33_abs.dev_attr.attr, + &sensor_dev_attr_port_34_abs.dev_attr.attr, + &sensor_dev_attr_port_35_abs.dev_attr.attr, + &sensor_dev_attr_port_36_abs.dev_attr.attr, + &sensor_dev_attr_port_37_abs.dev_attr.attr, + &sensor_dev_attr_port_38_abs.dev_attr.attr, + &sensor_dev_attr_port_39_abs.dev_attr.attr, + &sensor_dev_attr_port_40_abs.dev_attr.attr, + &sensor_dev_attr_port_41_abs.dev_attr.attr, + &sensor_dev_attr_port_42_abs.dev_attr.attr, + &sensor_dev_attr_port_43_abs.dev_attr.attr, + &sensor_dev_attr_port_44_abs.dev_attr.attr, + &sensor_dev_attr_port_45_abs.dev_attr.attr, + &sensor_dev_attr_port_46_abs.dev_attr.attr, + &sensor_dev_attr_port_47_abs.dev_attr.attr, + &sensor_dev_attr_port_48_abs.dev_attr.attr, + &sensor_dev_attr_port_49_abs.dev_attr.attr, + &sensor_dev_attr_port_50_abs.dev_attr.attr, + &sensor_dev_attr_port_51_abs.dev_attr.attr, + &sensor_dev_attr_port_52_abs.dev_attr.attr, + &sensor_dev_attr_port_53_abs.dev_attr.attr, + &sensor_dev_attr_port_54_abs.dev_attr.attr, + &sensor_dev_attr_port_55_abs.dev_attr.attr, + &sensor_dev_attr_port_56_abs.dev_attr.attr, + &sensor_dev_attr_port_57_abs.dev_attr.attr, + &sensor_dev_attr_port_58_abs.dev_attr.attr, + &sensor_dev_attr_port_59_abs.dev_attr.attr, + &sensor_dev_attr_port_60_abs.dev_attr.attr, + &sensor_dev_attr_port_61_abs.dev_attr.attr, + &sensor_dev_attr_port_62_abs.dev_attr.attr, + &sensor_dev_attr_port_63_abs.dev_attr.attr, + &sensor_dev_attr_port_64_abs.dev_attr.attr, + + &sensor_dev_attr_port_1_rxlos.dev_attr.attr, + &sensor_dev_attr_port_2_rxlos.dev_attr.attr, + &sensor_dev_attr_port_3_rxlos.dev_attr.attr, + &sensor_dev_attr_port_4_rxlos.dev_attr.attr, + &sensor_dev_attr_port_5_rxlos.dev_attr.attr, + &sensor_dev_attr_port_6_rxlos.dev_attr.attr, + &sensor_dev_attr_port_7_rxlos.dev_attr.attr, + &sensor_dev_attr_port_8_rxlos.dev_attr.attr, + &sensor_dev_attr_port_9_rxlos.dev_attr.attr, + &sensor_dev_attr_port_10_rxlos.dev_attr.attr, + &sensor_dev_attr_port_11_rxlos.dev_attr.attr, + &sensor_dev_attr_port_12_rxlos.dev_attr.attr, + &sensor_dev_attr_port_13_rxlos.dev_attr.attr, + &sensor_dev_attr_port_14_rxlos.dev_attr.attr, + &sensor_dev_attr_port_15_rxlos.dev_attr.attr, + &sensor_dev_attr_port_16_rxlos.dev_attr.attr, + &sensor_dev_attr_port_17_rxlos.dev_attr.attr, + &sensor_dev_attr_port_18_rxlos.dev_attr.attr, + &sensor_dev_attr_port_19_rxlos.dev_attr.attr, + &sensor_dev_attr_port_20_rxlos.dev_attr.attr, + &sensor_dev_attr_port_21_rxlos.dev_attr.attr, + &sensor_dev_attr_port_22_rxlos.dev_attr.attr, + &sensor_dev_attr_port_23_rxlos.dev_attr.attr, + &sensor_dev_attr_port_24_rxlos.dev_attr.attr, + &sensor_dev_attr_port_25_rxlos.dev_attr.attr, + &sensor_dev_attr_port_26_rxlos.dev_attr.attr, + &sensor_dev_attr_port_27_rxlos.dev_attr.attr, + &sensor_dev_attr_port_28_rxlos.dev_attr.attr, + &sensor_dev_attr_port_29_rxlos.dev_attr.attr, + &sensor_dev_attr_port_30_rxlos.dev_attr.attr, + &sensor_dev_attr_port_31_rxlos.dev_attr.attr, + &sensor_dev_attr_port_32_rxlos.dev_attr.attr, + &sensor_dev_attr_port_33_rxlos.dev_attr.attr, + &sensor_dev_attr_port_34_rxlos.dev_attr.attr, + &sensor_dev_attr_port_35_rxlos.dev_attr.attr, + &sensor_dev_attr_port_36_rxlos.dev_attr.attr, + &sensor_dev_attr_port_37_rxlos.dev_attr.attr, + &sensor_dev_attr_port_38_rxlos.dev_attr.attr, + &sensor_dev_attr_port_39_rxlos.dev_attr.attr, + &sensor_dev_attr_port_40_rxlos.dev_attr.attr, + &sensor_dev_attr_port_41_rxlos.dev_attr.attr, + &sensor_dev_attr_port_42_rxlos.dev_attr.attr, + &sensor_dev_attr_port_43_rxlos.dev_attr.attr, + &sensor_dev_attr_port_44_rxlos.dev_attr.attr, + &sensor_dev_attr_port_45_rxlos.dev_attr.attr, + &sensor_dev_attr_port_46_rxlos.dev_attr.attr, + &sensor_dev_attr_port_47_rxlos.dev_attr.attr, + &sensor_dev_attr_port_48_rxlos.dev_attr.attr, + + &sensor_dev_attr_port_1_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_2_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_3_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_4_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_5_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_6_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_7_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_8_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_9_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_10_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_11_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_12_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_13_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_14_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_15_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_16_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_17_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_18_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_19_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_20_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_21_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_22_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_23_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_24_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_25_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_26_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_27_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_28_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_29_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_30_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_31_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_32_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_33_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_34_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_35_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_36_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_37_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_38_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_39_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_40_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_41_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_42_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_43_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_44_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_45_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_46_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_47_tx_disable.dev_attr.attr, + &sensor_dev_attr_port_48_tx_disable.dev_attr.attr, + + &sensor_dev_attr_port_1_rate_select.dev_attr.attr, + &sensor_dev_attr_port_2_rate_select.dev_attr.attr, + &sensor_dev_attr_port_3_rate_select.dev_attr.attr, + &sensor_dev_attr_port_4_rate_select.dev_attr.attr, + &sensor_dev_attr_port_5_rate_select.dev_attr.attr, + &sensor_dev_attr_port_6_rate_select.dev_attr.attr, + &sensor_dev_attr_port_7_rate_select.dev_attr.attr, + &sensor_dev_attr_port_8_rate_select.dev_attr.attr, + &sensor_dev_attr_port_9_rate_select.dev_attr.attr, + &sensor_dev_attr_port_10_rate_select.dev_attr.attr, + &sensor_dev_attr_port_11_rate_select.dev_attr.attr, + &sensor_dev_attr_port_12_rate_select.dev_attr.attr, + &sensor_dev_attr_port_13_rate_select.dev_attr.attr, + &sensor_dev_attr_port_14_rate_select.dev_attr.attr, + &sensor_dev_attr_port_15_rate_select.dev_attr.attr, + &sensor_dev_attr_port_16_rate_select.dev_attr.attr, + &sensor_dev_attr_port_17_rate_select.dev_attr.attr, + &sensor_dev_attr_port_18_rate_select.dev_attr.attr, + &sensor_dev_attr_port_19_rate_select.dev_attr.attr, + &sensor_dev_attr_port_20_rate_select.dev_attr.attr, + &sensor_dev_attr_port_21_rate_select.dev_attr.attr, + &sensor_dev_attr_port_22_rate_select.dev_attr.attr, + &sensor_dev_attr_port_23_rate_select.dev_attr.attr, + &sensor_dev_attr_port_24_rate_select.dev_attr.attr, + &sensor_dev_attr_port_25_rate_select.dev_attr.attr, + &sensor_dev_attr_port_26_rate_select.dev_attr.attr, + &sensor_dev_attr_port_27_rate_select.dev_attr.attr, + &sensor_dev_attr_port_28_rate_select.dev_attr.attr, + &sensor_dev_attr_port_29_rate_select.dev_attr.attr, + &sensor_dev_attr_port_30_rate_select.dev_attr.attr, + &sensor_dev_attr_port_31_rate_select.dev_attr.attr, + &sensor_dev_attr_port_32_rate_select.dev_attr.attr, + &sensor_dev_attr_port_33_rate_select.dev_attr.attr, + &sensor_dev_attr_port_34_rate_select.dev_attr.attr, + &sensor_dev_attr_port_35_rate_select.dev_attr.attr, + &sensor_dev_attr_port_36_rate_select.dev_attr.attr, + &sensor_dev_attr_port_37_rate_select.dev_attr.attr, + &sensor_dev_attr_port_38_rate_select.dev_attr.attr, + &sensor_dev_attr_port_39_rate_select.dev_attr.attr, + &sensor_dev_attr_port_40_rate_select.dev_attr.attr, + &sensor_dev_attr_port_41_rate_select.dev_attr.attr, + &sensor_dev_attr_port_42_rate_select.dev_attr.attr, + &sensor_dev_attr_port_43_rate_select.dev_attr.attr, + &sensor_dev_attr_port_44_rate_select.dev_attr.attr, + &sensor_dev_attr_port_45_rate_select.dev_attr.attr, + &sensor_dev_attr_port_46_rate_select.dev_attr.attr, + &sensor_dev_attr_port_47_rate_select.dev_attr.attr, + &sensor_dev_attr_port_48_rate_select.dev_attr.attr, + + &sensor_dev_attr_fan1_abs.dev_attr.attr, + &sensor_dev_attr_fan2_abs.dev_attr.attr, + &sensor_dev_attr_fan3_abs.dev_attr.attr, + &sensor_dev_attr_fan4_abs.dev_attr.attr, + &sensor_dev_attr_fan5_abs.dev_attr.attr, + + &sensor_dev_attr_fan1_dir.dev_attr.attr, + &sensor_dev_attr_fan2_dir.dev_attr.attr, + &sensor_dev_attr_fan3_dir.dev_attr.attr, + &sensor_dev_attr_fan4_dir.dev_attr.attr, + &sensor_dev_attr_fan5_dir.dev_attr.attr, + + &sensor_dev_attr_psu1_eeprom.dev_attr.attr, + &sensor_dev_attr_psu2_eeprom.dev_attr.attr, + + &sensor_dev_attr_psu1_vout.dev_attr.attr, + &sensor_dev_attr_psu1_iout.dev_attr.attr, + &sensor_dev_attr_psu1_temp_1.dev_attr.attr, + &sensor_dev_attr_psu1_temp_2.dev_attr.attr, + &sensor_dev_attr_psu1_fan_speed.dev_attr.attr, + &sensor_dev_attr_psu1_pout.dev_attr.attr, + &sensor_dev_attr_psu1_pin.dev_attr.attr, + + &sensor_dev_attr_psu2_vout.dev_attr.attr, + &sensor_dev_attr_psu2_iout.dev_attr.attr, + &sensor_dev_attr_psu2_temp_1.dev_attr.attr, + &sensor_dev_attr_psu2_temp_2.dev_attr.attr, + &sensor_dev_attr_psu2_fan_speed.dev_attr.attr, + &sensor_dev_attr_psu2_pout.dev_attr.attr, + &sensor_dev_attr_psu2_pin.dev_attr.attr, + + &dev_attr_psu_power_off.attr, + + NULL +}; + +static void i2c_bus0_devices_client_address_init(struct i2c_client *client) +{ + int index; + + pca9535pwr_client = *client; + pca9535pwr_client.addr = 0x27; + + cpld_client = *client; + cpld_client.addr = 0x33; + + pca9548_client_bus0 = *client; + pca9548_client_bus0.addr = 0x70; + + for (index=0; index<4; index++) + { + pca9535_client_bus0[index] = *client; + pca9535_client_bus0[index].addr = (0x20+index); + } + + eeprom_client_bus0 = *client; + eeprom_client_bus0.addr = 0x56; + + mp2953agu_client = *client; + mp2953agu_client.addr = 0x21; + + chl8325a_client = *client; + chl8325a_client.addr = 0x32; + + psu_eeprom_client_bus0= *client; + psu_eeprom_client_bus0.addr = 0x51; + + psu_mcu_client_bus0= *client; + psu_mcu_client_bus0.addr = 0x59; +} + +static void i2c_bus0_hardware_monitor_hw_default_config(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct i2c_bus0_hardware_monitor_data *data = i2c_get_clientdata(client); + unsigned int hiByte, lowByte, configByte; + int i; + + i2c_bus0_devices_client_address_init(client); + + mutex_lock(&data->lock); + + /* Get Board Type and Revision */ + lowByte = i2c_smbus_read_byte_data(&cpld_client, CPLD_REG_GENERAL_0x00); + data->buildRev = (lowByte&0x03); + data->hwRev = ((lowByte>>2)&0x03); + data->modelId = ((lowByte>>4)&0x0f); + + platformBuildRev = data->buildRev; + platformHwRev = data->hwRev; + platformModelId = data->modelId; + + switch(data->modelId) + { + case HURACAN_WITH_BMC: /* 0000: Huracan with BMC */ + case CABRERAIII_WITH_BMC: /* 0010: Cabrera3 with BMC */ + case SESTO_WITH_BMC: /* 0100: Sesto with BMC */ + case NCIIX_WITH_BMC: /* 0110: New Cabrera-II X with BMC */ + case ASTERION_WITH_BMC: /* 1000: Asterion with BMC */ + case HURACAN_A_WITH_BMC: /* 1010: Huracan-A with BMC */ + isBMCSupport = 1; + break; + + default: + isBMCSupport = 0; + break; + } + + if (isBMCSupport == 0) + { + /* Choose W83795ADG bank 0 */ + i2c_smbus_write_byte_data(client, W83795ADG_REG_BANK, 0x00); + /* Disable monitoring operations */ + configByte = i2c_smbus_read_byte_data(client, W83795ADG_REG_CONFIG); + configByte &= 0xfe; + i2c_smbus_write_byte_data(client, W83795ADG_REG_CONFIG, configByte); + + /* Choose W83795ADG bank 2 */ + i2c_smbus_write_byte_data(client, W83795ADG_REG_BANK, 0x02); + lowByte = i2c_smbus_read_byte_data(client, W83795ADG_REG_VENDOR_ID); + i2c_smbus_write_byte_data(client, W83795ADG_REG_BANK, 0x82); + hiByte = i2c_smbus_read_byte_data(client, W83795ADG_REG_VENDOR_ID); + /* Get vender id */ + data->venderId = (hiByte<<8) + lowByte; + /* Get chip id */ + data->chipId= i2c_smbus_read_byte_data(client, W83795ADG_REG_CHIP_ID); + /* Get device id */ + data->dviceId= i2c_smbus_read_byte_data(client, W83795ADG_REG_DEVICE_ID); + + /* set FANCTL8 ¡V FANCTL1 output mode control to PWM output duty cycle mode. */ + i2c_smbus_write_byte_data(client, W83795ADG_REG_FOMC, 0x00); + i2c_smbus_write_byte_data(client, W83795ADG_REG_F1OV, 0xff); + i2c_smbus_write_byte_data(client, W83795ADG_REG_F2OV, 0xff); + + /* Choose W83795ADG bank 0 */ + i2c_smbus_write_byte_data(client, W83795ADG_REG_BANK, 0x00); + /* Enable TR1~TR4 thermistor temperature monitoring */ + i2c_smbus_write_byte_data(client, W83795ADG_REG_TEMP_CTRL2, 0xff); + /* Enable monitoring operations */ + configByte |= 0x01; + i2c_smbus_write_byte_data(client, W83795ADG_REG_CONFIG, configByte); + } + + /* CPLD Revision */ + lowByte = i2c_smbus_read_byte_data(&cpld_client, CPLD_REG_GENERAL_0x01); + data->cpldRev = (lowByte&0x3f); + data->cpldRel = ((lowByte>>6)&0x01); + + /* turn on all LEDs of front port */ + i2c_smbus_write_byte_data(&cpld_client, CPLD_REG_RESET_0x34, 0x10); + + switch(data->modelId) + { + case NCIIX_WITH_BMC: + case NCIIX_WITHOUT_BMC: + /* Turn on PCA9548#0 channel 3 on I2C-bus0 */ + i2c_smbus_write_byte(&pca9548_client_bus0, (1<lock); +} + +static void i2c_bus1_devices_client_address_init(struct i2c_client *client) +{ + int index; + + for (index=0; index<4; index++) + { + pca9548_client[index] = *client; + pca9548_client[index].addr = (0x71+index); + } + + for (index=0; index<6; index++) + { + pca9535pwr_client_bus1[index] = *client; + pca9535pwr_client_bus1[index].addr = (0x20+index); + } + + qsfpDataA0_client = *client; + qsfpDataA0_client.addr = 0x50; + + qsfpDataA2_client = *client; + qsfpDataA2_client.addr = 0x51; + + eeprom_client = *client; + eeprom_client.addr = 0x54; + + eeprom_client_2 = *client; + eeprom_client_2.addr = 0x56; + + psu_eeprom_client = *client; + psu_eeprom_client.addr = 0x50; + + psu_mcu_client = *client; + psu_mcu_client.addr = 0x58; + } + +static void i2c_bus1_io_expander_default_set(struct i2c_client *client) +{ + struct i2c_bus1_hardware_monitor_data *data = i2c_get_clientdata(client); + int i; + + switch (platformModelId) + { + case HURACAN_WITH_BMC: + case HURACAN_WITHOUT_BMC: + case HURACAN_A_WITH_BMC: + case HURACAN_A_WITHOUT_BMC: + /* Turn on PCA9548 channel 4 on I2C-bus1 */ + i2c_smbus_write_byte(client, (1<frontLedStatus); + i2c_device_word_write(&(pca9535pwr_client_bus1[2]), PCA9553_COMMAND_BYTE_REG_POLARITY_INVERSION_0, 0x0000); + i2c_device_word_write(&(pca9535pwr_client_bus1[2]), PCA9553_COMMAND_BYTE_REG_CONFIGURATION_0, 0x0000); + } + } + + /* Turn off PCA9548 all channels on I2C-bus1 */ + i2c_smbus_write_byte(client, 0x00); + break; + + case CABRERAIII_WITH_BMC: + case CABRERAIII_WITHOUT_BMC: + break; + + case SESTO_WITH_BMC: + case SESTO_WITHOUT_BMC: + /* Turn on PCA9548#1 channel 0 on I2C-bus1 - ABS# */ + i2c_smbus_write_byte(&(pca9548_client[1]), (1<frontLedStatus); + i2c_device_word_write(&(pca9535pwr_client_bus1[2]), PCA9553_COMMAND_BYTE_REG_POLARITY_INVERSION_0, 0x0000); + i2c_device_word_write(&(pca9535pwr_client_bus1[2]), PCA9553_COMMAND_BYTE_REG_CONFIGURATION_0, 0x0000); + /* Turn off PCA9548#0 all channels on I2C-bus1 */ + i2c_smbus_write_byte(client, 0x00); + } + + /* Turn off PCA9548#1 all channels on I2C-bus1 */ + i2c_smbus_write_byte(&(pca9548_client[1]), 0x00); + break; + + case NCIIX_WITH_BMC: + case NCIIX_WITHOUT_BMC: + /* Turn on PCA9548#1 channel 0 on I2C-bus1 */ + i2c_smbus_write_byte(client, (1<lock); + /* Turn off PCA9548 all channels on I2C-bus1 */ + i2c_smbus_write_byte(client, 0x00); + + data->frontLedStatus = 0x00aa; + for (i=0; i<3; i++) + data->sfpPortRateSelect[i] = 0xffff; + i2c_bus1_io_expander_default_set(client); + + mutex_unlock(&data->lock); +} + +/* Return 0 if detection is successful, -ENODEV otherwise */ +static int w83795adg_hardware_monitor_detect(struct i2c_client *client, + struct i2c_board_info *info) +{ + struct i2c_adapter *adapter = client->adapter; + + if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) + { + printk(KERN_ERR "i2c_check_functionality fail.\n"); + return -ENODEV; + } + + if(adapter->nr == 0x0) + { + unsigned int hiByte, lowByte, value; + + if (client->addr != 0x2F) + return -ENODEV; + + /* Choose W83795ADG bank 2 */ + i2c_smbus_write_byte_data(client, W83795ADG_REG_BANK, 0x02); + lowByte = i2c_smbus_read_byte_data(client, W83795ADG_REG_VENDOR_ID); + i2c_smbus_write_byte_data(client, W83795ADG_REG_BANK, 0x82); + hiByte = i2c_smbus_read_byte_data(client, W83795ADG_REG_VENDOR_ID); + /* Get vender id */ + value= (hiByte<<8) + lowByte; + if (value != W83795ADG_VENDOR_ID) + { + printk(KERN_ERR "%s(%d): W83795ADG_REG_VENDOR_ID fail.\n", __func__, __LINE__); + return -ENODEV; + } + + value = i2c_smbus_read_byte_data(client, W83795ADG_REG_CHIP_ID); + if (value != W83795ADG_CHIP_ID) + { + printk(KERN_ERR "%s(%d): W83795ADG_REG_CHIP_ID fail.\n", __func__, __LINE__); + return -ENODEV; + } + } + + strlcpy(info->type, "HURACAN", I2C_NAME_SIZE); + return 0; +} + +static int w83795adg_hardware_monitor_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + int err = 0; + + if(client->adapter->nr == 0x0) + { + struct i2c_bus0_hardware_monitor_data *data = NULL; + + if (client->addr != 0x2F) + return -ENODEV; + + data = devm_kzalloc(&client->dev, sizeof(struct i2c_bus0_hardware_monitor_data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + memset(data, 0, sizeof(struct i2c_bus0_hardware_monitor_data)); + mutex_init(&data->lock); + i2c_set_clientdata(client, data); + + dev_info(&client->dev, "%s device found on bus %d\n", client->name, client->adapter->nr); + + /* Set Pre-defined HW config */ + i2c_bus0_hardware_monitor_hw_default_config(client, id); + /* Register sysfs hooks */ + switch (platformModelId) + { + case NCIIX_WITH_BMC: + case NCIIX_WITHOUT_BMC: + data->hwmon_group.attrs = i2c_bus0_hardware_monitor_attr_nc2x; + break; + + case ASTERION_WITH_BMC: + case ASTERION_WITHOUT_BMC: + data->hwmon_group.attrs = i2c_bus0_hardware_monitor_attr_asterion; + w83795adg_normal_i2c[1] = 0x72; + break; + + default: + data->hwmon_group.attrs = i2c_bus0_hardware_monitor_attr; + break; + } + err = sysfs_create_group(&client->dev.kobj, &data->hwmon_group); + if (err) + { + printk(KERN_ERR "hwmon_group sysfs_create_group fail.\n"); + } + else + { + data->hwmon_dev = hwmon_device_register(&client->dev); + if (IS_ERR(data->hwmon_dev)) { + printk(KERN_ERR "hwmon_device_register fail.\n"); + err = PTR_ERR(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &data->hwmon_group); + } + + init_completion(&data->auto_update_stop); + data->auto_update = kthread_run(i2c_bus0_hardware_monitor_update_thread, client, dev_name(data->hwmon_dev)); + if (IS_ERR(data->auto_update)) { + err = PTR_ERR(data->auto_update); + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &data->hwmon_group); + } + } + } + else if(client->adapter->nr == 0x1) + { + struct i2c_bus1_hardware_monitor_data *data = NULL; + + data = devm_kzalloc(&client->dev, sizeof(struct i2c_bus1_hardware_monitor_data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + memset(data, 0, sizeof(struct i2c_bus1_hardware_monitor_data)); + mutex_init(&data->lock); + i2c_set_clientdata(client, data); + + dev_info(&client->dev, "%s device found on bus %d\n", client->name, client->adapter->nr); + + /* Set Pre-defined HW config */ + i2c_bus1_hardware_monitor_hw_default_config(client, id); + /* Register sysfs hooks */ + + switch (platformModelId) + { + default: + case HURACAN_WITH_BMC: + case HURACAN_WITHOUT_BMC: + case HURACAN_A_WITH_BMC: + case HURACAN_A_WITHOUT_BMC: + data->hwmon_group.attrs = i2c_bus1_hardware_monitor_attr_huracan; + break; + + case CABRERAIII_WITH_BMC: + case CABRERAIII_WITHOUT_BMC: + break; + + case SESTO_WITH_BMC: + case SESTO_WITHOUT_BMC: + data->hwmon_group.attrs = i2c_bus1_hardware_monitor_attr_sesto; + break; + + case NCIIX_WITH_BMC: + case NCIIX_WITHOUT_BMC: + data->hwmon_group.attrs = i2c_bus1_hardware_monitor_attr_nc2x; + break; + + case ASTERION_WITH_BMC: + case ASTERION_WITHOUT_BMC: + data->hwmon_group.attrs = i2c_bus1_hardware_monitor_attr_asterion; + break; + } + err = sysfs_create_group(&client->dev.kobj, &data->hwmon_group); + if (err) + { + printk(KERN_INFO "hwmon_group1 sysfs_create_group fail.\n"); + } + else + { + data->hwmon_dev = hwmon_device_register(&client->dev); + if (IS_ERR(data->hwmon_dev)) { + printk(KERN_INFO "hwmon_device_register1 fail.\n"); + err = PTR_ERR(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &data->hwmon_group); + } + else + { + init_completion(&data->auto_update_stop); + data->auto_update = kthread_run(i2c_bus1_hardware_monitor_update_thread, client, dev_name(data->hwmon_dev)); + if (IS_ERR(data->auto_update)) { + err = PTR_ERR(data->auto_update); + + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &data->hwmon_group); + } + } + } + } + + return err; +} + +static int w83795adg_hardware_monitor_remove(struct i2c_client *client) +{ + if(client->adapter->nr == 0x0) + { + struct i2c_bus0_hardware_monitor_data *data = i2c_get_clientdata(client); + kthread_stop(data->auto_update); + wait_for_completion(&data->auto_update_stop); + /* Watchdog Control Register Support */ + if (data->cpldRev != 0) + { + /* Disable WD function */ + i2c_smbus_write_byte_data(&cpld_client, CPLD_REG_GENERAL_0x06, 0x00); + } + + /* turn off all LEDs of front port */ + i2c_smbus_write_byte_data(&cpld_client, CPLD_REG_RESET_0x34, 0x00); + i2c_smbus_write_byte_data(&cpld_client, CPLD_REG_LED_0x40, 0x00); + i2c_smbus_write_byte_data(&cpld_client, CPLD_REG_LED_0x44, 0x00); + + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &data->hwmon_group); + } + else if(client->adapter->nr == 0x1) + { + struct i2c_bus1_hardware_monitor_data *data = i2c_get_clientdata(client); + kthread_stop(data->auto_update); + wait_for_completion(&data->auto_update_stop); + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &data->hwmon_group); + } + return 0; +} + +static void w83795adg_hardware_monitor_shutdown(struct i2c_client *client) +{ + if(client->adapter->nr == 0x0) + { + struct i2c_bus0_hardware_monitor_data *data = i2c_get_clientdata(client); + kthread_stop(data->auto_update); + wait_for_completion(&data->auto_update_stop); + /* Watchdog Control Register Support */ + if (data->cpldRev != 0) + { + /* Disable WD function */ + i2c_smbus_write_byte_data(&cpld_client, CPLD_REG_GENERAL_0x06, 0x00); + } + + /* turn off all LEDs of front port */ + i2c_smbus_write_byte_data(&cpld_client, CPLD_REG_RESET_0x34, 0x00); + i2c_smbus_write_byte_data(&cpld_client, CPLD_REG_LED_0x40, 0x00); + i2c_smbus_write_byte_data(&cpld_client, CPLD_REG_LED_0x44, 0x00); + /* reset MAC */ + i2c_smbus_write_byte_data(&cpld_client, CPLD_REG_RESET_0x30, 0x6e); + i2c_smbus_write_byte_data(&cpld_client, CPLD_REG_RESET_0x30, 0x6f); + + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &data->hwmon_group); + } + else if(client->adapter->nr == 0x1) + { + struct i2c_bus1_hardware_monitor_data *data = i2c_get_clientdata(client); + kthread_stop(data->auto_update); + wait_for_completion(&data->auto_update_stop); + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &data->hwmon_group); + } +} + +module_i2c_driver(w83795adg_hardware_monitor_driver); + +MODULE_AUTHOR("Raymond Huey "); +MODULE_DESCRIPTION("Foxconn W83795ADG Hardware Monitor driver"); +MODULE_LICENSE("GPL"); diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/.gitignore b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/.gitignore new file mode 100755 index 00000000..b0bf46e1 --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/.gitignore @@ -0,0 +1,2 @@ +*x86*64*netberg*aurora*620*rangeley*.mk +onlpdump.mk diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/Makefile b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/Makefile new file mode 100755 index 00000000..003238cf --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/modules/Makefile b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/modules/Makefile new file mode 100755 index 00000000..003238cf --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/modules/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/modules/PKG.yml b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/modules/PKG.yml new file mode 100755 index 00000000..ef81caea --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/modules/PKG.yml @@ -0,0 +1 @@ +!include $ONL_TEMPLATES/no-platform-modules.yml ARCH=amd64 VENDOR=netberg BASENAME=x86-64-netberg-aurora-620-rangeley diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/Makefile b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/Makefile new file mode 100755 index 00000000..003238cf --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/PKG.yml b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/PKG.yml new file mode 100755 index 00000000..3628e833 --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/PKG.yml @@ -0,0 +1 @@ +!include $ONL_TEMPLATES/onlp-platform-any.yml PLATFORM=x86-64-netberg-aurora-620-rangeley ARCH=amd64 TOOLCHAIN=x86_64-linux-gnu diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/Makefile b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/Makefile new file mode 100755 index 00000000..e7437cb2 --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/Makefile @@ -0,0 +1,2 @@ +FILTER=src +include $(ONL)/make/subdirs.mk diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/lib/Makefile b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/lib/Makefile new file mode 100755 index 00000000..473537ab --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/lib/Makefile @@ -0,0 +1,45 @@ +############################################################ +# +# +# Copyright 2014 BigSwitch Networks, Inc. +# +# Licensed under the Eclipse Public License, Version 1.0 (the +# "License"); you may not use this file except in compliance +# with the License. You may obtain a copy of the License at +# +# http://www.eclipse.org/legal/epl-v10.html +# +# Unless required by applicable law or agreed to in writing, +# software distributed under the License is distributed on an +# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, +# either express or implied. See the License for the specific +# language governing permissions and limitations under the +# License. +# +# +############################################################ +# +# +############################################################ +include $(ONL)/make/config.amd64.mk + +MODULE := libonlp-x86-64-netberg-aurora-620-rangeley +include $(BUILDER)/standardinit.mk + +DEPENDMODULES := AIM IOF x86_64_netberg_aurora_620_rangeley onlplib +DEPENDMODULE_HEADERS := sff + +include $(BUILDER)/dependmodules.mk + +SHAREDLIB := libonlp-x86-64-netberg-aurora-620-rangeley.so +$(SHAREDLIB)_TARGETS := $(ALL_TARGETS) +include $(BUILDER)/so.mk +.DEFAULT_GOAL := $(SHAREDLIB) + +GLOBAL_CFLAGS += -I$(onlp_BASEDIR)/module/inc +GLOBAL_CFLAGS += -DAIM_CONFIG_INCLUDE_MODULES_INIT=1 +GLOBAL_CFLAGS += -fPIC +GLOBAL_LINK_LIBS += -lpthread + +include $(BUILDER)/targets.mk + diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/onlpdump/Makefile b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/onlpdump/Makefile new file mode 100755 index 00000000..f9857a76 --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/onlpdump/Makefile @@ -0,0 +1,45 @@ +############################################################ +# +# +# Copyright 2014 BigSwitch Networks, Inc. +# +# Licensed under the Eclipse Public License, Version 1.0 (the +# "License"); you may not use this file except in compliance +# with the License. You may obtain a copy of the License at +# +# http://www.eclipse.org/legal/epl-v10.html +# +# Unless required by applicable law or agreed to in writing, +# software distributed under the License is distributed on an +# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, +# either express or implied. See the License for the specific +# language governing permissions and limitations under the +# License. +# +# +############################################################ +# +# +# +############################################################ +include $(ONL)/make/config.amd64.mk + +.DEFAULT_GOAL := onlpdump + +MODULE := onlpdump +include $(BUILDER)/standardinit.mk + +DEPENDMODULES := AIM IOF onlp x86_64_netberg_aurora_620_rangeley onlplib onlp_platform_defaults sff cjson cjson_util timer_wheel OS + +include $(BUILDER)/dependmodules.mk + +BINARY := onlpdump +$(BINARY)_LIBRARIES := $(LIBRARY_TARGETS) +include $(BUILDER)/bin.mk + +GLOBAL_CFLAGS += -DAIM_CONFIG_AIM_MAIN_FUNCTION=onlpdump_main +GLOBAL_CFLAGS += -DAIM_CONFIG_INCLUDE_MODULES_INIT=1 +GLOBAL_CFLAGS += -DAIM_CONFIG_INCLUDE_MAIN=1 +GLOBAL_LINK_LIBS += -lpthread -lm + +include $(BUILDER)/targets.mk diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/.module b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/.module new file mode 100755 index 00000000..6f21c84e --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/.module @@ -0,0 +1 @@ +name: x86_64_netberg_aurora_620_rangeley diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/Makefile b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/Makefile new file mode 100755 index 00000000..f52d7328 --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/Makefile @@ -0,0 +1,9 @@ +############################################################################### +# +# +# +############################################################################### +include $(ONL)/make/config.mk +MODULE := x86_64_netberg_aurora_620_rangeley +AUTOMODULE := x86_64_netberg_aurora_620_rangeley +include $(BUILDER)/definemodule.mk diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/auto/make.mk b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/auto/make.mk new file mode 100755 index 00000000..55fb2fb8 --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/auto/make.mk @@ -0,0 +1,9 @@ +############################################################################### +# +# x86_64_netberg_aurora_620_rangeley Autogeneration +# +############################################################################### +x86_64_netberg_aurora_620_rangeley_AUTO_DEFS := module/auto/x86_64_netberg_aurora_620_rangeley.yml +x86_64_netberg_aurora_620_rangeley_AUTO_DIRS := module/inc/x86_64_netberg_aurora_620_rangeley module/src +include $(BUILDER)/auto.mk + diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/auto/x86_64_netberg_aurora_620_rangeley.yml b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/auto/x86_64_netberg_aurora_620_rangeley.yml new file mode 100755 index 00000000..4f35e52b --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/auto/x86_64_netberg_aurora_620_rangeley.yml @@ -0,0 +1,114 @@ +############################################################################### +# +# x86_64_netberg_aurora_620_rangeley Autogeneration Definitions. +# +############################################################################### + +cdefs: &cdefs +- X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_INCLUDE_LOGGING: + doc: "Include or exclude logging." + default: 1 +- X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_LOG_OPTIONS_DEFAULT: + doc: "Default enabled log options." + default: AIM_LOG_OPTIONS_DEFAULT +- X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_LOG_BITS_DEFAULT: + doc: "Default enabled log bits." + default: AIM_LOG_BITS_DEFAULT +- X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_LOG_CUSTOM_BITS_DEFAULT: + doc: "Default enabled custom log bits." + default: 0 +- X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_PORTING_STDLIB: + doc: "Default all porting macros to use the C standard libraries." + default: 1 +- X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS: + doc: "Include standard library headers for stdlib porting macros." + default: X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_PORTING_STDLIB +- X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_INCLUDE_UCLI: + doc: "Include generic uCli support." + default: 0 +- X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_SYSFAN_RPM_FAILURE_THRESHOLD: + doc: "RPM Threshold at which the fan is considered to have failed." + default: 3000 + +definitions: + cdefs: + X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_HEADER: + defs: *cdefs + basename: x86_64_netberg_aurora_620_rangeley_config + + enum: &enums + + fan_id: + members: + - FAN1 : 1 + - FAN2 : 2 + - FAN3 : 3 + - FAN4 : 4 + - FAN5 : 5 + - FAN6 : 6 + - FAN7 : 7 + - FAN8 : 8 + - FAN9 : 9 + - FAN10 : 10 + + fan_oid: + members: + - FAN1 : ONLP_FAN_ID_CREATE(1) + - FAN2 : ONLP_FAN_ID_CREATE(2) + - FAN3 : ONLP_FAN_ID_CREATE(3) + - FAN4 : ONLP_FAN_ID_CREATE(4) + - FAN5 : ONLP_FAN_ID_CREATE(5) + - FAN6 : ONLP_FAN_ID_CREATE(6) + - FAN7 : ONLP_FAN_ID_CREATE(7) + - FAN8 : ONLP_FAN_ID_CREATE(8) + - FAN9 : ONLP_FAN_ID_CREATE(9) + - FAN10 : ONLP_FAN_ID_CREATE(10) + + psu_id: + members: + - PSU1 : 1 + - PSU2 : 2 + + psu_oid: + members: + - PSU1 : ONLP_PSU_ID_CREATE(1) + - PSU2 : ONLP_PSU_ID_CREATE(2) + + thermal_id: + members: + - THERMAL1 : 1 + - THERMAL2 : 2 + - THERMAL3 : 3 + - THERMAL4 : 4 + - THERMAL5 : 5 + - THERMAL6 : 6 + - THERMAL7 : 7 + + thermal_oid: + members: + - THERMAL1 : ONLP_THERMAL_ID_CREATE(1) + - THERMAL2 : ONLP_THERMAL_ID_CREATE(2) + - THERMAL3 : ONLP_THERMAL_ID_CREATE(3) + - THERMAL4 : ONLP_THERMAL_ID_CREATE(4) + - THERMAL5 : ONLP_THERMAL_ID_CREATE(5) + - THERMAL6 : ONLP_THERMAL_ID_CREATE(6) + - THERMAL7 : ONLP_THERMAL_ID_CREATE(7) + + led_id: + members: + - STAT : 1 + + led_oid: + members: + - STAT : ONLP_LED_ID_CREATE(1) + + + portingmacro: + X86_64_NETBERG_AURORA_620_RANGELEY: + macros: + - memset + - memcpy + - strncpy + - vsnprintf + - snprintf + - strlen diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/inc/x86_64_netberg_aurora_620_rangeley/x86_64_netberg_aurora_620_rangeley.x b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/inc/x86_64_netberg_aurora_620_rangeley/x86_64_netberg_aurora_620_rangeley.x new file mode 100755 index 00000000..c8ee3e74 --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/inc/x86_64_netberg_aurora_620_rangeley/x86_64_netberg_aurora_620_rangeley.x @@ -0,0 +1,14 @@ +/**************************************************************************//** + * + * + * + *****************************************************************************/ +#include + +/* <--auto.start.xmacro(ALL).define> */ +/* */ + +/* <--auto.start.xenum(ALL).define> */ +/* */ + + diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/inc/x86_64_netberg_aurora_620_rangeley/x86_64_netberg_aurora_620_rangeley_config.h b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/inc/x86_64_netberg_aurora_620_rangeley/x86_64_netberg_aurora_620_rangeley_config.h new file mode 100755 index 00000000..ecd344e3 --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/inc/x86_64_netberg_aurora_620_rangeley/x86_64_netberg_aurora_620_rangeley_config.h @@ -0,0 +1,135 @@ +/**************************************************************************//** + * + * @file + * @brief x86_64_netberg_aurora_620_rangeley Configuration Header + * + * @addtogroup x86_64_netberg_aurora_620_rangeley-config + * @{ + * + *****************************************************************************/ +#ifndef __X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_H__ +#define __X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_H__ + +#ifdef GLOBAL_INCLUDE_CUSTOM_CONFIG +#include +#endif +#ifdef X86_64_NETBERG_AURORA_620_RANGELEY_INCLUDE_CUSTOM_CONFIG +#include +#endif + +/* */ +#include +/** + * X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_INCLUDE_LOGGING + * + * Include or exclude logging. */ + + +#ifndef X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_INCLUDE_LOGGING +#define X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_INCLUDE_LOGGING 1 +#endif + +/** + * X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_LOG_OPTIONS_DEFAULT + * + * Default enabled log options. */ + + +#ifndef X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_LOG_OPTIONS_DEFAULT +#define X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_LOG_OPTIONS_DEFAULT AIM_LOG_OPTIONS_DEFAULT +#endif + +/** + * X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_LOG_BITS_DEFAULT + * + * Default enabled log bits. */ + + +#ifndef X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_LOG_BITS_DEFAULT +#define X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_LOG_BITS_DEFAULT AIM_LOG_BITS_DEFAULT +#endif + +/** + * X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_LOG_CUSTOM_BITS_DEFAULT + * + * Default enabled custom log bits. */ + + +#ifndef X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_LOG_CUSTOM_BITS_DEFAULT +#define X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_LOG_CUSTOM_BITS_DEFAULT 0 +#endif + +/** + * X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_PORTING_STDLIB + * + * Default all porting macros to use the C standard libraries. */ + + +#ifndef X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_PORTING_STDLIB +#define X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_PORTING_STDLIB 1 +#endif + +/** + * X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS + * + * Include standard library headers for stdlib porting macros. */ + + +#ifndef X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS +#define X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_PORTING_STDLIB +#endif + +/** + * X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_INCLUDE_UCLI + * + * Include generic uCli support. */ + + +#ifndef X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_INCLUDE_UCLI +#define X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_INCLUDE_UCLI 0 +#endif + +/** + * X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_SYSFAN_RPM_FAILURE_THRESHOLD + * + * RPM Threshold at which the fan is considered to have failed. */ + + +#ifndef X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_SYSFAN_RPM_FAILURE_THRESHOLD +#define X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_SYSFAN_RPM_FAILURE_THRESHOLD 3000 +#endif + +/** + * All compile time options can be queried or displayed + */ + +/** Configuration settings structure. */ +typedef struct x86_64_netberg_aurora_620_rangeley_config_settings_s { + /** name */ + const char* name; + /** value */ + const char* value; +} x86_64_netberg_aurora_620_rangeley_config_settings_t; + +/** Configuration settings table. */ +/** x86_64_netberg_aurora_620_rangeley_config_settings table. */ +extern x86_64_netberg_aurora_620_rangeley_config_settings_t x86_64_netberg_aurora_620_rangeley_config_settings[]; + +/** + * @brief Lookup a configuration setting. + * @param setting The name of the configuration option to lookup. + */ +const char* x86_64_netberg_aurora_620_rangeley_config_lookup(const char* setting); + +/** + * @brief Show the compile-time configuration. + * @param pvs The output stream. + */ +int x86_64_netberg_aurora_620_rangeley_config_show(struct aim_pvs_s* pvs); + +/* */ + +#include "x86_64_netberg_aurora_620_rangeley_porting.h" + +#endif /* __X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_H__ */ +/* @} */ diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/inc/x86_64_netberg_aurora_620_rangeley/x86_64_netberg_aurora_620_rangeley_dox.h b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/inc/x86_64_netberg_aurora_620_rangeley/x86_64_netberg_aurora_620_rangeley_dox.h new file mode 100755 index 00000000..9f1e463a --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/inc/x86_64_netberg_aurora_620_rangeley/x86_64_netberg_aurora_620_rangeley_dox.h @@ -0,0 +1,26 @@ +/**************************************************************************//** + * + * x86_64_netberg_aurora_620_rangeley Doxygen Header + * + *****************************************************************************/ +#ifndef __X86_64_NETBERG_AURORA_620_RANGELEY_DOX_H__ +#define __X86_64_NETBERG_AURORA_620_RANGELEY_DOX_H__ + +/** + * @defgroup x86_64_netberg_aurora_620_rangeley x86_64_netberg_aurora_620_rangeley - x86_64_netberg_aurora_620_rangeley Description + * + +The documentation overview for this module should go here. + + * + * @{ + * + * @defgroup x86_64_netberg_aurora_620_rangeley-x86_64_netberg_aurora_620_rangeley Public Interface + * @defgroup x86_64_netberg_aurora_620_rangeley-config Compile Time Configuration + * @defgroup x86_64_netberg_aurora_620_rangeley-porting Porting Macros + * + * @} + * + */ + +#endif /* __X86_64_NETBERG_AURORA_620_RANGELEY_DOX_H__ */ diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/inc/x86_64_netberg_aurora_620_rangeley/x86_64_netberg_aurora_620_rangeley_porting.h b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/inc/x86_64_netberg_aurora_620_rangeley/x86_64_netberg_aurora_620_rangeley_porting.h new file mode 100755 index 00000000..0de01c60 --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/inc/x86_64_netberg_aurora_620_rangeley/x86_64_netberg_aurora_620_rangeley_porting.h @@ -0,0 +1,87 @@ +/**************************************************************************//** + * + * @file + * @brief x86_64_netberg_aurora_620_rangeley Porting Macros. + * + * @addtogroup x86_64_netberg_aurora_620_rangeley-porting + * @{ + * + *****************************************************************************/ +#ifndef __X86_64_NETBERG_AURORA_620_RANGELEY_PORTING_H__ +#define __X86_64_NETBERG_AURORA_620_RANGELEY_PORTING_H__ + + +/* */ +#if X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS == 1 +#include +#include +#include +#include +#include +#endif + +#ifndef X86_64_NETBERG_AURORA_620_RANGELEY_MEMSET + #if defined(GLOBAL_MEMSET) + #define X86_64_NETBERG_AURORA_620_RANGELEY_MEMSET GLOBAL_MEMSET + #elif X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_PORTING_STDLIB == 1 + #define X86_64_NETBERG_AURORA_620_RANGELEY_MEMSET memset + #else + #error The macro X86_64_NETBERG_AURORA_620_RANGELEY_MEMSET is required but cannot be defined. + #endif +#endif + +#ifndef X86_64_NETBERG_AURORA_620_RANGELEY_MEMCPY + #if defined(GLOBAL_MEMCPY) + #define X86_64_NETBERG_AURORA_620_RANGELEY_MEMCPY GLOBAL_MEMCPY + #elif X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_PORTING_STDLIB == 1 + #define X86_64_NETBERG_AURORA_620_RANGELEY_MEMCPY memcpy + #else + #error The macro X86_64_NETBERG_AURORA_620_RANGELEY_MEMCPY is required but cannot be defined. + #endif +#endif + +#ifndef X86_64_NETBERG_AURORA_620_RANGELEY_STRNCPY + #if defined(GLOBAL_STRNCPY) + #define X86_64_NETBERG_AURORA_620_RANGELEY_STRNCPY GLOBAL_STRNCPY + #elif X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_PORTING_STDLIB == 1 + #define X86_64_NETBERG_AURORA_620_RANGELEY_STRNCPY strncpy + #else + #error The macro X86_64_NETBERG_AURORA_620_RANGELEY_STRNCPY is required but cannot be defined. + #endif +#endif + +#ifndef X86_64_NETBERG_AURORA_620_RANGELEY_VSNPRINTF + #if defined(GLOBAL_VSNPRINTF) + #define X86_64_NETBERG_AURORA_620_RANGELEY_VSNPRINTF GLOBAL_VSNPRINTF + #elif X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_PORTING_STDLIB == 1 + #define X86_64_NETBERG_AURORA_620_RANGELEY_VSNPRINTF vsnprintf + #else + #error The macro X86_64_NETBERG_AURORA_620_RANGELEY_VSNPRINTF is required but cannot be defined. + #endif +#endif + +#ifndef X86_64_NETBERG_AURORA_620_RANGELEY_SNPRINTF + #if defined(GLOBAL_SNPRINTF) + #define X86_64_NETBERG_AURORA_620_RANGELEY_SNPRINTF GLOBAL_SNPRINTF + #elif X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_PORTING_STDLIB == 1 + #define X86_64_NETBERG_AURORA_620_RANGELEY_SNPRINTF snprintf + #else + #error The macro X86_64_NETBERG_AURORA_620_RANGELEY_SNPRINTF is required but cannot be defined. + #endif +#endif + +#ifndef X86_64_NETBERG_AURORA_620_RANGELEY_STRLEN + #if defined(GLOBAL_STRLEN) + #define X86_64_NETBERG_AURORA_620_RANGELEY_STRLEN GLOBAL_STRLEN + #elif X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_PORTING_STDLIB == 1 + #define X86_64_NETBERG_AURORA_620_RANGELEY_STRLEN strlen + #else + #error The macro X86_64_NETBERG_AURORA_620_RANGELEY_STRLEN is required but cannot be defined. + #endif +#endif + +/* */ + + +#endif /* __X86_64_NETBERG_AURORA_620_RANGELEY_PORTING_H__ */ +/* @} */ diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/make.mk b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/make.mk new file mode 100755 index 00000000..c8bda195 --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/make.mk @@ -0,0 +1,10 @@ +############################################################################### +# +# +# +############################################################################### +THIS_DIR := $(dir $(lastword $(MAKEFILE_LIST))) +x86_64_netberg_aurora_620_rangeley_INCLUDES := -I $(THIS_DIR)inc +x86_64_netberg_aurora_620_rangeley_INTERNAL_INCLUDES := -I $(THIS_DIR)src +x86_64_netberg_aurora_620_rangeley_DEPENDMODULE_ENTRIES := init:x86_64_netberg_aurora_620_rangeley ucli:x86_64_netberg_aurora_620_rangeley + diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/Makefile b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/Makefile new file mode 100755 index 00000000..20b8893c --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/Makefile @@ -0,0 +1,9 @@ +############################################################################### +# +# Local source generation targets. +# +############################################################################### + +ucli: + @../../../../tools/uclihandlers.py x86_64_netberg_aurora_620_rangeley_ucli.c + diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/fani.c b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/fani.c new file mode 100755 index 00000000..ea901954 --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/fani.c @@ -0,0 +1,234 @@ +/************************************************************ + * + * + * Copyright 2014 Big Switch Networks, Inc. + * + * Licensed under the Eclipse Public License, Version 1.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.eclipse.org/legal/epl-v10.html + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, + * either express or implied. See the License for the specific + * language governing permissions and limitations under the + * License. + * + * + ************************************************************ + * + * + * + ***********************************************************/ +#include +#include + +#include "x86_64_netberg_aurora_620_rangeley_int.h" +#include "x86_64_netberg_aurora_620_rangeley_log.h" + +#include + + +#define VALIDATE(_id) \ + do { \ + if(!ONLP_OID_IS_FAN(_id)) { \ + return ONLP_STATUS_E_INVALID; \ + } \ + } while(0) + +static int +sys_fan_info_get__(onlp_fan_info_t* info, int id) +{ + int value = 0; + int rv; + + rv = onlp_file_read_int(&value, SYS_HWMON2_PREFIX "/fan%d_abs", ((id/2)+1)); + if (rv != ONLP_STATUS_OK) + return rv; + + if (value == 0) + { + info->status = ONLP_FAN_STATUS_FAILED; + } + else + { + info->status = ONLP_FAN_STATUS_PRESENT; + + rv = onlp_file_read_int(&value, SYS_HWMON2_PREFIX "/fan%d_dir", ((id/2)+1)); + if (rv != ONLP_STATUS_OK) + return rv; + + if (value == 0) + { + info->status |= ONLP_FAN_STATUS_B2F; + info->caps |= ONLP_FAN_CAPS_B2F; + } + else + { + info->status |= ONLP_FAN_STATUS_F2B; + info->caps |= ONLP_FAN_CAPS_F2B; + } + + rv = onlp_file_read_int(&(info->rpm), SYS_HWMON1_PREFIX "/fan%d_rpm", (id+1)); + if (rv == ONLP_STATUS_E_INTERNAL) + return rv; + + if (rv == ONLP_STATUS_E_MISSING) + { + info->status &= ~1; + return 0; + } + + if (info->rpm <= X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_SYSFAN_RPM_FAILURE_THRESHOLD) + info->status |= ONLP_FAN_STATUS_FAILED; + + + rv = onlp_file_read_int(&(info->percentage), SYS_HWMON1_PREFIX "/fan%d_duty", (id+1)); + if (rv == ONLP_STATUS_E_INTERNAL) + return rv; + + if (rv == ONLP_STATUS_E_MISSING) + { + info->status &= ~1; + return 0; + } + } + return 0; +} + +static int +psu_fan_info_get__(onlp_fan_info_t* info, int id) +{ + return onlp_file_read_int(&(info->rpm), SYS_HWMON2_PREFIX "/psu%d_fan_speed", id); +} + +/* Onboard Fans */ +static onlp_fan_info_t fans__[] = { + { }, /* Not used */ + { { FAN_OID_FAN1, "Fan1_rotor1", 0}, ONLP_FAN_STATUS_PRESENT }, + { { FAN_OID_FAN2, "Fan1_rotor2", 0}, ONLP_FAN_STATUS_PRESENT }, + { { FAN_OID_FAN3, "Fan2_rotor1", 0}, ONLP_FAN_STATUS_PRESENT }, + { { FAN_OID_FAN4, "Fan2_rotor2", 0}, ONLP_FAN_STATUS_PRESENT }, + { { FAN_OID_FAN5, "Fan3_rotor1", 0}, ONLP_FAN_STATUS_PRESENT }, + { { FAN_OID_FAN6, "Fan3_rotor2", 0}, ONLP_FAN_STATUS_PRESENT }, + { { FAN_OID_FAN7, "Fan4_rotor1", 0}, ONLP_FAN_STATUS_PRESENT }, + { { FAN_OID_FAN8, "Fan4_rotor2", 0}, ONLP_FAN_STATUS_PRESENT }, + { { FAN_OID_FAN9, "PSU-1 Fan", 0 }, ONLP_FAN_STATUS_PRESENT }, + { { FAN_OID_FAN10, "PSU-2 Fan", 0 }, ONLP_FAN_STATUS_PRESENT }, +}; + +/* + * This function will be called prior to all of onlp_fani_* functions. + */ +int +onlp_fani_init(void) +{ + return ONLP_STATUS_OK; +} + +int +onlp_fani_info_get(onlp_oid_t id, onlp_fan_info_t* info) +{ + int fid; + + VALIDATE(id); + + memset(info, 0, sizeof(onlp_fan_info_t)); + fid = ONLP_OID_ID_GET(id); + *info = fans__[fid]; + + info->caps |= ONLP_FAN_CAPS_GET_RPM; + + switch(fid) + { + case FAN_ID_FAN1: + case FAN_ID_FAN2: + case FAN_ID_FAN3: + case FAN_ID_FAN4: + case FAN_ID_FAN5: + case FAN_ID_FAN6: + case FAN_ID_FAN7: + case FAN_ID_FAN8: + return sys_fan_info_get__(info, (fid - 1)); + break; + + case FAN_ID_FAN9: + case FAN_ID_FAN10: + return psu_fan_info_get__(info, (fid - FAN_ID_FAN9 + 1)); + break; + + default: + return ONLP_STATUS_E_INVALID; + break; + } + + return ONLP_STATUS_E_INVALID; +} + +/* + * This function sets the speed of the given fan in RPM. + * + * This function will only be called if the fan supprots the RPM_SET + * capability. + * + * It is optional if you have no fans at all with this feature. + */ +int +onlp_fani_rpm_set(onlp_oid_t id, int rpm) +{ + return ONLP_STATUS_E_UNSUPPORTED; +} + + +/* + * This function sets the fan speed of the given OID as a percentage. + * + * This will only be called if the OID has the PERCENTAGE_SET + * capability. + * + * It is optional if you have no fans at all with this feature. + */ +int +onlp_fani_percentage_set(onlp_oid_t id, int p) +{ + return ONLP_STATUS_E_UNSUPPORTED; +} + +/* + * This function sets the fan speed of the given OID as per + * the predefined ONLP fan speed modes: off, slow, normal, fast, max. + * + * Interpretation of these modes is up to the platform. + * + */ +int +onlp_fani_mode_set(onlp_oid_t id, onlp_fan_mode_t mode) +{ + return ONLP_STATUS_E_UNSUPPORTED; +} + +/* + * This function sets the fan direction of the given OID. + * + * This function is only relevant if the fan OID supports both direction + * capabilities. + * + * This function is optional unless the functionality is available. + */ +int +onlp_fani_dir_set(onlp_oid_t id, onlp_fan_dir_t dir) +{ + return ONLP_STATUS_E_UNSUPPORTED; +} + +/* + * Generic fan ioctl. Optional. + */ +int +onlp_fani_ioctl(onlp_oid_t id, va_list vargs) +{ + return ONLP_STATUS_E_UNSUPPORTED; +} + diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/ledi.c b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/ledi.c new file mode 100755 index 00000000..d988e81d --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/ledi.c @@ -0,0 +1,165 @@ +/************************************************************ + * + * + * Copyright 2014 Big Switch Networks, Inc. + * Copyright 2013 Accton Technology Corporation. + * + * Licensed under the Eclipse Public License, Version 1.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.eclipse.org/legal/epl-v10.html + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, + * either express or implied. See the License for the specific + * language governing permissions and limitations under the + * License. + * + * + ************************************************************ + * + * + * + ***********************************************************/ +#include +#include +#include "x86_64_netberg_aurora_620_rangeley_int.h" + +#define VALIDATE(_id) \ + do { \ + if(!ONLP_OID_IS_LED(_id)) { \ + return ONLP_STATUS_E_INVALID; \ + } \ + } while(0) + +/* LED related data + */ +enum led_light_mode { /*must be the same with the definition @ kernel driver */ + LED_MODE_OFF = 0, + LED_MODE_AMBER, + LED_MODE_GREEN, +}; + +int led_light_map_mode[][2] = +{ + {LED_MODE_OFF, ONLP_LED_MODE_OFF}, + {LED_MODE_AMBER, ONLP_LED_MODE_ORANGE}, + {LED_MODE_GREEN, ONLP_LED_MODE_GREEN}, +}; + +/* + * Get the information for the given LED OID. + */ +static onlp_led_info_t linfo[] = +{ + { }, /* Not used */ + { + { LED_OID_LED1, "Chassis LED 1 (STAT LED)", 0 }, + ONLP_LED_STATUS_PRESENT, + ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_ORANGE | ONLP_LED_CAPS_GREEN, + ONLP_LED_MODE_OFF, + }, +}; + +static int conver_led_light_mode_to_driver(int led_ligth_mode) +{ + int i, nsize = sizeof(led_light_map_mode)/sizeof(led_light_map_mode[0]); + for(i=0; i + * + ************************************************************ + * + * + * + ***********************************************************/ +#include +#include +#include +#include "x86_64_netberg_aurora_620_rangeley_int.h" +#include "x86_64_netberg_aurora_620_rangeley_log.h" + +extern int toHexValue(char ch); + +#define VALIDATE(_id) \ + do { \ + if(!ONLP_OID_IS_PSU(_id)) { \ + return ONLP_STATUS_E_INVALID; \ + } \ + } while(0) + +static onlp_psu_info_t psus__[] = { + { }, /* Not used */ + { + { + PSU_OID_PSU1, + "PSU-1", + 0, + { + FAN_OID_FAN9, + }, + } + }, + { + { + PSU_OID_PSU2, + "PSU-2", + 0, + { + FAN_OID_FAN10, + }, + } + }, +}; + +/* + * This function will be called prior to any other onlp_psui functions. + */ +int +onlp_psui_init(void) +{ + return ONLP_STATUS_OK; +} + +int +onlp_psui_info_get(onlp_oid_t id, onlp_psu_info_t* info) +{ + int rv; + int pid; + uint8_t buffer[512]; + uint8_t data[256]; + int value = -1; + int len; + double dvalue; + int i, j; + + VALIDATE(id); + + memset(info, 0, sizeof(onlp_psu_info_t)); + pid = ONLP_OID_ID_GET(id); + *info = psus__[pid]; + + rv = onlp_file_read_int(&value, SYS_HWMON1_PREFIX "/psu%d_abs", pid); + if (rv != ONLP_STATUS_OK) + return rv; + if (value == 0) + { + info->status = ONLP_PSU_STATUS_UNPLUGGED; + return ONLP_STATUS_OK; + } + + /* PSU is present. */ + info->status = ONLP_PSU_STATUS_PRESENT; + + memset(buffer, 0, sizeof(buffer)); + memset(data, 0, sizeof(data)); + rv = onlp_file_read(buffer, sizeof(buffer), &len, SYS_HWMON2_PREFIX "/psu%d_eeprom", pid); + if (rv == ONLP_STATUS_OK) + { + j = 0; + for (i=0; i<256; i++) + { + data[i] = (toHexValue(buffer[j])<<4) + toHexValue(buffer[j+1]); + j += 2; + } + i = 11; + + /* Manufacturer Name */ + len = (data[i]&0x0f); + i++; + i += len; + + /* Product Name */ + len = (data[i]&0x0f); + i++; + memcpy(info->model, (char *) &(data[i]), len); + i += len; + + /* Product part,model number */ + len = (data[i]&0x0f); + i++; + i += len; + + /* Product Version */ + len = (data[i]&0x0f); + i++; + i += len; + + /* Product Serial Number */ + len = (data[i]&0x0f); + i++; + memcpy(info->serial, (char *) &(data[i]), len); + } + else + { + strcpy(info->model, "Missing"); + strcpy(info->serial, "Missing"); + } + + info->caps |= ONLP_PSU_CAPS_AC; + +#if 0 + /* PSU is powered. */ + rv = onlp_file_read_int(&value, SYS_HWMON1_PREFIX "/psu%d_pg", pid); + if (rv != ONLP_STATUS_OK) + return rv; + if (value == 0) + { + info->status |= ONLP_PSU_STATUS_FAILED; + return ONLP_STATUS_OK; + } +#endif + + memset(buffer, 0, sizeof(buffer)); + rv = onlp_file_read(buffer, sizeof(buffer), &len, SYS_HWMON2_PREFIX "/psu%d_iout", pid); + if (rv == ONLP_STATUS_OK) + { + dvalue = atof((const char *)buffer); + if (dvalue > 0.0) + { + info->caps |= ONLP_PSU_CAPS_IOUT; + info->miout = (int)(dvalue * 1000); + } + } + + memset(buffer, 0, sizeof(buffer)); + rv = onlp_file_read(buffer, sizeof(buffer), &len, SYS_HWMON2_PREFIX "/psu%d_vout", pid); + if (rv == ONLP_STATUS_OK) + { + dvalue = atof((const char *)buffer); + if (dvalue > 0.0) + { + info->caps |= ONLP_PSU_CAPS_VOUT; + info->mvout = (int)(dvalue * 1000); + } + } + + memset(buffer, 0, sizeof(buffer)); + rv = onlp_file_read(buffer, sizeof(buffer), &len, SYS_HWMON2_PREFIX "/psu%d_pin", pid); + if (rv == ONLP_STATUS_OK) + { + dvalue = atof((const char *)buffer); + if (dvalue > 0.0) + { + info->caps |= ONLP_PSU_CAPS_PIN; + info->mpin = (int)(dvalue * 1000); + } + } + + memset(buffer, 0, sizeof(buffer)); + rv = onlp_file_read(buffer, sizeof(buffer), &len, SYS_HWMON2_PREFIX "/psu%d_pout", pid); + if (rv == ONLP_STATUS_OK) + { + dvalue = atof((const char *)buffer); + if (dvalue > 0.0) + { + info->caps |= ONLP_PSU_CAPS_POUT; + info->mpout = (int)(dvalue * 1000); + } + } + + return ONLP_STATUS_OK; +} + +/* + * This is an optional generic ioctl() interface. + * Its purpose is to allow future expansion and + * custom functionality that is not otherwise exposed + * in the standard interface. + * + * The semantics of this function are platform specific. + * This function is completely optional. + */ +int +onlp_psui_ioctl(onlp_oid_t pid, va_list vargs) +{ + return ONLP_STATUS_E_UNSUPPORTED; +} + diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/sfpi.c b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/sfpi.c new file mode 100755 index 00000000..bcb3c86e --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/sfpi.c @@ -0,0 +1,389 @@ +/************************************************************ + * + * + * Copyright 2014 Big Switch Networks, Inc. + * + * Licensed under the Eclipse Public License, Version 1.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.eclipse.org/legal/epl-v10.html + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, + * either express or implied. See the License for the specific + * language governing permissions and limitations under the + * License. + * + * + ************************************************************ + * + * SFPI Interface for the Aurora 620 Platform + * + ***********************************************************/ +#include +#include +#include +#include +#include +#include "x86_64_netberg_aurora_620_rangeley_int.h" +#include "x86_64_netberg_aurora_620_rangeley_log.h" + +#include +#include + +/* Model ID Definition */ +typedef enum +{ + HURACAN_WITH_BMC = 0x0, + HURACAN_WITHOUT_BMC, + CABRERAIII_WITH_BMC, + CABRERAIII_WITHOUT_BMC, + SESTO_WITH_BMC, + SESTO_WITHOUT_BMC, + NCIIX_WITH_BMC, + NCIIX_WITHOUT_BMC, + ASTERION_WITH_BMC, + ASTERION_WITHOUT_BMC, + HURACAN_A_WITH_BMC, + HURACAN_A_WITHOUT_BMC, + + MODEL_ID_LAST +} modelId_t; + +static int +onlp_board_model_id_get(void) +{ + static int board_model_id = MODEL_ID_LAST; + + if (board_model_id == MODEL_ID_LAST) + { + if (onlp_file_read_int(&board_model_id, SYS_HWMON1_PREFIX "/board_model_id") != ONLP_STATUS_OK) + return 0; + } + + return board_model_id; +} + +/* + * This function will be called prior to all other onlp_sfpi_* functions. + */ +int +onlp_sfpi_init(void) +{ + return ONLP_STATUS_OK; +} + +/* + * This function should populate the give bitmap with + * all valid, SFP-capable port numbers. + * + * Only port numbers in this bitmap will be queried by the the + * ONLP framework. + * + * No SFPI functions will be called with ports that are + * not in this bitmap. You can ignore all error checking + * on the incoming ports defined in this interface. + */ +int +onlp_sfpi_bitmap_get(onlp_sfp_bitmap_t* bmap) +{ + int p; + int total_port = 0; + int board_model_id = onlp_board_model_id_get(); + + switch (board_model_id) + { + case HURACAN_WITH_BMC: + case HURACAN_WITHOUT_BMC: + case HURACAN_A_WITH_BMC: + case HURACAN_A_WITHOUT_BMC: + total_port = 32; + break; + + case SESTO_WITH_BMC: + case SESTO_WITHOUT_BMC: + case NCIIX_WITH_BMC: + case NCIIX_WITHOUT_BMC: + total_port = 54; + break; + + case ASTERION_WITH_BMC: + case ASTERION_WITHOUT_BMC: + total_port = 64; + break; + + default: + break; + } + + AIM_BITMAP_CLR_ALL(bmap); + for(p = 0; p < total_port; p++) + AIM_BITMAP_SET(bmap, p); + + return ONLP_STATUS_OK; +} + +/* + * This function should return whether an SFP is inserted on the given + * port. + * + * Returns 1 if the SFP is present. + * Returns 0 if the SFP is not present. + * Returns ONLP_E_* if there was an error determining the status. + */ +int +onlp_sfpi_is_present(int port) +{ + int value = 0; + + onlp_file_read_int(&value, SYS_HWMON2_PREFIX "/port_%d_abs", (port+1)); + return value; +} + +int +onlp_sfpi_port_map(int port, int* rport) +{ + int board_model_id = onlp_board_model_id_get(); + + switch (board_model_id) + { + case HURACAN_WITH_BMC: + case HURACAN_WITHOUT_BMC: + case HURACAN_A_WITH_BMC: + case HURACAN_A_WITHOUT_BMC: + /* odd <=> even */ + if (port & 0x1) + *rport = (port - 1); + else + *rport = (port + 1); + break; + + default: + *rport = port; break; + } + + return ONLP_STATUS_OK; +} + +int +onlp_sfpi_presence_bitmap_get(onlp_sfp_bitmap_t* dst) +{ + return ONLP_STATUS_E_UNSUPPORTED; +} + +int +onlp_sfpi_rx_los_bitmap_get(onlp_sfp_bitmap_t* bmap) +{ + int p; + int total_port = 0; + int board_model_id = onlp_board_model_id_get(); + + switch (board_model_id) + { + case SESTO_WITH_BMC: + case SESTO_WITHOUT_BMC: + case NCIIX_WITH_BMC: + case NCIIX_WITHOUT_BMC: + case ASTERION_WITH_BMC: + case ASTERION_WITHOUT_BMC: + total_port = 48; + break; + + default: + break; + } + + AIM_BITMAP_CLR_ALL(bmap); + for(p = 0; p < total_port; p++) + AIM_BITMAP_SET(bmap, p); + + return ONLP_STATUS_OK; +} + +/* + * This function reads the SFPs idrom and returns in + * in the data buffer provided. + */ +int +onlp_sfpi_eeprom_read(int port, uint8_t data[256]) +{ + int rv = ONLP_STATUS_OK; + char fname[128]; + + memset(data, 0, 256); + memset(fname, 0, sizeof(fname)); + sprintf(fname, SYS_HWMON2_PREFIX "/port_%d_data_a0", (port+1)); + rv = onlplib_sfp_eeprom_read_file(fname, data); + if (rv != ONLP_STATUS_OK) + AIM_LOG_INFO("Unable to read eeprom from port(%d)\r\n", port); + + return rv; +} + +int +onlp_sfpi_dom_read(int port, uint8_t data[256]) +{ + int rv = ONLP_STATUS_OK; + char fname[128]; + + memset(data, 0, 256); + memset(fname, 0, sizeof(fname)); + sprintf(fname, SYS_HWMON2_PREFIX "/port_%d_data_a2", (port+1)); + rv = onlplib_sfp_eeprom_read_file(fname, data); + if (rv != ONLP_STATUS_OK) + AIM_LOG_INFO("Unable to read eeprom from port(%d)\r\n", port); + + return rv; +} + +/* + * Manually enable or disable the given SFP. + * + */ +int +onlp_sfpi_enable_set(int port, int enable) +{ + return ONLP_STATUS_E_UNSUPPORTED; +} + +/* + * Returns whether the SFP is currently enabled or disabled. + */ +int +onlp_sfpi_enable_get(int port, int* enable) +{ + return ONLP_STATUS_E_UNSUPPORTED; +} + +/* + * If the platform requires any setup or equalizer modifications + * based on the actual SFP that was inserted then that custom + * setup should be performed here. + * + * After a new SFP is detected by the ONLP framework this + * function will be called to perform the (optional) setup. + */ +int +onlp_sfpi_post_insert(int port, sff_info_t* sff_info) +{ + return ONLP_STATUS_E_UNSUPPORTED; +} + +/* + * Return the current status of the SFP. + * See onlp_sfp_status_t; + */ +int +onlp_sfpi_status_get(int port, uint32_t* status) +{ + return ONLP_STATUS_E_UNSUPPORTED; +} + +int onlp_sfpi_control_supported(int port, onlp_sfp_control_t control, int* supported) +{ + if (supported == NULL) + return ONLP_STATUS_E_PARAM; + + *supported = 0; + switch (control) + { + case ONLP_SFP_CONTROL_TX_DISABLE: + case ONLP_SFP_CONTROL_RX_LOS: + { + int board_model_id = onlp_board_model_id_get(); + + switch (board_model_id) + { + case SESTO_WITH_BMC: + case SESTO_WITHOUT_BMC: + case NCIIX_WITH_BMC: + case NCIIX_WITHOUT_BMC: + case ASTERION_WITH_BMC: + case ASTERION_WITHOUT_BMC: + if (port < 48) + *supported = 1; + break; + + default: + break; + } + } + break; + + default: + break; + } + + return ONLP_STATUS_OK; +} + +int +onlp_sfpi_control_set(int port, onlp_sfp_control_t control, int value) +{ + int rv = ONLP_STATUS_OK; + int supported = 0; + + if ((onlp_sfpi_control_supported(port, control, &supported) == ONLP_STATUS_OK) && (supported == 0)) + return ONLP_STATUS_E_UNSUPPORTED; + + switch (control) + { + case ONLP_SFP_CONTROL_TX_DISABLE: + rv = onlp_file_write_int(value, SYS_HWMON2_PREFIX "/port_%d_tx_disable", (port+1)); + break; + + default: + break; + } + return rv; +} + +int +onlp_sfpi_control_get(int port, onlp_sfp_control_t control, int* value) +{ + int rv = ONLP_STATUS_OK; + int supported = 0; + + if (value == NULL) + return ONLP_STATUS_E_PARAM; + + if ((onlp_sfpi_control_supported(port, control, &supported) == ONLP_STATUS_OK) && (supported == 0)) + return ONLP_STATUS_E_UNSUPPORTED; + + *value = 0; + switch (control) + { + case ONLP_SFP_CONTROL_RX_LOS: + rv = onlp_file_read_int(value, SYS_HWMON2_PREFIX "/port_%d_rxlos", (port+1)); + break; + + case ONLP_SFP_CONTROL_TX_DISABLE: + rv = onlp_file_read_int(value, SYS_HWMON2_PREFIX "/port_%d_tx_disable", (port+1)); + break; + + default: + break; + } + return rv; +} + +/* + * This is a generic ioctl interface. + */ +int +onlp_sfpi_ioctl(int port, va_list vargs) +{ + return ONLP_STATUS_E_UNSUPPORTED; +} + +/* + * De-initialize the SFPI subsystem. + */ +int +onlp_sfpi_denit(void) +{ + return ONLP_STATUS_OK; +} + diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/sysi.c b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/sysi.c new file mode 100755 index 00000000..820dd56c --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/sysi.c @@ -0,0 +1,139 @@ +/************************************************************ + * + * + ************************************************************ + * + * + * + ***********************************************************/ +#include +#include +#include "x86_64_netberg_aurora_620_rangeley_int.h" +#include "x86_64_netberg_aurora_620_rangeley_log.h" + +int toHexValue(char ch) +{ + if ((ch >= '0')&&(ch <= '9')) + { + return (ch-0x30); + } + else if (((ch >= 'a')&&(ch <= 'f'))||((ch >= 'A')&&(ch <= 'F'))) + { + return (ch-0x57); + } + return 0; +} + +/* + * This is the first function called by the ONLP framework. + * + * It should return the name of your platform driver. + * + * If the name of your platform driver is the same as the + * current platform then this driver will be used. + * + * If the name of the driver is different from the current + * platform, or the driver is capable of supporting multiple + * platform variants, see onlp_sysi_platform_set() below. + */ +const char* +onlp_sysi_platform_get(void) +{ + return "x86-64-netberg-aurora-620-rangeley-r0"; +} + +/* + * This function will be called if onlp_sysi_platform_get() + * returns a platform name that is not equal to the current platform. + * + * If you are compatible with the given platform then return ONLP_STATUS_OK. + * If you can are not compatible return ONLP_STATUS_E_UNSUPPORTED. + * - This is fatal and will abort platform initialization. + */ + +int +onlp_sysi_platform_set(const char* name) +{ + /* + * For the purposes of this example we + * accept all platforms. + */ + return ONLP_STATUS_OK; +} + +/* + * This is the first function the ONLP framework will call + * after it has validated the the platform is supported using the mechanisms + * described above. + * + * If this function does not return ONL_STATUS_OK + * then platform initialization is aborted. + */ +int +onlp_sysi_init(void) +{ + return ONLP_STATUS_OK; +} + +int +onlp_sysi_onie_info_get(onlp_onie_info_t* onie) +{ + int rv; + uint8_t buffer[512]; + uint8_t data[256]; + int len; + int i, j; + + memset(buffer, 0, sizeof(buffer)); + memset(data, 0, sizeof(data)); + rv = onlp_file_read(buffer, sizeof(buffer), &len, SYS_HWMON2_PREFIX "/eeprom"); + if (rv == ONLP_STATUS_OK) + { + j = 0; + for (i=0; i<256; i++) + { + data[i] = (toHexValue(buffer[j])<<4) + toHexValue(buffer[j+1]); + j += 2; + } + rv = onlp_onie_decode(onie, (uint8_t*)data, 256); + if(rv >= 0) + { + onie->platform_name = aim_strdup("x86-64-netberg-aurora-620-rangeley-r0"); + } + } + return rv; +} + +int +onlp_sysi_oids_get(onlp_oid_t* table, int max) +{ + onlp_oid_t* e = table; + memset(table, 0, max*sizeof(onlp_oid_t)); + int i; + int n_thermal=7, n_fan=10, n_led=1; + + /* 2 PSUs */ + *e++ = ONLP_PSU_ID_CREATE(1); + *e++ = ONLP_PSU_ID_CREATE(2); + + /* LEDs Item */ + for (i=1; i<=n_led; i++) + { + *e++ = ONLP_LED_ID_CREATE(i); + } + + /* THERMALs Item */ + for (i=1; i<=n_thermal; i++) + { + *e++ = ONLP_THERMAL_ID_CREATE(i); + } + + /* Fans Item */ + for (i=1; i<=n_fan; i++) + { + *e++ = ONLP_FAN_ID_CREATE(i); + } + + return 0; +} + diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/thermali.c b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/thermali.c new file mode 100755 index 00000000..3def10b8 --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/thermali.c @@ -0,0 +1,173 @@ +/************************************************************ + * + * + * Copyright 2014 Big Switch Networks, Inc. + * + * Licensed under the Eclipse Public License, Version 1.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.eclipse.org/legal/epl-v10.html + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, + * either express or implied. See the License for the specific + * language governing permissions and limitations under the + * License. + * + * + ************************************************************ + * + * + * + ***********************************************************/ +#include +#include +#include "x86_64_netberg_aurora_620_rangeley_int.h" +#include "x86_64_netberg_aurora_620_rangeley_log.h" + +#define VALIDATE(_id) \ + do { \ + if(!ONLP_OID_IS_THERMAL(_id)) { \ + return ONLP_STATUS_E_INVALID; \ + } \ + } while(0) + +static int +sys_thermal_info_get__(onlp_thermal_info_t* info, int id) +{ + int rv; + + if (id == THERMAL_ID_THERMAL3) + { + rv = onlp_file_read_int(&info->mcelsius, SYS_HWMON1_PREFIX "/mac_temp"); + info->mcelsius *= 1000; + } + else + { + uint8_t buffer[64]; + double dvalue; + int len; + + memset(buffer, 0, sizeof(buffer)); + rv = onlp_file_read(buffer, sizeof(buffer), &len, SYS_HWMON1_PREFIX "/remote_temp%d", id); + if (rv == ONLP_STATUS_OK) + { + dvalue = atof((const char *)buffer); + info->mcelsius = (int)(dvalue * 1000); + } + } + + if(rv == ONLP_STATUS_E_INTERNAL) + return rv; + + if(rv == ONLP_STATUS_E_MISSING) + { + info->status &= ~1; + return ONLP_STATUS_OK; + } + + return ONLP_STATUS_OK; +} + +static int +psu1_thermal_info_get__(onlp_thermal_info_t* info, int id) +{ + int rv; + uint8_t buffer[64]; + double dvalue; + int len; + + memset(buffer, 0, sizeof(buffer)); + rv = onlp_file_read(buffer, sizeof(buffer), &len, SYS_HWMON2_PREFIX "/psu1_temp_%d", id); + if (rv == ONLP_STATUS_OK) + { + dvalue = atof((const char *)buffer); + info->mcelsius = (int)(dvalue * 1000); + } + return rv; +} + +static int +psu2_thermal_info_get__(onlp_thermal_info_t* info, int id) +{ + int rv; + uint8_t buffer[64]; + double dvalue; + int len; + + memset(buffer, 0, sizeof(buffer)); + rv = onlp_file_read(buffer, sizeof(buffer), &len, SYS_HWMON2_PREFIX "/psu2_temp_%d", id); + if (rv == ONLP_STATUS_OK) + { + dvalue = atof((const char *)buffer); + info->mcelsius = (int)(dvalue * 1000); + } + return rv; +} + +static onlp_thermal_info_t temps__[] = +{ + { }, /* Not used */ + { { THERMAL_OID_THERMAL1, "Chassis Thermal 1 (Front of MAC)", 0}, ONLP_THERMAL_STATUS_PRESENT, ONLP_THERMAL_CAPS_GET_TEMPERATURE, 0}, + { { THERMAL_OID_THERMAL2, "Chassis Thermal 2 (Rear of MAC)", 0}, ONLP_THERMAL_STATUS_PRESENT, ONLP_THERMAL_CAPS_GET_TEMPERATURE, 0}, + { { THERMAL_OID_THERMAL3, "Chassis Thermal 3 (MAC)", 0}, ONLP_THERMAL_STATUS_PRESENT, ONLP_THERMAL_CAPS_GET_TEMPERATURE, 0}, + + { { THERMAL_OID_THERMAL4, "PSU-1 Thermal 1", PSU_OID_PSU1 }, ONLP_THERMAL_STATUS_PRESENT, ONLP_THERMAL_CAPS_GET_TEMPERATURE, 0}, + { { THERMAL_OID_THERMAL5, "PSU-1 Thermal 2", PSU_OID_PSU1 }, ONLP_THERMAL_STATUS_PRESENT, ONLP_THERMAL_CAPS_GET_TEMPERATURE, 0}, + + { { THERMAL_OID_THERMAL6, "PSU-2 Thermal 1", PSU_OID_PSU2 }, ONLP_THERMAL_STATUS_PRESENT, ONLP_THERMAL_CAPS_GET_TEMPERATURE, 0}, + { { THERMAL_OID_THERMAL7, "PSU-2 Thermal 2", PSU_OID_PSU2 }, ONLP_THERMAL_STATUS_PRESENT, ONLP_THERMAL_CAPS_GET_TEMPERATURE, 0}, +}; + + +/* + * This will be called to intiialize the thermali subsystem. + */ +int +onlp_thermali_init(void) +{ + return ONLP_STATUS_OK; +} + +/* + * Retrieve the information structure for the given thermal OID. + * + * If the OID is invalid, return ONLP_E_STATUS_INVALID. + * If an unexpected error occurs, return ONLP_E_STATUS_INTERNAL. + * Otherwise, return ONLP_STATUS_OK with the OID's information. + * + * Note -- it is expected that you fill out the information + * structure even if the sensor described by the OID is not present. + */ +int +onlp_thermali_info_get(onlp_oid_t id, onlp_thermal_info_t* info) +{ + int tid; + + VALIDATE(id); + + memset(info, 0, sizeof(onlp_thermal_info_t)); + tid = ONLP_OID_ID_GET(id); + *info = temps__[tid]; + + switch(tid) + { + case THERMAL_ID_THERMAL1: + case THERMAL_ID_THERMAL2: + case THERMAL_ID_THERMAL3: + return sys_thermal_info_get__(info, tid); + + case THERMAL_ID_THERMAL4: + case THERMAL_ID_THERMAL5: + return psu1_thermal_info_get__(info, (tid - THERMAL_ID_THERMAL4 + 1)); + + case THERMAL_ID_THERMAL6: + case THERMAL_ID_THERMAL7: + return psu2_thermal_info_get__(info, (tid - THERMAL_ID_THERMAL6 + 1)); + } + + return ONLP_STATUS_E_INVALID; +} + diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/x86_64_netberg_aurora_620_rangeley_config.c b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/x86_64_netberg_aurora_620_rangeley_config.c new file mode 100755 index 00000000..35ca655a --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/x86_64_netberg_aurora_620_rangeley_config.c @@ -0,0 +1,80 @@ +/**************************************************************************//** + * + * + * + *****************************************************************************/ +#include + +/* */ +#define __x86_64_netberg_aurora_620_rangeley_config_STRINGIFY_NAME(_x) #_x +#define __x86_64_netberg_aurora_620_rangeley_config_STRINGIFY_VALUE(_x) __x86_64_netberg_aurora_620_rangeley_config_STRINGIFY_NAME(_x) +x86_64_netberg_aurora_620_rangeley_config_settings_t x86_64_netberg_aurora_620_rangeley_config_settings[] = +{ +#ifdef X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_INCLUDE_LOGGING + { __x86_64_netberg_aurora_620_rangeley_config_STRINGIFY_NAME(X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_INCLUDE_LOGGING), __x86_64_netberg_aurora_620_rangeley_config_STRINGIFY_VALUE(X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_INCLUDE_LOGGING) }, +#else +{ X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_INCLUDE_LOGGING(__x86_64_netberg_aurora_620_rangeley_config_STRINGIFY_NAME), "__undefined__" }, +#endif +#ifdef X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_LOG_OPTIONS_DEFAULT + { __x86_64_netberg_aurora_620_rangeley_config_STRINGIFY_NAME(X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_LOG_OPTIONS_DEFAULT), __x86_64_netberg_aurora_620_rangeley_config_STRINGIFY_VALUE(X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_LOG_OPTIONS_DEFAULT) }, +#else +{ X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_LOG_OPTIONS_DEFAULT(__x86_64_netberg_aurora_620_rangeley_config_STRINGIFY_NAME), "__undefined__" }, +#endif +#ifdef X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_LOG_BITS_DEFAULT + { __x86_64_netberg_aurora_620_rangeley_config_STRINGIFY_NAME(X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_LOG_BITS_DEFAULT), __x86_64_netberg_aurora_620_rangeley_config_STRINGIFY_VALUE(X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_LOG_BITS_DEFAULT) }, +#else +{ X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_LOG_BITS_DEFAULT(__x86_64_netberg_aurora_620_rangeley_config_STRINGIFY_NAME), "__undefined__" }, +#endif +#ifdef X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_LOG_CUSTOM_BITS_DEFAULT + { __x86_64_netberg_aurora_620_rangeley_config_STRINGIFY_NAME(X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_LOG_CUSTOM_BITS_DEFAULT), __x86_64_netberg_aurora_620_rangeley_config_STRINGIFY_VALUE(X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_LOG_CUSTOM_BITS_DEFAULT) }, +#else +{ X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_LOG_CUSTOM_BITS_DEFAULT(__x86_64_netberg_aurora_620_rangeley_config_STRINGIFY_NAME), "__undefined__" }, +#endif +#ifdef X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_PORTING_STDLIB + { __x86_64_netberg_aurora_620_rangeley_config_STRINGIFY_NAME(X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_PORTING_STDLIB), __x86_64_netberg_aurora_620_rangeley_config_STRINGIFY_VALUE(X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_PORTING_STDLIB) }, +#else +{ X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_PORTING_STDLIB(__x86_64_netberg_aurora_620_rangeley_config_STRINGIFY_NAME), "__undefined__" }, +#endif +#ifdef X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS + { __x86_64_netberg_aurora_620_rangeley_config_STRINGIFY_NAME(X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS), __x86_64_netberg_aurora_620_rangeley_config_STRINGIFY_VALUE(X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS) }, +#else +{ X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS(__x86_64_netberg_aurora_620_rangeley_config_STRINGIFY_NAME), "__undefined__" }, +#endif +#ifdef X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_INCLUDE_UCLI + { __x86_64_netberg_aurora_620_rangeley_config_STRINGIFY_NAME(X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_INCLUDE_UCLI), __x86_64_netberg_aurora_620_rangeley_config_STRINGIFY_VALUE(X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_INCLUDE_UCLI) }, +#else +{ X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_INCLUDE_UCLI(__x86_64_netberg_aurora_620_rangeley_config_STRINGIFY_NAME), "__undefined__" }, +#endif +#ifdef X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_SYSFAN_RPM_FAILURE_THRESHOLD + { __x86_64_netberg_aurora_620_rangeley_config_STRINGIFY_NAME(X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_SYSFAN_RPM_FAILURE_THRESHOLD), __x86_64_netberg_aurora_620_rangeley_config_STRINGIFY_VALUE(X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_SYSFAN_RPM_FAILURE_THRESHOLD) }, +#else +{ X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_SYSFAN_RPM_FAILURE_THRESHOLD(__x86_64_netberg_aurora_620_rangeley_config_STRINGIFY_NAME), "__undefined__" }, +#endif + { NULL, NULL } +}; +#undef __x86_64_netberg_aurora_620_rangeley_config_STRINGIFY_VALUE +#undef __x86_64_netberg_aurora_620_rangeley_config_STRINGIFY_NAME + +const char* +x86_64_netberg_aurora_620_rangeley_config_lookup(const char* setting) +{ + int i; + for(i = 0; x86_64_netberg_aurora_620_rangeley_config_settings[i].name; i++) { + if(strcmp(x86_64_netberg_aurora_620_rangeley_config_settings[i].name, setting)) { + return x86_64_netberg_aurora_620_rangeley_config_settings[i].value; + } + } + return NULL; +} + +int +x86_64_netberg_aurora_620_rangeley_config_show(struct aim_pvs_s* pvs) +{ + int i; + for(i = 0; x86_64_netberg_aurora_620_rangeley_config_settings[i].name; i++) { + aim_printf(pvs, "%s = %s\n", x86_64_netberg_aurora_620_rangeley_config_settings[i].name, x86_64_netberg_aurora_620_rangeley_config_settings[i].value); + } + return i; +} + +/* */ diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/x86_64_netberg_aurora_620_rangeley_enums.c b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/x86_64_netberg_aurora_620_rangeley_enums.c new file mode 100755 index 00000000..118897f4 --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/x86_64_netberg_aurora_620_rangeley_enums.c @@ -0,0 +1,10 @@ +/**************************************************************************//** + * + * + * + *****************************************************************************/ +#include + +/* <--auto.start.enum(ALL).source> */ +/* */ + diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/x86_64_netberg_aurora_620_rangeley_int.h b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/x86_64_netberg_aurora_620_rangeley_int.h new file mode 100755 index 00000000..5b2d6901 --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/x86_64_netberg_aurora_620_rangeley_int.h @@ -0,0 +1,239 @@ +/**************************************************************************//** + * + * x86_64_netberg_aurora_620_rangeley Internal Header + * + *****************************************************************************/ +#ifndef __X86_64_NETBERG_AURORA_620_RANGELEY_INT_H__ +#define __X86_64_NETBERG_AURORA_620_RANGELEY_INT_H__ + +#include +#include + +/* */ +/** thermal_oid */ +typedef enum thermal_oid_e { + THERMAL_OID_THERMAL1 = ONLP_THERMAL_ID_CREATE(1), + THERMAL_OID_THERMAL2 = ONLP_THERMAL_ID_CREATE(2), + THERMAL_OID_THERMAL3 = ONLP_THERMAL_ID_CREATE(3), + THERMAL_OID_THERMAL4 = ONLP_THERMAL_ID_CREATE(4), + THERMAL_OID_THERMAL5 = ONLP_THERMAL_ID_CREATE(5), + THERMAL_OID_THERMAL6 = ONLP_THERMAL_ID_CREATE(6), + THERMAL_OID_THERMAL7 = ONLP_THERMAL_ID_CREATE(7), + THERMAL_OID_THERMAL8 = ONLP_THERMAL_ID_CREATE(8), + THERMAL_OID_THERMAL9 = ONLP_THERMAL_ID_CREATE(9), + THERMAL_OID_THERMAL10 = ONLP_THERMAL_ID_CREATE(10), +} thermal_oid_t; + +/** Enum names. */ +const char* thermal_oid_name(thermal_oid_t e); + +/** Enum values. */ +int thermal_oid_value(const char* str, thermal_oid_t* e, int substr); + +/** Enum descriptions. */ +const char* thermal_oid_desc(thermal_oid_t e); + +/** Enum validator. */ +int thermal_oid_valid(thermal_oid_t e); + +/** validator */ +#define THERMAL_OID_VALID(_e) \ + (thermal_oid_valid((_e))) + +/** thermal_oid_map table. */ +extern aim_map_si_t thermal_oid_map[]; +/** thermal_oid_desc_map table. */ +extern aim_map_si_t thermal_oid_desc_map[]; + +/** thermal_id */ +typedef enum thermal_id_e { + THERMAL_ID_THERMAL1 = 1, + THERMAL_ID_THERMAL2 = 2, + THERMAL_ID_THERMAL3 = 3, + THERMAL_ID_THERMAL4 = 4, + THERMAL_ID_THERMAL5 = 5, + THERMAL_ID_THERMAL6 = 6, + THERMAL_ID_THERMAL7 = 7, + THERMAL_ID_THERMAL8 = 8, + THERMAL_ID_THERMAL9 = 9, + THERMAL_ID_THERMAL10 = 10, +} thermal_id_t; + +/** Enum names. */ +const char* thermal_id_name(thermal_id_t e); + +/** Enum values. */ +int thermal_id_value(const char* str, thermal_id_t* e, int substr); + +/** Enum descriptions. */ +const char* thermal_id_desc(thermal_id_t e); + +/** Enum validator. */ +int thermal_id_valid(thermal_id_t e); + +/** validator */ +#define THERMAL_ID_VALID(_e) \ + (thermal_id_valid((_e))) + +/** thermal_id_map table. */ +extern aim_map_si_t thermal_id_map[]; +/** thermal_id_desc_map table. */ +extern aim_map_si_t thermal_id_desc_map[]; + + +/** psu_oid */ +typedef enum psu_oid_e { + PSU_OID_PSU1 = ONLP_PSU_ID_CREATE(1), + PSU_OID_PSU2 = ONLP_PSU_ID_CREATE(2), +} psu_oid_t; + +/** Enum names. */ +const char* psu_oid_name(psu_oid_t e); + +/** Enum values. */ +int psu_oid_value(const char* str, psu_oid_t* e, int substr); + +/** Enum descriptions. */ +const char* psu_oid_desc(psu_oid_t e); + +/** Enum validator. */ +int psu_oid_valid(psu_oid_t e); + +/** validator */ +#define PSU_OID_VALID(_e) \ + (psu_oid_valid((_e))) + +/** psu_oid_map table. */ +extern aim_map_si_t psu_oid_map[]; +/** psu_oid_desc_map table. */ +extern aim_map_si_t psu_oid_desc_map[]; + +/** psu_id */ +typedef enum psu_id_e { + PSU_ID_PSU1 = 1, + PSU_ID_PSU2 = 2, +} psu_id_t; + +/** Enum names. */ +const char* psu_id_name(psu_id_t e); + +/** Enum values. */ +int psu_id_value(const char* str, psu_id_t* e, int substr); + +/** Enum descriptions. */ +const char* psu_id_desc(psu_id_t e); + +/** Enum validator. */ +int psu_id_valid(psu_id_t e); + +/** validator */ +#define PSU_ID_VALID(_e) \ + (psu_id_valid((_e))) + +/** psu_id_map table. */ +extern aim_map_si_t psu_id_map[]; +/** psu_id_desc_map table. */ +extern aim_map_si_t psu_id_desc_map[]; + + + +/** fan_oid */ +typedef enum fan_oid_e { + FAN_OID_FAN1 = ONLP_FAN_ID_CREATE(1), + FAN_OID_FAN2 = ONLP_FAN_ID_CREATE(2), + FAN_OID_FAN3 = ONLP_FAN_ID_CREATE(3), + FAN_OID_FAN4 = ONLP_FAN_ID_CREATE(4), + FAN_OID_FAN5 = ONLP_FAN_ID_CREATE(5), + FAN_OID_FAN6 = ONLP_FAN_ID_CREATE(6), + FAN_OID_FAN7 = ONLP_FAN_ID_CREATE(7), + FAN_OID_FAN8 = ONLP_FAN_ID_CREATE(8), + FAN_OID_FAN9 = ONLP_FAN_ID_CREATE(9), + FAN_OID_FAN10 = ONLP_FAN_ID_CREATE(10), +} fan_oid_t; + +/** Enum names. */ +const char* fan_oid_name(fan_oid_t e); + +/** Enum values. */ +int fan_oid_value(const char* str, fan_oid_t* e, int substr); + +/** Enum descriptions. */ +const char* fan_oid_desc(fan_oid_t e); + +/** Enum validator. */ +int fan_oid_valid(fan_oid_t e); + +/** validator */ +#define FAN_OID_VALID(_e) \ + (fan_oid_valid((_e))) + +/** fan_oid_map table. */ +extern aim_map_si_t fan_oid_map[]; +/** fan_oid_desc_map table. */ +extern aim_map_si_t fan_oid_desc_map[]; + +/** fan_id */ +typedef enum fan_id_e { + FAN_ID_FAN1 = 1, + FAN_ID_FAN2 = 2, + FAN_ID_FAN3 = 3, + FAN_ID_FAN4 = 4, + FAN_ID_FAN5 = 5, + FAN_ID_FAN6 = 6, + FAN_ID_FAN7 = 7, + FAN_ID_FAN8 = 8, + FAN_ID_FAN9 = 9, + FAN_ID_FAN10 = 10, +} fan_id_t; + +/** Enum names. */ +const char* fan_id_name(fan_id_t e); + +/** Enum values. */ +int fan_id_value(const char* str, fan_id_t* e, int substr); + +/** Enum descriptions. */ +const char* fan_id_desc(fan_id_t e); + +/** Enum validator. */ +int fan_id_valid(fan_id_t e); + +/** validator */ +#define FAN_ID_VALID(_e) \ + (fan_id_valid((_e))) + +/** fan_id_map table. */ +extern aim_map_si_t fan_id_map[]; +/** fan_id_desc_map table. */ +extern aim_map_si_t fan_id_desc_map[]; + +/** led_oid */ +typedef enum led_oid_e { + LED_OID_LED1 = ONLP_LED_ID_CREATE(1), + LED_OID_LED2 = ONLP_LED_ID_CREATE(2), + LED_OID_LED3 = ONLP_LED_ID_CREATE(3), + LED_OID_LED4 = ONLP_LED_ID_CREATE(4), +} led_oid_t; + +/** led_id */ +typedef enum led_id_e { + LED_ID_LED1 = 1, + LED_ID_LED2 = 2, + LED_ID_LED3 = 3, + LED_ID_LED4 = 4, +} led_id_t; + +/* */ + +/* psu info table */ +struct psu_info_s { + char path[PATH_MAX]; + int present; + int busno; + int addr; +}; + +#define SYS_HWMON1_PREFIX "/sys/class/hwmon/hwmon1/device" +#define SYS_HWMON2_PREFIX "/sys/class/hwmon/hwmon2/device" + +#endif /* __X86_64_NETBERG_AURORA_620_RANGELEY_INT_H__ */ diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/x86_64_netberg_aurora_620_rangeley_log.c b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/x86_64_netberg_aurora_620_rangeley_log.c new file mode 100755 index 00000000..abf80730 --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/x86_64_netberg_aurora_620_rangeley_log.c @@ -0,0 +1,18 @@ +/**************************************************************************//** + * + * + * + *****************************************************************************/ +#include + +#include "x86_64_netberg_aurora_620_rangeley_log.h" +/* + * x86_64_netberg_aurora_620_rangeley log struct. + */ +AIM_LOG_STRUCT_DEFINE( + X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_LOG_OPTIONS_DEFAULT, + X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_LOG_BITS_DEFAULT, + NULL, /* Custom log map */ + X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_LOG_CUSTOM_BITS_DEFAULT + ); + diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/x86_64_netberg_aurora_620_rangeley_log.h b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/x86_64_netberg_aurora_620_rangeley_log.h new file mode 100755 index 00000000..4a2e994c --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/x86_64_netberg_aurora_620_rangeley_log.h @@ -0,0 +1,12 @@ +/**************************************************************************//** + * + * + * + *****************************************************************************/ +#ifndef __X86_64_NETBERG_AURORA_620_RANGELEY_LOG_H__ +#define __X86_64_NETBERG_AURORA_620_RANGELEY_LOG_H__ + +#define AIM_LOG_MODULE_NAME x86_64_netberg_aurora_620_rangeley +#include + +#endif /* __X86_64_NETBERG_AURORA_620_RANGELEY_LOG_H__ */ diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/x86_64_netberg_aurora_620_rangeley_module.c b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/x86_64_netberg_aurora_620_rangeley_module.c new file mode 100755 index 00000000..bdb59db4 --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/x86_64_netberg_aurora_620_rangeley_module.c @@ -0,0 +1,24 @@ +/**************************************************************************//** + * + * + * + *****************************************************************************/ +#include + +#include "x86_64_netberg_aurora_620_rangeley_log.h" + +static int +datatypes_init__(void) +{ +#define X86_64_NETBERG_AURORA_620_RANGELEY_ENUMERATION_ENTRY(_enum_name, _desc) AIM_DATATYPE_MAP_REGISTER(_enum_name, _enum_name##_map, _desc, AIM_LOG_INTERNAL); +#include + return 0; +} + +void __x86_64_netberg_aurora_620_rangeley_module_init__(void) +{ + AIM_LOG_STRUCT_REGISTER(); + datatypes_init__(); +} + +int __onlp_platform_version__ = 1; diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/x86_64_netberg_aurora_620_rangeley_ucli.c b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/x86_64_netberg_aurora_620_rangeley_ucli.c new file mode 100755 index 00000000..59bffca9 --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/x86_64_netberg_aurora_620_rangeley_ucli.c @@ -0,0 +1,50 @@ +/**************************************************************************//** + * + * + * + *****************************************************************************/ +#include + +#if X86_64_NETBERG_AURORA_620_RANGELEY_CONFIG_INCLUDE_UCLI == 1 + +#include +#include +#include + +static ucli_status_t +x86_64_netberg_aurora_620_rangeley_ucli_ucli__config__(ucli_context_t* uc) +{ + UCLI_HANDLER_MACRO_MODULE_CONFIG(x86_64_netberg_aurora_620_rangeley) +} + +/* */ +/* */ + +static ucli_module_t +x86_64_netberg_aurora_620_rangeley_ucli_module__ = + { + "x86_64_netberg_aurora_620_rangeley_ucli", + NULL, + x86_64_netberg_aurora_620_rangeley_ucli_ucli_handlers__, + NULL, + NULL, + }; + +ucli_node_t* +x86_64_netberg_aurora_620_rangeley_ucli_node_create(void) +{ + ucli_node_t* n; + ucli_module_init(&x86_64_netberg_aurora_620_rangeley_ucli_module__); + n = ucli_node_create("x86_64_netberg_aurora_620_rangeley", NULL, &x86_64_netberg_aurora_620_rangeley_ucli_module__); + ucli_node_subnode_add(n, ucli_module_log_node_create("x86_64_netberg_aurora_620_rangeley")); + return n; +} + +#else +void* +x86_64_netberg_aurora_620_rangeley_ucli_node_create(void) +{ + return NULL; +} +#endif + diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/platform-config/Makefile b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/platform-config/Makefile new file mode 100755 index 00000000..003238cf --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/platform-config/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/platform-config/r0/Makefile b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/platform-config/r0/Makefile new file mode 100755 index 00000000..003238cf --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/platform-config/r0/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/platform-config/r0/PKG.yml b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/platform-config/r0/PKG.yml new file mode 100755 index 00000000..87564008 --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/platform-config/r0/PKG.yml @@ -0,0 +1 @@ +!include $ONL_TEMPLATES/platform-config-platform.yml ARCH=amd64 VENDOR=netberg BASENAME=x86-64-netberg-aurora-620-rangeley REVISION=r0 diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/platform-config/r0/src/lib/x86-64-netberg-aurora-620-rangeley-r0.yml b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/platform-config/r0/src/lib/x86-64-netberg-aurora-620-rangeley-r0.yml new file mode 100755 index 00000000..ccecc53f --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/platform-config/r0/src/lib/x86-64-netberg-aurora-620-rangeley-r0.yml @@ -0,0 +1,30 @@ +--- + +###################################################################### +# +# platform-config for AURORA 620 +# +###################################################################### + +x86-64-netberg-aurora-620-rangeley-r0: + + grub: + + serial: >- + --port=0x2f8 + --speed=115200 + --word=8 + --parity=no + --stop=1 + + kernel: + <<: *kernel-3-16 + + args: >- + console=ttyS1,115200n8 + + ##network: + ## interfaces: + ## ma1: + ## name: ~ + ## syspath: pci0000:00/0000:00:14.0 diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/platform-config/r0/src/python/x86_64_netberg_aurora_620_rangeley_r0/__init__.py b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/platform-config/r0/src/python/x86_64_netberg_aurora_620_rangeley_r0/__init__.py new file mode 100755 index 00000000..cbd5f1ac --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/platform-config/r0/src/python/x86_64_netberg_aurora_620_rangeley_r0/__init__.py @@ -0,0 +1,17 @@ +from onl.platform.base import * +from onl.platform.netberg import * + +class OnlPlatform_x86_64_netberg_aurora_620_rangeley_r0(OnlPlatformNetberg, + OnlPlatformPortConfig_48x25_6x100): + PLATFORM='x86-64-netberg-aurora-620-rangeley-r0' + MODEL="AURORA620" + SYS_OBJECT_ID=".8.1" + + def baseconfig(self): + self.insmod("hardware_monitor") + + # make ds1339 as default rtc + os.system("ln -snf /dev/rtc1 /dev/rtc") + os.system("hwclock --hctosys") + + return True diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/.gitignore b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/.gitignore new file mode 100755 index 00000000..eeaa11a1 --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/.gitignore @@ -0,0 +1,2 @@ +*x86*64*netberg*aurora*720*rangeley*.mk +onlpdump.mk diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/Makefile b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/Makefile new file mode 100755 index 00000000..003238cf --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/modules/Makefile b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/modules/Makefile new file mode 100755 index 00000000..003238cf --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/modules/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/modules/PKG.yml b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/modules/PKG.yml new file mode 100755 index 00000000..bf665962 --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/modules/PKG.yml @@ -0,0 +1 @@ +!include $ONL_TEMPLATES/no-platform-modules.yml ARCH=amd64 VENDOR=netberg BASENAME=x86-64-netberg-aurora-720-rangeley diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/Makefile b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/Makefile new file mode 100755 index 00000000..003238cf --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/PKG.yml b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/PKG.yml new file mode 100755 index 00000000..8aa08b33 --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/PKG.yml @@ -0,0 +1 @@ +!include $ONL_TEMPLATES/onlp-platform-any.yml PLATFORM=x86-64-netberg-aurora-720-rangeley ARCH=amd64 TOOLCHAIN=x86_64-linux-gnu diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/Makefile b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/Makefile new file mode 100755 index 00000000..e7437cb2 --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/Makefile @@ -0,0 +1,2 @@ +FILTER=src +include $(ONL)/make/subdirs.mk diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/lib/Makefile b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/lib/Makefile new file mode 100755 index 00000000..bacf5db7 --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/lib/Makefile @@ -0,0 +1,45 @@ +############################################################ +# +# +# Copyright 2014 BigSwitch Networks, Inc. +# +# Licensed under the Eclipse Public License, Version 1.0 (the +# "License"); you may not use this file except in compliance +# with the License. You may obtain a copy of the License at +# +# http://www.eclipse.org/legal/epl-v10.html +# +# Unless required by applicable law or agreed to in writing, +# software distributed under the License is distributed on an +# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, +# either express or implied. See the License for the specific +# language governing permissions and limitations under the +# License. +# +# +############################################################ +# +# +############################################################ +include $(ONL)/make/config.amd64.mk + +MODULE := libonlp-x86-64-netberg-aurora-720-rangeley +include $(BUILDER)/standardinit.mk + +DEPENDMODULES := AIM IOF x86_64_netberg_aurora_720_rangeley onlplib +DEPENDMODULE_HEADERS := sff + +include $(BUILDER)/dependmodules.mk + +SHAREDLIB := libonlp-x86-64-netberg-aurora-720-rangeley.so +$(SHAREDLIB)_TARGETS := $(ALL_TARGETS) +include $(BUILDER)/so.mk +.DEFAULT_GOAL := $(SHAREDLIB) + +GLOBAL_CFLAGS += -I$(onlp_BASEDIR)/module/inc +GLOBAL_CFLAGS += -DAIM_CONFIG_INCLUDE_MODULES_INIT=1 +GLOBAL_CFLAGS += -fPIC +GLOBAL_LINK_LIBS += -lpthread + +include $(BUILDER)/targets.mk + diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/onlpdump/Makefile b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/onlpdump/Makefile new file mode 100755 index 00000000..01db18a4 --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/onlpdump/Makefile @@ -0,0 +1,45 @@ +############################################################ +# +# +# Copyright 2014 BigSwitch Networks, Inc. +# +# Licensed under the Eclipse Public License, Version 1.0 (the +# "License"); you may not use this file except in compliance +# with the License. You may obtain a copy of the License at +# +# http://www.eclipse.org/legal/epl-v10.html +# +# Unless required by applicable law or agreed to in writing, +# software distributed under the License is distributed on an +# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, +# either express or implied. See the License for the specific +# language governing permissions and limitations under the +# License. +# +# +############################################################ +# +# +# +############################################################ +include $(ONL)/make/config.amd64.mk + +.DEFAULT_GOAL := onlpdump + +MODULE := onlpdump +include $(BUILDER)/standardinit.mk + +DEPENDMODULES := AIM IOF onlp x86_64_netberg_aurora_720_rangeley onlplib onlp_platform_defaults sff cjson cjson_util timer_wheel OS + +include $(BUILDER)/dependmodules.mk + +BINARY := onlpdump +$(BINARY)_LIBRARIES := $(LIBRARY_TARGETS) +include $(BUILDER)/bin.mk + +GLOBAL_CFLAGS += -DAIM_CONFIG_AIM_MAIN_FUNCTION=onlpdump_main +GLOBAL_CFLAGS += -DAIM_CONFIG_INCLUDE_MODULES_INIT=1 +GLOBAL_CFLAGS += -DAIM_CONFIG_INCLUDE_MAIN=1 +GLOBAL_LINK_LIBS += -lpthread -lm + +include $(BUILDER)/targets.mk diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/.module b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/.module new file mode 100755 index 00000000..5e2f8b9e --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/.module @@ -0,0 +1 @@ +name: x86_64_netberg_aurora_720_rangeley diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/Makefile b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/Makefile new file mode 100755 index 00000000..633255c5 --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/Makefile @@ -0,0 +1,9 @@ +############################################################################### +# +# +# +############################################################################### +include $(ONL)/make/config.mk +MODULE := x86_64_netberg_aurora_720_rangeley +AUTOMODULE := x86_64_netberg_aurora_720_rangeley +include $(BUILDER)/definemodule.mk diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/auto/make.mk b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/auto/make.mk new file mode 100755 index 00000000..0e083d68 --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/auto/make.mk @@ -0,0 +1,9 @@ +############################################################################### +# +# x86_64_netberg_aurora_720_rangeley Autogeneration +# +############################################################################### +x86_64_netberg_aurora_720_rangeley_AUTO_DEFS := module/auto/x86_64_netberg_aurora_720_rangeley.yml +x86_64_netberg_aurora_720_rangeley_AUTO_DIRS := module/inc/x86_64_netberg_aurora_720_rangeley module/src +include $(BUILDER)/auto.mk + diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/auto/x86_64_netberg_aurora_720_rangeley.yml b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/auto/x86_64_netberg_aurora_720_rangeley.yml new file mode 100755 index 00000000..3d2d0957 --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/auto/x86_64_netberg_aurora_720_rangeley.yml @@ -0,0 +1,114 @@ +############################################################################### +# +# x86_64_netberg_aurora_720_rangeley Autogeneration Definitions. +# +############################################################################### + +cdefs: &cdefs +- X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_INCLUDE_LOGGING: + doc: "Include or exclude logging." + default: 1 +- X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_LOG_OPTIONS_DEFAULT: + doc: "Default enabled log options." + default: AIM_LOG_OPTIONS_DEFAULT +- X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_LOG_BITS_DEFAULT: + doc: "Default enabled log bits." + default: AIM_LOG_BITS_DEFAULT +- X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_LOG_CUSTOM_BITS_DEFAULT: + doc: "Default enabled custom log bits." + default: 0 +- X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_PORTING_STDLIB: + doc: "Default all porting macros to use the C standard libraries." + default: 1 +- X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS: + doc: "Include standard library headers for stdlib porting macros." + default: X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_PORTING_STDLIB +- X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_INCLUDE_UCLI: + doc: "Include generic uCli support." + default: 0 +- X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_SYSFAN_RPM_FAILURE_THRESHOLD: + doc: "RPM Threshold at which the fan is considered to have failed." + default: 3000 + +definitions: + cdefs: + X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_HEADER: + defs: *cdefs + basename: x86_64_netberg_aurora_720_rangeley_config + + enum: &enums + + fan_id: + members: + - FAN1 : 1 + - FAN2 : 2 + - FAN3 : 3 + - FAN4 : 4 + - FAN5 : 5 + - FAN6 : 6 + - FAN7 : 7 + - FAN8 : 8 + - FAN9 : 9 + - FAN10 : 10 + + fan_oid: + members: + - FAN1 : ONLP_FAN_ID_CREATE(1) + - FAN2 : ONLP_FAN_ID_CREATE(2) + - FAN3 : ONLP_FAN_ID_CREATE(3) + - FAN4 : ONLP_FAN_ID_CREATE(4) + - FAN5 : ONLP_FAN_ID_CREATE(5) + - FAN6 : ONLP_FAN_ID_CREATE(6) + - FAN7 : ONLP_FAN_ID_CREATE(7) + - FAN8 : ONLP_FAN_ID_CREATE(8) + - FAN9 : ONLP_FAN_ID_CREATE(9) + - FAN10 : ONLP_FAN_ID_CREATE(10) + + psu_id: + members: + - PSU1 : 1 + - PSU2 : 2 + + psu_oid: + members: + - PSU1 : ONLP_PSU_ID_CREATE(1) + - PSU2 : ONLP_PSU_ID_CREATE(2) + + thermal_id: + members: + - THERMAL1 : 1 + - THERMAL2 : 2 + - THERMAL3 : 3 + - THERMAL4 : 4 + - THERMAL5 : 5 + - THERMAL6 : 6 + - THERMAL7 : 7 + + thermal_oid: + members: + - THERMAL1 : ONLP_THERMAL_ID_CREATE(1) + - THERMAL2 : ONLP_THERMAL_ID_CREATE(2) + - THERMAL3 : ONLP_THERMAL_ID_CREATE(3) + - THERMAL4 : ONLP_THERMAL_ID_CREATE(4) + - THERMAL5 : ONLP_THERMAL_ID_CREATE(5) + - THERMAL6 : ONLP_THERMAL_ID_CREATE(6) + - THERMAL7 : ONLP_THERMAL_ID_CREATE(7) + + led_id: + members: + - STAT : 1 + + led_oid: + members: + - STAT : ONLP_LED_ID_CREATE(1) + + + portingmacro: + X86_64_NETBERG_AURORA_720_RANGELEY: + macros: + - memset + - memcpy + - strncpy + - vsnprintf + - snprintf + - strlen diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/inc/x86_64_netberg_aurora_720_rangeley/x86_64_netberg_aurora_720_rangeley.x b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/inc/x86_64_netberg_aurora_720_rangeley/x86_64_netberg_aurora_720_rangeley.x new file mode 100755 index 00000000..50417fcb --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/inc/x86_64_netberg_aurora_720_rangeley/x86_64_netberg_aurora_720_rangeley.x @@ -0,0 +1,14 @@ +/**************************************************************************//** + * + * + * + *****************************************************************************/ +#include + +/* <--auto.start.xmacro(ALL).define> */ +/* */ + +/* <--auto.start.xenum(ALL).define> */ +/* */ + + diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/inc/x86_64_netberg_aurora_720_rangeley/x86_64_netberg_aurora_720_rangeley_config.h b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/inc/x86_64_netberg_aurora_720_rangeley/x86_64_netberg_aurora_720_rangeley_config.h new file mode 100755 index 00000000..43e806f8 --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/inc/x86_64_netberg_aurora_720_rangeley/x86_64_netberg_aurora_720_rangeley_config.h @@ -0,0 +1,135 @@ +/**************************************************************************//** + * + * @file + * @brief x86_64_netberg_aurora_720_rangeley Configuration Header + * + * @addtogroup x86_64_netberg_aurora_720_rangeley-config + * @{ + * + *****************************************************************************/ +#ifndef __X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_H__ +#define __X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_H__ + +#ifdef GLOBAL_INCLUDE_CUSTOM_CONFIG +#include +#endif +#ifdef X86_64_NETBERG_AURORA_720_RANGELEY_INCLUDE_CUSTOM_CONFIG +#include +#endif + +/* */ +#include +/** + * X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_INCLUDE_LOGGING + * + * Include or exclude logging. */ + + +#ifndef X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_INCLUDE_LOGGING +#define X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_INCLUDE_LOGGING 1 +#endif + +/** + * X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_LOG_OPTIONS_DEFAULT + * + * Default enabled log options. */ + + +#ifndef X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_LOG_OPTIONS_DEFAULT +#define X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_LOG_OPTIONS_DEFAULT AIM_LOG_OPTIONS_DEFAULT +#endif + +/** + * X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_LOG_BITS_DEFAULT + * + * Default enabled log bits. */ + + +#ifndef X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_LOG_BITS_DEFAULT +#define X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_LOG_BITS_DEFAULT AIM_LOG_BITS_DEFAULT +#endif + +/** + * X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_LOG_CUSTOM_BITS_DEFAULT + * + * Default enabled custom log bits. */ + + +#ifndef X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_LOG_CUSTOM_BITS_DEFAULT +#define X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_LOG_CUSTOM_BITS_DEFAULT 0 +#endif + +/** + * X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_PORTING_STDLIB + * + * Default all porting macros to use the C standard libraries. */ + + +#ifndef X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_PORTING_STDLIB +#define X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_PORTING_STDLIB 1 +#endif + +/** + * X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS + * + * Include standard library headers for stdlib porting macros. */ + + +#ifndef X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS +#define X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_PORTING_STDLIB +#endif + +/** + * X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_INCLUDE_UCLI + * + * Include generic uCli support. */ + + +#ifndef X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_INCLUDE_UCLI +#define X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_INCLUDE_UCLI 0 +#endif + +/** + * X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_SYSFAN_RPM_FAILURE_THRESHOLD + * + * RPM Threshold at which the fan is considered to have failed. */ + + +#ifndef X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_SYSFAN_RPM_FAILURE_THRESHOLD +#define X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_SYSFAN_RPM_FAILURE_THRESHOLD 3000 +#endif + +/** + * All compile time options can be queried or displayed + */ + +/** Configuration settings structure. */ +typedef struct x86_64_netberg_aurora_720_rangeley_config_settings_s { + /** name */ + const char* name; + /** value */ + const char* value; +} x86_64_netberg_aurora_720_rangeley_config_settings_t; + +/** Configuration settings table. */ +/** x86_64_netberg_aurora_720_rangeley_config_settings table. */ +extern x86_64_netberg_aurora_720_rangeley_config_settings_t x86_64_netberg_aurora_720_rangeley_config_settings[]; + +/** + * @brief Lookup a configuration setting. + * @param setting The name of the configuration option to lookup. + */ +const char* x86_64_netberg_aurora_720_rangeley_config_lookup(const char* setting); + +/** + * @brief Show the compile-time configuration. + * @param pvs The output stream. + */ +int x86_64_netberg_aurora_720_rangeley_config_show(struct aim_pvs_s* pvs); + +/* */ + +#include "x86_64_netberg_aurora_720_rangeley_porting.h" + +#endif /* __X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_H__ */ +/* @} */ diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/inc/x86_64_netberg_aurora_720_rangeley/x86_64_netberg_aurora_720_rangeley_dox.h b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/inc/x86_64_netberg_aurora_720_rangeley/x86_64_netberg_aurora_720_rangeley_dox.h new file mode 100755 index 00000000..e4d0aa60 --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/inc/x86_64_netberg_aurora_720_rangeley/x86_64_netberg_aurora_720_rangeley_dox.h @@ -0,0 +1,26 @@ +/**************************************************************************//** + * + * x86_64_netberg_aurora_720_rangeley Doxygen Header + * + *****************************************************************************/ +#ifndef __X86_64_NETBERG_AURORA_720_RANGELEY_DOX_H__ +#define __X86_64_NETBERG_AURORA_720_RANGELEY_DOX_H__ + +/** + * @defgroup x86_64_netberg_aurora_720_rangeley x86_64_netberg_aurora_720_rangeley - x86_64_netberg_aurora_720_rangeley Description + * + +The documentation overview for this module should go here. + + * + * @{ + * + * @defgroup x86_64_netberg_aurora_720_rangeley-x86_64_netberg_aurora_720_rangeley Public Interface + * @defgroup x86_64_netberg_aurora_720_rangeley-config Compile Time Configuration + * @defgroup x86_64_netberg_aurora_720_rangeley-porting Porting Macros + * + * @} + * + */ + +#endif /* __X86_64_NETBERG_AURORA_720_RANGELEY_DOX_H__ */ diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/inc/x86_64_netberg_aurora_720_rangeley/x86_64_netberg_aurora_720_rangeley_porting.h b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/inc/x86_64_netberg_aurora_720_rangeley/x86_64_netberg_aurora_720_rangeley_porting.h new file mode 100755 index 00000000..be815368 --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/inc/x86_64_netberg_aurora_720_rangeley/x86_64_netberg_aurora_720_rangeley_porting.h @@ -0,0 +1,87 @@ +/**************************************************************************//** + * + * @file + * @brief x86_64_netberg_aurora_720_rangeley Porting Macros. + * + * @addtogroup x86_64_netberg_aurora_720_rangeley-porting + * @{ + * + *****************************************************************************/ +#ifndef __X86_64_NETBERG_AURORA_720_RANGELEY_PORTING_H__ +#define __X86_64_NETBERG_AURORA_720_RANGELEY_PORTING_H__ + + +/* */ +#if X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS == 1 +#include +#include +#include +#include +#include +#endif + +#ifndef X86_64_NETBERG_AURORA_720_RANGELEY_MEMSET + #if defined(GLOBAL_MEMSET) + #define X86_64_NETBERG_AURORA_720_RANGELEY_MEMSET GLOBAL_MEMSET + #elif X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_PORTING_STDLIB == 1 + #define X86_64_NETBERG_AURORA_720_RANGELEY_MEMSET memset + #else + #error The macro X86_64_NETBERG_AURORA_720_RANGELEY_MEMSET is required but cannot be defined. + #endif +#endif + +#ifndef X86_64_NETBERG_AURORA_720_RANGELEY_MEMCPY + #if defined(GLOBAL_MEMCPY) + #define X86_64_NETBERG_AURORA_720_RANGELEY_MEMCPY GLOBAL_MEMCPY + #elif X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_PORTING_STDLIB == 1 + #define X86_64_NETBERG_AURORA_720_RANGELEY_MEMCPY memcpy + #else + #error The macro X86_64_NETBERG_AURORA_720_RANGELEY_MEMCPY is required but cannot be defined. + #endif +#endif + +#ifndef X86_64_NETBERG_AURORA_720_RANGELEY_STRNCPY + #if defined(GLOBAL_STRNCPY) + #define X86_64_NETBERG_AURORA_720_RANGELEY_STRNCPY GLOBAL_STRNCPY + #elif X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_PORTING_STDLIB == 1 + #define X86_64_NETBERG_AURORA_720_RANGELEY_STRNCPY strncpy + #else + #error The macro X86_64_NETBERG_AURORA_720_RANGELEY_STRNCPY is required but cannot be defined. + #endif +#endif + +#ifndef X86_64_NETBERG_AURORA_720_RANGELEY_VSNPRINTF + #if defined(GLOBAL_VSNPRINTF) + #define X86_64_NETBERG_AURORA_720_RANGELEY_VSNPRINTF GLOBAL_VSNPRINTF + #elif X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_PORTING_STDLIB == 1 + #define X86_64_NETBERG_AURORA_720_RANGELEY_VSNPRINTF vsnprintf + #else + #error The macro X86_64_NETBERG_AURORA_720_RANGELEY_VSNPRINTF is required but cannot be defined. + #endif +#endif + +#ifndef X86_64_NETBERG_AURORA_720_RANGELEY_SNPRINTF + #if defined(GLOBAL_SNPRINTF) + #define X86_64_NETBERG_AURORA_720_RANGELEY_SNPRINTF GLOBAL_SNPRINTF + #elif X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_PORTING_STDLIB == 1 + #define X86_64_NETBERG_AURORA_720_RANGELEY_SNPRINTF snprintf + #else + #error The macro X86_64_NETBERG_AURORA_720_RANGELEY_SNPRINTF is required but cannot be defined. + #endif +#endif + +#ifndef X86_64_NETBERG_AURORA_720_RANGELEY_STRLEN + #if defined(GLOBAL_STRLEN) + #define X86_64_NETBERG_AURORA_720_RANGELEY_STRLEN GLOBAL_STRLEN + #elif X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_PORTING_STDLIB == 1 + #define X86_64_NETBERG_AURORA_720_RANGELEY_STRLEN strlen + #else + #error The macro X86_64_NETBERG_AURORA_720_RANGELEY_STRLEN is required but cannot be defined. + #endif +#endif + +/* */ + + +#endif /* __X86_64_NETBERG_AURORA_720_RANGELEY_PORTING_H__ */ +/* @} */ diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/make.mk b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/make.mk new file mode 100755 index 00000000..38ee23fe --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/make.mk @@ -0,0 +1,10 @@ +############################################################################### +# +# +# +############################################################################### +THIS_DIR := $(dir $(lastword $(MAKEFILE_LIST))) +x86_64_netberg_aurora_720_rangeley_INCLUDES := -I $(THIS_DIR)inc +x86_64_netberg_aurora_720_rangeley_INTERNAL_INCLUDES := -I $(THIS_DIR)src +x86_64_netberg_aurora_720_rangeley_DEPENDMODULE_ENTRIES := init:x86_64_netberg_aurora_720_rangeley ucli:x86_64_netberg_aurora_720_rangeley + diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/Makefile b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/Makefile new file mode 100755 index 00000000..0a2eb4ed --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/Makefile @@ -0,0 +1,9 @@ +############################################################################### +# +# Local source generation targets. +# +############################################################################### + +ucli: + @../../../../tools/uclihandlers.py x86_64_netberg_aurora_720_rangeley_ucli.c + diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/fani.c b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/fani.c new file mode 100755 index 00000000..3a4cc970 --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/fani.c @@ -0,0 +1,234 @@ +/************************************************************ + * + * + * Copyright 2014 Big Switch Networks, Inc. + * + * Licensed under the Eclipse Public License, Version 1.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.eclipse.org/legal/epl-v10.html + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, + * either express or implied. See the License for the specific + * language governing permissions and limitations under the + * License. + * + * + ************************************************************ + * + * + * + ***********************************************************/ +#include +#include + +#include "x86_64_netberg_aurora_720_rangeley_int.h" +#include "x86_64_netberg_aurora_720_rangeley_log.h" + +#include + + +#define VALIDATE(_id) \ + do { \ + if(!ONLP_OID_IS_FAN(_id)) { \ + return ONLP_STATUS_E_INVALID; \ + } \ + } while(0) + +static int +sys_fan_info_get__(onlp_fan_info_t* info, int id) +{ + int value = 0; + int rv; + + rv = onlp_file_read_int(&value, SYS_HWMON2_PREFIX "/fan%d_abs", ((id/2)+1)); + if (rv != ONLP_STATUS_OK) + return rv; + + if (value == 0) + { + info->status = ONLP_FAN_STATUS_FAILED; + } + else + { + info->status = ONLP_FAN_STATUS_PRESENT; + + rv = onlp_file_read_int(&value, SYS_HWMON2_PREFIX "/fan%d_dir", ((id/2)+1)); + if (rv != ONLP_STATUS_OK) + return rv; + + if (value == 0) + { + info->status |= ONLP_FAN_STATUS_B2F; + info->caps |= ONLP_FAN_CAPS_B2F; + } + else + { + info->status |= ONLP_FAN_STATUS_F2B; + info->caps |= ONLP_FAN_CAPS_F2B; + } + + rv = onlp_file_read_int(&(info->rpm), SYS_HWMON1_PREFIX "/fan%d_rpm", (id+1)); + if (rv == ONLP_STATUS_E_INTERNAL) + return rv; + + if (rv == ONLP_STATUS_E_MISSING) + { + info->status &= ~1; + return 0; + } + + if (info->rpm <= X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_SYSFAN_RPM_FAILURE_THRESHOLD) + info->status |= ONLP_FAN_STATUS_FAILED; + + + rv = onlp_file_read_int(&(info->percentage), SYS_HWMON1_PREFIX "/fan%d_duty", (id+1)); + if (rv == ONLP_STATUS_E_INTERNAL) + return rv; + + if (rv == ONLP_STATUS_E_MISSING) + { + info->status &= ~1; + return 0; + } + } + return 0; +} + +static int +psu_fan_info_get__(onlp_fan_info_t* info, int id) +{ + return onlp_file_read_int(&(info->rpm), SYS_HWMON2_PREFIX "/psu%d_fan_speed", id); +} + +/* Onboard Fans */ +static onlp_fan_info_t fans__[] = { + { }, /* Not used */ + { { FAN_OID_FAN1, "Fan1_rotor1", 0}, ONLP_FAN_STATUS_PRESENT }, + { { FAN_OID_FAN2, "Fan1_rotor2", 0}, ONLP_FAN_STATUS_PRESENT }, + { { FAN_OID_FAN3, "Fan2_rotor1", 0}, ONLP_FAN_STATUS_PRESENT }, + { { FAN_OID_FAN4, "Fan2_rotor2", 0}, ONLP_FAN_STATUS_PRESENT }, + { { FAN_OID_FAN5, "Fan3_rotor1", 0}, ONLP_FAN_STATUS_PRESENT }, + { { FAN_OID_FAN6, "Fan3_rotor2", 0}, ONLP_FAN_STATUS_PRESENT }, + { { FAN_OID_FAN7, "Fan4_rotor1", 0}, ONLP_FAN_STATUS_PRESENT }, + { { FAN_OID_FAN8, "Fan4_rotor2", 0}, ONLP_FAN_STATUS_PRESENT }, + { { FAN_OID_FAN9, "PSU-1 Fan", 0 }, ONLP_FAN_STATUS_PRESENT }, + { { FAN_OID_FAN10, "PSU-2 Fan", 0 }, ONLP_FAN_STATUS_PRESENT }, +}; + +/* + * This function will be called prior to all of onlp_fani_* functions. + */ +int +onlp_fani_init(void) +{ + return ONLP_STATUS_OK; +} + +int +onlp_fani_info_get(onlp_oid_t id, onlp_fan_info_t* info) +{ + int fid; + + VALIDATE(id); + + memset(info, 0, sizeof(onlp_fan_info_t)); + fid = ONLP_OID_ID_GET(id); + *info = fans__[fid]; + + info->caps |= ONLP_FAN_CAPS_GET_RPM; + + switch(fid) + { + case FAN_ID_FAN1: + case FAN_ID_FAN2: + case FAN_ID_FAN3: + case FAN_ID_FAN4: + case FAN_ID_FAN5: + case FAN_ID_FAN6: + case FAN_ID_FAN7: + case FAN_ID_FAN8: + return sys_fan_info_get__(info, (fid - 1)); + break; + + case FAN_ID_FAN9: + case FAN_ID_FAN10: + return psu_fan_info_get__(info, (fid - FAN_ID_FAN9 + 1)); + break; + + default: + return ONLP_STATUS_E_INVALID; + break; + } + + return ONLP_STATUS_E_INVALID; +} + +/* + * This function sets the speed of the given fan in RPM. + * + * This function will only be called if the fan supprots the RPM_SET + * capability. + * + * It is optional if you have no fans at all with this feature. + */ +int +onlp_fani_rpm_set(onlp_oid_t id, int rpm) +{ + return ONLP_STATUS_E_UNSUPPORTED; +} + + +/* + * This function sets the fan speed of the given OID as a percentage. + * + * This will only be called if the OID has the PERCENTAGE_SET + * capability. + * + * It is optional if you have no fans at all with this feature. + */ +int +onlp_fani_percentage_set(onlp_oid_t id, int p) +{ + return ONLP_STATUS_E_UNSUPPORTED; +} + +/* + * This function sets the fan speed of the given OID as per + * the predefined ONLP fan speed modes: off, slow, normal, fast, max. + * + * Interpretation of these modes is up to the platform. + * + */ +int +onlp_fani_mode_set(onlp_oid_t id, onlp_fan_mode_t mode) +{ + return ONLP_STATUS_E_UNSUPPORTED; +} + +/* + * This function sets the fan direction of the given OID. + * + * This function is only relevant if the fan OID supports both direction + * capabilities. + * + * This function is optional unless the functionality is available. + */ +int +onlp_fani_dir_set(onlp_oid_t id, onlp_fan_dir_t dir) +{ + return ONLP_STATUS_E_UNSUPPORTED; +} + +/* + * Generic fan ioctl. Optional. + */ +int +onlp_fani_ioctl(onlp_oid_t id, va_list vargs) +{ + return ONLP_STATUS_E_UNSUPPORTED; +} + diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/ledi.c b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/ledi.c new file mode 100755 index 00000000..d906a48c --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/ledi.c @@ -0,0 +1,165 @@ +/************************************************************ + * + * + * Copyright 2014 Big Switch Networks, Inc. + * Copyright 2013 Accton Technology Corporation. + * + * Licensed under the Eclipse Public License, Version 1.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.eclipse.org/legal/epl-v10.html + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, + * either express or implied. See the License for the specific + * language governing permissions and limitations under the + * License. + * + * + ************************************************************ + * + * + * + ***********************************************************/ +#include +#include +#include "x86_64_netberg_aurora_720_rangeley_int.h" + +#define VALIDATE(_id) \ + do { \ + if(!ONLP_OID_IS_LED(_id)) { \ + return ONLP_STATUS_E_INVALID; \ + } \ + } while(0) + +/* LED related data + */ +enum led_light_mode { /*must be the same with the definition @ kernel driver */ + LED_MODE_OFF = 0, + LED_MODE_AMBER, + LED_MODE_GREEN, +}; + +int led_light_map_mode[][2] = +{ + {LED_MODE_OFF, ONLP_LED_MODE_OFF}, + {LED_MODE_AMBER, ONLP_LED_MODE_ORANGE}, + {LED_MODE_GREEN, ONLP_LED_MODE_GREEN}, +}; + +/* + * Get the information for the given LED OID. + */ +static onlp_led_info_t linfo[] = +{ + { }, /* Not used */ + { + { LED_OID_LED1, "Chassis LED 1 (STAT LED)", 0 }, + ONLP_LED_STATUS_PRESENT, + ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_ORANGE | ONLP_LED_CAPS_GREEN, + ONLP_LED_MODE_OFF, + }, +}; + +static int conver_led_light_mode_to_driver(int led_ligth_mode) +{ + int i, nsize = sizeof(led_light_map_mode)/sizeof(led_light_map_mode[0]); + for(i=0; i + * + ************************************************************ + * + * + * + ***********************************************************/ +#include +#include +#include +#include "x86_64_netberg_aurora_720_rangeley_int.h" +#include "x86_64_netberg_aurora_720_rangeley_log.h" + +extern int toHexValue(char ch); + +#define VALIDATE(_id) \ + do { \ + if(!ONLP_OID_IS_PSU(_id)) { \ + return ONLP_STATUS_E_INVALID; \ + } \ + } while(0) + +static onlp_psu_info_t psus__[] = { + { }, /* Not used */ + { + { + PSU_OID_PSU1, + "PSU-1", + 0, + { + FAN_OID_FAN9, + }, + } + }, + { + { + PSU_OID_PSU2, + "PSU-2", + 0, + { + FAN_OID_FAN10, + }, + } + }, +}; + +/* + * This function will be called prior to any other onlp_psui functions. + */ +int +onlp_psui_init(void) +{ + return ONLP_STATUS_OK; +} + +int +onlp_psui_info_get(onlp_oid_t id, onlp_psu_info_t* info) +{ + int rv; + int pid; + uint8_t buffer[512]; + uint8_t data[256]; + int value = -1; + int len; + double dvalue; + int i, j; + + VALIDATE(id); + + memset(info, 0, sizeof(onlp_psu_info_t)); + pid = ONLP_OID_ID_GET(id); + *info = psus__[pid]; + + rv = onlp_file_read_int(&value, SYS_HWMON1_PREFIX "/psu%d_abs", pid); + if (rv != ONLP_STATUS_OK) + return rv; + if (value == 0) + { + info->status = ONLP_PSU_STATUS_UNPLUGGED; + return ONLP_STATUS_OK; + } + + /* PSU is present. */ + info->status = ONLP_PSU_STATUS_PRESENT; + + memset(buffer, 0, sizeof(buffer)); + memset(data, 0, sizeof(data)); + rv = onlp_file_read(buffer, sizeof(buffer), &len, SYS_HWMON2_PREFIX "/psu%d_eeprom", pid); + if (rv == ONLP_STATUS_OK) + { + j = 0; + for (i=0; i<256; i++) + { + data[i] = (toHexValue(buffer[j])<<4) + toHexValue(buffer[j+1]); + j += 2; + } + i = 11; + + /* Manufacturer Name */ + len = (data[i]&0x0f); + i++; + i += len; + + /* Product Name */ + len = (data[i]&0x0f); + i++; + memcpy(info->model, (char *) &(data[i]), len); + i += len; + + /* Product part,model number */ + len = (data[i]&0x0f); + i++; + i += len; + + /* Product Version */ + len = (data[i]&0x0f); + i++; + i += len; + + /* Product Serial Number */ + len = (data[i]&0x0f); + i++; + memcpy(info->serial, (char *) &(data[i]), len); + } + else + { + strcpy(info->model, "Missing"); + strcpy(info->serial, "Missing"); + } + + info->caps |= ONLP_PSU_CAPS_AC; + +#if 0 + /* PSU is powered. */ + rv = onlp_file_read_int(&value, SYS_HWMON1_PREFIX "/psu%d_pg", pid); + if (rv != ONLP_STATUS_OK) + return rv; + if (value == 0) + { + info->status |= ONLP_PSU_STATUS_FAILED; + return ONLP_STATUS_OK; + } +#endif + + memset(buffer, 0, sizeof(buffer)); + rv = onlp_file_read(buffer, sizeof(buffer), &len, SYS_HWMON2_PREFIX "/psu%d_iout", pid); + if (rv == ONLP_STATUS_OK) + { + dvalue = atof((const char *)buffer); + if (dvalue > 0.0) + { + info->caps |= ONLP_PSU_CAPS_IOUT; + info->miout = (int)(dvalue * 1000); + } + } + + memset(buffer, 0, sizeof(buffer)); + rv = onlp_file_read(buffer, sizeof(buffer), &len, SYS_HWMON2_PREFIX "/psu%d_vout", pid); + if (rv == ONLP_STATUS_OK) + { + dvalue = atof((const char *)buffer); + if (dvalue > 0.0) + { + info->caps |= ONLP_PSU_CAPS_VOUT; + info->mvout = (int)(dvalue * 1000); + } + } + + memset(buffer, 0, sizeof(buffer)); + rv = onlp_file_read(buffer, sizeof(buffer), &len, SYS_HWMON2_PREFIX "/psu%d_pin", pid); + if (rv == ONLP_STATUS_OK) + { + dvalue = atof((const char *)buffer); + if (dvalue > 0.0) + { + info->caps |= ONLP_PSU_CAPS_PIN; + info->mpin = (int)(dvalue * 1000); + } + } + + memset(buffer, 0, sizeof(buffer)); + rv = onlp_file_read(buffer, sizeof(buffer), &len, SYS_HWMON2_PREFIX "/psu%d_pout", pid); + if (rv == ONLP_STATUS_OK) + { + dvalue = atof((const char *)buffer); + if (dvalue > 0.0) + { + info->caps |= ONLP_PSU_CAPS_POUT; + info->mpout = (int)(dvalue * 1000); + } + } + + return ONLP_STATUS_OK; +} + +/* + * This is an optional generic ioctl() interface. + * Its purpose is to allow future expansion and + * custom functionality that is not otherwise exposed + * in the standard interface. + * + * The semantics of this function are platform specific. + * This function is completely optional. + */ +int +onlp_psui_ioctl(onlp_oid_t pid, va_list vargs) +{ + return ONLP_STATUS_E_UNSUPPORTED; +} + diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/sfpi.c b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/sfpi.c new file mode 100755 index 00000000..51e892e0 --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/sfpi.c @@ -0,0 +1,389 @@ +/************************************************************ + * + * + * Copyright 2014 Big Switch Networks, Inc. + * + * Licensed under the Eclipse Public License, Version 1.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.eclipse.org/legal/epl-v10.html + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, + * either express or implied. See the License for the specific + * language governing permissions and limitations under the + * License. + * + * + ************************************************************ + * + * SFPI Interface for the Aurora 720 Platform + * + ***********************************************************/ +#include +#include +#include +#include +#include +#include "x86_64_netberg_aurora_720_rangeley_int.h" +#include "x86_64_netberg_aurora_720_rangeley_log.h" + +#include +#include + +/* Model ID Definition */ +typedef enum +{ + HURACAN_WITH_BMC = 0x0, + HURACAN_WITHOUT_BMC, + CABRERAIII_WITH_BMC, + CABRERAIII_WITHOUT_BMC, + SESTO_WITH_BMC, + SESTO_WITHOUT_BMC, + NCIIX_WITH_BMC, + NCIIX_WITHOUT_BMC, + ASTERION_WITH_BMC, + ASTERION_WITHOUT_BMC, + HURACAN_A_WITH_BMC, + HURACAN_A_WITHOUT_BMC, + + MODEL_ID_LAST +} modelId_t; + +static int +onlp_board_model_id_get(void) +{ + static int board_model_id = MODEL_ID_LAST; + + if (board_model_id == MODEL_ID_LAST) + { + if (onlp_file_read_int(&board_model_id, SYS_HWMON1_PREFIX "/board_model_id") != ONLP_STATUS_OK) + return 0; + } + + return board_model_id; +} + +/* + * This function will be called prior to all other onlp_sfpi_* functions. + */ +int +onlp_sfpi_init(void) +{ + return ONLP_STATUS_OK; +} + +/* + * This function should populate the give bitmap with + * all valid, SFP-capable port numbers. + * + * Only port numbers in this bitmap will be queried by the the + * ONLP framework. + * + * No SFPI functions will be called with ports that are + * not in this bitmap. You can ignore all error checking + * on the incoming ports defined in this interface. + */ +int +onlp_sfpi_bitmap_get(onlp_sfp_bitmap_t* bmap) +{ + int p; + int total_port = 0; + int board_model_id = onlp_board_model_id_get(); + + switch (board_model_id) + { + case HURACAN_WITH_BMC: + case HURACAN_WITHOUT_BMC: + case HURACAN_A_WITH_BMC: + case HURACAN_A_WITHOUT_BMC: + total_port = 32; + break; + + case SESTO_WITH_BMC: + case SESTO_WITHOUT_BMC: + case NCIIX_WITH_BMC: + case NCIIX_WITHOUT_BMC: + total_port = 54; + break; + + case ASTERION_WITH_BMC: + case ASTERION_WITHOUT_BMC: + total_port = 64; + break; + + default: + break; + } + + AIM_BITMAP_CLR_ALL(bmap); + for(p = 0; p < total_port; p++) + AIM_BITMAP_SET(bmap, p); + + return ONLP_STATUS_OK; +} + +/* + * This function should return whether an SFP is inserted on the given + * port. + * + * Returns 1 if the SFP is present. + * Returns 0 if the SFP is not present. + * Returns ONLP_E_* if there was an error determining the status. + */ +int +onlp_sfpi_is_present(int port) +{ + int value = 0; + + onlp_file_read_int(&value, SYS_HWMON2_PREFIX "/port_%d_abs", (port+1)); + return value; +} + +int +onlp_sfpi_port_map(int port, int* rport) +{ + int board_model_id = onlp_board_model_id_get(); + + switch (board_model_id) + { + case HURACAN_WITH_BMC: + case HURACAN_WITHOUT_BMC: + case HURACAN_A_WITH_BMC: + case HURACAN_A_WITHOUT_BMC: + /* odd <=> even */ + if (port & 0x1) + *rport = (port - 1); + else + *rport = (port + 1); + break; + + default: + *rport = port; break; + } + + return ONLP_STATUS_OK; +} + +int +onlp_sfpi_presence_bitmap_get(onlp_sfp_bitmap_t* dst) +{ + return ONLP_STATUS_E_UNSUPPORTED; +} + +int +onlp_sfpi_rx_los_bitmap_get(onlp_sfp_bitmap_t* bmap) +{ + int p; + int total_port = 0; + int board_model_id = onlp_board_model_id_get(); + + switch (board_model_id) + { + case SESTO_WITH_BMC: + case SESTO_WITHOUT_BMC: + case NCIIX_WITH_BMC: + case NCIIX_WITHOUT_BMC: + case ASTERION_WITH_BMC: + case ASTERION_WITHOUT_BMC: + total_port = 48; + break; + + default: + break; + } + + AIM_BITMAP_CLR_ALL(bmap); + for(p = 0; p < total_port; p++) + AIM_BITMAP_SET(bmap, p); + + return ONLP_STATUS_OK; +} + +/* + * This function reads the SFPs idrom and returns in + * in the data buffer provided. + */ +int +onlp_sfpi_eeprom_read(int port, uint8_t data[256]) +{ + int rv = ONLP_STATUS_OK; + char fname[128]; + + memset(data, 0, 256); + memset(fname, 0, sizeof(fname)); + sprintf(fname, SYS_HWMON2_PREFIX "/port_%d_data_a0", (port+1)); + rv = onlplib_sfp_eeprom_read_file(fname, data); + if (rv != ONLP_STATUS_OK) + AIM_LOG_INFO("Unable to read eeprom from port(%d)\r\n", port); + + return rv; +} + +int +onlp_sfpi_dom_read(int port, uint8_t data[256]) +{ + int rv = ONLP_STATUS_OK; + char fname[128]; + + memset(data, 0, 256); + memset(fname, 0, sizeof(fname)); + sprintf(fname, SYS_HWMON2_PREFIX "/port_%d_data_a2", (port+1)); + rv = onlplib_sfp_eeprom_read_file(fname, data); + if (rv != ONLP_STATUS_OK) + AIM_LOG_INFO("Unable to read eeprom from port(%d)\r\n", port); + + return rv; +} + +/* + * Manually enable or disable the given SFP. + * + */ +int +onlp_sfpi_enable_set(int port, int enable) +{ + return ONLP_STATUS_E_UNSUPPORTED; +} + +/* + * Returns whether the SFP is currently enabled or disabled. + */ +int +onlp_sfpi_enable_get(int port, int* enable) +{ + return ONLP_STATUS_E_UNSUPPORTED; +} + +/* + * If the platform requires any setup or equalizer modifications + * based on the actual SFP that was inserted then that custom + * setup should be performed here. + * + * After a new SFP is detected by the ONLP framework this + * function will be called to perform the (optional) setup. + */ +int +onlp_sfpi_post_insert(int port, sff_info_t* sff_info) +{ + return ONLP_STATUS_E_UNSUPPORTED; +} + +/* + * Return the current status of the SFP. + * See onlp_sfp_status_t; + */ +int +onlp_sfpi_status_get(int port, uint32_t* status) +{ + return ONLP_STATUS_E_UNSUPPORTED; +} + +int onlp_sfpi_control_supported(int port, onlp_sfp_control_t control, int* supported) +{ + if (supported == NULL) + return ONLP_STATUS_E_PARAM; + + *supported = 0; + switch (control) + { + case ONLP_SFP_CONTROL_TX_DISABLE: + case ONLP_SFP_CONTROL_RX_LOS: + { + int board_model_id = onlp_board_model_id_get(); + + switch (board_model_id) + { + case SESTO_WITH_BMC: + case SESTO_WITHOUT_BMC: + case NCIIX_WITH_BMC: + case NCIIX_WITHOUT_BMC: + case ASTERION_WITH_BMC: + case ASTERION_WITHOUT_BMC: + if (port < 48) + *supported = 1; + break; + + default: + break; + } + } + break; + + default: + break; + } + + return ONLP_STATUS_OK; +} + +int +onlp_sfpi_control_set(int port, onlp_sfp_control_t control, int value) +{ + int rv = ONLP_STATUS_OK; + int supported = 0; + + if ((onlp_sfpi_control_supported(port, control, &supported) == ONLP_STATUS_OK) && (supported == 0)) + return ONLP_STATUS_E_UNSUPPORTED; + + switch (control) + { + case ONLP_SFP_CONTROL_TX_DISABLE: + rv = onlp_file_write_int(value, SYS_HWMON2_PREFIX "/port_%d_tx_disable", (port+1)); + break; + + default: + break; + } + return rv; +} + +int +onlp_sfpi_control_get(int port, onlp_sfp_control_t control, int* value) +{ + int rv = ONLP_STATUS_OK; + int supported = 0; + + if (value == NULL) + return ONLP_STATUS_E_PARAM; + + if ((onlp_sfpi_control_supported(port, control, &supported) == ONLP_STATUS_OK) && (supported == 0)) + return ONLP_STATUS_E_UNSUPPORTED; + + *value = 0; + switch (control) + { + case ONLP_SFP_CONTROL_RX_LOS: + rv = onlp_file_read_int(value, SYS_HWMON2_PREFIX "/port_%d_rxlos", (port+1)); + break; + + case ONLP_SFP_CONTROL_TX_DISABLE: + rv = onlp_file_read_int(value, SYS_HWMON2_PREFIX "/port_%d_tx_disable", (port+1)); + break; + + default: + break; + } + return rv; +} + +/* + * This is a generic ioctl interface. + */ +int +onlp_sfpi_ioctl(int port, va_list vargs) +{ + return ONLP_STATUS_E_UNSUPPORTED; +} + +/* + * De-initialize the SFPI subsystem. + */ +int +onlp_sfpi_denit(void) +{ + return ONLP_STATUS_OK; +} + diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/sysi.c b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/sysi.c new file mode 100755 index 00000000..0914b09c --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/sysi.c @@ -0,0 +1,139 @@ +/************************************************************ + * + * + ************************************************************ + * + * + * + ***********************************************************/ +#include +#include +#include "x86_64_netberg_aurora_720_rangeley_int.h" +#include "x86_64_netberg_aurora_720_rangeley_log.h" + +int toHexValue(char ch) +{ + if ((ch >= '0')&&(ch <= '9')) + { + return (ch-0x30); + } + else if (((ch >= 'a')&&(ch <= 'f'))||((ch >= 'A')&&(ch <= 'F'))) + { + return (ch-0x57); + } + return 0; +} + +/* + * This is the first function called by the ONLP framework. + * + * It should return the name of your platform driver. + * + * If the name of your platform driver is the same as the + * current platform then this driver will be used. + * + * If the name of the driver is different from the current + * platform, or the driver is capable of supporting multiple + * platform variants, see onlp_sysi_platform_set() below. + */ +const char* +onlp_sysi_platform_get(void) +{ + return "x86-64-netberg-aurora-720-rangeley-r0"; +} + +/* + * This function will be called if onlp_sysi_platform_get() + * returns a platform name that is not equal to the current platform. + * + * If you are compatible with the given platform then return ONLP_STATUS_OK. + * If you can are not compatible return ONLP_STATUS_E_UNSUPPORTED. + * - This is fatal and will abort platform initialization. + */ + +int +onlp_sysi_platform_set(const char* name) +{ + /* + * For the purposes of this example we + * accept all platforms. + */ + return ONLP_STATUS_OK; +} + +/* + * This is the first function the ONLP framework will call + * after it has validated the the platform is supported using the mechanisms + * described above. + * + * If this function does not return ONL_STATUS_OK + * then platform initialization is aborted. + */ +int +onlp_sysi_init(void) +{ + return ONLP_STATUS_OK; +} + +int +onlp_sysi_onie_info_get(onlp_onie_info_t* onie) +{ + int rv; + uint8_t buffer[512]; + uint8_t data[256]; + int len; + int i, j; + + memset(buffer, 0, sizeof(buffer)); + memset(data, 0, sizeof(data)); + rv = onlp_file_read(buffer, sizeof(buffer), &len, SYS_HWMON2_PREFIX "/eeprom"); + if (rv == ONLP_STATUS_OK) + { + j = 0; + for (i=0; i<256; i++) + { + data[i] = (toHexValue(buffer[j])<<4) + toHexValue(buffer[j+1]); + j += 2; + } + rv = onlp_onie_decode(onie, (uint8_t*)data, 256); + if(rv >= 0) + { + onie->platform_name = aim_strdup("x86-64-netberg-aurora-720-rangeley-r0"); + } + } + return rv; +} + +int +onlp_sysi_oids_get(onlp_oid_t* table, int max) +{ + onlp_oid_t* e = table; + memset(table, 0, max*sizeof(onlp_oid_t)); + int i; + int n_thermal=7, n_fan=10, n_led=1; + + /* 2 PSUs */ + *e++ = ONLP_PSU_ID_CREATE(1); + *e++ = ONLP_PSU_ID_CREATE(2); + + /* LEDs Item */ + for (i=1; i<=n_led; i++) + { + *e++ = ONLP_LED_ID_CREATE(i); + } + + /* THERMALs Item */ + for (i=1; i<=n_thermal; i++) + { + *e++ = ONLP_THERMAL_ID_CREATE(i); + } + + /* Fans Item */ + for (i=1; i<=n_fan; i++) + { + *e++ = ONLP_FAN_ID_CREATE(i); + } + + return 0; +} + diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/thermali.c b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/thermali.c new file mode 100755 index 00000000..07495f6f --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/thermali.c @@ -0,0 +1,173 @@ +/************************************************************ + * + * + * Copyright 2014 Big Switch Networks, Inc. + * + * Licensed under the Eclipse Public License, Version 1.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.eclipse.org/legal/epl-v10.html + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, + * either express or implied. See the License for the specific + * language governing permissions and limitations under the + * License. + * + * + ************************************************************ + * + * + * + ***********************************************************/ +#include +#include +#include "x86_64_netberg_aurora_720_rangeley_int.h" +#include "x86_64_netberg_aurora_720_rangeley_log.h" + +#define VALIDATE(_id) \ + do { \ + if(!ONLP_OID_IS_THERMAL(_id)) { \ + return ONLP_STATUS_E_INVALID; \ + } \ + } while(0) + +static int +sys_thermal_info_get__(onlp_thermal_info_t* info, int id) +{ + int rv; + + if (id == THERMAL_ID_THERMAL3) + { + rv = onlp_file_read_int(&info->mcelsius, SYS_HWMON1_PREFIX "/mac_temp"); + info->mcelsius *= 1000; + } + else + { + uint8_t buffer[64]; + double dvalue; + int len; + + memset(buffer, 0, sizeof(buffer)); + rv = onlp_file_read(buffer, sizeof(buffer), &len, SYS_HWMON1_PREFIX "/remote_temp%d", id); + if (rv == ONLP_STATUS_OK) + { + dvalue = atof((const char *)buffer); + info->mcelsius = (int)(dvalue * 1000); + } + } + + if(rv == ONLP_STATUS_E_INTERNAL) + return rv; + + if(rv == ONLP_STATUS_E_MISSING) + { + info->status &= ~1; + return ONLP_STATUS_OK; + } + + return ONLP_STATUS_OK; +} + +static int +psu1_thermal_info_get__(onlp_thermal_info_t* info, int id) +{ + int rv; + uint8_t buffer[64]; + double dvalue; + int len; + + memset(buffer, 0, sizeof(buffer)); + rv = onlp_file_read(buffer, sizeof(buffer), &len, SYS_HWMON2_PREFIX "/psu1_temp_%d", id); + if (rv == ONLP_STATUS_OK) + { + dvalue = atof((const char *)buffer); + info->mcelsius = (int)(dvalue * 1000); + } + return rv; +} + +static int +psu2_thermal_info_get__(onlp_thermal_info_t* info, int id) +{ + int rv; + uint8_t buffer[64]; + double dvalue; + int len; + + memset(buffer, 0, sizeof(buffer)); + rv = onlp_file_read(buffer, sizeof(buffer), &len, SYS_HWMON2_PREFIX "/psu2_temp_%d", id); + if (rv == ONLP_STATUS_OK) + { + dvalue = atof((const char *)buffer); + info->mcelsius = (int)(dvalue * 1000); + } + return rv; +} + +static onlp_thermal_info_t temps__[] = +{ + { }, /* Not used */ + { { THERMAL_OID_THERMAL1, "Chassis Thermal 1 (Front of MAC)", 0}, ONLP_THERMAL_STATUS_PRESENT, ONLP_THERMAL_CAPS_GET_TEMPERATURE, 0}, + { { THERMAL_OID_THERMAL2, "Chassis Thermal 2 (Rear of MAC)", 0}, ONLP_THERMAL_STATUS_PRESENT, ONLP_THERMAL_CAPS_GET_TEMPERATURE, 0}, + { { THERMAL_OID_THERMAL3, "Chassis Thermal 3 (MAC)", 0}, ONLP_THERMAL_STATUS_PRESENT, ONLP_THERMAL_CAPS_GET_TEMPERATURE, 0}, + + { { THERMAL_OID_THERMAL4, "PSU-1 Thermal 1", PSU_OID_PSU1 }, ONLP_THERMAL_STATUS_PRESENT, ONLP_THERMAL_CAPS_GET_TEMPERATURE, 0}, + { { THERMAL_OID_THERMAL5, "PSU-1 Thermal 2", PSU_OID_PSU1 }, ONLP_THERMAL_STATUS_PRESENT, ONLP_THERMAL_CAPS_GET_TEMPERATURE, 0}, + + { { THERMAL_OID_THERMAL6, "PSU-2 Thermal 1", PSU_OID_PSU2 }, ONLP_THERMAL_STATUS_PRESENT, ONLP_THERMAL_CAPS_GET_TEMPERATURE, 0}, + { { THERMAL_OID_THERMAL7, "PSU-2 Thermal 2", PSU_OID_PSU2 }, ONLP_THERMAL_STATUS_PRESENT, ONLP_THERMAL_CAPS_GET_TEMPERATURE, 0}, +}; + + +/* + * This will be called to intiialize the thermali subsystem. + */ +int +onlp_thermali_init(void) +{ + return ONLP_STATUS_OK; +} + +/* + * Retrieve the information structure for the given thermal OID. + * + * If the OID is invalid, return ONLP_E_STATUS_INVALID. + * If an unexpected error occurs, return ONLP_E_STATUS_INTERNAL. + * Otherwise, return ONLP_STATUS_OK with the OID's information. + * + * Note -- it is expected that you fill out the information + * structure even if the sensor described by the OID is not present. + */ +int +onlp_thermali_info_get(onlp_oid_t id, onlp_thermal_info_t* info) +{ + int tid; + + VALIDATE(id); + + memset(info, 0, sizeof(onlp_thermal_info_t)); + tid = ONLP_OID_ID_GET(id); + *info = temps__[tid]; + + switch(tid) + { + case THERMAL_ID_THERMAL1: + case THERMAL_ID_THERMAL2: + case THERMAL_ID_THERMAL3: + return sys_thermal_info_get__(info, tid); + + case THERMAL_ID_THERMAL4: + case THERMAL_ID_THERMAL5: + return psu1_thermal_info_get__(info, (tid - THERMAL_ID_THERMAL4 + 1)); + + case THERMAL_ID_THERMAL6: + case THERMAL_ID_THERMAL7: + return psu2_thermal_info_get__(info, (tid - THERMAL_ID_THERMAL6 + 1)); + } + + return ONLP_STATUS_E_INVALID; +} + diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/x86_64_netberg_aurora_720_rangeley_config.c b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/x86_64_netberg_aurora_720_rangeley_config.c new file mode 100755 index 00000000..9f8e2833 --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/x86_64_netberg_aurora_720_rangeley_config.c @@ -0,0 +1,80 @@ +/**************************************************************************//** + * + * + * + *****************************************************************************/ +#include + +/* */ +#define __x86_64_netberg_aurora_720_rangeley_config_STRINGIFY_NAME(_x) #_x +#define __x86_64_netberg_aurora_720_rangeley_config_STRINGIFY_VALUE(_x) __x86_64_netberg_aurora_720_rangeley_config_STRINGIFY_NAME(_x) +x86_64_netberg_aurora_720_rangeley_config_settings_t x86_64_netberg_aurora_720_rangeley_config_settings[] = +{ +#ifdef X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_INCLUDE_LOGGING + { __x86_64_netberg_aurora_720_rangeley_config_STRINGIFY_NAME(X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_INCLUDE_LOGGING), __x86_64_netberg_aurora_720_rangeley_config_STRINGIFY_VALUE(X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_INCLUDE_LOGGING) }, +#else +{ X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_INCLUDE_LOGGING(__x86_64_netberg_aurora_720_rangeley_config_STRINGIFY_NAME), "__undefined__" }, +#endif +#ifdef X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_LOG_OPTIONS_DEFAULT + { __x86_64_netberg_aurora_720_rangeley_config_STRINGIFY_NAME(X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_LOG_OPTIONS_DEFAULT), __x86_64_netberg_aurora_720_rangeley_config_STRINGIFY_VALUE(X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_LOG_OPTIONS_DEFAULT) }, +#else +{ X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_LOG_OPTIONS_DEFAULT(__x86_64_netberg_aurora_720_rangeley_config_STRINGIFY_NAME), "__undefined__" }, +#endif +#ifdef X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_LOG_BITS_DEFAULT + { __x86_64_netberg_aurora_720_rangeley_config_STRINGIFY_NAME(X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_LOG_BITS_DEFAULT), __x86_64_netberg_aurora_720_rangeley_config_STRINGIFY_VALUE(X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_LOG_BITS_DEFAULT) }, +#else +{ X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_LOG_BITS_DEFAULT(__x86_64_netberg_aurora_720_rangeley_config_STRINGIFY_NAME), "__undefined__" }, +#endif +#ifdef X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_LOG_CUSTOM_BITS_DEFAULT + { __x86_64_netberg_aurora_720_rangeley_config_STRINGIFY_NAME(X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_LOG_CUSTOM_BITS_DEFAULT), __x86_64_netberg_aurora_720_rangeley_config_STRINGIFY_VALUE(X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_LOG_CUSTOM_BITS_DEFAULT) }, +#else +{ X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_LOG_CUSTOM_BITS_DEFAULT(__x86_64_netberg_aurora_720_rangeley_config_STRINGIFY_NAME), "__undefined__" }, +#endif +#ifdef X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_PORTING_STDLIB + { __x86_64_netberg_aurora_720_rangeley_config_STRINGIFY_NAME(X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_PORTING_STDLIB), __x86_64_netberg_aurora_720_rangeley_config_STRINGIFY_VALUE(X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_PORTING_STDLIB) }, +#else +{ X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_PORTING_STDLIB(__x86_64_netberg_aurora_720_rangeley_config_STRINGIFY_NAME), "__undefined__" }, +#endif +#ifdef X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS + { __x86_64_netberg_aurora_720_rangeley_config_STRINGIFY_NAME(X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS), __x86_64_netberg_aurora_720_rangeley_config_STRINGIFY_VALUE(X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS) }, +#else +{ X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS(__x86_64_netberg_aurora_720_rangeley_config_STRINGIFY_NAME), "__undefined__" }, +#endif +#ifdef X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_INCLUDE_UCLI + { __x86_64_netberg_aurora_720_rangeley_config_STRINGIFY_NAME(X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_INCLUDE_UCLI), __x86_64_netberg_aurora_720_rangeley_config_STRINGIFY_VALUE(X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_INCLUDE_UCLI) }, +#else +{ X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_INCLUDE_UCLI(__x86_64_netberg_aurora_720_rangeley_config_STRINGIFY_NAME), "__undefined__" }, +#endif +#ifdef X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_SYSFAN_RPM_FAILURE_THRESHOLD + { __x86_64_netberg_aurora_720_rangeley_config_STRINGIFY_NAME(X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_SYSFAN_RPM_FAILURE_THRESHOLD), __x86_64_netberg_aurora_720_rangeley_config_STRINGIFY_VALUE(X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_SYSFAN_RPM_FAILURE_THRESHOLD) }, +#else +{ X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_SYSFAN_RPM_FAILURE_THRESHOLD(__x86_64_netberg_aurora_720_rangeley_config_STRINGIFY_NAME), "__undefined__" }, +#endif + { NULL, NULL } +}; +#undef __x86_64_netberg_aurora_720_rangeley_config_STRINGIFY_VALUE +#undef __x86_64_netberg_aurora_720_rangeley_config_STRINGIFY_NAME + +const char* +x86_64_netberg_aurora_720_rangeley_config_lookup(const char* setting) +{ + int i; + for(i = 0; x86_64_netberg_aurora_720_rangeley_config_settings[i].name; i++) { + if(strcmp(x86_64_netberg_aurora_720_rangeley_config_settings[i].name, setting)) { + return x86_64_netberg_aurora_720_rangeley_config_settings[i].value; + } + } + return NULL; +} + +int +x86_64_netberg_aurora_720_rangeley_config_show(struct aim_pvs_s* pvs) +{ + int i; + for(i = 0; x86_64_netberg_aurora_720_rangeley_config_settings[i].name; i++) { + aim_printf(pvs, "%s = %s\n", x86_64_netberg_aurora_720_rangeley_config_settings[i].name, x86_64_netberg_aurora_720_rangeley_config_settings[i].value); + } + return i; +} + +/* */ diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/x86_64_netberg_aurora_720_rangeley_enums.c b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/x86_64_netberg_aurora_720_rangeley_enums.c new file mode 100755 index 00000000..9e184483 --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/x86_64_netberg_aurora_720_rangeley_enums.c @@ -0,0 +1,10 @@ +/**************************************************************************//** + * + * + * + *****************************************************************************/ +#include + +/* <--auto.start.enum(ALL).source> */ +/* */ + diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/x86_64_netberg_aurora_720_rangeley_int.h b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/x86_64_netberg_aurora_720_rangeley_int.h new file mode 100755 index 00000000..a22db213 --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/x86_64_netberg_aurora_720_rangeley_int.h @@ -0,0 +1,239 @@ +/**************************************************************************//** + * + * x86_64_netberg_aurora_720_rangeley Internal Header + * + *****************************************************************************/ +#ifndef __X86_64_NETBERG_AURORA_720_RANGELEY_INT_H__ +#define __X86_64_NETBERG_AURORA_720_RANGELEY_INT_H__ + +#include +#include + +/* */ +/** thermal_oid */ +typedef enum thermal_oid_e { + THERMAL_OID_THERMAL1 = ONLP_THERMAL_ID_CREATE(1), + THERMAL_OID_THERMAL2 = ONLP_THERMAL_ID_CREATE(2), + THERMAL_OID_THERMAL3 = ONLP_THERMAL_ID_CREATE(3), + THERMAL_OID_THERMAL4 = ONLP_THERMAL_ID_CREATE(4), + THERMAL_OID_THERMAL5 = ONLP_THERMAL_ID_CREATE(5), + THERMAL_OID_THERMAL6 = ONLP_THERMAL_ID_CREATE(6), + THERMAL_OID_THERMAL7 = ONLP_THERMAL_ID_CREATE(7), + THERMAL_OID_THERMAL8 = ONLP_THERMAL_ID_CREATE(8), + THERMAL_OID_THERMAL9 = ONLP_THERMAL_ID_CREATE(9), + THERMAL_OID_THERMAL10 = ONLP_THERMAL_ID_CREATE(10), +} thermal_oid_t; + +/** Enum names. */ +const char* thermal_oid_name(thermal_oid_t e); + +/** Enum values. */ +int thermal_oid_value(const char* str, thermal_oid_t* e, int substr); + +/** Enum descriptions. */ +const char* thermal_oid_desc(thermal_oid_t e); + +/** Enum validator. */ +int thermal_oid_valid(thermal_oid_t e); + +/** validator */ +#define THERMAL_OID_VALID(_e) \ + (thermal_oid_valid((_e))) + +/** thermal_oid_map table. */ +extern aim_map_si_t thermal_oid_map[]; +/** thermal_oid_desc_map table. */ +extern aim_map_si_t thermal_oid_desc_map[]; + +/** thermal_id */ +typedef enum thermal_id_e { + THERMAL_ID_THERMAL1 = 1, + THERMAL_ID_THERMAL2 = 2, + THERMAL_ID_THERMAL3 = 3, + THERMAL_ID_THERMAL4 = 4, + THERMAL_ID_THERMAL5 = 5, + THERMAL_ID_THERMAL6 = 6, + THERMAL_ID_THERMAL7 = 7, + THERMAL_ID_THERMAL8 = 8, + THERMAL_ID_THERMAL9 = 9, + THERMAL_ID_THERMAL10 = 10, +} thermal_id_t; + +/** Enum names. */ +const char* thermal_id_name(thermal_id_t e); + +/** Enum values. */ +int thermal_id_value(const char* str, thermal_id_t* e, int substr); + +/** Enum descriptions. */ +const char* thermal_id_desc(thermal_id_t e); + +/** Enum validator. */ +int thermal_id_valid(thermal_id_t e); + +/** validator */ +#define THERMAL_ID_VALID(_e) \ + (thermal_id_valid((_e))) + +/** thermal_id_map table. */ +extern aim_map_si_t thermal_id_map[]; +/** thermal_id_desc_map table. */ +extern aim_map_si_t thermal_id_desc_map[]; + + +/** psu_oid */ +typedef enum psu_oid_e { + PSU_OID_PSU1 = ONLP_PSU_ID_CREATE(1), + PSU_OID_PSU2 = ONLP_PSU_ID_CREATE(2), +} psu_oid_t; + +/** Enum names. */ +const char* psu_oid_name(psu_oid_t e); + +/** Enum values. */ +int psu_oid_value(const char* str, psu_oid_t* e, int substr); + +/** Enum descriptions. */ +const char* psu_oid_desc(psu_oid_t e); + +/** Enum validator. */ +int psu_oid_valid(psu_oid_t e); + +/** validator */ +#define PSU_OID_VALID(_e) \ + (psu_oid_valid((_e))) + +/** psu_oid_map table. */ +extern aim_map_si_t psu_oid_map[]; +/** psu_oid_desc_map table. */ +extern aim_map_si_t psu_oid_desc_map[]; + +/** psu_id */ +typedef enum psu_id_e { + PSU_ID_PSU1 = 1, + PSU_ID_PSU2 = 2, +} psu_id_t; + +/** Enum names. */ +const char* psu_id_name(psu_id_t e); + +/** Enum values. */ +int psu_id_value(const char* str, psu_id_t* e, int substr); + +/** Enum descriptions. */ +const char* psu_id_desc(psu_id_t e); + +/** Enum validator. */ +int psu_id_valid(psu_id_t e); + +/** validator */ +#define PSU_ID_VALID(_e) \ + (psu_id_valid((_e))) + +/** psu_id_map table. */ +extern aim_map_si_t psu_id_map[]; +/** psu_id_desc_map table. */ +extern aim_map_si_t psu_id_desc_map[]; + + + +/** fan_oid */ +typedef enum fan_oid_e { + FAN_OID_FAN1 = ONLP_FAN_ID_CREATE(1), + FAN_OID_FAN2 = ONLP_FAN_ID_CREATE(2), + FAN_OID_FAN3 = ONLP_FAN_ID_CREATE(3), + FAN_OID_FAN4 = ONLP_FAN_ID_CREATE(4), + FAN_OID_FAN5 = ONLP_FAN_ID_CREATE(5), + FAN_OID_FAN6 = ONLP_FAN_ID_CREATE(6), + FAN_OID_FAN7 = ONLP_FAN_ID_CREATE(7), + FAN_OID_FAN8 = ONLP_FAN_ID_CREATE(8), + FAN_OID_FAN9 = ONLP_FAN_ID_CREATE(9), + FAN_OID_FAN10 = ONLP_FAN_ID_CREATE(10), +} fan_oid_t; + +/** Enum names. */ +const char* fan_oid_name(fan_oid_t e); + +/** Enum values. */ +int fan_oid_value(const char* str, fan_oid_t* e, int substr); + +/** Enum descriptions. */ +const char* fan_oid_desc(fan_oid_t e); + +/** Enum validator. */ +int fan_oid_valid(fan_oid_t e); + +/** validator */ +#define FAN_OID_VALID(_e) \ + (fan_oid_valid((_e))) + +/** fan_oid_map table. */ +extern aim_map_si_t fan_oid_map[]; +/** fan_oid_desc_map table. */ +extern aim_map_si_t fan_oid_desc_map[]; + +/** fan_id */ +typedef enum fan_id_e { + FAN_ID_FAN1 = 1, + FAN_ID_FAN2 = 2, + FAN_ID_FAN3 = 3, + FAN_ID_FAN4 = 4, + FAN_ID_FAN5 = 5, + FAN_ID_FAN6 = 6, + FAN_ID_FAN7 = 7, + FAN_ID_FAN8 = 8, + FAN_ID_FAN9 = 9, + FAN_ID_FAN10 = 10, +} fan_id_t; + +/** Enum names. */ +const char* fan_id_name(fan_id_t e); + +/** Enum values. */ +int fan_id_value(const char* str, fan_id_t* e, int substr); + +/** Enum descriptions. */ +const char* fan_id_desc(fan_id_t e); + +/** Enum validator. */ +int fan_id_valid(fan_id_t e); + +/** validator */ +#define FAN_ID_VALID(_e) \ + (fan_id_valid((_e))) + +/** fan_id_map table. */ +extern aim_map_si_t fan_id_map[]; +/** fan_id_desc_map table. */ +extern aim_map_si_t fan_id_desc_map[]; + +/** led_oid */ +typedef enum led_oid_e { + LED_OID_LED1 = ONLP_LED_ID_CREATE(1), + LED_OID_LED2 = ONLP_LED_ID_CREATE(2), + LED_OID_LED3 = ONLP_LED_ID_CREATE(3), + LED_OID_LED4 = ONLP_LED_ID_CREATE(4), +} led_oid_t; + +/** led_id */ +typedef enum led_id_e { + LED_ID_LED1 = 1, + LED_ID_LED2 = 2, + LED_ID_LED3 = 3, + LED_ID_LED4 = 4, +} led_id_t; + +/* */ + +/* psu info table */ +struct psu_info_s { + char path[PATH_MAX]; + int present; + int busno; + int addr; +}; + +#define SYS_HWMON1_PREFIX "/sys/class/hwmon/hwmon1/device" +#define SYS_HWMON2_PREFIX "/sys/class/hwmon/hwmon2/device" + +#endif /* __X86_64_NETBERG_AURORA_720_RANGELEY_INT_H__ */ diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/x86_64_netberg_aurora_720_rangeley_log.c b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/x86_64_netberg_aurora_720_rangeley_log.c new file mode 100755 index 00000000..c285fc27 --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/x86_64_netberg_aurora_720_rangeley_log.c @@ -0,0 +1,18 @@ +/**************************************************************************//** + * + * + * + *****************************************************************************/ +#include + +#include "x86_64_netberg_aurora_720_rangeley_log.h" +/* + * x86_64_netberg_aurora_720_rangeley log struct. + */ +AIM_LOG_STRUCT_DEFINE( + X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_LOG_OPTIONS_DEFAULT, + X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_LOG_BITS_DEFAULT, + NULL, /* Custom log map */ + X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_LOG_CUSTOM_BITS_DEFAULT + ); + diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/x86_64_netberg_aurora_720_rangeley_log.h b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/x86_64_netberg_aurora_720_rangeley_log.h new file mode 100755 index 00000000..659381e8 --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/x86_64_netberg_aurora_720_rangeley_log.h @@ -0,0 +1,12 @@ +/**************************************************************************//** + * + * + * + *****************************************************************************/ +#ifndef __X86_64_NETBERG_AURORA_720_RANGELEY_LOG_H__ +#define __X86_64_NETBERG_AURORA_720_RANGELEY_LOG_H__ + +#define AIM_LOG_MODULE_NAME x86_64_netberg_aurora_720_rangeley +#include + +#endif /* __X86_64_NETBERG_AURORA_720_RANGELEY_LOG_H__ */ diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/x86_64_netberg_aurora_720_rangeley_module.c b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/x86_64_netberg_aurora_720_rangeley_module.c new file mode 100755 index 00000000..a3eeab03 --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/x86_64_netberg_aurora_720_rangeley_module.c @@ -0,0 +1,24 @@ +/**************************************************************************//** + * + * + * + *****************************************************************************/ +#include + +#include "x86_64_netberg_aurora_720_rangeley_log.h" + +static int +datatypes_init__(void) +{ +#define X86_64_NETBERG_AURORA_720_RANGELEY_ENUMERATION_ENTRY(_enum_name, _desc) AIM_DATATYPE_MAP_REGISTER(_enum_name, _enum_name##_map, _desc, AIM_LOG_INTERNAL); +#include + return 0; +} + +void __x86_64_netberg_aurora_720_rangeley_module_init__(void) +{ + AIM_LOG_STRUCT_REGISTER(); + datatypes_init__(); +} + +int __onlp_platform_version__ = 1; diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/x86_64_netberg_aurora_720_rangeley_ucli.c b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/x86_64_netberg_aurora_720_rangeley_ucli.c new file mode 100755 index 00000000..8b972f2d --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/x86_64_netberg_aurora_720_rangeley_ucli.c @@ -0,0 +1,50 @@ +/**************************************************************************//** + * + * + * + *****************************************************************************/ +#include + +#if X86_64_NETBERG_AURORA_720_RANGELEY_CONFIG_INCLUDE_UCLI == 1 + +#include +#include +#include + +static ucli_status_t +x86_64_netberg_aurora_720_rangeley_ucli_ucli__config__(ucli_context_t* uc) +{ + UCLI_HANDLER_MACRO_MODULE_CONFIG(x86_64_netberg_aurora_720_rangeley) +} + +/* */ +/* */ + +static ucli_module_t +x86_64_netberg_aurora_720_rangeley_ucli_module__ = + { + "x86_64_netberg_aurora_720_rangeley_ucli", + NULL, + x86_64_netberg_aurora_720_rangeley_ucli_ucli_handlers__, + NULL, + NULL, + }; + +ucli_node_t* +x86_64_netberg_aurora_720_rangeley_ucli_node_create(void) +{ + ucli_node_t* n; + ucli_module_init(&x86_64_netberg_aurora_720_rangeley_ucli_module__); + n = ucli_node_create("x86_64_netberg_aurora_720_rangeley", NULL, &x86_64_netberg_aurora_720_rangeley_ucli_module__); + ucli_node_subnode_add(n, ucli_module_log_node_create("x86_64_netberg_aurora_720_rangeley")); + return n; +} + +#else +void* +x86_64_netberg_aurora_720_rangeley_ucli_node_create(void) +{ + return NULL; +} +#endif + diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/platform-config/Makefile b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/platform-config/Makefile new file mode 100755 index 00000000..003238cf --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/platform-config/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/platform-config/r0/Makefile b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/platform-config/r0/Makefile new file mode 100755 index 00000000..003238cf --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/platform-config/r0/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/platform-config/r0/PKG.yml b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/platform-config/r0/PKG.yml new file mode 100755 index 00000000..615dd7c4 --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/platform-config/r0/PKG.yml @@ -0,0 +1 @@ +!include $ONL_TEMPLATES/platform-config-platform.yml ARCH=amd64 VENDOR=netberg BASENAME=x86-64-netberg-aurora-720-rangeley REVISION=r0 diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/platform-config/r0/src/lib/x86-64-netberg-aurora-720-rangeley-r0.yml b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/platform-config/r0/src/lib/x86-64-netberg-aurora-720-rangeley-r0.yml new file mode 100755 index 00000000..b38d5fff --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/platform-config/r0/src/lib/x86-64-netberg-aurora-720-rangeley-r0.yml @@ -0,0 +1,30 @@ +--- + +###################################################################### +# +# platform-config for AURORA 720 +# +###################################################################### + +x86-64-netberg-aurora-720-rangeley-r0: + + grub: + + serial: >- + --port=0x2f8 + --speed=115200 + --word=8 + --parity=no + --stop=1 + + kernel: + <<: *kernel-3-16 + + args: >- + console=ttyS1,115200n8 + + ##network: + ## interfaces: + ## ma1: + ## name: ~ + ## syspath: pci0000:00/0000:00:14.0 diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/platform-config/r0/src/python/x86_64_netberg_aurora_720_rangeley_r0/__init__.py b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/platform-config/r0/src/python/x86_64_netberg_aurora_720_rangeley_r0/__init__.py new file mode 100755 index 00000000..49e5ef70 --- /dev/null +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/platform-config/r0/src/python/x86_64_netberg_aurora_720_rangeley_r0/__init__.py @@ -0,0 +1,17 @@ +from onl.platform.base import * +from onl.platform.netberg import * + +class OnlPlatform_x86_64_netberg_aurora_720_rangeley_r0(OnlPlatformNetberg, + OnlPlatformPortConfig_32x100): + PLATFORM='x86-64-netberg-aurora-720-rangeley-r0' + MODEL="AURORA720" + SYS_OBJECT_ID=".8.1" + + def baseconfig(self): + self.insmod("hardware_monitor") + + # make ds1339 as default rtc + os.system("ln -snf /dev/rtc1 /dev/rtc") + os.system("hwclock --hctosys") + + return True From 6209c06aa198aacc7dc91974c4e0275d7f22276a Mon Sep 17 00:00:00 2001 From: Dave Hu Date: Wed, 26 Apr 2017 09:40:01 -0400 Subject: [PATCH 02/10] support platform DELTA AG7648 --- .../x86-64/x86-64-delta-ag7648/.gitignore | 2 + .../delta/x86-64/x86-64-delta-ag7648/Makefile | 1 + .../x86-64-delta-ag7648/modules/Makefile | 1 + .../x86-64-delta-ag7648/modules/PKG.yml | 1 + .../modules/builds/.gitignore | 1 + .../modules/builds/Makefile | 6 + .../builds/x86-64-delta-ag7648-cpld-mux-1.c | 245 ++++++++ .../builds/x86-64-delta-ag7648-cpld-mux-2.c | 317 ++++++++++ .../x86-64/x86-64-delta-ag7648/onlp/Makefile | 1 + .../x86-64/x86-64-delta-ag7648/onlp/PKG.yml | 1 + .../x86-64-delta-ag7648/onlp/builds/Makefile | 2 + .../onlp/builds/lib/Makefile | 45 ++ .../builds/lib/libonlp-x86-64-delta-ag7648.mk | 10 + .../onlp/builds/onlpdump/Makefile | 46 ++ .../onlp/builds/src/.module | 1 + .../onlp/builds/src/Makefile | 9 + .../onlp/builds/src/README | 6 + .../onlp/builds/src/module/auto/make.mk | 9 + .../src/module/auto/x86_64_delta_ag7648.yml | 50 ++ .../x86_64_delta_ag7648/x86_64_delta_ag7648.x | 14 + .../x86_64_delta_ag7648_config.h | 137 ++++ .../x86_64_delta_ag7648_dox.h | 26 + .../x86_64_delta_ag7648_porting.h | 107 ++++ .../onlp/builds/src/module/make.mk | 10 + .../onlp/builds/src/module/src/Makefile | 9 + .../onlp/builds/src/module/src/debug.c | 45 ++ .../onlp/builds/src/module/src/fani.c | 593 ++++++++++++++++++ .../onlp/builds/src/module/src/ledi.c | 443 +++++++++++++ .../onlp/builds/src/module/src/make.mk | 9 + .../onlp/builds/src/module/src/platform_lib.c | 186 ++++++ .../onlp/builds/src/module/src/platform_lib.h | 148 +++++ .../onlp/builds/src/module/src/psui.c | 357 +++++++++++ .../onlp/builds/src/module/src/sfpi.c | 464 ++++++++++++++ .../onlp/builds/src/module/src/sysi.c | 293 +++++++++ .../onlp/builds/src/module/src/thermali.c | 150 +++++ .../module/src/x86_64_delta_ag7648_config.c | 81 +++ .../module/src/x86_64_delta_ag7648_enums.c | 10 + .../src/module/src/x86_64_delta_ag7648_int.h | 12 + .../src/module/src/x86_64_delta_ag7648_log.c | 18 + .../src/module/src/x86_64_delta_ag7648_log.h | 12 + .../module/src/x86_64_delta_ag7648_module.c | 24 + .../src/module/src/x86_64_delta_ag7648_ucli.c | 50 ++ .../builds/src/module/src/x86_64_delta_i2c.c | 396 ++++++++++++ .../builds/src/module/src/x86_64_delta_i2c.h | 55 ++ .../src/module/src/x86_64_delta_i2c_dev.h | 209 ++++++ .../onlp/builds/src/x86_64_delta_ag7648.mk | 13 + .../platform-config/Makefile | 1 + .../platform-config/r0/Makefile | 1 + .../platform-config/r0/PKG.yml | 1 + .../r0/src/lib/x86-64-delta-ag7648-r0.yml | 32 + .../python/x86_64_delta_ag7648_r0/__init__.py | 31 + 51 files changed, 4691 insertions(+) create mode 100644 packages/platforms/delta/x86-64/x86-64-delta-ag7648/.gitignore create mode 100644 packages/platforms/delta/x86-64/x86-64-delta-ag7648/Makefile create mode 100644 packages/platforms/delta/x86-64/x86-64-delta-ag7648/modules/Makefile create mode 100644 packages/platforms/delta/x86-64/x86-64-delta-ag7648/modules/PKG.yml create mode 100644 packages/platforms/delta/x86-64/x86-64-delta-ag7648/modules/builds/.gitignore create mode 100644 packages/platforms/delta/x86-64/x86-64-delta-ag7648/modules/builds/Makefile create mode 100755 packages/platforms/delta/x86-64/x86-64-delta-ag7648/modules/builds/x86-64-delta-ag7648-cpld-mux-1.c create mode 100755 packages/platforms/delta/x86-64/x86-64-delta-ag7648/modules/builds/x86-64-delta-ag7648-cpld-mux-2.c create mode 100644 packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/Makefile create mode 100644 packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/PKG.yml create mode 100644 packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/Makefile create mode 100644 packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/lib/Makefile create mode 100644 packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/lib/libonlp-x86-64-delta-ag7648.mk create mode 100644 packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/onlpdump/Makefile create mode 100644 packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/.module create mode 100644 packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/Makefile create mode 100644 packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/README create mode 100644 packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/auto/make.mk create mode 100644 packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/auto/x86_64_delta_ag7648.yml create mode 100644 packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/inc/x86_64_delta_ag7648/x86_64_delta_ag7648.x create mode 100644 packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/inc/x86_64_delta_ag7648/x86_64_delta_ag7648_config.h create mode 100644 packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/inc/x86_64_delta_ag7648/x86_64_delta_ag7648_dox.h create mode 100644 packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/inc/x86_64_delta_ag7648/x86_64_delta_ag7648_porting.h create mode 100644 packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/make.mk create mode 100644 packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/Makefile create mode 100644 packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/debug.c create mode 100755 packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/fani.c create mode 100755 packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/ledi.c create mode 100644 packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/make.mk create mode 100755 packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/platform_lib.c create mode 100755 packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/platform_lib.h create mode 100755 packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/psui.c create mode 100755 packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/sfpi.c create mode 100755 packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/sysi.c create mode 100644 packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/thermali.c create mode 100644 packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/x86_64_delta_ag7648_config.c create mode 100644 packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/x86_64_delta_ag7648_enums.c create mode 100644 packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/x86_64_delta_ag7648_int.h create mode 100644 packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/x86_64_delta_ag7648_log.c create mode 100644 packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/x86_64_delta_ag7648_log.h create mode 100644 packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/x86_64_delta_ag7648_module.c create mode 100644 packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/x86_64_delta_ag7648_ucli.c create mode 100755 packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/x86_64_delta_i2c.c create mode 100755 packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/x86_64_delta_i2c.h create mode 100755 packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/x86_64_delta_i2c_dev.h create mode 100644 packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/x86_64_delta_ag7648.mk create mode 100644 packages/platforms/delta/x86-64/x86-64-delta-ag7648/platform-config/Makefile create mode 100644 packages/platforms/delta/x86-64/x86-64-delta-ag7648/platform-config/r0/Makefile create mode 100644 packages/platforms/delta/x86-64/x86-64-delta-ag7648/platform-config/r0/PKG.yml create mode 100644 packages/platforms/delta/x86-64/x86-64-delta-ag7648/platform-config/r0/src/lib/x86-64-delta-ag7648-r0.yml create mode 100644 packages/platforms/delta/x86-64/x86-64-delta-ag7648/platform-config/r0/src/python/x86_64_delta_ag7648_r0/__init__.py diff --git a/packages/platforms/delta/x86-64/x86-64-delta-ag7648/.gitignore b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/.gitignore new file mode 100644 index 00000000..4b6195c1 --- /dev/null +++ b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/.gitignore @@ -0,0 +1,2 @@ +*x86*64*delta*ag7648*.mk +onlpdump.mk diff --git a/packages/platforms/delta/x86-64/x86-64-delta-ag7648/Makefile b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/Makefile new file mode 100644 index 00000000..003238cf --- /dev/null +++ b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/packages/platforms/delta/x86-64/x86-64-delta-ag7648/modules/Makefile b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/modules/Makefile new file mode 100644 index 00000000..003238cf --- /dev/null +++ b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/modules/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/packages/platforms/delta/x86-64/x86-64-delta-ag7648/modules/PKG.yml b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/modules/PKG.yml new file mode 100644 index 00000000..394605ea --- /dev/null +++ b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/modules/PKG.yml @@ -0,0 +1 @@ +!include $ONL_TEMPLATES/platform-modules.yml VENDOR=delta BASENAME=x86-64-delta-ag7648 ARCH=amd64 KERNELS="onl-kernel-3.16-lts-x86-64-all:amd64" diff --git a/packages/platforms/delta/x86-64/x86-64-delta-ag7648/modules/builds/.gitignore b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/modules/builds/.gitignore new file mode 100644 index 00000000..a65b4177 --- /dev/null +++ b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/modules/builds/.gitignore @@ -0,0 +1 @@ +lib diff --git a/packages/platforms/delta/x86-64/x86-64-delta-ag7648/modules/builds/Makefile b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/modules/builds/Makefile new file mode 100644 index 00000000..e9e58727 --- /dev/null +++ b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/modules/builds/Makefile @@ -0,0 +1,6 @@ +KERNELS := onl-kernel-3.16-lts-x86-64-all:amd64 +KMODULES := $(wildcard *.c) +VENDOR := delta +BASENAME := x86-64-delta-ag7648 +ARCH := x86_64 +include $(ONL)/make/kmodule.mk diff --git a/packages/platforms/delta/x86-64/x86-64-delta-ag7648/modules/builds/x86-64-delta-ag7648-cpld-mux-1.c b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/modules/builds/x86-64-delta-ag7648-cpld-mux-1.c new file mode 100755 index 00000000..2f5be158 --- /dev/null +++ b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/modules/builds/x86-64-delta-ag7648-cpld-mux-1.c @@ -0,0 +1,245 @@ +/* + * An I2C multiplexer dirver for delta ag7648 CPLD + * + * Copyright (C) 2015 Delta Technology Corporation. + * Brandon Chuang + * + * This module supports the delta cpld that hold the channel select + * mechanism for other i2c slave devices, such as SFP. + * This includes the: + * Delta ag7648c CPLD1/CPLD2/CPLD3 + * + * Based on: + * pca954x.c from Kumar Gala + * Copyright (C) 2006 + * + * Based on: + * pca954x.c from Ken Harrenstien + * Copyright (C) 2004 Google, Inc. (Ken Harrenstien) + * + * Based on: + * i2c-virtual_cb.c from Brian Kuschak + * and + * pca9540.c from Jean Delvare . + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#include +#include +#include +#include +#include +#include +#include + +#define CTRL_CPLD_BUS 0x2 +#define CTRL_CPLD_I2C_ADDR 0x32 +#define PARENT_CHAN 0x4 +#define NUM_OF_CPLD_CHANS 0x30 + +#define CPLD_CHANNEL_SELECT_REG 0x11 +#define CPLD_CHANNEL_SELECT_MASK 0x3f +#define CPLD_CHANNEL_SELECT_OFFSET 0x0 + +#define CPLD_DESELECT_CHANNEL 0xff + +#define CPLD_MUX_MAX_NCHANS 0x30 +enum cpld_mux_type { + delta_cpld_mux +}; + +struct delta_i2c_cpld_mux { + enum cpld_mux_type type; + struct i2c_adapter *virt_adaps[CPLD_MUX_MAX_NCHANS]; + u8 last_chan; /* last register value */ +}; + +struct chip_desc { + u8 nchans; + u8 deselectChan; +}; + +/* Provide specs for the PCA954x types we know about */ +static const struct chip_desc chips[] = { + [delta_cpld_mux] = { + .nchans = NUM_OF_CPLD_CHANS, + .deselectChan = CPLD_DESELECT_CHANNEL, + } +}; + +static struct delta_i2c_cpld_mux *cpld_mux_data; + +static struct device dump_dev; + +/* Write to mux register. Don't use i2c_transfer()/i2c_smbus_xfer() + for this as they will try to lock adapter a second time */ +static int delta_i2c_cpld_mux_reg_write(struct i2c_adapter *adap, + struct i2c_client *client, u8 val) +{ + unsigned long orig_jiffies; + unsigned short flags; + union i2c_smbus_data data; + struct i2c_adapter *ctrl_adap; + int try; + s32 res = -EIO; + u8 reg_val = 0; + + data.byte = val; + flags = 0; + + ctrl_adap = i2c_get_adapter(CTRL_CPLD_BUS); + if (!ctrl_adap) + return res; + + // try to lock it + if (ctrl_adap->algo->smbus_xfer) { + /* Retry automatically on arbitration loss */ + orig_jiffies = jiffies; + for (res = 0, try = 0; try <= ctrl_adap->retries; try++) { + // read first + res = ctrl_adap->algo->smbus_xfer(ctrl_adap, CTRL_CPLD_I2C_ADDR, flags, + I2C_SMBUS_READ, CPLD_CHANNEL_SELECT_REG, + I2C_SMBUS_BYTE_DATA, &data); + if (res && res != -EAGAIN) + break; + + // modify the field we wanted + data.byte &= ~(CPLD_CHANNEL_SELECT_MASK << CPLD_CHANNEL_SELECT_OFFSET); + reg_val |= (((val + 1)& CPLD_CHANNEL_SELECT_MASK) << CPLD_CHANNEL_SELECT_OFFSET); + data.byte |= reg_val; + + // modify the register + res = ctrl_adap->algo->smbus_xfer(ctrl_adap, CTRL_CPLD_I2C_ADDR, flags, + I2C_SMBUS_WRITE, CPLD_CHANNEL_SELECT_REG, + I2C_SMBUS_BYTE_DATA, &data); + if (res && res != -EAGAIN) + break; + if (time_after(jiffies, + orig_jiffies + ctrl_adap->timeout)) + break; + } + } + + return res; +} + +static int delta_i2c_cpld_mux_select_chan(struct i2c_adapter *adap, + void *client, u32 chan) +{ + u8 regval; + int ret = 0; + regval = chan; + + /* Only select the channel if its different from the last channel */ + if (cpld_mux_data->last_chan != regval) { + ret = delta_i2c_cpld_mux_reg_write(NULL, NULL, regval); + cpld_mux_data->last_chan = regval; + } + + return ret; +} + +static int delta_i2c_cpld_mux_deselect_mux(struct i2c_adapter *adap, + void *client, u32 chan) +{ + /* Deselect active channel */ + cpld_mux_data->last_chan = chips[cpld_mux_data->type].deselectChan; + + return delta_i2c_cpld_mux_reg_write(NULL, NULL, cpld_mux_data->last_chan); +} + +/* + * I2C init/probing/exit functions + */ +static int __delta_i2c_cpld_mux_init(void) +{ + struct i2c_adapter *adap = i2c_get_adapter(PARENT_CHAN); + int chan=0; + int ret = -ENODEV; + + memset (&dump_dev, 0, sizeof(dump_dev)); + + if (!i2c_check_functionality(adap, I2C_FUNC_SMBUS_BYTE)) + goto err; + + if (!adap) + goto err; + + cpld_mux_data = kzalloc(sizeof(struct delta_i2c_cpld_mux), GFP_KERNEL); + if (!cpld_mux_data) { + ret = -ENOMEM; + goto err; + } + + cpld_mux_data->type = delta_cpld_mux; + cpld_mux_data->last_chan = chips[cpld_mux_data->type].deselectChan; /* force the first selection */ + + /* Now create an adapter for each channel */ + for (chan = 0; chan < NUM_OF_CPLD_CHANS; chan++) { + cpld_mux_data->virt_adaps[chan] = i2c_add_mux_adapter(adap, &dump_dev, NULL, 0, + chan, +#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,7,0) + 0, +#endif + delta_i2c_cpld_mux_select_chan, + delta_i2c_cpld_mux_deselect_mux); + + if (cpld_mux_data->virt_adaps[chan] == NULL) { + ret = -ENODEV; + printk("failed to register multiplexed adapter %d, parent %d\n", chan, PARENT_CHAN); + goto virt_reg_failed; + } + } + + printk("registered %d multiplexed busses for I2C mux bus %d\n", + chan, PARENT_CHAN); + + return 0; + +virt_reg_failed: + for (chan--; chan >= 0; chan--) { + i2c_del_mux_adapter(cpld_mux_data->virt_adaps[chan]); + } + + kfree(cpld_mux_data); +err: + return ret; +} + +static int __delta_i2c_cpld_mux_remove(void) +{ + const struct chip_desc *chip = &chips[cpld_mux_data->type]; + int chan; + + for (chan = 0; chan < chip->nchans; ++chan) { + if (cpld_mux_data->virt_adaps[chan]) { + i2c_del_mux_adapter(cpld_mux_data->virt_adaps[chan]); + cpld_mux_data->virt_adaps[chan] = NULL; + } + } + + kfree(cpld_mux_data); + + return 0; +} + +static int __init delta_i2c_cpld_mux_init(void) +{ + return __delta_i2c_cpld_mux_init (); +} + +static void __exit delta_i2c_cpld_mux_exit(void) +{ + __delta_i2c_cpld_mux_remove (); +} + +MODULE_AUTHOR("Dave Hu "); +MODULE_DESCRIPTION("Delta I2C CPLD mux driver"); +MODULE_LICENSE("GPL"); + +module_init(delta_i2c_cpld_mux_init); +module_exit(delta_i2c_cpld_mux_exit); + diff --git a/packages/platforms/delta/x86-64/x86-64-delta-ag7648/modules/builds/x86-64-delta-ag7648-cpld-mux-2.c b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/modules/builds/x86-64-delta-ag7648-cpld-mux-2.c new file mode 100755 index 00000000..d80cfbe2 --- /dev/null +++ b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/modules/builds/x86-64-delta-ag7648-cpld-mux-2.c @@ -0,0 +1,317 @@ +/* + * An I2C multiplexer dirver for delta ag7648 CPLD + * + * Copyright (C) 2015 Delta Technology Corporation. + * Brandon Chuang + * + * This module supports the delta cpld that hold the channel select + * mechanism for other i2c slave devices, such as SFP. + * This includes the: + * Delta ag7648c CPLD1/CPLD2/CPLD3 + * + * Based on: + * pca954x.c from Kumar Gala + * Copyright (C) 2006 + * + * Based on: + * pca954x.c from Ken Harrenstien + * Copyright (C) 2004 Google, Inc. (Ken Harrenstien) + * + * Based on: + * i2c-virtual_cb.c from Brian Kuschak + * and + * pca9540.c from Jean Delvare . + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#define CTRL_CPLD_BUS 0x2 +#define CTRL_CPLD_I2C_ADDR 0x32 +#define PARENT_CHAN 0x5 +#define NUM_OF_CPLD_CHANS 0x6 + +#define CPLD_CHANNEL_SELECT_REG 0xa +#define CPLD_CHANNEL_SELECT_MASK 0x3f +#define CPLD_CHANNEL_SELECT_OFFSET 0x0 +#define CPLD_QSFP_INTR_STATUS_REG 0xe +#define CPLD_QSFP_INTR_STATUS_OFFSET 0x0 +#define CPLD_QSFP_RESET_CTRL_REG 0xd +#define CPLD_QSFL_RESET_CTRL_OFFSET 0x0 + +#define CPLD_DESELECT_CHANNEL 0xff + +#define CPLD_MUX_MAX_NCHANS 0x6 +enum cpld_mux_type { + delta_cpld_mux +}; + +struct delta_i2c_cpld_mux { + enum cpld_mux_type type; + struct i2c_adapter *virt_adaps[CPLD_MUX_MAX_NCHANS]; + u8 last_chan; /* last register value */ +}; + +struct chip_desc { + u8 nchans; + u8 deselectChan; +}; + +/* Provide specs for the PCA954x types we know about */ +static const struct chip_desc chips[] = { + [delta_cpld_mux] = { + .nchans = NUM_OF_CPLD_CHANS, + .deselectChan = CPLD_DESELECT_CHANNEL, + } +}; + +static struct delta_i2c_cpld_mux *cpld_mux_data; + +static struct device dump_dev; + +/* Write to mux register. Don't use i2c_transfer()/i2c_smbus_xfer() + for this as they will try to lock adapter a second time */ +static int delta_i2c_cpld_mux_reg_write(struct i2c_adapter *adap, + struct i2c_client *client, u8 val) +{ + unsigned long orig_jiffies; + unsigned short flags; + union i2c_smbus_data data; + struct i2c_adapter *ctrl_adap; + int try,change=0; + s32 res = -EIO; + u8 reg_val = 0; + int intr, reset_ctrl; + int i; + + data.byte = val; + flags = 0; + + ctrl_adap = i2c_get_adapter(CTRL_CPLD_BUS); + if (!ctrl_adap) + return res; + + + // try to lock it + if (ctrl_adap->algo->smbus_xfer) { + /* Retry automatically on arbitration loss */ + orig_jiffies = jiffies; + for (res = 0, try = 0; try <= ctrl_adap->retries; try++) { + // workaround + data.byte = 0; + res = ctrl_adap->algo->smbus_xfer(ctrl_adap, CTRL_CPLD_I2C_ADDR, flags, + I2C_SMBUS_WRITE, CPLD_CHANNEL_SELECT_REG, + I2C_SMBUS_BYTE_DATA, &data); + if (res == -EAGAIN) + continue; + //read the interrupt status + res = ctrl_adap->algo->smbus_xfer(ctrl_adap, CTRL_CPLD_I2C_ADDR, flags, + I2C_SMBUS_READ, CPLD_QSFP_INTR_STATUS_REG, + I2C_SMBUS_BYTE_DATA, &data); + if ( res == -EAGAIN) + continue; + + intr = data.byte; + + //read the reset control + res = ctrl_adap->algo->smbus_xfer(ctrl_adap, CTRL_CPLD_I2C_ADDR, flags, + I2C_SMBUS_READ, CPLD_QSFP_RESET_CTRL_REG, + I2C_SMBUS_BYTE_DATA, &data); + if ( res == -EAGAIN) + continue; + + reset_ctrl = data.byte; + + /* there is an interrupt for QSFP port, including failure/plugin/un-plugin + * try to reset it. + * + */ + for (i = 0 ; i < NUM_OF_CPLD_CHANS; i ++) + { + if((reset_ctrl & ( 1 << i )) == 0){ + change=1; + } + if ((intr & ( 1 << i )) == 0 ) + { + + res = ctrl_adap->algo->smbus_xfer(ctrl_adap, CTRL_CPLD_I2C_ADDR, flags, + I2C_SMBUS_READ, CPLD_QSFP_RESET_CTRL_REG, + I2C_SMBUS_BYTE_DATA, &data); + if (res == -EAGAIN) + continue; + data.byte &= ~(1 << i); + + res = ctrl_adap->algo->smbus_xfer(ctrl_adap, CTRL_CPLD_I2C_ADDR, flags, + I2C_SMBUS_WRITE, CPLD_QSFP_RESET_CTRL_REG, + I2C_SMBUS_BYTE_DATA, &data); + if (res == -EAGAIN) + continue; + change=1; + } + } + if(change){ + msleep(10); + data.byte=CPLD_DESELECT_CHANNEL; + res = ctrl_adap->algo->smbus_xfer(ctrl_adap, CTRL_CPLD_I2C_ADDR, flags, + I2C_SMBUS_WRITE, CPLD_QSFP_RESET_CTRL_REG, + I2C_SMBUS_BYTE_DATA, &data); + if (res == -EAGAIN) + continue; + msleep(200); + } + + + // read first + //res = ctrl_adap->algo->smbus_xfer(ctrl_adap, CTRL_CPLD_I2C_ADDR, flags, + // I2C_SMBUS_READ, CPLD_CHANNEL_SELECT_REG, + // I2C_SMBUS_BYTE_DATA, &data); + //if (res && res != -EAGAIN) + // break; + + // modify the field we wanted + //data.byte &= ~(CPLD_CHANNEL_SELECT_MASK << CPLD_CHANNEL_SELECT_OFFSET); + //reg_val |= (((~(1 << val)) & CPLD_CHANNEL_SELECT_MASK) << CPLD_CHANNEL_SELECT_OFFSET); + data.byte = (~(1 << val)) & 0xff; + + // modify the register + res = ctrl_adap->algo->smbus_xfer(ctrl_adap, CTRL_CPLD_I2C_ADDR, flags, + I2C_SMBUS_WRITE, CPLD_CHANNEL_SELECT_REG, + I2C_SMBUS_BYTE_DATA, &data); + if (res != -EAGAIN) + break; + if (time_after(jiffies, + orig_jiffies + ctrl_adap->timeout)) + break; + } + } + + return res; +} + +static int delta_i2c_cpld_mux_select_chan(struct i2c_adapter *adap, + void *client, u32 chan) +{ + u8 regval; + int ret = 0; + regval = chan; + + /* Only select the channel if its different from the last channel */ + if (cpld_mux_data->last_chan != regval) { + ret = delta_i2c_cpld_mux_reg_write(NULL, NULL, regval); + cpld_mux_data->last_chan = regval; + } + + return ret; +} + +static int delta_i2c_cpld_mux_deselect_mux(struct i2c_adapter *adap, + void *client, u32 chan) +{ + /* Deselect active channel */ + cpld_mux_data->last_chan = chips[cpld_mux_data->type].deselectChan; + + return delta_i2c_cpld_mux_reg_write(NULL, NULL, cpld_mux_data->last_chan); +} + +/* + * I2C init/probing/exit functions + */ +static int __delta_i2c_cpld_mux_init(void) +{ + struct i2c_adapter *adap = i2c_get_adapter(PARENT_CHAN); + int chan=0; + int ret = -ENODEV; + + memset (&dump_dev, 0, sizeof(dump_dev)); + + if (!i2c_check_functionality(adap, I2C_FUNC_SMBUS_BYTE)) + goto err; + + if (!adap) + goto err; + + cpld_mux_data = kzalloc(sizeof(struct delta_i2c_cpld_mux), GFP_KERNEL); + if (!cpld_mux_data) { + ret = -ENOMEM; + goto err; + } + + cpld_mux_data->type = delta_cpld_mux; + cpld_mux_data->last_chan = chips[cpld_mux_data->type].deselectChan; /* force the first selection */ + + /* Now create an adapter for each channel */ + for (chan = 0; chan < NUM_OF_CPLD_CHANS; chan++) { + cpld_mux_data->virt_adaps[chan] = i2c_add_mux_adapter(adap, &dump_dev, NULL, 0, + chan, +#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,7,0) + 0, +#endif + delta_i2c_cpld_mux_select_chan, + delta_i2c_cpld_mux_deselect_mux); + + if (cpld_mux_data->virt_adaps[chan] == NULL) { + ret = -ENODEV; + printk("failed to register multiplexed adapter %d, parent %d\n", chan, PARENT_CHAN); + goto virt_reg_failed; + } + } + + printk("registered %d multiplexed busses for I2C mux bus %d\n", + chan, PARENT_CHAN); + + return 0; + +virt_reg_failed: + for (chan--; chan >= 0; chan--) { + i2c_del_mux_adapter(cpld_mux_data->virt_adaps[chan]); + } + + kfree(cpld_mux_data); +err: + return ret; +} + +static int __delta_i2c_cpld_mux_remove(void) +{ + const struct chip_desc *chip = &chips[cpld_mux_data->type]; + int chan; + + for (chan = 0; chan < chip->nchans; ++chan) { + if (cpld_mux_data->virt_adaps[chan]) { + i2c_del_mux_adapter(cpld_mux_data->virt_adaps[chan]); + cpld_mux_data->virt_adaps[chan] = NULL; + } + } + + kfree(cpld_mux_data); + + return 0; +} + +static int __init delta_i2c_cpld_mux_init(void) +{ + return __delta_i2c_cpld_mux_init (); +} + +static void __exit delta_i2c_cpld_mux_exit(void) +{ + __delta_i2c_cpld_mux_remove (); +} + +MODULE_AUTHOR("Dave Hu "); +MODULE_DESCRIPTION("Delta I2C CPLD mux driver"); +MODULE_LICENSE("GPL"); + +module_init(delta_i2c_cpld_mux_init); +module_exit(delta_i2c_cpld_mux_exit); + diff --git a/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/Makefile b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/Makefile new file mode 100644 index 00000000..003238cf --- /dev/null +++ b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/PKG.yml b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/PKG.yml new file mode 100644 index 00000000..d519e47d --- /dev/null +++ b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/PKG.yml @@ -0,0 +1 @@ +!include $ONL_TEMPLATES/onlp-platform-any.yml PLATFORM=x86-64-delta-ag7648 ARCH=amd64 TOOLCHAIN=x86_64-linux-gnu diff --git a/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/Makefile b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/Makefile new file mode 100644 index 00000000..e7437cb2 --- /dev/null +++ b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/Makefile @@ -0,0 +1,2 @@ +FILTER=src +include $(ONL)/make/subdirs.mk diff --git a/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/lib/Makefile b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/lib/Makefile new file mode 100644 index 00000000..1f2790b3 --- /dev/null +++ b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/lib/Makefile @@ -0,0 +1,45 @@ +############################################################ +# +# +# Copyright 2014 BigSwitch Networks, Inc. +# +# Licensed under the Eclipse Public License, Version 1.0 (the +# "License"); you may not use this file except in compliance +# with the License. You may obtain a copy of the License at +# +# http://www.eclipse.org/legal/epl-v10.html +# +# Unless required by applicable law or agreed to in writing, +# software distributed under the License is distributed on an +# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, +# either express or implied. See the License for the specific +# language governing permissions and limitations under the +# License. +# +# +############################################################ +# +# +############################################################ +include $(ONL)/make/config.amd64.mk + +MODULE := libonlp-x86-64-delta-ag7648 +include $(BUILDER)/standardinit.mk + +DEPENDMODULES := AIM IOF x86_64_delta_ag7648 onlplib +DEPENDMODULE_HEADERS := sff + +include $(BUILDER)/dependmodules.mk + +SHAREDLIB := libonlp-x86-64-delta-ag7648.so +$(SHAREDLIB)_TARGETS := $(ALL_TARGETS) +include $(BUILDER)/so.mk +.DEFAULT_GOAL := $(SHAREDLIB) + +GLOBAL_CFLAGS += -I$(onlp_BASEDIR)/module/inc +GLOBAL_CFLAGS += -DAIM_CONFIG_INCLUDE_MODULES_INIT=1 +GLOBAL_CFLAGS += -fPIC +GLOBAL_LINK_LIBS += -lpthread + +include $(BUILDER)/targets.mk + diff --git a/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/lib/libonlp-x86-64-delta-ag7648.mk b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/lib/libonlp-x86-64-delta-ag7648.mk new file mode 100644 index 00000000..2b5ef643 --- /dev/null +++ b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/lib/libonlp-x86-64-delta-ag7648.mk @@ -0,0 +1,10 @@ + +############################################################################### +# +# Inclusive Makefile for the libonlp-x86-64-delta-ag7648 module. +# +# Autogenerated 2017-03-20 15:05:28.120004 +# +############################################################################### +libonlp-x86-64-delta-ag7648_BASEDIR := $(dir $(abspath $(lastword $(MAKEFILE_LIST)))) + diff --git a/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/onlpdump/Makefile b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/onlpdump/Makefile new file mode 100644 index 00000000..9a3129c0 --- /dev/null +++ b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/onlpdump/Makefile @@ -0,0 +1,46 @@ +############################################################ +# +# +# Copyright 2014 BigSwitch Networks, Inc. +# +# Licensed under the Eclipse Public License, Version 1.0 (the +# "License"); you may not use this file except in compliance +# with the License. You may obtain a copy of the License at +# +# http://www.eclipse.org/legal/epl-v10.html +# +# Unless required by applicable law or agreed to in writing, +# software distributed under the License is distributed on an +# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, +# either express or implied. See the License for the specific +# language governing permissions and limitations under the +# License. +# +# +############################################################ +# +# +# +############################################################ +include $(ONL)/make/config.amd64.mk + +.DEFAULT_GOAL := onlpdump + +MODULE := onlpdump +include $(BUILDER)/standardinit.mk + +DEPENDMODULES := AIM IOF onlp x86_64_delta_ag7648 onlplib onlp_platform_defaults sff cjson cjson_util timer_wheel OS + +include $(BUILDER)/dependmodules.mk + +BINARY := onlpdump +$(BINARY)_LIBRARIES := $(LIBRARY_TARGETS) +include $(BUILDER)/bin.mk + +GLOBAL_CFLAGS += -DAIM_CONFIG_AIM_MAIN_FUNCTION=onlpdump_main +GLOBAL_CFLAGS += -DAIM_CONFIG_INCLUDE_MODULES_INIT=1 +GLOBAL_CFLAGS += -DAIM_CONFIG_INCLUDE_MAIN=1 +GLOBAL_LINK_LIBS += -lpthread -lm + +include $(BUILDER)/targets.mk + diff --git a/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/.module b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/.module new file mode 100644 index 00000000..3e0e6e75 --- /dev/null +++ b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/.module @@ -0,0 +1 @@ +name: x86_64_delta_ag7648 diff --git a/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/Makefile b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/Makefile new file mode 100644 index 00000000..d779a0df --- /dev/null +++ b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/Makefile @@ -0,0 +1,9 @@ +############################################################################### +# +# +# +############################################################################### +include ../../init.mk +MODULE := x86_64_delta_ag7648 +AUTOMODULE := x86_64_delta_ag7648 +include $(BUILDER)/definemodule.mk diff --git a/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/README b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/README new file mode 100644 index 00000000..b33cdb5e --- /dev/null +++ b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/README @@ -0,0 +1,6 @@ +############################################################################### +# +# x86_64_delta_ag7648 README +# +############################################################################### + diff --git a/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/auto/make.mk b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/auto/make.mk new file mode 100644 index 00000000..85a7c210 --- /dev/null +++ b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/auto/make.mk @@ -0,0 +1,9 @@ +############################################################################### +# +# x86_64_delta_ag7648 Autogeneration +# +############################################################################### +x86_64_delta_ag7648_AUTO_DEFS := module/auto/x86_64_delta_ag7648.yml +x86_64_delta_ag7648_AUTO_DIRS := module/inc/x86_64_delta_ag7648 module/src +include $(BUILDER)/auto.mk + diff --git a/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/auto/x86_64_delta_ag7648.yml b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/auto/x86_64_delta_ag7648.yml new file mode 100644 index 00000000..747b8221 --- /dev/null +++ b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/auto/x86_64_delta_ag7648.yml @@ -0,0 +1,50 @@ +############################################################################### +# +# x86_64_delta_ag7648 Autogeneration Definitions. +# +############################################################################### + +cdefs: &cdefs +- X86_64_DELTA_AG7648_CONFIG_INCLUDE_LOGGING: + doc: "Include or exclude logging." + default: 1 +- X86_64_DELTA_AG7648_CONFIG_LOG_OPTIONS_DEFAULT: + doc: "Default enabled log options." + default: AIM_LOG_OPTIONS_DEFAULT +- X86_64_DELTA_AG7648_CONFIG_LOG_BITS_DEFAULT: + doc: "Default enabled log bits." + default: AIM_LOG_BITS_DEFAULT +- X86_64_DELTA_AG7648_CONFIG_LOG_CUSTOM_BITS_DEFAULT: + doc: "Default enabled custom log bits." + default: 0 +- X86_64_DELTA_AG7648_CONFIG_PORTING_STDLIB: + doc: "Default all porting macros to use the C standard libraries." + default: 1 +- X86_64_DELTA_AG7648_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS: + doc: "Include standard library headers for stdlib porting macros." + default: X86_64_DELTA_AG7648_CONFIG_PORTING_STDLIB +- X86_64_DELTA_AG7648_CONFIG_INCLUDE_UCLI: + doc: "Include generic uCli support." + default: 0 +- X86_64_DELTA_AG7648_CONFIG_INCLUDE_DEFAULT_FAN_DIRECTION: + doc: "Assume chassis fan direction is the same as the PSU fan direction." + default: 0 + + +definitions: + cdefs: + X86_64_DELTA_AG7648_CONFIG_HEADER: + defs: *cdefs + basename: x86_64_delta_ag7648_config + + portingmacro: + x86_64_delta_ag7648: + macros: + - malloc + - free + - memset + - memcpy + - strncpy + - vsnprintf + - snprintf + - strlen diff --git a/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/inc/x86_64_delta_ag7648/x86_64_delta_ag7648.x b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/inc/x86_64_delta_ag7648/x86_64_delta_ag7648.x new file mode 100644 index 00000000..f4f0311f --- /dev/null +++ b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/inc/x86_64_delta_ag7648/x86_64_delta_ag7648.x @@ -0,0 +1,14 @@ +/**************************************************************************//** + * + * + * + *****************************************************************************/ +#include + +/* <--auto.start.xmacro(ALL).define> */ +/* */ + +/* <--auto.start.xenum(ALL).define> */ +/* */ + + diff --git a/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/inc/x86_64_delta_ag7648/x86_64_delta_ag7648_config.h b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/inc/x86_64_delta_ag7648/x86_64_delta_ag7648_config.h new file mode 100644 index 00000000..f5c00de5 --- /dev/null +++ b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/inc/x86_64_delta_ag7648/x86_64_delta_ag7648_config.h @@ -0,0 +1,137 @@ +/**************************************************************************//** + * + * @file + * @brief x86_64_delta_ag7648 Configuration Header + * + * @addtogroup x86_64_delta_ag7648-config + * @{ + * + *****************************************************************************/ +#ifndef __X86_64_DELTA_AG7648_CONFIG_H__ +#define __X86_64_DELTA_AG7648_CONFIG_H__ + +#ifdef GLOBAL_INCLUDE_CUSTOM_CONFIG +#include +#endif +#ifdef X86_64_DELTA_AG7648_INCLUDE_CUSTOM_CONFIG +#include +#endif + +/* */ +#include +/** + * X86_64_DELTA_AG7648_CONFIG_INCLUDE_LOGGING + * + * Include or exclude logging. */ + + +#ifndef X86_64_DELTA_AG7648_CONFIG_INCLUDE_LOGGING +#define X86_64_DELTA_AG7648_CONFIG_INCLUDE_LOGGING 1 +#endif + +/** + * X86_64_DELTA_AG7648_CONFIG_LOG_OPTIONS_DEFAULT + * + * Default enabled log options. */ + + +#ifndef X86_64_DELTA_AG7648_CONFIG_LOG_OPTIONS_DEFAULT +#define X86_64_DELTA_AG7648_CONFIG_LOG_OPTIONS_DEFAULT AIM_LOG_OPTIONS_DEFAULT +#endif + +/** + * X86_64_DELTA_AG7648_CONFIG_LOG_BITS_DEFAULT + * + * Default enabled log bits. */ + + +#ifndef X86_64_DELTA_AG7648_CONFIG_LOG_BITS_DEFAULT +#define X86_64_DELTA_AG7648_CONFIG_LOG_BITS_DEFAULT AIM_LOG_BITS_DEFAULT +#endif + +/** + * X86_64_DELTA_AG7648_CONFIG_LOG_CUSTOM_BITS_DEFAULT + * + * Default enabled custom log bits. */ + + +#ifndef X86_64_DELTA_AG7648_CONFIG_LOG_CUSTOM_BITS_DEFAULT +#define X86_64_DELTA_AG7648_CONFIG_LOG_CUSTOM_BITS_DEFAULT 0 +#endif + +/** + * X86_64_DELTA_AG7648_CONFIG_PORTING_STDLIB + * + * Default all porting macros to use the C standard libraries. */ + + +#ifndef X86_64_DELTA_AG7648_CONFIG_PORTING_STDLIB +#define X86_64_DELTA_AG7648_CONFIG_PORTING_STDLIB 1 +#endif + +/** + * X86_64_DELTA_AG7648_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS + * + * Include standard library headers for stdlib porting macros. */ + + +#ifndef X86_64_DELTA_AG7648_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS +#define X86_64_DELTA_AG7648_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS X86_64_DELTA_AG7648_CONFIG_PORTING_STDLIB +#endif + +/** + * X86_64_DELTA_AG7648_CONFIG_INCLUDE_UCLI + * + * Include generic uCli support. */ + + +#ifndef X86_64_DELTA_AG7648_CONFIG_INCLUDE_UCLI +#define X86_64_DELTA_AG7648_CONFIG_INCLUDE_UCLI 0 +#endif + +/** + * X86_64_DELTA_AG7648_CONFIG_INCLUDE_DEFAULT_FAN_DIRECTION + * + * Assume chassis fan direction is the same as the PSU fan direction. */ + + +#ifndef X86_64_DELTA_AG7648_CONFIG_INCLUDE_DEFAULT_FAN_DIRECTION +#define X86_64_DELTA_AG7648_CONFIG_INCLUDE_DEFAULT_FAN_DIRECTION 0 +#endif + + + +/** + * All compile time options can be queried or displayed + */ + +/** Configuration settings structure. */ +typedef struct x86_64_delta_ag7648_config_settings_s { + /** name */ + const char* name; + /** value */ + const char* value; +} x86_64_delta_ag7648_config_settings_t; + +/** Configuration settings table. */ +/** x86_64_delta_ag7648_config_settings table. */ +extern x86_64_delta_ag7648_config_settings_t x86_64_delta_ag7648_config_settings[]; + +/** + * @brief Lookup a configuration setting. + * @param setting The name of the configuration option to lookup. + */ +const char* x86_64_delta_ag7648_config_lookup(const char* setting); + +/** + * @brief Show the compile-time configuration. + * @param pvs The output stream. + */ +int x86_64_delta_ag7648_config_show(struct aim_pvs_s* pvs); + +/* */ + +#include "x86_64_delta_ag7648_porting.h" + +#endif /* __X86_64_DELTA_AG7648_CONFIG_H__ */ +/* @} */ diff --git a/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/inc/x86_64_delta_ag7648/x86_64_delta_ag7648_dox.h b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/inc/x86_64_delta_ag7648/x86_64_delta_ag7648_dox.h new file mode 100644 index 00000000..5e575489 --- /dev/null +++ b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/inc/x86_64_delta_ag7648/x86_64_delta_ag7648_dox.h @@ -0,0 +1,26 @@ +/**************************************************************************//** + * + * x86_64_delta_ag7648 Doxygen Header + * + *****************************************************************************/ +#ifndef __X86_64_DELTA_AG7648_DOX_H__ +#define __X86_64_DELTA_AG7648_DOX_H__ + +/** + * @defgroup x86_64_delta_ag7648 x86_64_delta_ag7648 - x86_64_delta_ag7648 Description + * + +The documentation overview for this module should go here. + + * + * @{ + * + * @defgroup x86_64_delta_ag7648-x86_64_delta_ag7648 Public Interface + * @defgroup x86_64_delta_ag7648-config Compile Time Configuration + * @defgroup x86_64_delta_ag7648-porting Porting Macros + * + * @} + * + */ + +#endif /* __X86_64_DELTA_AG7648_DOX_H__ */ diff --git a/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/inc/x86_64_delta_ag7648/x86_64_delta_ag7648_porting.h b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/inc/x86_64_delta_ag7648/x86_64_delta_ag7648_porting.h new file mode 100644 index 00000000..0ace6735 --- /dev/null +++ b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/inc/x86_64_delta_ag7648/x86_64_delta_ag7648_porting.h @@ -0,0 +1,107 @@ +/**************************************************************************//** + * + * @file + * @brief x86_64_delta_ag7648 Porting Macros. + * + * @addtogroup x86_64_delta_ag7648-porting + * @{ + * + *****************************************************************************/ +#ifndef __X86_64_DELTA_AG7648_PORTING_H__ +#define __X86_64_DELTA_AG7648_PORTING_H__ + + +/* */ +#if X86_64_DELTA_AG7648_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS == 1 +#include +#include +#include +#include +#include +#endif + +#ifndef x86_64_delta_ag7648_MALLOC + #if defined(GLOBAL_MALLOC) + #define x86_64_delta_ag7648_MALLOC GLOBAL_MALLOC + #elif X86_64_DELTA_AG7648_CONFIG_PORTING_STDLIB == 1 + #define x86_64_delta_ag7648_MALLOC malloc + #else + #error The macro x86_64_delta_ag7648_MALLOC is required but cannot be defined. + #endif +#endif + +#ifndef x86_64_delta_ag7648_FREE + #if defined(GLOBAL_FREE) + #define x86_64_delta_ag7648_FREE GLOBAL_FREE + #elif X86_64_DELTA_AG7648_CONFIG_PORTING_STDLIB == 1 + #define x86_64_delta_ag7648_FREE free + #else + #error The macro x86_64_delta_ag7648_FREE is required but cannot be defined. + #endif +#endif + +#ifndef x86_64_delta_ag7648_MEMSET + #if defined(GLOBAL_MEMSET) + #define x86_64_delta_ag7648_MEMSET GLOBAL_MEMSET + #elif X86_64_DELTA_AG7648_CONFIG_PORTING_STDLIB == 1 + #define x86_64_delta_ag7648_MEMSET memset + #else + #error The macro x86_64_delta_ag7648_MEMSET is required but cannot be defined. + #endif +#endif + +#ifndef x86_64_delta_ag7648_MEMCPY + #if defined(GLOBAL_MEMCPY) + #define x86_64_delta_ag7648_MEMCPY GLOBAL_MEMCPY + #elif X86_64_DELTA_AG7648_CONFIG_PORTING_STDLIB == 1 + #define x86_64_delta_ag7648_MEMCPY memcpy + #else + #error The macro x86_64_delta_ag7648_MEMCPY is required but cannot be defined. + #endif +#endif + +#ifndef x86_64_delta_ag7648_STRNCPY + #if defined(GLOBAL_STRNCPY) + #define x86_64_delta_ag7648_STRNCPY GLOBAL_STRNCPY + #elif X86_64_DELTA_AG7648_CONFIG_PORTING_STDLIB == 1 + #define x86_64_delta_ag7648_STRNCPY strncpy + #else + #error The macro x86_64_delta_ag7648_STRNCPY is required but cannot be defined. + #endif +#endif + +#ifndef x86_64_delta_ag7648_VSNPRINTF + #if defined(GLOBAL_VSNPRINTF) + #define x86_64_delta_ag7648_VSNPRINTF GLOBAL_VSNPRINTF + #elif X86_64_DELTA_AG7648_CONFIG_PORTING_STDLIB == 1 + #define x86_64_delta_ag7648_VSNPRINTF vsnprintf + #else + #error The macro x86_64_delta_ag7648_VSNPRINTF is required but cannot be defined. + #endif +#endif + +#ifndef x86_64_delta_ag7648_SNPRINTF + #if defined(GLOBAL_SNPRINTF) + #define x86_64_delta_ag7648_SNPRINTF GLOBAL_SNPRINTF + #elif X86_64_DELTA_AG7648_CONFIG_PORTING_STDLIB == 1 + #define x86_64_delta_ag7648_SNPRINTF snprintf + #else + #error The macro x86_64_delta_ag7648_SNPRINTF is required but cannot be defined. + #endif +#endif + +#ifndef x86_64_delta_ag7648_STRLEN + #if defined(GLOBAL_STRLEN) + #define x86_64_delta_ag7648_STRLEN GLOBAL_STRLEN + #elif X86_64_DELTA_AG7648_CONFIG_PORTING_STDLIB == 1 + #define x86_64_delta_ag7648_STRLEN strlen + #else + #error The macro x86_64_delta_ag7648_STRLEN is required but cannot be defined. + #endif +#endif + +/* */ + + +#endif /* __X86_64_DELTA_AG7648_PORTING_H__ */ +/* @} */ diff --git a/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/make.mk b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/make.mk new file mode 100644 index 00000000..ec71aa7c --- /dev/null +++ b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/make.mk @@ -0,0 +1,10 @@ +############################################################################### +# +# +# +############################################################################### +THIS_DIR := $(dir $(lastword $(MAKEFILE_LIST))) +x86_64_delta_ag7648_INCLUDES := -I $(THIS_DIR)inc +x86_64_delta_ag7648_INTERNAL_INCLUDES := -I $(THIS_DIR)src +x86_64_delta_ag7648_DEPENDMODULE_ENTRIES := init:x86_64_delta_ag7648 ucli:x86_64_delta_ag7648 + diff --git a/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/Makefile b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/Makefile new file mode 100644 index 00000000..bcf12748 --- /dev/null +++ b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/Makefile @@ -0,0 +1,9 @@ +############################################################################### +# +# Local source generation targets. +# +############################################################################### + +ucli: + @../../../../tools/uclihandlers.py x86_64_delta_ag7648_ucli.c + diff --git a/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/debug.c b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/debug.c new file mode 100644 index 00000000..67c752f2 --- /dev/null +++ b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/debug.c @@ -0,0 +1,45 @@ +#include "x86_64_delta_ag7648_int.h" + +#if X86_64_DELTA_AG7648_CONFIG_INCLUDE_DEBUG == 1 + +#include + +static char help__[] = + "Usage: debug [options]\n" + " -c CPLD Versions\n" + " -h Help\n" + ; + +int +x86_64_delta_ag7648_debug_main(int argc, char* argv[]) +{ + int c = 0; + int help = 0; + int rv = 0; + + while( (c = getopt(argc, argv, "ch")) != -1) { + switch(c) + { + case 'c': c = 1; break; + case 'h': help = 1; rv = 0; break; + default: help = 1; rv = 1; break; + } + + } + + if(help || argc == 1) { + printf("%s", help__); + return rv; + } + + if(c) { + printf("Not implemented.\n"); + } + + + return 0; +} + +#endif + + diff --git a/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/fani.c b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/fani.c new file mode 100755 index 00000000..65f3cdb6 --- /dev/null +++ b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/fani.c @@ -0,0 +1,593 @@ +/************************************************************ + * + * + * Copyright 2014, 2015 Big Switch Networks, Inc. + * Copyright 2016 Accton Technology Corporation. + * Copyright 2017 Delta Networks, Inc + * Licensed under the Eclipse Public License, Version 1.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.eclipse.org/legal/epl-v10.html + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, + * either express or implied. See the License for the specific + * language governing permissions and limitations under the + * License. + * + * + ************************************************************ + * + * Fan Platform Implementation Defaults. + * + ***********************************************************/ +#include +#include +#include +#include "platform_lib.h" +#include "x86_64_delta_ag7648_int.h" +#include "x86_64_delta_i2c.h" + + +#define MAX_FAN_SPEED 19000 +#define MAX_PSU1_FAN_SPEED 19000 +#define MAX_PSU2_FAN_SPEED 18000 + +#define FILE_NAME_LEN 80 + +#define CPLD_FAN_NAME "MASTERCPLD" + +#define CPLD_FAN_TRAY0_PRESENT_REG (0x8) +#define CPLD_FAN_TRAY0_PRESENT_REG_OFFSET (0x6) +#define CPLD_FAN_TRAY1_PRESENT_REG (0x8) +#define CPLD_FAN_TRAY1_PRESENT_REG_OFFSET (0x7) +#define CPLD_FAN_TRAY2_PRESENT_REG (0x9) +#define CPLD_FAN_TRAY2_PRESENT_REG_OFFSET (0x0) + + +/* The MAX6620 registers, valid channel numbers: 0, 1 */ +#define MAX6639_REG_STATUS 0x02 +#define MAX6639_REG_FAN_CONFIG1(ch) (0x10 + 4*(ch-1)) +#define MAX6639_REG_FAN_CNT(ch) (0x20 + (ch-1)) +#define MAX6639_REG_TARGET_CNT(ch) (0x22 + (ch-1)) + +/*define the reg bit mask*/ +#define MAX6639_REG_FAN_STATUS_BIT(ch) (0X02>>(ch-1)) +#define MAX6639_FAN_CONFIG1_RPM_RANGE 0x03 +#define MAX6639_FAN_PRESENT_REG (0x0c) +#define MAX6639_FAN_PRESENT_BIT (0x2) +#define MAX6639_FAN_GOOD_BIT (0x1) +#define FAN_FROM_REG(d1, d2) \ + { \ + int tech = (d1 << 3) | ((d2 >> 5) & 0x07);\ + rpm = (491520 * 4) / (2 * tech);\ + } + +#define FAN_TO_REG(rpm) \ +{ \ + float ftech; \ + uint32_t tech; \ + ftech = (491520.0 * 4)/ (2.0 * rpm); \ + ftech = ftech + 0.3; \ + tech = (uint32_t) ftech; \ + d1 = (uint8_t)(tech >> 3); \ + d2 = (uint8_t)((tech << 5) & 0xe0);\ +} +static int fan_initd=0; + +enum onlp_fan_id +{ + FAN_RESERVED = 0, + FAN_1_ON_MAIN_BOARD, /*fan tray 0*/ + FAN_2_ON_MAIN_BOARD, /*fan tray 0*/ + FAN_3_ON_MAIN_BOARD, /*fan tray 1*/ + FAN_4_ON_MAIN_BOARD, /*fan tray 1*/ + FAN_5_ON_MAIN_BOARD, /*fan tray 2*/ + FAN_6_ON_MAIN_BOARD, /*fan tray 2*/ + FAN_1_ON_PSU1, + FAN_1_ON_PSU2 +}; + +enum onlp_fan_tray_id +{ + FAN_TRAY_0 = 0, + FAN_TRAY_1 = 1, + FAN_TRAY_2 = 2 +}; + +#define MAKE_FAN_INFO_NODE_ON_MAIN_BOARD(id) \ + { \ + { ONLP_FAN_ID_CREATE(FAN_##id##_ON_MAIN_BOARD), "Chassis Fan "#id, 0 }, \ + ONLP_FAN_STATUS_B2F | ONLP_FAN_STATUS_PRESENT, \ + (ONLP_FAN_CAPS_SET_PERCENTAGE |ONLP_FAN_CAPS_SET_RPM| ONLP_FAN_CAPS_GET_RPM | ONLP_FAN_CAPS_GET_PERCENTAGE), \ + 0, \ + 0, \ + ONLP_FAN_MODE_INVALID, \ + } + +#define MAKE_FAN_INFO_NODE_ON_PSU(psu_id, fan_id) \ + { \ + { ONLP_FAN_ID_CREATE(FAN_##fan_id##_ON_PSU##psu_id), "Chassis PSU-"#psu_id " Fan "#fan_id, 0 }, \ + ONLP_FAN_STATUS_B2F | ONLP_FAN_STATUS_PRESENT, \ + (ONLP_FAN_CAPS_GET_RPM | ONLP_FAN_CAPS_GET_PERCENTAGE), \ + 0, \ + 0, \ + ONLP_FAN_MODE_INVALID, \ + } + +/* Static fan information */ +onlp_fan_info_t linfo[] = { + { }, /* Not used */ + MAKE_FAN_INFO_NODE_ON_MAIN_BOARD(1), + MAKE_FAN_INFO_NODE_ON_MAIN_BOARD(2), + MAKE_FAN_INFO_NODE_ON_MAIN_BOARD(3), + MAKE_FAN_INFO_NODE_ON_MAIN_BOARD(4), + MAKE_FAN_INFO_NODE_ON_MAIN_BOARD(5), + MAKE_FAN_INFO_NODE_ON_MAIN_BOARD(6), + MAKE_FAN_INFO_NODE_ON_PSU(1,1), + MAKE_FAN_INFO_NODE_ON_PSU(2,1), +}; + +#define VALIDATE(_id) \ + do { \ + if(!ONLP_OID_IS_FAN(_id)) { \ + return ONLP_STATUS_E_INVALID; \ + } \ + } while(0) + +static int +_onlp_get_fan_tray(int fanId) +{ + int tray_id; + if((fanId==5) || (fanId==6)) + tray_id=0; + else if((fanId==3) || (fanId==4)) + tray_id=1; + else + tray_id=2; + return tray_id; +} +#if 0 +static int + _onlp_psu_fan_val_to_rpm (int v) +{ + int lf = (v & 0xffff); + int y, n; + + y = lf & 0x7ff; + n = ((lf >> 11) & 0x1f); + + return (y * (1 << n)); +} +#endif + +static int +_onlp_fan_board_init(void) +{ + int i = 0; + int d1,d2; + int rpm = 8000; + i2c_devname_write_byte("FANCTRL1", 0x00,0x10); + i2c_devname_write_byte("FANCTRL2", 0x00,0x10); + + i2c_devname_write_byte("FANCTRL1", 0x01,0x00); + i2c_devname_write_byte("FANCTRL2", 0x01,0x00); + + for (i = FAN_1_ON_MAIN_BOARD; i <= FAN_4_ON_MAIN_BOARD; i ++) + { + int offset = i - FAN_1_ON_MAIN_BOARD; + + i2c_devname_write_byte("FANCTRL2", 0x02 + offset ,0xc0); + + FAN_TO_REG(rpm); + + i2c_devname_write_byte("FANCTRL2", 0x20 + 2 * offset, d1); + i2c_devname_write_byte("FANCTRL2", 0x21 + 2 * offset, d2); + + } + for (i = FAN_5_ON_MAIN_BOARD; i <= FAN_6_ON_MAIN_BOARD; i ++) + { + int offset = i - FAN_5_ON_MAIN_BOARD; + + i2c_devname_write_byte("FANCTRL1", 0x02 + offset ,0xc0); + + FAN_TO_REG(rpm); + + i2c_devname_write_byte("FANCTRL1", 0x20 + 2 * offset, d1); + i2c_devname_write_byte("FANCTRL1", 0x21 + 2 * offset, d2); + } + + fan_initd=1; + + return ONLP_STATUS_OK; +} + +static int +_onlp_fani_info_get_fan(int local_id, onlp_fan_info_t* info) +{ + int r_data, fan_present; + int fan_tray = 0; + int reg, offset; + int d1, d2; + int rpm; + + /* init the fan on the board*/ + if(fan_initd==0) + _onlp_fan_board_init(); + + fan_tray = _onlp_get_fan_tray(local_id); + if (fan_tray == 0) + { + reg = CPLD_FAN_TRAY0_PRESENT_REG; + offset = CPLD_FAN_TRAY0_PRESENT_REG_OFFSET; + }else if (fan_tray == 1) + { + reg = CPLD_FAN_TRAY1_PRESENT_REG; + offset = CPLD_FAN_TRAY1_PRESENT_REG_OFFSET; + }else if (fan_tray == 2) + { + reg = CPLD_FAN_TRAY2_PRESENT_REG; + offset = CPLD_FAN_TRAY2_PRESENT_REG_OFFSET; + }else + { + return ONLP_STATUS_E_INVALID; + } + + /* get fan fault status (turn on when any one fails)*/ + r_data = i2c_devname_read_byte(CPLD_FAN_NAME, reg); + if(r_data<0) + return ONLP_STATUS_E_INVALID; + + fan_present = (r_data >> offset ) & 0x1; + + if(!fan_present){ + + info->status |= ONLP_FAN_STATUS_PRESENT; + + if (fan_tray == 0) + { + d1 = i2c_devname_read_byte("FANCTRL1", 0x10 + 2 * (local_id - FAN_5_ON_MAIN_BOARD)); + d2 = i2c_devname_read_byte("FANCTRL1", 0x11 + 2 * (local_id - FAN_5_ON_MAIN_BOARD)); + }else + { + d1 = i2c_devname_read_byte("FANCTRL2", 0x10 + 2 * (local_id - FAN_1_ON_MAIN_BOARD) ); + d2 = i2c_devname_read_byte("FANCTRL2", 0x11 + 2 * (local_id - FAN_1_ON_MAIN_BOARD) ); + } + + if (d1 < 0 || d2 < 0) + { + info->status |= ONLP_FAN_STATUS_FAILED; + return ONLP_STATUS_E_INVALID; + } + + } + else{ + info->status &= ~ONLP_FAN_STATUS_PRESENT; + return ONLP_STATUS_E_UNSUPPORTED; + } + DEBUG_PRINT("d1 %d, d2 %d\r\n", d1, d2); + + FAN_FROM_REG(d1,d2); + + info->rpm = rpm; + + DEBUG_PRINT("rpm %d\r\n", rpm); + /* get speed percentage from rpm */ + info->percentage = (info->rpm * 100.0) / MAX_FAN_SPEED; + + if(info->percentage>100) + strcpy(info->model,"ONLP_FAN_MODE_LAST"); + else if(info->percentage==100) + strcpy(info->model,"ONLP_FAN_MODE_MAX"); + else if(info->percentage>=75&&info->percentage<100) + strcpy(info->model,"ONLP_FAN_MODE_FAST"); + else if(info->percentage>=35&&info->percentage<75) + strcpy(info->model,"ONLP_FAN_MODE_NORMAL"); + else if(info->percentage>0&&info->percentage<35) + strcpy(info->model,"ONLP_FAN_MODE_SLOW"); + else if(info->percentage<=0) + strcpy(info->model,"ONLP_FAN_MODE_OFF"); + else{ } + + return ONLP_STATUS_OK; +} + +static int +_onlp_fani_info_get_fan_on_psu(int local_id, onlp_fan_info_t* info) +{ +#if 0 + int psu_id; + int r_data,fan_rpm; + psu_type_t psu_type; + /* get fan fault status + */ + psu_id = (local_id - FAN_1_ON_PSU1) + 1; + DEBUG_PRINT("[Debug][%s][%d][psu_id: %d]\n", __FUNCTION__, __LINE__, psu_id); + + psu_type = get_psu_type(psu_id); /* psu_id = 1 , present PSU1. pus_id =2 , present PSU2 */ + DEBUG_PRINT("[Debug][%s][%d][psu_type: %d]\n", __FUNCTION__, __LINE__, psu_type); + + switch (psu_type) { + case PSU_TYPE_AC_F2B: + info->status |= (ONLP_FAN_STATUS_PRESENT | ONLP_FAN_STATUS_F2B); + break; + case PSU_TYPE_AC_B2F: + info->status |= (ONLP_FAN_STATUS_PRESENT | ONLP_FAN_STATUS_B2F); + break; + default: + return ONLP_STATUS_E_UNSUPPORTED; + } + + /* get fan speed*/ + if(pid == PID_AG7648){ + if(psu_id==1) + r_data=i2c_devname_read_word("PSU1_PMBUS", 0x90); + else + r_data=i2c_devname_read_word("PSU2_PMBUS", 0x90); + } + else{ + if(psu_id==1) + r_data=i2c_devname_read_word("PSU1_PMBUS_POE", 0x90); + else + r_data=i2c_devname_read_word("PSU2_PMBUS_POE", 0x90); + } + + if(r_data<0) + return ONLP_STATUS_E_INVALID; + + fan_rpm=_onlp_psu_fan_val_to_rpm(r_data); + + info->rpm = fan_rpm; + + /* get speed percentage from rpm */ + info->percentage = (info->rpm * 100.0) / MAX_PSU_FAN_SPEED; + + if(info->percentage>100) + strcpy(info->model,"ONLP_FAN_MODE_LAST"); + else if(info->percentage==100) + strcpy(info->model,"ONLP_FAN_MODE_MAX"); + else if(info->percentage>=75&&info->percentage<100) + strcpy(info->model,"ONLP_FAN_MODE_FAST"); + else if(info->percentage>=35&&info->percentage<75) + strcpy(info->model,"ONLP_FAN_MODE_NORMAL"); + else if(info->percentage>0&&info->percentage<35) + strcpy(info->model,"ONLP_FAN_MODE_SLOW"); + else if(info->percentage<=0) + strcpy(info->model,"ONLP_FAN_MODE_OFF"); + else{} +#endif + return ONLP_STATUS_OK; +} + +/* + * This function will be called prior to all of onlp_fani_* functions. + */ +int +onlp_fani_init(void) +{ + int rc; + rc=_onlp_fan_board_init(); + return rc; +} + +int +onlp_fani_info_get(onlp_oid_t id, onlp_fan_info_t* info) +{ + int rc = 0; + int local_id; + + VALIDATE(id); + + local_id = ONLP_OID_ID_GET(id); + + if (chassis_fan_count() == 0) { + local_id += 1; + } + + *info = linfo[local_id]; + + switch (local_id) + { + case FAN_1_ON_PSU1: + case FAN_1_ON_PSU2: + rc = _onlp_fani_info_get_fan_on_psu(local_id, info); + break; + case FAN_1_ON_MAIN_BOARD: + case FAN_2_ON_MAIN_BOARD: + case FAN_3_ON_MAIN_BOARD: + case FAN_4_ON_MAIN_BOARD: + case FAN_5_ON_MAIN_BOARD: + case FAN_6_ON_MAIN_BOARD: + rc =_onlp_fani_info_get_fan(local_id, info); + break; + default: + rc = ONLP_STATUS_E_INVALID; + break; + } + + return rc; +} + +/* + * This function sets the speed of the given fan in RPM. + * + * This function will only be called if the fan supprots the RPM_SET + * capability. + * + * It is optional if you have no fans at all with this feature. + */ +int +onlp_fani_rpm_set(onlp_oid_t id, int rpm) +{ /* + the rpm is the actual rpm/1000. so 16 represents the 16000(max spd) + */ + int rc1, rc2; + int local_id; + int d1, d2; + int fan_tray; + + VALIDATE(id); + + local_id = ONLP_OID_ID_GET(id); + + DEBUG_PRINT("local id %d, rpm %d\n", local_id, rpm); + + if((local_id==FAN_1_ON_PSU1)||(local_id==FAN_1_ON_PSU2)) + return ONLP_STATUS_E_UNSUPPORTED; + + if (chassis_fan_count() == 0) { + return ONLP_STATUS_E_INVALID; + } + /* init the fan on the board*/ + if(fan_initd==0) + _onlp_fan_board_init(); + + /* reject rpm=0 (rpm=0, stop fan) */ + if (rpm == 0) + return ONLP_STATUS_E_INVALID; + + + /*get ret value for the speed set*/ + FAN_TO_REG(rpm); + DEBUG_PRINT("local id %d, rpm %d(d1: %d, d2: %d)\n", local_id, rpm, d1, d2); + //return ONLP_STATUS_OK; + + /*set the rpm speed */ + fan_tray = _onlp_get_fan_tray(local_id); + if (fan_tray < 0 || fan_tray > 2) + return ONLP_STATUS_E_INVALID; + + if (fan_tray == 0) + { + rc1 = i2c_devname_write_byte("FANCTRL1", 0x20 + 2 * (local_id - FAN_5_ON_MAIN_BOARD), d1); + rc2 = i2c_devname_write_byte("FANCTRL1", 0x21 + 2 * (local_id - FAN_5_ON_MAIN_BOARD), d2); + }else + { + rc1 = i2c_devname_write_byte("FANCTRL2", 0x20 + 2 * (local_id - FAN_1_ON_MAIN_BOARD), d1); + rc2 = i2c_devname_write_byte("FANCTRL2", 0x21 + 2 * (local_id - FAN_1_ON_MAIN_BOARD), d2); + } + + if (rc1 < 0 || rc2 < 0) + { + return ONLP_STATUS_E_INVALID; + } + + + return ONLP_STATUS_OK; +} +/*set the percentage for the psu fan*/ + + +/* + * This function sets the fan speed of the given OID as a percentage. + * + * This will only be called if the OID has the PERCENTAGE_SET + * capability. + * + * It is optional if you have no fans at all with this feature. + */ +int +onlp_fani_percentage_set(onlp_oid_t id, int p) +{ + /* + p is between 0 and 100 ,p=100 represents 16000(max spd) + */ + int rpm_val; + int local_id; + int d1, d2; + int rc1, rc2; + int fan_tray; + + VALIDATE(id); + + local_id = ONLP_OID_ID_GET(id); + + DEBUG_PRINT("local_id %d, percentage %d", local_id, p); + if((local_id==FAN_1_ON_PSU1)||(local_id==FAN_1_ON_PSU2)) + return ONLP_STATUS_E_UNSUPPORTED; + + if (chassis_fan_count() == 0) { + return ONLP_STATUS_E_INVALID; + } + + /* init the fan on the board*/ + if(fan_initd==0) + _onlp_fan_board_init(); + + /* reject p=0 (p=0, stop fan) */ + if (p == 0){ + return ONLP_STATUS_E_INVALID; + } + + rpm_val=p* MAX_FAN_SPEED/100; + + + /*get ret value for the speed set*/ + FAN_TO_REG(rpm_val); + + DEBUG_PRINT("local_id %d, p %d, rpm_val %d(d1:%d, d2:%d)", local_id, p, rpm_val, d1, d2); + //return ONLP_STATUS_OK; + /*set the rpm speed */ + fan_tray = _onlp_get_fan_tray(local_id); + if (fan_tray < 0 || fan_tray > 2) + return ONLP_STATUS_E_INVALID; + + if (fan_tray == 0) + { + rc1 = i2c_devname_write_byte("FANCTRL1", 0x20 + 2 * (local_id - FAN_5_ON_MAIN_BOARD), d1); + rc2 = i2c_devname_write_byte("FANCTRL1", 0x21 + 2 * (local_id - FAN_5_ON_MAIN_BOARD), d2); + }else + { + rc1 = i2c_devname_write_byte("FANCTRL2", 0x20 + 2 * (local_id - FAN_1_ON_MAIN_BOARD) , d1); + rc2 = i2c_devname_write_byte("FANCTRL2", 0x21 + 2 * (local_id - FAN_1_ON_MAIN_BOARD) , d2); + } + + if (rc1 < 0 || rc2 < 0) + { + return ONLP_STATUS_E_INVALID; + } + + return ONLP_STATUS_OK; + + +} + + +/* + * This function sets the fan speed of the given OID as per + * the predefined ONLP fan speed modes: off, slow, normal, fast, max. + * + * Interpretation of these modes is up to the platform. + * + */ +int +onlp_fani_mode_set(onlp_oid_t id, onlp_fan_mode_t mode) +{ + return ONLP_STATUS_E_UNSUPPORTED; +} + +/* + * This function sets the fan direction of the given OID. + * + * This function is only relevant if the fan OID supports both direction + * capabilities. + * + * This function is optional unless the functionality is available. + */ +int +onlp_fani_dir_set(onlp_oid_t id, onlp_fan_dir_t dir) +{ + return ONLP_STATUS_E_UNSUPPORTED; +} + +/* + * Generic fan ioctl. Optional. + */ +int +onlp_fani_ioctl(onlp_oid_t id, va_list vargs) +{ + return ONLP_STATUS_E_UNSUPPORTED; +} + diff --git a/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/ledi.c b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/ledi.c new file mode 100755 index 00000000..e828ea1c --- /dev/null +++ b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/ledi.c @@ -0,0 +1,443 @@ +/************************************************************ + * + * + * Copyright 2014, 2015 Big Switch Networks, Inc. + * Copyright 2016 Accton Technology Corporation. + * Copyright 2017 Delta Networks, Inc + * Licensed under the Eclipse Public License, Version 1.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.eclipse.org/legal/epl-v10.html + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, + * either express or implied. See the License for the specific + * language governing permissions and limitations under the + * License. + * + * + ************************************************************ + * + * + * + ***********************************************************/ +#include +#include +#include +#include +#include + +#include +#include "platform_lib.h" +#include "x86_64_delta_ag7648_int.h" +#include "x86_64_delta_i2c.h" +#define VALIDATE(_id) \ + do { \ + if(!ONLP_OID_IS_LED(_id)) { \ + return ONLP_STATUS_E_INVALID; \ + } \ + } while(0) + + +#define CPLD_NAME1 "SYSCPLD" +#define CPLD_NAME2 "MASTERCPLD" +#define CPLD_NAME3 "SLAVECPLD" + +#define CPLD_LED_REG_BITS (0X3) //the reg bits + +#define CPLD_LED_FAN_TRAY_REG (0X8) +#define CPLD_LED_FAN_TRAY0_REG_OFFSET (0X0) +#define CPLD_LED_FAN_TRAY1_REG_OFFSET (0X2) +#define CPLD_LED_FAN_TRAY2_REG_OFFSET (0X4) + +#define CPLD_LED_POWER_REG (0X6) +#define CPLD_LED_POWER_REG_OFFSET (0X6) + +#define CPLD_LED_SYS_REG (0X7) +#define CPLD_LED_SYS_REG_OFFSET (0X5) +#define CPLD_LED_LOCATOR_REG_OFFSET (0X3) + +#define CPLD_LED_FAN_REG (0X9) +#define CPLD_LED_FAN_REG_OFFSET (0X3) + + +/* + * Get the information for the given LED OID. + */ +static onlp_led_info_t linfo[] = +{ + { }, /* Not used */ + { + { ONLP_LED_ID_CREATE(LED_SYS), "sys", 0 }, + ONLP_LED_STATUS_PRESENT, + ONLP_LED_CAPS_GREEN_BLINKING |ONLP_LED_CAPS_GREEN | + ONLP_LED_CAPS_YELLOW_BLINKING | ONLP_LED_CAPS_YELLOW , + }, + + { + { ONLP_LED_ID_CREATE(LED_FAN), "fan", 0 }, + ONLP_LED_STATUS_PRESENT, + ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_YELLOW_BLINKING | + ONLP_LED_CAPS_GREEN | ONLP_LED_CAPS_YELLOW, + }, + + { + { ONLP_LED_ID_CREATE(LED_LOCATOR), "locator", 0 }, + ONLP_LED_STATUS_PRESENT, + ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_GREEN | + ONLP_LED_CAPS_GREEN_BLINKING , + }, + + { + { ONLP_LED_ID_CREATE(LED_POWER), "power", 0 }, + ONLP_LED_STATUS_PRESENT, + ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_GREEN | + ONLP_LED_CAPS_YELLOW_BLINKING, + }, + { + { ONLP_LED_ID_CREATE(LED_FAN_TRAY0), "fan_tray0", 0 }, + ONLP_LED_STATUS_PRESENT, + ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_GREEN | + ONLP_LED_CAPS_YELLOW, + }, + { + { ONLP_LED_ID_CREATE(LED_FAN_TRAY1), "fan_tray1", 0 }, + ONLP_LED_STATUS_PRESENT, + ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_GREEN | + ONLP_LED_CAPS_YELLOW, + }, + { + { ONLP_LED_ID_CREATE(LED_FAN_TRAY2), "fan_tray2", 0 }, + ONLP_LED_STATUS_PRESENT, + ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_GREEN | + ONLP_LED_CAPS_YELLOW, + }, +}; + +static int conver_led_light_mode_to_onl(uint32_t id, int led_ligth_mode) +{ + switch (id) { + case LED_SYS: + switch (led_ligth_mode) { + case SYS_LED_MODE_GREEN_BLINKING: return ONLP_LED_MODE_GREEN_BLINKING; + case SYS_LED_MODE_GREEN: return ONLP_LED_MODE_GREEN; + case SYS_LED_MODE_YELLOW: return ONLP_LED_MODE_YELLOW; + case SYS_LED_MODE_YELLOW_BLINKING: return ONLP_LED_MODE_YELLOW_BLINKING; + default: return ONLP_LED_MODE_GREEN_BLINKING; + } + + case LED_FAN: + switch (led_ligth_mode) { + case FAN_LED_MODE_OFF: return ONLP_LED_MODE_OFF; + case FAN_LED_MODE_GREEN: return ONLP_LED_MODE_GREEN; + case FAN_LED_MODE_YELLOW: return ONLP_LED_MODE_YELLOW; + case FAN_LED_MODE_YELLOW_BLINKING: return ONLP_LED_MODE_YELLOW_BLINKING; + default: return ONLP_LED_MODE_OFF; + } + case LED_LOCATOR: + switch (led_ligth_mode) { + case LOCATOR_LED_MODE_OFF: return ONLP_LED_MODE_OFF; + case LOCATOR_LED_MODE_GREEN: return ONLP_LED_MODE_GREEN; + case LOCATOR_LED_MODE_GREEN_BLINKING: return ONLP_LED_MODE_GREEN_BLINKING; + default: return ONLP_LED_MODE_OFF; + } + case LED_POWER: + switch (led_ligth_mode) { + case POWER_LED_MODE_OFF: return ONLP_LED_MODE_OFF; + case POWER_LED_MODE_GREEN: return ONLP_LED_MODE_GREEN; + case POWER_LED_MODE_YELLOW_BLINKING: return ONLP_LED_MODE_YELLOW_BLINKING; + default: return ONLP_LED_MODE_OFF; + } + case LED_FAN_TRAY0: + case LED_FAN_TRAY1: + case LED_FAN_TRAY2: + switch (led_ligth_mode) { + case FAN_TRAY_LED_MODE_OFF: return ONLP_LED_MODE_OFF; + case FAN_TRAY_LED_MODE_GREEN: return ONLP_LED_MODE_GREEN; + case FAN_TRAY_LED_MODE_YELLOW: return ONLP_LED_MODE_YELLOW_BLINKING; + default: return ONLP_LED_MODE_OFF; + } + } + + return ONLP_LED_MODE_OFF; +} + +static int conver_onlp_led_light_mode_to_driver(uint32_t id, int led_ligth_mode) +{ + switch (id) { + case LED_SYS: + switch (led_ligth_mode) { + case ONLP_LED_MODE_GREEN_BLINKING: return SYS_LED_MODE_GREEN_BLINKING; + case ONLP_LED_MODE_GREEN: return SYS_LED_MODE_GREEN; + case ONLP_LED_MODE_YELLOW: return SYS_LED_MODE_YELLOW ; + case ONLP_LED_MODE_YELLOW_BLINKING: return SYS_LED_MODE_YELLOW_BLINKING; + default: return SYS_LED_MODE_UNKNOWN; + } + + case LED_FAN: + switch (led_ligth_mode) { + case ONLP_LED_MODE_OFF: return FAN_LED_MODE_OFF; + case ONLP_LED_MODE_GREEN: return FAN_LED_MODE_GREEN ; + case ONLP_LED_MODE_YELLOW: return FAN_LED_MODE_YELLOW; + case ONLP_LED_MODE_YELLOW_BLINKING: return FAN_LED_MODE_YELLOW_BLINKING; + default: return FAN_LED_MODE_UNKNOWN; + } + case LED_LOCATOR: + switch (led_ligth_mode) { + case ONLP_LED_MODE_OFF: return LOCATOR_LED_MODE_OFF; + case ONLP_LED_MODE_GREEN: return LOCATOR_LED_MODE_GREEN; + case ONLP_LED_MODE_GREEN_BLINKING: return LOCATOR_LED_MODE_GREEN_BLINKING; + default: return LOCATOR_LED_MODE_UNKNOWN; + } + case LED_POWER: + switch (led_ligth_mode) { + case ONLP_LED_MODE_OFF: return POWER_LED_MODE_OFF; + case ONLP_LED_MODE_GREEN: return POWER_LED_MODE_GREEN; + case ONLP_LED_MODE_YELLOW_BLINKING: return POWER_LED_MODE_YELLOW_BLINKING; + default: return POWER_LED_MODE_UNKNOWN; + } + case LED_FAN_TRAY0: + case LED_FAN_TRAY1: + case LED_FAN_TRAY2: + switch (led_ligth_mode) { + case ONLP_LED_MODE_OFF: return FAN_TRAY_LED_MODE_OFF; + case ONLP_LED_MODE_GREEN: return FAN_TRAY_LED_MODE_GREEN; + case ONLP_LED_MODE_YELLOW_BLINKING: return FAN_TRAY_LED_MODE_YELLOW; + default: return FAN_TRAY_LED_MODE_UNKNOWN; + } + } + + return ONLP_LED_MODE_OFF; +} + +/* + * This function will be called prior to any other onlp_ledi_* functions. + */ +int +onlp_ledi_init(void) +{ + return ONLP_STATUS_OK; +} + +static int +onlp_ledi_oid_to_internal_id(onlp_oid_t id) +{ + enum ag7648_product_id pid = get_product_id(); + int lid = ONLP_OID_ID_GET(id); + + if (pid != PID_AG7648) { + return lid; + } + + switch (lid) { + case 1: return LED_SYS; + case 2: return LED_FAN; + case 3: return LED_LOCATOR; + case 4: return LED_POWER; + case 5: return LED_FAN_TRAY0; + case 6: return LED_FAN_TRAY1; + case 7: return LED_FAN_TRAY2; + } + + return lid; +} + +int +onlp_ledi_info_get(onlp_oid_t id, onlp_led_info_t* info) +{ + int r_data,m_data; + + int lid = onlp_ledi_oid_to_internal_id(id); + + VALIDATE(id); + + /* Set the onlp_oid_hdr_t and capabilities */ + *info = linfo[lid]; + + DEBUG_PRINT("id %u lid %d\n", id, lid); + + switch (lid) + { + case LED_POWER: + r_data = i2c_devname_read_byte(CPLD_NAME2, CPLD_LED_POWER_REG); + if (r_data < 0) + return ONLP_STATUS_E_INTERNAL; + m_data = (r_data >> CPLD_LED_POWER_REG_OFFSET) & CPLD_LED_REG_BITS; + break; + case LED_SYS: + r_data = i2c_devname_read_byte(CPLD_NAME2, CPLD_LED_SYS_REG); + if (r_data < 0) + return ONLP_STATUS_E_INTERNAL; + m_data = (r_data >> CPLD_LED_SYS_REG_OFFSET) & CPLD_LED_REG_BITS; + break; + case LED_LOCATOR: + r_data = i2c_devname_read_byte(CPLD_NAME2, CPLD_LED_SYS_REG); + if (r_data < 0) + return ONLP_STATUS_E_INTERNAL; + m_data = (r_data >> CPLD_LED_LOCATOR_REG_OFFSET) & CPLD_LED_REG_BITS; + break; + + case LED_FAN: + r_data = i2c_devname_read_byte(CPLD_NAME2, CPLD_LED_FAN_REG); + if (r_data < 0) + return ONLP_STATUS_E_INTERNAL; + m_data = (r_data >> CPLD_LED_FAN_REG_OFFSET) & CPLD_LED_REG_BITS; + break; + case LED_FAN_TRAY0: + r_data = i2c_devname_read_byte(CPLD_NAME2, CPLD_LED_FAN_TRAY_REG); + if (r_data < 0) + return ONLP_STATUS_E_INTERNAL; + m_data = (r_data >> CPLD_LED_FAN_TRAY0_REG_OFFSET) & CPLD_LED_REG_BITS; + break; + case LED_FAN_TRAY1: + r_data = i2c_devname_read_byte(CPLD_NAME2, CPLD_LED_FAN_TRAY_REG); + if (r_data < 0) + return ONLP_STATUS_E_INTERNAL; + m_data = (r_data >> CPLD_LED_FAN_TRAY1_REG_OFFSET) & CPLD_LED_REG_BITS; + break; + case LED_FAN_TRAY2: + r_data = i2c_devname_read_byte(CPLD_NAME2, CPLD_LED_FAN_TRAY_REG); + if (r_data < 0) + return ONLP_STATUS_E_INTERNAL; + m_data = (r_data >> CPLD_LED_FAN_TRAY2_REG_OFFSET) & CPLD_LED_REG_BITS; + break; + default: + return ONLP_STATUS_E_INTERNAL; + } + + info->mode = conver_led_light_mode_to_onl(lid, m_data); + + /* Set the on/off status */ + if (info->mode != ONLP_LED_MODE_OFF) { + info->status |= ONLP_LED_STATUS_ON; + + } + + return ONLP_STATUS_OK; +} + +/* + * This function puts the LED into the given mode. It is a more functional + * interface for multimode LEDs. + * + * Only modes reported in the LED's capabilities will be attempted. + */ +int +onlp_ledi_mode_set(onlp_oid_t id, onlp_led_mode_t mode) +{ + int r_data,driver_mode, rc; + int reg; + + int lid = onlp_ledi_oid_to_internal_id(id); + + VALIDATE(id); + + driver_mode = conver_onlp_led_light_mode_to_driver(lid, mode); + + if((driver_mode==SYS_LED_MODE_UNKNOWN)||(driver_mode==FAN_LED_MODE_UNKNOWN)||\ + (driver_mode==POWER_LED_MODE_UNKNOWN)||(driver_mode==LOCATOR_LED_MODE_UNKNOWN)) + return ONLP_STATUS_E_UNSUPPORTED; + + switch (lid) + { + case LED_POWER: + reg = CPLD_LED_POWER_REG; + r_data = i2c_devname_read_byte(CPLD_NAME2, CPLD_LED_POWER_REG); + if (r_data < 0) + return ONLP_STATUS_E_INTERNAL; + r_data &= ~(CPLD_LED_REG_BITS << CPLD_LED_POWER_REG_OFFSET); + r_data |= (driver_mode & CPLD_LED_REG_BITS ) << CPLD_LED_POWER_REG_OFFSET; + break; + case LED_SYS: + reg = CPLD_LED_SYS_REG; + r_data = i2c_devname_read_byte(CPLD_NAME2, CPLD_LED_SYS_REG); + if (r_data < 0) + return ONLP_STATUS_E_INTERNAL; + r_data &= ~(CPLD_LED_REG_BITS << CPLD_LED_SYS_REG_OFFSET); + r_data |= (driver_mode & CPLD_LED_REG_BITS ) << CPLD_LED_SYS_REG_OFFSET; + break; + case LED_LOCATOR: + reg = CPLD_LED_SYS_REG; + r_data = i2c_devname_read_byte(CPLD_NAME2, CPLD_LED_SYS_REG); + if (r_data < 0) + return ONLP_STATUS_E_INTERNAL; + r_data &= ~(CPLD_LED_REG_BITS << CPLD_LED_LOCATOR_REG_OFFSET); + r_data |= (driver_mode & CPLD_LED_REG_BITS ) << CPLD_LED_LOCATOR_REG_OFFSET; + break; + + case LED_FAN: + reg = CPLD_LED_FAN_REG; + r_data = i2c_devname_read_byte(CPLD_NAME2, CPLD_LED_FAN_REG); + if (r_data < 0) + return ONLP_STATUS_E_INTERNAL; + r_data &= ~(CPLD_LED_REG_BITS << CPLD_LED_FAN_REG_OFFSET); + r_data |= (driver_mode & CPLD_LED_REG_BITS ) << CPLD_LED_FAN_REG_OFFSET; + break; + case LED_FAN_TRAY0: + reg = CPLD_LED_FAN_TRAY_REG; + r_data = i2c_devname_read_byte(CPLD_NAME2, CPLD_LED_FAN_TRAY_REG); + if (r_data < 0) + return ONLP_STATUS_E_INTERNAL; + r_data &= ~(CPLD_LED_REG_BITS << CPLD_LED_FAN_TRAY0_REG_OFFSET); + r_data |= (driver_mode & CPLD_LED_REG_BITS ) << CPLD_LED_FAN_TRAY0_REG_OFFSET; + break; + case LED_FAN_TRAY1: + reg = CPLD_LED_FAN_TRAY_REG; + r_data = i2c_devname_read_byte(CPLD_NAME2, CPLD_LED_FAN_TRAY_REG); + if (r_data < 0) + return ONLP_STATUS_E_INTERNAL; + r_data &= ~(CPLD_LED_REG_BITS << CPLD_LED_FAN_TRAY1_REG_OFFSET); + r_data |= (driver_mode & CPLD_LED_REG_BITS ) << CPLD_LED_FAN_TRAY1_REG_OFFSET; + break; + case LED_FAN_TRAY2: + reg = CPLD_LED_FAN_TRAY_REG; + r_data = i2c_devname_read_byte(CPLD_NAME2, CPLD_LED_FAN_TRAY_REG); + if (r_data < 0) + return ONLP_STATUS_E_INTERNAL; + r_data &= ~(CPLD_LED_REG_BITS << CPLD_LED_FAN_TRAY2_REG_OFFSET); + r_data |= (driver_mode & CPLD_LED_REG_BITS ) << CPLD_LED_FAN_TRAY2_REG_OFFSET; + break; + default: + return ONLP_STATUS_E_INTERNAL; + } + + rc=i2c_devname_write_byte(CPLD_NAME2, reg, r_data); + + if(rc<0){ + return ONLP_STATUS_E_INTERNAL; + } + + return ONLP_STATUS_OK; +} + +/* + * Turn an LED on or off. + * + * This function will only be called if the LED OID supports the ONOFF + * capability. + * + * What 'on' means in terms of colors or modes for multimode LEDs is + * up to the platform to decide. This is intended as baseline toggle mechanism. + */ +int +onlp_ledi_set(onlp_oid_t id, int on_or_off) +{ + if (!on_or_off) { + return onlp_ledi_mode_set(id, ONLP_LED_MODE_OFF); + } + + return ONLP_STATUS_E_UNSUPPORTED; +} + + +/* + * Generic LED ioctl interface. + */ +int +onlp_ledi_ioctl(onlp_oid_t id, va_list vargs) +{ + return ONLP_STATUS_E_UNSUPPORTED; +} + diff --git a/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/make.mk b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/make.mk new file mode 100644 index 00000000..844b72f3 --- /dev/null +++ b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/make.mk @@ -0,0 +1,9 @@ +############################################################################### +# +# +# +############################################################################### + +LIBRARY := x86_64_delta_ag7648 +$(LIBRARY)_SUBDIR := $(dir $(lastword $(MAKEFILE_LIST))) +include $(BUILDER)/lib.mk diff --git a/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/platform_lib.c b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/platform_lib.c new file mode 100755 index 00000000..7b19805b --- /dev/null +++ b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/platform_lib.c @@ -0,0 +1,186 @@ +/************************************************************ + * + * + * Copyright 2014 Big Switch Networks, Inc. + * Copyright 2015 Accton Technology Corporation. + * Copyright 2017 Delta Networks, Inc. + * + * Licensed under the Eclipse Public License, Version 1.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.eclipse.org/legal/epl-v10.html + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, + * either express or implied. See the License for the specific + * language governing permissions and limitations under the + * License. + * + * + ************************************************************ + * + * + * + ***********************************************************/ +#include +#include +#include +#include +#include +#include +#include +#include "platform_lib.h" + +int deviceNodeWrite(char *filename, char *buffer, int buf_size, int data_len) +{ + int fd; + int len; + + if ((buffer == NULL) || (buf_size < 0)) { + return -1; + } + + if ((fd = open(filename, O_WRONLY, S_IWUSR)) == -1) { + return -1; + } + + if ((len = write(fd, buffer, buf_size)) < 0) { + close(fd); + return -1; + } + + if ((close(fd) == -1)) { + return -1; + } + + if ((len > buf_size) || (data_len != 0 && len != data_len)) { + return -1; + } + + return 0; +} + +int deviceNodeWriteInt(char *filename, int value, int data_len) +{ + char buf[8] = {0}; + sprintf(buf, "%d", value); + + return deviceNodeWrite(filename, buf, sizeof(buf)-1, data_len); +} + +int deviceNodeReadBinary(char *filename, char *buffer, int buf_size, int data_len) + { + int fd; + int len; + + if ((buffer == NULL) || (buf_size < 0)) { + return -1; + } + + if ((fd = open(filename, O_RDONLY)) == -1) { + return -1; + } + + if ((len = read(fd, buffer, buf_size)) < 0) { + close(fd); + return -1; + } + + if ((close(fd) == -1)) { + return -1; + } + + if ((len > buf_size) || (data_len != 0 && len != data_len)) { + return -1; + } + + return 0; +} + +int deviceNodeReadString(char *filename, char *buffer, int buf_size, int data_len) +{ + int ret; + + if (data_len >= buf_size || data_len < 0) { + return -1; + } + + ret = deviceNodeReadBinary(filename, buffer, buf_size-1, data_len); + + if (ret == 0) { + if (data_len) { + buffer[data_len] = '\0'; + } + else { + buffer[buf_size-1] = '\0'; + } + } + + return ret; +} + +#define I2C_PSU_MODEL_NAME_LEN 13 + +psu_type_t get_psu_type(int id, char* modelname, int modelname_len) +{ + DEBUG_PRINT("id %d, modelname %s, length %d\r\n", id, modelname, modelname_len); +#if 0 + char *node = NULL; + char model_name[I2C_PSU_MODEL_NAME_LEN + 1] = {0}; + + /* Check AC model name */ + node = (id == PSU1_ID) ? PSU1_AC_HWMON_NODE(psu_model_name) : PSU2_AC_HWMON_NODE(psu_model_name); + + if (deviceNodeReadString(node, model_name, sizeof(model_name), 0) == 0) { + if (strncmp(model_name, "CPR-4011-4M11", strlen("CPR-4011-4M11")) == 0) { + if (modelname) { + strncpy(modelname, model_name, modelname_len-1); + } + return PSU_TYPE_AC_F2B; + } + else if (strncmp(model_name, "CPR-4011-4M21", strlen("CPR-4011-4M21")) == 0) { + if (modelname) { + strncpy(modelname, model_name, modelname_len-1); + } + return PSU_TYPE_AC_B2F; + } + } + + /* Check DC model name */ + memset(model_name, 0, sizeof(model_name)); + node = (id == PSU1_ID) ? PSU1_DC_HWMON_NODE(psu_model_name) : PSU2_DC_HWMON_NODE(psu_model_name); + + if (deviceNodeReadString(node, model_name, sizeof(model_name), 0) == 0) { + if (strncmp(model_name, "um400d01G", strlen("um400d01G")) == 0) { + if (modelname) { + strncpy(modelname, model_name, modelname_len-1); + } + return PSU_TYPE_DC_48V_B2F; + } + else if (strncmp(model_name, "um400d01-01G", strlen("um400d01-01G")) == 0) { + if (modelname) { + strncpy(modelname, model_name, modelname_len-1); + } + return PSU_TYPE_DC_48V_F2B; + } + } +#endif + return PSU_TYPE_UNKNOWN; +} + +enum ag7648_product_id get_product_id(void) +{ + return PID_AG7648; +} + +int chassis_fan_count(void) +{ + return 6 ; +} + +int chassis_led_count(void) +{ + return 7; +} diff --git a/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/platform_lib.h b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/platform_lib.h new file mode 100755 index 00000000..3981c47f --- /dev/null +++ b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/platform_lib.h @@ -0,0 +1,148 @@ +/************************************************************ + * + * + * Copyright 2014 Big Switch Networks, Inc. + * Copyright 2015 Accton Technology Corporation. + * Copyright 2017 Delta Networks, Inc. + * + * Licensed under the Eclipse Public License, Version 1.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.eclipse.org/legal/epl-v10.html + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, + * either express or implied. See the License for the specific + * language governing permissions and limitations under the + * License. + * + * + ************************************************************ + * + * + * + ***********************************************************/ +#ifndef __PLATFORM_LIB_H__ +#define __PLATFORM_LIB_H__ + +#include "x86_64_delta_ag7648_log.h" + +#define PSU1_ID 1 +#define PSU2_ID 2 + +#define CHASSIS_FAN_COUNT 6 +#define CHASSIS_THERMAL_COUNT 4 +#define CHASSIS_PSU_COUNT 2 + + +typedef enum psu_type { + PSU_TYPE_UNKNOWN, + PSU_TYPE_AC_F2B, + PSU_TYPE_AC_B2F, + PSU_TYPE_DC_48V_F2B, + PSU_TYPE_DC_48V_B2F +} psu_type_t; + + +psu_type_t get_psu_type(int id, char* modelname, int modelname_len); + +#define DEBUG_MODE 0 + +#if (DEBUG_MODE == 1) + #define DEBUG_PRINT(format, ...) \ + {\ + printf("[%s:%d] ", __FUNCTION__, __LINE__);\ + printf(format, __VA_ARGS__); \ + } +#else + #define DEBUG_PRINT(format, ...) +#endif + +enum onlp_fan_duty_cycle_percentage +{ + FAN_IDLE_RPM = 7500, + FAN_LEVEL1_RPM = 10000, + FAN_LEVEL2_RPM = 13000, + FAN_LEVEL3_RPM = 16000, + FAN_LEVEL4_RPM = 19000, +}; + +enum ag7648_product_id { + PID_AG7648= 2, + PID_UNKNOWN +}; +/* LED related data */ +enum sys_led_light_mode { + SYS_LED_MODE_GREEN_BLINKING = 0, + SYS_LED_MODE_GREEN, + SYS_LED_MODE_YELLOW, + SYS_LED_MODE_YELLOW_BLINKING, + SYS_LED_MODE_UNKNOWN +}; + +enum fan_led_light_mode { + FAN_LED_MODE_OFF = 0, + FAN_LED_MODE_YELLOW, + FAN_LED_MODE_GREEN, + FAN_LED_MODE_YELLOW_BLINKING, + FAN_LED_MODE_UNKNOWN +}; + +enum psu_led_light_mode { + PSU_LED_MODE_OFF = 0, + PSU_LED_MODE_GREEN, + PSU_LED_MODE_YELLOW, + PSU_LED_MODE_YELLOW_BLINKING, + PSU_LED_MODE_RESERVERD, + PSU_LED_MODE_UNKNOWN +}; + +enum locator_led_light_mode { + LOCATOR_LED_MODE_OFF = 0, + LOCATOR_LED_MODE_GREEN_BLINKING, + LOCATOR_LED_MODE_GREEN, + LOCATOR_LED_MODE_RESERVERD, + LOCATOR_LED_MODE_UNKNOWN +}; + +enum power_led_light_mode { + POWER_LED_MODE_OFF = 0, + POWER_LED_MODE_YELLOW, + POWER_LED_MODE_GREEN, + POWER_LED_MODE_YELLOW_BLINKING, + POWER_LED_MODE_UNKNOWN +}; + +enum fan_tray_led_light_mode { + FAN_TRAY_LED_MODE_OFF = 0, + FAN_TRAY_LED_MODE_GREEN, + FAN_TRAY_LED_MODE_YELLOW, + FAN_TRAY_LED_MODE_RESERVERD, + FAN_TRAY_LED_MODE_UNKNOWN +}; + +typedef enum onlp_led_id +{ + LED_RESERVED = 0, + LED_SYS, + LED_FAN, + LED_LOCATOR, + LED_POWER, + LED_FAN_TRAY0, + LED_FAN_TRAY1, + LED_FAN_TRAY2, +} onlp_led_id_t; + +enum ag7648_product_id get_product_id(void); +int chassis_fan_count(void); +int chassis_led_count(void); + +typedef enum platform_id_e { + PLATFORM_ID_UNKNOWN, + PLATFORM_ID_DELTA_AG7648_R0, +} platform_id_t; + +extern platform_id_t platform_id; +#endif /* __PLATFORM_LIB_H__ */ diff --git a/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/psui.c b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/psui.c new file mode 100755 index 00000000..3802b3e0 --- /dev/null +++ b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/psui.c @@ -0,0 +1,357 @@ +/************************************************************ + * + * + * Copyright 2014, 2015 Big Switch Networks, Inc. + * Copyright 2016 Accton Technology Corporation. + * Copyright 2017 Delta Networks, Inc + * Licensed under the Eclipse Public License, Version 1.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.eclipse.org/legal/epl-v10.html + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, + * either express or implied. See the License for the specific + * language governing permissions and limitations under the + * License. + * + * + ************************************************************ + * + * + * + ***********************************************************/ +#include +#include +#include +#include +#include "platform_lib.h" +#include "x86_64_delta_ag7648_int.h" +#include "x86_64_delta_i2c.h" + +#define CPLD_PSU_NAME "MASTERCPLD" + +#define PSU_STATUS_PRESENT 1 +#define PSU_STATUS_POWER_GOOD 1 +#define PSU_STATUS_REG (0X03) +#define PSU_STATUS_PRESENT_BIT(ch) (0x8<<4*(ch-1)) +#define PSU_STATUS_GOOD_BIT(ch) (0x4<<4*(ch-1)) +#define PSU_STATUS_PRESENT_OFFSET(ch) (4*ch-1) +#define PSU_STATUS_GOOD_OFFSET(ch) (0x2+4*(ch-1)) +#define PSU_PNBUS_VIN_REG (0x88) +#define PSU_PNBUS_IIN_REG (0x89) +#define PSU_PNBUS_PIN_REG (0x97) +#define PSU_PNBUS_VOUT_REG (0x8b) +#define PSU_PNBUS_IOUT_REG (0x8c) +#define PSU_PNBUS_POUT_REG (0x96) +#define PSU_PNBUS_SERIAL_REG (0x39) +#define PSU_PNBUS_MODEL_REG (0xc) + +#define VALIDATE(_id) \ + do { \ + if(!ONLP_OID_IS_PSU(_id)) { \ + return ONLP_STATUS_E_INVALID; \ + } \ + } while(0) +static long psu_data_convert(unsigned int d, int mult) +{ + long X, Y, N, n; + + Y = d & 0x07FF; + N = (d >> 11) & 0x0f; + n = d & 0x8000 ? 1 : 0; + + if (n) + X = (Y * mult) / ((1<<(((~N)&0xf)+1))) ; + else + X = (Y * mult) * (N=(1<<(N&0xf))); + + return X; +} + +static long psu_data_convert_16(unsigned int d, int mult) +{ + long X; + X = (d * mult) / (1 << 9); + return X; + +} + +static int +psu_status_info_get(int id, char *node) +{ + int ret; + char r_data; + ret=i2c_devname_read_byte(CPLD_PSU_NAME,PSU_STATUS_REG); + + if(ret<0) + return -1; + + if (PSU1_ID == id) { + if(!strcmp("present",node)) + r_data=!((ret& PSU_STATUS_PRESENT_BIT(id))>> PSU_STATUS_PRESENT_OFFSET(id)); + else if(!strcmp("good",node)) + r_data=((ret& PSU_STATUS_GOOD_BIT(id))>> PSU_STATUS_GOOD_OFFSET(id)); + else + r_data=-1; + + } + else if (PSU2_ID == id) { + + if(!strcmp("present",node)) + r_data=!((ret& PSU_STATUS_PRESENT_BIT(id))>> PSU_STATUS_PRESENT_OFFSET(id)); + else if(!strcmp("good",node)) + r_data=((ret& PSU_STATUS_GOOD_BIT(id))>> PSU_STATUS_GOOD_OFFSET(id)); + else + r_data=-1; + } + else{ + r_data=-1; + } + + return r_data; +} +static int +psu_value_info_get(int id, char *type) +{ + int ret; + char *dev_name; + int reg_offset; + + if(PSU1_ID == id) + dev_name="PSU1_PMBUS"; + else + dev_name="PSU2_PMBUS"; + + if(!strcmp(type,"vin")) + reg_offset=PSU_PNBUS_VIN_REG; + else if(!strcmp(type,"iin")) + reg_offset=PSU_PNBUS_IIN_REG; + else if(!strcmp(type,"pin")) + reg_offset=PSU_PNBUS_PIN_REG; + else if(!strcmp(type,"vout")) + reg_offset=PSU_PNBUS_VOUT_REG; + else if(!strcmp(type,"iout")) + reg_offset=PSU_PNBUS_IOUT_REG; + else + reg_offset=PSU_PNBUS_POUT_REG; + + ret=i2c_devname_read_word(dev_name,reg_offset); + + if(ret<0) + return -1; + + return ret; +} + + +static int +psu_serial_model_info_get(int id,char *type,char*data,int data_len) +{ + int i,r_data,re_cnt; + char *dev_name; + int reg_offset; + + if(PSU1_ID == id) + dev_name="PSU1_EEPROM"; + else + dev_name="PSU2_EEPROM"; + + if(!strcmp(type,"serial")) + reg_offset=PSU_PNBUS_SERIAL_REG; + else + reg_offset=PSU_PNBUS_MODEL_REG; + + for(i=0;istatus &= ~ONLP_PSU_STATUS_PRESENT; + return ONLP_STATUS_OK; + } + info->status |= ONLP_PSU_STATUS_PRESENT; + + /* Get power good status */ + val=psu_status_info_get(index,"good"); + + if (val<0) { + AIM_LOG_INFO("Unable to read PSU %d good value)\r\n", index); + return ONLP_STATUS_E_INVALID; + } + + if (val != PSU_STATUS_POWER_GOOD) { + info->status |= ONLP_PSU_STATUS_FAILED; + } + + /* Get PSU type + */ + psu_type = get_psu_type(index, info->model, sizeof(info->model)); + + switch (psu_type) { + case PSU_TYPE_AC_F2B: + case PSU_TYPE_AC_B2F: + info->caps = ONLP_PSU_CAPS_AC; + ret = ONLP_STATUS_OK; + break; + case PSU_TYPE_UNKNOWN: /* User insert a unknown PSU or unplugged.*/ + info->status |= ONLP_PSU_STATUS_UNPLUGGED; + info->status &= ~ONLP_PSU_STATUS_FAILED; + ret = ONLP_STATUS_OK; + break; + default: + ret = ONLP_STATUS_E_UNSUPPORTED; + break; + } + + /* Get PSU vin,vout*/ + + r_data=psu_value_info_get(index,"vin"); + + if (r_data<0) { + AIM_LOG_INFO("Unable to read PSU %d Vin value)\r\n", index); + return ONLP_STATUS_E_INVALID; + } + + info->mvin=psu_data_convert(r_data,1000); + + r_data=psu_value_info_get(index,"vout"); + + if (r_data<0) { + AIM_LOG_INFO("Unable to read PSU %d Vout value)\r\n", index); + return ONLP_STATUS_E_INVALID; + } + + info->mvout=psu_data_convert_16(r_data,1000); + /* Get PSU iin, iout + */ + r_data=psu_value_info_get(index,"iin"); + + if (r_data<0) { + AIM_LOG_INFO("Unable to read PSU %d Iin value)\r\n", index); + return ONLP_STATUS_E_INVALID; + } + + info->miin=psu_data_convert(r_data,1000); + + r_data=psu_value_info_get(index,"iout"); + + if (r_data<0) { + AIM_LOG_INFO("Unable to read PSU %d Iout value)\r\n", index); + return ONLP_STATUS_E_INVALID; + } + + info->miout=psu_data_convert(r_data,1000); + + /* Get PSU pin, pout + */ + r_data=psu_value_info_get(index,"pin"); + + if (r_data<0) { + AIM_LOG_INFO("Unable to read PSU %d Pin value)\r\n", index); + return ONLP_STATUS_E_INVALID; + } + + info->mpin=psu_data_convert(r_data,1000); + + r_data=psu_value_info_get(index,"pout"); + + if (r_data<0) { + AIM_LOG_INFO("Unable to read PSU %d Pout value)\r\n", index); + return ONLP_STATUS_E_INVALID; + } + + info->mpout=psu_data_convert(r_data,1000); + /* Get PSU serial + */ + + ret=psu_serial_model_info_get(index,"serial",sn_data,14); + if (ret!=ONLP_STATUS_OK) { + AIM_LOG_INFO("Unable to read PSU %d SN value)\r\n", index); + return ONLP_STATUS_E_INVALID; + } + + strcpy(info->serial,sn_data); + + /* Get PSU model + */ + ret=psu_serial_model_info_get(index,"model",model_data,16); + if (ret!=ONLP_STATUS_OK) { + AIM_LOG_INFO("Unable to read PSU %d model value)\r\n", index); + return ONLP_STATUS_E_INVALID; + } + + strcpy(info->model,model_data); + return ONLP_STATUS_OK; +} + +int +onlp_psui_ioctl(onlp_oid_t pid, va_list vargs) +{ + return ONLP_STATUS_E_UNSUPPORTED; +} + diff --git a/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/sfpi.c b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/sfpi.c new file mode 100755 index 00000000..714c6f7c --- /dev/null +++ b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/sfpi.c @@ -0,0 +1,464 @@ +/************************************************************ + * + * + * Copyright 2014, 2015 Big Switch Networks, Inc. + * Copyright 2016 Accton Technology Corporation. + * Copyright 2017 Delta Networks, Inc + * Licensed under the Eclipse Public License, Version 1.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.eclipse.org/legal/epl-v10.html + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, + * either express or implied. See the License for the specific + * language governing permissions and limitations under the + * License. + * + * + ************************************************************ + * + * + * + ***********************************************************/ +#include +#include "platform_lib.h" + +#include +#include "x86_64_delta_ag7648_log.h" +#include "x86_64_delta_i2c.h" + +#define SFP_PLUS_MIN_PORT 1 +#define SFP_PLUS_MAX_PORT 48 +#define QSFP_MIN_PORT 49 +#define QSFP_MAX_PORT 54 + +#define SFP_PLUS_1_8_PRESENT_REG (0X2) +#define SFP_PLUS_9_16_PRESENT_REG (0X3) +#define SFP_PLUS_17_24_PRESENT_REG (0X4) +#define SFP_PLUS_25_32_PRESENT_REG (0X5) +#define SFP_PLUS_33_40_PRESENT_REG (0X6) +#define SFP_PLUS_41_48_PRESENT_REG (0X7) + +#define SFP_PLUS_1_8_RX_LOS_REG (0XE) +#define SFP_PLUS_9_16_RX_LOS_REG (0XF) +#define SFP_PLUS_17_24_RX_LOS_REG (0X10) +#define SFP_PLUS_25_32_RX_LOS_REG (0X11) +#define SFP_PLUS_33_40_RX_LOS_REG (0X12) +#define SFP_PLUS_41_48_RX_LOS_REG (0X13) + +#define SFP_PLUS_1_8_TX_DISABLE_REG (0X8) +#define SFP_PLUS_9_16_TX_DISABLE_REG (0X9) +#define SFP_PLUS_17_24_TX_DISABLE_REG (0XA) +#define SFP_PLUS_25_32_TX_DISABLE_REG (0XB) +#define SFP_PLUS_33_40_TX_DISABLE_REG (0XC) +#define SFP_PLUS_41_48_TX_DISABLE_REG (0XD) + +#define QSFP_49_54_PRESENT_REG (0xC) +#define INVALID_REG (0xFF) +#define INVALID_REG_BIT (0xFF) + + +struct portCtrl{ + int portId; + char cpldName[32]; + int presentReg; + int presentRegBit; + int rxLosReg; + int rxLosRegBit; + int txDisableReg; + int txDisableRegBit; + +}; + +#define CPLD_NAME1 "SYSCPLD" +#define CPLD_NAME2 "MASTERCPLD" +#define CPLD_NAME3 "SLAVECPLD" + +static struct portCtrl gPortCtrl[] = +{ + {1, CPLD_NAME3, SFP_PLUS_1_8_PRESENT_REG, 0, SFP_PLUS_1_8_RX_LOS_REG, 0, SFP_PLUS_1_8_TX_DISABLE_REG, 0}, + {2, CPLD_NAME3, SFP_PLUS_1_8_PRESENT_REG, 1, SFP_PLUS_1_8_RX_LOS_REG, 1, SFP_PLUS_1_8_TX_DISABLE_REG, 1}, + {3, CPLD_NAME3, SFP_PLUS_1_8_PRESENT_REG, 2, SFP_PLUS_1_8_RX_LOS_REG, 1, SFP_PLUS_1_8_TX_DISABLE_REG, 2}, + {4, CPLD_NAME3, SFP_PLUS_1_8_PRESENT_REG, 3, SFP_PLUS_1_8_RX_LOS_REG, 2, SFP_PLUS_1_8_TX_DISABLE_REG, 3}, + {5, CPLD_NAME3, SFP_PLUS_1_8_PRESENT_REG, 4, SFP_PLUS_1_8_RX_LOS_REG, 3, SFP_PLUS_1_8_TX_DISABLE_REG, 4}, + {6, CPLD_NAME3, SFP_PLUS_1_8_PRESENT_REG, 5, SFP_PLUS_1_8_RX_LOS_REG, 4, SFP_PLUS_1_8_TX_DISABLE_REG, 5}, + {7, CPLD_NAME3, SFP_PLUS_1_8_PRESENT_REG, 6, SFP_PLUS_1_8_RX_LOS_REG, 5, SFP_PLUS_1_8_TX_DISABLE_REG, 6}, + {8, CPLD_NAME3, SFP_PLUS_1_8_PRESENT_REG, 7, SFP_PLUS_1_8_RX_LOS_REG, 6, SFP_PLUS_1_8_TX_DISABLE_REG, 7}, + + {9, CPLD_NAME3, SFP_PLUS_9_16_PRESENT_REG, 0, SFP_PLUS_9_16_RX_LOS_REG, 0, SFP_PLUS_9_16_TX_DISABLE_REG, 0}, + {10, CPLD_NAME3, SFP_PLUS_9_16_PRESENT_REG, 1, SFP_PLUS_9_16_RX_LOS_REG, 1, SFP_PLUS_9_16_TX_DISABLE_REG, 1}, + {11, CPLD_NAME3, SFP_PLUS_9_16_PRESENT_REG, 2, SFP_PLUS_9_16_RX_LOS_REG, 1, SFP_PLUS_9_16_TX_DISABLE_REG, 2}, + {12, CPLD_NAME3, SFP_PLUS_9_16_PRESENT_REG, 3, SFP_PLUS_9_16_RX_LOS_REG, 2, SFP_PLUS_9_16_TX_DISABLE_REG, 3}, + {13, CPLD_NAME3, SFP_PLUS_9_16_PRESENT_REG, 4, SFP_PLUS_9_16_RX_LOS_REG, 3, SFP_PLUS_9_16_TX_DISABLE_REG, 4}, + {14, CPLD_NAME3, SFP_PLUS_9_16_PRESENT_REG, 5, SFP_PLUS_9_16_RX_LOS_REG, 4, SFP_PLUS_9_16_TX_DISABLE_REG, 5}, + {15, CPLD_NAME3, SFP_PLUS_9_16_PRESENT_REG, 6, SFP_PLUS_9_16_RX_LOS_REG, 5, SFP_PLUS_9_16_TX_DISABLE_REG, 6}, + {16, CPLD_NAME3, SFP_PLUS_9_16_PRESENT_REG, 7, SFP_PLUS_9_16_RX_LOS_REG, 6, SFP_PLUS_9_16_TX_DISABLE_REG, 7}, + + {17, CPLD_NAME3, SFP_PLUS_17_24_PRESENT_REG, 0, SFP_PLUS_17_24_RX_LOS_REG, 0, SFP_PLUS_17_24_TX_DISABLE_REG, 0}, + {18, CPLD_NAME3, SFP_PLUS_17_24_PRESENT_REG, 1, SFP_PLUS_17_24_RX_LOS_REG, 1, SFP_PLUS_17_24_TX_DISABLE_REG, 1}, + {19, CPLD_NAME3, SFP_PLUS_17_24_PRESENT_REG, 2, SFP_PLUS_17_24_RX_LOS_REG, 1, SFP_PLUS_17_24_TX_DISABLE_REG, 2}, + {20, CPLD_NAME3, SFP_PLUS_17_24_PRESENT_REG, 3, SFP_PLUS_17_24_RX_LOS_REG, 2, SFP_PLUS_17_24_TX_DISABLE_REG, 3}, + {21, CPLD_NAME3, SFP_PLUS_17_24_PRESENT_REG, 4, SFP_PLUS_17_24_RX_LOS_REG, 3, SFP_PLUS_17_24_TX_DISABLE_REG, 4}, + {22, CPLD_NAME3, SFP_PLUS_17_24_PRESENT_REG, 5, SFP_PLUS_17_24_RX_LOS_REG, 4, SFP_PLUS_17_24_TX_DISABLE_REG, 5}, + {23, CPLD_NAME3, SFP_PLUS_17_24_PRESENT_REG, 6, SFP_PLUS_17_24_RX_LOS_REG, 5, SFP_PLUS_17_24_TX_DISABLE_REG, 6}, + {24, CPLD_NAME3, SFP_PLUS_17_24_PRESENT_REG, 7, SFP_PLUS_17_24_RX_LOS_REG, 6, SFP_PLUS_17_24_TX_DISABLE_REG, 7}, + + {25, CPLD_NAME3, SFP_PLUS_25_32_PRESENT_REG, 0, SFP_PLUS_25_32_RX_LOS_REG, 0, SFP_PLUS_25_32_TX_DISABLE_REG, 0}, + {26, CPLD_NAME3, SFP_PLUS_25_32_PRESENT_REG, 1, SFP_PLUS_25_32_RX_LOS_REG, 1, SFP_PLUS_25_32_TX_DISABLE_REG, 1}, + {27, CPLD_NAME3, SFP_PLUS_25_32_PRESENT_REG, 2, SFP_PLUS_25_32_RX_LOS_REG, 1, SFP_PLUS_25_32_TX_DISABLE_REG, 2}, + {28, CPLD_NAME3, SFP_PLUS_25_32_PRESENT_REG, 3, SFP_PLUS_25_32_RX_LOS_REG, 2, SFP_PLUS_25_32_TX_DISABLE_REG, 3}, + {29, CPLD_NAME3, SFP_PLUS_25_32_PRESENT_REG, 4, SFP_PLUS_25_32_RX_LOS_REG, 3, SFP_PLUS_25_32_TX_DISABLE_REG, 4}, + {30, CPLD_NAME3, SFP_PLUS_25_32_PRESENT_REG, 5, SFP_PLUS_25_32_RX_LOS_REG, 4, SFP_PLUS_25_32_TX_DISABLE_REG, 5}, + {31, CPLD_NAME3, SFP_PLUS_25_32_PRESENT_REG, 6, SFP_PLUS_25_32_RX_LOS_REG, 5, SFP_PLUS_25_32_TX_DISABLE_REG, 6}, + {32, CPLD_NAME3, SFP_PLUS_25_32_PRESENT_REG, 7, SFP_PLUS_25_32_RX_LOS_REG, 6, SFP_PLUS_25_32_TX_DISABLE_REG, 7}, + + {33, CPLD_NAME3, SFP_PLUS_33_40_PRESENT_REG, 0, SFP_PLUS_33_40_RX_LOS_REG, 0, SFP_PLUS_33_40_TX_DISABLE_REG, 0}, + {34, CPLD_NAME3, SFP_PLUS_33_40_PRESENT_REG, 1, SFP_PLUS_33_40_RX_LOS_REG, 1, SFP_PLUS_33_40_TX_DISABLE_REG, 1}, + {35, CPLD_NAME3, SFP_PLUS_33_40_PRESENT_REG, 2, SFP_PLUS_33_40_RX_LOS_REG, 1, SFP_PLUS_33_40_TX_DISABLE_REG, 2}, + {36, CPLD_NAME3, SFP_PLUS_33_40_PRESENT_REG, 3, SFP_PLUS_33_40_RX_LOS_REG, 2, SFP_PLUS_33_40_TX_DISABLE_REG, 3}, + {37, CPLD_NAME3, SFP_PLUS_33_40_PRESENT_REG, 4, SFP_PLUS_33_40_RX_LOS_REG, 3, SFP_PLUS_33_40_TX_DISABLE_REG, 4}, + {38, CPLD_NAME3, SFP_PLUS_33_40_PRESENT_REG, 5, SFP_PLUS_33_40_RX_LOS_REG, 4, SFP_PLUS_33_40_TX_DISABLE_REG, 5}, + {39, CPLD_NAME3, SFP_PLUS_33_40_PRESENT_REG, 6, SFP_PLUS_33_40_RX_LOS_REG, 5, SFP_PLUS_33_40_TX_DISABLE_REG, 6}, + {40, CPLD_NAME3, SFP_PLUS_33_40_PRESENT_REG, 7, SFP_PLUS_33_40_RX_LOS_REG, 6, SFP_PLUS_33_40_TX_DISABLE_REG, 7}, + + {41, CPLD_NAME3, SFP_PLUS_41_48_PRESENT_REG, 0, SFP_PLUS_41_48_RX_LOS_REG, 0, SFP_PLUS_41_48_TX_DISABLE_REG, 0}, + {42, CPLD_NAME3, SFP_PLUS_41_48_PRESENT_REG, 1, SFP_PLUS_41_48_RX_LOS_REG, 1, SFP_PLUS_41_48_TX_DISABLE_REG, 1}, + {43, CPLD_NAME3, SFP_PLUS_41_48_PRESENT_REG, 2, SFP_PLUS_41_48_RX_LOS_REG, 1, SFP_PLUS_41_48_TX_DISABLE_REG, 2}, + {44, CPLD_NAME3, SFP_PLUS_41_48_PRESENT_REG, 3, SFP_PLUS_41_48_RX_LOS_REG, 2, SFP_PLUS_41_48_TX_DISABLE_REG, 3}, + {45, CPLD_NAME3, SFP_PLUS_41_48_PRESENT_REG, 4, SFP_PLUS_41_48_RX_LOS_REG, 3, SFP_PLUS_41_48_TX_DISABLE_REG, 4}, + {46, CPLD_NAME3, SFP_PLUS_41_48_PRESENT_REG, 5, SFP_PLUS_41_48_RX_LOS_REG, 4, SFP_PLUS_41_48_TX_DISABLE_REG, 5}, + {47, CPLD_NAME3, SFP_PLUS_41_48_PRESENT_REG, 6, SFP_PLUS_41_48_RX_LOS_REG, 5, SFP_PLUS_41_48_TX_DISABLE_REG, 6}, + {48, CPLD_NAME3, SFP_PLUS_41_48_PRESENT_REG, 7, SFP_PLUS_41_48_RX_LOS_REG, 6, SFP_PLUS_41_48_TX_DISABLE_REG, 7}, + + {49, CPLD_NAME2, QSFP_49_54_PRESENT_REG, 0, INVALID_REG, 0, INVALID_REG_BIT, 0}, + {50, CPLD_NAME2, QSFP_49_54_PRESENT_REG, 1, INVALID_REG, 1, INVALID_REG_BIT, 1}, + {51, CPLD_NAME2, QSFP_49_54_PRESENT_REG, 2, INVALID_REG, 1, INVALID_REG_BIT, 2}, + {52, CPLD_NAME2, QSFP_49_54_PRESENT_REG, 3, INVALID_REG, 2, INVALID_REG_BIT, 3}, + {53, CPLD_NAME2, QSFP_49_54_PRESENT_REG, 4, INVALID_REG, 3, INVALID_REG_BIT, 4}, + {54, CPLD_NAME2, QSFP_49_54_PRESENT_REG, 5, INVALID_REG, 4, INVALID_REG_BIT, 5}, + + {0xFFFF, "", INVALID_REG, 0, INVALID_REG, 0, INVALID_REG_BIT, 0}, + + +}; + +/************************************************************ + * + * SFPI Entry Points + * + ***********************************************************/ +int +onlp_sfpi_init(void) +{ + /* Called at initialization time */ + return ONLP_STATUS_OK; +} + +int +onlp_sfpi_bitmap_get(onlp_sfp_bitmap_t* bmap) +{ + int p; + int start_port, end_port; + + if(platform_id == PLATFORM_ID_DELTA_AG7648_R0) + { + start_port = SFP_PLUS_MIN_PORT; + end_port = QSFP_MAX_PORT; + } + else /*reserved*/ + { + AIM_LOG_ERROR("The platform id %d is invalid \r\n", platform_id); + return ONLP_STATUS_E_UNSUPPORTED; + } + + for(p = start_port; p <=end_port; p++) { + AIM_BITMAP_SET(bmap, p); + } + + return ONLP_STATUS_OK; +} + +int +onlp_sfpi_is_present(int port) +{ + /* + * Return 1 if present. + * Return 0 if not present. + * Return < 0 if error. + */ + int present,r_data; + + if((port >= SFP_PLUS_MIN_PORT) && (port <= QSFP_MAX_PORT)){ + r_data=i2c_devname_read_byte(gPortCtrl[port - 1].cpldName, gPortCtrl[port - 1].presentReg); + } + else{ + AIM_LOG_ERROR("The port %d is invalid \r\n", port); + return ONLP_STATUS_E_UNSUPPORTED; + } + + if(r_data<0){ + AIM_LOG_ERROR("Unable to read present status from port(%d)\r\n", port); + return ONLP_STATUS_E_INTERNAL; + } + r_data = (~r_data) & 0xFF; + + present = (r_data >> gPortCtrl[port - 1].presentRegBit) & 0x1; + + return present; +} + +int +onlp_sfpi_presence_bitmap_get(onlp_sfp_bitmap_t* dst) +{ + int status; + int port, i = 0; + uint64_t presence_all=0; + + AIM_BITMAP_CLR_ALL(dst); + + if(platform_id == PLATFORM_ID_DELTA_AG7648_R0) + { + port = 1; + + } + else{ + AIM_LOG_ERROR("The platform id %d is invalid \r\n", platform_id); + return ONLP_STATUS_E_UNSUPPORTED; + } + + /*read 8 ports present status once*/ + for (i = port; i <= QSFP_MAX_PORT;) + { + /* + AIM_LOG_ERROR("port %d, cpldname %s, reg %d\r\n", i, gPortCtrl[i - 1].cpldName, \ + gPortCtrl[i - 1].presentReg); + */ + status = i2c_devname_read_byte(gPortCtrl[i - 1].cpldName, gPortCtrl[i - 1].presentReg); + + if(status<0){ + AIM_LOG_ERROR("Unable to read presence from the port %d to %d value(status %d) \r\n", i, i + 8, status); + return ONLP_STATUS_E_INTERNAL; + } + status = ~(status) & 0xFF; + presence_all |= ((uint64_t)(status)) << (((i - 1)/ 8) * 8); + + i += 8; + } + + /* Populate bitmap */ + for(i = port; presence_all; i++) { + AIM_BITMAP_MOD(dst, i, (presence_all & 1)); + presence_all >>= 1; + } + + return ONLP_STATUS_OK; +} + +int +onlp_sfpi_rx_los_bitmap_get(onlp_sfp_bitmap_t* dst) +{ + int status; + int port,i = 0; + uint64_t rx_los_all; + + + if(platform_id == PLATFORM_ID_DELTA_AG7648_R0) + { + port = 1; + + } + else{ + AIM_LOG_ERROR("The platform id %d is invalid \r\n", platform_id); + return ONLP_STATUS_E_UNSUPPORTED; + } + + /*read 8 ports present status once*/ + for (i = port; i <= QSFP_MAX_PORT;) + { + status = i2c_devname_read_byte(gPortCtrl[i - 1].cpldName, gPortCtrl[i - 1].rxLosReg); + + if(status<0){ + AIM_LOG_ERROR("Unable to read rx los from the port %d to %d value. \r\n", i, i + 8); + return ONLP_STATUS_E_INTERNAL; + } + status = ~(status) & 0xFF; + rx_los_all |= status << (((i - 1)/ 8) * 8); + + i += 8; + } + + /* Populate bitmap */ + for(i = port; rx_los_all; i++) { + AIM_BITMAP_MOD(dst, i, (rx_los_all & 1)); + rx_los_all >>= 1; + } + + return ONLP_STATUS_OK; +} + +int +onlp_sfpi_eeprom_read(int port, uint8_t data[256]) +{ + /* + * Read the SFP eeprom into data[] + * + * Return MISSING if SFP is missing. + * Return OK if eeprom is read + */ + + int i;//,r_data,re_cnt; + char sfp_name[32]; + + //int i,re_cnt;uint8_t r_data; + memset(data, 0, 256); + memset(sfp_name, 0x0, sizeof(sfp_name)); + + if (port < SFP_PLUS_MIN_PORT || port > QSFP_MAX_PORT) + { + AIM_LOG_ERROR("port %d is not invalid\r\n", port); + return ONLP_STATUS_E_INVALID; + } + if (onlp_sfpi_is_present(port) <= 0) + { + AIM_LOG_WARN("port %d is note present or error\r\n", port); + return ONLP_STATUS_E_MISSING; + } + + if (port <= SFP_PLUS_MAX_PORT) + sprintf(sfp_name, "SFP%d", port); + else + sprintf(sfp_name, "QSFP%d", port); + for(i=0;i<8;i++){ + if (i2c_devname_read_block(sfp_name, (32*i), (char*)(data+32*i), 32) < 0) + { + AIM_LOG_ERROR("Unable to read the port %d eeprom\r\n", port); + return ONLP_STATUS_E_INTERNAL; + } + } + + + return ONLP_STATUS_OK; +} + +int +onlp_sfpi_dom_read(int port, uint8_t data[256]) +{ + + return onlp_sfpi_eeprom_read( port, data); +} + +int +onlp_sfpi_control_set(int port, onlp_sfp_control_t control, int value) +{ + /*value is 1 if the tx disable + value is 0 if the tx enable + */ + + int rc,r_data,dis_value,present; + + if (port < SFP_PLUS_MIN_PORT || port > QSFP_MAX_PORT) + { + AIM_LOG_ERROR("port %d is not invalid\r\n", port); + return ONLP_STATUS_E_INVALID; + } + present=onlp_sfpi_is_present(port); + + if(present <= 0){ + AIM_LOG_INFO("The port %d is not present and can not set tx disable\r\n",port); + return ONLP_STATUS_E_UNSUPPORTED; + } + r_data = i2c_devname_read_byte(gPortCtrl[port - 1].cpldName, gPortCtrl[port - 1].txDisableReg); + + if(r_data<0){ + AIM_LOG_INFO("Unable to read sfp tx disable reg value\r\n"); + return ONLP_STATUS_E_INTERNAL; + } + + r_data &= ~(0x1 << gPortCtrl[port - 1].txDisableReg); + dis_value = value << gPortCtrl[port - 1].txDisableReg; + dis_value |= r_data; + + + switch(control) + { + case ONLP_SFP_CONTROL_TX_DISABLE: + { + rc = i2c_devname_write_byte(gPortCtrl[port - 1].cpldName, gPortCtrl[port - 1].txDisableReg, dis_value); + + if (rc<0) { + AIM_LOG_ERROR("Unable to set tx_disable status to port(%d)\r\n", port); + return ONLP_STATUS_E_INTERNAL; + } + break; + } + + default: + return ONLP_STATUS_E_UNSUPPORTED; + } + + return ONLP_STATUS_OK; +} + +int +onlp_sfpi_control_get(int port, onlp_sfp_control_t control, int* value) +{ + int r_data,present; + + if (port < SFP_PLUS_MIN_PORT || port > QSFP_MAX_PORT) + { + AIM_LOG_ERROR("port %d is not invalid\r\n", port); + return ONLP_STATUS_E_INVALID; + } + + present=onlp_sfpi_is_present(port); + + if(present <= 0){ + AIM_LOG_INFO("The port %d is not present\r\n",port); + return ONLP_STATUS_E_UNSUPPORTED; + } + + switch(control) + { + case ONLP_SFP_CONTROL_RX_LOS: + { + r_data=i2c_devname_read_byte(gPortCtrl[port - 1].cpldName, gPortCtrl[port - 1].rxLosReg); + + if (r_data<0) { + AIM_LOG_ERROR("Unable to read rx_los status from port(%d)\r\n", port); + return ONLP_STATUS_E_INTERNAL; + } + r_data &= (0x1 << gPortCtrl[port - 1].rxLosRegBit); + *value = (r_data >> gPortCtrl[port - 1].rxLosRegBit); + break; + } + + case ONLP_SFP_CONTROL_TX_DISABLE: + { + r_data=i2c_devname_read_byte(gPortCtrl[port - 1].cpldName, gPortCtrl[port - 1].txDisableReg); + + if (r_data<0) { + AIM_LOG_ERROR("Unable to read tx_disabled status from port(%d)\r\n", port); + return ONLP_STATUS_E_INTERNAL; + } + r_data &= (0x1 << gPortCtrl[port - 1].txDisableRegBit); + *value = (r_data >> gPortCtrl[port - 1].txDisableRegBit); + break; + } + + default: + return ONLP_STATUS_E_UNSUPPORTED; + } + + + return ONLP_STATUS_OK; +} + + +int +onlp_sfpi_denit(void) +{ + return ONLP_STATUS_OK; +} diff --git a/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/sysi.c b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/sysi.c new file mode 100755 index 00000000..c745b982 --- /dev/null +++ b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/sysi.c @@ -0,0 +1,293 @@ +/************************************************************ + * + * + * Copyright 2014, 2015 Big Switch Networks, Inc. + * Copyright 2016 Accton Technology Corporation. + * Copyright 2017 Delta Networks, Inc + * Licensed under the Eclipse Public License, Version 1.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.eclipse.org/legal/epl-v10.html + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, + * either express or implied. See the License for the specific + * language governing permissions and limitations under the + * License. + * + * + ************************************************************ + * + * + * + ***********************************************************/ +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "x86_64_delta_ag7648_int.h" +#include "x86_64_delta_ag7648_log.h" + +#include "platform_lib.h" +#include "x86_64_delta_i2c.h" +platform_id_t platform_id = PLATFORM_ID_UNKNOWN; + +#define ONIE_PLATFORM_NAME "x86-64-delta-ag7648-r0" +const char* +onlp_sysi_platform_get(void) +{ + enum ag7648_product_id pid = get_product_id(); + + if (pid == PID_AG7648) + return "x86-64-delta-ag7648"; + else + return "unknow"; +} + +int +onlp_sysi_platform_set(const char* platform) +{ + if(strstr(platform,"x86-64-delta-ag7648-r0")) { + platform_id = PLATFORM_ID_DELTA_AG7648_R0; + return ONLP_STATUS_OK; + } + AIM_LOG_ERROR("No support for platform '%s'", platform); + return ONLP_STATUS_E_UNSUPPORTED; +} + +int +onlp_sysi_platform_info_get(onlp_platform_info_t* pi) +{ + int v; + + v = i2c_devname_read_byte("SYSCPLD", 0X0); + + pi->cpld_versions = aim_fstrdup("%d", v & 0xf); + + return 0; +} + +int +onlp_sysi_onie_data_get(uint8_t** data, int* size) +{ + + uint8_t* rdata = aim_zmalloc(256); + + int i,re_cnt; + + for(i=0;i<8;i++){ + re_cnt=3; + while(re_cnt){ + if (i2c_devname_read_block("ID_EEPROM", i * 32, (char *)(rdata + i * 32), 32) < 0) + { + re_cnt--; + continue; + } + break; + } + if(re_cnt==0){ + AIM_LOG_ERROR("Unable to read the %d reg \r\n",i); + return ONLP_STATUS_E_INTERNAL; + } + + } + + *data = rdata; + + return ONLP_STATUS_OK; + + +} + +void +onlp_sysi_onie_data_free(uint8_t* data) +{ + aim_free(data); +} + + + +int +onlp_sysi_oids_get(onlp_oid_t* table, int max) +{ + int i; + onlp_oid_t* e = table; + memset(table, 0, max*sizeof(onlp_oid_t)); + + /* 1 Thermal sensors on the chassis */ + for (i = 1; i <= CHASSIS_THERMAL_COUNT; i++) { + *e++ = ONLP_THERMAL_ID_CREATE(i); + } + + /* LEDs on the chassis */ + for (i = 1; i <= chassis_led_count(); i++) { + *e++ = ONLP_LED_ID_CREATE(i); + } + + /* 1 Fans on the chassis */ + for (i = 1; i <= chassis_fan_count(); i++) { + *e++ = ONLP_FAN_ID_CREATE(i); + } + + /* 2 PSUs on the chassis */ + for (i = 1; i <= CHASSIS_PSU_COUNT; i++) { + *e++ = ONLP_PSU_ID_CREATE(i); + } + + return 0; +} + +int +onlp_sysi_platform_manage_fans(void) +{ + + int rc; + onlp_thermal_info_t ti2, ti3, ti4; + int mtemp=0; + int new_rpm=0; + + if (chassis_fan_count() == 0) { + return ONLP_STATUS_E_UNSUPPORTED; + } + + /* Get temperature */ + /*rc = onlp_thermali_info_get(ONLP_THERMAL_ID_CREATE(1), &ti1); + + if (rc != ONLP_STATUS_OK) { + return rc; + }*/ + + rc = onlp_thermali_info_get(ONLP_THERMAL_ID_CREATE(2), &ti2); + + if (rc != ONLP_STATUS_OK) { + return rc; + } + rc = onlp_thermali_info_get(ONLP_THERMAL_ID_CREATE(3), &ti3); + + if (rc != ONLP_STATUS_OK) { + return rc; + } + + rc = onlp_thermali_info_get(ONLP_THERMAL_ID_CREATE(4), &ti4); + + if (rc != ONLP_STATUS_OK) { + return rc; + } + + mtemp=(ti2.mcelsius+ti3.mcelsius + ti4.mcelsius) / 3; + + DEBUG_PRINT("mtemp %d\n", mtemp); + + /* Bring fan speed according the temp + */ + + if(mtemp<25000) + new_rpm=FAN_IDLE_RPM; + else if((mtemp>=30000)&&(mtemp<40000)) + new_rpm=FAN_LEVEL1_RPM; + else if((mtemp>=45000)&&(mtemp<55000)) + new_rpm=FAN_LEVEL2_RPM; + else if((mtemp>=60000)&&(mtemp<75000)) + new_rpm=FAN_LEVEL3_RPM; + else if(mtemp>=80000) + new_rpm=FAN_LEVEL4_RPM; + else{ + return ONLP_STATUS_OK; + } + + onlp_fani_rpm_set(ONLP_FAN_ID_CREATE(1),new_rpm); + onlp_fani_rpm_set(ONLP_FAN_ID_CREATE(2),new_rpm); + onlp_fani_rpm_set(ONLP_FAN_ID_CREATE(3),new_rpm); + onlp_fani_rpm_set(ONLP_FAN_ID_CREATE(4),new_rpm); + onlp_fani_rpm_set(ONLP_FAN_ID_CREATE(5),new_rpm); + onlp_fani_rpm_set(ONLP_FAN_ID_CREATE(6),new_rpm); + + + + + + return ONLP_STATUS_OK; +} + + +int +onlp_sysi_platform_manage_leds(void) +{ + int i,tray_i,rc; + onlp_fan_info_t info; + onlp_led_mode_t fan_new_mode; + onlp_led_mode_t fan_tray_new_mode[3]; + onlp_psu_info_t psu; + onlp_led_mode_t psu_new_mode; + onlp_led_mode_t sys_new_mode; + onlp_led_mode_t locator_new_mode; + /*fan led */ + /*fan led */ + for(tray_i=0;tray_i<3;tray_i++){ + for(i=CHASSIS_FAN_COUNT-2*tray_i;i>=CHASSIS_FAN_COUNT-2*tray_i-1;i--){ + rc=onlp_fani_info_get(ONLP_FAN_ID_CREATE(i), &info); + if ((rc != ONLP_STATUS_OK) ||((info.status&0x1)!=1)){ + fan_tray_new_mode[tray_i]=ONLP_LED_MODE_OFF; + goto tray_next; + } + else{ + if((info.status&0x2)==1){ + fan_tray_new_mode[tray_i]=ONLP_LED_MODE_YELLOW; + goto tray_next; + } + } + } + fan_tray_new_mode[tray_i]=ONLP_LED_MODE_GREEN; +tray_next: continue; + } + onlp_ledi_mode_set(ONLP_LED_ID_CREATE(LED_FAN_TRAY0),fan_tray_new_mode[0]); + onlp_ledi_mode_set(ONLP_LED_ID_CREATE(LED_FAN_TRAY1),fan_tray_new_mode[1]); + onlp_ledi_mode_set(ONLP_LED_ID_CREATE(LED_FAN_TRAY2),fan_tray_new_mode[2]); + + if((fan_tray_new_mode[0]==ONLP_LED_MODE_GREEN)&&(fan_tray_new_mode[1]==ONLP_LED_MODE_GREEN)&& + (fan_tray_new_mode[2]==ONLP_LED_MODE_GREEN)) + fan_new_mode=ONLP_LED_MODE_GREEN; + else if((fan_tray_new_mode[0]==ONLP_LED_MODE_OFF)||(fan_tray_new_mode[1]==ONLP_LED_MODE_OFF)|| + (fan_tray_new_mode[2]==ONLP_LED_MODE_OFF)) + fan_new_mode=ONLP_LED_MODE_YELLOW; + else + fan_new_mode=ONLP_LED_MODE_YELLOW_BLINKING; + + onlp_ledi_mode_set(ONLP_LED_ID_CREATE(LED_FAN),fan_new_mode); + /*psu1 and psu2 led */ + for(i=1;i<=CHASSIS_PSU_COUNT;i++){ + rc=onlp_psui_info_get(ONLP_PSU_ID_CREATE(i),&psu); + + if (rc != ONLP_STATUS_OK) { + continue; + } + if((psu.status&0x1)&&!(psu.status&0x2)){ + psu_new_mode=ONLP_LED_MODE_GREEN; + goto sys_led; + } + } + psu_new_mode=ONLP_LED_MODE_YELLOW_BLINKING; + +sys_led : + onlp_ledi_mode_set(ONLP_LED_ID_CREATE(LED_POWER),psu_new_mode); + //sys led ---------------- + if((fan_new_mode!=ONLP_LED_MODE_GREEN)||(psu_new_mode!=ONLP_LED_MODE_GREEN)) + sys_new_mode=ONLP_LED_MODE_YELLOW_BLINKING; + else + sys_new_mode=ONLP_LED_MODE_GREEN; + + onlp_ledi_mode_set(ONLP_LED_ID_CREATE(LED_SYS),sys_new_mode); + + locator_new_mode=ONLP_LED_MODE_GREEN; + onlp_ledi_mode_set(ONLP_LED_ID_CREATE(LED_LOCATOR),locator_new_mode); + return ONLP_STATUS_OK; +} + diff --git a/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/thermali.c b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/thermali.c new file mode 100644 index 00000000..69d353f2 --- /dev/null +++ b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/thermali.c @@ -0,0 +1,150 @@ +/************************************************************ + * + * + * Copyright 2014, 2015 Big Switch Networks, Inc. + * Copyright 2016 Accton Technology Corporation. + * Copyright 2017 Delta Networks, Inc + * Licensed under the Eclipse Public License, Version 1.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.eclipse.org/legal/epl-v10.html + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, + * either express or implied. See the License for the specific + * language governing permissions and limitations under the + * License. + * + * + ************************************************************ + * + * Thermal Sensor Platform Implementation. + * + ***********************************************************/ +#include +#include +#include +#include +#include +#include "platform_lib.h" +#include "x86_64_delta_ag7648_log.h" +#include +#define prefix_path "/sys/bus/i2c/devices/" +#define LOCAL_DEBUG 0 + +#define VALIDATE(_id) \ + do { \ + if(!ONLP_OID_IS_THERMAL(_id)) { \ + return ONLP_STATUS_E_INVALID; \ + } \ + } while(0) + +#define OPEN_READ_FILE(fd,fullpath,data,nbytes,len) \ + DEBUG_PRINT("[Debug][%s][%d][openfile: %s]\n", __FUNCTION__, __LINE__, fullpath); \ + if ((fd = open(fullpath, O_RDONLY)) == -1) \ + return ONLP_STATUS_E_INTERNAL; \ + if ((len = read(fd, r_data, nbytes)) <= 0){ \ + close(fd); \ + return ONLP_STATUS_E_INTERNAL;} \ + DEBUG_PRINT("[Debug][%s][%d][read data: %s]\n", __FUNCTION__, __LINE__, r_data); \ + if (close(fd) == -1) \ + return ONLP_STATUS_E_INTERNAL + +enum onlp_thermal_id +{ + THERMAL_RESERVED = 0, + THERMAL_1_CLOSE_TO_CPU, + THERMAL_1_CLOSE_TO_MAC, + THERMAL_2_CLOSE_TO_PHY_SFP_PLUS, + THERMAL_3_CLOSE_TO_PHY_QSFP, + THERMAL_1_ON_PSU1, + THERMAL_1_ON_PSU2, +}; + +static char* last_path[] = /* must map with onlp_thermal_id */ +{ + "reserved", + "2-004d/hwmon/hwmon1/temp1_input", + "3-004c/hwmon/hwmon2/temp1_input", + "3-004d/hwmon/hwmon3/temp1_input", + "3-004e/hwmon/hwmon4/temp1_input", + "4-0058/psu_temp1_input", + "5-0058/psu_temp1_input", +}; + +/* Static values */ +static onlp_thermal_info_t linfo[] = { + { }, /* Not used */ + { { ONLP_THERMAL_ID_CREATE(THERMAL_1_CLOSE_TO_CPU), "Thermal Sensor 1- close to cpu", 0}, + ONLP_THERMAL_STATUS_PRESENT, + ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS + }, + { { ONLP_THERMAL_ID_CREATE(THERMAL_1_CLOSE_TO_MAC), "Thermal Sensor 1- close to mac", 0}, + ONLP_THERMAL_STATUS_PRESENT, + ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS + }, + { { ONLP_THERMAL_ID_CREATE(THERMAL_2_CLOSE_TO_PHY_SFP_PLUS), "Thermal Sensor 2- close to sfp+ phy", 0}, + ONLP_THERMAL_STATUS_PRESENT, + ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS + }, + { { ONLP_THERMAL_ID_CREATE(THERMAL_3_CLOSE_TO_PHY_QSFP), "Thermal Sensor 2- close to qsfp phy", 0}, + ONLP_THERMAL_STATUS_PRESENT, + ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS + }, + { { ONLP_THERMAL_ID_CREATE(THERMAL_1_ON_PSU1), "PSU-1 Thermal Sensor 1", ONLP_PSU_ID_CREATE(1)}, + ONLP_THERMAL_STATUS_PRESENT, + ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS + }, + { { ONLP_THERMAL_ID_CREATE(THERMAL_1_ON_PSU2), "PSU-2 Thermal Sensor 1", ONLP_PSU_ID_CREATE(2)}, + ONLP_THERMAL_STATUS_PRESENT, + ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS + } +}; + +/* + * This will be called to intiialize the thermali subsystem. + */ +int +onlp_thermali_init(void) +{ + return ONLP_STATUS_OK; +} + +/* + * Retrieve the information structure for the given thermal OID. + * + * If the OID is invalid, return ONLP_E_STATUS_INVALID. + * If an unexpected error occurs, return ONLP_E_STATUS_INTERNAL. + * Otherwise, return ONLP_STATUS_OK with the OID's information. + * + * Note -- it is expected that you fill out the information + * structure even if the sensor described by the OID is not present. + */ +int +onlp_thermali_info_get(onlp_oid_t id, onlp_thermal_info_t* info) +{ + int fd, len, nbytes = 10, temp_base=1, local_id; + char r_data[10] = {0}; + char fullpath[50] = {0}; + VALIDATE(id); + + local_id = ONLP_OID_ID_GET(id); + + DEBUG_PRINT("\n[Debug][%s][%d][local_id: %d]", __FUNCTION__, __LINE__, local_id); + + /* Set the onlp_oid_hdr_t and capabilities */ + *info = linfo[local_id]; + /* get fullpath */ + sprintf(fullpath, "%s%s", prefix_path, last_path[local_id]); + + OPEN_READ_FILE(fd, fullpath, r_data, nbytes, len); + + info->mcelsius = atoi(r_data) / temp_base; + + DEBUG_PRINT("\n[Debug][%s][%d][save data: %d]\n", __FUNCTION__, __LINE__, info->mcelsius); + + return ONLP_STATUS_OK; +} + diff --git a/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/x86_64_delta_ag7648_config.c b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/x86_64_delta_ag7648_config.c new file mode 100644 index 00000000..7b2e8138 --- /dev/null +++ b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/x86_64_delta_ag7648_config.c @@ -0,0 +1,81 @@ +/**************************************************************************//** + * + * + * + *****************************************************************************/ +#include + +/* */ +#define __x86_64_delta_ag7648_config_STRINGIFY_NAME(_x) #_x +#define __x86_64_delta_ag7648_config_STRINGIFY_VALUE(_x) __x86_64_delta_ag7648_config_STRINGIFY_NAME(_x) +x86_64_delta_ag7648_config_settings_t x86_64_delta_ag7648_config_settings[] = +{ +#ifdef X86_64_DELTA_AG7648_CONFIG_INCLUDE_LOGGING + { __x86_64_delta_ag7648_config_STRINGIFY_NAME(X86_64_DELTA_AG7648_CONFIG_INCLUDE_LOGGING), __x86_64_delta_ag7648_config_STRINGIFY_VALUE(X86_64_DELTA_AG7648_CONFIG_INCLUDE_LOGGING) }, +#else +{ X86_64_DELTA_AG7648_CONFIG_INCLUDE_LOGGING(__x86_64_delta_ag7648_config_STRINGIFY_NAME), "__undefined__" }, +#endif +#ifdef X86_64_DELTA_AG7648_CONFIG_LOG_OPTIONS_DEFAULT + { __x86_64_delta_ag7648_config_STRINGIFY_NAME(X86_64_DELTA_AG7648_CONFIG_LOG_OPTIONS_DEFAULT), __x86_64_delta_ag7648_config_STRINGIFY_VALUE(X86_64_DELTA_AG7648_CONFIG_LOG_OPTIONS_DEFAULT) }, +#else +{ X86_64_DELTA_AG7648_CONFIG_LOG_OPTIONS_DEFAULT(__x86_64_delta_ag7648_config_STRINGIFY_NAME), "__undefined__" }, +#endif +#ifdef X86_64_DELTA_AG7648_CONFIG_LOG_BITS_DEFAULT + { __x86_64_delta_ag7648_config_STRINGIFY_NAME(X86_64_DELTA_AG7648_CONFIG_LOG_BITS_DEFAULT), __x86_64_delta_ag7648_config_STRINGIFY_VALUE(X86_64_DELTA_AG7648_CONFIG_LOG_BITS_DEFAULT) }, +#else +{ X86_64_DELTA_AG7648_CONFIG_LOG_BITS_DEFAULT(__x86_64_delta_ag7648_config_STRINGIFY_NAME), "__undefined__" }, +#endif +#ifdef X86_64_DELTA_AG7648_CONFIG_LOG_CUSTOM_BITS_DEFAULT + { __x86_64_delta_ag7648_config_STRINGIFY_NAME(X86_64_DELTA_AG7648_CONFIG_LOG_CUSTOM_BITS_DEFAULT), __x86_64_delta_ag7648_config_STRINGIFY_VALUE(X86_64_DELTA_AG7648_CONFIG_LOG_CUSTOM_BITS_DEFAULT) }, +#else +{ X86_64_DELTA_AG7648_CONFIG_LOG_CUSTOM_BITS_DEFAULT(__x86_64_delta_ag7648_config_STRINGIFY_NAME), "__undefined__" }, +#endif +#ifdef X86_64_DELTA_AG7648_CONFIG_PORTING_STDLIB + { __x86_64_delta_ag7648_config_STRINGIFY_NAME(X86_64_DELTA_AG7648_CONFIG_PORTING_STDLIB), __x86_64_delta_ag7648_config_STRINGIFY_VALUE(X86_64_DELTA_AG7648_CONFIG_PORTING_STDLIB) }, +#else +{ X86_64_DELTA_AG7648_CONFIG_PORTING_STDLIB(__x86_64_delta_ag7648_config_STRINGIFY_NAME), "__undefined__" }, +#endif +#ifdef X86_64_DELTA_AG7648_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS + { __x86_64_delta_ag7648_config_STRINGIFY_NAME(X86_64_DELTA_AG7648_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS), __x86_64_delta_ag7648_config_STRINGIFY_VALUE(X86_64_DELTA_AG7648_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS) }, +#else +{ X86_64_DELTA_AG7648_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS(__x86_64_delta_ag7648_config_STRINGIFY_NAME), "__undefined__" }, +#endif +#ifdef X86_64_DELTA_AG7648_CONFIG_INCLUDE_UCLI + { __x86_64_delta_ag7648_config_STRINGIFY_NAME(X86_64_DELTA_AG7648_CONFIG_INCLUDE_UCLI), __x86_64_delta_ag7648_config_STRINGIFY_VALUE(X86_64_DELTA_AG7648_CONFIG_INCLUDE_UCLI) }, +#else +{ X86_64_DELTA_AG7648_CONFIG_INCLUDE_UCLI(__x86_64_delta_ag7648_config_STRINGIFY_NAME), "__undefined__" }, +#endif +#ifdef X86_64_DELTA_AG7648_CONFIG_INCLUDE_DEFAULT_FAN_DIRECTION + { __x86_64_delta_ag7648_config_STRINGIFY_NAME(X86_64_DELTA_AG7648_CONFIG_INCLUDE_DEFAULT_FAN_DIRECTION), __x86_64_delta_ag7648_config_STRINGIFY_VALUE(X86_64_DELTA_AG7648_CONFIG_INCLUDE_DEFAULT_FAN_DIRECTION) }, +#else +{ X86_64_DELTA_AG7648_CONFIG_INCLUDE_DEFAULT_FAN_DIRECTION(__x86_64_delta_ag7648_config_STRINGIFY_NAME), "__undefined__" }, +#endif + { NULL, NULL } +}; +#undef __x86_64_delta_ag7648_config_STRINGIFY_VALUE +#undef __x86_64_delta_ag7648_config_STRINGIFY_NAME + +const char* +x86_64_delta_ag7648_config_lookup(const char* setting) +{ + int i; + for(i = 0; x86_64_delta_ag7648_config_settings[i].name; i++) { + if(strcmp(x86_64_delta_ag7648_config_settings[i].name, setting)) { + return x86_64_delta_ag7648_config_settings[i].value; + } + } + return NULL; +} + +int +x86_64_delta_ag7648_config_show(struct aim_pvs_s* pvs) +{ + int i; + for(i = 0; x86_64_delta_ag7648_config_settings[i].name; i++) { + aim_printf(pvs, "%s = %s\n", x86_64_delta_ag7648_config_settings[i].name, x86_64_delta_ag7648_config_settings[i].value); + } + return i; +} + +/* */ + diff --git a/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/x86_64_delta_ag7648_enums.c b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/x86_64_delta_ag7648_enums.c new file mode 100644 index 00000000..290a174a --- /dev/null +++ b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/x86_64_delta_ag7648_enums.c @@ -0,0 +1,10 @@ +/**************************************************************************//** + * + * + * + *****************************************************************************/ +#include + +/* <--auto.start.enum(ALL).source> */ +/* */ + diff --git a/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/x86_64_delta_ag7648_int.h b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/x86_64_delta_ag7648_int.h new file mode 100644 index 00000000..99dc0437 --- /dev/null +++ b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/x86_64_delta_ag7648_int.h @@ -0,0 +1,12 @@ +/**************************************************************************//** + * + * x86_64_delta_ag7648 Internal Header + * + *****************************************************************************/ +#ifndef __x86_64_delta_ag7648_INT_H__ +#define __x86_64_delta_ag7648_INT_H__ + +#include + + +#endif /* __x86_64_delta_ag7648_INT_H__ */ diff --git a/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/x86_64_delta_ag7648_log.c b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/x86_64_delta_ag7648_log.c new file mode 100644 index 00000000..d44ddba2 --- /dev/null +++ b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/x86_64_delta_ag7648_log.c @@ -0,0 +1,18 @@ +/**************************************************************************//** + * + * + * + *****************************************************************************/ +#include + +#include "x86_64_delta_ag7648_log.h" +/* + * x86_64_delta_ag7648 log struct. + */ +AIM_LOG_STRUCT_DEFINE( + X86_64_DELTA_AG7648_CONFIG_LOG_OPTIONS_DEFAULT, + X86_64_DELTA_AG7648_CONFIG_LOG_BITS_DEFAULT, + NULL, /* Custom log map */ + X86_64_DELTA_AG7648_CONFIG_LOG_CUSTOM_BITS_DEFAULT + ); + diff --git a/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/x86_64_delta_ag7648_log.h b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/x86_64_delta_ag7648_log.h new file mode 100644 index 00000000..3f59b747 --- /dev/null +++ b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/x86_64_delta_ag7648_log.h @@ -0,0 +1,12 @@ +/**************************************************************************//** + * + * + * + *****************************************************************************/ +#ifndef __x86_64_delta_ag7648_LOG_H__ +#define __x86_64_delta_ag7648_LOG_H__ + +#define AIM_LOG_MODULE_NAME x86_64_delta_ag7648 +#include + +#endif /* __x86_64_delta_ag7648_LOG_H__ */ diff --git a/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/x86_64_delta_ag7648_module.c b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/x86_64_delta_ag7648_module.c new file mode 100644 index 00000000..3b1059e0 --- /dev/null +++ b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/x86_64_delta_ag7648_module.c @@ -0,0 +1,24 @@ +/**************************************************************************//** + * + * + * + *****************************************************************************/ +#include + +#include "x86_64_delta_ag7648_log.h" + +static int +datatypes_init__(void) +{ +#define x86_64_delta_ag7648_ENUMERATION_ENTRY(_enum_name, _desc) AIM_DATATYPE_MAP_REGISTER(_enum_name, _enum_name##_map, _desc, AIM_LOG_INTERNAL); +#include + return 0; +} + +void __x86_64_delta_ag7648_module_init__(void) +{ + AIM_LOG_STRUCT_REGISTER(); + datatypes_init__(); +} + +int __onlp_platform_version__ = 1; diff --git a/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/x86_64_delta_ag7648_ucli.c b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/x86_64_delta_ag7648_ucli.c new file mode 100644 index 00000000..9e0982ff --- /dev/null +++ b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/x86_64_delta_ag7648_ucli.c @@ -0,0 +1,50 @@ +/**************************************************************************//** + * + * + * + *****************************************************************************/ +#include + +#if X86_64_DELTA_AG7648_CONFIG_INCLUDE_UCLI == 1 + +#include +#include +#include + +static ucli_status_t +x86_64_delta_ag7648_ucli_ucli__config__(ucli_context_t* uc) +{ + UCLI_HANDLER_MACRO_MODULE_CONFIG(x86_64_delta_ag7648) +} + +/* */ +/* */ + +static ucli_module_t +x86_64_delta_ag7648_ucli_module__ = + { + "x86_64_delta_ag7648_ucli", + NULL, + x86_64_delta_ag7648_ucli_ucli_handlers__, + NULL, + NULL, + }; + +ucli_node_t* +x86_64_delta_ag7648_ucli_node_create(void) +{ + ucli_node_t* n; + ucli_module_init(&x86_64_delta_ag7648_ucli_module__); + n = ucli_node_create("x86_64_delta_ag7648", NULL, &x86_64_delta_ag7648_ucli_module__); + ucli_node_subnode_add(n, ucli_module_log_node_create("x86_64_delta_ag7648")); + return n; +} + +#else +void* +x86_64_delta_ag7648_ucli_node_create(void) +{ + return NULL; +} +#endif + diff --git a/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/x86_64_delta_i2c.c b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/x86_64_delta_i2c.c new file mode 100755 index 00000000..b3c4ce71 --- /dev/null +++ b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/x86_64_delta_i2c.c @@ -0,0 +1,396 @@ +/************************************************************ + * + * + * Copyright 2014, 2015 Big Switch Networks, Inc. + * Copyright 2016 Accton Technology Corporation. + * Copyright 2017 Delta Networks, Inc + * Copyright 2017 Delta Networks, Inc + * Licensed under the Eclipse Public License, Version 1.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.eclipse.org/legal/epl-v10.html + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, + * either express or implied. See the License for the specific + * language governing permissions and limitations under the + * License. + * + * + ************************************************************/ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "x86_64_delta_ag7648_log.h" +#include "x86_64_delta_i2c.h" +#include "x86_64_delta_i2c_dev.h" + +struct i2c_device_info i2c_device_list[]={ + {"RTC",0X0,0X69}, + {"TMP1_CLOSE_TO_CPU",0X2,0X4d}, + {"TMP1_CLOSE_TO_MAC",0X3,0X4c}, + {"TMP2_CLOSE_TO_SFP_PLUS",0X3,0X4d}, + {"TMP3_CLOSE_TO_QSFP",0X3,0X4E}, + {"SYSCPLD",0X2,0X31}, + {"MASTERCPLD",0X2,0X32}, + {"SLAVECPLD",0X2,0X33}, + {"FAN1EEPROM",0X3,0X51}, + {"FAN2EEPROM",0X3,0X52}, + {"FAN3EEPROM",0X3,0X53}, + {"FANCTRL1",0X3,0X2A}, + {"FANCTRL2",0X3,0X29}, + {"CURT_MONTOR",0X1,0X40}, + {"ID_EEPROM",0X2,0X53}, + {"SFP1",0XA,0X50}, + {"SFP2",0XB,0X50}, + {"SFP3",0XC,0X50}, + {"SFP4",0XD,0X50}, + {"SFP5",0XE,0X50}, + {"SFP6",0XF,0X50}, + {"SFP7",0X10,0X50}, + {"SFP8",0X11,0X50}, + {"SFP9",0X12,0X50}, + {"SFP10",0X13,0X50}, + {"SFP11",0X14,0X50}, + {"SFP12",0X15,0X50}, + {"SFP13",0X16,0X50}, + {"SFP14",0X17,0X50}, + {"SFP15",0X18,0X50}, + {"SFP16",0X19,0X50}, + {"SFP17",0X1A,0X50}, + {"SFP18",0X1B,0X50}, + {"SFP19",0X1C,0X50}, + {"SFP20",0X1D,0X50}, + {"SFP21",0X1E,0X50}, + {"SFP22",0X1F,0X50}, + {"SFP23",0X20,0X50}, + {"SFP24",0X21,0X50}, + {"SFP25",0X22,0X50}, + {"SFP26",0X23,0X50}, + {"SFP27",0X24,0X50}, + {"SFP28",0X25,0X50}, + {"SFP29",0X26,0X50}, + {"SFP30",0X27,0X50}, + {"SFP31",0X28,0X50}, + {"SFP32",0X29,0X50}, + {"SFP33",0X2A,0X50}, + {"SFP34",0X2B,0X50}, + {"SFP35",0X2C,0X50}, + {"SFP36",0X2D,0X50}, + {"SFP37",0X2E,0X50}, + {"SFP38",0X2F,0X50}, + {"SFP39",0X30,0X50}, + {"SFP40",0X31,0X50}, + {"SFP41",0X32,0X50}, + {"SFP42",0X33,0X50}, + {"SFP43",0X34,0X50}, + {"SFP44",0X35,0X50}, + {"SFP45",0X36,0X50}, + {"SFP46",0X37,0X50}, + {"SFP47",0X38,0X50}, + {"SFP48",0X39,0X50}, + {"QSFP49",0X3A,0X50}, + {"QSFP50",0X3B,0X50}, + {"QSFP51",0X3C,0X50}, + {"QSFP52",0X3D,0X50}, + {"QSFP53",0X3E,0X50}, + {"QSFP54",0X3F,0X50}, +// ------------------------- + {"PSU1_PMBUS",0X6,0X58}, + {"PSU2_PMBUS",0X6,0X59}, + {"PSU1_EEPROM",0X6,0X50}, + {"PSU2_EEPROM",0X6,0X51}, + + {NULL, -1,-1}, +}; + +#define I2C_DATA_B 1 +#define I2C_DATA_W 2 +#define I2C_DATA_C 3 +#define I2C_DATA_QUICK 4 + + +static pthread_mutex_t i2c_mutex = PTHREAD_MUTEX_INITIALIZER; + +void I2C_PROTECT (void) +{ + pthread_mutex_lock (&i2c_mutex); +} + +void I2C_UNPROTECT (void) +{ + pthread_mutex_unlock (&i2c_mutex); +} + +static int open_i2cbus_dev(int i2cbus, char *filename, int quiet) +{ + int file; + + sprintf(filename, "/dev/i2c-%d", i2cbus); + file = open(filename, O_RDWR); + + if (file < 0 && !quiet) { + if (errno == ENOENT) { + fprintf(stderr, "Error: Could not open file " + "`/dev/i2c-%d: %s'\n",i2cbus, strerror(ENOENT)); + } else { + fprintf(stderr, "Error: Could not open file " + "`%s': %s\n", filename, strerror(errno)); + if (errno == EACCES) + fprintf(stderr, "Run as root?\n"); + } + } + + return file; +} + +static int set_slave_addr(int file, int address, int force) +{ + /* hack */ + force = 1; /* force always, it will break th i2c driver's behave */ + + + /* With force, let the user read from/write to the registers + even when a driver is also running */ + if (ioctl(file, force ? I2C_SLAVE_FORCE : I2C_SLAVE, address) < 0) { + if (errno != EBUSY) { + fprintf(stderr, + "Error: Could not set address to 0x%02x: %s\n", + address, strerror(errno)); + return -errno; + } + } + + return 0; +} + +static int i2c_dev_read (int i2cbus, int dev, int reg, int mode) +{ + int file; + char filename[20]; + int force = 0; + int res = 0; + + file = open_i2cbus_dev(i2cbus, filename, 0); + if (file < 0) return -1; + + if (set_slave_addr(file, dev, force))return -1; + + switch (mode) { + case I2C_DATA_W: + res = i2c_smbus_read_word_data(file, reg); + break; + case I2C_DATA_C: + if (reg >= 0) { + res = i2c_smbus_write_byte(file, reg); + if (res < 0) break; + } + res = i2c_smbus_read_byte(file); + break; + default: + res = i2c_smbus_read_byte_data(file, reg); + break; + } + close(file); + + return res; +} + +static int i2c_dev_write (int i2cbus, int dev, int reg, int value, int mode) +{ + int file; + char filename[20]; + int force = 0; + int res = 0; + + file = open_i2cbus_dev(i2cbus, filename, 0); + if (file < 0) return -1; + + if (set_slave_addr(file, dev, force)) return -1; + + switch (mode) { + case I2C_DATA_W: + res = i2c_smbus_write_word_data(file, reg, value); + break; + case I2C_DATA_C: + res = i2c_smbus_write_byte (file, reg); + break; + case I2C_DATA_QUICK: + res = i2c_smbus_write_quick(file, I2C_SMBUS_WRITE); + break; + default: + res = i2c_smbus_write_byte_data(file, reg, value); + break; + + } + close(file); + usleep (5000); + + return res; +} + +static int i2c_block_read (int i2cbus, int dev, int reg, char *buff, int buff_len) +{ + int file; + char filename[20]; + int force = 0; + int res = 0; + + file = open_i2cbus_dev(i2cbus, filename, 0); + + if (file < 0) return -1; + + if (set_slave_addr(file, dev, force)) return -1; + + res = i2c_smbus_read_i2c_block_data (file, reg, buff_len, (__u8 *)buff); + + close(file); + + return res; +} + +static int i2c_block_write (int i2cbus, int dev, int reg, char *buff, int buff_len) +{ + int file; + char filename[20]; + int force = 0; + int res = 0; + + file = open_i2cbus_dev(i2cbus, filename, 0); + + if (file < 0) return -1; + + if (set_slave_addr(file, dev, force)) return -1; + + res = i2c_smbus_write_i2c_block_data (file, reg, buff_len, (__u8 *)buff); + + close(file); + + return res; +} + +i2c_device_info_t *i2c_dev_find_by_name (char *name) +{ + i2c_device_info_t *i2c_dev = i2c_device_list; + + if (name == NULL) return NULL; + + while (i2c_dev->name) { + if (strcmp (name, i2c_dev->name) == 0) break; + ++ i2c_dev; + } + if (i2c_dev->name == NULL) return NULL; + + return i2c_dev; +} + +int i2c_devname_read_byte (char *name, int reg) +{ + int ret=-1; + i2c_device_info_t *i2c_dev = i2c_dev_find_by_name (name); + + + if(i2c_dev==NULL) return -1; + + I2C_PROTECT(); + + ret=i2c_dev_read (i2c_dev->i2cbus, i2c_dev->addr, reg, I2C_DATA_B); + + I2C_UNPROTECT(); + + return ret; +} + +int i2c_devname_write_byte (char *name, int reg, int value) +{ + int ret=-1; + i2c_device_info_t *i2c_dev = i2c_dev_find_by_name (name); + + if(i2c_dev==NULL) return -1; + + I2C_PROTECT(); + + ret=i2c_dev_write (i2c_dev->i2cbus, i2c_dev->addr, reg, value, I2C_DATA_B); + + I2C_UNPROTECT(); + + return ret; +} + +int i2c_devname_read_word (char *name, int reg) +{ + int ret=-1; + i2c_device_info_t *i2c_dev = i2c_dev_find_by_name (name); + + if(i2c_dev==NULL) return -1; + + I2C_PROTECT(); + + ret=i2c_dev_read (i2c_dev->i2cbus, i2c_dev->addr, reg, I2C_DATA_W); + + I2C_UNPROTECT(); + + return ret; +} + +int i2c_devname_write_word (char *name, int reg, int value) +{ + int ret=-1; + i2c_device_info_t *i2c_dev = i2c_dev_find_by_name (name); + + if(i2c_dev==NULL) return -1; + + I2C_PROTECT(); + + ret=i2c_dev_write (i2c_dev->i2cbus, i2c_dev->addr, reg, value, I2C_DATA_W); + + I2C_UNPROTECT(); + + return ret; +} + +int i2c_devname_read_block (char *name, int reg, char *buff, int buff_size) +{ + int ret = -1; + + i2c_device_info_t *i2c_dev = i2c_dev_find_by_name (name); + + if(i2c_dev==NULL) return -1; + + I2C_PROTECT(); + + ret = i2c_block_read (i2c_dev->i2cbus, i2c_dev->addr, reg, buff, buff_size); + + I2C_UNPROTECT(); + + return ret; + +} + +int i2c_devname_write_block (char *name, int reg, char *buff, int buff_size) +{ + int ret = -1; + + i2c_device_info_t *i2c_dev = i2c_dev_find_by_name (name); + + if(i2c_dev==NULL) return -1; + + I2C_PROTECT(); + + ret = i2c_block_write (i2c_dev->i2cbus, i2c_dev->addr, reg, buff, buff_size); + + I2C_UNPROTECT(); + + return ret; + +} diff --git a/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/x86_64_delta_i2c.h b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/x86_64_delta_i2c.h new file mode 100755 index 00000000..e7eb1606 --- /dev/null +++ b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/x86_64_delta_i2c.h @@ -0,0 +1,55 @@ +/************************************************************ + * + * + * Copyright 2014, 2015 Big Switch Networks, Inc. + * Copyright 2016 Accton Technology Corporation. + * Copyright 2017 Delta Networks, Inc + * Licensed under the Eclipse Public License, Version 1.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.eclipse.org/legal/epl-v10.html + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, + * either express or implied. See the License for the specific + * language governing permissions and limitations under the + * License. + * + * + ************************************************************/ +/* the i2c struct header*/ + +#ifndef __X86_64_DELTA_I2C_H__ +#define __X86_64_DELTA_I2C_H__ + +#include "x86_64_delta_ag7648_log.h" + +struct i2c_device_info { + /*i2c device name*/ + char *name; + char i2cbus; + char addr; +}; + + +typedef struct i2c_device_info i2c_device_info_t; + +extern struct i2c_device_info i2c_device_list[]; + + +extern int i2c_devname_read_byte(char *name, int reg); + +extern int i2c_devname_write_byte(char *name, int reg, int value); + + +extern int i2c_devname_read_word(char *name, int reg); + +extern int i2c_devname_write_word(char *name, int reg, int value); + + +extern int i2c_devname_read_block (char *name, int reg, char *buff, int buff_size); +extern int i2c_devname_write_block(char *name, int reg, char *buff, int buff_size); + +#endif diff --git a/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/x86_64_delta_i2c_dev.h b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/x86_64_delta_i2c_dev.h new file mode 100755 index 00000000..35eca381 --- /dev/null +++ b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/x86_64_delta_i2c_dev.h @@ -0,0 +1,209 @@ +/************************************************************ + * + * + * Copyright 2014, 2015 Big Switch Networks, Inc. + * Copyright 2016 Accton Technology Corporation. + * Copyright 2017 Delta Networks, Inc + * Licensed under the Eclipse Public License, Version 1.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.eclipse.org/legal/epl-v10.html + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, + * either express or implied. See the License for the specific + * language governing permissions and limitations under the + * License. + * + * + ************************************************************/ + +#ifndef __X86_64_DELTA_I2C_DEV_H__ +#define __X86_64_DELTA_I2C_DEV_H__ + + +#include +#include +#include "x86_64_delta_ag7648_log.h" + +/* -- i2c.h -- */ + +//#include +#include +#if 0 +static inline __s32 i2c_smbus_access(int file, char read_write, __u8 command, + int size, union i2c_smbus_data *data) +{ + struct i2c_smbus_ioctl_data args; + + args.read_write = read_write; + args.command = command; + args.size = size; + args.data = data; + return ioctl(file,I2C_SMBUS,&args); +} + + +static inline __s32 i2c_smbus_write_quick(int file, __u8 value) +{ + return i2c_smbus_access(file,value,0,I2C_SMBUS_QUICK,NULL); +} + +static inline __s32 i2c_smbus_read_byte(int file) +{ + union i2c_smbus_data data; + if (i2c_smbus_access(file,I2C_SMBUS_READ,0,I2C_SMBUS_BYTE,&data)) + return -1; + else + return 0x0FF & data.byte; +} + +static inline __s32 i2c_smbus_write_byte(int file, __u8 value) +{ + return i2c_smbus_access(file,I2C_SMBUS_WRITE,value, + I2C_SMBUS_BYTE,NULL); +} + +static inline __s32 i2c_smbus_read_byte_data(int file, __u8 command) +{ + union i2c_smbus_data data; + if (i2c_smbus_access(file,I2C_SMBUS_READ,command, + I2C_SMBUS_BYTE_DATA,&data)) + return -1; + else + return 0x0FF & data.byte; +} + +static inline __s32 i2c_smbus_write_byte_data(int file, __u8 command, + __u8 value) +{ + union i2c_smbus_data data; + data.byte = value; + return i2c_smbus_access(file,I2C_SMBUS_WRITE,command, + I2C_SMBUS_BYTE_DATA, &data); +} + +static inline __s32 i2c_smbus_read_word_data(int file, __u8 command) +{ + union i2c_smbus_data data; + if (i2c_smbus_access(file,I2C_SMBUS_READ,command, + I2C_SMBUS_WORD_DATA,&data)) + return -1; + else + return 0x0FFFF & data.word; +} + +static inline __s32 i2c_smbus_write_word_data(int file, __u8 command, + __u16 value) +{ + union i2c_smbus_data data; + data.word = value; + return i2c_smbus_access(file,I2C_SMBUS_WRITE,command, + I2C_SMBUS_WORD_DATA, &data); +} + +static inline __s32 i2c_smbus_process_call(int file, __u8 command, __u16 value) +{ + union i2c_smbus_data data; + data.word = value; + if (i2c_smbus_access(file,I2C_SMBUS_WRITE,command, + I2C_SMBUS_PROC_CALL,&data)) + return -1; + else + return 0x0FFFF & data.word; +} + + +/* Returns the number of read bytes */ +static inline __s32 i2c_smbus_read_block_data(int file, __u8 command, + __u8 *values) +{ + union i2c_smbus_data data; + int i; + if (i2c_smbus_access(file,I2C_SMBUS_READ,command, + I2C_SMBUS_BLOCK_DATA,&data)) + return -1; + else { + for (i = 1; i <= data.block[0]; i++) + values[i-1] = data.block[i]; + return data.block[0]; + } +} + +static inline __s32 i2c_smbus_write_block_data(int file, __u8 command, + __u8 length, const __u8 *values) +{ + union i2c_smbus_data data; + int i; + if (length > 32) + length = 32; + for (i = 1; i <= length; i++) + data.block[i] = values[i-1]; + data.block[0] = length; + return i2c_smbus_access(file,I2C_SMBUS_WRITE,command, + I2C_SMBUS_BLOCK_DATA, &data); +} + +/* Returns the number of read bytes */ +/* Until kernel 2.6.22, the length is hardcoded to 32 bytes. If you + ask for less than 32 bytes, your code will only work with kernels + 2.6.23 and later. */ +static inline __s32 i2c_smbus_read_i2c_block_data(int file, __u8 command, + __u8 length, __u8 *values) +{ + union i2c_smbus_data data; + int i; + + if (length > 32) + length = 32; + data.block[0] = length; + if (i2c_smbus_access(file,I2C_SMBUS_READ,command, + length == 32 ? I2C_SMBUS_I2C_BLOCK_BROKEN : + I2C_SMBUS_I2C_BLOCK_DATA,&data)) + return -1; + else { + for (i = 1; i <= data.block[0]; i++) + values[i-1] = data.block[i]; + return data.block[0]; + } +} + +static inline __s32 i2c_smbus_write_i2c_block_data(int file, __u8 command, + __u8 length, + const __u8 *values) +{ + union i2c_smbus_data data; + int i; + if (length > 32) + length = 32; + for (i = 1; i <= length; i++) + data.block[i] = values[i-1]; + data.block[0] = length; + return i2c_smbus_access(file,I2C_SMBUS_WRITE,command, + I2C_SMBUS_I2C_BLOCK_BROKEN, &data); +} + +/* Returns the number of read bytes */ +static inline __s32 i2c_smbus_block_process_call(int file, __u8 command, + __u8 length, __u8 *values) +{ + union i2c_smbus_data data; + int i; + if (length > 32) + length = 32; + for (i = 1; i <= length; i++) + data.block[i] = values[i-1]; + data.block[0] = length; + if (i2c_smbus_access(file,I2C_SMBUS_WRITE,command, + I2C_SMBUS_BLOCK_PROC_CALL,&data)) + return -1; + else { + for (i = 1; i <= data.block[0]; i++) + values[i-1] = data.block[i]; + return data.block[0]; + } +} +#endif +#endif diff --git a/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/x86_64_delta_ag7648.mk b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/x86_64_delta_ag7648.mk new file mode 100644 index 00000000..0bcfffec --- /dev/null +++ b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/x86_64_delta_ag7648.mk @@ -0,0 +1,13 @@ + +############################################################################### +# +# Inclusive Makefile for the x86_64_delta_ag7648 module. +# +# Autogenerated 2017-03-20 15:05:23.627200 +# +############################################################################### +x86_64_delta_ag7648_BASEDIR := $(dir $(abspath $(lastword $(MAKEFILE_LIST)))) +include $(x86_64_delta_ag7648_BASEDIR)module/make.mk +include $(x86_64_delta_ag7648_BASEDIR)module/auto/make.mk +include $(x86_64_delta_ag7648_BASEDIR)module/src/make.mk + diff --git a/packages/platforms/delta/x86-64/x86-64-delta-ag7648/platform-config/Makefile b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/platform-config/Makefile new file mode 100644 index 00000000..003238cf --- /dev/null +++ b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/platform-config/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/packages/platforms/delta/x86-64/x86-64-delta-ag7648/platform-config/r0/Makefile b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/platform-config/r0/Makefile new file mode 100644 index 00000000..003238cf --- /dev/null +++ b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/platform-config/r0/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/packages/platforms/delta/x86-64/x86-64-delta-ag7648/platform-config/r0/PKG.yml b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/platform-config/r0/PKG.yml new file mode 100644 index 00000000..e7d4eb6c --- /dev/null +++ b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/platform-config/r0/PKG.yml @@ -0,0 +1 @@ +!include $ONL_TEMPLATES/platform-config-platform.yml ARCH=amd64 VENDOR=delta BASENAME=x86-64-delta-ag7648 REVISION=r0 diff --git a/packages/platforms/delta/x86-64/x86-64-delta-ag7648/platform-config/r0/src/lib/x86-64-delta-ag7648-r0.yml b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/platform-config/r0/src/lib/x86-64-delta-ag7648-r0.yml new file mode 100644 index 00000000..5f91219b --- /dev/null +++ b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/platform-config/r0/src/lib/x86-64-delta-ag7648-r0.yml @@ -0,0 +1,32 @@ +--- + +###################################################################### +# +# platform-config for AG7648 +# +###################################################################### + +x86-64-delta-ag7648-r0: + + grub: + + serial: >- + --port=0x3f8 + --speed=115200 + --word=8 + --parity=no + --stop=1 + + kernel: + <<: *kernel-3-16 + + args: >- + nopat + acpi=off + console=ttyS0,115200n8 + + ##network + ## interfaces: + ## ma1: + ## name: ~ + ## syspath: pci0000:00/0000:00:14.0 diff --git a/packages/platforms/delta/x86-64/x86-64-delta-ag7648/platform-config/r0/src/python/x86_64_delta_ag7648_r0/__init__.py b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/platform-config/r0/src/python/x86_64_delta_ag7648_r0/__init__.py new file mode 100644 index 00000000..faed8260 --- /dev/null +++ b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/platform-config/r0/src/python/x86_64_delta_ag7648_r0/__init__.py @@ -0,0 +1,31 @@ +from onl.platform.base import * +from onl.platform.delta import * + +class OnlPlatform_x86_64_delta_ag7648_r0(OnlPlatformDelta): + + PLATFORM='x86-64-delta-ag7648-r0' + MODEL="AG7648" + SYS_OBJECT_ID=".7648.1" + PORT_COUNT=54 + PORT_CONFIG="48x10 + 6x40" + + def baseconfig(self): + self.new_i2c_device('pca9547', 0x70, 1); + + self.insmod('x86-64-delta-ag7648-cpld-mux-1.ko') + self.insmod('x86-64-delta-ag7648-cpld-mux-2.ko') + ########### initialize I2C bus 0 ########### + + + self.new_i2c_devices( + [ + ('clock_gen', 0x69, 0), + ('tmp75', 0x4d, 2), + ('tmp75', 0x4c, 3), + ('tmp75', 0x4d, 3), + ('tmp75', 0x4e, 3), + ] + ) + + + return True From 9fc50376153d54ad992e9c0d9339230075bb2eb3 Mon Sep 17 00:00:00 2001 From: "Oleksandr Shamray oleksandrs@mellanox.com" Date: Wed, 7 Jun 2017 18:39:33 +0000 Subject: [PATCH 03/10] Add LED manager function to sysi.c to 2100, 2410 and 2700 systems Add API for read min_fan_speed. Fix led_mode compare ledi.c General code cleunup --- .../onlp/builds/src/module/src/fani.c | 11 +++ .../onlp/builds/src/module/src/ledi.c | 12 +--- .../onlp/builds/src/module/src/platform_lib.h | 14 ++++ .../onlp/builds/src/module/src/sysi.c | 64 +++++++++++++++++- .../onlp/builds/src/module/src/fani.c | 11 +++ .../onlp/builds/src/module/src/ledi.c | 13 +--- .../onlp/builds/src/module/src/platform_lib.h | 15 +++++ .../onlp/builds/src/module/src/sysi.c | 67 +++++++++++++++++++ .../onlp/builds/src/module/src/fani.c | 11 +++ .../onlp/builds/src/module/src/ledi.c | 13 +--- .../onlp/builds/src/module/src/platform_lib.h | 17 ++++- .../onlp/builds/src/module/src/sysi.c | 67 +++++++++++++++++++ 12 files changed, 281 insertions(+), 34 deletions(-) diff --git a/packages/platforms/mellanox/x86-64/x86-64-mlnx-msn2100/onlp/builds/src/module/src/fani.c b/packages/platforms/mellanox/x86-64/x86-64-mlnx-msn2100/onlp/builds/src/module/src/fani.c index 931d6b0d..281105ab 100644 --- a/packages/platforms/mellanox/x86-64/x86-64-mlnx-msn2100/onlp/builds/src/module/src/fani.c +++ b/packages/platforms/mellanox/x86-64/x86-64-mlnx-msn2100/onlp/builds/src/module/src/fani.c @@ -348,3 +348,14 @@ onlp_fani_ioctl(onlp_oid_t id, va_list vargs) return ONLP_STATUS_E_UNSUPPORTED; } +int +onlp_fani_get_min_rpm(int id) +{ + int len = 0, nbytes = 10; + char r_data[10] = {0}; + char fullpath[65] = {0}; + + snprintf(fullpath, sizeof(fullpath), "%s%s", PREFIX_PATH, fan_path[id].min); + OPEN_READ_FILE(fullpath, r_data, nbytes, len); + return atoi(r_data); +} diff --git a/packages/platforms/mellanox/x86-64/x86-64-mlnx-msn2100/onlp/builds/src/module/src/ledi.c b/packages/platforms/mellanox/x86-64/x86-64-mlnx-msn2100/onlp/builds/src/module/src/ledi.c index 6966e6bd..04f52be5 100644 --- a/packages/platforms/mellanox/x86-64/x86-64-mlnx-msn2100/onlp/builds/src/module/src/ledi.c +++ b/packages/platforms/mellanox/x86-64/x86-64-mlnx-msn2100/onlp/builds/src/module/src/ledi.c @@ -52,15 +52,6 @@ /* LED related data */ -enum onlp_led_id -{ - LED_RESERVED = 0, - LED_SYSTEM, - LED_FAN, - LED_PSU1, - LED_PSU2, - LED_UID -}; typedef struct led_light_mode_map { enum onlp_led_id id; @@ -153,8 +144,11 @@ static onlp_led_info_t linfo[] = static int driver_to_onlp_led_mode(enum onlp_led_id id, char* driver_led_mode) { + char *pos; int i, nsize = sizeof(led_map)/sizeof(led_map[0]); + if ((pos=strchr(driver_led_mode, '\n')) != NULL) + *pos = '\0'; for (i = 0; i < nsize; i++) { if (id == led_map[i].id && diff --git a/packages/platforms/mellanox/x86-64/x86-64-mlnx-msn2100/onlp/builds/src/module/src/platform_lib.h b/packages/platforms/mellanox/x86-64/x86-64-mlnx-msn2100/onlp/builds/src/module/src/platform_lib.h index 863da59d..e364842e 100644 --- a/packages/platforms/mellanox/x86-64/x86-64-mlnx-msn2100/onlp/builds/src/module/src/platform_lib.h +++ b/packages/platforms/mellanox/x86-64/x86-64-mlnx-msn2100/onlp/builds/src/module/src/platform_lib.h @@ -41,6 +41,18 @@ #define PSU_POWER_PREFIX "/bsp/power/psu%d_%s" #define IDPROM_PATH "/bsp/eeprom/%s%d_info" +/* LED related data + */ +enum onlp_led_id +{ + LED_RESERVED = 0, + LED_SYSTEM, + LED_FAN, + LED_PSU1, + LED_PSU2, + LED_UID +}; + typedef enum psu_type { PSU_TYPE_UNKNOWN, PSU_TYPE_AC_F2B, @@ -49,4 +61,6 @@ typedef enum psu_type { psu_type_t get_psu_type(int id, char* modelname, int modelname_len); +int onlp_fani_get_min_rpm(int id); + #endif /* __PLATFORM_LIB_H__ */ diff --git a/packages/platforms/mellanox/x86-64/x86-64-mlnx-msn2100/onlp/builds/src/module/src/sysi.c b/packages/platforms/mellanox/x86-64/x86-64-mlnx-msn2100/onlp/builds/src/module/src/sysi.c index 621e6525..d294613d 100644 --- a/packages/platforms/mellanox/x86-64/x86-64-mlnx-msn2100/onlp/builds/src/module/src/sysi.c +++ b/packages/platforms/mellanox/x86-64/x86-64-mlnx-msn2100/onlp/builds/src/module/src/sysi.c @@ -108,9 +108,6 @@ onlp_sysi_oids_get(onlp_oid_t* table, int max) return 0; } -#include - - int onlp_sysi_onie_info_get(onlp_onie_info_t* onie) { @@ -125,3 +122,64 @@ onlp_sysi_onie_info_get(onlp_onie_info_t* onie) return rv; } + +int +onlp_sysi_platform_manage_leds(void) +{ + int fan_number; + onlp_led_mode_t mode; + int min_fan_speed; + enum onlp_led_id fan_led_id = LED_FAN; + + /* after reboot, status LED should blink green, SW set to solid green */ + onlp_ledi_mode_set(ONLP_OID_TYPE_CREATE(ONLP_OID_TYPE_LED,LED_SYSTEM), ONLP_LED_MODE_GREEN); + /* + * FAN Indicators + * + * Green - Fan is operating + * Red - No power or Fan failure + * Off - No power + * + */ + mode = ONLP_LED_MODE_GREEN; + + for( fan_number = 1; fan_number<= CHASSIS_FAN_COUNT; fan_number+=2) + { + /* each 2 fans had same led_fan */ + onlp_fan_info_t fi; + /* check fans */ + if(onlp_fani_info_get(ONLP_FAN_ID_CREATE(fan_number), &fi) < 0) { + mode = ONLP_LED_MODE_RED; + } + else if(fi.status & ONLP_FAN_STATUS_FAILED) { + mode = ONLP_LED_MODE_RED; + } + else + { + min_fan_speed = onlp_fani_get_min_rpm(fan_number); + if( fi.rpm < min_fan_speed) + { + mode = ONLP_LED_MODE_RED; + } + } + /* check fan i+1 */ + if(onlp_fani_info_get(ONLP_FAN_ID_CREATE(fan_number+1), &fi) < 0) { + mode = ONLP_LED_MODE_RED; + } + else if(fi.status & ONLP_FAN_STATUS_FAILED) { + mode = ONLP_LED_MODE_RED; + } + else + { + min_fan_speed = onlp_fani_get_min_rpm(fan_number+1); + if( fi.rpm < min_fan_speed) + { + mode = ONLP_LED_MODE_RED; + } + } + } + onlp_ledi_mode_set(ONLP_OID_TYPE_CREATE(ONLP_OID_TYPE_LED,fan_led_id), mode); + + return ONLP_STATUS_OK; +} + diff --git a/packages/platforms/mellanox/x86-64/x86-64-mlnx-msn2410/onlp/builds/src/module/src/fani.c b/packages/platforms/mellanox/x86-64/x86-64-mlnx-msn2410/onlp/builds/src/module/src/fani.c index a1e23036..289a0ef1 100644 --- a/packages/platforms/mellanox/x86-64/x86-64-mlnx-msn2410/onlp/builds/src/module/src/fani.c +++ b/packages/platforms/mellanox/x86-64/x86-64-mlnx-msn2410/onlp/builds/src/module/src/fani.c @@ -534,3 +534,14 @@ onlp_fani_ioctl(onlp_oid_t id, va_list vargs) return ONLP_STATUS_E_UNSUPPORTED; } +int +onlp_fani_get_min_rpm(int id) +{ + int len = 0, nbytes = 10; + char r_data[10] = {0}; + char fullpath[65] = {0}; + + snprintf(fullpath, sizeof(fullpath), "%s%s", PREFIX_PATH, fan_path[id].min); + OPEN_READ_FILE(fullpath, r_data, nbytes, len); + return atoi(r_data); +} diff --git a/packages/platforms/mellanox/x86-64/x86-64-mlnx-msn2410/onlp/builds/src/module/src/ledi.c b/packages/platforms/mellanox/x86-64/x86-64-mlnx-msn2410/onlp/builds/src/module/src/ledi.c index 592d58e1..f903c899 100644 --- a/packages/platforms/mellanox/x86-64/x86-64-mlnx-msn2410/onlp/builds/src/module/src/ledi.c +++ b/packages/platforms/mellanox/x86-64/x86-64-mlnx-msn2410/onlp/builds/src/module/src/ledi.c @@ -52,16 +52,6 @@ /* LED related data */ -enum onlp_led_id -{ - LED_RESERVED = 0, - LED_SYSTEM, - LED_FAN1, - LED_FAN2, - LED_FAN3, - LED_FAN4, - LED_PSU, -}; typedef struct led_light_mode_map { enum onlp_led_id id; @@ -170,8 +160,11 @@ static onlp_led_info_t linfo[] = static int driver_to_onlp_led_mode(enum onlp_led_id id, char* driver_led_mode) { + char *pos; int i, nsize = sizeof(led_map)/sizeof(led_map[0]); + if ((pos=strchr(driver_led_mode, '\n')) != NULL) + *pos = '\0'; for (i = 0; i < nsize; i++) { if (id == led_map[i].id && diff --git a/packages/platforms/mellanox/x86-64/x86-64-mlnx-msn2410/onlp/builds/src/module/src/platform_lib.h b/packages/platforms/mellanox/x86-64/x86-64-mlnx-msn2410/onlp/builds/src/module/src/platform_lib.h index 68242891..3992e357 100644 --- a/packages/platforms/mellanox/x86-64/x86-64-mlnx-msn2410/onlp/builds/src/module/src/platform_lib.h +++ b/packages/platforms/mellanox/x86-64/x86-64-mlnx-msn2410/onlp/builds/src/module/src/platform_lib.h @@ -42,6 +42,19 @@ #define PSU_POWER_PREFIX "/bsp/power/psu%d_%s" #define IDPROM_PATH "/bsp/eeprom/%s%d_info" +/* LED related data + */ +enum onlp_led_id +{ + LED_RESERVED = 0, + LED_SYSTEM, + LED_FAN1, + LED_FAN2, + LED_FAN3, + LED_FAN4, + LED_PSU, +}; + typedef enum psu_type { PSU_TYPE_UNKNOWN, PSU_TYPE_AC_F2B, @@ -53,4 +66,6 @@ psu_type_t get_psu_type(int id, char* modelname, int modelname_len); int psu_read_eeprom(int psu_index, onlp_psu_info_t* psu_info, onlp_fan_info_t* fan_info); +int onlp_fani_get_min_rpm(int id); + #endif /* __PLATFORM_LIB_H__ */ diff --git a/packages/platforms/mellanox/x86-64/x86-64-mlnx-msn2410/onlp/builds/src/module/src/sysi.c b/packages/platforms/mellanox/x86-64/x86-64-mlnx-msn2410/onlp/builds/src/module/src/sysi.c index ff753835..11b3b1b6 100644 --- a/packages/platforms/mellanox/x86-64/x86-64-mlnx-msn2410/onlp/builds/src/module/src/sysi.c +++ b/packages/platforms/mellanox/x86-64/x86-64-mlnx-msn2410/onlp/builds/src/module/src/sysi.c @@ -132,3 +132,70 @@ onlp_sysi_onie_info_get(onlp_onie_info_t* onie) return rv; } + +int +onlp_sysi_platform_manage_leds(void) +{ + int fan_number; + onlp_led_mode_t mode; + int min_fan_speed; + enum onlp_led_id fan_led_id[4] = { LED_FAN1, LED_FAN2, LED_FAN3, LED_FAN4 }; + + /* after reboot, status LED should blink green, SW set to solid green */ + onlp_ledi_mode_set(ONLP_OID_TYPE_CREATE(ONLP_OID_TYPE_LED,LED_SYSTEM), ONLP_LED_MODE_GREEN); + /* + * FAN Indicators + * + * Green - Fan is operating + * Red - No power or Fan failure + * Off - No power + * + */ + for( fan_number = 1; fan_number <= CHASSIS_FAN_COUNT; fan_number+=2) + { + /* each 2 fans had same led_fan */ + onlp_fan_info_t fi; + /* check fans */ + mode = ONLP_LED_MODE_GREEN; + if(onlp_fani_info_get(ONLP_FAN_ID_CREATE(fan_number), &fi) < 0) { + mode = ONLP_LED_MODE_RED; + } + else if( (fi.status & 0x1) == 0) { + /* Not present */ + mode = ONLP_LED_MODE_RED; + } + else if(fi.status & ONLP_FAN_STATUS_FAILED) { + mode = ONLP_LED_MODE_RED; + } + else + { + min_fan_speed = onlp_fani_get_min_rpm(fan_number); + if( fi.rpm < min_fan_speed) + { + mode = ONLP_LED_MODE_RED; + } + } + /* check fan i+1 */ + if(onlp_fani_info_get(ONLP_FAN_ID_CREATE(fan_number+1), &fi) < 0) { + mode = ONLP_LED_MODE_RED; + } + else if( (fi.status & 0x1) == 0) { + /* Not present */ + mode = ONLP_LED_MODE_RED; + } + else if(fi.status & ONLP_FAN_STATUS_FAILED) { + mode = ONLP_LED_MODE_RED; + } + else + { + min_fan_speed = onlp_fani_get_min_rpm(fan_number+1); + if( fi.rpm < min_fan_speed) + { + mode = ONLP_LED_MODE_RED; + } + } + onlp_ledi_mode_set(ONLP_OID_TYPE_CREATE(ONLP_OID_TYPE_LED,fan_led_id[fan_number/2]), mode); + } + return ONLP_STATUS_OK; +} + diff --git a/packages/platforms/mellanox/x86-64/x86-64-mlnx-msn2700/onlp/builds/src/module/src/fani.c b/packages/platforms/mellanox/x86-64/x86-64-mlnx-msn2700/onlp/builds/src/module/src/fani.c index c5840918..e15f7184 100644 --- a/packages/platforms/mellanox/x86-64/x86-64-mlnx-msn2700/onlp/builds/src/module/src/fani.c +++ b/packages/platforms/mellanox/x86-64/x86-64-mlnx-msn2700/onlp/builds/src/module/src/fani.c @@ -533,3 +533,14 @@ onlp_fani_ioctl(onlp_oid_t id, va_list vargs) return ONLP_STATUS_E_UNSUPPORTED; } +int +onlp_fani_get_min_rpm(int id) +{ + int len = 0, nbytes = 10; + char r_data[10] = {0}; + char fullpath[65] = {0}; + + snprintf(fullpath, sizeof(fullpath), "%s%s", PREFIX_PATH, fan_path[id].min); + OPEN_READ_FILE(fullpath, r_data, nbytes, len); + return atoi(r_data); +} diff --git a/packages/platforms/mellanox/x86-64/x86-64-mlnx-msn2700/onlp/builds/src/module/src/ledi.c b/packages/platforms/mellanox/x86-64/x86-64-mlnx-msn2700/onlp/builds/src/module/src/ledi.c index bdc4d56a..dc96956a 100644 --- a/packages/platforms/mellanox/x86-64/x86-64-mlnx-msn2700/onlp/builds/src/module/src/ledi.c +++ b/packages/platforms/mellanox/x86-64/x86-64-mlnx-msn2700/onlp/builds/src/module/src/ledi.c @@ -52,16 +52,6 @@ /* LED related data */ -enum onlp_led_id -{ - LED_RESERVED = 0, - LED_SYSTEM, - LED_FAN1, - LED_FAN2, - LED_FAN3, - LED_FAN4, - LED_PSU, -}; typedef struct led_light_mode_map { enum onlp_led_id id; @@ -170,8 +160,11 @@ static onlp_led_info_t linfo[] = static int driver_to_onlp_led_mode(enum onlp_led_id id, char* driver_led_mode) { + char *pos; int i, nsize = sizeof(led_map)/sizeof(led_map[0]); + if ((pos=strchr(driver_led_mode, '\n')) != NULL) + *pos = '\0'; for (i = 0; i < nsize; i++) { if (id == led_map[i].id && diff --git a/packages/platforms/mellanox/x86-64/x86-64-mlnx-msn2700/onlp/builds/src/module/src/platform_lib.h b/packages/platforms/mellanox/x86-64/x86-64-mlnx-msn2700/onlp/builds/src/module/src/platform_lib.h index 6169310f..c5b368c0 100644 --- a/packages/platforms/mellanox/x86-64/x86-64-mlnx-msn2700/onlp/builds/src/module/src/platform_lib.h +++ b/packages/platforms/mellanox/x86-64/x86-64-mlnx-msn2700/onlp/builds/src/module/src/platform_lib.h @@ -29,8 +29,6 @@ #include #include "x86_64_mlnx_msn2700_log.h" -// ./sm/infra/modules/AIM/module/inc/AIM/aim_log.h - #define CHASSIS_PSU_COUNT 2 #define CHASSIS_TOTAL_FAN_COUNT 10 #define CHASSIS_TOTAL_THERMAL_COUNT 8 @@ -44,6 +42,19 @@ #define PSU_POWER_PREFIX "/bsp/power/psu%d_%s" #define IDPROM_PATH "/bsp/eeprom/%s%d_info" +/* LED related data + */ +enum onlp_led_id +{ + LED_RESERVED = 0, + LED_SYSTEM, + LED_FAN1, + LED_FAN2, + LED_FAN3, + LED_FAN4, + LED_PSU, +}; + typedef enum psu_type { PSU_TYPE_UNKNOWN, PSU_TYPE_AC_F2B, @@ -55,4 +66,6 @@ psu_type_t get_psu_type(int id, char* modelname, int modelname_len); int psu_read_eeprom(int psu_index, onlp_psu_info_t* psu_info, onlp_fan_info_t* fan_info); +int onlp_fani_get_min_rpm(int id); + #endif /* __PLATFORM_LIB_H__ */ diff --git a/packages/platforms/mellanox/x86-64/x86-64-mlnx-msn2700/onlp/builds/src/module/src/sysi.c b/packages/platforms/mellanox/x86-64/x86-64-mlnx-msn2700/onlp/builds/src/module/src/sysi.c index c9225e19..af615b8c 100644 --- a/packages/platforms/mellanox/x86-64/x86-64-mlnx-msn2700/onlp/builds/src/module/src/sysi.c +++ b/packages/platforms/mellanox/x86-64/x86-64-mlnx-msn2700/onlp/builds/src/module/src/sysi.c @@ -133,3 +133,70 @@ onlp_sysi_onie_info_get(onlp_onie_info_t* onie) return rv; } + +int +onlp_sysi_platform_manage_leds(void) +{ + int fan_number; + onlp_led_mode_t mode; + int min_fan_speed; + enum onlp_led_id fan_led_id[4] = { LED_FAN1, LED_FAN2, LED_FAN3, LED_FAN4 }; + + /* after reboot, status LED should blink green, SW set to solid green */ + onlp_ledi_mode_set(ONLP_OID_TYPE_CREATE(ONLP_OID_TYPE_LED,LED_SYSTEM), ONLP_LED_MODE_GREEN); + /* + * FAN Indicators + * + * Green - Fan is operating + * Red - No power or Fan failure + * Off - No power + * + */ + for( fan_number = 1; fan_number <= CHASSIS_FAN_COUNT; fan_number+=2) + { + /* each 2 fans had same led_fan */ + onlp_fan_info_t fi; + /* check fan i */ + mode = ONLP_LED_MODE_GREEN; + if(onlp_fani_info_get(ONLP_FAN_ID_CREATE(fan_number), &fi) < 0) { + mode = ONLP_LED_MODE_RED; + } + else if( (fi.status & 0x1) == 0) { + /* Not present */ + mode = ONLP_LED_MODE_RED; + } + else if(fi.status & ONLP_FAN_STATUS_FAILED) { + mode = ONLP_LED_MODE_RED; + } + else + { + min_fan_speed = onlp_fani_get_min_rpm(fan_number); + if( fi.rpm < min_fan_speed) + { + mode = ONLP_LED_MODE_RED; + } + } + /* check fan i+1 */ + if(onlp_fani_info_get(ONLP_FAN_ID_CREATE(fan_number+1), &fi) < 0) { + mode = ONLP_LED_MODE_RED; + } + else if( (fi.status & 0x1) == 0) { + /* Not present */ + mode = ONLP_LED_MODE_RED; + } + else if(fi.status & ONLP_FAN_STATUS_FAILED) { + mode = ONLP_LED_MODE_RED; + } + else + { + min_fan_speed = onlp_fani_get_min_rpm(fan_number+1); + if( fi.rpm < min_fan_speed) + { + mode = ONLP_LED_MODE_RED; + } + } + onlp_ledi_mode_set(ONLP_OID_TYPE_CREATE(ONLP_OID_TYPE_LED,fan_led_id[fan_number/2]), mode); + } + return ONLP_STATUS_OK; +} + From 38e5033b9716495db93a90a532d99867203429a8 Mon Sep 17 00:00:00 2001 From: "Oleksandr Shamray oleksandrs@mellanox.com" Date: Mon, 19 Jun 2017 14:19:17 +0000 Subject: [PATCH 04/10] Change OPEN_READ_FILE macros to the onlp_file_read() API in fani.c --- .../x86-64-mlnx-msn2100/onlp/builds/src/module/src/fani.c | 5 ++--- .../x86-64-mlnx-msn2410/onlp/builds/src/module/src/fani.c | 7 +++---- .../x86-64-mlnx-msn2700/onlp/builds/src/module/src/fani.c | 7 +++---- 3 files changed, 8 insertions(+), 11 deletions(-) diff --git a/packages/platforms/mellanox/x86-64/x86-64-mlnx-msn2100/onlp/builds/src/module/src/fani.c b/packages/platforms/mellanox/x86-64/x86-64-mlnx-msn2100/onlp/builds/src/module/src/fani.c index 281105ab..48110160 100644 --- a/packages/platforms/mellanox/x86-64/x86-64-mlnx-msn2100/onlp/builds/src/module/src/fani.c +++ b/packages/platforms/mellanox/x86-64/x86-64-mlnx-msn2100/onlp/builds/src/module/src/fani.c @@ -353,9 +353,8 @@ onlp_fani_get_min_rpm(int id) { int len = 0, nbytes = 10; char r_data[10] = {0}; - char fullpath[65] = {0}; - snprintf(fullpath, sizeof(fullpath), "%s%s", PREFIX_PATH, fan_path[id].min); - OPEN_READ_FILE(fullpath, r_data, nbytes, len); + if (onlp_file_read((uint8_t*)r_data, nbytes, &len, "%s%s", PREFIX_PATH, fan_path[id].min) < 0) + return ONLP_STATUS_E_INTERNAL; return atoi(r_data); } diff --git a/packages/platforms/mellanox/x86-64/x86-64-mlnx-msn2410/onlp/builds/src/module/src/fani.c b/packages/platforms/mellanox/x86-64/x86-64-mlnx-msn2410/onlp/builds/src/module/src/fani.c index 289a0ef1..b33515fe 100644 --- a/packages/platforms/mellanox/x86-64/x86-64-mlnx-msn2410/onlp/builds/src/module/src/fani.c +++ b/packages/platforms/mellanox/x86-64/x86-64-mlnx-msn2410/onlp/builds/src/module/src/fani.c @@ -534,14 +534,13 @@ onlp_fani_ioctl(onlp_oid_t id, va_list vargs) return ONLP_STATUS_E_UNSUPPORTED; } -int +int onlp_fani_get_min_rpm(int id) { int len = 0, nbytes = 10; char r_data[10] = {0}; - char fullpath[65] = {0}; - snprintf(fullpath, sizeof(fullpath), "%s%s", PREFIX_PATH, fan_path[id].min); - OPEN_READ_FILE(fullpath, r_data, nbytes, len); + if (onlp_file_read((uint8_t*)r_data, nbytes, &len, "%s%s", PREFIX_PATH, fan_path[id].min) < 0) + return ONLP_STATUS_E_INTERNAL; return atoi(r_data); } diff --git a/packages/platforms/mellanox/x86-64/x86-64-mlnx-msn2700/onlp/builds/src/module/src/fani.c b/packages/platforms/mellanox/x86-64/x86-64-mlnx-msn2700/onlp/builds/src/module/src/fani.c index e15f7184..03df3efc 100644 --- a/packages/platforms/mellanox/x86-64/x86-64-mlnx-msn2700/onlp/builds/src/module/src/fani.c +++ b/packages/platforms/mellanox/x86-64/x86-64-mlnx-msn2700/onlp/builds/src/module/src/fani.c @@ -533,14 +533,13 @@ onlp_fani_ioctl(onlp_oid_t id, va_list vargs) return ONLP_STATUS_E_UNSUPPORTED; } -int +int onlp_fani_get_min_rpm(int id) { int len = 0, nbytes = 10; char r_data[10] = {0}; - char fullpath[65] = {0}; - snprintf(fullpath, sizeof(fullpath), "%s%s", PREFIX_PATH, fan_path[id].min); - OPEN_READ_FILE(fullpath, r_data, nbytes, len); + if (onlp_file_read((uint8_t*)r_data, nbytes, &len, "%s%s", PREFIX_PATH, fan_path[id].min) < 0) + return ONLP_STATUS_E_INTERNAL; return atoi(r_data); } From f90837424d1b78d9aca1c97182869656370dac3d Mon Sep 17 00:00:00 2001 From: raymondhuey Date: Wed, 21 Jun 2017 14:13:21 +0800 Subject: [PATCH 05/10] Update the patch file "driver-igb-netberg-aurora.patch" - Remove unused and re-define definitions in bcm_phy.c - Change the name of function "bcm54616_config_init" to "bcm54616s_config_init" --- .../patches/driver-igb-netberg-aurora.patch | 501 ++++++------------ 1 file changed, 151 insertions(+), 350 deletions(-) diff --git a/packages/base/any/kernels/3.16-lts/patches/driver-igb-netberg-aurora.patch b/packages/base/any/kernels/3.16-lts/patches/driver-igb-netberg-aurora.patch index 08d2c2e0..7ed0f44d 100644 --- a/packages/base/any/kernels/3.16-lts/patches/driver-igb-netberg-aurora.patch +++ b/packages/base/any/kernels/3.16-lts/patches/driver-igb-netberg-aurora.patch @@ -1,354 +1,204 @@ diff -Nu a/drivers/net/ethernet/intel/igb/bcm_phy.c b/drivers/net/ethernet/intel/igb/bcm_phy.c ---- a/drivers/net/ethernet/intel/igb/bcm_phy.c 1969-12-31 16:00:00.000000000 -0800 -+++ b/drivers/net/ethernet/intel/igb/bcm_phy.c 2016-12-26 21:40:26.000000000 -0800 -@@ -0,0 +1,357 @@ -+ -+ -+ +--- a/drivers/net/ethernet/intel/igb/bcm_phy.c 1970-01-01 08:00:00.000000000 +0800 ++++ b/drivers/net/ethernet/intel/igb/bcm_phy.c 2017-06-20 17:00:46.000000000 +0800 +@@ -0,0 +1,206 @@ +#include "e1000_hw.h" ++#include "linux/brcmphy.h" + +/* + * 1000Base-T Control Register + */ -+#define MII_GB_CTRL_MS_MAN (1 << 12) /* Manual Master/Slave mode */ -+#define MII_GB_CTRL_MS (1 << 11) /* Master/Slave negotiation mode */ -+#define MII_GB_CTRL_PT (1 << 10) /* Port type */ -+#define MII_GB_CTRL_ADV_1000FD (1 << 9) /* Advertise 1000Base-T FD */ -+#define MII_GB_CTRL_ADV_1000HD (1 << 8) /* Advertise 1000Base-T HD */ -+ -+ -+#define MII_BCM54XX_ECR 0x10 /* BCM54xx extended control register */ -+#define MII_BCM54XX_ECR_IM 0x1000 /* Interrupt mask */ -+#define MII_BCM54XX_ECR_IF 0x0800 /* Interrupt force */ -+#define MII_BCM54XX_ESR 0x11 /* BCM54xx extended status register */ -+#define MII_BCM54XX_ESR_IS 0x1000 /* Interrupt status */ -+#define MII_BCM54XX_EXP_DATA 0x15 /* Expansion register data */ -+#define MII_BCM54XX_EXP_SEL 0x17 /* Expansion register select */ -+#define MII_BCM54XX_EXP_SEL_SSD 0x0e00 /* Secondary SerDes select */ -+#define MII_BCM54XX_EXP_SEL_ER 0x0f00 /* Expansion register select */ -+#define MII_BCM54XX_AUX_CTL 0x18 /* Auxiliary control register */ +#define MII_BCM54XX_AUX_CTL_ENCODE(val) (((val & 0x7) << 12)|(val & 0x7)) -+#define MII_BCM54XX_ISR 0x1a /* BCM54xx interrupt status register */ -+#define MII_BCM54XX_IMR 0x1b /* BCM54xx interrupt mask register */ -+#define MII_BCM54XX_INT_CRCERR 0x0001 /* CRC error */ -+#define MII_BCM54XX_INT_LINK 0x0002 /* Link status changed */ -+#define MII_BCM54XX_INT_SPEED 0x0004 /* Link speed change */ -+#define MII_BCM54XX_INT_DUPLEX 0x0008 /* Duplex mode changed */ -+#define MII_BCM54XX_INT_LRS 0x0010 /* Local receiver status changed */ -+#define MII_BCM54XX_INT_RRS 0x0020 /* Remote receiver status changed */ -+#define MII_BCM54XX_INT_SSERR 0x0040 /* Scrambler synchronization error */ -+#define MII_BCM54XX_INT_UHCD 0x0080 /* Unsupported HCD negotiated */ -+#define MII_BCM54XX_INT_NHCD 0x0100 /* No HCD */ -+#define MII_BCM54XX_INT_NHCDL 0x0200 /* No HCD link */ -+#define MII_BCM54XX_INT_ANPR 0x0400 /* Auto-negotiation page received */ -+#define MII_BCM54XX_INT_LC 0x0800 /* All counters below 128 */ -+#define MII_BCM54XX_INT_HC 0x1000 /* Counter above 32768 */ -+#define MII_BCM54XX_INT_MDIX 0x2000 /* MDIX status change */ -+#define MII_BCM54XX_INT_PSERR 0x4000 /* Pair swap error */ + +/* + * MII Link Advertisment + */ -+#define MII_ANA_ASF (1 << 0)/* Advertise Selector Field */ -+#define MII_ANA_HD_10 (1 << 5)/* Half duplex 10Mb/s supported */ -+#define MII_ANA_FD_10 (1 << 6)/* Full duplex 10Mb/s supported */ -+#define MII_ANA_HD_100 (1 << 7)/* Half duplex 100Mb/s supported */ -+#define MII_ANA_FD_100 (1 << 8)/* Full duplex 100Mb/s supported */ -+#define MII_ANA_T4 (1 << 9)/* T4 */ ++#define MII_ANA_ASF (1 << 0) /* Advertise Selector Field */ ++#define MII_ANA_HD_10 (1 << 5) /* Half duplex 10Mb/s supported */ ++#define MII_ANA_FD_10 (1 << 6) /* Full duplex 10Mb/s supported */ ++#define MII_ANA_HD_100 (1 << 7) /* Half duplex 100Mb/s supported */ ++#define MII_ANA_FD_100 (1 << 8) /* Full duplex 100Mb/s supported */ ++#define MII_ANA_T4 (1 << 9) /* T4 */ +#define MII_ANA_PAUSE (1 << 10)/* Pause supported */ +#define MII_ANA_ASYM_PAUSE (1 << 11)/* Asymmetric pause supported */ +#define MII_ANA_RF (1 << 13)/* Remote fault */ +#define MII_ANA_NP (1 << 15)/* Next Page */ + -+#define MII_ANA_ASF_802_3 (1) /* 802.3 PHY */ -+ -+ -+#define MII_BCM54XX_SHD 0x1c /* 0x1c shadow registers */ -+#define MII_BCM54XX_SHD_WRITE 0x8000 -+#define MII_BCM54XX_SHD_VAL(x) ((x & 0x1f) << 10) -+#define MII_BCM54XX_SHD_DATA(x) ((x & 0x3ff) << 0) -+ -+#define MII_BCM54XX_AUX_STATUS 0x19 /* Auxiliary status */ -+#define MII_BCM54XX_AUX_STATUS_LINKMODE_MASK 0x0700 -+#define MII_BCM54XX_AUX_STATUS_LINKMODE_SHIFT 8 -+#define MII_BCM54XX_SHD_WR_ENCODE(val, data) \ -+ (MII_BCM54XX_SHD_WRITE | MII_BCM54XX_SHD_VAL(val) | \ -+ MII_BCM54XX_SHD_DATA(data)) ++#define MII_ANA_ASF_802_3 (1) /* 802.3 PHY */ + +/* -+ * AUXILIARY CONTROL SHADOW ACCESS REGISTERS. (PHY REG 0x18) -+ */ -+#define MII_BCM54XX_AUXCTL_SHDWSEL_AUXCTL 0x0000 -+#define MII_BCM54XX_AUXCTL_ACTL_TX_6DB 0x0400 -+#define MII_BCM54XX_AUXCTL_ACTL_SMDSP_ENA 0x0800 -+ -+#define MII_BCM54XX_AUXCTL_MISC_WREN 0x8000 -+#define MII_BCM54XX_AUXCTL_MISC_FORCE_AMDIX 0x0200 -+#define MII_BCM54XX_AUXCTL_MISC_RDSEL_MISC 0x7000 -+#define MII_BCM54XX_AUXCTL_SHDWSEL_MISC 0x0007 -+ -+#define MII_BCM54XX_AUXCTL_SHDWSEL_AUXCTL 0x0000 -+ -+/* -+ * Broadcom LED source encodings. These are used in BCM5461, BCM5481, -+ * BCM5482, and possibly some others. -+ */ -+#define BCM_LED_SRC_LINKSPD1 0x0 -+#define BCM_LED_SRC_LINKSPD2 0x1 -+#define BCM_LED_SRC_XMITLED 0x2 -+#define BCM_LED_SRC_ACTIVITYLED 0x3 -+#define BCM_LED_SRC_FDXLED 0x4 -+#define BCM_LED_SRC_SLAVE 0x5 -+#define BCM_LED_SRC_INTR 0x6 -+#define BCM_LED_SRC_QUALITY 0x7 -+#define BCM_LED_SRC_RCVLED 0x8 -+#define BCM_LED_SRC_MULTICOLOR1 0xa -+#define BCM_LED_SRC_OPENSHORT 0xb -+#define BCM_LED_SRC_OFF 0xe /* Tied high */ -+#define BCM_LED_SRC_ON 0xf /* Tied low */ -+ -+ /* -+ * BCM54XX: Shadow registers -+ * Shadow values go into bits [14:10] of register 0x1c to select a shadow -+ * register to access. -+ */ -+ -+#define BCM54XX_SHD_AUTODETECT 0x1e /* 11110: Auto detect Regisrer */ ++ * BCM54XX: Shadow registers ++ * Shadow values go into bits [14:10] of register 0x1c to select a shadow ++ * register to access. ++ */ ++#define BCM54XX_SHD_AUTODETECT 0x1e /* 11110: Auto detect Regisrer */ +#define BCM54XX_SHD_MODE 0x1f /* 11111: Mode Control Register */ -+#define BCM54XX_SHD_MODE_COPPER 1<<7 -+#define BCM54XX_SHD_MODE_SER 1<<6 -+ /* -+ * EXPANSION SHADOW ACCESS REGISTERS. (PHY REG 0x15, 0x16, and 0x17) -+ */ -+ #define MII_BCM54XX_EXP_AADJ1CH0 0x001f -+ #define MII_BCM54XX_EXP_AADJ1CH0_SWP_ABCD_OEN 0x0200 -+ #define MII_BCM54XX_EXP_AADJ1CH0_SWSEL_THPF 0x0100 -+ #define MII_BCM54XX_EXP_AADJ1CH3 0x601f -+ #define MII_BCM54XX_EXP_AADJ1CH3_ADCCKADJ 0x0002 -+ #define MII_BCM54XX_EXP_EXP08 0x0F08 -+ #define MII_BCM54XX_EXP_EXP08_RJCT_2MHZ 0x0001 -+ #define MII_BCM54XX_EXP_EXP08_EARLY_DAC_WAKE 0x0200 -+ #define MII_BCM54XX_EXP_EXP75 0x0f75 -+ #define MII_BCM54XX_EXP_EXP75_VDACCTRL 0x003c -+ #define MII_BCM54XX_EXP_EXP96 0x0f96 -+ #define MII_BCM54XX_EXP_EXP96_MYST 0x0010 -+ #define MII_BCM54XX_EXP_EXP97 0x0f97 -+ #define MII_BCM54XX_EXP_EXP97_MYST 0x0c0c -+ -+ ++#define BCM54XX_SHD_MODE_SER 1<<6 + -+ -+ /* -+ * Indirect register access functions for the 1000BASE-T/100BASE-TX/10BASE-T -+ * 0x1c shadow registers. -+ */ ++/* ++ * Indirect register access functions for the 1000BASE-T/100BASE-TX/10BASE-T ++ * 0x1c shadow registers. ++ */ + -+int bcmphy_write(struct e1000_hw *hw,u32 reg,u16 regval){ ++int bcmphy_write(struct e1000_hw *hw,u32 reg, u16 regval) ++{ ++ u32 ret; ++ struct e1000_phy_info *phy = &hw->phy; + -+ u32 ret; -+ struct e1000_phy_info *phy = &hw->phy; -+ ret=phy->ops.write_reg(hw,reg,regval); -+ return ret; ++ ret = phy->ops.write_reg(hw,reg, regval); ++ return ret; +} + -+u16 bcmphy_read(struct e1000_hw *hw,u32 reg){ ++u16 bcmphy_read(struct e1000_hw *hw, u32 reg) ++{ ++ u16 val; ++ struct e1000_phy_info *phy = &hw->phy; + -+ u16 val; -+ struct e1000_phy_info *phy = &hw->phy; -+ phy->ops.read_reg(hw,reg,&val); -+ return val; ++ phy->ops.read_reg(hw,reg, &val); ++ return val; +} + -+ +static int bcm54xx_shadow_read(struct e1000_hw *hw, u16 shadow) +{ -+ bcmphy_write(hw, MII_BCM54XX_SHD, MII_BCM54XX_SHD_VAL(shadow)); -+ return MII_BCM54XX_SHD_DATA(bcmphy_read(hw, MII_BCM54XX_SHD)); ++ bcmphy_write(hw, MII_BCM54XX_SHD, MII_BCM54XX_SHD_VAL(shadow)); ++ return MII_BCM54XX_SHD_DATA(bcmphy_read(hw, MII_BCM54XX_SHD)); +} -+ ++ +static int bcm54xx_shadow_write(struct e1000_hw *hw, u16 shadow, u16 val) -+ { -+ return bcmphy_write(hw, MII_BCM54XX_SHD, -+ MII_BCM54XX_SHD_WRITE | -+ MII_BCM54XX_SHD_VAL(shadow) | -+ MII_BCM54XX_SHD_DATA(val)); -+ } -+ -+ /* Indirect register access functions for the Expansion Registers */ -+ static int bcm54xx_exp_read(struct e1000_hw *hw, u8 regnum) -+ { -+ int val; -+ -+ val = bcmphy_write(hw, MII_BCM54XX_EXP_SEL, regnum); -+ if (val < 0) -+ return val; -+ -+ val = bcmphy_read(hw, MII_BCM54XX_EXP_DATA); -+ -+ /* Restore default value. It's O.K. if this write fails. */ -+ bcmphy_write(hw, MII_BCM54XX_EXP_SEL, 0); -+ -+ return val; -+ } -+ -+ static int bcm54xx_exp_write(struct e1000_hw *hw, u16 regnum, u16 val) -+ { -+ int ret; ++{ ++ return bcmphy_write(hw, MII_BCM54XX_SHD, ++ MII_BCM54XX_SHD_WRITE | ++ MII_BCM54XX_SHD_VAL(shadow) | ++ MII_BCM54XX_SHD_DATA(val)); ++} ++ ++static int bcm54xx_auxctl_write(struct e1000_hw *hw, u16 regnum, u16 val) ++{ ++ return bcmphy_write(hw, MII_BCM54XX_AUX_CTL, (regnum | val)); ++} + -+ ret = bcmphy_write(hw, MII_BCM54XX_EXP_SEL, regnum); -+ if (ret < 0) -+ return ret; -+ -+ ret = bcmphy_write(hw, MII_BCM54XX_EXP_DATA, val); -+ -+ /* Restore default value. It's O.K. if this write fails. */ -+ bcmphy_write(hw, MII_BCM54XX_EXP_SEL, 0); -+ -+ return ret; -+ } -+ -+ static int bcm54xx_auxctl_write(struct e1000_hw *hw, u16 regnum, u16 val) -+ { -+ return bcmphy_write(hw, MII_BCM54XX_AUX_CTL, regnum | val); -+ } -+ +static int bcm54xx_config_init(struct e1000_hw *hw) -+ { -+ int reg, err; -+ -+ reg = bcmphy_read(hw, MII_BCM54XX_ECR); -+ if (reg < 0) -+ return reg; -+ -+ /* Mask interrupts globally. */ -+ reg |= MII_BCM54XX_ECR_IM; -+ err = bcmphy_write(hw, MII_BCM54XX_ECR, reg); -+ if (err < 0) -+ return err; -+ -+ /* Unmask events we are interested in. */ -+ reg = ~(MII_BCM54XX_INT_DUPLEX | -+ MII_BCM54XX_INT_SPEED | -+ MII_BCM54XX_INT_LINK); -+ err = bcmphy_write(hw, MII_BCM54XX_IMR, reg); -+ if (err < 0) -+ return err; -+ -+ return 0; -+ } ++{ ++ int reg, err; + -+void bcm54616s_linkup(struct e1000_hw *hw,int speed , int duplex) ++ reg = bcmphy_read(hw, MII_BCM54XX_ECR); ++ if (reg < 0) ++ return reg; ++ ++ /* Mask interrupts globally. */ ++ reg |= MII_BCM54XX_ECR_IM; ++ err = bcmphy_write(hw, MII_BCM54XX_ECR, reg); ++ if (err < 0) ++ return err; ++ ++ /* Unmask events we are interested in. */ ++ reg = ~(MII_BCM54XX_INT_DUPLEX | ++ MII_BCM54XX_INT_SPEED | ++ MII_BCM54XX_INT_LINK); ++ err = bcmphy_write(hw, MII_BCM54XX_IMR, reg); ++ if (err < 0) ++ return err; ++ ++ return 0; ++} ++ ++void bcm54616s_linkup(struct e1000_hw *hw, int speed, int duplex) +{ + u16 regval; + + /* set speed and full duplex*/ -+ regval=bcmphy_read(hw,PHY_CONTROL); ++ regval = bcmphy_read(hw,PHY_CONTROL); ++ regval &= ~(MII_CR_SPEED_SELECT_MSB | ++ MII_CR_SPEED_SELECT_LSB | ++ MII_CR_FULL_DUPLEX); + -+ regval &= ~(MII_CR_SPEED_SELECT_MSB | MII_CR_SPEED_SELECT_LSB |MII_CR_FULL_DUPLEX); -+ switch(speed){ -+ case SPEED_10: -+ regval |=MII_CR_SPEED_10; -+ break; -+ case SPEED_100: -+ regval |=MII_CR_SPEED_100; -+ break; -+ case SPEED_1000: -+ default: -+ regval |=MII_CR_SPEED_1000; -+ break; -+ } -+ switch(duplex){ -+ case FULL_DUPLEX: -+ regval |=MII_CR_FULL_DUPLEX; -+ break; ++ switch(speed) { ++ case SPEED_10: ++ regval |= MII_CR_SPEED_10; ++ break; ++ case SPEED_100: ++ regval |= MII_CR_SPEED_100; ++ break; ++ case SPEED_1000: ++ default: ++ regval |= MII_CR_SPEED_1000; ++ break; + } + -+ bcmphy_write(hw,PHY_CONTROL,regval); ++ switch(duplex) { ++ case FULL_DUPLEX: ++ regval |= MII_CR_FULL_DUPLEX; ++ break; ++ } + -+ #if 0 -+ /* set Master auto and cap*/ -+ regval=bcmphy_read(hw,PHY_1000T_CTRL); -+ regval &= ~(MII_GB_CTRL_MS_MAN); -+ regval |= MII_ANA_ASF_802_3; -+ regval |= MII_ANA_HD_10; -+ regval |= MII_ANA_HD_100; -+ regval |= MII_ANA_FD_10; -+ regval |= MII_ANA_FD_100; -+ regval |= MII_ANA_ASYM_PAUSE; -+ regval |= MII_ANA_PAUSE | MII_ANA_ASYM_PAUSE; -+ regval |= MII_ANA_PAUSE; -+ bcmphy_write(hw,PHY_1000T_CTRL,regval); ++ bcmphy_write(hw,PHY_CONTROL, regval); + -+ regval=bcmphy_read(hw,PHY_CONTROL); -+ regval |= MII_CR_AUTO_NEG_EN | MII_CR_RESTART_AUTO_NEG; -+ bcmphy_write(hw,PHY_CONTROL,regval); -+ #endif -+ -+ regval=bcmphy_read(hw,PHY_CONTROL); -+ regval &=~(MII_CR_ISOLATE); -+ bcmphy_write(hw,PHY_CONTROL,regval); ++ regval = bcmphy_read(hw, PHY_CONTROL); ++ regval &= ~(MII_CR_ISOLATE); ++ bcmphy_write(hw, PHY_CONTROL, regval); +} + -+int bcm54616_config_init(struct e1000_hw *hw) -+ { ++int bcm54616s_config_init(struct e1000_hw *hw) ++{ + int err, reg; + u16 regval; + int i; + + /* reset PHY */ -+ regval=1<<15; -+ bcmphy_write(hw,PHY_CONTROL,regval); ++ regval = (1<<15); ++ bcmphy_write(hw, PHY_CONTROL, regval); + + mdelay(10); + + /* disable Power down and iso */ -+ regval=bcmphy_read(hw,PHY_CONTROL); -+ regval &=~(MII_CR_POWER_DOWN|MII_CR_ISOLATE); -+ bcmphy_write(hw,PHY_CONTROL,regval); ++ regval = bcmphy_read(hw,PHY_CONTROL); ++ regval &= ~(MII_CR_POWER_DOWN | MII_CR_ISOLATE); ++ bcmphy_write(hw, PHY_CONTROL, regval); + + /* disable suport I */ + /*0000 0100 1100 0010 */ -+ bcm54xx_auxctl_write(hw,0,0x04c2); ++ bcm54xx_auxctl_write(hw, 0, 0x04c2); + -+ regval=bcmphy_read(hw,MII_BCM54XX_AUX_CTL); ++ regval = bcmphy_read(hw, MII_BCM54XX_AUX_CTL); + + /* set 1000base-T */ -+ regval=bcmphy_read(hw,PHY_1000T_CTRL); -+ regval |=CR_1000T_FD_CAPS | CR_1000T_REPEATER_DTE; -+ bcmphy_write(hw,PHY_1000T_CTRL,regval); ++ regval = bcmphy_read(hw, PHY_1000T_CTRL); ++ regval |= (CR_1000T_FD_CAPS | CR_1000T_REPEATER_DTE); ++ bcmphy_write(hw, PHY_1000T_CTRL, regval); + + /* set ctrl */ -+ regval= MII_CR_SPEED_1000|MII_CR_FULL_DUPLEX|MII_CR_SPEED_SELECT_MSB; -+ bcmphy_write(hw,PHY_CONTROL,regval); -+ ++ regval = (MII_CR_SPEED_1000 | ++ MII_CR_FULL_DUPLEX | ++ MII_CR_SPEED_SELECT_MSB); ++ bcmphy_write(hw, PHY_CONTROL, regval); + + /* Setup read from auxilary control shadow register 7 */ -+ bcmphy_write(hw, MII_BCM54XX_AUX_CTL,MII_BCM54XX_AUX_CTL_ENCODE(7)); -+ ++ bcmphy_write(hw, MII_BCM54XX_AUX_CTL, MII_BCM54XX_AUX_CTL_ENCODE(7)); ++ + /* Read Misc Control register */ -+ reg = (bcmphy_read(hw, MII_BCM54XX_AUX_CTL) & 0x8FFF) | 0x8010; ++ reg = ((bcmphy_read(hw, MII_BCM54XX_AUX_CTL) & 0x8FFF) | 0x8010); + bcmphy_write(hw, MII_BCM54XX_AUX_CTL, reg); -+ ++ + /* Enable auto-detect and copper prefer */ -+ bcm54xx_shadow_write(hw,BCM54XX_SHD_AUTODETECT,0x31); ++ bcm54xx_shadow_write(hw, BCM54XX_SHD_AUTODETECT, 0x31); + + err = bcm54xx_config_init(hw); + + /* set link parner */ -+ regval = MII_ANA_ASF_802_3; ++ regval = MII_ANA_ASF_802_3; + regval |= MII_ANA_HD_10; + regval |= MII_ANA_HD_100; + regval |= MII_ANA_FD_10; + regval |= MII_ANA_FD_100; + regval |= MII_ANA_ASYM_PAUSE; -+ regval |= MII_ANA_PAUSE | MII_ANA_ASYM_PAUSE; ++ regval |= (MII_ANA_PAUSE | MII_ANA_ASYM_PAUSE); + regval |= MII_ANA_PAUSE; + bcmphy_write(hw, PHY_AUTONEG_ADV, reg); -+ ++ + i=0; + while (1) { + regval = bcm54xx_shadow_read(hw,BCM54XX_SHD_MODE); -+ if(regval & BCM54XX_SHD_MODE_SER) ++ if (regval & BCM54XX_SHD_MODE_SER) + break; + if (i++ > 500) { + //printk("SERDES no link %x\n",regval); @@ -357,19 +207,18 @@ diff -Nu a/drivers/net/ethernet/intel/igb/bcm_phy.c b/drivers/net/ethernet/intel + mdelay(1); /* 1 ms */ + } + return err; -+ } -+ ++} diff -Nu a/drivers/net/ethernet/intel/igb/e1000_82575.c b/drivers/net/ethernet/intel/igb/e1000_82575.c ---- a/drivers/net/ethernet/intel/igb/e1000_82575.c 2017-05-09 23:52:56.728565000 -0700 -+++ b/drivers/net/ethernet/intel/igb/e1000_82575.c 2017-05-10 01:58:36.796075944 -0700 +--- a/drivers/net/ethernet/intel/igb/e1000_82575.c 2017-06-20 16:44:29.000000000 +0800 ++++ b/drivers/net/ethernet/intel/igb/e1000_82575.c 2017-06-20 17:00:52.000000000 +0800 @@ -317,6 +317,10 @@ break; case BCM54616_E_PHY_ID: phy->type = e1000_phy_bcm54616; -+ //phy->ops.check_polarity = e1000_check_polarity_bcm; -+ phy->ops.get_info = igb_get_phy_info_bcm; ++ phy->ops.check_polarity = NULL; ++ phy->ops.get_info = igb_get_phy_info_bcm; + phy->ops.force_speed_duplex = igb_phy_force_speed_duplex_bcm; -+ bcm54616_config_init(hw); ++ bcm54616s_config_init(hw); break; case BCM50210S_E_PHY_ID: break; @@ -382,32 +231,20 @@ diff -Nu a/drivers/net/ethernet/intel/igb/e1000_82575.c b/drivers/net/ethernet/i case e1000_phy_bcm5461s: break; diff -Nu a/drivers/net/ethernet/intel/igb/e1000_82575.h b/drivers/net/ethernet/intel/igb/e1000_82575.h ---- a/drivers/net/ethernet/intel/igb/e1000_82575.h 2017-05-09 23:52:56.608565000 -0700 -+++ b/drivers/net/ethernet/intel/igb/e1000_82575.h 2017-01-12 01:49:16.214072900 -0800 +--- a/drivers/net/ethernet/intel/igb/e1000_82575.h 2017-06-20 16:44:27.000000000 +0800 ++++ b/drivers/net/ethernet/intel/igb/e1000_82575.h 2017-06-20 17:00:57.000000000 +0800 @@ -25,6 +25,8 @@ #ifndef _E1000_82575_H_ #define _E1000_82575_H_ +extern void bcm54616s_linkup(struct e1000_hw *hw,int speed , int duplex); -+extern int bcm54616_config_init(struct e1000_hw *hw); ++extern int bcm54616s_config_init(struct e1000_hw *hw); #define ID_LED_DEFAULT_82575_SERDES ((ID_LED_DEF1_DEF2 << 12) | \ (ID_LED_DEF1_DEF2 << 8) | \ (ID_LED_DEF1_DEF2 << 4) | \ -diff -Nu a/drivers/net/ethernet/intel/igb/e1000_defines.h b/drivers/net/ethernet/intel/igb/e1000_defines.h ---- a/drivers/net/ethernet/intel/igb/e1000_defines.h 2017-05-09 23:52:56.732565000 -0700 -+++ b/drivers/net/ethernet/intel/igb/e1000_defines.h 2017-05-10 01:57:15.622221274 -0700 -@@ -1186,7 +1186,7 @@ - #define IGP04E1000_E_PHY_ID 0x02A80391 - #define BCM54616_E_PHY_ID 0x3625D10 - #define BCM5461S_PHY_ID 0x002060C0 --#define M88_VENDOR 0x0141 -+#define M88_VENDOR 0x0141 - #define BCM50210S_E_PHY_ID 0x600d8590 - - /* M88E1000 Specific Registers */ diff -Nu a/drivers/net/ethernet/intel/igb/e1000_phy.c b/drivers/net/ethernet/intel/igb/e1000_phy.c ---- a/drivers/net/ethernet/intel/igb/e1000_phy.c 2017-05-09 23:52:56.672565000 -0700 -+++ b/drivers/net/ethernet/intel/igb/e1000_phy.c 2017-01-12 01:57:04.376530600 -0800 +--- a/drivers/net/ethernet/intel/igb/e1000_phy.c 2017-06-20 16:44:27.000000000 +0800 ++++ b/drivers/net/ethernet/intel/igb/e1000_phy.c 2017-06-20 17:01:05.000000000 +0800 @@ -1187,6 +1187,19 @@ return E1000_SUCCESS; } @@ -419,9 +256,9 @@ diff -Nu a/drivers/net/ethernet/intel/igb/e1000_phy.c b/drivers/net/ethernet/int + u16 phy_data; + + ret_val = phy->ops.read_reg(hw, PHY_CONTROL, &phy_data); -+ phy_data &=~(MII_CR_ISOLATE); ++ phy_data &= ~(MII_CR_ISOLATE); + ret_val = phy->ops.write_reg(hw, PHY_CONTROL, phy_data); -+ ++ + return 0; +} + @@ -445,15 +282,15 @@ diff -Nu a/drivers/net/ethernet/intel/igb/e1000_phy.c b/drivers/net/ethernet/int + + e1000_phy_force_speed_duplex_setup(hw, &phy_data); + -+ phy_data &=~(MII_CR_POWER_DOWN|MII_CR_ISOLATE); ++ phy_data &= ~(MII_CR_POWER_DOWN | MII_CR_ISOLATE); + ret_val = phy->ops.write_reg(hw, PHY_CONTROL, phy_data); + if (ret_val) + return ret_val; + + /* Clear Auto-Crossover to force MDI manually. IGP requires MDI -+ * forced whenever speed and duplex are forced. -+ */ -+ #if 0 ++ * forced whenever speed and duplex are forced. ++ */ ++ #if 0 + ret_val = phy->ops.read_reg(hw, IGP01E1000_PHY_PORT_CTRL, &phy_data); + if (ret_val) + return ret_val; @@ -466,7 +303,7 @@ diff -Nu a/drivers/net/ethernet/intel/igb/e1000_phy.c b/drivers/net/ethernet/int + return ret_val; + + hw_dbg("IGP PSCR: %X\n", phy_data); -+ #endif ++ #endif + udelay(1); + + if (phy->autoneg_wait_to_complete) { @@ -491,41 +328,16 @@ diff -Nu a/drivers/net/ethernet/intel/igb/e1000_phy.c b/drivers/net/ethernet/int /** * e1000_phy_force_speed_duplex_m88 - Force speed/duplex for m88 PHY * @hw: pointer to the HW structure -@@ -2146,6 +2215,25 @@ - return ret_val; - } +@@ -2614,6 +2683,29 @@ + } -+s32 e1000_check_polarity_bcm(struct e1000_hw *hw) -+{ -+ struct e1000_phy_info *phy = &hw->phy; -+ s32 ret_val; -+ u16 data; -+ -+ #if 0 -+ ret_val = phy->ops.read_reg(hw, M88E1000_PHY_SPEC_STATUS, &data); -+ -+ if (!ret_val) -+ phy->cable_polarity = ((data & M88E1000_PSSR_REV_POLARITY) -+ ? e1000_rev_polarity_reversed -+ : e1000_rev_polarity_normal); -+ #endif -+ ret_val=0; -+ phy->cable_polarity =e1000_rev_polarity_normal; -+ return ret_val; + return ret_val; +} + - /** - * igb_e1000_check_polarity_igp - Checks the polarity. - * @hw: pointer to the HW structure -@@ -2616,6 +2704,38 @@ - return ret_val; - } - +s32 igb_get_phy_info_bcm(struct e1000_hw *hw) +{ + struct e1000_phy_info *phy = &hw->phy; -+ s32 ret_val; -+ u16 phy_data; ++ s32 ret_val; + bool link; + + if (phy->media_type != e1000_media_type_copper) { @@ -542,28 +354,17 @@ diff -Nu a/drivers/net/ethernet/intel/igb/e1000_phy.c b/drivers/net/ethernet/int + return -E1000_ERR_CONFIG; + } + -+ #if 0 -+ phy->polarity_correction =true; -+ phy->is_mdix = true; -+ phy->cable_length = E1000_CABLE_LENGTH_UNDEFINED; -+ phy->local_rx = e1000_1000t_rx_status_undefined; -+ phy->remote_rx = e1000_1000t_rx_status_undefined; -+ ret_val=0; -+ #endif + return ret_val; -+} -+ + } + /** - * e1000_get_phy_info_igp - Retrieve igp PHY information - * @hw: pointer to the HW structure diff -Nu a/drivers/net/ethernet/intel/igb/e1000_phy.h b/drivers/net/ethernet/intel/igb/e1000_phy.h ---- a/drivers/net/ethernet/intel/igb/e1000_phy.h 2017-05-09 23:52:56.672565000 -0700 -+++ b/drivers/net/ethernet/intel/igb/e1000_phy.h 2017-01-12 01:58:07.074761900 -0800 -@@ -99,6 +99,10 @@ +--- a/drivers/net/ethernet/intel/igb/e1000_phy.h 2017-06-20 16:44:27.000000000 +0800 ++++ b/drivers/net/ethernet/intel/igb/e1000_phy.h 2017-06-20 17:01:24.000000000 +0800 +@@ -99,6 +99,9 @@ s32 e1000_write_phy_reg_mphy(struct e1000_hw *hw, u32 address, u32 data, bool line_override); bool e1000_is_mphy_ready(struct e1000_hw *hw); -+s32 igb_check_polarity_bcm(struct e1000_hw *hw); +s32 igb_copper_link_setup_bcm(struct e1000_hw *hw); +s32 igb_phy_force_speed_duplex_bcm(struct e1000_hw *hw); +s32 igb_get_phy_info_bcm(struct e1000_hw *hw); @@ -571,8 +372,8 @@ diff -Nu a/drivers/net/ethernet/intel/igb/e1000_phy.h b/drivers/net/ethernet/int #define E1000_MAX_PHY_ADDR 8 diff -Nu a/drivers/net/ethernet/intel/igb/igb_main.c b/drivers/net/ethernet/intel/igb/igb_main.c ---- a/drivers/net/ethernet/intel/igb/igb_main.c 2017-05-09 23:52:56.676565000 -0700 -+++ b/drivers/net/ethernet/intel/igb/igb_main.c 2017-01-12 02:04:11.728846300 -0800 +--- a/drivers/net/ethernet/intel/igb/igb_main.c 2017-06-20 16:44:27.000000000 +0800 ++++ b/drivers/net/ethernet/intel/igb/igb_main.c 2017-06-20 17:01:29.000000000 +0800 @@ -4814,6 +4814,14 @@ &adapter->link_speed, &adapter->link_duplex); @@ -589,8 +390,8 @@ diff -Nu a/drivers/net/ethernet/intel/igb/igb_main.c b/drivers/net/ethernet/inte /* Links status message must follow this format */ netdev_info(netdev, diff -Nu a/drivers/net/ethernet/intel/igb/Makefile b/drivers/net/ethernet/intel/igb/Makefile ---- a/drivers/net/ethernet/intel/igb/Makefile 2017-05-09 23:52:56.600565000 -0700 -+++ b/drivers/net/ethernet/intel/igb/Makefile 2017-01-12 02:06:51.790832900 -0800 +--- a/drivers/net/ethernet/intel/igb/Makefile 2017-06-20 16:44:27.000000000 +0800 ++++ b/drivers/net/ethernet/intel/igb/Makefile 2017-06-20 17:01:34.000000000 +0800 @@ -35,4 +35,4 @@ e1000_mac.o e1000_nvm.o e1000_phy.o e1000_mbx.o \ e1000_i210.o igb_ptp.o igb_hwmon.o \ From 04fef7c05e86a6ce69cc64370471ec34318eba55 Mon Sep 17 00:00:00 2001 From: Dave Hu Date: Wed, 28 Jun 2017 10:50:50 -0400 Subject: [PATCH 06/10] debug the onlp code for ag7648 in github --- .../onlp/builds/src/module/src/debug.c | 1 - .../onlp/builds/src/module/src/platform_lib.c | 88 -------- .../onlp/builds/src/module/src/sfpi.c | 2 +- .../onlp/builds/src/module/src/sysi.c | 25 ++- .../onlp/builds/src/module/src/thermali.c | 20 +- .../builds/src/module/src/x86_64_delta_i2c.c | 180 +-------------- .../builds/src/module/src/x86_64_delta_i2c.h | 4 +- .../src/module/src/x86_64_delta_i2c_dev.h | 209 ------------------ 8 files changed, 34 insertions(+), 495 deletions(-) mode change 100644 => 100755 packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/debug.c mode change 100644 => 100755 packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/thermali.c delete mode 100755 packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/x86_64_delta_i2c_dev.h diff --git a/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/debug.c b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/debug.c old mode 100644 new mode 100755 index 67c752f2..d7ebd68c --- a/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/debug.c +++ b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/debug.c @@ -1,4 +1,3 @@ -#include "x86_64_delta_ag7648_int.h" #if X86_64_DELTA_AG7648_CONFIG_INCLUDE_DEBUG == 1 diff --git a/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/platform_lib.c b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/platform_lib.c index 7b19805b..2f92e207 100755 --- a/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/platform_lib.c +++ b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/platform_lib.c @@ -33,94 +33,6 @@ #include #include "platform_lib.h" -int deviceNodeWrite(char *filename, char *buffer, int buf_size, int data_len) -{ - int fd; - int len; - - if ((buffer == NULL) || (buf_size < 0)) { - return -1; - } - - if ((fd = open(filename, O_WRONLY, S_IWUSR)) == -1) { - return -1; - } - - if ((len = write(fd, buffer, buf_size)) < 0) { - close(fd); - return -1; - } - - if ((close(fd) == -1)) { - return -1; - } - - if ((len > buf_size) || (data_len != 0 && len != data_len)) { - return -1; - } - - return 0; -} - -int deviceNodeWriteInt(char *filename, int value, int data_len) -{ - char buf[8] = {0}; - sprintf(buf, "%d", value); - - return deviceNodeWrite(filename, buf, sizeof(buf)-1, data_len); -} - -int deviceNodeReadBinary(char *filename, char *buffer, int buf_size, int data_len) - { - int fd; - int len; - - if ((buffer == NULL) || (buf_size < 0)) { - return -1; - } - - if ((fd = open(filename, O_RDONLY)) == -1) { - return -1; - } - - if ((len = read(fd, buffer, buf_size)) < 0) { - close(fd); - return -1; - } - - if ((close(fd) == -1)) { - return -1; - } - - if ((len > buf_size) || (data_len != 0 && len != data_len)) { - return -1; - } - - return 0; -} - -int deviceNodeReadString(char *filename, char *buffer, int buf_size, int data_len) -{ - int ret; - - if (data_len >= buf_size || data_len < 0) { - return -1; - } - - ret = deviceNodeReadBinary(filename, buffer, buf_size-1, data_len); - - if (ret == 0) { - if (data_len) { - buffer[data_len] = '\0'; - } - else { - buffer[buf_size-1] = '\0'; - } - } - - return ret; -} - #define I2C_PSU_MODEL_NAME_LEN 13 psu_type_t get_psu_type(int id, char* modelname, int modelname_len) diff --git a/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/sfpi.c b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/sfpi.c index 714c6f7c..a1b2debd 100755 --- a/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/sfpi.c +++ b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/sfpi.c @@ -332,7 +332,7 @@ onlp_sfpi_eeprom_read(int port, uint8_t data[256]) else sprintf(sfp_name, "QSFP%d", port); for(i=0;i<8;i++){ - if (i2c_devname_read_block(sfp_name, (32*i), (char*)(data+32*i), 32) < 0) + if (i2c_devname_read_block(sfp_name, (32*i), (uint8_t*)(data+32*i), 32) < 0) { AIM_LOG_ERROR("Unable to read the port %d eeprom\r\n", port); return ONLP_STATUS_E_INTERNAL; diff --git a/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/sysi.c b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/sysi.c index c745b982..7c4ca2ee 100755 --- a/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/sysi.c +++ b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/sysi.c @@ -78,15 +78,16 @@ onlp_sysi_platform_info_get(onlp_platform_info_t* pi) int onlp_sysi_onie_data_get(uint8_t** data, int* size) { - + int i,re_cnt; uint8_t* rdata = aim_zmalloc(256); - - int i,re_cnt; - + if(!rdata){ + AIM_LOG_ERROR("Unable to malloc memory \r\n"); + return ONLP_STATUS_E_INTERNAL; + } for(i=0;i<8;i++){ re_cnt=3; while(re_cnt){ - if (i2c_devname_read_block("ID_EEPROM", i * 32, (char *)(rdata + i * 32), 32) < 0) + if (i2c_devname_read_block("ID_EEPROM", i * 32, (rdata + i * 32), 32) < 0) { re_cnt--; continue; @@ -95,11 +96,11 @@ onlp_sysi_onie_data_get(uint8_t** data, int* size) } if(re_cnt==0){ AIM_LOG_ERROR("Unable to read the %d reg \r\n",i); - return ONLP_STATUS_E_INTERNAL; + break; } } - + *data = rdata; return ONLP_STATUS_OK; @@ -144,6 +145,16 @@ onlp_sysi_oids_get(onlp_oid_t* table, int max) return 0; } +int +onlp_sysi_onie_info_get(onlp_onie_info_t* onie) +{ + if(onie){ + onie->platform_name = aim_strdup(ONIE_PLATFORM_NAME); + } + return ONLP_STATUS_OK; +} + + int onlp_sysi_platform_manage_fans(void) diff --git a/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/thermali.c b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/thermali.c old mode 100644 new mode 100755 index 69d353f2..c11239ff --- a/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/thermali.c +++ b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/thermali.c @@ -41,17 +41,6 @@ } \ } while(0) -#define OPEN_READ_FILE(fd,fullpath,data,nbytes,len) \ - DEBUG_PRINT("[Debug][%s][%d][openfile: %s]\n", __FUNCTION__, __LINE__, fullpath); \ - if ((fd = open(fullpath, O_RDONLY)) == -1) \ - return ONLP_STATUS_E_INTERNAL; \ - if ((len = read(fd, r_data, nbytes)) <= 0){ \ - close(fd); \ - return ONLP_STATUS_E_INTERNAL;} \ - DEBUG_PRINT("[Debug][%s][%d][read data: %s]\n", __FUNCTION__, __LINE__, r_data); \ - if (close(fd) == -1) \ - return ONLP_STATUS_E_INTERNAL - enum onlp_thermal_id { THERMAL_RESERVED = 0, @@ -125,8 +114,8 @@ onlp_thermali_init(void) int onlp_thermali_info_get(onlp_oid_t id, onlp_thermal_info_t* info) { - int fd, len, nbytes = 10, temp_base=1, local_id; - char r_data[10] = {0}; + int len, nbytes = 10, temp_base=1, local_id; + uint8_t r_data[10]={0}; char fullpath[50] = {0}; VALIDATE(id); @@ -139,9 +128,10 @@ onlp_thermali_info_get(onlp_oid_t id, onlp_thermal_info_t* info) /* get fullpath */ sprintf(fullpath, "%s%s", prefix_path, last_path[local_id]); - OPEN_READ_FILE(fd, fullpath, r_data, nbytes, len); + //OPEN_READ_FILE(fd, fullpath, r_data, nbytes, len); + onlp_file_read(r_data,nbytes,&len, fullpath); - info->mcelsius = atoi(r_data) / temp_base; + info->mcelsius =ONLPLIB_ATOI((char*)r_data) / temp_base; DEBUG_PRINT("\n[Debug][%s][%d][save data: %d]\n", __FUNCTION__, __LINE__, info->mcelsius); diff --git a/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/x86_64_delta_i2c.c b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/x86_64_delta_i2c.c index b3c4ce71..b86c39e4 100755 --- a/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/x86_64_delta_i2c.c +++ b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/x86_64_delta_i2c.c @@ -33,8 +33,7 @@ #include #include "x86_64_delta_ag7648_log.h" #include "x86_64_delta_i2c.h" -#include "x86_64_delta_i2c_dev.h" - +#include struct i2c_device_info i2c_device_list[]={ {"RTC",0X0,0X69}, {"TMP1_CLOSE_TO_CPU",0X2,0X4d}, @@ -119,6 +118,7 @@ struct i2c_device_info i2c_device_list[]={ #define I2C_DATA_C 3 #define I2C_DATA_QUICK 4 +uint32_t i2c_flag=ONLP_I2C_F_FORCE; static pthread_mutex_t i2c_mutex = PTHREAD_MUTEX_INITIALIZER; @@ -132,153 +132,6 @@ void I2C_UNPROTECT (void) pthread_mutex_unlock (&i2c_mutex); } -static int open_i2cbus_dev(int i2cbus, char *filename, int quiet) -{ - int file; - - sprintf(filename, "/dev/i2c-%d", i2cbus); - file = open(filename, O_RDWR); - - if (file < 0 && !quiet) { - if (errno == ENOENT) { - fprintf(stderr, "Error: Could not open file " - "`/dev/i2c-%d: %s'\n",i2cbus, strerror(ENOENT)); - } else { - fprintf(stderr, "Error: Could not open file " - "`%s': %s\n", filename, strerror(errno)); - if (errno == EACCES) - fprintf(stderr, "Run as root?\n"); - } - } - - return file; -} - -static int set_slave_addr(int file, int address, int force) -{ - /* hack */ - force = 1; /* force always, it will break th i2c driver's behave */ - - - /* With force, let the user read from/write to the registers - even when a driver is also running */ - if (ioctl(file, force ? I2C_SLAVE_FORCE : I2C_SLAVE, address) < 0) { - if (errno != EBUSY) { - fprintf(stderr, - "Error: Could not set address to 0x%02x: %s\n", - address, strerror(errno)); - return -errno; - } - } - - return 0; -} - -static int i2c_dev_read (int i2cbus, int dev, int reg, int mode) -{ - int file; - char filename[20]; - int force = 0; - int res = 0; - - file = open_i2cbus_dev(i2cbus, filename, 0); - if (file < 0) return -1; - - if (set_slave_addr(file, dev, force))return -1; - - switch (mode) { - case I2C_DATA_W: - res = i2c_smbus_read_word_data(file, reg); - break; - case I2C_DATA_C: - if (reg >= 0) { - res = i2c_smbus_write_byte(file, reg); - if (res < 0) break; - } - res = i2c_smbus_read_byte(file); - break; - default: - res = i2c_smbus_read_byte_data(file, reg); - break; - } - close(file); - - return res; -} - -static int i2c_dev_write (int i2cbus, int dev, int reg, int value, int mode) -{ - int file; - char filename[20]; - int force = 0; - int res = 0; - - file = open_i2cbus_dev(i2cbus, filename, 0); - if (file < 0) return -1; - - if (set_slave_addr(file, dev, force)) return -1; - - switch (mode) { - case I2C_DATA_W: - res = i2c_smbus_write_word_data(file, reg, value); - break; - case I2C_DATA_C: - res = i2c_smbus_write_byte (file, reg); - break; - case I2C_DATA_QUICK: - res = i2c_smbus_write_quick(file, I2C_SMBUS_WRITE); - break; - default: - res = i2c_smbus_write_byte_data(file, reg, value); - break; - - } - close(file); - usleep (5000); - - return res; -} - -static int i2c_block_read (int i2cbus, int dev, int reg, char *buff, int buff_len) -{ - int file; - char filename[20]; - int force = 0; - int res = 0; - - file = open_i2cbus_dev(i2cbus, filename, 0); - - if (file < 0) return -1; - - if (set_slave_addr(file, dev, force)) return -1; - - res = i2c_smbus_read_i2c_block_data (file, reg, buff_len, (__u8 *)buff); - - close(file); - - return res; -} - -static int i2c_block_write (int i2cbus, int dev, int reg, char *buff, int buff_len) -{ - int file; - char filename[20]; - int force = 0; - int res = 0; - - file = open_i2cbus_dev(i2cbus, filename, 0); - - if (file < 0) return -1; - - if (set_slave_addr(file, dev, force)) return -1; - - res = i2c_smbus_write_i2c_block_data (file, reg, buff_len, (__u8 *)buff); - - close(file); - - return res; -} - i2c_device_info_t *i2c_dev_find_by_name (char *name) { i2c_device_info_t *i2c_dev = i2c_device_list; @@ -304,7 +157,7 @@ int i2c_devname_read_byte (char *name, int reg) I2C_PROTECT(); - ret=i2c_dev_read (i2c_dev->i2cbus, i2c_dev->addr, reg, I2C_DATA_B); + ret=onlp_i2c_readb(i2c_dev->i2cbus, i2c_dev->addr, reg, i2c_flag); I2C_UNPROTECT(); @@ -320,7 +173,7 @@ int i2c_devname_write_byte (char *name, int reg, int value) I2C_PROTECT(); - ret=i2c_dev_write (i2c_dev->i2cbus, i2c_dev->addr, reg, value, I2C_DATA_B); + ret=onlp_i2c_writeb (i2c_dev->i2cbus, i2c_dev->addr, reg, value, i2c_flag); I2C_UNPROTECT(); @@ -336,7 +189,7 @@ int i2c_devname_read_word (char *name, int reg) I2C_PROTECT(); - ret=i2c_dev_read (i2c_dev->i2cbus, i2c_dev->addr, reg, I2C_DATA_W); + ret=onlp_i2c_readw(i2c_dev->i2cbus, i2c_dev->addr, reg, i2c_flag); I2C_UNPROTECT(); @@ -352,14 +205,14 @@ int i2c_devname_write_word (char *name, int reg, int value) I2C_PROTECT(); - ret=i2c_dev_write (i2c_dev->i2cbus, i2c_dev->addr, reg, value, I2C_DATA_W); + ret=onlp_i2c_writew (i2c_dev->i2cbus, i2c_dev->addr, reg, value, i2c_flag); I2C_UNPROTECT(); return ret; } -int i2c_devname_read_block (char *name, int reg, char *buff, int buff_size) +int i2c_devname_read_block (char *name, int reg, uint8_t*buff, int buff_size) { int ret = -1; @@ -369,7 +222,7 @@ int i2c_devname_read_block (char *name, int reg, char *buff, int buff_size) I2C_PROTECT(); - ret = i2c_block_read (i2c_dev->i2cbus, i2c_dev->addr, reg, buff, buff_size); + ret =onlp_i2c_block_read (i2c_dev->i2cbus, i2c_dev->addr, reg, buff_size, buff, i2c_flag); I2C_UNPROTECT(); @@ -377,20 +230,3 @@ int i2c_devname_read_block (char *name, int reg, char *buff, int buff_size) } -int i2c_devname_write_block (char *name, int reg, char *buff, int buff_size) -{ - int ret = -1; - - i2c_device_info_t *i2c_dev = i2c_dev_find_by_name (name); - - if(i2c_dev==NULL) return -1; - - I2C_PROTECT(); - - ret = i2c_block_write (i2c_dev->i2cbus, i2c_dev->addr, reg, buff, buff_size); - - I2C_UNPROTECT(); - - return ret; - -} diff --git a/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/x86_64_delta_i2c.h b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/x86_64_delta_i2c.h index e7eb1606..102345d6 100755 --- a/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/x86_64_delta_i2c.h +++ b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/x86_64_delta_i2c.h @@ -49,7 +49,7 @@ extern int i2c_devname_read_word(char *name, int reg); extern int i2c_devname_write_word(char *name, int reg, int value); -extern int i2c_devname_read_block (char *name, int reg, char *buff, int buff_size); -extern int i2c_devname_write_block(char *name, int reg, char *buff, int buff_size); +extern int i2c_devname_read_block (char *name, int reg, uint8_t*buff, int buff_size); +//extern int i2c_devname_write_block(char *name, int reg, char *buff, int buff_size); #endif diff --git a/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/x86_64_delta_i2c_dev.h b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/x86_64_delta_i2c_dev.h deleted file mode 100755 index 35eca381..00000000 --- a/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/x86_64_delta_i2c_dev.h +++ /dev/null @@ -1,209 +0,0 @@ -/************************************************************ - * - * - * Copyright 2014, 2015 Big Switch Networks, Inc. - * Copyright 2016 Accton Technology Corporation. - * Copyright 2017 Delta Networks, Inc - * Licensed under the Eclipse Public License, Version 1.0 (the - * "License"); you may not use this file except in compliance - * with the License. You may obtain a copy of the License at - * - * http://www.eclipse.org/legal/epl-v10.html - * - * Unless required by applicable law or agreed to in writing, - * software distributed under the License is distributed on an - * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, - * either express or implied. See the License for the specific - * language governing permissions and limitations under the - * License. - * - * - ************************************************************/ - -#ifndef __X86_64_DELTA_I2C_DEV_H__ -#define __X86_64_DELTA_I2C_DEV_H__ - - -#include -#include -#include "x86_64_delta_ag7648_log.h" - -/* -- i2c.h -- */ - -//#include -#include -#if 0 -static inline __s32 i2c_smbus_access(int file, char read_write, __u8 command, - int size, union i2c_smbus_data *data) -{ - struct i2c_smbus_ioctl_data args; - - args.read_write = read_write; - args.command = command; - args.size = size; - args.data = data; - return ioctl(file,I2C_SMBUS,&args); -} - - -static inline __s32 i2c_smbus_write_quick(int file, __u8 value) -{ - return i2c_smbus_access(file,value,0,I2C_SMBUS_QUICK,NULL); -} - -static inline __s32 i2c_smbus_read_byte(int file) -{ - union i2c_smbus_data data; - if (i2c_smbus_access(file,I2C_SMBUS_READ,0,I2C_SMBUS_BYTE,&data)) - return -1; - else - return 0x0FF & data.byte; -} - -static inline __s32 i2c_smbus_write_byte(int file, __u8 value) -{ - return i2c_smbus_access(file,I2C_SMBUS_WRITE,value, - I2C_SMBUS_BYTE,NULL); -} - -static inline __s32 i2c_smbus_read_byte_data(int file, __u8 command) -{ - union i2c_smbus_data data; - if (i2c_smbus_access(file,I2C_SMBUS_READ,command, - I2C_SMBUS_BYTE_DATA,&data)) - return -1; - else - return 0x0FF & data.byte; -} - -static inline __s32 i2c_smbus_write_byte_data(int file, __u8 command, - __u8 value) -{ - union i2c_smbus_data data; - data.byte = value; - return i2c_smbus_access(file,I2C_SMBUS_WRITE,command, - I2C_SMBUS_BYTE_DATA, &data); -} - -static inline __s32 i2c_smbus_read_word_data(int file, __u8 command) -{ - union i2c_smbus_data data; - if (i2c_smbus_access(file,I2C_SMBUS_READ,command, - I2C_SMBUS_WORD_DATA,&data)) - return -1; - else - return 0x0FFFF & data.word; -} - -static inline __s32 i2c_smbus_write_word_data(int file, __u8 command, - __u16 value) -{ - union i2c_smbus_data data; - data.word = value; - return i2c_smbus_access(file,I2C_SMBUS_WRITE,command, - I2C_SMBUS_WORD_DATA, &data); -} - -static inline __s32 i2c_smbus_process_call(int file, __u8 command, __u16 value) -{ - union i2c_smbus_data data; - data.word = value; - if (i2c_smbus_access(file,I2C_SMBUS_WRITE,command, - I2C_SMBUS_PROC_CALL,&data)) - return -1; - else - return 0x0FFFF & data.word; -} - - -/* Returns the number of read bytes */ -static inline __s32 i2c_smbus_read_block_data(int file, __u8 command, - __u8 *values) -{ - union i2c_smbus_data data; - int i; - if (i2c_smbus_access(file,I2C_SMBUS_READ,command, - I2C_SMBUS_BLOCK_DATA,&data)) - return -1; - else { - for (i = 1; i <= data.block[0]; i++) - values[i-1] = data.block[i]; - return data.block[0]; - } -} - -static inline __s32 i2c_smbus_write_block_data(int file, __u8 command, - __u8 length, const __u8 *values) -{ - union i2c_smbus_data data; - int i; - if (length > 32) - length = 32; - for (i = 1; i <= length; i++) - data.block[i] = values[i-1]; - data.block[0] = length; - return i2c_smbus_access(file,I2C_SMBUS_WRITE,command, - I2C_SMBUS_BLOCK_DATA, &data); -} - -/* Returns the number of read bytes */ -/* Until kernel 2.6.22, the length is hardcoded to 32 bytes. If you - ask for less than 32 bytes, your code will only work with kernels - 2.6.23 and later. */ -static inline __s32 i2c_smbus_read_i2c_block_data(int file, __u8 command, - __u8 length, __u8 *values) -{ - union i2c_smbus_data data; - int i; - - if (length > 32) - length = 32; - data.block[0] = length; - if (i2c_smbus_access(file,I2C_SMBUS_READ,command, - length == 32 ? I2C_SMBUS_I2C_BLOCK_BROKEN : - I2C_SMBUS_I2C_BLOCK_DATA,&data)) - return -1; - else { - for (i = 1; i <= data.block[0]; i++) - values[i-1] = data.block[i]; - return data.block[0]; - } -} - -static inline __s32 i2c_smbus_write_i2c_block_data(int file, __u8 command, - __u8 length, - const __u8 *values) -{ - union i2c_smbus_data data; - int i; - if (length > 32) - length = 32; - for (i = 1; i <= length; i++) - data.block[i] = values[i-1]; - data.block[0] = length; - return i2c_smbus_access(file,I2C_SMBUS_WRITE,command, - I2C_SMBUS_I2C_BLOCK_BROKEN, &data); -} - -/* Returns the number of read bytes */ -static inline __s32 i2c_smbus_block_process_call(int file, __u8 command, - __u8 length, __u8 *values) -{ - union i2c_smbus_data data; - int i; - if (length > 32) - length = 32; - for (i = 1; i <= length; i++) - data.block[i] = values[i-1]; - data.block[0] = length; - if (i2c_smbus_access(file,I2C_SMBUS_WRITE,command, - I2C_SMBUS_BLOCK_PROC_CALL,&data)) - return -1; - else { - for (i = 1; i <= data.block[0]; i++) - values[i-1] = data.block[i]; - return data.block[0]; - } -} -#endif -#endif From 6ed1fae68c7d0f2fc4238edd76ba12cc11e68df9 Mon Sep 17 00:00:00 2001 From: Dave Hu Date: Mon, 3 Jul 2017 10:02:27 -0400 Subject: [PATCH 07/10] modify i2c and python file for ag7648 github --- .../builds/src/module/src/x86_64_delta_i2c.c | 28 ------------------- .../python/x86_64_delta_ag7648_r0/__init__.py | 4 +-- 2 files changed, 1 insertion(+), 31 deletions(-) diff --git a/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/x86_64_delta_i2c.c b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/x86_64_delta_i2c.c index b86c39e4..12c9c9a4 100755 --- a/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/x86_64_delta_i2c.c +++ b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/onlp/builds/src/module/src/x86_64_delta_i2c.c @@ -113,25 +113,8 @@ struct i2c_device_info i2c_device_list[]={ {NULL, -1,-1}, }; -#define I2C_DATA_B 1 -#define I2C_DATA_W 2 -#define I2C_DATA_C 3 -#define I2C_DATA_QUICK 4 - uint32_t i2c_flag=ONLP_I2C_F_FORCE; -static pthread_mutex_t i2c_mutex = PTHREAD_MUTEX_INITIALIZER; - -void I2C_PROTECT (void) -{ - pthread_mutex_lock (&i2c_mutex); -} - -void I2C_UNPROTECT (void) -{ - pthread_mutex_unlock (&i2c_mutex); -} - i2c_device_info_t *i2c_dev_find_by_name (char *name) { i2c_device_info_t *i2c_dev = i2c_device_list; @@ -155,11 +138,9 @@ int i2c_devname_read_byte (char *name, int reg) if(i2c_dev==NULL) return -1; - I2C_PROTECT(); ret=onlp_i2c_readb(i2c_dev->i2cbus, i2c_dev->addr, reg, i2c_flag); - I2C_UNPROTECT(); return ret; } @@ -171,11 +152,9 @@ int i2c_devname_write_byte (char *name, int reg, int value) if(i2c_dev==NULL) return -1; - I2C_PROTECT(); ret=onlp_i2c_writeb (i2c_dev->i2cbus, i2c_dev->addr, reg, value, i2c_flag); - I2C_UNPROTECT(); return ret; } @@ -186,12 +165,9 @@ int i2c_devname_read_word (char *name, int reg) i2c_device_info_t *i2c_dev = i2c_dev_find_by_name (name); if(i2c_dev==NULL) return -1; - - I2C_PROTECT(); ret=onlp_i2c_readw(i2c_dev->i2cbus, i2c_dev->addr, reg, i2c_flag); - I2C_UNPROTECT(); return ret; } @@ -203,11 +179,9 @@ int i2c_devname_write_word (char *name, int reg, int value) if(i2c_dev==NULL) return -1; - I2C_PROTECT(); ret=onlp_i2c_writew (i2c_dev->i2cbus, i2c_dev->addr, reg, value, i2c_flag); - I2C_UNPROTECT(); return ret; } @@ -220,11 +194,9 @@ int i2c_devname_read_block (char *name, int reg, uint8_t*buff, int buff_size) if(i2c_dev==NULL) return -1; - I2C_PROTECT(); ret =onlp_i2c_block_read (i2c_dev->i2cbus, i2c_dev->addr, reg, buff_size, buff, i2c_flag); - I2C_UNPROTECT(); return ret; diff --git a/packages/platforms/delta/x86-64/x86-64-delta-ag7648/platform-config/r0/src/python/x86_64_delta_ag7648_r0/__init__.py b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/platform-config/r0/src/python/x86_64_delta_ag7648_r0/__init__.py index faed8260..44197649 100644 --- a/packages/platforms/delta/x86-64/x86-64-delta-ag7648/platform-config/r0/src/python/x86_64_delta_ag7648_r0/__init__.py +++ b/packages/platforms/delta/x86-64/x86-64-delta-ag7648/platform-config/r0/src/python/x86_64_delta_ag7648_r0/__init__.py @@ -1,13 +1,11 @@ from onl.platform.base import * from onl.platform.delta import * -class OnlPlatform_x86_64_delta_ag7648_r0(OnlPlatformDelta): +class OnlPlatform_x86_64_delta_ag7648_r0(OnlPlatformDelta,OnlPlatformPortConfig_48x10_6x40): PLATFORM='x86-64-delta-ag7648-r0' MODEL="AG7648" SYS_OBJECT_ID=".7648.1" - PORT_COUNT=54 - PORT_CONFIG="48x10 + 6x40" def baseconfig(self): self.new_i2c_device('pca9547', 0x70, 1); From 3d4aa912b44a10d3d5e472dbca0f8c750ee885fb Mon Sep 17 00:00:00 2001 From: "raymond.huey" Date: Thu, 6 Jul 2017 16:25:24 +0800 Subject: [PATCH 08/10] Update the Support for Netberg Platforms - remove the patch file "driver-i2c-bus-intel-ismt-netberg-aurora.patch". - modify the method of reading EEPROM : access the binary data directly for EEPROMs on main board and PSU. - remove the function "onlp_sysi_platform_set" in file "sysi.c". - change the SYS_OBJECT_ID in file "__init__.py": Aurora 620 : .620.1 Aurora 720 : .720.1 - remove the "/dev/rtc1" in file "__init__.py", because there is no ds1339 on Netberg Aurora platforms. --- ...er-i2c-bus-intel-ismt-netberg-aurora.patch | 16 -- .../base/any/kernels/3.16-lts/patches/series | 1 - .../x86-64/modules/builds/hardware_monitor.c | 199 +++++++----------- .../module/src/fani.c | 2 +- .../module/src/psui.c | 38 ++-- .../module/src/sysi.c | 45 +--- .../__init__.py | 7 +- .../module/src/fani.c | 2 +- .../module/src/psui.c | 38 ++-- .../module/src/sysi.c | 45 +--- .../__init__.py | 7 +- 11 files changed, 108 insertions(+), 292 deletions(-) delete mode 100644 packages/base/any/kernels/3.16-lts/patches/driver-i2c-bus-intel-ismt-netberg-aurora.patch mode change 100755 => 100644 packages/base/any/kernels/3.16-lts/patches/series diff --git a/packages/base/any/kernels/3.16-lts/patches/driver-i2c-bus-intel-ismt-netberg-aurora.patch b/packages/base/any/kernels/3.16-lts/patches/driver-i2c-bus-intel-ismt-netberg-aurora.patch deleted file mode 100644 index c826f7d5..00000000 --- a/packages/base/any/kernels/3.16-lts/patches/driver-i2c-bus-intel-ismt-netberg-aurora.patch +++ /dev/null @@ -1,16 +0,0 @@ -diff -Nu a/drivers/i2c/busses/i2c-ismt.c b/drivers/i2c/busses/i2c-ismt.c ---- a/drivers/i2c/busses/i2c-ismt.c 2017-05-09 23:52:56.680565000 -0700 -+++ b/drivers/i2c/busses/i2c-ismt.c 2017-05-10 02:09:53.237489185 -0700 -@@ -614,6 +614,12 @@ - priv->head++; - priv->head %= ISMT_DESC_ENTRIES; - -+ if( ret != 0 ) -+ { -+ dev_dbg(dev, "Retry i2c-ismt access\n"); -+ return -EAGAIN; -+ } -+ - return ret; - } - diff --git a/packages/base/any/kernels/3.16-lts/patches/series b/packages/base/any/kernels/3.16-lts/patches/series old mode 100755 new mode 100644 index 963fb532..8c9db7bd --- a/packages/base/any/kernels/3.16-lts/patches/series +++ b/packages/base/any/kernels/3.16-lts/patches/series @@ -25,5 +25,4 @@ platform-powerpc-85xx-Makefile.patch platform-powerpc-dni-7448-r0.patch platform-powerpc-quanta-lb9-r0.patch driver-support-intel-igb-bcm50210-phy.patch -driver-i2c-bus-intel-ismt-netberg-aurora.patch driver-igb-netberg-aurora.patch diff --git a/packages/platforms/netberg/x86-64/modules/builds/hardware_monitor.c b/packages/platforms/netberg/x86-64/modules/builds/hardware_monitor.c index 9a2c2fa2..fa3e711e 100755 --- a/packages/platforms/netberg/x86-64/modules/builds/hardware_monitor.c +++ b/packages/platforms/netberg/x86-64/modules/builds/hardware_monitor.c @@ -26,7 +26,7 @@ enum platform_type { #define W83795ADG_CHIP_ID 0x79 #define W83795ADG_TEMP_COUNT 2 -#define W83795ADG_FAN_COUNT 10 +#define W83795ADG_FAN_COUNT 8 #define W83795ADG_FAN_SPEED_FACTOR 1350000 /* 1.35 * 10^6 */ #define W83795ADG_FAN_POLES_NUMBER 4 #define W83795ADG_VSEN_COUNT 7 @@ -293,7 +293,7 @@ SFP_PORT_DATA_t sfpPortData_78F[] = { SFP_PORT_DATA_PORT_NCIIX_37, SFP_PORT_DATA_PORT_NCIIX_38, SFP_PORT_DATA_PORT_NCIIX_39, SFP_PORT_DATA_PORT_NCIIX_40, SFP_PORT_DATA_PORT_NCIIX_41, SFP_PORT_DATA_PORT_NCIIX_42, SFP_PORT_DATA_PORT_NCIIX_43, SFP_PORT_DATA_PORT_NCIIX_44, SFP_PORT_DATA_PORT_NCIIX_45, SFP_PORT_DATA_PORT_NCIIX_46, SFP_PORT_DATA_PORT_NCIIX_47, SFP_PORT_DATA_PORT_NCIIX_48, - QSFP_PORT_DATA_PORT_NCIIX_1, QSFP_PORT_DATA_PORT_NCIIX_2, QSFP_PORT_DATA_PORT_NCIIX_3, + QSFP_PORT_DATA_PORT_NCIIX_1, QSFP_PORT_DATA_PORT_NCIIX_2, QSFP_PORT_DATA_PORT_NCIIX_3, QSFP_PORT_DATA_PORT_NCIIX_4, QSFP_PORT_DATA_PORT_NCIIX_5, QSFP_PORT_DATA_PORT_NCIIX_6 }; @@ -601,13 +601,6 @@ static int i2c_bus0_hardware_monitor_update_thread(void *p) fanErr = 0; for (i=0; i=8)&&(data->modelId!=ASTERION_WITH_BMC)&&(data->modelId!=ASTERION_WITHOUT_BMC)) - { - FanErr[i] = 0; - continue; - } - fanSpeed = 0; /* Choose W83795ADG bank 0 */ i2c_smbus_write_byte_data(client, W83795ADG_REG_BANK, 0x00); @@ -1225,9 +1218,6 @@ static int i2c_bus1_hardware_monitor_update_thread(void *p) data->fanDir[0] = (value&0x8888); FanDir = data->fanDir[0]; -/* - printk(KERN_INFO "Step %d, value = 0x%04x, fanAbs[0] = 0x%04x, fanDir[0] = 0x%04x\n", step, value, data->fanAbs[0], data->fanDir[0]); -*/ step = 0; break; @@ -1860,6 +1850,7 @@ static int i2c_bus1_hardware_monitor_update_thread(void *p) data->fanDir[0] = (value&0x8888); FanDir = data->fanDir[0]; + i2c_smbus_write_byte_data(client, 0, 0x00); step = 4; break; @@ -2380,7 +2371,7 @@ static SENSOR_DEVICE_ATTR(vsen4, S_IRUGO, show_voltage_sen, NULL, 3); static SENSOR_DEVICE_ATTR(vsen5, S_IRUGO, show_voltage_sen, NULL, 4); static SENSOR_DEVICE_ATTR(vsen7, S_IRUGO, show_voltage_sen, NULL, 6); - static struct attribute *i2c_bus0_hardware_monitor_attr[] = { +static struct attribute *i2c_bus0_hardware_monitor_attr[] = { &dev_attr_mac_temp.attr, &dev_attr_chip_info.attr, &dev_attr_board_build_rev.attr, @@ -2426,8 +2417,55 @@ static SENSOR_DEVICE_ATTR(vsen7, S_IRUGO, show_voltage_sen, NULL, 6); NULL }; - - static struct attribute *i2c_bus0_hardware_monitor_attr_asterion[] = { + +static struct attribute *i2c_bus0_hardware_monitor_attr_nc2x[] = { + &dev_attr_mac_temp.attr, + &dev_attr_chip_info.attr, + &dev_attr_board_build_rev.attr, + &dev_attr_board_hardware_rev.attr, + &dev_attr_board_model_id.attr, + &dev_attr_cpld_info.attr, + &dev_attr_wd_refresh.attr, + &dev_attr_wd_refresh_control.attr, + &dev_attr_wd_refresh_time.attr, + &dev_attr_wd_timeout_occurrence.attr, + &dev_attr_rov.attr, + + &sensor_dev_attr_psu1_pg.dev_attr.attr, + &sensor_dev_attr_psu2_pg.dev_attr.attr, + &sensor_dev_attr_psu1_abs.dev_attr.attr, + &sensor_dev_attr_psu2_abs.dev_attr.attr, + + &sensor_dev_attr_fan1_rpm.dev_attr.attr, + &sensor_dev_attr_fan2_rpm.dev_attr.attr, + &sensor_dev_attr_fan3_rpm.dev_attr.attr, + &sensor_dev_attr_fan4_rpm.dev_attr.attr, + &sensor_dev_attr_fan5_rpm.dev_attr.attr, + &sensor_dev_attr_fan6_rpm.dev_attr.attr, + &sensor_dev_attr_fan7_rpm.dev_attr.attr, + &sensor_dev_attr_fan8_rpm.dev_attr.attr, + + &sensor_dev_attr_fan1_duty.dev_attr.attr, + &sensor_dev_attr_fan2_duty.dev_attr.attr, + &sensor_dev_attr_fan3_duty.dev_attr.attr, + &sensor_dev_attr_fan4_duty.dev_attr.attr, + &sensor_dev_attr_fan5_duty.dev_attr.attr, + &sensor_dev_attr_fan6_duty.dev_attr.attr, + &sensor_dev_attr_fan7_duty.dev_attr.attr, + &sensor_dev_attr_fan8_duty.dev_attr.attr, + + &sensor_dev_attr_remote_temp1.dev_attr.attr, + &sensor_dev_attr_remote_temp2.dev_attr.attr, + + &sensor_dev_attr_vsen1.dev_attr.attr, + &sensor_dev_attr_vsen4.dev_attr.attr, + &sensor_dev_attr_vsen5.dev_attr.attr, + &sensor_dev_attr_vsen7.dev_attr.attr, + + NULL +}; + +static struct attribute *i2c_bus0_hardware_monitor_attr_asterion[] = { &dev_attr_mac_temp.attr, &dev_attr_chip_info.attr, &dev_attr_board_build_rev.attr, @@ -2478,52 +2516,6 @@ static SENSOR_DEVICE_ATTR(vsen7, S_IRUGO, show_voltage_sen, NULL, 6); NULL }; - static struct attribute *i2c_bus0_hardware_monitor_attr_nc2x[] = { - &dev_attr_mac_temp.attr, - &dev_attr_chip_info.attr, - &dev_attr_board_build_rev.attr, - &dev_attr_board_hardware_rev.attr, - &dev_attr_board_model_id.attr, - &dev_attr_cpld_info.attr, - &dev_attr_wd_refresh.attr, - &dev_attr_wd_refresh_control.attr, - &dev_attr_wd_refresh_time.attr, - &dev_attr_wd_timeout_occurrence.attr, - &dev_attr_rov.attr, - - &sensor_dev_attr_psu1_pg.dev_attr.attr, - &sensor_dev_attr_psu2_pg.dev_attr.attr, - &sensor_dev_attr_psu1_abs.dev_attr.attr, - &sensor_dev_attr_psu2_abs.dev_attr.attr, - - &sensor_dev_attr_fan1_rpm.dev_attr.attr, - &sensor_dev_attr_fan2_rpm.dev_attr.attr, - &sensor_dev_attr_fan3_rpm.dev_attr.attr, - &sensor_dev_attr_fan4_rpm.dev_attr.attr, - &sensor_dev_attr_fan5_rpm.dev_attr.attr, - &sensor_dev_attr_fan6_rpm.dev_attr.attr, - &sensor_dev_attr_fan7_rpm.dev_attr.attr, - &sensor_dev_attr_fan8_rpm.dev_attr.attr, - - &sensor_dev_attr_fan1_duty.dev_attr.attr, - &sensor_dev_attr_fan2_duty.dev_attr.attr, - &sensor_dev_attr_fan3_duty.dev_attr.attr, - &sensor_dev_attr_fan4_duty.dev_attr.attr, - &sensor_dev_attr_fan5_duty.dev_attr.attr, - &sensor_dev_attr_fan6_duty.dev_attr.attr, - &sensor_dev_attr_fan7_duty.dev_attr.attr, - &sensor_dev_attr_fan8_duty.dev_attr.attr, - - &sensor_dev_attr_remote_temp1.dev_attr.attr, - &sensor_dev_attr_remote_temp2.dev_attr.attr, - - &sensor_dev_attr_vsen1.dev_attr.attr, - &sensor_dev_attr_vsen4.dev_attr.attr, - &sensor_dev_attr_vsen5.dev_attr.attr, - &sensor_dev_attr_vsen7.dev_attr.attr, - - NULL -}; static ssize_t show_port_abs(struct device *dev, struct device_attribute *devattr, char *buf) { @@ -2603,24 +2595,10 @@ static ssize_t show_port_data_a0(struct device *dev, struct device_attribute *de mutex_lock(&data->lock); memcpy(qsfpPortData, &(data->qsfpPortDataA0[attr->index][0]), QSFP_DATA_SIZE); mutex_unlock(&data->lock); -#if 0 -{ - unsigned int index; - char str[8]; - count = 0; - for (index=0; indexlock); memcpy(qsfpPortData, &(data->qsfpPortDataA2[attr->index][0]), QSFP_DATA_SIZE); mutex_unlock(&data->lock); -#if 0 -{ - unsigned int index; - char str[8]; - count = 0; - for (index=0; indexlock); if (attr->index<4) { - mutex_lock(&data->lock); value = (unsigned int)data->fanAbs[0]; - mutex_unlock(&data->lock); index = attr->index; } else { - mutex_lock(&data->lock); value = (unsigned int)data->fanAbs[1]; - mutex_unlock(&data->lock); index = (attr->index-3); } + mutex_unlock(&data->lock); + value &= (0x0004<<(index*4)); return sprintf(buf, "%d\n", value?0:1); } @@ -2691,21 +2654,20 @@ static ssize_t show_fan_dir(struct device *dev, struct device_attribute *devattr unsigned int value = 0; unsigned int index = 0; + mutex_lock(&data->lock); if (attr->index<4) { - mutex_lock(&data->lock); value = (unsigned int)data->fanDir[0]; - mutex_unlock(&data->lock); index = attr->index; } else { - mutex_lock(&data->lock); value = (unsigned int)data->fanDir[1]; - mutex_unlock(&data->lock); index = (attr->index-3); } - value &= (0x0004<<(index*4)); + mutex_unlock(&data->lock); + + value &= (0x0008<<(index*4)); return sprintf(buf, "%d\n", value?0:1); } @@ -2713,8 +2675,6 @@ static ssize_t show_eeprom(struct device *dev, struct device_attribute *devattr, { unsigned char eepromData[EEPROM_DATA_SIZE]; ssize_t count = 0; - unsigned int index; - char str[8]; int ret = 0; memset(eepromData, 0, EEPROM_DATA_SIZE); @@ -2807,19 +2767,10 @@ static ssize_t show_eeprom(struct device *dev, struct device_attribute *devattr, } if (ret < 0) memset(eepromData, 0, EEPROM_DATA_SIZE); -#if 1 - count = 0; - for (index=0; indexhwmon_dev); sysfs_remove_group(&client->dev.kobj, &data->hwmon_group); @@ -6336,8 +6279,10 @@ static void w83795adg_hardware_monitor_shutdown(struct i2c_client *client) /* turn off all LEDs of front port */ i2c_smbus_write_byte_data(&cpld_client, CPLD_REG_RESET_0x34, 0x00); +#if 0 /* It's for Huracan Beta only, remove it. */ i2c_smbus_write_byte_data(&cpld_client, CPLD_REG_LED_0x40, 0x00); i2c_smbus_write_byte_data(&cpld_client, CPLD_REG_LED_0x44, 0x00); +#endif /* reset MAC */ i2c_smbus_write_byte_data(&cpld_client, CPLD_REG_RESET_0x30, 0x6e); i2c_smbus_write_byte_data(&cpld_client, CPLD_REG_RESET_0x30, 0x6f); @@ -6357,6 +6302,6 @@ static void w83795adg_hardware_monitor_shutdown(struct i2c_client *client) module_i2c_driver(w83795adg_hardware_monitor_driver); -MODULE_AUTHOR("Raymond Huey "); -MODULE_DESCRIPTION("Foxconn W83795ADG Hardware Monitor driver"); +MODULE_AUTHOR("Raymond Huey "); +MODULE_DESCRIPTION("W83795ADG Hardware Monitor driver"); MODULE_LICENSE("GPL"); diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/fani.c b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/fani.c index ea901954..0994f3fe 100755 --- a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/fani.c +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/fani.c @@ -60,7 +60,7 @@ sys_fan_info_get__(onlp_fan_info_t* info, int id) if (rv != ONLP_STATUS_OK) return rv; - if (value == 0) + if (value == 1) { info->status |= ONLP_FAN_STATUS_B2F; info->caps |= ONLP_FAN_CAPS_B2F; diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/psui.c b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/psui.c index 398b630a..437b1d99 100755 --- a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/psui.c +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/psui.c @@ -12,8 +12,6 @@ #include "x86_64_netberg_aurora_620_rangeley_int.h" #include "x86_64_netberg_aurora_620_rangeley_log.h" -extern int toHexValue(char ch); - #define VALIDATE(_id) \ do { \ if(!ONLP_OID_IS_PSU(_id)) { \ @@ -59,12 +57,11 @@ onlp_psui_info_get(onlp_oid_t id, onlp_psu_info_t* info) { int rv; int pid; - uint8_t buffer[512]; uint8_t data[256]; int value = -1; int len; double dvalue; - int i, j; + int i; VALIDATE(id); @@ -84,17 +81,10 @@ onlp_psui_info_get(onlp_oid_t id, onlp_psu_info_t* info) /* PSU is present. */ info->status = ONLP_PSU_STATUS_PRESENT; - memset(buffer, 0, sizeof(buffer)); memset(data, 0, sizeof(data)); - rv = onlp_file_read(buffer, sizeof(buffer), &len, SYS_HWMON2_PREFIX "/psu%d_eeprom", pid); + rv = onlp_file_read(data, sizeof(data), &len, SYS_HWMON2_PREFIX "/psu%d_eeprom", pid); if (rv == ONLP_STATUS_OK) { - j = 0; - for (i=0; i<256; i++) - { - data[i] = (toHexValue(buffer[j])<<4) + toHexValue(buffer[j+1]); - j += 2; - } i = 11; /* Manufacturer Name */ @@ -143,11 +133,11 @@ onlp_psui_info_get(onlp_oid_t id, onlp_psu_info_t* info) } #endif - memset(buffer, 0, sizeof(buffer)); - rv = onlp_file_read(buffer, sizeof(buffer), &len, SYS_HWMON2_PREFIX "/psu%d_iout", pid); + memset(data, 0, sizeof(data)); + rv = onlp_file_read(data, sizeof(data), &len, SYS_HWMON2_PREFIX "/psu%d_iout", pid); if (rv == ONLP_STATUS_OK) { - dvalue = atof((const char *)buffer); + dvalue = atof((const char *)data); if (dvalue > 0.0) { info->caps |= ONLP_PSU_CAPS_IOUT; @@ -155,11 +145,11 @@ onlp_psui_info_get(onlp_oid_t id, onlp_psu_info_t* info) } } - memset(buffer, 0, sizeof(buffer)); - rv = onlp_file_read(buffer, sizeof(buffer), &len, SYS_HWMON2_PREFIX "/psu%d_vout", pid); + memset(data, 0, sizeof(data)); + rv = onlp_file_read(data, sizeof(data), &len, SYS_HWMON2_PREFIX "/psu%d_vout", pid); if (rv == ONLP_STATUS_OK) { - dvalue = atof((const char *)buffer); + dvalue = atof((const char *)data); if (dvalue > 0.0) { info->caps |= ONLP_PSU_CAPS_VOUT; @@ -167,11 +157,11 @@ onlp_psui_info_get(onlp_oid_t id, onlp_psu_info_t* info) } } - memset(buffer, 0, sizeof(buffer)); - rv = onlp_file_read(buffer, sizeof(buffer), &len, SYS_HWMON2_PREFIX "/psu%d_pin", pid); + memset(data, 0, sizeof(data)); + rv = onlp_file_read(data, sizeof(data), &len, SYS_HWMON2_PREFIX "/psu%d_pin", pid); if (rv == ONLP_STATUS_OK) { - dvalue = atof((const char *)buffer); + dvalue = atof((const char *)data); if (dvalue > 0.0) { info->caps |= ONLP_PSU_CAPS_PIN; @@ -179,11 +169,11 @@ onlp_psui_info_get(onlp_oid_t id, onlp_psu_info_t* info) } } - memset(buffer, 0, sizeof(buffer)); - rv = onlp_file_read(buffer, sizeof(buffer), &len, SYS_HWMON2_PREFIX "/psu%d_pout", pid); + memset(data, 0, sizeof(data)); + rv = onlp_file_read(data, sizeof(data), &len, SYS_HWMON2_PREFIX "/psu%d_pout", pid); if (rv == ONLP_STATUS_OK) { - dvalue = atof((const char *)buffer); + dvalue = atof((const char *)data); if (dvalue > 0.0) { info->caps |= ONLP_PSU_CAPS_POUT; diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/sysi.c b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/sysi.c index 820dd56c..d8176335 100755 --- a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/sysi.c +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/onlp/builds/src/x86_64_netberg_aurora_620_rangeley/module/src/sysi.c @@ -11,19 +11,6 @@ #include "x86_64_netberg_aurora_620_rangeley_int.h" #include "x86_64_netberg_aurora_620_rangeley_log.h" -int toHexValue(char ch) -{ - if ((ch >= '0')&&(ch <= '9')) - { - return (ch-0x30); - } - else if (((ch >= 'a')&&(ch <= 'f'))||((ch >= 'A')&&(ch <= 'F'))) - { - return (ch-0x57); - } - return 0; -} - /* * This is the first function called by the ONLP framework. * @@ -42,25 +29,6 @@ onlp_sysi_platform_get(void) return "x86-64-netberg-aurora-620-rangeley-r0"; } -/* - * This function will be called if onlp_sysi_platform_get() - * returns a platform name that is not equal to the current platform. - * - * If you are compatible with the given platform then return ONLP_STATUS_OK. - * If you can are not compatible return ONLP_STATUS_E_UNSUPPORTED. - * - This is fatal and will abort platform initialization. - */ - -int -onlp_sysi_platform_set(const char* name) -{ - /* - * For the purposes of this example we - * accept all platforms. - */ - return ONLP_STATUS_OK; -} - /* * This is the first function the ONLP framework will call * after it has validated the the platform is supported using the mechanisms @@ -79,23 +47,14 @@ int onlp_sysi_onie_info_get(onlp_onie_info_t* onie) { int rv; - uint8_t buffer[512]; uint8_t data[256]; int len; - int i, j; - memset(buffer, 0, sizeof(buffer)); memset(data, 0, sizeof(data)); - rv = onlp_file_read(buffer, sizeof(buffer), &len, SYS_HWMON2_PREFIX "/eeprom"); + rv = onlp_file_read(data, sizeof(data), &len, SYS_HWMON2_PREFIX "/eeprom"); if (rv == ONLP_STATUS_OK) { - j = 0; - for (i=0; i<256; i++) - { - data[i] = (toHexValue(buffer[j])<<4) + toHexValue(buffer[j+1]); - j += 2; - } - rv = onlp_onie_decode(onie, (uint8_t*)data, 256); + rv = onlp_onie_decode(onie, (uint8_t*)data, sizeof(data)); if(rv >= 0) { onie->platform_name = aim_strdup("x86-64-netberg-aurora-620-rangeley-r0"); diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/platform-config/r0/src/python/x86_64_netberg_aurora_620_rangeley_r0/__init__.py b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/platform-config/r0/src/python/x86_64_netberg_aurora_620_rangeley_r0/__init__.py index cbd5f1ac..c01ac8bd 100755 --- a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/platform-config/r0/src/python/x86_64_netberg_aurora_620_rangeley_r0/__init__.py +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-620-rangeley/platform-config/r0/src/python/x86_64_netberg_aurora_620_rangeley_r0/__init__.py @@ -5,13 +5,8 @@ class OnlPlatform_x86_64_netberg_aurora_620_rangeley_r0(OnlPlatformNetberg, OnlPlatformPortConfig_48x25_6x100): PLATFORM='x86-64-netberg-aurora-620-rangeley-r0' MODEL="AURORA620" - SYS_OBJECT_ID=".8.1" + SYS_OBJECT_ID=".620.1" def baseconfig(self): self.insmod("hardware_monitor") - - # make ds1339 as default rtc - os.system("ln -snf /dev/rtc1 /dev/rtc") - os.system("hwclock --hctosys") - return True diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/fani.c b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/fani.c index 3a4cc970..7265ee40 100755 --- a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/fani.c +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/fani.c @@ -60,7 +60,7 @@ sys_fan_info_get__(onlp_fan_info_t* info, int id) if (rv != ONLP_STATUS_OK) return rv; - if (value == 0) + if (value == 1) { info->status |= ONLP_FAN_STATUS_B2F; info->caps |= ONLP_FAN_CAPS_B2F; diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/psui.c b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/psui.c index 447582e3..cb6e8762 100755 --- a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/psui.c +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/psui.c @@ -12,8 +12,6 @@ #include "x86_64_netberg_aurora_720_rangeley_int.h" #include "x86_64_netberg_aurora_720_rangeley_log.h" -extern int toHexValue(char ch); - #define VALIDATE(_id) \ do { \ if(!ONLP_OID_IS_PSU(_id)) { \ @@ -59,12 +57,11 @@ onlp_psui_info_get(onlp_oid_t id, onlp_psu_info_t* info) { int rv; int pid; - uint8_t buffer[512]; uint8_t data[256]; int value = -1; int len; double dvalue; - int i, j; + int i; VALIDATE(id); @@ -84,17 +81,10 @@ onlp_psui_info_get(onlp_oid_t id, onlp_psu_info_t* info) /* PSU is present. */ info->status = ONLP_PSU_STATUS_PRESENT; - memset(buffer, 0, sizeof(buffer)); memset(data, 0, sizeof(data)); - rv = onlp_file_read(buffer, sizeof(buffer), &len, SYS_HWMON2_PREFIX "/psu%d_eeprom", pid); + rv = onlp_file_read(data, sizeof(data), &len, SYS_HWMON2_PREFIX "/psu%d_eeprom", pid); if (rv == ONLP_STATUS_OK) { - j = 0; - for (i=0; i<256; i++) - { - data[i] = (toHexValue(buffer[j])<<4) + toHexValue(buffer[j+1]); - j += 2; - } i = 11; /* Manufacturer Name */ @@ -143,11 +133,11 @@ onlp_psui_info_get(onlp_oid_t id, onlp_psu_info_t* info) } #endif - memset(buffer, 0, sizeof(buffer)); - rv = onlp_file_read(buffer, sizeof(buffer), &len, SYS_HWMON2_PREFIX "/psu%d_iout", pid); + memset(data, 0, sizeof(data)); + rv = onlp_file_read(data, sizeof(data), &len, SYS_HWMON2_PREFIX "/psu%d_iout", pid); if (rv == ONLP_STATUS_OK) { - dvalue = atof((const char *)buffer); + dvalue = atof((const char *)data); if (dvalue > 0.0) { info->caps |= ONLP_PSU_CAPS_IOUT; @@ -155,11 +145,11 @@ onlp_psui_info_get(onlp_oid_t id, onlp_psu_info_t* info) } } - memset(buffer, 0, sizeof(buffer)); - rv = onlp_file_read(buffer, sizeof(buffer), &len, SYS_HWMON2_PREFIX "/psu%d_vout", pid); + memset(data, 0, sizeof(data)); + rv = onlp_file_read(data, sizeof(data), &len, SYS_HWMON2_PREFIX "/psu%d_vout", pid); if (rv == ONLP_STATUS_OK) { - dvalue = atof((const char *)buffer); + dvalue = atof((const char *)data); if (dvalue > 0.0) { info->caps |= ONLP_PSU_CAPS_VOUT; @@ -167,11 +157,11 @@ onlp_psui_info_get(onlp_oid_t id, onlp_psu_info_t* info) } } - memset(buffer, 0, sizeof(buffer)); - rv = onlp_file_read(buffer, sizeof(buffer), &len, SYS_HWMON2_PREFIX "/psu%d_pin", pid); + memset(data, 0, sizeof(data)); + rv = onlp_file_read(data, sizeof(data), &len, SYS_HWMON2_PREFIX "/psu%d_pin", pid); if (rv == ONLP_STATUS_OK) { - dvalue = atof((const char *)buffer); + dvalue = atof((const char *)data); if (dvalue > 0.0) { info->caps |= ONLP_PSU_CAPS_PIN; @@ -179,11 +169,11 @@ onlp_psui_info_get(onlp_oid_t id, onlp_psu_info_t* info) } } - memset(buffer, 0, sizeof(buffer)); - rv = onlp_file_read(buffer, sizeof(buffer), &len, SYS_HWMON2_PREFIX "/psu%d_pout", pid); + memset(data, 0, sizeof(data)); + rv = onlp_file_read(data, sizeof(data), &len, SYS_HWMON2_PREFIX "/psu%d_pout", pid); if (rv == ONLP_STATUS_OK) { - dvalue = atof((const char *)buffer); + dvalue = atof((const char *)data); if (dvalue > 0.0) { info->caps |= ONLP_PSU_CAPS_POUT; diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/sysi.c b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/sysi.c index 0914b09c..1ad61f84 100755 --- a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/sysi.c +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/onlp/builds/src/x86_64_netberg_aurora_720_rangeley/module/src/sysi.c @@ -11,19 +11,6 @@ #include "x86_64_netberg_aurora_720_rangeley_int.h" #include "x86_64_netberg_aurora_720_rangeley_log.h" -int toHexValue(char ch) -{ - if ((ch >= '0')&&(ch <= '9')) - { - return (ch-0x30); - } - else if (((ch >= 'a')&&(ch <= 'f'))||((ch >= 'A')&&(ch <= 'F'))) - { - return (ch-0x57); - } - return 0; -} - /* * This is the first function called by the ONLP framework. * @@ -42,25 +29,6 @@ onlp_sysi_platform_get(void) return "x86-64-netberg-aurora-720-rangeley-r0"; } -/* - * This function will be called if onlp_sysi_platform_get() - * returns a platform name that is not equal to the current platform. - * - * If you are compatible with the given platform then return ONLP_STATUS_OK. - * If you can are not compatible return ONLP_STATUS_E_UNSUPPORTED. - * - This is fatal and will abort platform initialization. - */ - -int -onlp_sysi_platform_set(const char* name) -{ - /* - * For the purposes of this example we - * accept all platforms. - */ - return ONLP_STATUS_OK; -} - /* * This is the first function the ONLP framework will call * after it has validated the the platform is supported using the mechanisms @@ -79,23 +47,14 @@ int onlp_sysi_onie_info_get(onlp_onie_info_t* onie) { int rv; - uint8_t buffer[512]; uint8_t data[256]; int len; - int i, j; - memset(buffer, 0, sizeof(buffer)); memset(data, 0, sizeof(data)); - rv = onlp_file_read(buffer, sizeof(buffer), &len, SYS_HWMON2_PREFIX "/eeprom"); + rv = onlp_file_read(data, sizeof(data), &len, SYS_HWMON2_PREFIX "/eeprom"); if (rv == ONLP_STATUS_OK) { - j = 0; - for (i=0; i<256; i++) - { - data[i] = (toHexValue(buffer[j])<<4) + toHexValue(buffer[j+1]); - j += 2; - } - rv = onlp_onie_decode(onie, (uint8_t*)data, 256); + rv = onlp_onie_decode(onie, (uint8_t*)data, sizeof(data)); if(rv >= 0) { onie->platform_name = aim_strdup("x86-64-netberg-aurora-720-rangeley-r0"); diff --git a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/platform-config/r0/src/python/x86_64_netberg_aurora_720_rangeley_r0/__init__.py b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/platform-config/r0/src/python/x86_64_netberg_aurora_720_rangeley_r0/__init__.py index 49e5ef70..fb70fe40 100755 --- a/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/platform-config/r0/src/python/x86_64_netberg_aurora_720_rangeley_r0/__init__.py +++ b/packages/platforms/netberg/x86-64/x86-64-netberg-aurora-720-rangeley/platform-config/r0/src/python/x86_64_netberg_aurora_720_rangeley_r0/__init__.py @@ -5,13 +5,8 @@ class OnlPlatform_x86_64_netberg_aurora_720_rangeley_r0(OnlPlatformNetberg, OnlPlatformPortConfig_32x100): PLATFORM='x86-64-netberg-aurora-720-rangeley-r0' MODEL="AURORA720" - SYS_OBJECT_ID=".8.1" + SYS_OBJECT_ID=".720.1" def baseconfig(self): self.insmod("hardware_monitor") - - # make ds1339 as default rtc - os.system("ln -snf /dev/rtc1 /dev/rtc") - os.system("hwclock --hctosys") - return True From cdaabeb19e17a2f41b2970165e455878acdf2246 Mon Sep 17 00:00:00 2001 From: Steven Noble Date: Wed, 12 Jul 2017 20:41:24 +0000 Subject: [PATCH 09/10] igb: Add support for bcm5461x phy Patch provided by David Ahern @dsahern for kernel 4.11 based on 3.16-lts ONL patch. --- .../configs/x86_64-all/x86_64-all.config | 13 +- ...driver-support-intel-igb-bcm5461-phy.patch | 263 ++++++++++++++++++ .../base/any/kernels/4.9-lts/patches/series | 2 +- 3 files changed, 272 insertions(+), 6 deletions(-) create mode 100644 packages/base/any/kernels/4.9-lts/patches/driver-support-intel-igb-bcm5461-phy.patch diff --git a/packages/base/any/kernels/4.9-lts/configs/x86_64-all/x86_64-all.config b/packages/base/any/kernels/4.9-lts/configs/x86_64-all/x86_64-all.config index 0326395c..b616ae79 100644 --- a/packages/base/any/kernels/4.9-lts/configs/x86_64-all/x86_64-all.config +++ b/packages/base/any/kernels/4.9-lts/configs/x86_64-all/x86_64-all.config @@ -1,6 +1,6 @@ # # Automatically generated file; DO NOT EDIT. -# Linux/x86_64 4.9.30 Kernel Configuration +# Linux/x86 4.9.30 Kernel Configuration # CONFIG_64BIT=y CONFIG_X86_64=y @@ -1477,6 +1477,7 @@ CONFIG_VIRTIO_NET=y # Distributed Switch Architecture drivers # CONFIG_ETHERNET=y +CONFIG_MDIO=y CONFIG_NET_VENDOR_3COM=y # CONFIG_PCMCIA_3C574 is not set # CONFIG_PCMCIA_3C589 is not set @@ -1557,10 +1558,12 @@ CONFIG_E100=y CONFIG_E1000=y CONFIG_E1000E=y CONFIG_E1000E_HWTS=y -# CONFIG_IGB is not set -# CONFIG_IGBVF is not set -# CONFIG_IXGB is not set -# CONFIG_IXGBE is not set +CONFIG_IGB=y +CONFIG_IGB_HWMON=y +CONFIG_IGBVF=y +CONFIG_IXGB=y +CONFIG_IXGBE=y +CONFIG_IXGBE_HWMON=y # CONFIG_IXGBEVF is not set # CONFIG_I40E is not set # CONFIG_I40EVF is not set diff --git a/packages/base/any/kernels/4.9-lts/patches/driver-support-intel-igb-bcm5461-phy.patch b/packages/base/any/kernels/4.9-lts/patches/driver-support-intel-igb-bcm5461-phy.patch new file mode 100644 index 00000000..c780797b --- /dev/null +++ b/packages/base/any/kernels/4.9-lts/patches/driver-support-intel-igb-bcm5461-phy.patch @@ -0,0 +1,263 @@ +From 908a37bb6749d85a7818fb8a0f684d46c858f52e Mon Sep 17 00:00:00 2001 +From: David Ahern +Date: Thu, 11 May 2017 17:53:43 -0700 +Subject: [PATCH] igb: Add support for bcm5461x phy + +Based on driver-support-intel-igb-bcm5461X-phy.patch from +OpenNetworkLinux, 3.16-lts patches + +Signed-off-by: David Ahern +--- + drivers/net/ethernet/intel/igb/e1000_82575.c | 27 ++++++++ + drivers/net/ethernet/intel/igb/e1000_defines.h | 2 + + drivers/net/ethernet/intel/igb/e1000_hw.h | 2 + + drivers/net/ethernet/intel/igb/e1000_phy.c | 87 ++++++++++++++++++++++++-- + drivers/net/ethernet/intel/igb/e1000_phy.h | 2 + + drivers/net/ethernet/intel/igb/igb_main.c | 8 +++ + 6 files changed, 124 insertions(+), 4 deletions(-) + +diff --git a/drivers/net/ethernet/intel/igb/e1000_82575.c b/drivers/net/ethernet/intel/igb/e1000_82575.c +index ee443985581fe..2de38acdc187f 100644 +--- a/drivers/net/ethernet/intel/igb/e1000_82575.c ++++ b/drivers/net/ethernet/intel/igb/e1000_82575.c +@@ -339,6 +339,15 @@ static s32 igb_init_phy_params_82575(struct e1000_hw *hw) + phy->ops.set_d3_lplu_state = igb_set_d3_lplu_state_82580; + phy->ops.force_speed_duplex = igb_phy_force_speed_duplex_m88; + break; ++ case BCM5461S_PHY_ID: ++ phy->type = e1000_phy_bcm5461s; ++ phy->ops.check_polarity = NULL; ++ phy->ops.get_cable_length = NULL; ++ phy->ops.force_speed_duplex = igb_phy_force_speed_duplex_82580; ++ break; ++ case BCM54616_E_PHY_ID: ++ phy->type = e1000_phy_bcm54616; ++ break; + default: + ret_val = -E1000_ERR_PHY; + goto out; +@@ -898,6 +907,16 @@ static s32 igb_get_phy_id_82575(struct e1000_hw *hw) + goto out; + } + ret_val = igb_get_phy_id(hw); ++ if (ret_val && hw->mac.type == e1000_i354) { ++ /* we do a special check for bcm5461s phy by setting ++ * the phy->addr to 5 and doing the phy check again. This ++ * call will succeed and retrieve a valid phy id if we have ++ * the bcm5461s phy ++ */ ++ phy->addr = 5; ++ phy->type = e1000_phy_bcm5461s; ++ ret_val = igb_get_phy_id(hw); ++ } + goto out; + } + +@@ -1285,6 +1304,9 @@ static s32 igb_get_cfg_done_82575(struct e1000_hw *hw) + (hw->phy.type == e1000_phy_igp_3)) + igb_phy_init_script_igp3(hw); + ++ if (hw->phy.type == e1000_phy_bcm5461s) ++ igb_phy_init_script_5461s(hw); ++ + return 0; + } + +@@ -1614,6 +1636,7 @@ static s32 igb_setup_copper_link_82575(struct e1000_hw *hw) + case e1000_i350: + case e1000_i210: + case e1000_i211: ++ case e1000_i354: + phpm_reg = rd32(E1000_82580_PHY_POWER_MGMT); + phpm_reg &= ~E1000_82580_PM_GO_LINKD; + wr32(E1000_82580_PHY_POWER_MGMT, phpm_reg); +@@ -1658,6 +1681,10 @@ static s32 igb_setup_copper_link_82575(struct e1000_hw *hw) + case e1000_phy_82580: + ret_val = igb_copper_link_setup_82580(hw); + break; ++ case e1000_phy_bcm54616: ++ break; ++ case e1000_phy_bcm5461s: ++ break; + default: + ret_val = -E1000_ERR_PHY; + break; +diff --git a/drivers/net/ethernet/intel/igb/e1000_defines.h b/drivers/net/ethernet/intel/igb/e1000_defines.h +index 8aee314332a87..9c1471643c542 100644 +--- a/drivers/net/ethernet/intel/igb/e1000_defines.h ++++ b/drivers/net/ethernet/intel/igb/e1000_defines.h +@@ -868,6 +868,8 @@ + #define I210_I_PHY_ID 0x01410C00 + #define M88E1543_E_PHY_ID 0x01410EA0 + #define M88E1512_E_PHY_ID 0x01410DD0 ++#define BCM54616_E_PHY_ID 0x3625D10 ++#define BCM5461S_PHY_ID 0x002060C0 + + /* M88E1000 Specific Registers */ + #define M88E1000_PHY_SPEC_CTRL 0x10 /* PHY Specific Control Register */ +diff --git a/drivers/net/ethernet/intel/igb/e1000_hw.h b/drivers/net/ethernet/intel/igb/e1000_hw.h +index 2fb2213cd562e..2840ad95396af 100644 +--- a/drivers/net/ethernet/intel/igb/e1000_hw.h ++++ b/drivers/net/ethernet/intel/igb/e1000_hw.h +@@ -128,6 +128,8 @@ enum e1000_phy_type { + e1000_phy_ife, + e1000_phy_82580, + e1000_phy_i210, ++ e1000_phy_bcm54616, ++ e1000_phy_bcm5461s, + }; + + enum e1000_bus_type { +diff --git a/drivers/net/ethernet/intel/igb/e1000_phy.c b/drivers/net/ethernet/intel/igb/e1000_phy.c +index 68812d783f33e..1a4013ca6f85e 100644 +--- a/drivers/net/ethernet/intel/igb/e1000_phy.c ++++ b/drivers/net/ethernet/intel/igb/e1000_phy.c +@@ -146,6 +146,13 @@ s32 igb_read_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 *data) + * Control register. The MAC will take care of interfacing with the + * PHY to retrieve the desired data. + */ ++ if (phy->type == e1000_phy_bcm5461s) { ++ mdic = rd32(E1000_MDICNFG); ++ mdic &= ~E1000_MDICNFG_PHY_MASK; ++ mdic |= (phy->addr << E1000_MDICNFG_PHY_SHIFT); ++ wr32(E1000_MDICNFG, mdic); ++ } ++ + mdic = ((offset << E1000_MDIC_REG_SHIFT) | + (phy->addr << E1000_MDIC_PHY_SHIFT) | + (E1000_MDIC_OP_READ)); +@@ -202,6 +209,13 @@ s32 igb_write_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 data) + * Control register. The MAC will take care of interfacing with the + * PHY to retrieve the desired data. + */ ++ if (phy->type == e1000_phy_bcm5461s) { ++ mdic = rd32(E1000_MDICNFG); ++ mdic &= ~E1000_MDICNFG_PHY_MASK; ++ mdic |= (phy->addr << E1000_MDICNFG_PHY_SHIFT); ++ wr32(E1000_MDICNFG, mdic); ++ } ++ + mdic = (((u32)data) | + (offset << E1000_MDIC_REG_SHIFT) | + (phy->addr << E1000_MDIC_PHY_SHIFT) | +@@ -1113,10 +1127,12 @@ s32 igb_setup_copper_link(struct e1000_hw *hw) + * depending on user settings. + */ + hw_dbg("Forcing Speed and Duplex\n"); +- ret_val = hw->phy.ops.force_speed_duplex(hw); +- if (ret_val) { +- hw_dbg("Error Forcing Speed and Duplex\n"); +- goto out; ++ if (hw->phy.ops.force_speed_duplex) { ++ ret_val = hw->phy.ops.force_speed_duplex(hw); ++ if (ret_val) { ++ hw_dbg("Error Forcing Speed and Duplex\n"); ++ goto out; ++ } + } + } + +@@ -2647,3 +2663,66 @@ static s32 igb_set_master_slave_mode(struct e1000_hw *hw) + + return hw->phy.ops.write_reg(hw, PHY_1000T_CTRL, phy_data); + } ++ ++/** ++ * igb_phy_init_script_5461s - Inits the BCM5461S PHY ++ * @hw: pointer to the HW structure ++ * ++ * Initializes a Broadcom Gigabit PHY. ++ **/ ++s32 igb_phy_init_script_5461s(struct e1000_hw *hw) ++{ ++ u16 mii_reg_led = 0; ++ ++ /* 1. Speed LED (Set the Link LED mode), Shadow 00010, 0x1C.bit2=1 */ ++ hw->phy.ops.write_reg(hw, 0x1C, 0x0800); ++ hw->phy.ops.read_reg(hw, 0x1C, &mii_reg_led); ++ mii_reg_led |= 0x0004; ++ hw->phy.ops.write_reg(hw, 0x1C, mii_reg_led | 0x8000); ++ ++ /* 2. Active LED (Set the Link LED mode), Shadow 01001, 0x1C.bit4=1, 0x10.bit5=0 */ ++ hw->phy.ops.write_reg(hw, 0x1C, 0x2400); ++ hw->phy.ops.read_reg(hw, 0x1C, &mii_reg_led); ++ mii_reg_led |= 0x0010; ++ hw->phy.ops.write_reg(hw, 0x1C, mii_reg_led | 0x8000); ++ hw->phy.ops.read_reg(hw, 0x10, &mii_reg_led); ++ mii_reg_led &= 0xffdf; ++ hw->phy.ops.write_reg(hw, 0x10, mii_reg_led); ++ ++ return 0; ++} ++ ++/** ++ * igb_get_phy_info_5461s - Retrieve 5461s PHY information ++ * @hw: pointer to the HW structure ++ * ++ * Read PHY status to determine if link is up. If link is up, then ++ * set/determine 10base-T extended distance and polarity correction. Read ++ * PHY port status to determine MDI/MDIx and speed. Based on the speed, ++ * determine on the cable length, local and remote receiver. ++ **/ ++s32 igb_get_phy_info_5461s(struct e1000_hw *hw) ++{ ++ struct e1000_phy_info *phy = &hw->phy; ++ s32 ret_val; ++ bool link; ++ ++ ret_val = igb_phy_has_link(hw, 1, 0, &link); ++ if (ret_val) ++ goto out; ++ ++ if (!link) { ++ ret_val = -E1000_ERR_CONFIG; ++ goto out; ++ } ++ ++ phy->polarity_correction = true; ++ ++ phy->is_mdix = true; ++ phy->cable_length = E1000_CABLE_LENGTH_UNDEFINED; ++ phy->local_rx = e1000_1000t_rx_status_ok; ++ phy->remote_rx = e1000_1000t_rx_status_ok; ++ ++out: ++ return ret_val; ++} +diff --git a/drivers/net/ethernet/intel/igb/e1000_phy.h b/drivers/net/ethernet/intel/igb/e1000_phy.h +index 9b622b33bb5ac..3b28873060946 100644 +--- a/drivers/net/ethernet/intel/igb/e1000_phy.h ++++ b/drivers/net/ethernet/intel/igb/e1000_phy.h +@@ -61,6 +61,8 @@ s32 igb_phy_has_link(struct e1000_hw *hw, u32 iterations, + void igb_power_up_phy_copper(struct e1000_hw *hw); + void igb_power_down_phy_copper(struct e1000_hw *hw); + s32 igb_phy_init_script_igp3(struct e1000_hw *hw); ++s32 igb_phy_init_script_5461s(struct e1000_hw *hw); ++s32 igb_get_phy_info_5461s(struct e1000_hw *hw); + s32 igb_initialize_M88E1512_phy(struct e1000_hw *hw); + s32 igb_initialize_M88E1543_phy(struct e1000_hw *hw); + s32 igb_read_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 *data); +diff --git a/drivers/net/ethernet/intel/igb/igb_main.c b/drivers/net/ethernet/intel/igb/igb_main.c +index be456bae81690..4689079f8bbcd 100644 +--- a/drivers/net/ethernet/intel/igb/igb_main.c ++++ b/drivers/net/ethernet/intel/igb/igb_main.c +@@ -7356,11 +7356,19 @@ static int igb_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) + data->phy_id = adapter->hw.phy.addr; + break; + case SIOCGMIIREG: ++ adapter->hw.phy.addr = data->phy_id; + if (igb_read_phy_reg(&adapter->hw, data->reg_num & 0x1F, + &data->val_out)) + return -EIO; + break; + case SIOCSMIIREG: ++ if (!capable(CAP_NET_ADMIN)) ++ return -EPERM; ++ adapter->hw.phy.addr = data->phy_id; ++ if (igb_write_phy_reg(&adapter->hw, data->reg_num & 0x1F, ++ data->val_in)) ++ return -EIO; ++ break; + default: + return -EOPNOTSUPP; + } diff --git a/packages/base/any/kernels/4.9-lts/patches/series b/packages/base/any/kernels/4.9-lts/patches/series index 8b137891..e26a164c 100644 --- a/packages/base/any/kernels/4.9-lts/patches/series +++ b/packages/base/any/kernels/4.9-lts/patches/series @@ -1 +1 @@ - +driver-support-intel-igb-bcm5461-phy.patch From 56bbb50716a1e8bebbb94ac05798a80e7f7cde86 Mon Sep 17 00:00:00 2001 From: brandon_chuang Date: Fri, 14 Jul 2017 10:05:56 +0800 Subject: [PATCH 10/10] [kernel 3.16-lts] Enable UEFI related config --- .../3.16-lts/configs/x86_64-all/x86_64-all.config | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) diff --git a/packages/base/any/kernels/3.16-lts/configs/x86_64-all/x86_64-all.config b/packages/base/any/kernels/3.16-lts/configs/x86_64-all/x86_64-all.config index 2038c572..90f68706 100644 --- a/packages/base/any/kernels/3.16-lts/configs/x86_64-all/x86_64-all.config +++ b/packages/base/any/kernels/3.16-lts/configs/x86_64-all/x86_64-all.config @@ -470,7 +470,9 @@ CONFIG_X86_PAT=y CONFIG_ARCH_USES_PG_UNCACHED=y CONFIG_ARCH_RANDOM=y CONFIG_X86_SMAP=y -# CONFIG_EFI is not set +CONFIG_EFI=y +CONFIG_EFI_STUB=y +# CONFIG_EFI_MIXED is not set CONFIG_SECCOMP=y # CONFIG_HZ_100 is not set CONFIG_HZ_250=y @@ -521,6 +523,7 @@ CONFIG_ACPI_CONTAINER=y # CONFIG_ACPI_SBS is not set # CONFIG_ACPI_HED is not set CONFIG_ACPI_CUSTOM_METHOD=y +# CONFIG_ACPI_BGRT is not set # CONFIG_ACPI_REDUCED_HARDWARE_ONLY is not set # CONFIG_ACPI_APEI is not set # CONFIG_ACPI_EXTLOG is not set @@ -2971,6 +2974,12 @@ CONFIG_ISCSI_IBFT_FIND=y CONFIG_ISCSI_IBFT=y # CONFIG_GOOGLE_FIRMWARE is not set +# +# EFI (Extensible Firmware Interface) Support +# +# CONFIG_EFI_VARS is not set +CONFIG_EFI_RUNTIME_MAP=y + # # File systems # @@ -3102,6 +3111,7 @@ CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 # CONFIG_UFS_FS is not set # CONFIG_EXOFS_FS is not set # CONFIG_F2FS_FS is not set +CONFIG_EFIVAR_FS=y CONFIG_ORE=y CONFIG_NETWORK_FILESYSTEMS=y CONFIG_NFS_FS=y @@ -3365,6 +3375,7 @@ CONFIG_STRICT_DEVMEM=y CONFIG_X86_VERBOSE_BOOTUP=y CONFIG_EARLY_PRINTK=y # CONFIG_EARLY_PRINTK_DBGP is not set +# CONFIG_EARLY_PRINTK_EFI is not set # CONFIG_X86_PTDUMP is not set CONFIG_DEBUG_RODATA=y # CONFIG_DEBUG_RODATA_TEST is not set