From 25fb90d1f81a3a30453534c6ab480c4fbc246a89 Mon Sep 17 00:00:00 2001 From: "Carl D. Roth" Date: Wed, 13 Apr 2016 14:17:22 -0700 Subject: [PATCH 01/62] Added python-yaml and python-parted to base ONL build --- builds/any/rootfs/jessie/common/common-packages.yml | 2 ++ builds/any/rootfs/wheezy/common/common-packages.yml | 4 ++-- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/builds/any/rootfs/jessie/common/common-packages.yml b/builds/any/rootfs/jessie/common/common-packages.yml index 74ef19c4..980a86b1 100644 --- a/builds/any/rootfs/jessie/common/common-packages.yml +++ b/builds/any/rootfs/jessie/common/common-packages.yml @@ -70,3 +70,5 @@ - onl-loader-initscripts - onlp-snmpd - oom-shim +- python-parted +- python-yaml diff --git a/builds/any/rootfs/wheezy/common/common-packages.yml b/builds/any/rootfs/wheezy/common/common-packages.yml index 5857b0f2..b93183b1 100644 --- a/builds/any/rootfs/wheezy/common/common-packages.yml +++ b/builds/any/rootfs/wheezy/common/common-packages.yml @@ -69,5 +69,5 @@ - onl-loader-initscripts - onlp-snmpd - oom-shim - - +- python-parted +- python-yaml From f9b34e1ef8b6d6d148b543673d2ea28927a1c0f5 Mon Sep 17 00:00:00 2001 From: "Carl D. Roth" Date: Thu, 14 Apr 2016 11:19:45 -0700 Subject: [PATCH 02/62] Add onl-vendor-config-onl to initrd --- packages/base/any/initrds/loader/builds/Makefile | 1 + 1 file changed, 1 insertion(+) diff --git a/packages/base/any/initrds/loader/builds/Makefile b/packages/base/any/initrds/loader/builds/Makefile index 23bc0fbb..6f290bed 100644 --- a/packages/base/any/initrds/loader/builds/Makefile +++ b/packages/base/any/initrds/loader/builds/Makefile @@ -23,6 +23,7 @@ $(TARGET): sudo rm -rf $(ROOT) && mkdir $(ROOT) $(ONLPM) --sudo --force --extract-dir onl-loader-initrd-files:all $(ROOT) $(ONLPM) --sudo $(foreach p,$(PLATFORM_PACKAGES),--extract-dir $(p) $(ROOT)) + $(ONLPM) --sudo --force --extract-dir onl-vendor-config-onl:all $(ROOT) $(ONL)/tools/sjson.py --kj version $(ONL)/make/version-onl.json --kl platforms $(PLATFORMS) --kv arch $(ARCH) --out manifest.json sudo mkdir -p $(ROOT)/etc/onl/loader && sudo cp manifest.json $(ROOT)/etc/onl/loader sudo $(ONL)/tools/makedevs -d $(ROOT)/etc/rootperms $(abspath $(ROOT)) From f0575cc39abd1f8b2a41289e6665d6cef18c39e1 Mon Sep 17 00:00:00 2001 From: Lewis Kang Date: Tue, 19 Apr 2016 18:23:17 +0800 Subject: [PATCH 03/62] port platform-accton-as7716_32x-device-drivers.patch from ONL1.0 & patch for as7716 managment port's driver --- .../patches/driver-broadcom-tigon3.patch | 27389 ++++++++++++++++ .../patches/mgmt-port-init-config.patch | 50 + ...orm-accton-as7716_32x-device-drivers.patch | 1707 + .../kernels/3.2.65-1+deb7u2/patches/series | 3 + 4 files changed, 29149 insertions(+) create mode 100644 packages/base/any/kernels/3.2.65-1+deb7u2/patches/driver-broadcom-tigon3.patch create mode 100644 packages/base/any/kernels/3.2.65-1+deb7u2/patches/mgmt-port-init-config.patch create mode 100644 packages/base/any/kernels/3.2.65-1+deb7u2/patches/platform-accton-as7716_32x-device-drivers.patch diff --git a/packages/base/any/kernels/3.2.65-1+deb7u2/patches/driver-broadcom-tigon3.patch b/packages/base/any/kernels/3.2.65-1+deb7u2/patches/driver-broadcom-tigon3.patch new file mode 100644 index 00000000..ffff1d30 --- /dev/null +++ b/packages/base/any/kernels/3.2.65-1+deb7u2/patches/driver-broadcom-tigon3.patch @@ -0,0 +1,27389 @@ +support Broadcom Tigon3 Ethernet driver + +diff --git a/drivers/net/ethernet/broadcom/Makefile b/drivers/net/ethernet/broadcom/Makefile +index b789605..486c71c 100644 +--- a/drivers/net/ethernet/broadcom/Makefile ++++ b/drivers/net/ethernet/broadcom/Makefile +@@ -8,4 +8,4 @@ obj-$(CONFIG_BNX2) += bnx2.o + obj-$(CONFIG_CNIC) += cnic.o + obj-$(CONFIG_BNX2X) += bnx2x/ + obj-$(CONFIG_SB1250_MAC) += sb1250-mac.o +-obj-$(CONFIG_TIGON3) += tg3.o ++obj-$(CONFIG_TIGON3) += tg3/ +diff --git a/drivers/net/ethernet/broadcom/tg3/Makefile b/drivers/net/ethernet/broadcom/tg3/Makefile +new file mode 100644 +index 0000000..22b6141 +--- /dev/null ++++ b/drivers/net/ethernet/broadcom/tg3/Makefile +@@ -0,0 +1,5 @@ ++# ++# Makefile for Broadcom Tigon3 ethernet driver ++# ++ ++obj-$(CONFIG_TIGON3) += tg3.o +diff --git a/drivers/net/ethernet/broadcom/tg3/tg3.c b/drivers/net/ethernet/broadcom/tg3/tg3.c +new file mode 100644 +index 0000000..4894a11 +--- /dev/null ++++ b/drivers/net/ethernet/broadcom/tg3/tg3.c +@@ -0,0 +1,19937 @@ ++/* ++ * tg3.c: Broadcom Tigon3 ethernet driver. ++ * ++ * Copyright (C) 2001, 2002, 2003, 2004 David S. Miller (davem@redhat.com) ++ * Copyright (C) 2001, 2002, 2003 Jeff Garzik (jgarzik@pobox.com) ++ * Copyright (C) 2004 Sun Microsystems Inc. ++ * Copyright (C) 2005-2015 Broadcom Corporation. ++ * Portions Copyright (C) VMware, Inc. 2007-2010. All Rights Reserved. ++ * ++ * Firmware is: ++ * Derived from proprietary unpublished source code, ++ * Copyright (C) 2000-2003 Broadcom Corporation. ++ * ++ * Permission is hereby granted for the distribution of this firmware ++ * data in hexadecimal or equivalent format, provided this copyright ++ * notice is accompanying it. ++ */ ++ ++#include "tg3_flags.h" ++ ++#include ++ ++#if (LINUX_VERSION_CODE < 0x020612) ++#include ++#endif ++ ++#if (LINUX_VERSION_CODE < 0x020500) ++#if defined(CONFIG_MODVERSIONS) && defined(MODULE) && ! defined(MODVERSIONS) ++#define MODVERSIONS ++#include ++#endif ++#endif ++#include ++#if (LINUX_VERSION_CODE >= 0x20600) ++#include ++#endif ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#ifdef BCM_HAS_MDIO_H ++#include ++#endif ++#include ++#ifdef BCM_INCLUDE_PHYLIB_SUPPORT ++#include ++#include ++#include ++#endif ++#include ++#include ++#include ++#if (LINUX_VERSION_CODE >= 0x20600) ++#include ++#endif ++#include ++#if (LINUX_VERSION_CODE >= 0x020600) ++#include ++#endif ++#ifdef BCM_HAS_REQUEST_FIRMWARE ++#include ++#else ++#include "tg3_firmware.h" ++#endif ++#include ++ ++#ifndef IS_ENABLED ++#define __ARG_PLACEHOLDER_1 0, ++#define config_enabled(cfg) _config_enabled(cfg) ++#define _config_enabled(value) __config_enabled(__ARG_PLACEHOLDER_##value) ++#define __config_enabled(arg1_or_junk) ___config_enabled(arg1_or_junk 1, 0) ++#define ___config_enabled(__ignored, val, ...) val ++ ++#define IS_ENABLED(option) \ ++ (config_enabled(option) || config_enabled(option##_MODULE)) ++#endif ++ ++#if IS_ENABLED(CONFIG_HWMON) && !defined(__VMKLNX__) ++#include ++#include ++#endif ++ ++#include ++#include ++ ++#include ++#include ++#include ++ ++#ifdef BCM_HAS_IEEE1588_SUPPORT ++#include ++#if IS_ENABLED(CONFIG_PTP_1588_CLOCK) ++#include ++#else /* IS_ENABLED(CONFIG_PTP_1588_CLOCK) */ ++#include ++#include ++#endif /* IS_ENABLED(CONFIG_PTP_1588_CLOCK) */ ++#endif ++ ++#ifdef CONFIG_SPARC ++#include ++#include ++#endif ++ ++#define BAR_0 0 ++#define BAR_2 2 ++ ++#include "tg3.h" ++ ++/* Functions & macros to verify TG3_FLAGS types */ ++ ++static inline int _tg3_flag(enum TG3_FLAGS flag, unsigned long *bits) ++{ ++ return test_bit(flag, bits); ++} ++ ++static inline void _tg3_flag_set(enum TG3_FLAGS flag, unsigned long *bits) ++{ ++ set_bit(flag, bits); ++} ++ ++static inline void _tg3_flag_clear(enum TG3_FLAGS flag, unsigned long *bits) ++{ ++ clear_bit(flag, bits); ++} ++ ++#define tg3_flag(tp, flag) \ ++ _tg3_flag(TG3_FLAG_##flag, (tp)->tg3_flags) ++#define tg3_flag_set(tp, flag) \ ++ _tg3_flag_set(TG3_FLAG_##flag, (tp)->tg3_flags) ++#define tg3_flag_clear(tp, flag) \ ++ _tg3_flag_clear(TG3_FLAG_##flag, (tp)->tg3_flags) ++ ++#define DRV_MODULE_NAME "tg3" ++#define TG3_MAJ_NUM 3 ++#define TG3_MIN_NUM 137 ++#define TG3_REVISION "k" ++#define DRV_MODULE_VERSION \ ++ __stringify(TG3_MAJ_NUM) "." __stringify(TG3_MIN_NUM)\ ++ TG3_REVISION ++#define DRV_MODULE_RELDATE "April 1, 2015" ++#define RESET_KIND_SHUTDOWN 0 ++#define RESET_KIND_INIT 1 ++#define RESET_KIND_SUSPEND 2 ++ ++#define TG3_DEF_RX_MODE 0 ++#define TG3_DEF_TX_MODE 0 ++#define TG3_DEF_MSG_ENABLE \ ++ (NETIF_MSG_DRV | \ ++ NETIF_MSG_PROBE | \ ++ NETIF_MSG_LINK | \ ++ NETIF_MSG_TIMER | \ ++ NETIF_MSG_IFDOWN | \ ++ NETIF_MSG_IFUP | \ ++ NETIF_MSG_RX_ERR | \ ++ NETIF_MSG_TX_ERR) ++ ++#define TG3_GRC_LCLCTL_PWRSW_DELAY 100 ++ ++/* length of time before we decide the hardware is borked, ++ * and dev->tx_timeout() should be called to fix the problem ++ */ ++#if defined(__VMKLNX__) ++/* On VMware ESX there is a possibility that that netdev watchdog thread ++ * runs before the reset task if the machine is loaded. If this occurs ++ * too many times, these premature watchdog triggers will cause a PSOD ++ * on a VMware ESX beta build */ ++#define TG3_TX_TIMEOUT (20 * HZ) ++#else ++#define TG3_TX_TIMEOUT (5 * HZ) ++#endif /* defined(__VMKLNX__) */ ++ ++/* hardware minimum and maximum for a single frame's data payload */ ++#define TG3_MIN_MTU 60 ++#define TG3_MAX_MTU(tp) \ ++ (tg3_flag(tp, JUMBO_CAPABLE) ? 9000 : 1500) ++ ++/* These numbers seem to be hard coded in the NIC firmware somehow. ++ * You can't change the ring sizes, but you can change where you place ++ * them in the NIC onboard memory. ++ */ ++#define TG3_RX_STD_RING_SIZE(tp) \ ++ (tg3_flag(tp, LRG_PROD_RING_CAP) ? \ ++ TG3_RX_STD_MAX_SIZE_5717 : TG3_RX_STD_MAX_SIZE_5700) ++#define TG3_RX_JMB_RING_SIZE(tp) \ ++ (tg3_flag(tp, LRG_PROD_RING_CAP) ? \ ++ TG3_RX_JMB_MAX_SIZE_5717 : TG3_RX_JMB_MAX_SIZE_5700) ++ ++#if defined(__VMKLNX__) ++#define TG3_DEF_RX_RING_PENDING 255 ++#define TG3_DEF_RX_JUMBO_RING_PENDING 200 ++#else ++#define TG3_DEF_RX_RING_PENDING 200 ++#define TG3_DEF_RX_JUMBO_RING_PENDING 100 ++#endif ++ ++/* Do not place this n-ring entries value into the tp struct itself, ++ * we really want to expose these constants to GCC so that modulo et ++ * al. operations are done with shifts and masks instead of with ++ * hw multiply/modulo instructions. Another solution would be to ++ * replace things like '% foo' with '& (foo - 1)'. ++ */ ++ ++#define TG3_TX_RING_SIZE 512 ++#define TG3_DEF_TX_RING_PENDING (TG3_TX_RING_SIZE - 1) ++ ++#define TG3_RX_STD_RING_BYTES(tp) \ ++ (sizeof(struct tg3_rx_buffer_desc) * TG3_RX_STD_RING_SIZE(tp)) ++#define TG3_RX_JMB_RING_BYTES(tp) \ ++ (sizeof(struct tg3_ext_rx_buffer_desc) * TG3_RX_JMB_RING_SIZE(tp)) ++#define TG3_RX_RCB_RING_BYTES(tp) \ ++ (sizeof(struct tg3_rx_buffer_desc) * (tp->rx_ret_ring_mask + 1)) ++#define TG3_TX_RING_BYTES (sizeof(struct tg3_tx_buffer_desc) * \ ++ TG3_TX_RING_SIZE) ++#define NEXT_TX(N) (((N) + 1) & (TG3_TX_RING_SIZE - 1)) ++ ++#define TG3_DMA_BYTE_ENAB 64 ++ ++#define TG3_RX_STD_DMA_SZ 1536 ++#define TG3_RX_JMB_DMA_SZ 9046 ++ ++#define TG3_RX_DMA_TO_MAP_SZ(x) ((x) + TG3_DMA_BYTE_ENAB) ++ ++#define TG3_RX_STD_MAP_SZ TG3_RX_DMA_TO_MAP_SZ(TG3_RX_STD_DMA_SZ) ++#define TG3_RX_JMB_MAP_SZ TG3_RX_DMA_TO_MAP_SZ(TG3_RX_JMB_DMA_SZ) ++ ++#define TG3_RX_STD_BUFF_RING_SIZE(tp) \ ++ (sizeof(struct ring_info) * TG3_RX_STD_RING_SIZE(tp)) ++ ++#define TG3_RX_JMB_BUFF_RING_SIZE(tp) \ ++ (sizeof(struct ring_info) * TG3_RX_JMB_RING_SIZE(tp)) ++ ++/* Due to a hardware bug, the 5701 can only DMA to memory addresses ++ * that are at least dword aligned when used in PCIX mode. The driver ++ * works around this bug by double copying the packet. This workaround ++ * is built into the normal double copy length check for efficiency. ++ * ++ * However, the double copy is only necessary on those architectures ++ * where unaligned memory accesses are inefficient. For those architectures ++ * where unaligned memory accesses incur little penalty, we can reintegrate ++ * the 5701 in the normal rx path. Doing so saves a device structure ++ * dereference by hardcoding the double copy threshold in place. ++ */ ++#define TG3_RX_COPY_THRESHOLD 256 ++#if NET_IP_ALIGN == 0 || defined(CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS) ++ #define TG3_RX_COPY_THRESH(tp) TG3_RX_COPY_THRESHOLD ++#else ++ #define TG3_RX_COPY_THRESH(tp) ((tp)->rx_copy_thresh) ++#endif ++ ++#if (NET_IP_ALIGN != 0) ++#define TG3_RX_OFFSET(tp) ((tp)->rx_offset) ++#else ++#ifdef BCM_HAS_BUILD_SKB ++#define TG3_RX_OFFSET(tp) (NET_SKB_PAD) ++#else ++#define TG3_RX_OFFSET(tp) 0 ++#endif ++#endif ++ ++/* minimum number of free TX descriptors required to wake up TX process */ ++#define TG3_TX_WAKEUP_THRESH(tnapi) ((tnapi)->tx_pending / 4) ++#define TG3_TX_BD_DMA_MAX_2K 2048 ++#define TG3_TX_BD_DMA_MAX_4K 4096 ++#define TG3_TX_BD_DMA_MAX_32K 32768 ++ ++#define TG3_RAW_IP_ALIGN 2 ++ ++#define TG3_MAX_UCAST_ADDR(tp) (tg3_flag((tp), ENABLE_ASF) ? 2 : 3) ++#define TG3_UCAST_ADDR_IDX(tp) (tg3_flag((tp), ENABLE_ASF) ? 2 : 1) ++ ++#include "tg3_compat2.h" ++ ++#if defined(__VMKLNX__) ++/* see pr141646, 626764*/ ++#define TG3_FW_UPDATE_TIMEOUT_SEC 30 ++#else ++#define TG3_FW_UPDATE_TIMEOUT_SEC 5 ++#endif ++#define TG3_FW_UPDATE_FREQ_SEC (TG3_FW_UPDATE_TIMEOUT_SEC / 2) ++ ++#define FIRMWARE_TG3 "tigon/tg3.bin" ++#define FIRMWARE_TG357766 "tigon/tg357766.bin" ++#define FIRMWARE_TG3TSO "tigon/tg3_tso.bin" ++#define FIRMWARE_TG3TSO5 "tigon/tg3_tso5.bin" ++ ++static char version[] __devinitdata = ++ DRV_MODULE_NAME ".c:v" DRV_MODULE_VERSION " (" DRV_MODULE_RELDATE ")\n"; ++ ++MODULE_AUTHOR("David S. Miller (davem@redhat.com) and Jeff Garzik (jgarzik@pobox.com)"); ++MODULE_DESCRIPTION("Broadcom Tigon3 ethernet driver"); ++MODULE_LICENSE("GPL"); ++MODULE_VERSION(DRV_MODULE_VERSION); ++MODULE_FIRMWARE(FIRMWARE_TG3); ++MODULE_FIRMWARE(FIRMWARE_TG3TSO); ++MODULE_FIRMWARE(FIRMWARE_TG3TSO5); ++ ++static int tg3_debug = -1; /* -1 == use TG3_DEF_MSG_ENABLE as value */ ++#if (LINUX_VERSION_CODE >= 0x20600) ++module_param(tg3_debug, int, 0); ++MODULE_PARM_DESC(tg3_debug, "Tigon3 bitmapped debugging message enable value"); ++#endif ++#if defined(__VMKLNX__) && (VMWARE_ESX_DDK_VERSION >= 55000) ++static int disable_fw_dmp; ++module_param(disable_fw_dmp, int, 0); ++MODULE_PARM_DESC(disable_fw_dmp, "For debugging purposes, disable firmware " ++ "dump feature when set to value of 1"); ++#endif ++ ++static int tg3_disable_eee = -1; ++#if (LINUX_VERSION_CODE >= 0x20600) ++module_param(tg3_disable_eee, int, 0); ++MODULE_PARM_DESC(tg3_disable_eee, "Disable Energy Efficient Ethernet (EEE) support"); ++#endif ++ ++#define TG3_DRV_DATA_FLAG_10_100_ONLY 0x0001 ++#define TG3_DRV_DATA_FLAG_5705_10_100 0x0002 ++ ++static DEFINE_PCI_DEVICE_TABLE(tg3_pci_tbl) = { ++ {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5700)}, ++ {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5701)}, ++ {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5702)}, ++ {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5703)}, ++ {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5704)}, ++ {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5702FE)}, ++ {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5705)}, ++ {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5705_2)}, ++ {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5705M)}, ++ {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5705M_2)}, ++ {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5702X)}, ++ {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5703X)}, ++ {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5704S)}, ++ {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5702A3)}, ++ {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5703A3)}, ++ {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5782)}, ++ {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5788)}, ++ {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5789)}, ++ {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5901), ++ .driver_data = TG3_DRV_DATA_FLAG_10_100_ONLY | ++ TG3_DRV_DATA_FLAG_5705_10_100}, ++ {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5901_2), ++ .driver_data = TG3_DRV_DATA_FLAG_10_100_ONLY | ++ TG3_DRV_DATA_FLAG_5705_10_100}, ++ {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5704S_2)}, ++ {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5705F), ++ .driver_data = TG3_DRV_DATA_FLAG_10_100_ONLY | ++ TG3_DRV_DATA_FLAG_5705_10_100}, ++ {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5721)}, ++ {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5722)}, ++ {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5750)}, ++ {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5751)}, ++ {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5751M)}, ++ {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5751F), ++ .driver_data = TG3_DRV_DATA_FLAG_10_100_ONLY}, ++ {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5752)}, ++ {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5752M)}, ++ {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5753)}, ++ {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5753M)}, ++ {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5753F), ++ .driver_data = TG3_DRV_DATA_FLAG_10_100_ONLY}, ++ {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5754)}, ++ {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5754M)}, ++ {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5755)}, ++ {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5755M)}, ++ {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5756)}, ++ {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5786)}, ++ {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5787)}, ++ {PCI_DEVICE_SUB(PCI_VENDOR_ID_BROADCOM, TG3PCI_DEVICE_TIGON3_5787M, ++ PCI_VENDOR_ID_LENOVO, ++ TG3PCI_SUBDEVICE_ID_LENOVO_5787M), ++ .driver_data = TG3_DRV_DATA_FLAG_10_100_ONLY}, ++ {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5787M)}, ++ {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5787F), ++ .driver_data = TG3_DRV_DATA_FLAG_10_100_ONLY}, ++ {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5714)}, ++ {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5714S)}, ++ {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5715)}, ++ {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5715S)}, ++ {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5780)}, ++ {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5780S)}, ++ {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5781)}, ++ {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5906)}, ++ {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5906M)}, ++ {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5784)}, ++ {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5764)}, ++ {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5723)}, ++ {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5761)}, ++ {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5761E)}, ++ {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, TG3PCI_DEVICE_TIGON3_5761S)}, ++ {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, TG3PCI_DEVICE_TIGON3_5761SE)}, ++ {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, TG3PCI_DEVICE_TIGON3_5785_G)}, ++ {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, TG3PCI_DEVICE_TIGON3_5785_F)}, ++ {PCI_DEVICE_SUB(PCI_VENDOR_ID_BROADCOM, TG3PCI_DEVICE_TIGON3_57780, ++ PCI_VENDOR_ID_AI, TG3PCI_SUBDEVICE_ID_ACER_57780_A), ++ .driver_data = TG3_DRV_DATA_FLAG_10_100_ONLY}, ++ {PCI_DEVICE_SUB(PCI_VENDOR_ID_BROADCOM, TG3PCI_DEVICE_TIGON3_57780, ++ PCI_VENDOR_ID_AI, TG3PCI_SUBDEVICE_ID_ACER_57780_B), ++ .driver_data = TG3_DRV_DATA_FLAG_10_100_ONLY}, ++ {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, TG3PCI_DEVICE_TIGON3_57780)}, ++ {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, TG3PCI_DEVICE_TIGON3_57760)}, ++ {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, TG3PCI_DEVICE_TIGON3_57790), ++ .driver_data = TG3_DRV_DATA_FLAG_10_100_ONLY}, ++ {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, TG3PCI_DEVICE_TIGON3_57788)}, ++ {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, TG3PCI_DEVICE_TIGON3_5717)}, ++ {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, TG3PCI_DEVICE_TIGON3_5717_C)}, ++ {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, TG3PCI_DEVICE_TIGON3_5718)}, ++ {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, TG3PCI_DEVICE_TIGON3_57781)}, ++ {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, TG3PCI_DEVICE_TIGON3_57785)}, ++ {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, TG3PCI_DEVICE_TIGON3_57761)}, ++ {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, TG3PCI_DEVICE_TIGON3_57765)}, ++ {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, TG3PCI_DEVICE_TIGON3_57791), ++ .driver_data = TG3_DRV_DATA_FLAG_10_100_ONLY}, ++ {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, TG3PCI_DEVICE_TIGON3_57795), ++ .driver_data = TG3_DRV_DATA_FLAG_10_100_ONLY}, ++ {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, TG3PCI_DEVICE_TIGON3_5719)}, ++ {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, TG3PCI_DEVICE_TIGON3_5720)}, ++ {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, TG3PCI_DEVICE_TIGON3_57762)}, ++ {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, TG3PCI_DEVICE_TIGON3_57766)}, ++ {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, TG3PCI_DEVICE_TIGON3_5762)}, ++ {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, TG3PCI_DEVICE_TIGON3_5725)}, ++ {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, TG3PCI_DEVICE_TIGON3_5727)}, ++ {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, TG3PCI_DEVICE_TIGON3_57764)}, ++ {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, TG3PCI_DEVICE_TIGON3_57767)}, ++ {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, TG3PCI_DEVICE_TIGON3_57787)}, ++ {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, TG3PCI_DEVICE_TIGON3_57782)}, ++ {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, TG3PCI_DEVICE_TIGON3_57786)}, ++ {PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, PCI_DEVICE_ID_SYSKONNECT_9DXX)}, ++ {PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, PCI_DEVICE_ID_SYSKONNECT_9MXX)}, ++ {PCI_DEVICE(PCI_VENDOR_ID_ALTIMA, PCI_DEVICE_ID_ALTIMA_AC1000)}, ++ {PCI_DEVICE(PCI_VENDOR_ID_ALTIMA, PCI_DEVICE_ID_ALTIMA_AC1001)}, ++ {PCI_DEVICE(PCI_VENDOR_ID_ALTIMA, PCI_DEVICE_ID_ALTIMA_AC1003)}, ++ {PCI_DEVICE(PCI_VENDOR_ID_ALTIMA, PCI_DEVICE_ID_ALTIMA_AC9100)}, ++ {PCI_DEVICE(PCI_VENDOR_ID_APPLE, PCI_DEVICE_ID_APPLE_TIGON3)}, ++ {} ++}; ++ ++MODULE_DEVICE_TABLE(pci, tg3_pci_tbl); ++ ++static const struct { ++ const char string[ETH_GSTRING_LEN]; ++} ethtool_stats_keys[] = { ++ { "rx_octets" }, ++ { "rx_fragments" }, ++ { "rx_ucast_packets" }, ++ { "rx_mcast_packets" }, ++ { "rx_bcast_packets" }, ++ { "rx_fcs_errors" }, ++ { "rx_align_errors" }, ++ { "rx_xon_pause_rcvd" }, ++ { "rx_xoff_pause_rcvd" }, ++ { "rx_mac_ctrl_rcvd" }, ++ { "rx_xoff_entered" }, ++ { "rx_frame_too_long_errors" }, ++ { "rx_jabbers" }, ++ { "rx_undersize_packets" }, ++ { "rx_in_length_errors" }, ++ { "rx_out_length_errors" }, ++ { "rx_64_or_less_octet_packets" }, ++ { "rx_65_to_127_octet_packets" }, ++ { "rx_128_to_255_octet_packets" }, ++ { "rx_256_to_511_octet_packets" }, ++ { "rx_512_to_1023_octet_packets" }, ++ { "rx_1024_to_1522_octet_packets" }, ++ { "rx_1523_to_2047_octet_packets" }, ++ { "rx_2048_to_4095_octet_packets" }, ++ { "rx_4096_to_8191_octet_packets" }, ++ { "rx_8192_to_9022_octet_packets" }, ++ ++ { "tx_octets" }, ++ { "tx_collisions" }, ++ ++ { "tx_xon_sent" }, ++ { "tx_xoff_sent" }, ++ { "tx_flow_control" }, ++ { "tx_mac_errors" }, ++ { "tx_single_collisions" }, ++ { "tx_mult_collisions" }, ++ { "tx_deferred" }, ++ { "tx_excessive_collisions" }, ++ { "tx_late_collisions" }, ++ { "tx_collide_2times" }, ++ { "tx_collide_3times" }, ++ { "tx_collide_4times" }, ++ { "tx_collide_5times" }, ++ { "tx_collide_6times" }, ++ { "tx_collide_7times" }, ++ { "tx_collide_8times" }, ++ { "tx_collide_9times" }, ++ { "tx_collide_10times" }, ++ { "tx_collide_11times" }, ++ { "tx_collide_12times" }, ++ { "tx_collide_13times" }, ++ { "tx_collide_14times" }, ++ { "tx_collide_15times" }, ++ { "tx_ucast_packets" }, ++ { "tx_mcast_packets" }, ++ { "tx_bcast_packets" }, ++ { "tx_carrier_sense_errors" }, ++ { "tx_discards" }, ++ { "tx_errors" }, ++ ++ { "dma_writeq_full" }, ++ { "dma_write_prioq_full" }, ++ { "rxbds_empty" }, ++ { "rx_discards" }, ++ { "rx_errors" }, ++ { "rx_threshold_hit" }, ++ ++ { "dma_readq_full" }, ++ { "dma_read_prioq_full" }, ++ { "tx_comp_queue_full" }, ++ ++ { "ring_set_send_prod_index" }, ++ { "ring_status_update" }, ++ { "nic_irqs" }, ++ { "nic_avoided_irqs" }, ++ { "nic_tx_threshold_hit" }, ++ ++ { "mbuf_lwm_thresh_hit" }, ++ { "dma_4g_cross" }, ++#if !defined(__VMKLNX__) ++ { "recoverable_err" }, ++ { "unrecoverable_err" }, ++#endif ++}; ++ ++#define TG3_NUM_STATS ARRAY_SIZE(ethtool_stats_keys) ++#define TG3_NVRAM_TEST 0 ++#define TG3_LINK_TEST 1 ++#define TG3_REGISTER_TEST 2 ++#define TG3_MEMORY_TEST 3 ++#define TG3_MAC_LOOPB_TEST 4 ++#define TG3_PHY_LOOPB_TEST 5 ++#define TG3_EXT_LOOPB_TEST 6 ++#define TG3_INTERRUPT_TEST 7 ++ ++ ++static const struct { ++ const char string[ETH_GSTRING_LEN]; ++} ethtool_test_keys[] = { ++ [TG3_NVRAM_TEST] = { "nvram test (online) " }, ++ [TG3_LINK_TEST] = { "link test (online) " }, ++ [TG3_REGISTER_TEST] = { "register test (offline)" }, ++ [TG3_MEMORY_TEST] = { "memory test (offline)" }, ++ [TG3_MAC_LOOPB_TEST] = { "mac loopback test (offline)" }, ++ [TG3_PHY_LOOPB_TEST] = { "phy loopback test (offline)" }, ++ [TG3_EXT_LOOPB_TEST] = { "ext loopback test (offline)" }, ++ [TG3_INTERRUPT_TEST] = { "interrupt test (offline)" }, ++}; ++ ++#define TG3_NUM_TEST ARRAY_SIZE(ethtool_test_keys) ++ ++ ++static void tg3_write32(struct tg3 *tp, u32 off, u32 val) ++{ ++ writel(val, tp->regs + off); ++} ++ ++static u32 tg3_read32(struct tg3 *tp, u32 off) ++{ ++ return readl(tp->regs + off); ++} ++ ++static void tg3_ape_write32(struct tg3 *tp, u32 off, u32 val) ++{ ++ writel(val, tp->aperegs + off); ++} ++ ++static u32 tg3_ape_read32(struct tg3 *tp, u32 off) ++{ ++ return readl(tp->aperegs + off); ++} ++ ++static void tg3_write_indirect_reg32(struct tg3 *tp, u32 off, u32 val) ++{ ++ unsigned long flags; ++ ++ spin_lock_irqsave(&tp->indirect_lock, flags); ++ pci_write_config_dword(tp->pdev, TG3PCI_REG_BASE_ADDR, off); ++ pci_write_config_dword(tp->pdev, TG3PCI_REG_DATA, val); ++ spin_unlock_irqrestore(&tp->indirect_lock, flags); ++} ++ ++static void tg3_write_flush_reg32(struct tg3 *tp, u32 off, u32 val) ++{ ++ writel(val, tp->regs + off); ++ readl(tp->regs + off); ++} ++ ++static u32 tg3_read_indirect_reg32(struct tg3 *tp, u32 off) ++{ ++ unsigned long flags; ++ u32 val; ++ ++ spin_lock_irqsave(&tp->indirect_lock, flags); ++ pci_write_config_dword(tp->pdev, TG3PCI_REG_BASE_ADDR, off); ++ pci_read_config_dword(tp->pdev, TG3PCI_REG_DATA, &val); ++ spin_unlock_irqrestore(&tp->indirect_lock, flags); ++ return val; ++} ++ ++static void tg3_write_indirect_mbox(struct tg3 *tp, u32 off, u32 val) ++{ ++ unsigned long flags; ++ ++ if (off == (MAILBOX_RCVRET_CON_IDX_0 + TG3_64BIT_REG_LOW)) { ++ pci_write_config_dword(tp->pdev, TG3PCI_RCV_RET_RING_CON_IDX + ++ TG3_64BIT_REG_LOW, val); ++ return; ++ } ++ if (off == TG3_RX_STD_PROD_IDX_REG) { ++ pci_write_config_dword(tp->pdev, TG3PCI_STD_RING_PROD_IDX + ++ TG3_64BIT_REG_LOW, val); ++ return; ++ } ++ ++ spin_lock_irqsave(&tp->indirect_lock, flags); ++ pci_write_config_dword(tp->pdev, TG3PCI_REG_BASE_ADDR, off + 0x5600); ++ pci_write_config_dword(tp->pdev, TG3PCI_REG_DATA, val); ++ spin_unlock_irqrestore(&tp->indirect_lock, flags); ++ ++ /* In indirect mode when disabling interrupts, we also need ++ * to clear the interrupt bit in the GRC local ctrl register. ++ */ ++ if ((off == (MAILBOX_INTERRUPT_0 + TG3_64BIT_REG_LOW)) && ++ (val == 0x1)) { ++ pci_write_config_dword(tp->pdev, TG3PCI_MISC_LOCAL_CTRL, ++ tp->grc_local_ctrl|GRC_LCLCTRL_CLEARINT); ++ } ++} ++ ++static u32 tg3_read_indirect_mbox(struct tg3 *tp, u32 off) ++{ ++ unsigned long flags; ++ u32 val; ++ ++ spin_lock_irqsave(&tp->indirect_lock, flags); ++ pci_write_config_dword(tp->pdev, TG3PCI_REG_BASE_ADDR, off + 0x5600); ++ pci_read_config_dword(tp->pdev, TG3PCI_REG_DATA, &val); ++ spin_unlock_irqrestore(&tp->indirect_lock, flags); ++ return val; ++} ++ ++/* usec_wait specifies the wait time in usec when writing to certain registers ++ * where it is unsafe to read back the register without some delay. ++ * GRC_LOCAL_CTRL is one example if the GPIOs are toggled to switch power. ++ * TG3PCI_CLOCK_CTRL is another example if the clock frequencies are changed. ++ */ ++static void _tw32_flush(struct tg3 *tp, u32 off, u32 val, u32 usec_wait) ++{ ++ if (tg3_flag(tp, PCIX_TARGET_HWBUG) || tg3_flag(tp, ICH_WORKAROUND)) ++ /* Non-posted methods */ ++ tp->write32(tp, off, val); ++ else { ++ /* Posted method */ ++ tg3_write32(tp, off, val); ++ if (usec_wait) ++ udelay(usec_wait); ++ tp->read32(tp, off); ++ } ++ /* Wait again after the read for the posted method to guarantee that ++ * the wait time is met. ++ */ ++ if (usec_wait) ++ udelay(usec_wait); ++} ++ ++static inline void tw32_mailbox_flush(struct tg3 *tp, u32 off, u32 val) ++{ ++ tp->write32_mbox(tp, off, val); ++ if (tg3_flag(tp, FLUSH_POSTED_WRITES) || ++ (!tg3_flag(tp, MBOX_WRITE_REORDER) && ++ !tg3_flag(tp, ICH_WORKAROUND))) ++ tp->read32_mbox(tp, off); ++} ++ ++static void tg3_write32_tx_mbox(struct tg3 *tp, u32 off, u32 val) ++{ ++ void __iomem *mbox = tp->regs + off; ++ writel(val, mbox); ++ if (tg3_flag(tp, TXD_MBOX_HWBUG)) ++ writel(val, mbox); ++ if (tg3_flag(tp, MBOX_WRITE_REORDER) || ++ tg3_flag(tp, FLUSH_POSTED_WRITES)) ++ readl(mbox); ++} ++ ++static u32 tg3_read32_mbox_5906(struct tg3 *tp, u32 off) ++{ ++ return readl(tp->regs + off + GRCMBOX_BASE); ++} ++ ++static void tg3_write32_mbox_5906(struct tg3 *tp, u32 off, u32 val) ++{ ++ writel(val, tp->regs + off + GRCMBOX_BASE); ++} ++ ++#define tw32_mailbox(reg, val) tp->write32_mbox(tp, reg, val) ++#define tw32_mailbox_f(reg, val) tw32_mailbox_flush(tp, (reg), (val)) ++#define tw32_rx_mbox(reg, val) tp->write32_rx_mbox(tp, reg, val) ++#define tw32_tx_mbox(reg, val) tp->write32_tx_mbox(tp, reg, val) ++#define tr32_mailbox(reg) tp->read32_mbox(tp, reg) ++ ++#define tw32(reg, val) tp->write32(tp, reg, val) ++#define tw32_f(reg, val) _tw32_flush(tp, (reg), (val), 0) ++#define tw32_wait_f(reg, val, us) _tw32_flush(tp, (reg), (val), (us)) ++#define tr32(reg) tp->read32(tp, reg) ++ ++static void tg3_write_mem(struct tg3 *tp, u32 off, u32 val) ++{ ++ unsigned long flags; ++ ++ if (tg3_asic_rev(tp) == ASIC_REV_5906 && ++ (off >= NIC_SRAM_STATS_BLK) && (off < NIC_SRAM_TX_BUFFER_DESC)) ++ return; ++ ++ spin_lock_irqsave(&tp->indirect_lock, flags); ++ if (tg3_flag(tp, SRAM_USE_CONFIG)) { ++ pci_write_config_dword(tp->pdev, TG3PCI_MEM_WIN_BASE_ADDR, off); ++ pci_write_config_dword(tp->pdev, TG3PCI_MEM_WIN_DATA, val); ++ ++ /* Always leave this as zero. */ ++ pci_write_config_dword(tp->pdev, TG3PCI_MEM_WIN_BASE_ADDR, 0); ++ } else { ++ tw32_f(TG3PCI_MEM_WIN_BASE_ADDR, off); ++ tw32_f(TG3PCI_MEM_WIN_DATA, val); ++ ++ /* Always leave this as zero. */ ++ tw32_f(TG3PCI_MEM_WIN_BASE_ADDR, 0); ++ } ++ spin_unlock_irqrestore(&tp->indirect_lock, flags); ++} ++ ++static void tg3_read_mem(struct tg3 *tp, u32 off, u32 *val) ++{ ++ unsigned long flags; ++ ++ if (tg3_asic_rev(tp) == ASIC_REV_5906 && ++ (off >= NIC_SRAM_STATS_BLK) && (off < NIC_SRAM_TX_BUFFER_DESC)) { ++ *val = 0; ++ return; ++ } ++ ++ spin_lock_irqsave(&tp->indirect_lock, flags); ++ if (tg3_flag(tp, SRAM_USE_CONFIG)) { ++ pci_write_config_dword(tp->pdev, TG3PCI_MEM_WIN_BASE_ADDR, off); ++ pci_read_config_dword(tp->pdev, TG3PCI_MEM_WIN_DATA, val); ++ ++ /* Always leave this as zero. */ ++ pci_write_config_dword(tp->pdev, TG3PCI_MEM_WIN_BASE_ADDR, 0); ++ } else { ++ tw32_f(TG3PCI_MEM_WIN_BASE_ADDR, off); ++ *val = tr32(TG3PCI_MEM_WIN_DATA); ++ ++ /* Always leave this as zero. */ ++ tw32_f(TG3PCI_MEM_WIN_BASE_ADDR, 0); ++ } ++ spin_unlock_irqrestore(&tp->indirect_lock, flags); ++} ++ ++static void tg3_ape_lock_init(struct tg3 *tp) ++{ ++ int i; ++ u32 regbase, bit; ++ ++ if (tg3_asic_rev(tp) == ASIC_REV_5761) ++ regbase = TG3_APE_LOCK_GRANT; ++ else ++ regbase = TG3_APE_PER_LOCK_GRANT; ++ ++ /* Make sure the driver hasn't any stale locks. */ ++ for (i = TG3_APE_LOCK_PHY0; i <= TG3_APE_LOCK_GPIO; i++) { ++ switch (i) { ++ case TG3_APE_LOCK_PHY0: ++ case TG3_APE_LOCK_PHY1: ++ case TG3_APE_LOCK_PHY2: ++ case TG3_APE_LOCK_PHY3: ++ bit = APE_LOCK_GRANT_DRIVER; ++ break; ++ default: ++ if (!tp->pci_fn) ++ bit = APE_LOCK_GRANT_DRIVER; ++ else ++ bit = 1 << tp->pci_fn; ++ } ++ tg3_ape_write32(tp, regbase + 4 * i, bit); ++ } ++ ++} ++ ++static int tg3_ape_lock(struct tg3 *tp, int locknum) ++{ ++ int i, off; ++ int ret = 0; ++ u32 status, req, gnt, bit; ++ ++ if (!tg3_flag(tp, ENABLE_APE)) ++ return 0; ++ ++ switch (locknum) { ++ case TG3_APE_LOCK_GPIO: ++ if (tg3_asic_rev(tp) == ASIC_REV_5761) ++ return 0; ++ case TG3_APE_LOCK_GRC: ++ case TG3_APE_LOCK_MEM: ++ if (!tp->pci_fn) ++ bit = APE_LOCK_REQ_DRIVER; ++ else ++ bit = 1 << tp->pci_fn; ++ break; ++ case TG3_APE_LOCK_PHY0: ++ case TG3_APE_LOCK_PHY1: ++ case TG3_APE_LOCK_PHY2: ++ case TG3_APE_LOCK_PHY3: ++ bit = APE_LOCK_REQ_DRIVER; ++ break; ++ default: ++ return -EINVAL; ++ } ++ ++ if (tg3_asic_rev(tp) == ASIC_REV_5761) { ++ req = TG3_APE_LOCK_REQ; ++ gnt = TG3_APE_LOCK_GRANT; ++ } else { ++ req = TG3_APE_PER_LOCK_REQ; ++ gnt = TG3_APE_PER_LOCK_GRANT; ++ } ++ ++ off = 4 * locknum; ++ ++ tg3_ape_write32(tp, req + off, bit); ++ ++ /* Wait for up to 1 millisecond to acquire lock. */ ++ for (i = 0; i < 100; i++) { ++ status = tg3_ape_read32(tp, gnt + off); ++ if (status == bit) ++ break; ++ if (pci_channel_offline(tp->pdev)) ++ break; ++ ++ udelay(10); ++ } ++ ++ if (status != bit) { ++ /* Revoke the lock request. */ ++ tg3_ape_write32(tp, gnt + off, bit); ++ ret = -EBUSY; ++ } ++ ++ return ret; ++} ++ ++static void tg3_ape_unlock(struct tg3 *tp, int locknum) ++{ ++ u32 gnt, bit; ++ ++ if (!tg3_flag(tp, ENABLE_APE)) ++ return; ++ ++ switch (locknum) { ++ case TG3_APE_LOCK_GPIO: ++ if (tg3_asic_rev(tp) == ASIC_REV_5761) ++ return; ++ case TG3_APE_LOCK_GRC: ++ case TG3_APE_LOCK_MEM: ++ if (!tp->pci_fn) ++ bit = APE_LOCK_GRANT_DRIVER; ++ else ++ bit = 1 << tp->pci_fn; ++ break; ++ case TG3_APE_LOCK_PHY0: ++ case TG3_APE_LOCK_PHY1: ++ case TG3_APE_LOCK_PHY2: ++ case TG3_APE_LOCK_PHY3: ++ bit = APE_LOCK_GRANT_DRIVER; ++ break; ++ default: ++ return; ++ } ++ ++ if (tg3_asic_rev(tp) == ASIC_REV_5761) ++ gnt = TG3_APE_LOCK_GRANT; ++ else ++ gnt = TG3_APE_PER_LOCK_GRANT; ++ ++ tg3_ape_write32(tp, gnt + 4 * locknum, bit); ++} ++ ++static int tg3_ape_event_lock(struct tg3 *tp, u32 timeout_us) ++{ ++ u32 apedata; ++ ++ while (timeout_us) { ++ if (tg3_ape_lock(tp, TG3_APE_LOCK_MEM)) ++ return -EBUSY; ++ ++ apedata = tg3_ape_read32(tp, TG3_APE_EVENT_STATUS); ++ if (!(apedata & APE_EVENT_STATUS_EVENT_PENDING)) ++ break; ++ ++ tg3_ape_unlock(tp, TG3_APE_LOCK_MEM); ++ ++#if defined(__VMKLNX__) || (LINUX_VERSION_CODE < 0x020627) /* 2.6.39 */ ++ udelay(10); ++#else ++ usleep_range(10, 20); ++#endif ++ timeout_us -= (timeout_us > 10) ? 10 : timeout_us; ++ } ++ ++ return timeout_us ? 0 : -EBUSY; ++} ++ ++/* ESX needs tg3_ape_scratchpad_read for FW dump for ESX 5.5 and after */ ++#if (IS_ENABLED(CONFIG_HWMON) && !defined(__VMKLNX__)) || \ ++ (defined(__VMKLNX__) && VMWARE_ESX_DDK_VERSION >= 55000) ++static int tg3_ape_wait_for_event(struct tg3 *tp, u32 timeout_us) ++{ ++ u32 i, apedata; ++ ++ for (i = 0; i < timeout_us / 10; i++) { ++ apedata = tg3_ape_read32(tp, TG3_APE_EVENT_STATUS); ++ ++ if (!(apedata & APE_EVENT_STATUS_EVENT_PENDING)) ++ break; ++ ++ udelay(10); ++ } ++ ++ return i == timeout_us / 10; ++} ++ ++static int tg3_ape_scratchpad_read(struct tg3 *tp, u32 *data, u32 base_off, ++ u32 len) ++{ ++ int err; ++ u32 i, bufoff, msgoff, maxlen, apedata; ++ ++ if (!tg3_flag(tp, APE_HAS_NCSI)) ++ return 0; ++ ++ apedata = tg3_ape_read32(tp, TG3_APE_SEG_SIG); ++ if (apedata != APE_SEG_SIG_MAGIC) ++ return -ENODEV; ++ ++ apedata = tg3_ape_read32(tp, TG3_APE_FW_STATUS); ++ if (!(apedata & APE_FW_STATUS_READY)) ++ return -EAGAIN; ++ ++ bufoff = tg3_ape_read32(tp, TG3_APE_SEG_MSG_BUF_OFF) + ++ TG3_APE_SHMEM_BASE; ++ msgoff = bufoff + 2 * sizeof(u32); ++ maxlen = tg3_ape_read32(tp, TG3_APE_SEG_MSG_BUF_LEN); ++ ++ while (len) { ++ u32 length; ++ ++ /* Cap xfer sizes to scratchpad limits. */ ++ length = (len > maxlen) ? maxlen : len; ++ len -= length; ++ ++ apedata = tg3_ape_read32(tp, TG3_APE_FW_STATUS); ++ if (!(apedata & APE_FW_STATUS_READY)) ++ return -EAGAIN; ++ ++ /* Wait for up to 1 msec for APE to service previous event. */ ++ err = tg3_ape_event_lock(tp, 1000); ++ if (err) ++ return err; ++ ++ apedata = APE_EVENT_STATUS_DRIVER_EVNT | ++ APE_EVENT_STATUS_SCRTCHPD_READ | ++ APE_EVENT_STATUS_EVENT_PENDING; ++ tg3_ape_write32(tp, TG3_APE_EVENT_STATUS, apedata); ++ ++ tg3_ape_write32(tp, bufoff, base_off); ++ tg3_ape_write32(tp, bufoff + sizeof(u32), length); ++ ++ tg3_ape_unlock(tp, TG3_APE_LOCK_MEM); ++ tg3_ape_write32(tp, TG3_APE_EVENT, APE_EVENT_1); ++ ++ base_off += length; ++ ++ if (tg3_ape_wait_for_event(tp, 30000)) ++ return -EAGAIN; ++ ++ for (i = 0; length; i += 4, length -= 4) { ++ u32 val = tg3_ape_read32(tp, msgoff + i); ++ memcpy(data, &val, sizeof(u32)); ++ data++; ++ } ++ } ++ ++ return 0; ++} ++#endif ++ ++static int tg3_ape_send_event(struct tg3 *tp, u32 event) ++{ ++ int err; ++ u32 apedata; ++ ++ apedata = tg3_ape_read32(tp, TG3_APE_SEG_SIG); ++ if (apedata != APE_SEG_SIG_MAGIC) ++ return -EAGAIN; ++ ++ apedata = tg3_ape_read32(tp, TG3_APE_FW_STATUS); ++ if (!(apedata & APE_FW_STATUS_READY)) ++ return -EAGAIN; ++ ++ /* Wait for up to 20 millisecond for APE to service previous event. */ ++ err = tg3_ape_event_lock(tp, 20000); ++ if (err) ++ return err; ++ ++ tg3_ape_write32(tp, TG3_APE_EVENT_STATUS, ++ event | APE_EVENT_STATUS_EVENT_PENDING); ++ ++ tg3_ape_unlock(tp, TG3_APE_LOCK_MEM); ++ tg3_ape_write32(tp, TG3_APE_EVENT, APE_EVENT_1); ++ ++ return 0; ++} ++ ++static void tg3_ape_driver_state_change(struct tg3 *tp, int kind) ++{ ++ u32 event; ++ u32 apedata; ++ ++ if (!tg3_flag(tp, ENABLE_APE)) ++ return; ++ ++ switch (kind) { ++ case RESET_KIND_INIT: ++ tg3_ape_write32(tp, TG3_APE_HOST_HEARTBEAT_COUNT, tp->ape_hb++); ++ tg3_ape_write32(tp, TG3_APE_HOST_SEG_SIG, ++ APE_HOST_SEG_SIG_MAGIC); ++ tg3_ape_write32(tp, TG3_APE_HOST_SEG_LEN, ++ APE_HOST_SEG_LEN_MAGIC); ++ apedata = tg3_ape_read32(tp, TG3_APE_HOST_INIT_COUNT); ++ tg3_ape_write32(tp, TG3_APE_HOST_INIT_COUNT, ++apedata); ++ tg3_ape_write32(tp, TG3_APE_HOST_DRIVER_ID, ++ APE_HOST_DRIVER_ID_MAGIC(TG3_MAJ_NUM, ++ TG3_MIN_NUM, ++ TG3_REVISION[0])); ++ tg3_ape_write32(tp, TG3_APE_HOST_BEHAVIOR, ++ APE_HOST_BEHAV_NO_PHYLOCK); ++ tg3_ape_write32(tp, TG3_APE_HOST_DRVR_STATE, ++ TG3_APE_HOST_DRVR_STATE_START); ++ ++ event = APE_EVENT_STATUS_STATE_START; ++ break; ++ case RESET_KIND_SHUTDOWN: ++ if (device_may_wakeup(&tp->pdev->dev) && ++ tg3_flag(tp, WOL_ENABLE)) { ++ tg3_ape_write32(tp, TG3_APE_HOST_WOL_SPEED, ++ TG3_APE_HOST_WOL_SPEED_AUTO); ++ apedata = TG3_APE_HOST_DRVR_STATE_WOL; ++ } else ++ apedata = TG3_APE_HOST_DRVR_STATE_UNLOAD; ++ ++ tg3_ape_write32(tp, TG3_APE_HOST_DRVR_STATE, apedata); ++ ++ event = APE_EVENT_STATUS_STATE_UNLOAD; ++ break; ++ default: ++ return; ++ } ++ ++ event |= APE_EVENT_STATUS_DRIVER_EVNT | APE_EVENT_STATUS_STATE_CHNGE; ++ ++ tg3_ape_send_event(tp, event); ++} ++ ++static void tg3_disable_ints(struct tg3 *tp) ++{ ++ int i; ++ ++ tw32(TG3PCI_MISC_HOST_CTRL, ++ (tp->misc_host_ctrl | MISC_HOST_CTRL_MASK_PCI_INT)); ++ for (i = 0; i < tp->irq_max; i++) ++ tw32_mailbox_f(tp->napi[i].int_mbox, 0x00000001); ++} ++ ++static void tg3_enable_ints(struct tg3 *tp) ++{ ++ int i; ++ ++ tp->irq_sync = 0; ++ wmb(); ++ ++ tw32(TG3PCI_MISC_HOST_CTRL, ++ (tp->misc_host_ctrl & ~MISC_HOST_CTRL_MASK_PCI_INT)); ++ ++ tp->coal_now = tp->coalesce_mode | HOSTCC_MODE_ENABLE; ++ for (i = 0; i < tp->irq_cnt; i++) { ++ struct tg3_napi *tnapi = &tp->napi[i]; ++ ++ tw32_mailbox_f(tnapi->int_mbox, tnapi->last_tag << 24); ++ if (tg3_flag(tp, 1SHOT_MSI)) ++ tw32_mailbox_f(tnapi->int_mbox, tnapi->last_tag << 24); ++ ++ tp->coal_now |= tnapi->coal_now; ++ } ++ ++ /* Force an initial interrupt */ ++ if (!tg3_flag(tp, TAGGED_STATUS) && ++#if defined(__VMKLNX__) ++ tp->napi[0].hw_status && ++#endif ++ (tp->napi[0].hw_status->status & SD_STATUS_UPDATED)) ++ tw32(GRC_LOCAL_CTRL, tp->grc_local_ctrl | GRC_LCLCTRL_SETINT); ++ else ++ tw32(HOSTCC_MODE, tp->coal_now); ++ ++#ifndef TG3_INBOX ++ if (tp->irq_cnt > 1) ++ tp->coal_now &= ~(tp->napi[0].coal_now | tp->napi[1].coal_now); ++ else ++ tp->coal_now &= ~(tp->napi[0].coal_now); ++#else ++ tp->coal_now &= ~(tp->napi[0].coal_now); ++#endif ++} ++ ++static inline unsigned int tg3_has_work(struct tg3_napi *tnapi) ++{ ++ struct tg3 *tp = tnapi->tp; ++ struct tg3_hw_status *sblk = tnapi->hw_status; ++ unsigned int work_exists = 0; ++ ++ /* check for phy events */ ++ if (!(tg3_flag(tp, USE_LINKCHG_REG) || tg3_flag(tp, POLL_SERDES))) { ++ if (sblk->status & SD_STATUS_LINK_CHG) ++ work_exists = 1; ++ } ++ ++ /* check for TX work to do */ ++ if (sblk->idx[0].tx_consumer != tnapi->tx_cons) ++ work_exists = 1; ++ ++ /* check for RX work to do */ ++ if (tnapi->rx_rcb_prod_idx && ++ *(tnapi->rx_rcb_prod_idx) != tnapi->rx_rcb_ptr) ++ work_exists = 1; ++ ++ return work_exists; ++} ++ ++/* tg3_int_reenable ++ * similar to tg3_enable_ints, but it accurately determines whether there ++ * is new work pending and can return without flushing the PIO write ++ * which reenables interrupts ++ */ ++static void tg3_int_reenable(struct tg3_napi *tnapi) ++{ ++ struct tg3 *tp = tnapi->tp; ++ ++ tw32_mailbox(tnapi->int_mbox, tnapi->last_tag << 24); ++ mmiowb(); ++ ++ /* When doing tagged status, this work check is unnecessary. ++ * The last_tag we write above tells the chip which piece of ++ * work we've completed. ++ */ ++ if (!tg3_flag(tp, TAGGED_STATUS) && tg3_has_work(tnapi)) ++ tw32(HOSTCC_MODE, tp->coalesce_mode | ++ HOSTCC_MODE_ENABLE | tnapi->coal_now); ++} ++ ++static void tg3_switch_clocks(struct tg3 *tp) ++{ ++ u32 clock_ctrl; ++ u32 orig_clock_ctrl; ++ ++ if (tg3_flag(tp, CPMU_PRESENT) || tg3_flag(tp, 5780_CLASS)) ++ return; ++ ++ clock_ctrl = tr32(TG3PCI_CLOCK_CTRL); ++ ++ orig_clock_ctrl = clock_ctrl; ++ clock_ctrl &= (CLOCK_CTRL_FORCE_CLKRUN | ++ CLOCK_CTRL_CLKRUN_OENABLE | ++ 0x1f); ++ tp->pci_clock_ctrl = clock_ctrl; ++ ++ if (tg3_flag(tp, 5705_PLUS)) { ++ if (orig_clock_ctrl & CLOCK_CTRL_625_CORE) { ++ tw32_wait_f(TG3PCI_CLOCK_CTRL, ++ clock_ctrl | CLOCK_CTRL_625_CORE, 40); ++ } ++ } else if ((orig_clock_ctrl & CLOCK_CTRL_44MHZ_CORE) != 0) { ++ tw32_wait_f(TG3PCI_CLOCK_CTRL, ++ clock_ctrl | ++ (CLOCK_CTRL_44MHZ_CORE | CLOCK_CTRL_ALTCLK), ++ 40); ++ tw32_wait_f(TG3PCI_CLOCK_CTRL, ++ clock_ctrl | (CLOCK_CTRL_ALTCLK), ++ 40); ++ } ++ tw32_wait_f(TG3PCI_CLOCK_CTRL, clock_ctrl, 40); ++} ++ ++#define PHY_BUSY_LOOPS 5000 ++ ++static int __tg3_readphy(struct tg3 *tp, unsigned int phy_addr, int reg, ++ u32 *val) ++{ ++ u32 frame_val; ++ unsigned int loops; ++ int ret; ++ ++ if ((tp->mi_mode & MAC_MI_MODE_AUTO_POLL) != 0) { ++ tw32_f(MAC_MI_MODE, ++ (tp->mi_mode & ~MAC_MI_MODE_AUTO_POLL)); ++ udelay(80); ++ } ++ ++ tg3_ape_lock(tp, tp->phy_ape_lock); ++ ++ *val = 0x0; ++ ++ frame_val = ((phy_addr << MI_COM_PHY_ADDR_SHIFT) & ++ MI_COM_PHY_ADDR_MASK); ++ frame_val |= ((reg << MI_COM_REG_ADDR_SHIFT) & ++ MI_COM_REG_ADDR_MASK); ++ frame_val |= (MI_COM_CMD_READ | MI_COM_START); ++ ++ tw32_f(MAC_MI_COM, frame_val); ++ ++ loops = PHY_BUSY_LOOPS; ++ while (loops != 0) { ++ udelay(10); ++ frame_val = tr32(MAC_MI_COM); ++ ++ if ((frame_val & MI_COM_BUSY) == 0) { ++ udelay(5); ++ frame_val = tr32(MAC_MI_COM); ++ break; ++ } ++ loops -= 1; ++ } ++ ++ ret = -EBUSY; ++ if (loops != 0) { ++ *val = frame_val & MI_COM_DATA_MASK; ++ ret = 0; ++ } ++ ++ if ((tp->mi_mode & MAC_MI_MODE_AUTO_POLL) != 0) { ++ tw32_f(MAC_MI_MODE, tp->mi_mode); ++ udelay(80); ++ } ++ ++ tg3_ape_unlock(tp, tp->phy_ape_lock); ++ ++ return ret; ++} ++ ++static int tg3_readphy(struct tg3 *tp, int reg, u32 *val) ++{ ++ return __tg3_readphy(tp, tp->phy_addr, reg, val); ++} ++ ++static int __tg3_writephy(struct tg3 *tp, unsigned int phy_addr, int reg, ++ u32 val) ++{ ++ u32 frame_val; ++ unsigned int loops; ++ int ret; ++ ++ if ((tp->phy_flags & TG3_PHYFLG_IS_FET) && ++ (reg == MII_CTRL1000 || reg == MII_TG3_AUX_CTRL)) ++ return 0; ++ ++ if ((tp->mi_mode & MAC_MI_MODE_AUTO_POLL) != 0) { ++ tw32_f(MAC_MI_MODE, ++ (tp->mi_mode & ~MAC_MI_MODE_AUTO_POLL)); ++ udelay(80); ++ } ++ ++ tg3_ape_lock(tp, tp->phy_ape_lock); ++ ++ frame_val = ((phy_addr << MI_COM_PHY_ADDR_SHIFT) & ++ MI_COM_PHY_ADDR_MASK); ++ frame_val |= ((reg << MI_COM_REG_ADDR_SHIFT) & ++ MI_COM_REG_ADDR_MASK); ++ frame_val |= (val & MI_COM_DATA_MASK); ++ frame_val |= (MI_COM_CMD_WRITE | MI_COM_START); ++ ++ tw32_f(MAC_MI_COM, frame_val); ++ ++ loops = PHY_BUSY_LOOPS; ++ while (loops != 0) { ++ udelay(10); ++ frame_val = tr32(MAC_MI_COM); ++ if ((frame_val & MI_COM_BUSY) == 0) { ++ udelay(5); ++ frame_val = tr32(MAC_MI_COM); ++ break; ++ } ++ loops -= 1; ++ } ++ ++ ret = -EBUSY; ++ if (loops != 0) ++ ret = 0; ++ ++ if ((tp->mi_mode & MAC_MI_MODE_AUTO_POLL) != 0) { ++ tw32_f(MAC_MI_MODE, tp->mi_mode); ++ udelay(80); ++ } ++ ++ tg3_ape_unlock(tp, tp->phy_ape_lock); ++ ++ return ret; ++} ++ ++static int tg3_writephy(struct tg3 *tp, int reg, u32 val) ++{ ++ return __tg3_writephy(tp, tp->phy_addr, reg, val); ++} ++ ++static int tg3_phy_cl45_write(struct tg3 *tp, u32 devad, u32 addr, u32 val) ++{ ++ int err; ++ ++ err = tg3_writephy(tp, MII_TG3_MMD_CTRL, devad); ++ if (err) ++ goto done; ++ ++ err = tg3_writephy(tp, MII_TG3_MMD_ADDRESS, addr); ++ if (err) ++ goto done; ++ ++ err = tg3_writephy(tp, MII_TG3_MMD_CTRL, ++ MII_TG3_MMD_CTRL_DATA_NOINC | devad); ++ if (err) ++ goto done; ++ ++ err = tg3_writephy(tp, MII_TG3_MMD_ADDRESS, val); ++ ++done: ++ return err; ++} ++ ++static int tg3_phy_cl45_read(struct tg3 *tp, u32 devad, u32 addr, u32 *val) ++{ ++ int err; ++ ++ err = tg3_writephy(tp, MII_TG3_MMD_CTRL, devad); ++ if (err) ++ goto done; ++ ++ err = tg3_writephy(tp, MII_TG3_MMD_ADDRESS, addr); ++ if (err) ++ goto done; ++ ++ err = tg3_writephy(tp, MII_TG3_MMD_CTRL, ++ MII_TG3_MMD_CTRL_DATA_NOINC | devad); ++ if (err) ++ goto done; ++ ++ err = tg3_readphy(tp, MII_TG3_MMD_ADDRESS, val); ++ ++done: ++ return err; ++} ++ ++static int tg3_phydsp_read(struct tg3 *tp, u32 reg, u32 *val) ++{ ++ int err; ++ ++ err = tg3_writephy(tp, MII_TG3_DSP_ADDRESS, reg); ++ if (!err) ++ err = tg3_readphy(tp, MII_TG3_DSP_RW_PORT, val); ++ ++ return err; ++} ++ ++static int tg3_phydsp_write(struct tg3 *tp, u32 reg, u32 val) ++{ ++ int err; ++ ++ err = tg3_writephy(tp, MII_TG3_DSP_ADDRESS, reg); ++ if (!err) ++ err = tg3_writephy(tp, MII_TG3_DSP_RW_PORT, val); ++ ++ return err; ++} ++ ++static int tg3_phy_auxctl_read(struct tg3 *tp, int reg, u32 *val) ++{ ++ int err; ++ ++ err = tg3_writephy(tp, MII_TG3_AUX_CTRL, ++ (reg << MII_TG3_AUXCTL_MISC_RDSEL_SHIFT) | ++ MII_TG3_AUXCTL_SHDWSEL_MISC); ++ if (!err) ++ err = tg3_readphy(tp, MII_TG3_AUX_CTRL, val); ++ ++ return err; ++} ++ ++static int tg3_phy_auxctl_write(struct tg3 *tp, int reg, u32 set) ++{ ++ if (reg == MII_TG3_AUXCTL_SHDWSEL_MISC) ++ set |= MII_TG3_AUXCTL_MISC_WREN; ++ ++ return tg3_writephy(tp, MII_TG3_AUX_CTRL, set | reg); ++} ++ ++static int tg3_phy_toggle_auxctl_smdsp(struct tg3 *tp, bool enable) ++{ ++ u32 val; ++ int err; ++ ++ err = tg3_phy_auxctl_read(tp, MII_TG3_AUXCTL_SHDWSEL_AUXCTL, &val); ++ ++ if (err) ++ return err; ++ ++ if (enable) ++ val |= MII_TG3_AUXCTL_ACTL_SMDSP_ENA; ++ else ++ val &= ~MII_TG3_AUXCTL_ACTL_SMDSP_ENA; ++ ++ err = tg3_phy_auxctl_write((tp), MII_TG3_AUXCTL_SHDWSEL_AUXCTL, ++ val | MII_TG3_AUXCTL_ACTL_TX_6DB); ++ ++ return err; ++} ++ ++static int tg3_phy_shdw_read(struct tg3 *tp, int reg, u32 *val) ++{ ++ int err; ++ ++ err = tg3_writephy(tp, MII_TG3_MISC_SHDW, reg); ++ if (!err) ++ err = tg3_readphy(tp, MII_TG3_MISC_SHDW, val); ++ ++ return err; ++} ++ ++static int tg3_phy_shdw_write(struct tg3 *tp, int reg, u32 val) ++{ ++ return tg3_writephy(tp, MII_TG3_MISC_SHDW, ++ reg | val | MII_TG3_MISC_SHDW_WREN); ++} ++ ++static int tg3_bmcr_reset(struct tg3 *tp) ++{ ++ u32 phy_control; ++ int limit, err; ++ ++ /* OK, reset it, and poll the BMCR_RESET bit until it ++ * clears or we time out. ++ */ ++ phy_control = BMCR_RESET; ++ err = tg3_writephy(tp, MII_BMCR, phy_control); ++ if (err != 0) ++ return -EBUSY; ++ ++ limit = 5000; ++ while (limit--) { ++ err = tg3_readphy(tp, MII_BMCR, &phy_control); ++ if (err != 0) ++ return -EBUSY; ++ ++ if ((phy_control & BMCR_RESET) == 0) { ++ udelay(40); ++ break; ++ } ++ udelay(10); ++ } ++ if (limit < 0) ++ return -EBUSY; ++ ++ return 0; ++} ++ ++#ifdef BCM_INCLUDE_PHYLIB_SUPPORT ++static int tg3_mdio_read(struct mii_bus *bp, int mii_id, int reg) ++{ ++ struct tg3 *tp = bp->priv; ++ u32 val; ++ ++ spin_lock_bh(&tp->lock); ++ ++ if (__tg3_readphy(tp, mii_id, reg, &val)) ++ val = -EIO; ++ ++ spin_unlock_bh(&tp->lock); ++ ++ return val; ++} ++ ++static int tg3_mdio_write(struct mii_bus *bp, int mii_id, int reg, u16 val) ++{ ++ struct tg3 *tp = bp->priv; ++ u32 ret = 0; ++ ++ spin_lock_bh(&tp->lock); ++ ++ if (__tg3_writephy(tp, mii_id, reg, val)) ++ ret = -EIO; ++ ++ spin_unlock_bh(&tp->lock); ++ ++ return ret; ++} ++ ++static int tg3_mdio_reset(struct mii_bus *bp) ++{ ++ return 0; ++} ++#endif /* BCM_INCLUDE_PHYLIB_SUPPORT */ ++ ++static void tg3_mdio_config_5785(struct tg3 *tp) ++{ ++ u32 val; ++#ifdef BCM_INCLUDE_PHYLIB_SUPPORT ++ struct phy_device *phydev; ++ ++ phydev = tp->mdio_bus->phy_map[tp->phy_addr]; ++ switch (phydev->drv->phy_id & phydev->drv->phy_id_mask) { ++ case PHY_ID_BCM50610: ++ case PHY_ID_BCM50610M: ++ case PHY_ID_BCM50612E: ++ val = MAC_PHYCFG2_50610_LED_MODES; ++ break; ++ case PHY_ID_BCMAC131: ++ val = MAC_PHYCFG2_AC131_LED_MODES; ++ break; ++ case PHY_ID_RTL8211C: ++ val = MAC_PHYCFG2_RTL8211C_LED_MODES; ++ break; ++ case PHY_ID_RTL8201E: ++ val = MAC_PHYCFG2_RTL8201E_LED_MODES; ++ break; ++ default: ++ return; ++ } ++ ++ if (phydev->interface != PHY_INTERFACE_MODE_RGMII) { ++ tw32(MAC_PHYCFG2, val); ++ ++ val = tr32(MAC_PHYCFG1); ++ val &= ~(MAC_PHYCFG1_RGMII_INT | ++ MAC_PHYCFG1_RXCLK_TO_MASK | MAC_PHYCFG1_TXCLK_TO_MASK); ++ val |= MAC_PHYCFG1_RXCLK_TIMEOUT | MAC_PHYCFG1_TXCLK_TIMEOUT; ++ tw32(MAC_PHYCFG1, val); ++ ++ return; ++ } ++#else ++ if ((tp->phy_id & TG3_PHY_ID_MASK) == TG3_PHY_ID_BCMAC131) { ++ tw32(MAC_PHYCFG2, MAC_PHYCFG2_AC131_LED_MODES); ++ ++ val = tr32(MAC_PHYCFG1); ++ val &= ~(MAC_PHYCFG1_RGMII_INT | ++ MAC_PHYCFG1_RXCLK_TO_MASK | MAC_PHYCFG1_TXCLK_TO_MASK); ++ val |= MAC_PHYCFG1_RXCLK_TIMEOUT | MAC_PHYCFG1_TXCLK_TIMEOUT; ++ tw32(MAC_PHYCFG1, val); ++ ++ return; ++ } ++ ++ val = MAC_PHYCFG2_50610_LED_MODES; ++#endif /* BCM_INCLUDE_PHYLIB_SUPPORT */ ++ ++ if (!tg3_flag(tp, RGMII_INBAND_DISABLE)) ++ val |= MAC_PHYCFG2_EMODE_MASK_MASK | ++ MAC_PHYCFG2_FMODE_MASK_MASK | ++ MAC_PHYCFG2_GMODE_MASK_MASK | ++ MAC_PHYCFG2_ACT_MASK_MASK | ++ MAC_PHYCFG2_QUAL_MASK_MASK | ++ MAC_PHYCFG2_INBAND_ENABLE; ++ ++ tw32(MAC_PHYCFG2, val); ++ ++ val = tr32(MAC_PHYCFG1); ++ val &= ~(MAC_PHYCFG1_RXCLK_TO_MASK | MAC_PHYCFG1_TXCLK_TO_MASK | ++ MAC_PHYCFG1_RGMII_EXT_RX_DEC | MAC_PHYCFG1_RGMII_SND_STAT_EN); ++ if (!tg3_flag(tp, RGMII_INBAND_DISABLE)) { ++ if (tg3_flag(tp, RGMII_EXT_IBND_RX_EN)) ++ val |= MAC_PHYCFG1_RGMII_EXT_RX_DEC; ++ if (tg3_flag(tp, RGMII_EXT_IBND_TX_EN)) ++ val |= MAC_PHYCFG1_RGMII_SND_STAT_EN; ++ } ++ val |= MAC_PHYCFG1_RXCLK_TIMEOUT | MAC_PHYCFG1_TXCLK_TIMEOUT | ++ MAC_PHYCFG1_RGMII_INT | MAC_PHYCFG1_TXC_DRV; ++ tw32(MAC_PHYCFG1, val); ++ ++ val = tr32(MAC_EXT_RGMII_MODE); ++ val &= ~(MAC_RGMII_MODE_RX_INT_B | ++ MAC_RGMII_MODE_RX_QUALITY | ++ MAC_RGMII_MODE_RX_ACTIVITY | ++ MAC_RGMII_MODE_RX_ENG_DET | ++ MAC_RGMII_MODE_TX_ENABLE | ++ MAC_RGMII_MODE_TX_LOWPWR | ++ MAC_RGMII_MODE_TX_RESET); ++ if (!tg3_flag(tp, RGMII_INBAND_DISABLE)) { ++ if (tg3_flag(tp, RGMII_EXT_IBND_RX_EN)) ++ val |= MAC_RGMII_MODE_RX_INT_B | ++ MAC_RGMII_MODE_RX_QUALITY | ++ MAC_RGMII_MODE_RX_ACTIVITY | ++ MAC_RGMII_MODE_RX_ENG_DET; ++ if (tg3_flag(tp, RGMII_EXT_IBND_TX_EN)) ++ val |= MAC_RGMII_MODE_TX_ENABLE | ++ MAC_RGMII_MODE_TX_LOWPWR | ++ MAC_RGMII_MODE_TX_RESET; ++ } ++ tw32(MAC_EXT_RGMII_MODE, val); ++} ++ ++static void tg3_mdio_start(struct tg3 *tp) ++{ ++ tp->mi_mode &= ~MAC_MI_MODE_AUTO_POLL; ++ tw32_f(MAC_MI_MODE, tp->mi_mode); ++ udelay(80); ++ ++#ifdef BCM_INCLUDE_PHYLIB_SUPPORT ++ if (tg3_flag(tp, MDIOBUS_INITED) && ++ tg3_asic_rev(tp) == ASIC_REV_5785) ++ tg3_mdio_config_5785(tp); ++#else ++ if (tg3_asic_rev(tp) != ASIC_REV_5785) ++ return; ++ ++ tg3_mdio_config_5785(tp); ++ ++ if (!(tp->phy_flags & TG3_PHYFLG_IS_FET)) { ++ u32 val; ++ ++ /* FIXME -- This shouldn't be required, but without ++ * it, the device will not pass traffic until ++ * the phy is reset via a link up event or ++ * through a change in speed settings. ++ */ ++ tg3_phy_auxctl_read(tp, MII_TG3_AUXCTL_SHDWSEL_MISC, &val); ++ if (tg3_flag(tp, RGMII_INBAND_DISABLE)) ++ val |= MII_TG3_AUXCTL_MISC_RGMII_OOBSC; ++ else ++ val &= ~MII_TG3_AUXCTL_MISC_RGMII_OOBSC; ++ tg3_phy_auxctl_write(tp, MII_TG3_AUXCTL_SHDWSEL_MISC, val); ++ } ++#endif /* BCM_INCLUDE_PHYLIB_SUPPORT */ ++} ++ ++static int tg3_mdio_init(struct tg3 *tp) ++{ ++#ifdef BCM_INCLUDE_PHYLIB_SUPPORT ++ int i; ++ u32 reg; ++ struct phy_device *phydev; ++#endif ++ ++ if (tg3_flag(tp, 5717_PLUS)) { ++ u32 is_serdes; ++ ++ tp->phy_addr = tp->pci_fn + 1; ++ ++ if (tg3_chip_rev_id(tp) != CHIPREV_ID_5717_A0) ++ is_serdes = tr32(SG_DIG_STATUS) & SG_DIG_IS_SERDES; ++ else ++ is_serdes = tr32(TG3_CPMU_PHY_STRAP) & ++ TG3_CPMU_PHY_STRAP_IS_SERDES; ++ if (is_serdes) ++ tp->phy_addr += 7; ++ } else if (tg3_flag(tp, IS_SSB_CORE) && tg3_flag(tp, ROBOSWITCH)) { ++ int addr; ++ ++ addr = ssb_gige_get_phyaddr(tp->pdev); ++ if (addr < 0) ++ return addr; ++ tp->phy_addr = addr; ++ } else ++ tp->phy_addr = TG3_PHY_MII_ADDR; ++ ++ tg3_mdio_start(tp); ++ ++#ifdef BCM_INCLUDE_PHYLIB_SUPPORT ++ if (!tg3_flag(tp, USE_PHYLIB) || tg3_flag(tp, MDIOBUS_INITED)) ++ return 0; ++ ++ tp->mdio_bus = mdiobus_alloc(); ++ if (tp->mdio_bus == NULL) ++ return -ENOMEM; ++ ++ tp->mdio_bus->name = "tg3 mdio bus"; ++#ifdef MII_BUS_ID_SIZE ++ snprintf(tp->mdio_bus->id, MII_BUS_ID_SIZE, "%x", ++ (tp->pdev->bus->number << 8) | tp->pdev->devfn); ++#else ++ tp->mdio_bus->id = tp->pdev->devfn; ++#endif ++ tp->mdio_bus->priv = tp; ++#ifdef BCM_MDIOBUS_HAS_PARENT ++ tp->mdio_bus->parent = &tp->pdev->dev; ++#endif ++ tp->mdio_bus->read = &tg3_mdio_read; ++ tp->mdio_bus->write = &tg3_mdio_write; ++ tp->mdio_bus->reset = &tg3_mdio_reset; ++ tp->mdio_bus->phy_mask = ~(1 << tp->phy_addr); ++ tp->mdio_bus->irq = &tp->mdio_irq[0]; ++ ++ for (i = 0; i < PHY_MAX_ADDR; i++) ++ tp->mdio_bus->irq[i] = PHY_POLL; ++ ++ /* The bus registration will look for all the PHYs on the mdio bus. ++ * Unfortunately, it does not ensure the PHY is powered up before ++ * accessing the PHY ID registers. A chip reset is the ++ * quickest way to bring the device back to an operational state.. ++ */ ++ if (tg3_readphy(tp, MII_BMCR, ®) || (reg & BMCR_PDOWN)) ++ tg3_bmcr_reset(tp); ++ ++ i = mdiobus_register(tp->mdio_bus); ++ if (i) { ++ dev_warn(&tp->pdev->dev, "mdiobus_reg failed (0x%x)\n", i); ++ mdiobus_free(tp->mdio_bus); ++ return i; ++ } ++ ++ phydev = tp->mdio_bus->phy_map[tp->phy_addr]; ++ ++ if (!phydev || !phydev->drv) { ++ dev_warn(&tp->pdev->dev, "No PHY devices\n"); ++ mdiobus_unregister(tp->mdio_bus); ++ mdiobus_free(tp->mdio_bus); ++ return -ENODEV; ++ } ++ ++ switch (phydev->drv->phy_id & phydev->drv->phy_id_mask) { ++ case PHY_ID_BCM57780: ++ phydev->interface = PHY_INTERFACE_MODE_GMII; ++ phydev->dev_flags |= PHY_BRCM_AUTO_PWRDWN_ENABLE; ++ break; ++ case PHY_ID_BCM50610: ++ case PHY_ID_BCM50610M: ++ case PHY_ID_BCM50612E: ++ phydev->dev_flags |= PHY_BRCM_CLEAR_RGMII_MODE | ++ PHY_BRCM_RX_REFCLK_UNUSED | ++ PHY_BRCM_DIS_TXCRXC_NOENRGY | ++ PHY_BRCM_AUTO_PWRDWN_ENABLE; ++ if (tg3_flag(tp, RGMII_INBAND_DISABLE)) ++ phydev->dev_flags |= PHY_BRCM_STD_IBND_DISABLE; ++ if (tg3_flag(tp, RGMII_EXT_IBND_RX_EN)) ++ phydev->dev_flags |= PHY_BRCM_EXT_IBND_RX_ENABLE; ++ if (tg3_flag(tp, RGMII_EXT_IBND_TX_EN)) ++ phydev->dev_flags |= PHY_BRCM_EXT_IBND_TX_ENABLE; ++ /* fallthru */ ++ case PHY_ID_RTL8211C: ++ phydev->interface = PHY_INTERFACE_MODE_RGMII; ++ break; ++ case PHY_ID_RTL8201E: ++ case PHY_ID_BCMAC131: ++ phydev->interface = PHY_INTERFACE_MODE_MII; ++ phydev->dev_flags |= PHY_BRCM_AUTO_PWRDWN_ENABLE; ++ tp->phy_flags |= TG3_PHYFLG_IS_FET; ++ break; ++ } ++ ++ tg3_flag_set(tp, MDIOBUS_INITED); ++ ++ if (tg3_asic_rev(tp) == ASIC_REV_5785) ++ tg3_mdio_config_5785(tp); ++#endif /* BCM_INCLUDE_PHYLIB_SUPPORT */ ++ ++ return 0; ++} ++ ++static void tg3_mdio_fini(struct tg3 *tp) ++{ ++#ifdef BCM_INCLUDE_PHYLIB_SUPPORT ++ if (tg3_flag(tp, MDIOBUS_INITED)) { ++ tg3_flag_clear(tp, MDIOBUS_INITED); ++ mdiobus_unregister(tp->mdio_bus); ++ mdiobus_free(tp->mdio_bus); ++ } ++#endif /* BCM_INCLUDE_PHYLIB_SUPPORT */ ++} ++ ++/* tp->lock is held. */ ++static inline void tg3_generate_fw_event(struct tg3 *tp) ++{ ++ u32 val; ++ ++ val = tr32(GRC_RX_CPU_EVENT); ++ val |= GRC_RX_CPU_DRIVER_EVENT; ++ tw32_f(GRC_RX_CPU_EVENT, val); ++ ++ tp->last_event_jiffies = jiffies; ++} ++ ++#define TG3_FW_EVENT_TIMEOUT_USEC 2500 ++ ++/* tp->lock is held. */ ++static void tg3_wait_for_event_ack(struct tg3 *tp) ++{ ++ int i; ++ unsigned int delay_cnt; ++ long time_remain; ++ ++ /* If enough time has passed, no wait is necessary. */ ++ time_remain = (long)(tp->last_event_jiffies + 1 + ++ usecs_to_jiffies(TG3_FW_EVENT_TIMEOUT_USEC)) - ++ (long)jiffies; ++ if (time_remain < 0) ++ return; ++ ++ /* Check if we can shorten the wait time. */ ++ delay_cnt = jiffies_to_usecs(time_remain); ++ if (delay_cnt > TG3_FW_EVENT_TIMEOUT_USEC) ++ delay_cnt = TG3_FW_EVENT_TIMEOUT_USEC; ++ delay_cnt = (delay_cnt >> 3) + 1; ++ ++ for (i = 0; i < delay_cnt; i++) { ++ if (!(tr32(GRC_RX_CPU_EVENT) & GRC_RX_CPU_DRIVER_EVENT)) ++ break; ++ if (pci_channel_offline(tp->pdev)) ++ break; ++ ++ udelay(8); ++ } ++} ++ ++/* tp->lock is held. */ ++static void tg3_phy_gather_ump_data(struct tg3 *tp, u32 *data) ++{ ++ u32 reg, val; ++ ++ val = 0; ++ if (!tg3_readphy(tp, MII_BMCR, ®)) ++ val = reg << 16; ++ if (!tg3_readphy(tp, MII_BMSR, ®)) ++ val |= (reg & 0xffff); ++ *data++ = val; ++ ++ val = 0; ++ if (!tg3_readphy(tp, MII_ADVERTISE, ®)) ++ val = reg << 16; ++ if (!tg3_readphy(tp, MII_LPA, ®)) ++ val |= (reg & 0xffff); ++ *data++ = val; ++ ++ val = 0; ++ if (!(tp->phy_flags & TG3_PHYFLG_MII_SERDES)) { ++ if (!tg3_readphy(tp, MII_CTRL1000, ®)) ++ val = reg << 16; ++ if (!tg3_readphy(tp, MII_STAT1000, ®)) ++ val |= (reg & 0xffff); ++ } ++ *data++ = val; ++ ++ if (!tg3_readphy(tp, MII_PHYADDR, ®)) ++ val = reg << 16; ++ else ++ val = 0; ++ *data++ = val; ++} ++ ++/* tp->lock is held. */ ++static void tg3_ump_link_report(struct tg3 *tp) ++{ ++ u32 data[4]; ++ ++ if (!tg3_flag(tp, 5780_CLASS) || !tg3_flag(tp, ENABLE_ASF)) ++ return; ++ ++ tg3_phy_gather_ump_data(tp, data); ++ ++ tg3_wait_for_event_ack(tp); ++ ++ tg3_write_mem(tp, NIC_SRAM_FW_CMD_MBOX, FWCMD_NICDRV_LINK_UPDATE); ++ tg3_write_mem(tp, NIC_SRAM_FW_CMD_LEN_MBOX, 14); ++ tg3_write_mem(tp, NIC_SRAM_FW_CMD_DATA_MBOX + 0x0, data[0]); ++ tg3_write_mem(tp, NIC_SRAM_FW_CMD_DATA_MBOX + 0x4, data[1]); ++ tg3_write_mem(tp, NIC_SRAM_FW_CMD_DATA_MBOX + 0x8, data[2]); ++ tg3_write_mem(tp, NIC_SRAM_FW_CMD_DATA_MBOX + 0xc, data[3]); ++ ++ tg3_generate_fw_event(tp); ++} ++ ++/* tp->lock is held. */ ++static void tg3_stop_fw(struct tg3 *tp) ++{ ++ if (tg3_flag(tp, ENABLE_ASF) && !tg3_flag(tp, ENABLE_APE)) { ++ /* Wait for RX cpu to ACK the previous event. */ ++ tg3_wait_for_event_ack(tp); ++ ++ tg3_write_mem(tp, NIC_SRAM_FW_CMD_MBOX, FWCMD_NICDRV_PAUSE_FW); ++ ++ tg3_generate_fw_event(tp); ++ ++ /* Wait for RX cpu to ACK this event. */ ++ tg3_wait_for_event_ack(tp); ++ } ++} ++ ++/* tp->lock is held. */ ++static void tg3_write_sig_pre_reset(struct tg3 *tp, int kind) ++{ ++ tg3_write_mem(tp, NIC_SRAM_FIRMWARE_MBOX, ++ NIC_SRAM_FIRMWARE_MBOX_MAGIC1); ++ ++ if (tg3_flag(tp, ASF_NEW_HANDSHAKE)) { ++ switch (kind) { ++ case RESET_KIND_INIT: ++ tg3_write_mem(tp, NIC_SRAM_FW_DRV_STATE_MBOX, ++ DRV_STATE_START); ++ break; ++ ++ case RESET_KIND_SHUTDOWN: ++ tg3_write_mem(tp, NIC_SRAM_FW_DRV_STATE_MBOX, ++ DRV_STATE_UNLOAD); ++ break; ++ ++ case RESET_KIND_SUSPEND: ++ tg3_write_mem(tp, NIC_SRAM_FW_DRV_STATE_MBOX, ++ DRV_STATE_SUSPEND); ++ break; ++ ++ default: ++ break; ++ } ++ } ++} ++ ++/* tp->lock is held. */ ++static void tg3_write_sig_post_reset(struct tg3 *tp, int kind) ++{ ++ if (tg3_flag(tp, ASF_NEW_HANDSHAKE)) { ++ switch (kind) { ++ case RESET_KIND_INIT: ++ tg3_write_mem(tp, NIC_SRAM_FW_DRV_STATE_MBOX, ++ DRV_STATE_START_DONE); ++ break; ++ ++ case RESET_KIND_SHUTDOWN: ++ tg3_write_mem(tp, NIC_SRAM_FW_DRV_STATE_MBOX, ++ DRV_STATE_UNLOAD_DONE); ++ break; ++ ++ default: ++ break; ++ } ++ } ++} ++ ++/* tp->lock is held. */ ++static void tg3_write_sig_legacy(struct tg3 *tp, int kind) ++{ ++ if (tg3_flag(tp, ENABLE_ASF)) { ++ switch (kind) { ++ case RESET_KIND_INIT: ++ tg3_write_mem(tp, NIC_SRAM_FW_DRV_STATE_MBOX, ++ DRV_STATE_START); ++ break; ++ ++ case RESET_KIND_SHUTDOWN: ++ tg3_write_mem(tp, NIC_SRAM_FW_DRV_STATE_MBOX, ++ DRV_STATE_UNLOAD); ++ break; ++ ++ case RESET_KIND_SUSPEND: ++ tg3_write_mem(tp, NIC_SRAM_FW_DRV_STATE_MBOX, ++ DRV_STATE_SUSPEND); ++ break; ++ ++ default: ++ break; ++ } ++ } ++} ++ ++static int tg3_poll_fw(struct tg3 *tp) ++{ ++ int i; ++ u32 val; ++ int fw_timeout = 350000; ++ ++ if (tg3_flag(tp, NO_FWARE_REPORTED)) ++ return 0; ++ ++ if (tg3_flag(tp, IS_SSB_CORE)) { ++ /* We don't use firmware. */ ++ return 0; ++ } ++ ++ if (tg3_asic_rev(tp) == ASIC_REV_5906) { ++ /* Wait up to 20ms for init done. */ ++ for (i = 0; i < 200; i++) { ++ if (tr32(VCPU_STATUS) & VCPU_STATUS_INIT_DONE) ++ return 0; ++ if (pci_channel_offline(tp->pdev)) ++ return -ENODEV; ++ ++ udelay(100); ++ } ++ return -ENODEV; ++ } ++ ++ /* Wait for firmware initialization to complete. */ ++ for (i = 0; i < fw_timeout; i++) { ++ tg3_read_mem(tp, NIC_SRAM_FIRMWARE_MBOX, &val); ++ if (val == ~NIC_SRAM_FIRMWARE_MBOX_MAGIC1) ++ break; ++ if (pci_channel_offline(tp->pdev)) { ++ if (!tg3_flag(tp, NO_FWARE_REPORTED)) { ++ tg3_flag_set(tp, NO_FWARE_REPORTED); ++ netdev_info(tp->dev, "No firmware running\n"); ++ } ++ ++ break; ++ } ++ ++ udelay(10); ++ } ++ ++ /* Chip might not be fitted with firmware. Some Sun onboard ++ * parts are configured like that. So don't signal the timeout ++ * of the above loop as an error, but do report the lack of ++ * running firmware once. ++ */ ++ if (i >= fw_timeout && !tg3_flag(tp, NO_FWARE_REPORTED)) { ++ tg3_flag_set(tp, NO_FWARE_REPORTED); ++ ++ netdev_info(tp->dev, "No firmware running\n"); ++ } ++ ++ if (tg3_chip_rev_id(tp) == CHIPREV_ID_57765_A0) { ++ /* The 57765 A0 needs a little more ++ * time to do some important work. ++ */ ++ mdelay(10); ++ } ++ ++ return 0; ++} ++ ++static void tg3_link_report(struct tg3 *tp) ++{ ++ if (!netif_carrier_ok(tp->dev)) { ++ netif_info(tp, link, tp->dev, "Link is down\n"); ++ tg3_ump_link_report(tp); ++ } else if (netif_msg_link(tp)) { ++ netdev_info(tp->dev, "Link is up at %d Mbps, %s duplex\n", ++ (tp->link_config.active_speed == SPEED_1000 ? ++ 1000 : ++ (tp->link_config.active_speed == SPEED_100 ? ++ 100 : 10)), ++ (tp->link_config.active_duplex == DUPLEX_FULL ? ++ "full" : "half")); ++ ++ netdev_info(tp->dev, "Flow control is %s for TX and %s for RX\n", ++ (tp->link_config.active_flowctrl & FLOW_CTRL_TX) ? ++ "on" : "off", ++ (tp->link_config.active_flowctrl & FLOW_CTRL_RX) ? ++ "on" : "off"); ++ ++ if (tp->phy_flags & TG3_PHYFLG_EEE_CAP) ++ netdev_info(tp->dev, "EEE is %s\n", ++ tp->setlpicnt ? "enabled" : "disabled"); ++ ++ tg3_ump_link_report(tp); ++ } ++ ++ tp->link_up = netif_carrier_ok(tp->dev); ++} ++ ++static u32 tg3_decode_flowctrl_1000T(u32 adv) ++{ ++ u32 flowctrl = 0; ++ ++ if (adv & ADVERTISE_PAUSE_CAP) { ++ flowctrl |= FLOW_CTRL_RX; ++ if (!(adv & ADVERTISE_PAUSE_ASYM)) ++ flowctrl |= FLOW_CTRL_TX; ++ } else if (adv & ADVERTISE_PAUSE_ASYM) ++ flowctrl |= FLOW_CTRL_TX; ++ ++ return flowctrl; ++} ++ ++static u16 tg3_advert_flowctrl_1000X(u8 flow_ctrl) ++{ ++ u16 miireg; ++ ++ if ((flow_ctrl & FLOW_CTRL_TX) && (flow_ctrl & FLOW_CTRL_RX)) ++ miireg = ADVERTISE_1000XPAUSE; ++ else if (flow_ctrl & FLOW_CTRL_TX) ++ miireg = ADVERTISE_1000XPSE_ASYM; ++ else if (flow_ctrl & FLOW_CTRL_RX) ++ miireg = ADVERTISE_1000XPAUSE | ADVERTISE_1000XPSE_ASYM; ++ else ++ miireg = 0; ++ ++ return miireg; ++} ++ ++static u32 tg3_decode_flowctrl_1000X(u32 adv) ++{ ++ u32 flowctrl = 0; ++ ++ if (adv & ADVERTISE_1000XPAUSE) { ++ flowctrl |= FLOW_CTRL_RX; ++ if (!(adv & ADVERTISE_1000XPSE_ASYM)) ++ flowctrl |= FLOW_CTRL_TX; ++ } else if (adv & ADVERTISE_1000XPSE_ASYM) ++ flowctrl |= FLOW_CTRL_TX; ++ ++ return flowctrl; ++} ++ ++static u8 tg3_resolve_flowctrl_1000X(u16 lcladv, u16 rmtadv) ++{ ++ u8 cap = 0; ++ ++ if (lcladv & rmtadv & ADVERTISE_1000XPAUSE) { ++ cap = FLOW_CTRL_TX | FLOW_CTRL_RX; ++ } else if (lcladv & rmtadv & ADVERTISE_1000XPSE_ASYM) { ++ if (lcladv & ADVERTISE_1000XPAUSE) ++ cap = FLOW_CTRL_RX; ++ if (rmtadv & ADVERTISE_1000XPAUSE) ++ cap = FLOW_CTRL_TX; ++ } ++ ++ return cap; ++} ++ ++static void tg3_setup_flow_control(struct tg3 *tp, u32 lcladv, u32 rmtadv) ++{ ++ u8 autoneg; ++ u8 flowctrl = 0; ++ u32 old_rx_mode = tp->rx_mode; ++ u32 old_tx_mode = tp->tx_mode; ++ ++#ifdef BCM_INCLUDE_PHYLIB_SUPPORT ++ if (tg3_flag(tp, USE_PHYLIB)) ++ autoneg = tp->mdio_bus->phy_map[tp->phy_addr]->autoneg; ++ else ++#endif /* BCM_INCLUDE_PHYLIB_SUPPORT */ ++ autoneg = tp->link_config.autoneg; ++ ++ if (autoneg == AUTONEG_ENABLE && tg3_flag(tp, PAUSE_AUTONEG)) { ++ if (tp->phy_flags & TG3_PHYFLG_ANY_SERDES) ++ flowctrl = tg3_resolve_flowctrl_1000X(lcladv, rmtadv); ++ else ++ flowctrl = mii_resolve_flowctrl_fdx(lcladv, rmtadv); ++ } else ++ flowctrl = tp->link_config.flowctrl; ++ ++ tp->link_config.active_flowctrl = flowctrl; ++ ++ if (flowctrl & FLOW_CTRL_RX) ++ tp->rx_mode |= RX_MODE_FLOW_CTRL_ENABLE; ++ else ++ tp->rx_mode &= ~RX_MODE_FLOW_CTRL_ENABLE; ++ ++ if (old_rx_mode != tp->rx_mode) ++ tw32_f(MAC_RX_MODE, tp->rx_mode); ++ ++ if (flowctrl & FLOW_CTRL_TX) ++ tp->tx_mode |= TX_MODE_FLOW_CTRL_ENABLE; ++ else ++ tp->tx_mode &= ~TX_MODE_FLOW_CTRL_ENABLE; ++ ++ if (old_tx_mode != tp->tx_mode) ++ tw32_f(MAC_TX_MODE, tp->tx_mode); ++} ++ ++#ifdef BCM_INCLUDE_PHYLIB_SUPPORT ++static void tg3_adjust_link(struct net_device *dev) ++{ ++ u8 oldflowctrl, linkmesg = 0; ++ u32 mac_mode, lcl_adv, rmt_adv; ++ struct tg3 *tp = netdev_priv(dev); ++ struct phy_device *phydev = tp->mdio_bus->phy_map[tp->phy_addr]; ++ ++ spin_lock_bh(&tp->lock); ++ ++ mac_mode = tp->mac_mode & ~(MAC_MODE_PORT_MODE_MASK | ++ MAC_MODE_HALF_DUPLEX); ++ ++ oldflowctrl = tp->link_config.active_flowctrl; ++ ++ if (phydev->link) { ++ lcl_adv = 0; ++ rmt_adv = 0; ++ ++ if (phydev->speed == SPEED_100 || phydev->speed == SPEED_10) ++ mac_mode |= MAC_MODE_PORT_MODE_MII; ++ else if (phydev->speed == SPEED_1000 || ++ tg3_asic_rev(tp) != ASIC_REV_5785) ++ mac_mode |= MAC_MODE_PORT_MODE_GMII; ++ else ++ mac_mode |= MAC_MODE_PORT_MODE_MII; ++ ++ if (phydev->duplex == DUPLEX_HALF) ++ mac_mode |= MAC_MODE_HALF_DUPLEX; ++ else { ++ lcl_adv = mii_advertise_flowctrl( ++ tp->link_config.flowctrl); ++ ++ if (phydev->pause) ++ rmt_adv = LPA_PAUSE_CAP; ++ if (phydev->asym_pause) ++ rmt_adv |= LPA_PAUSE_ASYM; ++ } ++ ++ tg3_setup_flow_control(tp, lcl_adv, rmt_adv); ++ } else ++ mac_mode |= MAC_MODE_PORT_MODE_GMII; ++ ++ if (mac_mode != tp->mac_mode) { ++ tp->mac_mode = mac_mode; ++ tw32_f(MAC_MODE, tp->mac_mode); ++ udelay(40); ++ } ++ ++ if (tg3_asic_rev(tp) == ASIC_REV_5785) { ++ if (phydev->speed == SPEED_10) ++ tw32(MAC_MI_STAT, ++ MAC_MI_STAT_10MBPS_MODE | ++ MAC_MI_STAT_LNKSTAT_ATTN_ENAB); ++ else ++ tw32(MAC_MI_STAT, MAC_MI_STAT_LNKSTAT_ATTN_ENAB); ++ } ++ ++ if (phydev->speed == SPEED_1000 && phydev->duplex == DUPLEX_HALF) ++ tw32(MAC_TX_LENGTHS, ++ ((2 << TX_LENGTHS_IPG_CRS_SHIFT) | ++ (6 << TX_LENGTHS_IPG_SHIFT) | ++ (0xff << TX_LENGTHS_SLOT_TIME_SHIFT))); ++ else ++ tw32(MAC_TX_LENGTHS, ++ ((2 << TX_LENGTHS_IPG_CRS_SHIFT) | ++ (6 << TX_LENGTHS_IPG_SHIFT) | ++ (32 << TX_LENGTHS_SLOT_TIME_SHIFT))); ++ ++ if (phydev->link != tp->old_link || ++ phydev->speed != tp->link_config.active_speed || ++ phydev->duplex != tp->link_config.active_duplex || ++ oldflowctrl != tp->link_config.active_flowctrl) ++ linkmesg = 1; ++ ++ tp->old_link = phydev->link; ++ tp->link_config.active_speed = phydev->speed; ++ tp->link_config.active_duplex = phydev->duplex; ++ ++ spin_unlock_bh(&tp->lock); ++ ++ if (linkmesg) ++ tg3_link_report(tp); ++} ++ ++static int tg3_phy_init(struct tg3 *tp) ++{ ++ struct phy_device *phydev; ++ ++ if (tp->phy_flags & TG3_PHYFLG_IS_CONNECTED) ++ return 0; ++ ++ /* Bring the PHY back to a known state. */ ++ tg3_bmcr_reset(tp); ++ ++ phydev = tp->mdio_bus->phy_map[tp->phy_addr]; ++ ++ /* Attach the MAC to the PHY. */ ++ phydev = phy_connect(tp->dev, dev_name(&phydev->dev), ++ tg3_adjust_link, phydev->interface); ++ if (IS_ERR(phydev)) { ++ dev_err(&tp->pdev->dev, "Could not attach to PHY\n"); ++ return PTR_ERR(phydev); ++ } ++ ++ /* Mask with MAC supported features. */ ++ switch (phydev->interface) { ++ case PHY_INTERFACE_MODE_GMII: ++ case PHY_INTERFACE_MODE_RGMII: ++ if (!(tp->phy_flags & TG3_PHYFLG_10_100_ONLY)) { ++ phydev->supported &= (PHY_GBIT_FEATURES | ++ SUPPORTED_Pause | ++ SUPPORTED_Asym_Pause); ++ break; ++ } ++ /* fallthru */ ++ case PHY_INTERFACE_MODE_MII: ++ phydev->supported &= (PHY_BASIC_FEATURES | ++ SUPPORTED_Pause | ++ SUPPORTED_Asym_Pause); ++ break; ++ default: ++ phy_disconnect(tp->mdio_bus->phy_map[tp->phy_addr]); ++ return -EINVAL; ++ } ++ ++ tp->phy_flags |= TG3_PHYFLG_IS_CONNECTED; ++ ++ phydev->advertising = phydev->supported; ++ ++ return 0; ++} ++ ++static void tg3_phy_start(struct tg3 *tp) ++{ ++ struct phy_device *phydev; ++ ++ if (!(tp->phy_flags & TG3_PHYFLG_IS_CONNECTED)) ++ return; ++ ++ phydev = tp->mdio_bus->phy_map[tp->phy_addr]; ++ ++ if (tp->phy_flags & TG3_PHYFLG_IS_LOW_POWER) { ++ tp->phy_flags &= ~TG3_PHYFLG_IS_LOW_POWER; ++ phydev->speed = tp->link_config.speed; ++ phydev->duplex = tp->link_config.duplex; ++ phydev->autoneg = tp->link_config.autoneg; ++ phydev->advertising = tp->link_config.advertising; ++ } ++ ++ phy_start(phydev); ++ ++ phy_start_aneg(phydev); ++} ++ ++static void tg3_phy_stop(struct tg3 *tp) ++{ ++ if (!(tp->phy_flags & TG3_PHYFLG_IS_CONNECTED)) ++ return; ++ ++ phy_stop(tp->mdio_bus->phy_map[tp->phy_addr]); ++} ++ ++static void tg3_phy_fini(struct tg3 *tp) ++{ ++ if (tp->phy_flags & TG3_PHYFLG_IS_CONNECTED) { ++ phy_disconnect(tp->mdio_bus->phy_map[tp->phy_addr]); ++ tp->phy_flags &= ~TG3_PHYFLG_IS_CONNECTED; ++ } ++} ++#else ++#define tg3_phy_init(tp) 0 ++#define tg3_phy_start(tp) ++#define tg3_phy_stop(tp) ++#define tg3_phy_fini(tp) ++#endif /* BCM_INCLUDE_PHYLIB_SUPPORT */ ++ ++static int tg3_phy_set_extloopbk(struct tg3 *tp) ++{ ++ int err; ++ u32 val; ++ ++ if (tp->phy_flags & TG3_PHYFLG_IS_FET) ++ return 0; ++ ++ if ((tp->phy_id & TG3_PHY_ID_MASK) == TG3_PHY_ID_BCM5401) { ++ /* Cannot do read-modify-write on 5401 */ ++ err = tg3_phy_auxctl_write(tp, ++ MII_TG3_AUXCTL_SHDWSEL_AUXCTL, ++ MII_TG3_AUXCTL_ACTL_EXTLOOPBK | ++ 0x4c20); ++ goto done; ++ } ++ ++ err = tg3_phy_auxctl_read(tp, ++ MII_TG3_AUXCTL_SHDWSEL_AUXCTL, &val); ++ if (err) ++ return err; ++ ++ val |= MII_TG3_AUXCTL_ACTL_EXTLOOPBK; ++ err = tg3_phy_auxctl_write(tp, ++ MII_TG3_AUXCTL_SHDWSEL_AUXCTL, val); ++ ++done: ++ return err; ++} ++ ++static void tg3_phy_fet_toggle_apd(struct tg3 *tp, bool enable) ++{ ++ u32 phytest; ++ ++ if (!tg3_readphy(tp, MII_TG3_FET_TEST, &phytest)) { ++ u32 phy; ++ ++ tg3_writephy(tp, MII_TG3_FET_TEST, ++ phytest | MII_TG3_FET_SHADOW_EN); ++ if (!tg3_readphy(tp, MII_TG3_FET_SHDW_AUXSTAT2, &phy)) { ++ if (enable) ++ phy |= MII_TG3_FET_SHDW_AUXSTAT2_APD; ++ else ++ phy &= ~MII_TG3_FET_SHDW_AUXSTAT2_APD; ++ tg3_writephy(tp, MII_TG3_FET_SHDW_AUXSTAT2, phy); ++ } ++ tg3_writephy(tp, MII_TG3_FET_TEST, phytest); ++ } ++} ++ ++static void tg3_phy_toggle_apd(struct tg3 *tp, bool enable) ++{ ++ u32 reg; ++ ++ if (!tg3_flag(tp, 5705_PLUS) || ++ (tg3_flag(tp, 5717_PLUS) && ++ (tp->phy_flags & TG3_PHYFLG_MII_SERDES))) ++ return; ++ ++ if (tp->phy_flags & TG3_PHYFLG_IS_FET) { ++ tg3_phy_fet_toggle_apd(tp, enable); ++ return; ++ } ++ ++#ifndef BCM_INCLUDE_PHYLIB_SUPPORT ++ if (tg3_asic_rev(tp) == ASIC_REV_5785) { ++ reg = MII_TG3_MISC_SHDW_SCR5_TRDDAPD | ++ MII_TG3_MISC_SHDW_SCR5_LPED | ++ MII_TG3_MISC_SHDW_SCR5_DLPTLM | ++ MII_TG3_MISC_SHDW_SCR5_SDTL; ++ if ((tp->phy_id & ~TG3_PHY_ID_MASK) < 0x3) { ++ reg |= MII_TG3_MISC_SHDW_SCR5_C125OE; ++ if (!enable) ++ reg |= MII_TG3_MISC_SHDW_SCR5_DLLAPD; ++ } ++ } else { ++#endif ++ reg = MII_TG3_MISC_SHDW_SCR5_LPED | ++ MII_TG3_MISC_SHDW_SCR5_DLPTLM | ++ MII_TG3_MISC_SHDW_SCR5_SDTL | ++ MII_TG3_MISC_SHDW_SCR5_C125OE; ++ if (tg3_asic_rev(tp) != ASIC_REV_5784 || !enable) ++ reg |= MII_TG3_MISC_SHDW_SCR5_DLLAPD; ++#ifndef BCM_INCLUDE_PHYLIB_SUPPORT ++ } ++#endif ++ ++ tg3_phy_shdw_write(tp, MII_TG3_MISC_SHDW_SCR5_SEL, reg); ++ ++ ++ reg = MII_TG3_MISC_SHDW_APD_WKTM_84MS; ++ if (enable) ++ reg |= MII_TG3_MISC_SHDW_APD_ENABLE; ++ ++ tg3_phy_shdw_write(tp, MII_TG3_MISC_SHDW_APD_SEL, reg); ++} ++ ++static void tg3_phy_toggle_automdix(struct tg3 *tp, bool enable) ++{ ++ u32 phy; ++ ++ if (!tg3_flag(tp, 5705_PLUS) || ++ (tp->phy_flags & TG3_PHYFLG_ANY_SERDES)) ++ return; ++ ++ if (tp->phy_flags & TG3_PHYFLG_IS_FET) { ++ u32 ephy; ++ ++ if (!tg3_readphy(tp, MII_TG3_FET_TEST, &ephy)) { ++ u32 reg = MII_TG3_FET_SHDW_MISCCTRL; ++ ++ tg3_writephy(tp, MII_TG3_FET_TEST, ++ ephy | MII_TG3_FET_SHADOW_EN); ++ if (!tg3_readphy(tp, reg, &phy)) { ++ if (enable) ++ phy |= MII_TG3_FET_SHDW_MISCCTRL_MDIX; ++ else ++ phy &= ~MII_TG3_FET_SHDW_MISCCTRL_MDIX; ++ tg3_writephy(tp, reg, phy); ++ } ++ tg3_writephy(tp, MII_TG3_FET_TEST, ephy); ++ } ++ } else { ++ int ret; ++ ++ ret = tg3_phy_auxctl_read(tp, ++ MII_TG3_AUXCTL_SHDWSEL_MISC, &phy); ++ if (!ret) { ++ if (enable) ++ phy |= MII_TG3_AUXCTL_MISC_FORCE_AMDIX; ++ else ++ phy &= ~MII_TG3_AUXCTL_MISC_FORCE_AMDIX; ++ tg3_phy_auxctl_write(tp, ++ MII_TG3_AUXCTL_SHDWSEL_MISC, phy); ++ } ++ } ++} ++ ++static void tg3_phy_set_wirespeed(struct tg3 *tp) ++{ ++ int ret; ++ u32 val; ++ ++ if (tp->phy_flags & TG3_PHYFLG_NO_ETH_WIRE_SPEED) ++ return; ++ ++ ret = tg3_phy_auxctl_read(tp, MII_TG3_AUXCTL_SHDWSEL_MISC, &val); ++ if (!ret) ++ tg3_phy_auxctl_write(tp, MII_TG3_AUXCTL_SHDWSEL_MISC, ++ val | MII_TG3_AUXCTL_MISC_WIRESPD_EN); ++} ++ ++static void tg3_phy_apply_otp(struct tg3 *tp) ++{ ++ u32 otp, phy; ++ ++ if (!tp->phy_otp) ++ return; ++ ++ otp = tp->phy_otp; ++ ++ if (tg3_phy_toggle_auxctl_smdsp(tp, true)) ++ return; ++ ++ phy = ((otp & TG3_OTP_AGCTGT_MASK) >> TG3_OTP_AGCTGT_SHIFT); ++ phy |= MII_TG3_DSP_TAP1_AGCTGT_DFLT; ++ tg3_phydsp_write(tp, MII_TG3_DSP_TAP1, phy); ++ ++ phy = ((otp & TG3_OTP_HPFFLTR_MASK) >> TG3_OTP_HPFFLTR_SHIFT) | ++ ((otp & TG3_OTP_HPFOVER_MASK) >> TG3_OTP_HPFOVER_SHIFT); ++ tg3_phydsp_write(tp, MII_TG3_DSP_AADJ1CH0, phy); ++ ++ phy = ((otp & TG3_OTP_LPFDIS_MASK) >> TG3_OTP_LPFDIS_SHIFT); ++ phy |= MII_TG3_DSP_AADJ1CH3_ADCCKADJ; ++ tg3_phydsp_write(tp, MII_TG3_DSP_AADJ1CH3, phy); ++ ++ phy = ((otp & TG3_OTP_VDAC_MASK) >> TG3_OTP_VDAC_SHIFT); ++ tg3_phydsp_write(tp, MII_TG3_DSP_EXP75, phy); ++ ++ phy = ((otp & TG3_OTP_10BTAMP_MASK) >> TG3_OTP_10BTAMP_SHIFT); ++ tg3_phydsp_write(tp, MII_TG3_DSP_EXP96, phy); ++ ++ phy = ((otp & TG3_OTP_ROFF_MASK) >> TG3_OTP_ROFF_SHIFT) | ++ ((otp & TG3_OTP_RCOFF_MASK) >> TG3_OTP_RCOFF_SHIFT); ++ tg3_phydsp_write(tp, MII_TG3_DSP_EXP97, phy); ++ ++ tg3_phy_toggle_auxctl_smdsp(tp, false); ++} ++ ++static void tg3_eee_pull_config(struct tg3 *tp, struct ethtool_eee *eee) ++{ ++ u32 val; ++ struct ethtool_eee *dest = &tp->eee; ++ ++ if (!(tp->phy_flags & TG3_PHYFLG_EEE_CAP)) ++ return; ++ ++ if (eee) ++ dest = eee; ++ ++ if (tg3_phy_cl45_read(tp, MDIO_MMD_AN, TG3_CL45_D7_EEERES_STAT, &val)) ++ return; ++ ++ /* Pull eee_active */ ++ if (val == TG3_CL45_D7_EEERES_STAT_LP_1000T || ++ val == TG3_CL45_D7_EEERES_STAT_LP_100TX) { ++ dest->eee_active = 1; ++ } else ++ dest->eee_active = 0; ++ ++ /* Pull lp advertised settings */ ++ if (tg3_phy_cl45_read(tp, MDIO_MMD_AN, MDIO_AN_EEE_LPABLE, &val)) ++ return; ++ dest->lp_advertised = mmd_eee_adv_to_ethtool_adv_t(val); ++ ++ /* Pull advertised and eee_enabled settings */ ++ if (tg3_phy_cl45_read(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV, &val)) ++ return; ++ dest->eee_enabled = !!val; ++ dest->advertised = mmd_eee_adv_to_ethtool_adv_t(val); ++ ++ /* Pull tx_lpi_enabled */ ++ val = tr32(TG3_CPMU_EEE_MODE); ++ dest->tx_lpi_enabled = !!(val & TG3_CPMU_EEEMD_LPI_IN_TX); ++ ++ /* Pull lpi timer value */ ++ dest->tx_lpi_timer = tr32(TG3_CPMU_EEE_DBTMR1) & 0xffff; ++} ++ ++static void tg3_phy_eee_adjust(struct tg3 *tp, bool current_link_up) ++{ ++ u32 val; ++ ++ if (!(tp->phy_flags & TG3_PHYFLG_EEE_CAP)) ++ return; ++ ++#ifndef BCM_INCLUDE_PHYLIB_SUPPORT ++ if ((tp->phy_id & TG3_PHY_ID_MASK) == TG3_PHY_ID_BCM50612E) ++ return; ++#endif ++ ++ tp->setlpicnt = 0; ++ ++ if (tp->link_config.autoneg == AUTONEG_ENABLE && ++ current_link_up && ++ tp->link_config.active_duplex == DUPLEX_FULL && ++ (tp->link_config.active_speed == SPEED_100 || ++ tp->link_config.active_speed == SPEED_1000)) { ++ u32 eeectl; ++ ++ if (tp->link_config.active_speed == SPEED_1000) ++ eeectl = TG3_CPMU_EEE_CTRL_EXIT_16_5_US; ++ else ++ eeectl = TG3_CPMU_EEE_CTRL_EXIT_36_US; ++ ++ tw32(TG3_CPMU_EEE_CTRL, eeectl); ++ ++ tg3_eee_pull_config(tp, NULL); ++ if (tp->eee.eee_active) ++ tp->setlpicnt = 2; ++ } ++ ++ if (!tp->setlpicnt) { ++ if (current_link_up && ++ !tg3_phy_toggle_auxctl_smdsp(tp, true)) { ++ tg3_phydsp_write(tp, MII_TG3_DSP_TAP26, 0x0000); ++ tg3_phy_toggle_auxctl_smdsp(tp, false); ++ } ++ ++ val = tr32(TG3_CPMU_EEE_MODE); ++ tw32(TG3_CPMU_EEE_MODE, val & ~TG3_CPMU_EEEMD_LPI_ENABLE); ++ } ++} ++ ++static void tg3_phy_eee_enable(struct tg3 *tp) ++{ ++ u32 val; ++ ++ if (tp->link_config.active_speed == SPEED_1000 && ++ (tg3_asic_rev(tp) == ASIC_REV_5717 || ++ tg3_asic_rev(tp) == ASIC_REV_5719 || ++ tg3_flag(tp, 57765_CLASS)) && ++ !tg3_phy_toggle_auxctl_smdsp(tp, true)) { ++ val = MII_TG3_DSP_TAP26_ALNOKO | ++ MII_TG3_DSP_TAP26_RMRXSTO; ++ tg3_phydsp_write(tp, MII_TG3_DSP_TAP26, val); ++ tg3_phy_toggle_auxctl_smdsp(tp, false); ++ } ++ ++ val = tr32(TG3_CPMU_EEE_MODE); ++ tw32(TG3_CPMU_EEE_MODE, val | TG3_CPMU_EEEMD_LPI_ENABLE); ++} ++ ++static int tg3_wait_macro_done(struct tg3 *tp) ++{ ++ int limit = 100; ++ ++ while (limit--) { ++ u32 tmp32; ++ ++ if (!tg3_readphy(tp, MII_TG3_DSP_CONTROL, &tmp32)) { ++ if ((tmp32 & 0x1000) == 0) ++ break; ++ } ++ } ++ if (limit < 0) ++ return -EBUSY; ++ ++ return 0; ++} ++ ++static int tg3_phy_write_and_check_testpat(struct tg3 *tp, int *resetp) ++{ ++ static const u32 test_pat[4][6] = { ++ { 0x00005555, 0x00000005, 0x00002aaa, 0x0000000a, 0x00003456, 0x00000003 }, ++ { 0x00002aaa, 0x0000000a, 0x00003333, 0x00000003, 0x0000789a, 0x00000005 }, ++ { 0x00005a5a, 0x00000005, 0x00002a6a, 0x0000000a, 0x00001bcd, 0x00000003 }, ++ { 0x00002a5a, 0x0000000a, 0x000033c3, 0x00000003, 0x00002ef1, 0x00000005 } ++ }; ++ int chan; ++ ++ for (chan = 0; chan < 4; chan++) { ++ int i; ++ ++ tg3_writephy(tp, MII_TG3_DSP_ADDRESS, ++ (chan * 0x2000) | 0x0200); ++ tg3_writephy(tp, MII_TG3_DSP_CONTROL, 0x0002); ++ ++ for (i = 0; i < 6; i++) ++ tg3_writephy(tp, MII_TG3_DSP_RW_PORT, ++ test_pat[chan][i]); ++ ++ tg3_writephy(tp, MII_TG3_DSP_CONTROL, 0x0202); ++ if (tg3_wait_macro_done(tp)) { ++ *resetp = 1; ++ return -EBUSY; ++ } ++ ++ tg3_writephy(tp, MII_TG3_DSP_ADDRESS, ++ (chan * 0x2000) | 0x0200); ++ tg3_writephy(tp, MII_TG3_DSP_CONTROL, 0x0082); ++ if (tg3_wait_macro_done(tp)) { ++ *resetp = 1; ++ return -EBUSY; ++ } ++ ++ tg3_writephy(tp, MII_TG3_DSP_CONTROL, 0x0802); ++ if (tg3_wait_macro_done(tp)) { ++ *resetp = 1; ++ return -EBUSY; ++ } ++ ++ for (i = 0; i < 6; i += 2) { ++ u32 low, high; ++ ++ if (tg3_readphy(tp, MII_TG3_DSP_RW_PORT, &low) || ++ tg3_readphy(tp, MII_TG3_DSP_RW_PORT, &high) || ++ tg3_wait_macro_done(tp)) { ++ *resetp = 1; ++ return -EBUSY; ++ } ++ low &= 0x7fff; ++ high &= 0x000f; ++ if (low != test_pat[chan][i] || ++ high != test_pat[chan][i+1]) { ++ tg3_writephy(tp, MII_TG3_DSP_ADDRESS, 0x000b); ++ tg3_writephy(tp, MII_TG3_DSP_RW_PORT, 0x4001); ++ tg3_writephy(tp, MII_TG3_DSP_RW_PORT, 0x4005); ++ ++ return -EBUSY; ++ } ++ } ++ } ++ ++ return 0; ++} ++ ++static int tg3_phy_reset_chanpat(struct tg3 *tp) ++{ ++ int chan; ++ ++ for (chan = 0; chan < 4; chan++) { ++ int i; ++ ++ tg3_writephy(tp, MII_TG3_DSP_ADDRESS, ++ (chan * 0x2000) | 0x0200); ++ tg3_writephy(tp, MII_TG3_DSP_CONTROL, 0x0002); ++ for (i = 0; i < 6; i++) ++ tg3_writephy(tp, MII_TG3_DSP_RW_PORT, 0x000); ++ tg3_writephy(tp, MII_TG3_DSP_CONTROL, 0x0202); ++ if (tg3_wait_macro_done(tp)) ++ return -EBUSY; ++ } ++ ++ return 0; ++} ++ ++static int tg3_phy_reset_5703_4_5(struct tg3 *tp) ++{ ++ u32 reg32, phy9_orig; ++ int retries, do_phy_reset, err; ++ ++ retries = 10; ++ do_phy_reset = 1; ++ do { ++ if (do_phy_reset) { ++ err = tg3_bmcr_reset(tp); ++ if (err) ++ return err; ++ do_phy_reset = 0; ++ } ++ ++ /* Disable transmitter and interrupt. */ ++ if (tg3_readphy(tp, MII_TG3_EXT_CTRL, ®32)) ++ continue; ++ ++ reg32 |= 0x3000; ++ tg3_writephy(tp, MII_TG3_EXT_CTRL, reg32); ++ ++ /* Set full-duplex, 1000 mbps. */ ++ tg3_writephy(tp, MII_BMCR, ++ BMCR_FULLDPLX | BMCR_SPEED1000); ++ ++ /* Set to master mode. */ ++ if (tg3_readphy(tp, MII_CTRL1000, &phy9_orig)) ++ continue; ++ ++ tg3_writephy(tp, MII_CTRL1000, ++ CTL1000_AS_MASTER | CTL1000_ENABLE_MASTER); ++ ++ err = tg3_phy_toggle_auxctl_smdsp(tp, true); ++ if (err) ++ return err; ++ ++ /* Block the PHY control access. */ ++ tg3_phydsp_write(tp, 0x8005, 0x0800); ++ ++ err = tg3_phy_write_and_check_testpat(tp, &do_phy_reset); ++ if (!err) ++ break; ++ } while (--retries); ++ ++ err = tg3_phy_reset_chanpat(tp); ++ if (err) ++ return err; ++ ++ tg3_phydsp_write(tp, 0x8005, 0x0000); ++ ++ tg3_writephy(tp, MII_TG3_DSP_ADDRESS, 0x8200); ++ tg3_writephy(tp, MII_TG3_DSP_CONTROL, 0x0000); ++ ++ tg3_phy_toggle_auxctl_smdsp(tp, false); ++ ++ tg3_writephy(tp, MII_CTRL1000, phy9_orig); ++ ++ if (!tg3_readphy(tp, MII_TG3_EXT_CTRL, ®32)) { ++ reg32 &= ~0x3000; ++ tg3_writephy(tp, MII_TG3_EXT_CTRL, reg32); ++ } else if (!err) ++ err = -EBUSY; ++ ++ return err; ++} ++ ++static void tg3_carrier_off(struct tg3 *tp) ++{ ++ netif_carrier_off(tp->dev); ++ tp->link_up = false; ++} ++ ++static void tg3_warn_mgmt_link_flap(struct tg3 *tp) ++{ ++ if (tg3_flag(tp, ENABLE_ASF)) ++ netdev_warn(tp->dev, ++ "Management side-band traffic will be interrupted during phy settings change\n"); ++} ++ ++/* This will reset the tigon3 PHY if there is no valid ++ * link unless the FORCE argument is non-zero. ++ */ ++static int tg3_phy_reset(struct tg3 *tp) ++{ ++ u32 val, cpmuctrl; ++ int err; ++ ++ if (tg3_asic_rev(tp) == ASIC_REV_5906) { ++ val = tr32(GRC_MISC_CFG); ++ tw32_f(GRC_MISC_CFG, val & ~GRC_MISC_CFG_EPHY_IDDQ); ++ udelay(40); ++ } ++ err = tg3_readphy(tp, MII_BMSR, &val); ++ err |= tg3_readphy(tp, MII_BMSR, &val); ++ if (err != 0) ++ return -EBUSY; ++ ++ if (netif_running(tp->dev) && tp->link_up) { ++ netif_carrier_off(tp->dev); ++ tg3_link_report(tp); ++ } ++ ++ if (tg3_asic_rev(tp) == ASIC_REV_5703 || ++ tg3_asic_rev(tp) == ASIC_REV_5704 || ++ tg3_asic_rev(tp) == ASIC_REV_5705) { ++ err = tg3_phy_reset_5703_4_5(tp); ++ if (err) ++ return err; ++ goto out; ++ } ++ ++ cpmuctrl = 0; ++ if (tg3_asic_rev(tp) == ASIC_REV_5784 && ++ tg3_chip_rev(tp) != CHIPREV_5784_AX) { ++ cpmuctrl = tr32(TG3_CPMU_CTRL); ++ if (cpmuctrl & CPMU_CTRL_GPHY_10MB_RXONLY) ++ tw32(TG3_CPMU_CTRL, ++ cpmuctrl & ~CPMU_CTRL_GPHY_10MB_RXONLY); ++ } ++ ++ err = tg3_bmcr_reset(tp); ++ if (err) ++ return err; ++ ++ if (cpmuctrl & CPMU_CTRL_GPHY_10MB_RXONLY) { ++ val = MII_TG3_DSP_EXP8_AEDW | MII_TG3_DSP_EXP8_REJ2MHz; ++ tg3_phydsp_write(tp, MII_TG3_DSP_EXP8, val); ++ ++ tw32(TG3_CPMU_CTRL, cpmuctrl); ++ } ++ ++ if (tg3_chip_rev(tp) == CHIPREV_5784_AX || ++ tg3_chip_rev(tp) == CHIPREV_5761_AX) { ++ val = tr32(TG3_CPMU_LSPD_1000MB_CLK); ++ if ((val & CPMU_LSPD_1000MB_MACCLK_MASK) == ++ CPMU_LSPD_1000MB_MACCLK_12_5) { ++ val &= ~CPMU_LSPD_1000MB_MACCLK_MASK; ++ udelay(40); ++ tw32_f(TG3_CPMU_LSPD_1000MB_CLK, val); ++ } ++ } ++ ++ if (tg3_flag(tp, 5717_PLUS) && ++ (tp->phy_flags & TG3_PHYFLG_MII_SERDES)) ++ return 0; ++ ++ tg3_phy_apply_otp(tp); ++ ++ if (tp->phy_flags & TG3_PHYFLG_ENABLE_APD) ++ tg3_phy_toggle_apd(tp, true); ++ else ++ tg3_phy_toggle_apd(tp, false); ++ ++out: ++#ifndef BCM_INCLUDE_PHYLIB_SUPPORT ++ if (tg3_asic_rev(tp) == ASIC_REV_5785 && ++ (tp->phy_id & TG3_PHY_ID_MASK) != TG3_PHY_ID_BCMAC131) { ++ /* A0 */ ++ if (tp->phy_id == TG3_PHY_ID_BCM50612E && ++ !tg3_phy_toggle_auxctl_smdsp(tp, true)) { ++ tg3_phydsp_write(tp, 0x0fff, 0x4000); ++ tg3_phydsp_write(tp, 0x0021, 0x4600); ++ tg3_phy_toggle_auxctl_smdsp(tp, false); ++ } ++ ++ if (((tp->phy_id & TG3_PHY_ID_MASK) == TG3_PHY_ID_BCM50610 || ++ (tp->phy_id & TG3_PHY_ID_MASK) == TG3_PHY_ID_BCM50610M) && ++ !tg3_phy_toggle_auxctl_smdsp(tp, true)) { ++ val = MII_TG3_DSP_EXP8_REJ2MHz; ++ tg3_phydsp_write(tp, MII_TG3_DSP_EXP8, val); ++ ++ /* Apply workaround to A0 revision parts only. */ ++ if (tp->phy_id == TG3_PHY_ID_BCM50610 || ++ tp->phy_id == TG3_PHY_ID_BCM50610M) { ++ tg3_phydsp_write(tp, 0x001F, 0x0300); ++ tg3_phydsp_write(tp, 0x601F, 0x0002); ++ tg3_phydsp_write(tp, 0x0F75, 0x003C); ++ tg3_phydsp_write(tp, 0x0F96, 0x0010); ++ tg3_phydsp_write(tp, 0x0F97, 0x0C0C); ++ } ++ ++ tg3_phy_toggle_auxctl_smdsp(tp, false); ++ } ++ ++ tg3_phy_auxctl_read(tp, MII_TG3_AUXCTL_SHDWSEL_MISC, &val); ++ if (tg3_flag(tp, RGMII_INBAND_DISABLE)) ++ val |= MII_TG3_AUXCTL_MISC_RGMII_OOBSC; ++ else ++ val &= ~MII_TG3_AUXCTL_MISC_RGMII_OOBSC; ++ tg3_phy_auxctl_write(tp, MII_TG3_AUXCTL_SHDWSEL_MISC, val); ++ ++ /* Clear all mode configuration bits. */ ++ if (!tg3_phy_shdw_read(tp, MII_TG3_MISC_SHDW_RGMII_SEL, &val)) { ++ val &= ~(MII_TG3_MISC_SHDW_RGMII_MODESEL0 | ++ MII_TG3_MISC_SHDW_RGMII_MODESEL1); ++ tg3_phy_shdw_write(tp, ++ MII_TG3_MISC_SHDW_RGMII_SEL, val); ++ } ++ } ++ ++ if ((tp->phy_id & TG3_PHY_ID_MASK) == TG3_PHY_ID_BCM57780 && ++ !tg3_phy_toggle_auxctl_smdsp(tp, true)) { ++ tg3_writephy(tp, MII_TG3_DSP_ADDRESS, MII_TG3_DSP_EXP75); ++ tg3_readphy(tp, MII_TG3_DSP_RW_PORT, &val); ++ val |= MII_TG3_DSP_EXP75_SUP_CM_OSC; ++ tg3_phydsp_write(tp, MII_TG3_DSP_EXP75, val); ++ ++ tg3_phy_toggle_auxctl_smdsp(tp, false); ++ } ++#endif ++ if ((tp->phy_flags & TG3_PHYFLG_ADC_BUG) && ++ !tg3_phy_toggle_auxctl_smdsp(tp, true)) { ++ tg3_phydsp_write(tp, 0x201f, 0x2aaa); ++ tg3_phydsp_write(tp, 0x000a, 0x0323); ++ tg3_phy_toggle_auxctl_smdsp(tp, false); ++ } ++ ++ if (tp->phy_flags & TG3_PHYFLG_5704_A0_BUG) { ++ tg3_writephy(tp, MII_TG3_MISC_SHDW, 0x8d68); ++ tg3_writephy(tp, MII_TG3_MISC_SHDW, 0x8d68); ++ } ++ ++ if (tp->phy_flags & TG3_PHYFLG_BER_BUG) { ++ if (!tg3_phy_toggle_auxctl_smdsp(tp, true)) { ++ tg3_phydsp_write(tp, 0x000a, 0x310b); ++ tg3_phydsp_write(tp, 0x201f, 0x9506); ++ tg3_phydsp_write(tp, 0x401f, 0x14e2); ++ tg3_phy_toggle_auxctl_smdsp(tp, false); ++ } ++ } else if (tp->phy_flags & TG3_PHYFLG_JITTER_BUG) { ++ if (!tg3_phy_toggle_auxctl_smdsp(tp, true)) { ++ tg3_writephy(tp, MII_TG3_DSP_ADDRESS, 0x000a); ++ if (tp->phy_flags & TG3_PHYFLG_ADJUST_TRIM) { ++ tg3_writephy(tp, MII_TG3_DSP_RW_PORT, 0x110b); ++ tg3_writephy(tp, MII_TG3_TEST1, ++ MII_TG3_TEST1_TRIM_EN | 0x4); ++ } else ++ tg3_writephy(tp, MII_TG3_DSP_RW_PORT, 0x010b); ++ ++ tg3_phy_toggle_auxctl_smdsp(tp, false); ++ } ++ } ++ ++ /* Set Extended packet length bit (bit 14) on all chips that */ ++ /* support jumbo frames */ ++ if ((tp->phy_id & TG3_PHY_ID_MASK) == TG3_PHY_ID_BCM5401) { ++ /* Cannot do read-modify-write on 5401 */ ++ tg3_phy_auxctl_write(tp, MII_TG3_AUXCTL_SHDWSEL_AUXCTL, 0x4c20); ++ } else if (tg3_flag(tp, JUMBO_CAPABLE)) { ++ /* Set bit 14 with read-modify-write to preserve other bits */ ++ err = tg3_phy_auxctl_read(tp, ++ MII_TG3_AUXCTL_SHDWSEL_AUXCTL, &val); ++ if (!err) ++ tg3_phy_auxctl_write(tp, MII_TG3_AUXCTL_SHDWSEL_AUXCTL, ++ val | MII_TG3_AUXCTL_ACTL_EXTPKTLEN); ++ } ++ ++ /* Set phy register 0x10 bit 0 to high fifo elasticity to support ++ * jumbo frames transmission. ++ */ ++ if (tg3_flag(tp, JUMBO_CAPABLE)) { ++ if (!tg3_readphy(tp, MII_TG3_EXT_CTRL, &val)) ++ tg3_writephy(tp, MII_TG3_EXT_CTRL, ++ val | MII_TG3_EXT_CTRL_FIFO_ELASTIC); ++ } ++ ++ if (tg3_asic_rev(tp) == ASIC_REV_5906) { ++ /* adjust output voltage */ ++ tg3_writephy(tp, MII_TG3_FET_PTEST, 0x12); ++ } ++#ifndef BCM_INCLUDE_PHYLIB_SUPPORT ++ else if (tp->phy_flags & TG3_PHYFLG_IS_FET) { ++ u32 brcmtest; ++ if (!tg3_readphy(tp, MII_TG3_FET_TEST, &brcmtest) && ++ !tg3_writephy(tp, MII_TG3_FET_TEST, ++ brcmtest | MII_TG3_FET_SHADOW_EN)) { ++ u32 reg = MII_TG3_FET_SHDW_AUXMODE4; ++ ++ if (!tg3_readphy(tp, reg, &val)) { ++ val &= ~MII_TG3_FET_SHDW_AM4_LED_MASK; ++ val |= MII_TG3_FET_SHDW_AM4_LED_MODE1; ++ tg3_writephy(tp, reg, val); ++ } ++ ++ tg3_writephy(tp, MII_TG3_FET_TEST, brcmtest); ++ } ++ } ++#endif ++ ++ if (tg3_chip_rev_id(tp) == CHIPREV_ID_5762_A0) ++ tg3_phydsp_write(tp, 0xffb, 0x4000); ++ ++ tg3_phy_toggle_automdix(tp, true); ++ tg3_phy_set_wirespeed(tp); ++ return 0; ++} ++ ++#define TG3_GPIO_MSG_DRVR_PRES 0x00000001 ++#define TG3_GPIO_MSG_NEED_VAUX 0x00000002 ++#define TG3_GPIO_MSG_MASK (TG3_GPIO_MSG_DRVR_PRES | \ ++ TG3_GPIO_MSG_NEED_VAUX) ++#define TG3_GPIO_MSG_ALL_DRVR_PRES_MASK \ ++ ((TG3_GPIO_MSG_DRVR_PRES << 0) | \ ++ (TG3_GPIO_MSG_DRVR_PRES << 4) | \ ++ (TG3_GPIO_MSG_DRVR_PRES << 8) | \ ++ (TG3_GPIO_MSG_DRVR_PRES << 12)) ++ ++#define TG3_GPIO_MSG_ALL_NEED_VAUX_MASK \ ++ ((TG3_GPIO_MSG_NEED_VAUX << 0) | \ ++ (TG3_GPIO_MSG_NEED_VAUX << 4) | \ ++ (TG3_GPIO_MSG_NEED_VAUX << 8) | \ ++ (TG3_GPIO_MSG_NEED_VAUX << 12)) ++ ++static inline u32 tg3_set_function_status(struct tg3 *tp, u32 newstat) ++{ ++ u32 status, shift; ++ ++ if (tg3_asic_rev(tp) == ASIC_REV_5717 || ++ tg3_asic_rev(tp) == ASIC_REV_5719) ++ status = tg3_ape_read32(tp, TG3_APE_GPIO_MSG); ++ else ++ status = tr32(TG3_CPMU_DRV_STATUS); ++ ++ shift = TG3_APE_GPIO_MSG_SHIFT + 4 * tp->pci_fn; ++ status &= ~(TG3_GPIO_MSG_MASK << shift); ++ status |= (newstat << shift); ++ ++ if (tg3_asic_rev(tp) == ASIC_REV_5717 || ++ tg3_asic_rev(tp) == ASIC_REV_5719) ++ tg3_ape_write32(tp, TG3_APE_GPIO_MSG, status); ++ else ++ tw32(TG3_CPMU_DRV_STATUS, status); ++ ++ return status >> TG3_APE_GPIO_MSG_SHIFT; ++} ++ ++static inline int tg3_pwrsrc_switch_to_vmain(struct tg3 *tp) ++{ ++ if (!tg3_flag(tp, IS_NIC)) ++ return 0; ++ ++ if (tg3_asic_rev(tp) == ASIC_REV_5717 || ++ tg3_asic_rev(tp) == ASIC_REV_5719 || ++ tg3_asic_rev(tp) == ASIC_REV_5720) { ++ if (tg3_ape_lock(tp, TG3_APE_LOCK_GPIO)) ++ return -EIO; ++ ++ tg3_set_function_status(tp, TG3_GPIO_MSG_DRVR_PRES); ++ ++ tw32_wait_f(GRC_LOCAL_CTRL, tp->grc_local_ctrl, ++ TG3_GRC_LCLCTL_PWRSW_DELAY); ++ ++ tg3_ape_unlock(tp, TG3_APE_LOCK_GPIO); ++ } else { ++ tw32_wait_f(GRC_LOCAL_CTRL, tp->grc_local_ctrl, ++ TG3_GRC_LCLCTL_PWRSW_DELAY); ++ } ++ ++ return 0; ++} ++ ++static void tg3_pwrsrc_die_with_vmain(struct tg3 *tp) ++{ ++ u32 grc_local_ctrl; ++ ++ if (!tg3_flag(tp, IS_NIC) || ++ tg3_asic_rev(tp) == ASIC_REV_5700 || ++ tg3_asic_rev(tp) == ASIC_REV_5701) ++ return; ++ ++ grc_local_ctrl = tp->grc_local_ctrl | GRC_LCLCTRL_GPIO_OE1; ++ ++ tw32_wait_f(GRC_LOCAL_CTRL, ++ grc_local_ctrl | GRC_LCLCTRL_GPIO_OUTPUT1, ++ TG3_GRC_LCLCTL_PWRSW_DELAY); ++ ++ tw32_wait_f(GRC_LOCAL_CTRL, ++ grc_local_ctrl, ++ TG3_GRC_LCLCTL_PWRSW_DELAY); ++ ++ tw32_wait_f(GRC_LOCAL_CTRL, ++ grc_local_ctrl | GRC_LCLCTRL_GPIO_OUTPUT1, ++ TG3_GRC_LCLCTL_PWRSW_DELAY); ++} ++ ++static void tg3_pwrsrc_switch_to_vaux(struct tg3 *tp) ++{ ++ if (!tg3_flag(tp, IS_NIC)) ++ return; ++ ++ if (tg3_asic_rev(tp) == ASIC_REV_5700 || ++ tg3_asic_rev(tp) == ASIC_REV_5701) { ++ tw32_wait_f(GRC_LOCAL_CTRL, tp->grc_local_ctrl | ++ (GRC_LCLCTRL_GPIO_OE0 | ++ GRC_LCLCTRL_GPIO_OE1 | ++ GRC_LCLCTRL_GPIO_OE2 | ++ GRC_LCLCTRL_GPIO_OUTPUT0 | ++ GRC_LCLCTRL_GPIO_OUTPUT1), ++ TG3_GRC_LCLCTL_PWRSW_DELAY); ++ } else if (tp->pdev->device == PCI_DEVICE_ID_TIGON3_5761 || ++ tp->pdev->device == TG3PCI_DEVICE_TIGON3_5761S) { ++ /* The 5761 non-e device swaps GPIO 0 and GPIO 2. */ ++ u32 grc_local_ctrl = GRC_LCLCTRL_GPIO_OE0 | ++ GRC_LCLCTRL_GPIO_OE1 | ++ GRC_LCLCTRL_GPIO_OE2 | ++ GRC_LCLCTRL_GPIO_OUTPUT0 | ++ GRC_LCLCTRL_GPIO_OUTPUT1 | ++ tp->grc_local_ctrl; ++ tw32_wait_f(GRC_LOCAL_CTRL, grc_local_ctrl, ++ TG3_GRC_LCLCTL_PWRSW_DELAY); ++ ++ grc_local_ctrl |= GRC_LCLCTRL_GPIO_OUTPUT2; ++ tw32_wait_f(GRC_LOCAL_CTRL, grc_local_ctrl, ++ TG3_GRC_LCLCTL_PWRSW_DELAY); ++ ++ grc_local_ctrl &= ~GRC_LCLCTRL_GPIO_OUTPUT0; ++ tw32_wait_f(GRC_LOCAL_CTRL, grc_local_ctrl, ++ TG3_GRC_LCLCTL_PWRSW_DELAY); ++ } else { ++ u32 no_gpio2; ++ u32 grc_local_ctrl = 0; ++ ++ /* Workaround to prevent overdrawing Amps. */ ++ if (tg3_asic_rev(tp) == ASIC_REV_5714) { ++ grc_local_ctrl |= GRC_LCLCTRL_GPIO_OE3; ++ tw32_wait_f(GRC_LOCAL_CTRL, tp->grc_local_ctrl | ++ grc_local_ctrl, ++ TG3_GRC_LCLCTL_PWRSW_DELAY); ++ } ++ ++ /* On 5753 and variants, GPIO2 cannot be used. */ ++ no_gpio2 = tp->nic_sram_data_cfg & ++ NIC_SRAM_DATA_CFG_NO_GPIO2; ++ ++ grc_local_ctrl |= GRC_LCLCTRL_GPIO_OE0 | ++ GRC_LCLCTRL_GPIO_OE1 | ++ GRC_LCLCTRL_GPIO_OE2 | ++ GRC_LCLCTRL_GPIO_OUTPUT1 | ++ GRC_LCLCTRL_GPIO_OUTPUT2; ++ if (no_gpio2) { ++ grc_local_ctrl &= ~(GRC_LCLCTRL_GPIO_OE2 | ++ GRC_LCLCTRL_GPIO_OUTPUT2); ++ } ++ tw32_wait_f(GRC_LOCAL_CTRL, ++ tp->grc_local_ctrl | grc_local_ctrl, ++ TG3_GRC_LCLCTL_PWRSW_DELAY); ++ ++ grc_local_ctrl |= GRC_LCLCTRL_GPIO_OUTPUT0; ++ ++ tw32_wait_f(GRC_LOCAL_CTRL, ++ tp->grc_local_ctrl | grc_local_ctrl, ++ TG3_GRC_LCLCTL_PWRSW_DELAY); ++ ++ if (!no_gpio2) { ++ grc_local_ctrl &= ~GRC_LCLCTRL_GPIO_OUTPUT2; ++ tw32_wait_f(GRC_LOCAL_CTRL, ++ tp->grc_local_ctrl | grc_local_ctrl, ++ TG3_GRC_LCLCTL_PWRSW_DELAY); ++ } ++ } ++} ++ ++static void tg3_frob_aux_power_5717(struct tg3 *tp, bool wol_enable) ++{ ++ u32 msg = 0; ++ ++ /* Serialize power state transitions */ ++ if (tg3_ape_lock(tp, TG3_APE_LOCK_GPIO)) ++ return; ++ ++ if (tg3_flag(tp, ENABLE_ASF) || tg3_flag(tp, ENABLE_APE) || wol_enable) ++ msg = TG3_GPIO_MSG_NEED_VAUX; ++ ++ msg = tg3_set_function_status(tp, msg); ++ ++ if (msg & TG3_GPIO_MSG_ALL_DRVR_PRES_MASK) ++ goto done; ++ ++ if (msg & TG3_GPIO_MSG_ALL_NEED_VAUX_MASK) ++ tg3_pwrsrc_switch_to_vaux(tp); ++ else ++ tg3_pwrsrc_die_with_vmain(tp); ++ ++done: ++ tg3_ape_unlock(tp, TG3_APE_LOCK_GPIO); ++} ++ ++static void tg3_frob_aux_power(struct tg3 *tp, bool include_wol) ++{ ++ bool need_vaux = false; ++ ++ /* The GPIOs do something completely different on 57765. */ ++ if (!tg3_flag(tp, IS_NIC) || tg3_flag(tp, 57765_CLASS)) ++ return; ++ ++ if (tg3_asic_rev(tp) == ASIC_REV_5717 || ++ tg3_asic_rev(tp) == ASIC_REV_5719 || ++ tg3_asic_rev(tp) == ASIC_REV_5720) { ++ tg3_frob_aux_power_5717(tp, include_wol ? ++ tg3_flag(tp, WOL_ENABLE) != 0 : 0); ++ return; ++ } ++ ++ if (tp->pdev_peer && tp->pdev_peer != tp->pdev) { ++ struct net_device *dev_peer; ++ ++ dev_peer = pci_get_drvdata(tp->pdev_peer); ++ ++ /* remove_one() may have been run on the peer. */ ++ if (dev_peer) { ++ struct tg3 *tp_peer = netdev_priv(dev_peer); ++ ++ if (tg3_flag(tp_peer, INIT_COMPLETE)) ++ return; ++ ++ if ((include_wol && tg3_flag(tp_peer, WOL_ENABLE)) || ++ tg3_flag(tp_peer, ENABLE_ASF)) ++ need_vaux = true; ++ } ++ } ++ ++ if ((include_wol && tg3_flag(tp, WOL_ENABLE)) || ++ tg3_flag(tp, ENABLE_ASF)) ++ need_vaux = true; ++ ++ if (need_vaux) ++ tg3_pwrsrc_switch_to_vaux(tp); ++ else ++ tg3_pwrsrc_die_with_vmain(tp); ++} ++ ++static int tg3_5700_link_polarity(struct tg3 *tp, u32 speed) ++{ ++ if (tp->led_ctrl == LED_CTRL_MODE_PHY_2) ++ return 1; ++ else if ((tp->phy_id & TG3_PHY_ID_MASK) == TG3_PHY_ID_BCM5411) { ++ if (speed != SPEED_10) ++ return 1; ++ } else if (speed == SPEED_10) ++ return 1; ++ ++ return 0; ++} ++ ++static bool tg3_phy_power_bug(struct tg3 *tp) ++{ ++ switch (tg3_asic_rev(tp)) { ++ case ASIC_REV_5700: ++ case ASIC_REV_5704: ++ return true; ++ case ASIC_REV_5780: ++ if (tp->phy_flags & TG3_PHYFLG_MII_SERDES) ++ return true; ++ return false; ++ case ASIC_REV_5717: ++ if (!tp->pci_fn) ++ return true; ++ return false; ++ case ASIC_REV_5719: ++ case ASIC_REV_5720: ++ if ((tp->phy_flags & TG3_PHYFLG_MII_SERDES) && ++ !tp->pci_fn) ++ return true; ++ return false; ++ } ++ ++ return false; ++} ++ ++static bool tg3_phy_led_bug(struct tg3 *tp) ++{ ++ switch (tg3_asic_rev(tp)) { ++ case ASIC_REV_5719: ++ case ASIC_REV_5720: ++ if ((tp->phy_flags & TG3_PHYFLG_MII_SERDES) && ++ !tp->pci_fn) ++ return true; ++ return false; ++ } ++ ++ return false; ++} ++ ++static void tg3_power_down_phy(struct tg3 *tp, bool do_low_power) ++{ ++ u32 val; ++ ++ if (tp->phy_flags & TG3_PHYFLG_KEEP_LINK_ON_PWRDN) ++ return; ++ ++ if (tp->phy_flags & TG3_PHYFLG_PHY_SERDES) { ++ if (tg3_asic_rev(tp) == ASIC_REV_5704) { ++ u32 sg_dig_ctrl = tr32(SG_DIG_CTRL); ++ u32 serdes_cfg = tr32(MAC_SERDES_CFG); ++ ++ sg_dig_ctrl |= ++ SG_DIG_USING_HW_AUTONEG | SG_DIG_SOFT_RESET; ++ tw32(SG_DIG_CTRL, sg_dig_ctrl); ++ tw32(MAC_SERDES_CFG, serdes_cfg | (1 << 15)); ++ } ++ return; ++ } ++ ++ if (tg3_asic_rev(tp) == ASIC_REV_5906) { ++ tg3_bmcr_reset(tp); ++ val = tr32(GRC_MISC_CFG); ++ tw32_f(GRC_MISC_CFG, val | GRC_MISC_CFG_EPHY_IDDQ); ++ udelay(40); ++ return; ++ } else if (tp->phy_flags & TG3_PHYFLG_IS_FET) { ++ u32 phytest; ++ if (!tg3_readphy(tp, MII_TG3_FET_TEST, &phytest)) { ++ u32 phy; ++ ++ tg3_writephy(tp, MII_ADVERTISE, 0); ++ tg3_writephy(tp, MII_BMCR, ++ BMCR_ANENABLE | BMCR_ANRESTART); ++ ++ tg3_writephy(tp, MII_TG3_FET_TEST, ++ phytest | MII_TG3_FET_SHADOW_EN); ++ if (!tg3_readphy(tp, MII_TG3_FET_SHDW_AUXMODE4, &phy)) { ++ phy |= MII_TG3_FET_SHDW_AUXMODE4_SBPD; ++ tg3_writephy(tp, ++ MII_TG3_FET_SHDW_AUXMODE4, ++ phy); ++ } ++ tg3_writephy(tp, MII_TG3_FET_TEST, phytest); ++ } ++ return; ++ } else if (do_low_power) { ++ if (!tg3_phy_led_bug(tp)) ++ tg3_writephy(tp, MII_TG3_EXT_CTRL, ++ MII_TG3_EXT_CTRL_FORCE_LED_OFF); ++ ++ val = MII_TG3_AUXCTL_PCTL_100TX_LPWR | ++ MII_TG3_AUXCTL_PCTL_SPR_ISOLATE | ++ MII_TG3_AUXCTL_PCTL_VREG_11V; ++ tg3_phy_auxctl_write(tp, MII_TG3_AUXCTL_SHDWSEL_PWRCTL, val); ++ } ++ ++ /* The PHY should not be powered down on some chips because ++ * of bugs. ++ */ ++ if (tg3_phy_power_bug(tp)) ++ return; ++ ++ if (tg3_chip_rev(tp) == CHIPREV_5784_AX || ++ tg3_chip_rev(tp) == CHIPREV_5761_AX) { ++ val = tr32(TG3_CPMU_LSPD_1000MB_CLK); ++ val &= ~CPMU_LSPD_1000MB_MACCLK_MASK; ++ val |= CPMU_LSPD_1000MB_MACCLK_12_5; ++ tw32_f(TG3_CPMU_LSPD_1000MB_CLK, val); ++ } ++ ++ tg3_writephy(tp, MII_BMCR, BMCR_PDOWN); ++} ++ ++/* tp->lock is held. */ ++static int tg3_nvram_lock(struct tg3 *tp) ++{ ++ if (tg3_flag(tp, NVRAM)) { ++ int i; ++ ++ if (tp->nvram_lock_cnt == 0) { ++ tw32(NVRAM_SWARB, SWARB_REQ_SET1); ++ for (i = 0; i < 8000; i++) { ++ if (tr32(NVRAM_SWARB) & SWARB_GNT1) ++ break; ++ udelay(20); ++ } ++ if (i == 8000) { ++ tw32(NVRAM_SWARB, SWARB_REQ_CLR1); ++ return -ENODEV; ++ } ++ } ++ tp->nvram_lock_cnt++; ++ } ++ return 0; ++} ++ ++/* tp->lock is held. */ ++static void tg3_nvram_unlock(struct tg3 *tp) ++{ ++ if (tg3_flag(tp, NVRAM)) { ++ if (tp->nvram_lock_cnt > 0) ++ tp->nvram_lock_cnt--; ++ if (tp->nvram_lock_cnt == 0) ++ tw32_f(NVRAM_SWARB, SWARB_REQ_CLR1); ++ } ++} ++ ++/* tp->lock is held. */ ++static void tg3_enable_nvram_access(struct tg3 *tp) ++{ ++ if (tg3_flag(tp, 5750_PLUS) && !tg3_flag(tp, PROTECTED_NVRAM)) { ++ u32 nvaccess = tr32(NVRAM_ACCESS); ++ ++ tw32(NVRAM_ACCESS, nvaccess | ACCESS_ENABLE); ++ } ++} ++ ++/* tp->lock is held. */ ++static void tg3_disable_nvram_access(struct tg3 *tp) ++{ ++ if (tg3_flag(tp, 5750_PLUS) && !tg3_flag(tp, PROTECTED_NVRAM)) { ++ u32 nvaccess = tr32(NVRAM_ACCESS); ++ ++ tw32(NVRAM_ACCESS, nvaccess & ~ACCESS_ENABLE); ++ } ++} ++ ++static int tg3_nvram_read_using_eeprom(struct tg3 *tp, ++ u32 offset, u32 *val) ++{ ++ u32 tmp; ++ int i; ++ ++ if (offset > EEPROM_ADDR_ADDR_MASK || (offset % 4) != 0) ++ return -EINVAL; ++ ++ tmp = tr32(GRC_EEPROM_ADDR) & ~(EEPROM_ADDR_ADDR_MASK | ++ EEPROM_ADDR_DEVID_MASK | ++ EEPROM_ADDR_READ); ++ tw32(GRC_EEPROM_ADDR, ++ tmp | ++ (0 << EEPROM_ADDR_DEVID_SHIFT) | ++ ((offset << EEPROM_ADDR_ADDR_SHIFT) & ++ EEPROM_ADDR_ADDR_MASK) | ++ EEPROM_ADDR_READ | EEPROM_ADDR_START); ++ ++ for (i = 0; i < 1000; i++) { ++ tmp = tr32(GRC_EEPROM_ADDR); ++ ++ if (tmp & EEPROM_ADDR_COMPLETE) ++ break; ++ msleep(1); ++ } ++ if (!(tmp & EEPROM_ADDR_COMPLETE)) ++ return -EBUSY; ++ ++ tmp = tr32(GRC_EEPROM_DATA); ++ ++ /* ++ * The data will always be opposite the native endian ++ * format. Perform a blind byteswap to compensate. ++ */ ++ *val = swab32(tmp); ++ ++ return 0; ++} ++ ++#define NVRAM_CMD_TIMEOUT 10000 ++ ++static int tg3_nvram_exec_cmd(struct tg3 *tp, u32 nvram_cmd) ++{ ++ int i; ++ ++ tw32(NVRAM_CMD, nvram_cmd); ++ for (i = 0; i < NVRAM_CMD_TIMEOUT; i++) { ++#if defined(__VMKLNX__) || (LINUX_VERSION_CODE < 0x020627) /* 2.6.39 */ ++ udelay(10); ++#else ++ usleep_range(10, 40); ++#endif ++ if (tr32(NVRAM_CMD) & NVRAM_CMD_DONE) { ++ udelay(10); ++ break; ++ } ++ } ++ ++ if (i == NVRAM_CMD_TIMEOUT) ++ return -EBUSY; ++ ++ return 0; ++} ++ ++static u32 tg3_nvram_phys_addr(struct tg3 *tp, u32 addr) ++{ ++ if (tg3_flag(tp, NVRAM) && ++ tg3_flag(tp, NVRAM_BUFFERED) && ++ tg3_flag(tp, FLASH) && ++ !tg3_flag(tp, NO_NVRAM_ADDR_TRANS) && ++ (tp->nvram_jedecnum == JEDEC_ATMEL)) ++ ++ addr = ((addr / tp->nvram_pagesize) << ++ ATMEL_AT45DB0X1B_PAGE_POS) + ++ (addr % tp->nvram_pagesize); ++ ++ return addr; ++} ++ ++static u32 tg3_nvram_logical_addr(struct tg3 *tp, u32 addr) ++{ ++ if (tg3_flag(tp, NVRAM) && ++ tg3_flag(tp, NVRAM_BUFFERED) && ++ tg3_flag(tp, FLASH) && ++ !tg3_flag(tp, NO_NVRAM_ADDR_TRANS) && ++ (tp->nvram_jedecnum == JEDEC_ATMEL)) ++ ++ addr = ((addr >> ATMEL_AT45DB0X1B_PAGE_POS) * ++ tp->nvram_pagesize) + ++ (addr & ((1 << ATMEL_AT45DB0X1B_PAGE_POS) - 1)); ++ ++ return addr; ++} ++ ++/* NOTE: Data read in from NVRAM is byteswapped according to ++ * the byteswapping settings for all other register accesses. ++ * tg3 devices are BE devices, so on a BE machine, the data ++ * returned will be exactly as it is seen in NVRAM. On a LE ++ * machine, the 32-bit value will be byteswapped. ++ */ ++static int tg3_nvram_read(struct tg3 *tp, u32 offset, u32 *val) ++{ ++ int ret; ++ ++ if (!tg3_flag(tp, NVRAM)) ++ return tg3_nvram_read_using_eeprom(tp, offset, val); ++ ++ offset = tg3_nvram_phys_addr(tp, offset); ++ ++ if (offset > NVRAM_ADDR_MSK) ++ return -EINVAL; ++ ++ ret = tg3_nvram_lock(tp); ++ if (ret) ++ return ret; ++ ++ tg3_enable_nvram_access(tp); ++ ++ tw32(NVRAM_ADDR, offset); ++ ret = tg3_nvram_exec_cmd(tp, NVRAM_CMD_RD | NVRAM_CMD_GO | ++ NVRAM_CMD_FIRST | NVRAM_CMD_LAST | NVRAM_CMD_DONE); ++ ++ if (ret == 0) ++ *val = tr32(NVRAM_RDDATA); ++ ++ tg3_disable_nvram_access(tp); ++ ++ tg3_nvram_unlock(tp); ++ ++ return ret; ++} ++ ++/* Ensures NVRAM data is in bytestream format. */ ++static int tg3_nvram_read_be32(struct tg3 *tp, u32 offset, __be32 *val) ++{ ++ u32 v; ++ int res = tg3_nvram_read(tp, offset, &v); ++ if (!res) ++ *val = cpu_to_be32(v); ++ return res; ++} ++ ++static int tg3_nvram_write_block_using_eeprom(struct tg3 *tp, ++ u32 offset, u32 len, u8 *buf) ++{ ++ int i, j, rc = 0; ++ u32 val; ++ ++ for (i = 0; i < len; i += 4) { ++ u32 addr; ++ __be32 data; ++ ++ addr = offset + i; ++ ++ memcpy(&data, buf + i, 4); ++ ++ /* ++ * The SEEPROM interface expects the data to always be opposite ++ * the native endian format. We accomplish this by reversing ++ * all the operations that would have been performed on the ++ * data from a call to tg3_nvram_read_be32(). ++ */ ++ tw32(GRC_EEPROM_DATA, swab32(be32_to_cpu(data))); ++ ++ val = tr32(GRC_EEPROM_ADDR); ++ tw32(GRC_EEPROM_ADDR, val | EEPROM_ADDR_COMPLETE); ++ ++ val &= ~(EEPROM_ADDR_ADDR_MASK | EEPROM_ADDR_DEVID_MASK | ++ EEPROM_ADDR_READ); ++ tw32(GRC_EEPROM_ADDR, val | ++ (0 << EEPROM_ADDR_DEVID_SHIFT) | ++ (addr & EEPROM_ADDR_ADDR_MASK) | ++ EEPROM_ADDR_START | ++ EEPROM_ADDR_WRITE); ++ ++ for (j = 0; j < 1000; j++) { ++ val = tr32(GRC_EEPROM_ADDR); ++ ++ if (val & EEPROM_ADDR_COMPLETE) ++ break; ++ msleep(1); ++ } ++ if (!(val & EEPROM_ADDR_COMPLETE)) { ++ rc = -EBUSY; ++ break; ++ } ++ } ++ ++ return rc; ++} ++ ++/* offset and length are dword aligned */ ++static int tg3_nvram_write_block_unbuffered(struct tg3 *tp, u32 offset, u32 len, ++ u8 *buf) ++{ ++ int ret = 0; ++ u32 pagesize = tp->nvram_pagesize; ++ u32 pagemask = pagesize - 1; ++ u32 nvram_cmd; ++ u8 *tmp; ++ ++ tmp = kmalloc(pagesize, GFP_KERNEL); ++ if (tmp == NULL) ++ return -ENOMEM; ++ ++ while (len) { ++ int j; ++ u32 phy_addr, page_off, size; ++ ++ phy_addr = offset & ~pagemask; ++ ++ for (j = 0; j < pagesize; j += 4) { ++ ret = tg3_nvram_read_be32(tp, phy_addr + j, ++ (__be32 *) (tmp + j)); ++ if (ret) ++ break; ++ } ++ if (ret) ++ break; ++ ++ page_off = offset & pagemask; ++ size = pagesize; ++ if (len < size) ++ size = len; ++ ++ len -= size; ++ ++ memcpy(tmp + page_off, buf, size); ++ ++ offset = offset + (pagesize - page_off); ++ ++ tg3_enable_nvram_access(tp); ++ ++ /* ++ * Before we can erase the flash page, we need ++ * to issue a special "write enable" command. ++ */ ++ nvram_cmd = NVRAM_CMD_WREN | NVRAM_CMD_GO | NVRAM_CMD_DONE; ++ ++ if (tg3_nvram_exec_cmd(tp, nvram_cmd)) ++ break; ++ ++ /* Erase the target page */ ++ tw32(NVRAM_ADDR, phy_addr); ++ ++ nvram_cmd = NVRAM_CMD_GO | NVRAM_CMD_DONE | NVRAM_CMD_WR | ++ NVRAM_CMD_FIRST | NVRAM_CMD_LAST | NVRAM_CMD_ERASE; ++ ++ if (tg3_nvram_exec_cmd(tp, nvram_cmd)) ++ break; ++ ++ /* Issue another write enable to start the write. */ ++ nvram_cmd = NVRAM_CMD_WREN | NVRAM_CMD_GO | NVRAM_CMD_DONE; ++ ++ if (tg3_nvram_exec_cmd(tp, nvram_cmd)) ++ break; ++ ++ for (j = 0; j < pagesize; j += 4) { ++ __be32 data; ++ ++ data = *((__be32 *) (tmp + j)); ++ ++ tw32(NVRAM_WRDATA, be32_to_cpu(data)); ++ ++ tw32(NVRAM_ADDR, phy_addr + j); ++ ++ nvram_cmd = NVRAM_CMD_GO | NVRAM_CMD_DONE | ++ NVRAM_CMD_WR; ++ ++ if (j == 0) ++ nvram_cmd |= NVRAM_CMD_FIRST; ++ else if (j == (pagesize - 4)) ++ nvram_cmd |= NVRAM_CMD_LAST; ++ ++ ret = tg3_nvram_exec_cmd(tp, nvram_cmd); ++ if (ret) ++ break; ++ } ++ if (ret) ++ break; ++ } ++ ++ nvram_cmd = NVRAM_CMD_WRDI | NVRAM_CMD_GO | NVRAM_CMD_DONE; ++ tg3_nvram_exec_cmd(tp, nvram_cmd); ++ ++ kfree(tmp); ++ ++ return ret; ++} ++ ++/* offset and length are dword aligned */ ++static int tg3_nvram_write_block_buffered(struct tg3 *tp, u32 offset, u32 len, ++ u8 *buf) ++{ ++ int i, ret = 0; ++ ++ for (i = 0; i < len; i += 4, offset += 4) { ++ u32 page_off, phy_addr, nvram_cmd; ++ __be32 data; ++ ++ memcpy(&data, buf + i, 4); ++ tw32(NVRAM_WRDATA, be32_to_cpu(data)); ++ ++ page_off = offset % tp->nvram_pagesize; ++ ++ phy_addr = tg3_nvram_phys_addr(tp, offset); ++ ++ nvram_cmd = NVRAM_CMD_GO | NVRAM_CMD_DONE | NVRAM_CMD_WR; ++ ++ if (page_off == 0 || i == 0) ++ nvram_cmd |= NVRAM_CMD_FIRST; ++ if (page_off == (tp->nvram_pagesize - 4)) ++ nvram_cmd |= NVRAM_CMD_LAST; ++ ++ if (i == (len - 4)) ++ nvram_cmd |= NVRAM_CMD_LAST; ++ ++ if ((nvram_cmd & NVRAM_CMD_FIRST) || ++ !tg3_flag(tp, FLASH) || ++ !tg3_flag(tp, 57765_PLUS)) ++ tw32(NVRAM_ADDR, phy_addr); ++ ++ if (tg3_asic_rev(tp) != ASIC_REV_5752 && ++ !tg3_flag(tp, 5755_PLUS) && ++ (tp->nvram_jedecnum == JEDEC_ST) && ++ (nvram_cmd & NVRAM_CMD_FIRST)) { ++ u32 cmd; ++ ++ cmd = NVRAM_CMD_WREN | NVRAM_CMD_GO | NVRAM_CMD_DONE; ++ ret = tg3_nvram_exec_cmd(tp, cmd); ++ if (ret) ++ break; ++ } ++ if (!tg3_flag(tp, FLASH)) { ++ /* We always do complete word writes to eeprom. */ ++ nvram_cmd |= (NVRAM_CMD_FIRST | NVRAM_CMD_LAST); ++ } ++ ++ ret = tg3_nvram_exec_cmd(tp, nvram_cmd); ++ if (ret) ++ break; ++ } ++ return ret; ++} ++ ++/* offset and length are dword aligned */ ++static int tg3_nvram_write_block(struct tg3 *tp, u32 offset, u32 len, u8 *buf) ++{ ++ int ret; ++ ++ if (tg3_flag(tp, EEPROM_WRITE_PROT)) { ++ tw32_f(GRC_LOCAL_CTRL, tp->grc_local_ctrl & ++ ~GRC_LCLCTRL_GPIO_OUTPUT1); ++ udelay(40); ++ } ++ ++ if (!tg3_flag(tp, NVRAM)) { ++ ret = tg3_nvram_write_block_using_eeprom(tp, offset, len, buf); ++ } else { ++ u32 grc_mode; ++ ++ ret = tg3_nvram_lock(tp); ++ if (ret) ++ return ret; ++ ++ tg3_enable_nvram_access(tp); ++ if (tg3_flag(tp, 5750_PLUS) && !tg3_flag(tp, PROTECTED_NVRAM)) ++ tw32(NVRAM_WRITE1, 0x406); ++ ++ grc_mode = tr32(GRC_MODE); ++ tw32(GRC_MODE, grc_mode | GRC_MODE_NVRAM_WR_ENABLE); ++ ++ if (tg3_flag(tp, NVRAM_BUFFERED) || !tg3_flag(tp, FLASH)) { ++ ret = tg3_nvram_write_block_buffered(tp, offset, len, ++ buf); ++ } else { ++ ret = tg3_nvram_write_block_unbuffered(tp, offset, len, ++ buf); ++ } ++ ++ grc_mode = tr32(GRC_MODE); ++ tw32(GRC_MODE, grc_mode & ~GRC_MODE_NVRAM_WR_ENABLE); ++ ++ tg3_disable_nvram_access(tp); ++ tg3_nvram_unlock(tp); ++ } ++ ++ if (tg3_flag(tp, EEPROM_WRITE_PROT)) { ++ tw32_f(GRC_LOCAL_CTRL, tp->grc_local_ctrl); ++ udelay(40); ++ } ++ ++ return ret; ++} ++ ++#define RX_CPU_SCRATCH_BASE 0x30000 ++#define RX_CPU_SCRATCH_SIZE 0x04000 ++#define TX_CPU_SCRATCH_BASE 0x34000 ++#define TX_CPU_SCRATCH_SIZE 0x04000 ++ ++/* tp->lock is held. */ ++static int tg3_pause_cpu(struct tg3 *tp, u32 cpu_base) ++{ ++ int i; ++ const int iters = 10000; ++ ++ for (i = 0; i < iters; i++) { ++ tw32(cpu_base + CPU_STATE, 0xffffffff); ++ tw32(cpu_base + CPU_MODE, CPU_MODE_HALT); ++ if (tr32(cpu_base + CPU_MODE) & CPU_MODE_HALT) ++ break; ++ if (pci_channel_offline(tp->pdev)) ++ return -EBUSY; ++ } ++ ++ return (i == iters) ? -EBUSY : 0; ++} ++ ++/* tp->lock is held. */ ++static int tg3_rxcpu_pause(struct tg3 *tp) ++{ ++ int rc = tg3_pause_cpu(tp, RX_CPU_BASE); ++ ++ tw32(RX_CPU_BASE + CPU_STATE, 0xffffffff); ++ tw32_f(RX_CPU_BASE + CPU_MODE, CPU_MODE_HALT); ++ udelay(10); ++ ++ return rc; ++} ++ ++/* tp->lock is held. */ ++static int tg3_txcpu_pause(struct tg3 *tp) ++{ ++ return tg3_pause_cpu(tp, TX_CPU_BASE); ++} ++ ++/* tp->lock is held. */ ++static void tg3_resume_cpu(struct tg3 *tp, u32 cpu_base) ++{ ++ tw32(cpu_base + CPU_STATE, 0xffffffff); ++ tw32_f(cpu_base + CPU_MODE, 0x00000000); ++} ++ ++/* tp->lock is held. */ ++static void tg3_rxcpu_resume(struct tg3 *tp) ++{ ++ tg3_resume_cpu(tp, RX_CPU_BASE); ++} ++ ++/* tp->lock is held. */ ++static int tg3_halt_cpu(struct tg3 *tp, u32 cpu_base) ++{ ++ int rc; ++ ++ BUG_ON(cpu_base == TX_CPU_BASE && tg3_flag(tp, 5705_PLUS)); ++ ++ if (tg3_asic_rev(tp) == ASIC_REV_5906) { ++ u32 val = tr32(GRC_VCPU_EXT_CTRL); ++ ++ tw32(GRC_VCPU_EXT_CTRL, val | GRC_VCPU_EXT_CTRL_HALT_CPU); ++ return 0; ++ } ++ if (cpu_base == RX_CPU_BASE) { ++ rc = tg3_rxcpu_pause(tp); ++ } else { ++ /* ++ * There is only an Rx CPU for the 5750 derivative in the ++ * BCM4785. ++ */ ++ if (tg3_flag(tp, IS_SSB_CORE)) ++ return 0; ++ ++ rc = tg3_txcpu_pause(tp); ++ } ++ ++ if (rc) { ++ netdev_err(tp->dev, "%s timed out, %s CPU\n", ++ __func__, cpu_base == RX_CPU_BASE ? "RX" : "TX"); ++ return -ENODEV; ++ } ++ ++ /* Clear firmware's nvram arbitration. */ ++ if (tg3_flag(tp, NVRAM)) ++ tw32(NVRAM_SWARB, SWARB_REQ_CLR0); ++ return 0; ++} ++ ++static int tg3_fw_data_len(const struct tg3_firmware_hdr *fw_hdr) ++{ ++ return (fw_hdr->len - TG3_FW_HDR_LEN) / sizeof(u32); ++} ++ ++/* tp->lock is held. */ ++static int tg3_load_firmware_cpu(struct tg3 *tp, u32 cpu_base, ++ u32 cpu_scratch_base, int cpu_scratch_size, ++ const struct tg3_firmware_hdr *fw_hdr) ++{ ++ int err, i; ++ void (*write_op)(struct tg3 *, u32, u32); ++ int total_len = tp->fw->size; ++ ++ if (cpu_base == TX_CPU_BASE && tg3_flag(tp, 5705_PLUS)) { ++ netdev_err(tp->dev, ++ "%s: Trying to load TX cpu firmware which is 5705\n", ++ __func__); ++ return -EINVAL; ++ } ++ ++ if (tg3_flag(tp, 5705_PLUS) && tg3_asic_rev(tp) != ASIC_REV_57766) ++ write_op = tg3_write_mem; ++ else ++ write_op = tg3_write_indirect_reg32; ++ ++ if (tg3_asic_rev(tp) != ASIC_REV_57766) { ++ /* It is possible that bootcode is still loading at this point. ++ * Get the nvram lock first before halting the cpu. ++ */ ++ int lock_err = tg3_nvram_lock(tp); ++ err = tg3_halt_cpu(tp, cpu_base); ++ if (!lock_err) ++ tg3_nvram_unlock(tp); ++ if (err) ++ goto out; ++ ++ for (i = 0; i < cpu_scratch_size; i += sizeof(u32)) ++ write_op(tp, cpu_scratch_base + i, 0); ++ tw32(cpu_base + CPU_STATE, 0xffffffff); ++ tw32(cpu_base + CPU_MODE, ++ tr32(cpu_base + CPU_MODE) | CPU_MODE_HALT); ++ } else { ++ /* Subtract additional main header for fragmented firmware and ++ * advance to the first fragment ++ */ ++ total_len -= TG3_FW_HDR_LEN; ++ fw_hdr++; ++ } ++ ++ do { ++ u32 *fw_data = (u32 *)(fw_hdr + 1); ++ for (i = 0; i < tg3_fw_data_len(fw_hdr); i++) ++ write_op(tp, cpu_scratch_base + ++ (fw_hdr->base_addr & 0xffff) + ++ (i * sizeof(u32)), ++ fw_data[i]); ++ ++ total_len -= fw_hdr->len; ++ ++ /* Advance to next fragment */ ++ fw_hdr = (struct tg3_firmware_hdr *) ++ ((void *)fw_hdr + fw_hdr->len); ++ } while (total_len > 0); ++ ++ err = 0; ++ ++out: ++ return err; ++} ++ ++/* tp->lock is held. */ ++static int tg3_pause_cpu_and_set_pc(struct tg3 *tp, u32 cpu_base, u32 pc) ++{ ++ int i; ++ const int iters = 5; ++ ++ tw32(cpu_base + CPU_STATE, 0xffffffff); ++ tw32_f(cpu_base + CPU_PC, pc); ++ ++ for (i = 0; i < iters; i++) { ++ if (tr32(cpu_base + CPU_PC) == pc) ++ break; ++ tw32(cpu_base + CPU_STATE, 0xffffffff); ++ tw32(cpu_base + CPU_MODE, CPU_MODE_HALT); ++ tw32_f(cpu_base + CPU_PC, pc); ++ udelay(1000); ++ } ++ ++ return (i == iters) ? -EBUSY : 0; ++} ++ ++/* tp->lock is held. */ ++static int tg3_load_5701_a0_firmware_fix(struct tg3 *tp) ++{ ++ const struct tg3_firmware_hdr *fw_hdr; ++ int err; ++ ++ fw_hdr = (struct tg3_firmware_hdr *)tp->fw->data; ++ ++ /* Firmware blob starts with version numbers, followed by ++ start address and length. We are setting complete length. ++ length = end_address_of_bss - start_address_of_text. ++ Remainder is the blob to be loaded contiguously ++ from start address. */ ++ ++ err = tg3_load_firmware_cpu(tp, RX_CPU_BASE, ++ RX_CPU_SCRATCH_BASE, RX_CPU_SCRATCH_SIZE, ++ fw_hdr); ++ if (err) ++ return err; ++ ++ err = tg3_load_firmware_cpu(tp, TX_CPU_BASE, ++ TX_CPU_SCRATCH_BASE, TX_CPU_SCRATCH_SIZE, ++ fw_hdr); ++ if (err) ++ return err; ++ ++ /* Now startup only the RX cpu. */ ++ err = tg3_pause_cpu_and_set_pc(tp, RX_CPU_BASE, ++ fw_hdr->base_addr); ++ if (err) { ++ netdev_err(tp->dev, "%s fails to set RX CPU PC, is %08x " ++ "should be %08x\n", __func__, ++ tr32(RX_CPU_BASE + CPU_PC), ++ fw_hdr->base_addr); ++ return -ENODEV; ++ } ++ ++ tg3_rxcpu_resume(tp); ++ ++ return 0; ++} ++ ++static int tg3_validate_rxcpu_state(struct tg3 *tp) ++{ ++ const int iters = 1000; ++ int i; ++ u32 val; ++ ++ /* Wait for boot code to complete initialization and enter service ++ * loop. It is then safe to download service patches ++ */ ++ for (i = 0; i < iters; i++) { ++ if (tr32(RX_CPU_HWBKPT) == TG3_SBROM_IN_SERVICE_LOOP) ++ break; ++ ++ udelay(10); ++ } ++ ++ if (i == iters) { ++ netdev_err(tp->dev, "Boot code not ready for service patches\n"); ++ return -EBUSY; ++ } ++ ++ val = tg3_read_indirect_reg32(tp, TG3_57766_FW_HANDSHAKE); ++ if (val & 0xff) { ++ netdev_warn(tp->dev, ++ "Other patches exist. Not downloading EEE patch\n"); ++ return -EEXIST; ++ } ++ ++ return 0; ++} ++ ++/* tp->lock is held. */ ++static void tg3_load_57766_firmware(struct tg3 *tp) ++{ ++ struct tg3_firmware_hdr *fw_hdr; ++ ++ if (!tg3_flag(tp, NO_NVRAM)) ++ return; ++ ++ if (tg3_validate_rxcpu_state(tp)) ++ return; ++ ++ if (!tp->fw) ++ return; ++ ++ /* This firmware blob has a different format than older firmware ++ * releases as given below. The main difference is we have fragmented ++ * data to be written to non-contiguous locations. ++ * ++ * In the beginning we have a firmware header identical to other ++ * firmware which consists of version, base addr and length. The length ++ * here is unused and set to 0xffffffff. ++ * ++ * This is followed by a series of firmware fragments which are ++ * individually identical to previous firmware. i.e. they have the ++ * firmware header and followed by data for that fragment. The version ++ * field of the individual fragment header is unused. ++ */ ++ ++ fw_hdr = (struct tg3_firmware_hdr *)tp->fw->data; ++ if (fw_hdr->base_addr != TG3_57766_FW_BASE_ADDR) ++ return; ++ ++ if (tg3_rxcpu_pause(tp)) ++ return; ++ ++ /* tg3_load_firmware_cpu() will always succeed for the 57766 */ ++ tg3_load_firmware_cpu(tp, 0, TG3_57766_FW_BASE_ADDR, 0, fw_hdr); ++ ++ tg3_rxcpu_resume(tp); ++} ++ ++#if TG3_TSO_SUPPORT != 0 ++ ++/* tp->lock is held. */ ++static int tg3_load_tso_firmware(struct tg3 *tp) ++{ ++ const struct tg3_firmware_hdr *fw_hdr; ++ unsigned long cpu_base, cpu_scratch_base, cpu_scratch_size; ++ int err; ++ ++ if (!tg3_flag(tp, FW_TSO)) ++ return 0; ++ ++ fw_hdr = (struct tg3_firmware_hdr *)tp->fw->data; ++ ++ /* Firmware blob starts with version numbers, followed by ++ start address and length. We are setting complete length. ++ length = end_address_of_bss - start_address_of_text. ++ Remainder is the blob to be loaded contiguously ++ from start address. */ ++ ++ if (tg3_asic_rev(tp) == ASIC_REV_5705) { ++ cpu_base = RX_CPU_BASE; ++ cpu_scratch_base = NIC_SRAM_MBUF_POOL_BASE5705; ++ cpu_scratch_size = (tp->fw->size - TG3_FW_HDR_LEN + ++ TG3_TSO5_FW_SBSS_LEN + ++ TG3_TSO5_FW_BSS_LEN); ++ } else { ++ cpu_base = TX_CPU_BASE; ++ cpu_scratch_base = TX_CPU_SCRATCH_BASE; ++ cpu_scratch_size = TX_CPU_SCRATCH_SIZE; ++ } ++ ++ err = tg3_load_firmware_cpu(tp, cpu_base, ++ cpu_scratch_base, cpu_scratch_size, ++ fw_hdr); ++ if (err) ++ return err; ++ ++ /* Now startup the cpu. */ ++ err = tg3_pause_cpu_and_set_pc(tp, cpu_base, ++ fw_hdr->base_addr); ++ if (err) { ++ netdev_err(tp->dev, ++ "%s fails to set CPU PC, is %08x should be %08x\n", ++ __func__, tr32(cpu_base + CPU_PC), ++ fw_hdr->base_addr); ++ return -ENODEV; ++ } ++ ++ tg3_resume_cpu(tp, cpu_base); ++ return 0; ++} ++ ++#endif /* TG3_TSO_SUPPORT != 0 */ ++ ++/* tp->lock is held. */ ++static void __tg3_set_one_mac_addr(struct tg3 *tp, u8 *mac_addr, int index) ++{ ++ u32 addr_high, addr_low; ++ ++ addr_high = ((mac_addr[0] << 8) | mac_addr[1]); ++ addr_low = ((mac_addr[2] << 24) | (mac_addr[3] << 16) | ++ (mac_addr[4] << 8) | mac_addr[5]); ++ ++ if (index < 4) { ++ tw32(MAC_ADDR_0_HIGH + (index * 8), addr_high); ++ tw32(MAC_ADDR_0_LOW + (index * 8), addr_low); ++ } else { ++ index -= 4; ++ tw32(MAC_EXTADDR_0_HIGH + (index * 8), addr_high); ++ tw32(MAC_EXTADDR_0_LOW + (index * 8), addr_low); ++ } ++} ++ ++/* tp->lock is held. */ ++static void __tg3_set_mac_addr(struct tg3 *tp, bool skip_mac_1) ++{ ++ u32 addr_high; ++ int i; ++ ++ for (i = 0; i < 4; i++) { ++ if (i == 1 && skip_mac_1) ++ continue; ++ __tg3_set_one_mac_addr(tp, tp->dev->dev_addr, i); ++ } ++ ++ if (tg3_asic_rev(tp) == ASIC_REV_5703 || ++ tg3_asic_rev(tp) == ASIC_REV_5704) { ++ for (i = 4; i < 16; i++) ++ __tg3_set_one_mac_addr(tp, tp->dev->dev_addr, i); ++ } ++ ++ addr_high = (tp->dev->dev_addr[0] + ++ tp->dev->dev_addr[1] + ++ tp->dev->dev_addr[2] + ++ tp->dev->dev_addr[3] + ++ tp->dev->dev_addr[4] + ++ tp->dev->dev_addr[5]) & ++ TX_BACKOFF_SEED_MASK; ++ tw32(MAC_TX_BACKOFF_SEED, addr_high); ++} ++ ++static void tg3_enable_register_access(struct tg3 *tp) ++{ ++ /* ++ * Make sure register accesses (indirect or otherwise) will function ++ * correctly. ++ */ ++ pci_write_config_dword(tp->pdev, ++ TG3PCI_MISC_HOST_CTRL, tp->misc_host_ctrl); ++} ++ ++static int tg3_power_up(struct tg3 *tp) ++{ ++ int err; ++ ++ tg3_enable_register_access(tp); ++ ++ /* Kernels less than around 2.6.37 still need this */ ++ pci_enable_wake(tp->pdev, PCI_D0, false); ++ ++ err = pci_set_power_state(tp->pdev, PCI_D0); ++ if (!err) { ++ /* Switch out of Vaux if it is a NIC */ ++ tg3_pwrsrc_switch_to_vmain(tp); ++ } else { ++ netdev_err(tp->dev, "Transition to D0 failed\n"); ++ } ++ ++ return err; ++} ++ ++static void tg3_power_down(struct tg3 *tp) ++{ ++ pci_wake_from_d3(tp->pdev, tg3_flag(tp, WOL_ENABLE)); ++ pci_set_power_state(tp->pdev, PCI_D3hot); ++} ++ ++static int tg3_setup_phy(struct tg3 *, bool); ++ ++static int tg3_power_down_prepare(struct tg3 *tp) ++{ ++ u32 misc_host_ctrl; ++ bool device_should_wake, do_low_power; ++ ++ tg3_enable_register_access(tp); ++ ++ /* Restore the CLKREQ setting. */ ++ if (tg3_flag(tp, CLKREQ_BUG)) ++ pcie_capability_set_word(tp->pdev, PCI_EXP_LNKCTL, ++ PCI_EXP_LNKCTL_CLKREQ_EN); ++ ++ misc_host_ctrl = tr32(TG3PCI_MISC_HOST_CTRL); ++ tw32(TG3PCI_MISC_HOST_CTRL, ++ misc_host_ctrl | MISC_HOST_CTRL_MASK_PCI_INT); ++ ++ device_should_wake = device_may_wakeup(&tp->pdev->dev) && ++ tg3_flag(tp, WOL_ENABLE); ++ ++#ifdef BCM_INCLUDE_PHYLIB_SUPPORT ++ if (tg3_flag(tp, USE_PHYLIB)) { ++ do_low_power = false; ++ if ((tp->phy_flags & TG3_PHYFLG_IS_CONNECTED) && ++ !(tp->phy_flags & TG3_PHYFLG_IS_LOW_POWER)) { ++ struct phy_device *phydev; ++ u32 phyid, advertising; ++ ++ phydev = tp->mdio_bus->phy_map[tp->phy_addr]; ++ ++ tp->phy_flags |= TG3_PHYFLG_IS_LOW_POWER; ++ ++ tp->link_config.speed = phydev->speed; ++ tp->link_config.duplex = phydev->duplex; ++ tp->link_config.autoneg = phydev->autoneg; ++ tp->link_config.advertising = phydev->advertising; ++ ++ advertising = ADVERTISED_TP | ++ ADVERTISED_Pause | ++ ADVERTISED_Autoneg | ++ ADVERTISED_10baseT_Half; ++ ++ if (tg3_flag(tp, ENABLE_ASF) || device_should_wake) { ++ if (tg3_flag(tp, WOL_SPEED_100MB)) ++ advertising |= ++ ADVERTISED_100baseT_Half | ++ ADVERTISED_100baseT_Full | ++ ADVERTISED_10baseT_Full; ++ else ++ advertising |= ADVERTISED_10baseT_Full; ++ } ++ ++ phydev->advertising = advertising; ++ ++ phy_start_aneg(phydev); ++ ++ phyid = phydev->drv->phy_id & phydev->drv->phy_id_mask; ++ if (phyid != PHY_ID_BCMAC131) { ++ phyid &= PHY_BCM_OUI_MASK; ++ if (phyid == PHY_BCM_OUI_1 || ++ phyid == PHY_BCM_OUI_2 || ++ phyid == PHY_BCM_OUI_3) ++ do_low_power = true; ++ } ++ } ++ } else ++#endif /* BCM_INCLUDE_PHYLIB_SUPPORT */ ++ { ++ do_low_power = true; ++ ++ if (!(tp->phy_flags & TG3_PHYFLG_IS_LOW_POWER)) ++ tp->phy_flags |= TG3_PHYFLG_IS_LOW_POWER; ++ ++ if (!(tp->phy_flags & TG3_PHYFLG_ANY_SERDES)) ++ tg3_setup_phy(tp, false); ++ } ++ ++ if (tg3_asic_rev(tp) == ASIC_REV_5906) { ++ u32 val; ++ ++ val = tr32(GRC_VCPU_EXT_CTRL); ++ tw32(GRC_VCPU_EXT_CTRL, val | GRC_VCPU_EXT_CTRL_DISABLE_WOL); ++ } else if (!tg3_flag(tp, ENABLE_ASF)) { ++ int i; ++ u32 val; ++ ++ for (i = 0; i < 200; i++) { ++ tg3_read_mem(tp, NIC_SRAM_FW_ASF_STATUS_MBOX, &val); ++ if (val == ~NIC_SRAM_FIRMWARE_MBOX_MAGIC1) ++ break; ++ msleep(1); ++ } ++ } ++ if (tg3_flag(tp, WOL_CAP)) ++ tg3_write_mem(tp, NIC_SRAM_WOL_MBOX, WOL_SIGNATURE | ++ WOL_DRV_STATE_SHUTDOWN | ++ WOL_DRV_WOL | ++ WOL_SET_MAGIC_PKT); ++ ++ if (device_should_wake) { ++ u32 mac_mode; ++ ++ if (!(tp->phy_flags & TG3_PHYFLG_PHY_SERDES)) { ++ if (do_low_power && ++ !(tp->phy_flags & TG3_PHYFLG_IS_FET)) { ++ tg3_phy_auxctl_write(tp, ++ MII_TG3_AUXCTL_SHDWSEL_PWRCTL, ++ MII_TG3_AUXCTL_PCTL_WOL_EN | ++ MII_TG3_AUXCTL_PCTL_100TX_LPWR | ++ MII_TG3_AUXCTL_PCTL_CL_AB_TXDAC); ++ udelay(40); ++ } ++ ++ if (tp->phy_flags & TG3_PHYFLG_MII_SERDES) ++ mac_mode = MAC_MODE_PORT_MODE_GMII; ++ else if (tp->phy_flags & ++ TG3_PHYFLG_KEEP_LINK_ON_PWRDN) { ++ if (tp->link_config.active_speed == SPEED_1000) ++ mac_mode = MAC_MODE_PORT_MODE_GMII; ++ else ++ mac_mode = MAC_MODE_PORT_MODE_MII; ++ } else ++ mac_mode = MAC_MODE_PORT_MODE_MII; ++ ++ mac_mode |= tp->mac_mode & MAC_MODE_LINK_POLARITY; ++ if (tg3_asic_rev(tp) == ASIC_REV_5700) { ++ u32 speed = tg3_flag(tp, WOL_SPEED_100MB) ? ++ SPEED_100 : SPEED_10; ++ if (tg3_5700_link_polarity(tp, speed)) ++ mac_mode |= MAC_MODE_LINK_POLARITY; ++ else ++ mac_mode &= ~MAC_MODE_LINK_POLARITY; ++ } ++ } else { ++ mac_mode = MAC_MODE_PORT_MODE_TBI; ++ } ++ ++ if (!tg3_flag(tp, 5750_PLUS)) ++ tw32(MAC_LED_CTRL, tp->led_ctrl); ++ ++ mac_mode |= MAC_MODE_MAGIC_PKT_ENABLE; ++ if ((tg3_flag(tp, 5705_PLUS) && !tg3_flag(tp, 5780_CLASS)) && ++ (tg3_flag(tp, ENABLE_ASF) || tg3_flag(tp, ENABLE_APE))) ++ mac_mode |= MAC_MODE_KEEP_FRAME_IN_WOL; ++ ++ if (tg3_flag(tp, ENABLE_APE)) ++ mac_mode |= MAC_MODE_APE_TX_EN | ++ MAC_MODE_APE_RX_EN | ++ MAC_MODE_TDE_ENABLE; ++ ++ tw32_f(MAC_MODE, mac_mode); ++ udelay(100); ++ ++ tw32_f(MAC_RX_MODE, RX_MODE_ENABLE); ++ udelay(10); ++ } ++ ++ if (!tg3_flag(tp, WOL_SPEED_100MB) && ++ (tg3_asic_rev(tp) == ASIC_REV_5700 || ++ tg3_asic_rev(tp) == ASIC_REV_5701)) { ++ u32 base_val; ++ ++ base_val = tp->pci_clock_ctrl; ++ base_val |= (CLOCK_CTRL_RXCLK_DISABLE | ++ CLOCK_CTRL_TXCLK_DISABLE); ++ ++ tw32_wait_f(TG3PCI_CLOCK_CTRL, base_val | CLOCK_CTRL_ALTCLK | ++ CLOCK_CTRL_PWRDOWN_PLL133, 40); ++ } else if (tg3_flag(tp, 5780_CLASS) || ++ tg3_flag(tp, CPMU_PRESENT) || ++ tg3_asic_rev(tp) == ASIC_REV_5906) { ++ /* do nothing */ ++ } else if (!(tg3_flag(tp, 5750_PLUS) && tg3_flag(tp, ENABLE_ASF))) { ++ u32 newbits1, newbits2; ++ ++ if (tg3_asic_rev(tp) == ASIC_REV_5700 || ++ tg3_asic_rev(tp) == ASIC_REV_5701) { ++ newbits1 = (CLOCK_CTRL_RXCLK_DISABLE | ++ CLOCK_CTRL_TXCLK_DISABLE | ++ CLOCK_CTRL_ALTCLK); ++ newbits2 = newbits1 | CLOCK_CTRL_44MHZ_CORE; ++ } else if (tg3_flag(tp, 5705_PLUS)) { ++ newbits1 = CLOCK_CTRL_625_CORE; ++ newbits2 = newbits1 | CLOCK_CTRL_ALTCLK; ++ } else { ++ newbits1 = CLOCK_CTRL_ALTCLK; ++ newbits2 = newbits1 | CLOCK_CTRL_44MHZ_CORE; ++ } ++ ++ tw32_wait_f(TG3PCI_CLOCK_CTRL, tp->pci_clock_ctrl | newbits1, ++ 40); ++ ++ tw32_wait_f(TG3PCI_CLOCK_CTRL, tp->pci_clock_ctrl | newbits2, ++ 40); ++ ++ if (!tg3_flag(tp, 5705_PLUS)) { ++ u32 newbits3; ++ ++ if (tg3_asic_rev(tp) == ASIC_REV_5700 || ++ tg3_asic_rev(tp) == ASIC_REV_5701) { ++ newbits3 = (CLOCK_CTRL_RXCLK_DISABLE | ++ CLOCK_CTRL_TXCLK_DISABLE | ++ CLOCK_CTRL_44MHZ_CORE); ++ } else { ++ newbits3 = CLOCK_CTRL_44MHZ_CORE; ++ } ++ ++ tw32_wait_f(TG3PCI_CLOCK_CTRL, ++ tp->pci_clock_ctrl | newbits3, 40); ++ } ++ } ++ ++ if (!(device_should_wake) && !tg3_flag(tp, ENABLE_ASF)) ++ tg3_power_down_phy(tp, do_low_power); ++ ++ tg3_frob_aux_power(tp, true); ++ ++ /* Workaround for unstable PLL clock */ ++ if ((!tg3_flag(tp, IS_SSB_CORE)) && ++ ((tg3_chip_rev(tp) == CHIPREV_5750_AX) || ++ (tg3_chip_rev(tp) == CHIPREV_5750_BX))) { ++ u32 val = tr32(0x7d00); ++ ++ val &= ~((1 << 16) | (1 << 4) | (1 << 2) | (1 << 1) | 1); ++ tw32(0x7d00, val); ++ if (!tg3_flag(tp, ENABLE_ASF)) { ++ int err; ++ ++ err = tg3_nvram_lock(tp); ++ tg3_halt_cpu(tp, RX_CPU_BASE); ++ if (!err) ++ tg3_nvram_unlock(tp); ++ } ++ } ++ ++ tg3_write_sig_post_reset(tp, RESET_KIND_SHUTDOWN); ++ ++ tg3_ape_driver_state_change(tp, RESET_KIND_SHUTDOWN); ++ ++ return 0; ++} ++ ++static void tg3_aux_stat_to_speed_duplex(struct tg3 *tp, u32 val, u16 *speed, u8 *duplex) ++{ ++ switch (val & MII_TG3_AUX_STAT_SPDMASK) { ++ case MII_TG3_AUX_STAT_10HALF: ++ *speed = SPEED_10; ++ *duplex = DUPLEX_HALF; ++ break; ++ ++ case MII_TG3_AUX_STAT_10FULL: ++ *speed = SPEED_10; ++ *duplex = DUPLEX_FULL; ++ break; ++ ++ case MII_TG3_AUX_STAT_100HALF: ++ *speed = SPEED_100; ++ *duplex = DUPLEX_HALF; ++ break; ++ ++ case MII_TG3_AUX_STAT_100FULL: ++ *speed = SPEED_100; ++ *duplex = DUPLEX_FULL; ++ break; ++ ++ case MII_TG3_AUX_STAT_1000HALF: ++ *speed = SPEED_1000; ++ *duplex = DUPLEX_HALF; ++ break; ++ ++ case MII_TG3_AUX_STAT_1000FULL: ++ *speed = SPEED_1000; ++ *duplex = DUPLEX_FULL; ++ break; ++ ++ default: ++ if (tp->phy_flags & TG3_PHYFLG_IS_FET) { ++ *speed = (val & MII_TG3_AUX_STAT_100) ? SPEED_100 : ++ SPEED_10; ++ *duplex = (val & MII_TG3_AUX_STAT_FULL) ? DUPLEX_FULL : ++ DUPLEX_HALF; ++ break; ++ } ++ *speed = SPEED_UNKNOWN; ++ *duplex = DUPLEX_UNKNOWN; ++ break; ++ } ++} ++ ++static int tg3_phy_autoneg_cfg(struct tg3 *tp, u32 advertise, u32 flowctrl) ++{ ++ int err = 0; ++ u32 val, new_adv; ++ ++ new_adv = ADVERTISE_CSMA; ++ new_adv |= ethtool_adv_to_mii_adv_t(advertise) & ADVERTISE_ALL; ++ new_adv |= mii_advertise_flowctrl(flowctrl); ++ ++ err = tg3_writephy(tp, MII_ADVERTISE, new_adv); ++ if (err) ++ goto done; ++ ++ if (!(tp->phy_flags & TG3_PHYFLG_10_100_ONLY)) { ++ new_adv = ethtool_adv_to_mii_ctrl1000_t(advertise); ++ ++ if (tg3_chip_rev_id(tp) == CHIPREV_ID_5701_A0 || ++ tg3_chip_rev_id(tp) == CHIPREV_ID_5701_B0) ++ new_adv |= CTL1000_AS_MASTER | CTL1000_ENABLE_MASTER; ++ ++ err = tg3_writephy(tp, MII_CTRL1000, new_adv); ++ if (err) ++ goto done; ++ } ++ ++ if (!(tp->phy_flags & TG3_PHYFLG_EEE_CAP)) ++ goto done; ++ ++#ifndef BCM_INCLUDE_PHYLIB_SUPPORT ++ if ((tp->phy_id & TG3_PHY_ID_MASK) != TG3_PHY_ID_BCM50612E) ++#endif ++ tw32(TG3_CPMU_EEE_MODE, ++ tr32(TG3_CPMU_EEE_MODE) & ~TG3_CPMU_EEEMD_LPI_ENABLE); ++ ++ err = tg3_phy_toggle_auxctl_smdsp(tp, true); ++ if (!err) { ++ u32 err2; ++ ++ val = 0; ++ /* Advertise 100-BaseTX EEE ability */ ++ if (advertise & ADVERTISED_100baseT_Full) ++ val |= MDIO_AN_EEE_ADV_100TX; ++ /* Advertise 1000-BaseT EEE ability */ ++ if (advertise & ADVERTISED_1000baseT_Full) ++ val |= MDIO_AN_EEE_ADV_1000T; ++ ++ if (!tp->eee.eee_enabled) { ++ val = 0; ++ tp->eee.advertised = 0; ++ } else { ++ tp->eee.advertised = advertise & ++ (ADVERTISED_100baseT_Full | ++ ADVERTISED_1000baseT_Full); ++ } ++ ++ err = tg3_phy_cl45_write(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV, val); ++ if (err) ++ goto err_out; ++ ++ switch (tg3_asic_rev(tp)) { ++ case ASIC_REV_5717: ++ case ASIC_REV_57765: ++ case ASIC_REV_57766: ++ case ASIC_REV_5719: ++ /* If we advertised any eee advertisements above... */ ++ if (val) ++ val = MII_TG3_DSP_TAP26_ALNOKO | ++ MII_TG3_DSP_TAP26_RMRXSTO | ++ MII_TG3_DSP_TAP26_OPCSINPT; ++ tg3_phydsp_write(tp, MII_TG3_DSP_TAP26, val); ++ /* Fall through */ ++ case ASIC_REV_5720: ++ case ASIC_REV_5762: ++ if (!tg3_phydsp_read(tp, MII_TG3_DSP_CH34TP2, &val)) ++ tg3_phydsp_write(tp, MII_TG3_DSP_CH34TP2, val | ++ MII_TG3_DSP_CH34TP2_HIBW01); ++ } ++ ++#ifndef BCM_INCLUDE_PHYLIB_SUPPORT ++ if ((tp->phy_id & TG3_PHY_ID_MASK) == TG3_PHY_ID_BCM50612E) { ++ tg3_writephy(tp, MII_TG3_DSP_ADDRESS, MII_TG3_DSP_TLER); ++ tg3_readphy(tp, MII_TG3_DSP_RW_PORT, &val); ++ if (tp->link_config.autoneg == AUTONEG_ENABLE) ++ val |= MII_TG3_DSP_TLER_AUTOGREEEN_EN; ++ else ++ val &= ~MII_TG3_DSP_TLER_AUTOGREEEN_EN; ++ tg3_phydsp_write(tp, MII_TG3_DSP_TLER, val); ++ } ++#endif /* BCM_INCLUDE_PHYLIB_SUPPORT */ ++ ++err_out: ++ err2 = tg3_phy_toggle_auxctl_smdsp(tp, false); ++ if (!err) ++ err = err2; ++ } ++ ++done: ++ return err; ++} ++ ++static void tg3_phy_copper_begin(struct tg3 *tp) ++{ ++ if (tp->link_config.autoneg == AUTONEG_ENABLE || ++ (tp->phy_flags & TG3_PHYFLG_IS_LOW_POWER)) { ++ u32 adv, fc; ++ ++ if ((tp->phy_flags & TG3_PHYFLG_IS_LOW_POWER) && ++ !(tp->phy_flags & TG3_PHYFLG_KEEP_LINK_ON_PWRDN)) { ++ adv = ADVERTISED_10baseT_Half | ++ ADVERTISED_10baseT_Full; ++ if (tg3_flag(tp, WOL_SPEED_100MB)) ++ adv |= ADVERTISED_100baseT_Half | ++ ADVERTISED_100baseT_Full; ++ if (tp->phy_flags & TG3_PHYFLG_1G_ON_VAUX_OK) { ++ if (!(tp->phy_flags & ++ TG3_PHYFLG_DISABLE_1G_HD_ADV)) ++ adv |= ADVERTISED_1000baseT_Half; ++ adv |= ADVERTISED_1000baseT_Full; ++ } ++ ++ fc = FLOW_CTRL_TX | FLOW_CTRL_RX; ++ } else { ++ adv = tp->link_config.advertising; ++ if (tp->phy_flags & TG3_PHYFLG_10_100_ONLY) ++ adv &= ~(ADVERTISED_1000baseT_Half | ++ ADVERTISED_1000baseT_Full); ++ ++ fc = tp->link_config.flowctrl; ++ } ++ ++ tg3_phy_autoneg_cfg(tp, adv, fc); ++ ++ if ((tp->phy_flags & TG3_PHYFLG_IS_LOW_POWER) && ++ (tp->phy_flags & TG3_PHYFLG_KEEP_LINK_ON_PWRDN)) { ++ /* Normally during power down we want to autonegotiate ++ * the lowest possible speed for WOL. However, to avoid ++ * link flap, we leave it untouched. ++ */ ++ return; ++ } ++ ++ tg3_writephy(tp, MII_BMCR, ++ BMCR_ANENABLE | BMCR_ANRESTART); ++ } else { ++ int i; ++ u32 bmcr, orig_bmcr; ++ ++ tp->link_config.active_speed = tp->link_config.speed; ++ tp->link_config.active_duplex = tp->link_config.duplex; ++ ++ if (tg3_asic_rev(tp) == ASIC_REV_5714) { ++ /* With autoneg disabled, 5715 only links up when the ++ * advertisement register has the configured speed ++ * enabled. ++ */ ++ tg3_writephy(tp, MII_ADVERTISE, ADVERTISE_ALL); ++ } ++ ++ bmcr = 0; ++ switch (tp->link_config.speed) { ++ default: ++ case SPEED_10: ++ break; ++ ++ case SPEED_100: ++ bmcr |= BMCR_SPEED100; ++ break; ++ ++ case SPEED_1000: ++ bmcr |= BMCR_SPEED1000; ++ break; ++ } ++ ++ if (tp->link_config.duplex == DUPLEX_FULL) ++ bmcr |= BMCR_FULLDPLX; ++ ++ if (!tg3_readphy(tp, MII_BMCR, &orig_bmcr) && ++ (bmcr != orig_bmcr)) { ++ tg3_writephy(tp, MII_BMCR, BMCR_LOOPBACK); ++ for (i = 0; i < 1500; i++) { ++ u32 tmp; ++ ++ udelay(10); ++ if (tg3_readphy(tp, MII_BMSR, &tmp) || ++ tg3_readphy(tp, MII_BMSR, &tmp)) ++ continue; ++ if (!(tmp & BMSR_LSTATUS)) { ++ udelay(40); ++ break; ++ } ++ } ++ tg3_writephy(tp, MII_BMCR, bmcr); ++ udelay(40); ++ } ++ } ++} ++ ++static int tg3_phy_pull_config(struct tg3 *tp) ++{ ++ int err; ++ u32 val; ++ ++ err = tg3_readphy(tp, MII_BMCR, &val); ++ if (err) ++ goto done; ++ ++ if (!(val & BMCR_ANENABLE)) { ++ tp->link_config.autoneg = AUTONEG_DISABLE; ++ tp->link_config.advertising = 0; ++ tg3_flag_clear(tp, PAUSE_AUTONEG); ++ ++ err = -EIO; ++ ++ switch (val & (BMCR_SPEED1000 | BMCR_SPEED100)) { ++ case 0: ++ if (tp->phy_flags & TG3_PHYFLG_ANY_SERDES) ++ goto done; ++ ++ tp->link_config.speed = SPEED_10; ++ break; ++ case BMCR_SPEED100: ++ if (tp->phy_flags & TG3_PHYFLG_ANY_SERDES) ++ goto done; ++ ++ tp->link_config.speed = SPEED_100; ++ break; ++ case BMCR_SPEED1000: ++ if (!(tp->phy_flags & TG3_PHYFLG_10_100_ONLY)) { ++ tp->link_config.speed = SPEED_1000; ++ break; ++ } ++ /* Fall through */ ++ default: ++ goto done; ++ } ++ ++ if (val & BMCR_FULLDPLX) ++ tp->link_config.duplex = DUPLEX_FULL; ++ else ++ tp->link_config.duplex = DUPLEX_HALF; ++ ++ tp->link_config.flowctrl = FLOW_CTRL_RX | FLOW_CTRL_TX; ++ ++ err = 0; ++ goto done; ++ } ++ ++ tp->link_config.autoneg = AUTONEG_ENABLE; ++ tp->link_config.advertising = ADVERTISED_Autoneg; ++ tg3_flag_set(tp, PAUSE_AUTONEG); ++ ++ if (!(tp->phy_flags & TG3_PHYFLG_ANY_SERDES)) { ++ u32 adv; ++ ++ err = tg3_readphy(tp, MII_ADVERTISE, &val); ++ if (err) ++ goto done; ++ ++ adv = mii_adv_to_ethtool_adv_t(val & ADVERTISE_ALL); ++ tp->link_config.advertising |= adv | ADVERTISED_TP; ++ ++ tp->link_config.flowctrl = tg3_decode_flowctrl_1000T(val); ++ } else { ++ tp->link_config.advertising |= ADVERTISED_FIBRE; ++ } ++ ++ if (!(tp->phy_flags & TG3_PHYFLG_10_100_ONLY)) { ++ u32 adv; ++ ++ if (!(tp->phy_flags & TG3_PHYFLG_ANY_SERDES)) { ++ err = tg3_readphy(tp, MII_CTRL1000, &val); ++ if (err) ++ goto done; ++ ++ adv = mii_ctrl1000_to_ethtool_adv_t(val); ++ } else { ++ err = tg3_readphy(tp, MII_ADVERTISE, &val); ++ if (err) ++ goto done; ++ ++ adv = tg3_decode_flowctrl_1000X(val); ++ tp->link_config.flowctrl = adv; ++ ++ val &= (ADVERTISE_1000XHALF | ADVERTISE_1000XFULL); ++ adv = mii_adv_to_ethtool_adv_x(val); ++ } ++ ++ tp->link_config.advertising |= adv; ++ } ++ ++done: ++ return err; ++} ++ ++static int tg3_init_5401phy_dsp(struct tg3 *tp) ++{ ++ int err; ++ ++ /* Turn off tap power management. */ ++ /* Set Extended packet length bit */ ++ err = tg3_phy_auxctl_write(tp, MII_TG3_AUXCTL_SHDWSEL_AUXCTL, 0x4c20); ++ ++ err |= tg3_phydsp_write(tp, 0x0012, 0x1804); ++ err |= tg3_phydsp_write(tp, 0x0013, 0x1204); ++ err |= tg3_phydsp_write(tp, 0x8006, 0x0132); ++ err |= tg3_phydsp_write(tp, 0x8006, 0x0232); ++ err |= tg3_phydsp_write(tp, 0x201f, 0x0a20); ++ ++ udelay(40); ++ ++ return err; ++} ++ ++static bool tg3_phy_eee_config_ok(struct tg3 *tp) ++{ ++ struct ethtool_eee eee; ++ ++ if (!(tp->phy_flags & TG3_PHYFLG_EEE_CAP)) ++ return true; ++ ++ tg3_eee_pull_config(tp, &eee); ++ ++ if (tp->eee.eee_enabled) { ++ if (tp->eee.advertised != eee.advertised || ++ tp->eee.tx_lpi_timer != eee.tx_lpi_timer || ++ tp->eee.tx_lpi_enabled != eee.tx_lpi_enabled) ++ return false; ++ } else { ++ /* EEE is disabled but we're advertising */ ++ if (eee.advertised) ++ return false; ++ } ++ ++ return true; ++} ++ ++static bool tg3_phy_copper_an_config_ok(struct tg3 *tp, u32 *lcladv) ++{ ++ u32 advmsk, tgtadv, advertising; ++ ++ advertising = tp->link_config.advertising; ++ tgtadv = ethtool_adv_to_mii_adv_t(advertising) & ADVERTISE_ALL; ++ ++ advmsk = ADVERTISE_ALL; ++ if (tp->link_config.active_duplex == DUPLEX_FULL) { ++ tgtadv |= mii_advertise_flowctrl(tp->link_config.flowctrl); ++ advmsk |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM; ++ } ++ ++ if (tg3_readphy(tp, MII_ADVERTISE, lcladv)) ++ return false; ++ ++ if ((*lcladv & advmsk) != tgtadv) ++ return false; ++ ++ if (!(tp->phy_flags & TG3_PHYFLG_10_100_ONLY)) { ++ u32 tg3_ctrl; ++ ++ tgtadv = ethtool_adv_to_mii_ctrl1000_t(advertising); ++ ++ if (tg3_readphy(tp, MII_CTRL1000, &tg3_ctrl)) ++ return false; ++ ++ if (tgtadv && ++ (tg3_chip_rev_id(tp) == CHIPREV_ID_5701_A0 || ++ tg3_chip_rev_id(tp) == CHIPREV_ID_5701_B0)) { ++ tgtadv |= CTL1000_AS_MASTER | CTL1000_ENABLE_MASTER; ++ tg3_ctrl &= (ADVERTISE_1000HALF | ADVERTISE_1000FULL | ++ CTL1000_AS_MASTER | CTL1000_ENABLE_MASTER); ++ } else { ++ tg3_ctrl &= (ADVERTISE_1000HALF | ADVERTISE_1000FULL); ++ } ++ ++ if (tg3_ctrl != tgtadv) ++ return false; ++ } ++ ++ return true; ++} ++ ++static bool tg3_phy_copper_fetch_rmtadv(struct tg3 *tp, u32 *rmtadv) ++{ ++ u32 lpeth = 0; ++ ++ if (!(tp->phy_flags & TG3_PHYFLG_10_100_ONLY)) { ++ u32 val; ++ ++ if (tg3_readphy(tp, MII_STAT1000, &val)) ++ return false; ++ ++ lpeth = mii_stat1000_to_ethtool_lpa_t(val); ++ } ++ ++ if (tg3_readphy(tp, MII_LPA, rmtadv)) ++ return false; ++ ++ lpeth |= mii_lpa_to_ethtool_lpa_t(*rmtadv); ++ tp->link_config.rmt_adv = lpeth; ++ ++ return true; ++} ++ ++static bool tg3_test_and_report_link_chg(struct tg3 *tp, bool curr_link_up) ++{ ++ if (curr_link_up != tp->link_up) { ++ if (curr_link_up) { ++ netif_carrier_on(tp->dev); ++ } else { ++ netif_carrier_off(tp->dev); ++ if (tp->phy_flags & TG3_PHYFLG_MII_SERDES) ++ tp->phy_flags &= ~TG3_PHYFLG_PARALLEL_DETECT; ++ } ++ ++ tg3_link_report(tp); ++ return true; ++ } ++ ++ return false; ++} ++ ++static void tg3_clear_mac_status(struct tg3 *tp) ++{ ++ tw32(MAC_EVENT, 0); ++ ++ tw32_f(MAC_STATUS, ++ MAC_STATUS_SYNC_CHANGED | ++ MAC_STATUS_CFG_CHANGED | ++ MAC_STATUS_MI_COMPLETION | ++ MAC_STATUS_LNKSTATE_CHANGED); ++ udelay(40); ++} ++ ++static void tg3_setup_eee(struct tg3 *tp) ++{ ++ u32 val; ++ ++ val = TG3_CPMU_EEE_LNKIDL_PCIE_NL0 | ++ TG3_CPMU_EEE_LNKIDL_UART_IDL; ++ if (tg3_chip_rev_id(tp) == CHIPREV_ID_57765_A0) ++ val |= TG3_CPMU_EEE_LNKIDL_APE_TX_MT; ++ ++ tw32_f(TG3_CPMU_EEE_LNKIDL_CTRL, val); ++ ++ tw32_f(TG3_CPMU_EEE_CTRL, ++ TG3_CPMU_EEE_CTRL_EXIT_20_1_US); ++ ++ val = TG3_CPMU_EEEMD_ERLY_L1_XIT_DET | ++ (tp->eee.tx_lpi_enabled ? TG3_CPMU_EEEMD_LPI_IN_TX : 0) | ++ TG3_CPMU_EEEMD_LPI_IN_RX | ++ TG3_CPMU_EEEMD_EEE_ENABLE; ++ ++ if (tg3_asic_rev(tp) != ASIC_REV_5717) ++ val |= TG3_CPMU_EEEMD_SND_IDX_DET_EN; ++ ++ if (tg3_flag(tp, ENABLE_APE)) ++ val |= TG3_CPMU_EEEMD_APE_TX_DET_EN; ++ ++ tw32_f(TG3_CPMU_EEE_MODE, tp->eee.eee_enabled ? val : 0); ++ ++ tw32_f(TG3_CPMU_EEE_DBTMR1, ++ TG3_CPMU_DBTMR1_PCIEXIT_2047US | ++ (tp->eee.tx_lpi_timer & 0xffff)); ++ ++ tw32_f(TG3_CPMU_EEE_DBTMR2, ++ TG3_CPMU_DBTMR2_APE_TX_2047US | ++ TG3_CPMU_DBTMR2_TXIDXEQ_2047US); ++} ++ ++static int tg3_setup_copper_phy(struct tg3 *tp, bool force_reset) ++{ ++ bool current_link_up; ++ u32 bmsr, val; ++ u32 lcl_adv, rmt_adv; ++ u16 current_speed; ++ u8 current_duplex; ++ int i, err; ++ ++ tg3_clear_mac_status(tp); ++ ++ if (!(tp->phy_flags & TG3_PHYFLG_IS_FET)) ++ tg3_phy_auxctl_write(tp, MII_TG3_AUXCTL_SHDWSEL_PWRCTL, 0); ++ ++ /* Some third-party PHYs need to be reset on link going ++ * down. ++ */ ++ if ((tg3_asic_rev(tp) == ASIC_REV_5703 || ++ tg3_asic_rev(tp) == ASIC_REV_5704 || ++ tg3_asic_rev(tp) == ASIC_REV_5705) && ++ tp->link_up) { ++ tg3_readphy(tp, MII_BMSR, &bmsr); ++ if (!tg3_readphy(tp, MII_BMSR, &bmsr) && ++ !(bmsr & BMSR_LSTATUS)) ++ force_reset = true; ++ } ++ if (force_reset) ++ tg3_phy_reset(tp); ++ ++ if ((tp->phy_id & TG3_PHY_ID_MASK) == TG3_PHY_ID_BCM5401) { ++ tg3_readphy(tp, MII_BMSR, &bmsr); ++ if (tg3_readphy(tp, MII_BMSR, &bmsr) || ++ !tg3_flag(tp, INIT_COMPLETE)) ++ bmsr = 0; ++ ++ if (!(bmsr & BMSR_LSTATUS)) { ++ err = tg3_init_5401phy_dsp(tp); ++ if (err) ++ return err; ++ ++ tg3_readphy(tp, MII_BMSR, &bmsr); ++ for (i = 0; i < 1000; i++) { ++ udelay(10); ++ if (!tg3_readphy(tp, MII_BMSR, &bmsr) && ++ (bmsr & BMSR_LSTATUS)) { ++ udelay(40); ++ break; ++ } ++ } ++ ++ if ((tp->phy_id & TG3_PHY_ID_REV_MASK) == ++ TG3_PHY_REV_BCM5401_B0 && ++ !(bmsr & BMSR_LSTATUS) && ++ tp->link_config.active_speed == SPEED_1000) { ++ err = tg3_phy_reset(tp); ++ if (!err) ++ err = tg3_init_5401phy_dsp(tp); ++ if (err) ++ return err; ++ } ++ } ++ } else if (tg3_chip_rev_id(tp) == CHIPREV_ID_5701_A0 || ++ tg3_chip_rev_id(tp) == CHIPREV_ID_5701_B0) { ++ /* 5701 {A0,B0} CRC bug workaround */ ++ tg3_writephy(tp, 0x15, 0x0a75); ++ tg3_writephy(tp, MII_TG3_MISC_SHDW, 0x8c68); ++ tg3_writephy(tp, MII_TG3_MISC_SHDW, 0x8d68); ++ tg3_writephy(tp, MII_TG3_MISC_SHDW, 0x8c68); ++ } ++ ++ /* Clear pending interrupts... */ ++ tg3_readphy(tp, MII_TG3_ISTAT, &val); ++ tg3_readphy(tp, MII_TG3_ISTAT, &val); ++ ++ if (tp->phy_flags & TG3_PHYFLG_USE_MI_INTERRUPT) ++ tg3_writephy(tp, MII_TG3_IMASK, ~MII_TG3_INT_LINKCHG); ++ else if (!(tp->phy_flags & TG3_PHYFLG_IS_FET)) ++ tg3_writephy(tp, MII_TG3_IMASK, ~0); ++ ++ if (tg3_asic_rev(tp) == ASIC_REV_5700 || ++ tg3_asic_rev(tp) == ASIC_REV_5701) { ++ if (tp->led_ctrl == LED_CTRL_MODE_PHY_1) ++ tg3_writephy(tp, MII_TG3_EXT_CTRL, ++ MII_TG3_EXT_CTRL_LNK3_LED_MODE); ++ else ++ tg3_writephy(tp, MII_TG3_EXT_CTRL, 0); ++ } ++ ++ current_link_up = false; ++ current_speed = SPEED_UNKNOWN; ++ current_duplex = DUPLEX_UNKNOWN; ++ tp->phy_flags &= ~TG3_PHYFLG_MDIX_STATE; ++ tp->link_config.rmt_adv = 0; ++ ++ if (tp->phy_flags & TG3_PHYFLG_CAPACITIVE_COUPLING) { ++ err = tg3_phy_auxctl_read(tp, ++ MII_TG3_AUXCTL_SHDWSEL_MISCTEST, ++ &val); ++ if (!err && !(val & (1 << 10))) { ++ tg3_phy_auxctl_write(tp, ++ MII_TG3_AUXCTL_SHDWSEL_MISCTEST, ++ val | (1 << 10)); ++ goto relink; ++ } ++ } ++ ++ bmsr = 0; ++ for (i = 0; i < 100; i++) { ++ tg3_readphy(tp, MII_BMSR, &bmsr); ++ if (!tg3_readphy(tp, MII_BMSR, &bmsr) && ++ (bmsr & BMSR_LSTATUS)) ++ break; ++ udelay(40); ++ } ++ ++ if (bmsr & BMSR_LSTATUS) { ++ u32 aux_stat, bmcr; ++ ++ tg3_readphy(tp, MII_TG3_AUX_STAT, &aux_stat); ++ for (i = 0; i < 2000; i++) { ++ udelay(10); ++ if (!tg3_readphy(tp, MII_TG3_AUX_STAT, &aux_stat) && ++ aux_stat) ++ break; ++ } ++ ++ tg3_aux_stat_to_speed_duplex(tp, aux_stat, ++ ¤t_speed, ++ ¤t_duplex); ++ ++ bmcr = 0; ++ for (i = 0; i < 200; i++) { ++ tg3_readphy(tp, MII_BMCR, &bmcr); ++ if (tg3_readphy(tp, MII_BMCR, &bmcr)) ++ continue; ++ if (bmcr && bmcr != 0x7fff) ++ break; ++ udelay(10); ++ } ++ ++ lcl_adv = 0; ++ rmt_adv = 0; ++ ++ tp->link_config.active_speed = current_speed; ++ tp->link_config.active_duplex = current_duplex; ++ ++ if (tp->link_config.autoneg == AUTONEG_ENABLE) { ++ bool eee_config_ok = tg3_phy_eee_config_ok(tp); ++ ++ if ((bmcr & BMCR_ANENABLE) && ++ eee_config_ok && ++ tg3_phy_copper_an_config_ok(tp, &lcl_adv) && ++ tg3_phy_copper_fetch_rmtadv(tp, &rmt_adv)) ++ current_link_up = true; ++ ++ /* EEE settings changes take effect only after a phy ++ * reset. If we have skipped a reset due to Link Flap ++ * Avoidance being enabled, do it now. ++ */ ++ if (!eee_config_ok && ++ (tp->phy_flags & TG3_PHYFLG_KEEP_LINK_ON_PWRDN) && ++ !force_reset) { ++ tg3_setup_eee(tp); ++ tg3_phy_reset(tp); ++ } ++ } else { ++ if (!(bmcr & BMCR_ANENABLE) && ++ tp->link_config.speed == current_speed && ++ tp->link_config.duplex == current_duplex) { ++ current_link_up = true; ++ } ++ } ++ ++ if (current_link_up && ++ tp->link_config.active_duplex == DUPLEX_FULL) { ++ u32 reg, bit; ++ ++ if (tp->phy_flags & TG3_PHYFLG_IS_FET) { ++ reg = MII_TG3_FET_GEN_STAT; ++ bit = MII_TG3_FET_GEN_STAT_MDIXSTAT; ++ } else { ++ reg = MII_TG3_EXT_STAT; ++ bit = MII_TG3_EXT_STAT_MDIX; ++ } ++ ++ if (!tg3_readphy(tp, reg, &val) && (val & bit)) ++ tp->phy_flags |= TG3_PHYFLG_MDIX_STATE; ++ ++ tg3_setup_flow_control(tp, lcl_adv, rmt_adv); ++ } ++ } ++ ++relink: ++ if (!current_link_up || (tp->phy_flags & TG3_PHYFLG_IS_LOW_POWER)) { ++ tg3_phy_copper_begin(tp); ++ ++ if (tg3_flag(tp, ROBOSWITCH)) { ++ current_link_up = true; ++ /* FIXME: when BCM5325 switch is used use 100 MBit/s */ ++ current_speed = SPEED_1000; ++ current_duplex = DUPLEX_FULL; ++ tp->link_config.active_speed = current_speed; ++ tp->link_config.active_duplex = current_duplex; ++ } ++ ++ tg3_readphy(tp, MII_BMSR, &bmsr); ++ if ((!tg3_readphy(tp, MII_BMSR, &bmsr) && (bmsr & BMSR_LSTATUS)) || ++ (tp->mac_mode & MAC_MODE_PORT_INT_LPBACK)) ++ current_link_up = true; ++ } ++ ++ tp->mac_mode &= ~MAC_MODE_PORT_MODE_MASK; ++ if (current_link_up) { ++ if (tp->link_config.active_speed == SPEED_100 || ++ tp->link_config.active_speed == SPEED_10) ++ tp->mac_mode |= MAC_MODE_PORT_MODE_MII; ++ else ++ tp->mac_mode |= MAC_MODE_PORT_MODE_GMII; ++ } else if ((tp->phy_flags & TG3_PHYFLG_IS_FET) || ++ tg3_asic_rev(tp) == ASIC_REV_5785) ++ tp->mac_mode |= MAC_MODE_PORT_MODE_MII; ++ else ++ tp->mac_mode |= MAC_MODE_PORT_MODE_GMII; ++ ++ /* In order for the 5750 core in BCM4785 chip to work properly ++ * in RGMII mode, the Led Control Register must be set up. ++ */ ++ if (tg3_flag(tp, RGMII_MODE)) { ++ u32 led_ctrl = tr32(MAC_LED_CTRL); ++ led_ctrl &= ~(LED_CTRL_1000MBPS_ON | LED_CTRL_100MBPS_ON); ++ ++ if (tp->link_config.active_speed == SPEED_10) ++ led_ctrl |= LED_CTRL_LNKLED_OVERRIDE; ++ else if (tp->link_config.active_speed == SPEED_100) ++ led_ctrl |= (LED_CTRL_LNKLED_OVERRIDE | ++ LED_CTRL_100MBPS_ON); ++ else if (tp->link_config.active_speed == SPEED_1000) ++ led_ctrl |= (LED_CTRL_LNKLED_OVERRIDE | ++ LED_CTRL_1000MBPS_ON); ++ ++ tw32(MAC_LED_CTRL, led_ctrl); ++ udelay(40); ++ } ++ ++ tp->mac_mode &= ~MAC_MODE_HALF_DUPLEX; ++ if (tp->link_config.active_duplex == DUPLEX_HALF) ++ tp->mac_mode |= MAC_MODE_HALF_DUPLEX; ++ ++ if (tg3_asic_rev(tp) == ASIC_REV_5700) { ++ if (current_link_up && ++ tg3_5700_link_polarity(tp, tp->link_config.active_speed)) ++ tp->mac_mode |= MAC_MODE_LINK_POLARITY; ++ else ++ tp->mac_mode &= ~MAC_MODE_LINK_POLARITY; ++ } ++ ++ /* ??? Without this setting Netgear GA302T PHY does not ++ * ??? send/receive packets... ++ */ ++ if ((tp->phy_id & TG3_PHY_ID_MASK) == TG3_PHY_ID_BCM5411 && ++ tg3_chip_rev_id(tp) == CHIPREV_ID_5700_ALTIMA) { ++ tp->mi_mode |= MAC_MI_MODE_AUTO_POLL; ++ tw32_f(MAC_MI_MODE, tp->mi_mode); ++ udelay(80); ++ } ++ ++ tw32_f(MAC_MODE, tp->mac_mode); ++ udelay(40); ++ ++ tg3_phy_eee_adjust(tp, current_link_up); ++ ++#ifndef BCM_INCLUDE_PHYLIB_SUPPORT ++ if (tg3_asic_rev(tp) == ASIC_REV_5785) { ++ /* A0 */ ++ if (tp->phy_id == TG3_PHY_ID_BCM50612E && ++ !tg3_phy_toggle_auxctl_smdsp(tp, true)) { ++ if (tp->link_config.active_speed == SPEED_10) ++ tg3_phydsp_write(tp, 0x0ff0, 0x2000); ++ else ++ tg3_phydsp_write(tp, 0x0ff0, 0x0000); ++ ++ tg3_phy_toggle_auxctl_smdsp(tp, false); ++ } ++ ++ if (tp->link_config.active_speed == SPEED_10) ++ tw32(MAC_MI_STAT, ++ MAC_MI_STAT_10MBPS_MODE | ++ MAC_MI_STAT_LNKSTAT_ATTN_ENAB); ++ else ++ tw32(MAC_MI_STAT, MAC_MI_STAT_LNKSTAT_ATTN_ENAB); ++ } ++#endif ++ ++ if (tg3_flag(tp, USE_LINKCHG_REG)) { ++ /* Polled via timer. */ ++ tw32_f(MAC_EVENT, 0); ++ } else { ++ tw32_f(MAC_EVENT, MAC_EVENT_LNKSTATE_CHANGED); ++ } ++ udelay(40); ++ ++ if (tg3_asic_rev(tp) == ASIC_REV_5700 && ++ current_link_up && ++ tp->link_config.active_speed == SPEED_1000 && ++ (tg3_flag(tp, PCIX_MODE) || tg3_flag(tp, PCI_HIGH_SPEED))) { ++ udelay(120); ++ tw32_f(MAC_STATUS, ++ (MAC_STATUS_SYNC_CHANGED | ++ MAC_STATUS_CFG_CHANGED)); ++ udelay(40); ++ tg3_write_mem(tp, ++ NIC_SRAM_FIRMWARE_MBOX, ++ NIC_SRAM_FIRMWARE_MBOX_MAGIC2); ++ } ++ ++ /* Prevent send BD corruption. */ ++ if (tg3_flag(tp, CLKREQ_BUG)) { ++ if (tp->link_config.active_speed == SPEED_100 || ++ tp->link_config.active_speed == SPEED_10) ++ pcie_capability_clear_word(tp->pdev, PCI_EXP_LNKCTL, ++ PCI_EXP_LNKCTL_CLKREQ_EN); ++ else ++ pcie_capability_set_word(tp->pdev, PCI_EXP_LNKCTL, ++ PCI_EXP_LNKCTL_CLKREQ_EN); ++ } ++ ++ tg3_test_and_report_link_chg(tp, current_link_up); ++ ++ return 0; ++} ++ ++struct tg3_fiber_aneginfo { ++ int state; ++#define ANEG_STATE_UNKNOWN 0 ++#define ANEG_STATE_AN_ENABLE 1 ++#define ANEG_STATE_RESTART_INIT 2 ++#define ANEG_STATE_RESTART 3 ++#define ANEG_STATE_DISABLE_LINK_OK 4 ++#define ANEG_STATE_ABILITY_DETECT_INIT 5 ++#define ANEG_STATE_ABILITY_DETECT 6 ++#define ANEG_STATE_ACK_DETECT_INIT 7 ++#define ANEG_STATE_ACK_DETECT 8 ++#define ANEG_STATE_COMPLETE_ACK_INIT 9 ++#define ANEG_STATE_COMPLETE_ACK 10 ++#define ANEG_STATE_IDLE_DETECT_INIT 11 ++#define ANEG_STATE_IDLE_DETECT 12 ++#define ANEG_STATE_LINK_OK 13 ++#define ANEG_STATE_NEXT_PAGE_WAIT_INIT 14 ++#define ANEG_STATE_NEXT_PAGE_WAIT 15 ++ ++ u32 flags; ++#define MR_AN_ENABLE 0x00000001 ++#define MR_RESTART_AN 0x00000002 ++#define MR_AN_COMPLETE 0x00000004 ++#define MR_PAGE_RX 0x00000008 ++#define MR_NP_LOADED 0x00000010 ++#define MR_TOGGLE_TX 0x00000020 ++#define MR_LP_ADV_FULL_DUPLEX 0x00000040 ++#define MR_LP_ADV_HALF_DUPLEX 0x00000080 ++#define MR_LP_ADV_SYM_PAUSE 0x00000100 ++#define MR_LP_ADV_ASYM_PAUSE 0x00000200 ++#define MR_LP_ADV_REMOTE_FAULT1 0x00000400 ++#define MR_LP_ADV_REMOTE_FAULT2 0x00000800 ++#define MR_LP_ADV_NEXT_PAGE 0x00001000 ++#define MR_TOGGLE_RX 0x00002000 ++#define MR_NP_RX 0x00004000 ++ ++#define MR_LINK_OK 0x80000000 ++ ++ unsigned long link_time, cur_time; ++ ++ u32 ability_match_cfg; ++ int ability_match_count; ++ ++ char ability_match, idle_match, ack_match; ++ ++ u32 txconfig, rxconfig; ++#define ANEG_CFG_NP 0x00000080 ++#define ANEG_CFG_ACK 0x00000040 ++#define ANEG_CFG_RF2 0x00000020 ++#define ANEG_CFG_RF1 0x00000010 ++#define ANEG_CFG_PS2 0x00000001 ++#define ANEG_CFG_PS1 0x00008000 ++#define ANEG_CFG_HD 0x00004000 ++#define ANEG_CFG_FD 0x00002000 ++#define ANEG_CFG_INVAL 0x00001f06 ++ ++}; ++#define ANEG_OK 0 ++#define ANEG_DONE 1 ++#define ANEG_TIMER_ENAB 2 ++#define ANEG_FAILED -1 ++ ++#define ANEG_STATE_SETTLE_TIME 10000 ++ ++static int tg3_fiber_aneg_smachine(struct tg3 *tp, ++ struct tg3_fiber_aneginfo *ap) ++{ ++ u16 flowctrl; ++ unsigned long delta; ++ u32 rx_cfg_reg; ++ int ret; ++ ++ if (ap->state == ANEG_STATE_UNKNOWN) { ++ ap->rxconfig = 0; ++ ap->link_time = 0; ++ ap->cur_time = 0; ++ ap->ability_match_cfg = 0; ++ ap->ability_match_count = 0; ++ ap->ability_match = 0; ++ ap->idle_match = 0; ++ ap->ack_match = 0; ++ } ++ ap->cur_time++; ++ ++ if (tr32(MAC_STATUS) & MAC_STATUS_RCVD_CFG) { ++ rx_cfg_reg = tr32(MAC_RX_AUTO_NEG); ++ ++ if (rx_cfg_reg != ap->ability_match_cfg) { ++ ap->ability_match_cfg = rx_cfg_reg; ++ ap->ability_match = 0; ++ ap->ability_match_count = 0; ++ } else { ++ if (++ap->ability_match_count > 1) { ++ ap->ability_match = 1; ++ ap->ability_match_cfg = rx_cfg_reg; ++ } ++ } ++ if (rx_cfg_reg & ANEG_CFG_ACK) ++ ap->ack_match = 1; ++ else ++ ap->ack_match = 0; ++ ++ ap->idle_match = 0; ++ } else { ++ ap->idle_match = 1; ++ ap->ability_match_cfg = 0; ++ ap->ability_match_count = 0; ++ ap->ability_match = 0; ++ ap->ack_match = 0; ++ ++ rx_cfg_reg = 0; ++ } ++ ++ ap->rxconfig = rx_cfg_reg; ++ ret = ANEG_OK; ++ ++ switch (ap->state) { ++ case ANEG_STATE_UNKNOWN: ++ if (ap->flags & (MR_AN_ENABLE | MR_RESTART_AN)) ++ ap->state = ANEG_STATE_AN_ENABLE; ++ ++ /* fallthru */ ++ case ANEG_STATE_AN_ENABLE: ++ ap->flags &= ~(MR_AN_COMPLETE | MR_PAGE_RX); ++ if (ap->flags & MR_AN_ENABLE) { ++ ap->link_time = 0; ++ ap->cur_time = 0; ++ ap->ability_match_cfg = 0; ++ ap->ability_match_count = 0; ++ ap->ability_match = 0; ++ ap->idle_match = 0; ++ ap->ack_match = 0; ++ ++ ap->state = ANEG_STATE_RESTART_INIT; ++ } else { ++ ap->state = ANEG_STATE_DISABLE_LINK_OK; ++ } ++ break; ++ ++ case ANEG_STATE_RESTART_INIT: ++ ap->link_time = ap->cur_time; ++ ap->flags &= ~(MR_NP_LOADED); ++ ap->txconfig = 0; ++ tw32(MAC_TX_AUTO_NEG, 0); ++ tp->mac_mode |= MAC_MODE_SEND_CONFIGS; ++ tw32_f(MAC_MODE, tp->mac_mode); ++ udelay(40); ++ ++ ret = ANEG_TIMER_ENAB; ++ ap->state = ANEG_STATE_RESTART; ++ ++ /* fallthru */ ++ case ANEG_STATE_RESTART: ++ delta = ap->cur_time - ap->link_time; ++ if (delta > ANEG_STATE_SETTLE_TIME) ++ ap->state = ANEG_STATE_ABILITY_DETECT_INIT; ++ else ++ ret = ANEG_TIMER_ENAB; ++ break; ++ ++ case ANEG_STATE_DISABLE_LINK_OK: ++ ret = ANEG_DONE; ++ break; ++ ++ case ANEG_STATE_ABILITY_DETECT_INIT: ++ ap->flags &= ~(MR_TOGGLE_TX); ++ ap->txconfig = ANEG_CFG_FD; ++ flowctrl = tg3_advert_flowctrl_1000X(tp->link_config.flowctrl); ++ if (flowctrl & ADVERTISE_1000XPAUSE) ++ ap->txconfig |= ANEG_CFG_PS1; ++ if (flowctrl & ADVERTISE_1000XPSE_ASYM) ++ ap->txconfig |= ANEG_CFG_PS2; ++ tw32(MAC_TX_AUTO_NEG, ap->txconfig); ++ tp->mac_mode |= MAC_MODE_SEND_CONFIGS; ++ tw32_f(MAC_MODE, tp->mac_mode); ++ udelay(40); ++ ++ ap->state = ANEG_STATE_ABILITY_DETECT; ++ break; ++ ++ case ANEG_STATE_ABILITY_DETECT: ++ if (ap->ability_match != 0 && ap->rxconfig != 0) ++ ap->state = ANEG_STATE_ACK_DETECT_INIT; ++ break; ++ ++ case ANEG_STATE_ACK_DETECT_INIT: ++ ap->txconfig |= ANEG_CFG_ACK; ++ tw32(MAC_TX_AUTO_NEG, ap->txconfig); ++ tp->mac_mode |= MAC_MODE_SEND_CONFIGS; ++ tw32_f(MAC_MODE, tp->mac_mode); ++ udelay(40); ++ ++ ap->state = ANEG_STATE_ACK_DETECT; ++ ++ /* fallthru */ ++ case ANEG_STATE_ACK_DETECT: ++ if (ap->ack_match != 0) { ++ if ((ap->rxconfig & ~ANEG_CFG_ACK) == ++ (ap->ability_match_cfg & ~ANEG_CFG_ACK)) { ++ ap->state = ANEG_STATE_COMPLETE_ACK_INIT; ++ } else { ++ ap->state = ANEG_STATE_AN_ENABLE; ++ } ++ } else if (ap->ability_match != 0 && ++ ap->rxconfig == 0) { ++ ap->state = ANEG_STATE_AN_ENABLE; ++ } ++ break; ++ ++ case ANEG_STATE_COMPLETE_ACK_INIT: ++ if (ap->rxconfig & ANEG_CFG_INVAL) { ++ ret = ANEG_FAILED; ++ break; ++ } ++ ap->flags &= ~(MR_LP_ADV_FULL_DUPLEX | ++ MR_LP_ADV_HALF_DUPLEX | ++ MR_LP_ADV_SYM_PAUSE | ++ MR_LP_ADV_ASYM_PAUSE | ++ MR_LP_ADV_REMOTE_FAULT1 | ++ MR_LP_ADV_REMOTE_FAULT2 | ++ MR_LP_ADV_NEXT_PAGE | ++ MR_TOGGLE_RX | ++ MR_NP_RX); ++ if (ap->rxconfig & ANEG_CFG_FD) ++ ap->flags |= MR_LP_ADV_FULL_DUPLEX; ++ if (ap->rxconfig & ANEG_CFG_HD) ++ ap->flags |= MR_LP_ADV_HALF_DUPLEX; ++ if (ap->rxconfig & ANEG_CFG_PS1) ++ ap->flags |= MR_LP_ADV_SYM_PAUSE; ++ if (ap->rxconfig & ANEG_CFG_PS2) ++ ap->flags |= MR_LP_ADV_ASYM_PAUSE; ++ if (ap->rxconfig & ANEG_CFG_RF1) ++ ap->flags |= MR_LP_ADV_REMOTE_FAULT1; ++ if (ap->rxconfig & ANEG_CFG_RF2) ++ ap->flags |= MR_LP_ADV_REMOTE_FAULT2; ++ if (ap->rxconfig & ANEG_CFG_NP) ++ ap->flags |= MR_LP_ADV_NEXT_PAGE; ++ ++ ap->link_time = ap->cur_time; ++ ++ ap->flags ^= (MR_TOGGLE_TX); ++ if (ap->rxconfig & 0x0008) ++ ap->flags |= MR_TOGGLE_RX; ++ if (ap->rxconfig & ANEG_CFG_NP) ++ ap->flags |= MR_NP_RX; ++ ap->flags |= MR_PAGE_RX; ++ ++ ap->state = ANEG_STATE_COMPLETE_ACK; ++ ret = ANEG_TIMER_ENAB; ++ break; ++ ++ case ANEG_STATE_COMPLETE_ACK: ++ if (ap->ability_match != 0 && ++ ap->rxconfig == 0) { ++ ap->state = ANEG_STATE_AN_ENABLE; ++ break; ++ } ++ delta = ap->cur_time - ap->link_time; ++ if (delta > ANEG_STATE_SETTLE_TIME) { ++ if (!(ap->flags & (MR_LP_ADV_NEXT_PAGE))) { ++ ap->state = ANEG_STATE_IDLE_DETECT_INIT; ++ } else { ++ if ((ap->txconfig & ANEG_CFG_NP) == 0 && ++ !(ap->flags & MR_NP_RX)) { ++ ap->state = ANEG_STATE_IDLE_DETECT_INIT; ++ } else { ++ ret = ANEG_FAILED; ++ } ++ } ++ } ++ break; ++ ++ case ANEG_STATE_IDLE_DETECT_INIT: ++ ap->link_time = ap->cur_time; ++ tp->mac_mode &= ~MAC_MODE_SEND_CONFIGS; ++ tw32_f(MAC_MODE, tp->mac_mode); ++ udelay(40); ++ ++ ap->state = ANEG_STATE_IDLE_DETECT; ++ ret = ANEG_TIMER_ENAB; ++ break; ++ ++ case ANEG_STATE_IDLE_DETECT: ++ if (ap->ability_match != 0 && ++ ap->rxconfig == 0) { ++ ap->state = ANEG_STATE_AN_ENABLE; ++ break; ++ } ++ delta = ap->cur_time - ap->link_time; ++ if (delta > ANEG_STATE_SETTLE_TIME) { ++ /* XXX another gem from the Broadcom driver :( */ ++ ap->state = ANEG_STATE_LINK_OK; ++ } ++ break; ++ ++ case ANEG_STATE_LINK_OK: ++ ap->flags |= (MR_AN_COMPLETE | MR_LINK_OK); ++ ret = ANEG_DONE; ++ break; ++ ++ case ANEG_STATE_NEXT_PAGE_WAIT_INIT: ++ /* ??? unimplemented */ ++ break; ++ ++ case ANEG_STATE_NEXT_PAGE_WAIT: ++ /* ??? unimplemented */ ++ break; ++ ++ default: ++ ret = ANEG_FAILED; ++ break; ++ } ++ ++ return ret; ++} ++ ++static int fiber_autoneg(struct tg3 *tp, u32 *txflags, u32 *rxflags) ++{ ++ int res = 0; ++ struct tg3_fiber_aneginfo aninfo; ++ int status = ANEG_FAILED; ++ unsigned int tick; ++ u32 tmp; ++ ++ tw32_f(MAC_TX_AUTO_NEG, 0); ++ ++ tmp = tp->mac_mode & ~MAC_MODE_PORT_MODE_MASK; ++ tw32_f(MAC_MODE, tmp | MAC_MODE_PORT_MODE_GMII); ++ udelay(40); ++ ++ tw32_f(MAC_MODE, tp->mac_mode | MAC_MODE_SEND_CONFIGS); ++ udelay(40); ++ ++ memset(&aninfo, 0, sizeof(aninfo)); ++ aninfo.flags |= MR_AN_ENABLE; ++ aninfo.state = ANEG_STATE_UNKNOWN; ++ aninfo.cur_time = 0; ++ tick = 0; ++ while (++tick < 195000) { ++ status = tg3_fiber_aneg_smachine(tp, &aninfo); ++ if (status == ANEG_DONE || status == ANEG_FAILED) ++ break; ++ ++ udelay(1); ++ } ++ ++ tp->mac_mode &= ~MAC_MODE_SEND_CONFIGS; ++ tw32_f(MAC_MODE, tp->mac_mode); ++ udelay(40); ++ ++ *txflags = aninfo.txconfig; ++ *rxflags = aninfo.flags; ++ ++ if (status == ANEG_DONE && ++ (aninfo.flags & (MR_AN_COMPLETE | MR_LINK_OK | ++ MR_LP_ADV_FULL_DUPLEX))) ++ res = 1; ++ ++ return res; ++} ++ ++static void tg3_init_bcm8002(struct tg3 *tp) ++{ ++ u32 mac_status = tr32(MAC_STATUS); ++ int i; ++ ++ /* Reset when initting first time or we have a link. */ ++ if (tg3_flag(tp, INIT_COMPLETE) && ++ !(mac_status & MAC_STATUS_PCS_SYNCED)) ++ return; ++ ++ /* Set PLL lock range. */ ++ tg3_writephy(tp, 0x16, 0x8007); ++ ++ /* SW reset */ ++ tg3_writephy(tp, MII_BMCR, BMCR_RESET); ++ ++ /* Wait for reset to complete. */ ++ /* XXX schedule_timeout() ... */ ++ for (i = 0; i < 500; i++) ++ udelay(10); ++ ++ /* Config mode; select PMA/Ch 1 regs. */ ++ tg3_writephy(tp, 0x10, 0x8411); ++ ++ /* Enable auto-lock and comdet, select txclk for tx. */ ++ tg3_writephy(tp, 0x11, 0x0a10); ++ ++ tg3_writephy(tp, 0x18, 0x00a0); ++ tg3_writephy(tp, 0x16, 0x41ff); ++ ++ /* Assert and deassert POR. */ ++ tg3_writephy(tp, 0x13, 0x0400); ++ udelay(40); ++ tg3_writephy(tp, 0x13, 0x0000); ++ ++ tg3_writephy(tp, 0x11, 0x0a50); ++ udelay(40); ++ tg3_writephy(tp, 0x11, 0x0a10); ++ ++ /* Wait for signal to stabilize */ ++ /* XXX schedule_timeout() ... */ ++ for (i = 0; i < 15000; i++) ++ udelay(10); ++ ++ /* Deselect the channel register so we can read the PHYID ++ * later. ++ */ ++ tg3_writephy(tp, 0x10, 0x8011); ++} ++ ++static bool tg3_setup_fiber_hw_autoneg(struct tg3 *tp, u32 mac_status) ++{ ++ u16 flowctrl; ++ bool current_link_up; ++ u32 sg_dig_ctrl, sg_dig_status; ++ u32 serdes_cfg, expected_sg_dig_ctrl; ++ int workaround, port_a; ++ ++ serdes_cfg = 0; ++ expected_sg_dig_ctrl = 0; ++ workaround = 0; ++ port_a = 1; ++ current_link_up = false; ++ ++ if (tg3_chip_rev_id(tp) != CHIPREV_ID_5704_A0 && ++ tg3_chip_rev_id(tp) != CHIPREV_ID_5704_A1) { ++ workaround = 1; ++ if (tr32(TG3PCI_DUAL_MAC_CTRL) & DUAL_MAC_CTRL_ID) ++ port_a = 0; ++ ++ /* preserve bits 0-11,13,14 for signal pre-emphasis */ ++ /* preserve bits 20-23 for voltage regulator */ ++ serdes_cfg = tr32(MAC_SERDES_CFG) & 0x00f06fff; ++ } ++ ++ sg_dig_ctrl = tr32(SG_DIG_CTRL); ++ ++ if (tp->link_config.autoneg != AUTONEG_ENABLE) { ++ if (sg_dig_ctrl & SG_DIG_USING_HW_AUTONEG) { ++ if (workaround) { ++ u32 val = serdes_cfg; ++ ++ if (port_a) ++ val |= 0xc010000; ++ else ++ val |= 0x4010000; ++ tw32_f(MAC_SERDES_CFG, val); ++ } ++ ++ tw32_f(SG_DIG_CTRL, SG_DIG_COMMON_SETUP); ++ } ++ if (mac_status & MAC_STATUS_PCS_SYNCED) { ++ tg3_setup_flow_control(tp, 0, 0); ++ current_link_up = true; ++ } ++ goto out; ++ } ++ ++ /* Want auto-negotiation. */ ++ expected_sg_dig_ctrl = SG_DIG_USING_HW_AUTONEG | SG_DIG_COMMON_SETUP; ++ ++ flowctrl = tg3_advert_flowctrl_1000X(tp->link_config.flowctrl); ++ if (flowctrl & ADVERTISE_1000XPAUSE) ++ expected_sg_dig_ctrl |= SG_DIG_PAUSE_CAP; ++ if (flowctrl & ADVERTISE_1000XPSE_ASYM) ++ expected_sg_dig_ctrl |= SG_DIG_ASYM_PAUSE; ++ ++ if (sg_dig_ctrl != expected_sg_dig_ctrl) { ++ if ((tp->phy_flags & TG3_PHYFLG_PARALLEL_DETECT) && ++ tp->serdes_counter && ++ ((mac_status & (MAC_STATUS_PCS_SYNCED | ++ MAC_STATUS_RCVD_CFG)) == ++ MAC_STATUS_PCS_SYNCED)) { ++ tp->serdes_counter--; ++ current_link_up = true; ++ goto out; ++ } ++restart_autoneg: ++ if (workaround) ++ tw32_f(MAC_SERDES_CFG, serdes_cfg | 0xc011000); ++ tw32_f(SG_DIG_CTRL, expected_sg_dig_ctrl | SG_DIG_SOFT_RESET); ++ udelay(5); ++ tw32_f(SG_DIG_CTRL, expected_sg_dig_ctrl); ++ ++ tp->serdes_counter = SERDES_AN_TIMEOUT_5704S; ++ tp->phy_flags &= ~TG3_PHYFLG_PARALLEL_DETECT; ++ } else if (mac_status & (MAC_STATUS_PCS_SYNCED | ++ MAC_STATUS_SIGNAL_DET)) { ++ sg_dig_status = tr32(SG_DIG_STATUS); ++ mac_status = tr32(MAC_STATUS); ++ ++ if ((sg_dig_status & SG_DIG_AUTONEG_COMPLETE) && ++ (mac_status & MAC_STATUS_PCS_SYNCED)) { ++ u32 local_adv = 0, remote_adv = 0; ++ ++ if (sg_dig_ctrl & SG_DIG_PAUSE_CAP) ++ local_adv |= ADVERTISE_1000XPAUSE; ++ if (sg_dig_ctrl & SG_DIG_ASYM_PAUSE) ++ local_adv |= ADVERTISE_1000XPSE_ASYM; ++ ++ if (sg_dig_status & SG_DIG_PARTNER_PAUSE_CAPABLE) ++ remote_adv |= LPA_1000XPAUSE; ++ if (sg_dig_status & SG_DIG_PARTNER_ASYM_PAUSE) ++ remote_adv |= LPA_1000XPAUSE_ASYM; ++ ++ tp->link_config.rmt_adv = ++ mii_adv_to_ethtool_adv_x(remote_adv); ++ ++ tg3_setup_flow_control(tp, local_adv, remote_adv); ++ current_link_up = true; ++ tp->serdes_counter = 0; ++ tp->phy_flags &= ~TG3_PHYFLG_PARALLEL_DETECT; ++ } else if (!(sg_dig_status & SG_DIG_AUTONEG_COMPLETE)) { ++ if (tp->serdes_counter) ++ tp->serdes_counter--; ++ else { ++ if (workaround) { ++ u32 val = serdes_cfg; ++ ++ if (port_a) ++ val |= 0xc010000; ++ else ++ val |= 0x4010000; ++ ++ tw32_f(MAC_SERDES_CFG, val); ++ } ++ ++ tw32_f(SG_DIG_CTRL, SG_DIG_COMMON_SETUP); ++ udelay(40); ++ ++ /* Link parallel detection - link is up */ ++ /* only if we have PCS_SYNC and not */ ++ /* receiving config code words */ ++ mac_status = tr32(MAC_STATUS); ++ if ((mac_status & MAC_STATUS_PCS_SYNCED) && ++ !(mac_status & MAC_STATUS_RCVD_CFG)) { ++ tg3_setup_flow_control(tp, 0, 0); ++ current_link_up = true; ++ tp->phy_flags |= ++ TG3_PHYFLG_PARALLEL_DETECT; ++ tp->serdes_counter = ++ SERDES_PARALLEL_DET_TIMEOUT; ++ } else ++ goto restart_autoneg; ++ } ++ } ++ } else { ++ tp->serdes_counter = SERDES_AN_TIMEOUT_5704S; ++ tp->phy_flags &= ~TG3_PHYFLG_PARALLEL_DETECT; ++ } ++ ++out: ++ return current_link_up; ++} ++ ++static bool tg3_setup_fiber_by_hand(struct tg3 *tp, u32 mac_status) ++{ ++ bool current_link_up = false; ++ ++ if (!(mac_status & MAC_STATUS_PCS_SYNCED)) ++ goto out; ++ ++ if (tp->link_config.autoneg == AUTONEG_ENABLE) { ++ u32 txflags, rxflags; ++ int i; ++ ++ if (fiber_autoneg(tp, &txflags, &rxflags)) { ++ u32 local_adv = 0, remote_adv = 0; ++ ++ if (txflags & ANEG_CFG_PS1) ++ local_adv |= ADVERTISE_1000XPAUSE; ++ if (txflags & ANEG_CFG_PS2) ++ local_adv |= ADVERTISE_1000XPSE_ASYM; ++ ++ if (rxflags & MR_LP_ADV_SYM_PAUSE) ++ remote_adv |= LPA_1000XPAUSE; ++ if (rxflags & MR_LP_ADV_ASYM_PAUSE) ++ remote_adv |= LPA_1000XPAUSE_ASYM; ++ ++ tp->link_config.rmt_adv = ++ mii_adv_to_ethtool_adv_x(remote_adv); ++ ++ tg3_setup_flow_control(tp, local_adv, remote_adv); ++ ++ current_link_up = true; ++ } ++ for (i = 0; i < 30; i++) { ++ udelay(20); ++ tw32_f(MAC_STATUS, ++ (MAC_STATUS_SYNC_CHANGED | ++ MAC_STATUS_CFG_CHANGED)); ++ udelay(40); ++ if ((tr32(MAC_STATUS) & ++ (MAC_STATUS_SYNC_CHANGED | ++ MAC_STATUS_CFG_CHANGED)) == 0) ++ break; ++ } ++ ++ mac_status = tr32(MAC_STATUS); ++ if (!current_link_up && ++ (mac_status & MAC_STATUS_PCS_SYNCED) && ++ !(mac_status & MAC_STATUS_RCVD_CFG)) ++ current_link_up = true; ++ } else { ++ tg3_setup_flow_control(tp, 0, 0); ++ ++ /* Forcing 1000FD link up. */ ++ current_link_up = true; ++ ++ tw32_f(MAC_MODE, (tp->mac_mode | MAC_MODE_SEND_CONFIGS)); ++ udelay(40); ++ ++ tw32_f(MAC_MODE, tp->mac_mode); ++ udelay(40); ++ } ++ ++out: ++ return current_link_up; ++} ++ ++static int tg3_setup_fiber_phy(struct tg3 *tp, bool force_reset) ++{ ++ u32 orig_pause_cfg; ++ u16 orig_active_speed; ++ u8 orig_active_duplex; ++ u32 mac_status; ++ bool current_link_up; ++ int i; ++ ++ orig_pause_cfg = tp->link_config.active_flowctrl; ++ orig_active_speed = tp->link_config.active_speed; ++ orig_active_duplex = tp->link_config.active_duplex; ++ ++ if (!tg3_flag(tp, HW_AUTONEG) && ++ tp->link_up && ++ tg3_flag(tp, INIT_COMPLETE)) { ++ mac_status = tr32(MAC_STATUS); ++ mac_status &= (MAC_STATUS_PCS_SYNCED | ++ MAC_STATUS_SIGNAL_DET | ++ MAC_STATUS_CFG_CHANGED | ++ MAC_STATUS_RCVD_CFG); ++ if (mac_status == (MAC_STATUS_PCS_SYNCED | ++ MAC_STATUS_SIGNAL_DET)) { ++ tw32_f(MAC_STATUS, (MAC_STATUS_SYNC_CHANGED | ++ MAC_STATUS_CFG_CHANGED)); ++ return 0; ++ } ++ } ++ ++ tw32_f(MAC_TX_AUTO_NEG, 0); ++ ++ tp->mac_mode &= ~(MAC_MODE_PORT_MODE_MASK | MAC_MODE_HALF_DUPLEX); ++ tp->mac_mode |= MAC_MODE_PORT_MODE_TBI; ++ tw32_f(MAC_MODE, tp->mac_mode); ++ udelay(40); ++ ++ if (tp->phy_id == TG3_PHY_ID_BCM8002) ++ tg3_init_bcm8002(tp); ++ ++ /* Enable link change event even when serdes polling. */ ++ tw32_f(MAC_EVENT, MAC_EVENT_LNKSTATE_CHANGED); ++ udelay(40); ++ ++ current_link_up = false; ++ tp->link_config.rmt_adv = 0; ++ mac_status = tr32(MAC_STATUS); ++ ++ if (tg3_flag(tp, HW_AUTONEG)) ++ current_link_up = tg3_setup_fiber_hw_autoneg(tp, mac_status); ++ else ++ current_link_up = tg3_setup_fiber_by_hand(tp, mac_status); ++ ++ tp->napi[0].hw_status->status = ++ (SD_STATUS_UPDATED | ++ (tp->napi[0].hw_status->status & ~SD_STATUS_LINK_CHG)); ++ ++ for (i = 0; i < 100; i++) { ++ tw32_f(MAC_STATUS, (MAC_STATUS_SYNC_CHANGED | ++ MAC_STATUS_CFG_CHANGED)); ++ udelay(5); ++ if ((tr32(MAC_STATUS) & (MAC_STATUS_SYNC_CHANGED | ++ MAC_STATUS_CFG_CHANGED | ++ MAC_STATUS_LNKSTATE_CHANGED)) == 0) ++ break; ++ } ++ ++ mac_status = tr32(MAC_STATUS); ++ if ((mac_status & MAC_STATUS_PCS_SYNCED) == 0) { ++ current_link_up = false; ++ if (tp->link_config.autoneg == AUTONEG_ENABLE && ++ tp->serdes_counter == 0) { ++ tw32_f(MAC_MODE, (tp->mac_mode | ++ MAC_MODE_SEND_CONFIGS)); ++ udelay(1); ++ tw32_f(MAC_MODE, tp->mac_mode); ++ } ++ } ++ ++ if (current_link_up) { ++ tp->link_config.active_speed = SPEED_1000; ++ tp->link_config.active_duplex = DUPLEX_FULL; ++ tw32(MAC_LED_CTRL, (tp->led_ctrl | ++ LED_CTRL_LNKLED_OVERRIDE | ++ LED_CTRL_1000MBPS_ON)); ++ } else { ++ tp->link_config.active_speed = SPEED_UNKNOWN; ++ tp->link_config.active_duplex = DUPLEX_UNKNOWN; ++ tw32(MAC_LED_CTRL, (tp->led_ctrl | ++ LED_CTRL_LNKLED_OVERRIDE | ++ LED_CTRL_TRAFFIC_OVERRIDE)); ++ } ++ ++ if (!tg3_test_and_report_link_chg(tp, current_link_up)) { ++ u32 now_pause_cfg = tp->link_config.active_flowctrl; ++ if (orig_pause_cfg != now_pause_cfg || ++ orig_active_speed != tp->link_config.active_speed || ++ orig_active_duplex != tp->link_config.active_duplex) ++ tg3_link_report(tp); ++ } ++ ++ return 0; ++} ++ ++static int tg3_setup_fiber_mii_phy(struct tg3 *tp, bool force_reset) ++{ ++ int err = 0; ++ u32 bmsr, bmcr; ++ u16 current_speed = SPEED_UNKNOWN; ++ u8 current_duplex = DUPLEX_UNKNOWN; ++ bool current_link_up = false; ++ u32 local_adv, remote_adv, sgsr; ++ ++ if ((tg3_asic_rev(tp) == ASIC_REV_5719 || ++ tg3_asic_rev(tp) == ASIC_REV_5720) && ++ !tg3_readphy(tp, SERDES_TG3_1000X_STATUS, &sgsr) && ++ (sgsr & SERDES_TG3_SGMII_MODE)) { ++ ++ if (force_reset) ++ tg3_phy_reset(tp); ++ ++ tp->mac_mode &= ~MAC_MODE_PORT_MODE_MASK; ++ ++ if (!(sgsr & SERDES_TG3_LINK_UP)) { ++ tp->mac_mode |= MAC_MODE_PORT_MODE_GMII; ++ } else { ++ current_link_up = true; ++ if (sgsr & SERDES_TG3_SPEED_1000) { ++ current_speed = SPEED_1000; ++ tp->mac_mode |= MAC_MODE_PORT_MODE_GMII; ++ } else if (sgsr & SERDES_TG3_SPEED_100) { ++ current_speed = SPEED_100; ++ tp->mac_mode |= MAC_MODE_PORT_MODE_MII; ++ } else { ++ current_speed = SPEED_10; ++ tp->mac_mode |= MAC_MODE_PORT_MODE_MII; ++ } ++ ++ if (sgsr & SERDES_TG3_FULL_DUPLEX) ++ current_duplex = DUPLEX_FULL; ++ else ++ current_duplex = DUPLEX_HALF; ++ } ++ ++ tw32_f(MAC_MODE, tp->mac_mode); ++ udelay(40); ++ ++ tg3_clear_mac_status(tp); ++ ++ goto fiber_setup_done; ++ } ++ ++ tp->mac_mode |= MAC_MODE_PORT_MODE_GMII; ++ tw32_f(MAC_MODE, tp->mac_mode); ++ udelay(40); ++ ++ tg3_clear_mac_status(tp); ++ ++ if (force_reset) ++ tg3_phy_reset(tp); ++ ++ tp->link_config.rmt_adv = 0; ++ ++ err |= tg3_readphy(tp, MII_BMSR, &bmsr); ++ err |= tg3_readphy(tp, MII_BMSR, &bmsr); ++ if (tg3_asic_rev(tp) == ASIC_REV_5714) { ++ if (tr32(MAC_TX_STATUS) & TX_STATUS_LINK_UP) ++ bmsr |= BMSR_LSTATUS; ++ else ++ bmsr &= ~BMSR_LSTATUS; ++ } ++ ++ err |= tg3_readphy(tp, MII_BMCR, &bmcr); ++ ++ if ((tp->link_config.autoneg == AUTONEG_ENABLE) && !force_reset && ++ (tp->phy_flags & TG3_PHYFLG_PARALLEL_DETECT)) { ++ /* do nothing, just check for link up at the end */ ++ } else if (tp->link_config.autoneg == AUTONEG_ENABLE) { ++ u32 adv, newadv; ++ ++ err |= tg3_readphy(tp, MII_ADVERTISE, &adv); ++ newadv = adv & ~(ADVERTISE_1000XFULL | ADVERTISE_1000XHALF | ++ ADVERTISE_1000XPAUSE | ++ ADVERTISE_1000XPSE_ASYM | ++ ADVERTISE_SLCT); ++ ++ newadv |= tg3_advert_flowctrl_1000X(tp->link_config.flowctrl); ++ newadv |= ethtool_adv_to_mii_adv_x(tp->link_config.advertising); ++ ++ if ((newadv != adv) || !(bmcr & BMCR_ANENABLE)) { ++ tg3_writephy(tp, MII_ADVERTISE, newadv); ++ bmcr |= BMCR_ANENABLE | BMCR_ANRESTART; ++ tg3_writephy(tp, MII_BMCR, bmcr); ++ ++ tw32_f(MAC_EVENT, MAC_EVENT_LNKSTATE_CHANGED); ++ tp->serdes_counter = SERDES_AN_TIMEOUT_5714S; ++ tp->phy_flags &= ~TG3_PHYFLG_PARALLEL_DETECT; ++ ++ return err; ++ } ++ } else { ++ u32 new_bmcr; ++ ++ bmcr &= ~BMCR_SPEED1000; ++ new_bmcr = bmcr & ~(BMCR_ANENABLE | BMCR_FULLDPLX); ++ ++ if (tp->link_config.duplex == DUPLEX_FULL) ++ new_bmcr |= BMCR_FULLDPLX; ++ ++ if (new_bmcr != bmcr) { ++ /* BMCR_SPEED1000 is a reserved bit that needs ++ * to be set on write. ++ */ ++ new_bmcr |= BMCR_SPEED1000; ++ ++ /* Force a linkdown */ ++ if (tp->link_up) { ++ u32 adv; ++ ++ err |= tg3_readphy(tp, MII_ADVERTISE, &adv); ++ adv &= ~(ADVERTISE_1000XFULL | ++ ADVERTISE_1000XHALF | ++ ADVERTISE_SLCT); ++ tg3_writephy(tp, MII_ADVERTISE, adv); ++ tg3_writephy(tp, MII_BMCR, bmcr | ++ BMCR_ANRESTART | ++ BMCR_ANENABLE); ++ udelay(10); ++ tg3_carrier_off(tp); ++ } ++ tg3_writephy(tp, MII_BMCR, new_bmcr); ++ bmcr = new_bmcr; ++ err |= tg3_readphy(tp, MII_BMSR, &bmsr); ++ err |= tg3_readphy(tp, MII_BMSR, &bmsr); ++ if (tg3_asic_rev(tp) == ASIC_REV_5714) { ++ if (tr32(MAC_TX_STATUS) & TX_STATUS_LINK_UP) ++ bmsr |= BMSR_LSTATUS; ++ else ++ bmsr &= ~BMSR_LSTATUS; ++ } ++ tp->phy_flags &= ~TG3_PHYFLG_PARALLEL_DETECT; ++ } ++ } ++ ++ if (bmsr & BMSR_LSTATUS) { ++ current_speed = SPEED_1000; ++ current_link_up = true; ++ if (bmcr & BMCR_FULLDPLX) ++ current_duplex = DUPLEX_FULL; ++ else ++ current_duplex = DUPLEX_HALF; ++ ++ local_adv = 0; ++ remote_adv = 0; ++ ++ if (bmcr & BMCR_ANENABLE) { ++ u32 common; ++ ++ err |= tg3_readphy(tp, MII_ADVERTISE, &local_adv); ++ err |= tg3_readphy(tp, MII_LPA, &remote_adv); ++ common = local_adv & remote_adv; ++ if (common & (ADVERTISE_1000XHALF | ++ ADVERTISE_1000XFULL)) { ++ if (common & ADVERTISE_1000XFULL) ++ current_duplex = DUPLEX_FULL; ++ else ++ current_duplex = DUPLEX_HALF; ++ ++ tp->link_config.rmt_adv = ++ mii_adv_to_ethtool_adv_x(remote_adv); ++ } else if (!tg3_flag(tp, 5780_CLASS)) { ++ /* Link is up via parallel detect */ ++ } else { ++ current_link_up = false; ++ } ++ } ++ } ++ ++fiber_setup_done: ++ if (current_link_up && current_duplex == DUPLEX_FULL) ++ tg3_setup_flow_control(tp, local_adv, remote_adv); ++ ++ tp->mac_mode &= ~MAC_MODE_HALF_DUPLEX; ++ if (tp->link_config.active_duplex == DUPLEX_HALF) ++ tp->mac_mode |= MAC_MODE_HALF_DUPLEX; ++ ++ tw32_f(MAC_MODE, tp->mac_mode); ++ udelay(40); ++ ++ tw32_f(MAC_EVENT, MAC_EVENT_LNKSTATE_CHANGED); ++ ++ tp->link_config.active_speed = current_speed; ++ tp->link_config.active_duplex = current_duplex; ++ ++ tg3_test_and_report_link_chg(tp, current_link_up); ++ return err; ++} ++ ++static void tg3_serdes_parallel_detect(struct tg3 *tp) ++{ ++ if (tp->serdes_counter) { ++ /* Give autoneg time to complete. */ ++ tp->serdes_counter--; ++ return; ++ } ++ ++ if (!tp->link_up && ++ (tp->link_config.autoneg == AUTONEG_ENABLE)) { ++ u32 bmcr; ++ ++ tg3_readphy(tp, MII_BMCR, &bmcr); ++ if (bmcr & BMCR_ANENABLE) { ++ u32 phy1, phy2; ++ ++ /* Select shadow register 0x1f */ ++ tg3_writephy(tp, MII_TG3_MISC_SHDW, 0x7c00); ++ tg3_readphy(tp, MII_TG3_MISC_SHDW, &phy1); ++ ++ /* Select expansion interrupt status register */ ++ tg3_writephy(tp, MII_TG3_DSP_ADDRESS, ++ MII_TG3_DSP_EXP1_INT_STAT); ++ tg3_readphy(tp, MII_TG3_DSP_RW_PORT, &phy2); ++ tg3_readphy(tp, MII_TG3_DSP_RW_PORT, &phy2); ++ ++ if ((phy1 & 0x10) && !(phy2 & 0x20)) { ++ /* We have signal detect and not receiving ++ * config code words, link is up by parallel ++ * detection. ++ */ ++ ++ bmcr &= ~BMCR_ANENABLE; ++ bmcr |= BMCR_SPEED1000 | BMCR_FULLDPLX; ++ tg3_writephy(tp, MII_BMCR, bmcr); ++ tp->phy_flags |= TG3_PHYFLG_PARALLEL_DETECT; ++ } ++ } ++ } else if (tp->link_up && ++ (tp->link_config.autoneg == AUTONEG_ENABLE) && ++ (tp->phy_flags & TG3_PHYFLG_PARALLEL_DETECT)) { ++ u32 phy2; ++ ++ /* Select expansion interrupt status register */ ++ tg3_writephy(tp, MII_TG3_DSP_ADDRESS, ++ MII_TG3_DSP_EXP1_INT_STAT); ++ tg3_readphy(tp, MII_TG3_DSP_RW_PORT, &phy2); ++ if (phy2 & 0x20) { ++ u32 bmcr; ++ ++ /* Config code words received, turn on autoneg. */ ++ tg3_readphy(tp, MII_BMCR, &bmcr); ++ tg3_writephy(tp, MII_BMCR, bmcr | BMCR_ANENABLE); ++ ++ tp->phy_flags &= ~TG3_PHYFLG_PARALLEL_DETECT; ++ ++ } ++ } ++} ++ ++static int tg3_setup_phy(struct tg3 *tp, bool force_reset) ++{ ++ u32 val; ++ int err; ++ ++ if (tp->phy_flags & TG3_PHYFLG_PHY_SERDES) ++ err = tg3_setup_fiber_phy(tp, force_reset); ++ else if (tp->phy_flags & TG3_PHYFLG_MII_SERDES) ++ err = tg3_setup_fiber_mii_phy(tp, force_reset); ++ else ++ err = tg3_setup_copper_phy(tp, force_reset); ++ ++ if (tg3_chip_rev(tp) == CHIPREV_5784_AX) { ++ u32 scale; ++ ++ val = tr32(TG3_CPMU_CLCK_STAT) & CPMU_CLCK_STAT_MAC_CLCK_MASK; ++ if (val == CPMU_CLCK_STAT_MAC_CLCK_62_5) ++ scale = 65; ++ else if (val == CPMU_CLCK_STAT_MAC_CLCK_6_25) ++ scale = 6; ++ else ++ scale = 12; ++ ++ val = tr32(GRC_MISC_CFG) & ~GRC_MISC_CFG_PRESCALAR_MASK; ++ val |= (scale << GRC_MISC_CFG_PRESCALAR_SHIFT); ++ tw32(GRC_MISC_CFG, val); ++ } ++ ++ val = (2 << TX_LENGTHS_IPG_CRS_SHIFT) | ++ (6 << TX_LENGTHS_IPG_SHIFT); ++ if (tg3_asic_rev(tp) == ASIC_REV_5720 || ++ tg3_asic_rev(tp) == ASIC_REV_5762) ++ val |= tr32(MAC_TX_LENGTHS) & ++ (TX_LENGTHS_JMB_FRM_LEN_MSK | ++ TX_LENGTHS_CNT_DWN_VAL_MSK); ++ ++ if (tp->link_config.active_speed == SPEED_1000 && ++ tp->link_config.active_duplex == DUPLEX_HALF) ++ tw32(MAC_TX_LENGTHS, val | ++ (0xff << TX_LENGTHS_SLOT_TIME_SHIFT)); ++ else ++ tw32(MAC_TX_LENGTHS, val | ++ (32 << TX_LENGTHS_SLOT_TIME_SHIFT)); ++ ++ if (!tg3_flag(tp, 5705_PLUS)) { ++ if (tp->link_up) { ++ tw32(HOSTCC_STAT_COAL_TICKS, ++ tp->coal.stats_block_coalesce_usecs); ++ } else { ++ tw32(HOSTCC_STAT_COAL_TICKS, 0); ++ } ++ } ++ ++ if (tg3_flag(tp, ASPM_WORKAROUND)) { ++ val = tr32(PCIE_PWR_MGMT_THRESH); ++ if (!tp->link_up) ++ val = (val & ~PCIE_PWR_MGMT_L1_THRESH_MSK) | ++ tp->pwrmgmt_thresh; ++ else ++ val |= PCIE_PWR_MGMT_L1_THRESH_MSK; ++ tw32(PCIE_PWR_MGMT_THRESH, val); ++ } ++ ++ return err; ++} ++ ++#ifdef BCM_HAS_IEEE1588_SUPPORT ++/* tp->lock must be held */ ++static u64 tg3_refclk_read(struct tg3 *tp) ++{ ++ u64 stamp = tr32(TG3_EAV_REF_CLCK_LSB); ++ return stamp | (u64)tr32(TG3_EAV_REF_CLCK_MSB) << 32; ++} ++ ++/* tp->lock must be held */ ++static void tg3_refclk_write(struct tg3 *tp, u64 newval) ++{ ++ u32 clock_ctl = tr32(TG3_EAV_REF_CLCK_CTL); ++ ++ tw32(TG3_EAV_REF_CLCK_CTL, clock_ctl | TG3_EAV_REF_CLCK_CTL_STOP); ++ tw32(TG3_EAV_REF_CLCK_LSB, newval & 0xffffffff); ++ tw32(TG3_EAV_REF_CLCK_MSB, newval >> 32); ++ tw32_f(TG3_EAV_REF_CLCK_CTL, clock_ctl | TG3_EAV_REF_CLCK_CTL_RESUME); ++} ++ ++static inline void tg3_full_lock(struct tg3 *tp, int irq_sync); ++static inline void tg3_full_unlock(struct tg3 *tp); ++#if IS_ENABLED(CONFIG_PTP_1588_CLOCK) ++#ifdef ETHTOOL_GET_TS_INFO ++static int tg3_get_ts_info(struct net_device *dev, struct ethtool_ts_info *info) ++{ ++ struct tg3 *tp = netdev_priv(dev); ++ ++ info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE | ++ SOF_TIMESTAMPING_RX_SOFTWARE | ++ SOF_TIMESTAMPING_SOFTWARE; ++ ++ if (tg3_flag(tp, PTP_CAPABLE)) { ++ info->so_timestamping |= SOF_TIMESTAMPING_TX_HARDWARE | ++ SOF_TIMESTAMPING_RX_HARDWARE | ++ SOF_TIMESTAMPING_RAW_HARDWARE; ++ } ++ ++ if (tp->ptp_clock) ++ info->phc_index = ptp_clock_index(tp->ptp_clock); ++ else ++ info->phc_index = -1; ++ ++ info->tx_types = (1 << HWTSTAMP_TX_OFF) | (1 << HWTSTAMP_TX_ON); ++ ++ info->rx_filters = (1 << HWTSTAMP_FILTER_NONE) | ++ (1 << HWTSTAMP_FILTER_PTP_V1_L4_EVENT) | ++ (1 << HWTSTAMP_FILTER_PTP_V2_L2_EVENT) | ++ (1 << HWTSTAMP_FILTER_PTP_V2_L4_EVENT); ++ return 0; ++} ++#endif ++ ++static int tg3_ptp_adjfreq(struct ptp_clock_info *ptp, s32 ppb) ++{ ++ struct tg3 *tp = container_of(ptp, struct tg3, ptp_info); ++ bool neg_adj = false; ++ u32 correction = 0; ++ ++ if (ppb < 0) { ++ neg_adj = true; ++ ppb = -ppb; ++ } ++ ++ /* Frequency adjustment is performed using hardware with a 24 bit ++ * accumulator and a programmable correction value. On each clk, the ++ * correction value gets added to the accumulator and when it ++ * overflows, the time counter is incremented/decremented. ++ * ++ * So conversion from ppb to correction value is ++ * ppb * (1 << 24) / 1000000000 ++ */ ++ correction = div_u64((u64)ppb * (1 << 24), 1000000000ULL) & ++ TG3_EAV_REF_CLK_CORRECT_MASK; ++ ++ tg3_full_lock(tp, 0); ++ ++ if (correction) ++ tw32(TG3_EAV_REF_CLK_CORRECT_CTL, ++ TG3_EAV_REF_CLK_CORRECT_EN | ++ (neg_adj ? TG3_EAV_REF_CLK_CORRECT_NEG : 0) | correction); ++ else ++ tw32(TG3_EAV_REF_CLK_CORRECT_CTL, 0); ++ ++ tg3_full_unlock(tp); ++ ++ return 0; ++} ++ ++static int tg3_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta) ++{ ++ struct tg3 *tp = container_of(ptp, struct tg3, ptp_info); ++ ++ tg3_full_lock(tp, 0); ++ tp->ptp_adjust += delta; ++ tg3_full_unlock(tp); ++ ++ return 0; ++} ++ ++static int tg3_ptp_gettime(struct ptp_clock_info *ptp, struct timespec *ts) ++{ ++ u64 ns; ++ u32 remainder; ++ struct tg3 *tp = container_of(ptp, struct tg3, ptp_info); ++ ++ tg3_full_lock(tp, 0); ++ ns = tg3_refclk_read(tp); ++ ns += tp->ptp_adjust; ++ tg3_full_unlock(tp); ++ ++ ts->tv_sec = div_u64_rem(ns, 1000000000, &remainder); ++ ts->tv_nsec = remainder; ++ ++ return 0; ++} ++ ++static int tg3_ptp_settime(struct ptp_clock_info *ptp, ++ const struct timespec *ts) ++{ ++ u64 ns; ++ struct tg3 *tp = container_of(ptp, struct tg3, ptp_info); ++ ++ ns = timespec_to_ns(ts); ++ ++ tg3_full_lock(tp, 0); ++ tg3_refclk_write(tp, ns); ++ tp->ptp_adjust = 0; ++ tg3_full_unlock(tp); ++ ++ return 0; ++} ++ ++static int tg3_ptp_enable(struct ptp_clock_info *ptp, ++ struct ptp_clock_request *rq, int on) ++{ ++ struct tg3 *tp = container_of(ptp, struct tg3, ptp_info); ++ u32 clock_ctl; ++ int rval = 0; ++ ++ switch (rq->type) { ++ case PTP_CLK_REQ_PEROUT: ++ if (rq->perout.index != 0) ++ return -EINVAL; ++ ++ tg3_full_lock(tp, 0); ++ clock_ctl = tr32(TG3_EAV_REF_CLCK_CTL); ++ clock_ctl &= ~TG3_EAV_CTL_TSYNC_GPIO_MASK; ++ ++ if (on) { ++ u64 nsec; ++ ++ nsec = rq->perout.start.sec * 1000000000ULL + ++ rq->perout.start.nsec; ++ ++ if (rq->perout.period.sec || rq->perout.period.nsec) { ++ netdev_warn(tp->dev, ++ "Device supports only a one-shot timesync output, period must be 0\n"); ++ rval = -EINVAL; ++ goto err_out; ++ } ++ ++ if (nsec & (1ULL << 63)) { ++ netdev_warn(tp->dev, ++ "Start value (nsec) is over limit. Maximum size of start is only 63 bits\n"); ++ rval = -EINVAL; ++ goto err_out; ++ } ++ ++ tw32(TG3_EAV_WATCHDOG0_LSB, (nsec & 0xffffffff)); ++ tw32(TG3_EAV_WATCHDOG0_MSB, ++ TG3_EAV_WATCHDOG0_EN | ++ ((nsec >> 32) & TG3_EAV_WATCHDOG_MSB_MASK)); ++ ++ tw32(TG3_EAV_REF_CLCK_CTL, ++ clock_ctl | TG3_EAV_CTL_TSYNC_WDOG0); ++ } else { ++ tw32(TG3_EAV_WATCHDOG0_MSB, 0); ++ tw32(TG3_EAV_REF_CLCK_CTL, clock_ctl); ++ } ++ ++err_out: ++ tg3_full_unlock(tp); ++ return rval; ++ ++ default: ++ break; ++ } ++ ++ return -EOPNOTSUPP; ++} ++ ++static const struct ptp_clock_info tg3_ptp_caps = { ++ .owner = THIS_MODULE, ++ .name = "tg3 clock", ++ .max_adj = 250000000, ++ .n_alarm = 0, ++ .n_ext_ts = 0, ++ .n_per_out = 1, ++ .pps = 0, ++ .adjfreq = tg3_ptp_adjfreq, ++ .adjtime = tg3_ptp_adjtime, ++ .gettime = tg3_ptp_gettime, ++ .settime = tg3_ptp_settime, ++ .enable = tg3_ptp_enable, ++}; ++ ++static void tg3_hwclock_to_timestamp(struct tg3 *tp, u64 hwclock, ++ struct skb_shared_hwtstamps *timestamp) ++{ ++ memset(timestamp, 0, sizeof(struct skb_shared_hwtstamps)); ++ timestamp->hwtstamp = ns_to_ktime((hwclock & TG3_TSTAMP_MASK) + ++ tp->ptp_adjust); ++} ++ ++/* tp->lock must be held */ ++static void tg3_ptp_init(struct tg3 *tp) ++{ ++ if (!tg3_flag(tp, PTP_CAPABLE)) ++ return; ++ ++ /* Initialize the hardware clock to the system time. */ ++ tg3_refclk_write(tp, ktime_to_ns(ktime_get_real())); ++ tp->ptp_adjust = 0; ++ tp->ptp_info = tg3_ptp_caps; ++} ++ ++/* tp->lock must be held */ ++static void tg3_ptp_resume(struct tg3 *tp) ++{ ++ if (!tg3_flag(tp, PTP_CAPABLE)) ++ return; ++ ++ tg3_refclk_write(tp, ktime_to_ns(ktime_get_real()) + tp->ptp_adjust); ++ tp->ptp_adjust = 0; ++} ++ ++static void tg3_ptp_fini(struct tg3 *tp) ++{ ++ if (!tg3_flag(tp, PTP_CAPABLE) || !tp->ptp_clock) ++ return; ++ ++ ptp_clock_unregister(tp->ptp_clock); ++ tp->ptp_clock = NULL; ++ tp->ptp_adjust = 0; ++} ++ ++#else /* IS_ENABLED(CONFIG_PTP_1588_CLOCK) */ ++ ++static cycle_t tg3_timecntr_read_clock(const struct cyclecounter *tc) ++{ ++ struct tg3 *tp = container_of(tc, struct tg3, cycles); ++ return tg3_refclk_read(tp); ++} ++ ++static void tg3_ptp_calibrate(struct tg3 *tp) ++{ ++ struct timespec now; ++ ++ getnstimeofday(&now); ++ tg3_refclk_write(tp, timespec_to_ns(&now)); ++ ++ /* Synchronize our NIC clock against system wall clock. */ ++ memset(&tp->cycles, 0, sizeof(tp->cycles)); ++ tp->cycles.read = tg3_timecntr_read_clock; ++ tp->cycles.mask = CLOCKSOURCE_MASK(64); ++ tp->cycles.mult = 1; ++ ++ timecounter_init(&tp->clock, ++ &tp->cycles, ++ ktime_to_ns(ktime_get_real())); ++ ++ memset(&tp->compare, 0, sizeof(tp->compare)); ++ tp->compare.source = &tp->clock; ++ tp->compare.target = ktime_get_real; ++ tp->compare.num_samples = 10; ++ timecompare_update(&tp->compare, 0); ++} ++ ++static void tg3_hwclock_to_timestamp(struct tg3 *tp, u64 hwclock, ++ struct skb_shared_hwtstamps *timestamp) ++{ ++ u64 ns = timecounter_cyc2time(&tp->clock, hwclock & TG3_TSTAMP_MASK); ++ timecompare_update(&tp->compare, ns); ++ ++ memset(timestamp, 0, sizeof(struct skb_shared_hwtstamps)); ++ timestamp->hwtstamp = ns_to_ktime(ns); ++ timestamp->syststamp = timecompare_transform(&tp->compare, ns); ++} ++ ++static void tg3_ptp_init(struct tg3 *tp) ++{ ++ if (!tg3_flag(tp, PTP_CAPABLE)) ++ return; ++ ++ tg3_ptp_calibrate(tp); ++} ++ ++static void tg3_ptp_resume(struct tg3 *tp) ++{ ++ if (!tg3_flag(tp, PTP_CAPABLE)) ++ return; ++ ++ tg3_ptp_calibrate(tp); ++} ++ ++static void tg3_ptp_fini(struct tg3 *tp) ++{ ++} ++#endif /* IS_ENABLED(CONFIG_PTP_1588_CLOCK) */ ++ ++#else /* BCM_HAS_IEEE1588_SUPPORT */ ++#define tg3_ptp_init(tp) ++#define tg3_ptp_resume(tp) ++#define tg3_ptp_fini(tp) ++#endif /* BCM_HAS_IEEE1588_SUPPORT */ ++ ++static inline int tg3_irq_sync(struct tg3 *tp) ++{ ++ return tp->irq_sync; ++} ++ ++static inline void tg3_rd32_loop(struct tg3 *tp, u32 *dst, u32 off, u32 len) ++{ ++ int i; ++ ++ dst = (u32 *)((u8 *)dst + off); ++ for (i = 0; i < len; i += sizeof(u32)) ++ *dst++ = tr32(off + i); ++} ++ ++static void tg3_dump_legacy_regs(struct tg3 *tp, u32 *regs) ++{ ++ tg3_rd32_loop(tp, regs, TG3PCI_VENDOR, 0xb0); ++ tg3_rd32_loop(tp, regs, MAILBOX_INTERRUPT_0, 0x200); ++ tg3_rd32_loop(tp, regs, MAC_MODE, 0x4f0); ++ tg3_rd32_loop(tp, regs, SNDDATAI_MODE, 0xe0); ++ tg3_rd32_loop(tp, regs, SNDDATAC_MODE, 0x04); ++ tg3_rd32_loop(tp, regs, SNDBDS_MODE, 0x80); ++ tg3_rd32_loop(tp, regs, SNDBDI_MODE, 0x48); ++ tg3_rd32_loop(tp, regs, SNDBDC_MODE, 0x04); ++ tg3_rd32_loop(tp, regs, RCVLPC_MODE, 0x20); ++ tg3_rd32_loop(tp, regs, RCVLPC_SELLST_BASE, 0x15c); ++ tg3_rd32_loop(tp, regs, RCVDBDI_MODE, 0x0c); ++ tg3_rd32_loop(tp, regs, RCVDBDI_JUMBO_BD, 0x3c); ++ tg3_rd32_loop(tp, regs, RCVDBDI_BD_PROD_IDX_0, 0x44); ++ tg3_rd32_loop(tp, regs, RCVDCC_MODE, 0x04); ++ tg3_rd32_loop(tp, regs, RCVBDI_MODE, 0x20); ++ tg3_rd32_loop(tp, regs, RCVCC_MODE, 0x14); ++ tg3_rd32_loop(tp, regs, RCVLSC_MODE, 0x08); ++ tg3_rd32_loop(tp, regs, MBFREE_MODE, 0x08); ++ tg3_rd32_loop(tp, regs, HOSTCC_MODE, 0x100); ++ ++ if (tg3_flag(tp, SUPPORT_MSIX)) ++ tg3_rd32_loop(tp, regs, HOSTCC_RXCOL_TICKS_VEC1, 0x180); ++ ++ tg3_rd32_loop(tp, regs, MEMARB_MODE, 0x10); ++ tg3_rd32_loop(tp, regs, BUFMGR_MODE, 0x58); ++ tg3_rd32_loop(tp, regs, RDMAC_MODE, 0x08); ++ tg3_rd32_loop(tp, regs, WDMAC_MODE, 0x08); ++ tg3_rd32_loop(tp, regs, RX_CPU_MODE, 0x04); ++ tg3_rd32_loop(tp, regs, RX_CPU_STATE, 0x04); ++ tg3_rd32_loop(tp, regs, RX_CPU_PGMCTR, 0x04); ++ tg3_rd32_loop(tp, regs, RX_CPU_HWBKPT, 0x04); ++ ++ if (!tg3_flag(tp, 5705_PLUS)) { ++ tg3_rd32_loop(tp, regs, TX_CPU_MODE, 0x04); ++ tg3_rd32_loop(tp, regs, TX_CPU_STATE, 0x04); ++ tg3_rd32_loop(tp, regs, TX_CPU_PGMCTR, 0x04); ++ } ++ ++ tg3_rd32_loop(tp, regs, GRCMBOX_INTERRUPT_0, 0x110); ++ tg3_rd32_loop(tp, regs, FTQ_RESET, 0x120); ++ tg3_rd32_loop(tp, regs, MSGINT_MODE, 0x0c); ++ tg3_rd32_loop(tp, regs, DMAC_MODE, 0x04); ++ tg3_rd32_loop(tp, regs, GRC_MODE, 0x4c); ++ ++ if (tg3_flag(tp, NVRAM)) ++ tg3_rd32_loop(tp, regs, NVRAM_CMD, 0x24); ++} ++ ++static void tg3_dump_state(struct tg3 *tp) ++{ ++ int i; ++ u32 *regs; ++ ++ regs = kzalloc(TG3_REG_BLK_SIZE, GFP_ATOMIC); ++ if (!regs) { ++ netdev_err(tp->dev, "Failed allocating register dump buffer\n"); ++ return; ++ } ++ ++ if (tg3_flag(tp, PCI_EXPRESS)) { ++ /* Read up to but not including private PCI registers */ ++ for (i = 0; i < TG3_PCIE_TLDLPL_PORT; i += sizeof(u32)) ++ regs[i / sizeof(u32)] = tr32(i); ++ } else ++ tg3_dump_legacy_regs(tp, regs); ++ ++ for (i = 0; i < TG3_REG_BLK_SIZE / sizeof(u32); i += 4) { ++ if (!regs[i + 0] && !regs[i + 1] && ++ !regs[i + 2] && !regs[i + 3]) ++ continue; ++ ++ netdev_err(tp->dev, "0x%08x: 0x%08x, 0x%08x, 0x%08x, 0x%08x\n", ++ i * 4, ++ regs[i + 0], regs[i + 1], regs[i + 2], regs[i + 3]); ++ } ++ ++ kfree(regs); ++ ++ for (i = 0; i < tp->irq_cnt; i++) { ++ struct tg3_napi *tnapi = &tp->napi[i]; ++ ++ /* SW status block */ ++ netdev_err(tp->dev, ++ "%d: Host status block [%08x:%08x:(%04x:%04x:%04x):(%04x:%04x)]\n", ++ i, ++ tnapi->hw_status->status, ++ tnapi->hw_status->status_tag, ++ tnapi->hw_status->rx_jumbo_consumer, ++ tnapi->hw_status->rx_consumer, ++ tnapi->hw_status->rx_mini_consumer, ++ tnapi->hw_status->idx[0].rx_producer, ++ tnapi->hw_status->idx[0].tx_consumer); ++ ++ netdev_err(tp->dev, ++ "%d: NAPI info [%08x:%08x:(%04x:%04x:%04x):%04x:(%04x:%04x:%04x:%04x)]\n", ++ i, ++ tnapi->last_tag, tnapi->last_irq_tag, ++ tnapi->tx_prod, tnapi->tx_cons, tnapi->tx_pending, ++ tnapi->rx_rcb_ptr, ++ tnapi->prodring.rx_std_prod_idx, ++ tnapi->prodring.rx_std_cons_idx, ++ tnapi->prodring.rx_jmb_prod_idx, ++ tnapi->prodring.rx_jmb_cons_idx); ++ } ++} ++ ++/* This is called whenever we suspect that the system chipset is re- ++ * ordering the sequence of MMIO to the tx send mailbox. The symptom ++ * is bogus tx completions. We try to recover by setting the ++ * TG3_FLAG_MBOX_WRITE_REORDER flag and resetting the chip later ++ * in the workqueue. ++ */ ++static void tg3_tx_recover(struct tg3 *tp) ++{ ++ BUG_ON(tg3_flag(tp, MBOX_WRITE_REORDER) || ++ tp->write32_tx_mbox == tg3_write_indirect_mbox); ++ ++ netdev_warn(tp->dev, ++ "The system may be re-ordering memory-mapped I/O " ++ "cycles to the network device, attempting to recover. " ++ "Please report the problem to the driver maintainer " ++ "and include system chipset information.\n"); ++ ++ tg3_flag_set(tp, TX_RECOVERY_PENDING); ++} ++ ++static inline u32 tg3_tx_avail(struct tg3_napi *tnapi) ++{ ++ /* Tell compiler to fetch tx indices from memory. */ ++ barrier(); ++ return tnapi->tx_pending - ++ ((tnapi->tx_prod - tnapi->tx_cons) & (TG3_TX_RING_SIZE - 1)); ++} ++ ++/* Tigon3 never reports partial packet sends. So we do not ++ * need special logic to handle SKBs that have not had all ++ * of their frags sent yet, like SunGEM does. ++ */ ++static void tg3_tx(struct tg3_napi *tnapi) ++{ ++ struct tg3 *tp = tnapi->tp; ++ u32 hw_idx = tnapi->hw_status->idx[0].tx_consumer; ++ u32 sw_idx = tnapi->tx_cons; ++ struct netdev_queue *txq; ++ int index = tnapi - tp->napi; ++ unsigned int pkts_compl = 0, bytes_compl = 0; ++ ++ if (tg3_flag(tp, ENABLE_TSS)) ++ index--; ++ ++ txq = netdev_get_tx_queue(tp->dev, index); ++ ++ while (sw_idx != hw_idx) { ++ struct tg3_tx_ring_info *ri = &tnapi->tx_buffers[sw_idx]; ++ struct sk_buff *skb = ri->skb; ++ int i, tx_bug = 0; ++ ++ if (unlikely(skb == NULL)) { ++ tg3_tx_recover(tp); ++ return; ++ } ++ ++#ifdef BCM_HAS_IEEE1588_SUPPORT ++ if (tnapi->tx_ring[sw_idx].len_flags & TXD_FLAG_HWTSTAMP) { ++ struct skb_shared_hwtstamps timestamp; ++ u64 hwclock = tr32(TG3_TX_TSTAMP_LSB); ++ hwclock |= (u64)tr32(TG3_TX_TSTAMP_MSB) << 32; ++ ++ tg3_hwclock_to_timestamp(tp, hwclock, ×tamp); ++ ++ skb_tstamp_tx(skb, ×tamp); ++ } ++#endif /* BCM_HAS_IEEE1588_SUPPORT */ ++ ++ pci_unmap_single(tp->pdev, ++ dma_unmap_addr(ri, mapping), ++ skb_headlen(skb), ++ PCI_DMA_TODEVICE); ++ ++ ri->skb = NULL; ++ ++ while (ri->fragmented) { ++ ri->fragmented = false; ++ sw_idx = NEXT_TX(sw_idx); ++ ri = &tnapi->tx_buffers[sw_idx]; ++ } ++ ++ sw_idx = NEXT_TX(sw_idx); ++ ++ for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) { ++ ri = &tnapi->tx_buffers[sw_idx]; ++ if (unlikely(ri->skb != NULL || sw_idx == hw_idx)) ++ tx_bug = 1; ++ ++ pci_unmap_page(tp->pdev, ++ dma_unmap_addr(ri, mapping), ++ skb_frag_size(&skb_shinfo(skb)->frags[i]), ++ PCI_DMA_TODEVICE); ++ ++ while (ri->fragmented) { ++ ri->fragmented = false; ++ sw_idx = NEXT_TX(sw_idx); ++ ri = &tnapi->tx_buffers[sw_idx]; ++ } ++ ++ sw_idx = NEXT_TX(sw_idx); ++ } ++ ++ pkts_compl++; ++ bytes_compl += skb->len; ++ ++ dev_kfree_skb(skb); ++ ++ if (unlikely(tx_bug)) { ++ tg3_tx_recover(tp); ++ return; ++ } ++ } ++ ++ netdev_tx_completed_queue(txq, pkts_compl, bytes_compl); ++ ++ tnapi->tx_cons = sw_idx; ++ ++ /* Need to make the tx_cons update visible to tg3_start_xmit() ++ * before checking for netif_queue_stopped(). Without the ++ * memory barrier, there is a small possibility that tg3_start_xmit() ++ * will miss it and cause the queue to be stopped forever. ++ */ ++ smp_mb(); ++ ++ if (unlikely(netif_tx_queue_stopped(txq) && ++ (tg3_tx_avail(tnapi) > TG3_TX_WAKEUP_THRESH(tnapi)))) { ++ __netif_tx_lock(txq, smp_processor_id()); ++ if (netif_tx_queue_stopped(txq) && ++ (tg3_tx_avail(tnapi) > TG3_TX_WAKEUP_THRESH(tnapi))) ++ netif_tx_wake_queue(txq); ++ __netif_tx_unlock(txq); ++ } ++} ++ ++static void tg3_frag_free(bool is_frag, void *data) ++{ ++#ifdef BCM_HAS_BUILD_SKB ++ if (is_frag) ++ put_page(virt_to_head_page(data)); ++ else ++ kfree(data); ++#else ++ dev_kfree_skb_any(data); ++#endif ++} ++ ++static void tg3_rx_data_free(struct tg3 *tp, struct ring_info *ri, u32 map_sz) ++{ ++ unsigned int skb_size = SKB_DATA_ALIGN(map_sz + TG3_RX_OFFSET(tp)) + ++ SKB_DATA_ALIGN(sizeof(struct skb_shared_info)); ++ ++ if (!ri->data) ++ return; ++ ++ pci_unmap_single(tp->pdev, dma_unmap_addr(ri, mapping), ++ map_sz, PCI_DMA_FROMDEVICE); ++ tg3_frag_free(skb_size <= PAGE_SIZE, ri->data); ++ ri->data = NULL; ++} ++ ++/* Returns size of skb allocated or < 0 on error. ++ * ++ * We only need to fill in the address because the other members ++ * of the RX descriptor are invariant, see tg3_init_rings. ++ * ++ * Note the purposeful assymetry of cpu vs. chip accesses. For ++ * posting buffers we only dirty the first cache line of the RX ++ * descriptor (containing the address). Whereas for the RX status ++ * buffers the cpu only reads the last cacheline of the RX descriptor ++ * (to fetch the error flags, vlan tag, checksum, and opaque cookie). ++ */ ++static int tg3_alloc_rx_data(struct tg3 *tp, struct tg3_rx_prodring_set *tpr, ++ u32 opaque_key, u32 dest_idx_unmasked, ++ unsigned int *frag_size) ++{ ++ struct tg3_rx_buffer_desc *desc; ++ struct ring_info *map; ++ u8 *data; ++ dma_addr_t mapping; ++#ifdef BCM_HAS_BUILD_SKB ++ int skb_size; ++#else ++ struct sk_buff *skb; ++#endif ++ int data_size, dest_idx; ++ ++ switch (opaque_key) { ++ case RXD_OPAQUE_RING_STD: ++ dest_idx = dest_idx_unmasked & tp->rx_std_ring_mask; ++ desc = &tpr->rx_std[dest_idx]; ++ map = &tpr->rx_std_buffers[dest_idx]; ++ data_size = tp->rx_pkt_map_sz; ++ break; ++ ++ case RXD_OPAQUE_RING_JUMBO: ++ dest_idx = dest_idx_unmasked & tp->rx_jmb_ring_mask; ++ desc = &tpr->rx_jmb[dest_idx].std; ++ map = &tpr->rx_jmb_buffers[dest_idx]; ++ data_size = TG3_RX_JMB_MAP_SZ; ++ break; ++ ++ default: ++ return -EINVAL; ++ } ++ ++ /* Do not overwrite any of the map or rp information ++ * until we are sure we can commit to a new buffer. ++ * ++ * Callers depend upon this behavior and assume that ++ * we leave everything unchanged if we fail. ++ */ ++#ifdef BCM_HAS_BUILD_SKB ++ skb_size = SKB_DATA_ALIGN(data_size + TG3_RX_OFFSET(tp)) + ++ SKB_DATA_ALIGN(sizeof(struct skb_shared_info)); ++ if (skb_size <= PAGE_SIZE) { ++ data = netdev_alloc_frag(skb_size); ++ *frag_size = skb_size; ++ } else { ++ data = kmalloc(skb_size, GFP_ATOMIC); ++ *frag_size = 0; ++ } ++ if (!data) ++ return -ENOMEM; ++#else ++ skb = netdev_alloc_skb(tp->dev, data_size + TG3_RX_OFFSET(tp) + ++ TG3_COMPAT_VLAN_ALLOC_LEN); ++ if (skb == NULL) ++ return -ENOMEM; ++ ++ skb_reserve(skb, TG3_RX_OFFSET(tp) + ++ TG3_COMPAT_VLAN_RESERVE(TG3_TO_INT(skb->data))); ++ data = skb->data; ++ ++#endif ++ ++ mapping = pci_map_single(tp->pdev, ++ data + TG3_RX_OFFSET(tp), ++ data_size, ++ PCI_DMA_FROMDEVICE); ++ if (unlikely(pci_dma_mapping_error_(tp->pdev, mapping))) { ++#ifdef BCM_HAS_BUILD_SKB ++ tg3_frag_free(skb_size <= PAGE_SIZE, data); ++#else ++ dev_kfree_skb(skb); ++#endif ++ return -EIO; ++ } ++ ++#ifdef BCM_HAS_BUILD_SKB ++ map->data = data; ++#else ++ map->data = skb; ++#endif ++ dma_unmap_addr_set(map, mapping, mapping); ++ ++ desc->addr_hi = ((u64)mapping >> 32); ++ desc->addr_lo = ((u64)mapping & 0xffffffff); ++ ++ return data_size; ++} ++ ++/* We only need to move over in the address because the other ++ * members of the RX descriptor are invariant. See notes above ++ * tg3_alloc_rx_data for full details. ++ */ ++static void tg3_recycle_rx(struct tg3_napi *tnapi, ++ struct tg3_rx_prodring_set *dpr, ++ u32 opaque_key, int src_idx, ++ u32 dest_idx_unmasked) ++{ ++ struct tg3 *tp = tnapi->tp; ++ struct tg3_rx_buffer_desc *src_desc, *dest_desc; ++ struct ring_info *src_map, *dest_map; ++ struct tg3_rx_prodring_set *spr = tnapi->srcprodring; ++ int dest_idx; ++ ++ switch (opaque_key) { ++ case RXD_OPAQUE_RING_STD: ++ dest_idx = dest_idx_unmasked & tp->rx_std_ring_mask; ++ dest_desc = &dpr->rx_std[dest_idx]; ++ dest_map = &dpr->rx_std_buffers[dest_idx]; ++ src_desc = &spr->rx_std[src_idx]; ++ src_map = &spr->rx_std_buffers[src_idx]; ++ break; ++ ++ case RXD_OPAQUE_RING_JUMBO: ++ dest_idx = dest_idx_unmasked & tp->rx_jmb_ring_mask; ++ dest_desc = &dpr->rx_jmb[dest_idx].std; ++ dest_map = &dpr->rx_jmb_buffers[dest_idx]; ++ src_desc = &spr->rx_jmb[src_idx].std; ++ src_map = &spr->rx_jmb_buffers[src_idx]; ++ break; ++ ++ default: ++ return; ++ } ++ ++ dest_map->data = src_map->data; ++ dma_unmap_addr_set(dest_map, mapping, ++ dma_unmap_addr(src_map, mapping)); ++ dest_desc->addr_hi = src_desc->addr_hi; ++ dest_desc->addr_lo = src_desc->addr_lo; ++ ++ /* Ensure that the update to the skb happens after the physical ++ * addresses have been transferred to the new BD location. ++ */ ++ smp_wmb(); ++ ++ src_map->data = NULL; ++} ++ ++/* The RX ring scheme is composed of multiple rings which post fresh ++ * buffers to the chip, and one special ring the chip uses to report ++ * status back to the host. ++ * ++ * The special ring reports the status of received packets to the ++ * host. The chip does not write into the original descriptor the ++ * RX buffer was obtained from. The chip simply takes the original ++ * descriptor as provided by the host, updates the status and length ++ * field, then writes this into the next status ring entry. ++ * ++ * Each ring the host uses to post buffers to the chip is described ++ * by a TG3_BDINFO entry in the chips SRAM area. When a packet arrives, ++ * it is first placed into the on-chip ram. When the packet's length ++ * is known, it walks down the TG3_BDINFO entries to select the ring. ++ * Each TG3_BDINFO specifies a MAXLEN field and the first TG3_BDINFO ++ * which is within the range of the new packet's length is chosen. ++ * ++ * The "separate ring for rx status" scheme may sound queer, but it makes ++ * sense from a cache coherency perspective. If only the host writes ++ * to the buffer post rings, and only the chip writes to the rx status ++ * rings, then cache lines never move beyond shared-modified state. ++ * If both the host and chip were to write into the same ring, cache line ++ * eviction could occur since both entities want it in an exclusive state. ++ */ ++static int tg3_rx(struct tg3_napi *tnapi, int budget) ++{ ++ struct tg3 *tp = tnapi->tp; ++ u32 work_mask, rx_std_posted = 0; ++ u32 std_prod_idx, jmb_prod_idx; ++ u32 sw_idx = tnapi->rx_rcb_ptr; ++ u16 hw_idx; ++ int received; ++ struct tg3_rx_prodring_set *tpr = &tnapi->prodring; ++ ++ hw_idx = *(tnapi->rx_rcb_prod_idx); ++ /* ++ * We need to order the read of hw_idx and the read of ++ * the opaque cookie. ++ */ ++ rmb(); ++ work_mask = 0; ++ received = 0; ++ std_prod_idx = tpr->rx_std_prod_idx; ++ jmb_prod_idx = tpr->rx_jmb_prod_idx; ++ while (sw_idx != hw_idx && budget > 0) { ++ struct ring_info *ri; ++ struct tg3_rx_buffer_desc *desc = &tnapi->rx_rcb[sw_idx]; ++ unsigned int len; ++ struct sk_buff *skb; ++ dma_addr_t dma_addr; ++ u32 opaque_key, desc_idx, *post_ptr; ++ u8 *data; ++#ifdef BCM_HAS_IEEE1588_SUPPORT ++ u64 tstamp = 0; ++#endif /* BCM_HAS_IEEE1588_SUPPORT */ ++ ++ desc_idx = desc->opaque & RXD_OPAQUE_INDEX_MASK; ++ opaque_key = desc->opaque & RXD_OPAQUE_RING_MASK; ++ if (opaque_key == RXD_OPAQUE_RING_STD) { ++ ri = &tnapi->srcprodring->rx_std_buffers[desc_idx]; ++ dma_addr = dma_unmap_addr(ri, mapping); ++#ifdef BCM_HAS_BUILD_SKB ++ data = ri->data; ++#else ++ skb = ri->data; ++ data = skb->data; ++#endif ++ post_ptr = &std_prod_idx; ++ rx_std_posted++; ++ } else if (opaque_key == RXD_OPAQUE_RING_JUMBO) { ++ ri = &tnapi->srcprodring->rx_jmb_buffers[desc_idx]; ++ dma_addr = dma_unmap_addr(ri, mapping); ++#ifdef BCM_HAS_BUILD_SKB ++ data = ri->data; ++#else ++ skb = ri->data; ++ data = skb->data; ++#endif ++ post_ptr = &jmb_prod_idx; ++ } else ++ goto next_pkt_nopost; ++ ++ work_mask |= opaque_key; ++ ++ if (desc->err_vlan & RXD_ERR_MASK) { ++#ifdef TG3_VMWARE_NETQ_ENABLE ++ tnapi->netq.stats.rx_errors_sw++; ++ ++ if (desc->err_vlan & RXD_ERR_BAD_CRC) ++ tnapi->netq.stats.rx_crc_errors++; ++ ++ if (desc->err_vlan & ++ (RXD_ERR_TOO_SMALL | ++ RXD_ERR_HUGE_FRAME)) ++ tnapi->netq.stats.rx_frame_errors++; ++#endif ++ drop_it: ++ tg3_recycle_rx(tnapi, tpr, opaque_key, ++ desc_idx, *post_ptr); ++ drop_it_no_recycle: ++ /* Other statistics kept track of by card. */ ++ tp->rx_dropped++; ++ goto next_pkt; ++ } ++ ++ len = ((desc->idx_len & RXD_LEN_MASK) >> RXD_LEN_SHIFT) - ++ ETH_FCS_LEN; ++ ++#ifdef BCM_HAS_IEEE1588_SUPPORT ++ if ((desc->type_flags & RXD_FLAG_PTPSTAT_MASK) == ++ RXD_FLAG_PTPSTAT_PTPV1 || ++ (desc->type_flags & RXD_FLAG_PTPSTAT_MASK) == ++ RXD_FLAG_PTPSTAT_PTPV2) { ++ /* Read the timestamp out early, in case we drop the packet. */ ++ tstamp = tr32(TG3_RX_TSTAMP_LSB); ++ tstamp |= (u64)tr32(TG3_RX_TSTAMP_MSB) << 32; ++ } ++#endif /* BCM_HAS_IEEE1588_SUPPORT */ ++ ++ if (len > TG3_RX_COPY_THRESH(tp)) { ++ int skb_size; ++ unsigned int frag_size; ++ ++ skb_size = tg3_alloc_rx_data(tp, tpr, opaque_key, ++ *post_ptr, &frag_size); ++ if (skb_size < 0) ++ goto drop_it; ++ ++ pci_unmap_single(tp->pdev, dma_addr, skb_size, ++ PCI_DMA_FROMDEVICE); ++ ++ /* Ensure that the update to the data happens ++ * after the usage of the old DMA mapping. ++ */ ++ smp_wmb(); ++ ++ ri->data = NULL; ++ ++#ifdef BCM_HAS_BUILD_SKB ++ skb = build_skb(data, frag_size); ++ if (!skb) { ++ tg3_frag_free(frag_size != 0, data); ++ goto drop_it_no_recycle; ++ } ++ skb_reserve(skb, TG3_RX_OFFSET(tp)); ++#endif ++ } else { ++ tg3_recycle_rx(tnapi, tpr, opaque_key, ++ desc_idx, *post_ptr); ++ ++ skb = netdev_alloc_skb(tp->dev, ++ len + TG3_RAW_IP_ALIGN); ++ if (skb == NULL) ++ goto drop_it_no_recycle; ++ ++ skb_reserve(skb, TG3_RAW_IP_ALIGN); ++ pci_dma_sync_single_for_cpu(tp->pdev, dma_addr, len, PCI_DMA_FROMDEVICE); ++ memcpy(skb->data, ++ data + TG3_RX_OFFSET(tp), ++ len); ++ pci_dma_sync_single_for_device(tp->pdev, dma_addr, len, PCI_DMA_FROMDEVICE); ++ } ++ ++ skb_put(skb, len); ++#ifdef BCM_HAS_IEEE1588_SUPPORT ++ if (tstamp) ++ tg3_hwclock_to_timestamp(tp, tstamp, ++ skb_hwtstamps(skb)); ++#endif /* BCM_HAS_IEEE1588_SUPPORT */ ++ ++ if ((tp->dev->features & NETIF_F_RXCSUM) && ++ (desc->type_flags & RXD_FLAG_TCPUDP_CSUM) && ++ (((desc->ip_tcp_csum & RXD_TCPCSUM_MASK) ++ >> RXD_TCPCSUM_SHIFT) == 0xffff)) ++ skb->ip_summed = CHECKSUM_UNNECESSARY; ++ else ++ skb_checksum_none_assert(skb); ++ ++#ifndef BCM_HAS_NEW_VLAN_INTERFACE ++ if (desc->type_flags & RXD_FLAG_VLAN) { ++ if (tp->rx_mode & RX_MODE_KEEP_VLAN_TAG) { ++ desc->type_flags &= ~RXD_FLAG_VLAN; ++ } else if (!tp->vlgrp) { ++ struct vlan_ethhdr *ve = (struct vlan_ethhdr *) ++ __skb_push(skb, VLAN_HLEN); ++ ++ memmove(ve, skb->data + VLAN_HLEN, ++ ETH_ALEN * 2); ++ ve->h_vlan_proto = htons(ETH_P_8021Q); ++ ve->h_vlan_TCI = htons(desc->err_vlan & RXD_VLAN_MASK); ++ ++ desc->type_flags &= ~RXD_FLAG_VLAN; ++ } ++ } ++#endif /* BCM_HAS_NEW_VLAN_INTERFACE */ ++ ++ skb->protocol = eth_type_trans(skb, tp->dev); ++ ++ if (len > (tp->dev->mtu + ETH_HLEN) && ++ skb->protocol != htons(ETH_P_8021Q)) { ++ dev_kfree_skb(skb); ++ goto drop_it_no_recycle; ++ } ++ ++#ifndef BCM_HAS_NEW_VLAN_INTERFACE ++ if (desc->type_flags & RXD_FLAG_VLAN) { ++ vlan_gro_receive(&tnapi->napi, tp->vlgrp, ++ desc->err_vlan & RXD_VLAN_MASK, skb); ++ } else ++#else ++ if (desc->type_flags & RXD_FLAG_VLAN && ++ !(tp->rx_mode & RX_MODE_KEEP_VLAN_TAG)) ++ __vlan_hwaccel_put_tag(skb, ++#ifdef BCM_HWACCEL_HAS_PROTO_ARG ++ htons(ETH_P_8021Q), ++#endif ++ desc->err_vlan & RXD_VLAN_MASK); ++#endif /* BCM_HAS_NEW_VLAN_INTERFACE */ ++ ++ napi_gro_receive(&tnapi->napi, skb); ++ ++#if (LINUX_VERSION_CODE < 0x02061D) /* 2.6.29 */ ++ tp->dev->last_rx = jiffies; ++#endif ++ received++; ++ budget--; ++ ++#ifdef TG3_VMWARE_NETQ_ENABLE ++ /* Update queue specific stats */ ++ tnapi->netq.stats.rx_packets_sw++; ++ tnapi->netq.stats.rx_bytes_sw += len; ++#endif ++ ++next_pkt: ++ (*post_ptr)++; ++ ++ if (unlikely(rx_std_posted >= tp->rx_std_max_post)) { ++ tpr->rx_std_prod_idx = std_prod_idx & ++ tp->rx_std_ring_mask; ++ tw32_rx_mbox(TG3_RX_STD_PROD_IDX_REG, ++ tpr->rx_std_prod_idx); ++ work_mask &= ~RXD_OPAQUE_RING_STD; ++ rx_std_posted = 0; ++ } ++next_pkt_nopost: ++ sw_idx++; ++ sw_idx &= tp->rx_ret_ring_mask; ++ ++ /* Refresh hw_idx to see if there is new work */ ++ if (sw_idx == hw_idx) { ++ hw_idx = *(tnapi->rx_rcb_prod_idx); ++ rmb(); ++ } ++ } ++ ++ /* ACK the status ring. */ ++ tnapi->rx_rcb_ptr = sw_idx; ++ tw32_rx_mbox(tnapi->consmbox, sw_idx); ++ ++ /* Refill RX ring(s). */ ++ if (!tg3_flag(tp, ENABLE_RSS)) { ++ /* Sync BD data before updating mailbox */ ++ wmb(); ++ ++ if (work_mask & RXD_OPAQUE_RING_STD) { ++ tpr->rx_std_prod_idx = std_prod_idx & ++ tp->rx_std_ring_mask; ++#ifdef TG3_VMWARE_NETQ_ENABLE ++ tw32_rx_mbox(tpr->rx_std_mbox, tpr->rx_std_prod_idx); ++#else ++ tw32_rx_mbox(TG3_RX_STD_PROD_IDX_REG, ++ tpr->rx_std_prod_idx); ++#endif ++ } ++ if (work_mask & RXD_OPAQUE_RING_JUMBO) { ++ tpr->rx_jmb_prod_idx = jmb_prod_idx & ++ tp->rx_jmb_ring_mask; ++#ifdef TG3_VMWARE_NETQ_ENABLE ++ tw32_rx_mbox(tpr->rx_jmb_mbox, tpr->rx_jmb_prod_idx); ++#else ++ tw32_rx_mbox(TG3_RX_JMB_PROD_IDX_REG, ++ tpr->rx_jmb_prod_idx); ++#endif ++ } ++ mmiowb(); ++ } else if (work_mask) { ++ /* rx_std_buffers[] and rx_jmb_buffers[] entries must be ++ * updated before the producer indices can be updated. ++ */ ++ smp_wmb(); ++ ++ tpr->rx_std_prod_idx = std_prod_idx & tp->rx_std_ring_mask; ++ tpr->rx_jmb_prod_idx = jmb_prod_idx & tp->rx_jmb_ring_mask; ++ ++ if (tnapi != &tp->napi[1]) { ++ tp->rx_refill = true; ++ napi_schedule_(tp->dev, &tp->napi[1].napi); ++ } ++ } ++ ++ return received; ++} ++ ++static void tg3_poll_link(struct tg3 *tp) ++{ ++ /* handle link change and other phy events */ ++ if (!(tg3_flag(tp, USE_LINKCHG_REG) || tg3_flag(tp, POLL_SERDES))) { ++ struct tg3_hw_status *sblk = tp->napi[0].hw_status; ++ ++ if (sblk->status & SD_STATUS_LINK_CHG) { ++ sblk->status = SD_STATUS_UPDATED | ++ (sblk->status & ~SD_STATUS_LINK_CHG); ++ spin_lock(&tp->lock); ++ if (tg3_flag(tp, USE_PHYLIB)) { ++ tw32_f(MAC_STATUS, ++ (MAC_STATUS_SYNC_CHANGED | ++ MAC_STATUS_CFG_CHANGED | ++ MAC_STATUS_MI_COMPLETION | ++ MAC_STATUS_LNKSTATE_CHANGED)); ++ udelay(40); ++ } else ++ tg3_setup_phy(tp, false); ++ spin_unlock(&tp->lock); ++ } ++ } ++} ++ ++static inline void tg3_reset_task_schedule(struct tg3 *tp) ++{ ++ if (!test_and_set_bit(TG3_FLAG_RESET_TASK_PENDING, tp->tg3_flags)) ++ schedule_work(&tp->reset_task); ++} ++ ++static inline void tg3_reset_task_cancel(struct tg3 *tp) ++{ ++#if (LINUX_VERSION_CODE >= 0x20616) || defined (__VMKLNX__) ++ cancel_work_sync(&tp->reset_task); ++#else ++ set_current_state(TASK_UNINTERRUPTIBLE); ++ schedule_timeout(1); ++#endif ++ tg3_flag_clear(tp, RESET_TASK_PENDING); ++ tg3_flag_clear(tp, TX_RECOVERY_PENDING); ++} ++ ++static void tg3_process_error(struct tg3 *tp) ++{ ++ u32 val; ++ bool real_error = false; ++ ++ if (tg3_flag(tp, ERROR_PROCESSED)) ++ return; ++ ++ /* Check Flow Attention register */ ++ val = tr32(HOSTCC_FLOW_ATTN); ++#ifdef TG3_VMWARE_NETQ_ENABLE ++ /* Shutting down NetQueues cause permissible RCB errors */ ++ val &= ~(HOSTCC_FLOW_ATTN_MBUF_LWM | ++ HOSTCC_FLOW_ATTN_RCB_MISCFG | ++ HOSTCC_FLOW_ATTN_RCV_BDI_ATTN); ++#endif ++ if (val & ~HOSTCC_FLOW_ATTN_MBUF_LWM) { ++ netdev_err(tp->dev, "FLOW Attention error. Resetting chip.\n"); ++ real_error = true; ++ } ++ ++ if (tr32(MSGINT_STATUS) & ~MSGINT_STATUS_MSI_REQ) { ++ netdev_err(tp->dev, "MSI Status error. Resetting chip.\n"); ++ real_error = true; ++ } ++ ++ if (tr32(RDMAC_STATUS) || tr32(WDMAC_STATUS)) { ++ netdev_err(tp->dev, "DMA Status error. Resetting chip.\n"); ++ real_error = true; ++ } ++ ++ if (!real_error) ++ return; ++ ++#if !defined(__VMKLNX__) ++ /* Encounterred real error */ ++ tp->recoverable_err++; ++ ++ /* Check if we received two recoverable error within 10 seconds, if so ++ * set the unrecoverable flag and move this port to close state ++ */ ++ if (time_before(jiffies, ++ tp->recoverable_err_jiffies + ++ tp->recoverable_err_interval)) ++ tp->unrecoverable_err++; ++ ++ tp->recoverable_err_jiffies = jiffies; ++#endif ++ ++ tg3_dump_state(tp); ++ ++ tg3_flag_set(tp, ERROR_PROCESSED); ++ tg3_reset_task_schedule(tp); ++} ++ ++static inline void tg3_send_ape_heartbeat(struct tg3 *tp, ++ unsigned long interval) ++{ ++ /* Check if hb interval has exceeded */ ++ if (!tg3_flag(tp, ENABLE_APE) || ++ time_before(jiffies, tp->ape_hb_jiffies + interval)) ++ return; ++ ++ tg3_ape_write32(tp, TG3_APE_HOST_HEARTBEAT_COUNT, tp->ape_hb++); ++ tp->ape_hb_jiffies = jiffies; ++ return; ++} ++ ++#ifdef TG3_NAPI ++ ++static int tg3_rx_prodring_xfer(struct tg3 *tp, ++ struct tg3_rx_prodring_set *dpr, ++ struct tg3_rx_prodring_set *spr) ++{ ++ u32 si, di, cpycnt, src_prod_idx; ++ int i, err = 0; ++ ++ while (1) { ++ src_prod_idx = spr->rx_std_prod_idx; ++ ++ /* Make sure updates to the rx_std_buffers[] entries and the ++ * standard producer index are seen in the correct order. ++ */ ++ smp_rmb(); ++ ++ if (spr->rx_std_cons_idx == src_prod_idx) ++ break; ++ ++ if (spr->rx_std_cons_idx < src_prod_idx) ++ cpycnt = src_prod_idx - spr->rx_std_cons_idx; ++ else ++ cpycnt = tp->rx_std_ring_mask + 1 - ++ spr->rx_std_cons_idx; ++ ++ cpycnt = min(cpycnt, ++ tp->rx_std_ring_mask + 1 - dpr->rx_std_prod_idx); ++ ++ si = spr->rx_std_cons_idx; ++ di = dpr->rx_std_prod_idx; ++ ++ for (i = di; i < di + cpycnt; i++) { ++ if (dpr->rx_std_buffers[i].data) { ++ cpycnt = i - di; ++ err = -ENOSPC; ++ break; ++ } ++ } ++ ++ if (!cpycnt) ++ break; ++ ++ /* Ensure that updates to the rx_std_buffers ring and the ++ * shadowed hardware producer ring from tg3_recycle_skb() are ++ * ordered correctly WRT the skb check above. ++ */ ++ smp_rmb(); ++ ++ memcpy(&dpr->rx_std_buffers[di], ++ &spr->rx_std_buffers[si], ++ cpycnt * sizeof(struct ring_info)); ++ ++ for (i = 0; i < cpycnt; i++, di++, si++) { ++ struct tg3_rx_buffer_desc *sbd, *dbd; ++ sbd = &spr->rx_std[si]; ++ dbd = &dpr->rx_std[di]; ++ dbd->addr_hi = sbd->addr_hi; ++ dbd->addr_lo = sbd->addr_lo; ++ } ++ ++ spr->rx_std_cons_idx = (spr->rx_std_cons_idx + cpycnt) & ++ tp->rx_std_ring_mask; ++ dpr->rx_std_prod_idx = (dpr->rx_std_prod_idx + cpycnt) & ++ tp->rx_std_ring_mask; ++ } ++ ++ while (1) { ++ src_prod_idx = spr->rx_jmb_prod_idx; ++ ++ /* Make sure updates to the rx_jmb_buffers[] entries and ++ * the jumbo producer index are seen in the correct order. ++ */ ++ smp_rmb(); ++ ++ if (spr->rx_jmb_cons_idx == src_prod_idx) ++ break; ++ ++ if (spr->rx_jmb_cons_idx < src_prod_idx) ++ cpycnt = src_prod_idx - spr->rx_jmb_cons_idx; ++ else ++ cpycnt = tp->rx_jmb_ring_mask + 1 - ++ spr->rx_jmb_cons_idx; ++ ++ cpycnt = min(cpycnt, ++ tp->rx_jmb_ring_mask + 1 - dpr->rx_jmb_prod_idx); ++ ++ si = spr->rx_jmb_cons_idx; ++ di = dpr->rx_jmb_prod_idx; ++ ++ for (i = di; i < di + cpycnt; i++) { ++ if (dpr->rx_jmb_buffers[i].data) { ++ cpycnt = i - di; ++ err = -ENOSPC; ++ break; ++ } ++ } ++ ++ if (!cpycnt) ++ break; ++ ++ /* Ensure that updates to the rx_jmb_buffers ring and the ++ * shadowed hardware producer ring from tg3_recycle_skb() are ++ * ordered correctly WRT the skb check above. ++ */ ++ smp_rmb(); ++ ++ memcpy(&dpr->rx_jmb_buffers[di], ++ &spr->rx_jmb_buffers[si], ++ cpycnt * sizeof(struct ring_info)); ++ ++ for (i = 0; i < cpycnt; i++, di++, si++) { ++ struct tg3_rx_buffer_desc *sbd, *dbd; ++ sbd = &spr->rx_jmb[si].std; ++ dbd = &dpr->rx_jmb[di].std; ++ dbd->addr_hi = sbd->addr_hi; ++ dbd->addr_lo = sbd->addr_lo; ++ } ++ ++ spr->rx_jmb_cons_idx = (spr->rx_jmb_cons_idx + cpycnt) & ++ tp->rx_jmb_ring_mask; ++ dpr->rx_jmb_prod_idx = (dpr->rx_jmb_prod_idx + cpycnt) & ++ tp->rx_jmb_ring_mask; ++ } ++ ++ return err; ++} ++ ++static int tg3_poll_work(struct tg3_napi *tnapi, int work_done, int budget) ++{ ++ struct tg3 *tp = tnapi->tp; ++ ++ /* run TX completion thread */ ++ if (tnapi->hw_status->idx[0].tx_consumer != tnapi->tx_cons) { ++ tg3_tx(tnapi); ++ if (unlikely(tg3_flag(tp, TX_RECOVERY_PENDING))) ++ return work_done; ++ } ++ ++ if (!tnapi->rx_rcb_prod_idx) ++ return work_done; ++ ++ /* run RX thread, within the bounds set by NAPI. ++ * All RX "locking" is done by ensuring outside ++ * code synchronizes with tg3->napi.poll() ++ */ ++ if (*(tnapi->rx_rcb_prod_idx) != tnapi->rx_rcb_ptr) ++ work_done += tg3_rx(tnapi, budget - work_done); ++ ++ if (tg3_flag(tp, ENABLE_RSS) && tnapi == &tp->napi[1]) { ++ struct tg3_rx_prodring_set *dpr = &tp->napi[0].prodring; ++ int i, err = 0; ++ u32 std_prod_idx = dpr->rx_std_prod_idx; ++ u32 jmb_prod_idx = dpr->rx_jmb_prod_idx; ++ ++ tp->rx_refill = false; ++ for (i = 1; i <= tp->rxq_cnt; i++) ++ err |= tg3_rx_prodring_xfer(tp, dpr, ++ &tp->napi[i].prodring); ++ ++ wmb(); ++ ++ if (std_prod_idx != dpr->rx_std_prod_idx) ++ tw32_rx_mbox(TG3_RX_STD_PROD_IDX_REG, ++ dpr->rx_std_prod_idx); ++ ++ if (jmb_prod_idx != dpr->rx_jmb_prod_idx) ++ tw32_rx_mbox(TG3_RX_JMB_PROD_IDX_REG, ++ dpr->rx_jmb_prod_idx); ++ ++ mmiowb(); ++ ++ if (err) ++ tw32_f(HOSTCC_MODE, tp->coal_now); ++ } ++ ++ return work_done; ++} ++ ++static int tg3_poll_msix(struct napi_struct *napi, int budget) ++{ ++ struct tg3_napi *tnapi = container_of(napi, struct tg3_napi, napi); ++ struct tg3 *tp = tnapi->tp; ++ int work_done = 0; ++ struct tg3_hw_status *sblk = tnapi->hw_status; ++ ++ while (1) { ++ work_done = tg3_poll_work(tnapi, work_done, budget); ++ ++ if (unlikely(tg3_flag(tp, TX_RECOVERY_PENDING))) ++ goto tx_recovery; ++ ++ if (unlikely(work_done >= budget)) ++ break; ++ ++ /* tp->last_tag is used in tg3_int_reenable() below ++ * to tell the hw how much work has been processed, ++ * so we must read it before checking for more work. ++ */ ++ tnapi->last_tag = sblk->status_tag; ++ tnapi->last_irq_tag = tnapi->last_tag; ++ rmb(); ++ ++ /* check for RX/TX work to do */ ++ if (likely(sblk->idx[0].tx_consumer == tnapi->tx_cons && ++ *(tnapi->rx_rcb_prod_idx) == tnapi->rx_rcb_ptr)) { ++ ++ /* This test here is not race free, but will reduce ++ * the number of interrupts by looping again. ++ */ ++ if (tnapi == &tp->napi[1] && tp->rx_refill) ++ continue; ++ ++ napi_complete_(tp->dev, napi); ++ /* Reenable interrupts. */ ++ tw32_mailbox(tnapi->int_mbox, tnapi->last_tag << 24); ++ ++ /* This test here is synchronized by napi_schedule() ++ * and napi_complete() to close the race condition. ++ */ ++ if (unlikely(tnapi == &tp->napi[1] && tp->rx_refill)) { ++ tw32(HOSTCC_MODE, tp->coalesce_mode | ++ HOSTCC_MODE_ENABLE | ++ tnapi->coal_now); ++ } ++ mmiowb(); ++ break; ++ } ++ } ++ ++ tg3_send_ape_heartbeat(tp, TG3_APE_HB_INTERVAL << 1); ++ return work_done; ++ ++tx_recovery: ++ /* work_done is guaranteed to be less than budget. */ ++ napi_complete_(tp->dev, napi); ++ tg3_reset_task_schedule(tp); ++ return work_done; ++} ++ ++static int tg3_poll(struct napi_struct *napi, int budget) ++{ ++ struct tg3_napi *tnapi = container_of(napi, struct tg3_napi, napi); ++ struct tg3 *tp = tnapi->tp; ++ int work_done = 0; ++ struct tg3_hw_status *sblk = tnapi->hw_status; ++ ++ while (1) { ++ if (sblk->status & SD_STATUS_ERROR) ++ tg3_process_error(tp); ++ ++ tg3_poll_link(tp); ++ ++ work_done = tg3_poll_work(tnapi, work_done, budget); ++ ++ if (unlikely(tg3_flag(tp, TX_RECOVERY_PENDING))) ++ goto tx_recovery; ++ ++ if (unlikely(work_done >= budget)) ++ break; ++ ++ if (tg3_flag(tp, TAGGED_STATUS)) { ++ /* tp->last_tag is used in tg3_int_reenable() below ++ * to tell the hw how much work has been processed, ++ * so we must read it before checking for more work. ++ */ ++ tnapi->last_tag = sblk->status_tag; ++ tnapi->last_irq_tag = tnapi->last_tag; ++ rmb(); ++ } else ++ sblk->status &= ~SD_STATUS_UPDATED; ++ ++ if (likely(!tg3_has_work(tnapi))) { ++ napi_complete_(tp->dev, napi); ++ tg3_int_reenable(tnapi); ++ break; ++ } ++ } ++ ++ tg3_send_ape_heartbeat(tp, TG3_APE_HB_INTERVAL << 1); ++ return work_done; ++ ++tx_recovery: ++ /* work_done is guaranteed to be less than budget. */ ++ napi_complete_(tp->dev, napi); ++ tg3_reset_task_schedule(tp); ++ return work_done; ++} ++ ++#else ++ ++static int tg3_poll(struct net_device *netdev, int *budget) ++{ ++ struct tg3 *tp = netdev_priv(netdev); ++ struct tg3_napi *tnapi = &tp->napi[0]; ++ struct tg3_hw_status *sblk = tnapi->hw_status; ++ int done; ++ ++ if (sblk->status & SD_STATUS_ERROR) ++ tg3_process_error(tp); ++ ++ tg3_poll_link(tp); ++ ++ /* run TX completion thread */ ++ if (sblk->idx[0].tx_consumer != tnapi->tx_cons) { ++ tg3_tx(tnapi); ++ if (unlikely(tg3_flag(tp, TX_RECOVERY_PENDING))) { ++ netif_rx_complete(netdev); ++ tg3_reset_task_schedule(tp); ++ return 0; ++ } ++ } ++ ++ /* run RX thread, within the bounds set by NAPI. ++ * All RX "locking" is done by ensuring outside ++ * code synchronizes with dev->poll() ++ */ ++ if (sblk->idx[0].rx_producer != tnapi->rx_rcb_ptr) { ++ int orig_budget = *budget; ++ int work_done; ++ ++ if (orig_budget > netdev->quota) ++ orig_budget = netdev->quota; ++ ++ work_done = tg3_rx(tnapi, orig_budget); ++ ++ *budget -= work_done; ++ netdev->quota -= work_done; ++ } ++ ++ if (tg3_flag(tp, TAGGED_STATUS)) { ++ tnapi->last_tag = sblk->status_tag; ++ rmb(); ++ } else ++ sblk->status &= ~SD_STATUS_UPDATED; ++ ++ /* if no more work, tell net stack and NIC we're done */ ++ done = !tg3_has_work(tnapi); ++ if (done) { ++ netif_rx_complete(netdev); ++ tg3_int_reenable(tnapi); ++ } ++ ++ return (done ? 0 : 1); ++} ++ ++#endif /* TG3_NAPI */ ++ ++static void tg3_napi_disable(struct tg3 *tp) ++{ ++#ifdef TG3_NAPI ++ int i; ++ ++ for (i = tp->irq_cnt - 1; i >= 0; i--) ++ napi_disable(&tp->napi[i].napi); ++#else ++ netif_poll_disable(tp->dev); ++#endif ++} ++ ++static void tg3_napi_enable(struct tg3 *tp) ++{ ++#ifdef TG3_NAPI ++ int i; ++ ++ for (i = 0; i < tp->irq_cnt; i++) ++ napi_enable(&tp->napi[i].napi); ++#else ++ netif_poll_enable(tp->dev); ++#endif ++} ++ ++static void tg3_napi_init(struct tg3 *tp) ++{ ++#ifdef TG3_NAPI ++ int i; ++ ++ netif_napi_add(tp->dev, &tp->napi[0].napi, tg3_poll, 64); ++ for (i = 1; i < tp->irq_cnt; i++) ++ netif_napi_add(tp->dev, &tp->napi[i].napi, tg3_poll_msix, 64); ++#else ++ tp->dev->poll = tg3_poll; ++ tp->dev->weight = 64; ++#endif ++} ++ ++static void tg3_napi_fini(struct tg3 *tp) ++{ ++#ifdef TG3_NAPI ++ int i; ++ ++ for (i = 0; i < tp->irq_cnt; i++) ++ netif_napi_del(&tp->napi[i].napi); ++#endif ++} ++ ++static inline void tg3_netif_stop(struct tg3 *tp) ++{ ++ tp->dev->trans_start = jiffies; /* prevent tx timeout */ ++ tg3_napi_disable(tp); ++ netif_carrier_off(tp->dev); /* prevent spurious tx timeout */ ++ netif_tx_disable(tp->dev); ++} ++ ++/* tp->lock must be held */ ++static inline void tg3_netif_start(struct tg3 *tp) ++{ ++ tg3_ptp_resume(tp); ++ ++ /* NOTE: unconditional netif_tx_wake_all_queues is only ++ * appropriate so long as all callers are assured to ++ * have free tx slots (such as after tg3_init_hw) ++ */ ++ netif_tx_wake_all_queues(tp->dev); ++ ++ if (tp->link_up) ++ netif_carrier_on(tp->dev); ++ ++ tg3_napi_enable(tp); ++ tp->napi[0].hw_status->status |= SD_STATUS_UPDATED; ++ tg3_enable_ints(tp); ++} ++ ++static void tg3_irq_quiesce(struct tg3 *tp) ++{ ++#if (LINUX_VERSION_CODE >= 0x2051c) ++ int i; ++#endif ++ ++ BUG_ON(tp->irq_sync); ++ ++ tp->irq_sync = 1; ++ smp_mb(); ++ ++#if (LINUX_VERSION_CODE >= 0x2051c) ++ for (i = 0; i < tp->irq_cnt; i++) ++ synchronize_irq(tp->napi[i].irq_vec); ++#else ++ synchronize_irq(); ++#endif ++} ++ ++/* Fully shutdown all tg3 driver activity elsewhere in the system. ++ * If irq_sync is non-zero, then the IRQ handler must be synchronized ++ * with as well. Most of the time, this is not necessary except when ++ * shutting down the device. ++ */ ++static inline void tg3_full_lock(struct tg3 *tp, int irq_sync) ++{ ++ spin_lock_bh(&tp->lock); ++ if (irq_sync) ++ tg3_irq_quiesce(tp); ++} ++ ++static inline void tg3_full_unlock(struct tg3 *tp) ++{ ++ spin_unlock_bh(&tp->lock); ++} ++ ++/* One-shot MSI handler - Chip automatically disables interrupt ++ * after sending MSI so driver doesn't have to do it. ++ */ ++#ifdef BCM_HAS_NEW_IRQ_SIG ++static irqreturn_t tg3_msi_1shot(int irq, void *dev_id) ++#else ++static irqreturn_t tg3_msi_1shot(int irq, void *dev_id, struct pt_regs *regs) ++#endif ++{ ++ struct tg3_napi *tnapi = dev_id; ++ struct tg3 *tp = tnapi->tp; ++ ++ prefetch(tnapi->hw_status); ++ if (tnapi->rx_rcb) ++ prefetch(&tnapi->rx_rcb[tnapi->rx_rcb_ptr]); ++ ++ if (likely(!tg3_irq_sync(tp))) ++ napi_schedule_(tp->dev, &tnapi->napi); ++ ++ return IRQ_HANDLED; ++} ++ ++/* MSI ISR - No need to check for interrupt sharing and no need to ++ * flush status block and interrupt mailbox. PCI ordering rules ++ * guarantee that MSI will arrive after the status block. ++ */ ++#ifdef BCM_HAS_NEW_IRQ_SIG ++static irqreturn_t tg3_msi(int irq, void *dev_id) ++#else ++static irqreturn_t tg3_msi(int irq, void *dev_id, struct pt_regs *regs) ++#endif ++{ ++ struct tg3_napi *tnapi = dev_id; ++ struct tg3 *tp = tnapi->tp; ++ ++ prefetch(tnapi->hw_status); ++ if (tnapi->rx_rcb) ++ prefetch(&tnapi->rx_rcb[tnapi->rx_rcb_ptr]); ++ /* ++ * Writing any value to intr-mbox-0 clears PCI INTA# and ++ * chip-internal interrupt pending events. ++ * Writing non-zero to intr-mbox-0 additional tells the ++ * NIC to stop sending us irqs, engaging "in-intr-handler" ++ * event coalescing. ++ */ ++ tw32_mailbox(tnapi->int_mbox, 0x00000001); ++ if (likely(!tg3_irq_sync(tp))) ++ napi_schedule_(tp->dev, &tnapi->napi); ++ ++ return IRQ_RETVAL(1); ++} ++ ++#ifdef BCM_HAS_NEW_IRQ_SIG ++static irqreturn_t tg3_interrupt(int irq, void *dev_id) ++#else ++static irqreturn_t tg3_interrupt(int irq, void *dev_id, struct pt_regs *regs) ++#endif ++{ ++ struct tg3_napi *tnapi = dev_id; ++ struct tg3 *tp = tnapi->tp; ++ struct tg3_hw_status *sblk = tnapi->hw_status; ++ unsigned int handled = 1; ++ ++ /* In INTx mode, it is possible for the interrupt to arrive at ++ * the CPU before the status block posted prior to the interrupt. ++ * Reading the PCI State register will confirm whether the ++ * interrupt is ours and will flush the status block. ++ */ ++ if (unlikely(!(sblk->status & SD_STATUS_UPDATED))) { ++ if (tg3_flag(tp, CHIP_RESETTING) || ++ (tr32(TG3PCI_PCISTATE) & PCISTATE_INT_NOT_ACTIVE)) { ++ handled = 0; ++ goto out; ++ } ++ } ++ ++ /* ++ * Writing any value to intr-mbox-0 clears PCI INTA# and ++ * chip-internal interrupt pending events. ++ * Writing non-zero to intr-mbox-0 additional tells the ++ * NIC to stop sending us irqs, engaging "in-intr-handler" ++ * event coalescing. ++ * ++ * Flush the mailbox to de-assert the IRQ immediately to prevent ++ * spurious interrupts. The flush impacts performance but ++ * excessive spurious interrupts can be worse in some cases. ++ */ ++ tw32_mailbox_f(MAILBOX_INTERRUPT_0 + TG3_64BIT_REG_LOW, 0x00000001); ++ if (tg3_irq_sync(tp)) ++ goto out; ++ sblk->status &= ~SD_STATUS_UPDATED; ++ if (likely(tg3_has_work(tnapi))) { ++ prefetch(&tnapi->rx_rcb[tnapi->rx_rcb_ptr]); ++ napi_schedule_(tp->dev, &tnapi->napi); ++ } else { ++ /* No work, shared interrupt perhaps? re-enable ++ * interrupts, and flush that PCI write ++ */ ++ tw32_mailbox_f(MAILBOX_INTERRUPT_0 + TG3_64BIT_REG_LOW, ++ 0x00000000); ++ } ++out: ++ return IRQ_RETVAL(handled); ++} ++ ++#ifdef BCM_HAS_NEW_IRQ_SIG ++static irqreturn_t tg3_interrupt_tagged(int irq, void *dev_id) ++#else ++static irqreturn_t tg3_interrupt_tagged(int irq, void *dev_id, struct pt_regs *regs) ++#endif ++{ ++ struct tg3_napi *tnapi = dev_id; ++ struct tg3 *tp = tnapi->tp; ++ struct tg3_hw_status *sblk = tnapi->hw_status; ++ unsigned int handled = 1; ++ ++ /* In INTx mode, it is possible for the interrupt to arrive at ++ * the CPU before the status block posted prior to the interrupt. ++ * Reading the PCI State register will confirm whether the ++ * interrupt is ours and will flush the status block. ++ */ ++ if (unlikely(sblk->status_tag == tnapi->last_irq_tag)) { ++ if (tg3_flag(tp, CHIP_RESETTING) || ++ (tr32(TG3PCI_PCISTATE) & PCISTATE_INT_NOT_ACTIVE)) { ++ handled = 0; ++ goto out; ++ } ++ } ++ ++ /* ++ * writing any value to intr-mbox-0 clears PCI INTA# and ++ * chip-internal interrupt pending events. ++ * writing non-zero to intr-mbox-0 additional tells the ++ * NIC to stop sending us irqs, engaging "in-intr-handler" ++ * event coalescing. ++ * ++ * Flush the mailbox to de-assert the IRQ immediately to prevent ++ * spurious interrupts. The flush impacts performance but ++ * excessive spurious interrupts can be worse in some cases. ++ */ ++ tw32_mailbox_f(MAILBOX_INTERRUPT_0 + TG3_64BIT_REG_LOW, 0x00000001); ++ ++ /* ++ * In a shared interrupt configuration, sometimes other devices' ++ * interrupts will scream. We record the current status tag here ++ * so that the above check can report that the screaming interrupts ++ * are unhandled. Eventually they will be silenced. ++ */ ++ tnapi->last_irq_tag = sblk->status_tag; ++ ++ if (tg3_irq_sync(tp)) ++ goto out; ++ ++ prefetch(&tnapi->rx_rcb[tnapi->rx_rcb_ptr]); ++ ++ napi_schedule_(tp->dev, &tnapi->napi); ++ ++out: ++ return IRQ_RETVAL(handled); ++} ++ ++/* ISR for interrupt test */ ++#ifdef BCM_HAS_NEW_IRQ_SIG ++static irqreturn_t tg3_test_isr(int irq, void *dev_id) ++#else ++static irqreturn_t tg3_test_isr(int irq, void *dev_id, struct pt_regs *regs) ++#endif ++{ ++ struct tg3_napi *tnapi = dev_id; ++ struct tg3 *tp = tnapi->tp; ++ struct tg3_hw_status *sblk = tnapi->hw_status; ++ ++ if ((sblk->status & SD_STATUS_UPDATED) || ++ !(tr32(TG3PCI_PCISTATE) & PCISTATE_INT_NOT_ACTIVE)) { ++ tg3_disable_ints(tp); ++ return IRQ_RETVAL(1); ++ } ++ return IRQ_RETVAL(0); ++} ++ ++#ifdef CONFIG_NET_POLL_CONTROLLER ++static void tg3_poll_controller(struct net_device *dev) ++{ ++#ifdef BCM_HAS_NEW_IRQ_SIG ++ int i; ++#endif ++ struct tg3 *tp = netdev_priv(dev); ++ ++ if (tg3_irq_sync(tp)) ++ return; ++ ++#if defined(BCM_HAS_NETDUMP_MODE) && (LINUX_VERSION_CODE < 0x20600) ++ if (netdump_mode) { ++ tg3_interrupt(tp->pdev->irq, dev, NULL); ++ if (dev->poll_list.prev) { ++ int budget = 64; ++ ++ tg3_poll(dev, &budget); ++ } ++ } ++ else ++#endif ++#ifdef BCM_HAS_NEW_IRQ_SIG ++ for (i = 0; i < tp->irq_cnt; i++) ++ tg3_interrupt(tp->napi[i].irq_vec, &tp->napi[i]); ++#else ++ tg3_interrupt(tp->pdev->irq, dev, NULL); ++#endif ++} ++#endif ++ ++static void tg3_tx_timeout(struct net_device *dev) ++{ ++ struct tg3 *tp = netdev_priv(dev); ++ ++ if (netif_msg_tx_err(tp)) { ++ netdev_err(dev, "transmit timed out, resetting\n"); ++ tg3_dump_state(tp); ++#if defined(__VMKLNX__) ++ if (psod_on_tx_timeout) { ++ msleep(100); ++ BUG_ON(1); ++ return; ++ } ++#endif ++ } ++ ++ tg3_reset_task_schedule(tp); ++} ++ ++/* Test for DMA buffers crossing any 4GB boundaries: 4G, 8G, etc */ ++static inline int tg3_4g_overflow_test(dma_addr_t mapping, int len) ++{ ++ u32 base = (u32) mapping & 0xffffffff; ++ ++ return (base + len + 8 < base); ++} ++ ++/* Test for TSO DMA buffers that cross into regions which are within MSS bytes ++ * of any 4GB boundaries: 4G, 8G, etc ++ */ ++static inline int tg3_4g_tso_overflow_test(struct tg3 *tp, dma_addr_t mapping, ++ u32 len, u32 mss) ++{ ++ if (tg3_asic_rev(tp) == ASIC_REV_5762 && mss) { ++ u32 base = (u32) mapping & 0xffffffff; ++ ++ return ((base + len + (mss & 0x3fff)) < base); ++ } ++ return 0; ++} ++ ++/* Test for DMA addresses > 40-bit */ ++static inline int tg3_40bit_overflow_test(struct tg3 *tp, dma_addr_t mapping, ++ int len) ++{ ++#if defined(CONFIG_HIGHMEM) && (BITS_PER_LONG == 64) ++ if (tg3_flag(tp, 40BIT_DMA_BUG)) ++ return ((u64) mapping + len) > DMA_BIT_MASK(40); ++ return 0; ++#else ++ return 0; ++#endif ++} ++ ++static inline void tg3_tx_set_bd(struct tg3_tx_buffer_desc *txbd, ++ dma_addr_t mapping, u32 len, u32 flags, ++ u32 mss, u32 vlan) ++{ ++ txbd->addr_hi = ((u64) mapping >> 32); ++ txbd->addr_lo = ((u64) mapping & 0xffffffff); ++ txbd->len_flags = (len << TXD_LEN_SHIFT) | (flags & 0x0000ffff); ++ txbd->vlan_tag = (mss << TXD_MSS_SHIFT) | (vlan << TXD_VLAN_TAG_SHIFT); ++} ++ ++static bool tg3_tx_frag_set(struct tg3_napi *tnapi, u32 *entry, u32 *budget, ++ dma_addr_t map, u32 len, u32 flags, ++ u32 mss, u32 vlan) ++{ ++ struct tg3 *tp = tnapi->tp; ++ bool hwbug = false; ++ u32 dma_limit = tp->dma_limit; ++ ++ if (tg3_flag(tp, SHORT_DMA_BUG) && len <= 8) ++ hwbug = true; ++ ++ if (tg3_4g_overflow_test(map, len)) { ++ tp->dma_4g_cross++; ++ hwbug = true; ++ } ++ ++ if (tg3_4g_tso_overflow_test(tp, map, len, mss)) ++ hwbug = true; ++ ++ if (tg3_40bit_overflow_test(tp, map, len)) ++ hwbug = true; ++ ++ if (dma_limit) { ++ u32 prvidx = *entry; ++ u32 tmp_flag = flags & ~TXD_FLAG_END; ++ while (len > dma_limit && *budget) { ++ u32 frag_len = dma_limit; ++ len -= dma_limit; ++ ++ /* Avoid the 8byte DMA problem */ ++ if (len <= 8) { ++ len += dma_limit / 2; ++ frag_len = dma_limit / 2; ++ } ++ ++ tnapi->tx_buffers[*entry].fragmented = true; ++ ++ tg3_tx_set_bd(&tnapi->tx_ring[*entry], map, ++ frag_len, tmp_flag, mss, vlan); ++ *budget -= 1; ++ prvidx = *entry; ++ *entry = NEXT_TX(*entry); ++ ++ map += frag_len; ++ } ++ ++ if (len) { ++ if (*budget) { ++ tg3_tx_set_bd(&tnapi->tx_ring[*entry], map, ++ len, flags, mss, vlan); ++ *budget -= 1; ++ *entry = NEXT_TX(*entry); ++ } else { ++ hwbug = true; ++ tnapi->tx_buffers[prvidx].fragmented = false; ++ } ++ } ++ } else { ++ tg3_tx_set_bd(&tnapi->tx_ring[*entry], map, ++ len, flags, mss, vlan); ++ *entry = NEXT_TX(*entry); ++ } ++ ++ return hwbug; ++} ++ ++static void tg3_tx_skb_unmap(struct tg3_napi *tnapi, u32 entry, int last) ++{ ++ int i; ++ struct sk_buff *skb; ++ struct tg3_tx_ring_info *txb = &tnapi->tx_buffers[entry]; ++ ++ skb = txb->skb; ++ txb->skb = NULL; ++ ++ pci_unmap_single(tnapi->tp->pdev, ++ dma_unmap_addr(txb, mapping), ++ skb_headlen(skb), ++ PCI_DMA_TODEVICE); ++ ++ while (txb->fragmented) { ++ txb->fragmented = false; ++ entry = NEXT_TX(entry); ++ txb = &tnapi->tx_buffers[entry]; ++ } ++ ++ for (i = 0; i <= last; i++) { ++ const skb_frag_t *frag = &skb_shinfo(skb)->frags[i]; ++ ++ entry = NEXT_TX(entry); ++ txb = &tnapi->tx_buffers[entry]; ++ ++ pci_unmap_page(tnapi->tp->pdev, ++ dma_unmap_addr(txb, mapping), ++ skb_frag_size(frag), PCI_DMA_TODEVICE); ++ ++ while (txb->fragmented) { ++ txb->fragmented = false; ++ entry = NEXT_TX(entry); ++ txb = &tnapi->tx_buffers[entry]; ++ } ++ } ++} ++ ++/* Workaround 4GB and 40-bit hardware DMA bugs. */ ++static int tigon3_dma_hwbug_workaround(struct tg3_napi *tnapi, ++ struct sk_buff **pskb, ++ u32 *entry, u32 *budget, ++ u32 base_flags, u32 mss, u32 vlan) ++{ ++ struct tg3 *tp = tnapi->tp; ++ struct sk_buff *new_skb, *skb = *pskb; ++ dma_addr_t new_addr = 0; ++ int ret = 0; ++ ++ if (tg3_asic_rev(tp) != ASIC_REV_5701) ++ new_skb = skb_copy(skb, GFP_ATOMIC); ++ else { ++ int more_headroom = 4 - ((unsigned long)skb->data & 3); ++ ++ new_skb = skb_copy_expand(skb, ++ skb_headroom(skb) + more_headroom, ++ skb_tailroom(skb), GFP_ATOMIC); ++ } ++ ++ if (!new_skb) { ++ ret = -1; ++ } else { ++ /* New SKB is guaranteed to be linear. */ ++ new_addr = pci_map_single(tp->pdev, new_skb->data, new_skb->len, ++ PCI_DMA_TODEVICE); ++ /* Make sure the mapping succeeded */ ++ if (pci_dma_mapping_error_(tp->pdev, new_addr)) { ++ dev_kfree_skb(new_skb); ++ ret = -1; ++ } else { ++ u32 save_entry = *entry; ++ ++ base_flags |= TXD_FLAG_END; ++ ++ tnapi->tx_buffers[*entry].skb = new_skb; ++ dma_unmap_addr_set(&tnapi->tx_buffers[*entry], ++ mapping, new_addr); ++ ++ if (tg3_tx_frag_set(tnapi, entry, budget, new_addr, ++ new_skb->len, base_flags, ++ mss, vlan)) { ++ tg3_tx_skb_unmap(tnapi, save_entry, -1); ++ dev_kfree_skb(new_skb); ++ ret = -1; ++ } ++ } ++ } ++ ++ dev_kfree_skb(skb); ++ *pskb = new_skb; ++ return ret; ++} ++ ++#if TG3_TSO_SUPPORT != 0 ++static netdev_tx_t tg3_start_xmit(struct sk_buff *, struct net_device *); ++ ++/* Use GSO to workaround a rare TSO bug that may be triggered when the ++ * TSO header is greater than 80 bytes. ++ */ ++static netdev_tx_t tg3_tso_bug(struct tg3 *tp, struct tg3_napi *tnapi, ++ struct netdev_queue *txq, struct sk_buff *skb) ++{ ++ struct sk_buff *segs, *nskb; ++ u32 frag_cnt_est = skb_shinfo(skb)->gso_segs * 3; ++ ++ /* Estimate the number of fragments in the worst case */ ++ if (unlikely(tg3_tx_avail(tnapi) <= frag_cnt_est)) { ++ netif_tx_stop_queue(txq); ++ ++ /* netif_tx_stop_queue() must be done before checking ++ * checking tx index in tg3_tx_avail() below, because in ++ * tg3_tx(), we update tx index before checking for ++ * netif_tx_queue_stopped(). ++ */ ++ smp_mb(); ++ if (tg3_tx_avail(tnapi) <= frag_cnt_est) ++ return NETDEV_TX_BUSY; ++ ++ netif_tx_wake_queue(txq); ++ } ++ ++ segs = skb_gso_segment(skb, tp->dev->features & ++ ~(NETIF_F_TSO | NETIF_F_TSO6)); ++ /* VMWare always returns NULL. Linux will only return NULL ++ * when no segments are required. ++ */ ++ if (!segs || IS_ERR(segs)) ++ goto tg3_tso_bug_end; ++ ++ do { ++ nskb = segs; ++ segs = segs->next; ++ nskb->next = NULL; ++ tg3_start_xmit(nskb, tp->dev); ++ } while (segs); ++ ++tg3_tso_bug_end: ++ dev_kfree_skb(skb); ++ ++ return NETDEV_TX_OK; ++} ++#endif /* TG3_TSO_SUPPORT */ ++ ++/* hard_start_xmit for devices that have the 4G bug and/or 40-bit bug and ++ * support TG3_FLAG_HW_TSO_1 or firmware TSO only. ++ */ ++static netdev_tx_t tg3_start_xmit(struct sk_buff *skb, struct net_device *dev) ++{ ++ struct tg3 *tp = netdev_priv(dev); ++ u32 len, entry, base_flags, mss, vlan = 0; ++ u32 budget; ++ int i = -1, would_hit_hwbug; ++ dma_addr_t mapping; ++ struct tg3_napi *tnapi; ++ struct netdev_queue *txq; ++ unsigned int last; ++ struct iphdr *iph = NULL; ++ struct tcphdr *tcph = NULL; ++ __sum16 tcp_csum = 0, ip_csum = 0; ++ __be16 ip_tot_len = 0; ++ ++ txq = netdev_get_tx_queue(dev, skb_get_queue_mapping(skb)); ++#if defined(__VMKLNX__) && (VMWARE_ESX_DDK_VERSION < 50000) ++ /* For esx4.0/esx4.1u0-u2, the vmkernel doesn't check queue state ++ * before calling start_xmit(). So driver has to check it itself. ++ */ ++ if (unlikely(netif_tx_queue_stopped(txq))) ++ goto drop; ++#endif ++ tnapi = &tp->napi[skb_get_queue_mapping(skb)]; ++ if (tg3_flag(tp, ENABLE_TSS)) ++ tnapi++; ++ ++ budget = tg3_tx_avail(tnapi); ++ ++ /* We are running in BH disabled context with netif_tx_lock ++ * and TX reclaim runs via tp->napi.poll inside of a software ++ * interrupt. Furthermore, IRQ processing runs lockless so we have ++ * no IRQ context deadlocks to worry about either. Rejoice! ++ */ ++ if (unlikely(budget <= (skb_shinfo(skb)->nr_frags + 1))) { ++ if (!netif_tx_queue_stopped(txq)) { ++ netif_tx_stop_queue(txq); ++ ++ /* This is a hard error, log it. */ ++ netdev_err(dev, ++ "BUG! Tx Ring full when queue awake!\n"); ++ } ++ return NETDEV_TX_BUSY; ++ } ++ ++ entry = tnapi->tx_prod; ++ base_flags = 0; ++ if (skb->ip_summed == CHECKSUM_PARTIAL) ++ base_flags |= TXD_FLAG_TCPUDP_CSUM; ++ ++#if TG3_TSO_SUPPORT != 0 ++ mss = skb_shinfo(skb)->gso_size; ++ if (mss) { ++ u32 tcp_opt_len, hdr_len; ++ ++ if (skb_header_cloned(skb) && ++ pskb_expand_head(skb, 0, 0, GFP_ATOMIC)) ++ goto drop; ++ ++ iph = ip_hdr(skb); ++ tcp_opt_len = tcp_optlen(skb); ++ ++ hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb) - ETH_HLEN; ++ ++ if (!skb_is_gso_v6(skb)) { ++ if (unlikely((ETH_HLEN + hdr_len) > 80) && ++ tg3_flag(tp, TSO_BUG)) ++ return tg3_tso_bug(tp, tnapi, txq, skb); ++ ++ ip_csum = iph->check; ++ ip_tot_len = iph->tot_len; ++ iph->check = 0; ++ iph->tot_len = htons(mss + hdr_len); ++ } ++ ++ if (hdr_len + mss >= skb->len - ETH_HLEN) { ++ mss = 0; ++ goto abort_lso; ++ } ++ ++ base_flags |= (TXD_FLAG_CPU_PRE_DMA | ++ TXD_FLAG_CPU_POST_DMA); ++ ++ tcph = tcp_hdr(skb); ++ tcp_csum = tcph->check; ++ ++ if (tg3_flag(tp, HW_TSO_1) || ++ tg3_flag(tp, HW_TSO_2) || ++ tg3_flag(tp, HW_TSO_3)) { ++ tcph->check = 0; ++ base_flags &= ~TXD_FLAG_TCPUDP_CSUM; ++ } else { ++ tcph->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr, ++ 0, IPPROTO_TCP, 0); ++ } ++ ++ if (tg3_flag(tp, HW_TSO_3)) { ++ mss |= (hdr_len & 0xc) << 12; ++ if (hdr_len & 0x10) ++ base_flags |= 0x00000010; ++ base_flags |= (hdr_len & 0x3e0) << 5; ++ } else if (tg3_flag(tp, HW_TSO_2)) ++ mss |= hdr_len << 9; ++ else if (tg3_flag(tp, HW_TSO_1) || ++ tg3_asic_rev(tp) == ASIC_REV_5705) { ++ if (tcp_opt_len || iph->ihl > 5) { ++ int tsflags; ++ ++ tsflags = (iph->ihl - 5) + (tcp_opt_len >> 2); ++ mss |= (tsflags << 11); ++ } ++ } else { ++ if (tcp_opt_len || iph->ihl > 5) { ++ int tsflags; ++ ++ tsflags = (iph->ihl - 5) + (tcp_opt_len >> 2); ++ base_flags |= tsflags << 12; ++ } ++ } ++ } ++abort_lso: ++#else ++ mss = 0; ++#endif ++ ++ if (tg3_flag(tp, USE_JUMBO_BDFLAG) && ++ !mss && skb->len > VLAN_ETH_FRAME_LEN) ++ base_flags |= TXD_FLAG_JMB_PKT; ++ ++#ifdef BCM_KERNEL_SUPPORTS_8021Q ++ if (vlan_tx_tag_present(skb)) { ++ base_flags |= TXD_FLAG_VLAN; ++ vlan = vlan_tx_tag_get(skb); ++ } ++#endif ++ ++#ifdef BCM_KERNEL_SUPPORTS_TIMESTAMPING ++ if ((unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)) && ++ tg3_flag(tp, TX_TSTAMP_EN)) { ++ skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS; ++ base_flags |= TXD_FLAG_HWTSTAMP; ++ } ++#endif /* BCM_KERNEL_SUPPORTS_TIMESTAMPING */ ++ ++ len = skb_headlen(skb); ++ ++ mapping = pci_map_single(tp->pdev, skb->data, len, PCI_DMA_TODEVICE); ++ if (pci_dma_mapping_error_(tp->pdev, mapping)) ++ goto drop; ++ ++ ++ tnapi->tx_buffers[entry].skb = skb; ++ dma_unmap_addr_set(&tnapi->tx_buffers[entry], mapping, mapping); ++ ++ would_hit_hwbug = 0; ++ ++ if (tg3_flag(tp, 5701_DMA_BUG)) ++ would_hit_hwbug = 1; ++ ++ if (tg3_tx_frag_set(tnapi, &entry, &budget, mapping, len, base_flags | ++ ((skb_shinfo(skb)->nr_frags == 0) ? TXD_FLAG_END : 0), ++ mss, vlan)) { ++ would_hit_hwbug = 1; ++ } else if (skb_shinfo(skb)->nr_frags > 0) { ++ u32 tmp_mss = mss; ++ ++ if (!tg3_flag(tp, HW_TSO_1) && ++ !tg3_flag(tp, HW_TSO_2) && ++ !tg3_flag(tp, HW_TSO_3)) ++ tmp_mss = 0; ++ ++ /* Now loop through additional data ++ * fragments, and queue them. ++ */ ++ last = skb_shinfo(skb)->nr_frags - 1; ++ for (i = 0; i <= last; i++) { ++ skb_frag_t *frag = &skb_shinfo(skb)->frags[i]; ++ ++ len = skb_frag_size(frag); ++ mapping = skb_frag_dma_map(&tp->pdev->dev, frag, 0, ++ len, DMA_TO_DEVICE); ++ ++ tnapi->tx_buffers[entry].skb = NULL; ++ dma_unmap_addr_set(&tnapi->tx_buffers[entry], mapping, ++ mapping); ++ if (dma_mapping_error_(&tp->pdev->dev, mapping)) ++ goto dma_error; ++ ++ if (!budget || ++ tg3_tx_frag_set(tnapi, &entry, &budget, mapping, ++ len, base_flags | ++ ((i == last) ? TXD_FLAG_END : 0), ++ tmp_mss, vlan)) { ++ would_hit_hwbug = 1; ++ break; ++ } ++ } ++ } ++ ++ if (would_hit_hwbug) { ++ tg3_tx_skb_unmap(tnapi, tnapi->tx_prod, i); ++ ++#if !defined(__VMKLNX__) ++ if (mss) { ++ /* If it's a TSO packet, do GSO instead of ++ * allocating and copying to a large linear SKB. ++ */ ++ if (ip_tot_len) { ++ iph->check = ip_csum; ++ iph->tot_len = ip_tot_len; ++ } ++ tcph->check = tcp_csum; ++ return tg3_tso_bug(tp, tnapi, txq, skb); ++ } ++#endif ++ ++ /* If the workaround fails due to memory/mapping ++ * failure, silently drop this packet. ++ */ ++ entry = tnapi->tx_prod; ++ budget = tg3_tx_avail(tnapi); ++ if (tigon3_dma_hwbug_workaround(tnapi, &skb, &entry, &budget, ++ base_flags, mss, vlan)) ++ goto drop_nofree; ++ } ++ ++ skb_tx_timestamp(skb); ++ netdev_tx_sent_queue(txq, skb->len); ++ ++ /* Sync BD data before updating mailbox */ ++ wmb(); ++ ++ /* Packets are ready, update Tx producer idx local and on card. */ ++ tw32_tx_mbox(tnapi->prodmbox, entry); ++ ++ tnapi->tx_prod = entry; ++ if (unlikely(tg3_tx_avail(tnapi) <= (MAX_SKB_FRAGS + 1))) { ++ netif_tx_stop_queue(txq); ++ ++ /* netif_tx_stop_queue() must be done before checking ++ * checking tx index in tg3_tx_avail() below, because in ++ * tg3_tx(), we update tx index before checking for ++ * netif_tx_queue_stopped(). ++ */ ++ smp_mb(); ++ if (tg3_tx_avail(tnapi) > TG3_TX_WAKEUP_THRESH(tnapi)) ++ netif_tx_wake_queue(txq); ++ } ++ ++ mmiowb(); ++ ++ tg3_update_trans_start(dev); ++ ++ return NETDEV_TX_OK; ++ ++dma_error: ++ tg3_tx_skb_unmap(tnapi, tnapi->tx_prod, --i); ++ tnapi->tx_buffers[tnapi->tx_prod].skb = NULL; ++drop: ++ dev_kfree_skb(skb); ++drop_nofree: ++ tp->tx_dropped++; ++ return NETDEV_TX_OK; ++} ++ ++static void tg3_mac_loopback(struct tg3 *tp, bool enable) ++{ ++ if (enable) { ++ tp->mac_mode &= ~(MAC_MODE_HALF_DUPLEX | ++ MAC_MODE_PORT_MODE_MASK); ++ ++ tp->mac_mode |= MAC_MODE_PORT_INT_LPBACK; ++ ++ if (!tg3_flag(tp, 5705_PLUS)) ++ tp->mac_mode |= MAC_MODE_LINK_POLARITY; ++ ++ if (tp->phy_flags & TG3_PHYFLG_10_100_ONLY) ++ tp->mac_mode |= MAC_MODE_PORT_MODE_MII; ++ else ++ tp->mac_mode |= MAC_MODE_PORT_MODE_GMII; ++ } else { ++ tp->mac_mode &= ~MAC_MODE_PORT_INT_LPBACK; ++ ++ if (tg3_flag(tp, 5705_PLUS) || ++ (tp->phy_flags & TG3_PHYFLG_PHY_SERDES) || ++ tg3_asic_rev(tp) == ASIC_REV_5700) ++ tp->mac_mode &= ~MAC_MODE_LINK_POLARITY; ++ } ++ ++ tw32(MAC_MODE, tp->mac_mode); ++ udelay(40); ++} ++ ++static int tg3_phy_lpbk_set(struct tg3 *tp, u32 speed, bool extlpbk) ++{ ++ u32 val, bmcr, mac_mode, ptest = 0; ++ ++ tg3_phy_toggle_apd(tp, false); ++ tg3_phy_toggle_automdix(tp, false); ++ ++ if (extlpbk && tg3_phy_set_extloopbk(tp)) ++ return -EIO; ++ ++ bmcr = BMCR_FULLDPLX; ++ switch (speed) { ++ case SPEED_10: ++ break; ++ case SPEED_100: ++ bmcr |= BMCR_SPEED100; ++ break; ++ case SPEED_1000: ++ default: ++ if (tp->phy_flags & TG3_PHYFLG_IS_FET) { ++ speed = SPEED_100; ++ bmcr |= BMCR_SPEED100; ++ } else { ++ speed = SPEED_1000; ++ bmcr |= BMCR_SPEED1000; ++ } ++ } ++ ++ if (extlpbk) { ++ if (!(tp->phy_flags & TG3_PHYFLG_IS_FET)) { ++ tg3_readphy(tp, MII_CTRL1000, &val); ++ val |= CTL1000_AS_MASTER | ++ CTL1000_ENABLE_MASTER; ++ tg3_writephy(tp, MII_CTRL1000, val); ++ } else { ++ ptest = MII_TG3_FET_PTEST_TRIM_SEL | ++ MII_TG3_FET_PTEST_TRIM_2; ++ tg3_writephy(tp, MII_TG3_FET_PTEST, ptest); ++ } ++ } else ++ bmcr |= BMCR_LOOPBACK; ++ ++ tg3_writephy(tp, MII_BMCR, bmcr); ++ ++ /* The write needs to be flushed for the FETs */ ++ if (tp->phy_flags & TG3_PHYFLG_IS_FET) ++ tg3_readphy(tp, MII_BMCR, &bmcr); ++ ++ udelay(40); ++ ++ if ((tp->phy_flags & TG3_PHYFLG_IS_FET) && ++ tg3_asic_rev(tp) == ASIC_REV_5785) { ++ tg3_writephy(tp, MII_TG3_FET_PTEST, ptest | ++ MII_TG3_FET_PTEST_FRC_TX_LINK | ++ MII_TG3_FET_PTEST_FRC_TX_LOCK); ++ ++ /* The write needs to be flushed for the AC131 */ ++ tg3_readphy(tp, MII_TG3_FET_PTEST, &val); ++ } ++ ++ /* Reset to prevent losing 1st rx packet intermittently */ ++ if ((tp->phy_flags & TG3_PHYFLG_MII_SERDES) && ++ tg3_flag(tp, 5780_CLASS)) { ++ tw32_f(MAC_RX_MODE, RX_MODE_RESET); ++ udelay(10); ++ tw32_f(MAC_RX_MODE, tp->rx_mode); ++ } ++ ++ mac_mode = tp->mac_mode & ++ ~(MAC_MODE_PORT_MODE_MASK | MAC_MODE_HALF_DUPLEX); ++ if (speed == SPEED_1000) ++ mac_mode |= MAC_MODE_PORT_MODE_GMII; ++ else ++ mac_mode |= MAC_MODE_PORT_MODE_MII; ++ ++ if (tg3_asic_rev(tp) == ASIC_REV_5700) { ++ u32 masked_phy_id = tp->phy_id & TG3_PHY_ID_MASK; ++ ++ if (masked_phy_id == TG3_PHY_ID_BCM5401) ++ mac_mode &= ~MAC_MODE_LINK_POLARITY; ++ else if (masked_phy_id == TG3_PHY_ID_BCM5411) ++ mac_mode |= MAC_MODE_LINK_POLARITY; ++ ++ tg3_writephy(tp, MII_TG3_EXT_CTRL, ++ MII_TG3_EXT_CTRL_LNK3_LED_MODE); ++ } ++ ++ tw32(MAC_MODE, mac_mode); ++ udelay(40); ++ ++ return 0; ++} ++ ++#ifdef BCM_HAS_FIX_FEATURES ++static void tg3_set_loopback(struct net_device *dev, netdev_features_t features) ++{ ++ struct tg3 *tp = netdev_priv(dev); ++ ++ if (features & NETIF_F_LOOPBACK) { ++ if (tp->mac_mode & MAC_MODE_PORT_INT_LPBACK) ++ return; ++ ++ spin_lock_bh(&tp->lock); ++ tg3_mac_loopback(tp, true); ++ netif_carrier_on(tp->dev); ++ spin_unlock_bh(&tp->lock); ++ netdev_info(dev, "Internal MAC loopback mode enabled.\n"); ++ } else { ++ if (!(tp->mac_mode & MAC_MODE_PORT_INT_LPBACK)) ++ return; ++ ++ spin_lock_bh(&tp->lock); ++ tg3_mac_loopback(tp, false); ++ /* Force link status check */ ++ tg3_setup_phy(tp, true); ++ spin_unlock_bh(&tp->lock); ++ netdev_info(dev, "Internal MAC loopback mode disabled.\n"); ++ } ++} ++ ++#if defined(GET_NETDEV_OP_EXT) ++static u32 tg3_fix_features(struct net_device *dev, u32 features) ++#else ++static netdev_features_t tg3_fix_features(struct net_device *dev, ++ netdev_features_t features) ++#endif ++{ ++ struct tg3 *tp = netdev_priv(dev); ++ ++ if (dev->mtu > ETH_DATA_LEN && tg3_flag(tp, 5780_CLASS)) ++ features &= ~NETIF_F_ALL_TSO; ++ ++ return features; ++} ++ ++#if defined(GET_NETDEV_OP_EXT) ++static int tg3_set_features(struct net_device *dev, u32 features) ++#else ++static int tg3_set_features(struct net_device *dev, netdev_features_t features) ++#endif ++{ ++ netdev_features_t changed = dev->features ^ features; ++ ++ if ((changed & NETIF_F_LOOPBACK) && netif_running(dev)) ++ tg3_set_loopback(dev, features); ++ ++ return 0; ++} ++#endif /* BCM_HAS_FIX_FEATURES */ ++ ++static void tg3_rx_prodring_free(struct tg3 *tp, ++ struct tg3_rx_prodring_set *tpr) ++{ ++ int i; ++ ++#ifdef TG3_VMWARE_NETQ_ENABLE ++ if (tg3_flag(tp, ENABLE_RSS)) ++#endif ++ if (tpr != &tp->napi[0].prodring) { ++ for (i = tpr->rx_std_cons_idx; i != tpr->rx_std_prod_idx; ++ i = (i + 1) & tp->rx_std_ring_mask) ++ tg3_rx_data_free(tp, &tpr->rx_std_buffers[i], ++ tp->rx_pkt_map_sz); ++ ++ if (tg3_flag(tp, JUMBO_CAPABLE)) { ++ for (i = tpr->rx_jmb_cons_idx; ++ i != tpr->rx_jmb_prod_idx; ++ i = (i + 1) & tp->rx_jmb_ring_mask) { ++ tg3_rx_data_free(tp, &tpr->rx_jmb_buffers[i], ++ TG3_RX_JMB_MAP_SZ); ++ } ++ } ++ ++ return; ++ } ++ ++ for (i = 0; i <= tp->rx_std_ring_mask; i++) ++ tg3_rx_data_free(tp, &tpr->rx_std_buffers[i], ++ tp->rx_pkt_map_sz); ++ ++ if (tg3_flag(tp, JUMBO_CAPABLE) && !tg3_flag(tp, 5780_CLASS)) { ++ for (i = 0; i <= tp->rx_jmb_ring_mask; i++) ++ tg3_rx_data_free(tp, &tpr->rx_jmb_buffers[i], ++ TG3_RX_JMB_MAP_SZ); ++ } ++} ++ ++/* Initialize rx rings for packet processing. ++ * ++ * The chip has been shut down and the driver detached from ++ * the networking, so no interrupts or new tx packets will ++ * end up in the driver. tp->{tx,}lock are held and thus ++ * we may not sleep. ++ */ ++static int tg3_rx_prodring_alloc(struct tg3 *tp, ++ struct tg3_rx_prodring_set *tpr) ++{ ++ u32 i, rx_pkt_dma_sz; ++ ++ tpr->rx_std_cons_idx = 0; ++ tpr->rx_std_prod_idx = 0; ++ tpr->rx_jmb_cons_idx = 0; ++ tpr->rx_jmb_prod_idx = 0; ++ ++#ifdef TG3_VMWARE_NETQ_ENABLE ++ if (tg3_flag(tp, ENABLE_RSS)) ++#endif ++ if (tpr != &tp->napi[0].prodring) { ++ memset(&tpr->rx_std_buffers[0], 0, ++ TG3_RX_STD_BUFF_RING_SIZE(tp)); ++ if (tpr->rx_jmb_buffers) ++ memset(&tpr->rx_jmb_buffers[0], 0, ++ TG3_RX_JMB_BUFF_RING_SIZE(tp)); ++ goto done; ++ } ++ ++ /* Zero out all descriptors. */ ++ memset(tpr->rx_std, 0, TG3_RX_STD_RING_BYTES(tp)); ++ ++ rx_pkt_dma_sz = TG3_RX_STD_DMA_SZ; ++ if (tg3_flag(tp, 5780_CLASS) && ++ tp->dev->mtu > ETH_DATA_LEN) ++ rx_pkt_dma_sz = TG3_RX_JMB_DMA_SZ; ++ tp->rx_pkt_map_sz = TG3_RX_DMA_TO_MAP_SZ(rx_pkt_dma_sz); ++ ++ /* Initialize invariants of the rings, we only set this ++ * stuff once. This works because the card does not ++ * write into the rx buffer posting rings. ++ */ ++ for (i = 0; i <= tp->rx_std_ring_mask; i++) { ++ struct tg3_rx_buffer_desc *rxd; ++ ++ rxd = &tpr->rx_std[i]; ++ rxd->idx_len = rx_pkt_dma_sz << RXD_LEN_SHIFT; ++ rxd->type_flags = (RXD_FLAG_END << RXD_FLAGS_SHIFT); ++ rxd->opaque = (RXD_OPAQUE_RING_STD | ++ (i << RXD_OPAQUE_INDEX_SHIFT)); ++ } ++ ++ /* Now allocate fresh SKBs for each rx ring. */ ++ for (i = 0; i < tp->rx_pending; i++) { ++ unsigned int frag_size; ++ ++ if (tg3_alloc_rx_data(tp, tpr, RXD_OPAQUE_RING_STD, i, ++ &frag_size) < 0) { ++ netdev_warn(tp->dev, ++ "Using a smaller RX standard ring. Only " ++ "%d out of %d buffers were allocated " ++ "successfully\n", i, tp->rx_pending); ++ if (i == 0) ++ goto initfail; ++ tp->rx_pending = i; ++ break; ++ } ++ } ++ ++ if (!tg3_flag(tp, JUMBO_CAPABLE) || tg3_flag(tp, 5780_CLASS)) ++ goto done; ++ ++ memset(tpr->rx_jmb, 0, TG3_RX_JMB_RING_BYTES(tp)); ++ ++ if (!tg3_flag(tp, JUMBO_RING_ENABLE)) ++ goto done; ++ ++ for (i = 0; i <= tp->rx_jmb_ring_mask; i++) { ++ struct tg3_rx_buffer_desc *rxd; ++ ++ rxd = &tpr->rx_jmb[i].std; ++ rxd->idx_len = TG3_RX_JMB_DMA_SZ << RXD_LEN_SHIFT; ++ rxd->type_flags = (RXD_FLAG_END << RXD_FLAGS_SHIFT) | ++ RXD_FLAG_JUMBO; ++ rxd->opaque = (RXD_OPAQUE_RING_JUMBO | ++ (i << RXD_OPAQUE_INDEX_SHIFT)); ++ } ++ ++ for (i = 0; i < tp->rx_jumbo_pending; i++) { ++ unsigned int frag_size; ++ ++ if (tg3_alloc_rx_data(tp, tpr, RXD_OPAQUE_RING_JUMBO, i, ++ &frag_size) < 0) { ++ netdev_warn(tp->dev, ++ "Using a smaller RX jumbo ring. Only %d " ++ "out of %d buffers were allocated " ++ "successfully\n", i, tp->rx_jumbo_pending); ++ if (i == 0) ++ goto initfail; ++ tp->rx_jumbo_pending = i; ++ break; ++ } ++ } ++ ++done: ++ return 0; ++ ++initfail: ++ tg3_rx_prodring_free(tp, tpr); ++ return -ENOMEM; ++} ++ ++static void tg3_rx_prodring_fini(struct tg3 *tp, ++ struct tg3_rx_prodring_set *tpr) ++{ ++ kfree(tpr->rx_std_buffers); ++ tpr->rx_std_buffers = NULL; ++ kfree(tpr->rx_jmb_buffers); ++ tpr->rx_jmb_buffers = NULL; ++ if (tpr->rx_std) { ++ dma_free_coherent(&tp->pdev->dev, TG3_RX_STD_RING_BYTES(tp), ++ tpr->rx_std, tpr->rx_std_mapping); ++ tpr->rx_std = NULL; ++ } ++ if (tpr->rx_jmb) { ++ dma_free_coherent(&tp->pdev->dev, TG3_RX_JMB_RING_BYTES(tp), ++ tpr->rx_jmb, tpr->rx_jmb_mapping); ++ tpr->rx_jmb = NULL; ++ } ++} ++ ++static int tg3_rx_prodring_init(struct tg3 *tp, ++ struct tg3_rx_prodring_set *tpr) ++{ ++ tpr->rx_std_buffers = kzalloc(TG3_RX_STD_BUFF_RING_SIZE(tp), ++ GFP_KERNEL); ++ if (!tpr->rx_std_buffers) ++ return -ENOMEM; ++ ++ tpr->rx_std = dma_alloc_coherent(&tp->pdev->dev, ++ TG3_RX_STD_RING_BYTES(tp), ++ &tpr->rx_std_mapping, ++ GFP_KERNEL); ++ if (!tpr->rx_std) ++ goto err_out; ++ ++ if (tg3_flag(tp, JUMBO_CAPABLE) && !tg3_flag(tp, 5780_CLASS)) { ++ tpr->rx_jmb_buffers = kzalloc(TG3_RX_JMB_BUFF_RING_SIZE(tp), ++ GFP_KERNEL); ++ if (!tpr->rx_jmb_buffers) ++ goto err_out; ++ ++ tpr->rx_jmb = dma_alloc_coherent(&tp->pdev->dev, ++ TG3_RX_JMB_RING_BYTES(tp), ++ &tpr->rx_jmb_mapping, ++ GFP_KERNEL); ++ if (!tpr->rx_jmb) ++ goto err_out; ++ } ++ ++ return 0; ++ ++err_out: ++ tg3_rx_prodring_fini(tp, tpr); ++ return -ENOMEM; ++} ++ ++/* Free up pending packets in all rx/tx rings. ++ * ++ * The chip has been shut down and the driver detached from ++ * the networking, so no interrupts or new tx packets will ++ * end up in the driver. tp->{tx,}lock is not held and we are not ++ * in an interrupt context and thus may sleep. ++ */ ++static void tg3_free_rings(struct tg3 *tp) ++{ ++ int i, j; ++ ++ for (j = 0; j < tp->irq_cnt; j++) { ++ struct tg3_napi *tnapi = &tp->napi[j]; ++ ++ tg3_rx_prodring_free(tp, &tnapi->prodring); ++ ++ if (!tnapi->tx_buffers) ++ continue; ++ ++ for (i = 0; i < TG3_TX_RING_SIZE; i++) { ++ struct sk_buff *skb = tnapi->tx_buffers[i].skb; ++ ++ if (!skb) ++ continue; ++ ++ tg3_tx_skb_unmap(tnapi, i, ++ skb_shinfo(skb)->nr_frags - 1); ++ ++ dev_kfree_skb_any(skb); ++ } ++ netdev_tx_reset_queue(netdev_get_tx_queue(tp->dev, j)); ++ } ++} ++ ++/* Initialize tx/rx rings for packet processing. ++ * ++ * The chip has been shut down and the driver detached from ++ * the networking, so no interrupts or new tx packets will ++ * end up in the driver. tp->{tx,}lock are held and thus ++ * we may not sleep. ++ */ ++static int tg3_init_rings(struct tg3 *tp) ++{ ++ int i; ++ ++ /* Free up all the SKBs. */ ++ tg3_free_rings(tp); ++ ++ for (i = 0; i < tp->irq_cnt; i++) { ++ struct tg3_napi *tnapi = &tp->napi[i]; ++ ++ tnapi->last_tag = 0; ++ tnapi->last_irq_tag = 0; ++ tnapi->hw_status->status = 0; ++ tnapi->hw_status->status_tag = 0; ++ memset(tnapi->hw_status, 0, TG3_HW_STATUS_SIZE); ++ ++ tnapi->tx_prod = 0; ++ tnapi->tx_cons = 0; ++ if (tnapi->tx_ring) ++ memset(tnapi->tx_ring, 0, TG3_TX_RING_BYTES); ++ ++ tnapi->rx_rcb_ptr = 0; ++ if (tnapi->rx_rcb) ++ memset(tnapi->rx_rcb, 0, TG3_RX_RCB_RING_BYTES(tp)); ++ ++#ifdef TG3_VMWARE_NETQ_ENABLE ++ if (!i || (i && tg3_flag(tp, ENABLE_RSS))) ++#endif ++ if (tg3_rx_prodring_alloc(tp, &tnapi->prodring)) { ++ tg3_free_rings(tp); ++ return -ENOMEM; ++ } ++ } ++ ++ return 0; ++} ++ ++static void tg3_mem_tx_release(struct tg3 *tp) ++{ ++ int i; ++ ++ for (i = 0; i < tp->irq_max; i++) { ++ struct tg3_napi *tnapi = &tp->napi[i]; ++ ++ if (tnapi->tx_ring) { ++ dma_free_coherent(&tp->pdev->dev, TG3_TX_RING_BYTES, ++ tnapi->tx_ring, tnapi->tx_desc_mapping); ++ tnapi->tx_ring = NULL; ++ } ++ ++ kfree(tnapi->tx_buffers); ++ tnapi->tx_buffers = NULL; ++ } ++} ++ ++static int tg3_mem_tx_acquire(struct tg3 *tp) ++{ ++ int i; ++ struct tg3_napi *tnapi = &tp->napi[0]; ++ ++ /* If multivector TSS is enabled, vector 0 does not handle ++ * tx interrupts. Don't allocate any resources for it. ++ */ ++ if (tg3_flag(tp, ENABLE_TSS)) ++ tnapi++; ++ ++ for (i = 0; i < tp->txq_cnt; i++, tnapi++) { ++ tnapi->tx_buffers = kzalloc(sizeof(struct tg3_tx_ring_info) * ++ TG3_TX_RING_SIZE, GFP_KERNEL); ++ if (!tnapi->tx_buffers) ++ goto err_out; ++ ++ tnapi->tx_ring = dma_alloc_coherent(&tp->pdev->dev, ++ TG3_TX_RING_BYTES, ++ &tnapi->tx_desc_mapping, ++ GFP_KERNEL); ++ if (!tnapi->tx_ring) ++ goto err_out; ++ } ++ ++ return 0; ++ ++err_out: ++ tg3_mem_tx_release(tp); ++ return -ENOMEM; ++} ++ ++static void tg3_mem_rx_release(struct tg3 *tp) ++{ ++ int i; ++ ++ for (i = 0; i < tp->irq_max; i++) { ++ struct tg3_napi *tnapi = &tp->napi[i]; ++ ++ tg3_rx_prodring_fini(tp, &tnapi->prodring); ++ ++ if (!tnapi->rx_rcb) ++ continue; ++ ++ dma_free_coherent(&tp->pdev->dev, ++ TG3_RX_RCB_RING_BYTES(tp), ++ tnapi->rx_rcb, ++ tnapi->rx_rcb_mapping); ++ tnapi->rx_rcb = NULL; ++ } ++} ++ ++static int tg3_mem_rx_acquire(struct tg3 *tp) ++{ ++ unsigned int i, limit; ++ ++ limit = tp->rxq_cnt; ++ ++ /* If RSS is enabled, we need a (dummy) producer ring ++ * set on vector zero. This is the true hw prodring. ++ */ ++ if (tg3_flag(tp, ENABLE_RSS)) ++ limit++; ++ ++ for (i = 0; i < limit; i++) { ++ struct tg3_napi *tnapi = &tp->napi[i]; ++ ++ if (tg3_rx_prodring_init(tp, &tnapi->prodring)) ++ goto err_out; ++ ++ if (tg3_flag(tp, ENABLE_IOV)) ++ tnapi->srcprodring = &tnapi->prodring; ++ else ++ tnapi->srcprodring = &tp->napi[0].prodring; ++ ++ /* If multivector RSS is enabled, vector 0 ++ * does not handle rx or tx interrupts. ++ * Don't allocate any resources for it. ++ */ ++ if (!i && tg3_flag(tp, ENABLE_RSS)) ++ continue; ++ ++ tnapi->rx_rcb = dma_zalloc_coherent(&tp->pdev->dev, ++ TG3_RX_RCB_RING_BYTES(tp), ++ &tnapi->rx_rcb_mapping, ++ GFP_KERNEL); ++ if (!tnapi->rx_rcb) ++ goto err_out; ++ } ++ ++ return 0; ++ ++err_out: ++ tg3_mem_rx_release(tp); ++ return -ENOMEM; ++} ++ ++/* ++ * Must not be invoked with interrupt sources disabled and ++ * the hardware shutdown down. ++ */ ++static void tg3_free_consistent(struct tg3 *tp) ++{ ++ int i; ++ ++ for (i = 0; i < tp->irq_cnt; i++) { ++ struct tg3_napi *tnapi = &tp->napi[i]; ++ ++ if (tnapi->hw_status) { ++ dma_free_coherent(&tp->pdev->dev, TG3_HW_STATUS_SIZE, ++ tnapi->hw_status, ++ tnapi->status_mapping); ++ tnapi->hw_status = NULL; ++ } ++ } ++ ++ tg3_mem_rx_release(tp); ++ tg3_mem_tx_release(tp); ++ ++ if (tp->hw_stats) { ++ dma_free_coherent(&tp->pdev->dev, sizeof(struct tg3_hw_stats), ++ tp->hw_stats, tp->stats_mapping); ++ tp->hw_stats = NULL; ++ } ++} ++ ++/* ++ * Must not be invoked with interrupt sources disabled and ++ * the hardware shutdown down. Can sleep. ++ */ ++static int tg3_alloc_consistent(struct tg3 *tp) ++{ ++ int i; ++ ++ tp->hw_stats = dma_zalloc_coherent(&tp->pdev->dev, ++ sizeof(struct tg3_hw_stats), ++ &tp->stats_mapping, GFP_KERNEL); ++ if (!tp->hw_stats) ++ goto err_out; ++ ++ for (i = 0; i < tp->irq_cnt; i++) { ++ struct tg3_napi *tnapi = &tp->napi[i]; ++ struct tg3_hw_status *sblk; ++ ++ tnapi->hw_status = dma_zalloc_coherent(&tp->pdev->dev, ++ TG3_HW_STATUS_SIZE, ++ &tnapi->status_mapping, ++ GFP_KERNEL); ++ if (!tnapi->hw_status) ++ goto err_out; ++ ++ sblk = tnapi->hw_status; ++ ++ if (tg3_flag(tp, ENABLE_RSS)) { ++ volatile u16 *prodptr = NULL; ++ ++ /* When RSS is enabled, the status block format changes ++ * slightly. The "rx_jumbo_consumer", "reserved", ++ * and "rx_mini_consumer" members get mapped to the ++ * other three rx return ring producer indexes. ++ */ ++ switch (i) { ++ case 1: ++ prodptr = &sblk->idx[0].rx_producer; ++ break; ++ case 2: ++ prodptr = &sblk->rx_jumbo_consumer; ++ break; ++ case 3: ++ prodptr = &sblk->reserved; ++ break; ++ case 4: ++ prodptr = &sblk->rx_mini_consumer; ++ break; ++ } ++ tnapi->rx_rcb_prod_idx = prodptr; ++ } else ++ tnapi->rx_rcb_prod_idx = &sblk->idx[0].rx_producer; ++ } ++ ++ if (tg3_mem_tx_acquire(tp) || tg3_mem_rx_acquire(tp)) ++ goto err_out; ++ ++ return 0; ++ ++err_out: ++ tg3_free_consistent(tp); ++ return -ENOMEM; ++} ++ ++#define MAX_WAIT_CNT 1000 ++ ++/* To stop a block, clear the enable bit and poll till it ++ * clears. tp->lock is held. ++ */ ++static int tg3_stop_block(struct tg3 *tp, unsigned long ofs, u32 enable_bit, bool silent) ++{ ++ unsigned int i; ++ u32 val; ++ ++ if (tg3_flag(tp, 5705_PLUS)) { ++ switch (ofs) { ++ case RCVLSC_MODE: ++ case DMAC_MODE: ++ case MBFREE_MODE: ++ case BUFMGR_MODE: ++ case MEMARB_MODE: ++ /* We can't enable/disable these bits of the ++ * 5705/5750, just say success. ++ */ ++ return 0; ++ ++ default: ++ break; ++ } ++ } ++ ++ val = tr32(ofs); ++ val &= ~enable_bit; ++ tw32_f(ofs, val); ++ ++ for (i = 0; i < MAX_WAIT_CNT; i++) { ++ if (pci_channel_offline(tp->pdev)) { ++ dev_err(&tp->pdev->dev, ++ "tg3_stop_block device offline, " ++ "ofs=%lx enable_bit=%x\n", ++ ofs, enable_bit); ++ return -ENODEV; ++ } ++ ++ udelay(100); ++ val = tr32(ofs); ++ if ((val & enable_bit) == 0) ++ break; ++ } ++ ++ if (i == MAX_WAIT_CNT && !silent) { ++ dev_err(&tp->pdev->dev, ++ "tg3_stop_block timed out, ofs=%lx enable_bit=%x\n", ++ ofs, enable_bit); ++ return -ENODEV; ++ } ++ ++ return 0; ++} ++ ++/* tp->lock is held. */ ++static int tg3_abort_hw(struct tg3 *tp, bool silent) ++{ ++ int i, err; ++ ++ tg3_disable_ints(tp); ++ ++ if (pci_channel_offline(tp->pdev)) { ++ tp->rx_mode &= ~(RX_MODE_ENABLE | TX_MODE_ENABLE); ++ tp->mac_mode &= ~MAC_MODE_TDE_ENABLE; ++ err = -ENODEV; ++ goto err_no_dev; ++ } ++ ++ tp->rx_mode &= ~RX_MODE_ENABLE; ++ tw32_f(MAC_RX_MODE, tp->rx_mode); ++ udelay(10); ++ ++ err = tg3_stop_block(tp, RCVBDI_MODE, RCVBDI_MODE_ENABLE, silent); ++ err |= tg3_stop_block(tp, RCVLPC_MODE, RCVLPC_MODE_ENABLE, silent); ++ err |= tg3_stop_block(tp, RCVLSC_MODE, RCVLSC_MODE_ENABLE, silent); ++ err |= tg3_stop_block(tp, RCVDBDI_MODE, RCVDBDI_MODE_ENABLE, silent); ++ err |= tg3_stop_block(tp, RCVDCC_MODE, RCVDCC_MODE_ENABLE, silent); ++ err |= tg3_stop_block(tp, RCVCC_MODE, RCVCC_MODE_ENABLE, silent); ++ ++ err |= tg3_stop_block(tp, SNDBDS_MODE, SNDBDS_MODE_ENABLE, silent); ++ err |= tg3_stop_block(tp, SNDBDI_MODE, SNDBDI_MODE_ENABLE, silent); ++ err |= tg3_stop_block(tp, SNDDATAI_MODE, SNDDATAI_MODE_ENABLE, silent); ++ err |= tg3_stop_block(tp, RDMAC_MODE, RDMAC_MODE_ENABLE, silent); ++ err |= tg3_stop_block(tp, SNDDATAC_MODE, SNDDATAC_MODE_ENABLE, silent); ++ err |= tg3_stop_block(tp, DMAC_MODE, DMAC_MODE_ENABLE, silent); ++ err |= tg3_stop_block(tp, SNDBDC_MODE, SNDBDC_MODE_ENABLE, silent); ++ ++ tp->mac_mode &= ~MAC_MODE_TDE_ENABLE; ++ tw32_f(MAC_MODE, tp->mac_mode); ++ udelay(40); ++ ++ tp->tx_mode &= ~TX_MODE_ENABLE; ++ tw32_f(MAC_TX_MODE, tp->tx_mode); ++ ++ for (i = 0; i < MAX_WAIT_CNT; i++) { ++ udelay(100); ++ if (!(tr32(MAC_TX_MODE) & TX_MODE_ENABLE)) ++ break; ++ } ++ if (i >= MAX_WAIT_CNT) { ++ dev_err(&tp->pdev->dev, ++ "%s timed out, TX_MODE_ENABLE will not clear " ++ "MAC_TX_MODE=%08x\n", __func__, tr32(MAC_TX_MODE)); ++ err |= -ENODEV; ++ } ++ ++ err |= tg3_stop_block(tp, HOSTCC_MODE, HOSTCC_MODE_ENABLE, silent); ++ err |= tg3_stop_block(tp, WDMAC_MODE, WDMAC_MODE_ENABLE, silent); ++ err |= tg3_stop_block(tp, MBFREE_MODE, MBFREE_MODE_ENABLE, silent); ++ ++ tw32(FTQ_RESET, 0xffffffff); ++ tw32(FTQ_RESET, 0x00000000); ++ ++ err |= tg3_stop_block(tp, BUFMGR_MODE, BUFMGR_MODE_ENABLE, silent); ++ err |= tg3_stop_block(tp, MEMARB_MODE, MEMARB_MODE_ENABLE, silent); ++ ++err_no_dev: ++ for (i = 0; i < tp->irq_cnt; i++) { ++ struct tg3_napi *tnapi = &tp->napi[i]; ++ if (tnapi->hw_status) ++ memset(tnapi->hw_status, 0, TG3_HW_STATUS_SIZE); ++ } ++ ++ return err; ++} ++ ++/* Save PCI command register before chip reset */ ++static void tg3_save_pci_state(struct tg3 *tp) ++{ ++ pci_read_config_word(tp->pdev, PCI_COMMAND, &tp->pci_cmd); ++} ++ ++/* Restore PCI state after chip reset */ ++static void tg3_restore_pci_state(struct tg3 *tp) ++{ ++ u32 val; ++ ++ /* Re-enable indirect register accesses. */ ++ pci_write_config_dword(tp->pdev, TG3PCI_MISC_HOST_CTRL, ++ tp->misc_host_ctrl); ++ ++ /* Set MAX PCI retry to zero. */ ++ val = (PCISTATE_ROM_ENABLE | PCISTATE_ROM_RETRY_ENABLE); ++ if (tg3_chip_rev_id(tp) == CHIPREV_ID_5704_A0 && ++ tg3_flag(tp, PCIX_MODE)) ++ val |= PCISTATE_RETRY_SAME_DMA; ++ /* Allow reads and writes to the APE register and memory space. */ ++ if (tg3_flag(tp, ENABLE_APE)) ++ val |= PCISTATE_ALLOW_APE_CTLSPC_WR | ++ PCISTATE_ALLOW_APE_SHMEM_WR | ++ PCISTATE_ALLOW_APE_PSPACE_WR; ++ pci_write_config_dword(tp->pdev, TG3PCI_PCISTATE, val); ++ ++ pci_write_config_word(tp->pdev, PCI_COMMAND, tp->pci_cmd); ++ ++ if (!tg3_flag(tp, PCI_EXPRESS)) { ++ pci_write_config_byte(tp->pdev, PCI_CACHE_LINE_SIZE, ++ tp->pci_cacheline_sz); ++ pci_write_config_byte(tp->pdev, PCI_LATENCY_TIMER, ++ tp->pci_lat_timer); ++ } ++ ++ /* Make sure PCI-X relaxed ordering bit is clear. */ ++ if (tg3_flag(tp, PCIX_MODE)) { ++ u16 pcix_cmd; ++ ++ pci_read_config_word(tp->pdev, tp->pcix_cap + PCI_X_CMD, ++ &pcix_cmd); ++ pcix_cmd &= ~PCI_X_CMD_ERO; ++ pci_write_config_word(tp->pdev, tp->pcix_cap + PCI_X_CMD, ++ pcix_cmd); ++ } ++ ++ if (tg3_flag(tp, 5780_CLASS)) { ++ ++ /* Chip reset on 5780 will reset MSI enable bit, ++ * so need to restore it. ++ */ ++ if (tg3_flag(tp, USING_MSI)) { ++ u16 ctrl; ++ ++ pci_read_config_word(tp->pdev, ++ tp->msi_cap + PCI_MSI_FLAGS, ++ &ctrl); ++ pci_write_config_word(tp->pdev, ++ tp->msi_cap + PCI_MSI_FLAGS, ++ ctrl | PCI_MSI_FLAGS_ENABLE); ++ val = tr32(MSGINT_MODE); ++ tw32(MSGINT_MODE, val | MSGINT_MODE_ENABLE); ++ } ++ } ++ ++ tg3_disable_ints(tp); ++} ++ ++static void tg3_override_clk(struct tg3 *tp) ++{ ++ u32 val; ++ ++ switch (tg3_asic_rev(tp)) { ++ case ASIC_REV_5717: ++ val = tr32(TG3_CPMU_CLCK_ORIDE_ENABLE); ++ tw32(TG3_CPMU_CLCK_ORIDE_ENABLE, val | ++ TG3_CPMU_MAC_ORIDE_ENABLE); ++ break; ++ ++ case ASIC_REV_5719: ++ case ASIC_REV_5720: ++ tw32(TG3_CPMU_CLCK_ORIDE, CPMU_CLCK_ORIDE_MAC_ORIDE_EN); ++ break; ++ ++ default: ++ return; ++ } ++} ++ ++static void tg3_restore_clk(struct tg3 *tp) ++{ ++ u32 val; ++ ++ switch (tg3_asic_rev(tp)) { ++ case ASIC_REV_5717: ++ val = tr32(TG3_CPMU_CLCK_ORIDE_ENABLE); ++ tw32(TG3_CPMU_CLCK_ORIDE_ENABLE, ++ val & ~TG3_CPMU_MAC_ORIDE_ENABLE); ++ break; ++ ++ case ASIC_REV_5719: ++ case ASIC_REV_5720: ++ val = tr32(TG3_CPMU_CLCK_ORIDE); ++ tw32(TG3_CPMU_CLCK_ORIDE, val & ~CPMU_CLCK_ORIDE_MAC_ORIDE_EN); ++ break; ++ ++ default: ++ return; ++ } ++} ++ ++/* tp->lock is held. */ ++static int tg3_chip_reset(struct tg3 *tp) ++{ ++ u32 val; ++ void (*write_op)(struct tg3 *, u32, u32); ++ int i, err; ++ ++ if (!pci_device_is_present(tp->pdev)) ++ return -ENODEV; ++ ++ tg3_nvram_lock(tp); ++ ++ tg3_ape_lock(tp, TG3_APE_LOCK_GRC); ++ ++ /* No matching tg3_nvram_unlock() after this because ++ * chip reset below will undo the nvram lock. ++ */ ++ tp->nvram_lock_cnt = 0; ++ ++ /* GRC_MISC_CFG core clock reset will clear the memory ++ * enable bit in PCI register 4 and the MSI enable bit ++ * on some chips, so we save relevant registers here. ++ */ ++ tg3_save_pci_state(tp); ++ ++ if (tg3_asic_rev(tp) == ASIC_REV_5752 || ++ tg3_flag(tp, 5755_PLUS)) ++ tw32(GRC_FASTBOOT_PC, 0); ++ ++ /* ++ * We must avoid the readl() that normally takes place. ++ * It locks machines, causes machine checks, and other ++ * fun things. So, temporarily disable the 5701 ++ * hardware workaround, while we do the reset. ++ */ ++ write_op = tp->write32; ++ if (write_op == tg3_write_flush_reg32) ++ tp->write32 = tg3_write32; ++ ++ /* Prevent the irq handler from reading or writing PCI registers ++ * during chip reset when the memory enable bit in the PCI command ++ * register may be cleared. The chip does not generate interrupt ++ * at this time, but the irq handler may still be called due to irq ++ * sharing or irqpoll. ++ */ ++ tg3_flag_set(tp, CHIP_RESETTING); ++ for (i = 0; i < tp->irq_cnt; i++) { ++ struct tg3_napi *tnapi = &tp->napi[i]; ++ if (tnapi->hw_status) { ++ tnapi->hw_status->status = 0; ++ tnapi->hw_status->status_tag = 0; ++ } ++ tnapi->last_tag = 0; ++ tnapi->last_irq_tag = 0; ++ } ++ smp_mb(); ++ ++#if (LINUX_VERSION_CODE >= 0x2051c) ++ for (i = 0; i < tp->irq_cnt; i++) ++ synchronize_irq(tp->napi[i].irq_vec); ++#else ++ synchronize_irq(); ++#endif ++ ++ if (tg3_asic_rev(tp) == ASIC_REV_57780) { ++ val = tr32(TG3_PCIE_LNKCTL) & ~TG3_PCIE_LNKCTL_L1_PLL_PD_EN; ++ tw32(TG3_PCIE_LNKCTL, val | TG3_PCIE_LNKCTL_L1_PLL_PD_DIS); ++ } ++ ++ /* do the reset */ ++ val = GRC_MISC_CFG_CORECLK_RESET; ++ ++ if (tg3_flag(tp, PCI_EXPRESS)) { ++ /* Force PCIe 1.0a mode */ ++ if (tg3_asic_rev(tp) != ASIC_REV_5785 && ++ !tg3_flag(tp, 57765_PLUS) && ++ tr32(TG3_PCIE_PHY_TSTCTL) == ++ (TG3_PCIE_PHY_TSTCTL_PCIE10 | TG3_PCIE_PHY_TSTCTL_PSCRAM)) ++ tw32(TG3_PCIE_PHY_TSTCTL, TG3_PCIE_PHY_TSTCTL_PSCRAM); ++ ++ if (tg3_chip_rev_id(tp) != CHIPREV_ID_5750_A0) { ++ tw32(GRC_MISC_CFG, (1 << 29)); ++ val |= (1 << 29); ++ } ++ } ++ ++ if (tg3_asic_rev(tp) == ASIC_REV_5906) { ++ tw32(VCPU_STATUS, tr32(VCPU_STATUS) | VCPU_STATUS_DRV_RESET); ++ tw32(GRC_VCPU_EXT_CTRL, ++ tr32(GRC_VCPU_EXT_CTRL) & ~GRC_VCPU_EXT_CTRL_HALT_CPU); ++ } ++ ++ /* Set the clock to the highest frequency to avoid timeouts. With link ++ * aware mode, the clock speed could be slow and bootcode does not ++ * complete within the expected time. Override the clock to allow the ++ * bootcode to finish sooner and then restore it. A later bootcode will ++ * implement this workaround at which time this change must be removed ++ * from the driver. ++ */ ++ tg3_override_clk(tp); ++ ++ /* Manage gphy power for all CPMU absent PCIe devices. */ ++ if (tg3_flag(tp, 5705_PLUS) && !tg3_flag(tp, CPMU_PRESENT)) ++ val |= GRC_MISC_CFG_KEEP_GPHY_POWER; ++ ++ tw32(GRC_MISC_CFG, val); ++ ++ /* restore 5701 hardware bug workaround write method */ ++ tp->write32 = write_op; ++ ++ /* Unfortunately, we have to delay before the PCI read back. ++ * Some 575X chips even will not respond to a PCI cfg access ++ * when the reset command is given to the chip. ++ * ++ * How do these hardware designers expect things to work ++ * properly if the PCI write is posted for a long period ++ * of time? It is always necessary to have some method by ++ * which a register read back can occur to push the write ++ * out which does the reset. ++ * ++ * For most tg3 variants the trick below was working. ++ * Ho hum... ++ */ ++ udelay(120); ++ ++ /* Flush PCI posted writes. The normal MMIO registers ++ * are inaccessible at this time so this is the only ++ * way to make this reliably (actually, this is no longer ++ * the case, see above). I tried to use indirect ++ * register read/write but this upset some 5701 variants. ++ */ ++ pci_read_config_dword(tp->pdev, PCI_COMMAND, &val); ++ ++ udelay(120); ++ ++ if (tg3_flag(tp, PCI_EXPRESS) && pci_is_pcie(tp->pdev)) { ++ u16 val16; ++ ++ if (tg3_chip_rev_id(tp) == CHIPREV_ID_5750_A0) { ++ int j; ++ u32 cfg_val; ++ ++ /* Wait for link training to complete. */ ++ for (j = 0; j < 5000; j++) ++ udelay(100); ++ ++ pci_read_config_dword(tp->pdev, 0xc4, &cfg_val); ++ pci_write_config_dword(tp->pdev, 0xc4, ++ cfg_val | (1 << 15)); ++ } ++ ++ /* Clear the "no snoop" and "relaxed ordering" bits. */ ++ val16 = PCI_EXP_DEVCTL_RELAX_EN | PCI_EXP_DEVCTL_NOSNOOP_EN; ++ /* ++ * Older PCIe devices only support the 128 byte ++ * MPS setting. Enforce the restriction. ++ */ ++ if (!tg3_flag(tp, CPMU_PRESENT)) ++ val16 |= PCI_EXP_DEVCTL_PAYLOAD; ++ pcie_capability_clear_word(tp->pdev, PCI_EXP_DEVCTL, val16); ++ ++ /* Clear error status */ ++ pcie_capability_write_word(tp->pdev, PCI_EXP_DEVSTA, ++ PCI_EXP_DEVSTA_CED | ++ PCI_EXP_DEVSTA_NFED | ++ PCI_EXP_DEVSTA_FED | ++ PCI_EXP_DEVSTA_URD); ++ } ++ ++ tg3_restore_pci_state(tp); ++ ++ tg3_flag_clear(tp, CHIP_RESETTING); ++ tg3_flag_clear(tp, ERROR_PROCESSED); ++ ++ val = 0; ++ if (tg3_flag(tp, 5780_CLASS)) ++ val = tr32(MEMARB_MODE); ++ tw32(MEMARB_MODE, val | MEMARB_MODE_ENABLE); ++ ++ if (tg3_chip_rev_id(tp) == CHIPREV_ID_5750_A3) { ++ tg3_stop_fw(tp); ++ tw32(0x5000, 0x400); ++ } ++ ++ if (tg3_flag(tp, IS_SSB_CORE)) { ++ /* ++ * BCM4785: In order to avoid repercussions from using ++ * potentially defective internal ROM, stop the Rx RISC CPU, ++ * which is not required. ++ */ ++ tg3_stop_fw(tp); ++ tg3_halt_cpu(tp, RX_CPU_BASE); ++ } ++ ++ err = tg3_poll_fw(tp); ++ if (err) ++ return err; ++ ++ tw32(GRC_MODE, tp->grc_mode); ++ ++ if (tg3_chip_rev_id(tp) == CHIPREV_ID_5705_A0) { ++ val = tr32(0xc4); ++ ++ tw32(0xc4, val | (1 << 15)); ++ } ++ ++ if ((tp->nic_sram_data_cfg & NIC_SRAM_DATA_CFG_MINI_PCI) != 0 && ++ tg3_asic_rev(tp) == ASIC_REV_5705) { ++ tp->pci_clock_ctrl |= CLOCK_CTRL_CLKRUN_OENABLE; ++ if (tg3_chip_rev_id(tp) == CHIPREV_ID_5705_A0) ++ tp->pci_clock_ctrl |= CLOCK_CTRL_FORCE_CLKRUN; ++ tw32(TG3PCI_CLOCK_CTRL, tp->pci_clock_ctrl); ++ } ++ ++ if (tp->phy_flags & TG3_PHYFLG_PHY_SERDES) { ++ tp->mac_mode = MAC_MODE_PORT_MODE_TBI; ++ val = tp->mac_mode; ++ } else if (tp->phy_flags & TG3_PHYFLG_MII_SERDES) { ++ tp->mac_mode = MAC_MODE_PORT_MODE_GMII; ++ val = tp->mac_mode; ++ } else ++ val = 0; ++ ++ tw32_f(MAC_MODE, val); ++ udelay(40); ++ ++ tg3_ape_unlock(tp, TG3_APE_LOCK_GRC); ++ ++ tg3_mdio_start(tp); ++ ++ if (tg3_flag(tp, PCI_EXPRESS) && ++ tg3_chip_rev_id(tp) != CHIPREV_ID_5750_A0 && ++ tg3_asic_rev(tp) != ASIC_REV_5785 && ++ !tg3_flag(tp, 57765_PLUS)) { ++ val = tr32(0x7c00); ++ ++ tw32(0x7c00, val | (1 << 25)); ++ } ++ ++ tg3_restore_clk(tp); ++ ++ /* Reprobe ASF enable state. */ ++ tg3_flag_clear(tp, ENABLE_ASF); ++ tp->phy_flags &= ~(TG3_PHYFLG_1G_ON_VAUX_OK | ++ TG3_PHYFLG_KEEP_LINK_ON_PWRDN); ++ ++ tg3_flag_clear(tp, ASF_NEW_HANDSHAKE); ++ tg3_read_mem(tp, NIC_SRAM_DATA_SIG, &val); ++ if (val == NIC_SRAM_DATA_SIG_MAGIC) { ++ u32 nic_cfg; ++ ++ tg3_read_mem(tp, NIC_SRAM_DATA_CFG, &nic_cfg); ++ if (nic_cfg & NIC_SRAM_DATA_CFG_ASF_ENABLE) { ++ tg3_flag_set(tp, ENABLE_ASF); ++ tp->last_event_jiffies = jiffies; ++ if (tg3_flag(tp, 5750_PLUS)) ++ tg3_flag_set(tp, ASF_NEW_HANDSHAKE); ++ ++ tg3_read_mem(tp, NIC_SRAM_DATA_CFG_3, &nic_cfg); ++ if (nic_cfg & NIC_SRAM_1G_ON_VAUX_OK) ++ tp->phy_flags |= TG3_PHYFLG_1G_ON_VAUX_OK; ++ if (nic_cfg & NIC_SRAM_LNK_FLAP_AVOID) ++ tp->phy_flags |= TG3_PHYFLG_KEEP_LINK_ON_PWRDN; ++ } ++ } ++ ++ return 0; ++} ++ ++static void tg3_get_nstats(struct tg3 *, struct rtnl_link_stats64 *); ++static void tg3_get_estats(struct tg3 *, struct tg3_ethtool_stats *); ++static void __tg3_set_rx_mode(struct net_device *); ++ ++/* tp->lock is held. */ ++static int tg3_halt(struct tg3 *tp, int kind, bool silent) ++{ ++ int err; ++ ++ tg3_stop_fw(tp); ++ ++ tg3_write_sig_pre_reset(tp, kind); ++ ++ tg3_abort_hw(tp, silent); ++ err = tg3_chip_reset(tp); ++ ++ __tg3_set_mac_addr(tp, false); ++ ++ tg3_write_sig_legacy(tp, kind); ++ tg3_write_sig_post_reset(tp, kind); ++ ++ if (tp->hw_stats) { ++ /* Save the stats across chip resets... */ ++ tg3_get_nstats(tp, &tp->net_stats_prev); ++ tg3_get_estats(tp, &tp->estats_prev); ++ ++ /* And make sure the next sample is new data */ ++ memset(tp->hw_stats, 0, sizeof(struct tg3_hw_stats)); ++ } ++ ++ return err; ++} ++ ++static int tg3_set_mac_addr(struct net_device *dev, void *p) ++{ ++ struct tg3 *tp = netdev_priv(dev); ++ struct sockaddr *addr = p; ++ int err = 0; ++ bool skip_mac_1 = false; ++ ++ if (!is_valid_ether_addr(addr->sa_data)) ++ return -EADDRNOTAVAIL; ++ ++ memcpy(dev->dev_addr, addr->sa_data, dev->addr_len); ++ ++ if (!netif_running(dev)) ++ return 0; ++ ++ if (tg3_flag(tp, ENABLE_ASF)) { ++ u32 addr0_high, addr0_low, addr1_high, addr1_low; ++ ++ addr0_high = tr32(MAC_ADDR_0_HIGH); ++ addr0_low = tr32(MAC_ADDR_0_LOW); ++ addr1_high = tr32(MAC_ADDR_1_HIGH); ++ addr1_low = tr32(MAC_ADDR_1_LOW); ++ ++ /* Skip MAC addr 1 if ASF is using it. */ ++ if ((addr0_high != addr1_high || addr0_low != addr1_low) && ++ !(addr1_high == 0 && addr1_low == 0)) ++ skip_mac_1 = true; ++ } ++ spin_lock_bh(&tp->lock); ++ __tg3_set_mac_addr(tp, skip_mac_1); ++ __tg3_set_rx_mode(dev); ++ spin_unlock_bh(&tp->lock); ++ ++ return err; ++} ++ ++/* tp->lock is held. */ ++static void tg3_set_bdinfo(struct tg3 *tp, u32 bdinfo_addr, ++ dma_addr_t mapping, u32 maxlen_flags, ++ u32 nic_addr) ++{ ++ tg3_write_mem(tp, ++ (bdinfo_addr + TG3_BDINFO_HOST_ADDR + TG3_64BIT_REG_HIGH), ++ ((u64) mapping >> 32)); ++ tg3_write_mem(tp, ++ (bdinfo_addr + TG3_BDINFO_HOST_ADDR + TG3_64BIT_REG_LOW), ++ ((u64) mapping & 0xffffffff)); ++ tg3_write_mem(tp, ++ (bdinfo_addr + TG3_BDINFO_MAXLEN_FLAGS), ++ maxlen_flags); ++ ++ if (!tg3_flag(tp, 5705_PLUS)) ++ tg3_write_mem(tp, ++ (bdinfo_addr + TG3_BDINFO_NIC_ADDR), ++ nic_addr); ++} ++ ++static void tg3_coal_tx_init(struct tg3 *tp, struct ethtool_coalesce *ec) ++{ ++ int i = 0; ++ ++ if (!tg3_flag(tp, ENABLE_TSS)) { ++ tw32(HOSTCC_TXCOL_TICKS, ec->tx_coalesce_usecs); ++ tw32(HOSTCC_TXMAX_FRAMES, ec->tx_max_coalesced_frames); ++ tw32(HOSTCC_TXCOAL_MAXF_INT, ec->tx_max_coalesced_frames_irq); ++ } else { ++ tw32(HOSTCC_TXCOL_TICKS, 0); ++ tw32(HOSTCC_TXMAX_FRAMES, 0); ++ tw32(HOSTCC_TXCOAL_MAXF_INT, 0); ++ ++ for (; i < tp->txq_cnt; i++) { ++ u32 reg; ++ ++ reg = HOSTCC_TXCOL_TICKS_VEC1 + i * 0x18; ++ tw32(reg, ec->tx_coalesce_usecs); ++ reg = HOSTCC_TXMAX_FRAMES_VEC1 + i * 0x18; ++ tw32(reg, ec->tx_max_coalesced_frames); ++ reg = HOSTCC_TXCOAL_MAXF_INT_VEC1 + i * 0x18; ++ tw32(reg, ec->tx_max_coalesced_frames_irq); ++ } ++ } ++ ++ for (; i < tp->irq_max - 1; i++) { ++ tw32(HOSTCC_TXCOL_TICKS_VEC1 + i * 0x18, 0); ++ tw32(HOSTCC_TXMAX_FRAMES_VEC1 + i * 0x18, 0); ++ tw32(HOSTCC_TXCOAL_MAXF_INT_VEC1 + i * 0x18, 0); ++ } ++} ++ ++static void tg3_coal_rx_init(struct tg3 *tp, struct ethtool_coalesce *ec) ++{ ++ int i = 0; ++ u32 limit = tp->rxq_cnt; ++ ++ if (!tg3_flag(tp, ENABLE_RSS)) { ++ tw32(HOSTCC_RXCOL_TICKS, ec->rx_coalesce_usecs); ++ tw32(HOSTCC_RXMAX_FRAMES, ec->rx_max_coalesced_frames); ++ tw32(HOSTCC_RXCOAL_MAXF_INT, ec->rx_max_coalesced_frames_irq); ++ limit--; ++ } else { ++ tw32(HOSTCC_RXCOL_TICKS, 0); ++ tw32(HOSTCC_RXMAX_FRAMES, 0); ++ tw32(HOSTCC_RXCOAL_MAXF_INT, 0); ++ } ++ ++ for (; i < limit; i++) { ++ u32 reg; ++ ++ reg = HOSTCC_RXCOL_TICKS_VEC1 + i * 0x18; ++ tw32(reg, ec->rx_coalesce_usecs); ++ reg = HOSTCC_RXMAX_FRAMES_VEC1 + i * 0x18; ++ tw32(reg, ec->rx_max_coalesced_frames); ++ reg = HOSTCC_RXCOAL_MAXF_INT_VEC1 + i * 0x18; ++ tw32(reg, ec->rx_max_coalesced_frames_irq); ++ } ++ ++ for (; i < tp->irq_max - 1; i++) { ++ tw32(HOSTCC_RXCOL_TICKS_VEC1 + i * 0x18, 0); ++ tw32(HOSTCC_RXMAX_FRAMES_VEC1 + i * 0x18, 0); ++ tw32(HOSTCC_RXCOAL_MAXF_INT_VEC1 + i * 0x18, 0); ++ } ++} ++ ++static void __tg3_set_coalesce(struct tg3 *tp, struct ethtool_coalesce *ec) ++{ ++ tg3_coal_tx_init(tp, ec); ++ tg3_coal_rx_init(tp, ec); ++ ++ if (!tg3_flag(tp, 5705_PLUS)) { ++ u32 val = ec->stats_block_coalesce_usecs; ++ ++ tw32(HOSTCC_RXCOAL_TICK_INT, ec->rx_coalesce_usecs_irq); ++ tw32(HOSTCC_TXCOAL_TICK_INT, ec->tx_coalesce_usecs_irq); ++ ++ if (!tp->link_up) ++ val = 0; ++ ++ tw32(HOSTCC_STAT_COAL_TICKS, val); ++ } ++} ++ ++/* tp->lock is held. */ ++static void tg3_tx_rcbs_disable(struct tg3 *tp) ++{ ++ u32 txrcb, limit; ++ ++ /* Disable all transmit rings but the first. */ ++ if (!tg3_flag(tp, 5705_PLUS)) ++ limit = NIC_SRAM_SEND_RCB + TG3_BDINFO_SIZE * 16; ++ else if (tg3_flag(tp, 5717_PLUS)) ++ limit = NIC_SRAM_SEND_RCB + TG3_BDINFO_SIZE * 4; ++ else if (tg3_flag(tp, 57765_CLASS) || ++ tg3_asic_rev(tp) == ASIC_REV_5762) ++ limit = NIC_SRAM_SEND_RCB + TG3_BDINFO_SIZE * 2; ++ else ++ limit = NIC_SRAM_SEND_RCB + TG3_BDINFO_SIZE; ++ ++ for (txrcb = NIC_SRAM_SEND_RCB + TG3_BDINFO_SIZE; ++ txrcb < limit; txrcb += TG3_BDINFO_SIZE) ++ tg3_write_mem(tp, txrcb + TG3_BDINFO_MAXLEN_FLAGS, ++ BDINFO_FLAGS_DISABLED); ++} ++ ++/* tp->lock is held. */ ++static void tg3_tx_rcbs_init(struct tg3 *tp) ++{ ++ int i = 0; ++ u32 txrcb = NIC_SRAM_SEND_RCB; ++ ++ if (tg3_flag(tp, ENABLE_TSS)) ++ i++; ++ ++ for (; i < tp->irq_max; i++, txrcb += TG3_BDINFO_SIZE) { ++ struct tg3_napi *tnapi = &tp->napi[i]; ++ ++ if (!tnapi->tx_ring) ++ continue; ++ ++ tg3_set_bdinfo(tp, txrcb, tnapi->tx_desc_mapping, ++ (TG3_TX_RING_SIZE << BDINFO_FLAGS_MAXLEN_SHIFT), ++ NIC_SRAM_TX_BUFFER_DESC); ++ } ++} ++ ++/* tp->lock is held. */ ++static void tg3_rx_ret_rcbs_disable(struct tg3 *tp) ++{ ++ u32 rxrcb, limit; ++ ++ /* Disable all receive return rings but the first. */ ++ if (tg3_flag(tp, 5717_PLUS)) ++ limit = NIC_SRAM_RCV_RET_RCB + TG3_BDINFO_SIZE * 17; ++ else if (!tg3_flag(tp, 5705_PLUS)) ++ limit = NIC_SRAM_RCV_RET_RCB + TG3_BDINFO_SIZE * 16; ++ else if (tg3_asic_rev(tp) == ASIC_REV_5755 || ++ tg3_asic_rev(tp) == ASIC_REV_5762 || ++ tg3_flag(tp, 57765_CLASS)) ++ limit = NIC_SRAM_RCV_RET_RCB + TG3_BDINFO_SIZE * 4; ++ else ++ limit = NIC_SRAM_RCV_RET_RCB + TG3_BDINFO_SIZE; ++ ++ for (rxrcb = NIC_SRAM_RCV_RET_RCB + TG3_BDINFO_SIZE; ++ rxrcb < limit; rxrcb += TG3_BDINFO_SIZE) ++ tg3_write_mem(tp, rxrcb + TG3_BDINFO_MAXLEN_FLAGS, ++ BDINFO_FLAGS_DISABLED); ++} ++ ++/* tp->lock is held. */ ++static void tg3_rx_ret_rcbs_init(struct tg3 *tp) ++{ ++ int i = 0; ++ u32 rxrcb = NIC_SRAM_RCV_RET_RCB; ++ ++ if (tg3_flag(tp, ENABLE_RSS)) ++ i++; ++ ++ for (; i < tp->irq_max; i++, rxrcb += TG3_BDINFO_SIZE) { ++ struct tg3_napi *tnapi = &tp->napi[i]; ++ ++ if (!tnapi->rx_rcb) ++ continue; ++ ++ tg3_set_bdinfo(tp, rxrcb, tnapi->rx_rcb_mapping, ++ (tp->rx_ret_ring_mask + 1) << ++ BDINFO_FLAGS_MAXLEN_SHIFT, 0); ++ } ++} ++ ++/* tp->lock is held. */ ++static void tg3_rings_reset(struct tg3 *tp) ++{ ++ int i; ++ u32 stblk; ++ struct tg3_napi *tnapi = &tp->napi[0]; ++ ++ tg3_tx_rcbs_disable(tp); ++ ++#ifdef TG3_VMWARE_NETQ_ENABLE ++ for (i = 1; i < TG3_IRQ_MAX_VECS_IOV; i++) ++ tg3_disable_prod_rcbs(tp, i); ++#endif ++ ++ tg3_rx_ret_rcbs_disable(tp); ++ ++ /* Disable interrupts */ ++ tw32_mailbox_f(tp->napi[0].int_mbox, 1); ++ tp->napi[0].chk_msi_cnt = 0; ++ tp->napi[0].last_rx_cons = 0; ++ tp->napi[0].last_tx_cons = 0; ++ ++ /* Zero mailbox registers. */ ++ if (tg3_flag(tp, SUPPORT_MSIX)) { ++ for (i = 1; i < tp->irq_max; i++) { ++ tp->napi[i].tx_prod = 0; ++ tp->napi[i].tx_cons = 0; ++ if (tg3_flag(tp, ENABLE_TSS)) ++ tw32_mailbox(tp->napi[i].prodmbox, 0); ++ tw32_rx_mbox(tp->napi[i].consmbox, 0); ++ tw32_mailbox_f(tp->napi[i].int_mbox, 1); ++ tp->napi[i].chk_msi_cnt = 0; ++ tp->napi[i].last_rx_cons = 0; ++ tp->napi[i].last_tx_cons = 0; ++ ++#ifdef TG3_VMWARE_NETQ_ENABLE ++ if (!tg3_flag(tp, ENABLE_RSS)) { ++ struct tg3_rx_prodring_set *tpr; ++ ++ tpr = &tp->napi[i].prodring; ++ tw32_rx_mbox(tpr->rx_jmb_mbox, 0); ++ tw32_rx_mbox(tpr->rx_std_mbox, 0); ++ } ++#endif ++ } ++ if (!tg3_flag(tp, ENABLE_TSS)) ++ tw32_mailbox(tp->napi[0].prodmbox, 0); ++ } else { ++ tp->napi[0].tx_prod = 0; ++ tp->napi[0].tx_cons = 0; ++ tw32_mailbox(tp->napi[0].prodmbox, 0); ++ tw32_rx_mbox(tp->napi[0].consmbox, 0); ++ } ++ ++ /* Make sure the NIC-based send BD rings are disabled. */ ++ if (!tg3_flag(tp, 5705_PLUS)) { ++ u32 mbox = MAILBOX_SNDNIC_PROD_IDX_0 + TG3_64BIT_REG_LOW; ++ for (i = 0; i < 16; i++) ++ tw32_tx_mbox(mbox + i * 8, 0); ++ } ++ ++ /* Clear status block in ram. */ ++ memset(tnapi->hw_status, 0, TG3_HW_STATUS_SIZE); ++ ++ /* Set status block DMA address */ ++ tw32(HOSTCC_STATUS_BLK_HOST_ADDR + TG3_64BIT_REG_HIGH, ++ ((u64) tnapi->status_mapping >> 32)); ++ tw32(HOSTCC_STATUS_BLK_HOST_ADDR + TG3_64BIT_REG_LOW, ++ ((u64) tnapi->status_mapping & 0xffffffff)); ++ ++ stblk = HOSTCC_STATBLCK_RING1; ++ ++ for (i = 1, tnapi++; i < tp->irq_cnt; i++, tnapi++) { ++ u64 mapping = (u64)tnapi->status_mapping; ++ tw32(stblk + TG3_64BIT_REG_HIGH, mapping >> 32); ++ tw32(stblk + TG3_64BIT_REG_LOW, mapping & 0xffffffff); ++ stblk += 8; ++ ++ /* Clear status block in ram. */ ++ memset(tnapi->hw_status, 0, TG3_HW_STATUS_SIZE); ++ } ++ ++ tg3_tx_rcbs_init(tp); ++ tg3_rx_ret_rcbs_init(tp); ++} ++ ++static void tg3_setup_rxbd_thresholds(struct tg3 *tp) ++{ ++ u32 val, bdcache_maxcnt, host_rep_thresh, nic_rep_thresh; ++ ++ if (!tg3_flag(tp, 5750_PLUS) || ++ tg3_flag(tp, 5780_CLASS) || ++ tg3_asic_rev(tp) == ASIC_REV_5750 || ++ tg3_asic_rev(tp) == ASIC_REV_5752 || ++ tg3_flag(tp, 57765_PLUS)) ++ bdcache_maxcnt = TG3_SRAM_RX_STD_BDCACHE_SIZE_5700; ++ else if (tg3_asic_rev(tp) == ASIC_REV_5755 || ++ tg3_asic_rev(tp) == ASIC_REV_5787) ++ bdcache_maxcnt = TG3_SRAM_RX_STD_BDCACHE_SIZE_5755; ++ else ++ bdcache_maxcnt = TG3_SRAM_RX_STD_BDCACHE_SIZE_5906; ++ ++#ifdef TG3_VMWARE_NETQ_ENABLE ++ /* In IOV, mode, the std rx BD cache is chopped into 17 pieces. */ ++ if (tg3_flag(tp, ENABLE_IOV)) ++ bdcache_maxcnt = TG3_SRAM_RX_STD_BDCACHE_SIZE_5906; ++#endif /* TG3_VMWARE_NETQ_ENABLE */ ++ ++ nic_rep_thresh = min(bdcache_maxcnt / 2, tp->rx_std_max_post); ++ host_rep_thresh = max_t(u32, tp->rx_pending / 8, 1); ++ ++ val = min(nic_rep_thresh, host_rep_thresh); ++ tw32(RCVBDI_STD_THRESH, val); ++ ++ if (tg3_flag(tp, 57765_PLUS)) ++ tw32(STD_REPLENISH_LWM, bdcache_maxcnt); ++ ++#ifdef TG3_VMWARE_NETQ_ENABLE ++ if (tg3_flag(tp, 5717_PLUS) && tg3_flag(tp, ENABLE_IOV)) ++ tw32(STD_REPLENISH_LWM, bdcache_maxcnt / 2); ++#endif /* TG3_VMWARE_NETQ_ENABLE */ ++ ++ if (!tg3_flag(tp, JUMBO_CAPABLE) || tg3_flag(tp, 5780_CLASS)) ++ return; ++ ++ bdcache_maxcnt = TG3_SRAM_RX_JMB_BDCACHE_SIZE_5700; ++ ++#ifdef TG3_VMWARE_NETQ_ENABLE ++ /* In IOV, mode, the jmb rx BD cache is chopped into 17 pieces. */ ++ if (tg3_flag(tp, ENABLE_IOV)) ++ bdcache_maxcnt = TG3_SRAM_RX_JMB_BDCACHE_SIZE_5717; ++#endif /* TG3_VMWARE_NETQ_ENABLE */ ++ ++ host_rep_thresh = max_t(u32, tp->rx_jumbo_pending / 8, 1); ++ ++ val = min(bdcache_maxcnt / 2, host_rep_thresh); ++ tw32(RCVBDI_JUMBO_THRESH, val); ++ ++ if (tg3_flag(tp, 57765_PLUS)) ++ tw32(JMB_REPLENISH_LWM, bdcache_maxcnt); ++ ++#ifdef TG3_VMWARE_NETQ_ENABLE ++ if (tg3_flag(tp, 5717_PLUS) && tg3_flag(tp, ENABLE_IOV)) ++ tw32(JMB_REPLENISH_LWM, bdcache_maxcnt / 2); ++#endif /* TG3_VMWARE_NETQ_ENABLE */ ++} ++ ++static inline u32 calc_crc(unsigned char *buf, int len) ++{ ++ u32 reg; ++ u32 tmp; ++ int j, k; ++ ++ reg = 0xffffffff; ++ ++ for (j = 0; j < len; j++) { ++ reg ^= buf[j]; ++ ++ for (k = 0; k < 8; k++) { ++ tmp = reg & 0x01; ++ ++ reg >>= 1; ++ ++ if (tmp) ++ reg ^= 0xedb88320; ++ } ++ } ++ ++ return ~reg; ++} ++ ++static void tg3_set_multi(struct tg3 *tp, unsigned int accept_all) ++{ ++ /* accept or reject all multicast frames */ ++ tw32(MAC_HASH_REG_0, accept_all ? 0xffffffff : 0); ++ tw32(MAC_HASH_REG_1, accept_all ? 0xffffffff : 0); ++ tw32(MAC_HASH_REG_2, accept_all ? 0xffffffff : 0); ++ tw32(MAC_HASH_REG_3, accept_all ? 0xffffffff : 0); ++} ++ ++static void __tg3_set_rx_mode(struct net_device *dev) ++{ ++ struct tg3 *tp = netdev_priv(dev); ++ u32 rx_mode; ++ ++ rx_mode = tp->rx_mode & ~(RX_MODE_PROMISC | ++ RX_MODE_KEEP_VLAN_TAG); ++ ++ /* When ASF is in use, we always keep the RX_MODE_KEEP_VLAN_TAG ++ * flag clear. ++ */ ++#ifndef BCM_HAS_NEW_VLAN_INTERFACE ++ if (!tp->vlgrp) ++#endif ++ if (!tg3_flag(tp, ENABLE_ASF)) ++ rx_mode |= RX_MODE_KEEP_VLAN_TAG; ++ ++ if (dev->flags & IFF_PROMISC) { ++ /* Promiscuous mode. */ ++ rx_mode |= RX_MODE_PROMISC; ++ } else if (dev->flags & IFF_ALLMULTI) { ++ /* Accept all multicast. */ ++ tg3_set_multi(tp, 1); ++ } else if (netdev_mc_empty(dev)) { ++ /* Reject all multicast. */ ++ tg3_set_multi(tp, 0); ++ } else { ++ /* Accept one or more multicast(s). */ ++ struct netdev_hw_addr *ha; ++ u32 mc_filter[4] = { 0, }; ++ u32 regidx; ++ u32 bit; ++ u32 crc; ++ ++ netdev_for_each_mc_addr(ha, dev) { ++ crc = calc_crc(ha->addr, ETH_ALEN); ++ bit = ~crc & 0x7f; ++ regidx = (bit & 0x60) >> 5; ++ bit &= 0x1f; ++ mc_filter[regidx] |= (1 << bit); ++ } ++ ++ tw32(MAC_HASH_REG_0, mc_filter[0]); ++ tw32(MAC_HASH_REG_1, mc_filter[1]); ++ tw32(MAC_HASH_REG_2, mc_filter[2]); ++ tw32(MAC_HASH_REG_3, mc_filter[3]); ++ } ++ ++#ifdef IFF_UNICAST_FLT ++ if (netdev_uc_count(dev) > TG3_MAX_UCAST_ADDR(tp)) { ++ rx_mode |= RX_MODE_PROMISC; ++ } else if (!(dev->flags & IFF_PROMISC)) { ++ /* Add all entries into to the mac addr filter list */ ++ int i = 0; ++ struct netdev_hw_addr *ha; ++ ++ netdev_for_each_uc_addr(ha, dev) { ++ __tg3_set_one_mac_addr(tp, ha->addr, ++ i + TG3_UCAST_ADDR_IDX(tp)); ++ i++; ++ } ++ } ++#endif ++ ++ if (rx_mode != tp->rx_mode) { ++ tp->rx_mode = rx_mode; ++ tw32_f(MAC_RX_MODE, rx_mode); ++ udelay(10); ++ } ++} ++ ++static void tg3_rss_init_dflt_indir_tbl(struct tg3 *tp, u32 qcnt) ++{ ++ int i; ++ ++ for (i = 0; i < TG3_RSS_INDIR_TBL_SIZE; i++) ++ tp->rss_ind_tbl[i] = ethtool_rxfh_indir_default(i, qcnt); ++} ++ ++static void tg3_rss_check_indir_tbl(struct tg3 *tp) ++{ ++ int i; ++ ++ if (!tg3_flag(tp, ENABLE_RSS)) ++ return; ++ ++ if (tp->rxq_cnt == 1) { ++ memset(&tp->rss_ind_tbl[0], 0, sizeof(tp->rss_ind_tbl)); ++ return; ++ } ++ ++ /* Validate table against current IRQ count */ ++ for (i = 0; i < TG3_RSS_INDIR_TBL_SIZE; i++) { ++ if (tp->rss_ind_tbl[i] >= tp->rxq_cnt) ++ break; ++ } ++ ++ if (i != TG3_RSS_INDIR_TBL_SIZE) ++ tg3_rss_init_dflt_indir_tbl(tp, tp->rxq_cnt); ++} ++ ++static void tg3_rss_write_indir_tbl(struct tg3 *tp) ++{ ++ int i = 0; ++ u32 reg = MAC_RSS_INDIR_TBL_0; ++ ++ while (i < TG3_RSS_INDIR_TBL_SIZE) { ++ u32 val = tp->rss_ind_tbl[i]; ++ i++; ++ for (; i % 8; i++) { ++ val <<= 4; ++ val |= tp->rss_ind_tbl[i]; ++ } ++ tw32(reg, val); ++ reg += 4; ++ } ++} ++ ++static inline u32 tg3_lso_rd_dma_workaround_bit(struct tg3 *tp) ++{ ++ if (tg3_asic_rev(tp) == ASIC_REV_5719) ++ return TG3_LSO_RD_DMA_TX_LENGTH_WA_5719; ++ else ++ return TG3_LSO_RD_DMA_TX_LENGTH_WA_5720; ++} ++ ++/* tp->lock is held. */ ++static int tg3_reset_hw(struct tg3 *tp, bool reset_phy) ++{ ++ u32 val, rdmac_mode; ++ int i, err, limit; ++ struct tg3_rx_prodring_set *tpr = &tp->napi[0].prodring; ++ ++ tg3_disable_ints(tp); ++ ++ tg3_stop_fw(tp); ++ ++ tg3_write_sig_pre_reset(tp, RESET_KIND_INIT); ++ ++ if (tg3_flag(tp, INIT_COMPLETE)) ++ tg3_abort_hw(tp, 1); ++ ++ if ((tp->phy_flags & TG3_PHYFLG_KEEP_LINK_ON_PWRDN) && ++ !(tp->phy_flags & TG3_PHYFLG_USER_CONFIGURED)) { ++ tg3_phy_pull_config(tp); ++ ++ /* Pull eee config only if not overridden by module param */ ++ if (tg3_disable_eee == -1) ++ tg3_eee_pull_config(tp, NULL); ++ ++ tp->phy_flags |= TG3_PHYFLG_USER_CONFIGURED; ++ } ++ ++ /* Enable MAC control of LPI */ ++#ifndef BCM_INCLUDE_PHYLIB_SUPPORT ++ if (tg3_asic_rev(tp) != ASIC_REV_5785) ++#endif ++ if (tp->phy_flags & TG3_PHYFLG_EEE_CAP) ++ tg3_setup_eee(tp); ++ ++ if (reset_phy) ++ tg3_phy_reset(tp); ++ ++ err = tg3_chip_reset(tp); ++ if (err) ++ return err; ++ ++ tg3_write_sig_legacy(tp, RESET_KIND_INIT); ++ ++ if (tg3_chip_rev(tp) == CHIPREV_5784_AX) { ++ val = tr32(TG3_CPMU_CTRL); ++ val &= ~(CPMU_CTRL_LINK_AWARE_MODE | CPMU_CTRL_LINK_IDLE_MODE); ++ tw32(TG3_CPMU_CTRL, val); ++ ++ val = tr32(TG3_CPMU_LSPD_10MB_CLK); ++ val &= ~CPMU_LSPD_10MB_MACCLK_MASK; ++ val |= CPMU_LSPD_10MB_MACCLK_6_25; ++ tw32(TG3_CPMU_LSPD_10MB_CLK, val); ++ ++ val = tr32(TG3_CPMU_LNK_AWARE_PWRMD); ++ val &= ~CPMU_LNK_AWARE_MACCLK_MASK; ++ val |= CPMU_LNK_AWARE_MACCLK_6_25; ++ tw32(TG3_CPMU_LNK_AWARE_PWRMD, val); ++ ++ val = tr32(TG3_CPMU_HST_ACC); ++ val &= ~CPMU_HST_ACC_MACCLK_MASK; ++ val |= CPMU_HST_ACC_MACCLK_6_25; ++ tw32(TG3_CPMU_HST_ACC, val); ++ } ++ ++ if (tg3_asic_rev(tp) == ASIC_REV_57780) { ++ val = tr32(PCIE_PWR_MGMT_THRESH) & ~PCIE_PWR_MGMT_L1_THRESH_MSK; ++ val |= PCIE_PWR_MGMT_EXT_ASPM_TMR_EN | ++ PCIE_PWR_MGMT_L1_THRESH_4MS; ++ tw32(PCIE_PWR_MGMT_THRESH, val); ++ ++ val = tr32(TG3_PCIE_EIDLE_DELAY) & ~TG3_PCIE_EIDLE_DELAY_MASK; ++ tw32(TG3_PCIE_EIDLE_DELAY, val | TG3_PCIE_EIDLE_DELAY_13_CLKS); ++ ++ tw32(TG3_CORR_ERR_STAT, TG3_CORR_ERR_STAT_CLEAR); ++ ++ val = tr32(TG3_PCIE_LNKCTL) & ~TG3_PCIE_LNKCTL_L1_PLL_PD_EN; ++ tw32(TG3_PCIE_LNKCTL, val | TG3_PCIE_LNKCTL_L1_PLL_PD_DIS); ++ } ++ ++ if (tg3_flag(tp, L1PLLPD_EN)) { ++ u32 grc_mode = tr32(GRC_MODE); ++ ++ /* Access the lower 1K of PL PCIE block registers. */ ++ val = grc_mode & ~GRC_MODE_PCIE_PORT_MASK; ++ tw32(GRC_MODE, val | GRC_MODE_PCIE_PL_SEL); ++ ++ val = tr32(TG3_PCIE_TLDLPL_PORT + TG3_PCIE_PL_LO_PHYCTL1); ++ tw32(TG3_PCIE_TLDLPL_PORT + TG3_PCIE_PL_LO_PHYCTL1, ++ val | TG3_PCIE_PL_LO_PHYCTL1_L1PLLPD_EN); ++ ++ tw32(GRC_MODE, grc_mode); ++ } ++ ++ if (tg3_flag(tp, 57765_CLASS)) { ++ if (tg3_chip_rev_id(tp) == CHIPREV_ID_57765_A0) { ++ u32 grc_mode = tr32(GRC_MODE); ++ ++ /* Access the lower 1K of PL PCIE block registers. */ ++ val = grc_mode & ~GRC_MODE_PCIE_PORT_MASK; ++ tw32(GRC_MODE, val | GRC_MODE_PCIE_PL_SEL); ++ ++ val = tr32(TG3_PCIE_TLDLPL_PORT + ++ TG3_PCIE_PL_LO_PHYCTL5); ++ tw32(TG3_PCIE_TLDLPL_PORT + TG3_PCIE_PL_LO_PHYCTL5, ++ val | TG3_PCIE_PL_LO_PHYCTL5_DIS_L2CLKREQ); ++ ++ tw32(GRC_MODE, grc_mode); ++ } ++ ++ if (tg3_chip_rev(tp) != CHIPREV_57765_AX) { ++ u32 grc_mode; ++ ++ /* Fix transmit hangs */ ++ val = tr32(TG3_CPMU_PADRNG_CTL); ++ val |= TG3_CPMU_PADRNG_CTL_RDIV2; ++ tw32(TG3_CPMU_PADRNG_CTL, val); ++ ++ grc_mode = tr32(GRC_MODE); ++ ++ /* Access the lower 1K of DL PCIE block registers. */ ++ val = grc_mode & ~GRC_MODE_PCIE_PORT_MASK; ++ tw32(GRC_MODE, val | GRC_MODE_PCIE_DL_SEL); ++ ++ val = tr32(TG3_PCIE_TLDLPL_PORT + ++ TG3_PCIE_DL_LO_FTSMAX); ++ val &= ~TG3_PCIE_DL_LO_FTSMAX_MSK; ++ tw32(TG3_PCIE_TLDLPL_PORT + TG3_PCIE_DL_LO_FTSMAX, ++ val | TG3_PCIE_DL_LO_FTSMAX_VAL); ++ ++ tw32(GRC_MODE, grc_mode); ++ } ++ ++ val = tr32(TG3_CPMU_LSPD_10MB_CLK); ++ val &= ~CPMU_LSPD_10MB_MACCLK_MASK; ++ val |= CPMU_LSPD_10MB_MACCLK_6_25; ++ tw32(TG3_CPMU_LSPD_10MB_CLK, val); ++ } ++ ++ /* This works around an issue with Athlon chipsets on ++ * B3 tigon3 silicon. This bit has no effect on any ++ * other revision. But do not set this on PCI Express ++ * chips and don't even touch the clocks if the CPMU is present. ++ */ ++ if (!tg3_flag(tp, CPMU_PRESENT)) { ++ if (!tg3_flag(tp, PCI_EXPRESS)) ++ tp->pci_clock_ctrl |= CLOCK_CTRL_DELAY_PCI_GRANT; ++ tw32_f(TG3PCI_CLOCK_CTRL, tp->pci_clock_ctrl); ++ } ++ ++ if (tg3_chip_rev_id(tp) == CHIPREV_ID_5704_A0 && ++ tg3_flag(tp, PCIX_MODE)) { ++ val = tr32(TG3PCI_PCISTATE); ++ val |= PCISTATE_RETRY_SAME_DMA; ++ tw32(TG3PCI_PCISTATE, val); ++ } ++ ++ if (tg3_flag(tp, ENABLE_APE)) { ++ /* Allow reads and writes to the ++ * APE register and memory space. ++ */ ++ val = tr32(TG3PCI_PCISTATE); ++ val |= PCISTATE_ALLOW_APE_CTLSPC_WR | ++ PCISTATE_ALLOW_APE_SHMEM_WR | ++ PCISTATE_ALLOW_APE_PSPACE_WR; ++ tw32(TG3PCI_PCISTATE, val); ++ } ++ ++ if (tg3_chip_rev(tp) == CHIPREV_5704_BX) { ++ /* Enable some hw fixes. */ ++ val = tr32(TG3PCI_MSI_DATA); ++ val |= (1 << 26) | (1 << 28) | (1 << 29); ++ tw32(TG3PCI_MSI_DATA, val); ++ } ++ ++ /* Descriptor ring init may make accesses to the ++ * NIC SRAM area to setup the TX descriptors, so we ++ * can only do this after the hardware has been ++ * successfully reset. ++ */ ++ err = tg3_init_rings(tp); ++ if (err) ++ return err; ++ ++ if (tg3_flag(tp, 57765_PLUS)) { ++ val = tr32(TG3PCI_DMA_RW_CTRL) & ++ ~DMA_RWCTRL_DIS_CACHE_ALIGNMENT; ++ if (tg3_chip_rev_id(tp) == CHIPREV_ID_57765_A0) ++ val &= ~DMA_RWCTRL_CRDRDR_RDMA_MRRS_MSK; ++ if (!tg3_flag(tp, 57765_CLASS) && ++ tg3_asic_rev(tp) != ASIC_REV_5717 && ++ tg3_asic_rev(tp) != ASIC_REV_5762) ++ val |= DMA_RWCTRL_TAGGED_STAT_WA; ++ tw32(TG3PCI_DMA_RW_CTRL, val | tp->dma_rwctrl); ++ } else if (tg3_asic_rev(tp) != ASIC_REV_5784 && ++ tg3_asic_rev(tp) != ASIC_REV_5761) { ++ /* This value is determined during the probe time DMA ++ * engine test, tg3_test_dma. ++ */ ++ tw32(TG3PCI_DMA_RW_CTRL, tp->dma_rwctrl); ++ } ++ ++ tp->grc_mode &= ~(GRC_MODE_HOST_SENDBDS | ++ GRC_MODE_4X_NIC_SEND_RINGS | ++ GRC_MODE_NO_TX_PHDR_CSUM | ++ GRC_MODE_NO_RX_PHDR_CSUM); ++ tp->grc_mode |= GRC_MODE_HOST_SENDBDS; ++ ++ /* Pseudo-header checksum is done by hardware logic and not ++ * the offload processers, so make the chip do the pseudo- ++ * header checksums on receive. For transmit it is more ++ * convenient to do the pseudo-header checksum in software ++ * as Linux does that on transmit for us in all cases. ++ */ ++ tp->grc_mode |= GRC_MODE_NO_TX_PHDR_CSUM; ++ ++ val = GRC_MODE_IRQ_ON_MAC_ATTN | GRC_MODE_HOST_STACKUP; ++ if (tp->rxptpctl) ++ tw32(TG3_RX_PTP_CTL, ++ tp->rxptpctl | TG3_RX_PTP_CTL_HWTS_INTERLOCK); ++ ++ if (tg3_flag(tp, PTP_CAPABLE)) ++ val |= GRC_MODE_TIME_SYNC_ENABLE; ++ ++#ifdef TG3_VMWARE_NETQ_ENABLE ++ if (tg3_flag(tp, ENABLE_IOV)) ++ val |= GRC_MODE_IOV_ENABLE; ++#endif ++ ++ tw32(GRC_MODE, tp->grc_mode | val); ++ ++ /* Setup the timer prescalar register. Clock is always 66Mhz. */ ++ val = tr32(GRC_MISC_CFG); ++ val &= ~0xff; ++ val |= (65 << GRC_MISC_CFG_PRESCALAR_SHIFT); ++ tw32(GRC_MISC_CFG, val); ++ ++ /* Initialize MBUF/DESC pool. */ ++ if (tg3_flag(tp, 5750_PLUS)) { ++ /* Do nothing. */ ++ } else if (tg3_asic_rev(tp) != ASIC_REV_5705) { ++ tw32(BUFMGR_MB_POOL_ADDR, NIC_SRAM_MBUF_POOL_BASE); ++ if (tg3_asic_rev(tp) == ASIC_REV_5704) ++ tw32(BUFMGR_MB_POOL_SIZE, NIC_SRAM_MBUF_POOL_SIZE64); ++ else ++ tw32(BUFMGR_MB_POOL_SIZE, NIC_SRAM_MBUF_POOL_SIZE96); ++ tw32(BUFMGR_DMA_DESC_POOL_ADDR, NIC_SRAM_DMA_DESC_POOL_BASE); ++ tw32(BUFMGR_DMA_DESC_POOL_SIZE, NIC_SRAM_DMA_DESC_POOL_SIZE); ++ } else if (tg3_flag(tp, TSO_CAPABLE)) { ++#if TG3_TSO_SUPPORT != 0 ++ int fw_len; ++ ++ fw_len = (TG3_TSO5_FW_TEXT_LEN + ++ TG3_TSO5_FW_RODATA_LEN + ++ TG3_TSO5_FW_DATA_LEN + ++ TG3_TSO5_FW_SBSS_LEN + ++ TG3_TSO5_FW_BSS_LEN); ++ fw_len = (fw_len + (0x80 - 1)) & ~(0x80 - 1); ++ tw32(BUFMGR_MB_POOL_ADDR, ++ NIC_SRAM_MBUF_POOL_BASE5705 + fw_len); ++ tw32(BUFMGR_MB_POOL_SIZE, ++ NIC_SRAM_MBUF_POOL_SIZE5705 - fw_len - 0xa00); ++#endif ++ } ++ ++ if (tp->dev->mtu <= ETH_DATA_LEN) { ++ tw32(BUFMGR_MB_RDMA_LOW_WATER, ++ tp->bufmgr_config.mbuf_read_dma_low_water); ++ tw32(BUFMGR_MB_MACRX_LOW_WATER, ++ tp->bufmgr_config.mbuf_mac_rx_low_water); ++ tw32(BUFMGR_MB_HIGH_WATER, ++ tp->bufmgr_config.mbuf_high_water); ++ } else { ++ tw32(BUFMGR_MB_RDMA_LOW_WATER, ++ tp->bufmgr_config.mbuf_read_dma_low_water_jumbo); ++ tw32(BUFMGR_MB_MACRX_LOW_WATER, ++ tp->bufmgr_config.mbuf_mac_rx_low_water_jumbo); ++ tw32(BUFMGR_MB_HIGH_WATER, ++ tp->bufmgr_config.mbuf_high_water_jumbo); ++ } ++ tw32(BUFMGR_DMA_LOW_WATER, ++ tp->bufmgr_config.dma_low_water); ++ tw32(BUFMGR_DMA_HIGH_WATER, ++ tp->bufmgr_config.dma_high_water); ++ ++ val = BUFMGR_MODE_ENABLE | BUFMGR_MODE_ATTN_ENABLE; ++ if (tg3_asic_rev(tp) == ASIC_REV_5719) ++ val |= BUFMGR_MODE_NO_TX_UNDERRUN; ++ if (tg3_asic_rev(tp) == ASIC_REV_5717 || ++ tg3_asic_rev(tp) == ASIC_REV_5762 || ++ tg3_chip_rev_id(tp) == CHIPREV_ID_5719_A0 || ++ tg3_chip_rev_id(tp) == CHIPREV_ID_5720_A0) ++ val |= BUFMGR_MODE_MBLOW_ATTN_ENAB; ++ tw32(BUFMGR_MODE, val); ++ for (i = 0; i < 2000; i++) { ++ if (tr32(BUFMGR_MODE) & BUFMGR_MODE_ENABLE) ++ break; ++ udelay(10); ++ } ++ if (i >= 2000) { ++ netdev_err(tp->dev, "%s cannot enable BUFMGR\n", __func__); ++ return -ENODEV; ++ } ++ ++ if (tg3_chip_rev_id(tp) == CHIPREV_ID_5906_A1) ++ tw32(ISO_PKT_TX, (tr32(ISO_PKT_TX) & ~0x3) | 0x2); ++ ++ tg3_setup_rxbd_thresholds(tp); ++ ++ /* Initialize TG3_BDINFO's at: ++ * RCVDBDI_STD_BD: standard eth size rx ring ++ * RCVDBDI_JUMBO_BD: jumbo frame rx ring ++ * RCVDBDI_MINI_BD: small frame rx ring (??? does not work) ++ * ++ * like so: ++ * TG3_BDINFO_HOST_ADDR: high/low parts of DMA address of ring ++ * TG3_BDINFO_MAXLEN_FLAGS: (rx max buffer size << 16) | ++ * ring attribute flags ++ * TG3_BDINFO_NIC_ADDR: location of descriptors in nic SRAM ++ * ++ * Standard receive ring @ NIC_SRAM_RX_BUFFER_DESC, 512 entries. ++ * Jumbo receive ring @ NIC_SRAM_RX_JUMBO_BUFFER_DESC, 256 entries. ++ * ++ * The size of each ring is fixed in the firmware, but the location is ++ * configurable. ++ */ ++ tw32(RCVDBDI_STD_BD + TG3_BDINFO_HOST_ADDR + TG3_64BIT_REG_HIGH, ++ ((u64) tpr->rx_std_mapping >> 32)); ++ tw32(RCVDBDI_STD_BD + TG3_BDINFO_HOST_ADDR + TG3_64BIT_REG_LOW, ++ ((u64) tpr->rx_std_mapping & 0xffffffff)); ++ if (!tg3_flag(tp, 5717_PLUS)) ++ tw32(RCVDBDI_STD_BD + TG3_BDINFO_NIC_ADDR, ++ NIC_SRAM_RX_BUFFER_DESC); ++ ++ /* Disable the mini ring */ ++ if (!tg3_flag(tp, 5705_PLUS)) ++ tw32(RCVDBDI_MINI_BD + TG3_BDINFO_MAXLEN_FLAGS, ++ BDINFO_FLAGS_DISABLED); ++ ++ /* Program the jumbo buffer descriptor ring control ++ * blocks on those devices that have them. ++ */ ++ if (tg3_chip_rev_id(tp) == CHIPREV_ID_5719_A0 || ++ (tg3_flag(tp, JUMBO_CAPABLE) && !tg3_flag(tp, 5780_CLASS))) { ++ ++ if (tg3_flag(tp, JUMBO_RING_ENABLE)) { ++ tw32(RCVDBDI_JUMBO_BD + TG3_BDINFO_HOST_ADDR + TG3_64BIT_REG_HIGH, ++ ((u64) tpr->rx_jmb_mapping >> 32)); ++ tw32(RCVDBDI_JUMBO_BD + TG3_BDINFO_HOST_ADDR + TG3_64BIT_REG_LOW, ++ ((u64) tpr->rx_jmb_mapping & 0xffffffff)); ++ val = TG3_RX_JMB_RING_SIZE(tp) << ++ BDINFO_FLAGS_MAXLEN_SHIFT; ++ tw32(RCVDBDI_JUMBO_BD + TG3_BDINFO_MAXLEN_FLAGS, ++ val | BDINFO_FLAGS_USE_EXT_RECV); ++ if (!tg3_flag(tp, USE_JUMBO_BDFLAG) || ++ tg3_flag(tp, 57765_CLASS) || ++ tg3_asic_rev(tp) == ASIC_REV_5762) ++ tw32(RCVDBDI_JUMBO_BD + TG3_BDINFO_NIC_ADDR, ++ NIC_SRAM_RX_JUMBO_BUFFER_DESC); ++ } else { ++ tw32(RCVDBDI_JUMBO_BD + TG3_BDINFO_MAXLEN_FLAGS, ++ BDINFO_FLAGS_DISABLED); ++ } ++ ++ if (tg3_flag(tp, 57765_PLUS)) { ++ val = TG3_RX_STD_RING_SIZE(tp); ++ val <<= BDINFO_FLAGS_MAXLEN_SHIFT; ++ val |= (TG3_RX_STD_DMA_SZ << 2); ++ } else ++ val = TG3_RX_STD_DMA_SZ << BDINFO_FLAGS_MAXLEN_SHIFT; ++ } else ++ val = TG3_RX_STD_MAX_SIZE_5700 << BDINFO_FLAGS_MAXLEN_SHIFT; ++ ++ tw32(RCVDBDI_STD_BD + TG3_BDINFO_MAXLEN_FLAGS, val); ++ ++ tpr->rx_std_prod_idx = tp->rx_pending; ++ tw32_rx_mbox(TG3_RX_STD_PROD_IDX_REG, tpr->rx_std_prod_idx); ++ ++ tpr->rx_jmb_prod_idx = ++ tg3_flag(tp, JUMBO_RING_ENABLE) ? tp->rx_jumbo_pending : 0; ++ tw32_rx_mbox(TG3_RX_JMB_PROD_IDX_REG, tpr->rx_jmb_prod_idx); ++ ++ tg3_rings_reset(tp); ++ ++ /* Initialize MAC address and backoff seed. */ ++ __tg3_set_mac_addr(tp, false); ++ ++ /* MTU + ethernet header + FCS + optional VLAN tag */ ++ tw32(MAC_RX_MTU_SIZE, ++ tp->dev->mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN); ++ ++ /* The slot time is changed by tg3_setup_phy if we ++ * run at gigabit with half duplex. ++ */ ++ val = (2 << TX_LENGTHS_IPG_CRS_SHIFT) | ++ (6 << TX_LENGTHS_IPG_SHIFT) | ++ (32 << TX_LENGTHS_SLOT_TIME_SHIFT); ++ ++ if (tg3_asic_rev(tp) == ASIC_REV_5720 || ++ tg3_asic_rev(tp) == ASIC_REV_5762) ++ val |= tr32(MAC_TX_LENGTHS) & ++ (TX_LENGTHS_JMB_FRM_LEN_MSK | ++ TX_LENGTHS_CNT_DWN_VAL_MSK); ++ ++ tw32(MAC_TX_LENGTHS, val); ++ ++ /* Receive rules. */ ++ tw32(MAC_RCV_RULE_CFG, RCV_RULE_CFG_DEFAULT_CLASS); ++ tw32(RCVLPC_CONFIG, 0x0181); ++ ++ /* Calculate RDMAC_MODE setting early, we need it to determine ++ * the RCVLPC_STATE_ENABLE mask. ++ */ ++ rdmac_mode = (RDMAC_MODE_ENABLE | RDMAC_MODE_TGTABORT_ENAB | ++ RDMAC_MODE_MSTABORT_ENAB | RDMAC_MODE_PARITYERR_ENAB | ++ RDMAC_MODE_ADDROFLOW_ENAB | RDMAC_MODE_FIFOOFLOW_ENAB | ++ RDMAC_MODE_FIFOURUN_ENAB | RDMAC_MODE_FIFOOREAD_ENAB | ++ RDMAC_MODE_LNGREAD_ENAB); ++ ++ if (tg3_asic_rev(tp) == ASIC_REV_5717) ++ rdmac_mode |= RDMAC_MODE_MULT_DMA_RD_DIS; ++ ++ if (tg3_asic_rev(tp) == ASIC_REV_5784 || ++ tg3_asic_rev(tp) == ASIC_REV_5785 || ++ tg3_asic_rev(tp) == ASIC_REV_57780) ++ rdmac_mode |= RDMAC_MODE_BD_SBD_CRPT_ENAB | ++ RDMAC_MODE_MBUF_RBD_CRPT_ENAB | ++ RDMAC_MODE_MBUF_SBD_CRPT_ENAB; ++ ++ if (tg3_asic_rev(tp) == ASIC_REV_5705 && ++ tg3_chip_rev_id(tp) != CHIPREV_ID_5705_A0) { ++ if (tg3_flag(tp, TSO_CAPABLE) && ++ tg3_asic_rev(tp) == ASIC_REV_5705) { ++ rdmac_mode |= RDMAC_MODE_FIFO_SIZE_128; ++ } else if (!(tr32(TG3PCI_PCISTATE) & PCISTATE_BUS_SPEED_HIGH) && ++ !tg3_flag(tp, IS_5788)) { ++ rdmac_mode |= RDMAC_MODE_FIFO_LONG_BURST; ++ } ++ } ++ ++ if (tg3_flag(tp, PCI_EXPRESS)) ++ rdmac_mode |= RDMAC_MODE_FIFO_LONG_BURST; ++ ++ if (tg3_asic_rev(tp) == ASIC_REV_57766) { ++ tp->dma_limit = 0; ++ ++#if defined(__VMKLNX__) ++ if (tg3_flag(tp, TSO_CAPABLE)) ++ tp->dma_limit = TG3_TX_BD_DMA_MAX_32K; ++#endif ++ if (tp->dev->mtu <= ETH_DATA_LEN) ++ rdmac_mode |= RDMAC_MODE_JMB_2K_MMRR; ++ } ++ ++ /* Enables IPV4 checksum offload as well. */ ++ if (tg3_flag(tp, HW_TSO_1) || ++ tg3_flag(tp, HW_TSO_2) || ++ tg3_flag(tp, HW_TSO_3)) ++ rdmac_mode |= RDMAC_MODE_IPV4_LSO_EN; ++ ++ /* Enables IPV6 checksum offload as well. */ ++ if (tg3_flag(tp, 57765_PLUS) || ++ tg3_asic_rev(tp) == ASIC_REV_5785 || ++ tg3_asic_rev(tp) == ASIC_REV_57780) ++ rdmac_mode |= RDMAC_MODE_IPV6_LSO_EN; ++ ++ if (tg3_asic_rev(tp) == ASIC_REV_5720 || ++ tg3_asic_rev(tp) == ASIC_REV_5762) ++ rdmac_mode |= tr32(RDMAC_MODE) & RDMAC_MODE_H2BNC_VLAN_DET; ++ ++ if (tg3_asic_rev(tp) == ASIC_REV_5761 || ++ tg3_asic_rev(tp) == ASIC_REV_5784 || ++ tg3_asic_rev(tp) == ASIC_REV_5785 || ++ tg3_asic_rev(tp) == ASIC_REV_57780 || ++ tg3_flag(tp, 57765_PLUS)) { ++ u32 tgtreg; ++ ++ if (tg3_asic_rev(tp) == ASIC_REV_5762) ++ tgtreg = TG3_RDMA_RSRVCTRL_REG2; ++ else ++ tgtreg = TG3_RDMA_RSRVCTRL_REG; ++ ++ val = tr32(tgtreg); ++ if (tg3_chip_rev_id(tp) == CHIPREV_ID_5719_A0 || ++ tg3_asic_rev(tp) == ASIC_REV_5762) { ++ val &= ~(TG3_RDMA_RSRVCTRL_TXMRGN_MASK | ++ TG3_RDMA_RSRVCTRL_FIFO_LWM_MASK | ++ TG3_RDMA_RSRVCTRL_FIFO_HWM_MASK); ++ val |= TG3_RDMA_RSRVCTRL_TXMRGN_320B | ++ TG3_RDMA_RSRVCTRL_FIFO_LWM_1_5K | ++ TG3_RDMA_RSRVCTRL_FIFO_HWM_1_5K; ++ } ++ tw32(tgtreg, val | TG3_RDMA_RSRVCTRL_FIFO_OFLW_FIX); ++ } ++ ++ if (tg3_asic_rev(tp) == ASIC_REV_5719 || ++ tg3_asic_rev(tp) == ASIC_REV_5720 || ++ tg3_asic_rev(tp) == ASIC_REV_5762) { ++ u32 tgtreg; ++ ++ if (tg3_asic_rev(tp) == ASIC_REV_5762) ++ tgtreg = TG3_LSO_RD_DMA_CRPTEN_CTRL2; ++ else ++ tgtreg = TG3_LSO_RD_DMA_CRPTEN_CTRL; ++ ++ val = tr32(tgtreg); ++ tw32(tgtreg, val | ++ TG3_LSO_RD_DMA_CRPTEN_CTRL_BLEN_BD_4K | ++ TG3_LSO_RD_DMA_CRPTEN_CTRL_BLEN_LSO_4K); ++ } ++ ++ /* Receive/send statistics. */ ++ if (tg3_flag(tp, 5750_PLUS)) { ++ val = tr32(RCVLPC_STATS_ENABLE); ++ val &= ~RCVLPC_STATSENAB_DACK_FIX; ++ tw32(RCVLPC_STATS_ENABLE, val); ++ } else if ((rdmac_mode & RDMAC_MODE_FIFO_SIZE_128) && ++ tg3_flag(tp, TSO_CAPABLE)) { ++ val = tr32(RCVLPC_STATS_ENABLE); ++ val &= ~RCVLPC_STATSENAB_LNGBRST_RFIX; ++ tw32(RCVLPC_STATS_ENABLE, val); ++ } else { ++ tw32(RCVLPC_STATS_ENABLE, 0xffffff); ++ } ++ tw32(RCVLPC_STATSCTRL, RCVLPC_STATSCTRL_ENABLE); ++ tw32(SNDDATAI_STATSENAB, 0xffffff); ++ tw32(SNDDATAI_STATSCTRL, ++ (SNDDATAI_SCTRL_ENABLE | ++ SNDDATAI_SCTRL_FASTUPD)); ++ ++ /* Setup host coalescing engine. */ ++ tw32(HOSTCC_MODE, 0); ++ for (i = 0; i < 2000; i++) { ++ if (!(tr32(HOSTCC_MODE) & HOSTCC_MODE_ENABLE)) ++ break; ++ udelay(10); ++ } ++ ++ __tg3_set_coalesce(tp, &tp->coal); ++ ++ if (!tg3_flag(tp, 5705_PLUS)) { ++ /* Status/statistics block address. See tg3_timer, ++ * the tg3_periodic_fetch_stats call there, and ++ * tg3_get_stats to see how this works for 5705/5750 chips. ++ */ ++ tw32(HOSTCC_STATS_BLK_HOST_ADDR + TG3_64BIT_REG_HIGH, ++ ((u64) tp->stats_mapping >> 32)); ++ tw32(HOSTCC_STATS_BLK_HOST_ADDR + TG3_64BIT_REG_LOW, ++ ((u64) tp->stats_mapping & 0xffffffff)); ++ tw32(HOSTCC_STATS_BLK_NIC_ADDR, NIC_SRAM_STATS_BLK); ++ ++ tw32(HOSTCC_STATUS_BLK_NIC_ADDR, NIC_SRAM_STATUS_BLK); ++ ++ /* Clear statistics and status block memory areas */ ++ for (i = NIC_SRAM_STATS_BLK; ++ i < NIC_SRAM_STATUS_BLK + TG3_HW_STATUS_SIZE; ++ i += sizeof(u32)) { ++ tg3_write_mem(tp, i, 0); ++ udelay(40); ++ } ++ } ++ ++ tw32(HOSTCC_MODE, HOSTCC_MODE_ENABLE | tp->coalesce_mode); ++ ++ tw32(RCVCC_MODE, RCVCC_MODE_ENABLE | RCVCC_MODE_ATTN_ENABLE); ++ tw32(RCVLPC_MODE, RCVLPC_MODE_ENABLE); ++ if (!tg3_flag(tp, 5705_PLUS)) ++ tw32(RCVLSC_MODE, RCVLSC_MODE_ENABLE | RCVLSC_MODE_ATTN_ENABLE); ++ ++ if (tp->phy_flags & TG3_PHYFLG_MII_SERDES) { ++ tp->phy_flags &= ~TG3_PHYFLG_PARALLEL_DETECT; ++ /* reset to prevent losing 1st rx packet intermittently */ ++ tw32_f(MAC_RX_MODE, RX_MODE_RESET); ++ udelay(10); ++ } ++ ++ tp->mac_mode |= MAC_MODE_TXSTAT_ENABLE | MAC_MODE_RXSTAT_ENABLE | ++ MAC_MODE_TDE_ENABLE | MAC_MODE_RDE_ENABLE | ++ MAC_MODE_FHDE_ENABLE; ++ if (tg3_flag(tp, ENABLE_APE)) ++ tp->mac_mode |= MAC_MODE_APE_TX_EN | MAC_MODE_APE_RX_EN; ++ if (!tg3_flag(tp, 5705_PLUS) && ++ !(tp->phy_flags & TG3_PHYFLG_PHY_SERDES) && ++ tg3_asic_rev(tp) != ASIC_REV_5700) ++ tp->mac_mode |= MAC_MODE_LINK_POLARITY; ++ tw32_f(MAC_MODE, tp->mac_mode | MAC_MODE_RXSTAT_CLEAR | MAC_MODE_TXSTAT_CLEAR); ++ udelay(40); ++ ++ /* tp->grc_local_ctrl is partially set up during tg3_get_invariants(). ++ * If TG3_FLAG_IS_NIC is zero, we should read the ++ * register to preserve the GPIO settings for LOMs. The GPIOs, ++ * whether used as inputs or outputs, are set by boot code after ++ * reset. ++ */ ++ if (!tg3_flag(tp, IS_NIC)) { ++ u32 gpio_mask; ++ ++ gpio_mask = GRC_LCLCTRL_GPIO_OE0 | GRC_LCLCTRL_GPIO_OE1 | ++ GRC_LCLCTRL_GPIO_OE2 | GRC_LCLCTRL_GPIO_OUTPUT0 | ++ GRC_LCLCTRL_GPIO_OUTPUT1 | GRC_LCLCTRL_GPIO_OUTPUT2; ++ ++ if (tg3_asic_rev(tp) == ASIC_REV_5752) ++ gpio_mask |= GRC_LCLCTRL_GPIO_OE3 | ++ GRC_LCLCTRL_GPIO_OUTPUT3; ++ ++ if (tg3_asic_rev(tp) == ASIC_REV_5755) ++ gpio_mask |= GRC_LCLCTRL_GPIO_UART_SEL; ++ ++ tp->grc_local_ctrl &= ~gpio_mask; ++ tp->grc_local_ctrl |= tr32(GRC_LOCAL_CTRL) & gpio_mask; ++ ++ /* GPIO1 must be driven high for eeprom write protect */ ++ if (tg3_flag(tp, EEPROM_WRITE_PROT)) ++ tp->grc_local_ctrl |= (GRC_LCLCTRL_GPIO_OE1 | ++ GRC_LCLCTRL_GPIO_OUTPUT1); ++ } ++ tw32_f(GRC_LOCAL_CTRL, tp->grc_local_ctrl); ++ udelay(100); ++ ++ if (tg3_flag(tp, USING_MSIX)) { ++ val = tr32(MSGINT_MODE); ++ val |= MSGINT_MODE_ENABLE; ++ if (tp->irq_cnt > 1) ++ val |= MSGINT_MODE_MULTIVEC_EN; ++ if (!tg3_flag(tp, 1SHOT_MSI)) ++ val |= MSGINT_MODE_ONE_SHOT_DISABLE; ++ tw32(MSGINT_MODE, val); ++ } ++ ++ if (!tg3_flag(tp, 5705_PLUS)) { ++ tw32_f(DMAC_MODE, DMAC_MODE_ENABLE); ++ udelay(40); ++ } ++ ++ val = (WDMAC_MODE_ENABLE | WDMAC_MODE_TGTABORT_ENAB | ++ WDMAC_MODE_MSTABORT_ENAB | WDMAC_MODE_PARITYERR_ENAB | ++ WDMAC_MODE_ADDROFLOW_ENAB | WDMAC_MODE_FIFOOFLOW_ENAB | ++ WDMAC_MODE_FIFOURUN_ENAB | WDMAC_MODE_FIFOOREAD_ENAB | ++ WDMAC_MODE_LNGREAD_ENAB); ++ ++ if (tg3_asic_rev(tp) == ASIC_REV_5705 && ++ tg3_chip_rev_id(tp) != CHIPREV_ID_5705_A0) { ++ if (tg3_flag(tp, TSO_CAPABLE) && ++ (tg3_chip_rev_id(tp) == CHIPREV_ID_5705_A1 || ++ tg3_chip_rev_id(tp) == CHIPREV_ID_5705_A2)) { ++ /* nothing */ ++ } else if (!(tr32(TG3PCI_PCISTATE) & PCISTATE_BUS_SPEED_HIGH) && ++ !tg3_flag(tp, IS_5788)) { ++ val |= WDMAC_MODE_RX_ACCEL; ++ } ++ } ++ ++ /* Enable host coalescing bug fix */ ++ if (tg3_flag(tp, 5755_PLUS)) ++ val |= WDMAC_MODE_STATUS_TAG_FIX; ++ ++ if (tg3_asic_rev(tp) == ASIC_REV_5785) ++ val |= WDMAC_MODE_BURST_ALL_DATA; ++ ++ tw32_f(WDMAC_MODE, val); ++ udelay(40); ++ ++ if (tg3_flag(tp, PCIX_MODE)) { ++ u16 pcix_cmd; ++ ++ pci_read_config_word(tp->pdev, tp->pcix_cap + PCI_X_CMD, ++ &pcix_cmd); ++ if (tg3_asic_rev(tp) == ASIC_REV_5703) { ++ pcix_cmd &= ~PCI_X_CMD_MAX_READ; ++ pcix_cmd |= PCI_X_CMD_READ_2K; ++ } else if (tg3_asic_rev(tp) == ASIC_REV_5704) { ++ pcix_cmd &= ~(PCI_X_CMD_MAX_SPLIT | PCI_X_CMD_MAX_READ); ++ pcix_cmd |= PCI_X_CMD_READ_2K; ++ } ++ pci_write_config_word(tp->pdev, tp->pcix_cap + PCI_X_CMD, ++ pcix_cmd); ++ } ++ ++ tw32_f(RDMAC_MODE, rdmac_mode); ++ udelay(40); ++ ++ if (tg3_asic_rev(tp) == ASIC_REV_5719 || ++ tg3_asic_rev(tp) == ASIC_REV_5720) { ++ for (i = 0; i < TG3_NUM_RDMA_CHANNELS; i++) { ++ if (tr32(TG3_RDMA_LENGTH + (i << 2)) > TG3_MAX_MTU(tp)) ++ break; ++ } ++ if (i < TG3_NUM_RDMA_CHANNELS) { ++ val = tr32(TG3_LSO_RD_DMA_CRPTEN_CTRL); ++ val |= tg3_lso_rd_dma_workaround_bit(tp); ++ tw32(TG3_LSO_RD_DMA_CRPTEN_CTRL, val); ++ tg3_flag_set(tp, 5719_5720_RDMA_BUG); ++ } ++ } ++ ++ tw32(RCVDCC_MODE, RCVDCC_MODE_ENABLE | RCVDCC_MODE_ATTN_ENABLE); ++ if (!tg3_flag(tp, 5705_PLUS)) ++ tw32(MBFREE_MODE, MBFREE_MODE_ENABLE); ++ ++ if (tg3_asic_rev(tp) == ASIC_REV_5761) ++ tw32(SNDDATAC_MODE, ++ SNDDATAC_MODE_ENABLE | SNDDATAC_MODE_CDELAY); ++ else ++ tw32(SNDDATAC_MODE, SNDDATAC_MODE_ENABLE); ++ ++ tw32(SNDBDC_MODE, SNDBDC_MODE_ENABLE | SNDBDC_MODE_ATTN_ENABLE); ++#ifdef TG3_VMWARE_NETQ_ENABLE ++ val = RCVBDI_MODE_ENABLE; ++ if (!tg3_flag(tp, ENABLE_IOV)) ++ val |= RCVBDI_MODE_RCB_ATTN_ENAB; ++ tw32(RCVBDI_MODE, val); ++ /* No packet drop if there is no RBDs. H/w will continues to service ++ RX packets for particular VMQ until all packets are drained. */ ++ val = RCVDBDI_MODE_ENABLE | RCVDBDI_MODE_INV_RING_SZ | (2<<13); ++#else ++ tw32(RCVBDI_MODE, RCVBDI_MODE_ENABLE | RCVBDI_MODE_RCB_ATTN_ENAB); ++ val = RCVDBDI_MODE_ENABLE | RCVDBDI_MODE_INV_RING_SZ; ++#endif ++ if (tg3_flag(tp, LRG_PROD_RING_CAP)) ++ val |= RCVDBDI_MODE_LRG_RING_SZ; ++ tw32(RCVDBDI_MODE, val); ++ tw32(SNDDATAI_MODE, SNDDATAI_MODE_ENABLE); ++#if TG3_TSO_SUPPORT != 0 ++ if (tg3_flag(tp, HW_TSO_1) || ++ tg3_flag(tp, HW_TSO_2) || ++ tg3_flag(tp, HW_TSO_3)) ++ tw32(SNDDATAI_MODE, SNDDATAI_MODE_ENABLE | 0x8); ++#endif ++ val = SNDBDI_MODE_ENABLE | SNDBDI_MODE_ATTN_ENABLE; ++ if (tg3_flag(tp, ENABLE_TSS)) ++ val |= SNDBDI_MODE_MULTI_TXQ_EN; ++ tw32(SNDBDI_MODE, val); ++ tw32(SNDBDS_MODE, SNDBDS_MODE_ENABLE | SNDBDS_MODE_ATTN_ENABLE); ++ ++ if (tg3_chip_rev_id(tp) == CHIPREV_ID_5701_A0) { ++ err = tg3_load_5701_a0_firmware_fix(tp); ++ if (err) ++ return err; ++ } ++ ++ if (tg3_asic_rev(tp) == ASIC_REV_57766) { ++ /* Ignore any errors for the firmware download. If download ++ * fails, the device will operate with EEE disabled ++ */ ++ tg3_load_57766_firmware(tp); ++ } ++ ++#if TG3_TSO_SUPPORT != 0 ++ if (tg3_flag(tp, TSO_CAPABLE)) { ++ err = tg3_load_tso_firmware(tp); ++ if (err) ++ return err; ++ } ++#endif ++ ++ tp->tx_mode = TX_MODE_ENABLE; ++ ++ if (tg3_flag(tp, 5755_PLUS) || ++ tg3_asic_rev(tp) == ASIC_REV_5906) ++ tp->tx_mode |= TX_MODE_MBUF_LOCKUP_FIX; ++ ++ if (tg3_asic_rev(tp) == ASIC_REV_5720 || ++ tg3_asic_rev(tp) == ASIC_REV_5762) { ++ val = TX_MODE_JMB_FRM_LEN | TX_MODE_CNT_DN_MODE; ++ tp->tx_mode &= ~val; ++ tp->tx_mode |= tr32(MAC_TX_MODE) & val; ++ } ++ ++ tw32_f(MAC_TX_MODE, tp->tx_mode); ++ udelay(100); ++ ++#ifdef TG3_VMWARE_NETQ_ENABLE ++ tg3_netq_restore(tp); ++#endif ++ ++ if (tg3_flag(tp, ENABLE_RSS)) { ++ tg3_rss_write_indir_tbl(tp); ++ ++ /* Setup the "secret" hash key. */ ++ tw32(MAC_RSS_HASH_KEY_0, 0x5f865437); ++ tw32(MAC_RSS_HASH_KEY_1, 0xe4ac62cc); ++ tw32(MAC_RSS_HASH_KEY_2, 0x50103a45); ++ tw32(MAC_RSS_HASH_KEY_3, 0x36621985); ++ tw32(MAC_RSS_HASH_KEY_4, 0xbf14c0e8); ++ tw32(MAC_RSS_HASH_KEY_5, 0x1bc27a1e); ++ tw32(MAC_RSS_HASH_KEY_6, 0x84f4b556); ++ tw32(MAC_RSS_HASH_KEY_7, 0x094ea6fe); ++ tw32(MAC_RSS_HASH_KEY_8, 0x7dda01e7); ++ tw32(MAC_RSS_HASH_KEY_9, 0xc04d7481); ++ } ++ ++ tp->rx_mode = RX_MODE_ENABLE; ++ if (tg3_flag(tp, 5755_PLUS)) ++ tp->rx_mode |= RX_MODE_IPV6_CSUM_ENABLE; ++ ++ if (tg3_asic_rev(tp) == ASIC_REV_5762) ++ tp->rx_mode |= RX_MODE_IPV4_FRAG_FIX; ++ ++ if (tg3_flag(tp, ENABLE_RSS)) ++ tp->rx_mode |= RX_MODE_RSS_ENABLE | ++ RX_MODE_RSS_ITBL_HASH_BITS_7 | ++ RX_MODE_RSS_IPV6_HASH_EN | ++ RX_MODE_RSS_TCP_IPV6_HASH_EN | ++ RX_MODE_RSS_IPV4_HASH_EN | ++ RX_MODE_RSS_TCP_IPV4_HASH_EN; ++ ++ tw32_f(MAC_RX_MODE, tp->rx_mode); ++ udelay(10); ++ ++ tw32(MAC_LED_CTRL, tp->led_ctrl); ++ ++ tw32(MAC_MI_STAT, MAC_MI_STAT_LNKSTAT_ATTN_ENAB); ++ if (tp->phy_flags & TG3_PHYFLG_PHY_SERDES) { ++ tw32_f(MAC_RX_MODE, RX_MODE_RESET); ++ udelay(10); ++ } ++ tw32_f(MAC_RX_MODE, tp->rx_mode); ++ udelay(10); ++ ++ if (tp->phy_flags & TG3_PHYFLG_PHY_SERDES) { ++ if ((tg3_asic_rev(tp) == ASIC_REV_5704) && ++ !(tp->phy_flags & TG3_PHYFLG_SERDES_PREEMPHASIS)) { ++ /* Set drive transmission level to 1.2V */ ++ /* only if the signal pre-emphasis bit is not set */ ++ val = tr32(MAC_SERDES_CFG); ++ val &= 0xfffff000; ++ val |= 0x880; ++ tw32(MAC_SERDES_CFG, val); ++ } ++ if (tg3_chip_rev_id(tp) == CHIPREV_ID_5703_A1) ++ tw32(MAC_SERDES_CFG, 0x616000); ++ } ++ ++ /* Prevent chip from dropping frames when flow control ++ * is enabled. ++ */ ++ if (tg3_flag(tp, 57765_CLASS)) ++ val = 1; ++ else ++ val = 2; ++ tw32_f(MAC_LOW_WMARK_MAX_RX_FRAME, val); ++ ++ if (tg3_asic_rev(tp) == ASIC_REV_5704 && ++ (tp->phy_flags & TG3_PHYFLG_PHY_SERDES)) { ++ /* Use hardware link auto-negotiation */ ++ tg3_flag_set(tp, HW_AUTONEG); ++ } ++ ++ if ((tp->phy_flags & TG3_PHYFLG_MII_SERDES) && ++ tg3_asic_rev(tp) == ASIC_REV_5714) { ++ u32 tmp; ++ ++ tmp = tr32(SERDES_RX_CTRL); ++ tw32(SERDES_RX_CTRL, tmp | SERDES_RX_SIG_DETECT); ++ tp->grc_local_ctrl &= ~GRC_LCLCTRL_USE_EXT_SIG_DETECT; ++ tp->grc_local_ctrl |= GRC_LCLCTRL_USE_SIG_DETECT; ++ tw32(GRC_LOCAL_CTRL, tp->grc_local_ctrl); ++ } ++ ++ if (!tg3_flag(tp, USE_PHYLIB)) { ++ if (tp->phy_flags & TG3_PHYFLG_IS_LOW_POWER) ++ tp->phy_flags &= ~TG3_PHYFLG_IS_LOW_POWER; ++ ++ err = tg3_setup_phy(tp, false); ++ if (err) ++ return err; ++ ++ if (!(tp->phy_flags & TG3_PHYFLG_PHY_SERDES) && ++ !(tp->phy_flags & TG3_PHYFLG_IS_FET)) { ++ u32 tmp; ++ ++ /* Clear CRC stats. */ ++ if (!tg3_readphy(tp, MII_TG3_TEST1, &tmp)) { ++ tg3_writephy(tp, MII_TG3_TEST1, ++ tmp | MII_TG3_TEST1_CRC_EN); ++ tg3_readphy(tp, MII_TG3_RXR_COUNTERS, &tmp); ++ } ++ } ++ } ++ ++ __tg3_set_rx_mode(tp->dev); ++ ++ /* Initialize receive rules. */ ++ tw32(MAC_RCV_RULE_0, 0xc2000000 & RCV_RULE_DISABLE_MASK); ++ tw32(MAC_RCV_VALUE_0, 0xffffffff & RCV_RULE_DISABLE_MASK); ++ tw32(MAC_RCV_RULE_1, 0x86000004 & RCV_RULE_DISABLE_MASK); ++ tw32(MAC_RCV_VALUE_1, 0xffffffff & RCV_RULE_DISABLE_MASK); ++ ++ if (tg3_flag(tp, 5705_PLUS) && !tg3_flag(tp, 5780_CLASS)) ++ limit = 8; ++ else ++ limit = 16; ++ if (tg3_flag(tp, ENABLE_ASF)) ++ limit -= 4; ++ switch (limit) { ++ case 16: ++ tw32(MAC_RCV_RULE_15, 0); tw32(MAC_RCV_VALUE_15, 0); ++ case 15: ++ tw32(MAC_RCV_RULE_14, 0); tw32(MAC_RCV_VALUE_14, 0); ++ case 14: ++ tw32(MAC_RCV_RULE_13, 0); tw32(MAC_RCV_VALUE_13, 0); ++ case 13: ++ tw32(MAC_RCV_RULE_12, 0); tw32(MAC_RCV_VALUE_12, 0); ++ case 12: ++ tw32(MAC_RCV_RULE_11, 0); tw32(MAC_RCV_VALUE_11, 0); ++ case 11: ++ tw32(MAC_RCV_RULE_10, 0); tw32(MAC_RCV_VALUE_10, 0); ++ case 10: ++ tw32(MAC_RCV_RULE_9, 0); tw32(MAC_RCV_VALUE_9, 0); ++ case 9: ++ tw32(MAC_RCV_RULE_8, 0); tw32(MAC_RCV_VALUE_8, 0); ++ case 8: ++ tw32(MAC_RCV_RULE_7, 0); tw32(MAC_RCV_VALUE_7, 0); ++ case 7: ++ tw32(MAC_RCV_RULE_6, 0); tw32(MAC_RCV_VALUE_6, 0); ++ case 6: ++ tw32(MAC_RCV_RULE_5, 0); tw32(MAC_RCV_VALUE_5, 0); ++ case 5: ++ tw32(MAC_RCV_RULE_4, 0); tw32(MAC_RCV_VALUE_4, 0); ++ case 4: ++ /* tw32(MAC_RCV_RULE_3, 0); tw32(MAC_RCV_VALUE_3, 0); */ ++ case 3: ++ /* tw32(MAC_RCV_RULE_2, 0); tw32(MAC_RCV_VALUE_2, 0); */ ++ case 2: ++ case 1: ++ ++ default: ++ break; ++ } ++ ++ if (tg3_flag(tp, ENABLE_APE)) ++ /* Write our heartbeat update interval to APE. */ ++ tg3_ape_write32(tp, TG3_APE_HOST_HEARTBEAT_INT_MS, ++ APE_HOST_HEARTBEAT_INT_5SEC); ++ ++ tg3_write_sig_post_reset(tp, RESET_KIND_INIT); ++ ++ return 0; ++} ++ ++/* Called at device open time to get the chip ready for ++ * packet processing. Invoked with tp->lock held. ++ */ ++static int tg3_init_hw(struct tg3 *tp, bool reset_phy) ++{ ++ /* Chip may have been just powered on. If so, the boot code may still ++ * be running initialization. Wait for it to finish to avoid races in ++ * accessing the hardware. ++ */ ++ tg3_enable_register_access(tp); ++ tg3_poll_fw(tp); ++ ++ tg3_switch_clocks(tp); ++ ++ tw32(TG3PCI_MEM_WIN_BASE_ADDR, 0); ++ ++ return tg3_reset_hw(tp, reset_phy); ++} ++ ++#if IS_ENABLED(CONFIG_HWMON) && !defined(__VMKLNX__) ++static void tg3_sd_scan_scratchpad(struct tg3 *tp, struct tg3_ocir *ocir) ++{ ++ int i; ++ ++ for (i = 0; i < TG3_SD_NUM_RECS; i++, ocir++) { ++ u32 off = i * TG3_OCIR_LEN, len = TG3_OCIR_LEN; ++ ++ tg3_ape_scratchpad_read(tp, (u32 *) ocir, off, len); ++ off += len; ++ ++ if (ocir->signature != TG3_OCIR_SIG_MAGIC || ++ !(ocir->version_flags & TG3_OCIR_FLAG_ACTIVE)) ++ memset(ocir, 0, TG3_OCIR_LEN); ++ } ++} ++ ++/* sysfs attributes for hwmon */ ++static ssize_t tg3_show_temp(struct device *dev, ++ struct device_attribute *devattr, char *buf) ++{ ++ struct pci_dev *pdev = to_pci_dev(dev); ++ struct net_device *netdev = pci_get_drvdata(pdev); ++ struct tg3 *tp = netdev_priv(netdev); ++ struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); ++ u32 temperature; ++ ++ rtnl_lock(); ++ spin_lock_bh(&tp->lock); ++ tg3_ape_scratchpad_read(tp, &temperature, attr->index, ++ sizeof(temperature)); ++ spin_unlock_bh(&tp->lock); ++ rtnl_unlock(); ++ return sprintf(buf, "%u\n", temperature); ++} ++ ++ ++static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, tg3_show_temp, NULL, ++ TG3_TEMP_SENSOR_OFFSET); ++static SENSOR_DEVICE_ATTR(temp1_crit, S_IRUGO, tg3_show_temp, NULL, ++ TG3_TEMP_CAUTION_OFFSET); ++static SENSOR_DEVICE_ATTR(temp1_max, S_IRUGO, tg3_show_temp, NULL, ++ TG3_TEMP_MAX_OFFSET); ++ ++static struct attribute *tg3_attributes[] = { ++ &sensor_dev_attr_temp1_input.dev_attr.attr, ++ &sensor_dev_attr_temp1_crit.dev_attr.attr, ++ &sensor_dev_attr_temp1_max.dev_attr.attr, ++ NULL ++}; ++ ++static const struct attribute_group tg3_group = { ++ .attrs = tg3_attributes, ++}; ++ ++#endif ++ ++static void tg3_hwmon_close(struct tg3 *tp) ++{ ++#if IS_ENABLED(CONFIG_HWMON) && !defined(__VMKLNX__) ++ if (tp->hwmon_dev) { ++ hwmon_device_unregister(tp->hwmon_dev); ++ tp->hwmon_dev = NULL; ++ sysfs_remove_group(&tp->pdev->dev.kobj, &tg3_group); ++ } ++#endif ++} ++ ++static void tg3_hwmon_open(struct tg3 *tp) ++{ ++#if IS_ENABLED(CONFIG_HWMON) && !defined(__VMKLNX__) ++ int i, err; ++ u32 size = 0; ++ struct pci_dev *pdev = tp->pdev; ++ struct tg3_ocir ocirs[TG3_SD_NUM_RECS]; ++ ++ tg3_sd_scan_scratchpad(tp, ocirs); ++ ++ for (i = 0; i < TG3_SD_NUM_RECS; i++) { ++ if (!ocirs[i].src_data_length) ++ continue; ++ ++ size += ocirs[i].src_hdr_length; ++ size += ocirs[i].src_data_length; ++ } ++ ++ if (!size) ++ return; ++ ++ /* Register hwmon sysfs hooks */ ++ err = sysfs_create_group(&pdev->dev.kobj, &tg3_group); ++ if (err) { ++ dev_err(&pdev->dev, "Cannot create sysfs group, aborting\n"); ++ return; ++ } ++ ++ tp->hwmon_dev = hwmon_device_register(&pdev->dev); ++ if (IS_ERR(tp->hwmon_dev)) { ++ tp->hwmon_dev = NULL; ++ dev_err(&pdev->dev, "Cannot register hwmon device, aborting\n"); ++ sysfs_remove_group(&pdev->dev.kobj, &tg3_group); ++ } ++#endif ++} ++ ++#define TG3_STAT_ADD32(PSTAT, REG) \ ++do { u32 __val = tr32(REG); \ ++ (PSTAT)->low += __val; \ ++ if ((PSTAT)->low < __val) \ ++ (PSTAT)->high += 1; \ ++} while (0) ++ ++static void tg3_periodic_fetch_stats(struct tg3 *tp) ++{ ++ struct tg3_hw_stats *sp = tp->hw_stats; ++ ++ if (!tp->link_up) ++ return; ++ ++ TG3_STAT_ADD32(&sp->tx_octets, MAC_TX_STATS_OCTETS); ++ TG3_STAT_ADD32(&sp->tx_collisions, MAC_TX_STATS_COLLISIONS); ++ TG3_STAT_ADD32(&sp->tx_xon_sent, MAC_TX_STATS_XON_SENT); ++ TG3_STAT_ADD32(&sp->tx_xoff_sent, MAC_TX_STATS_XOFF_SENT); ++ TG3_STAT_ADD32(&sp->tx_mac_errors, MAC_TX_STATS_MAC_ERRORS); ++ TG3_STAT_ADD32(&sp->tx_single_collisions, MAC_TX_STATS_SINGLE_COLLISIONS); ++ TG3_STAT_ADD32(&sp->tx_mult_collisions, MAC_TX_STATS_MULT_COLLISIONS); ++ TG3_STAT_ADD32(&sp->tx_deferred, MAC_TX_STATS_DEFERRED); ++ TG3_STAT_ADD32(&sp->tx_excessive_collisions, MAC_TX_STATS_EXCESSIVE_COL); ++ TG3_STAT_ADD32(&sp->tx_late_collisions, MAC_TX_STATS_LATE_COL); ++ TG3_STAT_ADD32(&sp->tx_ucast_packets, MAC_TX_STATS_UCAST); ++ TG3_STAT_ADD32(&sp->tx_mcast_packets, MAC_TX_STATS_MCAST); ++ TG3_STAT_ADD32(&sp->tx_bcast_packets, MAC_TX_STATS_BCAST); ++ if (unlikely(tg3_flag(tp, 5719_5720_RDMA_BUG) && ++ (sp->tx_ucast_packets.low + sp->tx_mcast_packets.low + ++ sp->tx_bcast_packets.low) > TG3_NUM_RDMA_CHANNELS)) { ++ u32 val; ++ ++ val = tr32(TG3_LSO_RD_DMA_CRPTEN_CTRL); ++ val &= ~tg3_lso_rd_dma_workaround_bit(tp); ++ tw32(TG3_LSO_RD_DMA_CRPTEN_CTRL, val); ++ tg3_flag_clear(tp, 5719_5720_RDMA_BUG); ++ } ++ ++ TG3_STAT_ADD32(&sp->rx_octets, MAC_RX_STATS_OCTETS); ++ TG3_STAT_ADD32(&sp->rx_fragments, MAC_RX_STATS_FRAGMENTS); ++ TG3_STAT_ADD32(&sp->rx_ucast_packets, MAC_RX_STATS_UCAST); ++ TG3_STAT_ADD32(&sp->rx_mcast_packets, MAC_RX_STATS_MCAST); ++ TG3_STAT_ADD32(&sp->rx_bcast_packets, MAC_RX_STATS_BCAST); ++ TG3_STAT_ADD32(&sp->rx_fcs_errors, MAC_RX_STATS_FCS_ERRORS); ++ TG3_STAT_ADD32(&sp->rx_align_errors, MAC_RX_STATS_ALIGN_ERRORS); ++ TG3_STAT_ADD32(&sp->rx_xon_pause_rcvd, MAC_RX_STATS_XON_PAUSE_RECVD); ++ TG3_STAT_ADD32(&sp->rx_xoff_pause_rcvd, MAC_RX_STATS_XOFF_PAUSE_RECVD); ++ TG3_STAT_ADD32(&sp->rx_mac_ctrl_rcvd, MAC_RX_STATS_MAC_CTRL_RECVD); ++ TG3_STAT_ADD32(&sp->rx_xoff_entered, MAC_RX_STATS_XOFF_ENTERED); ++ TG3_STAT_ADD32(&sp->rx_frame_too_long_errors, MAC_RX_STATS_FRAME_TOO_LONG); ++ TG3_STAT_ADD32(&sp->rx_jabbers, MAC_RX_STATS_JABBERS); ++ TG3_STAT_ADD32(&sp->rx_undersize_packets, MAC_RX_STATS_UNDERSIZE); ++ ++ TG3_STAT_ADD32(&sp->rxbds_empty, RCVLPC_NO_RCV_BD_CNT); ++ if (tg3_asic_rev(tp) != ASIC_REV_5717 && ++ tg3_asic_rev(tp) != ASIC_REV_5762 && ++ tg3_chip_rev_id(tp) != CHIPREV_ID_5719_A0 && ++ tg3_chip_rev_id(tp) != CHIPREV_ID_5720_A0) { ++ TG3_STAT_ADD32(&sp->rx_discards, RCVLPC_IN_DISCARDS_CNT); ++ } else { ++ u32 val = tr32(HOSTCC_FLOW_ATTN); ++ val = (val & HOSTCC_FLOW_ATTN_MBUF_LWM) ? 1 : 0; ++ if (val) { ++ tw32(HOSTCC_FLOW_ATTN, HOSTCC_FLOW_ATTN_MBUF_LWM); ++ sp->rx_discards.low += val; ++ if (sp->rx_discards.low < val) ++ sp->rx_discards.high += 1; ++ } ++ sp->mbuf_lwm_thresh_hit = sp->rx_discards; ++ } ++ TG3_STAT_ADD32(&sp->rx_errors, RCVLPC_IN_ERRORS_CNT); ++ ++#ifdef TG3_VMWARE_NETQ_ENABLE ++ tg3_vmware_fetch_stats(tp); ++#endif ++} ++ ++static void tg3_chk_missed_msi(struct tg3 *tp) ++{ ++ u32 i; ++ ++ for (i = 0; i < tp->irq_cnt; i++) { ++ struct tg3_napi *tnapi = &tp->napi[i]; ++ ++#ifdef TG3_VMWARE_NETQ_ENABLE ++ if (!(tnapi->netq.flags & TG3_NETQ_RXQ_ENABLED) && ++ !(tnapi->netq.flags & TG3_NETQ_TXQ_ALLOCATED)) ++ continue; ++#endif ++ ++ if (tg3_has_work(tnapi)) { ++ if (tnapi->last_rx_cons == tnapi->rx_rcb_ptr && ++ tnapi->last_tx_cons == tnapi->tx_cons) { ++ if (tnapi->chk_msi_cnt < 1) { ++ tnapi->chk_msi_cnt++; ++ return; ++ } ++#ifdef BCM_HAS_NEW_IRQ_SIG ++ tg3_msi(0, tnapi); ++#else ++ tg3_msi(0, tnapi, 0); ++#endif ++ } ++ } ++ tnapi->chk_msi_cnt = 0; ++ tnapi->last_rx_cons = tnapi->rx_rcb_ptr; ++ tnapi->last_tx_cons = tnapi->tx_cons; ++ } ++} ++ ++static void tg3_timer(unsigned long __opaque) ++{ ++ struct tg3 *tp = (struct tg3 *) __opaque; ++ ++ if (tp->irq_sync || tg3_flag(tp, RESET_TASK_PENDING)) ++ goto restart_timer; ++ ++ spin_lock(&tp->lock); ++ ++ if (tg3_asic_rev(tp) == ASIC_REV_5717 || ++ tg3_flag(tp, 57765_CLASS)) ++ tg3_chk_missed_msi(tp); ++ ++ if (tg3_flag(tp, FLUSH_POSTED_WRITES)) { ++ /* BCM4785: Flush posted writes from GbE to host memory. */ ++ tr32(HOSTCC_MODE); ++ } ++ ++#if defined(__VMKLNX__) ++ tg3_vmware_timer(tp); ++#endif ++ ++ if (!tg3_flag(tp, TAGGED_STATUS)) { ++ /* All of this garbage is because when using non-tagged ++ * IRQ status the mailbox/status_block protocol the chip ++ * uses with the cpu is race prone. ++ */ ++ if (tp->napi[0].hw_status->status & SD_STATUS_UPDATED) { ++ tw32(GRC_LOCAL_CTRL, ++ tp->grc_local_ctrl | GRC_LCLCTRL_SETINT); ++ } else { ++ tw32(HOSTCC_MODE, tp->coalesce_mode | ++ HOSTCC_MODE_ENABLE | HOSTCC_MODE_NOW); ++ } ++ ++ if (!(tr32(WDMAC_MODE) & WDMAC_MODE_ENABLE)) { ++ spin_unlock(&tp->lock); ++ tg3_reset_task_schedule(tp); ++ goto restart_timer; ++ } ++ } ++ ++ /* This part only runs once per second. */ ++ if (!--tp->timer_counter) { ++ if (tg3_flag(tp, 5705_PLUS)) ++ tg3_periodic_fetch_stats(tp); ++ ++ if (tp->setlpicnt && !--tp->setlpicnt) ++ tg3_phy_eee_enable(tp); ++ ++ if (tg3_flag(tp, USE_LINKCHG_REG)) { ++ u32 mac_stat; ++ int phy_event; ++ ++ mac_stat = tr32(MAC_STATUS); ++ ++ phy_event = 0; ++ if (tp->phy_flags & TG3_PHYFLG_USE_MI_INTERRUPT) { ++ if (mac_stat & MAC_STATUS_MI_INTERRUPT) ++ phy_event = 1; ++ } else if (mac_stat & MAC_STATUS_LNKSTATE_CHANGED) ++ phy_event = 1; ++ ++ if (phy_event) ++ tg3_setup_phy(tp, false); ++ } else if (tg3_flag(tp, POLL_SERDES)) { ++ u32 mac_stat = tr32(MAC_STATUS); ++ int need_setup = 0; ++ ++ if (tp->link_up && ++ (mac_stat & MAC_STATUS_LNKSTATE_CHANGED)) { ++ need_setup = 1; ++ } ++ if (!tp->link_up && ++ (mac_stat & (MAC_STATUS_PCS_SYNCED | ++ MAC_STATUS_SIGNAL_DET))) { ++ need_setup = 1; ++ } ++ if (need_setup) { ++ if (!tp->serdes_counter) { ++ tw32_f(MAC_MODE, ++ (tp->mac_mode & ++ ~MAC_MODE_PORT_MODE_MASK)); ++ udelay(40); ++ tw32_f(MAC_MODE, tp->mac_mode); ++ udelay(40); ++ } ++ tg3_setup_phy(tp, false); ++ } ++ } else if ((tp->phy_flags & TG3_PHYFLG_MII_SERDES) && ++ tg3_flag(tp, 5780_CLASS)) { ++ tg3_serdes_parallel_detect(tp); ++ } else if (tg3_flag(tp, POLL_CPMU_LINK)) { ++ u32 cpmu = tr32(TG3_CPMU_STATUS); ++ bool link_up = !((cpmu & TG3_CPMU_STATUS_LINK_MASK) == ++ TG3_CPMU_STATUS_LINK_MASK); ++ ++ if (link_up != tp->link_up) ++ tg3_setup_phy(tp, false); ++ } ++ ++ tp->timer_counter = tp->timer_multiplier; ++ } ++ ++ /* Heartbeat is only sent once every 2 seconds. ++ * ++ * The heartbeat is to tell the ASF firmware that the host ++ * driver is still alive. In the event that the OS crashes, ++ * ASF needs to reset the hardware to free up the FIFO space ++ * that may be filled with rx packets destined for the host. ++ * If the FIFO is full, ASF will no longer function properly. ++ * ++ * Unintended resets have been reported on real time kernels ++ * where the timer doesn't run on time. Netpoll will also have ++ * same problem. ++ * ++ * The new FWCMD_NICDRV_ALIVE3 command tells the ASF firmware ++ * to check the ring condition when the heartbeat is expiring ++ * before doing the reset. This will prevent most unintended ++ * resets. ++ */ ++ if (!--tp->asf_counter) { ++ if (tg3_flag(tp, ENABLE_ASF) && !tg3_flag(tp, ENABLE_APE)) { ++ tg3_wait_for_event_ack(tp); ++ ++ tg3_write_mem(tp, NIC_SRAM_FW_CMD_MBOX, ++ FWCMD_NICDRV_ALIVE3); ++ tg3_write_mem(tp, NIC_SRAM_FW_CMD_LEN_MBOX, 4); ++ tg3_write_mem(tp, NIC_SRAM_FW_CMD_DATA_MBOX, ++ TG3_FW_UPDATE_TIMEOUT_SEC); ++ ++ tg3_generate_fw_event(tp); ++ } ++ tp->asf_counter = tp->asf_multiplier; ++ } ++ ++ /* Update the APE heartbeat every 5 seconds.*/ ++ tg3_send_ape_heartbeat(tp, TG3_APE_HB_INTERVAL); ++ ++ spin_unlock(&tp->lock); ++ ++restart_timer: ++ tp->timer.expires = jiffies + tp->timer_offset; ++ add_timer(&tp->timer); ++} ++ ++static void __devinit tg3_timer_init(struct tg3 *tp) ++{ ++ if (tg3_flag(tp, TAGGED_STATUS) && ++ tg3_asic_rev(tp) != ASIC_REV_5717 && ++ !tg3_flag(tp, 57765_CLASS)) ++ tp->timer_offset = HZ; ++ else ++ tp->timer_offset = HZ / 10; ++ ++ BUG_ON(tp->timer_offset > HZ); ++ ++ tp->timer_multiplier = (HZ / tp->timer_offset); ++ tp->asf_multiplier = (HZ / tp->timer_offset) * ++ TG3_FW_UPDATE_FREQ_SEC; ++ ++ init_timer(&tp->timer); ++ tp->timer.data = (unsigned long) tp; ++ tp->timer.function = tg3_timer; ++} ++ ++static void tg3_timer_start(struct tg3 *tp) ++{ ++ tp->asf_counter = tp->asf_multiplier; ++ tp->timer_counter = tp->timer_multiplier; ++ ++ tp->timer.expires = jiffies + tp->timer_offset; ++ add_timer(&tp->timer); ++} ++ ++static void tg3_timer_stop(struct tg3 *tp) ++{ ++ del_timer_sync(&tp->timer); ++} ++ ++/* Restart hardware after configuration changes, self-test, etc. ++ * Invoked with tp->lock held. ++ */ ++static int tg3_restart_hw(struct tg3 *tp, bool reset_phy) ++ __releases(tp->lock) ++ __acquires(tp->lock) ++{ ++ int err; ++ ++ err = tg3_init_hw(tp, reset_phy); ++ if (err) { ++ netdev_err(tp->dev, ++ "Failed to re-initialize device, aborting\n"); ++ tg3_halt(tp, RESET_KIND_SHUTDOWN, 1); ++ tg3_full_unlock(tp); ++ tg3_timer_stop(tp); ++ tp->irq_sync = 0; ++ tg3_napi_enable(tp); ++ dev_close(tp->dev); ++ tg3_full_lock(tp, 0); ++ } ++ return err; ++} ++ ++#ifdef BCM_HAS_NEW_INIT_WORK ++static void tg3_reset_task(struct work_struct *work) ++#else ++static void tg3_reset_task(void *_data) ++#endif ++{ ++#ifdef BCM_HAS_NEW_INIT_WORK ++ struct tg3 *tp = container_of(work, struct tg3, reset_task); ++#else ++ struct tg3 *tp = _data; ++#endif ++ int err; ++ ++ tg3_full_lock(tp, 0); ++ ++ if (!netif_running(tp->dev)) { ++ tg3_flag_clear(tp, RESET_TASK_PENDING); ++ tg3_full_unlock(tp); ++ return; ++ } ++ ++ tg3_full_unlock(tp); ++ ++#ifdef TG3_VMWARE_NETQ_ENABLE ++ /* Prevent any netqueue operations while we are resetting. */ ++ if (tg3_flag(tp, ENABLE_IOV)) ++ rtnl_lock(); ++#endif ++ ++#if !defined(__VMKLNX__) ++ rtnl_lock(); ++ ++ if (tp->unrecoverable_err) { ++ dev_close(tp->dev); ++ netdev_err(tp->dev, "Device moved to closed state due to unrecoverable error\n"); ++ goto out2; ++ } ++#endif ++ ++ tg3_phy_stop(tp); ++ ++ tg3_netif_stop(tp); ++ ++#ifdef TG3_VMWARE_NETQ_ENABLE ++ tg3_netq_invalidate_state(tp); ++#endif ++ ++ tg3_full_lock(tp, 1); ++ ++ if (tg3_flag(tp, TX_RECOVERY_PENDING)) { ++ tp->write32_tx_mbox = tg3_write32_tx_mbox; ++ tp->write32_rx_mbox = tg3_write_flush_reg32; ++ tg3_flag_set(tp, MBOX_WRITE_REORDER); ++ tg3_flag_clear(tp, TX_RECOVERY_PENDING); ++ } ++ ++ tg3_halt(tp, RESET_KIND_SHUTDOWN, 0); ++ err = tg3_init_hw(tp, true); ++#if defined(__VMKLNX__) ++ if (err) { ++ if (printk_ratelimit()) { ++ printk(KERN_ERR "tg3_init_hw failed in tg3_init_task\n"); ++ } ++ tp->irq_sync = 0; ++ tg3_napi_enable(tp); ++ goto out; ++ } ++#else /* !defined(__VMKLNX__) */ ++ if (err) ++ goto out; ++#endif /* defined(__VMKLNX__) */ ++ ++ tg3_netif_start(tp); ++ ++out: ++ tg3_full_unlock(tp); ++ ++ if (!err) ++ tg3_phy_start(tp); ++ ++#ifdef TG3_VMWARE_NETQ_ENABLE ++ if (tg3_flag(tp, ENABLE_IOV)) ++ rtnl_unlock(); ++#endif ++ ++#if !defined(__VMKLNX__) ++out2: ++ rtnl_unlock(); ++#endif ++ ++ tg3_flag_clear(tp, RESET_TASK_PENDING); ++} ++ ++static int tg3_request_irq(struct tg3 *tp, int irq_num) ++{ ++#ifdef BCM_HAS_NEW_IRQ_SIG ++ irq_handler_t fn; ++#else ++ irqreturn_t (*fn)(int, void *, struct pt_regs *); ++#endif ++ unsigned long flags; ++ char *name; ++ struct tg3_napi *tnapi = &tp->napi[irq_num]; ++ ++ if (tp->irq_cnt == 1) ++ name = tp->dev->name; ++ else { ++ name = &tnapi->irq_lbl[0]; ++ if (tnapi->tx_buffers && tnapi->rx_rcb) ++ snprintf(name, IFNAMSIZ, ++ "%s-txrx-%d", tp->dev->name, irq_num); ++ else if (tnapi->tx_buffers) ++ snprintf(name, IFNAMSIZ, ++ "%s-tx-%d", tp->dev->name, irq_num); ++ else if (tnapi->rx_rcb) ++ snprintf(name, IFNAMSIZ, ++ "%s-rx-%d", tp->dev->name, irq_num); ++ else ++ snprintf(name, IFNAMSIZ, ++ "%s-%d", tp->dev->name, irq_num); ++ name[IFNAMSIZ-1] = 0; ++ } ++ ++ if (tg3_flag(tp, USING_MSI) || tg3_flag(tp, USING_MSIX)) { ++ fn = tg3_msi; ++ if (tg3_flag(tp, 1SHOT_MSI)) ++ fn = tg3_msi_1shot; ++ flags = 0; ++ } else { ++ fn = tg3_interrupt; ++ if (tg3_flag(tp, TAGGED_STATUS)) ++ fn = tg3_interrupt_tagged; ++ flags = IRQF_SHARED; ++ } ++ ++ return request_irq(tnapi->irq_vec, fn, flags, name, tnapi); ++} ++ ++static int tg3_test_interrupt(struct tg3 *tp) ++{ ++ struct tg3_napi *tnapi = &tp->napi[0]; ++ struct net_device *dev = tp->dev; ++ int err, i, intr_ok = 0; ++ u32 val; ++ ++ if (!netif_running(dev)) ++ return -ENODEV; ++ ++ tg3_disable_ints(tp); ++ ++ free_irq(tnapi->irq_vec, tnapi); ++ ++ /* ++ * Turn off MSI one shot mode. Otherwise this test has no ++ * observable way to know whether the interrupt was delivered. ++ */ ++ if (tg3_flag(tp, 57765_PLUS)) { ++ val = tr32(MSGINT_MODE) | MSGINT_MODE_ONE_SHOT_DISABLE; ++ tw32(MSGINT_MODE, val); ++ } ++ ++ err = request_irq(tnapi->irq_vec, tg3_test_isr, ++ IRQF_SHARED, dev->name, tnapi); ++ if (err) ++ return err; ++ ++ tnapi->hw_status->status &= ~SD_STATUS_UPDATED; ++ tg3_enable_ints(tp); ++ ++ tw32_f(HOSTCC_MODE, tp->coalesce_mode | HOSTCC_MODE_ENABLE | ++ tnapi->coal_now); ++ ++ for (i = 0; i < 5; i++) { ++ u32 int_mbox, misc_host_ctrl; ++ ++ int_mbox = tr32_mailbox(tnapi->int_mbox); ++ misc_host_ctrl = tr32(TG3PCI_MISC_HOST_CTRL); ++ ++ if ((int_mbox != 0) || ++ (misc_host_ctrl & MISC_HOST_CTRL_MASK_PCI_INT)) { ++ intr_ok = 1; ++ break; ++ } ++ ++ if (tg3_flag(tp, 57765_PLUS) && ++ tnapi->hw_status->status_tag != tnapi->last_tag) ++ tw32_mailbox_f(tnapi->int_mbox, tnapi->last_tag << 24); ++ ++ msleep(10); ++ } ++ ++ tg3_disable_ints(tp); ++ ++ free_irq(tnapi->irq_vec, tnapi); ++ ++ err = tg3_request_irq(tp, 0); ++ ++ if (err) ++ return err; ++ ++ if (intr_ok) { ++ /* Reenable MSI one shot mode. */ ++ if (tg3_flag(tp, 57765_PLUS) && tg3_flag(tp, 1SHOT_MSI)) { ++ val = tr32(MSGINT_MODE) & ~MSGINT_MODE_ONE_SHOT_DISABLE; ++ tw32(MSGINT_MODE, val); ++ } ++ return 0; ++ } ++ ++ return -EIO; ++} ++ ++#ifdef CONFIG_PCI_MSI ++/* Returns 0 if MSI test succeeds or MSI test fails and INTx mode is ++ * successfully restored ++ */ ++static int tg3_test_msi(struct tg3 *tp) ++{ ++ int err; ++ u16 pci_cmd; ++ ++ if (!tg3_flag(tp, USING_MSI)) ++ return 0; ++ ++ /* Turn off SERR reporting in case MSI terminates with Master ++ * Abort. ++ */ ++ pci_read_config_word(tp->pdev, PCI_COMMAND, &pci_cmd); ++ pci_write_config_word(tp->pdev, PCI_COMMAND, ++ pci_cmd & ~PCI_COMMAND_SERR); ++ ++ err = tg3_test_interrupt(tp); ++ ++ pci_write_config_word(tp->pdev, PCI_COMMAND, pci_cmd); ++ ++ if (!err) ++ return 0; ++ ++ /* other failures */ ++ if (err != -EIO) ++ return err; ++ ++ /* MSI test failed, go back to INTx mode */ ++ netdev_warn(tp->dev, "No interrupt was generated using MSI. Switching " ++ "to INTx mode. Please report this failure to the PCI " ++ "maintainer and include system chipset information\n"); ++ ++ free_irq(tp->napi[0].irq_vec, &tp->napi[0]); ++ ++ pci_disable_msi(tp->pdev); ++ ++ tg3_flag_clear(tp, USING_MSI); ++ tp->napi[0].irq_vec = tp->pdev->irq; ++ ++ err = tg3_request_irq(tp, 0); ++ if (err) ++ return err; ++ ++ /* Need to reset the chip because the MSI cycle may have terminated ++ * with Master Abort. ++ */ ++ tg3_full_lock(tp, 1); ++ ++ tg3_halt(tp, RESET_KIND_SHUTDOWN, 1); ++ err = tg3_init_hw(tp, true); ++ ++ tg3_full_unlock(tp); ++ ++ if (err) ++ free_irq(tp->napi[0].irq_vec, &tp->napi[0]); ++ ++ return err; ++} ++#endif /* CONFIG_PCI_MSI */ ++ ++static int tg3_request_firmware(struct tg3 *tp) ++{ ++ const struct tg3_firmware_hdr *fw_hdr; ++ ++ if (tg3_priv_request_firmware(&tp->fw, tp->fw_needed, &tp->pdev->dev)) { ++ netdev_err(tp->dev, "Failed to load firmware \"%s\"\n", ++ tp->fw_needed); ++ return -ENOENT; ++ } ++ ++ fw_hdr = (struct tg3_firmware_hdr *)tp->fw->data; ++ ++ /* Firmware blob starts with version numbers, followed by ++ * start address and _full_ length including BSS sections ++ * (which must be longer than the actual data, of course ++ */ ++ ++ tp->fw_len = fw_hdr->len; /* includes bss */ ++ if (tp->fw_len < (tp->fw->size - TG3_FW_HDR_LEN)) { ++ netdev_err(tp->dev, "bogus length %d in \"%s\"\n", ++ tp->fw_len, tp->fw_needed); ++ tg3_priv_release_firmware(tp->fw); ++ tp->fw = NULL; ++ return -EINVAL; ++ } ++ ++ /* We no longer need firmware; we have it. */ ++ tp->fw_needed = NULL; ++ return 0; ++} ++ ++#if defined(CONFIG_PCI_MSI) ++static bool tg3_ints_alloc_vectors(struct tg3 *tp) ++{ ++ int i, rc; ++ struct msix_entry msix_ent[TG3_IRQ_MAX_VECS]; ++ ++ for (i = 0; i < tp->irq_max; i++) { ++ msix_ent[i].entry = i; ++ msix_ent[i].vector = 0; ++ } ++ ++ rc = tp->irq_cnt; ++ while (1) { ++ int ret; ++ ++#ifdef TG3_VMWARE_NETQ_ENABLE ++ if (!tg3_flag(tp, IOV_CAPABLE)) ++#endif ++ /* If the kernel says that only two MSI-X ++ * vectors are available, fallback to a simpler ++ * single queue, single vector MSI-X mode. ++ */ ++ if (rc == 2) ++ rc--; ++ ++ ret = pci_enable_msix(tp->pdev, msix_ent, rc); ++ if (ret < 0) ++ return false; ++ else if (ret == 0) ++ break; ++ rc = ret; ++ } ++ tp->irq_cnt = rc; ++ ++ for (i = 0; i < tp->irq_max; i++) ++ tp->napi[i].irq_vec = msix_ent[i].vector; ++ ++ return true; ++} ++ ++static inline u32 tg3_irq_count(struct tg3 *tp) ++{ ++ u32 irq_cnt = max(tp->rxq_cnt, tp->txq_cnt); ++#if defined(TG3_INBOX) ++ return TG3_IRQ_MAX_VECS; ++#endif ++ if (irq_cnt > 1) { ++ /* We want as many rx rings enabled as there are cpus. ++ * In multiqueue MSI-X mode, the first MSI-X vector ++ * only deals with link interrupts, etc, so we add ++ * one to the number of vectors we are requesting. ++ */ ++ irq_cnt = min_t(unsigned, irq_cnt + 1, tp->irq_max); ++ } ++ ++#ifdef TG3_VMWARE_NETQ_ENABLE ++ if (tg3_flag(tp, IOV_CAPABLE)) ++ irq_cnt = tg3_netq_tune_vector_count(tp); ++#endif ++ ++ return irq_cnt; ++} ++ ++static bool tg3_enable_msix(struct tg3 *tp) ++{ ++ u32 cpus, irq_cnt; ++ ++ cpus = num_online_cpus(); ++ ++ tp->txq_cnt = tp->txq_req; ++ tp->rxq_cnt = tp->rxq_req; ++ ++ /* Disable multiple TX rings by default. Simple round-robin hardware ++ * scheduling of the TX rings can cause starvation of rings with ++ * small packets when other rings have TSO or jumbo packets. ++ */ ++ if (!tp->txq_cnt) ++ tp->txq_cnt = 1; ++ if (!tp->rxq_cnt) ++ tp->rxq_cnt = min(cpus, tp->rxq_max); ++ ++#ifdef TG3_VMWARE_NETQ_ENABLE ++ tg3_netq_limit_dflt_queue_counts(tp); ++#endif ++ ++ irq_cnt = tg3_irq_count(tp); ++ ++ tp->irq_cnt = irq_cnt; ++ while (tp->irq_cnt) { ++ u32 rxq_cnt, new_irq_cnt; ++ ++ if (!tg3_ints_alloc_vectors(tp)) ++ return false; ++ ++ /* If the number of interrupts is less than our desired queue ++ * count, adjust the queue count downwards to match. ++ */ ++ rxq_cnt = tp->irq_cnt; ++#ifdef TG3_VMWARE_NETQ_ENABLE ++ if (!tg3_flag(tp, IOV_CAPABLE)) ++#endif ++ if (tp->irq_cnt > 1) ++ rxq_cnt--; ++ ++ rxq_cnt = min(rxq_cnt, tp->rxq_cnt); ++ tp->rxq_cnt = rxq_cnt; ++ ++#ifdef BCM_HAS_STRUCT_NETDEV_QUEUE ++ while (rxq_cnt) { ++ if (netif_set_real_num_rx_queues(tp->dev, rxq_cnt)) ++ rxq_cnt--; ++ else ++ break; ++ } ++ ++ if (!rxq_cnt) { ++ pci_disable_msix(tp->pdev); ++ return false; ++ } ++#endif /* BCM_HAS_STRUCT_NETDEV_QUEUE */ ++ ++ if (tp->rxq_cnt == rxq_cnt) ++ break; ++ ++ tp->rxq_cnt = rxq_cnt; ++ ++ /* See if we can free up any unused MSI-X vectors. */ ++ new_irq_cnt = tg3_irq_count(tp); ++ ++ /* If the IRQ count is the same, we need ++ * the extra interrupts for the tx side. ++ */ ++ if (irq_cnt == new_irq_cnt) ++ break; ++ ++ /* Free unused interrupts and reallocate the exact amount. */ ++ pci_disable_msix(tp->pdev); ++ tp->irq_cnt = new_irq_cnt; ++ } ++ ++ if (irq_cnt != tp->irq_cnt) ++ netdev_notice(tp->dev, ++ "Requested %d MSI-X vectors, received %d\n", ++ irq_cnt, tp->irq_cnt); ++ ++ if (tp->irq_cnt == 1) ++ return true; ++ ++ /* If more than one interrupt vector is allocated, we _need_ to enable ++ * either IOV mode or RSS mode, even if only one rx queue is desired. ++ * If we don't, TSS will not work. ++ */ ++#ifdef TG3_VMWARE_NETQ_ENABLE ++ if (tg3_flag(tp, IOV_CAPABLE)) { ++ tg3_flag_set(tp, ENABLE_IOV); ++ } else ++#endif ++ tg3_flag_set(tp, ENABLE_RSS); ++ ++ tp->txq_cnt = min(tp->txq_cnt, tp->irq_cnt - 1); ++ if (tp->txq_cnt > 1) ++ tg3_flag_set(tp, ENABLE_TSS); ++ ++#ifdef BCM_HAS_STRUCT_NETDEV_QUEUE ++ netif_set_real_num_tx_queues(tp->dev, tp->txq_cnt); ++#endif ++ ++ return true; ++} ++#endif ++ ++static void tg3_ints_init(struct tg3 *tp) ++{ ++#ifdef CONFIG_PCI_MSI ++ if ((tg3_flag(tp, SUPPORT_MSI) || tg3_flag(tp, SUPPORT_MSIX)) && ++ !tg3_flag(tp, TAGGED_STATUS)) { ++ /* All MSI supporting chips should support tagged ++ * status. Assert that this is the case. ++ */ ++ netdev_warn(tp->dev, ++ "MSI without TAGGED_STATUS? Not using MSI\n"); ++ goto defcfg; ++ } ++ ++ if (tg3_flag(tp, SUPPORT_MSIX) && tg3_enable_msix(tp)) ++ tg3_flag_set(tp, USING_MSIX); ++ else if (tg3_flag(tp, SUPPORT_MSI) && pci_enable_msi(tp->pdev) == 0) ++ tg3_flag_set(tp, USING_MSI); ++ ++ tg3_5780_class_intx_workaround(tp); ++ ++ if (tg3_flag(tp, USING_MSI) || tg3_flag(tp, USING_MSIX)) { ++ u32 msi_mode = tr32(MSGINT_MODE); ++ if (tg3_flag(tp, USING_MSIX) && tp->irq_cnt > 1) ++ msi_mode |= MSGINT_MODE_MULTIVEC_EN; ++ if (!tg3_flag(tp, 1SHOT_MSI)) ++ msi_mode |= MSGINT_MODE_ONE_SHOT_DISABLE; ++ tw32(MSGINT_MODE, msi_mode | MSGINT_MODE_ENABLE); ++ } ++defcfg: ++#endif ++ ++ if (!tg3_flag(tp, USING_MSIX)) { ++ tp->irq_cnt = 1; ++ tp->napi[0].irq_vec = tp->pdev->irq; ++ } ++ ++ if (tp->irq_cnt == 1) { ++ tp->txq_cnt = 1; ++ tp->rxq_cnt = 1; ++#ifdef BCM_HAS_STRUCT_NETDEV_QUEUE ++ netif_set_real_num_tx_queues(tp->dev, 1); ++ netif_set_real_num_rx_queues(tp->dev, 1); ++#endif ++ } ++} ++ ++static void tg3_ints_fini(struct tg3 *tp) ++{ ++#ifdef CONFIG_PCI_MSI ++ if (tg3_flag(tp, USING_MSIX)) ++ pci_disable_msix(tp->pdev); ++ else if (tg3_flag(tp, USING_MSI)) ++ pci_disable_msi(tp->pdev); ++#endif ++ tg3_flag_clear(tp, USING_MSI); ++ tg3_flag_clear(tp, USING_MSIX); ++ tg3_flag_clear(tp, ENABLE_RSS); ++ tg3_flag_clear(tp, ENABLE_TSS); ++#ifdef TG3_VMWARE_NETQ_ENABLE ++ tg3_flag_clear(tp, ENABLE_IOV); ++#endif ++} ++ ++static int tg3_start(struct tg3 *tp, bool reset_phy, bool test_irq, ++ bool init) ++{ ++ struct net_device *dev = tp->dev; ++ int i, err; ++ ++ /* ++ * Setup interrupts first so we know how ++ * many NAPI resources to allocate ++ */ ++ tg3_ints_init(tp); ++ ++ tg3_rss_check_indir_tbl(tp); ++ ++ /* The placement of this call is tied ++ * to the setup and use of Host TX descriptors. ++ */ ++ err = tg3_alloc_consistent(tp); ++ if (err) ++ goto out_ints_fini; ++ ++ tg3_napi_init(tp); ++ ++ /* napi is disabled by default after init ++ * Assertion may occur when freeing an IRQ vector ++ * that has NAPI scheduled and associated. Thus, ++ * we need to ensure napi is disabled prior to ++ * freeing an irq. ++ */ ++ for (i = 0; i < tp->irq_cnt; i++) { ++ struct tg3_napi *tnapi = &tp->napi[i]; ++ err = tg3_request_irq(tp, i); ++ if (err) { ++ for (i--; i >= 0; i--) { ++ tnapi = &tp->napi[i]; ++ free_irq(tnapi->irq_vec, tnapi); ++ } ++ goto out_napi_fini; ++ } ++ } ++ ++ if (init) ++ tg3_ape_driver_state_change(tp, RESET_KIND_INIT); ++ ++ tg3_full_lock(tp, 0); ++ ++ err = tg3_init_hw(tp, reset_phy); ++ if (err) { ++ tg3_halt(tp, RESET_KIND_SHUTDOWN, 1); ++ tg3_free_rings(tp); ++ } ++ ++ tg3_full_unlock(tp); ++ ++ if (err) ++ goto out_free_irq; ++ ++#ifdef CONFIG_PCI_MSI ++ if (test_irq && tg3_flag(tp, USING_MSI)) { ++ err = tg3_test_msi(tp); ++ ++ if (err) { ++ tg3_full_lock(tp, 0); ++ tg3_halt(tp, RESET_KIND_SHUTDOWN, 1); ++ tg3_free_rings(tp); ++ tg3_full_unlock(tp); ++ ++ goto out_napi_fini; ++ } ++ ++ if (!tg3_flag(tp, 57765_PLUS) && tg3_flag(tp, USING_MSI)) { ++ u32 val = tr32(PCIE_TRANSACTION_CFG); ++ ++ tw32(PCIE_TRANSACTION_CFG, ++ val | PCIE_TRANS_CFG_1SHOT_MSI); ++ } ++ } ++#endif ++ ++ tg3_napi_enable(tp); ++ ++ tg3_phy_start(tp); ++ ++ tg3_hwmon_open(tp); ++ ++ tg3_full_lock(tp, 0); ++ ++ tg3_timer_start(tp); ++ ++ /* JIRA-20238: This fix is to make sure the first heartbeat ++ * occurs within 5 second interval even if the jiffy value ++ * is very high. When using time_after() check a higher jiffy ++ * value makes it –ve when it is type casted to long on 32 bit ++ * kernel, as long is only 4 bytes. Due to this time_after ++ * check will not provide incorrect result. ++ */ ++ if (tg3_flag(tp, ENABLE_APE)) ++ tp->ape_hb_jiffies = jiffies; ++ ++ tg3_flag_set(tp, INIT_COMPLETE); ++ if (init) ++ tg3_ptp_init(tp); ++ else ++ tg3_ptp_resume(tp); ++ ++ tg3_enable_ints(tp); ++ ++ tg3_full_unlock(tp); ++ ++ netif_tx_start_all_queues(dev); ++ ++#ifdef BCM_HAS_FIX_FEATURES ++ /* ++ * Reset loopback feature if it was turned on while the device was down ++ * make sure that it's installed properly now. ++ */ ++ if (dev->features & NETIF_F_LOOPBACK) ++ tg3_set_loopback(dev, dev->features); ++#endif ++ ++ return 0; ++ ++out_free_irq: ++ for (i = tp->irq_cnt - 1; i >= 0; i--) { ++ struct tg3_napi *tnapi = &tp->napi[i]; ++ free_irq(tnapi->irq_vec, tnapi); ++ } ++ ++out_napi_fini: ++ tg3_napi_fini(tp); ++ tg3_free_consistent(tp); ++ ++out_ints_fini: ++ tg3_ints_fini(tp); ++ ++ return err; ++} ++ ++static void tg3_stop(struct tg3 *tp) ++{ ++ int i; ++ ++#if !defined(__VMKLNX__) ++ if (!tp->unrecoverable_err) ++ tg3_reset_task_cancel(tp); ++#else ++ tg3_reset_task_cancel(tp); ++#endif ++ ++ tg3_netif_stop(tp); ++ ++ tg3_timer_stop(tp); ++ ++ tg3_hwmon_close(tp); ++ ++ tg3_phy_stop(tp); ++ ++#ifdef TG3_VMWARE_NETQ_ENABLE ++ tg3_netq_invalidate_state(tp); ++#endif ++ ++ tg3_full_lock(tp, 1); ++ ++ tg3_disable_ints(tp); ++ ++ tg3_halt(tp, RESET_KIND_SHUTDOWN, 1); ++ tg3_free_rings(tp); ++ tg3_flag_clear(tp, INIT_COMPLETE); ++ ++ tg3_full_unlock(tp); ++ ++ /* napi should be disabled after netif_stop already */ ++ for (i = tp->irq_cnt - 1; i >= 0; i--) { ++ struct tg3_napi *tnapi = &tp->napi[i]; ++ free_irq(tnapi->irq_vec, tnapi); ++ } ++ ++ tg3_napi_fini(tp); ++ ++ tg3_ints_fini(tp); ++ ++#ifdef TG3_VMWARE_NETQ_ENABLE ++ tg3_netq_stats_clear(tp); ++#endif ++ ++ tg3_free_consistent(tp); ++} ++ ++static int tg3_open(struct net_device *dev) ++{ ++ struct tg3 *tp = netdev_priv(dev); ++ int err; ++ ++ if (tp->fw_needed) { ++ err = tg3_request_firmware(tp); ++ if (tg3_asic_rev(tp) == ASIC_REV_57766) { ++ if (err) { ++ netdev_warn(tp->dev, "EEE capability disabled\n"); ++ tp->phy_flags &= ~TG3_PHYFLG_EEE_CAP; ++ } else if (!(tp->phy_flags & TG3_PHYFLG_EEE_CAP)) { ++ netdev_warn(tp->dev, "EEE capability restored\n"); ++ tp->phy_flags |= TG3_PHYFLG_EEE_CAP; ++ } ++ } else if (tg3_chip_rev_id(tp) == CHIPREV_ID_5701_A0) { ++ if (err) ++ return err; ++ } else if (err) { ++ netdev_warn(tp->dev, "TSO capability disabled\n"); ++ tg3_flag_clear(tp, TSO_CAPABLE); ++ } else if (!tg3_flag(tp, TSO_CAPABLE)) { ++ netdev_notice(tp->dev, "TSO capability restored\n"); ++ tg3_flag_set(tp, TSO_CAPABLE); ++ } ++ } ++ ++ tg3_carrier_off(tp); ++ ++ err = tg3_power_up(tp); ++ if (err) ++ return err; ++ ++ tg3_full_lock(tp, 0); ++ ++ tg3_disable_ints(tp); ++ tg3_flag_clear(tp, INIT_COMPLETE); ++ ++ tg3_full_unlock(tp); ++ ++ err = tg3_start(tp, ++ !(tp->phy_flags & TG3_PHYFLG_KEEP_LINK_ON_PWRDN), ++ true, true); ++ if (err) { ++ tg3_frob_aux_power(tp, false); ++ pci_set_power_state(tp->pdev, PCI_D3hot); ++ } ++ ++#if IS_ENABLED(CONFIG_PTP_1588_CLOCK) ++ if (tg3_flag(tp, PTP_CAPABLE)) { ++#ifdef BCM_HAS_PTP_CLOCK_REG_HAS_PARENT ++ tp->ptp_clock = ptp_clock_register(&tp->ptp_info, ++ &tp->pdev->dev); ++#else ++ tp->ptp_clock = ptp_clock_register(&tp->ptp_info); ++#endif ++ if (IS_ERR(tp->ptp_clock)) ++ tp->ptp_clock = NULL; ++ } ++#endif ++ ++ return err; ++} ++ ++static int tg3_close(struct net_device *dev) ++{ ++ struct tg3 *tp = netdev_priv(dev); ++ ++ tg3_ptp_fini(tp); ++ ++ tg3_stop(tp); ++ ++ tg3_flag_clear(tp, INIT_COMPLETE); ++ ++ /* Clear stats across close / open calls */ ++ memset(&tp->net_stats_prev, 0, sizeof(tp->net_stats_prev)); ++ memset(&tp->estats_prev, 0, sizeof(tp->estats_prev)); ++ ++ if (pci_device_is_present(tp->pdev)) { ++ tg3_power_down_prepare(tp); ++ ++ tg3_carrier_off(tp); ++ } ++ return 0; ++} ++ ++static inline u64 get_stat64(tg3_stat64_t *val) ++{ ++ return ((u64)val->high << 32) | ((u64)val->low); ++} ++ ++static u64 tg3_calc_crc_errors(struct tg3 *tp) ++{ ++ struct tg3_hw_stats *hw_stats = tp->hw_stats; ++ ++ if (!(tp->phy_flags & TG3_PHYFLG_PHY_SERDES) && ++ (tg3_asic_rev(tp) == ASIC_REV_5700 || ++ tg3_asic_rev(tp) == ASIC_REV_5701)) { ++ u32 val; ++ ++ if (!tg3_readphy(tp, MII_TG3_TEST1, &val)) { ++ tg3_writephy(tp, MII_TG3_TEST1, ++ val | MII_TG3_TEST1_CRC_EN); ++ tg3_readphy(tp, MII_TG3_RXR_COUNTERS, &val); ++ } else ++ val = 0; ++ ++ tp->phy_crc_errors += val; ++ ++ return tp->phy_crc_errors; ++ } ++ ++ return get_stat64(&hw_stats->rx_fcs_errors); ++} ++ ++#define ESTAT_ADD(member) \ ++ estats->member = old_estats->member + \ ++ get_stat64(&hw_stats->member) ++ ++static void tg3_get_estats(struct tg3 *tp, struct tg3_ethtool_stats *estats) ++{ ++ struct tg3_ethtool_stats *old_estats = &tp->estats_prev; ++ struct tg3_hw_stats *hw_stats = tp->hw_stats; ++ ++ ESTAT_ADD(rx_octets); ++ ESTAT_ADD(rx_fragments); ++ ESTAT_ADD(rx_ucast_packets); ++ ESTAT_ADD(rx_mcast_packets); ++ ESTAT_ADD(rx_bcast_packets); ++ ESTAT_ADD(rx_fcs_errors); ++ ESTAT_ADD(rx_align_errors); ++ ESTAT_ADD(rx_xon_pause_rcvd); ++ ESTAT_ADD(rx_xoff_pause_rcvd); ++ ESTAT_ADD(rx_mac_ctrl_rcvd); ++ ESTAT_ADD(rx_xoff_entered); ++ ESTAT_ADD(rx_frame_too_long_errors); ++ ESTAT_ADD(rx_jabbers); ++ ESTAT_ADD(rx_undersize_packets); ++ ESTAT_ADD(rx_in_length_errors); ++ ESTAT_ADD(rx_out_length_errors); ++ ESTAT_ADD(rx_64_or_less_octet_packets); ++ ESTAT_ADD(rx_65_to_127_octet_packets); ++ ESTAT_ADD(rx_128_to_255_octet_packets); ++ ESTAT_ADD(rx_256_to_511_octet_packets); ++ ESTAT_ADD(rx_512_to_1023_octet_packets); ++ ESTAT_ADD(rx_1024_to_1522_octet_packets); ++ ESTAT_ADD(rx_1523_to_2047_octet_packets); ++ ESTAT_ADD(rx_2048_to_4095_octet_packets); ++ ESTAT_ADD(rx_4096_to_8191_octet_packets); ++ ESTAT_ADD(rx_8192_to_9022_octet_packets); ++ ++ ESTAT_ADD(tx_octets); ++ ESTAT_ADD(tx_collisions); ++ ESTAT_ADD(tx_xon_sent); ++ ESTAT_ADD(tx_xoff_sent); ++ ESTAT_ADD(tx_flow_control); ++ ESTAT_ADD(tx_mac_errors); ++ ESTAT_ADD(tx_single_collisions); ++ ESTAT_ADD(tx_mult_collisions); ++ ESTAT_ADD(tx_deferred); ++ ESTAT_ADD(tx_excessive_collisions); ++ ESTAT_ADD(tx_late_collisions); ++ ESTAT_ADD(tx_collide_2times); ++ ESTAT_ADD(tx_collide_3times); ++ ESTAT_ADD(tx_collide_4times); ++ ESTAT_ADD(tx_collide_5times); ++ ESTAT_ADD(tx_collide_6times); ++ ESTAT_ADD(tx_collide_7times); ++ ESTAT_ADD(tx_collide_8times); ++ ESTAT_ADD(tx_collide_9times); ++ ESTAT_ADD(tx_collide_10times); ++ ESTAT_ADD(tx_collide_11times); ++ ESTAT_ADD(tx_collide_12times); ++ ESTAT_ADD(tx_collide_13times); ++ ESTAT_ADD(tx_collide_14times); ++ ESTAT_ADD(tx_collide_15times); ++ ESTAT_ADD(tx_ucast_packets); ++ ESTAT_ADD(tx_mcast_packets); ++ ESTAT_ADD(tx_bcast_packets); ++ ESTAT_ADD(tx_carrier_sense_errors); ++ ESTAT_ADD(tx_discards); ++ ESTAT_ADD(tx_errors); ++ ++ ESTAT_ADD(dma_writeq_full); ++ ESTAT_ADD(dma_write_prioq_full); ++ ESTAT_ADD(rxbds_empty); ++ ESTAT_ADD(rx_discards); ++ ESTAT_ADD(rx_errors); ++ ESTAT_ADD(rx_threshold_hit); ++ ++ ESTAT_ADD(dma_readq_full); ++ ESTAT_ADD(dma_read_prioq_full); ++ ESTAT_ADD(tx_comp_queue_full); ++ ++ ESTAT_ADD(ring_set_send_prod_index); ++ ESTAT_ADD(ring_status_update); ++ ESTAT_ADD(nic_irqs); ++ ESTAT_ADD(nic_avoided_irqs); ++ ESTAT_ADD(nic_tx_threshold_hit); ++ ++ ESTAT_ADD(mbuf_lwm_thresh_hit); ++ estats->dma_4g_cross = tp->dma_4g_cross; ++#if !defined(__VMKLNX__) ++ estats->recoverable_err = tp->recoverable_err; ++ estats->unrecoverable_err = tp->unrecoverable_err; ++#endif ++} ++ ++static void tg3_get_nstats(struct tg3 *tp, struct rtnl_link_stats64 *stats) ++{ ++ struct rtnl_link_stats64 *old_stats = &tp->net_stats_prev; ++ struct tg3_hw_stats *hw_stats = tp->hw_stats; ++ ++ stats->rx_packets = old_stats->rx_packets + ++ get_stat64(&hw_stats->rx_ucast_packets) + ++ get_stat64(&hw_stats->rx_mcast_packets) + ++ get_stat64(&hw_stats->rx_bcast_packets); ++ ++ stats->tx_packets = old_stats->tx_packets + ++ get_stat64(&hw_stats->tx_ucast_packets) + ++ get_stat64(&hw_stats->tx_mcast_packets) + ++ get_stat64(&hw_stats->tx_bcast_packets); ++ ++ stats->rx_bytes = old_stats->rx_bytes + ++ get_stat64(&hw_stats->rx_octets); ++ stats->tx_bytes = old_stats->tx_bytes + ++ get_stat64(&hw_stats->tx_octets); ++ ++ stats->rx_errors = old_stats->rx_errors + ++ get_stat64(&hw_stats->rx_errors); ++ stats->tx_errors = old_stats->tx_errors + ++ get_stat64(&hw_stats->tx_errors) + ++ get_stat64(&hw_stats->tx_mac_errors) + ++ get_stat64(&hw_stats->tx_carrier_sense_errors) + ++ get_stat64(&hw_stats->tx_discards); ++ ++ stats->multicast = old_stats->multicast + ++ get_stat64(&hw_stats->rx_mcast_packets); ++ stats->collisions = old_stats->collisions + ++ get_stat64(&hw_stats->tx_collisions); ++ ++ stats->rx_length_errors = old_stats->rx_length_errors + ++ get_stat64(&hw_stats->rx_frame_too_long_errors) + ++ get_stat64(&hw_stats->rx_undersize_packets); ++ ++ stats->rx_frame_errors = old_stats->rx_frame_errors + ++ get_stat64(&hw_stats->rx_align_errors); ++ stats->tx_aborted_errors = old_stats->tx_aborted_errors + ++ get_stat64(&hw_stats->tx_discards); ++ stats->tx_carrier_errors = old_stats->tx_carrier_errors + ++ get_stat64(&hw_stats->tx_carrier_sense_errors); ++ ++ stats->rx_crc_errors = old_stats->rx_crc_errors + ++ tg3_calc_crc_errors(tp); ++ ++ stats->rx_missed_errors = old_stats->rx_missed_errors + ++ get_stat64(&hw_stats->rx_discards); ++ ++ stats->rx_dropped = tp->rx_dropped; ++ stats->tx_dropped = tp->tx_dropped; ++} ++ ++static int tg3_get_regs_len(struct net_device *dev) ++{ ++ return TG3_REG_BLK_SIZE; ++} ++ ++static void tg3_get_regs(struct net_device *dev, ++ struct ethtool_regs *regs, void *_p) ++{ ++ struct tg3 *tp = netdev_priv(dev); ++ ++ regs->version = 0; ++ ++ memset(_p, 0, TG3_REG_BLK_SIZE); ++ ++ if (tp->phy_flags & TG3_PHYFLG_IS_LOW_POWER) ++ return; ++ ++ tg3_full_lock(tp, 0); ++ ++ tg3_dump_legacy_regs(tp, (u32 *)_p); ++ ++ tg3_full_unlock(tp); ++} ++ ++#if (LINUX_VERSION_CODE >= 0x20418) ++static int tg3_get_eeprom_len(struct net_device *dev) ++{ ++ struct tg3 *tp = netdev_priv(dev); ++ ++ return tp->nvram_size; ++} ++#endif ++ ++#ifdef ETHTOOL_GEEPROM ++static int tg3_get_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom, u8 *data) ++{ ++ struct tg3 *tp = netdev_priv(dev); ++ int ret, cpmu_restore = 0; ++ u8 *pd; ++ u32 i, offset, len, b_offset, b_count, cpmu_val = 0; ++ __be32 val; ++ ++ if (tg3_flag(tp, NO_NVRAM)) ++ return -EINVAL; ++ ++ offset = eeprom->offset; ++ len = eeprom->len; ++ eeprom->len = 0; ++ ++ eeprom->magic = TG3_EEPROM_MAGIC; ++ ++ /* Override clock, link aware and link idle modes */ ++ if (tg3_flag(tp, CPMU_PRESENT)) { ++ cpmu_val = tr32(TG3_CPMU_CTRL); ++ if (cpmu_val & (CPMU_CTRL_LINK_AWARE_MODE | ++ CPMU_CTRL_LINK_IDLE_MODE)) { ++ tw32(TG3_CPMU_CTRL, cpmu_val & ++ ~(CPMU_CTRL_LINK_AWARE_MODE | ++ CPMU_CTRL_LINK_IDLE_MODE)); ++ cpmu_restore = 1; ++ } ++ } ++ tg3_override_clk(tp); ++ ++ if (offset & 3) { ++ /* adjustments to start on required 4 byte boundary */ ++ b_offset = offset & 3; ++ b_count = 4 - b_offset; ++ if (b_count > len) { ++ /* i.e. offset=1 len=2 */ ++ b_count = len; ++ } ++ ret = tg3_nvram_read_be32(tp, offset-b_offset, &val); ++ if (ret) ++ goto eeprom_done; ++ memcpy(data, ((char *)&val) + b_offset, b_count); ++ len -= b_count; ++ offset += b_count; ++ eeprom->len += b_count; ++ } ++ ++ /* read bytes up to the last 4 byte boundary */ ++ pd = &data[eeprom->len]; ++ for (i = 0; i < (len - (len & 3)); i += 4) { ++ ret = tg3_nvram_read_be32(tp, offset + i, &val); ++ if (ret) { ++ if (i) ++ i -= 4; ++ eeprom->len += i; ++ goto eeprom_done; ++ } ++ memcpy(pd + i, &val, 4); ++ if (need_resched()) { ++ if (signal_pending(current)) { ++ eeprom->len += i; ++ ret = -EINTR; ++ goto eeprom_done; ++ } ++ cond_resched(); ++ } ++ } ++ eeprom->len += i; ++ ++ if (len & 3) { ++ /* read last bytes not ending on 4 byte boundary */ ++ pd = &data[eeprom->len]; ++ b_count = len & 3; ++ b_offset = offset + len - b_count; ++ ret = tg3_nvram_read_be32(tp, b_offset, &val); ++ if (ret) ++ goto eeprom_done; ++ memcpy(pd, &val, b_count); ++ eeprom->len += b_count; ++ } ++ ret = 0; ++ ++eeprom_done: ++ /* Restore clock, link aware and link idle modes */ ++ tg3_restore_clk(tp); ++ if (cpmu_restore) ++ tw32(TG3_CPMU_CTRL, cpmu_val); ++ ++ return ret; ++} ++#endif ++ ++#ifdef ETHTOOL_SEEPROM ++static int tg3_set_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom, u8 *data) ++{ ++ struct tg3 *tp = netdev_priv(dev); ++ int ret; ++ u32 offset, len, b_offset, odd_len; ++ u8 *buf; ++ __be32 start, end; ++ ++ if (tg3_flag(tp, NO_NVRAM) || ++ eeprom->magic != TG3_EEPROM_MAGIC) ++ return -EINVAL; ++ ++ offset = eeprom->offset; ++ len = eeprom->len; ++ ++ if ((b_offset = (offset & 3))) { ++ /* adjustments to start on required 4 byte boundary */ ++ ret = tg3_nvram_read_be32(tp, offset-b_offset, &start); ++ if (ret) ++ return ret; ++ len += b_offset; ++ offset &= ~3; ++ if (len < 4) ++ len = 4; ++ } ++ ++ odd_len = 0; ++ if (len & 3) { ++ /* adjustments to end on required 4 byte boundary */ ++ odd_len = 1; ++ len = (len + 3) & ~3; ++ ret = tg3_nvram_read_be32(tp, offset+len-4, &end); ++ if (ret) ++ return ret; ++ } ++ ++ buf = data; ++ if (b_offset || odd_len) { ++ buf = kmalloc(len, GFP_KERNEL); ++ if (!buf) ++ return -ENOMEM; ++ if (b_offset) ++ memcpy(buf, &start, 4); ++ if (odd_len) ++ memcpy(buf+len-4, &end, 4); ++ memcpy(buf + b_offset, data, eeprom->len); ++ } ++ ++ ret = tg3_nvram_write_block(tp, offset, len, buf); ++ ++ if (buf != data) ++ kfree(buf); ++ ++ return ret; ++} ++#endif ++ ++static int tg3_get_settings(struct net_device *dev, struct ethtool_cmd *cmd) ++{ ++ struct tg3 *tp = netdev_priv(dev); ++ ++#ifdef BCM_INCLUDE_PHYLIB_SUPPORT ++ if (tg3_flag(tp, USE_PHYLIB)) { ++ struct phy_device *phydev; ++ if (!(tp->phy_flags & TG3_PHYFLG_IS_CONNECTED)) ++ return -EAGAIN; ++ phydev = tp->mdio_bus->phy_map[tp->phy_addr]; ++ return phy_ethtool_gset(phydev, cmd); ++ } ++#endif /* BCM_INCLUDE_PHYLIB_SUPPORT */ ++ ++ cmd->supported = (SUPPORTED_Autoneg); ++ ++ if (!(tp->phy_flags & TG3_PHYFLG_10_100_ONLY)) ++ cmd->supported |= (SUPPORTED_1000baseT_Half | ++ SUPPORTED_1000baseT_Full); ++ ++ if (!(tp->phy_flags & TG3_PHYFLG_ANY_SERDES)) { ++ cmd->supported |= (SUPPORTED_100baseT_Half | ++ SUPPORTED_100baseT_Full | ++ SUPPORTED_10baseT_Half | ++ SUPPORTED_10baseT_Full | ++ SUPPORTED_TP); ++ cmd->port = PORT_TP; ++ } else { ++ cmd->supported |= SUPPORTED_FIBRE; ++ cmd->port = PORT_FIBRE; ++ } ++ ++ cmd->advertising = tp->link_config.advertising; ++ if (tg3_flag(tp, PAUSE_AUTONEG)) { ++ if (tp->link_config.flowctrl & FLOW_CTRL_RX) { ++ if (tp->link_config.flowctrl & FLOW_CTRL_TX) { ++ cmd->advertising |= ADVERTISED_Pause; ++ } else { ++ cmd->advertising |= ADVERTISED_Pause | ++ ADVERTISED_Asym_Pause; ++ } ++ } else if (tp->link_config.flowctrl & FLOW_CTRL_TX) { ++ cmd->advertising |= ADVERTISED_Asym_Pause; ++ } ++ } ++ if (netif_running(dev) && tp->link_up) { ++ ethtool_cmd_speed_set(cmd, tp->link_config.active_speed); ++ cmd->duplex = tp->link_config.active_duplex; ++#ifdef BCM_HAS_LP_ADVERTISING ++ cmd->lp_advertising = tp->link_config.rmt_adv; ++#endif /* BCM_HAS_LP_ADVERTISING */ ++#ifdef BCM_HAS_MDIX_STATUS ++ if (!(tp->phy_flags & TG3_PHYFLG_ANY_SERDES)) { ++ if (tp->phy_flags & TG3_PHYFLG_MDIX_STATE) ++ cmd->eth_tp_mdix = ETH_TP_MDI_X; ++ else ++ cmd->eth_tp_mdix = ETH_TP_MDI; ++ } ++#endif /* BCM_HAS_MDIX_STATUS */ ++ } else { ++ ethtool_cmd_speed_set(cmd, SPEED_UNKNOWN); ++ cmd->duplex = DUPLEX_UNKNOWN; ++#ifdef BCM_HAS_MDIX_STATUS ++ cmd->eth_tp_mdix = ETH_TP_MDI_INVALID; ++#endif /* BCM_HAS_MDIX_STATUS */ ++ } ++ cmd->phy_address = tp->phy_addr; ++ cmd->transceiver = XCVR_INTERNAL; ++ cmd->autoneg = tp->link_config.autoneg; ++ cmd->maxtxpkt = 0; ++ cmd->maxrxpkt = 0; ++ return 0; ++} ++ ++static int tg3_set_settings(struct net_device *dev, struct ethtool_cmd *cmd) ++{ ++ struct tg3 *tp = netdev_priv(dev); ++ u32 speed = ethtool_cmd_speed(cmd); ++ ++#ifdef BCM_INCLUDE_PHYLIB_SUPPORT ++ if (tg3_flag(tp, USE_PHYLIB)) { ++ struct phy_device *phydev; ++ if (!(tp->phy_flags & TG3_PHYFLG_IS_CONNECTED)) ++ return -EAGAIN; ++ phydev = tp->mdio_bus->phy_map[tp->phy_addr]; ++ return phy_ethtool_sset(phydev, cmd); ++ } ++#endif /* BCM_INCLUDE_PHYLIB_SUPPORT */ ++ ++ if (cmd->autoneg != AUTONEG_ENABLE && ++ cmd->autoneg != AUTONEG_DISABLE) ++ return -EINVAL; ++ ++ if (cmd->autoneg == AUTONEG_DISABLE && ++ cmd->duplex != DUPLEX_FULL && ++ cmd->duplex != DUPLEX_HALF) ++ return -EINVAL; ++ ++ if (cmd->autoneg == AUTONEG_ENABLE) { ++ u32 mask = ADVERTISED_Autoneg | ++ ADVERTISED_Pause | ++ ADVERTISED_Asym_Pause; ++ ++ if (!(tp->phy_flags & TG3_PHYFLG_10_100_ONLY)) ++ mask |= ADVERTISED_1000baseT_Half | ++ ADVERTISED_1000baseT_Full; ++ ++ if (!(tp->phy_flags & TG3_PHYFLG_ANY_SERDES)) ++ mask |= ADVERTISED_100baseT_Half | ++ ADVERTISED_100baseT_Full | ++ ADVERTISED_10baseT_Half | ++ ADVERTISED_10baseT_Full | ++ ADVERTISED_TP; ++ else ++ mask |= ADVERTISED_FIBRE; ++ ++ if (cmd->advertising & ~mask) ++ return -EINVAL; ++ ++ mask &= (ADVERTISED_1000baseT_Half | ++ ADVERTISED_1000baseT_Full | ++ ADVERTISED_100baseT_Half | ++ ADVERTISED_100baseT_Full | ++ ADVERTISED_10baseT_Half | ++ ADVERTISED_10baseT_Full); ++ ++ cmd->advertising &= mask; ++ } else { ++ if (tp->phy_flags & TG3_PHYFLG_ANY_SERDES) { ++ if (speed != SPEED_1000) ++ return -EINVAL; ++ ++ if (cmd->duplex != DUPLEX_FULL) ++ return -EINVAL; ++ } else { ++ if (speed != SPEED_100 && ++ speed != SPEED_10) ++ return -EINVAL; ++ } ++ } ++ ++ tg3_full_lock(tp, 0); ++ ++ tp->link_config.autoneg = cmd->autoneg; ++ if (cmd->autoneg == AUTONEG_ENABLE) { ++ tp->link_config.advertising = (cmd->advertising | ++ ADVERTISED_Autoneg); ++ tp->link_config.speed = SPEED_UNKNOWN; ++ tp->link_config.duplex = DUPLEX_UNKNOWN; ++ } else { ++ tp->link_config.advertising = 0; ++ tp->link_config.speed = speed; ++ tp->link_config.duplex = cmd->duplex; ++ } ++ ++ tp->phy_flags |= TG3_PHYFLG_USER_CONFIGURED; ++ ++ tg3_warn_mgmt_link_flap(tp); ++ ++ if (netif_running(dev)) ++ tg3_setup_phy(tp, true); ++ ++ tg3_full_unlock(tp); ++ ++ return 0; ++} ++ ++static void tg3_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info) ++{ ++ struct tg3 *tp = netdev_priv(dev); ++ ++ strlcpy(info->driver, DRV_MODULE_NAME, sizeof(info->driver)); ++ strlcpy(info->version, DRV_MODULE_VERSION, sizeof(info->version)); ++ strlcpy(info->fw_version, tp->fw_ver, sizeof(info->fw_version)); ++ strlcpy(info->bus_info, pci_name(tp->pdev), sizeof(info->bus_info)); ++} ++ ++static void tg3_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol) ++{ ++ struct tg3 *tp = netdev_priv(dev); ++ ++ if (tg3_flag(tp, WOL_CAP) && device_can_wakeup(&tp->pdev->dev)) ++ wol->supported = WAKE_MAGIC; ++ else ++ wol->supported = 0; ++ wol->wolopts = 0; ++ if (tg3_flag(tp, WOL_ENABLE) && device_can_wakeup(&tp->pdev->dev)) ++ wol->wolopts = WAKE_MAGIC; ++ memset(&wol->sopass, 0, sizeof(wol->sopass)); ++} ++ ++static int tg3_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol) ++{ ++ struct tg3 *tp = netdev_priv(dev); ++#ifdef BCM_HAS_DEVICE_WAKEUP_API ++ struct device *dp = &tp->pdev->dev; ++#endif ++ ++ if (wol->wolopts & ~WAKE_MAGIC) ++ return -EINVAL; ++ if ((wol->wolopts & WAKE_MAGIC) && ++ !(tg3_flag(tp, WOL_CAP) && device_can_wakeup(dp))) ++ return -EINVAL; ++ ++ device_set_wakeup_enable(dp, wol->wolopts & WAKE_MAGIC); ++ ++ if (wol->wolopts & WAKE_MAGIC) ++ tg3_flag_set(tp, WOL_ENABLE); ++ else ++ tg3_flag_clear(tp, WOL_ENABLE); ++ ++ return 0; ++} ++ ++static u32 tg3_get_msglevel(struct net_device *dev) ++{ ++ struct tg3 *tp = netdev_priv(dev); ++ return tp->msg_enable; ++} ++ ++static void tg3_set_msglevel(struct net_device *dev, u32 value) ++{ ++ struct tg3 *tp = netdev_priv(dev); ++ tp->msg_enable = value; ++} ++ ++static int tg3_nway_reset(struct net_device *dev) ++{ ++ struct tg3 *tp = netdev_priv(dev); ++ int r; ++ ++ if (!netif_running(dev)) ++ return -EAGAIN; ++ ++ if (tp->phy_flags & TG3_PHYFLG_PHY_SERDES) ++ return -EINVAL; ++ ++ tg3_warn_mgmt_link_flap(tp); ++ ++#ifdef BCM_INCLUDE_PHYLIB_SUPPORT ++ if (tg3_flag(tp, USE_PHYLIB)) { ++ if (!(tp->phy_flags & TG3_PHYFLG_IS_CONNECTED)) ++ return -EAGAIN; ++ r = phy_start_aneg(tp->mdio_bus->phy_map[tp->phy_addr]); ++ } else ++#endif /* BCM_INCLUDE_PHYLIB_SUPPORT */ ++ { ++ u32 bmcr; ++ ++ spin_lock_bh(&tp->lock); ++ r = -EINVAL; ++ tg3_readphy(tp, MII_BMCR, &bmcr); ++ if (!tg3_readphy(tp, MII_BMCR, &bmcr) && ++ ((bmcr & BMCR_ANENABLE) || ++ (tp->phy_flags & TG3_PHYFLG_PARALLEL_DETECT))) { ++ tg3_writephy(tp, MII_BMCR, bmcr | BMCR_ANRESTART | ++ BMCR_ANENABLE); ++ r = 0; ++ } ++ spin_unlock_bh(&tp->lock); ++ } ++ ++ return r; ++} ++ ++static void tg3_get_ringparam(struct net_device *dev, struct ethtool_ringparam *ering) ++{ ++ struct tg3 *tp = netdev_priv(dev); ++ ++ ering->rx_max_pending = tp->rx_std_ring_mask; ++ ering->rx_mini_max_pending = 0; ++ if (tg3_flag(tp, JUMBO_RING_ENABLE)) ++ ering->rx_jumbo_max_pending = tp->rx_jmb_ring_mask; ++ else ++ ering->rx_jumbo_max_pending = 0; ++ ++ ering->tx_max_pending = TG3_TX_RING_SIZE - 1; ++ ++ ering->rx_pending = tp->rx_pending; ++ ering->rx_mini_pending = 0; ++ if (tg3_flag(tp, JUMBO_RING_ENABLE)) ++ ering->rx_jumbo_pending = tp->rx_jumbo_pending; ++ else ++ ering->rx_jumbo_pending = 0; ++ ++ ering->tx_pending = tp->napi[0].tx_pending; ++} ++ ++static int tg3_set_ringparam(struct net_device *dev, struct ethtool_ringparam *ering) ++{ ++ struct tg3 *tp = netdev_priv(dev); ++ int i, irq_sync = 0, err = 0; ++ ++ if (!ering->rx_pending || (ering->rx_pending > tp->rx_std_ring_mask) || ++ (tg3_flag(tp, JUMBO_RING_ENABLE) && !ering->rx_jumbo_pending) || ++ (ering->rx_jumbo_pending > tp->rx_jmb_ring_mask) || ++ (ering->tx_pending > TG3_TX_RING_SIZE - 1) || ++ (ering->tx_pending <= MAX_SKB_FRAGS) || ++ (tg3_flag(tp, TSO_BUG) && ++ (ering->tx_pending <= (MAX_SKB_FRAGS * 3)))) ++ return -EINVAL; ++ ++ if (netif_running(dev)) { ++ tg3_phy_stop(tp); ++ tg3_netif_stop(tp); ++#ifdef TG3_VMWARE_NETQ_ENABLE ++ tg3_netq_invalidate_state(tp); ++#endif ++ irq_sync = 1; ++ } ++ ++ tg3_full_lock(tp, irq_sync); ++ ++ tp->rx_pending = ering->rx_pending; ++ ++ if (tg3_flag(tp, MAX_RXPEND_64) && ++ tp->rx_pending > 63) ++ tp->rx_pending = 63; ++ tp->rx_jumbo_pending = ering->rx_jumbo_pending; ++ ++ for (i = 0; i < tp->irq_max; i++) ++ tp->napi[i].tx_pending = ering->tx_pending; ++ ++ if (netif_running(dev)) { ++ tg3_halt(tp, RESET_KIND_SHUTDOWN, 1); ++ err = tg3_restart_hw(tp, false); ++ if (!err) ++ tg3_netif_start(tp); ++ } ++ ++ tg3_full_unlock(tp); ++ ++ if (irq_sync && !err) ++ tg3_phy_start(tp); ++ ++ return err; ++} ++ ++static void tg3_get_pauseparam(struct net_device *dev, struct ethtool_pauseparam *epause) ++{ ++ struct tg3 *tp = netdev_priv(dev); ++ ++ epause->autoneg = !!tg3_flag(tp, PAUSE_AUTONEG); ++ ++ if (tp->link_config.flowctrl & FLOW_CTRL_RX) ++ epause->rx_pause = 1; ++ else ++ epause->rx_pause = 0; ++ ++ if (tp->link_config.flowctrl & FLOW_CTRL_TX) ++ epause->tx_pause = 1; ++ else ++ epause->tx_pause = 0; ++} ++ ++static int tg3_set_pauseparam(struct net_device *dev, struct ethtool_pauseparam *epause) ++{ ++ struct tg3 *tp = netdev_priv(dev); ++ int err = 0; ++ ++ if (tp->link_config.autoneg == AUTONEG_ENABLE) ++ tg3_warn_mgmt_link_flap(tp); ++ ++#ifdef BCM_INCLUDE_PHYLIB_SUPPORT ++ if (tg3_flag(tp, USE_PHYLIB)) { ++ u32 newadv; ++ struct phy_device *phydev; ++ ++ phydev = tp->mdio_bus->phy_map[tp->phy_addr]; ++ ++ if (!(phydev->supported & SUPPORTED_Pause) || ++ (!(phydev->supported & SUPPORTED_Asym_Pause) && ++ (epause->rx_pause != epause->tx_pause))) ++ return -EINVAL; ++ ++ tp->link_config.flowctrl = 0; ++ if (epause->rx_pause) { ++ tp->link_config.flowctrl |= FLOW_CTRL_RX; ++ ++ if (epause->tx_pause) { ++ tp->link_config.flowctrl |= FLOW_CTRL_TX; ++ newadv = ADVERTISED_Pause; ++ } else ++ newadv = ADVERTISED_Pause | ++ ADVERTISED_Asym_Pause; ++ } else if (epause->tx_pause) { ++ tp->link_config.flowctrl |= FLOW_CTRL_TX; ++ newadv = ADVERTISED_Asym_Pause; ++ } else ++ newadv = 0; ++ ++ if (epause->autoneg) ++ tg3_flag_set(tp, PAUSE_AUTONEG); ++ else ++ tg3_flag_clear(tp, PAUSE_AUTONEG); ++ ++ if (tp->phy_flags & TG3_PHYFLG_IS_CONNECTED) { ++ u32 oldadv = phydev->advertising & ++ (ADVERTISED_Pause | ADVERTISED_Asym_Pause); ++ if (oldadv != newadv) { ++ phydev->advertising &= ++ ~(ADVERTISED_Pause | ++ ADVERTISED_Asym_Pause); ++ phydev->advertising |= newadv; ++ if (phydev->autoneg) { ++ /* ++ * Always renegotiate the link to ++ * inform our link partner of our ++ * flow control settings, even if the ++ * flow control is forced. Let ++ * tg3_adjust_link() do the final ++ * flow control setup. ++ */ ++ return phy_start_aneg(phydev); ++ } ++ } ++ ++ if (!epause->autoneg) ++ tg3_setup_flow_control(tp, 0, 0); ++ } else { ++ tp->link_config.advertising &= ++ ~(ADVERTISED_Pause | ++ ADVERTISED_Asym_Pause); ++ tp->link_config.advertising |= newadv; ++ } ++ } else ++#endif /* BCM_INCLUDE_PHYLIB_SUPPORT */ ++ { ++ int irq_sync = 0; ++ ++ if (netif_running(dev)) { ++ tg3_netif_stop(tp); ++#ifdef TG3_VMWARE_NETQ_ENABLE ++ tg3_netq_invalidate_state(tp); ++#endif ++ irq_sync = 1; ++ } ++ ++ tg3_full_lock(tp, irq_sync); ++ ++ if (epause->autoneg) ++ tg3_flag_set(tp, PAUSE_AUTONEG); ++ else ++ tg3_flag_clear(tp, PAUSE_AUTONEG); ++ if (epause->rx_pause) ++ tp->link_config.flowctrl |= FLOW_CTRL_RX; ++ else ++ tp->link_config.flowctrl &= ~FLOW_CTRL_RX; ++ if (epause->tx_pause) ++ tp->link_config.flowctrl |= FLOW_CTRL_TX; ++ else ++ tp->link_config.flowctrl &= ~FLOW_CTRL_TX; ++ ++ if (netif_running(dev)) { ++ tg3_halt(tp, RESET_KIND_SHUTDOWN, 1); ++ err = tg3_restart_hw(tp, false); ++ if (!err) ++ tg3_netif_start(tp); ++ } ++ ++ tg3_full_unlock(tp); ++ } ++ ++ tp->phy_flags |= TG3_PHYFLG_USER_CONFIGURED; ++ ++ return err; ++} ++ ++static int tg3_get_sset_count(struct net_device *dev, int sset) ++{ ++ switch (sset) { ++ case ETH_SS_TEST: ++ return TG3_NUM_TEST; ++ case ETH_SS_STATS: ++#ifdef TG3_VMWARE_NETQ_ENABLE ++ return tg3_netq_stats_size(netdev_priv(dev)); ++#else ++ return TG3_NUM_STATS; ++#endif ++ default: ++ return -EOPNOTSUPP; ++ } ++} ++ ++#if (LINUX_VERSION_CODE < 0x020618) ++static int tg3_get_stats_count (struct net_device *dev) ++{ ++ return tg3_get_sset_count(dev, ETH_SS_STATS); ++} ++ ++static int tg3_get_test_count (struct net_device *dev) ++{ ++ return tg3_get_sset_count(dev, ETH_SS_TEST); ++} ++#endif ++ ++#if defined(BCM_HAS_GET_RXNFC) && !defined(GET_ETHTOOL_OP_EXT) ++#ifdef BCM_HAS_OLD_GET_RXNFC_SIG ++static int tg3_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info, ++ void *rules) ++#else ++static int tg3_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info, ++ u32 *rules __always_unused) ++#endif /* BCM_HAS_OLD_GET_RXNFC_SIG */ ++{ ++ struct tg3 *tp = netdev_priv(dev); ++ ++ if (!tg3_flag(tp, SUPPORT_MSIX)) ++ return -EOPNOTSUPP; ++ ++ switch (info->cmd) { ++ case ETHTOOL_GRXRINGS: ++ if (netif_running(tp->dev)) ++ info->data = tp->rxq_cnt; ++ else { ++ info->data = num_online_cpus(); ++ if (info->data > TG3_RSS_MAX_NUM_QS) ++ info->data = TG3_RSS_MAX_NUM_QS; ++ } ++ return 0; ++ ++ default: ++ return -EOPNOTSUPP; ++ } ++} ++#endif /* BCM_HAS_GET_RXNFC */ ++ ++#if defined(BCM_HAS_GET_RXFH_INDIR_SIZE) && !defined(GET_ETHTOOL_OP_EXT) ++static u32 tg3_get_rxfh_indir_size(struct net_device *dev) ++{ ++ u32 size = 0; ++ struct tg3 *tp = netdev_priv(dev); ++ ++ if (tg3_flag(tp, SUPPORT_MSIX)) ++ size = TG3_RSS_INDIR_TBL_SIZE; ++ ++ return size; ++} ++ ++#ifdef BCM_HAS_OLD_RXFH_INDIR ++static int tg3_get_rxfh_indir(struct net_device *dev, u32 *indir) ++#else ++static int tg3_get_rxfh(struct net_device *dev, u32 *indir, u8 *key) ++#endif ++{ ++ struct tg3 *tp = netdev_priv(dev); ++ int i; ++ ++ for (i = 0; i < TG3_RSS_INDIR_TBL_SIZE; i++) ++ indir[i] = tp->rss_ind_tbl[i]; ++ ++ return 0; ++} ++#ifdef BCM_HAS_OLD_RXFH_INDIR ++static int tg3_set_rxfh_indir(struct net_device *dev, const u32 *indir) ++#else ++static int tg3_set_rxfh(struct net_device *dev, const u32 *indir, const u8 *key) ++#endif ++{ ++ struct tg3 *tp = netdev_priv(dev); ++ size_t i; ++ ++ for (i = 0; i < TG3_RSS_INDIR_TBL_SIZE; i++) ++ tp->rss_ind_tbl[i] = indir[i]; ++ ++ if (!netif_running(dev) || !tg3_flag(tp, ENABLE_RSS)) ++ return 0; ++ ++ /* It is legal to write the indirection ++ * table while the device is running. ++ */ ++ tg3_full_lock(tp, 0); ++ tg3_rss_write_indir_tbl(tp); ++ tg3_full_unlock(tp); ++ ++ return 0; ++} ++#endif /* BCM_HAS_GET_RXFH_INDIR_SIZE */ ++ ++#if defined(ETHTOOL_GCHANNELS) ++static void tg3_get_channels(struct net_device *dev, ++ struct ethtool_channels *channel) ++{ ++ struct tg3 *tp = netdev_priv(dev); ++ u32 deflt_qs = netif_get_num_default_rss_queues(); ++ ++ channel->max_rx = tp->rxq_max; ++ channel->max_tx = tp->txq_max; ++ ++ if (netif_running(dev)) { ++ channel->rx_count = tp->rxq_cnt; ++ channel->tx_count = tp->txq_cnt; ++ } else { ++ if (tp->rxq_req) ++ channel->rx_count = tp->rxq_req; ++ else ++ channel->rx_count = min(deflt_qs, tp->rxq_max); ++ ++ if (tp->txq_req) ++ channel->tx_count = tp->txq_req; ++ else ++ channel->tx_count = min(deflt_qs, tp->txq_max); ++ } ++} ++ ++static int tg3_set_channels(struct net_device *dev, ++ struct ethtool_channels *channel) ++{ ++ struct tg3 *tp = netdev_priv(dev); ++ ++ if (!tg3_flag(tp, SUPPORT_MSIX)) ++ return -EOPNOTSUPP; ++ ++ if (channel->rx_count > tp->rxq_max || ++ channel->tx_count > tp->txq_max) ++ return -EINVAL; ++ ++ tp->rxq_req = channel->rx_count; ++ tp->txq_req = channel->tx_count; ++ ++ if (!netif_running(dev)) ++ return 0; ++ ++ tg3_stop(tp); ++ ++ tg3_carrier_off(tp); ++ ++ tg3_start(tp, true, false, false); ++ ++ return 0; ++} ++#endif /* ETHTOOL_GCHANNELS */ ++ ++static void tg3_get_strings(struct net_device *dev, u32 stringset, u8 *buf) ++{ ++#ifdef TG3_VMWARE_NETQ_ENABLE ++ struct tg3 *tp = netdev_priv(dev); ++#endif ++ ++ switch (stringset) { ++ case ETH_SS_STATS: ++ memcpy(buf, ðtool_stats_keys, sizeof(ethtool_stats_keys)); ++#ifdef TG3_VMWARE_NETQ_ENABLE ++ if (tg3_flag(tp, ENABLE_IOV)) { ++ buf += sizeof(ethtool_stats_keys); ++ tg3_netq_stats_get_strings(tp, buf); ++ } ++#endif ++ break; ++ case ETH_SS_TEST: ++ memcpy(buf, ðtool_test_keys, sizeof(ethtool_test_keys)); ++ break; ++ default: ++ WARN_ON(1); /* we need a WARN() */ ++ break; ++ } ++} ++ ++static int tg3_set_phys_id(struct net_device *dev, ++ enum ethtool_phys_id_state state) ++{ ++ struct tg3 *tp = netdev_priv(dev); ++ ++ if (!netif_running(tp->dev)) ++ return -EAGAIN; ++ ++ switch (state) { ++ case ETHTOOL_ID_ACTIVE: ++ return 1; /* cycle on/off once per second */ ++ ++ case ETHTOOL_ID_ON: ++ tw32(MAC_LED_CTRL, LED_CTRL_LNKLED_OVERRIDE | ++ LED_CTRL_1000MBPS_ON | ++ LED_CTRL_100MBPS_ON | ++ LED_CTRL_10MBPS_ON | ++ LED_CTRL_TRAFFIC_OVERRIDE | ++ LED_CTRL_TRAFFIC_BLINK | ++ LED_CTRL_TRAFFIC_LED); ++ break; ++ ++ case ETHTOOL_ID_OFF: ++ tw32(MAC_LED_CTRL, LED_CTRL_LNKLED_OVERRIDE | ++ LED_CTRL_TRAFFIC_OVERRIDE); ++ break; ++ ++ case ETHTOOL_ID_INACTIVE: ++ tw32(MAC_LED_CTRL, tp->led_ctrl); ++ break; ++ } ++ ++ return 0; ++} ++ ++static void tg3_get_ethtool_stats(struct net_device *dev, ++ struct ethtool_stats *estats, u64 *tmp_stats) ++{ ++ struct tg3 *tp = netdev_priv(dev); ++ ++ if (tp->hw_stats) { ++ tg3_get_estats(tp, (struct tg3_ethtool_stats *)tmp_stats); ++ } ++ else { ++ memset(tmp_stats, 0, sizeof(struct tg3_ethtool_stats)); ++#if !defined(__VMKLNX__) ++ ((struct tg3_ethtool_stats *)tmp_stats)->unrecoverable_err = ++ tp->unrecoverable_err; ++ ((struct tg3_ethtool_stats *)tmp_stats)->recoverable_err = ++ tp->recoverable_err; ++#endif ++ } ++ ++#ifdef TG3_VMWARE_NETQ_ENABLE ++ tg3_netq_stats_get(tp, tmp_stats + TG3_NUM_STATS); ++#endif ++} ++ ++static __be32 *tg3_vpd_readblock(struct tg3 *tp, u32 *vpdlen) ++{ ++ int i; ++ __be32 *buf; ++ u32 offset = 0, len = 0; ++ u32 magic, val; ++ ++ if (tg3_flag(tp, NO_NVRAM) || tg3_nvram_read(tp, 0, &magic)) ++ return NULL; ++ ++ if (magic == TG3_EEPROM_MAGIC) { ++ for (offset = TG3_NVM_DIR_START; ++ offset < TG3_NVM_DIR_END; ++ offset += TG3_NVM_DIRENT_SIZE) { ++ if (tg3_nvram_read(tp, offset, &val)) ++ return NULL; ++ ++ if ((val >> TG3_NVM_DIRTYPE_SHIFT) == ++ TG3_NVM_DIRTYPE_EXTVPD) ++ break; ++ } ++ ++ if (offset != TG3_NVM_DIR_END) { ++ len = (val & TG3_NVM_DIRTYPE_LENMSK) * 4; ++ if (tg3_nvram_read(tp, offset + 4, &offset)) ++ return NULL; ++ ++ offset = tg3_nvram_logical_addr(tp, offset); ++ } ++ } ++ ++ if (!offset || !len) { ++ offset = TG3_NVM_VPD_OFF; ++ len = TG3_NVM_VPD_LEN; ++ } ++ ++ buf = kmalloc(len, GFP_KERNEL); ++ if (buf == NULL) ++ return NULL; ++ ++ if (magic == TG3_EEPROM_MAGIC) { ++ for (i = 0; i < len; i += 4) { ++ /* The data is in little-endian format in NVRAM. ++ * Use the big-endian read routines to preserve ++ * the byte order as it exists in NVRAM. ++ */ ++ if (tg3_nvram_read_be32(tp, offset + i, &buf[i/4])) ++ goto error; ++ } ++ } else { ++ u8 *ptr; ++ ssize_t cnt; ++ unsigned int pos = 0; ++ ++ ptr = (u8 *)&buf[0]; ++ for (i = 0; pos < len && i < 3; i++, pos += cnt, ptr += cnt) { ++ cnt = pci_read_vpd(tp->pdev, pos, ++ len - pos, ptr); ++ if (cnt == -ETIMEDOUT || cnt == -EINTR) ++ cnt = 0; ++ else if (cnt < 0) ++ goto error; ++ } ++ if (pos != len) ++ goto error; ++ } ++ ++ *vpdlen = len; ++ ++ return buf; ++ ++error: ++ kfree(buf); ++ return NULL; ++} ++ ++#define NVRAM_TEST_SIZE 0x100 ++#define NVRAM_SELFBOOT_FORMAT1_0_SIZE 0x14 ++#define NVRAM_SELFBOOT_FORMAT1_2_SIZE 0x18 ++#define NVRAM_SELFBOOT_FORMAT1_3_SIZE 0x1c ++#define NVRAM_SELFBOOT_FORMAT1_4_SIZE 0x20 ++#define NVRAM_SELFBOOT_FORMAT1_5_SIZE 0x24 ++#define NVRAM_SELFBOOT_FORMAT1_6_SIZE 0x50 ++#define NVRAM_SELFBOOT_HW_SIZE 0x20 ++#define NVRAM_SELFBOOT_DATA_SIZE 0x1c ++ ++static int tg3_test_nvram(struct tg3 *tp) ++{ ++ u32 csum, magic, len; ++ __be32 *buf; ++ int i, j, k, err = 0, size; ++ ++ if (tg3_flag(tp, NO_NVRAM)) ++ return 0; ++ ++ if (tg3_nvram_read(tp, 0, &magic) != 0) ++ return -EIO; ++ ++ if (magic == TG3_EEPROM_MAGIC) ++ size = NVRAM_TEST_SIZE; ++ else if ((magic & TG3_EEPROM_MAGIC_FW_MSK) == TG3_EEPROM_MAGIC_FW) { ++ if ((magic & TG3_EEPROM_SB_FORMAT_MASK) == ++ TG3_EEPROM_SB_FORMAT_1) { ++ switch (magic & TG3_EEPROM_SB_REVISION_MASK) { ++ case TG3_EEPROM_SB_REVISION_0: ++ size = NVRAM_SELFBOOT_FORMAT1_0_SIZE; ++ break; ++ case TG3_EEPROM_SB_REVISION_2: ++ size = NVRAM_SELFBOOT_FORMAT1_2_SIZE; ++ break; ++ case TG3_EEPROM_SB_REVISION_3: ++ size = NVRAM_SELFBOOT_FORMAT1_3_SIZE; ++ break; ++ case TG3_EEPROM_SB_REVISION_4: ++ size = NVRAM_SELFBOOT_FORMAT1_4_SIZE; ++ break; ++ case TG3_EEPROM_SB_REVISION_5: ++ size = NVRAM_SELFBOOT_FORMAT1_5_SIZE; ++ break; ++ case TG3_EEPROM_SB_REVISION_6: ++ size = NVRAM_SELFBOOT_FORMAT1_6_SIZE; ++ break; ++ default: ++ return -EIO; ++ } ++ } else ++ return 0; ++ } else if ((magic & TG3_EEPROM_MAGIC_HW_MSK) == TG3_EEPROM_MAGIC_HW) ++ size = NVRAM_SELFBOOT_HW_SIZE; ++ else ++ return -EIO; ++ ++ buf = kmalloc(size, GFP_KERNEL); ++ if (buf == NULL) ++ return -ENOMEM; ++ ++ err = -EIO; ++ for (i = 0, j = 0; i < size; i += 4, j++) { ++ err = tg3_nvram_read_be32(tp, i, &buf[j]); ++ if (err) ++ break; ++ } ++ if (i < size) ++ goto out; ++ ++ /* Selfboot format */ ++ magic = be32_to_cpu(buf[0]); ++ if ((magic & TG3_EEPROM_MAGIC_FW_MSK) == ++ TG3_EEPROM_MAGIC_FW) { ++ u8 *buf8 = (u8 *) buf, csum8 = 0; ++ ++ if ((magic & TG3_EEPROM_SB_REVISION_MASK) == ++ TG3_EEPROM_SB_REVISION_2) { ++ /* For rev 2, the csum doesn't include the MBA. */ ++ for (i = 0; i < TG3_EEPROM_SB_F1R2_MBA_OFF; i++) ++ csum8 += buf8[i]; ++ for (i = TG3_EEPROM_SB_F1R2_MBA_OFF + 4; i < size; i++) ++ csum8 += buf8[i]; ++ } else { ++ for (i = 0; i < size; i++) ++ csum8 += buf8[i]; ++ } ++ ++ if (csum8 == 0) { ++ err = 0; ++ goto out; ++ } ++ ++ err = -EIO; ++ goto out; ++ } ++ ++ if ((magic & TG3_EEPROM_MAGIC_HW_MSK) == ++ TG3_EEPROM_MAGIC_HW) { ++ u8 data[NVRAM_SELFBOOT_DATA_SIZE]; ++ u8 parity[NVRAM_SELFBOOT_DATA_SIZE]; ++ u8 *buf8 = (u8 *) buf; ++ ++ /* Separate the parity bits and the data bytes. */ ++ for (i = 0, j = 0, k = 0; i < NVRAM_SELFBOOT_HW_SIZE; i++) { ++ if ((i == 0) || (i == 8)) { ++ int l; ++ u8 msk; ++ ++ for (l = 0, msk = 0x80; l < 7; l++, msk >>= 1) ++ parity[k++] = buf8[i] & msk; ++ i++; ++ } else if (i == 16) { ++ int l; ++ u8 msk; ++ ++ for (l = 0, msk = 0x20; l < 6; l++, msk >>= 1) ++ parity[k++] = buf8[i] & msk; ++ i++; ++ ++ for (l = 0, msk = 0x80; l < 8; l++, msk >>= 1) ++ parity[k++] = buf8[i] & msk; ++ i++; ++ } ++ data[j++] = buf8[i]; ++ } ++ ++ err = -EIO; ++ for (i = 0; i < NVRAM_SELFBOOT_DATA_SIZE; i++) { ++ u8 hw8 = hweight8(data[i]); ++ ++ if ((hw8 & 0x1) && parity[i]) ++ goto out; ++ else if (!(hw8 & 0x1) && !parity[i]) ++ goto out; ++ } ++ err = 0; ++ goto out; ++ } ++ ++ err = -EIO; ++ ++ /* Bootstrap checksum at offset 0x10 */ ++ csum = calc_crc((unsigned char *) buf, 0x10); ++ if (csum != le32_to_cpu(buf[0x10/4])) ++ goto out; ++ ++ /* Manufacturing block starts at offset 0x74, checksum at 0xfc */ ++ csum = calc_crc((unsigned char *) &buf[0x74/4], 0x88); ++ if (csum != le32_to_cpu(buf[0xfc/4])) ++ goto out; ++ ++ kfree(buf); ++ ++ buf = tg3_vpd_readblock(tp, &len); ++ if (!buf) ++ return -ENOMEM; ++ ++ i = pci_vpd_find_tag((u8 *)buf, 0, len, PCI_VPD_LRDT_RO_DATA); ++ if (i > 0) { ++ j = pci_vpd_lrdt_size(&((u8 *)buf)[i]); ++ if (j < 0) ++ goto out; ++ ++ if (i + PCI_VPD_LRDT_TAG_SIZE + j > len) ++ goto out; ++ ++ i += PCI_VPD_LRDT_TAG_SIZE; ++ j = pci_vpd_find_info_keyword((u8 *)buf, i, j, ++ PCI_VPD_RO_KEYWORD_CHKSUM); ++ if (j > 0) { ++ u8 csum8 = 0; ++ ++ j += PCI_VPD_INFO_FLD_HDR_SIZE; ++ ++ for (i = 0; i <= j; i++) ++ csum8 += ((u8 *)buf)[i]; ++ ++ if (csum8) ++ goto out; ++ } ++ } ++ ++ err = 0; ++ ++out: ++ kfree(buf); ++ return err; ++} ++ ++#define TG3_SERDES_TIMEOUT_SEC 2 ++#define TG3_COPPER_TIMEOUT_SEC 7 ++ ++static int tg3_test_link(struct tg3 *tp) ++{ ++ int i, max; ++ ++ if (!netif_running(tp->dev)) ++ return -ENODEV; ++ ++ if (tp->phy_flags & TG3_PHYFLG_ANY_SERDES) ++ max = TG3_SERDES_TIMEOUT_SEC; ++ else ++ max = TG3_COPPER_TIMEOUT_SEC; ++ ++ for (i = 0; i < max; i++) { ++ if (tp->link_up) ++ return 0; ++ ++ if (msleep_interruptible(1000)) ++ break; ++ } ++ ++ return -EIO; ++} ++ ++/* Only test the commonly used registers */ ++static int tg3_test_registers(struct tg3 *tp) ++{ ++ int i, is_5705, is_5750; ++ u32 offset, read_mask, write_mask, val, save_val, read_val; ++ static struct { ++ u16 offset; ++ u16 flags; ++#define TG3_FL_5705 0x1 ++#define TG3_FL_NOT_5705 0x2 ++#define TG3_FL_NOT_5788 0x4 ++#define TG3_FL_NOT_5750 0x8 ++ u32 read_mask; ++ u32 write_mask; ++ } reg_tbl[] = { ++ /* MAC Control Registers */ ++ { MAC_MODE, TG3_FL_NOT_5705, ++ 0x00000000, 0x00ef6f8c }, ++ { MAC_MODE, TG3_FL_5705, ++ 0x00000000, 0x01ef6b8c }, ++ { MAC_STATUS, TG3_FL_NOT_5705, ++ 0x03800107, 0x00000000 }, ++ { MAC_STATUS, TG3_FL_5705, ++ 0x03800100, 0x00000000 }, ++ { MAC_ADDR_0_HIGH, 0x0000, ++ 0x00000000, 0x0000ffff }, ++ { MAC_ADDR_0_LOW, 0x0000, ++ 0x00000000, 0xffffffff }, ++ { MAC_RX_MTU_SIZE, 0x0000, ++ 0x00000000, 0x0000ffff }, ++ { MAC_TX_MODE, 0x0000, ++ 0x00000000, 0x00000070 }, ++ { MAC_TX_LENGTHS, 0x0000, ++ 0x00000000, 0x00003fff }, ++ { MAC_RX_MODE, TG3_FL_NOT_5705, ++ 0x00000000, 0x000007fc }, ++ { MAC_RX_MODE, TG3_FL_5705, ++ 0x00000000, 0x000007dc }, ++ { MAC_HASH_REG_0, 0x0000, ++ 0x00000000, 0xffffffff }, ++ { MAC_HASH_REG_1, 0x0000, ++ 0x00000000, 0xffffffff }, ++ { MAC_HASH_REG_2, 0x0000, ++ 0x00000000, 0xffffffff }, ++ { MAC_HASH_REG_3, 0x0000, ++ 0x00000000, 0xffffffff }, ++ ++ /* Receive Data and Receive BD Initiator Control Registers. */ ++ { RCVDBDI_JUMBO_BD+0, TG3_FL_NOT_5705, ++ 0x00000000, 0xffffffff }, ++ { RCVDBDI_JUMBO_BD+4, TG3_FL_NOT_5705, ++ 0x00000000, 0xffffffff }, ++ { RCVDBDI_JUMBO_BD+8, TG3_FL_NOT_5705, ++ 0x00000000, 0x00000003 }, ++ { RCVDBDI_JUMBO_BD+0xc, TG3_FL_NOT_5705, ++ 0x00000000, 0xffffffff }, ++ { RCVDBDI_STD_BD+0, 0x0000, ++ 0x00000000, 0xffffffff }, ++ { RCVDBDI_STD_BD+4, 0x0000, ++ 0x00000000, 0xffffffff }, ++ { RCVDBDI_STD_BD+8, 0x0000, ++ 0x00000000, 0xffff0002 }, ++ { RCVDBDI_STD_BD+0xc, 0x0000, ++ 0x00000000, 0xffffffff }, ++ ++ /* Receive BD Initiator Control Registers. */ ++ { RCVBDI_STD_THRESH, TG3_FL_NOT_5705, ++ 0x00000000, 0xffffffff }, ++ { RCVBDI_STD_THRESH, TG3_FL_5705, ++ 0x00000000, 0x000003ff }, ++ { RCVBDI_JUMBO_THRESH, TG3_FL_NOT_5705, ++ 0x00000000, 0xffffffff }, ++ ++ /* Host Coalescing Control Registers. */ ++ { HOSTCC_MODE, TG3_FL_NOT_5705, ++ 0x00000000, 0x00000004 }, ++ { HOSTCC_MODE, TG3_FL_5705, ++ 0x00000000, 0x000000f6 }, ++ { HOSTCC_RXCOL_TICKS, TG3_FL_NOT_5705, ++ 0x00000000, 0xffffffff }, ++ { HOSTCC_RXCOL_TICKS, TG3_FL_5705, ++ 0x00000000, 0x000003ff }, ++ { HOSTCC_TXCOL_TICKS, TG3_FL_NOT_5705, ++ 0x00000000, 0xffffffff }, ++ { HOSTCC_TXCOL_TICKS, TG3_FL_5705, ++ 0x00000000, 0x000003ff }, ++ { HOSTCC_RXMAX_FRAMES, TG3_FL_NOT_5705, ++ 0x00000000, 0xffffffff }, ++ { HOSTCC_RXMAX_FRAMES, TG3_FL_5705 | TG3_FL_NOT_5788, ++ 0x00000000, 0x000000ff }, ++ { HOSTCC_TXMAX_FRAMES, TG3_FL_NOT_5705, ++ 0x00000000, 0xffffffff }, ++ { HOSTCC_TXMAX_FRAMES, TG3_FL_5705 | TG3_FL_NOT_5788, ++ 0x00000000, 0x000000ff }, ++ { HOSTCC_RXCOAL_TICK_INT, TG3_FL_NOT_5705, ++ 0x00000000, 0xffffffff }, ++ { HOSTCC_TXCOAL_TICK_INT, TG3_FL_NOT_5705, ++ 0x00000000, 0xffffffff }, ++ { HOSTCC_RXCOAL_MAXF_INT, TG3_FL_NOT_5705, ++ 0x00000000, 0xffffffff }, ++ { HOSTCC_RXCOAL_MAXF_INT, TG3_FL_5705 | TG3_FL_NOT_5788, ++ 0x00000000, 0x000000ff }, ++ { HOSTCC_TXCOAL_MAXF_INT, TG3_FL_NOT_5705, ++ 0x00000000, 0xffffffff }, ++ { HOSTCC_TXCOAL_MAXF_INT, TG3_FL_5705 | TG3_FL_NOT_5788, ++ 0x00000000, 0x000000ff }, ++ { HOSTCC_STAT_COAL_TICKS, TG3_FL_NOT_5705, ++ 0x00000000, 0xffffffff }, ++ { HOSTCC_STATS_BLK_HOST_ADDR, TG3_FL_NOT_5705, ++ 0x00000000, 0xffffffff }, ++ { HOSTCC_STATS_BLK_HOST_ADDR+4, TG3_FL_NOT_5705, ++ 0x00000000, 0xffffffff }, ++ { HOSTCC_STATUS_BLK_HOST_ADDR, 0x0000, ++ 0x00000000, 0xffffffff }, ++ { HOSTCC_STATUS_BLK_HOST_ADDR+4, 0x0000, ++ 0x00000000, 0xffffffff }, ++ { HOSTCC_STATS_BLK_NIC_ADDR, 0x0000, ++ 0xffffffff, 0x00000000 }, ++ { HOSTCC_STATUS_BLK_NIC_ADDR, 0x0000, ++ 0xffffffff, 0x00000000 }, ++ ++ /* Buffer Manager Control Registers. */ ++ { BUFMGR_MB_POOL_ADDR, TG3_FL_NOT_5750, ++ 0x00000000, 0x007fff80 }, ++ { BUFMGR_MB_POOL_SIZE, TG3_FL_NOT_5750, ++ 0x00000000, 0x007fffff }, ++ { BUFMGR_MB_RDMA_LOW_WATER, 0x0000, ++ 0x00000000, 0x0000003f }, ++ { BUFMGR_MB_MACRX_LOW_WATER, 0x0000, ++ 0x00000000, 0x000001ff }, ++ { BUFMGR_MB_HIGH_WATER, 0x0000, ++ 0x00000000, 0x000001ff }, ++ { BUFMGR_DMA_DESC_POOL_ADDR, TG3_FL_NOT_5705, ++ 0xffffffff, 0x00000000 }, ++ { BUFMGR_DMA_DESC_POOL_SIZE, TG3_FL_NOT_5705, ++ 0xffffffff, 0x00000000 }, ++ ++ /* Mailbox Registers */ ++ { GRCMBOX_RCVSTD_PROD_IDX+4, 0x0000, ++ 0x00000000, 0x000001ff }, ++ { GRCMBOX_RCVJUMBO_PROD_IDX+4, TG3_FL_NOT_5705, ++ 0x00000000, 0x000001ff }, ++ { GRCMBOX_RCVRET_CON_IDX_0+4, 0x0000, ++ 0x00000000, 0x000007ff }, ++ { GRCMBOX_SNDHOST_PROD_IDX_0+4, 0x0000, ++ 0x00000000, 0x000001ff }, ++ ++ { 0xffff, 0x0000, 0x00000000, 0x00000000 }, ++ }; ++ ++ is_5705 = is_5750 = 0; ++ if (tg3_flag(tp, 5705_PLUS)) { ++ is_5705 = 1; ++ if (tg3_flag(tp, 5750_PLUS)) ++ is_5750 = 1; ++ } ++ ++ for (i = 0; reg_tbl[i].offset != 0xffff; i++) { ++ if (is_5705 && (reg_tbl[i].flags & TG3_FL_NOT_5705)) ++ continue; ++ ++ if (!is_5705 && (reg_tbl[i].flags & TG3_FL_5705)) ++ continue; ++ ++ if (tg3_flag(tp, IS_5788) && ++ (reg_tbl[i].flags & TG3_FL_NOT_5788)) ++ continue; ++ ++ if (is_5750 && (reg_tbl[i].flags & TG3_FL_NOT_5750)) ++ continue; ++ ++ offset = (u32) reg_tbl[i].offset; ++ read_mask = reg_tbl[i].read_mask; ++ write_mask = reg_tbl[i].write_mask; ++ ++ /* Save the original register content */ ++ save_val = tr32(offset); ++ ++ /* Determine the read-only value. */ ++ read_val = save_val & read_mask; ++ ++ /* Write zero to the register, then make sure the read-only bits ++ * are not changed and the read/write bits are all zeros. ++ */ ++ tw32(offset, 0); ++ ++ val = tr32(offset); ++ ++ /* Test the read-only and read/write bits. */ ++ if (((val & read_mask) != read_val) || (val & write_mask)) ++ goto out; ++ ++ /* Write ones to all the bits defined by RdMask and WrMask, then ++ * make sure the read-only bits are not changed and the ++ * read/write bits are all ones. ++ */ ++ tw32(offset, read_mask | write_mask); ++ ++ val = tr32(offset); ++ ++ /* Test the read-only bits. */ ++ if ((val & read_mask) != read_val) ++ goto out; ++ ++ /* Test the read/write bits. */ ++ if ((val & write_mask) != write_mask) ++ goto out; ++ ++ tw32(offset, save_val); ++ } ++ ++ return 0; ++ ++out: ++ if (netif_msg_hw(tp)) ++ netdev_err(tp->dev, ++ "Register test failed at offset %x\n", offset); ++ tw32(offset, save_val); ++ return -EIO; ++} ++ ++static int tg3_do_mem_test(struct tg3 *tp, u32 offset, u32 len) ++{ ++ static const u32 test_pattern[] = { 0x00000000, 0xffffffff, 0xaa55a55a }; ++ int i; ++ u32 j; ++ ++ for (i = 0; i < ARRAY_SIZE(test_pattern); i++) { ++ for (j = 0; j < len; j += 4) { ++ u32 val; ++ ++ tg3_write_mem(tp, offset + j, test_pattern[i]); ++ tg3_read_mem(tp, offset + j, &val); ++ if (val != test_pattern[i]) ++ return -EIO; ++ } ++ } ++ return 0; ++} ++ ++static int tg3_test_memory(struct tg3 *tp) ++{ ++ static struct mem_entry { ++ u32 offset; ++ u32 len; ++ } mem_tbl_570x[] = { ++ { 0x00000000, 0x00b50}, ++ { 0x00002000, 0x1c000}, ++ { 0xffffffff, 0x00000} ++ }, mem_tbl_5705[] = { ++ { 0x00000100, 0x0000c}, ++ { 0x00000200, 0x00008}, ++ { 0x00004000, 0x00800}, ++ { 0x00006000, 0x01000}, ++ { 0x00008000, 0x02000}, ++ { 0x00010000, 0x0e000}, ++ { 0xffffffff, 0x00000} ++ }, mem_tbl_5755[] = { ++ { 0x00000200, 0x00008}, ++ { 0x00004000, 0x00800}, ++ { 0x00006000, 0x00800}, ++ { 0x00008000, 0x02000}, ++ { 0x00010000, 0x0c000}, ++ { 0xffffffff, 0x00000} ++ }, mem_tbl_5906[] = { ++ { 0x00000200, 0x00008}, ++ { 0x00004000, 0x00400}, ++ { 0x00006000, 0x00400}, ++ { 0x00008000, 0x01000}, ++ { 0x00010000, 0x01000}, ++ { 0xffffffff, 0x00000} ++ }, mem_tbl_5717[] = { ++ { 0x00000200, 0x00008}, ++ { 0x00010000, 0x0a000}, ++ { 0x00020000, 0x13c00}, ++ { 0xffffffff, 0x00000} ++ }, mem_tbl_57765[] = { ++ { 0x00000200, 0x00008}, ++ { 0x00004000, 0x00800}, ++ { 0x00006000, 0x09800}, ++ { 0x00010000, 0x0a000}, ++ { 0xffffffff, 0x00000} ++ }; ++ struct mem_entry *mem_tbl; ++ int err = 0; ++ int i; ++ ++ if (tg3_flag(tp, 5717_PLUS)) ++ mem_tbl = mem_tbl_5717; ++ else if (tg3_flag(tp, 57765_CLASS) || ++ tg3_asic_rev(tp) == ASIC_REV_5762) ++ mem_tbl = mem_tbl_57765; ++ else if (tg3_flag(tp, 5755_PLUS)) ++ mem_tbl = mem_tbl_5755; ++ else if (tg3_asic_rev(tp) == ASIC_REV_5906) ++ mem_tbl = mem_tbl_5906; ++ else if (tg3_flag(tp, 5705_PLUS)) ++ mem_tbl = mem_tbl_5705; ++ else ++ mem_tbl = mem_tbl_570x; ++ ++ for (i = 0; mem_tbl[i].offset != 0xffffffff; i++) { ++ err = tg3_do_mem_test(tp, mem_tbl[i].offset, mem_tbl[i].len); ++ if (err) ++ break; ++ } ++ ++ return err; ++} ++ ++#define TG3_TSO_MSS 500 ++ ++#define TG3_TSO_IP_HDR_LEN 20 ++#define TG3_TSO_TCP_HDR_LEN 20 ++#define TG3_TSO_TCP_OPT_LEN 12 ++ ++static const u8 tg3_tso_header[] = { ++0x08, 0x00, ++0x45, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x40, 0x00, ++0x40, 0x06, 0x00, 0x00, ++0x0a, 0x00, 0x00, 0x01, ++0x0a, 0x00, 0x00, 0x02, ++0x0d, 0x00, 0xe0, 0x00, ++0x00, 0x00, 0x01, 0x00, ++0x00, 0x00, 0x02, 0x00, ++0x80, 0x10, 0x10, 0x00, ++0x14, 0x09, 0x00, 0x00, ++0x01, 0x01, 0x08, 0x0a, ++0x11, 0x11, 0x11, 0x11, ++0x11, 0x11, 0x11, 0x11, ++}; ++ ++static int tg3_run_loopback(struct tg3 *tp, u32 pktsz, bool tso_loopback) ++{ ++ u32 rx_start_idx, rx_idx, tx_idx, opaque_key; ++ u32 base_flags = 0, mss = 0, desc_idx, coal_now, data_off, val; ++ u32 budget; ++ struct sk_buff *skb; ++#ifndef BCM_HAS_BUILD_SKB ++ struct sk_buff *rx_skb; ++#endif ++ u8 *tx_data, *rx_data; ++ dma_addr_t map; ++ int num_pkts, tx_len, rx_len, i, err; ++ struct tg3_rx_buffer_desc *desc; ++ struct tg3_napi *tnapi, *rnapi; ++ struct tg3_rx_prodring_set *tpr = &tp->napi[0].prodring; ++ ++ tnapi = &tp->napi[0]; ++ rnapi = &tp->napi[0]; ++ if (tg3_flag(tp, ENABLE_RSS)) ++ rnapi = &tp->napi[1]; ++ if (tg3_flag(tp, ENABLE_TSS)) ++ tnapi = &tp->napi[1]; ++ coal_now = tnapi->coal_now | rnapi->coal_now; ++ ++ err = -EIO; ++ ++ tx_len = pktsz; ++ skb = netdev_alloc_skb(tp->dev, tx_len); ++ if (!skb) ++ return -ENOMEM; ++ ++ tx_data = skb_put(skb, tx_len); ++ memcpy(tx_data, tp->dev->dev_addr, ETH_ALEN); ++ memset(tx_data + ETH_ALEN, 0x0, 8); ++ ++ tw32(MAC_RX_MTU_SIZE, tx_len + ETH_FCS_LEN); ++ ++#if TG3_TSO_SUPPORT != 0 ++ if (tso_loopback) { ++ struct iphdr *iph = (struct iphdr *)&tx_data[ETH_HLEN]; ++ ++ u32 hdr_len = TG3_TSO_IP_HDR_LEN + TG3_TSO_TCP_HDR_LEN + ++ TG3_TSO_TCP_OPT_LEN; ++ ++ memcpy(tx_data + ETH_ALEN * 2, tg3_tso_header, ++ sizeof(tg3_tso_header)); ++ mss = TG3_TSO_MSS; ++ ++ val = tx_len - ETH_ALEN * 2 - sizeof(tg3_tso_header); ++ num_pkts = DIV_ROUND_UP(val, TG3_TSO_MSS); ++ ++ /* Set the total length field in the IP header */ ++ iph->tot_len = htons((u16)(mss + hdr_len)); ++ ++ base_flags = (TXD_FLAG_CPU_PRE_DMA | ++ TXD_FLAG_CPU_POST_DMA); ++ ++ if (tg3_flag(tp, HW_TSO_1) || ++ tg3_flag(tp, HW_TSO_2) || ++ tg3_flag(tp, HW_TSO_3)) { ++ struct tcphdr *th; ++ val = ETH_HLEN + TG3_TSO_IP_HDR_LEN; ++ th = (struct tcphdr *)&tx_data[val]; ++ th->check = 0; ++ } else ++ base_flags |= TXD_FLAG_TCPUDP_CSUM; ++ ++ if (tg3_flag(tp, HW_TSO_3)) { ++ mss |= (hdr_len & 0xc) << 12; ++ if (hdr_len & 0x10) ++ base_flags |= 0x00000010; ++ base_flags |= (hdr_len & 0x3e0) << 5; ++ } else if (tg3_flag(tp, HW_TSO_2)) ++ mss |= hdr_len << 9; ++ else if (tg3_flag(tp, HW_TSO_1) || ++ tg3_asic_rev(tp) == ASIC_REV_5705) { ++ mss |= (TG3_TSO_TCP_OPT_LEN << 9); ++ } else { ++ base_flags |= (TG3_TSO_TCP_OPT_LEN << 10); ++ } ++ ++ data_off = ETH_ALEN * 2 + sizeof(tg3_tso_header); ++ } else ++#endif ++ { ++ num_pkts = 1; ++ data_off = ETH_HLEN; ++ ++ if (tg3_flag(tp, USE_JUMBO_BDFLAG) && ++ tx_len > VLAN_ETH_FRAME_LEN) ++ base_flags |= TXD_FLAG_JMB_PKT; ++ } ++ ++ for (i = data_off; i < tx_len; i++) ++ tx_data[i] = (u8) (i & 0xff); ++ ++ map = pci_map_single(tp->pdev, skb->data, tx_len, PCI_DMA_TODEVICE); ++ if (pci_dma_mapping_error_(tp->pdev, map)) { ++ dev_kfree_skb(skb); ++ return -EIO; ++ } ++ ++ val = tnapi->tx_prod; ++ tnapi->tx_buffers[val].skb = skb; ++ dma_unmap_addr_set(&tnapi->tx_buffers[val], mapping, map); ++ ++ tw32_f(HOSTCC_MODE, tp->coalesce_mode | HOSTCC_MODE_ENABLE | ++ rnapi->coal_now); ++ ++ udelay(10); ++ ++ rx_start_idx = rnapi->hw_status->idx[0].rx_producer; ++ ++ budget = tg3_tx_avail(tnapi); ++ if (tg3_tx_frag_set(tnapi, &val, &budget, map, tx_len, ++ base_flags | TXD_FLAG_END, mss, 0)) { ++ tnapi->tx_buffers[val].skb = NULL; ++ dev_kfree_skb(skb); ++ return -EIO; ++ } ++ ++ tnapi->tx_prod++; ++ ++ /* Sync BD data before updating mailbox */ ++ wmb(); ++ ++ tw32_tx_mbox(tnapi->prodmbox, tnapi->tx_prod); ++ tr32_mailbox(tnapi->prodmbox); ++ ++ udelay(10); ++ ++ /* 350 usec to allow enough time on some 10/100 Mbps devices. */ ++ for (i = 0; i < 35; i++) { ++ tw32_f(HOSTCC_MODE, tp->coalesce_mode | HOSTCC_MODE_ENABLE | ++ coal_now); ++ ++ udelay(10); ++ ++ tx_idx = tnapi->hw_status->idx[0].tx_consumer; ++ rx_idx = rnapi->hw_status->idx[0].rx_producer; ++ if ((tx_idx == tnapi->tx_prod) && ++ (rx_idx == (rx_start_idx + num_pkts))) ++ break; ++ } ++ ++ tg3_tx_skb_unmap(tnapi, tnapi->tx_prod - 1, -1); ++ dev_kfree_skb(skb); ++ ++ if (tx_idx != tnapi->tx_prod) ++ goto out; ++ ++ if (rx_idx != rx_start_idx + num_pkts) ++ goto out; ++ ++ val = data_off; ++ while (rx_idx != rx_start_idx) { ++ desc = &rnapi->rx_rcb[rx_start_idx++]; ++ desc_idx = desc->opaque & RXD_OPAQUE_INDEX_MASK; ++ opaque_key = desc->opaque & RXD_OPAQUE_RING_MASK; ++ ++ if ((desc->err_vlan & RXD_ERR_MASK) != 0 && ++ (desc->err_vlan != RXD_ERR_ODD_NIBBLE_RCVD_MII)) ++ goto out; ++ ++ rx_len = ((desc->idx_len & RXD_LEN_MASK) >> RXD_LEN_SHIFT) ++ - ETH_FCS_LEN; ++ ++ if (!tso_loopback) { ++ if (rx_len != tx_len) ++ goto out; ++ ++ if (pktsz <= TG3_RX_STD_DMA_SZ - ETH_FCS_LEN) { ++ if (opaque_key != RXD_OPAQUE_RING_STD) ++ goto out; ++ } else { ++ if (opaque_key != RXD_OPAQUE_RING_JUMBO) ++ goto out; ++ } ++ } else if ((desc->type_flags & RXD_FLAG_TCPUDP_CSUM) && ++ (desc->ip_tcp_csum & RXD_TCPCSUM_MASK) ++ >> RXD_TCPCSUM_SHIFT != 0xffff) { ++ goto out; ++ } ++ ++ if (opaque_key == RXD_OPAQUE_RING_STD) { ++#ifdef BCM_HAS_BUILD_SKB ++ rx_data = tpr->rx_std_buffers[desc_idx].data; ++#else ++ rx_skb = tpr->rx_std_buffers[desc_idx].data; ++ rx_data = rx_skb->data; ++#endif ++ map = dma_unmap_addr(&tpr->rx_std_buffers[desc_idx], ++ mapping); ++ } else if (opaque_key == RXD_OPAQUE_RING_JUMBO) { ++#ifdef BCM_HAS_BUILD_SKB ++ rx_data = tpr->rx_jmb_buffers[desc_idx].data; ++#else ++ rx_skb = tpr->rx_jmb_buffers[desc_idx].data; ++ rx_data = rx_skb->data; ++#endif ++ map = dma_unmap_addr(&tpr->rx_jmb_buffers[desc_idx], ++ mapping); ++ } else ++ goto out; ++ ++ pci_dma_sync_single_for_cpu(tp->pdev, map, rx_len, ++ PCI_DMA_FROMDEVICE); ++ ++ for (i = data_off; i < rx_len; i++, val++) { ++ if (*(rx_data + TG3_RX_OFFSET(tp) + i) != (u8) (val & 0xff)) ++ goto out; ++ } ++ } ++ ++ err = 0; ++ ++ /* tg3_free_rings will unmap and free the rx_data */ ++out: ++ return err; ++} ++ ++#define TG3_STD_LOOPBACK_FAILED 1 ++#define TG3_JMB_LOOPBACK_FAILED 2 ++#define TG3_TSO_LOOPBACK_FAILED 4 ++#define TG3_LOOPBACK_FAILED \ ++ (TG3_STD_LOOPBACK_FAILED | \ ++ TG3_JMB_LOOPBACK_FAILED | \ ++ TG3_TSO_LOOPBACK_FAILED) ++ ++static int tg3_test_loopback(struct tg3 *tp, u64 *data, bool do_extlpbk) ++{ ++ int err = -EIO; ++ u32 eee_cap; ++ u32 jmb_pkt_sz = 9000; ++ ++ if (tp->dma_limit) ++ jmb_pkt_sz = tp->dma_limit - ETH_HLEN; ++ ++ eee_cap = tp->phy_flags & TG3_PHYFLG_EEE_CAP; ++ tp->phy_flags &= ~TG3_PHYFLG_EEE_CAP; ++ ++ if (!netif_running(tp->dev)) { ++ data[TG3_MAC_LOOPB_TEST] = TG3_LOOPBACK_FAILED; ++ data[TG3_PHY_LOOPB_TEST] = TG3_LOOPBACK_FAILED; ++ if (do_extlpbk) ++ data[TG3_EXT_LOOPB_TEST] = TG3_LOOPBACK_FAILED; ++ goto done; ++ } ++ ++ err = tg3_reset_hw(tp, true); ++ if (err) { ++ data[TG3_MAC_LOOPB_TEST] = TG3_LOOPBACK_FAILED; ++ data[TG3_PHY_LOOPB_TEST] = TG3_LOOPBACK_FAILED; ++ if (do_extlpbk) ++ data[TG3_EXT_LOOPB_TEST] = TG3_LOOPBACK_FAILED; ++ goto done; ++ } ++ ++ if (tg3_flag(tp, ENABLE_RSS)) { ++ int i; ++ ++ /* Reroute all rx packets to the 1st queue */ ++ for (i = MAC_RSS_INDIR_TBL_0; ++ i < MAC_RSS_INDIR_TBL_0 + TG3_RSS_INDIR_TBL_SIZE; i += 4) ++ tw32(i, 0x0); ++ } ++ ++ /* HW errata - mac loopback fails in some cases on 5780. ++ * Normal traffic and PHY loopback are not affected by ++ * errata. Also, the MAC loopback test is deprecated for ++ * all newer ASIC revisions. ++ */ ++ if (tg3_asic_rev(tp) != ASIC_REV_5780 && ++ !tg3_flag(tp, CPMU_PRESENT)) { ++ tg3_mac_loopback(tp, true); ++ ++ if (tg3_run_loopback(tp, ETH_FRAME_LEN, false)) ++ data[TG3_MAC_LOOPB_TEST] |= TG3_STD_LOOPBACK_FAILED; ++ ++ if (tg3_flag(tp, JUMBO_RING_ENABLE) && ++ tg3_run_loopback(tp, jmb_pkt_sz + ETH_HLEN, false)) ++ data[TG3_MAC_LOOPB_TEST] |= TG3_JMB_LOOPBACK_FAILED; ++ ++ tg3_mac_loopback(tp, false); ++ } ++ ++ if (!(tp->phy_flags & TG3_PHYFLG_PHY_SERDES) && ++ !tg3_flag(tp, USE_PHYLIB)) { ++ int i; ++ ++ tg3_phy_lpbk_set(tp, 0, false); ++ ++ /* Wait for link */ ++ for (i = 0; i < 700; i++) { ++ if (tr32(MAC_TX_STATUS) & TX_STATUS_LINK_UP) ++ break; ++ mdelay(1); ++ } ++ ++ if (i == 700) { ++ netdev_info(tp->dev, "No link for loopback test!\n" ); ++ data[TG3_PHY_LOOPB_TEST] = TG3_LOOPBACK_FAILED; ++ return -EIO; ++ } ++ ++ if (tg3_run_loopback(tp, ETH_FRAME_LEN, false)) ++ data[TG3_PHY_LOOPB_TEST] |= TG3_STD_LOOPBACK_FAILED; ++#if TG3_TSO_SUPPORT != 0 ++ if (tg3_flag(tp, TSO_CAPABLE) && ++ tg3_run_loopback(tp, ETH_FRAME_LEN, true)) ++ data[TG3_PHY_LOOPB_TEST] |= TG3_TSO_LOOPBACK_FAILED; ++#endif ++ if (tg3_flag(tp, JUMBO_RING_ENABLE) && ++ tg3_run_loopback(tp, jmb_pkt_sz + ETH_HLEN, false)) ++ data[TG3_PHY_LOOPB_TEST] |= TG3_JMB_LOOPBACK_FAILED; ++ ++ if (do_extlpbk) { ++ tg3_phy_lpbk_set(tp, 0, true); ++ ++ /* All link indications report up, but the hardware ++ * isn't really ready for about 20 msec. Double it ++ * to be sure. ++ */ ++ mdelay(40); ++ ++ if (tg3_run_loopback(tp, ETH_FRAME_LEN, false)) ++ data[TG3_EXT_LOOPB_TEST] |= ++ TG3_STD_LOOPBACK_FAILED; ++ if (tg3_flag(tp, TSO_CAPABLE) && ++ tg3_run_loopback(tp, ETH_FRAME_LEN, true)) ++ data[TG3_EXT_LOOPB_TEST] |= ++ TG3_TSO_LOOPBACK_FAILED; ++ if (tg3_flag(tp, JUMBO_RING_ENABLE) && ++ tg3_run_loopback(tp, jmb_pkt_sz + ETH_HLEN, false)) ++ data[TG3_EXT_LOOPB_TEST] |= ++ TG3_JMB_LOOPBACK_FAILED; ++ } ++ ++ /* Re-enable gphy autopowerdown. */ ++ if (tp->phy_flags & TG3_PHYFLG_ENABLE_APD) ++ tg3_phy_toggle_apd(tp, true); ++ } ++ ++ err = (data[TG3_MAC_LOOPB_TEST] | data[TG3_PHY_LOOPB_TEST] | ++ data[TG3_EXT_LOOPB_TEST]) ? -EIO : 0; ++ ++done: ++ tp->phy_flags |= eee_cap; ++ ++ return err; ++} ++ ++static void tg3_self_test(struct net_device *dev, struct ethtool_test *etest, ++ u64 *data) ++{ ++ struct tg3 *tp = netdev_priv(dev); ++ bool doextlpbk = etest->flags & ETH_TEST_FL_EXTERNAL_LB; ++ ++ if (tp->phy_flags & TG3_PHYFLG_IS_LOW_POWER) { ++ if (tg3_power_up(tp)) { ++ etest->flags |= ETH_TEST_FL_FAILED; ++ memset(data, 1, sizeof(u64) * TG3_NUM_TEST); ++ return; ++ } ++ tg3_ape_driver_state_change(tp, RESET_KIND_INIT); ++ } ++ ++ memset(data, 0, sizeof(u64) * TG3_NUM_TEST); ++ ++ if (tg3_test_nvram(tp) != 0) { ++ etest->flags |= ETH_TEST_FL_FAILED; ++ data[TG3_NVRAM_TEST] = 1; ++ } ++ if (!doextlpbk && tg3_test_link(tp)) { ++ etest->flags |= ETH_TEST_FL_FAILED; ++ data[TG3_LINK_TEST] = 1; ++ } ++ if (etest->flags & ETH_TEST_FL_OFFLINE) { ++ int err, err2 = 0, irq_sync = 0; ++ ++ if (netif_running(dev)) { ++ tg3_phy_stop(tp); ++ tg3_netif_stop(tp); ++#ifdef TG3_VMWARE_NETQ_ENABLE ++ tg3_netq_invalidate_state(tp); ++#endif ++ irq_sync = 1; ++ } ++ ++ tg3_full_lock(tp, irq_sync); ++ tg3_halt(tp, RESET_KIND_SUSPEND, 1); ++ err = tg3_nvram_lock(tp); ++ tg3_halt_cpu(tp, RX_CPU_BASE); ++ if (!tg3_flag(tp, 5705_PLUS)) ++ tg3_halt_cpu(tp, TX_CPU_BASE); ++ if (!err) ++ tg3_nvram_unlock(tp); ++ ++ if (tp->phy_flags & TG3_PHYFLG_MII_SERDES) ++ tg3_phy_reset(tp); ++ ++ if (tg3_test_registers(tp) != 0) { ++ etest->flags |= ETH_TEST_FL_FAILED; ++ data[TG3_REGISTER_TEST] = 1; ++ } ++ ++ if (tg3_test_memory(tp) != 0) { ++ etest->flags |= ETH_TEST_FL_FAILED; ++ data[TG3_MEMORY_TEST] = 1; ++ } ++ ++ if (doextlpbk) ++ etest->flags |= ETH_TEST_FL_EXTERNAL_LB_DONE; ++ ++ if (tg3_test_loopback(tp, data, doextlpbk)) ++ etest->flags |= ETH_TEST_FL_FAILED; ++ ++ tg3_full_unlock(tp); ++ ++ if (tg3_test_interrupt(tp) != 0) { ++ etest->flags |= ETH_TEST_FL_FAILED; ++ data[TG3_INTERRUPT_TEST] = 1; ++ } ++ ++ tg3_full_lock(tp, 0); ++ ++ tg3_halt(tp, RESET_KIND_SHUTDOWN, 1); ++ if (netif_running(dev)) { ++ tg3_flag_set(tp, INIT_COMPLETE); ++ err2 = tg3_restart_hw(tp, true); ++ if (!err2) ++ tg3_netif_start(tp); ++ } ++ ++ tg3_full_unlock(tp); ++ ++ if (irq_sync && !err2) ++ tg3_phy_start(tp); ++ } ++ if (tp->phy_flags & TG3_PHYFLG_IS_LOW_POWER) ++ tg3_power_down_prepare(tp); ++ ++} ++ ++#ifdef BCM_HAS_IEEE1588_SUPPORT ++static int tg3_hwtstamp_set(struct net_device *dev, struct ifreq *ifr) ++{ ++ struct tg3 *tp = netdev_priv(dev); ++ struct hwtstamp_config stmpconf; ++ ++ if (!tg3_flag(tp, PTP_CAPABLE)) ++ return -EOPNOTSUPP; ++ ++ if (copy_from_user(&stmpconf, ifr->ifr_data, sizeof(stmpconf))) ++ return -EFAULT; ++ ++ if (stmpconf.flags) ++ return -EINVAL; ++ ++ if (stmpconf.tx_type != HWTSTAMP_TX_ON && ++ stmpconf.tx_type != HWTSTAMP_TX_OFF) ++ return -ERANGE; ++ ++ switch (stmpconf.rx_filter) { ++ case HWTSTAMP_FILTER_NONE: ++ tp->rxptpctl = 0; ++ break; ++ case HWTSTAMP_FILTER_PTP_V1_L4_EVENT: ++ tp->rxptpctl = TG3_RX_PTP_CTL_RX_PTP_V1_EN | ++ TG3_RX_PTP_CTL_ALL_V1_EVENTS; ++ break; ++ case HWTSTAMP_FILTER_PTP_V1_L4_SYNC: ++ tp->rxptpctl = TG3_RX_PTP_CTL_RX_PTP_V1_EN | ++ TG3_RX_PTP_CTL_SYNC_EVNT; ++ break; ++ case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ: ++ tp->rxptpctl = TG3_RX_PTP_CTL_RX_PTP_V1_EN | ++ TG3_RX_PTP_CTL_DELAY_REQ; ++ break; ++ case HWTSTAMP_FILTER_PTP_V2_EVENT: ++ tp->rxptpctl = TG3_RX_PTP_CTL_RX_PTP_V2_EN | ++ TG3_RX_PTP_CTL_ALL_V2_EVENTS; ++ break; ++ case HWTSTAMP_FILTER_PTP_V2_L2_EVENT: ++ tp->rxptpctl = TG3_RX_PTP_CTL_RX_PTP_V2_L2_EN | ++ TG3_RX_PTP_CTL_ALL_V2_EVENTS; ++ break; ++ case HWTSTAMP_FILTER_PTP_V2_L4_EVENT: ++ tp->rxptpctl = TG3_RX_PTP_CTL_RX_PTP_V2_L4_EN | ++ TG3_RX_PTP_CTL_ALL_V2_EVENTS; ++ break; ++ case HWTSTAMP_FILTER_PTP_V2_SYNC: ++ tp->rxptpctl = TG3_RX_PTP_CTL_RX_PTP_V2_EN | ++ TG3_RX_PTP_CTL_SYNC_EVNT; ++ break; ++ case HWTSTAMP_FILTER_PTP_V2_L2_SYNC: ++ tp->rxptpctl = TG3_RX_PTP_CTL_RX_PTP_V2_L2_EN | ++ TG3_RX_PTP_CTL_SYNC_EVNT; ++ break; ++ case HWTSTAMP_FILTER_PTP_V2_L4_SYNC: ++ tp->rxptpctl = TG3_RX_PTP_CTL_RX_PTP_V2_L4_EN | ++ TG3_RX_PTP_CTL_SYNC_EVNT; ++ break; ++ case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ: ++ tp->rxptpctl = TG3_RX_PTP_CTL_RX_PTP_V2_EN | ++ TG3_RX_PTP_CTL_DELAY_REQ; ++ break; ++ case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ: ++ tp->rxptpctl = TG3_RX_PTP_CTL_RX_PTP_V2_L2_EN | ++ TG3_RX_PTP_CTL_DELAY_REQ; ++ break; ++ case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ: ++ tp->rxptpctl = TG3_RX_PTP_CTL_RX_PTP_V2_L4_EN | ++ TG3_RX_PTP_CTL_DELAY_REQ; ++ break; ++ default: ++ return -ERANGE; ++ } ++ ++ if (netif_running(dev) && tp->rxptpctl) ++ tw32(TG3_RX_PTP_CTL, ++ tp->rxptpctl | TG3_RX_PTP_CTL_HWTS_INTERLOCK); ++ ++ if (stmpconf.tx_type == HWTSTAMP_TX_ON) ++ tg3_flag_set(tp, TX_TSTAMP_EN); ++ else ++ tg3_flag_clear(tp, TX_TSTAMP_EN); ++ ++ return copy_to_user(ifr->ifr_data, &stmpconf, sizeof(stmpconf)) ? ++ -EFAULT : 0; ++} ++ ++static int tg3_hwtstamp_get(struct net_device *dev, struct ifreq *ifr) ++{ ++ struct tg3 *tp = netdev_priv(dev); ++ struct hwtstamp_config stmpconf; ++ ++ if (!tg3_flag(tp, PTP_CAPABLE)) ++ return -EOPNOTSUPP; ++ ++ stmpconf.flags = 0; ++ stmpconf.tx_type = (tg3_flag(tp, TX_TSTAMP_EN) ? ++ HWTSTAMP_TX_ON : HWTSTAMP_TX_OFF); ++ ++ switch (tp->rxptpctl) { ++ case 0: ++ stmpconf.rx_filter = HWTSTAMP_FILTER_NONE; ++ break; ++ case TG3_RX_PTP_CTL_RX_PTP_V1_EN | TG3_RX_PTP_CTL_ALL_V1_EVENTS: ++ stmpconf.rx_filter = HWTSTAMP_FILTER_PTP_V1_L4_EVENT; ++ break; ++ case TG3_RX_PTP_CTL_RX_PTP_V1_EN | TG3_RX_PTP_CTL_SYNC_EVNT: ++ stmpconf.rx_filter = HWTSTAMP_FILTER_PTP_V1_L4_SYNC; ++ break; ++ case TG3_RX_PTP_CTL_RX_PTP_V1_EN | TG3_RX_PTP_CTL_DELAY_REQ: ++ stmpconf.rx_filter = HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ; ++ break; ++ case TG3_RX_PTP_CTL_RX_PTP_V2_EN | TG3_RX_PTP_CTL_ALL_V2_EVENTS: ++ stmpconf.rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT; ++ break; ++ case TG3_RX_PTP_CTL_RX_PTP_V2_L2_EN | TG3_RX_PTP_CTL_ALL_V2_EVENTS: ++ stmpconf.rx_filter = HWTSTAMP_FILTER_PTP_V2_L2_EVENT; ++ break; ++ case TG3_RX_PTP_CTL_RX_PTP_V2_L4_EN | TG3_RX_PTP_CTL_ALL_V2_EVENTS: ++ stmpconf.rx_filter = HWTSTAMP_FILTER_PTP_V2_L4_EVENT; ++ break; ++ case TG3_RX_PTP_CTL_RX_PTP_V2_EN | TG3_RX_PTP_CTL_SYNC_EVNT: ++ stmpconf.rx_filter = HWTSTAMP_FILTER_PTP_V2_SYNC; ++ break; ++ case TG3_RX_PTP_CTL_RX_PTP_V2_L2_EN | TG3_RX_PTP_CTL_SYNC_EVNT: ++ stmpconf.rx_filter = HWTSTAMP_FILTER_PTP_V2_L2_SYNC; ++ break; ++ case TG3_RX_PTP_CTL_RX_PTP_V2_L4_EN | TG3_RX_PTP_CTL_SYNC_EVNT: ++ stmpconf.rx_filter = HWTSTAMP_FILTER_PTP_V2_L4_SYNC; ++ break; ++ case TG3_RX_PTP_CTL_RX_PTP_V2_EN | TG3_RX_PTP_CTL_DELAY_REQ: ++ stmpconf.rx_filter = HWTSTAMP_FILTER_PTP_V2_DELAY_REQ; ++ break; ++ case TG3_RX_PTP_CTL_RX_PTP_V2_L2_EN | TG3_RX_PTP_CTL_DELAY_REQ: ++ stmpconf.rx_filter = HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ; ++ break; ++ case TG3_RX_PTP_CTL_RX_PTP_V2_L4_EN | TG3_RX_PTP_CTL_DELAY_REQ: ++ stmpconf.rx_filter = HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ; ++ break; ++ default: ++ WARN_ON_ONCE(1); ++ return -ERANGE; ++ } ++ ++ return copy_to_user(ifr->ifr_data, &stmpconf, sizeof(stmpconf)) ? ++ -EFAULT : 0; ++} ++#endif /* BCM_HAS_IEEE1588_SUPPORT */ ++ ++static int tg3_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) ++{ ++#if (LINUX_VERSION_CODE >= 0x020607) ++ struct mii_ioctl_data *data = if_mii(ifr); ++#else ++ struct mii_ioctl_data *data = (struct mii_ioctl_data *) &ifr->ifr_ifru; ++#endif ++ struct tg3 *tp = netdev_priv(dev); ++ int err; ++ ++#ifdef BCM_INCLUDE_PHYLIB_SUPPORT ++ if (tg3_flag(tp, USE_PHYLIB)) { ++ struct phy_device *phydev; ++ if (!(tp->phy_flags & TG3_PHYFLG_IS_CONNECTED)) ++ return -EAGAIN; ++ phydev = tp->mdio_bus->phy_map[tp->phy_addr]; ++ return phy_mii_ioctl(phydev, ifr, cmd); ++ } ++#endif /* BCM_INCLUDE_PHYLIB_SUPPORT */ ++ ++ switch (cmd) { ++ case SIOCGMIIPHY: ++ data->phy_id = tp->phy_addr; ++ ++ /* fallthru */ ++ case SIOCGMIIREG: { ++ u32 mii_regval; ++ ++ if (tp->phy_flags & TG3_PHYFLG_PHY_SERDES) ++ break; /* We have no PHY */ ++ ++ if (!netif_running(dev)) ++ return -EAGAIN; ++ ++ spin_lock_bh(&tp->lock); ++ err = __tg3_readphy(tp, data->phy_id & 0x1f, ++ data->reg_num & 0x1f, &mii_regval); ++ spin_unlock_bh(&tp->lock); ++ ++ data->val_out = mii_regval; ++ ++ return err; ++ } ++ ++ case SIOCSMIIREG: ++ if (tp->phy_flags & TG3_PHYFLG_PHY_SERDES) ++ break; /* We have no PHY */ ++ ++ if (!netif_running(dev)) ++ return -EAGAIN; ++ ++ spin_lock_bh(&tp->lock); ++ err = __tg3_writephy(tp, data->phy_id & 0x1f, ++ data->reg_num & 0x1f, data->val_in); ++ spin_unlock_bh(&tp->lock); ++ ++ return err; ++ ++#if defined(__VMKLNX__) && !defined(TG3_VMWARE_BMAPILNX_DISABLE) ++ case BRCM_VMWARE_CIM_IOCTL: ++ return tg3_vmware_ioctl_cim(dev, ifr); ++#endif /* TG3_VMWARE_BMAPILNX */ ++ ++#ifdef BCM_HAS_IEEE1588_SUPPORT ++ case SIOCSHWTSTAMP: ++ return tg3_hwtstamp_set(dev, ifr); ++ ++ case SIOCGHWTSTAMP: ++ return tg3_hwtstamp_get(dev, ifr); ++#endif /* BCM_HAS_IEEE1588_SUPPORT */ ++ ++ default: ++ /* do nothing */ ++ break; ++ } ++ return -EOPNOTSUPP; ++} ++ ++static int tg3_get_coalesce(struct net_device *dev, struct ethtool_coalesce *ec) ++{ ++ struct tg3 *tp = netdev_priv(dev); ++ ++ memcpy(ec, &tp->coal, sizeof(*ec)); ++ return 0; ++} ++ ++static int tg3_set_coalesce(struct net_device *dev, struct ethtool_coalesce *ec) ++{ ++ struct tg3 *tp = netdev_priv(dev); ++ u32 max_rxcoal_tick_int = 0, max_txcoal_tick_int = 0; ++ u32 max_stat_coal_ticks = 0, min_stat_coal_ticks = 0; ++ ++ if (!tg3_flag(tp, 5705_PLUS)) { ++ max_rxcoal_tick_int = MAX_RXCOAL_TICK_INT; ++ max_txcoal_tick_int = MAX_TXCOAL_TICK_INT; ++ max_stat_coal_ticks = MAX_STAT_COAL_TICKS; ++ min_stat_coal_ticks = MIN_STAT_COAL_TICKS; ++ } ++ ++ if ((ec->rx_coalesce_usecs > MAX_RXCOL_TICKS) || ++ (ec->tx_coalesce_usecs > MAX_TXCOL_TICKS) || ++ (ec->rx_max_coalesced_frames > MAX_RXMAX_FRAMES) || ++ (ec->tx_max_coalesced_frames > MAX_TXMAX_FRAMES) || ++ (ec->rx_coalesce_usecs_irq > max_rxcoal_tick_int) || ++ (ec->tx_coalesce_usecs_irq > max_txcoal_tick_int) || ++ (ec->rx_max_coalesced_frames_irq > MAX_RXCOAL_MAXF_INT) || ++ (ec->tx_max_coalesced_frames_irq > MAX_TXCOAL_MAXF_INT) || ++ (ec->stats_block_coalesce_usecs > max_stat_coal_ticks) || ++ (ec->stats_block_coalesce_usecs < min_stat_coal_ticks)) ++ return -EINVAL; ++ ++ /* No rx interrupts will be generated if both are zero */ ++ if ((ec->rx_coalesce_usecs == 0) && ++ (ec->rx_max_coalesced_frames == 0)) ++ return -EINVAL; ++ ++ /* No tx interrupts will be generated if both are zero */ ++ if ((ec->tx_coalesce_usecs == 0) && ++ (ec->tx_max_coalesced_frames == 0)) ++ return -EINVAL; ++ ++ /* Only copy relevant parameters, ignore all others. */ ++ tp->coal.rx_coalesce_usecs = ec->rx_coalesce_usecs; ++ tp->coal.tx_coalesce_usecs = ec->tx_coalesce_usecs; ++ tp->coal.rx_max_coalesced_frames = ec->rx_max_coalesced_frames; ++ tp->coal.tx_max_coalesced_frames = ec->tx_max_coalesced_frames; ++ tp->coal.rx_coalesce_usecs_irq = ec->rx_coalesce_usecs_irq; ++ tp->coal.tx_coalesce_usecs_irq = ec->tx_coalesce_usecs_irq; ++ tp->coal.rx_max_coalesced_frames_irq = ec->rx_max_coalesced_frames_irq; ++ tp->coal.tx_max_coalesced_frames_irq = ec->tx_max_coalesced_frames_irq; ++ tp->coal.stats_block_coalesce_usecs = ec->stats_block_coalesce_usecs; ++ ++ if (netif_running(dev)) { ++ tg3_full_lock(tp, 0); ++ __tg3_set_coalesce(tp, &tp->coal); ++ tg3_full_unlock(tp); ++ } ++ return 0; ++} ++ ++static u32 tg3_get_link(struct net_device *dev) ++{ ++ struct tg3 *tp = netdev_priv(dev); ++ ++ if (!netif_running(tp->dev)) ++ return 0; ++ ++ if (tg3_flag(tp, POLL_CPMU_LINK)) { ++ u32 cpmu = tr32(TG3_CPMU_STATUS); ++ return !((cpmu & TG3_CPMU_STATUS_LINK_MASK) == ++ TG3_CPMU_STATUS_LINK_MASK); ++ } ++ ++ return tp->link_up; ++} ++ ++#if defined(ETHTOOL_GEEE) ++static int tg3_set_eee(struct net_device *dev, struct ethtool_eee *edata) ++{ ++ struct tg3 *tp = netdev_priv(dev); ++ ++ if (!(tp->phy_flags & TG3_PHYFLG_EEE_CAP)) { ++ netdev_warn(tp->dev, "Board does not support EEE!\n"); ++ return -EOPNOTSUPP; ++ } ++ ++ if (edata->advertised != tp->eee.advertised) { ++ netdev_warn(tp->dev, ++ "Direct manipulation of EEE advertisement is not supported\n"); ++ return -EINVAL; ++ } ++ ++ if (edata->tx_lpi_timer > TG3_CPMU_DBTMR1_LNKIDLE_MAX) { ++ netdev_warn(tp->dev, ++ "Maximal Tx Lpi timer supported is %#x(u)\n", ++ TG3_CPMU_DBTMR1_LNKIDLE_MAX); ++ return -EINVAL; ++ } ++ ++ tp->eee = *edata; ++ ++ tp->phy_flags |= TG3_PHYFLG_USER_CONFIGURED; ++ tg3_warn_mgmt_link_flap(tp); ++ ++ if (netif_running(tp->dev)) { ++ tg3_full_lock(tp, 0); ++ tg3_setup_eee(tp); ++ tg3_phy_reset(tp); ++ tg3_full_unlock(tp); ++ } ++ ++ return 0; ++} ++ ++static int tg3_get_eee(struct net_device *dev, struct ethtool_eee *edata) ++{ ++ struct tg3 *tp = netdev_priv(dev); ++ ++ if (!(tp->phy_flags & TG3_PHYFLG_EEE_CAP)) { ++ netdev_warn(tp->dev, ++ "Board does not support EEE!\n"); ++ return -EOPNOTSUPP; ++ } ++ ++ *edata = tp->eee; ++ return 0; ++} ++#endif ++ ++static struct ethtool_ops tg3_ethtool_ops = { ++ .get_settings = tg3_get_settings, ++ .set_settings = tg3_set_settings, ++ .get_drvinfo = tg3_get_drvinfo, ++ .get_regs_len = tg3_get_regs_len, ++ .get_regs = tg3_get_regs, ++ .get_wol = tg3_get_wol, ++ .set_wol = tg3_set_wol, ++ .get_msglevel = tg3_get_msglevel, ++ .set_msglevel = tg3_set_msglevel, ++ .nway_reset = tg3_nway_reset, ++ .get_link = tg3_get_link, ++#if (LINUX_VERSION_CODE >= 0x20418) ++ .get_eeprom_len = tg3_get_eeprom_len, ++#endif ++#ifdef ETHTOOL_GEEPROM ++ .get_eeprom = tg3_get_eeprom, ++#endif ++#ifdef ETHTOOL_SEEPROM ++ .set_eeprom = tg3_set_eeprom, ++#endif ++ .get_ringparam = tg3_get_ringparam, ++ .set_ringparam = tg3_set_ringparam, ++ .get_pauseparam = tg3_get_pauseparam, ++ .set_pauseparam = tg3_set_pauseparam, ++ .self_test = tg3_self_test, ++ .get_strings = tg3_get_strings, ++#if defined(BCM_HAS_SET_PHYS_ID) && !defined(GET_ETHTOOL_OP_EXT) ++ .set_phys_id = tg3_set_phys_id, ++#endif ++ .get_ethtool_stats = tg3_get_ethtool_stats, ++ .get_coalesce = tg3_get_coalesce, ++ .set_coalesce = tg3_set_coalesce, ++#if (LINUX_VERSION_CODE >= 0x20618) || defined (__VMKLNX__) ++ .get_sset_count = tg3_get_sset_count, ++#endif ++#if defined(BCM_HAS_GET_RXNFC) && !defined(GET_ETHTOOL_OP_EXT) ++ .get_rxnfc = tg3_get_rxnfc, ++#endif /* BCM_HAS_GET_RXNFC */ ++#if defined(BCM_HAS_GET_RXFH_INDIR) && !defined(GET_ETHTOOL_OP_EXT) ++#ifdef BCM_HAS_GET_RXFH_INDIR_SIZE ++ .get_rxfh_indir_size = tg3_get_rxfh_indir_size, ++#endif /* BCM_HAS_GET_RXFH_INDIR_SIZE */ ++#ifdef BCM_HAS_OLD_RXFH_INDIR ++ .get_rxfh_indir = tg3_get_rxfh_indir, ++ .set_rxfh_indir = tg3_set_rxfh_indir, ++#else ++ .get_rxfh = tg3_get_rxfh, ++ .set_rxfh = tg3_set_rxfh, ++#endif ++#endif /* BCM_HAS_GET_RXFH_INDIR */ ++#if defined(ETHTOOL_GCHANNELS) && !defined(GET_ETHTOOL_OP_EXT) ++ .get_channels = tg3_get_channels, ++ .set_channels = tg3_set_channels, ++#endif ++ ++#ifndef BCM_HAS_NETDEV_UPDATE_FEATURES ++ .get_rx_csum = tg3_get_rx_csum, ++ .set_rx_csum = tg3_set_rx_csum, ++ .get_tx_csum = ethtool_op_get_tx_csum, ++#ifdef BCM_HAS_SET_TX_CSUM ++ .set_tx_csum = tg3_set_tx_csum, ++#endif ++#if TG3_TSO_SUPPORT != 0 ++ .get_tso = ethtool_op_get_tso, ++ .set_tso = tg3_set_tso, ++#endif ++#endif /* BCM_HAS_NETDEV_UPDATE_FEATURES */ ++#ifdef ETHTOOL_GSG ++#if defined(BCM_HAS_ETHTOOL_OP_SET_SG) && !defined(BCM_HAS_FIX_FEATURES) ++ .get_sg = ethtool_op_get_sg, ++ .set_sg = ethtool_op_set_sg, ++#endif ++#endif ++#if (LINUX_VERSION_CODE < 0x20618) ++ .self_test_count = tg3_get_test_count, ++#endif ++#if !defined(BCM_HAS_SET_PHYS_ID) || defined(GET_ETHTOOL_OP_EXT) ++ .phys_id = tg3_phys_id, ++#endif ++#if (LINUX_VERSION_CODE < 0x20618) ++ .get_stats_count = tg3_get_stats_count, ++#endif ++#if defined(ETHTOOL_GPERMADDR) && (LINUX_VERSION_CODE < 0x020617) ++ .get_perm_addr = ethtool_op_get_perm_addr, ++#endif ++#if IS_ENABLED(CONFIG_PTP_1588_CLOCK) && defined(ETHTOOL_GET_TS_INFO) && !defined(GET_ETHTOOL_OP_EXT) ++ .get_ts_info = tg3_get_ts_info, ++#endif ++#if defined(ETHTOOL_GEEE) && !defined(GET_ETHTOOL_OP_EXT) ++ .get_eee = tg3_get_eee, ++ .set_eee = tg3_set_eee, ++#endif ++}; ++ ++#ifdef GET_ETHTOOL_OP_EXT ++static const struct ethtool_ops_ext tg3_ethtool_ops_ext = { ++ .size = sizeof(struct ethtool_ops_ext), ++ .get_ts_info = tg3_get_ts_info, ++#ifdef ETHTOOL_GEEE ++ .get_eee = tg3_get_eee, ++ .set_eee = tg3_set_eee, ++#endif ++ .get_channels = tg3_get_channels, ++ .set_channels = tg3_set_channels, ++}; ++#endif ++ ++static struct rtnl_link_stats64 *tg3_get_stats64(struct net_device *dev, ++ struct rtnl_link_stats64 *stats) ++{ ++ struct tg3 *tp = netdev_priv(dev); ++ ++ spin_lock_bh(&tp->lock); ++ if (!tp->hw_stats) { ++ spin_unlock_bh(&tp->lock); ++ return &tp->net_stats_prev; ++ } ++ ++ tg3_get_nstats(tp, stats); ++ spin_unlock_bh(&tp->lock); ++ ++ return stats; ++} ++ ++#ifdef GET_NETDEV_OP_EXT ++static const struct net_device_ops_ext tg3_net_device_ops_ext = { ++ .size = sizeof(struct net_device_ops_ext), ++ .ndo_fix_features = tg3_fix_features, ++ .ndo_set_features = tg3_set_features, ++ .ndo_get_stats64 = tg3_get_stats64, ++}; ++#endif ++ ++static void tg3_set_rx_mode(struct net_device *dev) ++{ ++ struct tg3 *tp = netdev_priv(dev); ++ ++ if (!netif_running(dev)) ++ return; ++ ++ tg3_full_lock(tp, 0); ++ __tg3_set_rx_mode(dev); ++ tg3_full_unlock(tp); ++} ++ ++static inline void tg3_set_mtu(struct net_device *dev, struct tg3 *tp, ++ int new_mtu) ++{ ++ dev->mtu = new_mtu; ++ ++ if (new_mtu > ETH_DATA_LEN) { ++ if (tg3_flag(tp, 5780_CLASS)) { ++ netdev_update_features(dev); ++ tg3_flag_clear(tp, TSO_CAPABLE); ++#if TG3_TSO_SUPPORT != 0 ++#ifdef BCM_HAS_ETHTOOL_OP_SET_TSO ++ ethtool_op_set_tso(dev, 0); ++#endif ++#endif ++ } else { ++ tg3_flag_set(tp, JUMBO_RING_ENABLE); ++ } ++ } else { ++ if (tg3_flag(tp, 5780_CLASS)) { ++ tg3_flag_set(tp, TSO_CAPABLE); ++ netdev_update_features(dev); ++ } ++ tg3_flag_clear(tp, JUMBO_RING_ENABLE); ++ } ++} ++ ++static int tg3_change_mtu(struct net_device *dev, int new_mtu) ++{ ++ struct tg3 *tp = netdev_priv(dev); ++ int err; ++ bool reset_phy = false; ++ ++ if (new_mtu < TG3_MIN_MTU || new_mtu > TG3_MAX_MTU(tp)) ++ return -EINVAL; ++ ++ if (!netif_running(dev)) { ++ /* We'll just catch it later when the ++ * device is up'd. ++ */ ++ tg3_set_mtu(dev, tp, new_mtu); ++ return 0; ++ } ++ ++#if defined(__VMKLNX__) && (VMWARE_ESX_DDK_VERSION < 50000) ++ /* There is no need to hold rtnl_lock ++ * when calling change MTU into driver ++ * from VMkernel ESX 5.0 onwards. ++ */ ++ rtnl_lock(); ++#endif ++ ++ tg3_phy_stop(tp); ++ ++ tg3_netif_stop(tp); ++ ++ tg3_set_mtu(dev, tp, new_mtu); ++ ++#ifdef TG3_VMWARE_NETQ_ENABLE ++ tg3_netq_invalidate_state(tp); ++#endif ++ ++ tg3_full_lock(tp, 1); ++ ++ tg3_halt(tp, RESET_KIND_SHUTDOWN, 1); ++ ++ /* Reset PHY, otherwise the read DMA engine will be in a mode that ++ * breaks all requests to 256 bytes. ++ */ ++ if (tg3_asic_rev(tp) == ASIC_REV_57766) ++ reset_phy = true; ++ ++ err = tg3_restart_hw(tp, reset_phy); ++ ++ if (!err) ++ tg3_netif_start(tp); ++ ++ tg3_full_unlock(tp); ++ ++ if (!err) ++ tg3_phy_start(tp); ++ ++#if defined(__VMKLNX__) && (VMWARE_ESX_DDK_VERSION < 50000) ++ rtnl_unlock(); ++#endif ++ ++ return err; ++} ++ ++#ifdef BCM_HAS_NET_DEVICE_OPS ++static const struct net_device_ops tg3_netdev_ops = { ++ .ndo_open = tg3_open, ++ .ndo_stop = tg3_close, ++ .ndo_start_xmit = tg3_start_xmit, ++#if defined(BCM_HAS_GET_STATS64) ++#if !defined(GET_NETDEV_OP_EXT) ++ .ndo_get_stats64 = tg3_get_stats64, ++#endif ++#else ++ .ndo_get_stats = tg3_get_stats, ++#endif ++ .ndo_validate_addr = eth_validate_addr, ++#ifdef BCM_HAS_SET_MULTICAST_LIST ++ .ndo_set_multicast_list = tg3_set_rx_mode, ++#else ++ .ndo_set_rx_mode = tg3_set_rx_mode, ++#endif ++ .ndo_set_mac_address = tg3_set_mac_addr, ++ .ndo_do_ioctl = tg3_ioctl, ++ .ndo_tx_timeout = tg3_tx_timeout, ++ .ndo_change_mtu = tg3_change_mtu, ++#if defined(BCM_HAS_FIX_FEATURES) && !defined(GET_NETDEV_OP_EXT) ++ .ndo_fix_features = tg3_fix_features, ++ .ndo_set_features = tg3_set_features, ++#endif ++#if defined(BCM_KERNEL_SUPPORTS_8021Q) && !defined(BCM_HAS_NEW_VLAN_INTERFACE) ++ .ndo_vlan_rx_register = tg3_vlan_rx_register, ++#endif ++#ifdef CONFIG_NET_POLL_CONTROLLER ++ .ndo_poll_controller = tg3_poll_controller, ++#endif ++}; ++#endif /* BCM_HAS_NET_DEVICE_OPS */ ++ ++static void __devinit tg3_get_eeprom_size(struct tg3 *tp) ++{ ++ u32 cursize, val, magic; ++ ++ tp->nvram_size = EEPROM_CHIP_SIZE; ++ ++ if (tg3_nvram_read(tp, 0, &magic) != 0) ++ return; ++ ++ if ((magic != TG3_EEPROM_MAGIC) && ++ ((magic & TG3_EEPROM_MAGIC_FW_MSK) != TG3_EEPROM_MAGIC_FW) && ++ ((magic & TG3_EEPROM_MAGIC_HW_MSK) != TG3_EEPROM_MAGIC_HW)) ++ return; ++ ++ /* ++ * Size the chip by reading offsets at increasing powers of two. ++ * When we encounter our validation signature, we know the addressing ++ * has wrapped around, and thus have our chip size. ++ */ ++ cursize = 0x10; ++ ++ while (cursize < tp->nvram_size) { ++ if (tg3_nvram_read(tp, cursize, &val) != 0) ++ return; ++ ++ if (val == magic) ++ break; ++ ++ cursize <<= 1; ++ } ++ ++ tp->nvram_size = cursize; ++} ++ ++static void __devinit tg3_get_nvram_size(struct tg3 *tp) ++{ ++ u32 val; ++ ++ if (tg3_flag(tp, NO_NVRAM) || tg3_nvram_read(tp, 0, &val) != 0) ++ return; ++ ++ /* Selfboot format */ ++ if (val != TG3_EEPROM_MAGIC) { ++ tg3_get_eeprom_size(tp); ++ return; ++ } ++ ++ if (tg3_nvram_read(tp, 0xf0, &val) == 0) { ++ if (val != 0) { ++ /* This is confusing. We want to operate on the ++ * 16-bit value at offset 0xf2. The tg3_nvram_read() ++ * call will read from NVRAM and byteswap the data ++ * according to the byteswapping settings for all ++ * other register accesses. This ensures the data we ++ * want will always reside in the lower 16-bits. ++ * However, the data in NVRAM is in LE format, which ++ * means the data from the NVRAM read will always be ++ * opposite the endianness of the CPU. The 16-bit ++ * byteswap then brings the data to CPU endianness. ++ */ ++ tp->nvram_size = swab16((u16)(val & 0x0000ffff)) * 1024; ++ return; ++ } ++ } ++ tp->nvram_size = TG3_NVRAM_SIZE_512KB; ++} ++ ++static void __devinit tg3_get_nvram_info(struct tg3 *tp) ++{ ++ u32 nvcfg1; ++ ++ nvcfg1 = tr32(NVRAM_CFG1); ++ if (nvcfg1 & NVRAM_CFG1_FLASHIF_ENAB) { ++ tg3_flag_set(tp, FLASH); ++ } else { ++ nvcfg1 &= ~NVRAM_CFG1_COMPAT_BYPASS; ++ tw32(NVRAM_CFG1, nvcfg1); ++ } ++ ++ if (tg3_asic_rev(tp) == ASIC_REV_5750 || ++ tg3_flag(tp, 5780_CLASS)) { ++ switch (nvcfg1 & NVRAM_CFG1_VENDOR_MASK) { ++ case FLASH_VENDOR_ATMEL_FLASH_BUFFERED: ++ tp->nvram_jedecnum = JEDEC_ATMEL; ++ tp->nvram_pagesize = ATMEL_AT45DB0X1B_PAGE_SIZE; ++ tg3_flag_set(tp, NVRAM_BUFFERED); ++ break; ++ case FLASH_VENDOR_ATMEL_FLASH_UNBUFFERED: ++ tp->nvram_jedecnum = JEDEC_ATMEL; ++ tp->nvram_pagesize = ATMEL_AT25F512_PAGE_SIZE; ++ break; ++ case FLASH_VENDOR_ATMEL_EEPROM: ++ tp->nvram_jedecnum = JEDEC_ATMEL; ++ tp->nvram_pagesize = ATMEL_AT24C512_CHIP_SIZE; ++ tg3_flag_set(tp, NVRAM_BUFFERED); ++ break; ++ case FLASH_VENDOR_ST: ++ tp->nvram_jedecnum = JEDEC_ST; ++ tp->nvram_pagesize = ST_M45PEX0_PAGE_SIZE; ++ tg3_flag_set(tp, NVRAM_BUFFERED); ++ break; ++ case FLASH_VENDOR_SAIFUN: ++ tp->nvram_jedecnum = JEDEC_SAIFUN; ++ tp->nvram_pagesize = SAIFUN_SA25F0XX_PAGE_SIZE; ++ break; ++ case FLASH_VENDOR_SST_SMALL: ++ case FLASH_VENDOR_SST_LARGE: ++ tp->nvram_jedecnum = JEDEC_SST; ++ tp->nvram_pagesize = SST_25VF0X0_PAGE_SIZE; ++ break; ++ } ++ } else { ++ tp->nvram_jedecnum = JEDEC_ATMEL; ++ tp->nvram_pagesize = ATMEL_AT45DB0X1B_PAGE_SIZE; ++ tg3_flag_set(tp, NVRAM_BUFFERED); ++ } ++} ++ ++static void __devinit tg3_nvram_get_pagesize(struct tg3 *tp, u32 nvmcfg1) ++{ ++ switch (nvmcfg1 & NVRAM_CFG1_5752PAGE_SIZE_MASK) { ++ case FLASH_5752PAGE_SIZE_256: ++ tp->nvram_pagesize = 256; ++ break; ++ case FLASH_5752PAGE_SIZE_512: ++ tp->nvram_pagesize = 512; ++ break; ++ case FLASH_5752PAGE_SIZE_1K: ++ tp->nvram_pagesize = 1024; ++ break; ++ case FLASH_5752PAGE_SIZE_2K: ++ tp->nvram_pagesize = 2048; ++ break; ++ case FLASH_5752PAGE_SIZE_4K: ++ tp->nvram_pagesize = 4096; ++ break; ++ case FLASH_5752PAGE_SIZE_264: ++ tp->nvram_pagesize = 264; ++ break; ++ case FLASH_5752PAGE_SIZE_528: ++ tp->nvram_pagesize = 528; ++ break; ++ } ++} ++ ++static void __devinit tg3_get_5752_nvram_info(struct tg3 *tp) ++{ ++ u32 nvcfg1; ++ ++ nvcfg1 = tr32(NVRAM_CFG1); ++ ++ /* NVRAM protection for TPM */ ++ if (nvcfg1 & (1 << 27)) ++ tg3_flag_set(tp, PROTECTED_NVRAM); ++ ++ switch (nvcfg1 & NVRAM_CFG1_5752VENDOR_MASK) { ++ case FLASH_5752VENDOR_ATMEL_EEPROM_64KHZ: ++ case FLASH_5752VENDOR_ATMEL_EEPROM_376KHZ: ++ tp->nvram_jedecnum = JEDEC_ATMEL; ++ tg3_flag_set(tp, NVRAM_BUFFERED); ++ break; ++ case FLASH_5752VENDOR_ATMEL_FLASH_BUFFERED: ++ tp->nvram_jedecnum = JEDEC_ATMEL; ++ tg3_flag_set(tp, NVRAM_BUFFERED); ++ tg3_flag_set(tp, FLASH); ++ break; ++ case FLASH_5752VENDOR_ST_M45PE10: ++ case FLASH_5752VENDOR_ST_M45PE20: ++ case FLASH_5752VENDOR_ST_M45PE40: ++ tp->nvram_jedecnum = JEDEC_ST; ++ tg3_flag_set(tp, NVRAM_BUFFERED); ++ tg3_flag_set(tp, FLASH); ++ break; ++ } ++ ++ if (tg3_flag(tp, FLASH)) { ++ tg3_nvram_get_pagesize(tp, nvcfg1); ++ } else { ++ /* For eeprom, set pagesize to maximum eeprom size */ ++ tp->nvram_pagesize = ATMEL_AT24C512_CHIP_SIZE; ++ ++ nvcfg1 &= ~NVRAM_CFG1_COMPAT_BYPASS; ++ tw32(NVRAM_CFG1, nvcfg1); ++ } ++} ++ ++static void __devinit tg3_get_5755_nvram_info(struct tg3 *tp) ++{ ++ u32 nvcfg1, protect = 0; ++ ++ nvcfg1 = tr32(NVRAM_CFG1); ++ ++ /* NVRAM protection for TPM */ ++ if (nvcfg1 & (1 << 27)) { ++ tg3_flag_set(tp, PROTECTED_NVRAM); ++ protect = 1; ++ } ++ ++ nvcfg1 &= NVRAM_CFG1_5752VENDOR_MASK; ++ switch (nvcfg1) { ++ case FLASH_5755VENDOR_ATMEL_FLASH_1: ++ case FLASH_5755VENDOR_ATMEL_FLASH_2: ++ case FLASH_5755VENDOR_ATMEL_FLASH_3: ++ case FLASH_5755VENDOR_ATMEL_FLASH_5: ++ tp->nvram_jedecnum = JEDEC_ATMEL; ++ tg3_flag_set(tp, NVRAM_BUFFERED); ++ tg3_flag_set(tp, FLASH); ++ tp->nvram_pagesize = 264; ++ if (nvcfg1 == FLASH_5755VENDOR_ATMEL_FLASH_1 || ++ nvcfg1 == FLASH_5755VENDOR_ATMEL_FLASH_5) ++ tp->nvram_size = (protect ? 0x3e200 : ++ TG3_NVRAM_SIZE_512KB); ++ else if (nvcfg1 == FLASH_5755VENDOR_ATMEL_FLASH_2) ++ tp->nvram_size = (protect ? 0x1f200 : ++ TG3_NVRAM_SIZE_256KB); ++ else ++ tp->nvram_size = (protect ? 0x1f200 : ++ TG3_NVRAM_SIZE_128KB); ++ break; ++ case FLASH_5752VENDOR_ST_M45PE10: ++ case FLASH_5752VENDOR_ST_M45PE20: ++ case FLASH_5752VENDOR_ST_M45PE40: ++ tp->nvram_jedecnum = JEDEC_ST; ++ tg3_flag_set(tp, NVRAM_BUFFERED); ++ tg3_flag_set(tp, FLASH); ++ tp->nvram_pagesize = 256; ++ if (nvcfg1 == FLASH_5752VENDOR_ST_M45PE10) ++ tp->nvram_size = (protect ? ++ TG3_NVRAM_SIZE_64KB : ++ TG3_NVRAM_SIZE_128KB); ++ else if (nvcfg1 == FLASH_5752VENDOR_ST_M45PE20) ++ tp->nvram_size = (protect ? ++ TG3_NVRAM_SIZE_64KB : ++ TG3_NVRAM_SIZE_256KB); ++ else ++ tp->nvram_size = (protect ? ++ TG3_NVRAM_SIZE_128KB : ++ TG3_NVRAM_SIZE_512KB); ++ break; ++ } ++} ++ ++static void __devinit tg3_get_5787_nvram_info(struct tg3 *tp) ++{ ++ u32 nvcfg1; ++ ++ nvcfg1 = tr32(NVRAM_CFG1); ++ ++ switch (nvcfg1 & NVRAM_CFG1_5752VENDOR_MASK) { ++ case FLASH_5787VENDOR_ATMEL_EEPROM_64KHZ: ++ case FLASH_5787VENDOR_ATMEL_EEPROM_376KHZ: ++ case FLASH_5787VENDOR_MICRO_EEPROM_64KHZ: ++ case FLASH_5787VENDOR_MICRO_EEPROM_376KHZ: ++ tp->nvram_jedecnum = JEDEC_ATMEL; ++ tg3_flag_set(tp, NVRAM_BUFFERED); ++ tp->nvram_pagesize = ATMEL_AT24C512_CHIP_SIZE; ++ ++ nvcfg1 &= ~NVRAM_CFG1_COMPAT_BYPASS; ++ tw32(NVRAM_CFG1, nvcfg1); ++ break; ++ case FLASH_5752VENDOR_ATMEL_FLASH_BUFFERED: ++ case FLASH_5755VENDOR_ATMEL_FLASH_1: ++ case FLASH_5755VENDOR_ATMEL_FLASH_2: ++ case FLASH_5755VENDOR_ATMEL_FLASH_3: ++ tp->nvram_jedecnum = JEDEC_ATMEL; ++ tg3_flag_set(tp, NVRAM_BUFFERED); ++ tg3_flag_set(tp, FLASH); ++ tp->nvram_pagesize = 264; ++ break; ++ case FLASH_5752VENDOR_ST_M45PE10: ++ case FLASH_5752VENDOR_ST_M45PE20: ++ case FLASH_5752VENDOR_ST_M45PE40: ++ tp->nvram_jedecnum = JEDEC_ST; ++ tg3_flag_set(tp, NVRAM_BUFFERED); ++ tg3_flag_set(tp, FLASH); ++ tp->nvram_pagesize = 256; ++ break; ++ } ++} ++ ++static void __devinit tg3_get_5761_nvram_info(struct tg3 *tp) ++{ ++ u32 nvcfg1, protect = 0; ++ ++ nvcfg1 = tr32(NVRAM_CFG1); ++ ++ /* NVRAM protection for TPM */ ++ if (nvcfg1 & (1 << 27)) { ++ tg3_flag_set(tp, PROTECTED_NVRAM); ++ protect = 1; ++ } ++ ++ nvcfg1 &= NVRAM_CFG1_5752VENDOR_MASK; ++ switch (nvcfg1) { ++ case FLASH_5761VENDOR_ATMEL_ADB021D: ++ case FLASH_5761VENDOR_ATMEL_ADB041D: ++ case FLASH_5761VENDOR_ATMEL_ADB081D: ++ case FLASH_5761VENDOR_ATMEL_ADB161D: ++ case FLASH_5761VENDOR_ATMEL_MDB021D: ++ case FLASH_5761VENDOR_ATMEL_MDB041D: ++ case FLASH_5761VENDOR_ATMEL_MDB081D: ++ case FLASH_5761VENDOR_ATMEL_MDB161D: ++ tp->nvram_jedecnum = JEDEC_ATMEL; ++ tg3_flag_set(tp, NVRAM_BUFFERED); ++ tg3_flag_set(tp, FLASH); ++ tg3_flag_set(tp, NO_NVRAM_ADDR_TRANS); ++ tp->nvram_pagesize = 256; ++ break; ++ case FLASH_5761VENDOR_ST_A_M45PE20: ++ case FLASH_5761VENDOR_ST_A_M45PE40: ++ case FLASH_5761VENDOR_ST_A_M45PE80: ++ case FLASH_5761VENDOR_ST_A_M45PE16: ++ case FLASH_5761VENDOR_ST_M_M45PE20: ++ case FLASH_5761VENDOR_ST_M_M45PE40: ++ case FLASH_5761VENDOR_ST_M_M45PE80: ++ case FLASH_5761VENDOR_ST_M_M45PE16: ++ tp->nvram_jedecnum = JEDEC_ST; ++ tg3_flag_set(tp, NVRAM_BUFFERED); ++ tg3_flag_set(tp, FLASH); ++ tp->nvram_pagesize = 256; ++ break; ++ } ++ ++ if (protect) { ++ tp->nvram_size = tr32(NVRAM_ADDR_LOCKOUT); ++ } else { ++ switch (nvcfg1) { ++ case FLASH_5761VENDOR_ATMEL_ADB161D: ++ case FLASH_5761VENDOR_ATMEL_MDB161D: ++ case FLASH_5761VENDOR_ST_A_M45PE16: ++ case FLASH_5761VENDOR_ST_M_M45PE16: ++ tp->nvram_size = TG3_NVRAM_SIZE_2MB; ++ break; ++ case FLASH_5761VENDOR_ATMEL_ADB081D: ++ case FLASH_5761VENDOR_ATMEL_MDB081D: ++ case FLASH_5761VENDOR_ST_A_M45PE80: ++ case FLASH_5761VENDOR_ST_M_M45PE80: ++ tp->nvram_size = TG3_NVRAM_SIZE_1MB; ++ break; ++ case FLASH_5761VENDOR_ATMEL_ADB041D: ++ case FLASH_5761VENDOR_ATMEL_MDB041D: ++ case FLASH_5761VENDOR_ST_A_M45PE40: ++ case FLASH_5761VENDOR_ST_M_M45PE40: ++ tp->nvram_size = TG3_NVRAM_SIZE_512KB; ++ break; ++ case FLASH_5761VENDOR_ATMEL_ADB021D: ++ case FLASH_5761VENDOR_ATMEL_MDB021D: ++ case FLASH_5761VENDOR_ST_A_M45PE20: ++ case FLASH_5761VENDOR_ST_M_M45PE20: ++ tp->nvram_size = TG3_NVRAM_SIZE_256KB; ++ break; ++ } ++ } ++} ++ ++static void __devinit tg3_get_5906_nvram_info(struct tg3 *tp) ++{ ++ tp->nvram_jedecnum = JEDEC_ATMEL; ++ tg3_flag_set(tp, NVRAM_BUFFERED); ++ tp->nvram_pagesize = ATMEL_AT24C512_CHIP_SIZE; ++} ++ ++static void __devinit tg3_get_57780_nvram_info(struct tg3 *tp) ++{ ++ u32 nvcfg1; ++ ++ nvcfg1 = tr32(NVRAM_CFG1); ++ ++ switch (nvcfg1 & NVRAM_CFG1_5752VENDOR_MASK) { ++ case FLASH_5787VENDOR_ATMEL_EEPROM_376KHZ: ++ case FLASH_5787VENDOR_MICRO_EEPROM_376KHZ: ++ tp->nvram_jedecnum = JEDEC_ATMEL; ++ tg3_flag_set(tp, NVRAM_BUFFERED); ++ tp->nvram_pagesize = ATMEL_AT24C512_CHIP_SIZE; ++ ++ nvcfg1 &= ~NVRAM_CFG1_COMPAT_BYPASS; ++ tw32(NVRAM_CFG1, nvcfg1); ++ return; ++ case FLASH_5752VENDOR_ATMEL_FLASH_BUFFERED: ++ case FLASH_57780VENDOR_ATMEL_AT45DB011D: ++ case FLASH_57780VENDOR_ATMEL_AT45DB011B: ++ case FLASH_57780VENDOR_ATMEL_AT45DB021D: ++ case FLASH_57780VENDOR_ATMEL_AT45DB021B: ++ case FLASH_57780VENDOR_ATMEL_AT45DB041D: ++ case FLASH_57780VENDOR_ATMEL_AT45DB041B: ++ tp->nvram_jedecnum = JEDEC_ATMEL; ++ tg3_flag_set(tp, NVRAM_BUFFERED); ++ tg3_flag_set(tp, FLASH); ++ ++ switch (nvcfg1 & NVRAM_CFG1_5752VENDOR_MASK) { ++ case FLASH_5752VENDOR_ATMEL_FLASH_BUFFERED: ++ case FLASH_57780VENDOR_ATMEL_AT45DB011D: ++ case FLASH_57780VENDOR_ATMEL_AT45DB011B: ++ tp->nvram_size = TG3_NVRAM_SIZE_128KB; ++ break; ++ case FLASH_57780VENDOR_ATMEL_AT45DB021D: ++ case FLASH_57780VENDOR_ATMEL_AT45DB021B: ++ tp->nvram_size = TG3_NVRAM_SIZE_256KB; ++ break; ++ case FLASH_57780VENDOR_ATMEL_AT45DB041D: ++ case FLASH_57780VENDOR_ATMEL_AT45DB041B: ++ tp->nvram_size = TG3_NVRAM_SIZE_512KB; ++ break; ++ } ++ break; ++ case FLASH_5752VENDOR_ST_M45PE10: ++ case FLASH_5752VENDOR_ST_M45PE20: ++ case FLASH_5752VENDOR_ST_M45PE40: ++ tp->nvram_jedecnum = JEDEC_ST; ++ tg3_flag_set(tp, NVRAM_BUFFERED); ++ tg3_flag_set(tp, FLASH); ++ ++ switch (nvcfg1 & NVRAM_CFG1_5752VENDOR_MASK) { ++ case FLASH_5752VENDOR_ST_M45PE10: ++ tp->nvram_size = TG3_NVRAM_SIZE_128KB; ++ break; ++ case FLASH_5752VENDOR_ST_M45PE20: ++ tp->nvram_size = TG3_NVRAM_SIZE_256KB; ++ break; ++ case FLASH_5752VENDOR_ST_M45PE40: ++ tp->nvram_size = TG3_NVRAM_SIZE_512KB; ++ break; ++ } ++ break; ++ default: ++ tg3_flag_set(tp, NO_NVRAM); ++ return; ++ } ++ ++ tg3_nvram_get_pagesize(tp, nvcfg1); ++ if (tp->nvram_pagesize != 264 && tp->nvram_pagesize != 528) ++ tg3_flag_set(tp, NO_NVRAM_ADDR_TRANS); ++} ++ ++ ++static void __devinit tg3_get_5717_nvram_info(struct tg3 *tp) ++{ ++ u32 nvcfg1; ++ ++ nvcfg1 = tr32(NVRAM_CFG1); ++ ++ switch (nvcfg1 & NVRAM_CFG1_5752VENDOR_MASK) { ++ case FLASH_5717VENDOR_ATMEL_EEPROM: ++ case FLASH_5717VENDOR_MICRO_EEPROM: ++ tp->nvram_jedecnum = JEDEC_ATMEL; ++ tg3_flag_set(tp, NVRAM_BUFFERED); ++ tp->nvram_pagesize = ATMEL_AT24C512_CHIP_SIZE; ++ ++ nvcfg1 &= ~NVRAM_CFG1_COMPAT_BYPASS; ++ tw32(NVRAM_CFG1, nvcfg1); ++ return; ++ case FLASH_5717VENDOR_ATMEL_MDB011D: ++ case FLASH_5717VENDOR_ATMEL_ADB011B: ++ case FLASH_5717VENDOR_ATMEL_ADB011D: ++ case FLASH_5717VENDOR_ATMEL_MDB021D: ++ case FLASH_5717VENDOR_ATMEL_ADB021B: ++ case FLASH_5717VENDOR_ATMEL_ADB021D: ++ case FLASH_5717VENDOR_ATMEL_45USPT: ++ tp->nvram_jedecnum = JEDEC_ATMEL; ++ tg3_flag_set(tp, NVRAM_BUFFERED); ++ tg3_flag_set(tp, FLASH); ++ ++ switch (nvcfg1 & NVRAM_CFG1_5752VENDOR_MASK) { ++ case FLASH_5717VENDOR_ATMEL_MDB021D: ++ /* Detect size with tg3_nvram_get_size() */ ++ break; ++ case FLASH_5717VENDOR_ATMEL_ADB021B: ++ case FLASH_5717VENDOR_ATMEL_ADB021D: ++ tp->nvram_size = TG3_NVRAM_SIZE_256KB; ++ break; ++ default: ++ tp->nvram_size = TG3_NVRAM_SIZE_128KB; ++ break; ++ } ++ break; ++ case FLASH_5717VENDOR_ST_M_M25PE10: ++ case FLASH_5717VENDOR_ST_A_M25PE10: ++ case FLASH_5717VENDOR_ST_M_M45PE10: ++ case FLASH_5717VENDOR_ST_A_M45PE10: ++ case FLASH_5717VENDOR_ST_M_M25PE20: ++ case FLASH_5717VENDOR_ST_A_M25PE20: ++ case FLASH_5717VENDOR_ST_M_M45PE20: ++ case FLASH_5717VENDOR_ST_A_M45PE20: ++ case FLASH_5717VENDOR_ST_25USPT: ++ case FLASH_5717VENDOR_ST_45USPT: ++ tp->nvram_jedecnum = JEDEC_ST; ++ tg3_flag_set(tp, NVRAM_BUFFERED); ++ tg3_flag_set(tp, FLASH); ++ ++ switch (nvcfg1 & NVRAM_CFG1_5752VENDOR_MASK) { ++ case FLASH_5717VENDOR_ST_M_M25PE20: ++ case FLASH_5717VENDOR_ST_M_M45PE20: ++ /* Detect size with tg3_nvram_get_size() */ ++ break; ++ case FLASH_5717VENDOR_ST_A_M25PE20: ++ case FLASH_5717VENDOR_ST_A_M45PE20: ++ tp->nvram_size = TG3_NVRAM_SIZE_256KB; ++ break; ++ default: ++ tp->nvram_size = TG3_NVRAM_SIZE_128KB; ++ break; ++ } ++ break; ++ default: ++ tg3_flag_set(tp, NO_NVRAM); ++ return; ++ } ++ ++ tg3_nvram_get_pagesize(tp, nvcfg1); ++ if (tp->nvram_pagesize != 264 && tp->nvram_pagesize != 528) ++ tg3_flag_set(tp, NO_NVRAM_ADDR_TRANS); ++} ++ ++static void __devinit tg3_get_5720_nvram_info(struct tg3 *tp) ++{ ++ u32 nvcfg1, nvmpinstrp, nv_status; ++ ++ nvcfg1 = tr32(NVRAM_CFG1); ++ nvmpinstrp = nvcfg1 & NVRAM_CFG1_5752VENDOR_MASK; ++ ++ if (tg3_asic_rev(tp) == ASIC_REV_5762) { ++ if (!(nvcfg1 & NVRAM_CFG1_5762VENDOR_MASK)) { ++ tg3_flag_set(tp, NO_NVRAM); ++ return; ++ } ++ ++ switch (nvmpinstrp) { ++ case FLASH_5762_MX25L_100: ++ case FLASH_5762_MX25L_200: ++ case FLASH_5762_MX25L_400: ++ case FLASH_5762_MX25L_800: ++ case FLASH_5762_MX25L_160_320: ++ tp->nvram_pagesize = 4096; ++ tp->nvram_jedecnum = JEDEC_MACRONIX; ++ tg3_flag_set(tp, NVRAM_BUFFERED); ++ tg3_flag_set(tp, NO_NVRAM_ADDR_TRANS); ++ tg3_flag_set(tp, FLASH); ++ nv_status = tr32(NVRAM_AUTOSENSE_STATUS); ++ tp->nvram_size = ++ (1 << (nv_status >> AUTOSENSE_DEVID & ++ AUTOSENSE_DEVID_MASK) ++ << AUTOSENSE_SIZE_IN_MB); ++ return; ++ ++ case FLASH_5762_EEPROM_HD: ++ nvmpinstrp = FLASH_5720_EEPROM_HD; ++ break; ++ case FLASH_5762_EEPROM_LD: ++ nvmpinstrp = FLASH_5720_EEPROM_LD; ++ break; ++ case FLASH_5720VENDOR_M_ST_M45PE20: ++ /* This pinstrap supports multiple sizes, so force it ++ * to read the actual size from location 0xf0. ++ */ ++ nvmpinstrp = FLASH_5720VENDOR_ST_45USPT; ++ break; ++ } ++ } ++ ++ switch (nvmpinstrp) { ++ case FLASH_5720_EEPROM_HD: ++ case FLASH_5720_EEPROM_LD: ++ tp->nvram_jedecnum = JEDEC_ATMEL; ++ tg3_flag_set(tp, NVRAM_BUFFERED); ++ ++ nvcfg1 &= ~NVRAM_CFG1_COMPAT_BYPASS; ++ tw32(NVRAM_CFG1, nvcfg1); ++ if (nvmpinstrp == FLASH_5720_EEPROM_HD) ++ tp->nvram_pagesize = ATMEL_AT24C512_CHIP_SIZE; ++ else ++ tp->nvram_pagesize = ATMEL_AT24C02_CHIP_SIZE; ++ return; ++ case FLASH_5720VENDOR_M_ATMEL_DB011D: ++ case FLASH_5720VENDOR_A_ATMEL_DB011B: ++ case FLASH_5720VENDOR_A_ATMEL_DB011D: ++ case FLASH_5720VENDOR_M_ATMEL_DB021D: ++ case FLASH_5720VENDOR_A_ATMEL_DB021B: ++ case FLASH_5720VENDOR_A_ATMEL_DB021D: ++ case FLASH_5720VENDOR_M_ATMEL_DB041D: ++ case FLASH_5720VENDOR_A_ATMEL_DB041B: ++ case FLASH_5720VENDOR_A_ATMEL_DB041D: ++ case FLASH_5720VENDOR_M_ATMEL_DB081D: ++ case FLASH_5720VENDOR_A_ATMEL_DB081D: ++ case FLASH_5720VENDOR_ATMEL_45USPT: ++ tp->nvram_jedecnum = JEDEC_ATMEL; ++ tg3_flag_set(tp, NVRAM_BUFFERED); ++ tg3_flag_set(tp, FLASH); ++ ++ switch (nvmpinstrp) { ++ case FLASH_5720VENDOR_M_ATMEL_DB021D: ++ case FLASH_5720VENDOR_A_ATMEL_DB021B: ++ case FLASH_5720VENDOR_A_ATMEL_DB021D: ++ tp->nvram_size = TG3_NVRAM_SIZE_256KB; ++ break; ++ case FLASH_5720VENDOR_M_ATMEL_DB041D: ++ case FLASH_5720VENDOR_A_ATMEL_DB041B: ++ case FLASH_5720VENDOR_A_ATMEL_DB041D: ++ tp->nvram_size = TG3_NVRAM_SIZE_512KB; ++ break; ++ case FLASH_5720VENDOR_M_ATMEL_DB081D: ++ case FLASH_5720VENDOR_A_ATMEL_DB081D: ++ tp->nvram_size = TG3_NVRAM_SIZE_1MB; ++ break; ++ default: ++ if (tg3_asic_rev(tp) != ASIC_REV_5762) ++ tp->nvram_size = TG3_NVRAM_SIZE_128KB; ++ break; ++ } ++ break; ++ case FLASH_5720VENDOR_M_ST_M25PE10: ++ case FLASH_5720VENDOR_M_ST_M45PE10: ++ case FLASH_5720VENDOR_A_ST_M25PE10: ++ case FLASH_5720VENDOR_A_ST_M45PE10: ++ case FLASH_5720VENDOR_M_ST_M25PE20: ++ case FLASH_5720VENDOR_M_ST_M45PE20: ++ case FLASH_5720VENDOR_A_ST_M25PE20: ++ case FLASH_5720VENDOR_A_ST_M45PE20: ++ case FLASH_5720VENDOR_M_ST_M25PE40: ++ case FLASH_5720VENDOR_M_ST_M45PE40: ++ case FLASH_5720VENDOR_A_ST_M25PE40: ++ case FLASH_5720VENDOR_A_ST_M45PE40: ++ case FLASH_5720VENDOR_M_ST_M25PE80: ++ case FLASH_5720VENDOR_M_ST_M45PE80: ++ case FLASH_5720VENDOR_A_ST_M25PE80: ++ case FLASH_5720VENDOR_A_ST_M45PE80: ++ case FLASH_5720VENDOR_ST_25USPT: ++ case FLASH_5720VENDOR_ST_45USPT: ++ tp->nvram_jedecnum = JEDEC_ST; ++ tg3_flag_set(tp, NVRAM_BUFFERED); ++ tg3_flag_set(tp, FLASH); ++ ++ switch (nvmpinstrp) { ++ case FLASH_5720VENDOR_M_ST_M25PE20: ++ case FLASH_5720VENDOR_M_ST_M45PE20: ++ case FLASH_5720VENDOR_A_ST_M25PE20: ++ case FLASH_5720VENDOR_A_ST_M45PE20: ++ tp->nvram_size = TG3_NVRAM_SIZE_256KB; ++ break; ++ case FLASH_5720VENDOR_M_ST_M25PE40: ++ case FLASH_5720VENDOR_M_ST_M45PE40: ++ case FLASH_5720VENDOR_A_ST_M25PE40: ++ case FLASH_5720VENDOR_A_ST_M45PE40: ++ tp->nvram_size = TG3_NVRAM_SIZE_512KB; ++ break; ++ case FLASH_5720VENDOR_M_ST_M25PE80: ++ case FLASH_5720VENDOR_M_ST_M45PE80: ++ case FLASH_5720VENDOR_A_ST_M25PE80: ++ case FLASH_5720VENDOR_A_ST_M45PE80: ++ tp->nvram_size = TG3_NVRAM_SIZE_1MB; ++ break; ++ default: ++ if (tg3_asic_rev(tp) != ASIC_REV_5762) ++ tp->nvram_size = TG3_NVRAM_SIZE_128KB; ++ break; ++ } ++ break; ++ default: ++ tg3_flag_set(tp, NO_NVRAM); ++ return; ++ } ++ ++ tg3_nvram_get_pagesize(tp, nvcfg1); ++ if (tp->nvram_pagesize != 264 && tp->nvram_pagesize != 528) ++ tg3_flag_set(tp, NO_NVRAM_ADDR_TRANS); ++ ++ if (tg3_asic_rev(tp) == ASIC_REV_5762) { ++ u32 val; ++ ++ if (tg3_nvram_read(tp, 0, &val)) ++ return; ++ ++ if (val != TG3_EEPROM_MAGIC && ++ (val & TG3_EEPROM_MAGIC_FW_MSK) != TG3_EEPROM_MAGIC_FW) ++ tg3_flag_set(tp, NO_NVRAM); ++ } ++} ++ ++/* Chips other than 5700/5701 use the NVRAM for fetching info. */ ++static void __devinit tg3_nvram_init(struct tg3 *tp) ++{ ++ if (tg3_flag(tp, IS_SSB_CORE)) { ++ /* No NVRAM and EEPROM on the SSB Broadcom GigE core. */ ++ tg3_flag_clear(tp, NVRAM); ++ tg3_flag_clear(tp, NVRAM_BUFFERED); ++ tg3_flag_set(tp, NO_NVRAM); ++ return; ++ } ++ ++ tw32_f(GRC_EEPROM_ADDR, ++ (EEPROM_ADDR_FSM_RESET | ++ (EEPROM_DEFAULT_CLOCK_PERIOD << ++ EEPROM_ADDR_CLKPERD_SHIFT))); ++ ++ msleep(1); ++ ++ /* Enable seeprom accesses. */ ++ tw32_f(GRC_LOCAL_CTRL, ++ tr32(GRC_LOCAL_CTRL) | GRC_LCLCTRL_AUTO_SEEPROM); ++ udelay(100); ++ ++ if (tg3_asic_rev(tp) != ASIC_REV_5700 && ++ tg3_asic_rev(tp) != ASIC_REV_5701) { ++ tg3_flag_set(tp, NVRAM); ++ ++ if (tg3_nvram_lock(tp)) { ++ netdev_warn(tp->dev, ++ "Cannot get nvram lock, %s failed\n", ++ __func__); ++ return; ++ } ++ tg3_enable_nvram_access(tp); ++ ++ tp->nvram_size = 0; ++ ++ if (tg3_asic_rev(tp) == ASIC_REV_5752) ++ tg3_get_5752_nvram_info(tp); ++ else if (tg3_asic_rev(tp) == ASIC_REV_5755) ++ tg3_get_5755_nvram_info(tp); ++ else if (tg3_asic_rev(tp) == ASIC_REV_5787 || ++ tg3_asic_rev(tp) == ASIC_REV_5784 || ++ tg3_asic_rev(tp) == ASIC_REV_5785) ++ tg3_get_5787_nvram_info(tp); ++ else if (tg3_asic_rev(tp) == ASIC_REV_5761) ++ tg3_get_5761_nvram_info(tp); ++ else if (tg3_asic_rev(tp) == ASIC_REV_5906) ++ tg3_get_5906_nvram_info(tp); ++ else if (tg3_asic_rev(tp) == ASIC_REV_57780 || ++ tg3_flag(tp, 57765_CLASS)) ++ tg3_get_57780_nvram_info(tp); ++ else if (tg3_asic_rev(tp) == ASIC_REV_5717 || ++ tg3_asic_rev(tp) == ASIC_REV_5719) ++ tg3_get_5717_nvram_info(tp); ++ else if (tg3_asic_rev(tp) == ASIC_REV_5720 || ++ tg3_asic_rev(tp) == ASIC_REV_5762) ++ tg3_get_5720_nvram_info(tp); ++ else ++ tg3_get_nvram_info(tp); ++ ++ if (tp->nvram_size == 0) ++ tg3_get_nvram_size(tp); ++ ++ tg3_disable_nvram_access(tp); ++ tg3_nvram_unlock(tp); ++ ++ } else { ++ tg3_flag_clear(tp, NVRAM); ++ tg3_flag_clear(tp, NVRAM_BUFFERED); ++ ++ tg3_get_eeprom_size(tp); ++ } ++} ++ ++struct subsys_tbl_ent { ++ u16 subsys_vendor, subsys_devid; ++ u32 phy_id; ++}; ++ ++static struct subsys_tbl_ent subsys_id_to_phy_id[] __devinitdata = { ++ /* Broadcom boards. */ ++ { TG3PCI_SUBVENDOR_ID_BROADCOM, ++ TG3PCI_SUBDEVICE_ID_BROADCOM_95700A6, TG3_PHY_ID_BCM5401 }, ++ { TG3PCI_SUBVENDOR_ID_BROADCOM, ++ TG3PCI_SUBDEVICE_ID_BROADCOM_95701A5, TG3_PHY_ID_BCM5701 }, ++ { TG3PCI_SUBVENDOR_ID_BROADCOM, ++ TG3PCI_SUBDEVICE_ID_BROADCOM_95700T6, TG3_PHY_ID_BCM8002 }, ++ { TG3PCI_SUBVENDOR_ID_BROADCOM, ++ TG3PCI_SUBDEVICE_ID_BROADCOM_95700A9, 0 }, ++ { TG3PCI_SUBVENDOR_ID_BROADCOM, ++ TG3PCI_SUBDEVICE_ID_BROADCOM_95701T1, TG3_PHY_ID_BCM5701 }, ++ { TG3PCI_SUBVENDOR_ID_BROADCOM, ++ TG3PCI_SUBDEVICE_ID_BROADCOM_95701T8, TG3_PHY_ID_BCM5701 }, ++ { TG3PCI_SUBVENDOR_ID_BROADCOM, ++ TG3PCI_SUBDEVICE_ID_BROADCOM_95701A7, 0 }, ++ { TG3PCI_SUBVENDOR_ID_BROADCOM, ++ TG3PCI_SUBDEVICE_ID_BROADCOM_95701A10, TG3_PHY_ID_BCM5701 }, ++ { TG3PCI_SUBVENDOR_ID_BROADCOM, ++ TG3PCI_SUBDEVICE_ID_BROADCOM_95701A12, TG3_PHY_ID_BCM5701 }, ++ { TG3PCI_SUBVENDOR_ID_BROADCOM, ++ TG3PCI_SUBDEVICE_ID_BROADCOM_95703AX1, TG3_PHY_ID_BCM5703 }, ++ { TG3PCI_SUBVENDOR_ID_BROADCOM, ++ TG3PCI_SUBDEVICE_ID_BROADCOM_95703AX2, TG3_PHY_ID_BCM5703 }, ++ ++ /* 3com boards. */ ++ { TG3PCI_SUBVENDOR_ID_3COM, ++ TG3PCI_SUBDEVICE_ID_3COM_3C996T, TG3_PHY_ID_BCM5401 }, ++ { TG3PCI_SUBVENDOR_ID_3COM, ++ TG3PCI_SUBDEVICE_ID_3COM_3C996BT, TG3_PHY_ID_BCM5701 }, ++ { TG3PCI_SUBVENDOR_ID_3COM, ++ TG3PCI_SUBDEVICE_ID_3COM_3C996SX, 0 }, ++ { TG3PCI_SUBVENDOR_ID_3COM, ++ TG3PCI_SUBDEVICE_ID_3COM_3C1000T, TG3_PHY_ID_BCM5701 }, ++ { TG3PCI_SUBVENDOR_ID_3COM, ++ TG3PCI_SUBDEVICE_ID_3COM_3C940BR01, TG3_PHY_ID_BCM5701 }, ++ ++ /* DELL boards. */ ++ { TG3PCI_SUBVENDOR_ID_DELL, ++ TG3PCI_SUBDEVICE_ID_DELL_VIPER, TG3_PHY_ID_BCM5401 }, ++ { TG3PCI_SUBVENDOR_ID_DELL, ++ TG3PCI_SUBDEVICE_ID_DELL_JAGUAR, TG3_PHY_ID_BCM5401 }, ++ { TG3PCI_SUBVENDOR_ID_DELL, ++ TG3PCI_SUBDEVICE_ID_DELL_MERLOT, TG3_PHY_ID_BCM5411 }, ++ { TG3PCI_SUBVENDOR_ID_DELL, ++ TG3PCI_SUBDEVICE_ID_DELL_SLIM_MERLOT, TG3_PHY_ID_BCM5411 }, ++ ++ /* Compaq boards. */ ++ { TG3PCI_SUBVENDOR_ID_COMPAQ, ++ TG3PCI_SUBDEVICE_ID_COMPAQ_BANSHEE, TG3_PHY_ID_BCM5701 }, ++ { TG3PCI_SUBVENDOR_ID_COMPAQ, ++ TG3PCI_SUBDEVICE_ID_COMPAQ_BANSHEE_2, TG3_PHY_ID_BCM5701 }, ++ { TG3PCI_SUBVENDOR_ID_COMPAQ, ++ TG3PCI_SUBDEVICE_ID_COMPAQ_CHANGELING, 0 }, ++ { TG3PCI_SUBVENDOR_ID_COMPAQ, ++ TG3PCI_SUBDEVICE_ID_COMPAQ_NC7780, TG3_PHY_ID_BCM5701 }, ++ { TG3PCI_SUBVENDOR_ID_COMPAQ, ++ TG3PCI_SUBDEVICE_ID_COMPAQ_NC7780_2, TG3_PHY_ID_BCM5701 }, ++ ++ /* IBM boards. */ ++ { TG3PCI_SUBVENDOR_ID_IBM, ++ TG3PCI_SUBDEVICE_ID_IBM_5703SAX2, 0 } ++}; ++ ++static struct subsys_tbl_ent * __devinit tg3_lookup_by_subsys(struct tg3 *tp) ++{ ++ int i; ++ ++ for (i = 0; i < ARRAY_SIZE(subsys_id_to_phy_id); i++) { ++ if ((subsys_id_to_phy_id[i].subsys_vendor == ++ tp->pdev->subsystem_vendor) && ++ (subsys_id_to_phy_id[i].subsys_devid == ++ tp->pdev->subsystem_device)) ++ return &subsys_id_to_phy_id[i]; ++ } ++ return NULL; ++} ++ ++static void __devinit tg3_get_eeprom_hw_cfg(struct tg3 *tp) ++{ ++ u32 val; ++ ++ tp->phy_id = TG3_PHY_ID_INVALID; ++ tp->led_ctrl = LED_CTRL_MODE_PHY_1; ++ ++ /* Assume an onboard device and WOL capable by default. */ ++ tg3_flag_set(tp, EEPROM_WRITE_PROT); ++ tg3_flag_set(tp, WOL_CAP); ++ ++ if (tg3_asic_rev(tp) == ASIC_REV_5906) { ++ if (!(tr32(PCIE_TRANSACTION_CFG) & PCIE_TRANS_CFG_LOM)) { ++ tg3_flag_clear(tp, EEPROM_WRITE_PROT); ++ tg3_flag_set(tp, IS_NIC); ++ } ++ val = tr32(VCPU_CFGSHDW); ++ if (val & VCPU_CFGSHDW_ASPM_DBNC) ++ tg3_flag_set(tp, ASPM_WORKAROUND); ++ if ((val & VCPU_CFGSHDW_WOL_ENABLE) && ++ (val & VCPU_CFGSHDW_WOL_MAGPKT)) ++ tg3_flag_set(tp, WOL_ENABLE); ++ goto done; ++ } ++ ++ tg3_read_mem(tp, NIC_SRAM_DATA_SIG, &val); ++ if (val == NIC_SRAM_DATA_SIG_MAGIC) { ++ u32 nic_cfg, led_cfg; ++ u32 cfg2 = 0, cfg4 = 0, cfg5 = 0; ++ u32 nic_phy_id, ver, eeprom_phy_id; ++ int eeprom_phy_serdes = 0; ++ ++ tg3_read_mem(tp, NIC_SRAM_DATA_CFG, &nic_cfg); ++ tp->nic_sram_data_cfg = nic_cfg; ++ ++ tg3_read_mem(tp, NIC_SRAM_DATA_VER, &ver); ++ ver >>= NIC_SRAM_DATA_VER_SHIFT; ++ if (tg3_asic_rev(tp) != ASIC_REV_5700 && ++ tg3_asic_rev(tp) != ASIC_REV_5701 && ++ tg3_asic_rev(tp) != ASIC_REV_5703 && ++ (ver > 0) && (ver < 0x100)) ++ tg3_read_mem(tp, NIC_SRAM_DATA_CFG_2, &cfg2); ++ ++ if (tg3_asic_rev(tp) == ASIC_REV_5785) ++ tg3_read_mem(tp, NIC_SRAM_DATA_CFG_4, &cfg4); ++ ++ if (tg3_asic_rev(tp) == ASIC_REV_5717 || ++ tg3_asic_rev(tp) == ASIC_REV_5719 || ++ tg3_asic_rev(tp) == ASIC_REV_5720) ++ tg3_read_mem(tp, NIC_SRAM_DATA_CFG_5, &cfg5); ++ ++ if ((nic_cfg & NIC_SRAM_DATA_CFG_PHY_TYPE_MASK) == ++ NIC_SRAM_DATA_CFG_PHY_TYPE_FIBER) ++ eeprom_phy_serdes = 1; ++ ++ tg3_read_mem(tp, NIC_SRAM_DATA_PHY_ID, &nic_phy_id); ++ if (nic_phy_id != 0) { ++ u32 id1 = nic_phy_id & NIC_SRAM_DATA_PHY_ID1_MASK; ++ u32 id2 = nic_phy_id & NIC_SRAM_DATA_PHY_ID2_MASK; ++ ++ eeprom_phy_id = (id1 >> 16) << 10; ++ eeprom_phy_id |= (id2 & 0xfc00) << 16; ++ eeprom_phy_id |= (id2 & 0x03ff) << 0; ++ } else ++ eeprom_phy_id = 0; ++ ++ tp->phy_id = eeprom_phy_id; ++ if (eeprom_phy_serdes) { ++ if (!tg3_flag(tp, 5705_PLUS)) ++ tp->phy_flags |= TG3_PHYFLG_PHY_SERDES; ++ else ++ tp->phy_flags |= TG3_PHYFLG_MII_SERDES; ++ } ++ ++ if (tg3_flag(tp, 5750_PLUS)) ++ led_cfg = cfg2 & (NIC_SRAM_DATA_CFG_LED_MODE_MASK | ++ SHASTA_EXT_LED_MODE_MASK); ++ else ++ led_cfg = nic_cfg & NIC_SRAM_DATA_CFG_LED_MODE_MASK; ++ ++ switch (led_cfg) { ++ default: ++ case NIC_SRAM_DATA_CFG_LED_MODE_PHY_1: ++ tp->led_ctrl = LED_CTRL_MODE_PHY_1; ++ break; ++ ++ case NIC_SRAM_DATA_CFG_LED_MODE_PHY_2: ++ tp->led_ctrl = LED_CTRL_MODE_PHY_2; ++ break; ++ ++ case NIC_SRAM_DATA_CFG_LED_MODE_MAC: ++ tp->led_ctrl = LED_CTRL_MODE_MAC; ++ ++ /* Default to PHY_1_MODE if 0 (MAC_MODE) is ++ * read on some older 5700/5701 bootcode. ++ */ ++ if (tg3_asic_rev(tp) == ASIC_REV_5700 || ++ tg3_asic_rev(tp) == ASIC_REV_5701) ++ tp->led_ctrl = LED_CTRL_MODE_PHY_1; ++ ++ break; ++ ++ case SHASTA_EXT_LED_SHARED: ++ tp->led_ctrl = LED_CTRL_MODE_SHARED; ++ if (tg3_chip_rev_id(tp) != CHIPREV_ID_5750_A0 && ++ tg3_chip_rev_id(tp) != CHIPREV_ID_5750_A1) ++ tp->led_ctrl |= (LED_CTRL_MODE_PHY_1 | ++ LED_CTRL_MODE_PHY_2); ++ ++ if (tg3_asic_rev(tp) == ASIC_REV_5717 || ++ tg3_asic_rev(tp) == ASIC_REV_5719 || ++ tg3_asic_rev(tp) == ASIC_REV_5720 || ++ tg3_asic_rev(tp) == ASIC_REV_5762) ++ tp->led_ctrl |= 0xfff80000; ++ ++ break; ++ ++ case SHASTA_EXT_LED_MAC: ++ tp->led_ctrl = LED_CTRL_MODE_SHASTA_MAC; ++ break; ++ ++ case SHASTA_EXT_LED_COMBO: ++ tp->led_ctrl = LED_CTRL_MODE_COMBO; ++ if (tg3_chip_rev_id(tp) != CHIPREV_ID_5750_A0) ++ tp->led_ctrl |= (LED_CTRL_MODE_PHY_1 | ++ LED_CTRL_MODE_PHY_2); ++ break; ++ ++ } ++ ++ if ((tg3_asic_rev(tp) == ASIC_REV_5700 || ++ tg3_asic_rev(tp) == ASIC_REV_5701) && ++ tp->pdev->subsystem_vendor == PCI_VENDOR_ID_DELL) ++ tp->led_ctrl = LED_CTRL_MODE_PHY_2; ++ ++ if (tg3_chip_rev(tp) == CHIPREV_5784_AX) ++ tp->led_ctrl = LED_CTRL_MODE_PHY_1; ++ ++ if (nic_cfg & NIC_SRAM_DATA_CFG_EEPROM_WP) { ++ tg3_flag_set(tp, EEPROM_WRITE_PROT); ++ if ((tp->pdev->subsystem_vendor == ++ PCI_VENDOR_ID_ARIMA) && ++ (tp->pdev->subsystem_device == 0x205a || ++ tp->pdev->subsystem_device == 0x2063)) ++ tg3_flag_clear(tp, EEPROM_WRITE_PROT); ++ } else { ++ tg3_flag_clear(tp, EEPROM_WRITE_PROT); ++ tg3_flag_set(tp, IS_NIC); ++ } ++ ++ if (nic_cfg & NIC_SRAM_DATA_CFG_ASF_ENABLE) { ++ tg3_flag_set(tp, ENABLE_ASF); ++ if (tg3_flag(tp, 5750_PLUS)) ++ tg3_flag_set(tp, ASF_NEW_HANDSHAKE); ++ } ++ ++ if ((nic_cfg & NIC_SRAM_DATA_CFG_APE_ENABLE) && ++ tg3_flag(tp, 5750_PLUS)) ++ tg3_flag_set(tp, ENABLE_APE); ++ ++ if (tp->phy_flags & TG3_PHYFLG_ANY_SERDES && ++ !(nic_cfg & NIC_SRAM_DATA_CFG_FIBER_WOL)) ++ tg3_flag_clear(tp, WOL_CAP); ++ ++ if (tg3_flag(tp, WOL_CAP) && ++ (nic_cfg & NIC_SRAM_DATA_CFG_WOL_ENABLE)) ++ tg3_flag_set(tp, WOL_ENABLE); ++ ++ if (cfg2 & (1 << 17)) ++ tp->phy_flags |= TG3_PHYFLG_CAPACITIVE_COUPLING; ++ ++ /* serdes signal pre-emphasis in register 0x590 set by */ ++ /* bootcode if bit 18 is set */ ++ if (cfg2 & (1 << 18)) ++ tp->phy_flags |= TG3_PHYFLG_SERDES_PREEMPHASIS; ++ ++ if ((tg3_flag(tp, 57765_PLUS) || ++ tg3_asic_rev(tp) == ASIC_REV_5785 || ++ (tg3_asic_rev(tp) == ASIC_REV_5784 && ++ tg3_chip_rev(tp) != CHIPREV_5784_AX)) && ++ (cfg2 & NIC_SRAM_DATA_CFG_2_APD_EN)) ++ tp->phy_flags |= TG3_PHYFLG_ENABLE_APD; ++ ++ if (tg3_flag(tp, PCI_EXPRESS)) { ++ u32 cfg3; ++ ++ tg3_read_mem(tp, NIC_SRAM_DATA_CFG_3, &cfg3); ++ if (tg3_asic_rev(tp) != ASIC_REV_5785 && ++ !tg3_flag(tp, 57765_PLUS) && ++ (cfg3 & NIC_SRAM_ASPM_DEBOUNCE)) ++ tg3_flag_set(tp, ASPM_WORKAROUND); ++ if (cfg3 & NIC_SRAM_LNK_FLAP_AVOID) ++ tp->phy_flags |= TG3_PHYFLG_KEEP_LINK_ON_PWRDN; ++ if (cfg3 & NIC_SRAM_1G_ON_VAUX_OK) ++ tp->phy_flags |= TG3_PHYFLG_1G_ON_VAUX_OK; ++ } ++ ++ if (cfg4 & NIC_SRAM_RGMII_INBAND_DISABLE) ++ tg3_flag_set(tp, RGMII_INBAND_DISABLE); ++ if (cfg4 & NIC_SRAM_RGMII_EXT_IBND_RX_EN) ++ tg3_flag_set(tp, RGMII_EXT_IBND_RX_EN); ++ if (cfg4 & NIC_SRAM_RGMII_EXT_IBND_TX_EN) ++ tg3_flag_set(tp, RGMII_EXT_IBND_TX_EN); ++ ++ if (cfg5 & NIC_SRAM_DISABLE_1G_HALF_ADV) ++ tp->phy_flags |= TG3_PHYFLG_DISABLE_1G_HD_ADV; ++ } ++done: ++ ++#ifndef BCM_HAS_DEVICE_SET_WAKEUP_CAPABLE ++ device_init_wakeup(&tp->pdev->dev, tg3_flag(tp, WOL_CAP)); ++#endif ++ ++ if (tg3_flag(tp, WOL_CAP)) ++ device_set_wakeup_enable(&tp->pdev->dev, ++ tg3_flag(tp, WOL_ENABLE)); ++ else ++ device_set_wakeup_capable(&tp->pdev->dev, false); ++} ++ ++static int __devinit tg3_ape_otp_read(struct tg3 *tp, u32 offset, u32 *val) ++{ ++ int i, err; ++ u32 val2, off = offset * 8; ++ ++ err = tg3_nvram_lock(tp); ++ if (err) ++ return err; ++ ++ tg3_ape_write32(tp, TG3_APE_OTP_ADDR, off | APE_OTP_ADDR_CPU_ENABLE); ++ tg3_ape_write32(tp, TG3_APE_OTP_CTRL, APE_OTP_CTRL_PROG_EN | ++ APE_OTP_CTRL_CMD_RD | APE_OTP_CTRL_START); ++ tg3_ape_read32(tp, TG3_APE_OTP_CTRL); ++ udelay(10); ++ ++ for (i = 0; i < 100; i++) { ++ val2 = tg3_ape_read32(tp, TG3_APE_OTP_STATUS); ++ if (val2 & APE_OTP_STATUS_CMD_DONE) { ++ *val = tg3_ape_read32(tp, TG3_APE_OTP_RD_DATA); ++ break; ++ } ++ udelay(10); ++ } ++ ++ tg3_ape_write32(tp, TG3_APE_OTP_CTRL, 0); ++ ++ tg3_nvram_unlock(tp); ++ if (val2 & APE_OTP_STATUS_CMD_DONE) ++ return 0; ++ ++ return -EBUSY; ++} ++ ++static int __devinit tg3_issue_otp_command(struct tg3 *tp, u32 cmd) ++{ ++ int i; ++ u32 val; ++ ++ tw32(OTP_CTRL, cmd | OTP_CTRL_OTP_CMD_START); ++ tw32(OTP_CTRL, cmd); ++ ++ /* Wait for up to 1 ms for command to execute. */ ++ for (i = 0; i < 100; i++) { ++ val = tr32(OTP_STATUS); ++ if (val & OTP_STATUS_CMD_DONE) ++ break; ++ udelay(10); ++ } ++ ++ return (val & OTP_STATUS_CMD_DONE) ? 0 : -EBUSY; ++} ++ ++/* Read the gphy configuration from the OTP region of the chip. The gphy ++ * configuration is a 32-bit value that straddles the alignment boundary. ++ * We do two 32-bit reads and then shift and merge the results. ++ */ ++static u32 __devinit tg3_read_otp_phycfg(struct tg3 *tp) ++{ ++ u32 bhalf_otp, thalf_otp; ++ ++ tw32(OTP_MODE, OTP_MODE_OTP_THRU_GRC); ++ ++ if (tg3_issue_otp_command(tp, OTP_CTRL_OTP_CMD_INIT)) ++ return 0; ++ ++ tw32(OTP_ADDRESS, OTP_ADDRESS_MAGIC1); ++ ++ if (tg3_issue_otp_command(tp, OTP_CTRL_OTP_CMD_READ)) ++ return 0; ++ ++ thalf_otp = tr32(OTP_READ_DATA); ++ ++ tw32(OTP_ADDRESS, OTP_ADDRESS_MAGIC2); ++ ++ if (tg3_issue_otp_command(tp, OTP_CTRL_OTP_CMD_READ)) ++ return 0; ++ ++ bhalf_otp = tr32(OTP_READ_DATA); ++ ++ return ((thalf_otp & 0x0000ffff) << 16) | (bhalf_otp >> 16); ++} ++ ++static void __devinit tg3_phy_init_link_config(struct tg3 *tp) ++{ ++ u32 adv = ADVERTISED_Autoneg; ++ ++ if (!(tp->phy_flags & TG3_PHYFLG_10_100_ONLY)) { ++ if (!(tp->phy_flags & TG3_PHYFLG_DISABLE_1G_HD_ADV)) ++ adv |= ADVERTISED_1000baseT_Half; ++ adv |= ADVERTISED_1000baseT_Full; ++ } ++ ++ if (!(tp->phy_flags & TG3_PHYFLG_ANY_SERDES)) ++ adv |= ADVERTISED_100baseT_Half | ++ ADVERTISED_100baseT_Full | ++ ADVERTISED_10baseT_Half | ++ ADVERTISED_10baseT_Full | ++ ADVERTISED_TP; ++ else ++ adv |= ADVERTISED_FIBRE; ++ ++ tp->link_config.advertising = adv; ++ tp->link_config.speed = SPEED_UNKNOWN; ++ tp->link_config.duplex = DUPLEX_UNKNOWN; ++ tp->link_config.autoneg = AUTONEG_ENABLE; ++ tp->link_config.active_speed = SPEED_UNKNOWN; ++ tp->link_config.active_duplex = DUPLEX_UNKNOWN; ++ ++ tp->old_link = -1; ++} ++ ++static int __devinit tg3_phy_probe(struct tg3 *tp) ++{ ++ u32 hw_phy_id_1, hw_phy_id_2; ++ u32 hw_phy_id, hw_phy_id_masked; ++ int err; ++ ++ /* flow control autonegotiation is default behavior */ ++ tg3_flag_set(tp, PAUSE_AUTONEG); ++ tp->link_config.flowctrl = FLOW_CTRL_TX | FLOW_CTRL_RX; ++ ++ if (tg3_flag(tp, ENABLE_APE)) { ++ switch (tp->pci_fn) { ++ case 0: ++ tp->phy_ape_lock = TG3_APE_LOCK_PHY0; ++ break; ++ case 1: ++ tp->phy_ape_lock = TG3_APE_LOCK_PHY1; ++ break; ++ case 2: ++ tp->phy_ape_lock = TG3_APE_LOCK_PHY2; ++ break; ++ case 3: ++ tp->phy_ape_lock = TG3_APE_LOCK_PHY3; ++ break; ++ } ++ } ++ ++ if (!tg3_flag(tp, ENABLE_ASF) && ++ !(tp->phy_flags & TG3_PHYFLG_ANY_SERDES) && ++ !(tp->phy_flags & TG3_PHYFLG_10_100_ONLY)) ++ tp->phy_flags &= ~(TG3_PHYFLG_1G_ON_VAUX_OK | ++ TG3_PHYFLG_KEEP_LINK_ON_PWRDN); ++ ++ if (tg3_flag(tp, USE_PHYLIB)) ++ return tg3_phy_init(tp); ++ ++ /* Reading the PHY ID register can conflict with ASF ++ * firmware access to the PHY hardware. ++ */ ++ err = 0; ++ if (tg3_flag(tp, ENABLE_ASF) || tg3_flag(tp, ENABLE_APE)) { ++ hw_phy_id = hw_phy_id_masked = TG3_PHY_ID_INVALID; ++ } else { ++ /* Now read the physical PHY_ID from the chip and verify ++ * that it is sane. If it doesn't look good, we fall back ++ * to either the hard-coded table based PHY_ID and failing ++ * that the value found in the eeprom area. ++ */ ++ err |= tg3_readphy(tp, MII_PHYSID1, &hw_phy_id_1); ++ err |= tg3_readphy(tp, MII_PHYSID2, &hw_phy_id_2); ++ ++ hw_phy_id = (hw_phy_id_1 & 0xffff) << 10; ++ hw_phy_id |= (hw_phy_id_2 & 0xfc00) << 16; ++ hw_phy_id |= (hw_phy_id_2 & 0x03ff) << 0; ++ ++ hw_phy_id_masked = hw_phy_id & TG3_PHY_ID_MASK; ++ } ++ ++ if (!err && TG3_KNOWN_PHY_ID(hw_phy_id_masked)) { ++ tp->phy_id = hw_phy_id; ++ if (hw_phy_id_masked == TG3_PHY_ID_BCM8002) ++ tp->phy_flags |= TG3_PHYFLG_PHY_SERDES; ++ else ++ tp->phy_flags &= ~TG3_PHYFLG_PHY_SERDES; ++ } else { ++ if (tp->phy_id != TG3_PHY_ID_INVALID) { ++ /* Do nothing, phy ID already set up in ++ * tg3_get_eeprom_hw_cfg(). ++ */ ++ } else { ++ struct subsys_tbl_ent *p; ++ ++ /* No eeprom signature? Try the hardcoded ++ * subsys device table. ++ */ ++ p = tg3_lookup_by_subsys(tp); ++ if (p) { ++ tp->phy_id = p->phy_id; ++ } else if (!tg3_flag(tp, IS_SSB_CORE)) { ++ /* For now we saw the IDs 0xbc050cd0, ++ * 0xbc050f80 and 0xbc050c30 on devices ++ * connected to an BCM4785 and there are ++ * probably more. Just assume that the phy is ++ * supported when it is connected to a SSB core ++ * for now. ++ */ ++ return -ENODEV; ++ } ++ ++ if (!tp->phy_id || ++ tp->phy_id == TG3_PHY_ID_BCM8002) ++ tp->phy_flags |= TG3_PHYFLG_PHY_SERDES; ++ } ++ } ++ ++ /* A0 */ ++ if (tg3_asic_rev(tp) == ASIC_REV_5785 && ++ tp->phy_id == TG3_PHY_ID_BCM50612E) { ++ tp->phy_flags &= ~TG3_PHYFLG_ENABLE_APD; ++ tg3_flag_clear(tp, RGMII_INBAND_DISABLE); ++ tg3_flag_clear(tp, RGMII_EXT_IBND_RX_EN); ++ tg3_flag_clear(tp, RGMII_EXT_IBND_TX_EN); ++ } ++ ++#ifndef TG3_DISABLE_EEE_SUPPORT ++ if (!(tp->phy_flags & TG3_PHYFLG_ANY_SERDES) && ++ (tg3_asic_rev(tp) == ASIC_REV_5719 || ++ tg3_asic_rev(tp) == ASIC_REV_5720 || ++ tg3_asic_rev(tp) == ASIC_REV_57766 || ++ tg3_asic_rev(tp) == ASIC_REV_5762 || ++ (tg3_asic_rev(tp) == ASIC_REV_5717 && ++ tg3_chip_rev_id(tp) != CHIPREV_ID_5717_A0) || ++ (tg3_asic_rev(tp) == ASIC_REV_57765 && ++ tg3_chip_rev_id(tp) != CHIPREV_ID_57765_A0))) { ++ tp->phy_flags |= TG3_PHYFLG_EEE_CAP; ++ ++ tp->eee.supported = SUPPORTED_100baseT_Full | ++ SUPPORTED_1000baseT_Full; ++ tp->eee.advertised = ADVERTISED_100baseT_Full | ++ ADVERTISED_1000baseT_Full; ++ tp->eee.eee_enabled = !tg3_disable_eee; ++ tp->eee.tx_lpi_enabled = 1; ++ tp->eee.tx_lpi_timer = TG3_CPMU_DBTMR1_LNKIDLE_2047US; ++ } ++#endif /* TG3_DISABLE_EEE_SUPPORT */ ++ ++ tg3_phy_init_link_config(tp); ++ ++ /* Bring the phy out of its low-power state. */ ++ if (!(tp->phy_flags & TG3_PHYFLG_KEEP_LINK_ON_PWRDN) && ++ !(tp->phy_flags & TG3_PHYFLG_ANY_SERDES) && ++ !tg3_flag(tp, ENABLE_APE) && !tg3_flag(tp, ENABLE_ASF)) ++ err = tg3_phy_reset(tp); ++ ++ return err; ++} ++ ++static void __devinit tg3_read_vpd(struct tg3 *tp) ++{ ++ u8 *vpd_data; ++ unsigned int block_end, rosize, len; ++ u32 vpdlen; ++ int j, i = 0; ++ ++ vpd_data = (u8 *)tg3_vpd_readblock(tp, &vpdlen); ++ if (!vpd_data) ++ goto out_no_vpd; ++ ++ i = pci_vpd_find_tag(vpd_data, 0, vpdlen, PCI_VPD_LRDT_RO_DATA); ++ if (i < 0) ++ goto out_not_found; ++ ++ rosize = pci_vpd_lrdt_size(&vpd_data[i]); ++ block_end = i + PCI_VPD_LRDT_TAG_SIZE + rosize; ++ i += PCI_VPD_LRDT_TAG_SIZE; ++ ++ if (block_end > vpdlen) ++ goto out_not_found; ++ ++ j = pci_vpd_find_info_keyword(vpd_data, i, rosize, ++ PCI_VPD_RO_KEYWORD_MFR_ID); ++ if (j > 0) { ++ len = pci_vpd_info_field_size(&vpd_data[j]); ++ ++ j += PCI_VPD_INFO_FLD_HDR_SIZE; ++ if (j + len > block_end || len != 4 || ++ memcmp(&vpd_data[j], "1028", 4)) ++ goto partno; ++ ++ j = pci_vpd_find_info_keyword(vpd_data, i, rosize, ++ PCI_VPD_RO_KEYWORD_VENDOR0); ++ if (j < 0) ++ goto partno; ++ ++ len = pci_vpd_info_field_size(&vpd_data[j]); ++ ++ j += PCI_VPD_INFO_FLD_HDR_SIZE; ++ if (j + len > block_end) ++ goto partno; ++ ++ if (len >= sizeof(tp->fw_ver)) ++ len = sizeof(tp->fw_ver) - 1; ++ memset(tp->fw_ver, 0, sizeof(tp->fw_ver)); ++ snprintf(tp->fw_ver, sizeof(tp->fw_ver), "%.*s bc ", len, ++ &vpd_data[j]); ++ } ++ ++partno: ++ i = pci_vpd_find_info_keyword(vpd_data, i, rosize, ++ PCI_VPD_RO_KEYWORD_PARTNO); ++ if (i < 0) ++ goto out_not_found; ++ ++ len = pci_vpd_info_field_size(&vpd_data[i]); ++ ++ i += PCI_VPD_INFO_FLD_HDR_SIZE; ++ if (len > TG3_BPN_SIZE || ++ (len + i) > vpdlen) ++ goto out_not_found; ++ ++ memcpy(tp->board_part_number, &vpd_data[i], len); ++ ++out_not_found: ++ kfree(vpd_data); ++ if (tp->board_part_number[0]) ++ return; ++ ++out_no_vpd: ++ if (tg3_asic_rev(tp) == ASIC_REV_5717) { ++ if (tp->pdev->device == TG3PCI_DEVICE_TIGON3_5717 || ++ tp->pdev->device == TG3PCI_DEVICE_TIGON3_5717_C) ++ strcpy(tp->board_part_number, "BCM5717"); ++ else if (tp->pdev->device == TG3PCI_DEVICE_TIGON3_5718) ++ strcpy(tp->board_part_number, "BCM5718"); ++ else ++ goto nomatch; ++ } else if (tg3_asic_rev(tp) == ASIC_REV_57780) { ++ if (tp->pdev->device == TG3PCI_DEVICE_TIGON3_57780) ++ strcpy(tp->board_part_number, "BCM57780"); ++ else if (tp->pdev->device == TG3PCI_DEVICE_TIGON3_57760) ++ strcpy(tp->board_part_number, "BCM57760"); ++ else if (tp->pdev->device == TG3PCI_DEVICE_TIGON3_57790) ++ strcpy(tp->board_part_number, "BCM57790"); ++ else if (tp->pdev->device == TG3PCI_DEVICE_TIGON3_57788) ++ strcpy(tp->board_part_number, "BCM57788"); ++ else ++ goto nomatch; ++ } else if (tg3_asic_rev(tp) == ASIC_REV_57765) { ++ if (tp->pdev->device == TG3PCI_DEVICE_TIGON3_57761) ++ strcpy(tp->board_part_number, "BCM57761"); ++ else if (tp->pdev->device == TG3PCI_DEVICE_TIGON3_57765) ++ strcpy(tp->board_part_number, "BCM57765"); ++ else if (tp->pdev->device == TG3PCI_DEVICE_TIGON3_57781) ++ strcpy(tp->board_part_number, "BCM57781"); ++ else if (tp->pdev->device == TG3PCI_DEVICE_TIGON3_57785) ++ strcpy(tp->board_part_number, "BCM57785"); ++ else if (tp->pdev->device == TG3PCI_DEVICE_TIGON3_57791) ++ strcpy(tp->board_part_number, "BCM57791"); ++ else if (tp->pdev->device == TG3PCI_DEVICE_TIGON3_57795) ++ strcpy(tp->board_part_number, "BCM57795"); ++ else ++ goto nomatch; ++ } else if (tg3_asic_rev(tp) == ASIC_REV_57766) { ++ if (tp->pdev->device == TG3PCI_DEVICE_TIGON3_57762) ++ strcpy(tp->board_part_number, "BCM57762"); ++ else if (tp->pdev->device == TG3PCI_DEVICE_TIGON3_57766) ++ strcpy(tp->board_part_number, "BCM57766"); ++ else if (tp->pdev->device == TG3PCI_DEVICE_TIGON3_57782) ++ strcpy(tp->board_part_number, "BCM57782"); ++ else if (tp->pdev->device == TG3PCI_DEVICE_TIGON3_57786) ++ strcpy(tp->board_part_number, "BCM57786"); ++ else ++ goto nomatch; ++ } else if (tg3_asic_rev(tp) == ASIC_REV_5906) { ++ strcpy(tp->board_part_number, "BCM95906"); ++ } else { ++nomatch: ++ strcpy(tp->board_part_number, "none"); ++ } ++} ++ ++static int __devinit tg3_fw_img_is_valid(struct tg3 *tp, u32 offset) ++{ ++ u32 val; ++ ++ if (tg3_nvram_read(tp, offset, &val) || ++ (val & 0xfc000000) != 0x0c000000 || ++ tg3_nvram_read(tp, offset + 4, &val) || ++ val != 0) ++ return 0; ++ ++ return 1; ++} ++ ++static void __devinit tg3_read_bc_ver(struct tg3 *tp) ++{ ++ u32 val, offset, start, ver_offset; ++ int i, dst_off; ++ bool newver = false; ++ ++ if (tg3_nvram_read(tp, 0xc, &offset) || ++ tg3_nvram_read(tp, 0x4, &start)) ++ return; ++ ++ offset = tg3_nvram_logical_addr(tp, offset); ++ ++ if (tg3_nvram_read(tp, offset, &val)) ++ return; ++ ++ if ((val & 0xfc000000) == 0x0c000000) { ++ if (tg3_nvram_read(tp, offset + 4, &val)) ++ return; ++ ++ if (val == 0) ++ newver = true; ++ } ++ ++ dst_off = strlen(tp->fw_ver); ++ ++ if (newver) { ++ if (TG3_VER_SIZE - dst_off < 16 || ++ tg3_nvram_read(tp, offset + 8, &ver_offset)) ++ return; ++ ++ offset = offset + ver_offset - start; ++ for (i = 0; i < 16; i += 4) { ++ __be32 v; ++ if (tg3_nvram_read_be32(tp, offset + i, &v)) ++ return; ++ ++ memcpy(tp->fw_ver + dst_off + i, &v, sizeof(v)); ++ } ++ } else { ++ u32 major, minor; ++ ++ if (tg3_nvram_read(tp, TG3_NVM_PTREV_BCVER, &ver_offset)) ++ return; ++ ++ major = (ver_offset & TG3_NVM_BCVER_MAJMSK) >> ++ TG3_NVM_BCVER_MAJSFT; ++ minor = ver_offset & TG3_NVM_BCVER_MINMSK; ++ snprintf(&tp->fw_ver[dst_off], TG3_VER_SIZE - dst_off, ++ "v%d.%02d", major, minor); ++ } ++} ++ ++static void __devinit tg3_read_hwsb_ver(struct tg3 *tp) ++{ ++ u32 val, major, minor; ++ ++ /* Use native endian representation */ ++ if (tg3_nvram_read(tp, TG3_NVM_HWSB_CFG1, &val)) ++ return; ++ ++ major = (val & TG3_NVM_HWSB_CFG1_MAJMSK) >> ++ TG3_NVM_HWSB_CFG1_MAJSFT; ++ minor = (val & TG3_NVM_HWSB_CFG1_MINMSK) >> ++ TG3_NVM_HWSB_CFG1_MINSFT; ++ ++ snprintf(&tp->fw_ver[0], 32, "sb v%d.%02d", major, minor); ++} ++ ++static void __devinit tg3_read_sb_ver(struct tg3 *tp, u32 val) ++{ ++ u32 offset, major, minor, build; ++ ++ strncat(tp->fw_ver, "sb", TG3_VER_SIZE - strlen(tp->fw_ver) - 1); ++ ++ if ((val & TG3_EEPROM_SB_FORMAT_MASK) != TG3_EEPROM_SB_FORMAT_1) ++ return; ++ ++ switch (val & TG3_EEPROM_SB_REVISION_MASK) { ++ case TG3_EEPROM_SB_REVISION_0: ++ offset = TG3_EEPROM_SB_F1R0_EDH_OFF; ++ break; ++ case TG3_EEPROM_SB_REVISION_2: ++ offset = TG3_EEPROM_SB_F1R2_EDH_OFF; ++ break; ++ case TG3_EEPROM_SB_REVISION_3: ++ offset = TG3_EEPROM_SB_F1R3_EDH_OFF; ++ break; ++ case TG3_EEPROM_SB_REVISION_4: ++ offset = TG3_EEPROM_SB_F1R4_EDH_OFF; ++ break; ++ case TG3_EEPROM_SB_REVISION_5: ++ offset = TG3_EEPROM_SB_F1R5_EDH_OFF; ++ break; ++ case TG3_EEPROM_SB_REVISION_6: ++ offset = TG3_EEPROM_SB_F1R6_EDH_OFF; ++ break; ++ default: ++ return; ++ } ++ ++ if (tg3_nvram_read(tp, offset, &val)) ++ return; ++ ++ build = (val & TG3_EEPROM_SB_EDH_BLD_MASK) >> ++ TG3_EEPROM_SB_EDH_BLD_SHFT; ++ major = (val & TG3_EEPROM_SB_EDH_MAJ_MASK) >> ++ TG3_EEPROM_SB_EDH_MAJ_SHFT; ++ minor = val & TG3_EEPROM_SB_EDH_MIN_MASK; ++ ++ if (minor > 99 || build > 26) ++ return; ++ ++ offset = strlen(tp->fw_ver); ++ snprintf(&tp->fw_ver[offset], TG3_VER_SIZE - offset, ++ " v%d.%02d", major, minor); ++ ++ if (build > 0) { ++ offset = strlen(tp->fw_ver); ++ if (offset < TG3_VER_SIZE - 1) ++ tp->fw_ver[offset] = 'a' + build - 1; ++ } ++} ++ ++static void __devinit tg3_read_mgmtfw_ver(struct tg3 *tp) ++{ ++ u32 val, offset, start; ++ int i, vlen; ++ ++ for (offset = TG3_NVM_DIR_START; ++ offset < TG3_NVM_DIR_END; ++ offset += TG3_NVM_DIRENT_SIZE) { ++ if (tg3_nvram_read(tp, offset, &val)) ++ return; ++ ++ if ((val >> TG3_NVM_DIRTYPE_SHIFT) == TG3_NVM_DIRTYPE_ASFINI) ++ break; ++ } ++ ++ if (offset == TG3_NVM_DIR_END) ++ return; ++ ++ if (!tg3_flag(tp, 5705_PLUS)) ++ start = 0x08000000; ++ else if (tg3_nvram_read(tp, offset - 4, &start)) ++ return; ++ ++ if (tg3_nvram_read(tp, offset + 4, &offset) || ++ !tg3_fw_img_is_valid(tp, offset) || ++ tg3_nvram_read(tp, offset + 8, &val)) ++ return; ++ ++ offset += val - start; ++ ++ vlen = strlen(tp->fw_ver); ++ ++ tp->fw_ver[vlen++] = ','; ++ tp->fw_ver[vlen++] = ' '; ++ ++ for (i = 0; i < 4; i++) { ++ __be32 v; ++ if (tg3_nvram_read_be32(tp, offset, &v)) ++ return; ++ ++ offset += sizeof(v); ++ ++ if (vlen > TG3_VER_SIZE - sizeof(v)) { ++ memcpy(&tp->fw_ver[vlen], &v, TG3_VER_SIZE - vlen); ++ break; ++ } ++ ++ memcpy(&tp->fw_ver[vlen], &v, sizeof(v)); ++ vlen += sizeof(v); ++ } ++} ++ ++static void __devinit tg3_probe_ncsi(struct tg3 *tp) ++{ ++ u32 apedata; ++ ++ apedata = tg3_ape_read32(tp, TG3_APE_SEG_SIG); ++ if (apedata != APE_SEG_SIG_MAGIC) ++ return; ++ ++ apedata = tg3_ape_read32(tp, TG3_APE_FW_STATUS); ++ if (!(apedata & APE_FW_STATUS_READY)) ++ return; ++ ++ if (tg3_ape_read32(tp, TG3_APE_FW_FEATURES) & TG3_APE_FW_FEATURE_NCSI) ++ tg3_flag_set(tp, APE_HAS_NCSI); ++} ++ ++static void __devinit tg3_read_dash_ver(struct tg3 *tp) ++{ ++ int vlen; ++ u32 apedata; ++ char *fwtype; ++ ++ apedata = tg3_ape_read32(tp, TG3_APE_FW_VERSION); ++ ++ if (tg3_flag(tp, APE_HAS_NCSI)) ++ fwtype = "NCSI"; ++ else if (tp->pdev->device == TG3PCI_DEVICE_TIGON3_5725) ++ fwtype = "SMASH"; ++ else ++ fwtype = "DASH"; ++ ++ vlen = strlen(tp->fw_ver); ++ ++ snprintf(&tp->fw_ver[vlen], TG3_VER_SIZE - vlen, " %s v%d.%d.%d.%d", ++ fwtype, ++ (apedata & APE_FW_VERSION_MAJMSK) >> APE_FW_VERSION_MAJSFT, ++ (apedata & APE_FW_VERSION_MINMSK) >> APE_FW_VERSION_MINSFT, ++ (apedata & APE_FW_VERSION_REVMSK) >> APE_FW_VERSION_REVSFT, ++ (apedata & APE_FW_VERSION_BLDMSK)); ++} ++ ++static void __devinit tg3_read_otp_ver(struct tg3 *tp) ++{ ++ u32 val, val2; ++ ++ if (tg3_asic_rev(tp) != ASIC_REV_5762) ++ return; ++ ++ if (!tg3_ape_otp_read(tp, OTP_ADDRESS_MAGIC0, &val) && ++ !tg3_ape_otp_read(tp, OTP_ADDRESS_MAGIC0 + 4, &val2) && ++ TG3_OTP_MAGIC0_VALID(val)) { ++ u64 val64 = (u64) val << 32 | val2; ++ u32 ver = 0; ++ int i, vlen; ++ ++ for (i = 0; i < 7; i++) { ++ if ((val64 & 0xff) == 0) ++ break; ++ ver = val64 & 0xff; ++ val64 >>= 8; ++ } ++ vlen = strlen(tp->fw_ver); ++ snprintf(&tp->fw_ver[vlen], TG3_VER_SIZE - vlen, " .%02d", ver); ++ } ++} ++ ++static void __devinit tg3_read_fw_ver(struct tg3 *tp) ++{ ++ u32 val; ++ bool vpd_vers = false; ++ ++ if (tp->fw_ver[0] != 0) ++ vpd_vers = true; ++ ++ if (tg3_flag(tp, NO_NVRAM)) { ++ strcat(tp->fw_ver, "sb"); ++ tg3_read_otp_ver(tp); ++ return; ++ } ++ ++ if (tg3_nvram_read(tp, 0, &val)) ++ return; ++ ++ if (val == TG3_EEPROM_MAGIC) ++ tg3_read_bc_ver(tp); ++ else if ((val & TG3_EEPROM_MAGIC_FW_MSK) == TG3_EEPROM_MAGIC_FW) ++ tg3_read_sb_ver(tp, val); ++ else if ((val & TG3_EEPROM_MAGIC_HW_MSK) == TG3_EEPROM_MAGIC_HW) ++ tg3_read_hwsb_ver(tp); ++ ++ if (tg3_flag(tp, ENABLE_ASF)) { ++ if (tg3_flag(tp, ENABLE_APE)) { ++ tg3_probe_ncsi(tp); ++ if (!vpd_vers) ++ tg3_read_dash_ver(tp); ++ } else if (!vpd_vers) { ++ tg3_read_mgmtfw_ver(tp); ++ } ++ } ++ ++ tp->fw_ver[TG3_VER_SIZE - 1] = 0; ++} ++ ++static inline u32 tg3_rx_ret_ring_size(struct tg3 *tp) ++{ ++ if (tg3_flag(tp, LRG_PROD_RING_CAP)) ++ return TG3_RX_RET_MAX_SIZE_5717; ++ else if (tg3_flag(tp, JUMBO_CAPABLE) && !tg3_flag(tp, 5780_CLASS)) ++ return TG3_RX_RET_MAX_SIZE_5700; ++ else ++ return TG3_RX_RET_MAX_SIZE_5705; ++} ++ ++#if (LINUX_VERSION_CODE >= 0x2060a) ++static DEFINE_PCI_DEVICE_TABLE(tg3_write_reorder_chipsets) = { ++ { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_FE_GATE_700C) }, ++ { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8131_BRIDGE) }, ++ { PCI_DEVICE(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8385_0) }, ++ { }, ++}; ++#endif ++ ++static struct pci_dev * __devinit tg3_find_peer(struct tg3 *tp) ++{ ++ struct pci_dev *peer; ++ unsigned int func, devnr = tp->pdev->devfn & ~7; ++ ++ for (func = 0; func < 8; func++) { ++ peer = pci_get_slot(tp->pdev->bus, devnr | func); ++ if (peer && peer != tp->pdev) ++ break; ++ pci_dev_put(peer); ++ } ++ /* 5704 can be configured in single-port mode, set peer to ++ * tp->pdev in that case. ++ */ ++ if (!peer) { ++ peer = tp->pdev; ++ return peer; ++ } ++ ++ /* ++ * We don't need to keep the refcount elevated; there's no way ++ * to remove one half of this device without removing the other ++ */ ++ pci_dev_put(peer); ++ ++ return peer; ++} ++ ++static void __devinit tg3_detect_asic_rev(struct tg3 *tp, u32 misc_ctrl_reg) ++{ ++ tp->pci_chip_rev_id = misc_ctrl_reg >> MISC_HOST_CTRL_CHIPREV_SHIFT; ++ if (tg3_asic_rev(tp) == ASIC_REV_USE_PROD_ID_REG) { ++ u32 reg; ++ ++ /* All devices that use the alternate ++ * ASIC REV location have a CPMU. ++ */ ++ tg3_flag_set(tp, CPMU_PRESENT); ++ ++ if (tp->pdev->device == TG3PCI_DEVICE_TIGON3_5717 || ++ tp->pdev->device == TG3PCI_DEVICE_TIGON3_5717_C || ++ tp->pdev->device == TG3PCI_DEVICE_TIGON3_5718 || ++ tp->pdev->device == TG3PCI_DEVICE_TIGON3_5719 || ++ tp->pdev->device == TG3PCI_DEVICE_TIGON3_5720 || ++ tp->pdev->device == TG3PCI_DEVICE_TIGON3_57767 || ++ tp->pdev->device == TG3PCI_DEVICE_TIGON3_57764 || ++ tp->pdev->device == TG3PCI_DEVICE_TIGON3_5762 || ++ tp->pdev->device == TG3PCI_DEVICE_TIGON3_5725 || ++ tp->pdev->device == TG3PCI_DEVICE_TIGON3_5727 || ++ tp->pdev->device == TG3PCI_DEVICE_TIGON3_57787) ++ reg = TG3PCI_GEN2_PRODID_ASICREV; ++ else if (tp->pdev->device == TG3PCI_DEVICE_TIGON3_57781 || ++ tp->pdev->device == TG3PCI_DEVICE_TIGON3_57785 || ++ tp->pdev->device == TG3PCI_DEVICE_TIGON3_57761 || ++ tp->pdev->device == TG3PCI_DEVICE_TIGON3_57765 || ++ tp->pdev->device == TG3PCI_DEVICE_TIGON3_57791 || ++ tp->pdev->device == TG3PCI_DEVICE_TIGON3_57795 || ++ tp->pdev->device == TG3PCI_DEVICE_TIGON3_57762 || ++ tp->pdev->device == TG3PCI_DEVICE_TIGON3_57766 || ++ tp->pdev->device == TG3PCI_DEVICE_TIGON3_57782 || ++ tp->pdev->device == TG3PCI_DEVICE_TIGON3_57786) ++ reg = TG3PCI_GEN15_PRODID_ASICREV; ++ else ++ reg = TG3PCI_PRODID_ASICREV; ++ ++ pci_read_config_dword(tp->pdev, reg, &tp->pci_chip_rev_id); ++ } ++ ++ /* Wrong chip ID in 5752 A0. This code can be removed later ++ * as A0 is not in production. ++ */ ++ if (tg3_chip_rev_id(tp) == CHIPREV_ID_5752_A0_HW) ++ tp->pci_chip_rev_id = CHIPREV_ID_5752_A0; ++ ++ if (tg3_chip_rev_id(tp) == CHIPREV_ID_5717_C0) ++ tp->pci_chip_rev_id = CHIPREV_ID_5720_A0; ++ ++ if (tg3_asic_rev(tp) == ASIC_REV_5717 || ++ tg3_asic_rev(tp) == ASIC_REV_5719 || ++ tg3_asic_rev(tp) == ASIC_REV_5720) ++ tg3_flag_set(tp, 5717_PLUS); ++ ++ if (tg3_asic_rev(tp) == ASIC_REV_57765 || ++ tg3_asic_rev(tp) == ASIC_REV_57766) ++ tg3_flag_set(tp, 57765_CLASS); ++ ++ if (tg3_flag(tp, 57765_CLASS) || tg3_flag(tp, 5717_PLUS) || ++ tg3_asic_rev(tp) == ASIC_REV_5762) ++ tg3_flag_set(tp, 57765_PLUS); ++ ++ /* Intentionally exclude ASIC_REV_5906 */ ++ if (tg3_asic_rev(tp) == ASIC_REV_5755 || ++ tg3_asic_rev(tp) == ASIC_REV_5787 || ++ tg3_asic_rev(tp) == ASIC_REV_5784 || ++ tg3_asic_rev(tp) == ASIC_REV_5761 || ++ tg3_asic_rev(tp) == ASIC_REV_5785 || ++ tg3_asic_rev(tp) == ASIC_REV_57780 || ++ tg3_flag(tp, 57765_PLUS)) ++ tg3_flag_set(tp, 5755_PLUS); ++ ++ if (tg3_asic_rev(tp) == ASIC_REV_5780 || ++ tg3_asic_rev(tp) == ASIC_REV_5714) ++ tg3_flag_set(tp, 5780_CLASS); ++ ++ if (tg3_asic_rev(tp) == ASIC_REV_5750 || ++ tg3_asic_rev(tp) == ASIC_REV_5752 || ++ tg3_asic_rev(tp) == ASIC_REV_5906 || ++ tg3_flag(tp, 5755_PLUS) || ++ tg3_flag(tp, 5780_CLASS)) ++ tg3_flag_set(tp, 5750_PLUS); ++ ++ if (tg3_asic_rev(tp) == ASIC_REV_5705 || ++ tg3_flag(tp, 5750_PLUS)) ++ tg3_flag_set(tp, 5705_PLUS); ++} ++ ++static bool tg3_10_100_only_device(struct tg3 *tp, ++ const struct pci_device_id *ent) ++{ ++ u32 grc_misc_cfg = tr32(GRC_MISC_CFG) & GRC_MISC_CFG_BOARD_ID_MASK; ++ ++ if ((tg3_asic_rev(tp) == ASIC_REV_5703 && ++ (grc_misc_cfg == 0x8000 || grc_misc_cfg == 0x4000)) || ++ (tp->phy_flags & TG3_PHYFLG_IS_FET)) ++ return true; ++ ++ if (ent->driver_data & TG3_DRV_DATA_FLAG_10_100_ONLY) { ++ if (tg3_asic_rev(tp) == ASIC_REV_5705) { ++ if (ent->driver_data & TG3_DRV_DATA_FLAG_5705_10_100) ++ return true; ++ } else ++ return true; ++ } ++ ++ return false; ++} ++ ++static int __devinit tg3_get_invariants(struct tg3 *tp, ++ const struct pci_device_id *ent) ++{ ++ u32 misc_ctrl_reg; ++ u32 pci_state_reg, grc_misc_cfg; ++ u32 val; ++ u16 pci_cmd; ++ int err; ++ ++ /* Force memory write invalidate off. If we leave it on, ++ * then on 5700_BX chips we have to enable a workaround. ++ * The workaround is to set the TG3PCI_DMA_RW_CTRL boundary ++ * to match the cacheline size. The Broadcom driver have this ++ * workaround but turns MWI off all the times so never uses ++ * it. This seems to suggest that the workaround is insufficient. ++ */ ++ pci_read_config_word(tp->pdev, PCI_COMMAND, &pci_cmd); ++ pci_cmd &= ~PCI_COMMAND_INVALIDATE; ++ pci_write_config_word(tp->pdev, PCI_COMMAND, pci_cmd); ++ ++ /* Important! -- Make sure register accesses are byteswapped ++ * correctly. Also, for those chips that require it, make ++ * sure that indirect register accesses are enabled before ++ * the first operation. ++ */ ++ pci_read_config_dword(tp->pdev, TG3PCI_MISC_HOST_CTRL, ++ &misc_ctrl_reg); ++ tp->misc_host_ctrl |= (misc_ctrl_reg & ++ MISC_HOST_CTRL_CHIPREV); ++ pci_write_config_dword(tp->pdev, TG3PCI_MISC_HOST_CTRL, ++ tp->misc_host_ctrl); ++ ++ tg3_detect_asic_rev(tp, misc_ctrl_reg); ++ ++ /* Fix for CTRL-20413(Huawei)/19887 in KVM PCI Pass-thru mode ++ * Qemu is dropping the pci config space writes to ++ * 0x68, but it is 'not dropping' the BAR space access, ++ * since BAR registers is setup properly in KVM environment. ++ * This redundent write fixes the issue for KVM hypervisor ++ * in SUSE 11.3 reported by Huawei. ++ */ ++ if (tp->pdev->device == TG3PCI_DEVICE_TIGON3_5717_C || ++ tp->pdev->device == TG3PCI_DEVICE_TIGON3_5718 || ++ tp->pdev->device == TG3PCI_DEVICE_TIGON3_5719 || ++ tp->pdev->device == TG3PCI_DEVICE_TIGON3_5720) ++ tg3_write32(tp, TG3PCI_MISC_HOST_CTRL, tp->misc_host_ctrl); ++ /*Fix for CTRL-20413 ends*/ ++ ++ /* If we have 5702/03 A1 or A2 on certain ICH chipsets, ++ * we need to disable memory and use config. cycles ++ * only to access all registers. The 5702/03 chips ++ * can mistakenly decode the special cycles from the ++ * ICH chipsets as memory write cycles, causing corruption ++ * of register and memory space. Only certain ICH bridges ++ * will drive special cycles with non-zero data during the ++ * address phase which can fall within the 5703's address ++ * range. This is not an ICH bug as the PCI spec allows ++ * non-zero address during special cycles. However, only ++ * these ICH bridges are known to drive non-zero addresses ++ * during special cycles. ++ * ++ * Since special cycles do not cross PCI bridges, we only ++ * enable this workaround if the 5703 is on the secondary ++ * bus of these ICH bridges. ++ */ ++ if ((tg3_chip_rev_id(tp) == CHIPREV_ID_5703_A1) || ++ (tg3_chip_rev_id(tp) == CHIPREV_ID_5703_A2)) { ++ static struct tg3_dev_id { ++ u32 vendor; ++ u32 device; ++ u32 rev; ++ } ich_chipsets[] = { ++ { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AA_8, ++ PCI_ANY_ID }, ++ { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AB_8, ++ PCI_ANY_ID }, ++ { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801BA_11, ++ 0xa }, ++ { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801BA_6, ++ PCI_ANY_ID }, ++ { }, ++ }; ++ struct tg3_dev_id *pci_id = &ich_chipsets[0]; ++ struct pci_dev *bridge = NULL; ++ ++ while (pci_id->vendor != 0) { ++ bridge = pci_get_device(pci_id->vendor, pci_id->device, ++ bridge); ++ if (!bridge) { ++ pci_id++; ++ continue; ++ } ++ if (pci_id->rev != PCI_ANY_ID) { ++ u8 rev; ++ ++ pci_read_config_byte(bridge, PCI_REVISION_ID, ++ &rev); ++ if (rev > pci_id->rev) ++ continue; ++ } ++ if (bridge->subordinate && ++ (bridge->subordinate->number == ++ tp->pdev->bus->number)) { ++ tg3_flag_set(tp, ICH_WORKAROUND); ++ pci_dev_put(bridge); ++ break; ++ } ++ } ++ } ++ ++ if (tg3_asic_rev(tp) == ASIC_REV_5701) { ++ static struct tg3_dev_id { ++ u32 vendor; ++ u32 device; ++ } bridge_chipsets[] = { ++ { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PXH_0 }, ++ { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PXH_1 }, ++ { }, ++ }; ++ struct tg3_dev_id *pci_id = &bridge_chipsets[0]; ++ struct pci_dev *bridge = NULL; ++ ++ while (pci_id->vendor != 0) { ++ bridge = pci_get_device(pci_id->vendor, ++ pci_id->device, ++ bridge); ++ if (!bridge) { ++ pci_id++; ++ continue; ++ } ++ if (bridge->subordinate && ++ (bridge->subordinate->number <= ++ tp->pdev->bus->number) && ++ (bridge->subordinate->busn_res_end >= ++ tp->pdev->bus->number)) { ++ tg3_flag_set(tp, 5701_DMA_BUG); ++ pci_dev_put(bridge); ++ break; ++ } ++ } ++ } ++ ++ /* The EPB bridge inside 5714, 5715, and 5780 cannot support ++ * DMA addresses > 40-bit. This bridge may have other additional ++ * 57xx devices behind it in some 4-port NIC designs for example. ++ * Any tg3 device found behind the bridge will also need the 40-bit ++ * DMA workaround. ++ */ ++ if (tg3_flag(tp, 5780_CLASS)) { ++ tg3_flag_set(tp, 40BIT_DMA_BUG); ++ tp->msi_cap = pci_find_capability(tp->pdev, PCI_CAP_ID_MSI); ++ } else { ++ struct pci_dev *bridge = NULL; ++ ++ do { ++ bridge = pci_get_device(PCI_VENDOR_ID_SERVERWORKS, ++ PCI_DEVICE_ID_SERVERWORKS_EPB, ++ bridge); ++ if (bridge && bridge->subordinate && ++ (bridge->subordinate->number <= ++ tp->pdev->bus->number) && ++ (bridge->subordinate->busn_res_end >= ++ tp->pdev->bus->number)) { ++ tg3_flag_set(tp, 40BIT_DMA_BUG); ++ pci_dev_put(bridge); ++ break; ++ } ++ } while (bridge); ++ } ++ ++ if (tg3_asic_rev(tp) == ASIC_REV_5704 || ++ tg3_asic_rev(tp) == ASIC_REV_5714) ++ tp->pdev_peer = tg3_find_peer(tp); ++ ++ /* Determine TSO capabilities */ ++ if (tg3_chip_rev_id(tp) == CHIPREV_ID_5719_A0) ++ ; /* Do nothing. HW bug. */ ++ else if (tg3_flag(tp, 57765_PLUS)) ++ tg3_flag_set(tp, HW_TSO_3); ++ else if (tg3_flag(tp, 5755_PLUS) || ++ tg3_asic_rev(tp) == ASIC_REV_5906) ++ tg3_flag_set(tp, HW_TSO_2); ++ else if (tg3_flag(tp, 5750_PLUS)) { ++ tg3_flag_set(tp, HW_TSO_1); ++ tg3_flag_set(tp, TSO_BUG); ++ if (tg3_asic_rev(tp) == ASIC_REV_5750 && ++ tg3_chip_rev_id(tp) >= CHIPREV_ID_5750_C2) ++ tg3_flag_clear(tp, TSO_BUG); ++ } else if (tg3_asic_rev(tp) != ASIC_REV_5700 && ++ tg3_asic_rev(tp) != ASIC_REV_5701 && ++ tg3_chip_rev_id(tp) != CHIPREV_ID_5705_A0) { ++ tg3_flag_set(tp, FW_TSO); ++ tg3_flag_set(tp, TSO_BUG); ++ if (tg3_asic_rev(tp) == ASIC_REV_5705) ++ tp->fw_needed = FIRMWARE_TG3TSO5; ++ else ++ tp->fw_needed = FIRMWARE_TG3TSO; ++ } ++ ++ /* Selectively allow TSO based on operating conditions */ ++ if (tg3_flag(tp, HW_TSO_1) || ++ tg3_flag(tp, HW_TSO_2) || ++ tg3_flag(tp, HW_TSO_3) || ++ tg3_flag(tp, FW_TSO)) { ++ /* For firmware TSO, assume ASF is disabled. ++ * We'll disable TSO later if we discover ASF ++ * is enabled in tg3_get_eeprom_hw_cfg(). ++ */ ++ tg3_flag_set(tp, TSO_CAPABLE); ++ } else { ++ tg3_flag_clear(tp, TSO_CAPABLE); ++ tg3_flag_clear(tp, TSO_BUG); ++ tp->fw_needed = NULL; ++ } ++ ++ if (tg3_chip_rev_id(tp) == CHIPREV_ID_5701_A0) ++ tp->fw_needed = FIRMWARE_TG3; ++ ++ if (tg3_asic_rev(tp) == ASIC_REV_57766) ++ tp->fw_needed = FIRMWARE_TG357766; ++ ++ tp->irq_max = 1; ++ ++ if (tg3_flag(tp, 5750_PLUS)) { ++ tg3_flag_set(tp, SUPPORT_MSI); ++ if (tg3_chip_rev(tp) == CHIPREV_5750_AX || ++ tg3_chip_rev(tp) == CHIPREV_5750_BX || ++ (tg3_asic_rev(tp) == ASIC_REV_5714 && ++ tg3_chip_rev_id(tp) <= CHIPREV_ID_5714_A2 && ++ tp->pdev_peer == tp->pdev)) ++ tg3_flag_clear(tp, SUPPORT_MSI); ++ ++ if (tg3_flag(tp, 5755_PLUS) || ++ tg3_asic_rev(tp) == ASIC_REV_5906) { ++ tg3_flag_set(tp, 1SHOT_MSI); ++ } ++ ++ if (tg3_flag(tp, 57765_PLUS)) { ++ tg3_flag_set(tp, SUPPORT_MSIX); ++#ifdef TG3_NAPI ++ tp->irq_max = TG3_IRQ_MAX_VECS_RSS; ++#endif ++ } ++#if defined(__VMKLNX__) ++ tp->irq_max = 1; ++#if defined(TG3_VMWARE_NETQ_ENABLE) && !defined(TG3_INBOX) ++ if (tp->pdev->device == TG3PCI_DEVICE_TIGON3_5718 || ++ tg3_asic_rev(tp) == ASIC_REV_5719 || ++ (tg3_asic_rev(tp) == ASIC_REV_5720 && ++ tp->pdev->device != TG3PCI_DEVICE_TIGON3_5717_C)) { ++ tp->vmware.netq.index = tg3_netq_index++; ++ tg3_flag_set(tp, IOV_CAPABLE); ++ tg3_flag_clear(tp, 1SHOT_MSI); ++ tp->irq_max = min(TG3_IRQ_MAX_VECS, TG3_IRQ_MAX_VECS_IOV); ++ } ++#endif /* TG3_VMWARE_NETQ_ENABLE && !TG3_INBOX */ ++#endif /* __VMKLNX__ */ ++ } ++ ++ tp->txq_max = 1; ++ tp->rxq_max = 1; ++ if (tp->irq_max > 1) { ++#ifdef TG3_VMWARE_NETQ_ENABLE ++ if (tg3_flag(tp, IOV_CAPABLE)) ++ tp->rxq_max = tp->irq_max; ++ else ++ tp->rxq_max = 1; ++#else ++ tp->rxq_max = TG3_RSS_MAX_NUM_QS; ++ tg3_rss_init_dflt_indir_tbl(tp, TG3_RSS_MAX_NUM_QS); ++#endif ++ ++ if (tg3_asic_rev(tp) == ASIC_REV_5719 || ++ tg3_asic_rev(tp) == ASIC_REV_5720) ++ tp->txq_max = tp->irq_max - 1; ++ } ++ ++ if (tg3_flag(tp, 5755_PLUS) || ++ tg3_asic_rev(tp) == ASIC_REV_5906) ++ tg3_flag_set(tp, SHORT_DMA_BUG); ++ ++ if (tg3_asic_rev(tp) == ASIC_REV_5719 || ++ tg3_asic_rev(tp) == ASIC_REV_5762) ++ tp->dma_limit = TG3_TX_BD_DMA_MAX_4K; ++#if defined(__VMKLNX__) ++ else if (tg3_flag(tp, TSO_CAPABLE)) ++ tp->dma_limit = TG3_TX_BD_DMA_MAX_32K; ++#endif ++ if (tg3_asic_rev(tp) == ASIC_REV_5717 || ++ tg3_asic_rev(tp) == ASIC_REV_5719 || ++ tg3_asic_rev(tp) == ASIC_REV_5720 || ++ tg3_asic_rev(tp) == ASIC_REV_5762) ++ tg3_flag_set(tp, LRG_PROD_RING_CAP); ++ ++ if (tg3_flag(tp, 57765_PLUS) && ++ tg3_chip_rev_id(tp) != CHIPREV_ID_5719_A0) ++ tg3_flag_set(tp, USE_JUMBO_BDFLAG); ++ ++ if (!tg3_flag(tp, 5705_PLUS) || ++ tg3_flag(tp, 5780_CLASS) || ++ tg3_flag(tp, USE_JUMBO_BDFLAG)) ++ tg3_flag_set(tp, JUMBO_CAPABLE); ++ ++ pci_read_config_dword(tp->pdev, TG3PCI_PCISTATE, ++ &pci_state_reg); ++ ++#ifndef BCM_HAS_PCI_PCIE_CAP ++ tp->pcie_cap = pci_find_capability(tp->pdev, PCI_CAP_ID_EXP); ++#endif ++ ++ if (pci_is_pcie(tp->pdev)) { ++ u16 lnkctl; ++ ++ tg3_flag_set(tp, PCI_EXPRESS); ++ ++ if (tg3_chip_rev_id(tp) == CHIPREV_ID_5719_A0) { ++ int readrq = pcie_get_readrq(tp->pdev); ++ if (readrq > 2048) ++ pcie_set_readrq(tp->pdev, 2048); ++ } ++ ++ pcie_capability_read_word(tp->pdev, PCI_EXP_LNKCTL, &lnkctl); ++ if (lnkctl & PCI_EXP_LNKCTL_CLKREQ_EN) { ++ if (tg3_asic_rev(tp) == ASIC_REV_5906) { ++ tg3_flag_clear(tp, HW_TSO_2); ++ tg3_flag_clear(tp, TSO_CAPABLE); ++ } ++ if (tg3_asic_rev(tp) == ASIC_REV_5784 || ++ tg3_asic_rev(tp) == ASIC_REV_5761 || ++ tg3_chip_rev_id(tp) == CHIPREV_ID_57780_A0 || ++ tg3_chip_rev_id(tp) == CHIPREV_ID_57780_A1) ++ tg3_flag_set(tp, CLKREQ_BUG); ++ } else if (tg3_chip_rev_id(tp) == CHIPREV_ID_5717_A0) { ++ tg3_flag_set(tp, L1PLLPD_EN); ++ } ++ } else if (tg3_asic_rev(tp) == ASIC_REV_5785) { ++ /* BCM5785 devices are effectively PCIe devices, and should ++ * follow PCIe codepaths, but do not have a PCIe capabilities ++ * section. ++ */ ++ tg3_flag_set(tp, PCI_EXPRESS); ++ } else if (!tg3_flag(tp, 5705_PLUS) || ++ tg3_flag(tp, 5780_CLASS)) { ++ tp->pcix_cap = pci_find_capability(tp->pdev, PCI_CAP_ID_PCIX); ++ if (!tp->pcix_cap) { ++ dev_err(&tp->pdev->dev, ++ "Cannot find PCI-X capability, aborting\n"); ++ return -EIO; ++ } ++ ++ if (!(pci_state_reg & PCISTATE_CONV_PCI_MODE)) ++ tg3_flag_set(tp, PCIX_MODE); ++ } ++ ++ /* If we have an AMD 762 or VIA K8T800 chipset, write ++ * reordering to the mailbox registers done by the host ++ * controller can cause major troubles. We read back from ++ * every mailbox register write to force the writes to be ++ * posted to the chip in order. ++ */ ++#if (LINUX_VERSION_CODE < 0x2060a) ++ if ((pci_find_device(PCI_VENDOR_ID_AMD, ++ PCI_DEVICE_ID_AMD_FE_GATE_700C, NULL) || ++ pci_find_device(PCI_VENDOR_ID_AMD, ++ PCI_DEVICE_ID_AMD_8131_BRIDGE, NULL) || ++ pci_find_device(PCI_VENDOR_ID_VIA, ++ PCI_DEVICE_ID_VIA_8385_0, NULL)) && ++#else ++ if (pci_dev_present(tg3_write_reorder_chipsets) && ++#endif ++ !tg3_flag(tp, PCI_EXPRESS)) ++ tg3_flag_set(tp, MBOX_WRITE_REORDER); ++ ++ pci_read_config_byte(tp->pdev, PCI_CACHE_LINE_SIZE, ++ &tp->pci_cacheline_sz); ++ pci_read_config_byte(tp->pdev, PCI_LATENCY_TIMER, ++ &tp->pci_lat_timer); ++ if (tg3_asic_rev(tp) == ASIC_REV_5703 && ++ tp->pci_lat_timer < 64) { ++ tp->pci_lat_timer = 64; ++ pci_write_config_byte(tp->pdev, PCI_LATENCY_TIMER, ++ tp->pci_lat_timer); ++ } ++ ++ /* Important! -- It is critical that the PCI-X hw workaround ++ * situation is decided before the first MMIO register access. ++ */ ++ if (tg3_chip_rev(tp) == CHIPREV_5700_BX) { ++ /* 5700 BX chips need to have their TX producer index ++ * mailboxes written twice to workaround a bug. ++ */ ++ tg3_flag_set(tp, TXD_MBOX_HWBUG); ++ ++ /* If we are in PCI-X mode, enable register write workaround. ++ * ++ * The workaround is to use indirect register accesses ++ * for all chip writes not to mailbox registers. ++ */ ++ if (tg3_flag(tp, PCIX_MODE)) { ++ u32 pm_reg; ++ ++ tg3_flag_set(tp, PCIX_TARGET_HWBUG); ++ ++ /* The chip can have it's power management PCI config ++ * space registers clobbered due to this bug. ++ * So explicitly force the chip into D0 here. ++ */ ++ pci_read_config_dword(tp->pdev, ++ tp->pm_cap + PCI_PM_CTRL, ++ &pm_reg); ++ pm_reg &= ~PCI_PM_CTRL_STATE_MASK; ++ pm_reg |= PCI_PM_CTRL_PME_ENABLE | 0 /* D0 */; ++ pci_write_config_dword(tp->pdev, ++ tp->pm_cap + PCI_PM_CTRL, ++ pm_reg); ++ ++ /* Also, force SERR#/PERR# in PCI command. */ ++ pci_read_config_word(tp->pdev, PCI_COMMAND, &pci_cmd); ++ pci_cmd |= PCI_COMMAND_PARITY | PCI_COMMAND_SERR; ++ pci_write_config_word(tp->pdev, PCI_COMMAND, pci_cmd); ++ } ++ } ++ ++ if ((pci_state_reg & PCISTATE_BUS_SPEED_HIGH) != 0) ++ tg3_flag_set(tp, PCI_HIGH_SPEED); ++ if ((pci_state_reg & PCISTATE_BUS_32BIT) != 0) ++ tg3_flag_set(tp, PCI_32BIT); ++ ++ /* Chip-specific fixup from Broadcom driver */ ++ if ((tg3_chip_rev_id(tp) == CHIPREV_ID_5704_A0) && ++ (!(pci_state_reg & PCISTATE_RETRY_SAME_DMA))) { ++ pci_state_reg |= PCISTATE_RETRY_SAME_DMA; ++ pci_write_config_dword(tp->pdev, TG3PCI_PCISTATE, pci_state_reg); ++ } ++ ++ /* Default fast path register access methods */ ++ tp->read32 = tg3_read32; ++ tp->write32 = tg3_write32; ++ tp->read32_mbox = tg3_read32; ++ tp->write32_mbox = tg3_write32; ++ tp->write32_tx_mbox = tg3_write32; ++ tp->write32_rx_mbox = tg3_write32; ++ ++ /* Various workaround register access methods */ ++ if (tg3_flag(tp, PCIX_TARGET_HWBUG)) ++ tp->write32 = tg3_write_indirect_reg32; ++ else if (tg3_asic_rev(tp) == ASIC_REV_5701 || ++ (tg3_flag(tp, PCI_EXPRESS) && ++ tg3_chip_rev_id(tp) == CHIPREV_ID_5750_A0)) { ++ /* ++ * Back to back register writes can cause problems on these ++ * chips, the workaround is to read back all reg writes ++ * except those to mailbox regs. ++ * ++ * See tg3_write_indirect_reg32(). ++ */ ++ tp->write32 = tg3_write_flush_reg32; ++ } ++ ++ if (tg3_flag(tp, TXD_MBOX_HWBUG) || tg3_flag(tp, MBOX_WRITE_REORDER)) { ++ tp->write32_tx_mbox = tg3_write32_tx_mbox; ++ if (tg3_flag(tp, MBOX_WRITE_REORDER)) ++ tp->write32_rx_mbox = tg3_write_flush_reg32; ++ } ++ ++ if (tg3_flag(tp, ICH_WORKAROUND)) { ++ tp->read32 = tg3_read_indirect_reg32; ++ tp->write32 = tg3_write_indirect_reg32; ++ tp->read32_mbox = tg3_read_indirect_mbox; ++ tp->write32_mbox = tg3_write_indirect_mbox; ++ tp->write32_tx_mbox = tg3_write_indirect_mbox; ++ tp->write32_rx_mbox = tg3_write_indirect_mbox; ++ ++ iounmap(tp->regs); ++ tp->regs = NULL; ++ ++ pci_read_config_word(tp->pdev, PCI_COMMAND, &pci_cmd); ++ pci_cmd &= ~PCI_COMMAND_MEMORY; ++ pci_write_config_word(tp->pdev, PCI_COMMAND, pci_cmd); ++ } ++ if (tg3_asic_rev(tp) == ASIC_REV_5906) { ++ tp->read32_mbox = tg3_read32_mbox_5906; ++ tp->write32_mbox = tg3_write32_mbox_5906; ++ tp->write32_tx_mbox = tg3_write32_mbox_5906; ++ tp->write32_rx_mbox = tg3_write32_mbox_5906; ++ } ++ ++ if (tp->write32 == tg3_write_indirect_reg32 || ++ (tg3_flag(tp, PCIX_MODE) && ++ (tg3_asic_rev(tp) == ASIC_REV_5700 || ++ tg3_asic_rev(tp) == ASIC_REV_5701))) ++ tg3_flag_set(tp, SRAM_USE_CONFIG); ++ ++ /* The memory arbiter has to be enabled in order for SRAM accesses ++ * to succeed. Normally on powerup the tg3 chip firmware will make ++ * sure it is enabled, but other entities such as system netboot ++ * code might disable it. ++ */ ++ val = tr32(MEMARB_MODE); ++ tw32(MEMARB_MODE, val | MEMARB_MODE_ENABLE); ++ ++ tp->pci_fn = PCI_FUNC(tp->pdev->devfn) & 3; ++ if (tg3_asic_rev(tp) == ASIC_REV_5704 || ++ tg3_flag(tp, 5780_CLASS)) { ++ if (tg3_flag(tp, PCIX_MODE)) { ++ pci_read_config_dword(tp->pdev, ++ tp->pcix_cap + PCI_X_STATUS, ++ &val); ++ tp->pci_fn = val & 0x7; ++ } ++ } else if (tg3_asic_rev(tp) == ASIC_REV_5717 || ++ tg3_asic_rev(tp) == ASIC_REV_5719 || ++ tg3_asic_rev(tp) == ASIC_REV_5720) { ++ tg3_read_mem(tp, NIC_SRAM_CPMU_STATUS, &val); ++ if ((val & NIC_SRAM_CPMUSTAT_SIG_MSK) != NIC_SRAM_CPMUSTAT_SIG) ++ val = tr32(TG3_CPMU_STATUS); ++ ++ if (tg3_asic_rev(tp) == ASIC_REV_5717) ++ tp->pci_fn = (val & TG3_CPMU_STATUS_FMSK_5717) ? 1 : 0; ++ else ++ tp->pci_fn = (val & TG3_CPMU_STATUS_FMSK_5719) >> ++ TG3_CPMU_STATUS_FSHFT_5719; ++ } ++ ++ if (tg3_flag(tp, FLUSH_POSTED_WRITES)) { ++ tp->write32_tx_mbox = tg3_write_flush_reg32; ++ tp->write32_rx_mbox = tg3_write_flush_reg32; ++ } ++ ++ /* Get eeprom hw config before calling tg3_set_power_state(). ++ * In particular, the TG3_FLAG_IS_NIC flag must be ++ * determined before calling tg3_set_power_state() so that ++ * we know whether or not to switch out of Vaux power. ++ * When the flag is set, it means that GPIO1 is used for eeprom ++ * write protect and also implies that it is a LOM where GPIOs ++ * are not used to switch power. ++ */ ++ tg3_get_eeprom_hw_cfg(tp); ++ ++ if (tg3_flag(tp, FW_TSO) && tg3_flag(tp, ENABLE_ASF)) { ++ tg3_flag_clear(tp, TSO_CAPABLE); ++ tg3_flag_clear(tp, TSO_BUG); ++ tp->fw_needed = NULL; ++ } ++ ++ if (tg3_flag(tp, ENABLE_APE)) { ++ /* Allow reads and writes to the ++ * APE register and memory space. ++ */ ++ pci_state_reg |= PCISTATE_ALLOW_APE_CTLSPC_WR | ++ PCISTATE_ALLOW_APE_SHMEM_WR | ++ PCISTATE_ALLOW_APE_PSPACE_WR; ++ pci_write_config_dword(tp->pdev, TG3PCI_PCISTATE, ++ pci_state_reg); ++ ++ tg3_ape_lock_init(tp); ++ tp->ape_hb_interval = ++ msecs_to_jiffies(APE_HOST_HEARTBEAT_INT_5SEC); ++ } ++ ++#if !defined(__VMKLNX__) ++ tp->recoverable_err_interval = msecs_to_jiffies(RECOVERABLE_ERR_10SEC); ++#endif ++ ++ /* Set up tp->grc_local_ctrl before calling ++ * tg3_pwrsrc_switch_to_vmain(). GPIO1 driven high ++ * will bring 5700's external PHY out of reset. ++ * It is also used as eeprom write protect on LOMs. ++ */ ++ tp->grc_local_ctrl = GRC_LCLCTRL_INT_ON_ATTN | GRC_LCLCTRL_AUTO_SEEPROM; ++ if (tg3_asic_rev(tp) == ASIC_REV_5700 || ++ tg3_flag(tp, EEPROM_WRITE_PROT)) ++ tp->grc_local_ctrl |= (GRC_LCLCTRL_GPIO_OE1 | ++ GRC_LCLCTRL_GPIO_OUTPUT1); ++ /* Unused GPIO3 must be driven as output on 5752 because there ++ * are no pull-up resistors on unused GPIO pins. ++ */ ++ else if (tg3_asic_rev(tp) == ASIC_REV_5752) ++ tp->grc_local_ctrl |= GRC_LCLCTRL_GPIO_OE3; ++ ++ if (tg3_asic_rev(tp) == ASIC_REV_5755 || ++ tg3_asic_rev(tp) == ASIC_REV_57780 || ++ tg3_flag(tp, 57765_CLASS)) ++ tp->grc_local_ctrl |= GRC_LCLCTRL_GPIO_UART_SEL; ++ ++ if (tp->pdev->device == PCI_DEVICE_ID_TIGON3_5761 || ++ tp->pdev->device == TG3PCI_DEVICE_TIGON3_5761S) { ++ /* Turn off the debug UART. */ ++ tp->grc_local_ctrl |= GRC_LCLCTRL_GPIO_UART_SEL; ++ if (tg3_flag(tp, IS_NIC)) ++ /* Keep VMain power. */ ++ tp->grc_local_ctrl |= GRC_LCLCTRL_GPIO_OE0 | ++ GRC_LCLCTRL_GPIO_OUTPUT0; ++ } ++ ++ if (tg3_asic_rev(tp) == ASIC_REV_5762) ++ tp->grc_local_ctrl |= ++ tr32(GRC_LOCAL_CTRL) & GRC_LCLCTRL_GPIO_UART_SEL; ++ ++ /* Switch out of Vaux if it is a NIC */ ++ tg3_pwrsrc_switch_to_vmain(tp); ++ ++ /* Derive initial jumbo mode from MTU assigned in ++ * ether_setup() via the alloc_etherdev() call ++ */ ++ if (tp->dev->mtu > ETH_DATA_LEN && !tg3_flag(tp, 5780_CLASS)) ++ tg3_flag_set(tp, JUMBO_RING_ENABLE); ++ ++ /* Determine WakeOnLan speed to use. */ ++ if (tg3_asic_rev(tp) == ASIC_REV_5700 || ++ tg3_chip_rev_id(tp) == CHIPREV_ID_5701_A0 || ++ tg3_chip_rev_id(tp) == CHIPREV_ID_5701_B0 || ++ tg3_chip_rev_id(tp) == CHIPREV_ID_5701_B2) { ++ tg3_flag_clear(tp, WOL_SPEED_100MB); ++ } else { ++ tg3_flag_set(tp, WOL_SPEED_100MB); ++ } ++ ++#ifndef BCM_INCLUDE_PHYLIB_SUPPORT ++ if (tg3_asic_rev(tp) == ASIC_REV_5906 || ++ (tg3_asic_rev(tp) == ASIC_REV_5785 && ++ (tp->phy_id & TG3_PHY_ID_MASK) == TG3_PHY_ID_BCMAC131)) ++ tp->phy_flags |= TG3_PHYFLG_IS_FET; ++#else ++ if (tg3_asic_rev(tp) == ASIC_REV_5906) ++ tp->phy_flags |= TG3_PHYFLG_IS_FET; ++#endif ++ ++ /* A few boards don't want Ethernet@WireSpeed phy feature */ ++ if (tg3_asic_rev(tp) == ASIC_REV_5700 || ++ (tg3_asic_rev(tp) == ASIC_REV_5705 && ++ (tg3_chip_rev_id(tp) != CHIPREV_ID_5705_A0) && ++ (tg3_chip_rev_id(tp) != CHIPREV_ID_5705_A1)) || ++ (tp->phy_flags & TG3_PHYFLG_IS_FET) || ++ (tp->phy_flags & TG3_PHYFLG_ANY_SERDES)) ++ tp->phy_flags |= TG3_PHYFLG_NO_ETH_WIRE_SPEED; ++ ++ if (tg3_chip_rev(tp) == CHIPREV_5703_AX || ++ tg3_chip_rev(tp) == CHIPREV_5704_AX) ++ tp->phy_flags |= TG3_PHYFLG_ADC_BUG; ++ if (tg3_chip_rev_id(tp) == CHIPREV_ID_5704_A0) ++ tp->phy_flags |= TG3_PHYFLG_5704_A0_BUG; ++ ++ if (tg3_flag(tp, 5705_PLUS) && ++ !(tp->phy_flags & TG3_PHYFLG_IS_FET) && ++ tg3_asic_rev(tp) != ASIC_REV_5785 && ++ tg3_asic_rev(tp) != ASIC_REV_57780 && ++ !tg3_flag(tp, 57765_PLUS)) { ++ if (tg3_asic_rev(tp) == ASIC_REV_5755 || ++ tg3_asic_rev(tp) == ASIC_REV_5787 || ++ tg3_asic_rev(tp) == ASIC_REV_5784 || ++ tg3_asic_rev(tp) == ASIC_REV_5761) { ++ if (tp->pdev->device != PCI_DEVICE_ID_TIGON3_5756 && ++ tp->pdev->device != PCI_DEVICE_ID_TIGON3_5722) ++ tp->phy_flags |= TG3_PHYFLG_JITTER_BUG; ++ if (tp->pdev->device == PCI_DEVICE_ID_TIGON3_5755M) ++ tp->phy_flags |= TG3_PHYFLG_ADJUST_TRIM; ++ } else ++ tp->phy_flags |= TG3_PHYFLG_BER_BUG; ++ } ++ ++ if (tg3_asic_rev(tp) == ASIC_REV_5784 && ++ tg3_chip_rev(tp) != CHIPREV_5784_AX) { ++ tp->phy_otp = tg3_read_otp_phycfg(tp); ++ if (tp->phy_otp == 0) ++ tp->phy_otp = TG3_OTP_DEFAULT; ++ } ++ ++ if (tg3_flag(tp, CPMU_PRESENT)) ++ tp->mi_mode = MAC_MI_MODE_500KHZ_CONST; ++ else ++ tp->mi_mode = MAC_MI_MODE_BASE; ++ ++ tp->coalesce_mode = 0; ++ if (tg3_chip_rev(tp) != CHIPREV_5700_AX && ++ tg3_chip_rev(tp) != CHIPREV_5700_BX) ++ tp->coalesce_mode |= HOSTCC_MODE_32BYTE; ++ ++ /* Set these bits to enable statistics workaround. */ ++ if (tg3_asic_rev(tp) == ASIC_REV_5717 || ++ tg3_asic_rev(tp) == ASIC_REV_5762 || ++ tg3_chip_rev_id(tp) == CHIPREV_ID_5719_A0 || ++ tg3_chip_rev_id(tp) == CHIPREV_ID_5720_A0) { ++ tp->coalesce_mode |= HOSTCC_MODE_ATTN; ++ tp->grc_mode |= GRC_MODE_IRQ_ON_FLOW_ATTN; ++ } ++ ++#ifdef BCM_INCLUDE_PHYLIB_SUPPORT ++ if (tg3_asic_rev(tp) == ASIC_REV_5785 || ++ tg3_asic_rev(tp) == ASIC_REV_57780) ++ tg3_flag_set(tp, USE_PHYLIB); ++#endif ++ ++ err = tg3_mdio_init(tp); ++ if (err) ++ return err; ++ ++ /* Initialize data/descriptor byte/word swapping. */ ++ val = tr32(GRC_MODE); ++ if (tg3_asic_rev(tp) == ASIC_REV_5720 || ++ tg3_asic_rev(tp) == ASIC_REV_5762) ++ val &= (GRC_MODE_BYTE_SWAP_B2HRX_DATA | ++ GRC_MODE_WORD_SWAP_B2HRX_DATA | ++ GRC_MODE_B2HRX_ENABLE | ++ GRC_MODE_HTX2B_ENABLE | ++ GRC_MODE_HOST_STACKUP); ++ else ++ val &= GRC_MODE_HOST_STACKUP; ++ ++ tw32(GRC_MODE, val | tp->grc_mode); ++ ++ tg3_switch_clocks(tp); ++ ++ /* Clear this out for sanity. */ ++ tw32(TG3PCI_MEM_WIN_BASE_ADDR, 0); ++ ++ /* Clear TG3PCI_REG_BASE_ADDR to prevent hangs. */ ++ tw32(TG3PCI_REG_BASE_ADDR, 0); ++ ++ pci_read_config_dword(tp->pdev, TG3PCI_PCISTATE, ++ &pci_state_reg); ++ if ((pci_state_reg & PCISTATE_CONV_PCI_MODE) == 0 && ++ !tg3_flag(tp, PCIX_TARGET_HWBUG)) { ++ if (tg3_chip_rev_id(tp) == CHIPREV_ID_5701_A0 || ++ tg3_chip_rev_id(tp) == CHIPREV_ID_5701_B0 || ++ tg3_chip_rev_id(tp) == CHIPREV_ID_5701_B2 || ++ tg3_chip_rev_id(tp) == CHIPREV_ID_5701_B5) { ++ void __iomem *sram_base; ++ ++ /* Write some dummy words into the SRAM status block ++ * area, see if it reads back correctly. If the return ++ * value is bad, force enable the PCIX workaround. ++ */ ++ sram_base = tp->regs + NIC_SRAM_WIN_BASE + NIC_SRAM_STATS_BLK; ++ ++ writel(0x00000000, sram_base); ++ writel(0x00000000, sram_base + 4); ++ writel(0xffffffff, sram_base + 4); ++ if (readl(sram_base) != 0x00000000) ++ tg3_flag_set(tp, PCIX_TARGET_HWBUG); ++ } ++ } ++ ++ udelay(50); ++ tg3_nvram_init(tp); ++ ++ /* If the device has an NVRAM, no need to load patch firmware */ ++ if (tg3_asic_rev(tp) == ASIC_REV_57766 && ++ !tg3_flag(tp, NO_NVRAM)) ++ tp->fw_needed = NULL; ++ ++ grc_misc_cfg = tr32(GRC_MISC_CFG); ++ grc_misc_cfg &= GRC_MISC_CFG_BOARD_ID_MASK; ++ ++ if (tg3_asic_rev(tp) == ASIC_REV_5705 && ++ (grc_misc_cfg == GRC_MISC_CFG_BOARD_ID_5788 || ++ grc_misc_cfg == GRC_MISC_CFG_BOARD_ID_5788M)) ++ tg3_flag_set(tp, IS_5788); ++ ++ if (!tg3_flag(tp, IS_5788) && ++ tg3_asic_rev(tp) != ASIC_REV_5700) ++ tg3_flag_set(tp, TAGGED_STATUS); ++ if (tg3_flag(tp, TAGGED_STATUS)) { ++ tp->coalesce_mode |= (HOSTCC_MODE_CLRTICK_RXBD | ++ HOSTCC_MODE_CLRTICK_TXBD); ++ ++ tp->misc_host_ctrl |= MISC_HOST_CTRL_TAGGED_STATUS; ++ pci_write_config_dword(tp->pdev, TG3PCI_MISC_HOST_CTRL, ++ tp->misc_host_ctrl); ++ } ++ ++ /* Preserve the APE MAC_MODE bits */ ++ if (tg3_flag(tp, ENABLE_APE)) ++ tp->mac_mode = MAC_MODE_APE_TX_EN | MAC_MODE_APE_RX_EN; ++ else ++ tp->mac_mode = 0; ++ ++ if (tg3_10_100_only_device(tp, ent)) ++ tp->phy_flags |= TG3_PHYFLG_10_100_ONLY; ++ ++ err = tg3_phy_probe(tp); ++ if (err) { ++ dev_err(&tp->pdev->dev, "phy probe failed, err %d\n", err); ++ /* ... but do not return immediately ... */ ++ tg3_mdio_fini(tp); ++ } ++ ++ tg3_read_vpd(tp); ++ tg3_read_fw_ver(tp); ++ ++ if (tp->phy_flags & TG3_PHYFLG_PHY_SERDES) { ++ tp->phy_flags &= ~TG3_PHYFLG_USE_MI_INTERRUPT; ++ } else { ++ if (tg3_asic_rev(tp) == ASIC_REV_5700) ++ tp->phy_flags |= TG3_PHYFLG_USE_MI_INTERRUPT; ++ else ++ tp->phy_flags &= ~TG3_PHYFLG_USE_MI_INTERRUPT; ++ } ++ ++ /* 5700 {AX,BX} chips have a broken status block link ++ * change bit implementation, so we must use the ++ * status register in those cases. ++ */ ++ if (tg3_asic_rev(tp) == ASIC_REV_5700) ++ tg3_flag_set(tp, USE_LINKCHG_REG); ++ else ++ tg3_flag_clear(tp, USE_LINKCHG_REG); ++ ++ /* The led_ctrl is set during tg3_phy_probe, here we might ++ * have to force the link status polling mechanism based ++ * upon subsystem IDs. ++ */ ++ if (tp->pdev->subsystem_vendor == PCI_VENDOR_ID_DELL && ++ tg3_asic_rev(tp) == ASIC_REV_5701 && ++ !(tp->phy_flags & TG3_PHYFLG_PHY_SERDES)) { ++ tp->phy_flags |= TG3_PHYFLG_USE_MI_INTERRUPT; ++ tg3_flag_set(tp, USE_LINKCHG_REG); ++ } ++ ++ /* For all SERDES we poll the MAC status register. */ ++ if (tp->phy_flags & TG3_PHYFLG_PHY_SERDES) ++ tg3_flag_set(tp, POLL_SERDES); ++ else ++ tg3_flag_clear(tp, POLL_SERDES); ++ ++ if (tg3_flag(tp, ENABLE_APE) && tg3_flag(tp, ENABLE_ASF)) ++ tg3_flag_set(tp, POLL_CPMU_LINK); ++ ++ tp->rx_offset = NET_IP_ALIGN; ++ tp->rx_copy_thresh = TG3_RX_COPY_THRESHOLD; ++ if (tg3_asic_rev(tp) == ASIC_REV_5701 && ++ tg3_flag(tp, PCIX_MODE)) { ++ tp->rx_offset = 0; ++#ifndef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS ++ tp->rx_copy_thresh = ~(u16)0; ++#endif ++ } ++ ++ tp->rx_std_ring_mask = TG3_RX_STD_RING_SIZE(tp) - 1; ++ tp->rx_jmb_ring_mask = TG3_RX_JMB_RING_SIZE(tp) - 1; ++ tp->rx_ret_ring_mask = tg3_rx_ret_ring_size(tp) - 1; ++ ++ tp->rx_std_max_post = tp->rx_std_ring_mask + 1; ++ ++ /* Increment the rx prod index on the rx std ring by at most ++ * 8 for these chips to workaround hw errata. ++ */ ++ if (tg3_asic_rev(tp) == ASIC_REV_5750 || ++ tg3_asic_rev(tp) == ASIC_REV_5752 || ++ tg3_asic_rev(tp) == ASIC_REV_5755) ++ tp->rx_std_max_post = 8; ++ ++ if (tg3_flag(tp, ASPM_WORKAROUND)) ++ tp->pwrmgmt_thresh = tr32(PCIE_PWR_MGMT_THRESH) & ++ PCIE_PWR_MGMT_L1_THRESH_MSK; ++ ++ return err; ++} ++ ++#ifdef CONFIG_SPARC ++static int __devinit tg3_get_macaddr_sparc(struct tg3 *tp) ++{ ++ struct net_device *dev = tp->dev; ++ struct pci_dev *pdev = tp->pdev; ++ struct device_node *dp = pci_device_to_OF_node(pdev); ++ const unsigned char *addr; ++ int len; ++ ++ addr = of_get_property(dp, "local-mac-address", &len); ++ if (addr && len == ETH_ALEN) { ++ memcpy(dev->dev_addr, addr, 6); ++ memcpy(dev->perm_addr, dev->dev_addr, ETH_ALEN); ++ return 0; ++ } ++ return -ENODEV; ++} ++ ++static int __devinit tg3_get_default_macaddr_sparc(struct tg3 *tp) ++{ ++ struct net_device *dev = tp->dev; ++ ++ memcpy(dev->dev_addr, idprom->id_ethaddr, ETH_ALEN); ++ memcpy(dev->perm_addr, idprom->id_ethaddr, ETH_ALEN); ++ return 0; ++} ++#endif ++ ++static int __devinit tg3_get_device_address(struct tg3 *tp) ++{ ++ struct net_device *dev = tp->dev; ++ u32 hi, lo, mac_offset; ++ int addr_ok = 0; ++ int err; ++ ++#ifdef CONFIG_SPARC ++ if (!tg3_get_macaddr_sparc(tp)) ++ return 0; ++#endif ++ ++ if (tg3_flag(tp, IS_SSB_CORE)) { ++ err = ssb_gige_get_macaddr(tp->pdev, &dev->dev_addr[0]); ++ if (!err && is_valid_ether_addr(&dev->dev_addr[0])) ++ return 0; ++ } ++ ++ mac_offset = 0x7c; ++ if (tg3_asic_rev(tp) == ASIC_REV_5704 || ++ tg3_flag(tp, 5780_CLASS)) { ++ if (tr32(TG3PCI_DUAL_MAC_CTRL) & DUAL_MAC_CTRL_ID) ++ mac_offset = 0xcc; ++ if (tg3_nvram_lock(tp)) ++ tw32_f(NVRAM_CMD, NVRAM_CMD_RESET); ++ else ++ tg3_nvram_unlock(tp); ++ } else if (tg3_flag(tp, 5717_PLUS)) { ++ if (tp->pci_fn & 1) ++ mac_offset = 0xcc; ++ if (tp->pci_fn > 1) ++ mac_offset += 0x18c; ++ } else if (tg3_asic_rev(tp) == ASIC_REV_5906) ++ mac_offset = 0x10; ++ ++ /* First try to get it from MAC address mailbox. */ ++ tg3_read_mem(tp, NIC_SRAM_MAC_ADDR_HIGH_MBOX, &hi); ++ if ((hi >> 16) == 0x484b) { ++ dev->dev_addr[0] = (hi >> 8) & 0xff; ++ dev->dev_addr[1] = (hi >> 0) & 0xff; ++ ++ tg3_read_mem(tp, NIC_SRAM_MAC_ADDR_LOW_MBOX, &lo); ++ dev->dev_addr[2] = (lo >> 24) & 0xff; ++ dev->dev_addr[3] = (lo >> 16) & 0xff; ++ dev->dev_addr[4] = (lo >> 8) & 0xff; ++ dev->dev_addr[5] = (lo >> 0) & 0xff; ++ ++ /* Some old bootcode may report a 0 MAC address in SRAM */ ++ addr_ok = is_valid_ether_addr(&dev->dev_addr[0]); ++ } ++ if (!addr_ok) { ++ /* Next, try NVRAM. */ ++ if (!tg3_flag(tp, NO_NVRAM) && ++ !tg3_nvram_read_be32(tp, mac_offset + 0, &hi) && ++ !tg3_nvram_read_be32(tp, mac_offset + 4, &lo)) { ++ memcpy(&dev->dev_addr[0], ((char *)&hi) + 2, 2); ++ memcpy(&dev->dev_addr[2], (char *)&lo, sizeof(lo)); ++ } ++ /* Finally just fetch it out of the MAC control regs. */ ++ else { ++ hi = tr32(MAC_ADDR_0_HIGH); ++ lo = tr32(MAC_ADDR_0_LOW); ++ ++ dev->dev_addr[5] = lo & 0xff; ++ dev->dev_addr[4] = (lo >> 8) & 0xff; ++ dev->dev_addr[3] = (lo >> 16) & 0xff; ++ dev->dev_addr[2] = (lo >> 24) & 0xff; ++ dev->dev_addr[1] = hi & 0xff; ++ dev->dev_addr[0] = (hi >> 8) & 0xff; ++ } ++ } ++ ++ if (!is_valid_ether_addr(&dev->dev_addr[0])) { ++#ifdef CONFIG_SPARC ++ if (!tg3_get_default_macaddr_sparc(tp)) ++ return 0; ++#endif ++ return -EINVAL; ++ } ++#ifdef ETHTOOL_GPERMADDR ++ memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len); ++#endif ++ return 0; ++} ++ ++#define BOUNDARY_SINGLE_CACHELINE 1 ++#define BOUNDARY_MULTI_CACHELINE 2 ++ ++static u32 __devinit tg3_calc_dma_bndry(struct tg3 *tp, u32 val) ++{ ++ int cacheline_size; ++ u8 byte; ++ int goal; ++ ++ pci_read_config_byte(tp->pdev, PCI_CACHE_LINE_SIZE, &byte); ++ if (byte == 0) ++ cacheline_size = 1024; ++ else ++ cacheline_size = (int) byte * 4; ++ ++ /* On 5703 and later chips, the boundary bits have no ++ * effect. ++ */ ++ if (tg3_asic_rev(tp) != ASIC_REV_5700 && ++ tg3_asic_rev(tp) != ASIC_REV_5701 && ++ !tg3_flag(tp, PCI_EXPRESS)) ++ goto out; ++ ++#if defined(CONFIG_PPC64) || defined(CONFIG_IA64) || defined(CONFIG_PARISC) ++ goal = BOUNDARY_MULTI_CACHELINE; ++#else ++#if defined(CONFIG_SPARC64) || defined(CONFIG_ALPHA) ++ goal = BOUNDARY_SINGLE_CACHELINE; ++#else ++ goal = 0; ++#endif ++#endif ++ ++ if (tg3_flag(tp, 57765_PLUS)) { ++ val = goal ? 0 : DMA_RWCTRL_DIS_CACHE_ALIGNMENT; ++ goto out; ++ } ++ ++ if (!goal) ++ goto out; ++ ++ /* PCI controllers on most RISC systems tend to disconnect ++ * when a device tries to burst across a cache-line boundary. ++ * Therefore, letting tg3 do so just wastes PCI bandwidth. ++ * ++ * Unfortunately, for PCI-E there are only limited ++ * write-side controls for this, and thus for reads ++ * we will still get the disconnects. We'll also waste ++ * these PCI cycles for both read and write for chips ++ * other than 5700 and 5701 which do not implement the ++ * boundary bits. ++ */ ++ if (tg3_flag(tp, PCIX_MODE) && !tg3_flag(tp, PCI_EXPRESS)) { ++ switch (cacheline_size) { ++ case 16: ++ case 32: ++ case 64: ++ case 128: ++ if (goal == BOUNDARY_SINGLE_CACHELINE) { ++ val |= (DMA_RWCTRL_READ_BNDRY_128_PCIX | ++ DMA_RWCTRL_WRITE_BNDRY_128_PCIX); ++ } else { ++ val |= (DMA_RWCTRL_READ_BNDRY_384_PCIX | ++ DMA_RWCTRL_WRITE_BNDRY_384_PCIX); ++ } ++ break; ++ ++ case 256: ++ val |= (DMA_RWCTRL_READ_BNDRY_256_PCIX | ++ DMA_RWCTRL_WRITE_BNDRY_256_PCIX); ++ break; ++ ++ default: ++ val |= (DMA_RWCTRL_READ_BNDRY_384_PCIX | ++ DMA_RWCTRL_WRITE_BNDRY_384_PCIX); ++ break; ++ } ++ } else if (tg3_flag(tp, PCI_EXPRESS)) { ++ switch (cacheline_size) { ++ case 16: ++ case 32: ++ case 64: ++ if (goal == BOUNDARY_SINGLE_CACHELINE) { ++ val &= ~DMA_RWCTRL_WRITE_BNDRY_DISAB_PCIE; ++ val |= DMA_RWCTRL_WRITE_BNDRY_64_PCIE; ++ break; ++ } ++ /* fallthrough */ ++ case 128: ++ default: ++ val &= ~DMA_RWCTRL_WRITE_BNDRY_DISAB_PCIE; ++ val |= DMA_RWCTRL_WRITE_BNDRY_128_PCIE; ++ break; ++ } ++ } else { ++ switch (cacheline_size) { ++ case 16: ++ if (goal == BOUNDARY_SINGLE_CACHELINE) { ++ val |= (DMA_RWCTRL_READ_BNDRY_16 | ++ DMA_RWCTRL_WRITE_BNDRY_16); ++ break; ++ } ++ /* fallthrough */ ++ case 32: ++ if (goal == BOUNDARY_SINGLE_CACHELINE) { ++ val |= (DMA_RWCTRL_READ_BNDRY_32 | ++ DMA_RWCTRL_WRITE_BNDRY_32); ++ break; ++ } ++ /* fallthrough */ ++ case 64: ++ if (goal == BOUNDARY_SINGLE_CACHELINE) { ++ val |= (DMA_RWCTRL_READ_BNDRY_64 | ++ DMA_RWCTRL_WRITE_BNDRY_64); ++ break; ++ } ++ /* fallthrough */ ++ case 128: ++ if (goal == BOUNDARY_SINGLE_CACHELINE) { ++ val |= (DMA_RWCTRL_READ_BNDRY_128 | ++ DMA_RWCTRL_WRITE_BNDRY_128); ++ break; ++ } ++ /* fallthrough */ ++ case 256: ++ val |= (DMA_RWCTRL_READ_BNDRY_256 | ++ DMA_RWCTRL_WRITE_BNDRY_256); ++ break; ++ case 512: ++ val |= (DMA_RWCTRL_READ_BNDRY_512 | ++ DMA_RWCTRL_WRITE_BNDRY_512); ++ break; ++ case 1024: ++ default: ++ val |= (DMA_RWCTRL_READ_BNDRY_1024 | ++ DMA_RWCTRL_WRITE_BNDRY_1024); ++ break; ++ } ++ } ++ ++out: ++ return val; ++} ++ ++static int __devinit tg3_do_test_dma(struct tg3 *tp, u32 *buf, dma_addr_t buf_dma, ++ int size, bool to_device) ++{ ++ struct tg3_internal_buffer_desc test_desc; ++ u32 sram_dma_descs; ++ int i, ret; ++ ++ sram_dma_descs = NIC_SRAM_DMA_DESC_POOL_BASE; ++ ++ tw32(FTQ_RCVBD_COMP_FIFO_ENQDEQ, 0); ++ tw32(FTQ_RCVDATA_COMP_FIFO_ENQDEQ, 0); ++ tw32(RDMAC_STATUS, 0); ++ tw32(WDMAC_STATUS, 0); ++ ++ tw32(BUFMGR_MODE, 0); ++ tw32(FTQ_RESET, 0); ++ ++ test_desc.addr_hi = ((u64) buf_dma) >> 32; ++ test_desc.addr_lo = buf_dma & 0xffffffff; ++ test_desc.nic_mbuf = 0x00002100; ++ test_desc.len = size; ++ ++ /* ++ * HP ZX1 was seeing test failures for 5701 cards running at 33Mhz ++ * the *second* time the tg3 driver was getting loaded after an ++ * initial scan. ++ * ++ * Broadcom tells me: ++ * ...the DMA engine is connected to the GRC block and a DMA ++ * reset may affect the GRC block in some unpredictable way... ++ * The behavior of resets to individual blocks has not been tested. ++ * ++ * Broadcom noted the GRC reset will also reset all sub-components. ++ */ ++ if (to_device) { ++ test_desc.cqid_sqid = (13 << 8) | 2; ++ ++ tw32_f(RDMAC_MODE, RDMAC_MODE_ENABLE); ++ udelay(40); ++ } else { ++ test_desc.cqid_sqid = (16 << 8) | 7; ++ ++ tw32_f(WDMAC_MODE, WDMAC_MODE_ENABLE); ++ udelay(40); ++ } ++ test_desc.flags = 0x00000005; ++ ++ for (i = 0; i < (sizeof(test_desc) / sizeof(u32)); i++) { ++ u32 val; ++ ++ val = *(((u32 *)&test_desc) + i); ++ pci_write_config_dword(tp->pdev, TG3PCI_MEM_WIN_BASE_ADDR, ++ sram_dma_descs + (i * sizeof(u32))); ++ pci_write_config_dword(tp->pdev, TG3PCI_MEM_WIN_DATA, val); ++ } ++ pci_write_config_dword(tp->pdev, TG3PCI_MEM_WIN_BASE_ADDR, 0); ++ ++ if (to_device) ++ tw32(FTQ_DMA_HIGH_READ_FIFO_ENQDEQ, sram_dma_descs); ++ else ++ tw32(FTQ_DMA_HIGH_WRITE_FIFO_ENQDEQ, sram_dma_descs); ++ ++ ret = -ENODEV; ++ for (i = 0; i < 40; i++) { ++ u32 val; ++ ++ if (to_device) ++ val = tr32(FTQ_RCVBD_COMP_FIFO_ENQDEQ); ++ else ++ val = tr32(FTQ_RCVDATA_COMP_FIFO_ENQDEQ); ++ if ((val & 0xffff) == sram_dma_descs) { ++ ret = 0; ++ break; ++ } ++ ++ udelay(100); ++ } ++ ++ return ret; ++} ++ ++#define TEST_BUFFER_SIZE 0x2000 ++ ++#if (LINUX_VERSION_CODE >= 0x2060a) ++static DEFINE_PCI_DEVICE_TABLE(tg3_dma_wait_state_chipsets) = { ++ { PCI_DEVICE(PCI_VENDOR_ID_APPLE, PCI_DEVICE_ID_APPLE_UNI_N_PCI15) }, ++ { }, ++}; ++#endif ++ ++static int __devinit tg3_test_dma(struct tg3 *tp) ++{ ++ dma_addr_t buf_dma; ++ u32 *buf, saved_dma_rwctrl; ++ int ret = 0; ++ ++ buf = dma_alloc_coherent(&tp->pdev->dev, TEST_BUFFER_SIZE, ++ &buf_dma, GFP_KERNEL); ++ if (!buf) { ++ ret = -ENOMEM; ++ goto out_nofree; ++ } ++ ++ tp->dma_rwctrl = ((0x7 << DMA_RWCTRL_PCI_WRITE_CMD_SHIFT) | ++ (0x6 << DMA_RWCTRL_PCI_READ_CMD_SHIFT)); ++ ++ tp->dma_rwctrl = tg3_calc_dma_bndry(tp, tp->dma_rwctrl); ++ ++ if (tg3_flag(tp, 57765_PLUS)) ++ goto out; ++ ++ if (tg3_flag(tp, PCI_EXPRESS)) { ++ /* DMA read watermark not used on PCIE */ ++ tp->dma_rwctrl |= 0x00180000; ++ } else if (!tg3_flag(tp, PCIX_MODE)) { ++ if (tg3_asic_rev(tp) == ASIC_REV_5705 || ++ tg3_asic_rev(tp) == ASIC_REV_5750) ++ tp->dma_rwctrl |= 0x003f0000; ++ else ++ tp->dma_rwctrl |= 0x003f000f; ++ } else { ++ if (tg3_asic_rev(tp) == ASIC_REV_5703 || ++ tg3_asic_rev(tp) == ASIC_REV_5704) { ++ u32 ccval = (tr32(TG3PCI_CLOCK_CTRL) & 0x1f); ++ u32 read_water = 0x7; ++ ++ /* If the 5704 is behind the EPB bridge, we can ++ * do the less restrictive ONE_DMA workaround for ++ * better performance. ++ */ ++ if (tg3_flag(tp, 40BIT_DMA_BUG) && ++ tg3_asic_rev(tp) == ASIC_REV_5704) ++ tp->dma_rwctrl |= 0x8000; ++ else if (ccval == 0x6 || ccval == 0x7) ++ tp->dma_rwctrl |= DMA_RWCTRL_ONE_DMA; ++ ++ if (tg3_asic_rev(tp) == ASIC_REV_5703) ++ read_water = 4; ++ /* Set bit 23 to enable PCIX hw bug fix */ ++ tp->dma_rwctrl |= ++ (read_water << DMA_RWCTRL_READ_WATER_SHIFT) | ++ (0x3 << DMA_RWCTRL_WRITE_WATER_SHIFT) | ++ (1 << 23); ++ } else if (tg3_asic_rev(tp) == ASIC_REV_5780) { ++ /* 5780 always in PCIX mode */ ++ tp->dma_rwctrl |= 0x00144000; ++ } else if (tg3_asic_rev(tp) == ASIC_REV_5714) { ++ /* 5714 always in PCIX mode */ ++ tp->dma_rwctrl |= 0x00148000; ++ } else { ++ tp->dma_rwctrl |= 0x001b000f; ++ } ++ } ++ if (tg3_flag(tp, ONE_DMA_AT_ONCE)) ++ tp->dma_rwctrl |= DMA_RWCTRL_ONE_DMA; ++ ++ if (tg3_asic_rev(tp) == ASIC_REV_5703 || ++ tg3_asic_rev(tp) == ASIC_REV_5704) ++ tp->dma_rwctrl &= 0xfffffff0; ++ ++ if (tg3_asic_rev(tp) == ASIC_REV_5700 || ++ tg3_asic_rev(tp) == ASIC_REV_5701) { ++ /* Remove this if it causes problems for some boards. */ ++ tp->dma_rwctrl |= DMA_RWCTRL_USE_MEM_READ_MULT; ++ ++ /* On 5700/5701 chips, we need to set this bit. ++ * Otherwise the chip will issue cacheline transactions ++ * to streamable DMA memory with not all the byte ++ * enables turned on. This is an error on several ++ * RISC PCI controllers, in particular sparc64. ++ * ++ * On 5703/5704 chips, this bit has been reassigned ++ * a different meaning. In particular, it is used ++ * on those chips to enable a PCI-X workaround. ++ */ ++ tp->dma_rwctrl |= DMA_RWCTRL_ASSERT_ALL_BE; ++ } ++ ++ tw32(TG3PCI_DMA_RW_CTRL, tp->dma_rwctrl); ++ ++#if 0 ++ /* Unneeded, already done by tg3_get_invariants. */ ++ tg3_switch_clocks(tp); ++#endif ++ ++ if (tg3_asic_rev(tp) != ASIC_REV_5700 && ++ tg3_asic_rev(tp) != ASIC_REV_5701) ++ goto out; ++ ++ /* It is best to perform DMA test with maximum write burst size ++ * to expose the 5700/5701 write DMA bug. ++ */ ++ saved_dma_rwctrl = tp->dma_rwctrl; ++ tp->dma_rwctrl &= ~DMA_RWCTRL_WRITE_BNDRY_MASK; ++ tw32(TG3PCI_DMA_RW_CTRL, tp->dma_rwctrl); ++ ++ while (1) { ++ u32 *p = buf, i; ++ ++ for (i = 0; i < TEST_BUFFER_SIZE / sizeof(u32); i++) ++ p[i] = i; ++ ++ /* Send the buffer to the chip. */ ++ ret = tg3_do_test_dma(tp, buf, buf_dma, TEST_BUFFER_SIZE, true); ++ if (ret) { ++ dev_err(&tp->pdev->dev, ++ "%s: Buffer write failed. err = %d\n", ++ __func__, ret); ++ break; ++ } ++ ++#if 0 ++ /* validate data reached card RAM correctly. */ ++ for (i = 0; i < TEST_BUFFER_SIZE / sizeof(u32); i++) { ++ u32 val; ++ tg3_read_mem(tp, 0x2100 + (i*4), &val); ++ if (le32_to_cpu(val) != p[i]) { ++ dev_err(&tp->pdev->dev, ++ "%s: Buffer corrupted on device! " ++ "(%d != %d)\n", __func__, val, i); ++ /* ret = -ENODEV here? */ ++ } ++ p[i] = 0; ++ } ++#endif ++ /* Now read it back. */ ++ ret = tg3_do_test_dma(tp, buf, buf_dma, TEST_BUFFER_SIZE, false); ++ if (ret) { ++ dev_err(&tp->pdev->dev, "%s: Buffer read failed. " ++ "err = %d\n", __func__, ret); ++ break; ++ } ++ ++ /* Verify it. */ ++ for (i = 0; i < TEST_BUFFER_SIZE / sizeof(u32); i++) { ++ if (p[i] == i) ++ continue; ++ ++ if ((tp->dma_rwctrl & DMA_RWCTRL_WRITE_BNDRY_MASK) != ++ DMA_RWCTRL_WRITE_BNDRY_16) { ++ tp->dma_rwctrl &= ~DMA_RWCTRL_WRITE_BNDRY_MASK; ++ tp->dma_rwctrl |= DMA_RWCTRL_WRITE_BNDRY_16; ++ tw32(TG3PCI_DMA_RW_CTRL, tp->dma_rwctrl); ++ break; ++ } else { ++ dev_err(&tp->pdev->dev, ++ "%s: Buffer corrupted on read back! " ++ "(%d != %d)\n", __func__, p[i], i); ++ ret = -ENODEV; ++ goto out; ++ } ++ } ++ ++ if (i == (TEST_BUFFER_SIZE / sizeof(u32))) { ++ /* Success. */ ++ ret = 0; ++ break; ++ } ++ } ++ if ((tp->dma_rwctrl & DMA_RWCTRL_WRITE_BNDRY_MASK) != ++ DMA_RWCTRL_WRITE_BNDRY_16) { ++ /* DMA test passed without adjusting DMA boundary, ++ * now look for chipsets that are known to expose the ++ * DMA bug without failing the test. ++ */ ++#if (LINUX_VERSION_CODE < 0x2060a) ++ if (pci_find_device(PCI_VENDOR_ID_APPLE, ++ PCI_DEVICE_ID_APPLE_UNI_N_PCI15, NULL)) ++#else ++ if (pci_dev_present(tg3_dma_wait_state_chipsets)) ++#endif ++ { ++ tp->dma_rwctrl &= ~DMA_RWCTRL_WRITE_BNDRY_MASK; ++ tp->dma_rwctrl |= DMA_RWCTRL_WRITE_BNDRY_16; ++ } else { ++ /* Safe to use the calculated DMA boundary. */ ++ tp->dma_rwctrl = saved_dma_rwctrl; ++ } ++ ++ tw32(TG3PCI_DMA_RW_CTRL, tp->dma_rwctrl); ++ } ++ ++out: ++ dma_free_coherent(&tp->pdev->dev, TEST_BUFFER_SIZE, buf, buf_dma); ++out_nofree: ++ return ret; ++} ++ ++static void __devinit tg3_init_bufmgr_config(struct tg3 *tp) ++{ ++ if (tg3_flag(tp, 57765_PLUS)) { ++ tp->bufmgr_config.mbuf_read_dma_low_water = ++ DEFAULT_MB_RDMA_LOW_WATER_5705; ++ tp->bufmgr_config.mbuf_mac_rx_low_water = ++ DEFAULT_MB_MACRX_LOW_WATER_57765; ++ tp->bufmgr_config.mbuf_high_water = ++ DEFAULT_MB_HIGH_WATER_57765; ++ ++ tp->bufmgr_config.mbuf_read_dma_low_water_jumbo = ++ DEFAULT_MB_RDMA_LOW_WATER_5705; ++ tp->bufmgr_config.mbuf_mac_rx_low_water_jumbo = ++ DEFAULT_MB_MACRX_LOW_WATER_JUMBO_57765; ++ tp->bufmgr_config.mbuf_high_water_jumbo = ++ DEFAULT_MB_HIGH_WATER_JUMBO_57765; ++ } else if (tg3_flag(tp, 5705_PLUS)) { ++ tp->bufmgr_config.mbuf_read_dma_low_water = ++ DEFAULT_MB_RDMA_LOW_WATER_5705; ++ tp->bufmgr_config.mbuf_mac_rx_low_water = ++ DEFAULT_MB_MACRX_LOW_WATER_5705; ++ tp->bufmgr_config.mbuf_high_water = ++ DEFAULT_MB_HIGH_WATER_5705; ++ if (tg3_asic_rev(tp) == ASIC_REV_5906) { ++ tp->bufmgr_config.mbuf_mac_rx_low_water = ++ DEFAULT_MB_MACRX_LOW_WATER_5906; ++ tp->bufmgr_config.mbuf_high_water = ++ DEFAULT_MB_HIGH_WATER_5906; ++ } ++ ++ tp->bufmgr_config.mbuf_read_dma_low_water_jumbo = ++ DEFAULT_MB_RDMA_LOW_WATER_JUMBO_5780; ++ tp->bufmgr_config.mbuf_mac_rx_low_water_jumbo = ++ DEFAULT_MB_MACRX_LOW_WATER_JUMBO_5780; ++ tp->bufmgr_config.mbuf_high_water_jumbo = ++ DEFAULT_MB_HIGH_WATER_JUMBO_5780; ++ } else { ++ tp->bufmgr_config.mbuf_read_dma_low_water = ++ DEFAULT_MB_RDMA_LOW_WATER; ++ tp->bufmgr_config.mbuf_mac_rx_low_water = ++ DEFAULT_MB_MACRX_LOW_WATER; ++ tp->bufmgr_config.mbuf_high_water = ++ DEFAULT_MB_HIGH_WATER; ++ ++ tp->bufmgr_config.mbuf_read_dma_low_water_jumbo = ++ DEFAULT_MB_RDMA_LOW_WATER_JUMBO; ++ tp->bufmgr_config.mbuf_mac_rx_low_water_jumbo = ++ DEFAULT_MB_MACRX_LOW_WATER_JUMBO; ++ tp->bufmgr_config.mbuf_high_water_jumbo = ++ DEFAULT_MB_HIGH_WATER_JUMBO; ++ } ++ ++ tp->bufmgr_config.dma_low_water = DEFAULT_DMA_LOW_WATER; ++ tp->bufmgr_config.dma_high_water = DEFAULT_DMA_HIGH_WATER; ++} ++ ++static char * __devinit tg3_phy_string(struct tg3 *tp) ++{ ++ switch (tp->phy_id & TG3_PHY_ID_MASK) { ++ case TG3_PHY_ID_BCM5400: return "5400"; ++ case TG3_PHY_ID_BCM5401: return "5401"; ++ case TG3_PHY_ID_BCM5411: return "5411"; ++ case TG3_PHY_ID_BCM5701: return "5701"; ++ case TG3_PHY_ID_BCM5703: return "5703"; ++ case TG3_PHY_ID_BCM5704: return "5704"; ++ case TG3_PHY_ID_BCM5705: return "5705"; ++ case TG3_PHY_ID_BCM5750: return "5750"; ++ case TG3_PHY_ID_BCM5752: return "5752"; ++ case TG3_PHY_ID_BCM5714: return "5714"; ++ case TG3_PHY_ID_BCM5780: return "5780"; ++ case TG3_PHY_ID_BCM5755: return "5755"; ++ case TG3_PHY_ID_BCM5787: return "5787"; ++ case TG3_PHY_ID_BCM5784: return "5784"; ++ case TG3_PHY_ID_BCM5756: return "5722/5756"; ++ case TG3_PHY_ID_BCM5906: return "5906"; ++ case TG3_PHY_ID_BCM5761: return "5761"; ++#ifndef BCM_INCLUDE_PHYLIB_SUPPORT ++ case TG3_PHY_ID_BCM50610: return "50610"; ++ case TG3_PHY_ID_BCM50610M: return "50610M"; ++ case TG3_PHY_ID_BCM50612E: return "50612E"; ++ case TG3_PHY_ID_BCMAC131: return "AC131"; ++ case TG3_PHY_ID_BCM57780: return "57780"; ++#endif ++ case TG3_PHY_ID_BCM5718C: return "5718C"; ++ case TG3_PHY_ID_BCM5718S: return "5718S"; ++ case TG3_PHY_ID_BCM57765: return "57765"; ++ case TG3_PHY_ID_BCM5719C: return "5719C"; ++ case TG3_PHY_ID_BCM5720C: return "5720C"; ++ case TG3_PHY_ID_BCM5762: return "5762C"; ++ case TG3_PHY_ID_BCM8002: return "8002/serdes"; ++ case 0: return "serdes"; ++ default: return "unknown"; ++ } ++} ++ ++static char * __devinit tg3_bus_string(struct tg3 *tp, char *str) ++{ ++ if (tg3_flag(tp, PCI_EXPRESS)) { ++ strcpy(str, "PCI Express"); ++ return str; ++ } else if (tg3_flag(tp, PCIX_MODE)) { ++ u32 clock_ctrl = tr32(TG3PCI_CLOCK_CTRL) & 0x1f; ++ ++ strcpy(str, "PCIX:"); ++ ++ if ((clock_ctrl == 7) || ++ ((tr32(GRC_MISC_CFG) & GRC_MISC_CFG_BOARD_ID_MASK) == ++ GRC_MISC_CFG_BOARD_ID_5704CIOBE)) ++ strcat(str, "133MHz"); ++ else if (clock_ctrl == 0) ++ strcat(str, "33MHz"); ++ else if (clock_ctrl == 2) ++ strcat(str, "50MHz"); ++ else if (clock_ctrl == 4) ++ strcat(str, "66MHz"); ++ else if (clock_ctrl == 6) ++ strcat(str, "100MHz"); ++ } else { ++ strcpy(str, "PCI:"); ++ if (tg3_flag(tp, PCI_HIGH_SPEED)) ++ strcat(str, "66MHz"); ++ else ++ strcat(str, "33MHz"); ++ } ++ if (tg3_flag(tp, PCI_32BIT)) ++ strcat(str, ":32-bit"); ++ else ++ strcat(str, ":64-bit"); ++ return str; ++} ++ ++static void __devinit tg3_init_coal(struct tg3 *tp) ++{ ++ struct ethtool_coalesce *ec = &tp->coal; ++ ++ memset(ec, 0, sizeof(*ec)); ++ ec->cmd = ETHTOOL_GCOALESCE; ++ ec->rx_coalesce_usecs = LOW_RXCOL_TICKS; ++ ec->tx_coalesce_usecs = LOW_TXCOL_TICKS; ++ ec->rx_max_coalesced_frames = LOW_RXMAX_FRAMES; ++ ec->tx_max_coalesced_frames = LOW_TXMAX_FRAMES; ++ ec->rx_coalesce_usecs_irq = DEFAULT_RXCOAL_TICK_INT; ++ ec->tx_coalesce_usecs_irq = DEFAULT_TXCOAL_TICK_INT; ++ ec->rx_max_coalesced_frames_irq = DEFAULT_RXCOAL_MAXF_INT; ++ ec->tx_max_coalesced_frames_irq = DEFAULT_TXCOAL_MAXF_INT; ++ ec->stats_block_coalesce_usecs = DEFAULT_STAT_COAL_TICKS; ++ ++ if (tp->coalesce_mode & (HOSTCC_MODE_CLRTICK_RXBD | ++ HOSTCC_MODE_CLRTICK_TXBD)) { ++ ec->rx_coalesce_usecs = LOW_RXCOL_TICKS_CLRTCKS; ++ ec->rx_coalesce_usecs_irq = DEFAULT_RXCOAL_TICK_INT_CLRTCKS; ++ ec->tx_coalesce_usecs = LOW_TXCOL_TICKS_CLRTCKS; ++ ec->tx_coalesce_usecs_irq = DEFAULT_TXCOAL_TICK_INT_CLRTCKS; ++ } ++ ++ if (tg3_flag(tp, 5705_PLUS)) { ++ ec->rx_coalesce_usecs_irq = 0; ++ ec->tx_coalesce_usecs_irq = 0; ++ ec->stats_block_coalesce_usecs = 0; ++ } ++} ++ ++static int __devinit tg3_init_one(struct pci_dev *pdev, ++ const struct pci_device_id *ent) ++{ ++ struct net_device *dev; ++ struct tg3 *tp; ++ int i, err, pm_cap; ++ u32 sndmbx, rcvmbx, intmbx; ++ char str[40]; ++ u64 dma_mask, persist_dma_mask; ++ DECLARE_MAC_BUF(mac); ++ netdev_features_t features = 0; ++ ++ printk_once(KERN_INFO "%s\n", version); ++ ++ err = pci_enable_device(pdev); ++ if (err) { ++ dev_err(&pdev->dev, "Cannot enable PCI device, aborting\n"); ++ return err; ++ } ++ ++ err = pci_request_regions(pdev, DRV_MODULE_NAME); ++ if (err) { ++ dev_err(&pdev->dev, "Cannot obtain PCI resources, aborting\n"); ++ goto err_out_disable_pdev; ++ } ++ ++ pci_set_master(pdev); ++ ++ /* Find power-management capability. */ ++ pm_cap = pci_find_capability(pdev, PCI_CAP_ID_PM); ++ if (pm_cap == 0) { ++ dev_err(&pdev->dev, ++ "Cannot find Power Management capability, aborting\n"); ++ err = -EIO; ++ goto err_out_free_res; ++ } ++ ++ err = pci_set_power_state(pdev, PCI_D0); ++ if (err) { ++ dev_err(&pdev->dev, "Transition to D0 failed, aborting\n"); ++ goto err_out_free_res; ++ } ++ ++ dev = alloc_etherdev_mq(sizeof(*tp), TG3_IRQ_MAX_VECS); ++ if (!dev) { ++ dev_err(&pdev->dev, "Etherdev alloc failed, aborting\n"); ++ err = -ENOMEM; ++ goto err_out_power_down; ++ } ++ ++ SET_MODULE_OWNER(dev); ++#if (LINUX_VERSION_CODE >= 0x20419) ++ SET_NETDEV_DEV(dev, &pdev->dev); ++#endif ++ ++ pci_set_drvdata(pdev, dev); ++ ++ tp = netdev_priv(dev); ++ tp->pdev = pdev; ++ tp->dev = dev; ++ tp->pm_cap = pm_cap; ++ tp->rx_mode = TG3_DEF_RX_MODE; ++ tp->tx_mode = TG3_DEF_TX_MODE; ++ tp->irq_sync = 1; ++ ++ if (tg3_debug > 0) ++ tp->msg_enable = tg3_debug; ++ else ++ tp->msg_enable = TG3_DEF_MSG_ENABLE; ++ ++ if (pdev_is_ssb_gige_core(pdev)) { ++ tg3_flag_set(tp, IS_SSB_CORE); ++ if (ssb_gige_must_flush_posted_writes(pdev)) ++ tg3_flag_set(tp, FLUSH_POSTED_WRITES); ++ if (ssb_gige_one_dma_at_once(pdev)) ++ tg3_flag_set(tp, ONE_DMA_AT_ONCE); ++ if (ssb_gige_have_roboswitch(pdev)) { ++ tg3_flag_set(tp, USE_PHYLIB); ++ tg3_flag_set(tp, ROBOSWITCH); ++ } ++ if (ssb_gige_is_rgmii(pdev)) ++ tg3_flag_set(tp, RGMII_MODE); ++ } ++ ++ /* The word/byte swap controls here control register access byte ++ * swapping. DMA data byte swapping is controlled in the GRC_MODE ++ * setting below. ++ */ ++ tp->misc_host_ctrl = ++ MISC_HOST_CTRL_MASK_PCI_INT | ++ MISC_HOST_CTRL_WORD_SWAP | ++ MISC_HOST_CTRL_INDIR_ACCESS | ++ MISC_HOST_CTRL_PCISTATE_RW; ++ ++ /* The NONFRM (non-frame) byte/word swap controls take effect ++ * on descriptor entries, anything which isn't packet data. ++ * ++ * The StrongARM chips on the board (one for tx, one for rx) ++ * are running in big-endian mode. ++ */ ++ tp->grc_mode = (GRC_MODE_WSWAP_DATA | GRC_MODE_BSWAP_DATA | ++ GRC_MODE_WSWAP_NONFRM_DATA); ++#ifdef __BIG_ENDIAN ++ tp->grc_mode |= GRC_MODE_BSWAP_NONFRM_DATA; ++#endif ++ spin_lock_init(&tp->lock); ++ spin_lock_init(&tp->indirect_lock); ++#ifdef BCM_HAS_NEW_INIT_WORK ++ INIT_WORK(&tp->reset_task, tg3_reset_task); ++#else ++ INIT_WORK(&tp->reset_task, tg3_reset_task, tp); ++#endif ++ ++ tp->regs = pci_ioremap_bar(pdev, BAR_0); ++ if (!tp->regs) { ++ dev_err(&pdev->dev, "Cannot map device registers, aborting\n"); ++ err = -ENOMEM; ++ goto err_out_free_dev; ++ } ++ ++ if (tp->pdev->device == PCI_DEVICE_ID_TIGON3_5761 || ++ tp->pdev->device == PCI_DEVICE_ID_TIGON3_5761E || ++ tp->pdev->device == TG3PCI_DEVICE_TIGON3_5761S || ++ tp->pdev->device == TG3PCI_DEVICE_TIGON3_5761SE || ++ tp->pdev->device == TG3PCI_DEVICE_TIGON3_5717 || ++ tp->pdev->device == TG3PCI_DEVICE_TIGON3_5717_C || ++ tp->pdev->device == TG3PCI_DEVICE_TIGON3_5718 || ++ tp->pdev->device == TG3PCI_DEVICE_TIGON3_5719 || ++ tp->pdev->device == TG3PCI_DEVICE_TIGON3_5720 || ++ tp->pdev->device == TG3PCI_DEVICE_TIGON3_57767 || ++ tp->pdev->device == TG3PCI_DEVICE_TIGON3_57764 || ++ tp->pdev->device == TG3PCI_DEVICE_TIGON3_5762 || ++ tp->pdev->device == TG3PCI_DEVICE_TIGON3_5725 || ++ tp->pdev->device == TG3PCI_DEVICE_TIGON3_5727 || ++ tp->pdev->device == TG3PCI_DEVICE_TIGON3_57787) { ++ tg3_flag_set(tp, ENABLE_APE); ++ tp->aperegs = pci_ioremap_bar(pdev, BAR_2); ++ if (!tp->aperegs) { ++ dev_err(&pdev->dev, ++ "Cannot map APE registers, aborting\n"); ++ err = -ENOMEM; ++ goto err_out_iounmap; ++ } ++ } ++ ++ tp->rx_pending = TG3_DEF_RX_RING_PENDING; ++ tp->rx_jumbo_pending = TG3_DEF_RX_JUMBO_RING_PENDING; ++ ++ dev->ethtool_ops = &tg3_ethtool_ops; ++#ifdef GET_ETHTOOL_OP_EXT ++ set_ethtool_ops_ext(dev, &tg3_ethtool_ops_ext); ++#endif ++ ++#ifdef GET_NETDEV_OP_EXT ++ set_netdev_ops_ext(dev, &tg3_net_device_ops_ext); ++#endif ++ ++ dev->watchdog_timeo = TG3_TX_TIMEOUT; ++ dev->irq = pdev->irq; ++ ++ err = tg3_get_invariants(tp, ent); ++ if (err) { ++ dev_err(&pdev->dev, ++ "Problem fetching invariants of chip, aborting\n"); ++ goto err_out_apeunmap; ++ } ++ ++#ifdef BCM_HAS_NET_DEVICE_OPS ++ dev->netdev_ops = &tg3_netdev_ops; ++#else ++ dev->open = tg3_open; ++ dev->stop = tg3_close; ++ dev->get_stats = tg3_get_stats; ++ dev->set_multicast_list = tg3_set_rx_mode; ++ dev->set_mac_address = tg3_set_mac_addr; ++ dev->do_ioctl = tg3_ioctl; ++ dev->tx_timeout = tg3_tx_timeout; ++ dev->change_mtu = tg3_change_mtu; ++#ifndef BCM_HAS_NEW_VLAN_INTERFACE ++ dev->vlan_rx_register = tg3_vlan_rx_register; ++ dev->vlan_rx_kill_vid = tg3_vlan_rx_kill_vid; ++#endif ++#ifdef CONFIG_NET_POLL_CONTROLLER ++ dev->poll_controller = tg3_poll_controller; ++#endif ++ ++ tp->dev->hard_start_xmit = tg3_start_xmit; ++#endif ++ ++ /* The EPB bridge inside 5714, 5715, and 5780 and any ++ * device behind the EPB cannot support DMA addresses > 40-bit. ++ * On 64-bit systems with IOMMU, use 40-bit dma_mask. ++ * On 64-bit systems without IOMMU, use 64-bit dma_mask and ++ * do DMA address check in tg3_start_xmit(). ++ */ ++ if (tg3_flag(tp, IS_5788)) ++ persist_dma_mask = dma_mask = DMA_BIT_MASK(32); ++ else if (tg3_flag(tp, 40BIT_DMA_BUG)) { ++ persist_dma_mask = dma_mask = DMA_BIT_MASK(40); ++#ifdef CONFIG_HIGHMEM ++ dma_mask = DMA_BIT_MASK(64); ++#endif ++ } else ++ persist_dma_mask = dma_mask = DMA_BIT_MASK(64); ++ ++ /* Configure DMA attributes. */ ++ if (dma_mask > DMA_BIT_MASK(32)) { ++ err = pci_set_dma_mask(pdev, dma_mask); ++ if (!err) { ++ features |= NETIF_F_HIGHDMA; ++ err = pci_set_consistent_dma_mask(pdev, ++ persist_dma_mask); ++ if (err < 0) { ++ dev_err(&pdev->dev, "Unable to obtain " ++ "DMA for consistent allocations\n"); ++ goto err_out_apeunmap; ++ } ++ } ++ } ++ if (err || dma_mask == DMA_BIT_MASK(32)) { ++ err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); ++ if (err) { ++ dev_err(&pdev->dev, ++ "No usable DMA configuration, aborting\n"); ++ goto err_out_apeunmap; ++ } ++ } ++ ++ tg3_init_bufmgr_config(tp); ++ ++ /* 5700 B0 chips do not support checksumming correctly due ++ * to hardware bugs. ++ */ ++ if (tg3_chip_rev_id(tp) != CHIPREV_ID_5700_B0) { ++ features |= NETIF_F_SG | NETIF_F_GRO | NETIF_F_RXCSUM; ++ ++#ifndef BCM_NO_IPV6_CSUM ++ features |= NETIF_F_IP_CSUM; ++ if (tg3_flag(tp, 5755_PLUS)) ++ features |= NETIF_F_IPV6_CSUM; ++#else ++ if (tg3_flag(tp, 5755_PLUS)) ++ features |= NETIF_F_HW_CSUM; ++ else ++ features |= NETIF_F_IP_CSUM; ++#endif ++ } ++ ++#if TG3_TSO_SUPPORT != 0 ++ /* TSO is on by default on chips that support hardware TSO. ++ * Firmware TSO on older chips gives lower performance, so it ++ * is off by default, but can be enabled using ethtool. ++ */ ++ if ((tg3_flag(tp, HW_TSO_1) || ++ tg3_flag(tp, HW_TSO_2) || ++ tg3_flag(tp, HW_TSO_3)) && ++ (features & (NETIF_F_IP_CSUM | NETIF_F_HW_CSUM))) ++ features |= NETIF_F_TSO; ++ if (tg3_flag(tp, HW_TSO_2) || tg3_flag(tp, HW_TSO_3)) { ++ if (features & NETIF_F_IPV6_CSUM) ++ features |= NETIF_F_TSO6; ++ if (tg3_flag(tp, HW_TSO_3) || ++ tg3_asic_rev(tp) == ASIC_REV_5761 || ++ (tg3_asic_rev(tp) == ASIC_REV_5784 && ++ tg3_chip_rev(tp) != CHIPREV_5784_AX) || ++ tg3_asic_rev(tp) == ASIC_REV_5785 || ++ tg3_asic_rev(tp) == ASIC_REV_57780) ++ features |= NETIF_F_TSO_ECN; ++ } ++ ++#if defined(__VMKLNX__) ++ features = tg3_vmware_tune_tso(tp, features); ++#endif /* __VMKLNX__ */ ++#endif /* TG3_TSO_SUPPORT != 0 */ ++ ++ dev->features |= features | NETIF_F_HW_VLAN_CTAG_TX | ++ NETIF_F_HW_VLAN_CTAG_RX; ++ dev->vlan_features |= features; ++ ++#ifdef BCM_HAS_FIX_FEATURES ++ /* ++ * Add loopback capability only for a subset of devices that support ++ * MAC-LOOPBACK. Eventually this need to be enhanced to allow INT-PHY ++ * loopback for the remaining devices. ++ */ ++ if (tg3_asic_rev(tp) != ASIC_REV_5780 && ++ !tg3_flag(tp, CPMU_PRESENT)) ++ /* Add the loopback capability */ ++ features |= NETIF_F_LOOPBACK; ++#endif ++ ++#if defined(GET_NETDEV_OP_EXT) ++ set_netdev_hw_features(dev, get_netdev_hw_features(dev) | features); ++#else ++ dev->hw_features |= features; ++#endif ++ ++#ifdef IFF_UNICAST_FLT ++ dev->priv_flags |= IFF_UNICAST_FLT; ++#endif ++ ++ if (tg3_chip_rev_id(tp) == CHIPREV_ID_5705_A1 && ++ !tg3_flag(tp, TSO_CAPABLE) && ++ !(tr32(TG3PCI_PCISTATE) & PCISTATE_BUS_SPEED_HIGH)) { ++ tg3_flag_set(tp, MAX_RXPEND_64); ++ tp->rx_pending = 63; ++ } ++ ++ err = tg3_get_device_address(tp); ++ if (err) { ++ dev_err(&pdev->dev, ++ "Could not obtain valid ethernet address, aborting\n"); ++ goto err_out_apeunmap; ++ } ++ ++ intmbx = MAILBOX_INTERRUPT_0 + TG3_64BIT_REG_LOW; ++ rcvmbx = MAILBOX_RCVRET_CON_IDX_0 + TG3_64BIT_REG_LOW; ++ sndmbx = MAILBOX_SNDHOST_PROD_IDX_0 + TG3_64BIT_REG_LOW; ++ for (i = 0; i < tp->irq_max; i++) { ++ struct tg3_napi *tnapi = &tp->napi[i]; ++ ++ tnapi->tp = tp; ++ tnapi->tx_pending = TG3_DEF_TX_RING_PENDING; ++ ++ tnapi->int_mbox = intmbx; ++ if (i <= 4) ++ intmbx += 0x8; ++ else { ++ if (intmbx & 0x4) ++ intmbx -= 0x4; ++ else ++ intmbx += 0xc; ++ } ++ ++ tnapi->consmbox = rcvmbx; ++ tnapi->prodmbox = sndmbx; ++ ++#ifdef TG3_VMWARE_NETQ_ENABLE ++ tg3_setup_prod_mboxes(tp, i); ++#endif ++ ++ if (i) ++ tnapi->coal_now = HOSTCC_MODE_COAL_VEC1_NOW << (i - 1); ++ else ++ tnapi->coal_now = HOSTCC_MODE_NOW; ++ ++ if (!tg3_flag(tp, SUPPORT_MSIX)) ++ break; ++ ++#ifdef TG3_VMWARE_NETQ_ENABLE ++ /* ++ * If we support NETQ, the first interrupt vector is the default ++ * rx queue. The first four queues follow the legacy RSS mailbox ++ * enumeration scheme. Then, the enumerations follow the quirky ++ * new way. ++ */ ++ if(tg3_flag(tp, IOV_CAPABLE)) { ++ if (i > 3) { ++ if (rcvmbx & 0x4) ++ rcvmbx -= 0x4; ++ else ++ rcvmbx += 0xc; ++ } else ++ rcvmbx += 0x8; ++ } ++ ++ if (!i) ++ continue; ++ ++ if (!tg3_flag(tp, IOV_CAPABLE)) ++ rcvmbx += 0x8; ++#else ++ /* ++ * If we support MSIX, we'll be using RSS. If we're using ++ * RSS, the first vector only handles link interrupts and the ++ * remaining vectors handle rx and tx interrupts. Reuse the ++ * mailbox values for the next iteration. The values we setup ++ * above are still useful for the single vectored mode. ++ */ ++ if (!i) ++ continue; ++ ++ rcvmbx += 0x8; ++#endif ++ ++ if (sndmbx & 0x4) ++ sndmbx -= 0x4; ++ else ++ sndmbx += 0xc; ++ } ++ ++ /* ++ * Reset chip in case UNDI or EFI driver did not shutdown ++ * DMA self test will enable WDMAC and we'll see (spurious) ++ * pending DMA on the PCI bus at that point. ++ */ ++ if ((tr32(HOSTCC_MODE) & HOSTCC_MODE_ENABLE) || ++ (tr32(WDMAC_MODE) & WDMAC_MODE_ENABLE)) { ++ tw32(MEMARB_MODE, MEMARB_MODE_ENABLE); ++ tg3_halt(tp, RESET_KIND_SHUTDOWN, 1); ++ } ++ ++ err = tg3_test_dma(tp); ++ if (err) { ++ dev_err(&pdev->dev, "DMA engine test failed, aborting\n"); ++ goto err_out_apeunmap; ++ } ++ ++ tg3_init_coal(tp); ++ ++ if (tg3_asic_rev(tp) == ASIC_REV_5719 || ++ (tg3_asic_rev(tp) == ASIC_REV_5720 && ++ tp->pdev->device != TG3PCI_DEVICE_TIGON3_5717_C) || ++ tg3_asic_rev(tp) != ASIC_REV_5762) ++ tg3_flag_set(tp, PTP_CAPABLE); ++ ++#ifdef TG3_VMWARE_NETQ_ENABLE ++ if (tg3_flag(tp, IOV_CAPABLE)) ++ tg3_netq_init(tp); ++#endif ++ ++ tg3_timer_init(tp); ++ ++ err = register_netdev(dev); ++ if (err) { ++ dev_err(&pdev->dev, "Cannot register net device, aborting\n"); ++ goto err_out_apeunmap; ++ } ++ ++ netdev_info(dev, "Tigon3 [partno(%s) rev %04x] (%s) MAC address %s\n", ++ tp->board_part_number, ++ tg3_chip_rev_id(tp), ++ tg3_bus_string(tp, str), ++ print_mac(mac, dev->dev_addr)); ++ ++#ifdef BCM_INCLUDE_PHYLIB_SUPPORT ++ if (tp->phy_flags & TG3_PHYFLG_IS_CONNECTED) { ++ struct phy_device *phydev; ++ phydev = tp->mdio_bus->phy_map[tp->phy_addr]; ++ netdev_info(dev, ++ "attached PHY driver [%s] (mii_bus:phy_addr=%s)\n", ++ phydev->drv->name, dev_name(&phydev->dev)); ++ } else ++#endif ++ { ++ char *ethtype; ++ ++ if (tp->phy_flags & TG3_PHYFLG_10_100_ONLY) ++ ethtype = "10/100Base-TX"; ++ else if (tp->phy_flags & TG3_PHYFLG_ANY_SERDES) ++ ethtype = "1000Base-SX"; ++ else ++ ethtype = "10/100/1000Base-T"; ++ ++ netdev_info(dev, "attached PHY is %s (%s Ethernet) " ++ "(WireSpeed[%d], EEE[%d])\n", ++ tg3_phy_string(tp), ethtype, ++ (tp->phy_flags & TG3_PHYFLG_NO_ETH_WIRE_SPEED) == 0, ++ (tp->phy_flags & TG3_PHYFLG_EEE_CAP) != 0); ++ } ++ ++ netdev_info(dev, "RXcsums[%d] LinkChgREG[%d] MIirq[%d] ASF[%d] TSOcap[%d]\n", ++ (dev->features & NETIF_F_RXCSUM) != 0, ++ tg3_flag(tp, USE_LINKCHG_REG) != 0, ++ (tp->phy_flags & TG3_PHYFLG_USE_MI_INTERRUPT) != 0, ++ tg3_flag(tp, ENABLE_ASF) != 0, ++ tg3_flag(tp, TSO_CAPABLE) != 0); ++ netdev_info(dev, "dma_rwctrl[%08x] dma_mask[%d-bit]\n", ++ tp->dma_rwctrl, ++ pdev->dma_mask == DMA_BIT_MASK(32) ? 32 : ++ ((u64)pdev->dma_mask) == DMA_BIT_MASK(40) ? 40 : 64); ++ ++#if defined(__VMKLNX__) ++ netdev_info(dev, "Jumbo Frames capable[%d]\n", ++ tg3_flag(tp, JUMBO_CAPABLE) != 0); ++#ifdef TG3_VMWARE_NETQ_ENABLE ++ if(tg3_flag(tp, IOV_CAPABLE)) ++ netdev_info(dev, "NetQueue module parameter index [%d]\n", ++ tp->vmware.netq.index); ++#endif ++#endif ++ ++#ifdef BCM_HAS_PCI_EEH_SUPPORT ++ pci_save_state(pdev); ++#endif ++ ++ ++#if defined(__VMKLNX__) && (VMWARE_ESX_DDK_VERSION >= 55000) ++ if (!disable_fw_dmp) { ++ static int nic_idx; ++ ++ /* sanity check the force_netq parameter */ ++ if (nic_idx >= TG3_MAX_NIC) { ++ dev_err(&pdev->dev, ++ "Invalid number of dev(%d)\n", ++ nic_idx); ++ return -EINVAL; ++ } ++ tp->nic_idx = nic_idx; ++ /* allow fw dmp for newer chip only */ ++ if (tg3_asic_rev(tp) > ASIC_REV_5906) ++ fwdmp_tp_ptr[tp->nic_idx] = tp; ++ else ++ netdev_info(dev, "No FW dump support in legacy chip\n" ++ ); ++ nic_idx++; ++ } ++#endif /*defined(__VMKLNX__) && (VMWARE_ESX_DDK_VERSION >= 55000) */ ++ return 0; ++ ++err_out_apeunmap: ++ if (tp->aperegs) { ++ iounmap(tp->aperegs); ++ tp->aperegs = NULL; ++ } ++ ++err_out_iounmap: ++ if (tp->regs) { ++ iounmap(tp->regs); ++ tp->regs = NULL; ++ } ++ ++err_out_free_dev: ++#if (LINUX_VERSION_CODE >= 0x20418) ++ free_netdev(dev); ++#else ++ kfree(dev); ++#endif ++ ++err_out_power_down: ++ pci_set_power_state(pdev, PCI_D3hot); ++ ++err_out_free_res: ++ pci_release_regions(pdev); ++ ++err_out_disable_pdev: ++ if (pci_is_enabled(pdev)) ++ pci_disable_device(pdev); ++ pci_set_drvdata(pdev, NULL); ++ return err; ++} ++ ++static void __devexit tg3_remove_one(struct pci_dev *pdev) ++{ ++ struct net_device *dev = pci_get_drvdata(pdev); ++ ++ if (dev) { ++ struct tg3 *tp = netdev_priv(dev); ++ ++ if (tp->fw) ++ tg3_priv_release_firmware(tp->fw); ++ ++ tg3_reset_task_cancel(tp); ++ ++ if (tg3_flag(tp, USE_PHYLIB)) { ++ tg3_phy_fini(tp); ++ tg3_mdio_fini(tp); ++ } ++ ++ unregister_netdev(dev); ++ ++ if (tp->aperegs) { ++ iounmap(tp->aperegs); ++ tp->aperegs = NULL; ++ } ++ if (tp->regs) { ++ iounmap(tp->regs); ++ tp->regs = NULL; ++ } ++#if (LINUX_VERSION_CODE >= 0x20418) ++ free_netdev(dev); ++#else ++ kfree(dev); ++#endif ++ pci_release_regions(pdev); ++ pci_disable_device(pdev); ++ pci_set_drvdata(pdev, NULL); ++ } ++} ++ ++#undef SIMPLE_DEV_PM_OPS ++#ifdef SIMPLE_DEV_PM_OPS ++static int tg3_suspend(struct device *device) ++#else ++static int tg3_suspend(struct pci_dev *pdev, pm_message_t state) ++#endif ++{ ++#ifdef SIMPLE_DEV_PM_OPS ++ struct pci_dev *pdev = to_pci_dev(device); ++#endif ++ struct net_device *dev = pci_get_drvdata(pdev); ++ struct tg3 *tp = netdev_priv(dev); ++ int err = 0; ++ ++ if (tg3_invalid_pci_state(tp, state)) ++ return -EINVAL; ++ ++ tg3_pci_save_state(tp); ++ ++ rtnl_lock(); ++ ++ if (!netif_running(dev)) ++ goto power_down; ++ ++ tg3_reset_task_cancel(tp); ++ tg3_phy_stop(tp); ++ tg3_netif_stop(tp); ++ ++ tg3_timer_stop(tp); ++ ++ tg3_full_lock(tp, 1); ++ tg3_disable_ints(tp); ++ tg3_full_unlock(tp); ++ ++ netif_device_detach(dev); ++ ++ tg3_full_lock(tp, 0); ++ tg3_halt(tp, RESET_KIND_SHUTDOWN, 1); ++ tg3_flag_clear(tp, INIT_COMPLETE); ++ tg3_full_unlock(tp); ++ ++ err = tg3_power_down_prepare(tp); ++ if (err) { ++ int err2; ++ ++ tg3_full_lock(tp, 0); ++ ++ tg3_flag_set(tp, INIT_COMPLETE); ++ err2 = tg3_restart_hw(tp, true); ++ if (err2) ++ goto out; ++ ++ tg3_timer_start(tp); ++ ++ netif_device_attach(dev); ++ tg3_netif_start(tp); ++ ++out: ++ tg3_full_unlock(tp); ++ ++ if (!err2) ++ tg3_phy_start(tp); ++ } ++ ++power_down: ++#ifndef SIMPLE_DEV_PM_OPS ++ if (!err) ++ tg3_power_down(tp); ++#endif ++ ++ rtnl_unlock(); ++ return err; ++} ++ ++#ifdef SIMPLE_DEV_PM_OPS ++static int tg3_resume(struct device *device) ++#else ++static int tg3_resume(struct pci_dev *pdev) ++#endif ++{ ++#ifdef SIMPLE_DEV_PM_OPS ++ struct pci_dev *pdev = to_pci_dev(device); ++#endif ++ struct net_device *dev = pci_get_drvdata(pdev); ++ struct tg3 *tp = netdev_priv(dev); ++ int err = 0; ++ ++ tg3_pci_restore_state(tp); ++ ++ rtnl_lock(); ++ ++ if (!netif_running(dev)) ++ goto unlock; ++ ++ err = tg3_power_up(tp); ++ if (err) ++ goto unlock; ++ ++ tg3_5780_class_intx_workaround(tp); ++ ++ netif_device_attach(dev); ++ ++ tg3_ape_driver_state_change(tp, RESET_KIND_INIT); ++ tg3_full_lock(tp, 0); ++ ++ tg3_flag_set(tp, INIT_COMPLETE); ++ err = tg3_restart_hw(tp, ++ !(tp->phy_flags & TG3_PHYFLG_KEEP_LINK_ON_PWRDN)); ++ if (err) ++ goto out; ++ ++ tg3_timer_start(tp); ++ ++ tg3_netif_start(tp); ++ ++out: ++ tg3_full_unlock(tp); ++ ++ if (!err) ++ tg3_phy_start(tp); ++ ++unlock: ++ rtnl_unlock(); ++ return err; ++} ++#ifdef BCM_HAS_PCI_PMOPS_SHUTDOWN ++#ifdef SIMPLE_DEV_PM_OPS ++static void tg3_shutdown(struct device *device) ++#else ++static void tg3_shutdown(struct pci_dev *pdev) ++#endif ++{ ++#ifdef SIMPLE_DEV_PM_OPS ++ struct pci_dev *pdev = to_pci_dev(device); ++#endif ++ struct net_device *dev = pci_get_drvdata(pdev); ++ struct tg3 *tp = netdev_priv(dev); ++ ++ rtnl_lock(); ++ netif_device_detach(dev); ++ ++ if (netif_running(dev)) ++#ifdef __VMKLNX__ /* ! BNX2X_UPSTREAM */ ++ if (dev->flags & IFF_UP) ++#endif ++ dev_close(dev); ++ ++ if (system_state == SYSTEM_POWER_OFF) ++ tg3_power_down(tp); ++ ++ rtnl_unlock(); ++} ++#endif /*BCM_HAS_PCI_PMOPS_SHUTDOWN*/ ++ ++#ifdef SIMPLE_DEV_PM_OPS ++#ifdef CONFIG_PM_SLEEP ++static SIMPLE_DEV_PM_OPS(tg3_pm_ops, tg3_suspend, tg3_resume); ++#define TG3_PM_OPS (&tg3_pm_ops) ++ ++#else ++ ++#define TG3_PM_OPS NULL ++ ++#endif /* CONFIG_PM_SLEEP */ ++#endif ++ ++#ifdef BCM_HAS_PCI_EEH_SUPPORT ++/** ++ * tg3_io_error_detected - called when PCI error is detected ++ * @pdev: Pointer to PCI device ++ * @state: The current pci connection state ++ * ++ * This function is called after a PCI bus error affecting ++ * this device has been detected. ++ */ ++static pci_ers_result_t tg3_io_error_detected(struct pci_dev *pdev, ++ pci_channel_state_t state) ++{ ++ struct net_device *netdev = pci_get_drvdata(pdev); ++ struct tg3 *tp = netdev_priv(netdev); ++ pci_ers_result_t err = PCI_ERS_RESULT_NEED_RESET; ++ ++ netdev_info(netdev, "PCI I/O error detected\n"); ++ ++ rtnl_lock(); ++ ++ /* We probably don't have netdev yet */ ++ if (!netdev || !netif_running(netdev)) ++ goto done; ++ ++ tg3_phy_stop(tp); ++ ++ tg3_netif_stop(tp); ++ ++ tg3_timer_stop(tp); ++ ++ /* Want to make sure that the reset task doesn't run */ ++ tg3_reset_task_cancel(tp); ++ ++ netif_device_detach(netdev); ++ ++ /* Clean up software state, even if MMIO is blocked */ ++ tg3_full_lock(tp, 0); ++ tg3_halt(tp, RESET_KIND_SHUTDOWN, 0); ++ tg3_full_unlock(tp); ++ ++done: ++ if (state == pci_channel_io_perm_failure) { ++ if (netdev) { ++ tg3_napi_enable(tp); ++ dev_close(netdev); ++ } ++ err = PCI_ERS_RESULT_DISCONNECT; ++ } else { ++ pci_disable_device(pdev); ++ } ++ ++ rtnl_unlock(); ++ ++ return err; ++} ++ ++/** ++ * tg3_io_slot_reset - called after the pci bus has been reset. ++ * @pdev: Pointer to PCI device ++ * ++ * Restart the card from scratch, as if from a cold-boot. ++ * At this point, the card has exprienced a hard reset, ++ * followed by fixups by BIOS, and has its config space ++ * set up identically to what it was at cold boot. ++ */ ++static pci_ers_result_t tg3_io_slot_reset(struct pci_dev *pdev) ++{ ++ struct net_device *netdev = pci_get_drvdata(pdev); ++ struct tg3 *tp = netdev_priv(netdev); ++ pci_ers_result_t rc = PCI_ERS_RESULT_DISCONNECT; ++ int err; ++ ++ rtnl_lock(); ++ ++ if (pci_enable_device(pdev)) { ++ dev_err(&pdev->dev, ++ "Cannot re-enable PCI device after reset.\n"); ++ goto done; ++ } ++ ++ pci_set_master(pdev); ++ pci_restore_state(pdev); ++ pci_save_state(pdev); ++ ++ if (!netdev || !netif_running(netdev)) { ++ rc = PCI_ERS_RESULT_RECOVERED; ++ goto done; ++ } ++ ++ err = tg3_power_up(tp); ++ if (err) ++ goto done; ++ ++ rc = PCI_ERS_RESULT_RECOVERED; ++ ++done: ++ if (rc != PCI_ERS_RESULT_RECOVERED && netdev && netif_running(netdev)) { ++ tg3_napi_enable(tp); ++ dev_close(netdev); ++ } ++ rtnl_unlock(); ++ ++ return rc; ++} ++ ++/** ++ * tg3_io_resume - called when traffic can start flowing again. ++ * @pdev: Pointer to PCI device ++ * ++ * This callback is called when the error recovery driver tells ++ * us that its OK to resume normal operation. ++ */ ++static void tg3_io_resume(struct pci_dev *pdev) ++{ ++ struct net_device *netdev = pci_get_drvdata(pdev); ++ struct tg3 *tp = netdev_priv(netdev); ++ int err; ++ ++ rtnl_lock(); ++ ++ if (!netif_running(netdev)) ++ goto done; ++ ++ tg3_ape_driver_state_change(tp, RESET_KIND_INIT); ++ tg3_full_lock(tp, 0); ++ tg3_flag_set(tp, INIT_COMPLETE); ++ err = tg3_restart_hw(tp, true); ++ if (err) { ++ tg3_full_unlock(tp); ++ netdev_err(netdev, "Cannot restart hardware after reset.\n"); ++ goto done; ++ } ++ ++ netif_device_attach(netdev); ++ ++ tg3_timer_start(tp); ++ ++ tg3_netif_start(tp); ++ ++ tg3_full_unlock(tp); ++ ++ tg3_phy_start(tp); ++ ++done: ++ rtnl_unlock(); ++} ++ ++static struct pci_error_handlers tg3_err_handler = { ++ .error_detected = tg3_io_error_detected, ++ .slot_reset = tg3_io_slot_reset, ++ .resume = tg3_io_resume ++}; ++#endif /* BCM_HAS_PCI_EEH_SUPPORT */ ++ ++static struct pci_driver tg3_driver = { ++ .name = DRV_MODULE_NAME, ++ .id_table = tg3_pci_tbl, ++ .probe = tg3_init_one, ++ .remove = __devexit_p(tg3_remove_one), ++#ifdef BCM_HAS_PCI_EEH_SUPPORT ++ .err_handler = &tg3_err_handler, ++#endif ++#ifdef SIMPLE_DEV_PM_OPS ++ .driver.pm = TG3_PM_OPS, ++#else ++ .suspend = tg3_suspend, ++ .resume = tg3_resume, ++#endif ++#ifdef BCM_HAS_PCI_PMOPS_SHUTDOWN ++ .shutdown = tg3_shutdown, ++#endif ++}; ++ ++static int __init tg3_init(void) ++{ ++#ifdef TG3_VMWARE_NETQ_ENABLE ++ int i; ++ for (i = 0; i < TG3_MAX_NIC; i++) { ++ if (tg3_netq_force[i] < TG3_OPTION_UNSET || ++ tg3_netq_force[i] >= TG3_IRQ_MAX_VECS_IOV) { ++ dev_err(&pdev->dev, ++ "Invalid force_netq module parameter " ++ "value for index %d (%d)\n", ++ i, tg3_netq_force[i]); ++ return -EINVAL; ++ } ++ } ++#endif ++#if (LINUX_VERSION_CODE < 0x020613) && !defined (__VMKLNX__) ++ return pci_module_init(&tg3_driver); ++#else ++#if defined(__VMKLNX__) && (VMWARE_ESX_DDK_VERSION >= 55000) ++ if (!disable_fw_dmp) { ++ VMK_ReturnStatus status; ++ tg3_fwdmp_va_ptr = kzalloc(TG3_FWDMP_SIZE, GFP_KERNEL); ++ ++ if (!tg3_fwdmp_va_ptr) ++ dev_err(&pdev->dev, ++ "tg3: Unable to allocate memory " ++ "for fw dump handler!\n"); ++ status = vmklnx_dump_add_callback(TG3_DUMPNAME, ++ tg3_fwdmp_callback, ++ NULL, ++ TG3_DUMPNAME, ++ &tg3_fwdmp_dh); ++ if (status != VMK_OK) ++ dev_err(&pdev->dev, "tg3: Unable to register fw " ++ "dump handler (rc = 0x%x!)\n", status); ++ } ++#endif /*defined(__VMKLNX__) && (VMWARE_ESX_DDK_VERSION >= 55000) */ ++ ++ return pci_register_driver(&tg3_driver); ++#endif ++} ++ ++static void __exit tg3_cleanup(void) ++{ ++#if (defined(__VMKLNX__) && VMWARE_ESX_DDK_VERSION >= 55000) ++ if (tg3_fwdmp_dh) { ++ VMK_ReturnStatus status = ++ vmklnx_dump_delete_callback(tg3_fwdmp_dh); ++ if (status != VMK_OK) ++ VMK_ASSERT(0); ++ } ++ kfree(tg3_fwdmp_va_ptr); ++ tg3_fwdmp_va_ptr = NULL; ++#endif /* defined(__VMKLNX__) && (VMWARE_ESX_DDK_VERSION >= 55000) */ ++ pci_unregister_driver(&tg3_driver); ++} ++ ++#if defined(__VMKLNX__) ++#include "tg3_vmware.c" ++#endif ++ ++module_init(tg3_init); ++module_exit(tg3_cleanup); +diff --git a/drivers/net/ethernet/broadcom/tg3/tg3.h b/drivers/net/ethernet/broadcom/tg3/tg3.h +new file mode 100644 +index 0000000..0dd1a61 +--- /dev/null ++++ b/drivers/net/ethernet/broadcom/tg3/tg3.h +@@ -0,0 +1,3596 @@ ++/* $Id$ ++ * tg3.h: Definitions for Broadcom Tigon3 ethernet driver. ++ * ++ * Copyright (C) 2001, 2002, 2003, 2004 David S. Miller (davem@redhat.com) ++ * Copyright (C) 2001 Jeff Garzik (jgarzik@pobox.com) ++ * Copyright (C) 2004 Sun Microsystems Inc. ++ * Copyright (C) 2007-2015 Broadcom Corporation. ++ */ ++ ++#ifndef _T3_H ++#define _T3_H ++ ++#include "tg3_compat.h" ++ ++#define TG3_64BIT_REG_HIGH 0x00UL ++#define TG3_64BIT_REG_LOW 0x04UL ++ ++/* Descriptor block info. */ ++#define TG3_BDINFO_HOST_ADDR 0x0UL /* 64-bit */ ++#define TG3_BDINFO_MAXLEN_FLAGS 0x8UL /* 32-bit */ ++#define BDINFO_FLAGS_USE_EXT_RECV 0x00000001 /* ext rx_buffer_desc */ ++#define BDINFO_FLAGS_DISABLED 0x00000002 ++#define BDINFO_FLAGS_MAXLEN_MASK 0xffff0000 ++#define BDINFO_FLAGS_MAXLEN_SHIFT 16 ++#define TG3_BDINFO_NIC_ADDR 0xcUL /* 32-bit */ ++#define TG3_BDINFO_SIZE 0x10UL ++ ++#define TG3_RX_STD_MAX_SIZE_5700 512 ++#define TG3_RX_STD_MAX_SIZE_5717 2048 ++#define TG3_RX_JMB_MAX_SIZE_5700 256 ++#define TG3_RX_JMB_MAX_SIZE_5717 1024 ++#define TG3_RX_RET_MAX_SIZE_5700 1024 ++#define TG3_RX_RET_MAX_SIZE_5705 512 ++#define TG3_RX_RET_MAX_SIZE_5717 4096 ++ ++#define TG3_RSS_INDIR_TBL_SIZE 128 ++ ++/* First 256 bytes are a mirror of PCI config space. */ ++#define TG3PCI_VENDOR 0x00000000 ++#define TG3PCI_VENDOR_BROADCOM 0x14e4 ++#define TG3PCI_DEVICE 0x00000002 ++#define TG3PCI_DEVICE_TIGON3_1 0x1644 /* BCM5700 */ ++#define TG3PCI_DEVICE_TIGON3_2 0x1645 /* BCM5701 */ ++#define TG3PCI_DEVICE_TIGON3_3 0x1646 /* BCM5702 */ ++#define TG3PCI_DEVICE_TIGON3_4 0x1647 /* BCM5703 */ ++#define TG3PCI_DEVICE_TIGON3_5761S 0x1688 ++#define TG3PCI_DEVICE_TIGON3_5761SE 0x1689 ++#define TG3PCI_DEVICE_TIGON3_57780 0x1692 ++#define TG3PCI_DEVICE_TIGON3_5787M 0x1693 ++#define TG3PCI_DEVICE_TIGON3_57760 0x1690 ++#define TG3PCI_DEVICE_TIGON3_57790 0x1694 ++#define TG3PCI_DEVICE_TIGON3_57788 0x1691 ++#define TG3PCI_DEVICE_TIGON3_5785_G 0x1699 /* GPHY */ ++#define TG3PCI_DEVICE_TIGON3_5785_F 0x16a0 /* 10/100 only */ ++#define TG3PCI_DEVICE_TIGON3_5717 0x1655 ++#define TG3PCI_DEVICE_TIGON3_5717_C 0x1665 ++#define TG3PCI_DEVICE_TIGON3_5718 0x1656 ++#define TG3PCI_DEVICE_TIGON3_57781 0x16b1 ++#define TG3PCI_DEVICE_TIGON3_57785 0x16b5 ++#define TG3PCI_DEVICE_TIGON3_57761 0x16b0 ++#define TG3PCI_DEVICE_TIGON3_57765 0x16b4 ++#define TG3PCI_DEVICE_TIGON3_57791 0x16b2 ++#define TG3PCI_DEVICE_TIGON3_57795 0x16b6 ++#define TG3PCI_DEVICE_TIGON3_5719 0x1657 ++#define TG3PCI_DEVICE_TIGON3_5720 0x165f ++#define TG3PCI_DEVICE_TIGON3_57762 0x1682 ++#define TG3PCI_DEVICE_TIGON3_57766 0x1686 ++#define TG3PCI_DEVICE_TIGON3_57786 0x16b3 ++#define TG3PCI_DEVICE_TIGON3_57782 0x16b7 ++#define TG3PCI_DEVICE_TIGON3_5762 0x1687 ++#define TG3PCI_DEVICE_TIGON3_5725 0x1643 ++#define TG3PCI_DEVICE_TIGON3_5727 0x16f3 ++#define TG3PCI_DEVICE_TIGON3_57764 0x1642 ++#define TG3PCI_DEVICE_TIGON3_57767 0x1683 ++#define TG3PCI_DEVICE_TIGON3_57787 0x1641 ++/* 0x04 --> 0x2c unused */ ++#define TG3PCI_SUBVENDOR_ID_BROADCOM PCI_VENDOR_ID_BROADCOM ++#define TG3PCI_SUBDEVICE_ID_BROADCOM_95700A6 0x1644 ++#define TG3PCI_SUBDEVICE_ID_BROADCOM_95701A5 0x0001 ++#define TG3PCI_SUBDEVICE_ID_BROADCOM_95700T6 0x0002 ++#define TG3PCI_SUBDEVICE_ID_BROADCOM_95700A9 0x0003 ++#define TG3PCI_SUBDEVICE_ID_BROADCOM_95701T1 0x0005 ++#define TG3PCI_SUBDEVICE_ID_BROADCOM_95701T8 0x0006 ++#define TG3PCI_SUBDEVICE_ID_BROADCOM_95701A7 0x0007 ++#define TG3PCI_SUBDEVICE_ID_BROADCOM_95701A10 0x0008 ++#define TG3PCI_SUBDEVICE_ID_BROADCOM_95701A12 0x8008 ++#define TG3PCI_SUBDEVICE_ID_BROADCOM_95703AX1 0x0009 ++#define TG3PCI_SUBDEVICE_ID_BROADCOM_95703AX2 0x8009 ++#define TG3PCI_SUBVENDOR_ID_3COM PCI_VENDOR_ID_3COM ++#define TG3PCI_SUBDEVICE_ID_3COM_3C996T 0x1000 ++#define TG3PCI_SUBDEVICE_ID_3COM_3C996BT 0x1006 ++#define TG3PCI_SUBDEVICE_ID_3COM_3C996SX 0x1004 ++#define TG3PCI_SUBDEVICE_ID_3COM_3C1000T 0x1007 ++#define TG3PCI_SUBDEVICE_ID_3COM_3C940BR01 0x1008 ++#define TG3PCI_SUBVENDOR_ID_DELL PCI_VENDOR_ID_DELL ++#define TG3PCI_SUBDEVICE_ID_DELL_VIPER 0x00d1 ++#define TG3PCI_SUBDEVICE_ID_DELL_JAGUAR 0x0106 ++#define TG3PCI_SUBDEVICE_ID_DELL_MERLOT 0x0109 ++#define TG3PCI_SUBDEVICE_ID_DELL_SLIM_MERLOT 0x010a ++#define TG3PCI_SUBVENDOR_ID_COMPAQ PCI_VENDOR_ID_COMPAQ ++#define TG3PCI_SUBDEVICE_ID_COMPAQ_BANSHEE 0x007c ++#define TG3PCI_SUBDEVICE_ID_COMPAQ_BANSHEE_2 0x009a ++#define TG3PCI_SUBDEVICE_ID_COMPAQ_CHANGELING 0x007d ++#define TG3PCI_SUBDEVICE_ID_COMPAQ_NC7780 0x0085 ++#define TG3PCI_SUBDEVICE_ID_COMPAQ_NC7780_2 0x0099 ++#define TG3PCI_SUBVENDOR_ID_IBM PCI_VENDOR_ID_IBM ++#define TG3PCI_SUBDEVICE_ID_IBM_5703SAX2 0x0281 ++#define TG3PCI_SUBDEVICE_ID_ACER_57780_A 0x0601 ++#define TG3PCI_SUBDEVICE_ID_ACER_57780_B 0x0612 ++#define TG3PCI_SUBDEVICE_ID_LENOVO_5787M 0x3056 ++ ++/* 0x30 --> 0x64 unused */ ++#define TG3PCI_MSI_DATA 0x00000064 ++/* 0x66 --> 0x68 unused */ ++#define TG3PCI_MISC_HOST_CTRL 0x00000068 ++#define MISC_HOST_CTRL_CLEAR_INT 0x00000001 ++#define MISC_HOST_CTRL_MASK_PCI_INT 0x00000002 ++#define MISC_HOST_CTRL_BYTE_SWAP 0x00000004 ++#define MISC_HOST_CTRL_WORD_SWAP 0x00000008 ++#define MISC_HOST_CTRL_PCISTATE_RW 0x00000010 ++#define MISC_HOST_CTRL_CLKREG_RW 0x00000020 ++#define MISC_HOST_CTRL_REGWORD_SWAP 0x00000040 ++#define MISC_HOST_CTRL_INDIR_ACCESS 0x00000080 ++#define MISC_HOST_CTRL_IRQ_MASK_MODE 0x00000100 ++#define MISC_HOST_CTRL_TAGGED_STATUS 0x00000200 ++#define MISC_HOST_CTRL_CHIPREV 0xffff0000 ++#define MISC_HOST_CTRL_CHIPREV_SHIFT 16 ++ ++#define CHIPREV_ID_5700_A0 0x7000 ++#define CHIPREV_ID_5700_A1 0x7001 ++#define CHIPREV_ID_5700_B0 0x7100 ++#define CHIPREV_ID_5700_B1 0x7101 ++#define CHIPREV_ID_5700_B3 0x7102 ++#define CHIPREV_ID_5700_ALTIMA 0x7104 ++#define CHIPREV_ID_5700_C0 0x7200 ++#define CHIPREV_ID_5701_A0 0x0000 ++#define CHIPREV_ID_5701_B0 0x0100 ++#define CHIPREV_ID_5701_B2 0x0102 ++#define CHIPREV_ID_5701_B5 0x0105 ++#define CHIPREV_ID_5703_A0 0x1000 ++#define CHIPREV_ID_5703_A1 0x1001 ++#define CHIPREV_ID_5703_A2 0x1002 ++#define CHIPREV_ID_5703_A3 0x1003 ++#define CHIPREV_ID_5704_A0 0x2000 ++#define CHIPREV_ID_5704_A1 0x2001 ++#define CHIPREV_ID_5704_A2 0x2002 ++#define CHIPREV_ID_5704_A3 0x2003 ++#define CHIPREV_ID_5705_A0 0x3000 ++#define CHIPREV_ID_5705_A1 0x3001 ++#define CHIPREV_ID_5705_A2 0x3002 ++#define CHIPREV_ID_5705_A3 0x3003 ++#define CHIPREV_ID_5750_A0 0x4000 ++#define CHIPREV_ID_5750_A1 0x4001 ++#define CHIPREV_ID_5750_A3 0x4003 ++#define CHIPREV_ID_5750_C2 0x4202 ++#define CHIPREV_ID_5752_A0_HW 0x5000 ++#define CHIPREV_ID_5752_A0 0x6000 ++#define CHIPREV_ID_5752_A1 0x6001 ++#define CHIPREV_ID_5714_A2 0x9002 ++#define CHIPREV_ID_5906_A1 0xc001 ++#define CHIPREV_ID_57780_A0 0x57780000 ++#define CHIPREV_ID_57780_A1 0x57780001 ++#define CHIPREV_ID_5717_A0 0x05717000 ++#define CHIPREV_ID_5717_C0 0x05717200 ++#define CHIPREV_ID_57765_A0 0x57785000 ++#define CHIPREV_ID_5719_A0 0x05719000 ++#define CHIPREV_ID_5720_A0 0x05720000 ++#define CHIPREV_ID_5762_A0 0x05762000 ++ ++#define ASIC_REV_5700 0x07 ++#define ASIC_REV_5701 0x00 ++#define ASIC_REV_5703 0x01 ++#define ASIC_REV_5704 0x02 ++#define ASIC_REV_5705 0x03 ++#define ASIC_REV_5750 0x04 ++#define ASIC_REV_5752 0x06 ++#define ASIC_REV_5780 0x08 ++#define ASIC_REV_5714 0x09 ++#define ASIC_REV_5755 0x0a ++#define ASIC_REV_5787 0x0b ++#define ASIC_REV_5906 0x0c ++#define ASIC_REV_USE_PROD_ID_REG 0x0f ++#define ASIC_REV_5784 0x5784 ++#define ASIC_REV_5761 0x5761 ++#define ASIC_REV_5785 0x5785 ++#define ASIC_REV_57780 0x57780 ++#define ASIC_REV_5717 0x5717 ++#define ASIC_REV_57765 0x57785 ++#define ASIC_REV_5719 0x5719 ++#define ASIC_REV_5720 0x5720 ++#define ASIC_REV_57766 0x57766 ++#define ASIC_REV_5762 0x5762 ++#define CHIPREV_5700_AX 0x70 ++#define CHIPREV_5700_BX 0x71 ++#define CHIPREV_5700_CX 0x72 ++#define CHIPREV_5701_AX 0x00 ++#define CHIPREV_5703_AX 0x10 ++#define CHIPREV_5704_AX 0x20 ++#define CHIPREV_5704_BX 0x21 ++#define CHIPREV_5750_AX 0x40 ++#define CHIPREV_5750_BX 0x41 ++#define CHIPREV_5784_AX 0x57840 ++#define CHIPREV_5761_AX 0x57610 ++#define CHIPREV_57765_AX 0x577650 ++#define METAL_REV_A0 0x00 ++#define METAL_REV_A1 0x01 ++#define METAL_REV_B0 0x00 ++#define METAL_REV_B1 0x01 ++#define METAL_REV_B2 0x02 ++#define TG3PCI_DMA_RW_CTRL 0x0000006c ++#define DMA_RWCTRL_DIS_CACHE_ALIGNMENT 0x00000001 ++#define DMA_RWCTRL_TAGGED_STAT_WA 0x00000080 ++#define DMA_RWCTRL_CRDRDR_RDMA_MRRS_MSK 0x00000380 ++#define DMA_RWCTRL_READ_BNDRY_MASK 0x00000700 ++#define DMA_RWCTRL_READ_BNDRY_DISAB 0x00000000 ++#define DMA_RWCTRL_READ_BNDRY_16 0x00000100 ++#define DMA_RWCTRL_READ_BNDRY_128_PCIX 0x00000100 ++#define DMA_RWCTRL_READ_BNDRY_32 0x00000200 ++#define DMA_RWCTRL_READ_BNDRY_256_PCIX 0x00000200 ++#define DMA_RWCTRL_READ_BNDRY_64 0x00000300 ++#define DMA_RWCTRL_READ_BNDRY_384_PCIX 0x00000300 ++#define DMA_RWCTRL_READ_BNDRY_128 0x00000400 ++#define DMA_RWCTRL_READ_BNDRY_256 0x00000500 ++#define DMA_RWCTRL_READ_BNDRY_512 0x00000600 ++#define DMA_RWCTRL_READ_BNDRY_1024 0x00000700 ++#define DMA_RWCTRL_WRITE_BNDRY_MASK 0x00003800 ++#define DMA_RWCTRL_WRITE_BNDRY_DISAB 0x00000000 ++#define DMA_RWCTRL_WRITE_BNDRY_16 0x00000800 ++#define DMA_RWCTRL_WRITE_BNDRY_128_PCIX 0x00000800 ++#define DMA_RWCTRL_WRITE_BNDRY_32 0x00001000 ++#define DMA_RWCTRL_WRITE_BNDRY_256_PCIX 0x00001000 ++#define DMA_RWCTRL_WRITE_BNDRY_64 0x00001800 ++#define DMA_RWCTRL_WRITE_BNDRY_384_PCIX 0x00001800 ++#define DMA_RWCTRL_WRITE_BNDRY_128 0x00002000 ++#define DMA_RWCTRL_WRITE_BNDRY_256 0x00002800 ++#define DMA_RWCTRL_WRITE_BNDRY_512 0x00003000 ++#define DMA_RWCTRL_WRITE_BNDRY_1024 0x00003800 ++#define DMA_RWCTRL_ONE_DMA 0x00004000 ++#define DMA_RWCTRL_READ_WATER 0x00070000 ++#define DMA_RWCTRL_READ_WATER_SHIFT 16 ++#define DMA_RWCTRL_WRITE_WATER 0x00380000 ++#define DMA_RWCTRL_WRITE_WATER_SHIFT 19 ++#define DMA_RWCTRL_USE_MEM_READ_MULT 0x00400000 ++#define DMA_RWCTRL_ASSERT_ALL_BE 0x00800000 ++#define DMA_RWCTRL_PCI_READ_CMD 0x0f000000 ++#define DMA_RWCTRL_PCI_READ_CMD_SHIFT 24 ++#define DMA_RWCTRL_PCI_WRITE_CMD 0xf0000000 ++#define DMA_RWCTRL_PCI_WRITE_CMD_SHIFT 28 ++#define DMA_RWCTRL_WRITE_BNDRY_64_PCIE 0x10000000 ++#define DMA_RWCTRL_WRITE_BNDRY_128_PCIE 0x30000000 ++#define DMA_RWCTRL_WRITE_BNDRY_DISAB_PCIE 0x70000000 ++#define TG3PCI_PCISTATE 0x00000070 ++#define PCISTATE_FORCE_RESET 0x00000001 ++#define PCISTATE_INT_NOT_ACTIVE 0x00000002 ++#define PCISTATE_CONV_PCI_MODE 0x00000004 ++#define PCISTATE_BUS_SPEED_HIGH 0x00000008 ++#define PCISTATE_BUS_32BIT 0x00000010 ++#define PCISTATE_ROM_ENABLE 0x00000020 ++#define PCISTATE_ROM_RETRY_ENABLE 0x00000040 ++#define PCISTATE_FLAT_VIEW 0x00000100 ++#define PCISTATE_RETRY_SAME_DMA 0x00002000 ++#define PCISTATE_ALLOW_APE_CTLSPC_WR 0x00010000 ++#define PCISTATE_ALLOW_APE_SHMEM_WR 0x00020000 ++#define PCISTATE_ALLOW_APE_PSPACE_WR 0x00040000 ++#define TG3PCI_CLOCK_CTRL 0x00000074 ++#define CLOCK_CTRL_CORECLK_DISABLE 0x00000200 ++#define CLOCK_CTRL_RXCLK_DISABLE 0x00000400 ++#define CLOCK_CTRL_TXCLK_DISABLE 0x00000800 ++#define CLOCK_CTRL_ALTCLK 0x00001000 ++#define CLOCK_CTRL_PWRDOWN_PLL133 0x00008000 ++#define CLOCK_CTRL_44MHZ_CORE 0x00040000 ++#define CLOCK_CTRL_625_CORE 0x00100000 ++#define CLOCK_CTRL_FORCE_CLKRUN 0x00200000 ++#define CLOCK_CTRL_CLKRUN_OENABLE 0x00400000 ++#define CLOCK_CTRL_DELAY_PCI_GRANT 0x80000000 ++#define TG3PCI_REG_BASE_ADDR 0x00000078 ++#define TG3PCI_MEM_WIN_BASE_ADDR 0x0000007c ++#define TG3PCI_REG_DATA 0x00000080 ++#define TG3PCI_MEM_WIN_DATA 0x00000084 ++#define TG3PCI_MISC_LOCAL_CTRL 0x00000090 ++/* 0x94 --> 0x98 unused */ ++#define TG3PCI_STD_RING_PROD_IDX 0x00000098 /* 64-bit */ ++#define TG3PCI_RCV_RET_RING_CON_IDX 0x000000a0 /* 64-bit */ ++/* 0xa8 --> 0xb8 unused */ ++#define TG3PCI_DUAL_MAC_CTRL 0x000000b8 ++#define DUAL_MAC_CTRL_CH_MASK 0x00000003 ++#define DUAL_MAC_CTRL_ID 0x00000004 ++#define TG3PCI_PRODID_ASICREV 0x000000bc ++#define PROD_ID_ASIC_REV_MASK 0x0fffffff ++/* 0xc0 --> 0xf4 unused */ ++ ++#define TG3PCI_GEN2_PRODID_ASICREV 0x000000f4 ++#define TG3PCI_GEN15_PRODID_ASICREV 0x000000fc ++/* 0xf8 --> 0x200 unused */ ++ ++#define TG3_CORR_ERR_STAT 0x00000110 ++#define TG3_CORR_ERR_STAT_CLEAR 0xffffffff ++/* 0x114 --> 0x200 unused */ ++ ++/* Mailbox registers */ ++#define MAILBOX_INTERRUPT_0 0x00000200 /* 64-bit */ ++#define MAILBOX_INTERRUPT_1 0x00000208 /* 64-bit */ ++#define MAILBOX_INTERRUPT_2 0x00000210 /* 64-bit */ ++#define MAILBOX_INTERRUPT_3 0x00000218 /* 64-bit */ ++#define MAILBOX_GENERAL_0 0x00000220 /* 64-bit */ ++#define MAILBOX_GENERAL_1 0x00000228 /* 64-bit */ ++#define MAILBOX_GENERAL_2 0x00000230 /* 64-bit */ ++#define MAILBOX_GENERAL_3 0x00000238 /* 64-bit */ ++#define MAILBOX_GENERAL_4 0x00000240 /* 64-bit */ ++#define MAILBOX_GENERAL_5 0x00000248 /* 64-bit */ ++#define MAILBOX_GENERAL_6 0x00000250 /* 64-bit */ ++#define MAILBOX_GENERAL_7 0x00000258 /* 64-bit */ ++#define MAILBOX_RELOAD_STAT 0x00000260 /* 64-bit */ ++#define MAILBOX_RCV_STD_PROD_IDX 0x00000268 /* 64-bit */ ++#define TG3_RX_STD_PROD_IDX_REG (MAILBOX_RCV_STD_PROD_IDX + \ ++ TG3_64BIT_REG_LOW) ++#define MAILBOX_RCV_JUMBO_PROD_IDX 0x00000270 /* 64-bit */ ++#define TG3_RX_JMB_PROD_IDX_REG (MAILBOX_RCV_JUMBO_PROD_IDX + \ ++ TG3_64BIT_REG_LOW) ++#define MAILBOX_RCV_MINI_PROD_IDX 0x00000278 /* 64-bit */ ++#define MAILBOX_RCVRET_CON_IDX_0 0x00000280 /* 64-bit */ ++#define MAILBOX_RCVRET_CON_IDX_1 0x00000288 /* 64-bit */ ++#define MAILBOX_RCVRET_CON_IDX_2 0x00000290 /* 64-bit */ ++#define MAILBOX_RCVRET_CON_IDX_3 0x00000298 /* 64-bit */ ++#define MAILBOX_RCVRET_CON_IDX_4 0x000002a0 /* 64-bit */ ++#define MAILBOX_RCVRET_CON_IDX_5 0x000002a8 /* 64-bit */ ++#define MAILBOX_RCVRET_CON_IDX_6 0x000002b0 /* 64-bit */ ++#define MAILBOX_RCVRET_CON_IDX_7 0x000002b8 /* 64-bit */ ++#define MAILBOX_RCVRET_CON_IDX_8 0x000002c0 /* 64-bit */ ++#define MAILBOX_RCVRET_CON_IDX_9 0x000002c8 /* 64-bit */ ++#define MAILBOX_RCVRET_CON_IDX_10 0x000002d0 /* 64-bit */ ++#define MAILBOX_RCV_JUMBO_PROD_IDX_RING1 0x000002d4 /* 32-bit */ ++#define MAILBOX_RCVRET_CON_IDX_11 0x000002d8 /* 64-bit */ ++#define MAILBOX_RCVRET_CON_IDX_12 0x000002e0 /* 64-bit */ ++#define MAILBOX_RCVRET_CON_IDX_13 0x000002e8 /* 64-bit */ ++#define MAILBOX_RCVRET_CON_IDX_14 0x000002f0 /* 64-bit */ ++#define MAILBOX_RCVRET_CON_IDX_15 0x000002f8 /* 64-bit */ ++#define MAILBOX_SNDHOST_PROD_IDX_0 0x00000300 /* 64-bit */ ++#define MAILBOX_SNDHOST_PROD_IDX_1 0x00000308 /* 64-bit */ ++#define MAILBOX_SNDHOST_PROD_IDX_2 0x00000310 /* 64-bit */ ++#define MAILBOX_SNDHOST_PROD_IDX_3 0x00000318 /* 64-bit */ ++#define MAILBOX_SNDHOST_PROD_IDX_4 0x00000320 /* 64-bit */ ++#define MAILBOX_SNDHOST_PROD_IDX_5 0x00000328 /* 64-bit */ ++#define MAILBOX_SNDHOST_PROD_IDX_6 0x00000330 /* 64-bit */ ++#define MAILBOX_SNDHOST_PROD_IDX_7 0x00000338 /* 64-bit */ ++#define MAILBOX_SNDHOST_PROD_IDX_8 0x00000340 /* 64-bit */ ++#define MAILBOX_RCV_JMB_PROD_IDX_RING12 0x00000340 /* 32-bit */ ++#define MAILBOX_SNDHOST_PROD_IDX_9 0x00000348 /* 64-bit */ ++#define MAILBOX_SNDHOST_PROD_IDX_10 0x00000350 /* 64-bit */ ++#define MAILBOX_RCV_STD_PROD_IDX_RING1 0x00000354 /* 32-bit */ ++#define MAILBOX_SNDHOST_PROD_IDX_11 0x00000358 /* 64-bit */ ++#define MAILBOX_SNDHOST_PROD_IDX_12 0x00000360 /* 64-bit */ ++#define MAILBOX_SNDHOST_PROD_IDX_13 0x00000368 /* 64-bit */ ++#define MAILBOX_SNDHOST_PROD_IDX_14 0x00000370 /* 64-bit */ ++#define MAILBOX_SNDHOST_PROD_IDX_15 0x00000378 /* 64-bit */ ++#define MAILBOX_SNDNIC_PROD_IDX_0 0x00000380 /* 64-bit */ ++#define MAILBOX_SNDNIC_PROD_IDX_1 0x00000388 /* 64-bit */ ++#define MAILBOX_SNDNIC_PROD_IDX_2 0x00000390 /* 64-bit */ ++#define MAILBOX_SNDNIC_PROD_IDX_3 0x00000398 /* 64-bit */ ++#define MAILBOX_SNDNIC_PROD_IDX_4 0x000003a0 /* 64-bit */ ++#define MAILBOX_SNDNIC_PROD_IDX_5 0x000003a8 /* 64-bit */ ++#define MAILBOX_SNDNIC_PROD_IDX_6 0x000003b0 /* 64-bit */ ++#define MAILBOX_SNDNIC_PROD_IDX_7 0x000003b8 /* 64-bit */ ++#define MAILBOX_SNDNIC_PROD_IDX_8 0x000003c0 /* 64-bit */ ++#define MAILBOX_SNDNIC_PROD_IDX_9 0x000003c8 /* 64-bit */ ++#define MAILBOX_SNDNIC_PROD_IDX_10 0x000003d0 /* 64-bit */ ++#define MAILBOX_SNDNIC_PROD_IDX_11 0x000003d8 /* 64-bit */ ++#define MAILBOX_SNDNIC_PROD_IDX_12 0x000003e0 /* 64-bit */ ++#define MAILBOX_SNDNIC_PROD_IDX_13 0x000003e8 /* 64-bit */ ++#define MAILBOX_SNDNIC_PROD_IDX_14 0x000003f0 /* 64-bit */ ++#define MAILBOX_SNDNIC_PROD_IDX_15 0x000003f8 /* 64-bit */ ++ ++/* MAC control registers */ ++#define MAC_MODE 0x00000400 ++#define MAC_MODE_RESET 0x00000001 ++#define MAC_MODE_HALF_DUPLEX 0x00000002 ++#define MAC_MODE_PORT_MODE_MASK 0x0000000c ++#define MAC_MODE_PORT_MODE_TBI 0x0000000c ++#define MAC_MODE_PORT_MODE_GMII 0x00000008 ++#define MAC_MODE_PORT_MODE_MII 0x00000004 ++#define MAC_MODE_PORT_MODE_NONE 0x00000000 ++#define MAC_MODE_PORT_INT_LPBACK 0x00000010 ++#define MAC_MODE_TAGGED_MAC_CTRL 0x00000080 ++#define MAC_MODE_TX_BURSTING 0x00000100 ++#define MAC_MODE_MAX_DEFER 0x00000200 ++#define MAC_MODE_LINK_POLARITY 0x00000400 ++#define MAC_MODE_RXSTAT_ENABLE 0x00000800 ++#define MAC_MODE_RXSTAT_CLEAR 0x00001000 ++#define MAC_MODE_RXSTAT_FLUSH 0x00002000 ++#define MAC_MODE_TXSTAT_ENABLE 0x00004000 ++#define MAC_MODE_TXSTAT_CLEAR 0x00008000 ++#define MAC_MODE_TXSTAT_FLUSH 0x00010000 ++#define MAC_MODE_SEND_CONFIGS 0x00020000 ++#define MAC_MODE_MAGIC_PKT_ENABLE 0x00040000 ++#define MAC_MODE_ACPI_ENABLE 0x00080000 ++#define MAC_MODE_MIP_ENABLE 0x00100000 ++#define MAC_MODE_TDE_ENABLE 0x00200000 ++#define MAC_MODE_RDE_ENABLE 0x00400000 ++#define MAC_MODE_FHDE_ENABLE 0x00800000 ++#define MAC_MODE_KEEP_FRAME_IN_WOL 0x01000000 ++#define MAC_MODE_APE_RX_EN 0x08000000 ++#define MAC_MODE_APE_TX_EN 0x10000000 ++#define MAC_STATUS 0x00000404 ++#define MAC_STATUS_PCS_SYNCED 0x00000001 ++#define MAC_STATUS_SIGNAL_DET 0x00000002 ++#define MAC_STATUS_RCVD_CFG 0x00000004 ++#define MAC_STATUS_CFG_CHANGED 0x00000008 ++#define MAC_STATUS_SYNC_CHANGED 0x00000010 ++#define MAC_STATUS_PORT_DEC_ERR 0x00000400 ++#define MAC_STATUS_LNKSTATE_CHANGED 0x00001000 ++#define MAC_STATUS_MI_COMPLETION 0x00400000 ++#define MAC_STATUS_MI_INTERRUPT 0x00800000 ++#define MAC_STATUS_AP_ERROR 0x01000000 ++#define MAC_STATUS_ODI_ERROR 0x02000000 ++#define MAC_STATUS_RXSTAT_OVERRUN 0x04000000 ++#define MAC_STATUS_TXSTAT_OVERRUN 0x08000000 ++#define MAC_EVENT 0x00000408 ++#define MAC_EVENT_PORT_DECODE_ERR 0x00000400 ++#define MAC_EVENT_LNKSTATE_CHANGED 0x00001000 ++#define MAC_EVENT_MI_COMPLETION 0x00400000 ++#define MAC_EVENT_MI_INTERRUPT 0x00800000 ++#define MAC_EVENT_AP_ERROR 0x01000000 ++#define MAC_EVENT_ODI_ERROR 0x02000000 ++#define MAC_EVENT_RXSTAT_OVERRUN 0x04000000 ++#define MAC_EVENT_TXSTAT_OVERRUN 0x08000000 ++#define MAC_LED_CTRL 0x0000040c ++#define LED_CTRL_LNKLED_OVERRIDE 0x00000001 ++#define LED_CTRL_1000MBPS_ON 0x00000002 ++#define LED_CTRL_100MBPS_ON 0x00000004 ++#define LED_CTRL_10MBPS_ON 0x00000008 ++#define LED_CTRL_TRAFFIC_OVERRIDE 0x00000010 ++#define LED_CTRL_TRAFFIC_BLINK 0x00000020 ++#define LED_CTRL_TRAFFIC_LED 0x00000040 ++#define LED_CTRL_1000MBPS_STATUS 0x00000080 ++#define LED_CTRL_100MBPS_STATUS 0x00000100 ++#define LED_CTRL_10MBPS_STATUS 0x00000200 ++#define LED_CTRL_TRAFFIC_STATUS 0x00000400 ++#define LED_CTRL_MODE_MAC 0x00000000 ++#define LED_CTRL_MODE_PHY_1 0x00000800 ++#define LED_CTRL_MODE_PHY_2 0x00001000 ++#define LED_CTRL_MODE_SHASTA_MAC 0x00002000 ++#define LED_CTRL_MODE_SHARED 0x00004000 ++#define LED_CTRL_MODE_COMBO 0x00008000 ++#define LED_CTRL_BLINK_RATE_MASK 0x7ff80000 ++#define LED_CTRL_BLINK_RATE_SHIFT 19 ++#define LED_CTRL_BLINK_PER_OVERRIDE 0x00080000 ++#define LED_CTRL_BLINK_RATE_OVERRIDE 0x80000000 ++#define MAC_ADDR_0_HIGH 0x00000410 /* upper 2 bytes */ ++#define MAC_ADDR_0_LOW 0x00000414 /* lower 4 bytes */ ++#define MAC_ADDR_1_HIGH 0x00000418 /* upper 2 bytes */ ++#define MAC_ADDR_1_LOW 0x0000041c /* lower 4 bytes */ ++#define MAC_ADDR_2_HIGH 0x00000420 /* upper 2 bytes */ ++#define MAC_ADDR_2_LOW 0x00000424 /* lower 4 bytes */ ++#define MAC_ADDR_3_HIGH 0x00000428 /* upper 2 bytes */ ++#define MAC_ADDR_3_LOW 0x0000042c /* lower 4 bytes */ ++#define MAC_ACPI_MBUF_PTR 0x00000430 ++#define MAC_ACPI_LEN_OFFSET 0x00000434 ++#define ACPI_LENOFF_LEN_MASK 0x0000ffff ++#define ACPI_LENOFF_LEN_SHIFT 0 ++#define ACPI_LENOFF_OFF_MASK 0x0fff0000 ++#define ACPI_LENOFF_OFF_SHIFT 16 ++#define MAC_TX_BACKOFF_SEED 0x00000438 ++#define TX_BACKOFF_SEED_MASK 0x000003ff ++#define MAC_RX_MTU_SIZE 0x0000043c ++#define RX_MTU_SIZE_MASK 0x0000ffff ++#define MAC_PCS_TEST 0x00000440 ++#define PCS_TEST_PATTERN_MASK 0x000fffff ++#define PCS_TEST_PATTERN_SHIFT 0 ++#define PCS_TEST_ENABLE 0x00100000 ++#define MAC_TX_AUTO_NEG 0x00000444 ++#define TX_AUTO_NEG_MASK 0x0000ffff ++#define TX_AUTO_NEG_SHIFT 0 ++#define MAC_RX_AUTO_NEG 0x00000448 ++#define RX_AUTO_NEG_MASK 0x0000ffff ++#define RX_AUTO_NEG_SHIFT 0 ++#define MAC_MI_COM 0x0000044c ++#define MI_COM_CMD_MASK 0x0c000000 ++#define MI_COM_CMD_WRITE 0x04000000 ++#define MI_COM_CMD_READ 0x08000000 ++#define MI_COM_READ_FAILED 0x10000000 ++#define MI_COM_START 0x20000000 ++#define MI_COM_BUSY 0x20000000 ++#define MI_COM_PHY_ADDR_MASK 0x03e00000 ++#define MI_COM_PHY_ADDR_SHIFT 21 ++#define MI_COM_REG_ADDR_MASK 0x001f0000 ++#define MI_COM_REG_ADDR_SHIFT 16 ++#define MI_COM_DATA_MASK 0x0000ffff ++#define MAC_MI_STAT 0x00000450 ++#define MAC_MI_STAT_LNKSTAT_ATTN_ENAB 0x00000001 ++#define MAC_MI_STAT_10MBPS_MODE 0x00000002 ++#define MAC_MI_MODE 0x00000454 ++#define MAC_MI_MODE_CLK_10MHZ 0x00000001 ++#define MAC_MI_MODE_SHORT_PREAMBLE 0x00000002 ++#define MAC_MI_MODE_AUTO_POLL 0x00000010 ++#define MAC_MI_MODE_500KHZ_CONST 0x00008000 ++#define MAC_MI_MODE_BASE 0x000c0000 /* XXX magic values XXX */ ++#define MAC_AUTO_POLL_STATUS 0x00000458 ++#define MAC_AUTO_POLL_ERROR 0x00000001 ++#define MAC_TX_MODE 0x0000045c ++#define TX_MODE_RESET 0x00000001 ++#define TX_MODE_ENABLE 0x00000002 ++#define TX_MODE_FLOW_CTRL_ENABLE 0x00000010 ++#define TX_MODE_BIG_BCKOFF_ENABLE 0x00000020 ++#define TX_MODE_LONG_PAUSE_ENABLE 0x00000040 ++#define TX_MODE_MBUF_LOCKUP_FIX 0x00000100 ++#define TX_MODE_JMB_FRM_LEN 0x00400000 ++#define TX_MODE_CNT_DN_MODE 0x00800000 ++#define MAC_TX_STATUS 0x00000460 ++#define TX_STATUS_XOFFED 0x00000001 ++#define TX_STATUS_SENT_XOFF 0x00000002 ++#define TX_STATUS_SENT_XON 0x00000004 ++#define TX_STATUS_LINK_UP 0x00000008 ++#define TX_STATUS_ODI_UNDERRUN 0x00000010 ++#define TX_STATUS_ODI_OVERRUN 0x00000020 ++#define MAC_TX_LENGTHS 0x00000464 ++#define TX_LENGTHS_SLOT_TIME_MASK 0x000000ff ++#define TX_LENGTHS_SLOT_TIME_SHIFT 0 ++#define TX_LENGTHS_IPG_MASK 0x00000f00 ++#define TX_LENGTHS_IPG_SHIFT 8 ++#define TX_LENGTHS_IPG_CRS_MASK 0x00003000 ++#define TX_LENGTHS_IPG_CRS_SHIFT 12 ++#define TX_LENGTHS_JMB_FRM_LEN_MSK 0x00ff0000 ++#define TX_LENGTHS_CNT_DWN_VAL_MSK 0xff000000 ++#define MAC_RX_MODE 0x00000468 ++#define RX_MODE_RESET 0x00000001 ++#define RX_MODE_ENABLE 0x00000002 ++#define RX_MODE_FLOW_CTRL_ENABLE 0x00000004 ++#define RX_MODE_KEEP_MAC_CTRL 0x00000008 ++#define RX_MODE_KEEP_PAUSE 0x00000010 ++#define RX_MODE_ACCEPT_OVERSIZED 0x00000020 ++#define RX_MODE_ACCEPT_RUNTS 0x00000040 ++#define RX_MODE_LEN_CHECK 0x00000080 ++#define RX_MODE_PROMISC 0x00000100 ++#define RX_MODE_NO_CRC_CHECK 0x00000200 ++#define RX_MODE_KEEP_VLAN_TAG 0x00000400 ++#define RX_MODE_RSS_IPV4_HASH_EN 0x00010000 ++#define RX_MODE_RSS_TCP_IPV4_HASH_EN 0x00020000 ++#define RX_MODE_RSS_IPV6_HASH_EN 0x00040000 ++#define RX_MODE_RSS_TCP_IPV6_HASH_EN 0x00080000 ++#define RX_MODE_RSS_ITBL_HASH_BITS_7 0x00700000 ++#define RX_MODE_RSS_ENABLE 0x00800000 ++#define RX_MODE_IPV6_CSUM_ENABLE 0x01000000 ++#define RX_MODE_IPV4_FRAG_FIX 0x02000000 ++#define MAC_RX_STATUS 0x0000046c ++#define RX_STATUS_REMOTE_TX_XOFFED 0x00000001 ++#define RX_STATUS_XOFF_RCVD 0x00000002 ++#define RX_STATUS_XON_RCVD 0x00000004 ++#define MAC_HASH_REG_0 0x00000470 ++#define MAC_HASH_REG_1 0x00000474 ++#define MAC_HASH_REG_2 0x00000478 ++#define MAC_HASH_REG_3 0x0000047c ++#define MAC_RCV_RULE_0 0x00000480 ++#define MAC_RCV_VALUE_0 0x00000484 ++#define MAC_RCV_RULE_1 0x00000488 ++#define MAC_RCV_VALUE_1 0x0000048c ++#define MAC_RCV_RULE_2 0x00000490 ++#define MAC_RCV_VALUE_2 0x00000494 ++#define MAC_RCV_RULE_3 0x00000498 ++#define MAC_RCV_VALUE_3 0x0000049c ++#define MAC_RCV_RULE_4 0x000004a0 ++#define MAC_RCV_VALUE_4 0x000004a4 ++#define MAC_RCV_RULE_5 0x000004a8 ++#define MAC_RCV_VALUE_5 0x000004ac ++#define MAC_RCV_RULE_6 0x000004b0 ++#define MAC_RCV_VALUE_6 0x000004b4 ++#define MAC_RCV_RULE_7 0x000004b8 ++#define MAC_RCV_VALUE_7 0x000004bc ++#define MAC_RCV_RULE_8 0x000004c0 ++#define MAC_RCV_VALUE_8 0x000004c4 ++#define MAC_RCV_RULE_9 0x000004c8 ++#define MAC_RCV_VALUE_9 0x000004cc ++#define MAC_RCV_RULE_10 0x000004d0 ++#define MAC_RCV_VALUE_10 0x000004d4 ++#define MAC_RCV_RULE_11 0x000004d8 ++#define MAC_RCV_VALUE_11 0x000004dc ++#define MAC_RCV_RULE_12 0x000004e0 ++#define MAC_RCV_VALUE_12 0x000004e4 ++#define MAC_RCV_RULE_13 0x000004e8 ++#define MAC_RCV_VALUE_13 0x000004ec ++#define MAC_RCV_RULE_14 0x000004f0 ++#define MAC_RCV_VALUE_14 0x000004f4 ++#define MAC_RCV_RULE_15 0x000004f8 ++#define MAC_RCV_VALUE_15 0x000004fc ++#define RCV_RULE_DISABLE_MASK 0x7fffffff ++#define MAC_RCV_RULE_CFG 0x00000500 ++#define RCV_RULE_CFG_DEFAULT_CLASS 0x00000008 ++#define MAC_LOW_WMARK_MAX_RX_FRAME 0x00000504 ++/* 0x508 --> 0x520 unused */ ++#define MAC_HASHREGU_0 0x00000520 ++#define MAC_HASHREGU_1 0x00000524 ++#define MAC_HASHREGU_2 0x00000528 ++#define MAC_HASHREGU_3 0x0000052c ++#define MAC_EXTADDR_0_HIGH 0x00000530 ++#define MAC_EXTADDR_0_LOW 0x00000534 ++#define MAC_EXTADDR_1_HIGH 0x00000538 ++#define MAC_EXTADDR_1_LOW 0x0000053c ++#define MAC_EXTADDR_2_HIGH 0x00000540 ++#define MAC_EXTADDR_2_LOW 0x00000544 ++#define MAC_EXTADDR_3_HIGH 0x00000548 ++#define MAC_EXTADDR_3_LOW 0x0000054c ++#define MAC_EXTADDR_4_HIGH 0x00000550 ++#define MAC_EXTADDR_4_LOW 0x00000554 ++#define MAC_EXTADDR_5_HIGH 0x00000558 ++#define MAC_EXTADDR_5_LOW 0x0000055c ++#define MAC_EXTADDR_6_HIGH 0x00000560 ++#define MAC_VRQ_ENABLE 0x00000560 ++#define MAC_VRQ_ENABLE_DFLT_VRQ 0x00000001 ++#define MAC_EXTADDR_6_LOW 0x00000564 ++#define MAC_EXTADDR_7_HIGH 0x00000568 ++#define MAC_EXTADDR_7_LOW 0x0000056c ++#define MAC_EXTADDR_8_HIGH 0x00000570 ++#define MAC_EXTADDR_8_LOW 0x00000574 ++#define MAC_EXTADDR_9_HIGH 0x00000578 ++#define MAC_EXTADDR_9_LOW 0x0000057c ++#define MAC_EXTADDR_10_HIGH 0x00000580 ++#define MAC_EXTADDR_10_LOW 0x00000584 ++#define MAC_EXTADDR_11_HIGH 0x00000588 ++#define MAC_EXTADDR_11_LOW 0x0000058c ++#define MAC_SERDES_CFG 0x00000590 ++#define MAC_SERDES_CFG_EDGE_SELECT 0x00001000 ++#define MAC_SERDES_STAT 0x00000594 ++/* 0x598 --> 0x5a0 unused */ ++#define MAC_PHYCFG1 0x000005a0 ++#define MAC_PHYCFG1_RGMII_INT 0x00000001 ++#define MAC_PHYCFG1_RXCLK_TO_MASK 0x00001ff0 ++#define MAC_PHYCFG1_RXCLK_TIMEOUT 0x00001000 ++#define MAC_PHYCFG1_TXCLK_TO_MASK 0x01ff0000 ++#define MAC_PHYCFG1_TXCLK_TIMEOUT 0x01000000 ++#define MAC_PHYCFG1_RGMII_EXT_RX_DEC 0x02000000 ++#define MAC_PHYCFG1_RGMII_SND_STAT_EN 0x04000000 ++#define MAC_PHYCFG1_TXC_DRV 0x20000000 ++#define MAC_PHYCFG2 0x000005a4 ++#define MAC_PHYCFG2_INBAND_ENABLE 0x00000001 ++#define MAC_PHYCFG2_EMODE_MASK_MASK 0x000001c0 ++#define MAC_PHYCFG2_EMODE_MASK_AC131 0x000000c0 ++#define MAC_PHYCFG2_EMODE_MASK_50610 0x00000100 ++#define MAC_PHYCFG2_EMODE_MASK_RT8211 0x00000000 ++#define MAC_PHYCFG2_EMODE_MASK_RT8201 0x000001c0 ++#define MAC_PHYCFG2_EMODE_COMP_MASK 0x00000e00 ++#define MAC_PHYCFG2_EMODE_COMP_AC131 0x00000600 ++#define MAC_PHYCFG2_EMODE_COMP_50610 0x00000400 ++#define MAC_PHYCFG2_EMODE_COMP_RT8211 0x00000800 ++#define MAC_PHYCFG2_EMODE_COMP_RT8201 0x00000000 ++#define MAC_PHYCFG2_FMODE_MASK_MASK 0x00007000 ++#define MAC_PHYCFG2_FMODE_MASK_AC131 0x00006000 ++#define MAC_PHYCFG2_FMODE_MASK_50610 0x00004000 ++#define MAC_PHYCFG2_FMODE_MASK_RT8211 0x00000000 ++#define MAC_PHYCFG2_FMODE_MASK_RT8201 0x00007000 ++#define MAC_PHYCFG2_FMODE_COMP_MASK 0x00038000 ++#define MAC_PHYCFG2_FMODE_COMP_AC131 0x00030000 ++#define MAC_PHYCFG2_FMODE_COMP_50610 0x00008000 ++#define MAC_PHYCFG2_FMODE_COMP_RT8211 0x00038000 ++#define MAC_PHYCFG2_FMODE_COMP_RT8201 0x00000000 ++#define MAC_PHYCFG2_GMODE_MASK_MASK 0x001c0000 ++#define MAC_PHYCFG2_GMODE_MASK_AC131 0x001c0000 ++#define MAC_PHYCFG2_GMODE_MASK_50610 0x00100000 ++#define MAC_PHYCFG2_GMODE_MASK_RT8211 0x00000000 ++#define MAC_PHYCFG2_GMODE_MASK_RT8201 0x001c0000 ++#define MAC_PHYCFG2_GMODE_COMP_MASK 0x00e00000 ++#define MAC_PHYCFG2_GMODE_COMP_AC131 0x00e00000 ++#define MAC_PHYCFG2_GMODE_COMP_50610 0x00000000 ++#define MAC_PHYCFG2_GMODE_COMP_RT8211 0x00200000 ++#define MAC_PHYCFG2_GMODE_COMP_RT8201 0x00000000 ++#define MAC_PHYCFG2_ACT_MASK_MASK 0x03000000 ++#define MAC_PHYCFG2_ACT_MASK_AC131 0x03000000 ++#define MAC_PHYCFG2_ACT_MASK_50610 0x01000000 ++#define MAC_PHYCFG2_ACT_MASK_RT8211 0x03000000 ++#define MAC_PHYCFG2_ACT_MASK_RT8201 0x01000000 ++#define MAC_PHYCFG2_ACT_COMP_MASK 0x0c000000 ++#define MAC_PHYCFG2_ACT_COMP_AC131 0x00000000 ++#define MAC_PHYCFG2_ACT_COMP_50610 0x00000000 ++#define MAC_PHYCFG2_ACT_COMP_RT8211 0x00000000 ++#define MAC_PHYCFG2_ACT_COMP_RT8201 0x08000000 ++#define MAC_PHYCFG2_QUAL_MASK_MASK 0x30000000 ++#define MAC_PHYCFG2_QUAL_MASK_AC131 0x30000000 ++#define MAC_PHYCFG2_QUAL_MASK_50610 0x30000000 ++#define MAC_PHYCFG2_QUAL_MASK_RT8211 0x30000000 ++#define MAC_PHYCFG2_QUAL_MASK_RT8201 0x30000000 ++#define MAC_PHYCFG2_QUAL_COMP_MASK 0xc0000000 ++#define MAC_PHYCFG2_QUAL_COMP_AC131 0x00000000 ++#define MAC_PHYCFG2_QUAL_COMP_50610 0x00000000 ++#define MAC_PHYCFG2_QUAL_COMP_RT8211 0x00000000 ++#define MAC_PHYCFG2_QUAL_COMP_RT8201 0x00000000 ++#define MAC_PHYCFG2_50610_LED_MODES \ ++ (MAC_PHYCFG2_EMODE_MASK_50610 | \ ++ MAC_PHYCFG2_EMODE_COMP_50610 | \ ++ MAC_PHYCFG2_FMODE_MASK_50610 | \ ++ MAC_PHYCFG2_FMODE_COMP_50610 | \ ++ MAC_PHYCFG2_GMODE_MASK_50610 | \ ++ MAC_PHYCFG2_GMODE_COMP_50610 | \ ++ MAC_PHYCFG2_ACT_MASK_50610 | \ ++ MAC_PHYCFG2_ACT_COMP_50610 | \ ++ MAC_PHYCFG2_QUAL_MASK_50610 | \ ++ MAC_PHYCFG2_QUAL_COMP_50610) ++#define MAC_PHYCFG2_AC131_LED_MODES \ ++ (MAC_PHYCFG2_EMODE_MASK_AC131 | \ ++ MAC_PHYCFG2_EMODE_COMP_AC131 | \ ++ MAC_PHYCFG2_FMODE_MASK_AC131 | \ ++ MAC_PHYCFG2_FMODE_COMP_AC131 | \ ++ MAC_PHYCFG2_GMODE_MASK_AC131 | \ ++ MAC_PHYCFG2_GMODE_COMP_AC131 | \ ++ MAC_PHYCFG2_ACT_MASK_AC131 | \ ++ MAC_PHYCFG2_ACT_COMP_AC131 | \ ++ MAC_PHYCFG2_QUAL_MASK_AC131 | \ ++ MAC_PHYCFG2_QUAL_COMP_AC131) ++#define MAC_PHYCFG2_RTL8211C_LED_MODES \ ++ (MAC_PHYCFG2_EMODE_MASK_RT8211 | \ ++ MAC_PHYCFG2_EMODE_COMP_RT8211 | \ ++ MAC_PHYCFG2_FMODE_MASK_RT8211 | \ ++ MAC_PHYCFG2_FMODE_COMP_RT8211 | \ ++ MAC_PHYCFG2_GMODE_MASK_RT8211 | \ ++ MAC_PHYCFG2_GMODE_COMP_RT8211 | \ ++ MAC_PHYCFG2_ACT_MASK_RT8211 | \ ++ MAC_PHYCFG2_ACT_COMP_RT8211 | \ ++ MAC_PHYCFG2_QUAL_MASK_RT8211 | \ ++ MAC_PHYCFG2_QUAL_COMP_RT8211) ++#define MAC_PHYCFG2_RTL8201E_LED_MODES \ ++ (MAC_PHYCFG2_EMODE_MASK_RT8201 | \ ++ MAC_PHYCFG2_EMODE_COMP_RT8201 | \ ++ MAC_PHYCFG2_FMODE_MASK_RT8201 | \ ++ MAC_PHYCFG2_FMODE_COMP_RT8201 | \ ++ MAC_PHYCFG2_GMODE_MASK_RT8201 | \ ++ MAC_PHYCFG2_GMODE_COMP_RT8201 | \ ++ MAC_PHYCFG2_ACT_MASK_RT8201 | \ ++ MAC_PHYCFG2_ACT_COMP_RT8201 | \ ++ MAC_PHYCFG2_QUAL_MASK_RT8201 | \ ++ MAC_PHYCFG2_QUAL_COMP_RT8201) ++#define MAC_EXT_RGMII_MODE 0x000005a8 ++#define MAC_RGMII_MODE_TX_ENABLE 0x00000001 ++#define MAC_RGMII_MODE_TX_LOWPWR 0x00000002 ++#define MAC_RGMII_MODE_TX_RESET 0x00000004 ++#define MAC_RGMII_MODE_RX_INT_B 0x00000100 ++#define MAC_RGMII_MODE_RX_QUALITY 0x00000200 ++#define MAC_RGMII_MODE_RX_ACTIVITY 0x00000400 ++#define MAC_RGMII_MODE_RX_ENG_DET 0x00000800 ++/* 0x5ac --> 0x5b0 unused */ ++#define SERDES_RX_CTRL 0x000005b0 /* 5780/5714 only */ ++#define SERDES_RX_SIG_DETECT 0x00000400 ++#define SG_DIG_CTRL 0x000005b0 ++#define SG_DIG_USING_HW_AUTONEG 0x80000000 ++#define SG_DIG_SOFT_RESET 0x40000000 ++#define SG_DIG_DISABLE_LINKRDY 0x20000000 ++#define SG_DIG_CRC16_CLEAR_N 0x01000000 ++#define SG_DIG_EN10B 0x00800000 ++#define SG_DIG_CLEAR_STATUS 0x00400000 ++#define SG_DIG_LOCAL_DUPLEX_STATUS 0x00200000 ++#define SG_DIG_LOCAL_LINK_STATUS 0x00100000 ++#define SG_DIG_SPEED_STATUS_MASK 0x000c0000 ++#define SG_DIG_SPEED_STATUS_SHIFT 18 ++#define SG_DIG_JUMBO_PACKET_DISABLE 0x00020000 ++#define SG_DIG_RESTART_AUTONEG 0x00010000 ++#define SG_DIG_FIBER_MODE 0x00008000 ++#define SG_DIG_REMOTE_FAULT_MASK 0x00006000 ++#define SG_DIG_PAUSE_MASK 0x00001800 ++#define SG_DIG_PAUSE_CAP 0x00000800 ++#define SG_DIG_ASYM_PAUSE 0x00001000 ++#define SG_DIG_GBIC_ENABLE 0x00000400 ++#define SG_DIG_CHECK_END_ENABLE 0x00000200 ++#define SG_DIG_SGMII_AUTONEG_TIMER 0x00000100 ++#define SG_DIG_CLOCK_PHASE_SELECT 0x00000080 ++#define SG_DIG_GMII_INPUT_SELECT 0x00000040 ++#define SG_DIG_MRADV_CRC16_SELECT 0x00000020 ++#define SG_DIG_COMMA_DETECT_ENABLE 0x00000010 ++#define SG_DIG_AUTONEG_TIMER_REDUCE 0x00000008 ++#define SG_DIG_AUTONEG_LOW_ENABLE 0x00000004 ++#define SG_DIG_REMOTE_LOOPBACK 0x00000002 ++#define SG_DIG_LOOPBACK 0x00000001 ++#define SG_DIG_COMMON_SETUP (SG_DIG_CRC16_CLEAR_N | \ ++ SG_DIG_LOCAL_DUPLEX_STATUS | \ ++ SG_DIG_LOCAL_LINK_STATUS | \ ++ (0x2 << SG_DIG_SPEED_STATUS_SHIFT) | \ ++ SG_DIG_FIBER_MODE | SG_DIG_GBIC_ENABLE) ++#define SG_DIG_STATUS 0x000005b4 ++#define SG_DIG_CRC16_BUS_MASK 0xffff0000 ++#define SG_DIG_PARTNER_FAULT_MASK 0x00600000 /* If !MRADV_CRC16_SELECT */ ++#define SG_DIG_PARTNER_ASYM_PAUSE 0x00100000 /* If !MRADV_CRC16_SELECT */ ++#define SG_DIG_PARTNER_PAUSE_CAPABLE 0x00080000 /* If !MRADV_CRC16_SELECT */ ++#define SG_DIG_PARTNER_HALF_DUPLEX 0x00040000 /* If !MRADV_CRC16_SELECT */ ++#define SG_DIG_PARTNER_FULL_DUPLEX 0x00020000 /* If !MRADV_CRC16_SELECT */ ++#define SG_DIG_PARTNER_NEXT_PAGE 0x00010000 /* If !MRADV_CRC16_SELECT */ ++#define SG_DIG_AUTONEG_STATE_MASK 0x00000ff0 ++#define SG_DIG_IS_SERDES 0x00000100 ++#define SG_DIG_COMMA_DETECTOR 0x00000008 ++#define SG_DIG_MAC_ACK_STATUS 0x00000004 ++#define SG_DIG_AUTONEG_COMPLETE 0x00000002 ++#define SG_DIG_AUTONEG_ERROR 0x00000001 ++#define TG3_TX_TSTAMP_LSB 0x000005c0 ++#define TG3_TX_TSTAMP_MSB 0x000005c4 ++#define TG3_TSTAMP_MASK 0x7fffffffffffffff ++/* 0x5c8 --> 0x600 unused */ ++#define MAC_TX_MAC_STATE_BASE 0x00000600 /* 16 bytes */ ++#define MAC_RX_MAC_STATE_BASE 0x00000610 /* 20 bytes */ ++/* 0x624 --> 0x670 unused */ ++ ++#define MAC_RSS_INDIR_TBL_0 0x00000630 ++ ++#define MAC_RSS_HASH_KEY_0 0x00000670 ++#define MAC_RSS_HASH_KEY_1 0x00000674 ++#define MAC_RSS_HASH_KEY_2 0x00000678 ++#define MAC_RSS_HASH_KEY_3 0x0000067c ++#define MAC_RSS_HASH_KEY_4 0x00000680 ++#define MAC_RSS_HASH_KEY_5 0x00000684 ++#define MAC_RSS_HASH_KEY_6 0x00000688 ++#define MAC_RSS_HASH_KEY_7 0x0000068c ++#define MAC_RSS_HASH_KEY_8 0x00000690 ++#define MAC_RSS_HASH_KEY_9 0x00000694 ++/* 0x698 --> 0x6b0 unused */ ++ ++#define TG3_RX_TSTAMP_LSB 0x000006b0 ++#define TG3_RX_TSTAMP_MSB 0x000006b4 ++/* 0x6b8 --> 0x6c8 unused */ ++ ++#define TG3_RX_PTP_CTL 0x000006c8 ++#define TG3_RX_PTP_CTL_SYNC_EVNT 0x00000001 ++#define TG3_RX_PTP_CTL_DELAY_REQ 0x00000002 ++#define TG3_RX_PTP_CTL_PDLAY_REQ 0x00000004 ++#define TG3_RX_PTP_CTL_PDLAY_RES 0x00000008 ++#define TG3_RX_PTP_CTL_ALL_V1_EVENTS (TG3_RX_PTP_CTL_SYNC_EVNT | \ ++ TG3_RX_PTP_CTL_DELAY_REQ) ++#define TG3_RX_PTP_CTL_ALL_V2_EVENTS (TG3_RX_PTP_CTL_SYNC_EVNT | \ ++ TG3_RX_PTP_CTL_DELAY_REQ | \ ++ TG3_RX_PTP_CTL_PDLAY_REQ | \ ++ TG3_RX_PTP_CTL_PDLAY_RES) ++#define TG3_RX_PTP_CTL_FOLLOW_UP 0x00000100 ++#define TG3_RX_PTP_CTL_DELAY_RES 0x00000200 ++#define TG3_RX_PTP_CTL_PDRES_FLW_UP 0x00000400 ++#define TG3_RX_PTP_CTL_ANNOUNCE 0x00000800 ++#define TG3_RX_PTP_CTL_SIGNALING 0x00001000 ++#define TG3_RX_PTP_CTL_MANAGEMENT 0x00002000 ++#define TG3_RX_PTP_CTL_RX_PTP_V2_L2_EN 0x00800000 ++#define TG3_RX_PTP_CTL_RX_PTP_V2_L4_EN 0x01000000 ++#define TG3_RX_PTP_CTL_RX_PTP_V2_EN (TG3_RX_PTP_CTL_RX_PTP_V2_L2_EN | \ ++ TG3_RX_PTP_CTL_RX_PTP_V2_L4_EN) ++#define TG3_RX_PTP_CTL_RX_PTP_V1_EN 0x02000000 ++#define TG3_RX_PTP_CTL_HWTS_INTERLOCK 0x04000000 ++/* 0x6cc --> 0x800 unused */ ++ ++#define MAC_TX_STATS_OCTETS 0x00000800 ++#define MAC_TX_STATS_RESV1 0x00000804 ++#define MAC_TX_STATS_COLLISIONS 0x00000808 ++#define MAC_TX_STATS_XON_SENT 0x0000080c ++#define MAC_TX_STATS_XOFF_SENT 0x00000810 ++#define MAC_TX_STATS_RESV2 0x00000814 ++#define MAC_TX_STATS_MAC_ERRORS 0x00000818 ++#define MAC_TX_STATS_SINGLE_COLLISIONS 0x0000081c ++#define MAC_TX_STATS_MULT_COLLISIONS 0x00000820 ++#define MAC_TX_STATS_DEFERRED 0x00000824 ++#define MAC_TX_STATS_RESV3 0x00000828 ++#define MAC_TX_STATS_EXCESSIVE_COL 0x0000082c ++#define MAC_TX_STATS_LATE_COL 0x00000830 ++#define MAC_TX_STATS_RESV4_1 0x00000834 ++#define MAC_TX_STATS_RESV4_2 0x00000838 ++#define MAC_TX_STATS_RESV4_3 0x0000083c ++#define MAC_TX_STATS_RESV4_4 0x00000840 ++#define MAC_TX_STATS_RESV4_5 0x00000844 ++#define MAC_TX_STATS_RESV4_6 0x00000848 ++#define MAC_TX_STATS_RESV4_7 0x0000084c ++#define MAC_TX_STATS_RESV4_8 0x00000850 ++#define MAC_TX_STATS_RESV4_9 0x00000854 ++#define MAC_TX_STATS_RESV4_10 0x00000858 ++#define MAC_TX_STATS_RESV4_11 0x0000085c ++#define MAC_TX_STATS_RESV4_12 0x00000860 ++#define MAC_TX_STATS_RESV4_13 0x00000864 ++#define MAC_TX_STATS_RESV4_14 0x00000868 ++#define MAC_TX_STATS_UCAST 0x0000086c ++#define MAC_TX_STATS_MCAST 0x00000870 ++#define MAC_TX_STATS_BCAST 0x00000874 ++#define MAC_TX_STATS_RESV5_1 0x00000878 ++#define MAC_TX_STATS_RESV5_2 0x0000087c ++#define MAC_RX_STATS_OCTETS 0x00000880 ++#define MAC_RX_STATS_RESV1 0x00000884 ++#define MAC_RX_STATS_FRAGMENTS 0x00000888 ++#define MAC_RX_STATS_UCAST 0x0000088c ++#define MAC_RX_STATS_MCAST 0x00000890 ++#define MAC_RX_STATS_BCAST 0x00000894 ++#define MAC_RX_STATS_FCS_ERRORS 0x00000898 ++#define MAC_RX_STATS_ALIGN_ERRORS 0x0000089c ++#define MAC_RX_STATS_XON_PAUSE_RECVD 0x000008a0 ++#define MAC_RX_STATS_XOFF_PAUSE_RECVD 0x000008a4 ++#define MAC_RX_STATS_MAC_CTRL_RECVD 0x000008a8 ++#define MAC_RX_STATS_XOFF_ENTERED 0x000008ac ++#define MAC_RX_STATS_FRAME_TOO_LONG 0x000008b0 ++#define MAC_RX_STATS_JABBERS 0x000008b4 ++#define MAC_RX_STATS_UNDERSIZE 0x000008b8 ++/* 0x8bc --> 0xc00 unused */ ++ ++/* Send data initiator control registers */ ++#define SNDDATAI_MODE 0x00000c00 ++#define SNDDATAI_MODE_RESET 0x00000001 ++#define SNDDATAI_MODE_ENABLE 0x00000002 ++#define SNDDATAI_MODE_STAT_OFLOW_ENAB 0x00000004 ++#define SNDDATAI_STATUS 0x00000c04 ++#define SNDDATAI_STATUS_STAT_OFLOW 0x00000004 ++#define SNDDATAI_STATSCTRL 0x00000c08 ++#define SNDDATAI_SCTRL_ENABLE 0x00000001 ++#define SNDDATAI_SCTRL_FASTUPD 0x00000002 ++#define SNDDATAI_SCTRL_CLEAR 0x00000004 ++#define SNDDATAI_SCTRL_FLUSH 0x00000008 ++#define SNDDATAI_SCTRL_FORCE_ZERO 0x00000010 ++#define SNDDATAI_STATSENAB 0x00000c0c ++#define SNDDATAI_STATSINCMASK 0x00000c10 ++#define ISO_PKT_TX 0x00000c20 ++/* 0xc24 --> 0xc80 unused */ ++#define SNDDATAI_COS_CNT_0 0x00000c80 ++#define SNDDATAI_COS_CNT_1 0x00000c84 ++#define SNDDATAI_COS_CNT_2 0x00000c88 ++#define SNDDATAI_COS_CNT_3 0x00000c8c ++#define SNDDATAI_COS_CNT_4 0x00000c90 ++#define SNDDATAI_COS_CNT_5 0x00000c94 ++#define SNDDATAI_COS_CNT_6 0x00000c98 ++#define SNDDATAI_COS_CNT_7 0x00000c9c ++#define SNDDATAI_COS_CNT_8 0x00000ca0 ++#define SNDDATAI_COS_CNT_9 0x00000ca4 ++#define SNDDATAI_COS_CNT_10 0x00000ca8 ++#define SNDDATAI_COS_CNT_11 0x00000cac ++#define SNDDATAI_COS_CNT_12 0x00000cb0 ++#define SNDDATAI_COS_CNT_13 0x00000cb4 ++#define SNDDATAI_COS_CNT_14 0x00000cb8 ++#define SNDDATAI_COS_CNT_15 0x00000cbc ++#define SNDDATAI_DMA_RDQ_FULL_CNT 0x00000cc0 ++#define SNDDATAI_DMA_PRIO_RDQ_FULL_CNT 0x00000cc4 ++#define SNDDATAI_SDCQ_FULL_CNT 0x00000cc8 ++#define SNDDATAI_NICRNG_SSND_PIDX_CNT 0x00000ccc ++#define SNDDATAI_STATS_UPDATED_CNT 0x00000cd0 ++#define SNDDATAI_INTERRUPTS_CNT 0x00000cd4 ++#define SNDDATAI_AVOID_INTERRUPTS_CNT 0x00000cd8 ++#define SNDDATAI_SND_THRESH_HIT_CNT 0x00000cdc ++/* 0xce0 --> 0x1000 unused */ ++ ++/* Send data completion control registers */ ++#define SNDDATAC_MODE 0x00001000 ++#define SNDDATAC_MODE_RESET 0x00000001 ++#define SNDDATAC_MODE_ENABLE 0x00000002 ++#define SNDDATAC_MODE_CDELAY 0x00000010 ++/* 0x1004 --> 0x1400 unused */ ++ ++/* Send BD ring selector */ ++#define SNDBDS_MODE 0x00001400 ++#define SNDBDS_MODE_RESET 0x00000001 ++#define SNDBDS_MODE_ENABLE 0x00000002 ++#define SNDBDS_MODE_ATTN_ENABLE 0x00000004 ++#define SNDBDS_STATUS 0x00001404 ++#define SNDBDS_STATUS_ERROR_ATTN 0x00000004 ++#define SNDBDS_HWDIAG 0x00001408 ++/* 0x140c --> 0x1440 */ ++#define SNDBDS_SEL_CON_IDX_0 0x00001440 ++#define SNDBDS_SEL_CON_IDX_1 0x00001444 ++#define SNDBDS_SEL_CON_IDX_2 0x00001448 ++#define SNDBDS_SEL_CON_IDX_3 0x0000144c ++#define SNDBDS_SEL_CON_IDX_4 0x00001450 ++#define SNDBDS_SEL_CON_IDX_5 0x00001454 ++#define SNDBDS_SEL_CON_IDX_6 0x00001458 ++#define SNDBDS_SEL_CON_IDX_7 0x0000145c ++#define SNDBDS_SEL_CON_IDX_8 0x00001460 ++#define SNDBDS_SEL_CON_IDX_9 0x00001464 ++#define SNDBDS_SEL_CON_IDX_10 0x00001468 ++#define SNDBDS_SEL_CON_IDX_11 0x0000146c ++#define SNDBDS_SEL_CON_IDX_12 0x00001470 ++#define SNDBDS_SEL_CON_IDX_13 0x00001474 ++#define SNDBDS_SEL_CON_IDX_14 0x00001478 ++#define SNDBDS_SEL_CON_IDX_15 0x0000147c ++/* 0x1480 --> 0x1800 unused */ ++ ++/* Send BD initiator control registers */ ++#define SNDBDI_MODE 0x00001800 ++#define SNDBDI_MODE_RESET 0x00000001 ++#define SNDBDI_MODE_ENABLE 0x00000002 ++#define SNDBDI_MODE_ATTN_ENABLE 0x00000004 ++#define SNDBDI_MODE_MULTI_TXQ_EN 0x00000020 ++#define SNDBDI_STATUS 0x00001804 ++#define SNDBDI_STATUS_ERROR_ATTN 0x00000004 ++#define SNDBDI_IN_PROD_IDX_0 0x00001808 ++#define SNDBDI_IN_PROD_IDX_1 0x0000180c ++#define SNDBDI_IN_PROD_IDX_2 0x00001810 ++#define SNDBDI_IN_PROD_IDX_3 0x00001814 ++#define SNDBDI_IN_PROD_IDX_4 0x00001818 ++#define SNDBDI_IN_PROD_IDX_5 0x0000181c ++#define SNDBDI_IN_PROD_IDX_6 0x00001820 ++#define SNDBDI_IN_PROD_IDX_7 0x00001824 ++#define SNDBDI_IN_PROD_IDX_8 0x00001828 ++#define SNDBDI_IN_PROD_IDX_9 0x0000182c ++#define SNDBDI_IN_PROD_IDX_10 0x00001830 ++#define SNDBDI_IN_PROD_IDX_11 0x00001834 ++#define SNDBDI_IN_PROD_IDX_12 0x00001838 ++#define SNDBDI_IN_PROD_IDX_13 0x0000183c ++#define SNDBDI_IN_PROD_IDX_14 0x00001840 ++#define SNDBDI_IN_PROD_IDX_15 0x00001844 ++/* 0x1848 --> 0x1c00 unused */ ++ ++/* Send BD completion control registers */ ++#define SNDBDC_MODE 0x00001c00 ++#define SNDBDC_MODE_RESET 0x00000001 ++#define SNDBDC_MODE_ENABLE 0x00000002 ++#define SNDBDC_MODE_ATTN_ENABLE 0x00000004 ++/* 0x1c04 --> 0x2000 unused */ ++ ++/* Receive list placement control registers */ ++#define RCVLPC_MODE 0x00002000 ++#define RCVLPC_MODE_RESET 0x00000001 ++#define RCVLPC_MODE_ENABLE 0x00000002 ++#define RCVLPC_MODE_CLASS0_ATTN_ENAB 0x00000004 ++#define RCVLPC_MODE_MAPOOR_AATTN_ENAB 0x00000008 ++#define RCVLPC_MODE_STAT_OFLOW_ENAB 0x00000010 ++#define RCVLPC_STATUS 0x00002004 ++#define RCVLPC_STATUS_CLASS0 0x00000004 ++#define RCVLPC_STATUS_MAPOOR 0x00000008 ++#define RCVLPC_STATUS_STAT_OFLOW 0x00000010 ++#define RCVLPC_LOCK 0x00002008 ++#define RCVLPC_LOCK_REQ_MASK 0x0000ffff ++#define RCVLPC_LOCK_REQ_SHIFT 0 ++#define RCVLPC_LOCK_GRANT_MASK 0xffff0000 ++#define RCVLPC_LOCK_GRANT_SHIFT 16 ++#define RCVLPC_NON_EMPTY_BITS 0x0000200c ++#define RCVLPC_NON_EMPTY_BITS_MASK 0x0000ffff ++#define RCVLPC_CONFIG 0x00002010 ++#define RCVLPC_STATSCTRL 0x00002014 ++#define RCVLPC_STATSCTRL_ENABLE 0x00000001 ++#define RCVLPC_STATSCTRL_FASTUPD 0x00000002 ++#define RCVLPC_STATS_ENABLE 0x00002018 ++#define RCVLPC_STATSENAB_ASF_FIX 0x00000002 ++#define RCVLPC_STATSENAB_DACK_FIX 0x00040000 ++#define RCVLPC_STATSENAB_LNGBRST_RFIX 0x00400000 ++#define RCVLPC_STATS_INCMASK 0x0000201c ++/* 0x2020 --> 0x2100 unused */ ++#define RCVLPC_SELLST_BASE 0x00002100 /* 16 16-byte entries */ ++#define SELLST_TAIL 0x00000004 ++#define SELLST_CONT 0x00000008 ++#define SELLST_UNUSED 0x0000000c ++#define RCVLPC_COS_CNTL_BASE 0x00002200 /* 16 4-byte entries */ ++#define RCVLPC_DROP_FILTER_CNT 0x00002240 ++#define RCVLPC_DMA_WQ_FULL_CNT 0x00002244 ++#define RCVLPC_DMA_HIPRIO_WQ_FULL_CNT 0x00002248 ++#define RCVLPC_NO_RCV_BD_CNT 0x0000224c ++#define RCVLPC_IN_DISCARDS_CNT 0x00002250 ++#define RCVLPC_IN_ERRORS_CNT 0x00002254 ++#define RCVLPC_RCV_THRESH_HIT_CNT 0x00002258 ++/* 0x225c --> 0x2400 unused */ ++ ++/* Receive Data and Receive BD Initiator Control */ ++#define RCVDBDI_MODE 0x00002400 ++#define RCVDBDI_MODE_RESET 0x00000001 ++#define RCVDBDI_MODE_ENABLE 0x00000002 ++#define RCVDBDI_MODE_JUMBOBD_NEEDED 0x00000004 ++#define RCVDBDI_MODE_FRM_TOO_BIG 0x00000008 ++#define RCVDBDI_MODE_INV_RING_SZ 0x00000010 ++#define RCVDBDI_MODE_LRG_RING_SZ 0x00010000 ++#define RCVDBDI_STATUS 0x00002404 ++#define RCVDBDI_STATUS_JUMBOBD_NEEDED 0x00000004 ++#define RCVDBDI_STATUS_FRM_TOO_BIG 0x00000008 ++#define RCVDBDI_STATUS_INV_RING_SZ 0x00000010 ++#define RCVDBDI_SPLIT_FRAME_MINSZ 0x00002408 ++#define VRQ_STATUS 0x0000240c ++#define VRQ_FLUSH_CTRL 0x00002410 ++#define VRQ_FLUSH_ENABLE 0x00000001 ++#define VRQ_FLUSH_RESET_ENABLE 0x00000002 ++#define VRQ_FLUSH_STATUPDT_INT_ENABLE 0x00000004 ++#define VRQ_FLUSH_DISCARD_PKT_ENABLE 0x00000008 ++#define VRQ_FLUSH_SW_FLUSH 0x00000100 ++/* 0x2414 --> 0x2440 unused */ ++ ++#define RCVDBDI_JUMBO_BD 0x00002440 /* TG3_BDINFO_... */ ++#define RCVDBDI_STD_BD 0x00002450 /* TG3_BDINFO_... */ ++#define RCVDBDI_MINI_BD 0x00002460 /* TG3_BDINFO_... */ ++#define RCVDBDI_JUMBO_CON_IDX 0x00002470 ++#define RCVDBDI_STD_CON_IDX 0x00002474 ++#define RCVDBDI_MINI_CON_IDX 0x00002478 ++/* 0x247c --> 0x2480 unused */ ++#define RCVDBDI_BD_PROD_IDX_0 0x00002480 ++#define RCVDBDI_BD_PROD_IDX_1 0x00002484 ++#define RCVDBDI_BD_PROD_IDX_2 0x00002488 ++#define RCVDBDI_BD_PROD_IDX_3 0x0000248c ++#define RCVDBDI_BD_PROD_IDX_4 0x00002490 ++#define RCVDBDI_BD_PROD_IDX_5 0x00002494 ++#define RCVDBDI_BD_PROD_IDX_6 0x00002498 ++#define RCVDBDI_BD_PROD_IDX_7 0x0000249c ++#define RCVDBDI_BD_PROD_IDX_8 0x000024a0 ++#define RCVDBDI_BD_PROD_IDX_9 0x000024a4 ++#define RCVDBDI_BD_PROD_IDX_10 0x000024a8 ++#define RCVDBDI_BD_PROD_IDX_11 0x000024ac ++#define RCVDBDI_BD_PROD_IDX_12 0x000024b0 ++#define RCVDBDI_BD_PROD_IDX_13 0x000024b4 ++#define RCVDBDI_BD_PROD_IDX_14 0x000024b8 ++#define RCVDBDI_BD_PROD_IDX_15 0x000024bc ++#define RCVDBDI_HWDIAG 0x000024c0 ++/* 0x24c4 --> 0x2800 unused */ ++ ++#define RCVDBDI_JMB_BD_RING1 0x00002500 ++/* 0x2504 --> 0x2800 unused */ ++ ++/* Receive Data Completion Control */ ++#define RCVDCC_MODE 0x00002800 ++#define RCVDCC_MODE_RESET 0x00000001 ++#define RCVDCC_MODE_ENABLE 0x00000002 ++#define RCVDCC_MODE_ATTN_ENABLE 0x00000004 ++/* 0x2804 --> 0x2c00 unused */ ++ ++/* Receive BD Initiator Control Registers */ ++#define RCVBDI_MODE 0x00002c00 ++#define RCVBDI_MODE_RESET 0x00000001 ++#define RCVBDI_MODE_ENABLE 0x00000002 ++#define RCVBDI_MODE_RCB_ATTN_ENAB 0x00000004 ++#define RCVBDI_STATUS 0x00002c04 ++#define RCVBDI_STATUS_RCB_ATTN 0x00000004 ++#define RCVBDI_JUMBO_PROD_IDX 0x00002c08 ++#define RCVBDI_STD_PROD_IDX 0x00002c0c ++#define RCVBDI_MINI_PROD_IDX 0x00002c10 ++#define RCVBDI_MINI_THRESH 0x00002c14 ++#define RCVBDI_STD_THRESH 0x00002c18 ++#define RCVBDI_JUMBO_THRESH 0x00002c1c ++/* 0x2c20 --> 0x2d00 unused */ ++ ++#define STD_REPLENISH_LWM 0x00002d00 ++#define JMB_REPLENISH_LWM 0x00002d04 ++/* 0x2d08 --> 0x3000 unused */ ++ ++/* Receive BD Completion Control Registers */ ++#define RCVCC_MODE 0x00003000 ++#define RCVCC_MODE_RESET 0x00000001 ++#define RCVCC_MODE_ENABLE 0x00000002 ++#define RCVCC_MODE_ATTN_ENABLE 0x00000004 ++#define RCVCC_STATUS 0x00003004 ++#define RCVCC_STATUS_ERROR_ATTN 0x00000004 ++#define RCVCC_JUMP_PROD_IDX 0x00003008 ++#define RCVCC_STD_PROD_IDX 0x0000300c ++#define RCVCC_MINI_PROD_IDX 0x00003010 ++/* 0x3014 --> 0x3400 unused */ ++ ++/* Receive list selector control registers */ ++#define RCVLSC_MODE 0x00003400 ++#define RCVLSC_MODE_RESET 0x00000001 ++#define RCVLSC_MODE_ENABLE 0x00000002 ++#define RCVLSC_MODE_ATTN_ENABLE 0x00000004 ++#define RCVLSC_STATUS 0x00003404 ++#define RCVLSC_STATUS_ERROR_ATTN 0x00000004 ++/* 0x3408 --> 0x3600 unused */ ++ ++#define TG3_CPMU_DRV_STATUS 0x0000344c ++ ++/* CPMU registers */ ++#define TG3_CPMU_CTRL 0x00003600 ++#define CPMU_CTRL_LINK_IDLE_MODE 0x00000200 ++#define CPMU_CTRL_LINK_AWARE_MODE 0x00000400 ++#define CPMU_CTRL_LINK_SPEED_MODE 0x00004000 ++#define CPMU_CTRL_GPHY_10MB_RXONLY 0x00010000 ++#define TG3_CPMU_LSPD_10MB_CLK 0x00003604 ++#define CPMU_LSPD_10MB_MACCLK_MASK 0x001f0000 ++#define CPMU_LSPD_10MB_MACCLK_6_25 0x00130000 ++/* 0x3608 --> 0x360c unused */ ++ ++#define TG3_CPMU_LSPD_1000MB_CLK 0x0000360c ++#define CPMU_LSPD_1000MB_MACCLK_62_5 0x00000000 ++#define CPMU_LSPD_1000MB_MACCLK_12_5 0x00110000 ++#define CPMU_LSPD_1000MB_MACCLK_MASK 0x001f0000 ++#define TG3_CPMU_LNK_AWARE_PWRMD 0x00003610 ++#define CPMU_LNK_AWARE_MACCLK_MASK 0x001f0000 ++#define CPMU_LNK_AWARE_MACCLK_6_25 0x00130000 ++/* 0x3614 --> 0x361c unused */ ++ ++#define TG3_CPMU_HST_ACC 0x0000361c ++#define CPMU_HST_ACC_MACCLK_MASK 0x001f0000 ++#define CPMU_HST_ACC_MACCLK_6_25 0x00130000 ++/* 0x3620 --> 0x3630 unused */ ++ ++#define TG3_CPMU_CLCK_ORIDE 0x00003624 ++#define CPMU_CLCK_ORIDE_MAC_ORIDE_EN 0x80000000 ++ ++#define TG3_CPMU_CLCK_ORIDE_ENABLE 0x00003628 ++#define TG3_CPMU_MAC_ORIDE_ENABLE (1 << 13) ++ ++#define TG3_CPMU_STATUS 0x0000362c ++#define TG3_CPMU_STATUS_FMSK_5717 0x20000000 ++#define TG3_CPMU_STATUS_FMSK_5719 0xc0000000 ++#define TG3_CPMU_STATUS_FSHFT_5719 30 ++#define TG3_CPMU_STATUS_LINK_MASK 0x180000 ++ ++#define TG3_CPMU_CLCK_STAT 0x00003630 ++#define CPMU_CLCK_STAT_MAC_CLCK_MASK 0x001f0000 ++#define CPMU_CLCK_STAT_MAC_CLCK_62_5 0x00000000 ++#define CPMU_CLCK_STAT_MAC_CLCK_12_5 0x00110000 ++#define CPMU_CLCK_STAT_MAC_CLCK_6_25 0x00130000 ++/* 0x3634 --> 0x365c unused */ ++ ++#define TG3_CPMU_MUTEX_REQ 0x0000365c ++#define CPMU_MUTEX_REQ_DRIVER 0x00001000 ++#define TG3_CPMU_MUTEX_GNT 0x00003660 ++#define CPMU_MUTEX_GNT_DRIVER 0x00001000 ++#define TG3_CPMU_PHY_STRAP 0x00003664 ++#define TG3_CPMU_PHY_STRAP_IS_SERDES 0x00000020 ++#define TG3_CPMU_PADRNG_CTL 0x00003668 ++#define TG3_CPMU_PADRNG_CTL_RDIV2 0x00040000 ++/* 0x3664 --> 0x36b0 unused */ ++ ++#define TG3_CPMU_EEE_MODE 0x000036b0 ++#define TG3_CPMU_EEEMD_APE_TX_DET_EN 0x00000004 ++#define TG3_CPMU_EEEMD_ERLY_L1_XIT_DET 0x00000008 ++#define TG3_CPMU_EEEMD_SND_IDX_DET_EN 0x00000040 ++#define TG3_CPMU_EEEMD_LPI_ENABLE 0x00000080 ++#define TG3_CPMU_EEEMD_LPI_IN_TX 0x00000100 ++#define TG3_CPMU_EEEMD_LPI_IN_RX 0x00000200 ++#define TG3_CPMU_EEEMD_EEE_ENABLE 0x00100000 ++#define TG3_CPMU_EEE_DBTMR1 0x000036b4 ++#define TG3_CPMU_DBTMR1_PCIEXIT_2047US 0x07ff0000 ++#define TG3_CPMU_DBTMR1_LNKIDLE_2047US 0x000007ff ++#define TG3_CPMU_DBTMR1_LNKIDLE_MAX 0x0000ffff ++#define TG3_CPMU_EEE_DBTMR2 0x000036b8 ++#define TG3_CPMU_DBTMR2_APE_TX_2047US 0x07ff0000 ++#define TG3_CPMU_DBTMR2_TXIDXEQ_2047US 0x000007ff ++#define TG3_CPMU_EEE_LNKIDL_CTRL 0x000036bc ++#define TG3_CPMU_EEE_LNKIDL_PCIE_NL0 0x01000000 ++#define TG3_CPMU_EEE_LNKIDL_UART_IDL 0x00000004 ++#define TG3_CPMU_EEE_LNKIDL_APE_TX_MT 0x00000002 ++/* 0x36c0 --> 0x36d0 unused */ ++ ++#define TG3_CPMU_EEE_CTRL 0x000036d0 ++#define TG3_CPMU_EEE_CTRL_EXIT_16_5_US 0x0000019d ++#define TG3_CPMU_EEE_CTRL_EXIT_36_US 0x00000384 ++#define TG3_CPMU_EEE_CTRL_EXIT_20_1_US 0x000001f8 ++/* 0x36d4 --> 0x3800 unused */ ++ ++/* Mbuf cluster free registers */ ++#define MBFREE_MODE 0x00003800 ++#define MBFREE_MODE_RESET 0x00000001 ++#define MBFREE_MODE_ENABLE 0x00000002 ++#define MBFREE_STATUS 0x00003804 ++/* 0x3808 --> 0x3c00 unused */ ++ ++/* Host coalescing control registers */ ++#define HOSTCC_MODE 0x00003c00 ++#define HOSTCC_MODE_RESET 0x00000001 ++#define HOSTCC_MODE_ENABLE 0x00000002 ++#define HOSTCC_MODE_ATTN 0x00000004 ++#define HOSTCC_MODE_NOW 0x00000008 ++#define HOSTCC_MODE_FULL_STATUS 0x00000000 ++#define HOSTCC_MODE_64BYTE 0x00000080 ++#define HOSTCC_MODE_32BYTE 0x00000100 ++#define HOSTCC_MODE_CLRTICK_RXBD 0x00000200 ++#define HOSTCC_MODE_CLRTICK_TXBD 0x00000400 ++#define HOSTCC_MODE_NOINT_ON_NOW 0x00000800 ++#define HOSTCC_MODE_NOINT_ON_FORCE 0x00001000 ++#define HOSTCC_MODE_COAL_VEC1_NOW 0x00002000 ++#define HOSTCC_STATUS 0x00003c04 ++#define HOSTCC_STATUS_ERROR_ATTN 0x00000004 ++#define HOSTCC_RXCOL_TICKS 0x00003c08 ++#define LOW_RXCOL_TICKS 0x00000032 ++#if defined(__VMKLNX__) ++#define LOW_RXCOL_TICKS_CLRTCKS 0x00000012 ++#else ++#define LOW_RXCOL_TICKS_CLRTCKS 0x00000014 ++#endif ++#define DEFAULT_RXCOL_TICKS 0x00000048 ++#define HIGH_RXCOL_TICKS 0x00000096 ++#define MAX_RXCOL_TICKS 0x000003ff ++#define HOSTCC_TXCOL_TICKS 0x00003c0c ++#define LOW_TXCOL_TICKS 0x00000096 ++#define LOW_TXCOL_TICKS_CLRTCKS 0x00000048 ++#define DEFAULT_TXCOL_TICKS 0x0000012c ++#define HIGH_TXCOL_TICKS 0x00000145 ++#define MAX_TXCOL_TICKS 0x000003ff ++#define HOSTCC_RXMAX_FRAMES 0x00003c10 ++#if defined(__VMKLNX__) ++#define LOW_RXMAX_FRAMES 0x0000000f ++#else ++#define LOW_RXMAX_FRAMES 0x00000005 ++#endif ++#define DEFAULT_RXMAX_FRAMES 0x00000008 ++#define HIGH_RXMAX_FRAMES 0x00000012 ++#define MAX_RXMAX_FRAMES 0x000000ff ++#define HOSTCC_TXMAX_FRAMES 0x00003c14 ++#define LOW_TXMAX_FRAMES 0x00000035 ++#define DEFAULT_TXMAX_FRAMES 0x0000004b ++#define HIGH_TXMAX_FRAMES 0x00000052 ++#define MAX_TXMAX_FRAMES 0x000000ff ++#define HOSTCC_RXCOAL_TICK_INT 0x00003c18 ++#define DEFAULT_RXCOAL_TICK_INT 0x00000019 ++#define DEFAULT_RXCOAL_TICK_INT_CLRTCKS 0x00000014 ++#define MAX_RXCOAL_TICK_INT 0x000003ff ++#define HOSTCC_TXCOAL_TICK_INT 0x00003c1c ++#define DEFAULT_TXCOAL_TICK_INT 0x00000019 ++#define DEFAULT_TXCOAL_TICK_INT_CLRTCKS 0x00000014 ++#define MAX_TXCOAL_TICK_INT 0x000003ff ++#define HOSTCC_RXCOAL_MAXF_INT 0x00003c20 ++#define DEFAULT_RXCOAL_MAXF_INT 0x00000005 ++#define MAX_RXCOAL_MAXF_INT 0x000000ff ++#define HOSTCC_TXCOAL_MAXF_INT 0x00003c24 ++#define DEFAULT_TXCOAL_MAXF_INT 0x00000005 ++#define MAX_TXCOAL_MAXF_INT 0x000000ff ++#define HOSTCC_STAT_COAL_TICKS 0x00003c28 ++#define DEFAULT_STAT_COAL_TICKS 0x000f4240 ++#define MAX_STAT_COAL_TICKS 0xd693d400 ++#define MIN_STAT_COAL_TICKS 0x00000064 ++#define HOSTCC_PARAM_SET_RESET 0x00003c28 ++/* 0x3c2c --> 0x3c30 unused */ ++#define HOSTCC_STATS_BLK_HOST_ADDR 0x00003c30 /* 64-bit */ ++#define HOSTCC_STATUS_BLK_HOST_ADDR 0x00003c38 /* 64-bit */ ++#define HOSTCC_STATS_BLK_NIC_ADDR 0x00003c40 ++#define HOSTCC_STATUS_BLK_NIC_ADDR 0x00003c44 ++#define HOSTCC_FLOW_ATTN 0x00003c48 ++#define HOSTCC_FLOW_ATTN_MBUF_LWM 0x00000040 ++#define HOSTCC_FLOW_ATTN_RCB_MISCFG 0x00020000 ++#define HOSTCC_FLOW_ATTN_RCV_BDI_ATTN 0x00800000 ++/* 0x3c4c --> 0x3c50 unused */ ++#define HOSTCC_JUMBO_CON_IDX 0x00003c50 ++#define HOSTCC_STD_CON_IDX 0x00003c54 ++#define HOSTCC_MINI_CON_IDX 0x00003c58 ++/* 0x3c5c --> 0x3c80 unused */ ++#define HOSTCC_RET_PROD_IDX_0 0x00003c80 ++#define HOSTCC_RET_PROD_IDX_1 0x00003c84 ++#define HOSTCC_RET_PROD_IDX_2 0x00003c88 ++#define HOSTCC_RET_PROD_IDX_3 0x00003c8c ++#define HOSTCC_RET_PROD_IDX_4 0x00003c90 ++#define HOSTCC_RET_PROD_IDX_5 0x00003c94 ++#define HOSTCC_RET_PROD_IDX_6 0x00003c98 ++#define HOSTCC_RET_PROD_IDX_7 0x00003c9c ++#define HOSTCC_RET_PROD_IDX_8 0x00003ca0 ++#define HOSTCC_RET_PROD_IDX_9 0x00003ca4 ++#define HOSTCC_RET_PROD_IDX_10 0x00003ca8 ++#define HOSTCC_RET_PROD_IDX_11 0x00003cac ++#define HOSTCC_RET_PROD_IDX_12 0x00003cb0 ++#define HOSTCC_RET_PROD_IDX_13 0x00003cb4 ++#define HOSTCC_RET_PROD_IDX_14 0x00003cb8 ++#define HOSTCC_RET_PROD_IDX_15 0x00003cbc ++#define HOSTCC_SND_CON_IDX_0 0x00003cc0 ++#define HOSTCC_SND_CON_IDX_1 0x00003cc4 ++#define HOSTCC_SND_CON_IDX_2 0x00003cc8 ++#define HOSTCC_SND_CON_IDX_3 0x00003ccc ++#define HOSTCC_SND_CON_IDX_4 0x00003cd0 ++#define HOSTCC_SND_CON_IDX_5 0x00003cd4 ++#define HOSTCC_SND_CON_IDX_6 0x00003cd8 ++#define HOSTCC_SND_CON_IDX_7 0x00003cdc ++#define HOSTCC_SND_CON_IDX_8 0x00003ce0 ++#define HOSTCC_SND_CON_IDX_9 0x00003ce4 ++#define HOSTCC_SND_CON_IDX_10 0x00003ce8 ++#define HOSTCC_SND_CON_IDX_11 0x00003cec ++#define HOSTCC_SND_CON_IDX_12 0x00003cf0 ++#define HOSTCC_SND_CON_IDX_13 0x00003cf4 ++#define HOSTCC_SND_CON_IDX_14 0x00003cf8 ++#define HOSTCC_SND_CON_IDX_15 0x00003cfc ++#define HOSTCC_STATBLCK_RING1 0x00003d00 ++/* 0x3d00 --> 0x3d80 unused */ ++ ++#define HOSTCC_RXCOL_TICKS_VEC1 0x00003d80 ++#define HOSTCC_TXCOL_TICKS_VEC1 0x00003d84 ++#define HOSTCC_RXMAX_FRAMES_VEC1 0x00003d88 ++#define HOSTCC_TXMAX_FRAMES_VEC1 0x00003d8c ++#define HOSTCC_RXCOAL_MAXF_INT_VEC1 0x00003d90 ++#define HOSTCC_TXCOAL_MAXF_INT_VEC1 0x00003d94 ++/* 0x3d98 --> 0x4000 unused */ ++ ++/* Memory arbiter control registers */ ++#define MEMARB_MODE 0x00004000 ++#define MEMARB_MODE_RESET 0x00000001 ++#define MEMARB_MODE_ENABLE 0x00000002 ++#define MEMARB_STATUS 0x00004004 ++#define MEMARB_TRAP_ADDR_LOW 0x00004008 ++#define MEMARB_TRAP_ADDR_HIGH 0x0000400c ++/* 0x4010 --> 0x4400 unused */ ++ ++/* Buffer manager control registers */ ++#define BUFMGR_MODE 0x00004400 ++#define BUFMGR_MODE_RESET 0x00000001 ++#define BUFMGR_MODE_ENABLE 0x00000002 ++#define BUFMGR_MODE_ATTN_ENABLE 0x00000004 ++#define BUFMGR_MODE_BM_TEST 0x00000008 ++#define BUFMGR_MODE_MBLOW_ATTN_ENAB 0x00000010 ++#define BUFMGR_MODE_NO_TX_UNDERRUN 0x80000000 ++#define BUFMGR_STATUS 0x00004404 ++#define BUFMGR_STATUS_ERROR 0x00000004 ++#define BUFMGR_STATUS_MBLOW 0x00000010 ++#define BUFMGR_MB_POOL_ADDR 0x00004408 ++#define BUFMGR_MB_POOL_SIZE 0x0000440c ++#define BUFMGR_MB_RDMA_LOW_WATER 0x00004410 ++#define DEFAULT_MB_RDMA_LOW_WATER 0x00000050 ++#define DEFAULT_MB_RDMA_LOW_WATER_5705 0x00000000 ++#define DEFAULT_MB_RDMA_LOW_WATER_JUMBO 0x00000130 ++#define DEFAULT_MB_RDMA_LOW_WATER_JUMBO_5780 0x00000000 ++#define BUFMGR_MB_MACRX_LOW_WATER 0x00004414 ++#define DEFAULT_MB_MACRX_LOW_WATER 0x00000020 ++#define DEFAULT_MB_MACRX_LOW_WATER_5705 0x00000010 ++#define DEFAULT_MB_MACRX_LOW_WATER_5906 0x00000004 ++#define DEFAULT_MB_MACRX_LOW_WATER_57765 0x0000002a ++#define DEFAULT_MB_MACRX_LOW_WATER_JUMBO 0x00000098 ++#define DEFAULT_MB_MACRX_LOW_WATER_JUMBO_5780 0x0000004b ++#define DEFAULT_MB_MACRX_LOW_WATER_JUMBO_57765 0x0000007e ++#define BUFMGR_MB_HIGH_WATER 0x00004418 ++#define DEFAULT_MB_HIGH_WATER 0x00000060 ++#define DEFAULT_MB_HIGH_WATER_5705 0x00000060 ++#define DEFAULT_MB_HIGH_WATER_5906 0x00000010 ++#define DEFAULT_MB_HIGH_WATER_57765 0x000000a0 ++#define DEFAULT_MB_HIGH_WATER_JUMBO 0x0000017c ++#define DEFAULT_MB_HIGH_WATER_JUMBO_5780 0x00000096 ++#define DEFAULT_MB_HIGH_WATER_JUMBO_57765 0x000000ea ++#define BUFMGR_RX_MB_ALLOC_REQ 0x0000441c ++#define BUFMGR_MB_ALLOC_BIT 0x10000000 ++#define BUFMGR_RX_MB_ALLOC_RESP 0x00004420 ++#define BUFMGR_TX_MB_ALLOC_REQ 0x00004424 ++#define BUFMGR_TX_MB_ALLOC_RESP 0x00004428 ++#define BUFMGR_DMA_DESC_POOL_ADDR 0x0000442c ++#define BUFMGR_DMA_DESC_POOL_SIZE 0x00004430 ++#define BUFMGR_DMA_LOW_WATER 0x00004434 ++#define DEFAULT_DMA_LOW_WATER 0x00000005 ++#define BUFMGR_DMA_HIGH_WATER 0x00004438 ++#define DEFAULT_DMA_HIGH_WATER 0x0000000a ++#define BUFMGR_RX_DMA_ALLOC_REQ 0x0000443c ++#define BUFMGR_RX_DMA_ALLOC_RESP 0x00004440 ++#define BUFMGR_TX_DMA_ALLOC_REQ 0x00004444 ++#define BUFMGR_TX_DMA_ALLOC_RESP 0x00004448 ++#define BUFMGR_HWDIAG_0 0x0000444c ++#define BUFMGR_HWDIAG_1 0x00004450 ++#define BUFMGR_HWDIAG_2 0x00004454 ++/* 0x4458 --> 0x4800 unused */ ++ ++/* Read DMA control registers */ ++#define RDMAC_MODE 0x00004800 ++#define RDMAC_MODE_RESET 0x00000001 ++#define RDMAC_MODE_ENABLE 0x00000002 ++#define RDMAC_MODE_TGTABORT_ENAB 0x00000004 ++#define RDMAC_MODE_MSTABORT_ENAB 0x00000008 ++#define RDMAC_MODE_PARITYERR_ENAB 0x00000010 ++#define RDMAC_MODE_ADDROFLOW_ENAB 0x00000020 ++#define RDMAC_MODE_FIFOOFLOW_ENAB 0x00000040 ++#define RDMAC_MODE_FIFOURUN_ENAB 0x00000080 ++#define RDMAC_MODE_FIFOOREAD_ENAB 0x00000100 ++#define RDMAC_MODE_LNGREAD_ENAB 0x00000200 ++#define RDMAC_MODE_SPLIT_ENABLE 0x00000800 ++#define RDMAC_MODE_BD_SBD_CRPT_ENAB 0x00000800 ++#define RDMAC_MODE_SPLIT_RESET 0x00001000 ++#define RDMAC_MODE_MBUF_RBD_CRPT_ENAB 0x00001000 ++#define RDMAC_MODE_MBUF_SBD_CRPT_ENAB 0x00002000 ++#define RDMAC_MODE_FIFO_SIZE_128 0x00020000 ++#define RDMAC_MODE_FIFO_LONG_BURST 0x00030000 ++#define RDMAC_MODE_JMB_2K_MMRR 0x00800000 ++#define RDMAC_MODE_MULT_DMA_RD_DIS 0x01000000 ++#define RDMAC_MODE_IPV4_LSO_EN 0x08000000 ++#define RDMAC_MODE_IPV6_LSO_EN 0x10000000 ++#define RDMAC_MODE_H2BNC_VLAN_DET 0x20000000 ++#define RDMAC_STATUS 0x00004804 ++#define RDMAC_STATUS_TGTABORT 0x00000004 ++#define RDMAC_STATUS_MSTABORT 0x00000008 ++#define RDMAC_STATUS_PARITYERR 0x00000010 ++#define RDMAC_STATUS_ADDROFLOW 0x00000020 ++#define RDMAC_STATUS_FIFOOFLOW 0x00000040 ++#define RDMAC_STATUS_FIFOURUN 0x00000080 ++#define RDMAC_STATUS_FIFOOREAD 0x00000100 ++#define RDMAC_STATUS_LNGREAD 0x00000200 ++/* 0x4808 --> 0x4900 unused */ ++ ++#define TG3_RDMA_RSRVCTRL_REG2 0x00004890 ++#define TG3_LSO_RD_DMA_CRPTEN_CTRL2 0x000048a0 ++ ++#define TG3_RDMA_RSRVCTRL_REG 0x00004900 ++#define TG3_RDMA_RSRVCTRL_FIFO_OFLW_FIX 0x00000004 ++#define TG3_RDMA_RSRVCTRL_FIFO_LWM_1_5K 0x00000c00 ++#define TG3_RDMA_RSRVCTRL_FIFO_LWM_MASK 0x00000ff0 ++#define TG3_RDMA_RSRVCTRL_FIFO_HWM_1_5K 0x000c0000 ++#define TG3_RDMA_RSRVCTRL_FIFO_HWM_MASK 0x000ff000 ++#define TG3_RDMA_RSRVCTRL_TXMRGN_320B 0x28000000 ++#define TG3_RDMA_RSRVCTRL_TXMRGN_MASK 0xffe00000 ++/* 0x4904 --> 0x4910 unused */ ++ ++#define TG3_LSO_RD_DMA_CRPTEN_CTRL 0x00004910 ++#define TG3_LSO_RD_DMA_CRPTEN_CTRL_BLEN_BD_4K 0x00030000 ++#define TG3_LSO_RD_DMA_CRPTEN_CTRL_BLEN_LSO_4K 0x000c0000 ++#define TG3_LSO_RD_DMA_TX_LENGTH_WA_5719 0x02000000 ++#define TG3_LSO_RD_DMA_TX_LENGTH_WA_5720 0x00200000 ++/* 0x4914 --> 0x4be0 unused */ ++ ++#define TG3_NUM_RDMA_CHANNELS 4 ++#define TG3_RDMA_LENGTH 0x00004be0 ++ ++/* Write DMA control registers */ ++#define WDMAC_MODE 0x00004c00 ++#define WDMAC_MODE_RESET 0x00000001 ++#define WDMAC_MODE_ENABLE 0x00000002 ++#define WDMAC_MODE_TGTABORT_ENAB 0x00000004 ++#define WDMAC_MODE_MSTABORT_ENAB 0x00000008 ++#define WDMAC_MODE_PARITYERR_ENAB 0x00000010 ++#define WDMAC_MODE_ADDROFLOW_ENAB 0x00000020 ++#define WDMAC_MODE_FIFOOFLOW_ENAB 0x00000040 ++#define WDMAC_MODE_FIFOURUN_ENAB 0x00000080 ++#define WDMAC_MODE_FIFOOREAD_ENAB 0x00000100 ++#define WDMAC_MODE_LNGREAD_ENAB 0x00000200 ++#define WDMAC_MODE_RX_ACCEL 0x00000400 ++#define WDMAC_MODE_STATUS_TAG_FIX 0x20000000 ++#define WDMAC_MODE_BURST_ALL_DATA 0xc0000000 ++#define WDMAC_STATUS 0x00004c04 ++#define WDMAC_STATUS_TGTABORT 0x00000004 ++#define WDMAC_STATUS_MSTABORT 0x00000008 ++#define WDMAC_STATUS_PARITYERR 0x00000010 ++#define WDMAC_STATUS_ADDROFLOW 0x00000020 ++#define WDMAC_STATUS_FIFOOFLOW 0x00000040 ++#define WDMAC_STATUS_FIFOURUN 0x00000080 ++#define WDMAC_STATUS_FIFOOREAD 0x00000100 ++#define WDMAC_STATUS_LNGREAD 0x00000200 ++/* 0x4c08 --> 0x5000 unused */ ++ ++/* Per-cpu register offsets (arm9) */ ++#define CPU_MODE 0x00000000 ++#define CPU_MODE_RESET 0x00000001 ++#define CPU_MODE_HALT 0x00000400 ++#define CPU_STATE 0x00000004 ++#define CPU_EVTMASK 0x00000008 ++/* 0xc --> 0x1c reserved */ ++#define CPU_PC 0x0000001c ++#define CPU_INSN 0x00000020 ++#define CPU_SPAD_UFLOW 0x00000024 ++#define CPU_WDOG_CLEAR 0x00000028 ++#define CPU_WDOG_VECTOR 0x0000002c ++#define CPU_WDOG_PC 0x00000030 ++#define CPU_HW_BP 0x00000034 ++/* 0x38 --> 0x44 unused */ ++#define CPU_WDOG_SAVED_STATE 0x00000044 ++#define CPU_LAST_BRANCH_ADDR 0x00000048 ++#define CPU_SPAD_UFLOW_SET 0x0000004c ++/* 0x50 --> 0x200 unused */ ++#define CPU_R0 0x00000200 ++#define CPU_R1 0x00000204 ++#define CPU_R2 0x00000208 ++#define CPU_R3 0x0000020c ++#define CPU_R4 0x00000210 ++#define CPU_R5 0x00000214 ++#define CPU_R6 0x00000218 ++#define CPU_R7 0x0000021c ++#define CPU_R8 0x00000220 ++#define CPU_R9 0x00000224 ++#define CPU_R10 0x00000228 ++#define CPU_R11 0x0000022c ++#define CPU_R12 0x00000230 ++#define CPU_R13 0x00000234 ++#define CPU_R14 0x00000238 ++#define CPU_R15 0x0000023c ++#define CPU_R16 0x00000240 ++#define CPU_R17 0x00000244 ++#define CPU_R18 0x00000248 ++#define CPU_R19 0x0000024c ++#define CPU_R20 0x00000250 ++#define CPU_R21 0x00000254 ++#define CPU_R22 0x00000258 ++#define CPU_R23 0x0000025c ++#define CPU_R24 0x00000260 ++#define CPU_R25 0x00000264 ++#define CPU_R26 0x00000268 ++#define CPU_R27 0x0000026c ++#define CPU_R28 0x00000270 ++#define CPU_R29 0x00000274 ++#define CPU_R30 0x00000278 ++#define CPU_R31 0x0000027c ++/* 0x280 --> 0x400 unused */ ++ ++#define RX_CPU_BASE 0x00005000 ++#define RX_CPU_MODE 0x00005000 ++#define RX_CPU_STATE 0x00005004 ++#define RX_CPU_PGMCTR 0x0000501c ++#define RX_CPU_HWBKPT 0x00005034 ++#define TX_CPU_BASE 0x00005400 ++#define TX_CPU_MODE 0x00005400 ++#define TX_CPU_STATE 0x00005404 ++#define TX_CPU_PGMCTR 0x0000541c ++ ++#define VCPU_STATUS 0x00005100 ++#define VCPU_STATUS_INIT_DONE 0x04000000 ++#define VCPU_STATUS_DRV_RESET 0x08000000 ++ ++#define VCPU_CFGSHDW 0x00005104 ++#define VCPU_CFGSHDW_WOL_ENABLE 0x00000001 ++#define VCPU_CFGSHDW_WOL_MAGPKT 0x00000004 ++#define VCPU_CFGSHDW_ASPM_DBNC 0x00001000 ++ ++#define MAC_VRQFLT_CFG 0x00005400 ++#define MAC_VRQFLT_ELEM_EN 0x80000000 ++#define MAC_VRQFLT_HDR_VLAN 0x0000e000 ++#define MAC_VRQFLT_PTRN 0x00005480 ++#define MAC_VRQFLT_PTRN_VLANID 0x0000ffff ++#define MAC_VRQFLT_FLTSET 0x00005500 ++ ++/* Mailboxes */ ++#define GRCMBOX_BASE 0x00005600 ++#define MAC_VRQMAP_1H 0x00005600 ++#define MAC_VRQMAP_1H_PTA_PFEN 0x00000020 ++#define MAC_VRQMAP_2H 0x00005604 ++#define MAC_VRQMAP_2H_PTA_VFEN 0x00000020 ++#define MAC_VRQMAP_2H_PTA_AND 0x00000000 ++#define MAC_VRQMAP_2H_PTA_OR 0x00000040 ++#define MAC_VRQMAP_2H_PTA_EN 0x00000080 ++#define MAC_VRQ_PMATCH_HI_5 0x00005690 ++#define MAC_VRQ_PMATCH_LO_5 0x00005694 ++#define GRCMBOX_INTERRUPT_0 0x00005800 /* 64-bit */ ++#define GRCMBOX_INTERRUPT_1 0x00005808 /* 64-bit */ ++#define GRCMBOX_INTERRUPT_2 0x00005810 /* 64-bit */ ++#define GRCMBOX_INTERRUPT_3 0x00005818 /* 64-bit */ ++#define GRCMBOX_GENERAL_0 0x00005820 /* 64-bit */ ++#define GRCMBOX_GENERAL_1 0x00005828 /* 64-bit */ ++#define GRCMBOX_GENERAL_2 0x00005830 /* 64-bit */ ++#define GRCMBOX_GENERAL_3 0x00005838 /* 64-bit */ ++#define GRCMBOX_GENERAL_4 0x00005840 /* 64-bit */ ++#define GRCMBOX_GENERAL_5 0x00005848 /* 64-bit */ ++#define GRCMBOX_GENERAL_6 0x00005850 /* 64-bit */ ++#define GRCMBOX_GENERAL_7 0x00005858 /* 64-bit */ ++#define GRCMBOX_RELOAD_STAT 0x00005860 /* 64-bit */ ++#define GRCMBOX_RCVSTD_PROD_IDX 0x00005868 /* 64-bit */ ++#define GRCMBOX_RCVJUMBO_PROD_IDX 0x00005870 /* 64-bit */ ++#define GRCMBOX_RCVMINI_PROD_IDX 0x00005878 /* 64-bit */ ++#define GRCMBOX_RCVRET_CON_IDX_0 0x00005880 /* 64-bit */ ++#define GRCMBOX_RCVRET_CON_IDX_1 0x00005888 /* 64-bit */ ++#define GRCMBOX_RCVRET_CON_IDX_2 0x00005890 /* 64-bit */ ++#define GRCMBOX_RCVRET_CON_IDX_3 0x00005898 /* 64-bit */ ++#define GRCMBOX_RCVRET_CON_IDX_4 0x000058a0 /* 64-bit */ ++#define GRCMBOX_RCVRET_CON_IDX_5 0x000058a8 /* 64-bit */ ++#define GRCMBOX_RCVRET_CON_IDX_6 0x000058b0 /* 64-bit */ ++#define GRCMBOX_RCVRET_CON_IDX_7 0x000058b8 /* 64-bit */ ++#define GRCMBOX_RCVRET_CON_IDX_8 0x000058c0 /* 64-bit */ ++#define GRCMBOX_RCVRET_CON_IDX_9 0x000058c8 /* 64-bit */ ++#define GRCMBOX_RCVRET_CON_IDX_10 0x000058d0 /* 64-bit */ ++#define GRCMBOX_RCVRET_CON_IDX_11 0x000058d8 /* 64-bit */ ++#define GRCMBOX_RCVRET_CON_IDX_12 0x000058e0 /* 64-bit */ ++#define GRCMBOX_RCVRET_CON_IDX_13 0x000058e8 /* 64-bit */ ++#define GRCMBOX_RCVRET_CON_IDX_14 0x000058f0 /* 64-bit */ ++#define GRCMBOX_RCVRET_CON_IDX_15 0x000058f8 /* 64-bit */ ++#define GRCMBOX_SNDHOST_PROD_IDX_0 0x00005900 /* 64-bit */ ++#define GRCMBOX_SNDHOST_PROD_IDX_1 0x00005908 /* 64-bit */ ++#define GRCMBOX_SNDHOST_PROD_IDX_2 0x00005910 /* 64-bit */ ++#define GRCMBOX_SNDHOST_PROD_IDX_3 0x00005918 /* 64-bit */ ++#define GRCMBOX_SNDHOST_PROD_IDX_4 0x00005920 /* 64-bit */ ++#define GRCMBOX_SNDHOST_PROD_IDX_5 0x00005928 /* 64-bit */ ++#define GRCMBOX_SNDHOST_PROD_IDX_6 0x00005930 /* 64-bit */ ++#define GRCMBOX_SNDHOST_PROD_IDX_7 0x00005938 /* 64-bit */ ++#define GRCMBOX_SNDHOST_PROD_IDX_8 0x00005940 /* 64-bit */ ++#define GRCMBOX_SNDHOST_PROD_IDX_9 0x00005948 /* 64-bit */ ++#define GRCMBOX_SNDHOST_PROD_IDX_10 0x00005950 /* 64-bit */ ++#define GRCMBOX_SNDHOST_PROD_IDX_11 0x00005958 /* 64-bit */ ++#define GRCMBOX_SNDHOST_PROD_IDX_12 0x00005960 /* 64-bit */ ++#define GRCMBOX_SNDHOST_PROD_IDX_13 0x00005968 /* 64-bit */ ++#define GRCMBOX_SNDHOST_PROD_IDX_14 0x00005970 /* 64-bit */ ++#define GRCMBOX_SNDHOST_PROD_IDX_15 0x00005978 /* 64-bit */ ++#define GRCMBOX_SNDNIC_PROD_IDX_0 0x00005980 /* 64-bit */ ++#define GRCMBOX_SNDNIC_PROD_IDX_1 0x00005988 /* 64-bit */ ++#define GRCMBOX_SNDNIC_PROD_IDX_2 0x00005990 /* 64-bit */ ++#define GRCMBOX_SNDNIC_PROD_IDX_3 0x00005998 /* 64-bit */ ++#define GRCMBOX_SNDNIC_PROD_IDX_4 0x000059a0 /* 64-bit */ ++#define GRCMBOX_SNDNIC_PROD_IDX_5 0x000059a8 /* 64-bit */ ++#define GRCMBOX_SNDNIC_PROD_IDX_6 0x000059b0 /* 64-bit */ ++#define GRCMBOX_SNDNIC_PROD_IDX_7 0x000059b8 /* 64-bit */ ++#define GRCMBOX_SNDNIC_PROD_IDX_8 0x000059c0 /* 64-bit */ ++#define GRCMBOX_SNDNIC_PROD_IDX_9 0x000059c8 /* 64-bit */ ++#define GRCMBOX_SNDNIC_PROD_IDX_10 0x000059d0 /* 64-bit */ ++#define GRCMBOX_SNDNIC_PROD_IDX_11 0x000059d8 /* 64-bit */ ++#define GRCMBOX_SNDNIC_PROD_IDX_12 0x000059e0 /* 64-bit */ ++#define GRCMBOX_SNDNIC_PROD_IDX_13 0x000059e8 /* 64-bit */ ++#define GRCMBOX_SNDNIC_PROD_IDX_14 0x000059f0 /* 64-bit */ ++#define GRCMBOX_SNDNIC_PROD_IDX_15 0x000059f8 /* 64-bit */ ++#define GRCMBOX_HIGH_PRIO_EV_VECTOR 0x00005a00 ++#define GRCMBOX_HIGH_PRIO_EV_MASK 0x00005a04 ++#define GRCMBOX_LOW_PRIO_EV_VEC 0x00005a08 ++#define GRCMBOX_LOW_PRIO_EV_MASK 0x00005a0c ++/* 0x5a10 --> 0x5c00 */ ++ ++/* Flow Through queues */ ++#define FTQ_RESET 0x00005c00 ++/* 0x5c04 --> 0x5c10 unused */ ++#define FTQ_DMA_NORM_READ_CTL 0x00005c10 ++#define FTQ_DMA_NORM_READ_FULL_CNT 0x00005c14 ++#define FTQ_DMA_NORM_READ_FIFO_ENQDEQ 0x00005c18 ++#define FTQ_DMA_NORM_READ_WRITE_PEEK 0x00005c1c ++#define FTQ_DMA_HIGH_READ_CTL 0x00005c20 ++#define FTQ_DMA_HIGH_READ_FULL_CNT 0x00005c24 ++#define FTQ_DMA_HIGH_READ_FIFO_ENQDEQ 0x00005c28 ++#define FTQ_DMA_HIGH_READ_WRITE_PEEK 0x00005c2c ++#define FTQ_DMA_COMP_DISC_CTL 0x00005c30 ++#define FTQ_DMA_COMP_DISC_FULL_CNT 0x00005c34 ++#define FTQ_DMA_COMP_DISC_FIFO_ENQDEQ 0x00005c38 ++#define FTQ_DMA_COMP_DISC_WRITE_PEEK 0x00005c3c ++#define FTQ_SEND_BD_COMP_CTL 0x00005c40 ++#define FTQ_SEND_BD_COMP_FULL_CNT 0x00005c44 ++#define FTQ_SEND_BD_COMP_FIFO_ENQDEQ 0x00005c48 ++#define FTQ_SEND_BD_COMP_WRITE_PEEK 0x00005c4c ++#define FTQ_SEND_DATA_INIT_CTL 0x00005c50 ++#define FTQ_SEND_DATA_INIT_FULL_CNT 0x00005c54 ++#define FTQ_SEND_DATA_INIT_FIFO_ENQDEQ 0x00005c58 ++#define FTQ_SEND_DATA_INIT_WRITE_PEEK 0x00005c5c ++#define FTQ_DMA_NORM_WRITE_CTL 0x00005c60 ++#define FTQ_DMA_NORM_WRITE_FULL_CNT 0x00005c64 ++#define FTQ_DMA_NORM_WRITE_FIFO_ENQDEQ 0x00005c68 ++#define FTQ_DMA_NORM_WRITE_WRITE_PEEK 0x00005c6c ++#define FTQ_DMA_HIGH_WRITE_CTL 0x00005c70 ++#define FTQ_DMA_HIGH_WRITE_FULL_CNT 0x00005c74 ++#define FTQ_DMA_HIGH_WRITE_FIFO_ENQDEQ 0x00005c78 ++#define FTQ_DMA_HIGH_WRITE_WRITE_PEEK 0x00005c7c ++#define FTQ_SWTYPE1_CTL 0x00005c80 ++#define FTQ_SWTYPE1_FULL_CNT 0x00005c84 ++#define FTQ_SWTYPE1_FIFO_ENQDEQ 0x00005c88 ++#define FTQ_SWTYPE1_WRITE_PEEK 0x00005c8c ++#define FTQ_SEND_DATA_COMP_CTL 0x00005c90 ++#define FTQ_SEND_DATA_COMP_FULL_CNT 0x00005c94 ++#define FTQ_SEND_DATA_COMP_FIFO_ENQDEQ 0x00005c98 ++#define FTQ_SEND_DATA_COMP_WRITE_PEEK 0x00005c9c ++#define FTQ_HOST_COAL_CTL 0x00005ca0 ++#define FTQ_HOST_COAL_FULL_CNT 0x00005ca4 ++#define FTQ_HOST_COAL_FIFO_ENQDEQ 0x00005ca8 ++#define FTQ_HOST_COAL_WRITE_PEEK 0x00005cac ++#define FTQ_MAC_TX_CTL 0x00005cb0 ++#define FTQ_MAC_TX_FULL_CNT 0x00005cb4 ++#define FTQ_MAC_TX_FIFO_ENQDEQ 0x00005cb8 ++#define FTQ_MAC_TX_WRITE_PEEK 0x00005cbc ++#define FTQ_MB_FREE_CTL 0x00005cc0 ++#define FTQ_MB_FREE_FULL_CNT 0x00005cc4 ++#define FTQ_MB_FREE_FIFO_ENQDEQ 0x00005cc8 ++#define FTQ_MB_FREE_WRITE_PEEK 0x00005ccc ++#define FTQ_RCVBD_COMP_CTL 0x00005cd0 ++#define FTQ_RCVBD_COMP_FULL_CNT 0x00005cd4 ++#define FTQ_RCVBD_COMP_FIFO_ENQDEQ 0x00005cd8 ++#define FTQ_RCVBD_COMP_WRITE_PEEK 0x00005cdc ++#define FTQ_RCVLST_PLMT_CTL 0x00005ce0 ++#define FTQ_RCVLST_PLMT_FULL_CNT 0x00005ce4 ++#define FTQ_RCVLST_PLMT_FIFO_ENQDEQ 0x00005ce8 ++#define FTQ_RCVLST_PLMT_WRITE_PEEK 0x00005cec ++#define FTQ_RCVDATA_INI_CTL 0x00005cf0 ++#define FTQ_RCVDATA_INI_FULL_CNT 0x00005cf4 ++#define FTQ_RCVDATA_INI_FIFO_ENQDEQ 0x00005cf8 ++#define FTQ_RCVDATA_INI_WRITE_PEEK 0x00005cfc ++#define FTQ_RCVDATA_COMP_CTL 0x00005d00 ++#define FTQ_RCVDATA_COMP_FULL_CNT 0x00005d04 ++#define FTQ_RCVDATA_COMP_FIFO_ENQDEQ 0x00005d08 ++#define FTQ_RCVDATA_COMP_WRITE_PEEK 0x00005d0c ++#define FTQ_SWTYPE2_CTL 0x00005d10 ++#define FTQ_SWTYPE2_FULL_CNT 0x00005d14 ++#define FTQ_SWTYPE2_FIFO_ENQDEQ 0x00005d18 ++#define FTQ_SWTYPE2_WRITE_PEEK 0x00005d1c ++/* 0x5d20 --> 0x6000 unused */ ++ ++/* Message signaled interrupt registers */ ++#define MSGINT_MODE 0x00006000 ++#define MSGINT_MODE_RESET 0x00000001 ++#define MSGINT_MODE_ENABLE 0x00000002 ++#define MSGINT_MODE_ONE_SHOT_DISABLE 0x00000020 ++#define MSGINT_MODE_MULTIVEC_EN 0x00000080 ++#define MSGINT_STATUS 0x00006004 ++#define MSGINT_STATUS_MSI_REQ 0x00000001 ++#define MSGINT_FIFO 0x00006008 ++/* 0x600c --> 0x6400 unused */ ++ ++/* DMA completion registers */ ++#define DMAC_MODE 0x00006400 ++#define DMAC_MODE_RESET 0x00000001 ++#define DMAC_MODE_ENABLE 0x00000002 ++/* 0x6404 --> 0x6800 unused */ ++ ++/* GRC registers */ ++#define GRC_MODE 0x00006800 ++#define GRC_MODE_UPD_ON_COAL 0x00000001 ++#define GRC_MODE_BSWAP_NONFRM_DATA 0x00000002 ++#define GRC_MODE_WSWAP_NONFRM_DATA 0x00000004 ++#define GRC_MODE_BSWAP_DATA 0x00000010 ++#define GRC_MODE_WSWAP_DATA 0x00000020 ++#define GRC_MODE_BYTE_SWAP_B2HRX_DATA 0x00000040 ++#define GRC_MODE_WORD_SWAP_B2HRX_DATA 0x00000080 ++#define GRC_MODE_IOV_ENABLE 0x00000100 ++#define GRC_MODE_SPLITHDR 0x00000100 ++#define GRC_MODE_NOFRM_CRACKING 0x00000200 ++#define GRC_MODE_INCL_CRC 0x00000400 ++#define GRC_MODE_ALLOW_BAD_FRMS 0x00000800 ++#define GRC_MODE_NOIRQ_ON_SENDS 0x00002000 ++#define GRC_MODE_NOIRQ_ON_RCV 0x00004000 ++#define GRC_MODE_FORCE_PCI32BIT 0x00008000 ++#define GRC_MODE_B2HRX_ENABLE 0x00008000 ++#define GRC_MODE_HOST_STACKUP 0x00010000 ++#define GRC_MODE_HOST_SENDBDS 0x00020000 ++#define GRC_MODE_HTX2B_ENABLE 0x00040000 ++#define GRC_MODE_TIME_SYNC_ENABLE 0x00080000 ++#define GRC_MODE_NO_TX_PHDR_CSUM 0x00100000 ++#define GRC_MODE_NVRAM_WR_ENABLE 0x00200000 ++#define GRC_MODE_PCIE_TL_SEL 0x00000000 ++#define GRC_MODE_PCIE_PL_SEL 0x00400000 ++#define GRC_MODE_NO_RX_PHDR_CSUM 0x00800000 ++#define GRC_MODE_IRQ_ON_TX_CPU_ATTN 0x01000000 ++#define GRC_MODE_IRQ_ON_RX_CPU_ATTN 0x02000000 ++#define GRC_MODE_IRQ_ON_MAC_ATTN 0x04000000 ++#define GRC_MODE_IRQ_ON_DMA_ATTN 0x08000000 ++#define GRC_MODE_IRQ_ON_FLOW_ATTN 0x10000000 ++#define GRC_MODE_4X_NIC_SEND_RINGS 0x20000000 ++#define GRC_MODE_PCIE_DL_SEL 0x20000000 ++#define GRC_MODE_MCAST_FRM_ENABLE 0x40000000 ++#define GRC_MODE_PCIE_HI_1K_EN 0x80000000 ++#define GRC_MODE_PCIE_PORT_MASK (GRC_MODE_PCIE_TL_SEL | \ ++ GRC_MODE_PCIE_PL_SEL | \ ++ GRC_MODE_PCIE_DL_SEL | \ ++ GRC_MODE_PCIE_HI_1K_EN) ++#define GRC_MISC_CFG 0x00006804 ++#define GRC_MISC_CFG_CORECLK_RESET 0x00000001 ++#define GRC_MISC_CFG_PRESCALAR_MASK 0x000000fe ++#define GRC_MISC_CFG_PRESCALAR_SHIFT 1 ++#define GRC_MISC_CFG_BOARD_ID_MASK 0x0001e000 ++#define GRC_MISC_CFG_BOARD_ID_5700 0x0001e000 ++#define GRC_MISC_CFG_BOARD_ID_5701 0x00000000 ++#define GRC_MISC_CFG_BOARD_ID_5702FE 0x00004000 ++#define GRC_MISC_CFG_BOARD_ID_5703 0x00000000 ++#define GRC_MISC_CFG_BOARD_ID_5703S 0x00002000 ++#define GRC_MISC_CFG_BOARD_ID_5704 0x00000000 ++#define GRC_MISC_CFG_BOARD_ID_5704CIOBE 0x00004000 ++#define GRC_MISC_CFG_BOARD_ID_5704_A2 0x00008000 ++#define GRC_MISC_CFG_BOARD_ID_5788 0x00010000 ++#define GRC_MISC_CFG_BOARD_ID_5788M 0x00018000 ++#define GRC_MISC_CFG_BOARD_ID_AC91002A1 0x00018000 ++#define GRC_MISC_CFG_EPHY_IDDQ 0x00200000 ++#define GRC_MISC_CFG_KEEP_GPHY_POWER 0x04000000 ++#define GRC_LOCAL_CTRL 0x00006808 ++#define GRC_LCLCTRL_INT_ACTIVE 0x00000001 ++#define GRC_LCLCTRL_CLEARINT 0x00000002 ++#define GRC_LCLCTRL_SETINT 0x00000004 ++#define GRC_LCLCTRL_INT_ON_ATTN 0x00000008 ++#define GRC_LCLCTRL_GPIO_UART_SEL 0x00000010 /* 5755 only */ ++#define GRC_LCLCTRL_USE_SIG_DETECT 0x00000010 /* 5714/5780 only */ ++#define GRC_LCLCTRL_USE_EXT_SIG_DETECT 0x00000020 /* 5714/5780 only */ ++#define GRC_LCLCTRL_GPIO_INPUT3 0x00000020 ++#define GRC_LCLCTRL_GPIO_OE3 0x00000040 ++#define GRC_LCLCTRL_GPIO_OUTPUT3 0x00000080 ++#define GRC_LCLCTRL_GPIO_INPUT0 0x00000100 ++#define GRC_LCLCTRL_GPIO_INPUT1 0x00000200 ++#define GRC_LCLCTRL_GPIO_INPUT2 0x00000400 ++#define GRC_LCLCTRL_GPIO_OE0 0x00000800 ++#define GRC_LCLCTRL_GPIO_OE1 0x00001000 ++#define GRC_LCLCTRL_GPIO_OE2 0x00002000 ++#define GRC_LCLCTRL_GPIO_OUTPUT0 0x00004000 ++#define GRC_LCLCTRL_GPIO_OUTPUT1 0x00008000 ++#define GRC_LCLCTRL_GPIO_OUTPUT2 0x00010000 ++#define GRC_LCLCTRL_EXTMEM_ENABLE 0x00020000 ++#define GRC_LCLCTRL_MEMSZ_MASK 0x001c0000 ++#define GRC_LCLCTRL_MEMSZ_256K 0x00000000 ++#define GRC_LCLCTRL_MEMSZ_512K 0x00040000 ++#define GRC_LCLCTRL_MEMSZ_1M 0x00080000 ++#define GRC_LCLCTRL_MEMSZ_2M 0x000c0000 ++#define GRC_LCLCTRL_MEMSZ_4M 0x00100000 ++#define GRC_LCLCTRL_MEMSZ_8M 0x00140000 ++#define GRC_LCLCTRL_MEMSZ_16M 0x00180000 ++#define GRC_LCLCTRL_BANK_SELECT 0x00200000 ++#define GRC_LCLCTRL_SSRAM_TYPE 0x00400000 ++#define GRC_LCLCTRL_AUTO_SEEPROM 0x01000000 ++#define GRC_TIMER 0x0000680c ++#define GRC_RX_CPU_EVENT 0x00006810 ++#define GRC_RX_CPU_DRIVER_EVENT 0x00004000 ++#define GRC_RX_TIMER_REF 0x00006814 ++#define GRC_RX_CPU_SEM 0x00006818 ++#define GRC_REMOTE_RX_CPU_ATTN 0x0000681c ++#define GRC_TX_CPU_EVENT 0x00006820 ++#define GRC_TX_TIMER_REF 0x00006824 ++#define GRC_TX_CPU_SEM 0x00006828 ++#define GRC_REMOTE_TX_CPU_ATTN 0x0000682c ++#define GRC_MEM_POWER_UP 0x00006830 /* 64-bit */ ++#define GRC_EEPROM_ADDR 0x00006838 ++#define EEPROM_ADDR_WRITE 0x00000000 ++#define EEPROM_ADDR_READ 0x80000000 ++#define EEPROM_ADDR_COMPLETE 0x40000000 ++#define EEPROM_ADDR_FSM_RESET 0x20000000 ++#define EEPROM_ADDR_DEVID_MASK 0x1c000000 ++#define EEPROM_ADDR_DEVID_SHIFT 26 ++#define EEPROM_ADDR_START 0x02000000 ++#define EEPROM_ADDR_CLKPERD_SHIFT 16 ++#define EEPROM_ADDR_ADDR_MASK 0x0000ffff ++#define EEPROM_ADDR_ADDR_SHIFT 0 ++#define EEPROM_DEFAULT_CLOCK_PERIOD 0x60 ++#define EEPROM_CHIP_SIZE (64 * 1024) ++#define GRC_EEPROM_DATA 0x0000683c ++#define GRC_EEPROM_CTRL 0x00006840 ++#define GRC_MDI_CTRL 0x00006844 ++#define GRC_SEEPROM_DELAY 0x00006848 ++/* 0x684c --> 0x6890 unused */ ++#define GRC_VCPU_EXT_CTRL 0x00006890 ++#define GRC_VCPU_EXT_CTRL_HALT_CPU 0x00400000 ++#define GRC_VCPU_EXT_CTRL_DISABLE_WOL 0x20000000 ++#define GRC_FASTBOOT_PC 0x00006894 /* 5752, 5755, 5787 */ ++ ++#define TG3_EAV_REF_CLCK_LSB 0x00006900 ++#define TG3_EAV_REF_CLCK_MSB 0x00006904 ++#define TG3_EAV_REF_CLCK_CTL 0x00006908 ++#define TG3_EAV_REF_CLCK_CTL_STOP 0x00000002 ++#define TG3_EAV_REF_CLCK_CTL_RESUME 0x00000004 ++#define TG3_EAV_CTL_TSYNC_GPIO_MASK (0x3 << 16) ++#define TG3_EAV_CTL_TSYNC_WDOG0 (1 << 17) ++#define TG3_EAV_REF_CLK_CORRECT_CTL 0x00006928 ++#define TG3_EAV_REF_CLK_CORRECT_EN (1 << 31) ++#define TG3_EAV_REF_CLK_CORRECT_NEG (1 << 30) ++ ++#define TG3_EAV_REF_CLK_CORRECT_MASK 0xffffff ++ ++#define TG3_EAV_WATCHDOG0_LSB 0x00006918 ++#define TG3_EAV_WATCHDOG0_MSB 0x0000691c ++#define TG3_EAV_WATCHDOG0_EN (1 << 31) ++#define TG3_EAV_WATCHDOG_MSB_MASK 0x7fffffff ++/* 0x690c --> 0x7000 unused */ ++ ++/* NVRAM Control registers */ ++#define NVRAM_CMD 0x00007000 ++#define NVRAM_CMD_RESET 0x00000001 ++#define NVRAM_CMD_DONE 0x00000008 ++#define NVRAM_CMD_GO 0x00000010 ++#define NVRAM_CMD_WR 0x00000020 ++#define NVRAM_CMD_RD 0x00000000 ++#define NVRAM_CMD_ERASE 0x00000040 ++#define NVRAM_CMD_FIRST 0x00000080 ++#define NVRAM_CMD_LAST 0x00000100 ++#define NVRAM_CMD_WREN 0x00010000 ++#define NVRAM_CMD_WRDI 0x00020000 ++#define NVRAM_STAT 0x00007004 ++#define NVRAM_WRDATA 0x00007008 ++#define NVRAM_ADDR 0x0000700c ++#define NVRAM_ADDR_MSK 0x07ffffff ++#define NVRAM_RDDATA 0x00007010 ++#define NVRAM_CFG1 0x00007014 ++#define NVRAM_CFG1_FLASHIF_ENAB 0x00000001 ++#define NVRAM_CFG1_BUFFERED_MODE 0x00000002 ++#define NVRAM_CFG1_PASS_THRU 0x00000004 ++#define NVRAM_CFG1_STATUS_BITS 0x00000070 ++#define NVRAM_CFG1_BIT_BANG 0x00000008 ++#define NVRAM_CFG1_FLASH_SIZE 0x02000000 ++#define NVRAM_CFG1_COMPAT_BYPASS 0x80000000 ++#define NVRAM_CFG1_VENDOR_MASK 0x03000003 ++#define FLASH_VENDOR_ATMEL_EEPROM 0x02000000 ++#define FLASH_VENDOR_ATMEL_FLASH_BUFFERED 0x02000003 ++#define FLASH_VENDOR_ATMEL_FLASH_UNBUFFERED 0x00000003 ++#define FLASH_VENDOR_ST 0x03000001 ++#define FLASH_VENDOR_SAIFUN 0x01000003 ++#define FLASH_VENDOR_SST_SMALL 0x00000001 ++#define FLASH_VENDOR_SST_LARGE 0x02000001 ++#define NVRAM_CFG1_5752VENDOR_MASK 0x03c00003 ++#define NVRAM_CFG1_5762VENDOR_MASK 0x03e00003 ++#define FLASH_5752VENDOR_ATMEL_EEPROM_64KHZ 0x00000000 ++#define FLASH_5752VENDOR_ATMEL_EEPROM_376KHZ 0x02000000 ++#define FLASH_5752VENDOR_ATMEL_FLASH_BUFFERED 0x02000003 ++#define FLASH_5752VENDOR_ST_M45PE10 0x02400000 ++#define FLASH_5752VENDOR_ST_M45PE20 0x02400002 ++#define FLASH_5752VENDOR_ST_M45PE40 0x02400001 ++#define FLASH_5755VENDOR_ATMEL_FLASH_1 0x03400001 ++#define FLASH_5755VENDOR_ATMEL_FLASH_2 0x03400002 ++#define FLASH_5755VENDOR_ATMEL_FLASH_3 0x03400000 ++#define FLASH_5755VENDOR_ATMEL_FLASH_4 0x00000003 ++#define FLASH_5755VENDOR_ATMEL_FLASH_5 0x02000003 ++#define FLASH_5755VENDOR_ATMEL_EEPROM_64KHZ 0x03c00003 ++#define FLASH_5755VENDOR_ATMEL_EEPROM_376KHZ 0x03c00002 ++#define FLASH_5787VENDOR_ATMEL_EEPROM_64KHZ 0x03000003 ++#define FLASH_5787VENDOR_ATMEL_EEPROM_376KHZ 0x03000002 ++#define FLASH_5787VENDOR_MICRO_EEPROM_64KHZ 0x03000000 ++#define FLASH_5787VENDOR_MICRO_EEPROM_376KHZ 0x02000000 ++#define FLASH_5761VENDOR_ATMEL_MDB021D 0x00800003 ++#define FLASH_5761VENDOR_ATMEL_MDB041D 0x00800000 ++#define FLASH_5761VENDOR_ATMEL_MDB081D 0x00800002 ++#define FLASH_5761VENDOR_ATMEL_MDB161D 0x00800001 ++#define FLASH_5761VENDOR_ATMEL_ADB021D 0x00000003 ++#define FLASH_5761VENDOR_ATMEL_ADB041D 0x00000000 ++#define FLASH_5761VENDOR_ATMEL_ADB081D 0x00000002 ++#define FLASH_5761VENDOR_ATMEL_ADB161D 0x00000001 ++#define FLASH_5761VENDOR_ST_M_M45PE20 0x02800001 ++#define FLASH_5761VENDOR_ST_M_M45PE40 0x02800000 ++#define FLASH_5761VENDOR_ST_M_M45PE80 0x02800002 ++#define FLASH_5761VENDOR_ST_M_M45PE16 0x02800003 ++#define FLASH_5761VENDOR_ST_A_M45PE20 0x02000001 ++#define FLASH_5761VENDOR_ST_A_M45PE40 0x02000000 ++#define FLASH_5761VENDOR_ST_A_M45PE80 0x02000002 ++#define FLASH_5761VENDOR_ST_A_M45PE16 0x02000003 ++#define FLASH_57780VENDOR_ATMEL_AT45DB011D 0x00400000 ++#define FLASH_57780VENDOR_ATMEL_AT45DB011B 0x03400000 ++#define FLASH_57780VENDOR_ATMEL_AT45DB021D 0x00400002 ++#define FLASH_57780VENDOR_ATMEL_AT45DB021B 0x03400002 ++#define FLASH_57780VENDOR_ATMEL_AT45DB041D 0x00400001 ++#define FLASH_57780VENDOR_ATMEL_AT45DB041B 0x03400001 ++#define FLASH_5717VENDOR_ATMEL_EEPROM 0x02000001 ++#define FLASH_5717VENDOR_MICRO_EEPROM 0x02000003 ++#define FLASH_5717VENDOR_ATMEL_MDB011D 0x01000001 ++#define FLASH_5717VENDOR_ATMEL_MDB021D 0x01000003 ++#define FLASH_5717VENDOR_ST_M_M25PE10 0x02000000 ++#define FLASH_5717VENDOR_ST_M_M25PE20 0x02000002 ++#define FLASH_5717VENDOR_ST_M_M45PE10 0x00000001 ++#define FLASH_5717VENDOR_ST_M_M45PE20 0x00000003 ++#define FLASH_5717VENDOR_ATMEL_ADB011B 0x01400000 ++#define FLASH_5717VENDOR_ATMEL_ADB021B 0x01400002 ++#define FLASH_5717VENDOR_ATMEL_ADB011D 0x01400001 ++#define FLASH_5717VENDOR_ATMEL_ADB021D 0x01400003 ++#define FLASH_5717VENDOR_ST_A_M25PE10 0x02400000 ++#define FLASH_5717VENDOR_ST_A_M25PE20 0x02400002 ++#define FLASH_5717VENDOR_ST_A_M45PE10 0x02400001 ++#define FLASH_5717VENDOR_ST_A_M45PE20 0x02400003 ++#define FLASH_5717VENDOR_ATMEL_45USPT 0x03400000 ++#define FLASH_5717VENDOR_ST_25USPT 0x03400002 ++#define FLASH_5717VENDOR_ST_45USPT 0x03400001 ++#define FLASH_5720_EEPROM_HD 0x00000001 ++#define FLASH_5720_EEPROM_LD 0x00000003 ++#define FLASH_5762_EEPROM_HD 0x02000001 ++#define FLASH_5762_EEPROM_LD 0x02000003 ++#define FLASH_5762_MX25L_100 0x00800000 ++#define FLASH_5762_MX25L_200 0x00800002 ++#define FLASH_5762_MX25L_400 0x00800001 ++#define FLASH_5762_MX25L_800 0x00800003 ++#define FLASH_5762_MX25L_160_320 0x03800002 ++#define FLASH_5720VENDOR_M_ATMEL_DB011D 0x01000000 ++#define FLASH_5720VENDOR_M_ATMEL_DB021D 0x01000002 ++#define FLASH_5720VENDOR_M_ATMEL_DB041D 0x01000001 ++#define FLASH_5720VENDOR_M_ATMEL_DB081D 0x01000003 ++#define FLASH_5720VENDOR_M_ST_M25PE10 0x02000000 ++#define FLASH_5720VENDOR_M_ST_M25PE20 0x02000002 ++#define FLASH_5720VENDOR_M_ST_M25PE40 0x02000001 ++#define FLASH_5720VENDOR_M_ST_M25PE80 0x02000003 ++#define FLASH_5720VENDOR_M_ST_M45PE10 0x03000000 ++#define FLASH_5720VENDOR_M_ST_M45PE20 0x03000002 ++#define FLASH_5720VENDOR_M_ST_M45PE40 0x03000001 ++#define FLASH_5720VENDOR_M_ST_M45PE80 0x03000003 ++#define FLASH_5720VENDOR_A_ATMEL_DB011B 0x01800000 ++#define FLASH_5720VENDOR_A_ATMEL_DB021B 0x01800002 ++#define FLASH_5720VENDOR_A_ATMEL_DB041B 0x01800001 ++#define FLASH_5720VENDOR_A_ATMEL_DB011D 0x01c00000 ++#define FLASH_5720VENDOR_A_ATMEL_DB021D 0x01c00002 ++#define FLASH_5720VENDOR_A_ATMEL_DB041D 0x01c00001 ++#define FLASH_5720VENDOR_A_ATMEL_DB081D 0x01c00003 ++#define FLASH_5720VENDOR_A_ST_M25PE10 0x02800000 ++#define FLASH_5720VENDOR_A_ST_M25PE20 0x02800002 ++#define FLASH_5720VENDOR_A_ST_M25PE40 0x02800001 ++#define FLASH_5720VENDOR_A_ST_M25PE80 0x02800003 ++#define FLASH_5720VENDOR_A_ST_M45PE10 0x02c00000 ++#define FLASH_5720VENDOR_A_ST_M45PE20 0x02c00002 ++#define FLASH_5720VENDOR_A_ST_M45PE40 0x02c00001 ++#define FLASH_5720VENDOR_A_ST_M45PE80 0x02c00003 ++#define FLASH_5720VENDOR_ATMEL_45USPT 0x03c00000 ++#define FLASH_5720VENDOR_ST_25USPT 0x03c00002 ++#define FLASH_5720VENDOR_ST_45USPT 0x03c00001 ++#define NVRAM_CFG1_5752PAGE_SIZE_MASK 0x70000000 ++#define FLASH_5752PAGE_SIZE_256 0x00000000 ++#define FLASH_5752PAGE_SIZE_512 0x10000000 ++#define FLASH_5752PAGE_SIZE_1K 0x20000000 ++#define FLASH_5752PAGE_SIZE_2K 0x30000000 ++#define FLASH_5752PAGE_SIZE_4K 0x40000000 ++#define FLASH_5752PAGE_SIZE_264 0x50000000 ++#define FLASH_5752PAGE_SIZE_528 0x60000000 ++#define NVRAM_CFG2 0x00007018 ++#define NVRAM_CFG3 0x0000701c ++#define NVRAM_SWARB 0x00007020 ++#define SWARB_REQ_SET0 0x00000001 ++#define SWARB_REQ_SET1 0x00000002 ++#define SWARB_REQ_SET2 0x00000004 ++#define SWARB_REQ_SET3 0x00000008 ++#define SWARB_REQ_CLR0 0x00000010 ++#define SWARB_REQ_CLR1 0x00000020 ++#define SWARB_REQ_CLR2 0x00000040 ++#define SWARB_REQ_CLR3 0x00000080 ++#define SWARB_GNT0 0x00000100 ++#define SWARB_GNT1 0x00000200 ++#define SWARB_GNT2 0x00000400 ++#define SWARB_GNT3 0x00000800 ++#define SWARB_REQ0 0x00001000 ++#define SWARB_REQ1 0x00002000 ++#define SWARB_REQ2 0x00004000 ++#define SWARB_REQ3 0x00008000 ++#define NVRAM_ACCESS 0x00007024 ++#define ACCESS_ENABLE 0x00000001 ++#define ACCESS_WR_ENABLE 0x00000002 ++#define NVRAM_WRITE1 0x00007028 ++/* 0x702c unused */ ++ ++#define NVRAM_ADDR_LOCKOUT 0x00007030 ++#define NVRAM_AUTOSENSE_STATUS 0x00007038 ++#define AUTOSENSE_DEVID 0x00000010 ++#define AUTOSENSE_DEVID_MASK 0x00000007 ++#define AUTOSENSE_SIZE_IN_MB 17 ++/* 0x703c --> 0x7500 unused */ ++ ++#define OTP_MODE 0x00007500 ++#define OTP_MODE_OTP_THRU_GRC 0x00000001 ++#define OTP_CTRL 0x00007504 ++#define OTP_CTRL_OTP_PROG_ENABLE 0x00200000 ++#define OTP_CTRL_OTP_CMD_READ 0x00000000 ++#define OTP_CTRL_OTP_CMD_INIT 0x00000008 ++#define OTP_CTRL_OTP_CMD_START 0x00000001 ++#define OTP_STATUS 0x00007508 ++#define OTP_STATUS_CMD_DONE 0x00000001 ++#define OTP_ADDRESS 0x0000750c ++#define OTP_ADDRESS_MAGIC1 0x000000a0 ++#define OTP_ADDRESS_MAGIC2 0x00000080 ++/* 0x7510 unused */ ++ ++#define OTP_READ_DATA 0x00007514 ++/* 0x7518 --> 0x7c04 unused */ ++ ++#define PCIE_TRANSACTION_CFG 0x00007c04 ++#define PCIE_TRANS_CFG_1SHOT_MSI 0x20000000 ++#define PCIE_TRANS_CFG_LOM 0x00000020 ++/* 0x7c08 --> 0x7d28 unused */ ++ ++#define PCIE_PWR_MGMT_THRESH 0x00007d28 ++#define PCIE_PWR_MGMT_L1_THRESH_MSK 0x0000ff00 ++#define PCIE_PWR_MGMT_L1_THRESH_4MS 0x0000ff00 ++#define PCIE_PWR_MGMT_EXT_ASPM_TMR_EN 0x01000000 ++/* 0x7d2c --> 0x7d54 unused */ ++ ++#define TG3_PCIE_LNKCTL 0x00007d54 ++#define TG3_PCIE_LNKCTL_L1_PLL_PD_EN 0x00000008 ++#define TG3_PCIE_LNKCTL_L1_PLL_PD_DIS 0x00000080 ++/* 0x7d58 --> 0x7e70 unused */ ++ ++#define TG3_PCIE_PHY_TSTCTL 0x00007e2c ++#define TG3_PCIE_PHY_TSTCTL_PCIE10 0x00000040 ++#define TG3_PCIE_PHY_TSTCTL_PSCRAM 0x00000020 ++ ++#define TG3_PCIE_EIDLE_DELAY 0x00007e70 ++#define TG3_PCIE_EIDLE_DELAY_MASK 0x0000001f ++#define TG3_PCIE_EIDLE_DELAY_13_CLKS 0x0000000c ++/* 0x7e74 --> 0x8000 unused */ ++ ++/* Alternate PCIE definitions */ ++#define TG3_PCIE_TLDLPL_PORT 0x00007c00 ++#define TG3_PCIE_DL_LO_FTSMAX 0x0000000c ++#define TG3_PCIE_DL_LO_FTSMAX_MSK 0x000000ff ++#define TG3_PCIE_DL_LO_FTSMAX_VAL 0x0000002c ++#define TG3_PCIE_PL_LO_PHYCTL1 0x00000004 ++#define TG3_PCIE_PL_LO_PHYCTL1_L1PLLPD_EN 0x00001000 ++#define TG3_PCIE_PL_LO_PHYCTL5 0x00000014 ++#define TG3_PCIE_PL_LO_PHYCTL5_DIS_L2CLKREQ 0x80000000 ++ ++#define TG3_REG_BLK_SIZE 0x00008000 ++ ++/* OTP bit definitions */ ++#define TG3_OTP_AGCTGT_MASK 0x000000e0 ++#define TG3_OTP_AGCTGT_SHIFT 1 ++#define TG3_OTP_HPFFLTR_MASK 0x00000300 ++#define TG3_OTP_HPFFLTR_SHIFT 1 ++#define TG3_OTP_HPFOVER_MASK 0x00000400 ++#define TG3_OTP_HPFOVER_SHIFT 1 ++#define TG3_OTP_LPFDIS_MASK 0x00000800 ++#define TG3_OTP_LPFDIS_SHIFT 11 ++#define TG3_OTP_VDAC_MASK 0xff000000 ++#define TG3_OTP_VDAC_SHIFT 24 ++#define TG3_OTP_10BTAMP_MASK 0x0000f000 ++#define TG3_OTP_10BTAMP_SHIFT 8 ++#define TG3_OTP_ROFF_MASK 0x00e00000 ++#define TG3_OTP_ROFF_SHIFT 11 ++#define TG3_OTP_RCOFF_MASK 0x001c0000 ++#define TG3_OTP_RCOFF_SHIFT 16 ++ ++#define TG3_OTP_DEFAULT 0x286c1640 ++ ++ ++/* Hardware Legacy NVRAM layout */ ++#define TG3_NVM_VPD_OFF 0x100 ++#define TG3_NVM_VPD_LEN 256 ++ ++/* Hardware Selfboot NVRAM layout */ ++#define TG3_NVM_HWSB_CFG1 0x00000004 ++#define TG3_NVM_HWSB_CFG1_MAJMSK 0xf8000000 ++#define TG3_NVM_HWSB_CFG1_MAJSFT 27 ++#define TG3_NVM_HWSB_CFG1_MINMSK 0x07c00000 ++#define TG3_NVM_HWSB_CFG1_MINSFT 22 ++ ++#define TG3_EEPROM_MAGIC 0x669955aa ++#define TG3_EEPROM_MAGIC_FW 0xa5000000 ++#define TG3_EEPROM_MAGIC_FW_MSK 0xff000000 ++#define TG3_EEPROM_SB_FORMAT_MASK 0x00e00000 ++#define TG3_EEPROM_SB_FORMAT_1 0x00200000 ++#define TG3_EEPROM_SB_REVISION_MASK 0x001f0000 ++#define TG3_EEPROM_SB_REVISION_0 0x00000000 ++#define TG3_EEPROM_SB_REVISION_2 0x00020000 ++#define TG3_EEPROM_SB_REVISION_3 0x00030000 ++#define TG3_EEPROM_SB_REVISION_4 0x00040000 ++#define TG3_EEPROM_SB_REVISION_5 0x00050000 ++#define TG3_EEPROM_SB_REVISION_6 0x00060000 ++#define TG3_EEPROM_MAGIC_HW 0xabcd ++#define TG3_EEPROM_MAGIC_HW_MSK 0xffff ++ ++#define TG3_NVM_DIR_START 0x18 ++#define TG3_NVM_DIR_END 0x78 ++#define TG3_NVM_DIRENT_SIZE 0xc ++#define TG3_NVM_DIRTYPE_SHIFT 24 ++#define TG3_NVM_DIRTYPE_LENMSK 0x003fffff ++#define TG3_NVM_DIRTYPE_ASFINI 1 ++#define TG3_NVM_DIRTYPE_EXTVPD 20 ++#define TG3_NVM_PTREV_BCVER 0x94 ++#define TG3_NVM_BCVER_MAJMSK 0x0000ff00 ++#define TG3_NVM_BCVER_MAJSFT 8 ++#define TG3_NVM_BCVER_MINMSK 0x000000ff ++ ++#define TG3_EEPROM_SB_F1R0_EDH_OFF 0x10 ++#define TG3_EEPROM_SB_F1R2_EDH_OFF 0x14 ++#define TG3_EEPROM_SB_F1R2_MBA_OFF 0x10 ++#define TG3_EEPROM_SB_F1R3_EDH_OFF 0x18 ++#define TG3_EEPROM_SB_F1R4_EDH_OFF 0x1c ++#define TG3_EEPROM_SB_F1R5_EDH_OFF 0x20 ++#define TG3_EEPROM_SB_F1R6_EDH_OFF 0x4c ++#define TG3_EEPROM_SB_EDH_MAJ_MASK 0x00000700 ++#define TG3_EEPROM_SB_EDH_MAJ_SHFT 8 ++#define TG3_EEPROM_SB_EDH_MIN_MASK 0x000000ff ++#define TG3_EEPROM_SB_EDH_BLD_MASK 0x0000f800 ++#define TG3_EEPROM_SB_EDH_BLD_SHFT 11 ++ ++ ++/* 32K Window into NIC internal memory */ ++#define NIC_SRAM_WIN_BASE 0x00008000 ++ ++/* Offsets into first 32k of NIC internal memory. */ ++#define NIC_SRAM_PAGE_ZERO 0x00000000 ++#define NIC_SRAM_SEND_RCB 0x00000100 /* 16 * TG3_BDINFO_... */ ++#define NIC_SRAM_RCV_RET_RCB 0x00000200 /* 16 * TG3_BDINFO_... */ ++#define NIC_SRAM_STATS_BLK 0x00000300 ++#define NIC_SRAM_STATUS_BLK 0x00000b00 ++ ++#define NIC_SRAM_FIRMWARE_MBOX 0x00000b50 ++#define NIC_SRAM_FIRMWARE_MBOX_MAGIC1 0x4B657654 ++#define NIC_SRAM_FIRMWARE_MBOX_MAGIC2 0x4861764b /* !dma on linkchg */ ++ ++#define NIC_SRAM_DATA_SIG 0x00000b54 ++#define NIC_SRAM_DATA_SIG_MAGIC 0x4b657654 /* ascii for 'KevT' */ ++ ++#define NIC_SRAM_DATA_CFG 0x00000b58 ++#define NIC_SRAM_DATA_CFG_LED_MODE_MASK 0x0000000c ++#define NIC_SRAM_DATA_CFG_LED_MODE_MAC 0x00000000 ++#define NIC_SRAM_DATA_CFG_LED_MODE_PHY_1 0x00000004 ++#define NIC_SRAM_DATA_CFG_LED_MODE_PHY_2 0x00000008 ++#define NIC_SRAM_DATA_CFG_PHY_TYPE_MASK 0x00000030 ++#define NIC_SRAM_DATA_CFG_PHY_TYPE_UNKNOWN 0x00000000 ++#define NIC_SRAM_DATA_CFG_PHY_TYPE_COPPER 0x00000010 ++#define NIC_SRAM_DATA_CFG_PHY_TYPE_FIBER 0x00000020 ++#define NIC_SRAM_DATA_CFG_WOL_ENABLE 0x00000040 ++#define NIC_SRAM_DATA_CFG_ASF_ENABLE 0x00000080 ++#define NIC_SRAM_DATA_CFG_EEPROM_WP 0x00000100 ++#define NIC_SRAM_DATA_CFG_MINI_PCI 0x00001000 ++#define NIC_SRAM_DATA_CFG_FIBER_WOL 0x00004000 ++#define NIC_SRAM_DATA_CFG_NO_GPIO2 0x00100000 ++#define NIC_SRAM_DATA_CFG_APE_ENABLE 0x00200000 ++ ++#define NIC_SRAM_DATA_VER 0x00000b5c ++#define NIC_SRAM_DATA_VER_SHIFT 16 ++ ++#define NIC_SRAM_DATA_PHY_ID 0x00000b74 ++#define NIC_SRAM_DATA_PHY_ID1_MASK 0xffff0000 ++#define NIC_SRAM_DATA_PHY_ID2_MASK 0x0000ffff ++ ++#define NIC_SRAM_FW_CMD_MBOX 0x00000b78 ++#define FWCMD_NICDRV_ALIVE 0x00000001 ++#define FWCMD_NICDRV_PAUSE_FW 0x00000002 ++#define FWCMD_NICDRV_IPV4ADDR_CHG 0x00000003 ++#define FWCMD_NICDRV_IPV6ADDR_CHG 0x00000004 ++#define FWCMD_NICDRV_FIX_DMAR 0x00000005 ++#define FWCMD_NICDRV_FIX_DMAW 0x00000006 ++#define FWCMD_NICDRV_LINK_UPDATE 0x0000000c ++#define FWCMD_NICDRV_ALIVE2 0x0000000d ++#define FWCMD_NICDRV_ALIVE3 0x0000000e ++#define NIC_SRAM_FW_CMD_LEN_MBOX 0x00000b7c ++#define NIC_SRAM_FW_CMD_DATA_MBOX 0x00000b80 ++#define NIC_SRAM_FW_ASF_STATUS_MBOX 0x00000c00 ++#define NIC_SRAM_FW_DRV_STATE_MBOX 0x00000c04 ++#define DRV_STATE_START 0x00000001 ++#define DRV_STATE_START_DONE 0x80000001 ++#define DRV_STATE_UNLOAD 0x00000002 ++#define DRV_STATE_UNLOAD_DONE 0x80000002 ++#define DRV_STATE_WOL 0x00000003 ++#define DRV_STATE_SUSPEND 0x00000004 ++ ++#define NIC_SRAM_FW_RESET_TYPE_MBOX 0x00000c08 ++ ++#define NIC_SRAM_MAC_ADDR_HIGH_MBOX 0x00000c14 ++#define NIC_SRAM_MAC_ADDR_LOW_MBOX 0x00000c18 ++ ++#define NIC_SRAM_WOL_MBOX 0x00000d30 ++#define WOL_SIGNATURE 0x474c0000 ++#define WOL_DRV_STATE_SHUTDOWN 0x00000001 ++#define WOL_DRV_WOL 0x00000002 ++#define WOL_SET_MAGIC_PKT 0x00000004 ++ ++#define NIC_SRAM_DATA_CFG_2 0x00000d38 ++ ++#define NIC_SRAM_DATA_CFG_2_APD_EN 0x00004000 ++#define SHASTA_EXT_LED_MODE_MASK 0x00018000 ++#define SHASTA_EXT_LED_LEGACY 0x00000000 ++#define SHASTA_EXT_LED_SHARED 0x00008000 ++#define SHASTA_EXT_LED_MAC 0x00010000 ++#define SHASTA_EXT_LED_COMBO 0x00018000 ++ ++#define NIC_SRAM_DATA_CFG_3 0x00000d3c ++#define NIC_SRAM_ASPM_DEBOUNCE 0x00000002 ++#define NIC_SRAM_LNK_FLAP_AVOID 0x00400000 ++#define NIC_SRAM_1G_ON_VAUX_OK 0x00800000 ++ ++#define NIC_SRAM_DATA_CFG_4 0x00000d60 ++#define NIC_SRAM_GMII_MODE 0x00000002 ++#define NIC_SRAM_RGMII_INBAND_DISABLE 0x00000004 ++#define NIC_SRAM_RGMII_EXT_IBND_RX_EN 0x00000008 ++#define NIC_SRAM_RGMII_EXT_IBND_TX_EN 0x00000010 ++ ++#define NIC_SRAM_CPMU_STATUS 0x00000e00 ++#define NIC_SRAM_CPMUSTAT_SIG 0x0000362c ++#define NIC_SRAM_CPMUSTAT_SIG_MSK 0x0000ffff ++ ++#define NIC_SRAM_DATA_CFG_5 0x00000e0c ++#define NIC_SRAM_DISABLE_1G_HALF_ADV 0x00000002 ++ ++#define NIC_SRAM_RX_MINI_BUFFER_DESC 0x00001000 ++ ++#define NIC_SRAM_DMA_DESC_POOL_BASE 0x00002000 ++#define NIC_SRAM_DMA_DESC_POOL_SIZE 0x00002000 ++#define NIC_SRAM_TX_BUFFER_DESC 0x00004000 /* 512 entries */ ++#define NIC_SRAM_RX_BUFFER_DESC 0x00006000 /* 256 entries */ ++#define NIC_SRAM_RX_JUMBO_BUFFER_DESC 0x00007000 /* 256 entries */ ++#define NIC_SRAM_MBUF_POOL_BASE 0x00008000 ++#define NIC_SRAM_MBUF_POOL_SIZE96 0x00018000 ++#define NIC_SRAM_MBUF_POOL_SIZE64 0x00010000 ++#define NIC_SRAM_MBUF_POOL_BASE5705 0x00010000 ++#define NIC_SRAM_MBUF_POOL_SIZE5705 0x0000e000 ++ ++#define TG3_SRAM_RXCPU_SCRATCH_BASE_57766 0x00030000 ++#define TG3_SRAM_RXCPU_SCRATCH_SIZE_57766 0x00010000 ++#define TG3_SBROM_IN_SERVICE_LOOP 0x51 ++ ++#define TG3_SRAM_RX_STD_BDCACHE_SIZE_5700 128 ++#define TG3_SRAM_RX_STD_BDCACHE_SIZE_5755 64 ++#define TG3_SRAM_RX_STD_BDCACHE_SIZE_5906 32 ++ ++#define TG3_SRAM_RX_JMB_BDCACHE_SIZE_5700 64 ++#define TG3_SRAM_RX_JMB_BDCACHE_SIZE_5717 16 ++ ++ ++/* Currently this is fixed. */ ++#define TG3_PHY_PCIE_ADDR 0x00 ++#define TG3_PHY_MII_ADDR 0x01 ++ ++ ++/*** Tigon3 specific PHY MII registers. ***/ ++#define MII_TG3_MMD_CTRL 0x0d /* MMD Access Control register */ ++#define MII_TG3_MMD_CTRL_DATA_NOINC 0x4000 ++#define MII_TG3_MMD_ADDRESS 0x0e /* MMD Address Data register */ ++ ++#define MII_TG3_EXT_CTRL 0x10 /* Extended control register */ ++#define MII_TG3_EXT_CTRL_FIFO_ELASTIC 0x0001 ++#define MII_TG3_EXT_CTRL_LNK3_LED_MODE 0x0002 ++#define MII_TG3_EXT_CTRL_FORCE_LED_OFF 0x0008 ++#define MII_TG3_EXT_CTRL_TBI 0x8000 ++ ++#define MII_TG3_EXT_STAT 0x11 /* Extended status register */ ++#define MII_TG3_EXT_STAT_MDIX 0x2000 ++#define MII_TG3_EXT_STAT_LPASS 0x0100 ++ ++#define MII_TG3_RXR_COUNTERS 0x14 /* Local/Remote Receiver Counts */ ++#define MII_TG3_DSP_RW_PORT 0x15 /* DSP coefficient read/write port */ ++#define MII_TG3_DSP_CONTROL 0x16 /* DSP control register */ ++#define MII_TG3_DSP_ADDRESS 0x17 /* DSP address register */ ++ ++#define MII_TG3_DSP_TAP1 0x0001 ++#define MII_TG3_DSP_TAP1_AGCTGT_DFLT 0x0007 ++#define MII_TG3_DSP_TAP26 0x001a ++#define MII_TG3_DSP_TAP26_ALNOKO 0x0001 ++#define MII_TG3_DSP_TAP26_RMRXSTO 0x0002 ++#define MII_TG3_DSP_TAP26_OPCSINPT 0x0004 ++#define MII_TG3_DSP_AADJ1CH0 0x001f ++#define MII_TG3_DSP_CH34TP2 0x4022 ++#define MII_TG3_DSP_CH34TP2_HIBW01 0x01ff ++#define MII_TG3_DSP_AADJ1CH3 0x601f ++#define MII_TG3_DSP_AADJ1CH3_ADCCKADJ 0x0002 ++#define MII_TG3_DSP_TLER 0x0d40 /* Top Level Expansion reg */ ++#define MII_TG3_DSP_TLER_AUTOGREEEN_EN 0x0001 ++#define MII_TG3_DSP_EXP1_INT_STAT 0x0f01 ++#define MII_TG3_DSP_EXP8 0x0f08 ++#define MII_TG3_DSP_EXP8_REJ2MHz 0x0001 ++#define MII_TG3_DSP_EXP8_AEDW 0x0200 ++#define MII_TG3_DSP_EXP75 0x0f75 ++#define MII_TG3_DSP_EXP75_SUP_CM_OSC 0x0001 ++#define MII_TG3_DSP_EXP96 0x0f96 ++#define MII_TG3_DSP_EXP97 0x0f97 ++ ++#define MII_TG3_AUX_CTRL 0x18 /* auxilliary control register */ ++ ++#define MII_TG3_AUXCTL_SHDWSEL_AUXCTL 0x0000 ++#define MII_TG3_AUXCTL_ACTL_TX_6DB 0x0400 ++#define MII_TG3_AUXCTL_ACTL_SMDSP_ENA 0x0800 ++#define MII_TG3_AUXCTL_ACTL_EXTPKTLEN 0x4000 ++#define MII_TG3_AUXCTL_ACTL_EXTLOOPBK 0x8000 ++ ++#define MII_TG3_AUXCTL_SHDWSEL_PWRCTL 0x0002 ++#define MII_TG3_AUXCTL_PCTL_WOL_EN 0x0008 ++#define MII_TG3_AUXCTL_PCTL_100TX_LPWR 0x0010 ++#define MII_TG3_AUXCTL_PCTL_SPR_ISOLATE 0x0020 ++#define MII_TG3_AUXCTL_PCTL_CL_AB_TXDAC 0x0040 ++#define MII_TG3_AUXCTL_PCTL_VREG_11V 0x0180 ++ ++#define MII_TG3_AUXCTL_SHDWSEL_MISCTEST 0x0004 ++ ++#define MII_TG3_AUXCTL_SHDWSEL_MISC 0x0007 ++#define MII_TG3_AUXCTL_MISC_WIRESPD_EN 0x0010 ++#define MII_TG3_AUXCTL_MISC_RGMII_OOBSC 0x0020 ++#define MII_TG3_AUXCTL_MISC_FORCE_AMDIX 0x0200 ++#define MII_TG3_AUXCTL_MISC_RDSEL_SHIFT 12 ++#define MII_TG3_AUXCTL_MISC_WREN 0x8000 ++ ++#define MII_TG3_AUX_STAT 0x19 /* auxilliary status register */ ++#define MII_TG3_AUX_STAT_LPASS 0x0004 ++#define MII_TG3_AUX_STAT_SPDMASK 0x0700 ++#define MII_TG3_AUX_STAT_10HALF 0x0100 ++#define MII_TG3_AUX_STAT_10FULL 0x0200 ++#define MII_TG3_AUX_STAT_100HALF 0x0300 ++#define MII_TG3_AUX_STAT_100_4 0x0400 ++#define MII_TG3_AUX_STAT_100FULL 0x0500 ++#define MII_TG3_AUX_STAT_1000HALF 0x0600 ++#define MII_TG3_AUX_STAT_1000FULL 0x0700 ++#define MII_TG3_AUX_STAT_100 0x0008 ++#define MII_TG3_AUX_STAT_FULL 0x0001 ++ ++#define MII_TG3_ISTAT 0x1a /* IRQ status register */ ++#define MII_TG3_IMASK 0x1b /* IRQ mask register */ ++ ++/* ISTAT/IMASK event bits */ ++#define MII_TG3_INT_LINKCHG 0x0002 ++#define MII_TG3_INT_SPEEDCHG 0x0004 ++#define MII_TG3_INT_DUPLEXCHG 0x0008 ++#define MII_TG3_INT_ANEG_PAGE_RX 0x0400 ++ ++#define MII_TG3_MISC_SHDW 0x1c /* Misc shadow register */ ++#define MII_TG3_MISC_SHDW_WREN 0x8000 ++ ++#define MII_TG3_MISC_SHDW_SCR5_C125OE 0x0001 ++#define MII_TG3_MISC_SHDW_SCR5_DLLAPD 0x0002 ++#define MII_TG3_MISC_SHDW_SCR5_SDTL 0x0004 ++#define MII_TG3_MISC_SHDW_SCR5_DLPTLM 0x0008 ++#define MII_TG3_MISC_SHDW_SCR5_LPED 0x0010 ++#define MII_TG3_MISC_SHDW_SCR5_TRDDAPD 0x0100 ++#define MII_TG3_MISC_SHDW_SCR5_SEL 0x1400 ++ ++#define MII_TG3_MISC_SHDW_APD_WKTM_84MS 0x0001 ++#define MII_TG3_MISC_SHDW_APD_ENABLE 0x0020 ++#define MII_TG3_MISC_SHDW_APD_SEL 0x2800 ++ ++#define MII_TG3_MISC_SHDW_RGMII_MODESEL0 0x0008 ++#define MII_TG3_MISC_SHDW_RGMII_MODESEL1 0x0010 ++#define MII_TG3_MISC_SHDW_RGMII_SEL 0x2c00 ++ ++#define MII_TG3_TEST1 0x1e ++#define MII_TG3_TEST1_TRIM_EN 0x0010 ++#define MII_TG3_TEST1_CRC_EN 0x8000 ++ ++/* Clause 45 expansion registers */ ++#define TG3_CL45_D7_EEEADV_CAP 0x003c ++#define TG3_CL45_D7_EEEADV_CAP_100TX 0x0002 ++#define TG3_CL45_D7_EEEADV_CAP_1000T 0x0004 ++#define TG3_CL45_D7_EEERES_STAT 0x803e ++#define TG3_CL45_D7_EEERES_STAT_LP_100TX 0x0002 ++#define TG3_CL45_D7_EEERES_STAT_LP_1000T 0x0004 ++ ++ ++/* Fast Ethernet Tranceiver definitions */ ++#define MII_TG3_FET_PTEST 0x17 ++#define MII_TG3_FET_PTEST_TRIM_SEL 0x0010 ++#define MII_TG3_FET_PTEST_TRIM_2 0x0002 ++#define MII_TG3_FET_PTEST_FRC_TX_LINK 0x1000 ++#define MII_TG3_FET_PTEST_FRC_TX_LOCK 0x0800 ++ ++#define MII_TG3_FET_GEN_STAT 0x1c ++#define MII_TG3_FET_GEN_STAT_MDIXSTAT 0x2000 ++ ++#define MII_TG3_FET_TEST 0x1f ++#define MII_TG3_FET_SHADOW_EN 0x0080 ++ ++#define MII_TG3_FET_SHDW_MISCCTRL 0x10 ++#define MII_TG3_FET_SHDW_MISCCTRL_ELBK 0x1000 ++#define MII_TG3_FET_SHDW_MISCCTRL_MDIX 0x4000 ++ ++#define MII_TG3_FET_SHDW_AUXMODE4 0x1a ++#define MII_TG3_FET_SHDW_AM4_LED_MODE1 0x0001 ++#define MII_TG3_FET_SHDW_AM4_LED_MASK 0x0003 ++#define MII_TG3_FET_SHDW_AUXMODE4_SBPD 0x0008 ++ ++#define MII_TG3_FET_SHDW_AUXSTAT2 0x1b ++#define MII_TG3_FET_SHDW_AUXSTAT2_APD 0x0020 ++ ++/* Serdes PHY Register Definitions */ ++#define SERDES_TG3_1000X_STATUS 0x14 ++#define SERDES_TG3_SGMII_MODE 0x0001 ++#define SERDES_TG3_LINK_UP 0x0002 ++#define SERDES_TG3_FULL_DUPLEX 0x0004 ++#define SERDES_TG3_SPEED_100 0x0008 ++#define SERDES_TG3_SPEED_1000 0x0010 ++ ++/* APE registers. Accessible through BAR1 */ ++#define TG3_APE_GPIO_MSG 0x0008 ++#define TG3_APE_GPIO_MSG_SHIFT 4 ++#define TG3_APE_EVENT 0x000c ++#define APE_EVENT_1 0x00000001 ++#define TG3_APE_LOCK_REQ 0x002c ++#define APE_LOCK_REQ_DRIVER 0x00001000 ++#define TG3_APE_LOCK_GRANT 0x004c ++#define APE_LOCK_GRANT_DRIVER 0x00001000 ++#define TG3_APE_STICKY_TMR 0x00b0 ++#define TG3_APE_OTP_CTRL 0x00e8 ++#define APE_OTP_CTRL_PROG_EN 0x200000 ++#define APE_OTP_CTRL_CMD_RD 0x000000 ++#define APE_OTP_CTRL_START 0x000001 ++#define TG3_APE_OTP_STATUS 0x00ec ++#define APE_OTP_STATUS_CMD_DONE 0x000001 ++#define TG3_APE_OTP_ADDR 0x00f0 ++#define APE_OTP_ADDR_CPU_ENABLE 0x80000000 ++#define TG3_APE_OTP_RD_DATA 0x00f8 ++ ++#define OTP_ADDRESS_MAGIC0 0x00000050 ++#define TG3_OTP_MAGIC0_VALID(val) \ ++ ((((val) & 0xf0000000) == 0xa0000000) ||\ ++ (((val) & 0x0f000000) == 0x0a000000)) ++ ++/* APE shared memory. Accessible through BAR1 */ ++#define TG3_APE_SHMEM_BASE 0x4000 ++#define TG3_APE_SEG_SIG 0x4000 ++#define APE_SEG_SIG_MAGIC 0x41504521 ++#define TG3_APE_FW_STATUS 0x400c ++#define APE_FW_STATUS_READY 0x00000100 ++#define TG3_APE_FW_FEATURES 0x4010 ++#define TG3_APE_FW_FEATURE_NCSI 0x00000002 ++#define TG3_APE_FW_VERSION 0x4018 ++#define APE_FW_VERSION_MAJMSK 0xff000000 ++#define APE_FW_VERSION_MAJSFT 24 ++#define APE_FW_VERSION_MINMSK 0x00ff0000 ++#define APE_FW_VERSION_MINSFT 16 ++#define APE_FW_VERSION_REVMSK 0x0000ff00 ++#define APE_FW_VERSION_REVSFT 8 ++#define APE_FW_VERSION_BLDMSK 0x000000ff ++#define TG3_APE_SEG_MSG_BUF_OFF 0x401c ++#define TG3_APE_SEG_MSG_BUF_LEN 0x4020 ++#define TG3_APE_HOST_SEG_SIG 0x4200 ++#define APE_HOST_SEG_SIG_MAGIC 0x484f5354 ++#define TG3_APE_HOST_SEG_LEN 0x4204 ++#define APE_HOST_SEG_LEN_MAGIC 0x00000020 ++#define TG3_APE_HOST_INIT_COUNT 0x4208 ++#define TG3_APE_HOST_DRIVER_ID 0x420c ++#define APE_HOST_DRIVER_ID_LINUX 0xf0000000 ++#define APE_HOST_DRIVER_ID_ESX 0xfa000000 ++#if !defined(__VMKLNX__) ++#define APE_HOST_DRIVER_ID_MAGIC(maj, min, rev) \ ++ (APE_HOST_DRIVER_ID_LINUX | (maj & 0xff) << 16 | (min & 0xff) << 8 |\ ++ (rev & 0xff)) ++#else ++#define APE_HOST_DRIVER_ID_MAGIC(maj, min, rev) \ ++ (APE_HOST_DRIVER_ID_ESX | (maj & 0xff) << 16 | (min & 0xff) << 8 |\ ++ (rev & 0xff)) ++#endif ++#define TG3_APE_HOST_BEHAVIOR 0x4210 ++#define APE_HOST_BEHAV_NO_PHYLOCK 0x00000001 ++#define TG3_APE_HOST_HEARTBEAT_INT_MS 0x4214 ++#define APE_HOST_HEARTBEAT_INT_DISABLE 0 ++#define APE_HOST_HEARTBEAT_INT_5SEC 5000 ++#define TG3_APE_HOST_HEARTBEAT_COUNT 0x4218 ++#define TG3_APE_HOST_DRVR_STATE 0x421c ++#define TG3_APE_HOST_DRVR_STATE_START 0x00000001 ++#define TG3_APE_HOST_DRVR_STATE_UNLOAD 0x00000002 ++#define TG3_APE_HOST_DRVR_STATE_WOL 0x00000003 ++#define TG3_APE_HOST_WOL_SPEED 0x4224 ++#define TG3_APE_HOST_WOL_SPEED_AUTO 0x00008000 ++ ++#define TG3_APE_EVENT_STATUS 0x4300 ++ ++#define APE_EVENT_STATUS_DRIVER_EVNT 0x00000010 ++#define APE_EVENT_STATUS_STATE_CHNGE 0x00000500 ++#define APE_EVENT_STATUS_SCRTCHPD_READ 0x00001600 ++#define APE_EVENT_STATUS_SCRTCHPD_WRITE 0x00001700 ++#define APE_EVENT_STATUS_STATE_START 0x00010000 ++#define APE_EVENT_STATUS_STATE_UNLOAD 0x00020000 ++#define APE_EVENT_STATUS_STATE_WOL 0x00030000 ++#define APE_EVENT_STATUS_STATE_SUSPEND 0x00040000 ++#define APE_EVENT_STATUS_EVENT_PENDING 0x80000000 ++ ++#define TG3_APE_PER_LOCK_REQ 0x8400 ++#define APE_LOCK_PER_REQ_DRIVER 0x00001000 ++#define TG3_APE_PER_LOCK_GRANT 0x8420 ++#define APE_PER_LOCK_GRANT_DRIVER 0x00001000 ++ ++/* APE convenience enumerations. */ ++#define TG3_APE_LOCK_PHY0 0 ++#define TG3_APE_LOCK_GRC 1 ++#define TG3_APE_LOCK_PHY1 2 ++#define TG3_APE_LOCK_PHY2 3 ++#define TG3_APE_LOCK_MEM 4 ++#define TG3_APE_LOCK_PHY3 5 ++#define TG3_APE_LOCK_GPIO 7 ++#define TG3_APE_HB_INTERVAL (tp->ape_hb_interval) ++ ++/* There are two ways to manage the TX descriptors on the tigon3. ++ * Either the descriptors are in host DMA'able memory, or they ++ * exist only in the cards on-chip SRAM. All 16 send bds are under ++ * the same mode, they may not be configured individually. ++ * ++ * This driver always uses host memory TX descriptors. ++ * ++ * To use host memory TX descriptors: ++ * 1) Set GRC_MODE_HOST_SENDBDS in GRC_MODE register. ++ * Make sure GRC_MODE_4X_NIC_SEND_RINGS is clear. ++ * 2) Allocate DMA'able memory. ++ * 3) In NIC_SRAM_SEND_RCB (of desired index) of on-chip SRAM: ++ * a) Set TG3_BDINFO_HOST_ADDR to DMA address of memory ++ * obtained in step 2 ++ * b) Set TG3_BDINFO_NIC_ADDR to NIC_SRAM_TX_BUFFER_DESC. ++ * c) Set len field of TG3_BDINFO_MAXLEN_FLAGS to number ++ * of TX descriptors. Leave flags field clear. ++ * 4) Access TX descriptors via host memory. The chip ++ * will refetch into local SRAM as needed when producer ++ * index mailboxes are updated. ++ * ++ * To use on-chip TX descriptors: ++ * 1) Set GRC_MODE_4X_NIC_SEND_RINGS in GRC_MODE register. ++ * Make sure GRC_MODE_HOST_SENDBDS is clear. ++ * 2) In NIC_SRAM_SEND_RCB (of desired index) of on-chip SRAM: ++ * a) Set TG3_BDINFO_HOST_ADDR to zero. ++ * b) Set TG3_BDINFO_NIC_ADDR to NIC_SRAM_TX_BUFFER_DESC ++ * c) TG3_BDINFO_MAXLEN_FLAGS is don't care. ++ * 3) Access TX descriptors directly in on-chip SRAM ++ * using normal {read,write}l(). (and not using ++ * pointer dereferencing of ioremap()'d memory like ++ * the broken Broadcom driver does) ++ * ++ * Note that BDINFO_FLAGS_DISABLED should be set in the flags field of ++ * TG3_BDINFO_MAXLEN_FLAGS of all unused SEND_RCB indices. ++ */ ++struct tg3_tx_buffer_desc { ++ u32 addr_hi; ++ u32 addr_lo; ++ ++ u32 len_flags; ++#define TXD_FLAG_TCPUDP_CSUM 0x0001 ++#define TXD_FLAG_IP_CSUM 0x0002 ++#define TXD_FLAG_END 0x0004 ++#define TXD_FLAG_IP_FRAG 0x0008 ++#define TXD_FLAG_JMB_PKT 0x0008 ++#define TXD_FLAG_IP_FRAG_END 0x0010 ++#define TXD_FLAG_HWTSTAMP 0x0020 ++#define TXD_FLAG_VLAN 0x0040 ++#define TXD_FLAG_COAL_NOW 0x0080 ++#define TXD_FLAG_CPU_PRE_DMA 0x0100 ++#define TXD_FLAG_CPU_POST_DMA 0x0200 ++#define TXD_FLAG_ADD_SRC_ADDR 0x1000 ++#define TXD_FLAG_CHOOSE_SRC_ADDR 0x6000 ++#define TXD_FLAG_NO_CRC 0x8000 ++#define TXD_LEN_SHIFT 16 ++ ++ u32 vlan_tag; ++#define TXD_VLAN_TAG_SHIFT 0 ++#define TXD_MSS_SHIFT 16 ++}; ++ ++#define TXD_ADDR 0x00UL /* 64-bit */ ++#define TXD_LEN_FLAGS 0x08UL /* 32-bit (upper 16-bits are len) */ ++#define TXD_VLAN_TAG 0x0cUL /* 32-bit (upper 16-bits are tag) */ ++#define TXD_SIZE 0x10UL ++ ++struct tg3_rx_buffer_desc { ++ u32 addr_hi; ++ u32 addr_lo; ++ ++ u32 idx_len; ++#define RXD_IDX_MASK 0xffff0000 ++#define RXD_IDX_SHIFT 16 ++#define RXD_LEN_MASK 0x0000ffff ++#define RXD_LEN_SHIFT 0 ++ ++ u32 type_flags; ++#define RXD_TYPE_SHIFT 16 ++#define RXD_FLAGS_SHIFT 0 ++ ++#define RXD_FLAG_END 0x0004 ++#define RXD_FLAG_MINI 0x0800 ++#define RXD_FLAG_JUMBO 0x0020 ++#define RXD_FLAG_VLAN 0x0040 ++#define RXD_FLAG_ERROR 0x0400 ++#define RXD_FLAG_IP_CSUM 0x1000 ++#define RXD_FLAG_TCPUDP_CSUM 0x2000 ++#define RXD_FLAG_IS_TCP 0x4000 ++#define RXD_FLAG_PTPSTAT_MASK 0x0210 ++#define RXD_FLAG_PTPSTAT_PTPV1 0x0010 ++#define RXD_FLAG_PTPSTAT_PTPV2 0x0200 ++ ++ u32 ip_tcp_csum; ++#define RXD_IPCSUM_MASK 0xffff0000 ++#define RXD_IPCSUM_SHIFT 16 ++#define RXD_TCPCSUM_MASK 0x0000ffff ++#define RXD_TCPCSUM_SHIFT 0 ++ ++ u32 err_vlan; ++ ++#define RXD_VLAN_MASK 0x0000ffff ++ ++#define RXD_ERR_BAD_CRC 0x00010000 ++#define RXD_ERR_COLLISION 0x00020000 ++#define RXD_ERR_LINK_LOST 0x00040000 ++#define RXD_ERR_PHY_DECODE 0x00080000 ++#define RXD_ERR_ODD_NIBBLE_RCVD_MII 0x00100000 ++#define RXD_ERR_MAC_ABRT 0x00200000 ++#define RXD_ERR_TOO_SMALL 0x00400000 ++#define RXD_ERR_NO_RESOURCES 0x00800000 ++#define RXD_ERR_HUGE_FRAME 0x01000000 ++ ++#define RXD_ERR_MASK (RXD_ERR_BAD_CRC | RXD_ERR_COLLISION | \ ++ RXD_ERR_LINK_LOST | RXD_ERR_PHY_DECODE | \ ++ RXD_ERR_MAC_ABRT | RXD_ERR_TOO_SMALL | \ ++ RXD_ERR_NO_RESOURCES | RXD_ERR_HUGE_FRAME) ++ ++ u32 reserved; ++ u32 opaque; ++#define RXD_OPAQUE_INDEX_MASK 0x0000ffff ++#define RXD_OPAQUE_INDEX_SHIFT 0 ++#define RXD_OPAQUE_RING_STD 0x00010000 ++#define RXD_OPAQUE_RING_JUMBO 0x00020000 ++#define RXD_OPAQUE_RING_MINI 0x00040000 ++#define RXD_OPAQUE_RING_MASK 0x00070000 ++}; ++ ++struct tg3_ext_rx_buffer_desc { ++ struct { ++ u32 addr_hi; ++ u32 addr_lo; ++ } addrlist[3]; ++ u32 len2_len1; ++ u32 resv_len3; ++ struct tg3_rx_buffer_desc std; ++}; ++ ++/* We only use this when testing out the DMA engine ++ * at probe time. This is the internal format of buffer ++ * descriptors used by the chip at NIC_SRAM_DMA_DESCS. ++ */ ++struct tg3_internal_buffer_desc { ++ u32 addr_hi; ++ u32 addr_lo; ++ u32 nic_mbuf; ++ /* XXX FIX THIS */ ++#ifdef __BIG_ENDIAN ++ u16 cqid_sqid; ++ u16 len; ++#else ++ u16 len; ++ u16 cqid_sqid; ++#endif ++ u32 flags; ++ u32 __cookie1; ++ u32 __cookie2; ++ u32 __cookie3; ++}; ++ ++#define TG3_HW_STATUS_SIZE 0x50 ++struct tg3_hw_status { ++ volatile u32 status; ++#define SD_STATUS_UPDATED 0x00000001 ++#define SD_STATUS_LINK_CHG 0x00000002 ++#define SD_STATUS_ERROR 0x00000004 ++ ++ volatile u32 status_tag; ++ ++#ifdef __BIG_ENDIAN ++ volatile u16 rx_consumer; ++ volatile u16 rx_jumbo_consumer; ++#else ++ volatile u16 rx_jumbo_consumer; ++ volatile u16 rx_consumer; ++#endif ++ ++#ifdef __BIG_ENDIAN ++ volatile u16 reserved; ++ volatile u16 rx_mini_consumer; ++#else ++ volatile u16 rx_mini_consumer; ++ volatile u16 reserved; ++#endif ++ struct { ++#ifdef __BIG_ENDIAN ++ volatile u16 tx_consumer; ++ volatile u16 rx_producer; ++#else ++ volatile u16 rx_producer; ++ volatile u16 tx_consumer; ++#endif ++ } idx[16]; ++}; ++ ++typedef struct { ++ u32 high, low; ++} tg3_stat64_t; ++ ++struct tg3_hw_stats { ++ u8 __reserved0[0x400-0x300]; ++ ++ /* Statistics maintained by Receive MAC. */ ++ tg3_stat64_t rx_octets; ++ u64 __reserved1; ++ tg3_stat64_t rx_fragments; ++ tg3_stat64_t rx_ucast_packets; ++ tg3_stat64_t rx_mcast_packets; ++ tg3_stat64_t rx_bcast_packets; ++ tg3_stat64_t rx_fcs_errors; ++ tg3_stat64_t rx_align_errors; ++ tg3_stat64_t rx_xon_pause_rcvd; ++ tg3_stat64_t rx_xoff_pause_rcvd; ++ tg3_stat64_t rx_mac_ctrl_rcvd; ++ tg3_stat64_t rx_xoff_entered; ++ tg3_stat64_t rx_frame_too_long_errors; ++ tg3_stat64_t rx_jabbers; ++ tg3_stat64_t rx_undersize_packets; ++ tg3_stat64_t rx_in_length_errors; ++ tg3_stat64_t rx_out_length_errors; ++ tg3_stat64_t rx_64_or_less_octet_packets; ++ tg3_stat64_t rx_65_to_127_octet_packets; ++ tg3_stat64_t rx_128_to_255_octet_packets; ++ tg3_stat64_t rx_256_to_511_octet_packets; ++ tg3_stat64_t rx_512_to_1023_octet_packets; ++ tg3_stat64_t rx_1024_to_1522_octet_packets; ++ tg3_stat64_t rx_1523_to_2047_octet_packets; ++ tg3_stat64_t rx_2048_to_4095_octet_packets; ++ tg3_stat64_t rx_4096_to_8191_octet_packets; ++ tg3_stat64_t rx_8192_to_9022_octet_packets; ++ ++ u64 __unused0[37]; ++ ++ /* Statistics maintained by Transmit MAC. */ ++ tg3_stat64_t tx_octets; ++ u64 __reserved2; ++ tg3_stat64_t tx_collisions; ++ tg3_stat64_t tx_xon_sent; ++ tg3_stat64_t tx_xoff_sent; ++ tg3_stat64_t tx_flow_control; ++ tg3_stat64_t tx_mac_errors; ++ tg3_stat64_t tx_single_collisions; ++ tg3_stat64_t tx_mult_collisions; ++ tg3_stat64_t tx_deferred; ++ u64 __reserved3; ++ tg3_stat64_t tx_excessive_collisions; ++ tg3_stat64_t tx_late_collisions; ++ tg3_stat64_t tx_collide_2times; ++ tg3_stat64_t tx_collide_3times; ++ tg3_stat64_t tx_collide_4times; ++ tg3_stat64_t tx_collide_5times; ++ tg3_stat64_t tx_collide_6times; ++ tg3_stat64_t tx_collide_7times; ++ tg3_stat64_t tx_collide_8times; ++ tg3_stat64_t tx_collide_9times; ++ tg3_stat64_t tx_collide_10times; ++ tg3_stat64_t tx_collide_11times; ++ tg3_stat64_t tx_collide_12times; ++ tg3_stat64_t tx_collide_13times; ++ tg3_stat64_t tx_collide_14times; ++ tg3_stat64_t tx_collide_15times; ++ tg3_stat64_t tx_ucast_packets; ++ tg3_stat64_t tx_mcast_packets; ++ tg3_stat64_t tx_bcast_packets; ++ tg3_stat64_t tx_carrier_sense_errors; ++ tg3_stat64_t tx_discards; ++ tg3_stat64_t tx_errors; ++ ++ u64 __unused1[31]; ++ ++ /* Statistics maintained by Receive List Placement. */ ++ tg3_stat64_t COS_rx_packets[16]; ++ tg3_stat64_t COS_rx_filter_dropped; ++ tg3_stat64_t dma_writeq_full; ++ tg3_stat64_t dma_write_prioq_full; ++ tg3_stat64_t rxbds_empty; ++ tg3_stat64_t rx_discards; ++ tg3_stat64_t rx_errors; ++ tg3_stat64_t rx_threshold_hit; ++ ++ u64 __unused2[9]; ++ ++ /* Statistics maintained by Send Data Initiator. */ ++ tg3_stat64_t COS_out_packets[16]; ++ tg3_stat64_t dma_readq_full; ++ tg3_stat64_t dma_read_prioq_full; ++ tg3_stat64_t tx_comp_queue_full; ++ ++ /* Statistics maintained by Host Coalescing. */ ++ tg3_stat64_t ring_set_send_prod_index; ++ tg3_stat64_t ring_status_update; ++ tg3_stat64_t nic_irqs; ++ tg3_stat64_t nic_avoided_irqs; ++ tg3_stat64_t nic_tx_threshold_hit; ++ ++ /* NOT a part of the hardware statistics block format. ++ * These stats are here as storage for tg3_periodic_fetch_stats(). ++ */ ++ tg3_stat64_t mbuf_lwm_thresh_hit; ++ ++ u8 __reserved4[0xb00-0x9c8]; ++}; ++ ++#define TG3_SD_NUM_RECS 3 ++#define TG3_OCIR_LEN (sizeof(struct tg3_ocir)) ++#define TG3_OCIR_SIG_MAGIC 0x5253434f ++#define TG3_OCIR_FLAG_ACTIVE 0x00000001 ++ ++#define TG3_TEMP_CAUTION_OFFSET 0xc8 ++#define TG3_TEMP_MAX_OFFSET 0xcc ++#define TG3_TEMP_SENSOR_OFFSET 0xd4 ++ ++#define TG3_OCIR_DRVR_FEAT_CSUM 0x00000001 ++#define TG3_OCIR_DRVR_FEAT_TSO 0x00000002 ++#define TG3_OCIR_DRVR_FEAT_MASK 0xff ++ ++#define TG3_OCIR_REFRESH_TMR_OFF 0x00000008 ++#define TG3_OCIR_UPDATE_TMR_OFF 0x0000000c ++#define TG3_OCIR_PORT0_FLGS_OFF 0x0000002c ++ ++ ++ ++struct tg3_ocir { ++ u32 signature; ++ u16 version_flags; ++ u16 refresh_int; ++ u32 refresh_tmr; ++ u32 update_tmr; ++ u32 dst_base_addr; ++ u16 src_hdr_offset; ++ u16 src_hdr_length; ++ u16 src_data_offset; ++ u16 src_data_length; ++ u16 dst_hdr_offset; ++ u16 dst_data_offset; ++ u16 dst_reg_upd_offset; ++ u16 dst_sem_offset; ++ u32 reserved1[2]; ++ u32 port0_flags; ++ u32 port1_flags; ++ u32 port2_flags; ++ u32 port3_flags; ++ u32 reserved2[1]; ++}; ++ ++/* 'mapping' is superfluous as the chip does not write into ++ * the tx/rx post rings so we could just fetch it from there. ++ * But the cache behavior is better how we are doing it now. ++ */ ++struct ring_info { ++#ifdef BCM_HAS_BUILD_SKB ++ u8 *data; ++#else ++ struct sk_buff *data; ++#endif ++ DEFINE_DMA_UNMAP_ADDR(mapping); ++}; ++ ++struct tg3_tx_ring_info { ++ struct sk_buff *skb; ++ DEFINE_DMA_UNMAP_ADDR(mapping); ++ bool fragmented; ++}; ++ ++struct tg3_link_config { ++ /* Describes what we're trying to get. */ ++ u32 advertising; ++ u16 speed; ++ u8 duplex; ++ u8 autoneg; ++ u8 flowctrl; ++ ++ /* Describes what we actually have. */ ++ u8 active_flowctrl; ++ ++ u8 active_duplex; ++ u16 active_speed; ++ u32 rmt_adv; ++}; ++ ++struct tg3_bufmgr_config { ++ u32 mbuf_read_dma_low_water; ++ u32 mbuf_mac_rx_low_water; ++ u32 mbuf_high_water; ++ ++ u32 mbuf_read_dma_low_water_jumbo; ++ u32 mbuf_mac_rx_low_water_jumbo; ++ u32 mbuf_high_water_jumbo; ++ ++ u32 dma_low_water; ++ u32 dma_high_water; ++}; ++ ++struct tg3_ethtool_stats { ++ /* Statistics maintained by Receive MAC. */ ++ u64 rx_octets; ++ u64 rx_fragments; ++ u64 rx_ucast_packets; ++ u64 rx_mcast_packets; ++ u64 rx_bcast_packets; ++ u64 rx_fcs_errors; ++ u64 rx_align_errors; ++ u64 rx_xon_pause_rcvd; ++ u64 rx_xoff_pause_rcvd; ++ u64 rx_mac_ctrl_rcvd; ++ u64 rx_xoff_entered; ++ u64 rx_frame_too_long_errors; ++ u64 rx_jabbers; ++ u64 rx_undersize_packets; ++ u64 rx_in_length_errors; ++ u64 rx_out_length_errors; ++ u64 rx_64_or_less_octet_packets; ++ u64 rx_65_to_127_octet_packets; ++ u64 rx_128_to_255_octet_packets; ++ u64 rx_256_to_511_octet_packets; ++ u64 rx_512_to_1023_octet_packets; ++ u64 rx_1024_to_1522_octet_packets; ++ u64 rx_1523_to_2047_octet_packets; ++ u64 rx_2048_to_4095_octet_packets; ++ u64 rx_4096_to_8191_octet_packets; ++ u64 rx_8192_to_9022_octet_packets; ++ ++ /* Statistics maintained by Transmit MAC. */ ++ u64 tx_octets; ++ u64 tx_collisions; ++ u64 tx_xon_sent; ++ u64 tx_xoff_sent; ++ u64 tx_flow_control; ++ u64 tx_mac_errors; ++ u64 tx_single_collisions; ++ u64 tx_mult_collisions; ++ u64 tx_deferred; ++ u64 tx_excessive_collisions; ++ u64 tx_late_collisions; ++ u64 tx_collide_2times; ++ u64 tx_collide_3times; ++ u64 tx_collide_4times; ++ u64 tx_collide_5times; ++ u64 tx_collide_6times; ++ u64 tx_collide_7times; ++ u64 tx_collide_8times; ++ u64 tx_collide_9times; ++ u64 tx_collide_10times; ++ u64 tx_collide_11times; ++ u64 tx_collide_12times; ++ u64 tx_collide_13times; ++ u64 tx_collide_14times; ++ u64 tx_collide_15times; ++ u64 tx_ucast_packets; ++ u64 tx_mcast_packets; ++ u64 tx_bcast_packets; ++ u64 tx_carrier_sense_errors; ++ u64 tx_discards; ++ u64 tx_errors; ++ ++ /* Statistics maintained by Receive List Placement. */ ++ u64 dma_writeq_full; ++ u64 dma_write_prioq_full; ++ u64 rxbds_empty; ++ u64 rx_discards; ++ u64 rx_errors; ++ u64 rx_threshold_hit; ++ ++ /* Statistics maintained by Send Data Initiator. */ ++ u64 dma_readq_full; ++ u64 dma_read_prioq_full; ++ u64 tx_comp_queue_full; ++ ++ /* Statistics maintained by Host Coalescing. */ ++ u64 ring_set_send_prod_index; ++ u64 ring_status_update; ++ u64 nic_irqs; ++ u64 nic_avoided_irqs; ++ u64 nic_tx_threshold_hit; ++ ++ u64 mbuf_lwm_thresh_hit; ++ u64 dma_4g_cross; ++#if !defined(__VMKLNX__) ++ u64 recoverable_err; ++ u64 unrecoverable_err; ++#endif ++}; ++ ++#if defined(__VMKLNX__) ++#include "tg3_vmware.h" ++#endif ++ ++struct tg3_rx_prodring_set { ++#ifdef TG3_VMWARE_NETQ_ENABLE ++ u32 rx_std_mbox; ++ u32 rx_jmb_mbox; ++#endif ++ u32 rx_std_prod_idx; ++ u32 rx_std_cons_idx; ++ u32 rx_jmb_prod_idx; ++ u32 rx_jmb_cons_idx; ++ struct tg3_rx_buffer_desc *rx_std; ++ struct tg3_ext_rx_buffer_desc *rx_jmb; ++ struct ring_info *rx_std_buffers; ++ struct ring_info *rx_jmb_buffers; ++ dma_addr_t rx_std_mapping; ++ dma_addr_t rx_jmb_mapping; ++}; ++ ++#define TG3_RSS_MAX_NUM_QS 4 ++#define TG3_IRQ_MAX_VECS_RSS TG3_RSS_MAX_NUM_QS + 1 ++ ++#if defined(__VMKLNX__) ++#if defined(TG3_INBOX) ++ #define TG3_IRQ_MAX_VECS 1 ++#elif defined(TG3_VMWARE_NETQ_ENABLE) ++ #define TG3_IRQ_MAX_VECS_IOV 17 ++ #define TG3_IRQ_MAX_VECS TG3_IRQ_MAX_VECS_IOV ++#endif ++#endif /* __VMKLNX__ */ ++ ++#ifndef TG3_IRQ_MAX_VECS ++#define TG3_IRQ_MAX_VECS TG3_IRQ_MAX_VECS_RSS ++#endif ++ ++struct tg3_napi { ++#ifdef TG3_NAPI ++ struct napi_struct napi ____cacheline_aligned; ++#endif ++ struct tg3 *tp; ++ struct tg3_hw_status *hw_status; ++ ++ u32 chk_msi_cnt; ++ u32 last_tag; ++ u32 last_irq_tag; ++ u32 int_mbox; ++ u32 coal_now; ++ ++ u32 consmbox ____cacheline_aligned; ++ u32 rx_rcb_ptr; ++ u32 last_rx_cons; ++ volatile u16 *rx_rcb_prod_idx; ++ struct tg3_rx_prodring_set *srcprodring; ++ struct tg3_rx_prodring_set prodring; ++ struct tg3_rx_buffer_desc *rx_rcb; ++ ++ u32 tx_prod ____cacheline_aligned; ++ u32 tx_cons; ++ u32 tx_pending; ++ u32 last_tx_cons; ++ u32 prodmbox; ++ struct tg3_tx_buffer_desc *tx_ring; ++ struct tg3_tx_ring_info *tx_buffers; ++ ++ dma_addr_t status_mapping; ++ dma_addr_t rx_rcb_mapping; ++ dma_addr_t tx_desc_mapping; ++ ++ char irq_lbl[IFNAMSIZ]; ++ unsigned int irq_vec; ++ ++#if defined(__VMKLNX__) && !defined(TG3_VMWARE_NETQ_DISABLE) ++ struct tg3_netq_napi netq; ++#endif ++}; ++ ++enum TG3_FLAGS { ++ TG3_FLAG_TAGGED_STATUS = 0, ++ TG3_FLAG_TXD_MBOX_HWBUG, ++ TG3_FLAG_USE_LINKCHG_REG, ++ TG3_FLAG_ERROR_PROCESSED, ++ TG3_FLAG_ENABLE_ASF, ++ TG3_FLAG_ASPM_WORKAROUND, ++ TG3_FLAG_POLL_SERDES, ++ TG3_FLAG_POLL_CPMU_LINK, ++ TG3_FLAG_MBOX_WRITE_REORDER, ++ TG3_FLAG_PCIX_TARGET_HWBUG, ++ TG3_FLAG_WOL_SPEED_100MB, ++ TG3_FLAG_WOL_ENABLE, ++ TG3_FLAG_EEPROM_WRITE_PROT, ++ TG3_FLAG_NVRAM, ++ TG3_FLAG_NVRAM_BUFFERED, ++ TG3_FLAG_SUPPORT_MSI, ++ TG3_FLAG_SUPPORT_MSIX, ++ TG3_FLAG_PCIX_MODE, ++ TG3_FLAG_PCI_HIGH_SPEED, ++ TG3_FLAG_PCI_32BIT, ++ TG3_FLAG_SRAM_USE_CONFIG, ++ TG3_FLAG_TX_RECOVERY_PENDING, ++ TG3_FLAG_WOL_CAP, ++ TG3_FLAG_JUMBO_RING_ENABLE, ++ TG3_FLAG_PAUSE_AUTONEG, ++ TG3_FLAG_CPMU_PRESENT, ++ TG3_FLAG_40BIT_DMA_BUG, ++ TG3_FLAG_BROKEN_CHECKSUMS, ++ TG3_FLAG_JUMBO_CAPABLE, ++ TG3_FLAG_CHIP_RESETTING, ++ TG3_FLAG_INIT_COMPLETE, ++ TG3_FLAG_MAX_RXPEND_64, ++ TG3_FLAG_PCI_EXPRESS, /* BCM5785 + pci_is_pcie() */ ++ TG3_FLAG_ASF_NEW_HANDSHAKE, ++ TG3_FLAG_HW_AUTONEG, ++ TG3_FLAG_IS_NIC, ++ TG3_FLAG_FLASH, ++ TG3_FLAG_FW_TSO, ++ TG3_FLAG_HW_TSO_1, ++ TG3_FLAG_HW_TSO_2, ++ TG3_FLAG_HW_TSO_3, ++ TG3_FLAG_TSO_CAPABLE, ++ TG3_FLAG_TSO_BUG, ++ TG3_FLAG_USING_MSI, ++ TG3_FLAG_USING_MSIX, ++ TG3_FLAG_ICH_WORKAROUND, ++ TG3_FLAG_1SHOT_MSI, ++ TG3_FLAG_NO_FWARE_REPORTED, ++ TG3_FLAG_NO_NVRAM_ADDR_TRANS, ++ TG3_FLAG_ENABLE_APE, ++ TG3_FLAG_PROTECTED_NVRAM, ++ TG3_FLAG_5701_DMA_BUG, ++ TG3_FLAG_USE_PHYLIB, ++ TG3_FLAG_MDIOBUS_INITED, ++ TG3_FLAG_LRG_PROD_RING_CAP, ++ TG3_FLAG_RGMII_INBAND_DISABLE, ++ TG3_FLAG_RGMII_EXT_IBND_RX_EN, ++ TG3_FLAG_RGMII_EXT_IBND_TX_EN, ++ TG3_FLAG_CLKREQ_BUG, ++ TG3_FLAG_NO_NVRAM, ++ TG3_FLAG_ENABLE_RSS, ++ TG3_FLAG_ENABLE_TSS, ++ TG3_FLAG_SHORT_DMA_BUG, ++ TG3_FLAG_USE_JUMBO_BDFLAG, ++ TG3_FLAG_L1PLLPD_EN, ++ TG3_FLAG_APE_HAS_NCSI, ++ TG3_FLAG_TX_TSTAMP_EN, ++ TG3_FLAG_4K_FIFO_LIMIT, ++ TG3_FLAG_NO_TSO_BD_LIMIT, ++ TG3_FLAG_5719_5720_RDMA_BUG, ++ TG3_FLAG_RESET_TASK_PENDING, ++ TG3_FLAG_USER_INDIR_TBL, ++ TG3_FLAG_PTP_CAPABLE, ++ TG3_FLAG_5705_PLUS, ++ TG3_FLAG_IS_5788, ++ TG3_FLAG_5750_PLUS, ++ TG3_FLAG_5780_CLASS, ++ TG3_FLAG_5755_PLUS, ++ TG3_FLAG_57765_PLUS, ++ TG3_FLAG_57765_CLASS, ++ TG3_FLAG_5717_PLUS, ++ TG3_FLAG_IS_SSB_CORE, ++ TG3_FLAG_FLUSH_POSTED_WRITES, ++ TG3_FLAG_ROBOSWITCH, ++ TG3_FLAG_ONE_DMA_AT_ONCE, ++ TG3_FLAG_RGMII_MODE, ++ ++ TG3_FLAG_IOV_CAPABLE, ++ TG3_FLAG_ENABLE_IOV, ++ ++ /* Add new flags before this comment and TG3_FLAG_NUMBER_OF_FLAGS */ ++ TG3_FLAG_NUMBER_OF_FLAGS, /* Last entry in enum TG3_FLAGS */ ++}; ++ ++struct tg3 { ++ /* begin "general, frequently-used members" cacheline section */ ++ ++ /* If the IRQ handler (which runs lockless) needs to be ++ * quiesced, the following bitmask state is used. The ++ * SYNC flag is set by non-IRQ context code to initiate ++ * the quiescence. ++ * ++ * When the IRQ handler notices that SYNC is set, it ++ * disables interrupts and returns. ++ * ++ * When all outstanding IRQ handlers have returned after ++ * the SYNC flag has been set, the setter can be assured ++ * that interrupts will no longer get run. ++ * ++ * In this way all SMP driver locks are never acquired ++ * in hw IRQ context, only sw IRQ context or lower. ++ */ ++ unsigned int irq_sync; ++ ++ /* SMP locking strategy: ++ * ++ * lock: Held during reset, PHY access, timer, and when ++ * updating tg3_flags. ++ * ++ * netif_tx_lock: Held during tg3_start_xmit. tg3_tx holds ++ * netif_tx_lock when it needs to call ++ * netif_wake_queue. ++ * ++ * Both of these locks are to be held with BH safety. ++ * ++ * Because the IRQ handler, tg3_poll, and tg3_start_xmit ++ * are running lockless, it is necessary to completely ++ * quiesce the chip with tg3_netif_stop and tg3_full_lock ++ * before reconfiguring the device. ++ * ++ * indirect_lock: Held when accessing registers indirectly ++ * with IRQ disabling. ++ */ ++ spinlock_t lock; ++ spinlock_t indirect_lock; ++ ++ u32 (*read32) (struct tg3 *, u32); ++ void (*write32) (struct tg3 *, u32, u32); ++ u32 (*read32_mbox) (struct tg3 *, u32); ++ void (*write32_mbox) (struct tg3 *, u32, ++ u32); ++ void __iomem *regs; ++ void __iomem *aperegs; ++ struct net_device *dev; ++ struct pci_dev *pdev; ++ ++ u32 coal_now; ++ u32 msg_enable; ++ ++#ifdef BCM_HAS_IEEE1588_SUPPORT ++#if IS_ENABLED(CONFIG_PTP_1588_CLOCK) ++ struct ptp_clock_info ptp_info; ++ struct ptp_clock *ptp_clock; ++ s64 ptp_adjust; ++#else /* IS_ENABLED(CONFIG_PTP_1588_CLOCK) */ ++ struct cyclecounter cycles; ++ struct timecounter clock; ++ struct timecompare compare; ++#endif /* IS_ENABLED(CONFIG_PTP_1588_CLOCK) */ ++#endif /* BCM_HAS_IEEE1588_SUPPORT */ ++ ++ /* begin "tx thread" cacheline section */ ++ void (*write32_tx_mbox) (struct tg3 *, u32, ++ u32); ++ u32 dma_limit; ++ u32 txq_req; ++ u32 txq_cnt; ++ u32 txq_max; ++ ++ /* begin "rx thread" cacheline section */ ++ struct tg3_napi napi[TG3_IRQ_MAX_VECS]; ++ void (*write32_rx_mbox) (struct tg3 *, u32, ++ u32); ++ u32 rx_copy_thresh; ++ u32 rx_std_ring_mask; ++ u32 rx_jmb_ring_mask; ++ u32 rx_ret_ring_mask; ++ u32 rx_pending; ++ u32 rx_jumbo_pending; ++ u32 rx_std_max_post; ++ u32 rx_offset; ++ u32 rx_pkt_map_sz; ++ u32 rxq_req; ++ u32 rxq_cnt; ++ u32 rxq_max; ++#ifndef BCM_HAS_NEW_VLAN_INTERFACE ++ struct vlan_group *vlgrp; ++#endif ++ ++ bool rx_refill; ++ ++ /* begin "everything else" cacheline(s) section */ ++ unsigned long rx_dropped; ++ unsigned long tx_dropped; ++ struct rtnl_link_stats64 net_stats_prev; ++ struct tg3_ethtool_stats estats_prev; ++ ++ DECLARE_BITMAP(tg3_flags, TG3_FLAG_NUMBER_OF_FLAGS); ++ ++ union { ++ unsigned long phy_crc_errors; ++ unsigned long last_event_jiffies; ++ }; ++ ++ struct timer_list timer; ++ u16 timer_counter; ++ u16 timer_multiplier; ++ u32 timer_offset; ++ u16 asf_counter; ++ u16 asf_multiplier; ++ ++ /* 1 second counter for transient serdes link events */ ++ u32 serdes_counter; ++#define SERDES_AN_TIMEOUT_5704S 2 ++#define SERDES_PARALLEL_DET_TIMEOUT 1 ++#define SERDES_AN_TIMEOUT_5714S 1 ++ ++ struct tg3_link_config link_config; ++ struct tg3_bufmgr_config bufmgr_config; ++ ++ /* cache h/w values, often passed straight to h/w */ ++ u32 rx_mode; ++ u32 tx_mode; ++ u32 mac_mode; ++ u32 mi_mode; ++ u32 misc_host_ctrl; ++ u32 grc_mode; ++ u32 grc_local_ctrl; ++ u32 dma_rwctrl; ++ u32 coalesce_mode; ++ u32 pwrmgmt_thresh; ++ u32 rxptpctl; ++ ++ /* PCI block */ ++ u32 pci_chip_rev_id; ++ u16 pci_cmd; ++ u8 pci_cacheline_sz; ++ u8 pci_lat_timer; ++ ++ int pci_fn; ++ int pm_cap; ++ int msi_cap; ++ int pcix_cap; ++ int pcie_readrq; ++ ++#ifdef BCM_INCLUDE_PHYLIB_SUPPORT ++ struct mii_bus *mdio_bus; ++ int mdio_irq[PHY_MAX_ADDR]; ++#endif ++ int old_link; ++ ++ u8 phy_addr; ++ u8 phy_ape_lock; ++ ++ /* PHY info */ ++ u32 phy_id; ++#define TG3_PHY_ID_MASK 0xfffffff0 ++#define TG3_PHY_ID_BCM5400 0x60008040 ++#define TG3_PHY_ID_BCM5401 0x60008050 ++#define TG3_PHY_ID_BCM5411 0x60008070 ++#define TG3_PHY_ID_BCM5701 0x60008110 ++#define TG3_PHY_ID_BCM5703 0x60008160 ++#define TG3_PHY_ID_BCM5704 0x60008190 ++#define TG3_PHY_ID_BCM5705 0x600081a0 ++#define TG3_PHY_ID_BCM5750 0x60008180 ++#define TG3_PHY_ID_BCM5752 0x60008100 ++#define TG3_PHY_ID_BCM5714 0x60008340 ++#define TG3_PHY_ID_BCM5780 0x60008350 ++#define TG3_PHY_ID_BCM5755 0xbc050cc0 ++#define TG3_PHY_ID_BCM5787 0xbc050ce0 ++#define TG3_PHY_ID_BCM5756 0xbc050ed0 ++#define TG3_PHY_ID_BCM5784 0xbc050fa0 ++#define TG3_PHY_ID_BCM5761 0xbc050fd0 ++#define TG3_PHY_ID_BCM5718C 0x5c0d8a00 ++#define TG3_PHY_ID_BCM5718S 0xbc050ff0 ++#define TG3_PHY_ID_BCM57765 0x5c0d8a40 ++#define TG3_PHY_ID_BCM5719C 0x5c0d8a20 ++#define TG3_PHY_ID_BCM5720C 0x5c0d8b60 ++#define TG3_PHY_ID_BCM5762 0x85803780 ++#define TG3_PHY_ID_BCM5906 0xdc00ac40 ++#define TG3_PHY_ID_BCM8002 0x60010140 ++#ifndef BCM_INCLUDE_PHYLIB_SUPPORT ++#define TG3_PHY_ID_BCM50610 0xbc050d60 ++#define TG3_PHY_ID_BCM50610M 0xbc050d70 ++#define TG3_PHY_ID_BCM50612E 0x5c0d8a60 ++#define TG3_PHY_ID_BCMAC131 0xbc050c70 ++#define TG3_PHY_ID_RTL8211C 0xc8007110 ++#define TG3_PHY_ID_RTL8201E 0xc800aaa0 ++#define TG3_PHY_ID_BCM57780 0x5c0d8990 ++#endif /* BCM_INCLUDE_PHYLIB_SUPPORT */ ++#define TG3_PHY_ID_INVALID 0xffffffff ++ ++#define PHY_ID_RTL8211C 0x001cc910 ++#define PHY_ID_RTL8201E 0x00008200 ++ ++#define TG3_PHY_ID_REV_MASK 0x0000000f ++#define TG3_PHY_REV_BCM5401_B0 0x1 ++ ++ /* This macro assumes the passed PHY ID is ++ * already masked with TG3_PHY_ID_MASK. ++ */ ++#define TG3_KNOWN_PHY_ID(X) \ ++ ((X) == TG3_PHY_ID_BCM5400 || (X) == TG3_PHY_ID_BCM5401 || \ ++ (X) == TG3_PHY_ID_BCM5411 || (X) == TG3_PHY_ID_BCM5701 || \ ++ (X) == TG3_PHY_ID_BCM5703 || (X) == TG3_PHY_ID_BCM5704 || \ ++ (X) == TG3_PHY_ID_BCM5705 || (X) == TG3_PHY_ID_BCM5750 || \ ++ (X) == TG3_PHY_ID_BCM5752 || (X) == TG3_PHY_ID_BCM5714 || \ ++ (X) == TG3_PHY_ID_BCM5780 || (X) == TG3_PHY_ID_BCM5787 || \ ++ (X) == TG3_PHY_ID_BCM5755 || (X) == TG3_PHY_ID_BCM5756 || \ ++ (X) == TG3_PHY_ID_BCM5906 || (X) == TG3_PHY_ID_BCM5761 || \ ++ (X) == TG3_PHY_ID_BCM5718C || (X) == TG3_PHY_ID_BCM5718S || \ ++ (X) == TG3_PHY_ID_BCM57765 || (X) == TG3_PHY_ID_BCM5719C || \ ++ (X) == TG3_PHY_ID_BCM5720C || (X) == TG3_PHY_ID_BCM5762 || \ ++ (X) == TG3_PHY_ID_BCM8002 || \ ++ (X) == TG3_PHY_ID_BCM50610 || (X) == TG3_PHY_ID_BCM50610M || \ ++ (X) == TG3_PHY_ID_BCM50612E || (X) == TG3_PHY_ID_BCMAC131 || \ ++ (X) == TG3_PHY_ID_BCM57780) ++ ++ u32 phy_flags; ++#define TG3_PHYFLG_USER_CONFIGURED 0x00000001 ++#define TG3_PHYFLG_IS_LOW_POWER 0x00000002 ++#define TG3_PHYFLG_IS_CONNECTED 0x00000004 ++#define TG3_PHYFLG_USE_MI_INTERRUPT 0x00000008 ++#define TG3_PHYFLG_PHY_SERDES 0x00000010 ++#define TG3_PHYFLG_MII_SERDES 0x00000020 ++#define TG3_PHYFLG_ANY_SERDES (TG3_PHYFLG_PHY_SERDES | \ ++ TG3_PHYFLG_MII_SERDES) ++#define TG3_PHYFLG_IS_FET 0x00000040 ++#define TG3_PHYFLG_10_100_ONLY 0x00000080 ++#define TG3_PHYFLG_ENABLE_APD 0x00000100 ++#define TG3_PHYFLG_CAPACITIVE_COUPLING 0x00000200 ++#define TG3_PHYFLG_NO_ETH_WIRE_SPEED 0x00000400 ++#define TG3_PHYFLG_JITTER_BUG 0x00000800 ++#define TG3_PHYFLG_ADJUST_TRIM 0x00001000 ++#define TG3_PHYFLG_ADC_BUG 0x00002000 ++#define TG3_PHYFLG_5704_A0_BUG 0x00004000 ++#define TG3_PHYFLG_BER_BUG 0x00008000 ++#define TG3_PHYFLG_SERDES_PREEMPHASIS 0x00010000 ++#define TG3_PHYFLG_PARALLEL_DETECT 0x00020000 ++#define TG3_PHYFLG_EEE_CAP 0x00040000 ++#define TG3_PHYFLG_1G_ON_VAUX_OK 0x00080000 ++#define TG3_PHYFLG_KEEP_LINK_ON_PWRDN 0x00100000 ++#define TG3_PHYFLG_MDIX_STATE 0x00200000 ++#define TG3_PHYFLG_DISABLE_1G_HD_ADV 0x00400000 ++ ++ u32 led_ctrl; ++ u32 phy_otp; ++ u32 setlpicnt; ++ u8 rss_ind_tbl[TG3_RSS_INDIR_TBL_SIZE]; ++ ++#define TG3_BPN_SIZE 24 ++ char board_part_number[TG3_BPN_SIZE]; ++#define TG3_VER_SIZE ETHTOOL_FWVERS_LEN ++ char fw_ver[TG3_VER_SIZE]; ++ u32 nic_sram_data_cfg; ++ u32 pci_clock_ctrl; ++ struct pci_dev *pdev_peer; ++ ++ struct tg3_hw_stats *hw_stats; ++ dma_addr_t stats_mapping; ++ struct work_struct reset_task; ++ ++ int nvram_lock_cnt; ++ u32 nvram_size; ++#define TG3_NVRAM_SIZE_2KB 0x00000800 ++#define TG3_NVRAM_SIZE_64KB 0x00010000 ++#define TG3_NVRAM_SIZE_128KB 0x00020000 ++#define TG3_NVRAM_SIZE_256KB 0x00040000 ++#define TG3_NVRAM_SIZE_512KB 0x00080000 ++#define TG3_NVRAM_SIZE_1MB 0x00100000 ++#define TG3_NVRAM_SIZE_2MB 0x00200000 ++ ++ u32 nvram_pagesize; ++ u32 nvram_jedecnum; ++ ++#define JEDEC_ATMEL 0x1f ++#define JEDEC_ST 0x20 ++#define JEDEC_SAIFUN 0x4f ++#define JEDEC_SST 0xbf ++#define JEDEC_MACRONIX 0xc2 ++ ++#define ATMEL_AT24C02_CHIP_SIZE TG3_NVRAM_SIZE_2KB ++#define ATMEL_AT24C02_PAGE_SIZE (8) ++ ++#define ATMEL_AT24C64_CHIP_SIZE TG3_NVRAM_SIZE_64KB ++#define ATMEL_AT24C64_PAGE_SIZE (32) ++ ++#define ATMEL_AT24C512_CHIP_SIZE TG3_NVRAM_SIZE_512KB ++#define ATMEL_AT24C512_PAGE_SIZE (128) ++ ++#define ATMEL_AT45DB0X1B_PAGE_POS 9 ++#define ATMEL_AT45DB0X1B_PAGE_SIZE 264 ++ ++#define ATMEL_AT25F512_PAGE_SIZE 256 ++ ++#define ST_M45PEX0_PAGE_SIZE 256 ++ ++#define SAIFUN_SA25F0XX_PAGE_SIZE 256 ++ ++#define SST_25VF0X0_PAGE_SIZE 4098 ++ ++ unsigned int irq_max; ++ unsigned int irq_cnt; ++ ++ struct ethtool_coalesce coal; ++ struct ethtool_eee eee; ++ ++ /* firmware info */ ++ const char *fw_needed; ++ const struct tg3_firmware *fw; ++ u32 fw_len; /* includes BSS */ ++ ++#if defined(__VMKLNX__) ++ struct tg3_vmware vmware; ++#endif ++#ifndef BCM_HAS_PCI_PCIE_CAP ++ int pcie_cap; ++#endif ++#if (LINUX_VERSION_CODE < 0x2060a) ++ u32 pci_cfg_state[64 / sizeof(u32)]; ++#endif ++#ifndef BCM_HAS_GET_STATS64 ++ struct rtnl_link_stats64 net_stats; ++#endif ++#if IS_ENABLED(CONFIG_HWMON) && !defined(__VMKLNX__) ++#if (LINUX_VERSION_CODE > 0x20618) ++ struct device *hwmon_dev; ++#else ++ struct class_device *hwmon_dev; ++#endif ++#endif ++ ++ bool link_up; ++#if defined(__VMKLNX__) && VMWARE_ESX_DDK_VERSION >= 55000 ++ int nic_idx; ++#endif ++ u32 ape_hb; ++ unsigned long ape_hb_interval; ++ unsigned long ape_hb_jiffies; ++ unsigned long dma_4g_cross; ++#if !defined(__VMKLNX__) ++ unsigned long recoverable_err_jiffies; ++#define RECOVERABLE_ERR_10SEC 10000 ++ unsigned long recoverable_err_interval; ++ u64 recoverable_err; ++ u64 unrecoverable_err; ++#endif ++}; ++ ++/* Accessor macros for chip and asic attributes ++ * ++ * nb: Using static inlines equivalent to the accessor macros generates ++ * larger object code with gcc 4.7. ++ * Using statement expression macros to check tp with ++ * typecheck(struct tg3 *, tp) also creates larger objects. ++ */ ++#define tg3_chip_rev_id(tp) \ ++ ((tp)->pci_chip_rev_id) ++#define tg3_asic_rev(tp) \ ++ ((tp)->pci_chip_rev_id >> 12) ++#define tg3_chip_rev(tp) \ ++ ((tp)->pci_chip_rev_id >> 8) ++ ++#endif /* !(_T3_H) */ +diff --git a/drivers/net/ethernet/broadcom/tg3/tg3_compat.h b/drivers/net/ethernet/broadcom/tg3/tg3_compat.h +new file mode 100644 +index 0000000..40cc207 +--- /dev/null ++++ b/drivers/net/ethernet/broadcom/tg3/tg3_compat.h +@@ -0,0 +1,2172 @@ ++/* Copyright (C) 2008-2015 Broadcom Corporation. */ ++ ++#ifdef CONFIG_X86 ++#undef NET_IP_ALIGN ++#define NET_IP_ALIGN 0 ++#endif ++ ++#if !defined(__maybe_unused) ++#define __maybe_unused /* unimplemented */ ++#endif ++ ++#if !defined(__iomem) ++#define __iomem ++#endif ++ ++#ifndef __always_unused ++#define __always_unused ++#endif ++ ++#ifndef __acquires ++#define __acquires(x) ++#endif ++ ++#ifndef __releases ++#define __releases(x) ++#endif ++ ++#ifndef mmiowb ++#define mmiowb() ++#endif ++ ++#ifndef WARN_ON ++#define WARN_ON(x) ++#endif ++ ++#ifndef MODULE_VERSION ++#define MODULE_VERSION(version) ++#endif ++ ++#ifndef SET_MODULE_OWNER ++#define SET_MODULE_OWNER(dev) do { } while (0) ++#endif ++ ++#ifndef ARRAY_SIZE ++#define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0])) ++#endif ++ ++#ifndef DIV_ROUND_UP ++#define DIV_ROUND_UP(n,d) (((n) + (d) - 1) / (d)) ++#endif ++ ++#ifndef __ALIGN_MASK ++#define __ALIGN_MASK(x,mask) (((x)+(mask))&~(mask)) ++#endif ++ ++#ifndef ALIGN ++#define ALIGN(x,a) __ALIGN_MASK(x,(typeof(x))(a)-1) ++#endif ++ ++#ifndef BCM_HAS_BOOL ++typedef int bool; ++#define false 0 ++#define true 1 ++#endif ++ ++#ifndef BCM_HAS_LE32 ++typedef u32 __le32; ++typedef u32 __be32; ++#endif ++ ++#ifndef BCM_HAS_RESOURCE_SIZE_T ++typedef unsigned long resource_size_t; ++#endif ++ ++#ifndef IRQ_RETVAL ++typedef void irqreturn_t; ++#define IRQ_RETVAL(x) ++#define IRQ_HANDLED ++#define IRQ_NONE ++#endif ++ ++#ifndef IRQF_SHARED ++#define IRQF_SHARED SA_SHIRQ ++#endif ++ ++#ifndef IRQF_SAMPLE_RANDOM ++#define IRQF_SAMPLE_RANDOM SA_SAMPLE_RANDOM ++#endif ++ ++#if (LINUX_VERSION_CODE <= 0x020600) ++#define schedule_work(x) schedule_task(x) ++#define work_struct tq_struct ++#define INIT_WORK(x, y, z) INIT_TQUEUE(x, y, z) ++#endif ++ ++#ifndef BCM_HAS_KZALLOC ++static inline void *kzalloc(size_t size, int flags) ++{ ++ void * memptr = kmalloc(size, flags); ++ if (memptr) ++ memset(memptr, 0, size); ++ ++ return memptr; ++} ++#endif ++ ++#ifndef USEC_PER_SEC ++#define USEC_PER_SEC 1000000 ++#endif ++ ++#ifndef MSEC_PER_SEC ++#define MSEC_PER_SEC 1000 ++#endif ++ ++#ifndef MAX_JIFFY_OFFSET ++#define MAX_JIFFY_OFFSET ((LONG_MAX >> 1)-1) ++#endif ++ ++#ifndef BCM_HAS_JIFFIES_TO_USECS ++static unsigned int inline jiffies_to_usecs(const unsigned long j) ++{ ++#if HZ <= USEC_PER_SEC && !(USEC_PER_SEC % HZ) ++ return (USEC_PER_SEC / HZ) * j; ++#elif HZ > USEC_PER_SEC && !(HZ % USEC_PER_SEC) ++ return (j + (HZ / USEC_PER_SEC) - 1)/(HZ / USEC_PER_SEC); ++#else ++ return (j * USEC_PER_SEC) / HZ; ++#endif ++} ++#endif /* BCM_HAS_JIFFIES_TO_USECS */ ++ ++#ifndef BCM_HAS_USECS_TO_JIFFIES ++static unsigned long usecs_to_jiffies(const unsigned int u) ++{ ++ if (u > jiffies_to_usecs(MAX_JIFFY_OFFSET)) ++ return MAX_JIFFY_OFFSET; ++#if HZ <= USEC_PER_SEC && !(USEC_PER_SEC % HZ) ++ return (u + (USEC_PER_SEC / HZ) - 1) / (USEC_PER_SEC / HZ); ++#elif HZ > USEC_PER_SEC && !(HZ % USEC_PER_SEC) ++ return u * (HZ / USEC_PER_SEC); ++#else ++ return (u * HZ + USEC_PER_SEC - 1) / USEC_PER_SEC; ++#endif ++} ++#endif /* BCM_HAS_USECS_TO_JIFFIES */ ++ ++#ifndef BCM_HAS_MSECS_TO_JIFFIES ++static unsigned long msecs_to_jiffies(const unsigned int m) ++{ ++#if HZ <= MSEC_PER_SEC && !(MSEC_PER_SEC % HZ) ++ /* ++ * HZ is equal to or smaller than 1000, and 1000 is a nice ++ * round multiple of HZ, divide with the factor between them, ++ * but round upwards: ++ */ ++ return (m + (MSEC_PER_SEC / HZ) - 1) / (MSEC_PER_SEC / HZ); ++#elif HZ > MSEC_PER_SEC && !(HZ % MSEC_PER_SEC) ++ /* ++ * HZ is larger than 1000, and HZ is a nice round multiple of ++ * 1000 - simply multiply with the factor between them. ++ * ++ * But first make sure the multiplication result cannot ++ * overflow: ++ */ ++ if (m > jiffies_to_msecs(MAX_JIFFY_OFFSET)) ++ return MAX_JIFFY_OFFSET; ++ ++ return m * (HZ / MSEC_PER_SEC); ++#else ++ /* ++ * Generic case - multiply, round and divide. But first ++ * check that if we are doing a net multiplication, that ++ * we wouldn't overflow: ++ */ ++ if (HZ > MSEC_PER_SEC && m > jiffies_to_msecs(MAX_JIFFY_OFFSET)) ++ return MAX_JIFFY_OFFSET; ++ ++ return (m * HZ + MSEC_PER_SEC - 1) / MSEC_PER_SEC; ++#endif ++} ++#endif /* BCM_HAS_MSECS_TO_JIFFIES */ ++ ++#ifndef BCM_HAS_MSLEEP ++static void msleep(unsigned int msecs) ++{ ++ unsigned long timeout = msecs_to_jiffies(msecs) + 1; ++ ++ while (timeout) { ++ __set_current_state(TASK_UNINTERRUPTIBLE); ++ timeout = schedule_timeout(timeout); ++ } ++} ++#endif /* BCM_HAS_MSLEEP */ ++ ++#ifndef BCM_HAS_MSLEEP_INTERRUPTIBLE ++static unsigned long msleep_interruptible(unsigned int msecs) ++{ ++ unsigned long timeout = msecs_to_jiffies(msecs) + 1; ++ ++ while (timeout) { ++ __set_current_state(TASK_UNINTERRUPTIBLE); ++ timeout = schedule_timeout(timeout); ++ } ++ ++ return 0; ++} ++#endif /* BCM_HAS_MSLEEP_INTERRUPTIBLE */ ++ ++#ifndef printk_once ++#define printk_once(x...) ({ \ ++ static bool tg3___print_once = false; \ ++ \ ++ if (!tg3___print_once) { \ ++ tg3___print_once = true; \ ++ printk(x); \ ++ } \ ++}) ++#endif ++ ++#if !defined(BCM_HAS_DEV_DRIVER_STRING) || defined(__VMKLNX__) ++#define dev_driver_string(dev) "tg3" ++#endif ++ ++#if !defined(BCM_HAS_DEV_NAME) || defined(__VMKLNX__) ++#define dev_name(dev) "" ++#endif ++ ++#if defined(dev_printk) && ((LINUX_VERSION_CODE < 0x020609) || defined(__VMKLNX__)) ++/* ++ * SLES 9 and VMWare do not populate the pdev->dev.bus_id string soon ++ * enough for driver use during boot. Use our own format instead. ++ */ ++#undef dev_printk ++#endif ++ ++#ifndef dev_printk ++#define dev_printk(level, dev, format, arg...) \ ++ printk(level "%s %s: " format , dev_driver_string(dev) , \ ++ dev_name(dev) , ## arg) ++#endif ++ ++#ifndef dev_err ++#define dev_err(dev, format, arg...) \ ++ dev_printk(KERN_ERR , dev , format , ## arg) ++#endif ++ ++#ifndef dev_warn ++#define dev_warn(dev, format, arg...) \ ++ dev_printk(KERN_WARNING , dev , format , ## arg) ++#endif ++ ++#ifndef BCM_HAS_PCI_IOREMAP_BAR ++static inline void * pci_ioremap_bar(struct pci_dev *pdev, int bar) ++{ ++ resource_size_t base, size; ++ ++ if (!(pci_resource_flags(pdev, bar) & IORESOURCE_MEM)) { ++ printk(KERN_ERR ++ "Cannot find proper PCI device base address for BAR %d.\n", ++ bar); ++ return NULL; ++ } ++ ++ base = pci_resource_start(pdev, bar); ++ size = pci_resource_len(pdev, bar); ++ ++ return ioremap_nocache(base, size); ++} ++#endif ++ ++#ifndef DEFINE_PCI_DEVICE_TABLE ++#define DEFINE_PCI_DEVICE_TABLE(x) struct pci_device_id x[] ++#endif ++ ++#if (LINUX_VERSION_CODE < 0x020547) ++#define pci_set_consistent_dma_mask(pdev, mask) (0) ++#endif ++ ++#if (LINUX_VERSION_CODE < 0x020600) ++#define pci_get_device(x, y, z) pci_find_device(x, y, z) ++#define pci_get_slot(x, y) pci_find_slot((x)->number, y) ++#define pci_dev_put(x) ++#endif ++ ++#if (LINUX_VERSION_CODE < 0x020605) ++#define pci_dma_sync_single_for_cpu(pdev, map, len, dir) \ ++ pci_dma_sync_single(pdev, map, len, dir) ++#define pci_dma_sync_single_for_device(pdev, map, len, dir) ++#endif ++ ++#ifndef PCI_DEVICE ++#define PCI_DEVICE(vend,dev) \ ++ .vendor = (vend), .device = (dev), \ ++ .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID ++#endif ++ ++#ifndef PCI_DEVICE_SUB ++#define PCI_DEVICE_SUB(vend, dev, subvend, subdev) \ ++ .vendor = (vend), .device = (dev), \ ++ .subvendor = (subvend), .subdevice = (subdev) ++#endif ++ ++#ifndef PCI_DEVICE_ID_TIGON3_5704S_2 ++#define PCI_DEVICE_ID_TIGON3_5704S_2 0x1649 ++#endif ++ ++#ifndef PCI_DEVICE_ID_TIGON3_5705F ++#define PCI_DEVICE_ID_TIGON3_5705F 0x166e ++#endif ++ ++#ifndef PCI_DEVICE_ID_TIGON3_5720 ++#define PCI_DEVICE_ID_TIGON3_5720 0x1658 ++#endif ++ ++#ifndef PCI_DEVICE_ID_TIGON3_5721 ++#define PCI_DEVICE_ID_TIGON3_5721 0x1659 ++#endif ++ ++#ifndef PCI_DEVICE_ID_TIGON3_5750 ++#define PCI_DEVICE_ID_TIGON3_5750 0x1676 ++#endif ++ ++#ifndef PCI_DEVICE_ID_TIGON3_5751 ++#define PCI_DEVICE_ID_TIGON3_5751 0x1677 ++#endif ++ ++#ifndef PCI_DEVICE_ID_TIGON3_5750M ++#define PCI_DEVICE_ID_TIGON3_5750M 0x167c ++#endif ++ ++#ifndef PCI_DEVICE_ID_TIGON3_5751M ++#define PCI_DEVICE_ID_TIGON3_5751M 0x167d ++#endif ++ ++#ifndef PCI_DEVICE_ID_TIGON3_5751F ++#define PCI_DEVICE_ID_TIGON3_5751F 0x167e ++#endif ++ ++#ifndef PCI_DEVICE_ID_TIGON3_5789 ++#define PCI_DEVICE_ID_TIGON3_5789 0x169d ++#endif ++ ++#ifndef PCI_DEVICE_ID_TIGON3_5753 ++#define PCI_DEVICE_ID_TIGON3_5753 0x16f7 ++#endif ++ ++#ifndef PCI_DEVICE_ID_TIGON3_5753M ++#define PCI_DEVICE_ID_TIGON3_5753M 0x16fd ++#endif ++ ++#ifndef PCI_DEVICE_ID_TIGON3_5753F ++#define PCI_DEVICE_ID_TIGON3_5753F 0x16fe ++#endif ++ ++#ifndef PCI_DEVICE_ID_TIGON3_5781 ++#define PCI_DEVICE_ID_TIGON3_5781 0x16dd ++#endif ++ ++#ifndef PCI_DEVICE_ID_TIGON3_5752 ++#define PCI_DEVICE_ID_TIGON3_5752 0x1600 ++#endif ++ ++#ifndef PCI_DEVICE_ID_TIGON3_5752M ++#define PCI_DEVICE_ID_TIGON3_5752M 0x1601 ++#endif ++ ++#ifndef PCI_DEVICE_ID_TIGON3_5714 ++#define PCI_DEVICE_ID_TIGON3_5714 0x1668 ++#endif ++ ++#ifndef PCI_DEVICE_ID_TIGON3_5714S ++#define PCI_DEVICE_ID_TIGON3_5714S 0x1669 ++#endif ++ ++#ifndef PCI_DEVICE_ID_TIGON3_5780 ++#define PCI_DEVICE_ID_TIGON3_5780 0x166a ++#endif ++ ++#ifndef PCI_DEVICE_ID_TIGON3_5780S ++#define PCI_DEVICE_ID_TIGON3_5780S 0x166b ++#endif ++ ++#ifndef PCI_DEVICE_ID_TIGON3_5715 ++#define PCI_DEVICE_ID_TIGON3_5715 0x1678 ++#endif ++ ++#ifndef PCI_DEVICE_ID_TIGON3_5715S ++#define PCI_DEVICE_ID_TIGON3_5715S 0x1679 ++#endif ++ ++#ifndef PCI_DEVICE_ID_TIGON3_5756 ++#define PCI_DEVICE_ID_TIGON3_5756 0x1674 ++#endif ++ ++#ifndef PCI_DEVICE_ID_TIGON3_5754 ++#define PCI_DEVICE_ID_TIGON3_5754 0x167a ++#endif ++ ++#ifndef PCI_DEVICE_ID_TIGON3_5754M ++#define PCI_DEVICE_ID_TIGON3_5754M 0x1672 ++#endif ++ ++#ifndef PCI_DEVICE_ID_TIGON3_5755 ++#define PCI_DEVICE_ID_TIGON3_5755 0x167b ++#endif ++ ++#ifndef PCI_DEVICE_ID_TIGON3_5755M ++#define PCI_DEVICE_ID_TIGON3_5755M 0x1673 ++#endif ++ ++#ifndef PCI_DEVICE_ID_TIGON3_5722 ++#define PCI_DEVICE_ID_TIGON3_5722 0x165a ++#endif ++ ++#ifndef PCI_DEVICE_ID_TIGON3_5786 ++#define PCI_DEVICE_ID_TIGON3_5786 0x169a ++#endif ++ ++#ifndef PCI_DEVICE_ID_TIGON3_5787M ++#define PCI_DEVICE_ID_TIGON3_5787M 0x1693 ++#endif ++ ++#ifndef PCI_DEVICE_ID_TIGON3_5787 ++#define PCI_DEVICE_ID_TIGON3_5787 0x169b ++#endif ++ ++#ifndef PCI_DEVICE_ID_TIGON3_5787F ++#define PCI_DEVICE_ID_TIGON3_5787F 0x167f ++#endif ++ ++#ifndef PCI_DEVICE_ID_TIGON3_5906 ++#define PCI_DEVICE_ID_TIGON3_5906 0x1712 ++#endif ++ ++#ifndef PCI_DEVICE_ID_TIGON3_5906M ++#define PCI_DEVICE_ID_TIGON3_5906M 0x1713 ++#endif ++ ++#ifndef PCI_DEVICE_ID_TIGON3_5784 ++#define PCI_DEVICE_ID_TIGON3_5784 0x1698 ++#endif ++ ++#ifndef PCI_DEVICE_ID_TIGON3_5764 ++#define PCI_DEVICE_ID_TIGON3_5764 0x1684 ++#endif ++ ++#ifndef PCI_DEVICE_ID_TIGON3_5723 ++#define PCI_DEVICE_ID_TIGON3_5723 0x165b ++#endif ++ ++#ifndef PCI_DEVICE_ID_TIGON3_5761 ++#define PCI_DEVICE_ID_TIGON3_5761 0x1681 ++#endif ++ ++#ifndef PCI_DEVICE_ID_TIGON3_5761E ++#define PCI_DEVICE_ID_TIGON3_5761E 0x1680 ++#endif ++ ++#ifndef PCI_DEVICE_ID_APPLE_TIGON3 ++#define PCI_DEVICE_ID_APPLE_TIGON3 0x1645 ++#endif ++ ++#ifndef PCI_DEVICE_ID_APPLE_UNI_N_PCI15 ++#define PCI_DEVICE_ID_APPLE_UNI_N_PCI15 0x002e ++#endif ++ ++#ifndef PCI_DEVICE_ID_VIA_8385_0 ++#define PCI_DEVICE_ID_VIA_8385_0 0x3188 ++#endif ++ ++#ifndef PCI_DEVICE_ID_AMD_8131_BRIDGE ++#define PCI_DEVICE_ID_AMD_8131_BRIDGE 0x7450 ++#endif ++ ++#ifndef PCI_DEVICE_ID_SERVERWORKS_EPB ++#define PCI_DEVICE_ID_SERVERWORKS_EPB 0x0103 ++#endif ++ ++#ifndef PCI_VENDOR_ID_ARIMA ++#define PCI_VENDOR_ID_ARIMA 0x161f ++#endif ++ ++#ifndef PCI_DEVICE_ID_INTEL_PXH_0 ++#define PCI_DEVICE_ID_INTEL_PXH_0 0x0329 ++#endif ++ ++#ifndef PCI_DEVICE_ID_INTEL_PXH_1 ++#define PCI_DEVICE_ID_INTEL_PXH_1 0x032A ++#endif ++ ++#ifndef PCI_VENDOR_ID_LENOVO ++#define PCI_VENDOR_ID_LENOVO 0x17aa ++#endif ++ ++#ifndef PCI_D0 ++typedef u32 pm_message_t; ++typedef u32 pci_power_t; ++#define PCI_D0 0 ++#define PCI_D1 1 ++#define PCI_D2 2 ++#define PCI_D3hot 3 ++#endif ++ ++#ifndef PCI_D3cold ++#define PCI_D3cold 4 ++#endif ++ ++#ifndef DMA_64BIT_MASK ++#define DMA_64BIT_MASK ((u64) 0xffffffffffffffffULL) ++#endif ++ ++#ifndef DMA_40BIT_MASK ++#define DMA_40BIT_MASK ((u64) 0x000000ffffffffffULL) ++#endif ++ ++#ifndef DMA_32BIT_MASK ++#define DMA_32BIT_MASK ((u64) 0x00000000ffffffffULL) ++#endif ++ ++#ifndef DMA_BIT_MASK ++#define DMA_BIT_MASK(n) DMA_ ##n ##BIT_MASK ++#endif ++ ++#ifndef DEFINE_DMA_UNMAP_ADDR ++#define DEFINE_DMA_UNMAP_ADDR DECLARE_PCI_UNMAP_ADDR ++#endif ++ ++#if !defined(BCM_HAS_DMA_UNMAP_ADDR) ++#define dma_unmap_addr pci_unmap_addr ++#endif ++ ++#if !defined(BCM_HAS_DMA_UNMAP_ADDR_SET) ++#define dma_unmap_addr_set pci_unmap_addr_set ++#endif ++ ++#if !defined(BCM_HAS_PCI_TARGET_STATE) && !defined(BCM_HAS_PCI_CHOOSE_STATE) ++static inline pci_power_t pci_choose_state(struct pci_dev *dev, ++ pm_message_t state) ++{ ++ return state; ++} ++#endif ++ ++#ifndef BCM_HAS_PCI_ENABLE_WAKE ++static int pci_enable_wake(struct pci_dev *dev, pci_power_t state, int enable) ++{ ++ int pm_cap; ++ u16 pmcsr; ++ ++ pm_cap = pci_find_capability(dev, PCI_CAP_ID_PM); ++ if (pm_cap == 0) ++ return -EIO; ++ ++ pci_read_config_word(dev, pm_cap + PCI_PM_CTRL, &pmcsr); ++ ++ /* Clear PME_Status by writing 1 to it */ ++ pmcsr |= PCI_PM_CTRL_PME_STATUS; ++ ++ if (enable) ++ pmcsr |= PCI_PM_CTRL_PME_ENABLE; ++ else ++ pmcsr &= ~PCI_PM_CTRL_PME_ENABLE; ++ ++ pci_write_config_word(dev, pm_cap + PCI_PM_CTRL, pmcsr); ++ ++ return 0; ++} ++#endif /* BCM_HAS_PCI_ENABLE_WAKE */ ++ ++#ifndef BCM_HAS_PCI_WAKE_FROM_D3 ++#ifndef BCM_HAS_PCI_PME_CAPABLE ++static bool pci_pme_capable(struct pci_dev *dev, pci_power_t state) ++{ ++ int pm_cap; ++ u16 caps; ++ bool ret = false; ++ ++ pm_cap = pci_find_capability(dev, PCI_CAP_ID_PM); ++ if (pm_cap == 0) ++ goto done; ++ ++ pci_read_config_word(dev, pm_cap + PCI_PM_PMC, &caps); ++ ++ if (state == PCI_D3cold && ++ (caps & PCI_PM_CAP_PME_D3cold)) ++ ret = true; ++ ++done: ++ return ret; ++} ++#endif /* BCM_HAS_PCI_PME_CAPABLE */ ++ ++static int pci_wake_from_d3(struct pci_dev *dev, bool enable) ++{ ++ return pci_pme_capable(dev, PCI_D3cold) ? ++ pci_enable_wake(dev, PCI_D3cold, enable) : ++ pci_enable_wake(dev, PCI_D3hot, enable); ++} ++#endif /* BCM_HAS_PCI_WAKE_FROM_D3 */ ++ ++#ifndef BCM_HAS_PCI_SET_POWER_STATE ++static int pci_set_power_state(struct pci_dev *dev, pci_power_t state) ++{ ++ int pm_cap; ++ u16 pmcsr; ++ ++ if (state < PCI_D0 || state > PCI_D3hot) ++ return -EINVAL; ++ ++ pm_cap = pci_find_capability(dev, PCI_CAP_ID_PM); ++ if (pm_cap == 0) ++ return -EIO; ++ ++ pci_read_config_word(dev, pm_cap + PCI_PM_CTRL, &pmcsr); ++ ++ pmcsr &= ~(PCI_PM_CTRL_STATE_MASK); ++ pmcsr |= state; ++ ++ pci_write_config_word(dev, pm_cap + PCI_PM_CTRL, pmcsr); ++ ++ msleep(10); ++ ++ return 0; ++} ++#endif /* BCM_HAS_PCI_SET_POWER_STATE */ ++ ++#ifdef __VMKLNX__ ++/* VMWare disables CONFIG_PM in their kernel configs. ++ * This renders WOL inop, because device_may_wakeup() always returns false. ++ */ ++#undef BCM_HAS_DEVICE_WAKEUP_API ++#endif ++ ++#ifndef BCM_HAS_DEVICE_WAKEUP_API ++#undef device_init_wakeup ++#define device_init_wakeup(dev, val) ++#undef device_can_wakeup ++#define device_can_wakeup(dev) 1 ++#undef device_set_wakeup_enable ++#define device_set_wakeup_enable(dev, val) ++#undef device_may_wakeup ++#define device_may_wakeup(dev) 1 ++#endif /* BCM_HAS_DEVICE_WAKEUP_API */ ++ ++#ifndef BCM_HAS_DEVICE_SET_WAKEUP_CAPABLE ++#define device_set_wakeup_capable(dev, val) ++#endif /* BCM_HAS_DEVICE_SET_WAKEUP_CAPABLE */ ++ ++ ++#ifndef PCI_X_CMD_READ_2K ++#define PCI_X_CMD_READ_2K 0x0008 ++#endif ++#ifndef PCI_CAP_ID_EXP ++#define PCI_CAP_ID_EXP 0x10 ++#endif ++#ifndef PCI_EXP_LNKCTL ++#define PCI_EXP_LNKCTL 16 ++#endif ++#ifndef PCI_EXP_LNKCTL_CLKREQ_EN ++#define PCI_EXP_LNKCTL_CLKREQ_EN 0x100 ++#endif ++ ++#ifndef PCI_EXP_DEVCTL_NOSNOOP_EN ++#define PCI_EXP_DEVCTL_NOSNOOP_EN 0x0800 ++#endif ++ ++#ifndef PCI_EXP_DEVCTL_RELAX_EN ++#define PCI_EXP_DEVCTL_RELAX_EN 0x0010 ++#endif ++ ++#ifndef PCI_EXP_DEVCTL_PAYLOAD ++#define PCI_EXP_DEVCTL_PAYLOAD 0x00e0 ++#endif ++ ++#ifndef PCI_EXP_DEVSTA ++#define PCI_EXP_DEVSTA 10 ++#define PCI_EXP_DEVSTA_CED 0x01 ++#define PCI_EXP_DEVSTA_NFED 0x02 ++#define PCI_EXP_DEVSTA_FED 0x04 ++#define PCI_EXP_DEVSTA_URD 0x08 ++#endif ++ ++#ifndef PCI_EXP_LNKSTA ++#define PCI_EXP_LNKSTA 18 ++#endif ++ ++#ifndef PCI_EXP_LNKSTA_CLS ++#define PCI_EXP_LNKSTA_CLS 0x000f ++#endif ++ ++#ifndef PCI_EXP_LNKSTA_CLS_2_5GB ++#define PCI_EXP_LNKSTA_CLS_2_5GB 0x01 ++#endif ++ ++#ifndef PCI_EXP_LNKSTA_CLS_5_0GB ++#define PCI_EXP_LNKSTA_CLS_5_0GB 0x02 ++#endif ++ ++#ifndef PCI_EXP_LNKSTA_NLW ++#define PCI_EXP_LNKSTA_NLW 0x03f0 ++#endif ++ ++#ifndef PCI_EXP_LNKSTA_NLW_SHIFT ++#define PCI_EXP_LNKSTA_NLW_SHIFT 4 ++#endif ++ ++#ifndef PCI_EXP_DEVCTL ++#define PCI_EXP_DEVCTL 8 ++#endif ++#ifndef PCI_EXP_DEVCTL_READRQ ++#define PCI_EXP_DEVCTL_READRQ 0x7000 ++#endif ++ ++#ifndef BCM_HAS_PCIE_GET_READRQ ++int pcie_get_readrq(struct pci_dev *dev) ++{ ++ int ret, cap; ++ u16 ctl; ++ ++ cap = pci_find_capability(dev, PCI_CAP_ID_EXP); ++ if (!cap) { ++ ret = -EINVAL; ++ goto out; ++ } ++ ++ ret = pci_read_config_word(dev, cap + PCI_EXP_DEVCTL, &ctl); ++ if (!ret) ++ ret = 128 << ((ctl & PCI_EXP_DEVCTL_READRQ) >> 12); ++ ++out: ++ return ret; ++} ++#endif /* BCM_HAS_PCIE_GET_READRQ */ ++ ++#ifndef BCM_HAS_PCIE_SET_READRQ ++static inline int pcie_set_readrq(struct pci_dev *dev, int rq) ++{ ++ int cap, err = -EINVAL; ++ u16 ctl, v; ++ ++ if (rq < 128 || rq > 4096 || (rq & (rq-1))) ++ goto out; ++ ++ v = (ffs(rq) - 8) << 12; ++ ++ cap = pci_find_capability(dev, PCI_CAP_ID_EXP); ++ if (!cap) ++ goto out; ++ ++ err = pci_read_config_word(dev, cap + PCI_EXP_DEVCTL, &ctl); ++ if (err) ++ goto out; ++ ++ if ((ctl & PCI_EXP_DEVCTL_READRQ) != v) { ++ ctl &= ~PCI_EXP_DEVCTL_READRQ; ++ ctl |= v; ++ err = pci_write_config_dword(dev, cap + PCI_EXP_DEVCTL, ctl); ++ } ++ ++out: ++ return err; ++} ++#endif /* BCM_HAS_PCIE_SET_READRQ */ ++ ++#ifndef BCM_HAS_PCI_READ_VPD ++#if !defined(PCI_CAP_ID_VPD) ++#define PCI_CAP_ID_VPD 0x03 ++#endif ++#if !defined(PCI_VPD_ADDR) ++#define PCI_VPD_ADDR 2 ++#endif ++#if !defined(PCI_VPD_DATA) ++#define PCI_VPD_DATA 4 ++#endif ++static inline ssize_t ++pci_read_vpd(struct pci_dev *dev, loff_t pos, size_t count, u8 *buf) ++{ ++ int i, vpd_cap; ++ ++ vpd_cap = pci_find_capability(dev, PCI_CAP_ID_VPD); ++ if (!vpd_cap) ++ return -ENODEV; ++ ++ for (i = 0; i < count; i += 4) { ++ u32 tmp, j = 0; ++ __le32 v; ++ u16 tmp16; ++ ++ pci_write_config_word(dev, vpd_cap + PCI_VPD_ADDR, i); ++ while (j++ < 100) { ++ pci_read_config_word(dev, vpd_cap + ++ PCI_VPD_ADDR, &tmp16); ++ if (tmp16 & 0x8000) ++ break; ++ msleep(1); ++ } ++ if (!(tmp16 & 0x8000)) ++ break; ++ ++ pci_read_config_dword(dev, vpd_cap + PCI_VPD_DATA, &tmp); ++ v = cpu_to_le32(tmp); ++ memcpy(&buf[i], &v, sizeof(v)); ++ } ++ ++ return i; ++} ++#endif /* BCM_HAS_PCI_READ_VPD */ ++ ++#ifndef PCI_VPD_RO_KEYWORD_CHKSUM ++#define PCI_VPD_RO_KEYWORD_CHKSUM "RV" ++#endif ++ ++#ifndef PCI_VPD_LRDT ++#define PCI_VPD_LRDT 0x80 /* Large Resource Data Type */ ++#define PCI_VPD_LRDT_ID(x) (x | PCI_VPD_LRDT) ++ ++/* Large Resource Data Type Tag Item Names */ ++#define PCI_VPD_LTIN_ID_STRING 0x02 /* Identifier String */ ++#define PCI_VPD_LTIN_RO_DATA 0x10 /* Read-Only Data */ ++#define PCI_VPD_LTIN_RW_DATA 0x11 /* Read-Write Data */ ++ ++#define PCI_VPD_LRDT_ID_STRING PCI_VPD_LRDT_ID(PCI_VPD_LTIN_ID_STRING) ++#define PCI_VPD_LRDT_RO_DATA PCI_VPD_LRDT_ID(PCI_VPD_LTIN_RO_DATA) ++#define PCI_VPD_LRDT_RW_DATA PCI_VPD_LRDT_ID(PCI_VPD_LTIN_RW_DATA) ++ ++/* Small Resource Data Type Tag Item Names */ ++#define PCI_VPD_STIN_END 0x78 /* End */ ++ ++#define PCI_VPD_SRDT_END PCI_VPD_STIN_END ++ ++#define PCI_VPD_SRDT_TIN_MASK 0x78 ++#define PCI_VPD_SRDT_LEN_MASK 0x07 ++ ++#define PCI_VPD_LRDT_TAG_SIZE 3 ++#define PCI_VPD_SRDT_TAG_SIZE 1 ++ ++#define PCI_VPD_INFO_FLD_HDR_SIZE 3 ++ ++#define PCI_VPD_RO_KEYWORD_PARTNO "PN" ++#define PCI_VPD_RO_KEYWORD_MFR_ID "MN" ++#define PCI_VPD_RO_KEYWORD_VENDOR0 "V0" ++ ++/** ++ * pci_vpd_lrdt_size - Extracts the Large Resource Data Type length ++ * @lrdt: Pointer to the beginning of the Large Resource Data Type tag ++ * ++ * Returns the extracted Large Resource Data Type length. ++ */ ++static inline u16 pci_vpd_lrdt_size(const u8 *lrdt) ++{ ++ return (u16)lrdt[1] + ((u16)lrdt[2] << 8); ++} ++ ++/** ++ * pci_vpd_srdt_size - Extracts the Small Resource Data Type length ++ * @lrdt: Pointer to the beginning of the Small Resource Data Type tag ++ * ++ * Returns the extracted Small Resource Data Type length. ++ */ ++static inline u8 pci_vpd_srdt_size(const u8 *srdt) ++{ ++ return (*srdt) & PCI_VPD_SRDT_LEN_MASK; ++} ++ ++/** ++ * pci_vpd_info_field_size - Extracts the information field length ++ * @lrdt: Pointer to the beginning of an information field header ++ * ++ * Returns the extracted information field length. ++ */ ++static inline u8 pci_vpd_info_field_size(const u8 *info_field) ++{ ++ return info_field[2]; ++} ++ ++static int pci_vpd_find_tag(const u8 *buf, unsigned int off, unsigned int len, u8 rdt) ++{ ++ int i; ++ ++ for (i = off; i < len; ) { ++ u8 val = buf[i]; ++ ++ if (val & PCI_VPD_LRDT) { ++ /* Don't return success of the tag isn't complete */ ++ if (i + PCI_VPD_LRDT_TAG_SIZE > len) ++ break; ++ ++ if (val == rdt) ++ return i; ++ ++ i += PCI_VPD_LRDT_TAG_SIZE + ++ pci_vpd_lrdt_size(&buf[i]); ++ } else { ++ u8 tag = val & ~PCI_VPD_SRDT_LEN_MASK; ++ ++ if (tag == rdt) ++ return i; ++ ++ if (tag == PCI_VPD_SRDT_END) ++ break; ++ ++ i += PCI_VPD_SRDT_TAG_SIZE + ++ pci_vpd_srdt_size(&buf[i]); ++ } ++ } ++ ++ return -ENOENT; ++} ++ ++static int pci_vpd_find_info_keyword(const u8 *buf, unsigned int off, ++ unsigned int len, const char *kw) ++{ ++ int i; ++ ++ for (i = off; i + PCI_VPD_INFO_FLD_HDR_SIZE <= off + len;) { ++ if (buf[i + 0] == kw[0] && ++ buf[i + 1] == kw[1]) ++ return i; ++ ++ i += PCI_VPD_INFO_FLD_HDR_SIZE + ++ pci_vpd_info_field_size(&buf[i]); ++ } ++ ++ return -ENOENT; ++} ++#endif ++ ++#ifndef BCM_HAS_INTX_MSI_WORKAROUND ++static inline void tg3_enable_intx(struct pci_dev *pdev) ++{ ++#if (LINUX_VERSION_CODE < 0x2060e) ++ u16 pci_command; ++ ++ pci_read_config_word(pdev, PCI_COMMAND, &pci_command); ++ if (pci_command & PCI_COMMAND_INTX_DISABLE) ++ pci_write_config_word(pdev, PCI_COMMAND, ++ pci_command & ~PCI_COMMAND_INTX_DISABLE); ++#else ++ pci_intx(pdev, 1); ++#endif ++} ++#endif /* BCM_HAS_INTX_MSI_WORKAROUND */ ++ ++ ++#if (LINUX_VERSION_CODE >= 0x20613) || \ ++ (defined(__VMKLNX__) && defined(__USE_COMPAT_LAYER_2_6_18_PLUS__)) ++#define BCM_HAS_NEW_IRQ_SIG ++#endif ++ ++#if defined(INIT_DELAYED_WORK_DEFERRABLE) || \ ++ defined(INIT_DEFERRABLE_WORK) || \ ++ defined(INIT_WORK_NAR) || \ ++ (defined(__VMKLNX__) && defined(__USE_COMPAT_LAYER_2_6_18_PLUS__)) ++#define BCM_HAS_NEW_INIT_WORK ++#endif ++ ++#ifndef ETH_FCS_LEN ++#define ETH_FCS_LEN 4 ++#endif ++ ++#ifndef BCM_HAS_PRINT_MAC ++ ++#ifndef DECLARE_MAC_BUF ++#define DECLARE_MAC_BUF(_mac) char _mac[18] ++#endif ++ ++#define MAC_FMT "%02x:%02x:%02x:%02x:%02x:%02x" ++ ++static char *print_mac(char * buf, const u8 *addr) ++{ ++ sprintf(buf, MAC_FMT, ++ addr[0], addr[1], addr[2], addr[3], addr[4], addr[5]); ++ return buf; ++} ++#endif ++ ++ ++#ifndef NET_IP_ALIGN ++#define NET_IP_ALIGN 2 ++#endif ++ ++ ++#if !defined(BCM_HAS_ETHTOOL_OP_SET_TX_IPV6_CSUM) && \ ++ !defined(BCM_HAS_ETHTOOL_OP_SET_TX_HW_CSUM) && \ ++ defined(BCM_HAS_SET_TX_CSUM) ++static int tg3_set_tx_hw_csum(struct net_device *dev, u32 data) ++{ ++ if (data) ++ dev->features |= NETIF_F_HW_CSUM; ++ else ++ dev->features &= ~NETIF_F_HW_CSUM; ++ ++ return 0; ++} ++#endif ++ ++#ifndef NETDEV_TX_OK ++#define NETDEV_TX_OK 0 ++#endif ++ ++#ifndef NETDEV_TX_BUSY ++#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,32) ++#define NETDEV_TX_BUSY 0x1 ++#else ++#define NETDEV_TX_BUSY 0x10 ++#endif ++#endif ++ ++#ifndef NETDEV_TX_LOCKED ++#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,32) ++#define NETDEV_TX_LOCKED -1 ++#else ++#define NETDEV_TX_LOCKED 0x20 ++#endif ++#endif ++ ++#ifndef CHECKSUM_PARTIAL ++#define CHECKSUM_PARTIAL CHECKSUM_HW ++#endif ++ ++#ifndef NETIF_F_IPV6_CSUM ++#define NETIF_F_IPV6_CSUM 16 ++#define BCM_NO_IPV6_CSUM 1 ++#endif ++ ++#ifndef NETIF_F_RXCSUM ++#define NETIF_F_RXCSUM (1 << 29) ++#endif ++ ++#ifndef NETIF_F_GRO ++#define NETIF_F_GRO 16384 ++#endif ++ ++#ifndef NETIF_F_LOOPBACK ++#define NETIF_F_LOOPBACK (1 << 31) ++#endif ++ ++#ifdef NETIF_F_TSO ++#ifndef NETIF_F_GSO ++#define gso_size tso_size ++#define gso_segs tso_segs ++#endif ++#ifndef NETIF_F_TSO6 ++#define NETIF_F_TSO6 0 ++#define BCM_NO_TSO6 1 ++#endif ++#ifndef NETIF_F_TSO_ECN ++#define NETIF_F_TSO_ECN 0 ++#endif ++ ++#ifndef NETIF_F_ALL_TSO ++#define NETIF_F_ALL_TSO (NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_TSO_ECN) ++#endif ++ ++#ifndef BCM_HAS_SKB_TX_TIMESTAMP ++#define skb_tx_timestamp(skb) ++#endif ++ ++#ifdef BCM_HAS_SKB_SHARED_TX_UNION ++#define tx_flags tx_flags.flags ++ ++/* Definitions for tx_flags in struct skb_shared_info */ ++enum { ++ /* generate hardware time stamp */ ++ SKBTX_HW_TSTAMP = 1 << 0, ++ ++ /* device driver is going to provide hardware time stamp */ ++ SKBTX_IN_PROGRESS = 1 << 2, ++}; ++#endif ++ ++#ifndef BCM_HAS_SKB_FRAG_SIZE ++#define skb_frag_size(skb_frag) ((skb_frag)->size) ++#endif ++ ++#if (LINUX_VERSION_CODE < 0x2060c) ++static inline int skb_header_cloned(struct sk_buff *skb) { return 0; } ++#endif ++ ++#ifndef BCM_HAS_SKB_TRANSPORT_OFFSET ++static inline int skb_transport_offset(const struct sk_buff *skb) ++{ ++ return (int) (skb->h.raw - skb->data); ++} ++#endif ++ ++#ifndef BCM_HAS_IP_HDR ++static inline struct iphdr *ip_hdr(const struct sk_buff *skb) ++{ ++ return skb->nh.iph; ++} ++#endif ++ ++#ifndef BCM_HAS_IP_HDRLEN ++static inline unsigned int ip_hdrlen(const struct sk_buff *skb) ++{ ++ return ip_hdr(skb)->ihl * 4; ++} ++#endif ++ ++#ifndef BCM_HAS_TCP_HDR ++static inline struct tcphdr *tcp_hdr(const struct sk_buff *skb) ++{ ++ return skb->h.th; ++} ++#endif ++ ++#ifndef BCM_HAS_TCP_HDRLEN ++static inline unsigned int tcp_hdrlen(const struct sk_buff *skb) ++{ ++ return tcp_hdr(skb)->doff * 4; ++} ++#endif ++ ++#ifndef BCM_HAS_TCP_OPTLEN ++static inline unsigned int tcp_optlen(const struct sk_buff *skb) ++{ ++ return (tcp_hdr(skb)->doff - 5) * 4; ++} ++#endif ++ ++#ifndef NETIF_F_GSO ++static struct sk_buff *skb_segment(struct sk_buff *skb, int features) ++{ ++ struct sk_buff *segs = NULL; ++ struct sk_buff *tail = NULL; ++ unsigned int mss = skb_shinfo(skb)->gso_size; ++ unsigned int doffset = skb->data - skb->mac.raw; ++ unsigned int offset = doffset; ++ unsigned int headroom; ++ unsigned int len; ++ int nfrags = skb_shinfo(skb)->nr_frags; ++ int err = -ENOMEM; ++ int i = 0; ++ int pos; ++ ++ __skb_push(skb, doffset); ++ headroom = skb_headroom(skb); ++ pos = skb_headlen(skb); ++ ++ do { ++ struct sk_buff *nskb; ++ skb_frag_t *frag; ++ int hsize; ++ int k; ++ int size; ++ ++ len = skb->len - offset; ++ if (len > mss) ++ len = mss; ++ ++ hsize = skb_headlen(skb) - offset; ++ if (hsize < 0) ++ hsize = 0; ++ if (hsize > len) ++ hsize = len; ++ ++ nskb = alloc_skb(hsize + doffset + headroom, GFP_ATOMIC); ++ if (unlikely(!nskb)) ++ goto err; ++ ++ if (segs) ++ tail->next = nskb; ++ else ++ segs = nskb; ++ tail = nskb; ++ ++ nskb->dev = skb->dev; ++ nskb->priority = skb->priority; ++ nskb->protocol = skb->protocol; ++ nskb->dst = dst_clone(skb->dst); ++ memcpy(nskb->cb, skb->cb, sizeof(skb->cb)); ++ nskb->pkt_type = skb->pkt_type; ++ nskb->mac_len = skb->mac_len; ++ ++ skb_reserve(nskb, headroom); ++ nskb->mac.raw = nskb->data; ++ nskb->nh.raw = nskb->data + skb->mac_len; ++ nskb->h.raw = nskb->nh.raw + (skb->h.raw - skb->nh.raw); ++ memcpy(skb_put(nskb, doffset), skb->data, doffset); ++ ++ frag = skb_shinfo(nskb)->frags; ++ k = 0; ++ ++ nskb->ip_summed = CHECKSUM_PARTIAL; ++ nskb->csum = skb->csum; ++ memcpy(skb_put(nskb, hsize), skb->data + offset, hsize); ++ ++ while (pos < offset + len) { ++ BUG_ON(i >= nfrags); ++ ++ *frag = skb_shinfo(skb)->frags[i]; ++ get_page(frag->page); ++ size = frag->size; ++ ++ if (pos < offset) { ++ frag->page_offset += offset - pos; ++ frag->size -= offset - pos; ++ } ++ ++ k++; ++ ++ if (pos + size <= offset + len) { ++ i++; ++ pos += size; ++ } else { ++ frag->size -= pos + size - (offset + len); ++ break; ++ } ++ ++ frag++; ++ } ++ ++ skb_shinfo(nskb)->nr_frags = k; ++ nskb->data_len = len - hsize; ++ nskb->len += nskb->data_len; ++ nskb->truesize += nskb->data_len; ++ } while ((offset += len) < skb->len); ++ ++ return segs; ++ ++err: ++ while ((skb = segs)) { ++ segs = skb->next; ++ kfree(skb); ++ } ++ return ERR_PTR(err); ++} ++ ++static struct sk_buff *tcp_tso_segment(struct sk_buff *skb, int features) ++{ ++ struct sk_buff *segs = ERR_PTR(-EINVAL); ++ struct tcphdr *th; ++ unsigned thlen; ++ unsigned int seq; ++ u32 delta; ++ unsigned int oldlen; ++ unsigned int len; ++ ++ if (!pskb_may_pull(skb, sizeof(*th))) ++ goto out; ++ ++ th = skb->h.th; ++ thlen = th->doff * 4; ++ if (thlen < sizeof(*th)) ++ goto out; ++ ++ if (!pskb_may_pull(skb, thlen)) ++ goto out; ++ ++ oldlen = (u16)~skb->len; ++ __skb_pull(skb, thlen); ++ ++ segs = skb_segment(skb, features); ++ if (IS_ERR(segs)) ++ goto out; ++ ++ len = skb_shinfo(skb)->gso_size; ++ delta = htonl(oldlen + (thlen + len)); ++ ++ skb = segs; ++ th = skb->h.th; ++ seq = ntohl(th->seq); ++ ++ do { ++ th->fin = th->psh = 0; ++ ++ th->check = ~csum_fold((u32)((u32)th->check + ++ (u32)delta)); ++ seq += len; ++ skb = skb->next; ++ th = skb->h.th; ++ ++ th->seq = htonl(seq); ++ th->cwr = 0; ++ } while (skb->next); ++ ++ delta = htonl(oldlen + (skb->tail - skb->h.raw) + skb->data_len); ++ th->check = ~csum_fold((u32)((u32)th->check + ++ (u32)delta)); ++out: ++ return segs; ++} ++ ++static struct sk_buff *inet_gso_segment(struct sk_buff *skb, int features) ++{ ++ struct sk_buff *segs = ERR_PTR(-EINVAL); ++ struct iphdr *iph; ++ int ihl; ++ int id; ++ ++ if (unlikely(!pskb_may_pull(skb, sizeof(*iph)))) ++ goto out; ++ ++ iph = skb->nh.iph; ++ ihl = iph->ihl * 4; ++ if (ihl < sizeof(*iph)) ++ goto out; ++ ++ if (unlikely(!pskb_may_pull(skb, ihl))) ++ goto out; ++ ++ skb->h.raw = __skb_pull(skb, ihl); ++ iph = skb->nh.iph; ++ id = ntohs(iph->id); ++ segs = ERR_PTR(-EPROTONOSUPPORT); ++ ++ segs = tcp_tso_segment(skb, features); ++ ++ if (!segs || IS_ERR(segs)) ++ goto out; ++ ++ skb = segs; ++ do { ++ iph = skb->nh.iph; ++ iph->id = htons(id++); ++ iph->tot_len = htons(skb->len - skb->mac_len); ++ iph->check = 0; ++ iph->check = ip_fast_csum(skb->nh.raw, iph->ihl); ++ } while ((skb = skb->next)); ++ ++out: ++ return segs; ++} ++ ++static struct sk_buff *skb_gso_segment(struct sk_buff *skb, int features) ++{ ++ struct sk_buff *segs = ERR_PTR(-EPROTONOSUPPORT); ++ ++ skb->mac.raw = skb->data; ++ skb->mac_len = skb->nh.raw - skb->data; ++ __skb_pull(skb, skb->mac_len); ++ ++ segs = inet_gso_segment(skb, features); ++ ++ __skb_push(skb, skb->data - skb->mac.raw); ++ return segs; ++} ++#endif /* NETIF_F_GSO */ ++ ++#endif /* NETIF_F_TSO */ ++ ++#ifndef BCM_HAS_SKB_COPY_FROM_LINEAR_DATA ++static inline void skb_copy_from_linear_data(const struct sk_buff *skb, ++ void *to, ++ const unsigned int len) ++{ ++ memcpy(to, skb->data, len); ++} ++#endif ++ ++#if TG3_TSO_SUPPORT != 0 ++#if defined(BCM_NO_TSO6) ++static inline int skb_is_gso_v6(const struct sk_buff *skb) ++{ ++ return 0; ++} ++#else ++#if !defined(BCM_HAS_SKB_IS_GSO_V6) ++static inline int skb_is_gso_v6(const struct sk_buff *skb) ++{ ++ return skb_shinfo(skb)->gso_type & SKB_GSO_TCPV6; ++} ++#endif ++#endif ++#endif ++ ++#ifndef BCM_HAS_SKB_CHECKSUM_NONE_ASSERT ++static inline void skb_checksum_none_assert(struct sk_buff *skb) ++{ ++ skb->ip_summed = CHECKSUM_NONE; ++} ++#endif ++ ++#ifndef BCM_HAS_NETDEV_TX_T ++typedef int netdev_tx_t; ++#endif ++ ++#ifndef BCM_HAS_NETDEV_FEATURES_T ++typedef u32 netdev_features_t; ++#endif ++ ++#ifndef BCM_HAS_NETDEV_NAME ++#define netdev_name(netdev) netdev->name ++#endif ++ ++#if defined(netdev_printk) && (LINUX_VERSION_CODE < 0x020609) ++/* SLES 9.X provides their own print routines, but they are not compatible ++ * with the versions found in the latest upstream kernel. The kernel ++ * version check above was picked out of the air as a value greater than ++ * 2.6.5-7.308, but any number that preserves this boundary should be ++ * acceptable. ++ */ ++#undef netdev_printk ++#undef netdev_info ++#undef netdev_err ++#undef netdev_warn ++#endif ++ ++#ifndef netdev_printk ++#define netdev_printk(level, netdev, format, args...) \ ++ dev_printk(level, tp->pdev->dev.parent, \ ++ "%s: " format, \ ++ netdev_name(tp->dev), ##args) ++#endif ++ ++#ifndef netif_printk ++#define netif_printk(priv, type, level, dev, fmt, args...) \ ++do { \ ++ if (netif_msg_##type(priv)) \ ++ netdev_printk(level, (dev), fmt, ##args); \ ++} while (0) ++#endif ++ ++#ifndef netif_info ++#define netif_info(priv, type, dev, fmt, args...) \ ++ netif_printk(priv, type, KERN_INFO, (dev), fmt, ##args) ++#endif ++ ++#ifndef netdev_err ++#define netdev_err(dev, format, args...) \ ++ netdev_printk(KERN_ERR, dev, format, ##args) ++#endif ++ ++#ifndef netdev_warn ++#define netdev_warn(dev, format, args...) \ ++ netdev_printk(KERN_WARNING, dev, format, ##args) ++#endif ++ ++#ifndef netdev_notice ++#define netdev_notice(dev, format, args...) \ ++ netdev_printk(KERN_NOTICE, dev, format, ##args) ++#endif ++ ++#ifndef netdev_info ++#define netdev_info(dev, format, args...) \ ++ netdev_printk(KERN_INFO, dev, format, ##args) ++#endif ++ ++#ifndef BCM_HAS_NETIF_TX_LOCK ++static inline void netif_tx_lock(struct net_device *dev) ++{ ++ spin_lock(&dev->xmit_lock); ++ dev->xmit_lock_owner = smp_processor_id(); ++} ++ ++static inline void netif_tx_unlock(struct net_device *dev) ++{ ++ dev->xmit_lock_owner = -1; ++ spin_unlock(&dev->xmit_lock); ++} ++#endif /* BCM_HAS_NETIF_TX_LOCK */ ++ ++#if defined(BCM_HAS_STRUCT_NETDEV_QUEUE) || \ ++ (defined(__VMKLNX__) && defined(__USE_COMPAT_LAYER_2_6_18_PLUS__)) ++ ++#define TG3_NAPI ++#define napi_complete_(dev, napi) napi_complete((napi)) ++#define napi_schedule_(dev, napi) napi_schedule((napi)) ++#define tg3_netif_rx_schedule_prep(dev, napi) napi_schedule_prep((napi)) ++ ++#else /* BCM_HAS_STRUCT_NETDEV_QUEUE */ ++ ++#define netdev_queue net_device ++#define netdev_get_tx_queue(dev, i) (dev) ++#define netif_tx_start_queue(dev) netif_start_queue((dev)) ++#define netif_tx_start_all_queues(dev) netif_start_queue((dev)) ++#define netif_tx_stop_queue(dev) netif_stop_queue((dev)) ++#define netif_tx_stop_all_queues(dev) netif_stop_queue((dev)) ++#define netif_tx_queue_stopped(dev) netif_queue_stopped((dev)) ++#define netif_tx_wake_queue(dev) netif_wake_queue((dev)) ++#define netif_tx_wake_all_queues(dev) netif_wake_queue((dev)) ++#define __netif_tx_lock(txq, procid) netif_tx_lock((txq)) ++#define __netif_tx_unlock(txq) netif_tx_unlock((txq)) ++ ++#if defined(BCM_HAS_NEW_NETIF_INTERFACE) ++#define TG3_NAPI ++#define napi_complete_(dev, napi) netif_rx_complete((dev), (napi)) ++#define napi_schedule_(dev, napi) netif_rx_schedule((dev), (napi)) ++#define tg3_netif_rx_schedule_prep(dev, napi) netif_rx_schedule_prep((dev), (napi)) ++#else /* BCM_HAS_NEW_NETIF_INTERFACE */ ++#define napi_complete_(dev, napi) netif_rx_complete((dev)) ++#define napi_schedule_(dev, napi) netif_rx_schedule((dev)) ++#define tg3_netif_rx_schedule_prep(dev, napi) netif_rx_schedule_prep((dev)) ++#endif /* BCM_HAS_NEW_NETIF_INTERFACE */ ++ ++#endif /* BCM_HAS_STRUCT_NETDEV_QUEUE */ ++ ++#if !defined(BCM_HAS_ALLOC_ETHERDEV_MQ) || !defined(TG3_NAPI) ++#define alloc_etherdev_mq(size, numqs) alloc_etherdev((size)) ++#endif ++ ++#if !defined(TG3_NAPI) || !defined(BCM_HAS_VLAN_GRO_RECEIVE) ++#define vlan_gro_receive(nap, grp, tag, skb) \ ++ vlan_hwaccel_receive_skb((skb), (grp), (tag)) ++#endif ++ ++#ifndef NETIF_F_HW_VLAN_CTAG_TX ++#define NETIF_F_HW_VLAN_CTAG_TX NETIF_F_HW_VLAN_TX ++#else ++#define BCM_HWACCEL_HAS_PROTO_ARG ++#endif ++ ++#ifndef NETIF_F_HW_VLAN_CTAG_RX ++#define NETIF_F_HW_VLAN_CTAG_RX NETIF_F_HW_VLAN_RX ++#endif ++#if !defined(TG3_NAPI) || !defined(BCM_HAS_NAPI_GRO_RECEIVE) ++#define napi_gro_receive(nap, skb) \ ++ netif_receive_skb((skb)) ++#endif ++ ++#if !defined(BCM_HAS_SKB_GET_QUEUE_MAPPING) || !defined(TG3_NAPI) ++#define skb_get_queue_mapping(skb) 0 ++#endif ++ ++#ifdef TG3_NAPI ++#if (LINUX_VERSION_CODE < 0x02061b) && !defined(__VMKLNX__) ++ ++static inline void netif_napi_del(struct napi_struct *napi) ++{ ++#ifdef CONFIG_NETPOLL ++ list_del(&napi->dev_list); ++#endif ++} ++#endif ++ ++#endif ++#if (LINUX_VERSION_CODE < 0x020612) ++static inline struct sk_buff *netdev_alloc_skb(struct net_device *dev, ++ unsigned int length) ++{ ++ struct sk_buff *skb = dev_alloc_skb(length); ++ if (skb) ++ skb->dev = dev; ++ return skb; ++} ++#endif ++ ++#ifndef BCM_HAS_NETDEV_PRIV ++static inline void *netdev_priv(struct net_device *dev) ++{ ++ return dev->priv; ++} ++#endif ++ ++#ifdef OLD_NETIF ++static inline void netif_poll_disable(struct net_device *dev) ++{ ++ while (test_and_set_bit(__LINK_STATE_RX_SCHED, &dev->state)) { ++ /* No hurry. */ ++ current->state = TASK_INTERRUPTIBLE; ++ schedule_timeout(1); ++ } ++} ++ ++static inline void netif_poll_enable(struct net_device *dev) ++{ ++ clear_bit(__LINK_STATE_RX_SCHED, &dev->state); ++} ++ ++static inline void netif_tx_disable(struct net_device *dev) ++{ ++ spin_lock_bh(&dev->xmit_lock); ++ netif_stop_queue(dev); ++ spin_unlock_bh(&dev->xmit_lock); ++} ++#endif /* OLD_NETIF */ ++ ++#ifndef BCM_HAS_NETDEV_SENT_QUEUE ++#define netdev_sent_queue(dev, bytes) ++#endif ++ ++#ifndef BCM_HAS_NETDEV_TX_SENT_QUEUE ++#define netdev_tx_sent_queue(q, bytes) \ ++ netdev_sent_queue(tp->dev, bytes) ++#endif ++ ++#ifndef BCM_HAS_NETDEV_COMPLETED_QUEUE ++#define netdev_completed_queue(dev, pkts, bytes) ++#endif ++ ++#ifndef BCM_HAS_NETDEV_TX_COMPLETED_QUEUE ++#define netdev_tx_completed_queue(q, pkt_cnt, byte_cnt) \ ++ netdev_completed_queue(tp->dev, pkt_cnt, byte_cnt) ++#endif ++ ++#ifndef BCM_HAS_NETDEV_RESET_QUEUE ++#define netdev_reset_queue(dev_queue) ++#endif ++ ++#ifndef BCM_HAS_NETDEV_TX_RESET_QUEUE ++#define netdev_tx_reset_queue(q) \ ++ netdev_reset_queue(tp->dev) ++#endif ++ ++#ifndef BCM_HAS_NETIF_SET_REAL_NUM_TX_QUEUES ++#define netif_set_real_num_tx_queues(dev, nq) ((dev)->real_num_tx_queues = (nq)) ++#endif ++ ++#ifndef BCM_HAS_NETIF_SET_REAL_NUM_RX_QUEUES ++#define netif_set_real_num_rx_queues(dev, nq) 0 ++#endif ++ ++#ifndef netdev_mc_count ++#define netdev_mc_count(dev) ((dev)->mc_count) ++#endif ++ ++#ifndef netdev_mc_empty ++#define netdev_mc_empty(dev) (netdev_mc_count(dev) == 0) ++#endif ++ ++/* ++ * Commit ID 22bedad3ce112d5ca1eaf043d4990fa2ed698c87 is the patch that ++ * undefines dmi_addr and pivots the code to use netdev_hw_addr rather ++ * than dev_mc_list. Commit ID 6683ece36e3531fc8c75f69e7165c5f20930be88 ++ * is the patch that introduces netdev_for_each_mc_addr. Commit ID ++ * f001fde5eadd915f4858d22ed70d7040f48767cf is the patch that introduces ++ * netdev_hw_addr. These features are presented in reverse chronological ++ * order. ++ */ ++#ifdef BCM_HAS_NETDEV_HW_ADDR ++#ifdef dmi_addr ++#undef netdev_for_each_mc_addr ++#define netdev_for_each_mc_addr(ha, dev) \ ++ struct dev_mc_list * oldmclist; \ ++ struct netdev_hw_addr foo; \ ++ ha = &foo; \ ++ for (oldmclist = dev->mc_list; oldmclist && memcpy(foo.addr, oldmclist->dmi_addr, 6); oldmclist = oldmclist->next) ++#endif ++#else /* BCM_HAS_NETDEV_HW_ADDR */ ++struct netdev_hw_addr { ++ u8 * addr; ++ struct dev_mc_list * curr; ++}; ++#undef netdev_for_each_mc_addr ++#define netdev_for_each_mc_addr(ha, dev) \ ++ struct netdev_hw_addr mclist; \ ++ ha = &mclist; \ ++ for (mclist.curr = dev->mc_list; mclist.curr && (mclist.addr = &mclist.curr->dmi_addr[0]); mclist.curr = mclist.curr->next) ++#endif /* BCM_HAS_NETDEV_HW_ADDR */ ++ ++#ifndef BCM_HAS_GET_STATS64 ++#define rtnl_link_stats64 net_device_stats ++#endif /* BCM_HAS_GET_STATS64 */ ++ ++#ifndef BCM_HAS_EXTERNAL_LB_DONE ++#define ETH_TEST_FL_EXTERNAL_LB (1 << 2) ++#define ETH_TEST_FL_EXTERNAL_LB_DONE (1 << 3) ++#endif ++ ++#if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE) ++#define BCM_KERNEL_SUPPORTS_8021Q ++#endif ++ ++#ifndef ETH_SS_TEST ++#define ETH_SS_TEST 0 ++#endif ++#ifndef ETH_SS_STATS ++#define ETH_SS_STATS 1 ++#endif ++#ifndef ADVERTISED_Pause ++#define ADVERTISED_Pause (1 << 13) ++#endif ++#ifndef ADVERTISED_Asym_Pause ++#define ADVERTISED_Asym_Pause (1 << 14) ++#endif ++ ++#ifndef ADVERTISED_1000baseKX_Full ++#define ADVERTISED_1000baseKX_Full (1 << 17) ++#endif ++ ++#ifndef MII_CTRL1000 ++#define MII_CTRL1000 0x09 ++#endif ++#ifndef ADVERTISE_1000HALF ++#define ADVERTISE_1000HALF 0x0100 ++#endif ++#ifndef ADVERTISE_1000FULL ++#define ADVERTISE_1000FULL 0x0200 ++#endif ++#ifndef CTL1000_AS_MASTER ++#define CTL1000_AS_MASTER 0x0800 ++#endif ++#ifndef CTL1000_ENABLE_MASTER ++#define CTL1000_ENABLE_MASTER 0x1000 ++#endif ++#ifndef MII_STAT1000 ++#define MII_STAT1000 0x0a ++#endif ++#ifndef BMCR_SPEED1000 ++#define BMCR_SPEED1000 0x0040 ++#endif ++#ifndef ADVERTISE_1000XFULL ++#define ADVERTISE_1000XFULL 0x0020 ++#endif ++#ifndef ADVERTISE_1000XHALF ++#define ADVERTISE_1000XHALF 0x0040 ++#endif ++#ifndef ADVERTISE_1000XPAUSE ++#define ADVERTISE_1000XPAUSE 0x0080 ++#endif ++#ifndef ADVERTISE_1000XPSE_ASYM ++#define ADVERTISE_1000XPSE_ASYM 0x0100 ++#endif ++#ifndef ADVERTISE_PAUSE ++#define ADVERTISE_PAUSE_CAP 0x0400 ++#endif ++#ifndef ADVERTISE_PAUSE_ASYM ++#define ADVERTISE_PAUSE_ASYM 0x0800 ++#endif ++#ifndef LPA_1000XFULL ++#define LPA_1000XFULL 0x0020 ++#endif ++#ifndef LPA_1000XHALF ++#define LPA_1000XHALF 0x0040 ++#endif ++#ifndef LPA_1000XPAUSE ++#define LPA_1000XPAUSE 0x0080 ++#endif ++#ifndef LPA_1000XPAUSE_ASYM ++#define LPA_1000XPAUSE_ASYM 0x0100 ++#endif ++#ifndef LPA_PAUSE ++#define LPA_PAUSE_CAP 0x0400 ++#endif ++#ifndef LPA_PAUSE_ASYM ++#define LPA_PAUSE_ASYM 0x0800 ++#endif ++#ifndef LPA_1000FULL ++#define LPA_1000FULL 0x0800 ++#endif ++#ifndef LPA_1000HALF ++#define LPA_1000HALF 0x0400 ++#endif ++ ++#ifndef ETHTOOL_FWVERS_LEN ++#define ETHTOOL_FWVERS_LEN 32 ++#endif ++ ++#ifndef MDIO_MMD_AN ++#define MDIO_MMD_AN 7 ++#endif ++ ++#ifndef MDIO_AN_EEE_ADV ++#define MDIO_AN_EEE_ADV 60 ++#endif ++ ++#ifndef MDIO_AN_EEE_ADV_100TX ++#define MDIO_AN_EEE_ADV_100TX 0x0002 ++#endif ++ ++#ifndef MDIO_AN_EEE_ADV_1000T ++#define MDIO_AN_EEE_ADV_1000T 0x0004 ++#endif ++ ++#ifndef MDIO_AN_EEE_LPABLE ++#define MDIO_AN_EEE_LPABLE 61 ++#endif ++ ++#ifndef MDIO_EEE_100TX ++#define MDIO_EEE_100TX MDIO_AN_EEE_ADV_100TX /* 100TX EEE cap */ ++#endif ++ ++#ifndef MDIO_EEE_1000T ++#define MDIO_EEE_1000T MDIO_AN_EEE_ADV_1000T /* 1000T EEE cap */ ++#endif ++ ++#ifndef MDIO_EEE_1000KX ++#define MDIO_EEE_1000KX 0x0010 /* 1000KX EEE cap */ ++#endif ++ ++#ifndef BCM_HAS_MMD_EEE_ADV_TO_ETHTOOL ++/** ++ * mmd_eee_adv_to_ethtool_adv_t ++ * @eee_adv: value of the MMD EEE Advertisement/Link Partner Ability registers ++ * ++ * A small helper function that translates the MMD EEE Advertisment (7.60) ++ * and MMD EEE Link Partner Ability (7.61) bits to ethtool advertisement ++ * settings. ++ */ ++static inline u32 mmd_eee_adv_to_ethtool_adv_t(u16 eee_adv) ++{ ++ u32 adv = 0; ++ ++ if (eee_adv & MDIO_EEE_100TX) ++ adv |= ADVERTISED_100baseT_Full; ++ if (eee_adv & MDIO_EEE_1000T) ++ adv |= ADVERTISED_1000baseT_Full; ++ if (eee_adv & MDIO_EEE_1000KX) ++ adv |= ADVERTISED_1000baseKX_Full; ++ ++ return adv; ++} ++#endif ++ ++#ifndef SPEED_UNKNOWN ++#define SPEED_UNKNOWN -1 ++#endif ++ ++#ifndef DUPLEX_UNKNOWN ++#define DUPLEX_UNKNOWN 0xff ++#endif ++ ++#ifndef BCM_HAS_ETHTOOL_ADV_TO_MII_ADV_T ++static inline u32 ethtool_adv_to_mii_adv_t(u32 ethadv) ++{ ++ u32 result = 0; ++ ++ if (ethadv & ADVERTISED_10baseT_Half) ++ result |= ADVERTISE_10HALF; ++ if (ethadv & ADVERTISED_10baseT_Full) ++ result |= ADVERTISE_10FULL; ++ if (ethadv & ADVERTISED_100baseT_Half) ++ result |= ADVERTISE_100HALF; ++ if (ethadv & ADVERTISED_100baseT_Full) ++ result |= ADVERTISE_100FULL; ++ if (ethadv & ADVERTISED_Pause) ++ result |= ADVERTISE_PAUSE_CAP; ++ if (ethadv & ADVERTISED_Asym_Pause) ++ result |= ADVERTISE_PAUSE_ASYM; ++ ++ return result; ++} ++ ++static inline u32 mii_adv_to_ethtool_adv_t(u32 adv) ++{ ++ u32 result = 0; ++ ++ if (adv & ADVERTISE_10HALF) ++ result |= ADVERTISED_10baseT_Half; ++ if (adv & ADVERTISE_10FULL) ++ result |= ADVERTISED_10baseT_Full; ++ if (adv & ADVERTISE_100HALF) ++ result |= ADVERTISED_100baseT_Half; ++ if (adv & ADVERTISE_100FULL) ++ result |= ADVERTISED_100baseT_Full; ++ if (adv & ADVERTISE_PAUSE_CAP) ++ result |= ADVERTISED_Pause; ++ if (adv & ADVERTISE_PAUSE_ASYM) ++ result |= ADVERTISED_Asym_Pause; ++ ++ return result; ++} ++ ++static inline u32 ethtool_adv_to_mii_ctrl1000_t(u32 ethadv) ++{ ++ u32 result = 0; ++ ++ if (ethadv & ADVERTISED_1000baseT_Half) ++ result |= ADVERTISE_1000HALF; ++ if (ethadv & ADVERTISED_1000baseT_Full) ++ result |= ADVERTISE_1000FULL; ++ ++ return result; ++} ++ ++static inline u32 mii_ctrl1000_to_ethtool_adv_t(u32 adv) ++{ ++ u32 result = 0; ++ ++ if (adv & ADVERTISE_1000HALF) ++ result |= ADVERTISED_1000baseT_Half; ++ if (adv & ADVERTISE_1000FULL) ++ result |= ADVERTISED_1000baseT_Full; ++ ++ return result; ++} ++ ++static inline u32 mii_lpa_to_ethtool_lpa_t(u32 lpa) ++{ ++ u32 result = 0; ++ ++ if (lpa & LPA_LPACK) ++ result |= ADVERTISED_Autoneg; ++ ++ return result | mii_adv_to_ethtool_adv_t(lpa); ++} ++ ++static inline u32 mii_stat1000_to_ethtool_lpa_t(u32 lpa) ++{ ++ u32 result = 0; ++ ++ if (lpa & LPA_1000HALF) ++ result |= ADVERTISED_1000baseT_Half; ++ if (lpa & LPA_1000FULL) ++ result |= ADVERTISED_1000baseT_Full; ++ ++ return result; ++} ++ ++static inline u32 ethtool_adv_to_mii_adv_x(u32 ethadv) ++{ ++ u32 result = 0; ++ ++ if (ethadv & ADVERTISED_1000baseT_Half) ++ result |= ADVERTISE_1000XHALF; ++ if (ethadv & ADVERTISED_1000baseT_Full) ++ result |= ADVERTISE_1000XFULL; ++ if (ethadv & ADVERTISED_Pause) ++ result |= ADVERTISE_1000XPAUSE; ++ if (ethadv & ADVERTISED_Asym_Pause) ++ result |= ADVERTISE_1000XPSE_ASYM; ++ ++ return result; ++} ++ ++static inline u32 mii_adv_to_ethtool_adv_x(u32 adv) ++{ ++ u32 result = 0; ++ ++ if (adv & ADVERTISE_1000XHALF) ++ result |= ADVERTISED_1000baseT_Half; ++ if (adv & ADVERTISE_1000XFULL) ++ result |= ADVERTISED_1000baseT_Full; ++ if (adv & ADVERTISE_1000XPAUSE) ++ result |= ADVERTISED_Pause; ++ if (adv & ADVERTISE_1000XPSE_ASYM) ++ result |= ADVERTISED_Asym_Pause; ++ ++ return result; ++} ++ ++static inline u32 mii_lpa_to_ethtool_lpa_x(u32 lpa) ++{ ++ u32 result = 0; ++ ++ if (lpa & LPA_LPACK) ++ result |= ADVERTISED_Autoneg; ++ ++ return result | mii_adv_to_ethtool_adv_x(lpa); ++} ++#endif /* BCM_HAS_ETHTOOL_ADV_TO_MII_100BT */ ++ ++#ifndef BCM_HAS_ETHTOOL_RXFH_INDIR_DEFAULT ++static inline u32 ethtool_rxfh_indir_default(u32 index, u32 n_rx_rings) ++{ ++ return index % n_rx_rings; ++} ++#endif /* BCM_HAS_ETHTOOL_RXFH_INDIR_DEFAULT */ ++ ++#ifndef BCM_HAS_MII_RESOLVE_FLOWCTRL_FDX ++#ifndef FLOW_CTRL_TX ++#define FLOW_CTRL_TX 0x01 ++#endif ++#ifndef FLOW_CTRL_RX ++#define FLOW_CTRL_RX 0x02 ++#endif ++static u8 mii_resolve_flowctrl_fdx(u16 lcladv, u16 rmtadv) ++{ ++ u8 cap = 0; ++ ++ if (lcladv & rmtadv & ADVERTISE_PAUSE_CAP) { ++ cap = FLOW_CTRL_TX | FLOW_CTRL_RX; ++ } else if (lcladv & ADVERTISE_PAUSE_ASYM) { ++ if (lcladv & LPA_PAUSE_CAP) ++ cap = FLOW_CTRL_RX; ++ if (rmtadv & LPA_PAUSE_CAP) ++ cap = FLOW_CTRL_TX; ++ } ++ ++ return cap; ++} ++#endif /* BCM_HAS_MII_RESOLVE_FLOWCTRL_FDX */ ++ ++#ifndef BCM_HAS_MII_ADVERTISE_FLOWCTRL ++static u16 mii_advertise_flowctrl(u8 flow_ctrl) ++{ ++ u16 miireg; ++ ++ if ((flow_ctrl & FLOW_CTRL_TX) && (flow_ctrl & FLOW_CTRL_RX)) ++ miireg = ADVERTISE_PAUSE_CAP; ++ else if (flow_ctrl & FLOW_CTRL_TX) ++ miireg = ADVERTISE_PAUSE_ASYM; ++ else if (flow_ctrl & FLOW_CTRL_RX) ++ miireg = ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM; ++ else ++ miireg = 0; ++ ++ return miireg; ++} ++#endif /* BCM_HAS_MII_ADVERTISE_FLOWCTRL */ ++ ++#ifdef BCM_INCLUDE_PHYLIB_SUPPORT ++ ++#ifndef PHY_ID_BCM50610 ++#define PHY_ID_BCM50610 0x0143bd60 ++#endif ++#ifndef PHY_ID_BCM50610M ++#define PHY_ID_BCM50610M 0x0143bd70 ++#endif ++#ifndef PHY_ID_BCM50612E ++#define PHY_ID_BCM50612E 0x03625e20 ++#endif ++#ifndef PHY_ID_BCMAC131 ++#define PHY_ID_BCMAC131 0x0143bc70 ++#endif ++#ifndef PHY_ID_BCM57780 ++#define PHY_ID_BCM57780 0x03625d90 ++#endif ++#ifndef PHY_BCM_OUI_MASK ++#define PHY_BCM_OUI_MASK 0xfffffc00 ++#endif ++#ifndef PHY_BCM_OUI_1 ++#define PHY_BCM_OUI_1 0x00206000 ++#endif ++#ifndef PHY_BCM_OUI_2 ++#define PHY_BCM_OUI_2 0x0143bc00 ++#endif ++#ifndef PHY_BCM_OUI_3 ++#define PHY_BCM_OUI_3 0x03625c00 ++#endif ++ ++#ifndef PHY_BRCM_STD_IBND_DISABLE ++#define PHY_BRCM_STD_IBND_DISABLE 0x00000800 ++#define PHY_BRCM_EXT_IBND_RX_ENABLE 0x00001000 ++#define PHY_BRCM_EXT_IBND_TX_ENABLE 0x00002000 ++#endif ++ ++#ifndef PHY_BRCM_RX_REFCLK_UNUSED ++#define PHY_BRCM_RX_REFCLK_UNUSED 0x00000400 ++#endif ++ ++#ifndef PHY_BRCM_CLEAR_RGMII_MODE ++#define PHY_BRCM_CLEAR_RGMII_MODE 0x00004000 ++#endif ++ ++#ifndef PHY_BRCM_DIS_TXCRXC_NOENRGY ++#define PHY_BRCM_DIS_TXCRXC_NOENRGY 0x00008000 ++#endif ++ ++#ifndef BCM_HAS_MDIOBUS_ALLOC ++static struct mii_bus *mdiobus_alloc(void) ++{ ++ struct mii_bus *bus; ++ ++ bus = kzalloc(sizeof(*bus), GFP_KERNEL); ++ ++ return bus; ++} ++ ++void mdiobus_free(struct mii_bus *bus) ++{ ++ kfree(bus); ++} ++#endif ++ ++#endif /* BCM_INCLUDE_PHYLIB_SUPPORT */ ++ ++#ifndef BCM_HAS_ETHTOOL_CMD_SPEED ++static inline __u32 ethtool_cmd_speed(struct ethtool_cmd *ep) ++{ ++ return ep->speed; ++} ++#endif /* BCM_HAS_ETHTOOL_CMD_SPEED */ ++ ++#ifndef BCM_HAS_ETHTOOL_CMD_SPEED_SET ++static inline __u32 ethtool_cmd_speed_set(struct ethtool_cmd *ep, __u32 speed) ++{ ++ ep->speed = speed; ++ return 0; ++} ++#endif /* BCM_HAS_ETHTOOL_CMD_SPEED_SET */ ++ ++#ifdef BCM_HAS_PCI_BUSN_RES ++#define busn_res_end busn_res.end ++#else ++#define busn_res_end subordinate ++#endif ++ ++#ifndef __devinit ++#define __devinit ++#endif ++ ++#ifndef __devinitdata ++#define __devinitdata ++#endif ++ ++#ifndef __devexit ++#define __devexit ++#endif ++ ++#ifndef __devexit_p ++#define __devexit_p(x) (x) ++#endif ++ ++#ifndef CONFIG_SSB_DRIVER_GIGE ++#define ssb_gige_get_macaddr(a, b) (0) ++#define ssb_gige_get_phyaddr(a) (0) ++#define pdev_is_ssb_gige_core(a) (0) ++#define ssb_gige_must_flush_posted_writes(a) (0) ++#define ssb_gige_one_dma_at_once(a) (0) ++#define ssb_gige_have_roboswitch(a) (0) ++#define ssb_gige_is_rgmii(a) (0) ++#else ++#include ++#endif ++ ++#ifndef ETHTOOL_GEEE ++struct ethtool_eee { ++ __u32 cmd; ++ __u32 supported; ++ __u32 advertised; ++ __u32 lp_advertised; ++ __u32 eee_active; ++ __u32 eee_enabled; ++ __u32 tx_lpi_enabled; ++ __u32 tx_lpi_timer; ++ __u32 reserved[2]; ++}; ++#endif ++ ++#ifdef __VMKLNX__ ++#ifndef SYSTEM_POWER_OFF ++#define SYSTEM_POWER_OFF (3) ++#endif ++ ++#define system_state SYSTEM_POWER_OFF ++#endif ++ ++#ifndef BCM_HAS_PCI_CHANNEL_OFFLINE ++static inline int pci_channel_offline(struct pci_dev *pdev) ++{ ++#ifdef BCM_HAS_PCI_CHANNEL_IO_NORMAL_ENUM ++ return (pdev->error_state != pci_channel_io_normal); ++#else ++ return 0; ++#endif ++} ++#endif /*BCM_HAS_PCI_CHANNEL_OFFLINE*/ ++ ++#ifndef BCM_HAS_PCI_IS_ENABLED ++static inline int pci_is_enabled(struct pci_dev *pdev) ++{ ++ return 1; ++} ++#endif ++ ++#ifndef BCM_HAS_PCI_DEV_IS_PRESENT ++static inline int pci_device_is_present(struct pci_dev *pdev) ++{ ++ return 1; ++} ++#endif ++#ifndef BCM_HAS_DMA_ZALLOC_COHERENT ++#ifndef __GFP_ZERO ++ #define ___GFP_ZERO 0x8000u ++ #define __GFP_ZERO ((__force unsigned)___GFP_ZERO) /* Return zeroed page on success */ ++#endif ++ ++static inline void *dma_zalloc_coherent(struct device *dev, size_t size, ++ dma_addr_t *dma_handle, unsigned flag) ++{ ++ void *ret = dma_alloc_coherent(dev, size, dma_handle, ++ flag | __GFP_ZERO); ++ return ret; ++} ++#endif ++ ++#ifndef DEFAULT_MAX_NUM_RSS_QUEUES ++#define DEFAULT_MAX_NUM_RSS_QUEUES (8) ++#endif ++ ++#ifndef BCM_HAS_GET_NUM_DFLT_RSS_QS ++int netif_get_num_default_rss_queues(void) ++{ ++ return min_t(int, DEFAULT_MAX_NUM_RSS_QUEUES, num_online_cpus()); ++} ++#endif ++ ++#ifndef SIOCGHWTSTAMP ++#define SIOCGHWTSTAMP 0x89b1 ++#endif +diff --git a/drivers/net/ethernet/broadcom/tg3/tg3_compat2.h b/drivers/net/ethernet/broadcom/tg3/tg3_compat2.h +new file mode 100644 +index 0000000..07c968d +--- /dev/null ++++ b/drivers/net/ethernet/broadcom/tg3/tg3_compat2.h +@@ -0,0 +1,518 @@ ++/* Copyright (C) 2009-2015 Broadcom Corporation. */ ++ ++#ifndef BCM_HAS_PCI_PCIE_CAP ++static inline int pci_pcie_cap(struct pci_dev *pdev) ++{ ++ struct net_device *dev = pci_get_drvdata(pdev); ++ struct tg3 *tp = netdev_priv(dev); ++ ++ return tp->pcie_cap; ++} ++#endif ++ ++#ifndef BCM_HAS_PCI_IS_PCIE ++static inline bool pci_is_pcie(struct pci_dev *dev) ++{ ++ return !!pci_pcie_cap(dev); ++} ++#endif ++ ++#ifndef BCM_HAS_PCIE_CAP_RW ++static inline int pcie_capability_set_word(struct pci_dev *dev, int pos, ++ u16 set) ++{ ++ u16 val; ++ int rval; ++ ++ rval = pci_read_config_word(dev, pci_pcie_cap(dev) + pos, &val); ++ ++ if (!rval) { ++ val |= set; ++ rval = pci_write_config_word(dev, pci_pcie_cap(dev) + pos, val); ++ } ++ ++ return rval; ++} ++ ++static inline int pcie_capability_clear_word(struct pci_dev *dev, int pos, ++ u16 clear) ++{ ++ u16 val; ++ int rval; ++ ++ rval = pci_read_config_word(dev, pci_pcie_cap(dev) + pos, &val); ++ ++ if (!rval) { ++ val &= ~clear; ++ rval = pci_write_config_word(dev, pci_pcie_cap(dev) + pos, val); ++ } ++ ++ return rval; ++} ++ ++static int pcie_capability_write_word(struct pci_dev *dev, int pos, u16 val) ++{ ++ return pci_write_config_word(dev, pci_pcie_cap(dev) + pos, val); ++} ++ ++static int pcie_capability_read_word(struct pci_dev *dev, int pos, u16 *val) ++{ ++ return pci_read_config_word(dev, pci_pcie_cap(dev) + pos, val); ++} ++#endif ++ ++#ifndef BCM_HAS_SKB_FRAG_DMA_MAP ++#define skb_frag_dma_map(x, frag, y, len, z) \ ++ pci_map_page(tp->pdev, (frag)->page, \ ++ (frag)->page_offset, (len), PCI_DMA_TODEVICE) ++#endif ++ ++#ifdef SIMPLE_DEV_PM_OPS ++ ++#define tg3_invalid_pci_state(tp, state) false ++#define tg3_pci_save_state(tp) ++#define tg3_pci_restore_state(tp) ++ ++#else /* SIMPLE_DEV_PM_OPS */ ++ ++#if (LINUX_VERSION_CODE < 0x2060b) ++static bool tg3_invalid_pci_state(struct tg3 *tp, u32 state) ++{ ++ bool ret = true; ++ pci_power_t target_state; ++ ++ target_state = pci_choose_state(tp->pdev, state); ++ if (target_state != PCI_D3hot || target_state != PCI_D3cold) ++ ret = false; ++ ++ return ret; ++} ++#else ++static bool tg3_invalid_pci_state(struct tg3 *tp, pm_message_t state) ++{ ++ bool ret = true; ++ pci_power_t target_state; ++ ++#ifdef BCM_HAS_PCI_TARGET_STATE ++ target_state = tp->pdev->pm_cap ? pci_target_state(tp->pdev) : PCI_D3hot; ++#else ++ target_state = pci_choose_state(tp->pdev, state); ++#endif ++ if (target_state != PCI_D3hot || target_state != PCI_D3cold) ++ ret = false; ++ ++ return ret; ++} ++#endif ++ ++#if (LINUX_VERSION_CODE < 0x2060a) ++#define tg3_pci_save_state(tp) pci_save_state(tp->pdev, tp->pci_cfg_state) ++#define tg3_pci_restore_state(tp) pci_restore_state(tp->pdev, tp->pci_cfg_state) ++#else ++#define tg3_pci_save_state(tp) pci_save_state(tp->pdev) ++#define tg3_pci_restore_state(tp) pci_restore_state(tp->pdev) ++#endif ++ ++#endif /* SIMPLE_DEV_PM_OPS */ ++ ++ ++#ifdef BCM_HAS_NEW_PCI_DMA_MAPPING_ERROR ++#define pci_dma_mapping_error_(pdev, mapping) pci_dma_mapping_error((pdev), (mapping)) ++#define dma_mapping_error_(pdev, mapping) dma_mapping_error((pdev), (mapping)) ++#elif defined(BCM_HAS_PCI_DMA_MAPPING_ERROR) ++#define pci_dma_mapping_error_(pdev, mapping) pci_dma_mapping_error((mapping)) ++#define dma_mapping_error_(pdev, mapping) dma_mapping_error((mapping)) ++#else ++#define pci_dma_mapping_error_(pdev, mapping) 0 ++#define dma_mapping_error_(pdev, mapping) 0 ++#endif ++ ++#ifndef BCM_HAS_HW_FEATURES ++#define hw_features features ++#endif ++ ++#ifndef BCM_HAS_VLAN_FEATURES ++#define vlan_features features ++#endif ++ ++#ifdef HAVE_POLL_CONTROLLER ++#define CONFIG_NET_POLL_CONTROLLER ++#endif ++ ++static inline void tg3_5780_class_intx_workaround(struct tg3 *tp) ++{ ++#ifndef BCM_HAS_INTX_MSI_WORKAROUND ++ if (tg3_flag(tp, 5780_CLASS) && ++ tg3_flag(tp, USING_MSI)) ++ tg3_enable_intx(tp->pdev); ++#endif ++} ++ ++#ifdef BCM_HAS_TXQ_TRANS_UPDATE ++#define tg3_update_trans_start(dev) ++#else ++#define tg3_update_trans_start(dev) ((dev)->trans_start = jiffies) ++#endif ++ ++#ifndef BCM_HAS_NEW_VLAN_INTERFACE ++#define TG3_TO_INT(Y) ((int)((ptrdiff_t)(Y) & (SMP_CACHE_BYTES - 1))) ++#define TG3_COMPAT_VLAN_ALLOC_LEN (SMP_CACHE_BYTES + VLAN_HLEN) ++#define TG3_COMPAT_VLAN_RESERVE(addr) (SKB_DATA_ALIGN((addr) + VLAN_HLEN) - (addr)) ++#else ++#define TG3_COMPAT_VLAN_ALLOC_LEN 0 ++#define TG3_COMPAT_VLAN_RESERVE(addr) 0 ++#endif ++ ++#ifdef BCM_KERNEL_SUPPORTS_8021Q ++ ++#ifndef BCM_HAS_NEW_VLAN_INTERFACE ++#undef TG3_RAW_IP_ALIGN ++#define TG3_RAW_IP_ALIGN (2 + VLAN_HLEN) ++#endif /* BCM_HAS_NEW_VLAN_INTERFACE */ ++ ++#ifndef BCM_HAS_NEW_VLAN_INTERFACE ++static void __tg3_set_rx_mode(struct net_device *); ++static inline void tg3_netif_start(struct tg3 *tp); ++static inline void tg3_netif_stop(struct tg3 *tp); ++static inline void tg3_full_lock(struct tg3 *tp, int irq_sync); ++static inline void tg3_full_unlock(struct tg3 *tp); ++ ++static void tg3_vlan_rx_register(struct net_device *dev, struct vlan_group *grp) ++{ ++ struct tg3 *tp = netdev_priv(dev); ++ ++ if (!netif_running(dev)) { ++ tp->vlgrp = grp; ++ return; ++ } ++ ++ tg3_netif_stop(tp); ++ ++ tg3_full_lock(tp, 0); ++ ++ tp->vlgrp = grp; ++ ++ /* Update RX_MODE_KEEP_VLAN_TAG bit in RX_MODE register. */ ++ __tg3_set_rx_mode(dev); ++ ++ tg3_netif_start(tp); ++ ++ tg3_full_unlock(tp); ++} ++ ++#ifndef BCM_HAS_NET_DEVICE_OPS ++#ifndef BCM_HAS_VLAN_GROUP_SET_DEVICE ++static inline void vlan_group_set_device(struct vlan_group *vg, int vlan_id, ++ struct net_device *dev) ++{ ++ if (vg) ++ vg->vlan_devices[vlan_id] = dev; ++} ++#endif ++ ++static void tg3_vlan_rx_kill_vid(struct net_device *dev, unsigned short vid) ++{ ++ struct tg3 *tp = netdev_priv(dev); ++ ++ if (netif_running(dev)) ++ tg3_netif_stop(tp); ++ ++ tg3_full_lock(tp, 0); ++ vlan_group_set_device(tp->vlgrp, vid, NULL); ++ tg3_full_unlock(tp); ++ ++ if (netif_running(dev)) ++ tg3_netif_start(tp); ++} ++#endif /* BCM_HAS_NET_DEVICE_OPS */ ++#endif /* BCM_USE_OLD_VLAN_INTERFACE */ ++#endif /* BCM_KERNEL_SUPPORTS_8021Q */ ++ ++ ++#ifndef BCM_HAS_NETDEV_UPDATE_FEATURES ++static u32 tg3_get_rx_csum(struct net_device *dev) ++{ ++ return (dev->features & NETIF_F_RXCSUM) != 0; ++} ++ ++static int tg3_set_rx_csum(struct net_device *dev, u32 data) ++{ ++ struct tg3 *tp = netdev_priv(dev); ++ ++ /* BROKEN_CHECKSUMS */ ++ if (tp->pci_chip_rev_id == CHIPREV_ID_5700_B0) { ++ if (data != 0) ++ return -EINVAL; ++ return 0; ++ } ++ ++ spin_lock_bh(&tp->lock); ++ if (data) ++ dev->features |= NETIF_F_RXCSUM; ++ else ++ dev->features &= ~NETIF_F_RXCSUM; ++ spin_unlock_bh(&tp->lock); ++ ++ return 0; ++} ++ ++#ifdef BCM_HAS_SET_TX_CSUM ++static int tg3_set_tx_csum(struct net_device *dev, u32 data) ++{ ++ struct tg3 *tp = netdev_priv(dev); ++ ++ /* BROKEN_CHECKSUMS */ ++ if (tp->pci_chip_rev_id == CHIPREV_ID_5700_B0) { ++ if (data != 0) ++ return -EINVAL; ++ return 0; ++ } ++ ++ if (tg3_flag(tp, 5755_PLUS)) ++#if defined(BCM_HAS_ETHTOOL_OP_SET_TX_IPV6_CSUM) ++ ethtool_op_set_tx_ipv6_csum(dev, data); ++#elif defined(BCM_HAS_ETHTOOL_OP_SET_TX_HW_CSUM) ++ ethtool_op_set_tx_hw_csum(dev, data); ++#else ++ tg3_set_tx_hw_csum(dev, data); ++#endif ++ else ++ ethtool_op_set_tx_csum(dev, data); ++ ++ return 0; ++} ++#endif ++ ++#if TG3_TSO_SUPPORT != 0 ++static int tg3_set_tso(struct net_device *dev, u32 value) ++{ ++ struct tg3 *tp = netdev_priv(dev); ++ ++ if (!tg3_flag(tp, TSO_CAPABLE)) { ++ if (value) ++ return -EINVAL; ++ return 0; ++ } ++ if ((dev->features & NETIF_F_IPV6_CSUM) && ++ (tg3_flag(tp, HW_TSO_2) || ++ tg3_flag(tp, HW_TSO_3))) { ++ if (value) { ++ dev->features |= NETIF_F_TSO6; ++ if (tg3_flag(tp, HW_TSO_3) || ++ tg3_asic_rev(tp) == ASIC_REV_5761 || ++ (tg3_asic_rev(tp) == ASIC_REV_5784 && ++ tg3_chip_rev(tp) != CHIPREV_5784_AX) || ++ tg3_asic_rev(tp) == ASIC_REV_5785 || ++ tg3_asic_rev(tp) == ASIC_REV_57780) ++ dev->features |= NETIF_F_TSO_ECN; ++ } else ++ dev->features &= ~(NETIF_F_TSO6 | NETIF_F_TSO_ECN); ++ } ++ return ethtool_op_set_tso(dev, value); ++} ++#endif ++ ++static void netdev_update_features(struct net_device *dev) ++{ ++ struct tg3 *tp = netdev_priv(dev); ++ ++ if (dev->mtu > ETH_DATA_LEN) { ++ if (tg3_flag(tp, 5780_CLASS)) { ++#if TG3_TSO_SUPPORT != 0 ++ ethtool_op_set_tso(dev, 0); ++#endif ++ } ++ } ++} ++#endif /* BCM_HAS_NETDEV_UPDATE_FEATURES */ ++ ++#if !defined(BCM_HAS_SET_PHYS_ID) || defined(GET_ETHTOOL_OP_EXT) ++ ++#if !defined(BCM_HAS_SET_PHYS_ID) ++enum ethtool_phys_id_state { ++ ETHTOOL_ID_INACTIVE, ++ ETHTOOL_ID_ACTIVE, ++ ETHTOOL_ID_ON, ++ ETHTOOL_ID_OFF ++}; ++#endif ++ ++static int tg3_set_phys_id(struct net_device *dev, ++ enum ethtool_phys_id_state state); ++static int tg3_phys_id(struct net_device *dev, u32 data) ++{ ++ struct tg3 *tp = netdev_priv(dev); ++ int i; ++ ++ if (!netif_running(tp->dev)) ++ return -EAGAIN; ++ ++ if (data == 0) ++ data = UINT_MAX / 2; ++ ++ for (i = 0; i < (data * 2); i++) { ++ if ((i % 2) == 0) ++ tg3_set_phys_id(dev, ETHTOOL_ID_ON); ++ else ++ tg3_set_phys_id(dev, ETHTOOL_ID_OFF); ++ ++ if (msleep_interruptible(500)) ++ break; ++ } ++ tg3_set_phys_id(dev, ETHTOOL_ID_INACTIVE); ++ return 0; ++} ++#endif /* BCM_HAS_SET_PHYS_ID */ ++ ++#ifndef BCM_HAS_GET_STATS64 ++static struct rtnl_link_stats64 *tg3_get_stats64(struct net_device *dev, ++ struct rtnl_link_stats64 *stats); ++static struct rtnl_link_stats64 *tg3_get_stats(struct net_device *dev) ++{ ++ struct tg3 *tp = netdev_priv(dev); ++ return tg3_get_stats64(dev, &tp->net_stats); ++} ++#endif /* BCM_HAS_GET_STATS64 */ ++ ++#ifdef BCM_HAS_GET_RXFH_INDIR ++#ifndef BCM_HAS_GET_RXFH_INDIR_SIZE ++static int tg3_get_rxfh_indir(struct net_device *dev, ++ struct ethtool_rxfh_indir *indir) ++{ ++ struct tg3 *tp = netdev_priv(dev); ++ int i; ++ ++ if (!tg3_flag(tp, SUPPORT_MSIX)) ++ return -EINVAL; ++ ++ if (!indir->size) { ++ indir->size = TG3_RSS_INDIR_TBL_SIZE; ++ return 0; ++ } ++ ++ if (indir->size != TG3_RSS_INDIR_TBL_SIZE) ++ return -EINVAL; ++ ++ for (i = 0; i < TG3_RSS_INDIR_TBL_SIZE; i++) ++ indir->ring_index[i] = tp->rss_ind_tbl[i]; ++ ++ return 0; ++} ++ ++static void tg3_rss_init_dflt_indir_tbl(struct tg3 *tp, u32 qcnt); ++static void tg3_rss_write_indir_tbl(struct tg3 *tp); ++static inline void tg3_full_lock(struct tg3 *tp, int irq_sync); ++static inline void tg3_full_unlock(struct tg3 *tp); ++ ++static int tg3_set_rxfh_indir(struct net_device *dev, ++ const struct ethtool_rxfh_indir *indir) ++{ ++ struct tg3 *tp = netdev_priv(dev); ++ size_t i; ++ ++ if (!tg3_flag(tp, SUPPORT_MSIX)) ++ return -EINVAL; ++ ++ if (!indir->size) { ++ tg3_flag_clear(tp, USER_INDIR_TBL); ++ tg3_rss_init_dflt_indir_tbl(tp, tp->rxq_cnt); ++ } else { ++ int limit; ++ ++ /* Validate size and indices */ ++ if (indir->size != TG3_RSS_INDIR_TBL_SIZE) ++ return -EINVAL; ++ ++ if (netif_running(dev)) ++ limit = tp->irq_cnt; ++ else { ++ limit = num_online_cpus(); ++ if (limit > TG3_IRQ_MAX_VECS_RSS) ++ limit = TG3_IRQ_MAX_VECS_RSS; ++ } ++ ++ /* The first interrupt vector only ++ * handles link interrupts. ++ */ ++ limit -= 1; ++ ++ /* Check the indices in the table. ++ * Leave the existing table unmodified ++ * if an error is detected. ++ */ ++ for (i = 0; i < TG3_RSS_INDIR_TBL_SIZE; i++) ++ if (indir->ring_index[i] >= limit) ++ return -EINVAL; ++ ++ tg3_flag_set(tp, USER_INDIR_TBL); ++ ++ for (i = 0; i < TG3_RSS_INDIR_TBL_SIZE; i++) ++ tp->rss_ind_tbl[i] = indir->ring_index[i]; ++ } ++ ++ if (!netif_running(dev) || !tg3_flag(tp, ENABLE_RSS)) ++ return 0; ++ ++ /* It is legal to write the indirection ++ * table while the device is running. ++ */ ++ tg3_full_lock(tp, 0); ++ tg3_rss_write_indir_tbl(tp); ++ tg3_full_unlock(tp); ++ ++ return 0; ++} ++#endif /* !BCM_HAS_GET_RXFH_INDIR_SIZE */ ++#endif /* BCM_HAS_GET_RXFH_INDIR */ ++ ++#ifdef __VMKLNX__ ++ ++/** ++ * skb_copy_expand - copy and expand sk_buff ++ * @skb: buffer to copy ++ * @newheadroom: new free bytes at head ++ * @newtailroom: new free bytes at tail ++ * @gfp_mask: allocation priority ++ * ++ * Make a copy of both an &sk_buff and its data and while doing so ++ * allocate additional space. ++ * ++ * This is used when the caller wishes to modify the data and needs a ++ * private copy of the data to alter as well as more space for new fields. ++ * Returns %NULL on failure or the pointer to the buffer ++ * on success. The returned buffer has a reference count of 1. ++ * ++ * You must pass %GFP_ATOMIC as the allocation priority if this function ++ * is called from an interrupt. ++ */ ++struct sk_buff *skb_copy_expand(const struct sk_buff *skb, ++ int newheadroom, int newtailroom, ++ gfp_t gfp_mask) ++{ ++ int rc; ++ struct sk_buff *new_skb = skb_copy((struct sk_buff *) skb, gfp_mask); ++ ++ if(new_skb == NULL) ++ return NULL; ++ ++ rc = pskb_expand_head(new_skb, newheadroom, newtailroom, gfp_mask); ++ ++ if(rc != 0) ++ return NULL; ++ ++ return new_skb; ++} ++ ++void *memmove(void *dest, const void *src, size_t count) ++{ ++ if (dest < src) { ++ return memcpy(dest, src, count); ++ } else { ++ char *p = dest + count; ++ const char *s = src + count; ++ while (count--) ++ *--p = *--s; ++ } ++ return dest; ++} ++#endif +diff --git a/drivers/net/ethernet/broadcom/tg3/tg3_firmware.h b/drivers/net/ethernet/broadcom/tg3/tg3_firmware.h +new file mode 100644 +index 0000000..a5a4928 +--- /dev/null ++++ b/drivers/net/ethernet/broadcom/tg3/tg3_firmware.h +@@ -0,0 +1,1012 @@ ++/* Copyright (C) 2009-2015 Broadcom Corporation. */ ++ ++#ifdef NETIF_F_TSO ++#define TG3_TSO_SUPPORT 1 ++#else ++#define TG3_TSO_SUPPORT 0 ++#endif ++ ++#ifndef BCM_HAS_REQUEST_FIRMWARE ++ ++struct tg3_firmware { ++ size_t size; ++ const u8 *data; ++}; ++ ++struct tg3_firmware_hdr { ++ u32 version; /* unused for fragments */ ++ u32 base_addr; ++ u32 len; ++}; ++#define TG3_FW_HDR_LEN (sizeof(struct tg3_firmware_hdr)) ++ ++#ifndef MODULE_FIRMWARE ++#define MODULE_FIRMWARE(x) ++#endif ++ ++#define TG3_FW_RELEASE_MAJOR 0x0 ++#define TG3_FW_RELASE_MINOR 0x0 ++#define TG3_FW_RELEASE_FIX 0x0 ++#define TG3_FW_START_ADDR 0x08000000 ++#define TG3_FW_TEXT_ADDR 0x08000000 ++#define TG3_FW_TEXT_LEN 0x9c0 ++#define TG3_FW_RODATA_ADDR 0x080009c0 ++#define TG3_FW_RODATA_LEN 0x60 ++#define TG3_FW_DATA_ADDR 0x08000a40 ++#define TG3_FW_DATA_LEN 0x20 ++#define TG3_FW_SBSS_ADDR 0x08000a60 ++#define TG3_FW_SBSS_LEN 0xc ++#define TG3_FW_BSS_ADDR 0x08000a70 ++#define TG3_FW_BSS_LEN 0x10 ++ ++#define TG3_5701_RLS_FW_LEN (TG3_FW_TEXT_LEN + TG3_FW_RODATA_LEN) ++ ++static const u32 tg3FwText[] = { ++0x00000000, (u32)TG3_FW_TEXT_ADDR, (u32)TG3_5701_RLS_FW_LEN, ++0x00000000, 0x10000003, 0x00000000, 0x0000000d, ++0x0000000d, 0x3c1d0800, 0x37bd3ffc, 0x03a0f021, ++0x3c100800, 0x26100000, 0x0e000018, 0x00000000, ++0x0000000d, 0x3c1d0800, 0x37bd3ffc, 0x03a0f021, ++0x3c100800, 0x26100034, 0x0e00021c, 0x00000000, ++0x0000000d, 0x00000000, 0x00000000, 0x00000000, ++0x27bdffe0, 0x3c1cc000, 0xafbf0018, 0xaf80680c, ++0x0e00004c, 0x241b2105, 0x97850000, 0x97870002, ++0x9782002c, 0x9783002e, 0x3c040800, 0x248409c0, ++0xafa00014, 0x00021400, 0x00621825, 0x00052c00, ++0xafa30010, 0x8f860010, 0x00e52825, 0x0e000060, ++0x24070102, 0x3c02ac00, 0x34420100, 0x3c03ac01, ++0x34630100, 0xaf820490, 0x3c02ffff, 0xaf820494, ++0xaf830498, 0xaf82049c, 0x24020001, 0xaf825ce0, ++0x0e00003f, 0xaf825d00, 0x0e000140, 0x00000000, ++0x8fbf0018, 0x03e00008, 0x27bd0020, 0x2402ffff, ++0xaf825404, 0x8f835400, 0x34630400, 0xaf835400, ++0xaf825404, 0x3c020800, 0x24420034, 0xaf82541c, ++0x03e00008, 0xaf805400, 0x00000000, 0x00000000, ++0x3c020800, 0x34423000, 0x3c030800, 0x34633000, ++0x3c040800, 0x348437ff, 0x3c010800, 0xac220a64, ++0x24020040, 0x3c010800, 0xac220a68, 0x3c010800, ++0xac200a60, 0xac600000, 0x24630004, 0x0083102b, ++0x5040fffd, 0xac600000, 0x03e00008, 0x00000000, ++0x00804821, 0x8faa0010, 0x3c020800, 0x8c420a60, ++0x3c040800, 0x8c840a68, 0x8fab0014, 0x24430001, ++0x0044102b, 0x3c010800, 0xac230a60, 0x14400003, ++0x00004021, 0x3c010800, 0xac200a60, 0x3c020800, ++0x8c420a60, 0x3c030800, 0x8c630a64, 0x91240000, ++0x00021140, 0x00431021, 0x00481021, 0x25080001, ++0xa0440000, 0x29020008, 0x1440fff4, 0x25290001, ++0x3c020800, 0x8c420a60, 0x3c030800, 0x8c630a64, ++0x8f84680c, 0x00021140, 0x00431021, 0xac440008, ++0xac45000c, 0xac460010, 0xac470014, 0xac4a0018, ++0x03e00008, 0xac4b001c, 0x00000000, 0x00000000, ++0x00000000, 0x00000000, 0x00000000, 0x00000000, ++0x00000000, 0x00000000, 0x00000000, 0x00000000, ++0x00000000, 0x00000000, 0x00000000, 0x00000000, ++0x00000000, 0x00000000, 0x00000000, 0x00000000, ++0x00000000, 0x00000000, 0x00000000, 0x00000000, ++0x00000000, 0x00000000, 0x00000000, 0x00000000, ++0x00000000, 0x00000000, 0x00000000, 0x00000000, ++0x00000000, 0x00000000, 0x00000000, 0x00000000, ++0x00000000, 0x00000000, 0x00000000, 0x00000000, ++0x00000000, 0x00000000, 0x00000000, 0x00000000, ++0x00000000, 0x00000000, 0x00000000, 0x00000000, ++0x00000000, 0x00000000, 0x00000000, 0x00000000, ++0x00000000, 0x00000000, 0x00000000, 0x00000000, ++0x02000008, 0x00000000, 0x0a0001e3, 0x3c0a0001, ++0x0a0001e3, 0x3c0a0002, 0x0a0001e3, 0x00000000, ++0x0a0001e3, 0x00000000, 0x0a0001e3, 0x00000000, ++0x0a0001e3, 0x00000000, 0x0a0001e3, 0x00000000, ++0x0a0001e3, 0x00000000, 0x0a0001e3, 0x00000000, ++0x0a0001e3, 0x00000000, 0x0a0001e3, 0x00000000, ++0x0a0001e3, 0x3c0a0007, 0x0a0001e3, 0x3c0a0008, ++0x0a0001e3, 0x3c0a0009, 0x0a0001e3, 0x00000000, ++0x0a0001e3, 0x00000000, 0x0a0001e3, 0x3c0a000b, ++0x0a0001e3, 0x3c0a000c, 0x0a0001e3, 0x3c0a000d, ++0x0a0001e3, 0x00000000, 0x0a0001e3, 0x00000000, ++0x0a0001e3, 0x3c0a000e, 0x0a0001e3, 0x00000000, ++0x0a0001e3, 0x00000000, 0x0a0001e3, 0x00000000, ++0x0a0001e3, 0x00000000, 0x0a0001e3, 0x00000000, ++0x0a0001e3, 0x00000000, 0x0a0001e3, 0x00000000, ++0x0a0001e3, 0x00000000, 0x0a0001e3, 0x3c0a0013, ++0x0a0001e3, 0x3c0a0014, 0x00000000, 0x00000000, ++0x00000000, 0x00000000, 0x00000000, 0x00000000, ++0x00000000, 0x00000000, 0x00000000, 0x00000000, ++0x00000000, 0x00000000, 0x00000000, 0x00000000, ++0x00000000, 0x00000000, 0x00000000, 0x00000000, ++0x00000000, 0x00000000, 0x00000000, 0x00000000, ++0x00000000, 0x00000000, 0x00000000, 0x00000000, ++0x00000000, 0x00000000, 0x00000000, 0x00000000, ++0x00000000, 0x00000000, 0x00000000, 0x00000000, ++0x00000000, 0x00000000, 0x00000000, 0x00000000, ++0x00000000, 0x00000000, 0x00000000, 0x00000000, ++0x00000000, 0x00000000, 0x00000000, 0x00000000, ++0x00000000, 0x00000000, 0x00000000, 0x00000000, ++0x00000000, 0x00000000, 0x00000000, 0x00000000, ++0x00000000, 0x00000000, 0x00000000, 0x00000000, ++0x00000000, 0x00000000, 0x00000000, 0x00000000, ++0x27bdffe0, 0x00001821, 0x00001021, 0xafbf0018, ++0xafb10014, 0xafb00010, 0x3c010800, 0x00220821, ++0xac200a70, 0x3c010800, 0x00220821, 0xac200a74, ++0x3c010800, 0x00220821, 0xac200a78, 0x24630001, ++0x1860fff5, 0x2442000c, 0x24110001, 0x8f906810, ++0x32020004, 0x14400005, 0x24040001, 0x3c020800, ++0x8c420a78, 0x18400003, 0x00002021, 0x0e000182, ++0x00000000, 0x32020001, 0x10400003, 0x00000000, ++0x0e000169, 0x00000000, 0x0a000153, 0xaf915028, ++0x8fbf0018, 0x8fb10014, 0x8fb00010, 0x03e00008, ++0x27bd0020, 0x3c050800, 0x8ca50a70, 0x3c060800, ++0x8cc60a80, 0x3c070800, 0x8ce70a78, 0x27bdffe0, ++0x3c040800, 0x248409d0, 0xafbf0018, 0xafa00010, ++0x0e000060, 0xafa00014, 0x0e00017b, 0x00002021, ++0x8fbf0018, 0x03e00008, 0x27bd0020, 0x24020001, ++0x8f836810, 0x00821004, 0x00021027, 0x00621824, ++0x03e00008, 0xaf836810, 0x27bdffd8, 0xafbf0024, ++0x1080002e, 0xafb00020, 0x8f825cec, 0xafa20018, ++0x8f825cec, 0x3c100800, 0x26100a78, 0xafa2001c, ++0x34028000, 0xaf825cec, 0x8e020000, 0x18400016, ++0x00000000, 0x3c020800, 0x94420a74, 0x8fa3001c, ++0x000221c0, 0xac830004, 0x8fa2001c, 0x3c010800, ++0x0e000201, 0xac220a74, 0x10400005, 0x00000000, ++0x8e020000, 0x24420001, 0x0a0001df, 0xae020000, ++0x3c020800, 0x8c420a70, 0x00021c02, 0x000321c0, ++0x0a0001c5, 0xafa2001c, 0x0e000201, 0x00000000, ++0x1040001f, 0x00000000, 0x8e020000, 0x8fa3001c, ++0x24420001, 0x3c010800, 0xac230a70, 0x3c010800, ++0xac230a74, 0x0a0001df, 0xae020000, 0x3c100800, ++0x26100a78, 0x8e020000, 0x18400028, 0x00000000, ++0x0e000201, 0x00000000, 0x14400024, 0x00000000, ++0x8e020000, 0x3c030800, 0x8c630a70, 0x2442ffff, ++0xafa3001c, 0x18400006, 0xae020000, 0x00031402, ++0x000221c0, 0x8c820004, 0x3c010800, 0xac220a70, ++0x97a2001e, 0x2442ff00, 0x2c420300, 0x1440000b, ++0x24024000, 0x3c040800, 0x248409dc, 0xafa00010, ++0xafa00014, 0x8fa6001c, 0x24050008, 0x0e000060, ++0x00003821, 0x0a0001df, 0x00000000, 0xaf825cf8, ++0x3c020800, 0x8c420a40, 0x8fa3001c, 0x24420001, ++0xaf835cf8, 0x3c010800, 0xac220a40, 0x8fbf0024, ++0x8fb00020, 0x03e00008, 0x27bd0028, 0x27bdffe0, ++0x3c040800, 0x248409e8, 0x00002821, 0x00003021, ++0x00003821, 0xafbf0018, 0xafa00010, 0x0e000060, ++0xafa00014, 0x8fbf0018, 0x03e00008, 0x27bd0020, ++0x8f82680c, 0x8f85680c, 0x00021827, 0x0003182b, ++0x00031823, 0x00431024, 0x00441021, 0x00a2282b, ++0x10a00006, 0x00000000, 0x00401821, 0x8f82680c, ++0x0043102b, 0x1440fffd, 0x00000000, 0x03e00008, ++0x00000000, 0x3c040800, 0x8c840000, 0x3c030800, ++0x8c630a40, 0x0064102b, 0x54400002, 0x00831023, ++0x00641023, 0x2c420008, 0x03e00008, 0x38420001, ++0x27bdffe0, 0x00802821, 0x3c040800, 0x24840a00, ++0x00003021, 0x00003821, 0xafbf0018, 0xafa00010, ++0x0e000060, 0xafa00014, 0x0a000216, 0x00000000, ++0x8fbf0018, 0x03e00008, 0x27bd0020, 0x00000000, ++0x27bdffe0, 0x3c1cc000, 0xafbf0018, 0x0e00004c, ++0xaf80680c, 0x3c040800, 0x24840a10, 0x03802821, ++0x00003021, 0x00003821, 0xafa00010, 0x0e000060, ++0xafa00014, 0x2402ffff, 0xaf825404, 0x3c0200aa, ++0x0e000234, 0xaf825434, 0x8fbf0018, 0x03e00008, ++0x27bd0020, 0x00000000, 0x00000000, 0x00000000, ++0x27bdffe8, 0xafb00010, 0x24100001, 0xafbf0014, ++0x3c01c003, 0xac200000, 0x8f826810, 0x30422000, ++0x10400003, 0x00000000, 0x0e000246, 0x00000000, ++0x0a00023a, 0xaf905428, 0x8fbf0014, 0x8fb00010, ++0x03e00008, 0x27bd0018, 0x27bdfff8, 0x8f845d0c, ++0x3c0200ff, 0x3c030800, 0x8c630a50, 0x3442fff8, ++0x00821024, 0x1043001e, 0x3c0500ff, 0x34a5fff8, ++0x3c06c003, 0x3c074000, 0x00851824, 0x8c620010, ++0x3c010800, 0xac230a50, 0x30420008, 0x10400005, ++0x00871025, 0x8cc20000, 0x24420001, 0xacc20000, ++0x00871025, 0xaf825d0c, 0x8fa20000, 0x24420001, ++0xafa20000, 0x8fa20000, 0x8fa20000, 0x24420001, ++0xafa20000, 0x8fa20000, 0x8f845d0c, 0x3c030800, ++0x8c630a50, 0x00851024, 0x1443ffe8, 0x00851824, ++0x27bd0008, 0x03e00008, 0x00000000, 0x00000000, ++0x35373031, 0x726c7341, 0x00000000, 0x00000000, ++0x53774576, 0x656e7430, 0x00000000, 0x726c7045, ++0x76656e74, 0x31000000, 0x556e6b6e, 0x45766e74, ++0x00000000, 0x00000000, 0x00000000, 0x00000000, ++0x66617461, 0x6c457272, 0x00000000, 0x00000000, ++0x4d61696e, 0x43707542, 0x00000000, 0x00000000, ++}; ++ ++static const struct tg3_firmware tg3_5701_fw = { ++ .size = TG3_5701_RLS_FW_LEN, ++ .data = (u8 *)&tg3FwText[0], ++}; ++ ++#define TG3_57766_FW_BASE_ADDR 0x00030000 ++#define TG3_57766_FW_HANDSHAKE 0x0003fccc ++#define TG3_57766_FW_TEXT_ADDR 0x00030000 ++#define TG3_57766_FW_TEXT_LEN (0x58 + TG3_FW_HDR_LEN) ++#define TG3_57766_FW_PRIV1_ADDR 0x0003fd00 ++#define TG3_57766_FW_PRIV1_SIZE (0x4 + TG3_FW_HDR_LEN) ++#define TG3_57766_FW_PRIV2_ADDR 0x0003fccc ++#define TG3_57766_FW_PRIV2_SIZE (0x4 + TG3_FW_HDR_LEN) ++#define TG3_57766_FW_RESERVED 0xdecafbad ++ ++static const u32 tg3_57766_fwdata[] = { ++0x00000000, TG3_57766_FW_BASE_ADDR, 0xffffffff, ++TG3_57766_FW_RESERVED, TG3_57766_FW_TEXT_ADDR, TG3_57766_FW_TEXT_LEN, ++0x27800001, 0xf7f0403e, 0xcd283674, 0x11001100, ++0xf7ff1064, 0x376e0001, 0x27600000, 0xf7f07fea, ++0xf7f00004, 0xf7f00018, 0xcc10362c, 0x00180018, ++0x17800000, 0xf7f00008, 0xc33836b0, 0xf7f00004, ++0xc43836b0, 0xc62036bc, 0x00000009, 0xcb3836b0, ++0x17800001, 0x1760000a, ++TG3_57766_FW_RESERVED, TG3_57766_FW_PRIV1_ADDR, TG3_57766_FW_PRIV1_SIZE, ++0xd044d816, ++TG3_57766_FW_RESERVED, TG3_57766_FW_PRIV2_ADDR, TG3_57766_FW_PRIV2_SIZE, ++0x02300202, ++}; ++ ++static const struct tg3_firmware tg3_57766_fw = { ++ .size = sizeof(tg3_57766_fwdata), ++ .data = (u8 *)&tg3_57766_fwdata[0], ++}; ++ ++#if TG3_TSO_SUPPORT != 0 ++ ++#define TG3_TSO_FW_RELEASE_MAJOR 0x1 ++#define TG3_TSO_FW_RELASE_MINOR 0x6 ++#define TG3_TSO_FW_RELEASE_FIX 0x0 ++#define TG3_TSO_FW_START_ADDR 0x08000000 ++#define TG3_TSO_FW_TEXT_ADDR 0x08000000 ++#define TG3_TSO_FW_TEXT_LEN 0x1aa0 ++#define TG3_TSO_FW_RODATA_ADDR 0x08001aa0 ++#define TG3_TSO_FW_RODATA_LEN 0x60 ++#define TG3_TSO_FW_DATA_ADDR 0x08001b20 ++#define TG3_TSO_FW_DATA_LEN 0x30 ++#define TG3_TSO_FW_SBSS_ADDR 0x08001b50 ++#define TG3_TSO_FW_SBSS_LEN 0x2c ++#define TG3_TSO_FW_BSS_ADDR 0x08001b80 ++#define TG3_TSO_FW_BSS_LEN 0x894 ++ ++#define TG3_LGCY_TSO_FW_LEN \ ++ (TG3_TSO_FW_TEXT_LEN + \ ++ TG3_TSO_FW_RODATA_LEN + \ ++ 0x20 + \ ++ TG3_TSO_FW_DATA_LEN) ++ ++static const u32 tg3TsoFwText[] = { ++0x00010600, (u32)TG3_TSO_FW_TEXT_ADDR, (u32)TG3_LGCY_TSO_FW_LEN, ++0x0e000003, 0x00000000, 0x08001b24, 0x00000000, ++0x10000003, 0x00000000, 0x0000000d, 0x0000000d, ++0x3c1d0800, 0x37bd4000, 0x03a0f021, 0x3c100800, ++0x26100000, 0x0e000010, 0x00000000, 0x0000000d, ++0x27bdffe0, 0x3c04fefe, 0xafbf0018, 0x0e0005d8, ++0x34840002, 0x0e000668, 0x00000000, 0x3c030800, ++0x90631b68, 0x24020002, 0x3c040800, 0x24841aac, ++0x14620003, 0x24050001, 0x3c040800, 0x24841aa0, ++0x24060006, 0x00003821, 0xafa00010, 0x0e00067c, ++0xafa00014, 0x8f625c50, 0x34420001, 0xaf625c50, ++0x8f625c90, 0x34420001, 0xaf625c90, 0x2402ffff, ++0x0e000034, 0xaf625404, 0x8fbf0018, 0x03e00008, ++0x27bd0020, 0x00000000, 0x00000000, 0x00000000, ++0x27bdffe0, 0xafbf001c, 0xafb20018, 0xafb10014, ++0x0e00005b, 0xafb00010, 0x24120002, 0x24110001, ++0x8f706820, 0x32020100, 0x10400003, 0x00000000, ++0x0e0000bb, 0x00000000, 0x8f706820, 0x32022000, ++0x10400004, 0x32020001, 0x0e0001f0, 0x24040001, ++0x32020001, 0x10400003, 0x00000000, 0x0e0000a3, ++0x00000000, 0x3c020800, 0x90421b98, 0x14520003, ++0x00000000, 0x0e0004c0, 0x00000000, 0x0a00003c, ++0xaf715028, 0x8fbf001c, 0x8fb20018, 0x8fb10014, ++0x8fb00010, 0x03e00008, 0x27bd0020, 0x27bdffe0, ++0x3c040800, 0x24841ac0, 0x00002821, 0x00003021, ++0x00003821, 0xafbf0018, 0xafa00010, 0x0e00067c, ++0xafa00014, 0x3c040800, 0x248423d8, 0xa4800000, ++0x3c010800, 0xa0201b98, 0x3c010800, 0xac201b9c, ++0x3c010800, 0xac201ba0, 0x3c010800, 0xac201ba4, ++0x3c010800, 0xac201bac, 0x3c010800, 0xac201bb8, ++0x3c010800, 0xac201bbc, 0x8f624434, 0x3c010800, ++0xac221b88, 0x8f624438, 0x3c010800, 0xac221b8c, ++0x8f624410, 0xac80f7a8, 0x3c010800, 0xac201b84, ++0x3c010800, 0xac2023e0, 0x3c010800, 0xac2023c8, ++0x3c010800, 0xac2023cc, 0x3c010800, 0xac202400, ++0x3c010800, 0xac221b90, 0x8f620068, 0x24030007, ++0x00021702, 0x10430005, 0x00000000, 0x8f620068, ++0x00021702, 0x14400004, 0x24020001, 0x3c010800, ++0x0a000097, 0xac20240c, 0xac820034, 0x3c040800, ++0x24841acc, 0x3c050800, 0x8ca5240c, 0x00003021, ++0x00003821, 0xafa00010, 0x0e00067c, 0xafa00014, ++0x8fbf0018, 0x03e00008, 0x27bd0020, 0x27bdffe0, ++0x3c040800, 0x24841ad8, 0x00002821, 0x00003021, ++0x00003821, 0xafbf0018, 0xafa00010, 0x0e00067c, ++0xafa00014, 0x0e00005b, 0x00000000, 0x0e0000b4, ++0x00002021, 0x8fbf0018, 0x03e00008, 0x27bd0020, ++0x24020001, 0x8f636820, 0x00821004, 0x00021027, ++0x00621824, 0x03e00008, 0xaf636820, 0x27bdffd0, ++0xafbf002c, 0xafb60028, 0xafb50024, 0xafb40020, ++0xafb3001c, 0xafb20018, 0xafb10014, 0xafb00010, ++0x8f675c5c, 0x3c030800, 0x24631bbc, 0x8c620000, ++0x14470005, 0x3c0200ff, 0x3c020800, 0x90421b98, ++0x14400119, 0x3c0200ff, 0x3442fff8, 0x00e28824, ++0xac670000, 0x00111902, 0x306300ff, 0x30e20003, ++0x000211c0, 0x00622825, 0x00a04021, 0x00071602, ++0x3c030800, 0x90631b98, 0x3044000f, 0x14600036, ++0x00804821, 0x24020001, 0x3c010800, 0xa0221b98, ++0x00051100, 0x00821025, 0x3c010800, 0xac201b9c, ++0x3c010800, 0xac201ba0, 0x3c010800, 0xac201ba4, ++0x3c010800, 0xac201bac, 0x3c010800, 0xac201bb8, ++0x3c010800, 0xac201bb0, 0x3c010800, 0xac201bb4, ++0x3c010800, 0xa42223d8, 0x9622000c, 0x30437fff, ++0x3c010800, 0xa4222410, 0x30428000, 0x3c010800, ++0xa4231bc6, 0x10400005, 0x24020001, 0x3c010800, ++0xac2223f4, 0x0a000102, 0x2406003e, 0x24060036, ++0x3c010800, 0xac2023f4, 0x9622000a, 0x3c030800, ++0x94631bc6, 0x3c010800, 0xac2023f0, 0x3c010800, ++0xac2023f8, 0x00021302, 0x00021080, 0x00c21021, ++0x00621821, 0x3c010800, 0xa42223d0, 0x3c010800, ++0x0a000115, 0xa4231b96, 0x9622000c, 0x3c010800, ++0xa42223ec, 0x3c040800, 0x24841b9c, 0x8c820000, ++0x00021100, 0x3c010800, 0x00220821, 0xac311bc8, ++0x8c820000, 0x00021100, 0x3c010800, 0x00220821, ++0xac271bcc, 0x8c820000, 0x25030001, 0x306601ff, ++0x00021100, 0x3c010800, 0x00220821, 0xac261bd0, ++0x8c820000, 0x00021100, 0x3c010800, 0x00220821, ++0xac291bd4, 0x96230008, 0x3c020800, 0x8c421bac, ++0x00432821, 0x3c010800, 0xac251bac, 0x9622000a, ++0x30420004, 0x14400018, 0x00061100, 0x8f630c14, ++0x3063000f, 0x2c620002, 0x1440000b, 0x3c02c000, ++0x8f630c14, 0x3c020800, 0x8c421b40, 0x3063000f, ++0x24420001, 0x3c010800, 0xac221b40, 0x2c620002, ++0x1040fff7, 0x3c02c000, 0x00e21825, 0xaf635c5c, ++0x8f625c50, 0x30420002, 0x10400014, 0x00000000, ++0x0a000147, 0x00000000, 0x3c030800, 0x8c631b80, ++0x3c040800, 0x94841b94, 0x01221025, 0x3c010800, ++0xa42223da, 0x24020001, 0x3c010800, 0xac221bb8, ++0x24630001, 0x0085202a, 0x3c010800, 0x10800003, ++0xac231b80, 0x3c010800, 0xa4251b94, 0x3c060800, ++0x24c61b9c, 0x8cc20000, 0x24420001, 0xacc20000, ++0x28420080, 0x14400005, 0x00000000, 0x0e000656, ++0x24040002, 0x0a0001e6, 0x00000000, 0x3c020800, ++0x8c421bb8, 0x10400078, 0x24020001, 0x3c050800, ++0x90a51b98, 0x14a20072, 0x00000000, 0x3c150800, ++0x96b51b96, 0x3c040800, 0x8c841bac, 0x32a3ffff, ++0x0083102a, 0x1440006c, 0x00000000, 0x14830003, ++0x00000000, 0x3c010800, 0xac2523f0, 0x1060005c, ++0x00009021, 0x24d60004, 0x0060a021, 0x24d30014, ++0x8ec20000, 0x00028100, 0x3c110800, 0x02308821, ++0x0e000625, 0x8e311bc8, 0x00402821, 0x10a00054, ++0x00000000, 0x9628000a, 0x31020040, 0x10400005, ++0x2407180c, 0x8e22000c, 0x2407188c, 0x00021400, ++0xaca20018, 0x3c030800, 0x00701821, 0x8c631bd0, ++0x3c020800, 0x00501021, 0x8c421bd4, 0x00031d00, ++0x00021400, 0x00621825, 0xaca30014, 0x8ec30004, ++0x96220008, 0x00432023, 0x3242ffff, 0x3083ffff, ++0x00431021, 0x0282102a, 0x14400002, 0x02b23023, ++0x00803021, 0x8e620000, 0x30c4ffff, 0x00441021, ++0xae620000, 0x8e220000, 0xaca20000, 0x8e220004, ++0x8e63fff4, 0x00431021, 0xaca20004, 0xa4a6000e, ++0x8e62fff4, 0x00441021, 0xae62fff4, 0x96230008, ++0x0043102a, 0x14400005, 0x02469021, 0x8e62fff0, ++0xae60fff4, 0x24420001, 0xae62fff0, 0xaca00008, ++0x3242ffff, 0x14540008, 0x24020305, 0x31020080, ++0x54400001, 0x34e70010, 0x24020905, 0xa4a2000c, ++0x0a0001cb, 0x34e70020, 0xa4a2000c, 0x3c020800, ++0x8c4223f0, 0x10400003, 0x3c024b65, 0x0a0001d3, ++0x34427654, 0x3c02b49a, 0x344289ab, 0xaca2001c, ++0x30e2ffff, 0xaca20010, 0x0e0005a2, 0x00a02021, ++0x3242ffff, 0x0054102b, 0x1440ffa9, 0x00000000, ++0x24020002, 0x3c010800, 0x0a0001e6, 0xa0221b98, ++0x8ec2083c, 0x24420001, 0x0a0001e6, 0xaec2083c, ++0x0e0004c0, 0x00000000, 0x8fbf002c, 0x8fb60028, ++0x8fb50024, 0x8fb40020, 0x8fb3001c, 0x8fb20018, ++0x8fb10014, 0x8fb00010, 0x03e00008, 0x27bd0030, ++0x27bdffd0, 0xafbf0028, 0xafb30024, 0xafb20020, ++0xafb1001c, 0xafb00018, 0x8f725c9c, 0x3c0200ff, ++0x3442fff8, 0x3c070800, 0x24e71bb4, 0x02428824, ++0x9623000e, 0x8ce20000, 0x00431021, 0xace20000, ++0x8e220010, 0x30420020, 0x14400011, 0x00809821, ++0x0e00063b, 0x02202021, 0x3c02c000, 0x02421825, ++0xaf635c9c, 0x8f625c90, 0x30420002, 0x1040011e, ++0x00000000, 0xaf635c9c, 0x8f625c90, 0x30420002, ++0x10400119, 0x00000000, 0x0a00020d, 0x00000000, ++0x8e240008, 0x8e230014, 0x00041402, 0x000231c0, ++0x00031502, 0x304201ff, 0x2442ffff, 0x3042007f, ++0x00031942, 0x30637800, 0x00021100, 0x24424000, ++0x00624821, 0x9522000a, 0x3084ffff, 0x30420008, ++0x104000b0, 0x000429c0, 0x3c020800, 0x8c422400, ++0x14400024, 0x24c50008, 0x94c20014, 0x3c010800, ++0xa42223d0, 0x8cc40010, 0x00041402, 0x3c010800, ++0xa42223d2, 0x3c010800, 0xa42423d4, 0x94c2000e, ++0x3083ffff, 0x00431023, 0x3c010800, 0xac222408, ++0x94c2001a, 0x3c010800, 0xac262400, 0x3c010800, ++0xac322404, 0x3c010800, 0xac2223fc, 0x3c02c000, ++0x02421825, 0xaf635c9c, 0x8f625c90, 0x30420002, ++0x104000e5, 0x00000000, 0xaf635c9c, 0x8f625c90, ++0x30420002, 0x104000e0, 0x00000000, 0x0a000246, ++0x00000000, 0x94c2000e, 0x3c030800, 0x946323d4, ++0x00434023, 0x3103ffff, 0x2c620008, 0x1040001c, ++0x00000000, 0x94c20014, 0x24420028, 0x00a22821, ++0x00031042, 0x1840000b, 0x00002021, 0x24e60848, ++0x00403821, 0x94a30000, 0x8cc20000, 0x24840001, ++0x00431021, 0xacc20000, 0x0087102a, 0x1440fff9, ++0x24a50002, 0x31020001, 0x1040001f, 0x3c024000, ++0x3c040800, 0x248423fc, 0xa0a00001, 0x94a30000, ++0x8c820000, 0x00431021, 0x0a000285, 0xac820000, ++0x8f626800, 0x3c030010, 0x00431024, 0x10400009, ++0x00000000, 0x94c2001a, 0x3c030800, 0x8c6323fc, ++0x00431021, 0x3c010800, 0xac2223fc, 0x0a000286, ++0x3c024000, 0x94c2001a, 0x94c4001c, 0x3c030800, ++0x8c6323fc, 0x00441023, 0x00621821, 0x3c010800, ++0xac2323fc, 0x3c024000, 0x02421825, 0xaf635c9c, ++0x8f625c90, 0x30420002, 0x1440fffc, 0x00000000, ++0x9522000a, 0x30420010, 0x1040009b, 0x00000000, ++0x3c030800, 0x946323d4, 0x3c070800, 0x24e72400, ++0x8ce40000, 0x8f626800, 0x24630030, 0x00832821, ++0x3c030010, 0x00431024, 0x1440000a, 0x00000000, ++0x94a20004, 0x3c040800, 0x8c842408, 0x3c030800, ++0x8c6323fc, 0x00441023, 0x00621821, 0x3c010800, ++0xac2323fc, 0x3c040800, 0x8c8423fc, 0x00041c02, ++0x3082ffff, 0x00622021, 0x00041402, 0x00822021, ++0x00041027, 0xa4a20006, 0x3c030800, 0x8c632404, ++0x3c0200ff, 0x3442fff8, 0x00628824, 0x96220008, ++0x24050001, 0x24034000, 0x000231c0, 0x00801021, ++0xa4c2001a, 0xa4c0001c, 0xace00000, 0x3c010800, ++0xac251b60, 0xaf635cb8, 0x8f625cb0, 0x30420002, ++0x10400003, 0x00000000, 0x3c010800, 0xac201b60, ++0x8e220008, 0xaf625cb8, 0x8f625cb0, 0x30420002, ++0x10400003, 0x00000000, 0x3c010800, 0xac201b60, ++0x3c020800, 0x8c421b60, 0x1040ffec, 0x00000000, ++0x3c040800, 0x0e00063b, 0x8c842404, 0x0a00032a, ++0x00000000, 0x3c030800, 0x90631b98, 0x24020002, ++0x14620003, 0x3c034b65, 0x0a0002e1, 0x00008021, ++0x8e22001c, 0x34637654, 0x10430002, 0x24100002, ++0x24100001, 0x00c02021, 0x0e000350, 0x02003021, ++0x24020003, 0x3c010800, 0xa0221b98, 0x24020002, ++0x1202000a, 0x24020001, 0x3c030800, 0x8c6323f0, ++0x10620006, 0x00000000, 0x3c020800, 0x944223d8, ++0x00021400, 0x0a00031f, 0xae220014, 0x3c040800, ++0x248423da, 0x94820000, 0x00021400, 0xae220014, ++0x3c020800, 0x8c421bbc, 0x3c03c000, 0x3c010800, ++0xa0201b98, 0x00431025, 0xaf625c5c, 0x8f625c50, ++0x30420002, 0x10400009, 0x00000000, 0x2484f7e2, ++0x8c820000, 0x00431025, 0xaf625c5c, 0x8f625c50, ++0x30420002, 0x1440fffa, 0x00000000, 0x3c020800, ++0x24421b84, 0x8c430000, 0x24630001, 0xac430000, ++0x8f630c14, 0x3063000f, 0x2c620002, 0x1440000c, ++0x3c024000, 0x8f630c14, 0x3c020800, 0x8c421b40, ++0x3063000f, 0x24420001, 0x3c010800, 0xac221b40, ++0x2c620002, 0x1040fff7, 0x00000000, 0x3c024000, ++0x02421825, 0xaf635c9c, 0x8f625c90, 0x30420002, ++0x1440fffc, 0x00000000, 0x12600003, 0x00000000, ++0x0e0004c0, 0x00000000, 0x8fbf0028, 0x8fb30024, ++0x8fb20020, 0x8fb1001c, 0x8fb00018, 0x03e00008, ++0x27bd0030, 0x8f634450, 0x3c040800, 0x24841b88, ++0x8c820000, 0x00031c02, 0x0043102b, 0x14400007, ++0x3c038000, 0x8c840004, 0x8f624450, 0x00021c02, ++0x0083102b, 0x1040fffc, 0x3c038000, 0xaf634444, ++0x8f624444, 0x00431024, 0x1440fffd, 0x00000000, ++0x8f624448, 0x03e00008, 0x3042ffff, 0x3c024000, ++0x00822025, 0xaf645c38, 0x8f625c30, 0x30420002, ++0x1440fffc, 0x00000000, 0x03e00008, 0x00000000, ++0x27bdffe0, 0x00805821, 0x14c00011, 0x256e0008, ++0x3c020800, 0x8c4223f4, 0x10400007, 0x24020016, ++0x3c010800, 0xa42223d2, 0x2402002a, 0x3c010800, ++0x0a000364, 0xa42223d4, 0x8d670010, 0x00071402, ++0x3c010800, 0xa42223d2, 0x3c010800, 0xa42723d4, ++0x3c040800, 0x948423d4, 0x3c030800, 0x946323d2, ++0x95cf0006, 0x3c020800, 0x944223d0, 0x00832023, ++0x01e2c023, 0x3065ffff, 0x24a20028, 0x01c24821, ++0x3082ffff, 0x14c0001a, 0x01226021, 0x9582000c, ++0x3042003f, 0x3c010800, 0xa42223d6, 0x95820004, ++0x95830006, 0x3c010800, 0xac2023e4, 0x3c010800, ++0xac2023e8, 0x00021400, 0x00431025, 0x3c010800, ++0xac221bc0, 0x95220004, 0x3c010800, 0xa4221bc4, ++0x95230002, 0x01e51023, 0x0043102a, 0x10400010, ++0x24020001, 0x3c010800, 0x0a000398, 0xac2223f8, ++0x3c030800, 0x8c6323e8, 0x3c020800, 0x94421bc4, ++0x00431021, 0xa5220004, 0x3c020800, 0x94421bc0, ++0xa5820004, 0x3c020800, 0x8c421bc0, 0xa5820006, ++0x3c020800, 0x8c4223f0, 0x3c0d0800, 0x8dad23e4, ++0x3c0a0800, 0x144000e5, 0x8d4a23e8, 0x3c020800, ++0x94421bc4, 0x004a1821, 0x3063ffff, 0x0062182b, ++0x24020002, 0x10c2000d, 0x01435023, 0x3c020800, ++0x944223d6, 0x30420009, 0x10400008, 0x00000000, ++0x9582000c, 0x3042fff6, 0xa582000c, 0x3c020800, ++0x944223d6, 0x30420009, 0x01a26823, 0x3c020800, ++0x8c4223f8, 0x1040004a, 0x01203821, 0x3c020800, ++0x944223d2, 0x00004021, 0xa520000a, 0x01e21023, ++0xa5220002, 0x3082ffff, 0x00021042, 0x18400008, ++0x00003021, 0x00401821, 0x94e20000, 0x25080001, ++0x00c23021, 0x0103102a, 0x1440fffb, 0x24e70002, ++0x00061c02, 0x30c2ffff, 0x00623021, 0x00061402, ++0x00c23021, 0x00c02821, 0x00061027, 0xa522000a, ++0x00003021, 0x2527000c, 0x00004021, 0x94e20000, ++0x25080001, 0x00c23021, 0x2d020004, 0x1440fffb, ++0x24e70002, 0x95220002, 0x00004021, 0x91230009, ++0x00442023, 0x01803821, 0x3082ffff, 0xa4e00010, ++0x00621821, 0x00021042, 0x18400010, 0x00c33021, ++0x00404821, 0x94e20000, 0x24e70002, 0x00c23021, ++0x30e2007f, 0x14400006, 0x25080001, 0x8d630000, ++0x3c02007f, 0x3442ff80, 0x00625824, 0x25670008, ++0x0109102a, 0x1440fff3, 0x00000000, 0x30820001, ++0x10400005, 0x00061c02, 0xa0e00001, 0x94e20000, ++0x00c23021, 0x00061c02, 0x30c2ffff, 0x00623021, ++0x00061402, 0x00c23021, 0x0a00047d, 0x30c6ffff, ++0x24020002, 0x14c20081, 0x00000000, 0x3c020800, ++0x8c42240c, 0x14400007, 0x00000000, 0x3c020800, ++0x944223d2, 0x95230002, 0x01e21023, 0x10620077, ++0x00000000, 0x3c020800, 0x944223d2, 0x01e21023, ++0xa5220002, 0x3c020800, 0x8c42240c, 0x1040001a, ++0x31e3ffff, 0x8dc70010, 0x3c020800, 0x94421b96, ++0x00e04021, 0x00072c02, 0x00aa2021, 0x00431023, ++0x00823823, 0x00072402, 0x30e2ffff, 0x00823821, ++0x00071027, 0xa522000a, 0x3102ffff, 0x3c040800, ++0x948423d4, 0x00453023, 0x00e02821, 0x00641823, ++0x006d1821, 0x00c33021, 0x00061c02, 0x30c2ffff, ++0x0a00047d, 0x00623021, 0x01203821, 0x00004021, ++0x3082ffff, 0x00021042, 0x18400008, 0x00003021, ++0x00401821, 0x94e20000, 0x25080001, 0x00c23021, ++0x0103102a, 0x1440fffb, 0x24e70002, 0x00061c02, ++0x30c2ffff, 0x00623021, 0x00061402, 0x00c23021, ++0x00c02821, 0x00061027, 0xa522000a, 0x00003021, ++0x2527000c, 0x00004021, 0x94e20000, 0x25080001, ++0x00c23021, 0x2d020004, 0x1440fffb, 0x24e70002, ++0x95220002, 0x00004021, 0x91230009, 0x00442023, ++0x01803821, 0x3082ffff, 0xa4e00010, 0x3c040800, ++0x948423d4, 0x00621821, 0x00c33021, 0x00061c02, ++0x30c2ffff, 0x00623021, 0x00061c02, 0x3c020800, ++0x944223d0, 0x00c34821, 0x00441023, 0x00021fc2, ++0x00431021, 0x00021043, 0x18400010, 0x00003021, ++0x00402021, 0x94e20000, 0x24e70002, 0x00c23021, ++0x30e2007f, 0x14400006, 0x25080001, 0x8d630000, ++0x3c02007f, 0x3442ff80, 0x00625824, 0x25670008, ++0x0104102a, 0x1440fff3, 0x00000000, 0x3c020800, ++0x944223ec, 0x00c23021, 0x3122ffff, 0x00c23021, ++0x00061c02, 0x30c2ffff, 0x00623021, 0x00061402, ++0x00c23021, 0x00c04021, 0x00061027, 0xa5820010, ++0xadc00014, 0x0a00049d, 0xadc00000, 0x8dc70010, ++0x00e04021, 0x11400007, 0x00072c02, 0x00aa3021, ++0x00061402, 0x30c3ffff, 0x00433021, 0x00061402, ++0x00c22821, 0x00051027, 0xa522000a, 0x3c030800, ++0x946323d4, 0x3102ffff, 0x01e21021, 0x00433023, ++0x00cd3021, 0x00061c02, 0x30c2ffff, 0x00623021, ++0x00061402, 0x00c23021, 0x00c04021, 0x00061027, ++0xa5820010, 0x3102ffff, 0x00051c00, 0x00431025, ++0xadc20010, 0x3c020800, 0x8c4223f4, 0x10400005, ++0x2de205eb, 0x14400002, 0x25e2fff2, 0x34028870, ++0xa5c20034, 0x3c030800, 0x246323e8, 0x8c620000, ++0x24420001, 0xac620000, 0x3c040800, 0x8c8423e4, ++0x3c020800, 0x8c421bc0, 0x3303ffff, 0x00832021, ++0x00431821, 0x0062102b, 0x3c010800, 0xac2423e4, ++0x10400003, 0x2482ffff, 0x3c010800, 0xac2223e4, ++0x3c010800, 0xac231bc0, 0x03e00008, 0x27bd0020, ++0x27bdffb8, 0x3c050800, 0x24a51b96, 0xafbf0044, ++0xafbe0040, 0xafb7003c, 0xafb60038, 0xafb50034, ++0xafb40030, 0xafb3002c, 0xafb20028, 0xafb10024, ++0xafb00020, 0x94a90000, 0x3c020800, 0x944223d0, ++0x3c030800, 0x8c631bb0, 0x3c040800, 0x8c841bac, ++0x01221023, 0x0064182a, 0xa7a9001e, 0x106000be, ++0xa7a20016, 0x24be0022, 0x97b6001e, 0x24b3001a, ++0x24b70016, 0x8fc20000, 0x14400008, 0x00000000, ++0x8fc2fff8, 0x97a30016, 0x8fc4fff4, 0x00431021, ++0x0082202a, 0x148000b0, 0x00000000, 0x97d50818, ++0x32a2ffff, 0x104000a3, 0x00009021, 0x0040a021, ++0x00008821, 0x0e000625, 0x00000000, 0x00403021, ++0x14c00007, 0x00000000, 0x3c020800, 0x8c4223dc, ++0x24420001, 0x3c010800, 0x0a000596, 0xac2223dc, ++0x3c100800, 0x02118021, 0x8e101bc8, 0x9608000a, ++0x31020040, 0x10400005, 0x2407180c, 0x8e02000c, ++0x2407188c, 0x00021400, 0xacc20018, 0x31020080, ++0x54400001, 0x34e70010, 0x3c020800, 0x00511021, ++0x8c421bd0, 0x3c030800, 0x00711821, 0x8c631bd4, ++0x00021500, 0x00031c00, 0x00431025, 0xacc20014, ++0x96040008, 0x3242ffff, 0x00821021, 0x0282102a, ++0x14400002, 0x02b22823, 0x00802821, 0x8e020000, ++0x02459021, 0xacc20000, 0x8e020004, 0x00c02021, ++0x26310010, 0xac820004, 0x30e2ffff, 0xac800008, ++0xa485000e, 0xac820010, 0x24020305, 0x0e0005a2, ++0xa482000c, 0x3242ffff, 0x0054102b, 0x1440ffc5, ++0x3242ffff, 0x0a00058e, 0x00000000, 0x8e620000, ++0x8e63fffc, 0x0043102a, 0x10400067, 0x00000000, ++0x8e62fff0, 0x00028900, 0x3c100800, 0x02118021, ++0x0e000625, 0x8e101bc8, 0x00403021, 0x14c00005, ++0x00000000, 0x8e62082c, 0x24420001, 0x0a000596, ++0xae62082c, 0x9608000a, 0x31020040, 0x10400005, ++0x2407180c, 0x8e02000c, 0x2407188c, 0x00021400, ++0xacc20018, 0x3c020800, 0x00511021, 0x8c421bd0, ++0x3c030800, 0x00711821, 0x8c631bd4, 0x00021500, ++0x00031c00, 0x00431025, 0xacc20014, 0x8e63fff4, ++0x96020008, 0x00432023, 0x3242ffff, 0x3083ffff, ++0x00431021, 0x02c2102a, 0x10400003, 0x00802821, ++0x97a9001e, 0x01322823, 0x8e620000, 0x30a4ffff, ++0x00441021, 0xae620000, 0xa4c5000e, 0x8e020000, ++0xacc20000, 0x8e020004, 0x8e63fff4, 0x00431021, ++0xacc20004, 0x8e63fff4, 0x96020008, 0x00641821, ++0x0062102a, 0x14400006, 0x02459021, 0x8e62fff0, ++0xae60fff4, 0x24420001, 0x0a000571, 0xae62fff0, ++0xae63fff4, 0xacc00008, 0x3242ffff, 0x10560003, ++0x31020004, 0x10400006, 0x24020305, 0x31020080, ++0x54400001, 0x34e70010, 0x34e70020, 0x24020905, ++0xa4c2000c, 0x8ee30000, 0x8ee20004, 0x14620007, ++0x3c02b49a, 0x8ee20860, 0x54400001, 0x34e70400, ++0x3c024b65, 0x0a000588, 0x34427654, 0x344289ab, ++0xacc2001c, 0x30e2ffff, 0xacc20010, 0x0e0005a2, ++0x00c02021, 0x3242ffff, 0x0056102b, 0x1440ff9b, ++0x00000000, 0x8e620000, 0x8e63fffc, 0x0043102a, ++0x1440ff48, 0x00000000, 0x8fbf0044, 0x8fbe0040, ++0x8fb7003c, 0x8fb60038, 0x8fb50034, 0x8fb40030, ++0x8fb3002c, 0x8fb20028, 0x8fb10024, 0x8fb00020, ++0x03e00008, 0x27bd0048, 0x27bdffe8, 0xafbf0014, ++0xafb00010, 0x8f624450, 0x8f634410, 0x0a0005b1, ++0x00808021, 0x8f626820, 0x30422000, 0x10400003, ++0x00000000, 0x0e0001f0, 0x00002021, 0x8f624450, ++0x8f634410, 0x3042ffff, 0x0043102b, 0x1440fff5, ++0x00000000, 0x8f630c14, 0x3063000f, 0x2c620002, ++0x1440000b, 0x00000000, 0x8f630c14, 0x3c020800, ++0x8c421b40, 0x3063000f, 0x24420001, 0x3c010800, ++0xac221b40, 0x2c620002, 0x1040fff7, 0x00000000, ++0xaf705c18, 0x8f625c10, 0x30420002, 0x10400009, ++0x00000000, 0x8f626820, 0x30422000, 0x1040fff8, ++0x00000000, 0x0e0001f0, 0x00002021, 0x0a0005c4, ++0x00000000, 0x8fbf0014, 0x8fb00010, 0x03e00008, ++0x27bd0018, 0x00000000, 0x00000000, 0x00000000, ++0x27bdffe8, 0x3c1bc000, 0xafbf0014, 0xafb00010, ++0xaf60680c, 0x8f626804, 0x34420082, 0xaf626804, ++0x8f634000, 0x24020b50, 0x3c010800, 0xac221b54, ++0x24020b78, 0x3c010800, 0xac221b64, 0x34630002, ++0xaf634000, 0x0e000605, 0x00808021, 0x3c010800, ++0xa0221b68, 0x304200ff, 0x24030002, 0x14430005, ++0x00000000, 0x3c020800, 0x8c421b54, 0x0a0005f8, ++0xac5000c0, 0x3c020800, 0x8c421b54, 0xac5000bc, ++0x8f624434, 0x8f634438, 0x8f644410, 0x3c010800, ++0xac221b5c, 0x3c010800, 0xac231b6c, 0x3c010800, ++0xac241b58, 0x8fbf0014, 0x8fb00010, 0x03e00008, ++0x27bd0018, 0x3c040800, 0x8c870000, 0x3c03aa55, ++0x3463aa55, 0x3c06c003, 0xac830000, 0x8cc20000, ++0x14430007, 0x24050002, 0x3c0355aa, 0x346355aa, ++0xac830000, 0x8cc20000, 0x50430001, 0x24050001, ++0x3c020800, 0xac470000, 0x03e00008, 0x00a01021, ++0x27bdfff8, 0x18800009, 0x00002821, 0x8f63680c, ++0x8f62680c, 0x1043fffe, 0x00000000, 0x24a50001, ++0x00a4102a, 0x1440fff9, 0x00000000, 0x03e00008, ++0x27bd0008, 0x8f634450, 0x3c020800, 0x8c421b5c, ++0x00031c02, 0x0043102b, 0x14400008, 0x3c038000, ++0x3c040800, 0x8c841b6c, 0x8f624450, 0x00021c02, ++0x0083102b, 0x1040fffc, 0x3c038000, 0xaf634444, ++0x8f624444, 0x00431024, 0x1440fffd, 0x00000000, ++0x8f624448, 0x03e00008, 0x3042ffff, 0x3082ffff, ++0x2442e000, 0x2c422001, 0x14400003, 0x3c024000, ++0x0a000648, 0x2402ffff, 0x00822025, 0xaf645c38, ++0x8f625c30, 0x30420002, 0x1440fffc, 0x00001021, ++0x03e00008, 0x00000000, 0x8f624450, 0x3c030800, ++0x8c631b58, 0x0a000651, 0x3042ffff, 0x8f624450, ++0x3042ffff, 0x0043102b, 0x1440fffc, 0x00000000, ++0x03e00008, 0x00000000, 0x27bdffe0, 0x00802821, ++0x3c040800, 0x24841af0, 0x00003021, 0x00003821, ++0xafbf0018, 0xafa00010, 0x0e00067c, 0xafa00014, ++0x0a000660, 0x00000000, 0x8fbf0018, 0x03e00008, ++0x27bd0020, 0x00000000, 0x00000000, 0x00000000, ++0x3c020800, 0x34423000, 0x3c030800, 0x34633000, ++0x3c040800, 0x348437ff, 0x3c010800, 0xac221b74, ++0x24020040, 0x3c010800, 0xac221b78, 0x3c010800, ++0xac201b70, 0xac600000, 0x24630004, 0x0083102b, ++0x5040fffd, 0xac600000, 0x03e00008, 0x00000000, ++0x00804821, 0x8faa0010, 0x3c020800, 0x8c421b70, ++0x3c040800, 0x8c841b78, 0x8fab0014, 0x24430001, ++0x0044102b, 0x3c010800, 0xac231b70, 0x14400003, ++0x00004021, 0x3c010800, 0xac201b70, 0x3c020800, ++0x8c421b70, 0x3c030800, 0x8c631b74, 0x91240000, ++0x00021140, 0x00431021, 0x00481021, 0x25080001, ++0xa0440000, 0x29020008, 0x1440fff4, 0x25290001, ++0x3c020800, 0x8c421b70, 0x3c030800, 0x8c631b74, ++0x8f64680c, 0x00021140, 0x00431021, 0xac440008, ++0xac45000c, 0xac460010, 0xac470014, 0xac4a0018, ++0x03e00008, 0xac4b001c, 0x00000000, 0x00000000, ++0x4d61696e, 0x43707542, 0x00000000, 0x4d61696e, ++0x43707541, 0x00000000, 0x00000000, 0x00000000, ++0x73746b6f, 0x66666c64, 0x496e0000, 0x73746b6f, ++0x66662a2a, 0x00000000, 0x53774576, 0x656e7430, ++0x00000000, 0x00000000, 0x00000000, 0x00000000, ++0x66617461, 0x6c457272, 0x00000000, 0x00000000, ++0x00000000, 0x00000000, 0x00000000, 0x00000000, ++0x00000000, 0x00000000, 0x00000000, 0x00000000, ++0x00000000, 0x73746b6f, 0x66666c64, 0x5f76312e, ++0x362e3000, 0x00000000, 0x00000000, 0x00000000, ++0x00000000, 0x00000000, 0x00000000, 0x00000000, ++}; ++ ++static const struct tg3_firmware tg3_lgcy_tso_fw = { ++ .size = TG3_LGCY_TSO_FW_LEN, ++ .data = (u8 *)&tg3TsoFwText[0], ++}; ++ ++/* 5705 needs a special version of the TSO firmware. */ ++#define TG3_TSO5_FW_RELEASE_MAJOR 0x1 ++#define TG3_TSO5_FW_RELASE_MINOR 0x2 ++#define TG3_TSO5_FW_RELEASE_FIX 0x0 ++#define TG3_TSO5_FW_START_ADDR 0x00010000 ++#define TG3_TSO5_FW_TEXT_ADDR 0x00010000 ++#define TG3_TSO5_FW_TEXT_LEN 0xe90 ++#define TG3_TSO5_FW_RODATA_ADDR 0x00010e90 ++#define TG3_TSO5_FW_RODATA_LEN 0x50 ++#define TG3_TSO5_FW_DATA_ADDR 0x00010f00 ++#define TG3_TSO5_FW_DATA_LEN 0x20 ++#define TG3_TSO5_FW_SBSS_ADDR 0x00010f20 ++#define TG3_TSO5_FW_SBSS_LEN 0x28 ++#define TG3_TSO5_FW_BSS_ADDR 0x00010f50 ++#define TG3_TSO5_FW_BSS_LEN 0x88 ++ ++#define TG3_5705_TSO_FW_LEN \ ++ (TG3_TSO5_FW_TEXT_LEN + \ ++ TG3_TSO5_FW_RODATA_LEN + \ ++ 0x20 + \ ++ TG3_TSO5_FW_DATA_LEN) ++ ++static const u32 tg3Tso5FwText[] = { ++0x00010200, (u32)TG3_TSO5_FW_TEXT_ADDR, (u32)TG3_5705_TSO_FW_LEN, ++0x0c004003, 0x00000000, 0x00010f04, 0x00000000, ++0x10000003, 0x00000000, 0x0000000d, 0x0000000d, ++0x3c1d0001, 0x37bde000, 0x03a0f021, 0x3c100001, ++0x26100000, 0x0c004010, 0x00000000, 0x0000000d, ++0x27bdffe0, 0x3c04fefe, 0xafbf0018, 0x0c0042e8, ++0x34840002, 0x0c004364, 0x00000000, 0x3c030001, ++0x90630f34, 0x24020002, 0x3c040001, 0x24840e9c, ++0x14620003, 0x24050001, 0x3c040001, 0x24840e90, ++0x24060002, 0x00003821, 0xafa00010, 0x0c004378, ++0xafa00014, 0x0c00402c, 0x00000000, 0x8fbf0018, ++0x03e00008, 0x27bd0020, 0x00000000, 0x00000000, ++0x27bdffe0, 0xafbf001c, 0xafb20018, 0xafb10014, ++0x0c0042d4, 0xafb00010, 0x3c128000, 0x24110001, ++0x8f706810, 0x32020400, 0x10400007, 0x00000000, ++0x8f641008, 0x00921024, 0x14400003, 0x00000000, ++0x0c004064, 0x00000000, 0x3c020001, 0x90420f56, ++0x10510003, 0x32020200, 0x1040fff1, 0x00000000, ++0x0c0041b4, 0x00000000, 0x08004034, 0x00000000, ++0x8fbf001c, 0x8fb20018, 0x8fb10014, 0x8fb00010, ++0x03e00008, 0x27bd0020, 0x27bdffe0, 0x3c040001, ++0x24840eb0, 0x00002821, 0x00003021, 0x00003821, ++0xafbf0018, 0xafa00010, 0x0c004378, 0xafa00014, ++0x0000d021, 0x24020130, 0xaf625000, 0x3c010001, ++0xa4200f50, 0x3c010001, 0xa0200f57, 0x8fbf0018, ++0x03e00008, 0x27bd0020, 0x00000000, 0x00000000, ++0x3c030001, 0x24630f60, 0x90620000, 0x27bdfff0, ++0x14400003, 0x0080c021, 0x08004073, 0x00004821, ++0x3c022000, 0x03021024, 0x10400003, 0x24090002, ++0x08004073, 0xa0600000, 0x24090001, 0x00181040, ++0x30431f80, 0x346f8008, 0x1520004b, 0x25eb0028, ++0x3c040001, 0x00832021, 0x8c848010, 0x3c050001, ++0x24a50f7a, 0x00041402, 0xa0a20000, 0x3c010001, ++0xa0240f7b, 0x3c020001, 0x00431021, 0x94428014, ++0x3c010001, 0xa0220f7c, 0x3c0c0001, 0x01836021, ++0x8d8c8018, 0x304200ff, 0x24420008, 0x000220c3, ++0x24020001, 0x3c010001, 0xa0220f60, 0x0124102b, ++0x1040000c, 0x00003821, 0x24a6000e, 0x01602821, ++0x8ca20000, 0x8ca30004, 0x24a50008, 0x24e70001, ++0xacc20000, 0xacc30004, 0x00e4102b, 0x1440fff8, ++0x24c60008, 0x00003821, 0x3c080001, 0x25080f7b, ++0x91060000, 0x3c020001, 0x90420f7c, 0x2503000d, ++0x00c32821, 0x00461023, 0x00021fc2, 0x00431021, ++0x00021043, 0x1840000c, 0x00002021, 0x91020001, ++0x00461023, 0x00021fc2, 0x00431021, 0x00021843, ++0x94a20000, 0x24e70001, 0x00822021, 0x00e3102a, ++0x1440fffb, 0x24a50002, 0x00041c02, 0x3082ffff, ++0x00622021, 0x00041402, 0x00822021, 0x3c02ffff, ++0x01821024, 0x3083ffff, 0x00431025, 0x3c010001, ++0x080040fa, 0xac220f80, 0x3c050001, 0x24a50f7c, ++0x90a20000, 0x3c0c0001, 0x01836021, 0x8d8c8018, ++0x000220c2, 0x1080000e, 0x00003821, 0x01603021, ++0x24a5000c, 0x8ca20000, 0x8ca30004, 0x24a50008, ++0x24e70001, 0xacc20000, 0xacc30004, 0x00e4102b, ++0x1440fff8, 0x24c60008, 0x3c050001, 0x24a50f7c, ++0x90a20000, 0x30430007, 0x24020004, 0x10620011, ++0x28620005, 0x10400005, 0x24020002, 0x10620008, ++0x000710c0, 0x080040fa, 0x00000000, 0x24020006, ++0x1062000e, 0x000710c0, 0x080040fa, 0x00000000, ++0x00a21821, 0x9463000c, 0x004b1021, 0x080040fa, ++0xa4430000, 0x000710c0, 0x00a21821, 0x8c63000c, ++0x004b1021, 0x080040fa, 0xac430000, 0x00a21821, ++0x8c63000c, 0x004b2021, 0x00a21021, 0xac830000, ++0x94420010, 0xa4820004, 0x95e70006, 0x3c020001, ++0x90420f7c, 0x3c030001, 0x90630f7a, 0x00e2c823, ++0x3c020001, 0x90420f7b, 0x24630028, 0x01e34021, ++0x24420028, 0x15200012, 0x01e23021, 0x94c2000c, ++0x3c010001, 0xa4220f78, 0x94c20004, 0x94c30006, ++0x3c010001, 0xa4200f76, 0x3c010001, 0xa4200f72, ++0x00021400, 0x00431025, 0x3c010001, 0xac220f6c, ++0x95020004, 0x3c010001, 0x08004124, 0xa4220f70, ++0x3c020001, 0x94420f70, 0x3c030001, 0x94630f72, ++0x00431021, 0xa5020004, 0x3c020001, 0x94420f6c, ++0xa4c20004, 0x3c020001, 0x8c420f6c, 0xa4c20006, ++0x3c040001, 0x94840f72, 0x3c020001, 0x94420f70, ++0x3c0a0001, 0x954a0f76, 0x00441821, 0x3063ffff, ++0x0062182a, 0x24020002, 0x1122000b, 0x00832023, ++0x3c030001, 0x94630f78, 0x30620009, 0x10400006, ++0x3062fff6, 0xa4c2000c, 0x3c020001, 0x94420f78, ++0x30420009, 0x01425023, 0x24020001, 0x1122001b, ++0x29220002, 0x50400005, 0x24020002, 0x11200007, ++0x31a2ffff, 0x08004197, 0x00000000, 0x1122001d, ++0x24020016, 0x08004197, 0x31a2ffff, 0x3c0e0001, ++0x95ce0f80, 0x10800005, 0x01806821, 0x01c42021, ++0x00041c02, 0x3082ffff, 0x00627021, 0x000e1027, ++0xa502000a, 0x3c030001, 0x90630f7b, 0x31a2ffff, ++0x00e21021, 0x0800418d, 0x00432023, 0x3c020001, ++0x94420f80, 0x00442021, 0x00041c02, 0x3082ffff, ++0x00622021, 0x00807021, 0x00041027, 0x08004185, ++0xa502000a, 0x3c050001, 0x24a50f7a, 0x90a30000, ++0x14620002, 0x24e2fff2, 0xa5e20034, 0x90a20000, ++0x00e21023, 0xa5020002, 0x3c030001, 0x94630f80, ++0x3c020001, 0x94420f5a, 0x30e5ffff, 0x00641821, ++0x00451023, 0x00622023, 0x00041c02, 0x3082ffff, ++0x00622021, 0x00041027, 0xa502000a, 0x3c030001, ++0x90630f7c, 0x24620001, 0x14a20005, 0x00807021, ++0x01631021, 0x90420000, 0x08004185, 0x00026200, ++0x24620002, 0x14a20003, 0x306200fe, 0x004b1021, ++0x944c0000, 0x3c020001, 0x94420f82, 0x3183ffff, ++0x3c040001, 0x90840f7b, 0x00431021, 0x00e21021, ++0x00442023, 0x008a2021, 0x00041c02, 0x3082ffff, ++0x00622021, 0x00041402, 0x00822021, 0x00806821, ++0x00041027, 0xa4c20010, 0x31a2ffff, 0x000e1c00, ++0x00431025, 0x3c040001, 0x24840f72, 0xade20010, ++0x94820000, 0x3c050001, 0x94a50f76, 0x3c030001, ++0x8c630f6c, 0x24420001, 0x00b92821, 0xa4820000, ++0x3322ffff, 0x00622021, 0x0083182b, 0x3c010001, ++0xa4250f76, 0x10600003, 0x24a2ffff, 0x3c010001, ++0xa4220f76, 0x3c024000, 0x03021025, 0x3c010001, ++0xac240f6c, 0xaf621008, 0x03e00008, 0x27bd0010, ++0x3c030001, 0x90630f56, 0x27bdffe8, 0x24020001, ++0xafbf0014, 0x10620026, 0xafb00010, 0x8f620cf4, ++0x2442ffff, 0x3042007f, 0x00021100, 0x8c434000, ++0x3c010001, 0xac230f64, 0x8c434008, 0x24444000, ++0x8c5c4004, 0x30620040, 0x14400002, 0x24020088, ++0x24020008, 0x3c010001, 0xa4220f68, 0x30620004, ++0x10400005, 0x24020001, 0x3c010001, 0xa0220f57, ++0x080041d5, 0x00031402, 0x3c010001, 0xa0200f57, ++0x00031402, 0x3c010001, 0xa4220f54, 0x9483000c, ++0x24020001, 0x3c010001, 0xa4200f50, 0x3c010001, ++0xa0220f56, 0x3c010001, 0xa4230f62, 0x24020001, ++0x1342001e, 0x00000000, 0x13400005, 0x24020003, ++0x13420067, 0x00000000, 0x080042cf, 0x00000000, ++0x3c020001, 0x94420f62, 0x241a0001, 0x3c010001, ++0xa4200f5e, 0x3c010001, 0xa4200f52, 0x304407ff, ++0x00021bc2, 0x00031823, 0x3063003e, 0x34630036, ++0x00021242, 0x3042003c, 0x00621821, 0x3c010001, ++0xa4240f58, 0x00832021, 0x24630030, 0x3c010001, ++0xa4240f5a, 0x3c010001, 0xa4230f5c, 0x3c060001, ++0x24c60f52, 0x94c50000, 0x94c30002, 0x3c040001, ++0x94840f5a, 0x00651021, 0x0044102a, 0x10400013, ++0x3c108000, 0x00a31021, 0xa4c20000, 0x3c02a000, ++0xaf620cf4, 0x3c010001, 0xa0200f56, 0x8f641008, ++0x00901024, 0x14400003, 0x00000000, 0x0c004064, ++0x00000000, 0x8f620cf4, 0x00501024, 0x104000b7, ++0x00000000, 0x0800420f, 0x00000000, 0x3c030001, ++0x94630f50, 0x00851023, 0xa4c40000, 0x00621821, ++0x3042ffff, 0x3c010001, 0xa4230f50, 0xaf620ce8, ++0x3c020001, 0x94420f68, 0x34420024, 0xaf620cec, ++0x94c30002, 0x3c020001, 0x94420f50, 0x14620012, ++0x3c028000, 0x3c108000, 0x3c02a000, 0xaf620cf4, ++0x3c010001, 0xa0200f56, 0x8f641008, 0x00901024, ++0x14400003, 0x00000000, 0x0c004064, 0x00000000, ++0x8f620cf4, 0x00501024, 0x1440fff7, 0x00000000, ++0x080042cf, 0x241a0003, 0xaf620cf4, 0x3c108000, ++0x8f641008, 0x00901024, 0x14400003, 0x00000000, ++0x0c004064, 0x00000000, 0x8f620cf4, 0x00501024, ++0x1440fff7, 0x00000000, 0x080042cf, 0x241a0003, ++0x3c070001, 0x24e70f50, 0x94e20000, 0x03821021, ++0xaf620ce0, 0x3c020001, 0x8c420f64, 0xaf620ce4, ++0x3c050001, 0x94a50f54, 0x94e30000, 0x3c040001, ++0x94840f58, 0x3c020001, 0x94420f5e, 0x00a32823, ++0x00822023, 0x30a6ffff, 0x3083ffff, 0x00c3102b, ++0x14400043, 0x00000000, 0x3c020001, 0x94420f5c, ++0x00021400, 0x00621025, 0xaf620ce8, 0x94e20000, ++0x3c030001, 0x94630f54, 0x00441021, 0xa4e20000, ++0x3042ffff, 0x14430021, 0x3c020008, 0x3c020001, ++0x90420f57, 0x10400006, 0x3c03000c, 0x3c020001, ++0x94420f68, 0x34630624, 0x0800427c, 0x0000d021, ++0x3c020001, 0x94420f68, 0x3c030008, 0x34630624, ++0x00431025, 0xaf620cec, 0x3c108000, 0x3c02a000, ++0xaf620cf4, 0x3c010001, 0xa0200f56, 0x8f641008, ++0x00901024, 0x14400003, 0x00000000, 0x0c004064, ++0x00000000, 0x8f620cf4, 0x00501024, 0x10400015, ++0x00000000, 0x08004283, 0x00000000, 0x3c030001, ++0x94630f68, 0x34420624, 0x3c108000, 0x00621825, ++0x3c028000, 0xaf630cec, 0xaf620cf4, 0x8f641008, ++0x00901024, 0x14400003, 0x00000000, 0x0c004064, ++0x00000000, 0x8f620cf4, 0x00501024, 0x1440fff7, ++0x00000000, 0x3c010001, 0x080042cf, 0xa4200f5e, ++0x3c020001, 0x94420f5c, 0x00021400, 0x00c21025, ++0xaf620ce8, 0x3c020001, 0x90420f57, 0x10400009, ++0x3c03000c, 0x3c020001, 0x94420f68, 0x34630624, ++0x0000d021, 0x00431025, 0xaf620cec, 0x080042c1, ++0x3c108000, 0x3c020001, 0x94420f68, 0x3c030008, ++0x34630604, 0x00431025, 0xaf620cec, 0x3c020001, ++0x94420f5e, 0x00451021, 0x3c010001, 0xa4220f5e, ++0x3c108000, 0x3c02a000, 0xaf620cf4, 0x3c010001, ++0xa0200f56, 0x8f641008, 0x00901024, 0x14400003, ++0x00000000, 0x0c004064, 0x00000000, 0x8f620cf4, ++0x00501024, 0x1440fff7, 0x00000000, 0x8fbf0014, ++0x8fb00010, 0x03e00008, 0x27bd0018, 0x00000000, ++0x27bdffe0, 0x3c040001, 0x24840ec0, 0x00002821, ++0x00003021, 0x00003821, 0xafbf0018, 0xafa00010, ++0x0c004378, 0xafa00014, 0x0000d021, 0x24020130, ++0xaf625000, 0x3c010001, 0xa4200f50, 0x3c010001, ++0xa0200f57, 0x8fbf0018, 0x03e00008, 0x27bd0020, ++0x27bdffe8, 0x3c1bc000, 0xafbf0014, 0xafb00010, ++0xaf60680c, 0x8f626804, 0x34420082, 0xaf626804, ++0x8f634000, 0x24020b50, 0x3c010001, 0xac220f20, ++0x24020b78, 0x3c010001, 0xac220f30, 0x34630002, ++0xaf634000, 0x0c004315, 0x00808021, 0x3c010001, ++0xa0220f34, 0x304200ff, 0x24030002, 0x14430005, ++0x00000000, 0x3c020001, 0x8c420f20, 0x08004308, ++0xac5000c0, 0x3c020001, 0x8c420f20, 0xac5000bc, ++0x8f624434, 0x8f634438, 0x8f644410, 0x3c010001, ++0xac220f28, 0x3c010001, 0xac230f38, 0x3c010001, ++0xac240f24, 0x8fbf0014, 0x8fb00010, 0x03e00008, ++0x27bd0018, 0x03e00008, 0x24020001, 0x27bdfff8, ++0x18800009, 0x00002821, 0x8f63680c, 0x8f62680c, ++0x1043fffe, 0x00000000, 0x24a50001, 0x00a4102a, ++0x1440fff9, 0x00000000, 0x03e00008, 0x27bd0008, ++0x8f634450, 0x3c020001, 0x8c420f28, 0x00031c02, ++0x0043102b, 0x14400008, 0x3c038000, 0x3c040001, ++0x8c840f38, 0x8f624450, 0x00021c02, 0x0083102b, ++0x1040fffc, 0x3c038000, 0xaf634444, 0x8f624444, ++0x00431024, 0x1440fffd, 0x00000000, 0x8f624448, ++0x03e00008, 0x3042ffff, 0x3082ffff, 0x2442e000, ++0x2c422001, 0x14400003, 0x3c024000, 0x08004347, ++0x2402ffff, 0x00822025, 0xaf645c38, 0x8f625c30, ++0x30420002, 0x1440fffc, 0x00001021, 0x03e00008, ++0x00000000, 0x8f624450, 0x3c030001, 0x8c630f24, ++0x08004350, 0x3042ffff, 0x8f624450, 0x3042ffff, ++0x0043102b, 0x1440fffc, 0x00000000, 0x03e00008, ++0x00000000, 0x27bdffe0, 0x00802821, 0x3c040001, ++0x24840ed0, 0x00003021, 0x00003821, 0xafbf0018, ++0xafa00010, 0x0c004378, 0xafa00014, 0x0800435f, ++0x00000000, 0x8fbf0018, 0x03e00008, 0x27bd0020, ++0x3c020001, 0x3442d600, 0x3c030001, 0x3463d600, ++0x3c040001, 0x3484ddff, 0x3c010001, 0xac220f40, ++0x24020040, 0x3c010001, 0xac220f44, 0x3c010001, ++0xac200f3c, 0xac600000, 0x24630004, 0x0083102b, ++0x5040fffd, 0xac600000, 0x03e00008, 0x00000000, ++0x00804821, 0x8faa0010, 0x3c020001, 0x8c420f3c, ++0x3c040001, 0x8c840f44, 0x8fab0014, 0x24430001, ++0x0044102b, 0x3c010001, 0xac230f3c, 0x14400003, ++0x00004021, 0x3c010001, 0xac200f3c, 0x3c020001, ++0x8c420f3c, 0x3c030001, 0x8c630f40, 0x91240000, ++0x00021140, 0x00431021, 0x00481021, 0x25080001, ++0xa0440000, 0x29020008, 0x1440fff4, 0x25290001, ++0x3c020001, 0x8c420f3c, 0x3c030001, 0x8c630f40, ++0x8f64680c, 0x00021140, 0x00431021, 0xac440008, ++0xac45000c, 0xac460010, 0xac470014, 0xac4a0018, ++0x03e00008, 0xac4b001c, 0x00000000, 0x00000000, ++0x4d61696e, 0x43707542, 0x00000000, 0x4d61696e, ++0x43707541, 0x00000000, 0x00000000, 0x00000000, ++0x73746b6f, 0x66666c64, 0x00000000, 0x00000000, ++0x73746b6f, 0x66666c64, 0x00000000, 0x00000000, ++0x66617461, 0x6c457272, 0x00000000, 0x00000000, ++0x00000000, 0x00000000, 0x00000000, 0x00000000, ++0x00000000, 0x00000000, 0x00000000, 0x00000000, ++0x00000000, 0x73746b6f, 0x66666c64, 0x5f76312e, ++0x322e3000, 0x00000000, 0x00000000, 0x00000000, ++}; ++ ++static const struct tg3_firmware tg3_5705_tso_fw = { ++ .size = TG3_5705_TSO_FW_LEN, ++ .data = (u8 *)&tg3Tso5FwText[0], ++}; ++ ++#endif /* TG3_TSO_SUPPORT != 0 */ ++ ++static int tg3_hidden_request_firmware(const struct tg3_firmware **fw, ++ const char *name) ++{ ++ *fw = 0; ++ ++ if (strcmp(name, "tigon/tg3.bin") == 0) ++ *fw = &tg3_5701_fw; ++ else if (strcmp(name, "tigon/tg357766.bin") == 0) ++ *fw = &tg3_57766_fw; ++#if TG3_TSO_SUPPORT != 0 ++ else if (strcmp(name, "tigon/tg3_tso.bin") == 0) ++ *fw = &tg3_lgcy_tso_fw; ++ else if (strcmp(name, "tigon/tg3_tso5.bin") == 0) ++ *fw = &tg3_5705_tso_fw; ++#endif ++ ++ return *fw ? 0 : -EINVAL; ++} ++ ++#define tg3_priv_request_firmware(x, y, z) tg3_hidden_request_firmware((x), (y)) ++ ++#define tg3_priv_release_firmware(x) ++ ++#endif /* BCM_HAS_REQUEST_FIRMWARE */ +diff --git a/drivers/net/ethernet/broadcom/tg3/tg3_flags.h b/drivers/net/ethernet/broadcom/tg3/tg3_flags.h +new file mode 100644 +index 0000000..6788434 +--- /dev/null ++++ b/drivers/net/ethernet/broadcom/tg3/tg3_flags.h +@@ -0,0 +1,95 @@ ++#define BCM_HAS_BOOL ++#define BCM_HAS_LE32 ++#define BCM_HAS_RESOURCE_SIZE_T ++#define BCM_HAS_KZALLOC ++#define BCM_HAS_JIFFIES_TO_USECS ++#define BCM_HAS_USECS_TO_JIFFIES ++#define BCM_HAS_MSECS_TO_JIFFIES ++#define BCM_HAS_MSLEEP ++#define BCM_HAS_MSLEEP_INTERRUPTIBLE ++#define BCM_HAS_SKB_COPY_FROM_LINEAR_DATA ++#define BCM_HAS_SKB_IS_GSO_V6 ++#define BCM_HAS_SKB_CHECKSUM_NONE_ASSERT ++#define BCM_KERNEL_SUPPORTS_TIMESTAMPING ++#define BCM_HAS_SKB_TX_TIMESTAMP ++#define BCM_HAS_SKB_FRAG_SIZE ++#define BCM_HAS_SKB_FRAG_DMA_MAP ++#define BCM_HAS_PCI_PCIE_CAP ++#define BCM_HAS_PCIE_CAP_RW ++#define BCM_HAS_PCI_IS_PCIE ++#define BCM_HAS_PCI_IOREMAP_BAR ++#define BCM_HAS_PCI_READ_VPD ++#define BCM_HAS_INTX_MSI_WORKAROUND ++#define BCM_HAS_PCI_TARGET_STATE ++#define BCM_HAS_PCI_CHOOSE_STATE ++#define BCM_HAS_PCI_PME_CAPABLE ++#define BCM_HAS_PCI_ENABLE_WAKE ++#define BCM_HAS_PCI_WAKE_FROM_D3 ++#define BCM_HAS_PCI_SET_POWER_STATE ++#define BCM_HAS_PCI_EEH_SUPPORT ++#define BCM_HAS_PCI_IS_ENABLED ++#define BCM_HAS_DEVICE_WAKEUP_API ++#define BCM_HAS_DEVICE_SET_WAKEUP_CAPABLE ++#define BCM_HAS_NEW_PCI_DMA_MAPPING_ERROR ++#define BCM_HAS_PCIE_GET_READRQ ++#define BCM_HAS_PCIE_SET_READRQ ++#define BCM_HAS_ETHTOOL_OP_SET_TX_IPV6_CSUM ++#define BCM_HAS_ETHTOOL_OP_SET_TX_HW_CSUM ++#define BCM_HAS_ETHTOOL_OP_SET_SG ++#define BCM_HAS_ETHTOOL_OP_SET_TSO ++#define BCM_HAS_MDIX_STATUS ++#define BCM_HAS_SET_PHYS_ID ++#define BCM_HAS_SET_TX_CSUM ++#define BCM_HAS_ETHTOOL_CMD_SPEED_SET ++#define BCM_HAS_ETHTOOL_CMD_SPEED ++#define BCM_HAS_EXTERNAL_LB_DONE ++#define BCM_HAS_GET_RXNFC ++#define BCM_HAS_GET_RXFH_INDIR ++#define BCM_HAS_LP_ADVERTISING ++#define BCM_HAS_SKB_TRANSPORT_OFFSET ++#define BCM_HAS_SKB_GET_QUEUE_MAPPING ++#define BCM_HAS_IP_HDR ++#define BCM_HAS_IP_HDRLEN ++#define BCM_HAS_TCP_HDR ++#define BCM_HAS_TCP_HDRLEN ++#define BCM_HAS_TCP_OPTLEN ++#define BCM_HAS_STRUCT_NETDEV_QUEUE ++#define BCM_HAS_NETIF_SET_REAL_NUM_TX_QUEUES ++#define BCM_HAS_NETIF_SET_REAL_NUM_RX_QUEUES ++#define BCM_HAS_NETDEV_PRIV ++#define BCM_HAS_NETDEV_TX_T ++#define BCM_HAS_NETDEV_HW_ADDR ++#define BCM_HAS_NETDEV_NAME ++#define BCM_HAS_NETDEV_SENT_QUEUE ++#define BCM_HAS_NETDEV_TX_SENT_QUEUE ++#define BCM_HAS_NETDEV_COMPLETED_QUEUE ++#define BCM_HAS_NETDEV_TX_COMPLETED_QUEUE ++#define BCM_HAS_NETDEV_RESET_QUEUE ++#define BCM_HAS_NETDEV_TX_RESET_QUEUE ++#define BCM_HAS_NET_DEVICE_OPS ++#define BCM_HAS_GET_STATS64 ++#define BCM_HAS_FIX_FEATURES ++#define BCM_HAS_HW_FEATURES ++#define BCM_HAS_VLAN_FEATURES ++#define BCM_HAS_NETDEV_UPDATE_FEATURES ++#define BCM_HAS_ALLOC_ETHERDEV_MQ ++#define BCM_HAS_NAPI_GRO_RECEIVE ++#define BCM_HAS_NETIF_TX_LOCK ++#define BCM_HAS_TXQ_TRANS_UPDATE ++#define BCM_HAS_NETDEV_FEATURES_T ++#define BCM_HAS_NEW_VLAN_INTERFACE ++#define BCM_HAS_DEV_DRIVER_STRING ++#define BCM_HAS_DEV_NAME ++#define BCM_HAS_MDIO_H ++#define BCM_HAS_MII_RESOLVE_FLOWCTRL_FDX ++#define BCM_HAS_MII_ADVERTISE_FLOWCTRL ++#define BCM_HAS_MDIOBUS_ALLOC ++#define BCM_HAS_DMA_DATA_DIRECTION ++#define BCM_HAS_DMA_UNMAP_ADDR ++#define BCM_HAS_DMA_UNMAP_ADDR_SET ++#define BCM_HAS_DMA_ZALLOC_COHERENT ++#define BCM_HAS_IEEE1588_SUPPORT ++#define BCM_HAS_PCI_PMOPS_SHUTDOWN ++#define BCM_HAS_OLD_RXFH_INDIR ++#define BCM_HAS_PCI_CHANNEL_OFFLINE ++#define BCM_HAS_PCI_CHANNEL_IO_NORMAL_ENUM diff --git a/packages/base/any/kernels/3.2.65-1+deb7u2/patches/mgmt-port-init-config.patch b/packages/base/any/kernels/3.2.65-1+deb7u2/patches/mgmt-port-init-config.patch new file mode 100644 index 00000000..23546620 --- /dev/null +++ b/packages/base/any/kernels/3.2.65-1+deb7u2/patches/mgmt-port-init-config.patch @@ -0,0 +1,50 @@ +diff --git a/drivers/net/ethernet/broadcom/tg3/tg3.c b/drivers/net/ethernet/broadcom/tg3/tg3.c +index 4894a11..9b7b7b4 100644 +--- a/drivers/net/ethernet/broadcom/tg3/tg3.c ++++ b/drivers/net/ethernet/broadcom/tg3/tg3.c +@@ -561,6 +561,7 @@ static const struct { + + #define TG3_NUM_TEST ARRAY_SIZE(ethtool_test_keys) + ++static int as7716 = -1; /* as7716=1: as7716 switch is used, it needs as7716 specific patch */ + + static void tg3_write32(struct tg3 *tp, u32 off, u32 val) + { +@@ -1628,6 +1629,10 @@ static void tg3_mdio_config_5785(struct tg3 *tp) + static void tg3_mdio_start(struct tg3 *tp) + { + tp->mi_mode &= ~MAC_MI_MODE_AUTO_POLL; ++ ++ if (as7716 == 1) ++ tp->mi_mode |= MAC_MI_MODE_SHORT_PREAMBLE; /* as7716: for accessing external PHY(0x1F) BCM54616S */ ++ + tw32_f(MAC_MI_MODE, tp->mi_mode); + udelay(80); + +@@ -2899,6 +2904,11 @@ static int tg3_phy_reset(struct tg3 *tp) + } + } + ++ if (as7716 == 1 && tp->phy_id == TG3_PHY_ID_BCM5718S) { ++ __tg3_writephy(tp, 0x8, 0x10, 0x1d0); /* as7716: set internal phy 0x8 to make linkup */ ++ __tg3_writephy(tp, 0x1f, 0x4, 0x5e1); /* as7716 enable 10/100 cability of external phy BCM 54616S*/ ++ } ++ + if (tg3_flag(tp, 5717_PLUS) && + (tp->phy_flags & TG3_PHYFLG_MII_SERDES)) + return 0; +@@ -19874,6 +19884,14 @@ static struct pci_driver tg3_driver = { + + static int __init tg3_init(void) + { ++ extern int platform_accton_as7716_32x(void); ++ if (platform_accton_as7716_32x()) { ++ as7716 = 1; ++ printk_once(KERN_INFO "\nAS7716-32X\n"); ++ } ++ else ++ as7716 = 0; ++ + #ifdef TG3_VMWARE_NETQ_ENABLE + int i; + for (i = 0; i < TG3_MAX_NIC; i++) { diff --git a/packages/base/any/kernels/3.2.65-1+deb7u2/patches/platform-accton-as7716_32x-device-drivers.patch b/packages/base/any/kernels/3.2.65-1+deb7u2/patches/platform-accton-as7716_32x-device-drivers.patch new file mode 100644 index 00000000..73ea06b2 --- /dev/null +++ b/packages/base/any/kernels/3.2.65-1+deb7u2/patches/platform-accton-as7716_32x-device-drivers.patch @@ -0,0 +1,1707 @@ +Device driver patches for accton as7716-32x (fan/psu/cpld/led/sfp) + +diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig +index 89c619d..42abae5 100644 +--- a/drivers/hwmon/Kconfig ++++ b/drivers/hwmon/Kconfig +@@ -1573,7 +1573,25 @@ config SENSORS_ACCTON_AS5812_54t_PSU + + This driver can also be built as a module. If so, the module will + be called accton_as5812_54t_psu. +- ++ ++config SENSORS_ACCTON_AS7716_32x_FAN ++ tristate "Accton as7716 32x fan" ++ depends on I2C && SENSORS_ACCTON_I2C_CPLD ++ help ++ If you say yes here you get support for Accton as7716 32x fan. ++ ++ This driver can also be built as a module. If so, the module will ++ be called accton_as7716_32x_fan. ++ ++config SENSORS_ACCTON_AS7716_32x_PSU ++ tristate "Accton as7716 32x psu" ++ depends on I2C && SENSORS_ACCTON_I2C_CPLD ++ help ++ If you say yes here you get support for Accton as7716 32x psu. ++ ++ This driver can also be built as a module. If so, the module will ++ be called accton_as7716_32x_psu. ++ + if ACPI + + comment "ACPI drivers" +diff --git a/drivers/hwmon/Makefile b/drivers/hwmon/Makefile +index de922bc..9210ab0 100644 +--- a/drivers/hwmon/Makefile ++++ b/drivers/hwmon/Makefile +@@ -36,6 +36,8 @@ obj-$(CONFIG_SENSORS_ACCTON_AS6812_32x_FAN) += accton_as6812_32x_fan.o + obj-$(CONFIG_SENSORS_ACCTON_AS6812_32x_PSU) += accton_as6812_32x_psu.o + obj-$(CONFIG_SENSORS_ACCTON_AS5812_54t_FAN) += accton_as5812_54t_fan.o + obj-$(CONFIG_SENSORS_ACCTON_AS5812_54t_PSU) += accton_as5812_54t_psu.o ++obj-$(CONFIG_SENSORS_ACCTON_AS7716_32x_FAN) += accton_as7716_32x_fan.o ++obj-$(CONFIG_SENSORS_ACCTON_AS7716_32x_PSU) += accton_as7716_32x_psu.o + obj-$(CONFIG_SENSORS_AD7314) += ad7314.o + obj-$(CONFIG_SENSORS_AD7414) += ad7414.o + obj-$(CONFIG_SENSORS_AD7418) += ad7418.o +diff --git a/drivers/hwmon/accton_as7716_32x_fan.c b/drivers/hwmon/accton_as7716_32x_fan.c +new file mode 100644 +index 0000000..924374c +--- /dev/null ++++ b/drivers/hwmon/accton_as7716_32x_fan.c +@@ -0,0 +1,452 @@ ++/* ++ * A hwmon driver for the Accton as7716 32x fan ++ * ++ * Copyright (C) 2014 Accton Technology Corporation. ++ * Brandon Chuang ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define DRVNAME "as7716_32x_fan" ++ ++static struct as7716_32x_fan_data *as7716_32x_fan_update_device(struct device *dev); ++static ssize_t fan_show_value(struct device *dev, struct device_attribute *da, char *buf); ++static ssize_t set_duty_cycle(struct device *dev, struct device_attribute *da, ++ const char *buf, size_t count); ++extern int accton_i2c_cpld_read(unsigned short cpld_addr, u8 reg); ++extern int accton_i2c_cpld_write(unsigned short cpld_addr, u8 reg, u8 value); ++ ++/* fan related data, the index should match sysfs_fan_attributes ++ */ ++static const u8 fan_reg[] = { ++ 0x0F, /* fan 1-6 present status */ ++ 0x11, /* fan PWM(for all fan) */ ++ 0x12, /* front fan 1 speed(rpm) */ ++ 0x13, /* front fan 2 speed(rpm) */ ++ 0x14, /* front fan 3 speed(rpm) */ ++ 0x15, /* front fan 4 speed(rpm) */ ++ 0x16, /* front fan 5 speed(rpm) */ ++ 0x17, /* front fan 6 speed(rpm) */ ++ 0x22, /* rear fan 1 speed(rpm) */ ++ 0x23, /* rear fan 2 speed(rpm) */ ++ 0x24, /* rear fan 3 speed(rpm) */ ++ 0x25, /* rear fan 4 speed(rpm) */ ++ 0x26, /* rear fan 5 speed(rpm) */ ++ 0x27, /* rear fan 6 speed(rpm) */ ++}; ++ ++/* Each client has this additional data */ ++struct as7716_32x_fan_data { ++ struct device *hwmon_dev; ++ struct mutex update_lock; ++ char valid; /* != 0 if registers are valid */ ++ unsigned long last_updated; /* In jiffies */ ++ u8 reg_val[ARRAY_SIZE(fan_reg)]; /* Register value */ ++}; ++ ++enum fan_id { ++ FAN1_ID, ++ FAN2_ID, ++ FAN3_ID, ++ FAN4_ID, ++ FAN5_ID, ++ FAN6_ID ++}; ++ ++enum sysfs_fan_attributes { ++ FAN_PRESENT_REG, ++ FAN_DUTY_CYCLE_PERCENTAGE, /* Only one CPLD register to control duty cycle for all fans */ ++ FAN1_FRONT_SPEED_RPM, ++ FAN2_FRONT_SPEED_RPM, ++ FAN3_FRONT_SPEED_RPM, ++ FAN4_FRONT_SPEED_RPM, ++ FAN5_FRONT_SPEED_RPM, ++ FAN6_FRONT_SPEED_RPM, ++ FAN1_REAR_SPEED_RPM, ++ FAN2_REAR_SPEED_RPM, ++ FAN3_REAR_SPEED_RPM, ++ FAN4_REAR_SPEED_RPM, ++ FAN5_REAR_SPEED_RPM, ++ FAN6_REAR_SPEED_RPM, ++ FAN1_PRESENT, ++ FAN2_PRESENT, ++ FAN3_PRESENT, ++ FAN4_PRESENT, ++ FAN5_PRESENT, ++ FAN6_PRESENT, ++ FAN1_FAULT, ++ FAN2_FAULT, ++ FAN3_FAULT, ++ FAN4_FAULT, ++ FAN5_FAULT, ++ FAN6_FAULT ++}; ++ ++/* Define attributes ++ */ ++#define DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(index) \ ++ static SENSOR_DEVICE_ATTR(fan##index##_fault, S_IRUGO, fan_show_value, NULL, FAN##index##_FAULT) ++#define DECLARE_FAN_FAULT_ATTR(index) &sensor_dev_attr_fan##index##_fault.dev_attr.attr ++ ++#define DECLARE_FAN_DIRECTION_SENSOR_DEV_ATTR(index) \ ++ static SENSOR_DEVICE_ATTR(fan##index##_direction, S_IRUGO, fan_show_value, NULL, FAN##index##_DIRECTION) ++#define DECLARE_FAN_DIRECTION_ATTR(index) &sensor_dev_attr_fan##index##_direction.dev_attr.attr ++ ++#define DECLARE_FAN_DUTY_CYCLE_SENSOR_DEV_ATTR(index) \ ++ static SENSOR_DEVICE_ATTR(fan##index##_duty_cycle_percentage, S_IWUSR | S_IRUGO, fan_show_value, set_duty_cycle, FAN##index##_DUTY_CYCLE_PERCENTAGE) ++#define DECLARE_FAN_DUTY_CYCLE_ATTR(index) &sensor_dev_attr_fan##index##_duty_cycle_percentage.dev_attr.attr ++ ++#define DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(index) \ ++ static SENSOR_DEVICE_ATTR(fan##index##_present, S_IRUGO, fan_show_value, NULL, FAN##index##_PRESENT) ++#define DECLARE_FAN_PRESENT_ATTR(index) &sensor_dev_attr_fan##index##_present.dev_attr.attr ++ ++#define DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(index) \ ++ static SENSOR_DEVICE_ATTR(fan##index##_front_speed_rpm, S_IRUGO, fan_show_value, NULL, FAN##index##_FRONT_SPEED_RPM);\ ++ static SENSOR_DEVICE_ATTR(fan##index##_rear_speed_rpm, S_IRUGO, fan_show_value, NULL, FAN##index##_REAR_SPEED_RPM) ++#define DECLARE_FAN_SPEED_RPM_ATTR(index) &sensor_dev_attr_fan##index##_front_speed_rpm.dev_attr.attr, \ ++ &sensor_dev_attr_fan##index##_rear_speed_rpm.dev_attr.attr ++ ++/* 6 fan fault attributes in this platform */ ++DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(1); ++DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(2); ++DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(3); ++DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(4); ++DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(5); ++DECLARE_FAN_FAULT_SENSOR_DEV_ATTR(6); ++/* 6 fan speed(rpm) attributes in this platform */ ++DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(1); ++DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(2); ++DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(3); ++DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(4); ++DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(5); ++DECLARE_FAN_SPEED_RPM_SENSOR_DEV_ATTR(6); ++/* 6 fan present attributes in this platform */ ++DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(1); ++DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(2); ++DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(3); ++DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(4); ++DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(5); ++DECLARE_FAN_PRESENT_SENSOR_DEV_ATTR(6); ++/* 1 fan duty cycle attribute in this platform */ ++DECLARE_FAN_DUTY_CYCLE_SENSOR_DEV_ATTR(); ++ ++static struct attribute *as7716_32x_fan_attributes[] = { ++ /* fan related attributes */ ++ DECLARE_FAN_FAULT_ATTR(1), ++ DECLARE_FAN_FAULT_ATTR(2), ++ DECLARE_FAN_FAULT_ATTR(3), ++ DECLARE_FAN_FAULT_ATTR(4), ++ DECLARE_FAN_FAULT_ATTR(5), ++ DECLARE_FAN_FAULT_ATTR(6), ++ DECLARE_FAN_SPEED_RPM_ATTR(1), ++ DECLARE_FAN_SPEED_RPM_ATTR(2), ++ DECLARE_FAN_SPEED_RPM_ATTR(3), ++ DECLARE_FAN_SPEED_RPM_ATTR(4), ++ DECLARE_FAN_SPEED_RPM_ATTR(5), ++ DECLARE_FAN_SPEED_RPM_ATTR(6), ++ DECLARE_FAN_PRESENT_ATTR(1), ++ DECLARE_FAN_PRESENT_ATTR(2), ++ DECLARE_FAN_PRESENT_ATTR(3), ++ DECLARE_FAN_PRESENT_ATTR(4), ++ DECLARE_FAN_PRESENT_ATTR(5), ++ DECLARE_FAN_PRESENT_ATTR(6), ++ DECLARE_FAN_DUTY_CYCLE_ATTR(), ++ NULL ++}; ++ ++#define FAN_DUTY_CYCLE_REG_MASK 0xF ++#define FAN_MAX_DUTY_CYCLE 100 ++#define FAN_REG_VAL_TO_SPEED_RPM_STEP 100 ++ ++static int as7716_32x_fan_read_value(struct i2c_client *client, u8 reg) ++{ ++ return i2c_smbus_read_byte_data(client, reg); ++} ++ ++static int as7716_32x_fan_write_value(struct i2c_client *client, u8 reg, u8 value) ++{ ++ return i2c_smbus_write_byte_data(client, reg, value); ++} ++ ++/* fan utility functions ++ */ ++static u32 reg_val_to_duty_cycle(u8 reg_val) ++{ ++ reg_val &= FAN_DUTY_CYCLE_REG_MASK; ++ return ((u32)(reg_val+1) * 625 + 75)/ 100; ++} ++ ++static u8 duty_cycle_to_reg_val(u8 duty_cycle) ++{ ++ return ((u32)duty_cycle * 100 / 625) - 1; ++} ++ ++static u32 reg_val_to_speed_rpm(u8 reg_val) ++{ ++ return (u32)reg_val * FAN_REG_VAL_TO_SPEED_RPM_STEP; ++} ++ ++static u8 reg_val_to_is_present(u8 reg_val, enum fan_id id) ++{ ++ u8 mask = (1 << id); ++ ++ reg_val &= mask; ++ ++ return reg_val ? 0 : 1; ++} ++ ++static u8 is_fan_fault(struct as7716_32x_fan_data *data, enum fan_id id) ++{ ++ u8 ret = 1; ++ int front_fan_index = FAN1_FRONT_SPEED_RPM + id; ++ int rear_fan_index = FAN1_REAR_SPEED_RPM + id; ++ ++ /* Check if the speed of front or rear fan is ZERO, ++ */ ++ if (reg_val_to_speed_rpm(data->reg_val[front_fan_index]) && ++ reg_val_to_speed_rpm(data->reg_val[rear_fan_index])) { ++ ret = 0; ++ } ++ ++ return ret; ++} ++ ++static ssize_t set_duty_cycle(struct device *dev, struct device_attribute *da, ++ const char *buf, size_t count) ++{ ++ int error, value; ++ struct i2c_client *client = to_i2c_client(dev); ++ ++ error = kstrtoint(buf, 10, &value); ++ if (error) ++ return error; ++ ++ if (value < 0 || value > FAN_MAX_DUTY_CYCLE) ++ return -EINVAL; ++ ++ as7716_32x_fan_write_value(client, 0x33, 0); /* Disable fan speed watch dog */ ++ as7716_32x_fan_write_value(client, fan_reg[FAN_DUTY_CYCLE_PERCENTAGE], duty_cycle_to_reg_val(value)); ++ return count; ++} ++ ++static ssize_t fan_show_value(struct device *dev, struct device_attribute *da, ++ char *buf) ++{ ++ struct sensor_device_attribute *attr = to_sensor_dev_attr(da); ++ struct as7716_32x_fan_data *data = as7716_32x_fan_update_device(dev); ++ ssize_t ret = 0; ++ ++ if (data->valid) { ++ switch (attr->index) { ++ case FAN_DUTY_CYCLE_PERCENTAGE: ++ { ++ u32 duty_cycle = reg_val_to_duty_cycle(data->reg_val[FAN_DUTY_CYCLE_PERCENTAGE]); ++ ret = sprintf(buf, "%u\n", duty_cycle); ++ break; ++ } ++ case FAN1_FRONT_SPEED_RPM: ++ case FAN2_FRONT_SPEED_RPM: ++ case FAN3_FRONT_SPEED_RPM: ++ case FAN4_FRONT_SPEED_RPM: ++ case FAN5_FRONT_SPEED_RPM: ++ case FAN6_FRONT_SPEED_RPM: ++ case FAN1_REAR_SPEED_RPM: ++ case FAN2_REAR_SPEED_RPM: ++ case FAN3_REAR_SPEED_RPM: ++ case FAN4_REAR_SPEED_RPM: ++ case FAN5_REAR_SPEED_RPM: ++ case FAN6_REAR_SPEED_RPM: ++ ret = sprintf(buf, "%u\n", reg_val_to_speed_rpm(data->reg_val[attr->index])); ++ break; ++ case FAN1_PRESENT: ++ case FAN2_PRESENT: ++ case FAN3_PRESENT: ++ case FAN4_PRESENT: ++ case FAN5_PRESENT: ++ case FAN6_PRESENT: ++ ret = sprintf(buf, "%d\n", ++ reg_val_to_is_present(data->reg_val[FAN_PRESENT_REG], ++ attr->index - FAN1_PRESENT)); ++ break; ++ case FAN1_FAULT: ++ case FAN2_FAULT: ++ case FAN3_FAULT: ++ case FAN4_FAULT: ++ case FAN5_FAULT: ++ case FAN6_FAULT: ++ ret = sprintf(buf, "%d\n", is_fan_fault(data, attr->index - FAN1_FAULT)); ++ break; ++ default: ++ break; ++ } ++ } ++ ++ return ret; ++} ++ ++static const struct attribute_group as7716_32x_fan_group = { ++ .attrs = as7716_32x_fan_attributes, ++}; ++ ++static struct as7716_32x_fan_data *as7716_32x_fan_update_device(struct device *dev) ++{ ++ struct i2c_client *client = to_i2c_client(dev); ++ struct as7716_32x_fan_data *data = i2c_get_clientdata(client); ++ ++ mutex_lock(&data->update_lock); ++ ++ if (time_after(jiffies, data->last_updated + HZ + HZ / 2) || ++ !data->valid) { ++ int i; ++ ++ dev_dbg(&client->dev, "Starting as7716_32x_fan update\n"); ++ data->valid = 0; ++ ++ /* Update fan data ++ */ ++ for (i = 0; i < ARRAY_SIZE(data->reg_val); i++) { ++ int status = as7716_32x_fan_read_value(client, fan_reg[i]); ++ ++ if (status < 0) { ++ data->valid = 0; ++ mutex_unlock(&data->update_lock); ++ dev_dbg(&client->dev, "reg %d, err %d\n", fan_reg[i], status); ++ return data; ++ } ++ else { ++ data->reg_val[i] = status; ++ } ++ } ++ ++ data->last_updated = jiffies; ++ data->valid = 1; ++ } ++ ++ mutex_unlock(&data->update_lock); ++ ++ return data; ++} ++ ++static int as7716_32x_fan_probe(struct i2c_client *client, ++ const struct i2c_device_id *dev_id) ++{ ++ struct as7716_32x_fan_data *data; ++ int status; ++ ++ if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA)) { ++ status = -EIO; ++ goto exit; ++ } ++ ++ data = kzalloc(sizeof(struct as7716_32x_fan_data), GFP_KERNEL); ++ if (!data) { ++ status = -ENOMEM; ++ goto exit; ++ } ++ ++ i2c_set_clientdata(client, data); ++ data->valid = 0; ++ mutex_init(&data->update_lock); ++ ++ dev_info(&client->dev, "chip found\n"); ++ ++ /* Register sysfs hooks */ ++ status = sysfs_create_group(&client->dev.kobj, &as7716_32x_fan_group); ++ if (status) { ++ goto exit_free; ++ } ++ ++ data->hwmon_dev = hwmon_device_register(&client->dev); ++ if (IS_ERR(data->hwmon_dev)) { ++ status = PTR_ERR(data->hwmon_dev); ++ goto exit_remove; ++ } ++ ++ dev_info(&client->dev, "%s: fan '%s'\n", ++ dev_name(data->hwmon_dev), client->name); ++ ++ return 0; ++ ++exit_remove: ++ sysfs_remove_group(&client->dev.kobj, &as7716_32x_fan_group); ++exit_free: ++ kfree(data); ++exit: ++ ++ return status; ++} ++ ++static int as7716_32x_fan_remove(struct i2c_client *client) ++{ ++ struct as7716_32x_fan_data *data = i2c_get_clientdata(client); ++ hwmon_device_unregister(data->hwmon_dev); ++ sysfs_remove_group(&client->dev.kobj, &as7716_32x_fan_group); ++ ++ return 0; ++} ++ ++/* Addresses to scan */ ++static const unsigned short normal_i2c[] = { 0x66, I2C_CLIENT_END }; ++ ++static const struct i2c_device_id as7716_32x_fan_id[] = { ++ { "as7716_32x_fan", 0 }, ++ {} ++}; ++MODULE_DEVICE_TABLE(i2c, as7716_32x_fan_id); ++ ++static struct i2c_driver as7716_32x_fan_driver = { ++ .class = I2C_CLASS_HWMON, ++ .driver = { ++ .name = DRVNAME, ++ }, ++ .probe = as7716_32x_fan_probe, ++ .remove = as7716_32x_fan_remove, ++ .id_table = as7716_32x_fan_id, ++ .address_list = normal_i2c, ++}; ++ ++static int __init as7716_32x_fan_init(void) ++{ ++ extern int platform_accton_as7716_32x(void); ++ if (!platform_accton_as7716_32x()) { ++ return -ENODEV; ++ } ++ ++ return i2c_add_driver(&as7716_32x_fan_driver); ++} ++ ++static void __exit as7716_32x_fan_exit(void) ++{ ++ i2c_del_driver(&as7716_32x_fan_driver); ++} ++ ++module_init(as7716_32x_fan_init); ++module_exit(as7716_32x_fan_exit); ++ ++MODULE_AUTHOR("Brandon Chuang "); ++MODULE_DESCRIPTION("as7716_32x_fan driver"); ++MODULE_LICENSE("GPL"); ++ +diff --git a/drivers/hwmon/accton_as7716_32x_psu.c b/drivers/hwmon/accton_as7716_32x_psu.c +new file mode 100644 +index 0000000..4fd15ae +--- /dev/null ++++ b/drivers/hwmon/accton_as7716_32x_psu.c +@@ -0,0 +1,293 @@ ++/* ++ * An hwmon driver for accton as7716_32x Power Module ++ * ++ * Copyright (C) 2014 Accton Technology Corporation. ++ * Brandon Chuang ++ * ++ * Based on ad7414.c ++ * Copyright 2006 Stefan Roese , DENX Software Engineering ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++static ssize_t show_status(struct device *dev, struct device_attribute *da, char *buf); ++static ssize_t show_model_name(struct device *dev, struct device_attribute *da, char *buf); ++static int as7716_32x_psu_read_block(struct i2c_client *client, u8 command, u8 *data,int data_len); ++extern int accton_i2c_cpld_read(unsigned short cpld_addr, u8 reg); ++ ++/* Addresses scanned ++ */ ++static const unsigned short normal_i2c[] = { 0x50, 0x53, I2C_CLIENT_END }; ++ ++/* Each client has this additional data ++ */ ++struct as7716_32x_psu_data { ++ struct device *hwmon_dev; ++ struct mutex update_lock; ++ char valid; /* !=0 if registers are valid */ ++ unsigned long last_updated; /* In jiffies */ ++ u8 index; /* PSU index */ ++ u8 status; /* Status(present/power_good) register read from CPLD */ ++ char model_name[9]; /* Model name, read from eeprom */ ++}; ++ ++static struct as7716_32x_psu_data *as7716_32x_psu_update_device(struct device *dev); ++ ++enum as7716_32x_psu_sysfs_attributes { ++ PSU_PRESENT, ++ PSU_MODEL_NAME, ++ PSU_POWER_GOOD ++}; ++ ++/* sysfs attributes for hwmon ++ */ ++static SENSOR_DEVICE_ATTR(psu_present, S_IRUGO, show_status, NULL, PSU_PRESENT); ++static SENSOR_DEVICE_ATTR(psu_model_name, S_IRUGO, show_model_name,NULL, PSU_MODEL_NAME); ++static SENSOR_DEVICE_ATTR(psu_power_good, S_IRUGO, show_status, NULL, PSU_POWER_GOOD); ++ ++static struct attribute *as7716_32x_psu_attributes[] = { ++ &sensor_dev_attr_psu_present.dev_attr.attr, ++ &sensor_dev_attr_psu_model_name.dev_attr.attr, ++ &sensor_dev_attr_psu_power_good.dev_attr.attr, ++ NULL ++}; ++ ++static ssize_t show_status(struct device *dev, struct device_attribute *da, ++ char *buf) ++{ ++ struct sensor_device_attribute *attr = to_sensor_dev_attr(da); ++ struct as7716_32x_psu_data *data = as7716_32x_psu_update_device(dev); ++ u8 status = 0; ++ ++ if (attr->index == PSU_PRESENT) { ++ status = !(data->status >> (1-data->index) & 0x1); ++ } ++ else { /* PSU_POWER_GOOD */ ++ status = (data->status >> (3-data->index) & 0x1); ++ } ++ ++ return sprintf(buf, "%d\n", status); ++} ++ ++static ssize_t show_model_name(struct device *dev, struct device_attribute *da, ++ char *buf) ++{ ++ struct as7716_32x_psu_data *data = as7716_32x_psu_update_device(dev); ++ ++ return sprintf(buf, "%s\n", data->model_name); ++} ++ ++static const struct attribute_group as7716_32x_psu_group = { ++ .attrs = as7716_32x_psu_attributes, ++}; ++ ++static int as7716_32x_psu_probe(struct i2c_client *client, ++ const struct i2c_device_id *dev_id) ++{ ++ struct as7716_32x_psu_data *data; ++ int status; ++ ++ if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) { ++ status = -EIO; ++ goto exit; ++ } ++ ++ data = kzalloc(sizeof(struct as7716_32x_psu_data), GFP_KERNEL); ++ if (!data) { ++ status = -ENOMEM; ++ goto exit; ++ } ++ ++ i2c_set_clientdata(client, data); ++ data->valid = 0; ++ data->index = dev_id->driver_data; ++ mutex_init(&data->update_lock); ++ ++ dev_info(&client->dev, "chip found\n"); ++ ++ /* Register sysfs hooks */ ++ status = sysfs_create_group(&client->dev.kobj, &as7716_32x_psu_group); ++ if (status) { ++ goto exit_free; ++ } ++ ++ data->hwmon_dev = hwmon_device_register(&client->dev); ++ if (IS_ERR(data->hwmon_dev)) { ++ status = PTR_ERR(data->hwmon_dev); ++ goto exit_remove; ++ } ++ ++ dev_info(&client->dev, "%s: psu '%s'\n", ++ dev_name(data->hwmon_dev), client->name); ++ ++ return 0; ++ ++exit_remove: ++ sysfs_remove_group(&client->dev.kobj, &as7716_32x_psu_group); ++exit_free: ++ kfree(data); ++exit: ++ ++ return status; ++} ++ ++static int as7716_32x_psu_remove(struct i2c_client *client) ++{ ++ struct as7716_32x_psu_data *data = i2c_get_clientdata(client); ++ ++ hwmon_device_unregister(data->hwmon_dev); ++ sysfs_remove_group(&client->dev.kobj, &as7716_32x_psu_group); ++ kfree(data); ++ ++ return 0; ++} ++ ++enum psu_index ++{ ++ as7716_32x_psu1, ++ as7716_32x_psu2 ++}; ++ ++static const struct i2c_device_id as7716_32x_psu_id[] = { ++ { "as7716_32x_psu1", as7716_32x_psu1 }, ++ { "as7716_32x_psu2", as7716_32x_psu2 }, ++ {} ++}; ++MODULE_DEVICE_TABLE(i2c, as7716_32x_psu_id); ++ ++static struct i2c_driver as7716_32x_psu_driver = { ++ .class = I2C_CLASS_HWMON, ++ .driver = { ++ .name = "as7716_32x_psu", ++ }, ++ .probe = as7716_32x_psu_probe, ++ .remove = as7716_32x_psu_remove, ++ .id_table = as7716_32x_psu_id, ++ .address_list = normal_i2c, ++}; ++ ++static int as7716_32x_psu_read_block(struct i2c_client *client, u8 command, u8 *data, ++ int data_len) ++{ ++ int result = 0; ++ int retry_count = 5; ++ ++ while (retry_count) { ++ retry_count--; ++ ++ result = i2c_smbus_read_i2c_block_data(client, command, data_len, data); ++ ++ if (unlikely(result < 0)) { ++ msleep(10); ++ continue; ++ } ++ ++ if (unlikely(result != data_len)) { ++ result = -EIO; ++ msleep(10); ++ continue; ++ } ++ ++ result = 0; ++ break; ++ } ++ ++ return result; ++} ++ ++static struct as7716_32x_psu_data *as7716_32x_psu_update_device(struct device *dev) ++{ ++ struct i2c_client *client = to_i2c_client(dev); ++ struct as7716_32x_psu_data *data = i2c_get_clientdata(client); ++ ++ mutex_lock(&data->update_lock); ++ ++ if (time_after(jiffies, data->last_updated + HZ + HZ / 2) ++ || !data->valid) { ++ int status; ++ int power_good = 0; ++ ++ dev_dbg(&client->dev, "Starting as7716_32x update\n"); ++ ++ /* Read psu status */ ++ status = accton_i2c_cpld_read(0x60, 0x2); ++ ++ if (status < 0) { ++ dev_dbg(&client->dev, "cpld reg 0x60 err %d\n", status); ++ } ++ else { ++ data->status = status; ++ } ++ ++ /* Read model name */ ++ memset(data->model_name, 0, sizeof(data->model_name)); ++ power_good = (data->status >> (3-data->index) & 0x1); ++ ++ if (power_good) { ++ status = as7716_32x_psu_read_block(client, 0x20, data->model_name, ++ ARRAY_SIZE(data->model_name)-1); ++ ++ if (status < 0) { ++ data->model_name[0] = '\0'; ++ dev_dbg(&client->dev, "unable to read model name from (0x%x)\n", client->addr); ++ } ++ else { ++ data->model_name[ARRAY_SIZE(data->model_name)-1] = '\0'; ++ } ++ } ++ ++ data->last_updated = jiffies; ++ data->valid = 1; ++ } ++ ++ mutex_unlock(&data->update_lock); ++ ++ return data; ++} ++ ++static int __init as7716_32x_psu_init(void) ++{ ++ extern int platform_accton_as7716_32x(void); ++ if (!platform_accton_as7716_32x()) { ++ return -ENODEV; ++ } ++ ++ return i2c_add_driver(&as7716_32x_psu_driver); ++} ++ ++static void __exit as7716_32x_psu_exit(void) ++{ ++ i2c_del_driver(&as7716_32x_psu_driver); ++} ++ ++module_init(as7716_32x_psu_init); ++module_exit(as7716_32x_psu_exit); ++ ++MODULE_AUTHOR("Brandon Chuang "); ++MODULE_DESCRIPTION("as7716_32x_psu driver"); ++MODULE_LICENSE("GPL"); ++ +diff --git a/drivers/hwmon/accton_i2c_cpld.c b/drivers/hwmon/accton_i2c_cpld.c +index acf88c9..95202ec 100644 +--- a/drivers/hwmon/accton_i2c_cpld.c ++++ b/drivers/hwmon/accton_i2c_cpld.c +@@ -255,6 +255,22 @@ int platform_accton_as5812_54t(void) + } + EXPORT_SYMBOL(platform_accton_as5812_54t); + ++static struct dmi_system_id as7716_dmi_table[] = { ++ { ++ .ident = "Accton AS7716", ++ .matches = { ++ DMI_MATCH(DMI_SYS_VENDOR, "Accton"), ++ DMI_MATCH(DMI_PRODUCT_NAME, "AS7716"), ++ }, ++ } ++}; ++ ++int platform_accton_as7716_32x(void) ++{ ++ return dmi_check_system(as7716_dmi_table); ++} ++EXPORT_SYMBOL(platform_accton_as7716_32x); ++ + MODULE_AUTHOR("Brandon Chuang "); + MODULE_DESCRIPTION("accton_i2c_cpld driver"); + MODULE_LICENSE("GPL"); +diff --git a/drivers/leds/Kconfig b/drivers/leds/Kconfig +index 599b97b..bdfb18e 100644 +--- a/drivers/leds/Kconfig ++++ b/drivers/leds/Kconfig +@@ -88,7 +88,14 @@ config LEDS_ACCTON_AS5812_54t + help + This option enables support for the LEDs on the Accton as5812 54t. + Say Y to enable LEDs on the Accton as5812 54t. +- ++ ++config LEDS_ACCTON_AS7716_32x ++ tristate "LED support for the Accton as7716 32x" ++ depends on LEDS_CLASS && SENSORS_ACCTON_I2C_CPLD ++ help ++ This option enables support for the LEDs on the Accton as7716 32x. ++ Say Y to enable LEDs on the Accton as7716 32x. ++ + config LEDS_LM3530 + tristate "LCD Backlight driver for LM3530" + depends on LEDS_CLASS +diff --git a/drivers/leds/Makefile b/drivers/leds/Makefile +index bd20baa..58b1a80 100644 +--- a/drivers/leds/Makefile ++++ b/drivers/leds/Makefile +@@ -50,7 +50,7 @@ obj-$(CONFIG_LEDS_ACCTON_AS7712_32x) += leds-accton_as7712_32x.o + obj-$(CONFIG_LEDS_ACCTON_AS5812_54x) += leds-accton_as5812_54x.o + obj-$(CONFIG_LEDS_ACCTON_AS6812_32x) += leds-accton_as6812_32x.o + obj-$(CONFIG_LEDS_ACCTON_AS5812_54t) += leds-accton_as5812_54t.o +- ++obj-$(CONFIG_LEDS_ACCTON_AS7716_32x) += leds-accton_as7716_32x.o + # LED SPI Drivers + obj-$(CONFIG_LEDS_DAC124S085) += leds-dac124s085.o + +diff --git a/drivers/leds/leds-accton_as7716_32x.c b/drivers/leds/leds-accton_as7716_32x.c +new file mode 100644 +index 0000000..5a84897 +--- /dev/null ++++ b/drivers/leds/leds-accton_as7716_32x.c +@@ -0,0 +1,443 @@ ++/* ++ * A LED driver for the accton_as7716_32x_led ++ * ++ * Copyright (C) 2014 Accton Technology Corporation. ++ * Brandon Chuang ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. ++ */ ++ ++/*#define DEBUG*/ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++extern int accton_i2c_cpld_read (unsigned short cpld_addr, u8 reg); ++extern int accton_i2c_cpld_write(unsigned short cpld_addr, u8 reg, u8 value); ++ ++extern void led_classdev_unregister(struct led_classdev *led_cdev); ++extern int led_classdev_register(struct device *parent, struct led_classdev *led_cdev); ++extern void led_classdev_resume(struct led_classdev *led_cdev); ++extern void led_classdev_suspend(struct led_classdev *led_cdev); ++ ++#define DRVNAME "accton_as7716_32x_led" ++ ++struct accton_as7716_32x_led_data { ++ struct platform_device *pdev; ++ struct mutex update_lock; ++ char valid; /* != 0 if registers are valid */ ++ unsigned long last_updated; /* In jiffies */ ++ u8 reg_val[1]; /* only 1 register*/ ++}; ++ ++static struct accton_as7716_32x_led_data *ledctl = NULL; ++ ++/* LED related data ++ */ ++ ++#define LED_CNTRLER_I2C_ADDRESS (0x60) ++ ++#define LED_TYPE_DIAG_REG_MASK (0x3) ++#define LED_MODE_DIAG_GREEN_VALUE (0x02) ++#define LED_MODE_DIAG_RED_VALUE (0x01) ++#define LED_MODE_DIAG_AMBER_VALUE (0x00) /*It's yellow actually. Green+Red=Yellow*/ ++#define LED_MODE_DIAG_OFF_VALUE (0x03) ++ ++ ++#define LED_TYPE_LOC_REG_MASK (0x80) ++#define LED_MODE_LOC_ON_VALUE (0) ++#define LED_MODE_LOC_OFF_VALUE (0x80) ++ ++enum led_type { ++ LED_TYPE_DIAG, ++ LED_TYPE_LOC, ++ LED_TYPE_FAN, ++ LED_TYPE_PSU1, ++ LED_TYPE_PSU2 ++}; ++ ++struct led_reg { ++ u32 types; ++ u8 reg_addr; ++}; ++ ++static const struct led_reg led_reg_map[] = { ++ {(1<update_lock); ++ ++ if (time_after(jiffies, ledctl->last_updated + HZ + HZ / 2) ++ || !ledctl->valid) { ++ int i; ++ ++ dev_dbg(&ledctl->pdev->dev, "Starting accton_as7716_32x_led update\n"); ++ ++ /* Update LED data ++ */ ++ for (i = 0; i < ARRAY_SIZE(ledctl->reg_val); i++) { ++ int status = accton_as7716_32x_led_read_value(led_reg_map[i].reg_addr); ++ ++ if (status < 0) { ++ ledctl->valid = 0; ++ dev_dbg(&ledctl->pdev->dev, "reg %d, err %d\n", led_reg_map[i].reg_addr, status); ++ goto exit; ++ } ++ else ++ { ++ ledctl->reg_val[i] = status; ++ } ++ } ++ ++ ledctl->last_updated = jiffies; ++ ledctl->valid = 1; ++ } ++ ++exit: ++ mutex_unlock(&ledctl->update_lock); ++} ++ ++static void accton_as7716_32x_led_set(struct led_classdev *led_cdev, ++ enum led_brightness led_light_mode, ++ enum led_type type) ++{ ++ int reg_val; ++ u8 reg ; ++ mutex_lock(&ledctl->update_lock); ++ ++ if( !accton_getLedReg(type, ®)) ++ { ++ dev_dbg(&ledctl->pdev->dev, "Not match item for %d.\n", type); ++ } ++ ++ reg_val = accton_as7716_32x_led_read_value(reg); ++ ++ if (reg_val < 0) { ++ dev_dbg(&ledctl->pdev->dev, "reg %d, err %d\n", reg, reg_val); ++ goto exit; ++ } ++ reg_val = led_light_mode_to_reg_val(type, led_light_mode, reg_val); ++ accton_as7716_32x_led_write_value(reg, reg_val); ++ ++ /* to prevent the slow-update issue */ ++ ledctl->valid = 0; ++ ++exit: ++ mutex_unlock(&ledctl->update_lock); ++} ++ ++ ++static void accton_as7716_32x_led_diag_set(struct led_classdev *led_cdev, ++ enum led_brightness led_light_mode) ++{ ++ accton_as7716_32x_led_set(led_cdev, led_light_mode, LED_TYPE_DIAG); ++} ++ ++static enum led_brightness accton_as7716_32x_led_diag_get(struct led_classdev *cdev) ++{ ++ accton_as7716_32x_led_update(); ++ return led_reg_val_to_light_mode(LED_TYPE_DIAG, ledctl->reg_val[0]); ++} ++ ++static void accton_as7716_32x_led_loc_set(struct led_classdev *led_cdev, ++ enum led_brightness led_light_mode) ++{ ++ accton_as7716_32x_led_set(led_cdev, led_light_mode, LED_TYPE_LOC); ++} ++ ++static enum led_brightness accton_as7716_32x_led_loc_get(struct led_classdev *cdev) ++{ ++ accton_as7716_32x_led_update(); ++ return led_reg_val_to_light_mode(LED_TYPE_LOC, ledctl->reg_val[0]); ++} ++ ++static void accton_as7716_32x_led_auto_set(struct led_classdev *led_cdev, ++ enum led_brightness led_light_mode) ++{ ++} ++ ++static enum led_brightness accton_as7716_32x_led_auto_get(struct led_classdev *cdev) ++{ ++ return LED_MODE_AUTO; ++} ++ ++static struct led_classdev accton_as7716_32x_leds[] = { ++ [LED_TYPE_DIAG] = { ++ .name = "accton_as7716_32x_led::diag", ++ .default_trigger = "unused", ++ .brightness_set = accton_as7716_32x_led_diag_set, ++ .brightness_get = accton_as7716_32x_led_diag_get, ++ .flags = LED_CORE_SUSPENDRESUME, ++ .max_brightness = LED_MODE_RED, ++ }, ++ [LED_TYPE_LOC] = { ++ .name = "accton_as7716_32x_led::loc", ++ .default_trigger = "unused", ++ .brightness_set = accton_as7716_32x_led_loc_set, ++ .brightness_get = accton_as7716_32x_led_loc_get, ++ .flags = LED_CORE_SUSPENDRESUME, ++ .max_brightness = LED_MODE_BLUE, ++ }, ++ [LED_TYPE_FAN] = { ++ .name = "accton_as7716_32x_led::fan", ++ .default_trigger = "unused", ++ .brightness_set = accton_as7716_32x_led_auto_set, ++ .brightness_get = accton_as7716_32x_led_auto_get, ++ .flags = LED_CORE_SUSPENDRESUME, ++ .max_brightness = LED_MODE_AUTO, ++ }, ++ [LED_TYPE_PSU1] = { ++ .name = "accton_as7716_32x_led::psu1", ++ .default_trigger = "unused", ++ .brightness_set = accton_as7716_32x_led_auto_set, ++ .brightness_get = accton_as7716_32x_led_auto_get, ++ .flags = LED_CORE_SUSPENDRESUME, ++ .max_brightness = LED_MODE_AUTO, ++ }, ++ [LED_TYPE_PSU2] = { ++ .name = "accton_as7716_32x_led::psu2", ++ .default_trigger = "unused", ++ .brightness_set = accton_as7716_32x_led_auto_set, ++ .brightness_get = accton_as7716_32x_led_auto_get, ++ .flags = LED_CORE_SUSPENDRESUME, ++ .max_brightness = LED_MODE_AUTO, ++ }, ++}; ++ ++static int accton_as7716_32x_led_suspend(struct platform_device *dev, ++ pm_message_t state) ++{ ++ int i = 0; ++ ++ for (i = 0; i < ARRAY_SIZE(accton_as7716_32x_leds); i++) { ++ led_classdev_suspend(&accton_as7716_32x_leds[i]); ++ } ++ ++ return 0; ++} ++ ++static int accton_as7716_32x_led_resume(struct platform_device *dev) ++{ ++ int i = 0; ++ ++ for (i = 0; i < ARRAY_SIZE(accton_as7716_32x_leds); i++) { ++ led_classdev_resume(&accton_as7716_32x_leds[i]); ++ } ++ ++ return 0; ++} ++ ++static int accton_as7716_32x_led_probe(struct platform_device *pdev) ++{ ++ int ret, i; ++ ++ for (i = 0; i < ARRAY_SIZE(accton_as7716_32x_leds); i++) { ++ ret = led_classdev_register(&pdev->dev, &accton_as7716_32x_leds[i]); ++ ++ if (ret < 0) ++ break; ++ } ++ ++ /* Check if all LEDs were successfully registered */ ++ if (i != ARRAY_SIZE(accton_as7716_32x_leds)){ ++ int j; ++ ++ /* only unregister the LEDs that were successfully registered */ ++ for (j = 0; j < i; j++) { ++ led_classdev_unregister(&accton_as7716_32x_leds[i]); ++ } ++ } ++ ++ return ret; ++} ++ ++static int accton_as7716_32x_led_remove(struct platform_device *pdev) ++{ ++ int i; ++ ++ for (i = 0; i < ARRAY_SIZE(accton_as7716_32x_leds); i++) { ++ led_classdev_unregister(&accton_as7716_32x_leds[i]); ++ } ++ ++ return 0; ++} ++ ++static struct platform_driver accton_as7716_32x_led_driver = { ++ .probe = accton_as7716_32x_led_probe, ++ .remove = accton_as7716_32x_led_remove, ++ .suspend = accton_as7716_32x_led_suspend, ++ .resume = accton_as7716_32x_led_resume, ++ .driver = { ++ .name = DRVNAME, ++ .owner = THIS_MODULE, ++ }, ++}; ++ ++static int __init accton_as7716_32x_led_init(void) ++{ ++ int ret; ++ ++ extern int platform_accton_as7716_32x(void); ++ if (!platform_accton_as7716_32x()) { ++ return -ENODEV; ++ } ++ ++ ret = platform_driver_register(&accton_as7716_32x_led_driver); ++ if (ret < 0) { ++ goto exit; ++ } ++ ++ ledctl = kzalloc(sizeof(struct accton_as7716_32x_led_data), GFP_KERNEL); ++ if (!ledctl) { ++ ret = -ENOMEM; ++ platform_driver_unregister(&accton_as7716_32x_led_driver); ++ goto exit; ++ } ++ ++ mutex_init(&ledctl->update_lock); ++ ++ ledctl->pdev = platform_device_register_simple(DRVNAME, -1, NULL, 0); ++ if (IS_ERR(ledctl->pdev)) { ++ ret = PTR_ERR(ledctl->pdev); ++ platform_driver_unregister(&accton_as7716_32x_led_driver); ++ kfree(ledctl); ++ goto exit; ++ } ++ ++exit: ++ return ret; ++} ++ ++static void __exit accton_as7716_32x_led_exit(void) ++{ ++ platform_device_unregister(ledctl->pdev); ++ platform_driver_unregister(&accton_as7716_32x_led_driver); ++ kfree(ledctl); ++} ++ ++module_init(accton_as7716_32x_led_init); ++module_exit(accton_as7716_32x_led_exit); ++ ++MODULE_AUTHOR("Brandon Chuang "); ++MODULE_DESCRIPTION("accton_as7716_32x_led driver"); ++MODULE_LICENSE("GPL"); +diff --git a/drivers/misc/eeprom/Kconfig b/drivers/misc/eeprom/Kconfig +index c75227b..3ef5125 100644 +--- a/drivers/misc/eeprom/Kconfig ++++ b/drivers/misc/eeprom/Kconfig +@@ -135,7 +135,16 @@ config EEPROM_ACCTON_AS5812_54t_SFP + + This driver can also be built as a module. If so, the module will + be called accton_as5812_54t_sfp. +- ++ ++config EEPROM_ACCTON_AS7716_32x_SFP ++ tristate "Accton as7716 32x sfp" ++ depends on I2C && SENSORS_ACCTON_I2C_CPLD ++ help ++ If you say yes here you get support for Accton as7716 32x sfp. ++ ++ This driver can also be built as a module. If so, the module will ++ be called accton_as7716_32x_sfp. ++ + config EEPROM_93CX6 + tristate "EEPROM 93CX6 support" + help +diff --git a/drivers/misc/eeprom/Makefile b/drivers/misc/eeprom/Makefile +index 152a8bc..dd47dd2 100644 +--- a/drivers/misc/eeprom/Makefile ++++ b/drivers/misc/eeprom/Makefile +@@ -13,4 +13,5 @@ obj-$(CONFIG_EEPROM_ACCTON_AS7712_32x_SFP) += accton_as7712_32x_sfp.o + obj-$(CONFIG_EEPROM_ACCTON_AS5812_54x_SFP) += accton_as5812_54x_sfp.o + obj-$(CONFIG_EEPROM_ACCTON_AS6812_32x_SFP) += accton_as6812_32x_sfp.o + obj-$(CONFIG_EEPROM_ACCTON_AS5812_54t_SFP) += accton_as5812_54t_sfp.o ++obj-$(CONFIG_EEPROM_ACCTON_AS7716_32x_SFP) += accton_as7716_32x_sfp.o + obj-$(CONFIG_EEPROM_SFF_8436) += sff_8436_eeprom.o +diff --git a/drivers/misc/eeprom/accton_as7716_32x_sfp.c b/drivers/misc/eeprom/accton_as7716_32x_sfp.c +new file mode 100644 +index 0000000..432e9b7 +--- /dev/null ++++ b/drivers/misc/eeprom/accton_as7716_32x_sfp.c +@@ -0,0 +1,356 @@ ++/* ++ * An hwmon driver for accton as7716_32x sfp ++ * ++ * Copyright (C) 2014 Accton Technology Corporation. ++ * Brandon Chuang ++ * ++ * Based on ad7414.c ++ * Copyright 2006 Stefan Roese , DENX Software Engineering ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define BIT_INDEX(i) (1UL << (i)) ++ ++ ++/* Addresses scanned ++ */ ++static const unsigned short normal_i2c[] = { 0x50, I2C_CLIENT_END }; ++ ++/* Each client has this additional data ++ */ ++struct as7716_32x_sfp_data { ++ struct device *hwmon_dev; ++ struct mutex update_lock; ++ char valid; /* !=0 if registers are valid */ ++ unsigned long last_updated; /* In jiffies */ ++ int port; /* Front port index */ ++ char eeprom[256]; /* eeprom data */ ++ u32 is_present; /* present status */ ++}; ++ ++static struct as7716_32x_sfp_data *as7716_32x_sfp_update_device(struct device *dev); ++static ssize_t show_port_number(struct device *dev, struct device_attribute *da, char *buf); ++static ssize_t show_present(struct device *dev, struct device_attribute *da,char *buf); ++static ssize_t show_eeprom(struct device *dev, struct device_attribute *da, char *buf); ++extern int accton_i2c_cpld_read(unsigned short cpld_addr, u8 reg); ++extern int accton_i2c_cpld_write(unsigned short cpld_addr, u8 reg, u8 value); ++ ++enum as7716_32x_sfp_sysfs_attributes { ++ SFP_PORT_NUMBER, ++ SFP_IS_PRESENT, ++ SFP_IS_PRESENT_ALL, ++ SFP_EEPROM ++}; ++ ++/* sysfs attributes for hwmon ++ */ ++static SENSOR_DEVICE_ATTR(sfp_port_number, S_IRUGO, show_port_number, NULL, SFP_PORT_NUMBER); ++static SENSOR_DEVICE_ATTR(sfp_is_present, S_IRUGO, show_present, NULL, SFP_IS_PRESENT); ++static SENSOR_DEVICE_ATTR(sfp_is_present_all, S_IRUGO, show_present, NULL, SFP_IS_PRESENT_ALL); ++static SENSOR_DEVICE_ATTR(sfp_eeprom, S_IRUGO, show_eeprom, NULL, SFP_EEPROM); ++ ++static struct attribute *as7716_32x_sfp_attributes[] = { ++ &sensor_dev_attr_sfp_port_number.dev_attr.attr, ++ &sensor_dev_attr_sfp_is_present.dev_attr.attr, ++ &sensor_dev_attr_sfp_is_present_all.dev_attr.attr, ++ &sensor_dev_attr_sfp_eeprom.dev_attr.attr, ++ NULL ++}; ++ ++static ssize_t show_port_number(struct device *dev, struct device_attribute *da, ++ char *buf) ++{ ++ struct i2c_client *client = to_i2c_client(dev); ++ struct as7716_32x_sfp_data *data = i2c_get_clientdata(client); ++ ++ return sprintf(buf, "%d\n", data->port+1); ++} ++ ++/* Error-check the CPLD read results. */ ++#define VALIDATED_READ(_buf, _rv, _read_expr, _invert) \ ++do { \ ++ _rv = (_read_expr); \ ++ if(_rv < 0) { \ ++ return sprintf(_buf, "READ ERROR\n"); \ ++ } \ ++ if(_invert) { \ ++ _rv = ~_rv; \ ++ } \ ++ _rv &= 0xFF; \ ++} while(0) ++ ++static ssize_t show_present(struct device *dev, struct device_attribute *da, ++ char *buf) ++{ ++ struct sensor_device_attribute *attr = to_sensor_dev_attr(da); ++ ++ if(attr->index == SFP_IS_PRESENT_ALL) { ++ int values[4]; ++ /* ++ * Report the SFP_PRESENCE status for all ports. ++ */ ++ ++ /* SFP_PRESENT Ports 1-8 */ ++ VALIDATED_READ(buf, values[0], accton_i2c_cpld_read(0x60, 0x30), 1); ++ /* SFP_PRESENT Ports 9-16 */ ++ VALIDATED_READ(buf, values[1], accton_i2c_cpld_read(0x60, 0x31), 1); ++ /* SFP_PRESENT Ports 17-24 */ ++ VALIDATED_READ(buf, values[2], accton_i2c_cpld_read(0x60, 0x32), 1); ++ /* SFP_PRESENT Ports 25-32 */ ++ VALIDATED_READ(buf, values[3], accton_i2c_cpld_read(0x60, 0x33), 1); ++ ++ /* Return values 1 -> 32 in order */ ++ return sprintf(buf, "%.2x %.2x %.2x %.2x\n", ++ values[0], values[1], values[2], values[3]); ++ } ++ else { /* SFP_IS_PRESENT */ ++ struct as7716_32x_sfp_data *data = as7716_32x_sfp_update_device(dev); ++ ++ if (!data->valid) { ++ return -EIO; ++ } ++ ++ return sprintf(buf, "%d\n", data->is_present); ++ } ++} ++ ++static ssize_t show_eeprom(struct device *dev, struct device_attribute *da, ++ char *buf) ++{ ++ struct as7716_32x_sfp_data *data = as7716_32x_sfp_update_device(dev); ++ ++ if (!data->valid) { ++ return 0; ++ } ++ ++ if (!data->is_present) { ++ return 0; ++ } ++ ++ memcpy(buf, data->eeprom, sizeof(data->eeprom)); ++ ++ return sizeof(data->eeprom); ++} ++ ++static const struct attribute_group as7716_32x_sfp_group = { ++ .attrs = as7716_32x_sfp_attributes, ++}; ++ ++static int as7716_32x_sfp_probe(struct i2c_client *client, ++ const struct i2c_device_id *dev_id) ++{ ++ struct as7716_32x_sfp_data *data; ++ int status; ++ ++ if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) { ++ status = -EIO; ++ goto exit; ++ } ++ ++ data = kzalloc(sizeof(struct as7716_32x_sfp_data), GFP_KERNEL); ++ if (!data) { ++ status = -ENOMEM; ++ goto exit; ++ } ++ ++ mutex_init(&data->update_lock); ++ data->port = dev_id->driver_data; ++ i2c_set_clientdata(client, data); ++ ++ dev_info(&client->dev, "chip found\n"); ++ ++ /* Register sysfs hooks */ ++ status = sysfs_create_group(&client->dev.kobj, &as7716_32x_sfp_group); ++ if (status) { ++ goto exit_free; ++ } ++ ++ data->hwmon_dev = hwmon_device_register(&client->dev); ++ if (IS_ERR(data->hwmon_dev)) { ++ status = PTR_ERR(data->hwmon_dev); ++ goto exit_remove; ++ } ++ ++ dev_info(&client->dev, "%s: sfp '%s'\n", ++ dev_name(data->hwmon_dev), client->name); ++ ++ return 0; ++ ++exit_remove: ++ sysfs_remove_group(&client->dev.kobj, &as7716_32x_sfp_group); ++exit_free: ++ kfree(data); ++exit: ++ ++ return status; ++} ++ ++static int as7716_32x_sfp_remove(struct i2c_client *client) ++{ ++ struct as7716_32x_sfp_data *data = i2c_get_clientdata(client); ++ ++ hwmon_device_unregister(data->hwmon_dev); ++ sysfs_remove_group(&client->dev.kobj, &as7716_32x_sfp_group); ++ kfree(data); ++ ++ return 0; ++} ++ ++enum port_numbers { ++as7716_32x_sfp1, as7716_32x_sfp2, as7716_32x_sfp3, as7716_32x_sfp4, ++as7716_32x_sfp5, as7716_32x_sfp6, as7716_32x_sfp7, as7716_32x_sfp8, ++as7716_32x_sfp9, as7716_32x_sfp10,as7716_32x_sfp11,as7716_32x_sfp12, ++as7716_32x_sfp13,as7716_32x_sfp14,as7716_32x_sfp15,as7716_32x_sfp16, ++as7716_32x_sfp17,as7716_32x_sfp18,as7716_32x_sfp19,as7716_32x_sfp20, ++as7716_32x_sfp21,as7716_32x_sfp22,as7716_32x_sfp23,as7716_32x_sfp24, ++as7716_32x_sfp25,as7716_32x_sfp26,as7716_32x_sfp27,as7716_32x_sfp28, ++as7716_32x_sfp29,as7716_32x_sfp30,as7716_32x_sfp31,as7716_32x_sfp32 ++}; ++ ++static const struct i2c_device_id as7716_32x_sfp_id[] = { ++{ "as7716_32x_sfp1", as7716_32x_sfp1 }, { "as7716_32x_sfp2", as7716_32x_sfp2 }, ++{ "as7716_32x_sfp3", as7716_32x_sfp3 }, { "as7716_32x_sfp4", as7716_32x_sfp4 }, ++{ "as7716_32x_sfp5", as7716_32x_sfp5 }, { "as7716_32x_sfp6", as7716_32x_sfp6 }, ++{ "as7716_32x_sfp7", as7716_32x_sfp7 }, { "as7716_32x_sfp8", as7716_32x_sfp8 }, ++{ "as7716_32x_sfp9", as7716_32x_sfp9 }, { "as7716_32x_sfp10", as7716_32x_sfp10 }, ++{ "as7716_32x_sfp11", as7716_32x_sfp11 }, { "as7716_32x_sfp12", as7716_32x_sfp12 }, ++{ "as7716_32x_sfp13", as7716_32x_sfp13 }, { "as7716_32x_sfp14", as7716_32x_sfp14 }, ++{ "as7716_32x_sfp15", as7716_32x_sfp15 }, { "as7716_32x_sfp16", as7716_32x_sfp16 }, ++{ "as7716_32x_sfp17", as7716_32x_sfp17 }, { "as7716_32x_sfp18", as7716_32x_sfp18 }, ++{ "as7716_32x_sfp19", as7716_32x_sfp19 }, { "as7716_32x_sfp20", as7716_32x_sfp20 }, ++{ "as7716_32x_sfp21", as7716_32x_sfp21 }, { "as7716_32x_sfp22", as7716_32x_sfp22 }, ++{ "as7716_32x_sfp23", as7716_32x_sfp23 }, { "as7716_32x_sfp24", as7716_32x_sfp24 }, ++{ "as7716_32x_sfp25", as7716_32x_sfp25 }, { "as7716_32x_sfp26", as7716_32x_sfp26 }, ++{ "as7716_32x_sfp27", as7716_32x_sfp27 }, { "as7716_32x_sfp28", as7716_32x_sfp28 }, ++{ "as7716_32x_sfp29", as7716_32x_sfp29 }, { "as7716_32x_sfp30", as7716_32x_sfp30 }, ++{ "as7716_32x_sfp31", as7716_32x_sfp31 }, { "as7716_32x_sfp32", as7716_32x_sfp32 }, ++{} ++}; ++MODULE_DEVICE_TABLE(i2c, as7716_32x_sfp_id); ++ ++static struct i2c_driver as7716_32x_sfp_driver = { ++ .class = I2C_CLASS_HWMON, ++ .driver = { ++ .name = "as7716_32x_sfp", ++ }, ++ .probe = as7716_32x_sfp_probe, ++ .remove = as7716_32x_sfp_remove, ++ .id_table = as7716_32x_sfp_id, ++ .address_list = normal_i2c, ++}; ++ ++static int as7716_32x_sfp_read_block(struct i2c_client *client, u8 command, u8 *data, ++ int data_len) ++{ ++ int result = i2c_smbus_read_i2c_block_data(client, command, data_len, data); ++ ++ if (unlikely(result < 0)) ++ goto abort; ++ if (unlikely(result != data_len)) { ++ result = -EIO; ++ goto abort; ++ } ++ ++ result = 0; ++ ++abort: ++ return result; ++} ++ ++static struct as7716_32x_sfp_data *as7716_32x_sfp_update_device(struct device *dev) ++{ ++ struct i2c_client *client = to_i2c_client(dev); ++ struct as7716_32x_sfp_data *data = i2c_get_clientdata(client); ++ ++ mutex_lock(&data->update_lock); ++ ++ if (time_after(jiffies, data->last_updated + HZ + HZ / 2) ++ || !data->valid) { ++ int status = -1; ++ int i = 0; ++ u8 cpld_reg = 0x30 + (data->port/8); ++ ++ data->valid = 0; ++ ++ /* Read present status of the specified port number */ ++ data->is_present = 0; ++ status = accton_i2c_cpld_read(0x60, cpld_reg); ++ ++ if (status < 0) { ++ dev_dbg(&client->dev, "cpld(0x60) reg(0x%x) err %d\n", cpld_reg, status); ++ goto exit; ++ } ++ ++ data->is_present = (status & (1 << (data->port % 8))) ? 0 : 1; ++ ++ /* Read eeprom data based on port number */ ++ memset(data->eeprom, 0, sizeof(data->eeprom)); ++ ++ /* Check if the port is present */ ++ if (data->is_present) { ++ /* read eeprom */ ++ for (i = 0; i < sizeof(data->eeprom)/I2C_SMBUS_BLOCK_MAX; i++) { ++ status = as7716_32x_sfp_read_block(client, i*I2C_SMBUS_BLOCK_MAX, ++ data->eeprom+(i*I2C_SMBUS_BLOCK_MAX), ++ I2C_SMBUS_BLOCK_MAX); ++ if (status < 0) { ++ dev_dbg(&client->dev, "unable to read eeprom from port(%d)\n", data->port); ++ goto exit; ++ } ++ } ++ } ++ ++ data->last_updated = jiffies; ++ data->valid = 1; ++ } ++ ++exit: ++ mutex_unlock(&data->update_lock); ++ ++ return data; ++} ++ ++static int __init as7716_32x_sfp_init(void) ++{ ++ extern int platform_accton_as7716_32x(void); ++ if (!platform_accton_as7716_32x()) { ++ return -ENODEV; ++ } ++ ++ return i2c_add_driver(&as7716_32x_sfp_driver); ++} ++ ++static void __exit as7716_32x_sfp_exit(void) ++{ ++ i2c_del_driver(&as7716_32x_sfp_driver); ++} ++ ++MODULE_AUTHOR("Brandon Chuang "); ++MODULE_DESCRIPTION("accton as7716_32x_sfp driver"); ++MODULE_LICENSE("GPL"); ++ ++module_init(as7716_32x_sfp_init); ++module_exit(as7716_32x_sfp_exit); + diff --git a/packages/base/any/kernels/3.2.65-1+deb7u2/patches/series b/packages/base/any/kernels/3.2.65-1+deb7u2/patches/series index f958b6b7..3b224736 100644 --- a/packages/base/any/kernels/3.2.65-1+deb7u2/patches/series +++ b/packages/base/any/kernels/3.2.65-1+deb7u2/patches/series @@ -246,3 +246,6 @@ platform-accton-as6812_32x-device-drivers.patch platform-accton-as5812_54t-device-drivers.patch driver-mfd-lpc-ich.patch driver-watchdog-itco-wd.patch +platform-accton-as7716_32x-device-drivers.patch +driver-broadcom-tigon3.patch +mgmt-port-init-config.patch From da17a8a6d08ff7f943787ef0a12f3a87fba256e6 Mon Sep 17 00:00:00 2001 From: Lewis Kang Date: Wed, 20 Apr 2016 12:11:36 +0800 Subject: [PATCH 04/62] add as7716-32x needed kernel config (port from ONL1.0) --- .../3.2.65-1+deb7u2/configs/x86_64-all/x86_64-all.config | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/packages/base/any/kernels/3.2.65-1+deb7u2/configs/x86_64-all/x86_64-all.config b/packages/base/any/kernels/3.2.65-1+deb7u2/configs/x86_64-all/x86_64-all.config index 49879a00..129d65a1 100644 --- a/packages/base/any/kernels/3.2.65-1+deb7u2/configs/x86_64-all/x86_64-all.config +++ b/packages/base/any/kernels/3.2.65-1+deb7u2/configs/x86_64-all/x86_64-all.config @@ -1054,6 +1054,7 @@ CONFIG_EEPROM_ACCTON_AS7712_32x_SFP=y CONFIG_EEPROM_ACCTON_AS5812_54x_SFP=y CONFIG_EEPROM_ACCTON_AS6812_32x_SFP=y CONFIG_EEPROM_ACCTON_AS5812_54t_SFP=y +CONFIG_EEPROM_ACCTON_AS7716_32x_SFP=y CONFIG_EEPROM_93CX6=y # CONFIG_EEPROM_93XX46 is not set CONFIG_EEPROM_SFF_8436=y @@ -1927,6 +1928,8 @@ CONFIG_SENSORS_ACCTON_AS6812_32x_FAN=y CONFIG_SENSORS_ACCTON_AS6812_32x_PSU=y CONFIG_SENSORS_ACCTON_AS5812_54t_FAN=y CONFIG_SENSORS_ACCTON_AS5812_54t_PSU=y +CONFIG_SENSORS_ACCTON_AS7716_32x_FAN=y +CONFIG_SENSORS_ACCTON_AS7716_32x_PSU=y # # ACPI drivers @@ -2306,6 +2309,7 @@ CONFIG_LEDS_ACCTON_AS7712_32x=y CONFIG_LEDS_ACCTON_AS5812_54x=y CONFIG_LEDS_ACCTON_AS6812_32x=y CONFIG_LEDS_ACCTON_AS5812_54t=y +CONFIG_LEDS_ACCTON_AS7716_32x=y # CONFIG_LEDS_LM3530 is not set # CONFIG_LEDS_PCA9532 is not set # CONFIG_LEDS_GPIO is not set From bba31e1006016884a2cc1110f647fbc1433a3e66 Mon Sep 17 00:00:00 2001 From: Lewis Kang Date: Mon, 25 Apr 2016 13:43:12 +0800 Subject: [PATCH 05/62] 1. use BM instead of SM for platform matching. 2. resolve conflicts because of as5512 merging in upstream. 1. Use Baseboard Manufacturer(BM) instead of System Manufacturer(SM) and plus Product Name for platform matching 2. The as5512 support merging in upstream causes conflicts for merging of this pull request, so we need to update the conflicted files. --- .../configs/x86_64-all/x86_64-all.config | 4 + ...orm-accton-as5512_54x-device-drivers.patch | 2608 +++++++++++++++++ ...orm-accton-as5712_54x-device-drivers.patch | 2 +- ...orm-accton-as5812_54t-device-drivers.patch | 2 +- ...orm-accton-as5812_54x-device-drivers.patch | 2 +- ...orm-accton-as6712_32x-device-drivers.patch | 2 +- ...orm-accton-as6812_32x-device-drivers.patch | 2 +- ...orm-accton-as7512_32x-device-drivers.patch | 2 +- ...orm-accton-as7712_32x-device-drivers.patch | 2 +- ...orm-accton-as7716_32x-device-drivers.patch | 95 +- .../kernels/3.2.65-1+deb7u2/patches/series | 1 + 11 files changed, 2664 insertions(+), 58 deletions(-) create mode 100644 packages/base/any/kernels/3.2.65-1+deb7u2/patches/platform-accton-as5512_54x-device-drivers.patch diff --git a/packages/base/any/kernels/3.2.65-1+deb7u2/configs/x86_64-all/x86_64-all.config b/packages/base/any/kernels/3.2.65-1+deb7u2/configs/x86_64-all/x86_64-all.config index 129d65a1..90101507 100644 --- a/packages/base/any/kernels/3.2.65-1+deb7u2/configs/x86_64-all/x86_64-all.config +++ b/packages/base/any/kernels/3.2.65-1+deb7u2/configs/x86_64-all/x86_64-all.config @@ -1047,6 +1047,7 @@ CONFIG_EEPROM_AT24=y CONFIG_EEPROM_AT25=y # CONFIG_EEPROM_LEGACY is not set # CONFIG_EEPROM_MAX6875 is not set +CONFIG_EEPROM_ACCTON_AS5512_54X_SFP=y CONFIG_EEPROM_ACCTON_AS5712_54x_SFP=y CONFIG_EEPROM_ACCTON_AS6712_32x_SFP=y CONFIG_EEPROM_ACCTON_AS7512_32x_SFP=y @@ -1912,6 +1913,8 @@ CONFIG_SENSORS_W83781D=y # CONFIG_SENSORS_APPLESMC is not set # CONFIG_SENSORS_QUANTA_LY_HWMON is not set CONFIG_SENSORS_CPR_4011_4MXX=y +CONFIG_SENSORS_ACCTON_AS5512_54X_PSU=y +CONFIG_SENSORS_ACCTON_AS5512_54X_FAN=y CONFIG_SENSORS_ACCTON_AS5712_54x_FAN=y CONFIG_SENSORS_ACCTON_AS5712_54x_PSU=y CONFIG_SENSORS_ACCTON_AS6712_32x_FAN=y @@ -2302,6 +2305,7 @@ CONFIG_LEDS_CLASS=y # # LED drivers # +CONFIG_LEDS_ACCTON_AS5512_54X=y CONFIG_LEDS_ACCTON_AS5712_54x=y CONFIG_LEDS_ACCTON_AS6712_32x=y CONFIG_LEDS_ACCTON_AS7512_32x=y diff --git a/packages/base/any/kernels/3.2.65-1+deb7u2/patches/platform-accton-as5512_54x-device-drivers.patch b/packages/base/any/kernels/3.2.65-1+deb7u2/patches/platform-accton-as5512_54x-device-drivers.patch new file mode 100644 index 00000000..da1cad21 --- /dev/null +++ b/packages/base/any/kernels/3.2.65-1+deb7u2/patches/platform-accton-as5512_54x-device-drivers.patch @@ -0,0 +1,2608 @@ +Device driver patches for accton as5512 (fan/psu/cpld/led/sfp) + +diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig +index 89c619d..968bd5f 100644 +--- a/drivers/hwmon/Kconfig ++++ b/drivers/hwmon/Kconfig +@@ -1574,6 +1574,24 @@ config SENSORS_ACCTON_AS5812_54t_PSU + This driver can also be built as a module. If so, the module will + be called accton_as5812_54t_psu. + ++config SENSORS_ACCTON_AS5512_54X_PSU ++ tristate "Accton as5512 54x psu" ++ depends on I2C && SENSORS_ACCTON_I2C_CPLD ++ help ++ If you say yes here you get support for Accton as5512 54x psu. ++ ++ This driver can also be built as a module. If so, the module will ++ be called accton_as5512_54x_psu. ++ ++config SENSORS_ACCTON_AS5512_54X_FAN ++ tristate "Accton as5512 54x fan" ++ depends on I2C && SENSORS_ACCTON_I2C_CPLD ++ help ++ If you say yes here you get support for Accton as5512 54x fan. ++ ++ This driver can also be built as a module. If so, the module will ++ be called accton_as5512_54x_fan. ++ + if ACPI + + comment "ACPI drivers" +diff --git a/drivers/hwmon/Makefile b/drivers/hwmon/Makefile +index de922bc..b8ee7b0 100644 +--- a/drivers/hwmon/Makefile ++++ b/drivers/hwmon/Makefile +@@ -36,6 +36,8 @@ obj-$(CONFIG_SENSORS_ACCTON_AS6812_32x_FAN) += accton_as6812_32x_fan.o + obj-$(CONFIG_SENSORS_ACCTON_AS6812_32x_PSU) += accton_as6812_32x_psu.o + obj-$(CONFIG_SENSORS_ACCTON_AS5812_54t_FAN) += accton_as5812_54t_fan.o + obj-$(CONFIG_SENSORS_ACCTON_AS5812_54t_PSU) += accton_as5812_54t_psu.o ++obj-$(CONFIG_SENSORS_ACCTON_AS5512_54X_PSU) += accton_as5512_54x_psu.o ++obj-$(CONFIG_SENSORS_ACCTON_AS5512_54X_FAN) += accton_as5512_54x_fan.o + obj-$(CONFIG_SENSORS_AD7314) += ad7314.o + obj-$(CONFIG_SENSORS_AD7414) += ad7414.o + obj-$(CONFIG_SENSORS_AD7418) += ad7418.o +diff --git a/drivers/hwmon/accton_as5512_54x_fan.c b/drivers/hwmon/accton_as5512_54x_fan.c +new file mode 100644 +index 0000000..67e3dd6 +--- /dev/null ++++ b/drivers/hwmon/accton_as5512_54x_fan.c +@@ -0,0 +1,454 @@ ++/* ++ * A hwmon driver for the Accton as5512 54x fan control ++ * ++ * Copyright (C) 2015 Accton Technology Corporation. ++ * Brandon Chuang ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define FAN_MAX_NUMBER 5 ++#define FAN_SPEED_CPLD_TO_RPM_STEP 150 ++#define FAN_SPEED_PRECENT_TO_CPLD_STEP 5 ++#define FAN_DUTY_CYCLE_MIN 0 ++#define FAN_DUTY_CYCLE_MAX 100 /* 100% */ ++ ++#define CPLD_REG_FAN_STATUS_OFFSET 0x0C ++#define CPLD_REG_FANR_STATUS_OFFSET 0x1E ++#define CPLD_REG_FAN_DIRECTION_OFFSET 0x1D ++ ++#define CPLD_FAN1_REG_SPEED_OFFSET 0x10 ++#define CPLD_FAN2_REG_SPEED_OFFSET 0x11 ++#define CPLD_FAN3_REG_SPEED_OFFSET 0x12 ++#define CPLD_FAN4_REG_SPEED_OFFSET 0x13 ++#define CPLD_FAN5_REG_SPEED_OFFSET 0x14 ++ ++#define CPLD_FANR1_REG_SPEED_OFFSET 0x18 ++#define CPLD_FANR2_REG_SPEED_OFFSET 0x19 ++#define CPLD_FANR3_REG_SPEED_OFFSET 0x1A ++#define CPLD_FANR4_REG_SPEED_OFFSET 0x1B ++#define CPLD_FANR5_REG_SPEED_OFFSET 0x1C ++ ++#define CPLD_REG_FAN_PWM_CYCLE_OFFSET 0x0D ++ ++#define CPLD_FAN1_INFO_BIT_MASK 0x01 ++#define CPLD_FAN2_INFO_BIT_MASK 0x02 ++#define CPLD_FAN3_INFO_BIT_MASK 0x04 ++#define CPLD_FAN4_INFO_BIT_MASK 0x08 ++#define CPLD_FAN5_INFO_BIT_MASK 0x10 ++ ++#define PROJECT_NAME ++ ++#define LOCAL_DEBUG 0 ++ ++static struct accton_as5512_54x_fan *fan_data = NULL; ++ ++struct accton_as5512_54x_fan { ++ struct platform_device *pdev; ++ struct device *hwmon_dev; ++ struct mutex update_lock; ++ char valid; /* != 0 if registers are valid */ ++ unsigned long last_updated; /* In jiffies */ ++ u8 status[FAN_MAX_NUMBER]; /* inner first fan status */ ++ u32 speed[FAN_MAX_NUMBER]; /* inner first fan speed */ ++ u8 direction[FAN_MAX_NUMBER]; /* reconrd the direction of inner first and second fans */ ++ u32 duty_cycle[FAN_MAX_NUMBER]; /* control the speed of inner first and second fans */ ++ u8 r_status[FAN_MAX_NUMBER]; /* inner second fan status */ ++ u32 r_speed[FAN_MAX_NUMBER]; /* inner second fan speed */ ++}; ++ ++/*******************/ ++#define MAKE_FAN_MASK_OR_REG(name,type) \ ++ CPLD_FAN##type##1_##name, \ ++ CPLD_FAN##type##2_##name, \ ++ CPLD_FAN##type##3_##name, \ ++ CPLD_FAN##type##4_##name, \ ++ CPLD_FAN##type##5_##name, ++ ++/* fan related data ++ */ ++static const u8 fan_info_mask[] = { ++ MAKE_FAN_MASK_OR_REG(INFO_BIT_MASK,) ++}; ++ ++static const u8 fan_speed_reg[] = { ++ MAKE_FAN_MASK_OR_REG(REG_SPEED_OFFSET,) ++}; ++ ++static const u8 fanr_speed_reg[] = { ++ MAKE_FAN_MASK_OR_REG(REG_SPEED_OFFSET,R) ++}; ++ ++/*******************/ ++#define DEF_FAN_SET(id) \ ++ FAN##id##_FAULT, \ ++ FAN##id##_SPEED, \ ++ FAN##id##_DUTY_CYCLE, \ ++ FAN##id##_DIRECTION, \ ++ FANR##id##_FAULT, \ ++ FANR##id##_SPEED, ++ ++enum sysfs_fan_attributes { ++ DEF_FAN_SET(1) ++ DEF_FAN_SET(2) ++ DEF_FAN_SET(3) ++ DEF_FAN_SET(4) ++ DEF_FAN_SET(5) ++}; ++/*******************/ ++static void accton_as5512_54x_fan_update_device(struct device *dev); ++static int accton_as5512_54x_fan_read_value(u8 reg); ++static int accton_as5512_54x_fan_write_value(u8 reg, u8 value); ++ ++static ssize_t fan_set_duty_cycle(struct device *dev, ++ struct device_attribute *da,const char *buf, size_t count); ++static ssize_t fan_show_value(struct device *dev, ++ struct device_attribute *da, char *buf); ++ ++extern int accton_i2c_cpld_read(unsigned short cpld_addr, u8 reg); ++extern int accton_i2c_cpld_write(unsigned short cpld_addr, u8 reg, u8 value); ++ ++ ++/*******************/ ++#define _MAKE_SENSOR_DEVICE_ATTR(prj, id) \ ++ static SENSOR_DEVICE_ATTR(prj##fan##id##_fault, S_IRUGO, fan_show_value, NULL, FAN##id##_FAULT); \ ++ static SENSOR_DEVICE_ATTR(prj##fan##id##_speed_rpm, S_IRUGO, fan_show_value, NULL, FAN##id##_SPEED); \ ++ static SENSOR_DEVICE_ATTR(prj##fan##id##_direction, S_IRUGO, fan_show_value, NULL, FAN##id##_DIRECTION); \ ++ static SENSOR_DEVICE_ATTR(prj##fanr##id##_fault, S_IRUGO, fan_show_value, NULL, FANR##id##_FAULT); \ ++ static SENSOR_DEVICE_ATTR(prj##fanr##id##_speed_rpm, S_IRUGO, fan_show_value, NULL, FANR##id##_SPEED); ++ ++#define MAKE_SENSOR_DEVICE_ATTR(prj,id) _MAKE_SENSOR_DEVICE_ATTR(prj,id) ++ ++#define _MAKE_SENSOR_DEVICE_ATTR_FAN_DUTY(prj,id) \ ++ static SENSOR_DEVICE_ATTR(prj##fan##id##_duty_cycle_percentage, S_IWUSR | S_IRUGO, fan_show_value, \ ++ fan_set_duty_cycle, FAN1_DUTY_CYCLE); ++ ++#define MAKE_SENSOR_DEVICE_ATTR_FAN_DUTY(prj,id) _MAKE_SENSOR_DEVICE_ATTR_FAN_DUTY(prj,id) ++ ++ ++MAKE_SENSOR_DEVICE_ATTR(PROJECT_NAME, 1) ++MAKE_SENSOR_DEVICE_ATTR(PROJECT_NAME, 2) ++MAKE_SENSOR_DEVICE_ATTR(PROJECT_NAME, 3) ++MAKE_SENSOR_DEVICE_ATTR(PROJECT_NAME, 4) ++MAKE_SENSOR_DEVICE_ATTR(PROJECT_NAME, 5) ++MAKE_SENSOR_DEVICE_ATTR_FAN_DUTY(PROJECT_NAME,) ++/*******************/ ++ ++#define _MAKE_FAN_ATTR(prj, id) \ ++ &sensor_dev_attr_##prj##fan##id##_fault.dev_attr.attr, \ ++ &sensor_dev_attr_##prj##fan##id##_speed_rpm.dev_attr.attr, \ ++ &sensor_dev_attr_##prj##fan##id##_direction.dev_attr.attr, \ ++ &sensor_dev_attr_##prj##fanr##id##_fault.dev_attr.attr, \ ++ &sensor_dev_attr_##prj##fanr##id##_speed_rpm.dev_attr.attr, ++ ++#define MAKE_FAN_ATTR(prj, id) _MAKE_FAN_ATTR(prj, id) ++ ++#define _MAKE_FAN_DUTY_ATTR(prj, id) \ ++ &sensor_dev_attr_##prj##fan##id##_duty_cycle_percentage.dev_attr.attr, ++ ++#define MAKE_FAN_DUTY_ATTR(prj, id) _MAKE_FAN_DUTY_ATTR(prj, id) ++ ++static struct attribute *accton_as5512_54x_fan_attributes[] = { ++ /* fan related attributes */ ++ MAKE_FAN_ATTR(PROJECT_NAME,1) ++ MAKE_FAN_ATTR(PROJECT_NAME,2) ++ MAKE_FAN_ATTR(PROJECT_NAME,3) ++ MAKE_FAN_ATTR(PROJECT_NAME,4) ++ MAKE_FAN_ATTR(PROJECT_NAME,5) ++ MAKE_FAN_DUTY_ATTR(PROJECT_NAME,) ++ NULL ++}; ++/*******************/ ++ ++/* fan related functions ++ */ ++static ssize_t fan_show_value(struct device *dev, struct device_attribute *da, ++ char *buf) ++{ ++ struct sensor_device_attribute *attr = to_sensor_dev_attr(da); ++ ssize_t ret = 0; ++ int data_index, type_index; ++ ++ accton_as5512_54x_fan_update_device(dev); ++ ++ if (fan_data->valid == 0) { ++ return ret; ++ } ++ ++ type_index = attr->index%FAN2_FAULT; ++ data_index = attr->index/FAN2_FAULT; ++ ++ switch (type_index) { ++ case FAN1_FAULT: ++ ret = sprintf(buf, "%d\n", fan_data->status[data_index]); ++ if (LOCAL_DEBUG) ++ printk ("[Check !!][%s][%d][type->index=%d][data->index=%d]\n", __FUNCTION__, __LINE__, type_index, data_index); ++ break; ++ case FAN1_SPEED: ++ ret = sprintf(buf, "%d\n", fan_data->speed[data_index]); ++ if (LOCAL_DEBUG) ++ printk ("[Check !!][%s][%d][type->index=%d][data->index=%d]\n", __FUNCTION__, __LINE__, type_index, data_index); ++ break; ++ case FAN1_DUTY_CYCLE: ++ ret = sprintf(buf, "%d\n", fan_data->duty_cycle[data_index]); ++ if (LOCAL_DEBUG) ++ printk ("[Check !!][%s][%d][type->index=%d][data->index=%d]\n", __FUNCTION__, __LINE__, type_index, data_index); ++ break; ++ case FAN1_DIRECTION: ++ ret = sprintf(buf, "%d\n", fan_data->direction[data_index]); /* presnet, need to modify*/ ++ if (LOCAL_DEBUG) ++ printk ("[Check !!][%s][%d][type->index=%d][data->index=%d]\n", __FUNCTION__, __LINE__, type_index, data_index); ++ break; ++ case FANR1_FAULT: ++ ret = sprintf(buf, "%d\n", fan_data->r_status[data_index]); ++ if (LOCAL_DEBUG) ++ printk ("[Check !!][%s][%d][type->index=%d][data->index=%d]\n", __FUNCTION__, __LINE__, type_index, data_index); ++ break; ++ case FANR1_SPEED: ++ ret = sprintf(buf, "%d\n", fan_data->r_speed[data_index]); ++ if (LOCAL_DEBUG) ++ printk ("[Check !!][%s][%d][type->index=%d][data->index=%d]\n", __FUNCTION__, __LINE__, type_index, data_index); ++ break; ++ default: ++ if (LOCAL_DEBUG) ++ printk ("[Check !!][%s][%d] \n", __FUNCTION__, __LINE__); ++ break; ++ } ++ ++ return ret; ++} ++/*******************/ ++static ssize_t fan_set_duty_cycle(struct device *dev, struct device_attribute *da, ++ const char *buf, size_t count) { ++ ++ int error, value; ++ ++ error = kstrtoint(buf, 10, &value); ++ if (error) ++ return error; ++ ++ if (value < FAN_DUTY_CYCLE_MIN || value > FAN_DUTY_CYCLE_MAX) ++ return -EINVAL; ++ ++ accton_as5512_54x_fan_write_value(CPLD_REG_FAN_PWM_CYCLE_OFFSET, value/FAN_SPEED_PRECENT_TO_CPLD_STEP); ++ ++ fan_data->valid = 0; ++ ++ return count; ++} ++ ++static const struct attribute_group accton_as5512_54x_fan_group = { ++ .attrs = accton_as5512_54x_fan_attributes, ++}; ++ ++static int accton_as5512_54x_fan_read_value(u8 reg) ++{ ++ return accton_i2c_cpld_read(0x60, reg); ++} ++ ++static int accton_as5512_54x_fan_write_value(u8 reg, u8 value) ++{ ++ return accton_i2c_cpld_write(0x60, reg, value); ++} ++ ++static void accton_as5512_54x_fan_update_device(struct device *dev) ++{ ++ int speed, r_speed, fault, r_fault, ctrl_speed, direction; ++ int i; ++ ++ mutex_lock(&fan_data->update_lock); ++ ++ if (LOCAL_DEBUG) ++ printk ("Starting accton_as5512_54x_fan update \n"); ++ ++ if (!(time_after(jiffies, fan_data->last_updated + HZ + HZ / 2) || !fan_data->valid)) { ++ /* do nothing */ ++ goto _exit; ++ } ++ ++ fan_data->valid = 0; ++ ++ if (LOCAL_DEBUG) ++ printk ("Starting accton_as5512_54x_fan update 2 \n"); ++ ++ fault = accton_as5512_54x_fan_read_value(CPLD_REG_FAN_STATUS_OFFSET); ++ r_fault = accton_as5512_54x_fan_read_value(CPLD_REG_FANR_STATUS_OFFSET); ++ direction = accton_as5512_54x_fan_read_value(CPLD_REG_FAN_DIRECTION_OFFSET); ++ ctrl_speed = accton_as5512_54x_fan_read_value(CPLD_REG_FAN_PWM_CYCLE_OFFSET); ++ ++ if ( (fault < 0) || (r_fault < 0) || (direction < 0) || (ctrl_speed < 0) ) ++ { ++ if (LOCAL_DEBUG) ++ printk ("[Error!!][%s][%d] \n", __FUNCTION__, __LINE__); ++ goto _exit; /* error */ ++ } ++ ++ if (LOCAL_DEBUG) ++ printk ("[fan:] fault:%d, r_fault=%d, direction=%d, ctrl_speed=%d \n",fault, r_fault, direction, ctrl_speed); ++ ++ for (i=0; istatus[i] = (fault & fan_info_mask[i]) >> i; ++ if (LOCAL_DEBUG) ++ printk ("[fan%d:] fail=%d \n",i, fan_data->status[i]); ++ ++ fan_data->r_status[i] = (r_fault & fan_info_mask[i]) >> i; ++ fan_data->direction[i] = (direction & fan_info_mask[i]) >> i; ++ fan_data->duty_cycle[i] = ctrl_speed * FAN_SPEED_PRECENT_TO_CPLD_STEP; ++ ++ /* fan speed ++ */ ++ speed = accton_as5512_54x_fan_read_value(fan_speed_reg[i]); ++ r_speed = accton_as5512_54x_fan_read_value(fanr_speed_reg[i]); ++ if ( (speed < 0) || (r_speed < 0) ) ++ { ++ if (LOCAL_DEBUG) ++ printk ("[Error!!][%s][%d] \n", __FUNCTION__, __LINE__); ++ goto _exit; /* error */ ++ } ++ ++ if (LOCAL_DEBUG) ++ printk ("[fan%d:] speed:%d, r_speed=%d \n", i, speed, r_speed); ++ ++ fan_data->speed[i] = speed * FAN_SPEED_CPLD_TO_RPM_STEP; ++ fan_data->r_speed[i] = r_speed * FAN_SPEED_CPLD_TO_RPM_STEP; ++ } ++ ++ /* finish to update */ ++ fan_data->last_updated = jiffies; ++ fan_data->valid = 1; ++ ++_exit: ++ mutex_unlock(&fan_data->update_lock); ++} ++ ++static int accton_as5512_54x_fan_probe(struct platform_device *pdev) ++{ ++ int status = -1; ++ ++ /* Register sysfs hooks */ ++ status = sysfs_create_group(&pdev->dev.kobj, &accton_as5512_54x_fan_group); ++ if (status) { ++ goto exit; ++ ++ } ++ ++ fan_data->hwmon_dev = hwmon_device_register(&pdev->dev); ++ if (IS_ERR(fan_data->hwmon_dev)) { ++ status = PTR_ERR(fan_data->hwmon_dev); ++ goto exit_remove; ++ } ++ ++ dev_info(&pdev->dev, "accton_as5512_54x_fan\n"); ++ ++ return 0; ++ ++exit_remove: ++ sysfs_remove_group(&pdev->dev.kobj, &accton_as5512_54x_fan_group); ++exit: ++ return status; ++} ++ ++static int accton_as5512_54x_fan_remove(struct platform_device *pdev) ++{ ++ hwmon_device_unregister(fan_data->hwmon_dev); ++ sysfs_remove_group(&fan_data->pdev->dev.kobj, &accton_as5512_54x_fan_group); ++ ++ return 0; ++} ++ ++#define DRVNAME "as5512_54x_fan" ++ ++static struct platform_driver accton_as5512_54x_fan_driver = { ++ .probe = accton_as5512_54x_fan_probe, ++ .remove = accton_as5512_54x_fan_remove, ++ .driver = { ++ .name = DRVNAME, ++ .owner = THIS_MODULE, ++ }, ++}; ++ ++static int __init accton_as5512_54x_fan_init(void) ++{ ++ int ret; ++ ++ extern int platform_accton_as5512_54x(void); ++ if(!platform_accton_as5512_54x()) { ++ return -ENODEV; ++ } ++ ++ ret = platform_driver_register(&accton_as5512_54x_fan_driver); ++ if (ret < 0) { ++ goto exit; ++ } ++ ++ fan_data = kzalloc(sizeof(struct accton_as5512_54x_fan), GFP_KERNEL); ++ if (!fan_data) { ++ ret = -ENOMEM; ++ platform_driver_unregister(&accton_as5512_54x_fan_driver); ++ goto exit; ++ } ++ ++ mutex_init(&fan_data->update_lock); ++ fan_data->valid = 0; ++ ++ fan_data->pdev = platform_device_register_simple(DRVNAME, -1, NULL, 0); ++ if (IS_ERR(fan_data->pdev)) { ++ ret = PTR_ERR(fan_data->pdev); ++ platform_driver_unregister(&accton_as5512_54x_fan_driver); ++ kfree(fan_data); ++ goto exit; ++ } ++ ++exit: ++ return ret; ++} ++ ++static void __exit accton_as5512_54x_fan_exit(void) ++{ ++ platform_device_unregister(fan_data->pdev); ++ platform_driver_unregister(&accton_as5512_54x_fan_driver); ++ kfree(fan_data); ++} ++ ++MODULE_AUTHOR("Brandon Chuang "); ++MODULE_DESCRIPTION("accton_as5512_54x_fan driver"); ++MODULE_LICENSE("GPL"); ++ ++module_init(accton_as5512_54x_fan_init); ++module_exit(accton_as5512_54x_fan_exit); ++ ++ +diff --git a/drivers/hwmon/accton_as5512_54x_psu.c b/drivers/hwmon/accton_as5512_54x_psu.c +new file mode 100644 +index 0000000..66d61f3 +--- /dev/null ++++ b/drivers/hwmon/accton_as5512_54x_psu.c +@@ -0,0 +1,295 @@ ++/* ++ * An hwmon driver for accton as5512_54x Power Module ++ * ++ * Copyright (C) 2015 Accton Technology Corporation. ++ * Brandon Chuang ++ * ++ * Based on ad7414.c ++ * Copyright 2006 Stefan Roese , DENX Software Engineering ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++static ssize_t show_index(struct device *dev, struct device_attribute *da, char *buf); ++static ssize_t show_status(struct device *dev, struct device_attribute *da, char *buf); ++static ssize_t show_model_name(struct device *dev, struct device_attribute *da, char *buf); ++static int as5512_54x_psu_read_block(struct i2c_client *client, u8 command, u8 *data,int data_len); ++extern int accton_i2c_cpld_read(unsigned short cpld_addr, u8 reg); ++ ++/* Addresses scanned ++ */ ++static const unsigned short normal_i2c[] = { 0x38, 0x3b, 0x50, 0x53, I2C_CLIENT_END }; ++ ++/* Each client has this additional data ++ */ ++struct as5512_54x_psu_data { ++ struct device *hwmon_dev; ++ struct mutex update_lock; ++ char valid; /* !=0 if registers are valid */ ++ unsigned long last_updated; /* In jiffies */ ++ u8 index; /* PSU index */ ++ u8 status; /* Status(present/power_good) register read from CPLD */ ++ char model_name[14]; /* Model name, read from eeprom */ ++}; ++ ++static struct as5512_54x_psu_data *as5512_54x_psu_update_device(struct device *dev); ++ ++enum as5512_54x_psu_sysfs_attributes { ++ PSU_INDEX, ++ PSU_PRESENT, ++ PSU_MODEL_NAME, ++ PSU_POWER_GOOD ++}; ++ ++/* sysfs attributes for hwmon ++ */ ++static SENSOR_DEVICE_ATTR(psu_index, S_IRUGO, show_index, NULL, PSU_INDEX); ++static SENSOR_DEVICE_ATTR(psu_present, S_IRUGO, show_status, NULL, PSU_PRESENT); ++static SENSOR_DEVICE_ATTR(psu_model_name, S_IRUGO, show_model_name,NULL, PSU_MODEL_NAME); ++static SENSOR_DEVICE_ATTR(psu_power_good, S_IRUGO, show_status, NULL, PSU_POWER_GOOD); ++ ++static struct attribute *as5512_54x_psu_attributes[] = { ++ &sensor_dev_attr_psu_index.dev_attr.attr, ++ &sensor_dev_attr_psu_present.dev_attr.attr, ++ &sensor_dev_attr_psu_model_name.dev_attr.attr, ++ &sensor_dev_attr_psu_power_good.dev_attr.attr, ++ NULL ++}; ++ ++static ssize_t show_index(struct device *dev, struct device_attribute *da, ++ char *buf) ++{ ++ struct i2c_client *client = to_i2c_client(dev); ++ struct as5512_54x_psu_data *data = i2c_get_clientdata(client); ++ ++ return sprintf(buf, "%d\n", data->index); ++} ++ ++static ssize_t show_status(struct device *dev, struct device_attribute *da, ++ char *buf) ++{ ++ struct sensor_device_attribute *attr = to_sensor_dev_attr(da); ++ struct as5512_54x_psu_data *data = as5512_54x_psu_update_device(dev); ++ u8 status = 0; ++ ++ if (attr->index == PSU_PRESENT) { ++ status = !(data->status >> ((data->index - 1) * 4) & 0x1); ++ } ++ else { /* PSU_POWER_GOOD */ ++ status = data->status >> ((data->index - 1) * 4 + 1) & 0x1; ++ } ++ ++ return sprintf(buf, "%d\n", status); ++} ++ ++static ssize_t show_model_name(struct device *dev, struct device_attribute *da, ++ char *buf) ++{ ++ struct as5512_54x_psu_data *data = as5512_54x_psu_update_device(dev); ++ ++ return sprintf(buf, "%s", data->model_name); ++} ++ ++static const struct attribute_group as5512_54x_psu_group = { ++ .attrs = as5512_54x_psu_attributes, ++}; ++ ++static int as5512_54x_psu_probe(struct i2c_client *client, ++ const struct i2c_device_id *dev_id) ++{ ++ struct as5512_54x_psu_data *data; ++ int status; ++ ++ if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) { ++ status = -EIO; ++ goto exit; ++ } ++ ++ data = kzalloc(sizeof(struct as5512_54x_psu_data), GFP_KERNEL); ++ if (!data) { ++ status = -ENOMEM; ++ goto exit; ++ } ++ ++ i2c_set_clientdata(client, data); ++ data->valid = 0; ++ mutex_init(&data->update_lock); ++ ++ dev_info(&client->dev, "chip found\n"); ++ ++ /* Register sysfs hooks */ ++ status = sysfs_create_group(&client->dev.kobj, &as5512_54x_psu_group); ++ if (status) { ++ goto exit_free; ++ } ++ ++ data->hwmon_dev = hwmon_device_register(&client->dev); ++ if (IS_ERR(data->hwmon_dev)) { ++ status = PTR_ERR(data->hwmon_dev); ++ goto exit_remove; ++ } ++ ++ /* Update PSU index */ ++ if (client->addr == 0x38 || client->addr == 0x50) { ++ data->index = 1; ++ } ++ else if (client->addr == 0x3b || client->addr == 0x53) { ++ data->index = 2; ++ } ++ ++ dev_info(&client->dev, "%s: psu '%s'\n", ++ dev_name(data->hwmon_dev), client->name); ++ ++ return 0; ++ ++exit_remove: ++ sysfs_remove_group(&client->dev.kobj, &as5512_54x_psu_group); ++exit_free: ++ kfree(data); ++exit: ++ ++ return status; ++} ++ ++static int as5512_54x_psu_remove(struct i2c_client *client) ++{ ++ struct as5512_54x_psu_data *data = i2c_get_clientdata(client); ++ ++ hwmon_device_unregister(data->hwmon_dev); ++ sysfs_remove_group(&client->dev.kobj, &as5512_54x_psu_group); ++ kfree(data); ++ ++ return 0; ++} ++ ++static const struct i2c_device_id as5512_54x_psu_id[] = { ++ { "as5512_54x_psu", 0 }, ++ {} ++}; ++MODULE_DEVICE_TABLE(i2c, as5512_54x_psu_id); ++ ++static struct i2c_driver as5512_54x_psu_driver = { ++ .class = I2C_CLASS_HWMON, ++ .driver = { ++ .name = "as5512_54x_psu", ++ }, ++ .probe = as5512_54x_psu_probe, ++ .remove = as5512_54x_psu_remove, ++ .id_table = as5512_54x_psu_id, ++ .address_list = normal_i2c, ++}; ++ ++static int as5512_54x_psu_read_block(struct i2c_client *client, u8 command, u8 *data, ++ int data_len) ++{ ++ int result = i2c_smbus_read_i2c_block_data(client, command, data_len, data); ++ ++ if (unlikely(result < 0)) ++ goto abort; ++ if (unlikely(result != data_len)) { ++ result = -EIO; ++ goto abort; ++ } ++ ++ result = 0; ++ ++abort: ++ return result; ++} ++ ++static struct as5512_54x_psu_data *as5512_54x_psu_update_device(struct device *dev) ++{ ++ struct i2c_client *client = to_i2c_client(dev); ++ struct as5512_54x_psu_data *data = i2c_get_clientdata(client); ++ ++ mutex_lock(&data->update_lock); ++ ++ if (time_after(jiffies, data->last_updated + HZ + HZ / 2) ++ || !data->valid) { ++ int status = -1; ++ ++ dev_dbg(&client->dev, "Starting as5512_54x update\n"); ++ ++ /* Read model name */ ++ if (client->addr == 0x38 || client->addr == 0x3b) { ++ /* AC power */ ++ status = as5512_54x_psu_read_block(client, 0x26, data->model_name, ++ ARRAY_SIZE(data->model_name)-1); ++ } ++ else { ++ /* DC power */ ++ status = as5512_54x_psu_read_block(client, 0x50, data->model_name, ++ ARRAY_SIZE(data->model_name)-1); ++ } ++ ++ if (status < 0) { ++ data->model_name[0] = '\0'; ++ dev_dbg(&client->dev, "unable to read model name from (0x%x)\n", client->addr); ++ } ++ else { ++ data->model_name[ARRAY_SIZE(data->model_name)-1] = '\0'; ++ } ++ ++ /* Read psu status */ ++ status = accton_i2c_cpld_read(0x60, 0x2); ++ ++ if (status < 0) { ++ dev_dbg(&client->dev, "cpld reg 0x60 err %d\n", status); ++ } ++ else { ++ data->status = status; ++ } ++ ++ data->last_updated = jiffies; ++ data->valid = 1; ++ } ++ ++ mutex_unlock(&data->update_lock); ++ ++ return data; ++} ++ ++static int __init as5512_54x_psu_init(void) ++{ ++ extern int platform_accton_as5512_54x(void); ++ if(!platform_accton_as5512_54x()) { ++ return -ENODEV; ++ } ++ ++ return i2c_add_driver(&as5512_54x_psu_driver); ++} ++ ++static void __exit as5512_54x_psu_exit(void) ++{ ++ i2c_del_driver(&as5512_54x_psu_driver); ++} ++ ++MODULE_AUTHOR("Brandon Chuang "); ++MODULE_DESCRIPTION("accton as5512_54x_psu driver"); ++MODULE_LICENSE("GPL"); ++ ++module_init(as5512_54x_psu_init); ++module_exit(as5512_54x_psu_exit); ++ +diff --git a/drivers/hwmon/accton_i2c_cpld.c b/drivers/hwmon/accton_i2c_cpld.c +index acf88c9..e50c599 100644 +--- a/drivers/hwmon/accton_i2c_cpld.c ++++ b/drivers/hwmon/accton_i2c_cpld.c +@@ -255,6 +255,22 @@ int platform_accton_as5812_54t(void) + } + EXPORT_SYMBOL(platform_accton_as5812_54t); + ++static struct dmi_system_id as5512_54x_dmi_table[] = { ++ { ++ .ident = "Accton AS5512", ++ .matches = { ++ DMI_MATCH(DMI_BOARD_VENDOR, "Accton"), ++ DMI_MATCH(DMI_PRODUCT_NAME, "AS5512"), ++ }, ++ } ++}; ++ ++int platform_accton_as5512_54x(void) ++{ ++ return dmi_check_system(as5512_54x_dmi_table); ++} ++EXPORT_SYMBOL(platform_accton_as5512_54x); ++ + MODULE_AUTHOR("Brandon Chuang "); + MODULE_DESCRIPTION("accton_i2c_cpld driver"); + MODULE_LICENSE("GPL"); +diff --git a/drivers/leds/Kconfig b/drivers/leds/Kconfig +index 599b97b..9ba4a1b 100644 +--- a/drivers/leds/Kconfig ++++ b/drivers/leds/Kconfig +@@ -88,7 +88,14 @@ config LEDS_ACCTON_AS5812_54t + help + This option enables support for the LEDs on the Accton as5812 54t. + Say Y to enable LEDs on the Accton as5812 54t. +- ++ ++config LEDS_ACCTON_AS5512_54X ++ tristate "LED support for the Accton as5512 54x" ++ depends on LEDS_CLASS && SENSORS_ACCTON_I2C_CPLD ++ help ++ This option enables support for the LEDs on the Accton as5512 54x. ++ Say Y to enable LEDs on the Accton as5512 54x. ++ + config LEDS_LM3530 + tristate "LCD Backlight driver for LM3530" + depends on LEDS_CLASS +diff --git a/drivers/leds/Makefile b/drivers/leds/Makefile +index bd20baa..ff3be6c 100644 +--- a/drivers/leds/Makefile ++++ b/drivers/leds/Makefile +@@ -50,6 +50,7 @@ obj-$(CONFIG_LEDS_ACCTON_AS7712_32x) += leds-accton_as7712_32x.o + obj-$(CONFIG_LEDS_ACCTON_AS5812_54x) += leds-accton_as5812_54x.o + obj-$(CONFIG_LEDS_ACCTON_AS6812_32x) += leds-accton_as6812_32x.o + obj-$(CONFIG_LEDS_ACCTON_AS5812_54t) += leds-accton_as5812_54t.o ++obj-$(CONFIG_LEDS_ACCTON_AS5512_54X) += leds-accton_as5512_54x.o + + # LED SPI Drivers + obj-$(CONFIG_LEDS_DAC124S085) += leds-dac124s085.o +diff --git a/drivers/leds/leds-accton_as5512_54x.c b/drivers/leds/leds-accton_as5512_54x.c +new file mode 100644 +index 0000000..761483a +--- /dev/null ++++ b/drivers/leds/leds-accton_as5512_54x.c +@@ -0,0 +1,463 @@ ++/* ++ * A LED driver for the accton_as5512_54x_led ++ * ++ * Copyright (C) 2015 Accton Technology Corporation. ++ * Brandon Chuang ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. ++ */ ++ ++/*#define DEBUG*/ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++extern int accton_i2c_cpld_read(unsigned short cpld_addr, u8 reg); ++extern int accton_i2c_cpld_write(unsigned short cpld_addr, u8 reg, u8 value); ++ ++extern void led_classdev_unregister(struct led_classdev *led_cdev); ++extern int led_classdev_register(struct device *parent, struct led_classdev *led_cdev); ++extern void led_classdev_resume(struct led_classdev *led_cdev); ++extern void led_classdev_suspend(struct led_classdev *led_cdev); ++ ++#define DRVNAME "as5512_54x_led" ++ ++struct accton_as5512_54x_led_data { ++ struct platform_device *pdev; ++ struct mutex update_lock; ++ char valid; /* != 0 if registers are valid */ ++ unsigned long last_updated; /* In jiffies */ ++ u8 reg_val[2]; /* Register value, 0 = LOC/DIAG/FAN LED ++ 1 = PSU1/PSU2 LED */ ++}; ++ ++static struct accton_as5512_54x_led_data *ledctl = NULL; ++ ++/* LED related data ++ */ ++#define LED_TYPE_PSU1_REG_MASK 0x03 ++#define LED_MODE_PSU1_GREEN_MASK 0x02 ++#define LED_MODE_PSU1_AMBER_MASK 0x01 ++#define LED_MODE_PSU1_OFF_MASK 0x03 ++#define LED_MODE_PSU1_AUTO_MASK 0x00 ++ ++#define LED_TYPE_PSU2_REG_MASK 0x0C ++#define LED_MODE_PSU2_GREEN_MASK 0x08 ++#define LED_MODE_PSU2_AMBER_MASK 0x04 ++#define LED_MODE_PSU2_OFF_MASK 0x0C ++#define LED_MODE_PSU2_AUTO_MASK 0x00 ++ ++#define LED_TYPE_DIAG_REG_MASK 0x0C ++#define LED_MODE_DIAG_GREEN_MASK 0x08 ++#define LED_MODE_DIAG_AMBER_MASK 0x04 ++#define LED_MODE_DIAG_OFF_MASK 0x0C ++ ++#define LED_TYPE_FAN_REG_MASK 0x03 ++#define LED_MODE_FAN_GREEN_MASK 0x02 ++#define LED_MODE_FAN_AMBER_MASK 0x01 ++#define LED_MODE_FAN_OFF_MASK 0x03 ++#define LED_MODE_FAN_AUTO_MASK 0x00 ++ ++#define LED_TYPE_LOC_REG_MASK 0x30 ++#define LED_MODE_LOC_ON_MASK 0x00 ++#define LED_MODE_LOC_OFF_MASK 0x10 ++#define LED_MODE_LOC_BLINK_MASK 0x20 ++ ++static const u8 led_reg[] = { ++ 0xA, /* LOC/DIAG/FAN LED*/ ++ 0xB, /* PSU1/PSU2 LED */ ++}; ++ ++enum led_type { ++ LED_TYPE_PSU1, ++ LED_TYPE_PSU2, ++ LED_TYPE_DIAG, ++ LED_TYPE_FAN, ++ LED_TYPE_LOC ++}; ++ ++enum led_light_mode { ++ LED_MODE_OFF = 0, ++ LED_MODE_GREEN, ++ LED_MODE_GREEN_BLINK, ++ LED_MODE_AMBER, ++ LED_MODE_AMBER_BLINK, ++ LED_MODE_RED, ++ LED_MODE_RED_BLINK, ++ LED_MODE_BLUE, ++ LED_MODE_BLUE_BLINK, ++ LED_MODE_AUTO, ++ LED_MODE_UNKNOWN ++}; ++ ++struct led_type_mode { ++ enum led_type type; ++ int type_mask; ++ enum led_light_mode mode; ++ int mode_mask; ++}; ++ ++static struct led_type_mode led_type_mode_data[] = { ++{LED_TYPE_PSU1, LED_TYPE_PSU1_REG_MASK, LED_MODE_GREEN, LED_MODE_PSU1_GREEN_MASK}, ++{LED_TYPE_PSU1, LED_TYPE_PSU1_REG_MASK, LED_MODE_AMBER, LED_MODE_PSU1_AMBER_MASK}, ++{LED_TYPE_PSU1, LED_TYPE_PSU1_REG_MASK, LED_MODE_AUTO, LED_MODE_PSU1_AUTO_MASK}, ++{LED_TYPE_PSU1, LED_TYPE_PSU1_REG_MASK, LED_MODE_OFF, LED_MODE_PSU1_OFF_MASK}, ++{LED_TYPE_PSU2, LED_TYPE_PSU2_REG_MASK, LED_MODE_GREEN, LED_MODE_PSU2_GREEN_MASK}, ++{LED_TYPE_PSU2, LED_TYPE_PSU2_REG_MASK, LED_MODE_AMBER, LED_MODE_PSU2_AMBER_MASK}, ++{LED_TYPE_PSU2, LED_TYPE_PSU2_REG_MASK, LED_MODE_AUTO, LED_MODE_PSU2_AUTO_MASK}, ++{LED_TYPE_PSU2, LED_TYPE_PSU2_REG_MASK, LED_MODE_OFF, LED_MODE_PSU2_OFF_MASK}, ++{LED_TYPE_FAN, LED_TYPE_FAN_REG_MASK, LED_MODE_GREEN, LED_MODE_FAN_GREEN_MASK}, ++{LED_TYPE_FAN, LED_TYPE_FAN_REG_MASK, LED_MODE_AMBER, LED_MODE_FAN_AMBER_MASK}, ++{LED_TYPE_FAN, LED_TYPE_FAN_REG_MASK, LED_MODE_AUTO, LED_MODE_FAN_AUTO_MASK}, ++{LED_TYPE_FAN, LED_TYPE_FAN_REG_MASK, LED_MODE_OFF, LED_MODE_FAN_OFF_MASK}, ++{LED_TYPE_DIAG, LED_TYPE_DIAG_REG_MASK, LED_MODE_GREEN, LED_MODE_DIAG_GREEN_MASK}, ++{LED_TYPE_DIAG, LED_TYPE_DIAG_REG_MASK, LED_MODE_AMBER, LED_MODE_DIAG_AMBER_MASK}, ++{LED_TYPE_DIAG, LED_TYPE_DIAG_REG_MASK, LED_MODE_OFF, LED_MODE_DIAG_OFF_MASK}, ++{LED_TYPE_LOC, LED_TYPE_LOC_REG_MASK, LED_MODE_AMBER, LED_MODE_LOC_ON_MASK}, ++{LED_TYPE_LOC, LED_TYPE_LOC_REG_MASK, LED_MODE_OFF, LED_MODE_LOC_OFF_MASK}, ++{LED_TYPE_LOC, LED_TYPE_LOC_REG_MASK, LED_MODE_AMBER_BLINK, LED_MODE_LOC_BLINK_MASK} ++}; ++ ++static int led_reg_val_to_light_mode(enum led_type type, u8 reg_val) { ++ int i; ++ ++ for (i = 0; i < ARRAY_SIZE(led_type_mode_data); i++) { ++ ++ if (type != led_type_mode_data[i].type) ++ continue; ++ ++ if ((led_type_mode_data[i].type_mask & reg_val) == ++ led_type_mode_data[i].mode_mask) ++ { ++ return led_type_mode_data[i].mode; ++ } ++ } ++ ++ return 0; ++} ++ ++static u8 led_light_mode_to_reg_val(enum led_type type, ++ enum led_light_mode mode, u8 reg_val) { ++ int i; ++ ++ for (i = 0; i < ARRAY_SIZE(led_type_mode_data); i++) { ++ if (type != led_type_mode_data[i].type) ++ continue; ++ ++ if (mode != led_type_mode_data[i].mode) ++ continue; ++ ++ reg_val = led_type_mode_data[i].mode_mask | ++ (reg_val & (~led_type_mode_data[i].type_mask)); ++ } ++ ++ return reg_val; ++} ++ ++static int accton_as5512_54x_led_read_value(u8 reg) ++{ ++ return accton_i2c_cpld_read(0x60, reg); ++} ++ ++static int accton_as5512_54x_led_write_value(u8 reg, u8 value) ++{ ++ return accton_i2c_cpld_write(0x60, reg, value); ++} ++ ++static void accton_as5512_54x_led_update(void) ++{ ++ mutex_lock(&ledctl->update_lock); ++ ++ if (time_after(jiffies, ledctl->last_updated + HZ + HZ / 2) ++ || !ledctl->valid) { ++ int i; ++ ++ dev_dbg(&ledctl->pdev->dev, "Starting accton_as5512_54x_led update\n"); ++ ++ /* Update LED data ++ */ ++ for (i = 0; i < ARRAY_SIZE(ledctl->reg_val); i++) { ++ int status = accton_as5512_54x_led_read_value(led_reg[i]); ++ ++ if (status < 0) { ++ ledctl->valid = 0; ++ dev_dbg(&ledctl->pdev->dev, "reg %d, err %d\n", led_reg[i], status); ++ goto exit; ++ } ++ else ++ { ++ ledctl->reg_val[i] = status; ++ } ++ } ++ ++ ledctl->last_updated = jiffies; ++ ledctl->valid = 1; ++ } ++ ++exit: ++ mutex_unlock(&ledctl->update_lock); ++} ++ ++static void accton_as5512_54x_led_set(struct led_classdev *led_cdev, ++ enum led_brightness led_light_mode, ++ u8 reg, enum led_type type) ++{ ++ int reg_val; ++ ++ mutex_lock(&ledctl->update_lock); ++ ++ reg_val = accton_as5512_54x_led_read_value(reg); ++ ++ if (reg_val < 0) { ++ dev_dbg(&ledctl->pdev->dev, "reg %d, err %d\n", reg, reg_val); ++ goto exit; ++ } ++ ++ reg_val = led_light_mode_to_reg_val(type, led_light_mode, reg_val); ++ accton_as5512_54x_led_write_value(reg, reg_val); ++ ++ /* to prevent the slow-update issue */ ++ ledctl->valid = 0; ++ ++exit: ++ mutex_unlock(&ledctl->update_lock); ++} ++ ++static void accton_as5512_54x_led_psu_1_set(struct led_classdev *led_cdev, ++ enum led_brightness led_light_mode) ++{ ++ accton_as5512_54x_led_set(led_cdev, led_light_mode, led_reg[1], LED_TYPE_PSU1); ++} ++ ++static enum led_brightness accton_as5512_54x_led_psu_1_get(struct led_classdev *cdev) ++{ ++ accton_as5512_54x_led_update(); ++ return led_reg_val_to_light_mode(LED_TYPE_PSU1, ledctl->reg_val[1]); ++} ++ ++static void accton_as5512_54x_led_psu_2_set(struct led_classdev *led_cdev, ++ enum led_brightness led_light_mode) ++{ ++ accton_as5512_54x_led_set(led_cdev, led_light_mode, led_reg[1], LED_TYPE_PSU2); ++} ++ ++static enum led_brightness accton_as5512_54x_led_psu_2_get(struct led_classdev *cdev) ++{ ++ accton_as5512_54x_led_update(); ++ return led_reg_val_to_light_mode(LED_TYPE_PSU2, ledctl->reg_val[1]); ++} ++ ++static void accton_as5512_54x_led_fan_set(struct led_classdev *led_cdev, ++ enum led_brightness led_light_mode) ++{ ++ accton_as5512_54x_led_set(led_cdev, led_light_mode, led_reg[0], LED_TYPE_FAN); ++} ++ ++static enum led_brightness accton_as5512_54x_led_fan_get(struct led_classdev *cdev) ++{ ++ accton_as5512_54x_led_update(); ++ return led_reg_val_to_light_mode(LED_TYPE_FAN, ledctl->reg_val[0]); ++} ++ ++static void accton_as5512_54x_led_diag_set(struct led_classdev *led_cdev, ++ enum led_brightness led_light_mode) ++{ ++ accton_as5512_54x_led_set(led_cdev, led_light_mode, led_reg[0], LED_TYPE_DIAG); ++} ++ ++static enum led_brightness accton_as5512_54x_led_diag_get(struct led_classdev *cdev) ++{ ++ accton_as5512_54x_led_update(); ++ return led_reg_val_to_light_mode(LED_TYPE_DIAG, ledctl->reg_val[0]); ++} ++ ++static void accton_as5512_54x_led_loc_set(struct led_classdev *led_cdev, ++ enum led_brightness led_light_mode) ++{ ++ accton_as5512_54x_led_set(led_cdev, led_light_mode, led_reg[0], LED_TYPE_LOC); ++} ++ ++static enum led_brightness accton_as5512_54x_led_loc_get(struct led_classdev *cdev) ++{ ++ accton_as5512_54x_led_update(); ++ return led_reg_val_to_light_mode(LED_TYPE_LOC, ledctl->reg_val[0]); ++} ++ ++static struct led_classdev accton_as5512_54x_leds[] = { ++ [LED_TYPE_PSU1] = { ++ .name = "accton_as5512_54x_led::psu1", ++ .default_trigger = "unused", ++ .brightness_set = accton_as5512_54x_led_psu_1_set, ++ .brightness_get = accton_as5512_54x_led_psu_1_get, ++ .flags = LED_CORE_SUSPENDRESUME, ++ .max_brightness = LED_MODE_AUTO, ++ }, ++ [LED_TYPE_PSU2] = { ++ .name = "accton_as5512_54x_led::psu2", ++ .default_trigger = "unused", ++ .brightness_set = accton_as5512_54x_led_psu_2_set, ++ .brightness_get = accton_as5512_54x_led_psu_2_get, ++ .flags = LED_CORE_SUSPENDRESUME, ++ .max_brightness = LED_MODE_AUTO, ++ }, ++ [LED_TYPE_FAN] = { ++ .name = "accton_as5512_54x_led::fan", ++ .default_trigger = "unused", ++ .brightness_set = accton_as5512_54x_led_fan_set, ++ .brightness_get = accton_as5512_54x_led_fan_get, ++ .flags = LED_CORE_SUSPENDRESUME, ++ .max_brightness = LED_MODE_AUTO, ++ }, ++ [LED_TYPE_DIAG] = { ++ .name = "accton_as5512_54x_led::diag", ++ .default_trigger = "unused", ++ .brightness_set = accton_as5512_54x_led_diag_set, ++ .brightness_get = accton_as5512_54x_led_diag_get, ++ .flags = LED_CORE_SUSPENDRESUME, ++ .max_brightness = LED_MODE_AUTO, ++ }, ++ [LED_TYPE_LOC] = { ++ .name = "accton_as5512_54x_led::loc", ++ .default_trigger = "unused", ++ .brightness_set = accton_as5512_54x_led_loc_set, ++ .brightness_get = accton_as5512_54x_led_loc_get, ++ .flags = LED_CORE_SUSPENDRESUME, ++ .max_brightness = LED_MODE_AUTO, ++ }, ++}; ++ ++static int accton_as5512_54x_led_suspend(struct platform_device *dev, ++ pm_message_t state) ++{ ++ int i = 0; ++ ++ for (i = 0; i < ARRAY_SIZE(accton_as5512_54x_leds); i++) { ++ led_classdev_suspend(&accton_as5512_54x_leds[i]); ++ } ++ ++ return 0; ++} ++ ++static int accton_as5512_54x_led_resume(struct platform_device *dev) ++{ ++ int i = 0; ++ ++ for (i = 0; i < ARRAY_SIZE(accton_as5512_54x_leds); i++) { ++ led_classdev_resume(&accton_as5512_54x_leds[i]); ++ } ++ ++ return 0; ++} ++ ++static int accton_as5512_54x_led_probe(struct platform_device *pdev) ++{ ++ int ret, i; ++ ++ for (i = 0; i < ARRAY_SIZE(accton_as5512_54x_leds); i++) { ++ ret = led_classdev_register(&pdev->dev, &accton_as5512_54x_leds[i]); ++ ++ if (ret < 0) ++ break; ++ } ++ ++ /* Check if all LEDs were successfully registered */ ++ if (i != ARRAY_SIZE(accton_as5512_54x_leds)){ ++ int j; ++ ++ /* only unregister the LEDs that were successfully registered */ ++ for (j = 0; j < i; j++) { ++ led_classdev_unregister(&accton_as5512_54x_leds[i]); ++ } ++ } ++ ++ return ret; ++} ++ ++static int accton_as5512_54x_led_remove(struct platform_device *pdev) ++{ ++ int i; ++ ++ for (i = 0; i < ARRAY_SIZE(accton_as5512_54x_leds); i++) { ++ led_classdev_unregister(&accton_as5512_54x_leds[i]); ++ } ++ ++ return 0; ++} ++ ++static struct platform_driver accton_as5512_54x_led_driver = { ++ .probe = accton_as5512_54x_led_probe, ++ .remove = accton_as5512_54x_led_remove, ++ .suspend = accton_as5512_54x_led_suspend, ++ .resume = accton_as5512_54x_led_resume, ++ .driver = { ++ .name = DRVNAME, ++ .owner = THIS_MODULE, ++ }, ++}; ++ ++static int __init accton_as5512_54x_led_init(void) ++{ ++ int ret; ++ ++ extern int platform_accton_as5512_54x(void); ++ if(!platform_accton_as5512_54x()) { ++ return -ENODEV; ++ } ++ ++ ret = platform_driver_register(&accton_as5512_54x_led_driver); ++ if (ret < 0) { ++ goto exit; ++ } ++ ++ ledctl = kzalloc(sizeof(struct accton_as5512_54x_led_data), GFP_KERNEL); ++ if (!ledctl) { ++ ret = -ENOMEM; ++ platform_driver_unregister(&accton_as5512_54x_led_driver); ++ goto exit; ++ } ++ ++ mutex_init(&ledctl->update_lock); ++ ++ ledctl->pdev = platform_device_register_simple(DRVNAME, -1, NULL, 0); ++ if (IS_ERR(ledctl->pdev)) { ++ ret = PTR_ERR(ledctl->pdev); ++ platform_driver_unregister(&accton_as5512_54x_led_driver); ++ kfree(ledctl); ++ goto exit; ++ } ++ ++exit: ++ return ret; ++} ++ ++static void __exit accton_as5512_54x_led_exit(void) ++{ ++ platform_device_unregister(ledctl->pdev); ++ platform_driver_unregister(&accton_as5512_54x_led_driver); ++ kfree(ledctl); ++} ++ ++module_init(accton_as5512_54x_led_init); ++module_exit(accton_as5512_54x_led_exit); ++ ++MODULE_AUTHOR("Brandon Chuang "); ++MODULE_DESCRIPTION("accton_as5512_54x_led driver"); ++MODULE_LICENSE("GPL"); ++ +diff --git a/drivers/misc/eeprom/Kconfig b/drivers/misc/eeprom/Kconfig +index c75227b..d90ebe2 100644 +--- a/drivers/misc/eeprom/Kconfig ++++ b/drivers/misc/eeprom/Kconfig +@@ -135,7 +135,16 @@ config EEPROM_ACCTON_AS5812_54t_SFP + + This driver can also be built as a module. If so, the module will + be called accton_as5812_54t_sfp. +- ++ ++config EEPROM_ACCTON_AS5512_54X_SFP ++ tristate "Accton as5512_54x sfp" ++ depends on I2C && SENSORS_ACCTON_I2C_CPLD ++ help ++ If you say yes here you get support for Accton 5512_54x sfp. ++ ++ This driver can also be built as a module. If so, the module will ++ be called accton_5512_54x_sfp. ++ + config EEPROM_93CX6 + tristate "EEPROM 93CX6 support" + help +diff --git a/drivers/misc/eeprom/Makefile b/drivers/misc/eeprom/Makefile +index 152a8bc..907f836 100644 +--- a/drivers/misc/eeprom/Makefile ++++ b/drivers/misc/eeprom/Makefile +@@ -13,4 +13,5 @@ obj-$(CONFIG_EEPROM_ACCTON_AS7712_32x_SFP) += accton_as7712_32x_sfp.o + obj-$(CONFIG_EEPROM_ACCTON_AS5812_54x_SFP) += accton_as5812_54x_sfp.o + obj-$(CONFIG_EEPROM_ACCTON_AS6812_32x_SFP) += accton_as6812_32x_sfp.o + obj-$(CONFIG_EEPROM_ACCTON_AS5812_54t_SFP) += accton_as5812_54t_sfp.o ++obj-$(CONFIG_EEPROM_ACCTON_AS5512_54X_SFP) += accton_as5512_54x_sfp.o + obj-$(CONFIG_EEPROM_SFF_8436) += sff_8436_eeprom.o +diff --git a/drivers/misc/eeprom/accton_as5512_54x_sfp.c b/drivers/misc/eeprom/accton_as5512_54x_sfp.c +new file mode 100644 +index 0000000..d89e71d +--- /dev/null ++++ b/drivers/misc/eeprom/accton_as5512_54x_sfp.c +@@ -0,0 +1,1237 @@ ++/* ++ * SFP driver for accton as5512_54x sfp ++ * ++ * Copyright (C) Brandon Chuang ++ * ++ * Based on ad7414.c ++ * Copyright 2006 Stefan Roese , DENX Software Engineering ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define DRIVER_NAME "as5512_54x_sfp" ++ ++#define DEBUG_MODE 0 ++ ++#if (DEBUG_MODE == 1) ++ #define DEBUG_PRINT(fmt, args...) \ ++ printk (KERN_INFO "%s:%s[%d]: " fmt "\r\n", __FILE__, __FUNCTION__, __LINE__, ##args) ++#else ++ #define DEBUG_PRINT(fmt, args...) ++#endif ++ ++#define NUM_OF_SFP_PORT 54 ++#define EEPROM_NAME "sfp_eeprom" ++#define EEPROM_SIZE 256 /* 256 byte eeprom */ ++#define BIT_INDEX(i) (1ULL << (i)) ++#define USE_I2C_BLOCK_READ 1 ++#define I2C_RW_RETRY_COUNT 3 ++#define I2C_RW_RETRY_INTERVAL 100 /* ms */ ++ ++#define SFP_EEPROM_A0_I2C_ADDR (0xA0 >> 1) ++#define SFP_EEPROM_A2_I2C_ADDR (0xA2 >> 1) ++ ++#define SFF8024_PHYSICAL_DEVICE_ID_ADDR 0x0 ++#define SFF8024_DEVICE_ID_SFP 0x3 ++#define SFF8024_DEVICE_ID_QSFP 0xC ++#define SFF8024_DEVICE_ID_QSFP_PLUS 0xD ++#define SFF8024_DEVICE_ID_QSFP28 0x11 ++ ++#define SFF8472_DIAG_MON_TYPE_ADDR 92 ++#define SFF8472_DIAG_MON_TYPE_DDM_MASK 0x40 ++#define SFF8472_10G_ETH_COMPLIANCE_ADDR 0x3 ++#define SFF8472_10G_BASE_MASK 0xF0 ++ ++#define SFF8436_RX_LOS_ADDR 3 ++#define SFF8436_TX_FAULT_ADDR 4 ++#define SFF8436_TX_DISABLE_ADDR 86 ++ ++static ssize_t sfp_eeprom_read(struct i2c_client *, u8, u8 *,int); ++static ssize_t sfp_eeprom_write(struct i2c_client *, u8 , const char *,int); ++extern int accton_i2c_cpld_read(unsigned short cpld_addr, u8 reg); ++extern int accton_i2c_cpld_write(unsigned short cpld_addr, u8 reg, u8 value); ++ ++/* Addresses scanned ++ */ ++static const unsigned short normal_i2c[] = { SFP_EEPROM_A0_I2C_ADDR, SFP_EEPROM_A2_I2C_ADDR, I2C_CLIENT_END }; ++ ++#define CPLD_PORT_TO_FRONT_PORT(port) (port+1) ++ ++enum port_numbers { ++sfp1, sfp2, sfp3, sfp4, sfp5, sfp6, sfp7, sfp8, ++sfp9, sfp10, sfp11, sfp12, sfp13, sfp14, sfp15, sfp16, ++sfp17, sfp18, sfp19, sfp20, sfp21, sfp22, sfp23, sfp24, ++sfp25, sfp26, sfp27, sfp28, sfp29, sfp30, sfp31, sfp32, ++sfp33, sfp34, sfp35, sfp36, sfp37, sfp38, sfp39, sfp40, ++sfp41, sfp42, sfp43, sfp44, sfp45, sfp46, sfp47, sfp48, ++sfp49, sfp50, sfp51, sfp52, sfp53, sfp54 ++}; ++ ++static const struct i2c_device_id sfp_device_id[] = { ++{ "sfp1", sfp1 }, { "sfp2", sfp2 }, { "sfp3", sfp3 }, { "sfp4", sfp4 }, ++{ "sfp5", sfp5 }, { "sfp6", sfp6 }, { "sfp7", sfp7 }, { "sfp8", sfp8 }, ++{ "sfp9", sfp9 }, { "sfp10", sfp10 }, { "sfp11", sfp11 }, { "sfp12", sfp12 }, ++{ "sfp13", sfp13 }, { "sfp14", sfp14 }, { "sfp15", sfp15 }, { "sfp16", sfp16 }, ++{ "sfp17", sfp17 }, { "sfp18", sfp18 }, { "sfp19", sfp19 }, { "sfp20", sfp20 }, ++{ "sfp21", sfp21 }, { "sfp22", sfp22 }, { "sfp23", sfp23 }, { "sfp24", sfp24 }, ++{ "sfp25", sfp25 }, { "sfp26", sfp26 }, { "sfp27", sfp27 }, { "sfp28", sfp28 }, ++{ "sfp29", sfp29 }, { "sfp30", sfp30 }, { "sfp31", sfp31 }, { "sfp32", sfp32 }, ++{ "sfp33", sfp33 }, { "sfp34", sfp34 }, { "sfp35", sfp35 }, { "sfp36", sfp36 }, ++{ "sfp37", sfp37 }, { "sfp38", sfp38 }, { "sfp39", sfp39 }, { "sfp40", sfp40 }, ++{ "sfp41", sfp41 }, { "sfp42", sfp42 }, { "sfp43", sfp43 }, { "sfp44", sfp44 }, ++{ "sfp45", sfp45 }, { "sfp46", sfp46 }, { "sfp47", sfp47 }, { "sfp48", sfp48 }, ++{ "sfp49", sfp49 }, { "sfp50", sfp50 }, { "sfp51", sfp51 }, { "sfp52", sfp52 }, ++{ "sfp53", sfp53 }, { "sfp54", sfp54 }, ++{ /* LIST END */ } ++}; ++MODULE_DEVICE_TABLE(i2c, sfp_device_id); ++ ++/* ++ * list of valid port types ++ * note OOM_PORT_TYPE_NOT_PRESENT to indicate no ++ * module is present in this port ++ */ ++typedef enum oom_driver_port_type_e { ++ OOM_DRIVER_PORT_TYPE_INVALID, ++ OOM_DRIVER_PORT_TYPE_NOT_PRESENT, ++ OOM_DRIVER_PORT_TYPE_SFP, ++ OOM_DRIVER_PORT_TYPE_SFP_PLUS, ++ OOM_DRIVER_PORT_TYPE_QSFP, ++ OOM_DRIVER_PORT_TYPE_QSFP_PLUS, ++ OOM_DRIVER_PORT_TYPE_QSFP28 ++} oom_driver_port_type_t; ++ ++enum driver_type_e { ++ DRIVER_TYPE_SFP_MSA, ++ DRIVER_TYPE_SFP_DDM, ++ DRIVER_TYPE_QSFP ++}; ++ ++/* Each client has this additional data ++ */ ++struct eeprom_data { ++ char valid; /* !=0 if registers are valid */ ++ unsigned long last_updated; /* In jiffies */ ++ struct bin_attribute bin; /* eeprom data */ ++}; ++ ++struct sfp_msa_data { ++ char valid; /* !=0 if registers are valid */ ++ unsigned long last_updated; /* In jiffies */ ++ u64 status[6]; /* bit0:port0, bit1:port1 and so on */ ++ /* index 0 => tx_fail ++ 1 => tx_disable ++ 2 => rx_loss ++ 3 => device id ++ 4 => 10G Ethernet Compliance Codes ++ to distinguish SFP or SFP+ ++ 5 => DIAGNOSTIC MONITORING TYPE */ ++ struct eeprom_data eeprom; ++}; ++ ++struct sfp_ddm_data { ++ struct eeprom_data eeprom; ++}; ++ ++struct qsfp_data { ++ char valid; /* !=0 if registers are valid */ ++ unsigned long last_updated; /* In jiffies */ ++ u8 status[3]; /* bit0:port0, bit1:port1 and so on */ ++ /* index 0 => tx_fail ++ 1 => tx_disable ++ 2 => rx_loss */ ++ ++ u8 device_id; ++ struct eeprom_data eeprom; ++}; ++ ++struct sfp_port_data { ++ struct mutex update_lock; ++ enum driver_type_e driver_type; ++ int port; /* CPLD port index */ ++ oom_driver_port_type_t port_type; ++ u64 present; /* present status, bit0:port0, bit1:port1 and so on */ ++ ++ struct sfp_msa_data *msa; ++ struct sfp_ddm_data *ddm; ++ struct qsfp_data *qsfp; ++ ++ struct i2c_client *client; ++}; ++ ++enum sfp_sysfs_attributes { ++ PRESENT, ++ PRESENT_ALL, ++ PORT_NUMBER, ++ PORT_TYPE, ++ DDM_IMPLEMENTED, ++ TX_FAULT, ++ TX_FAULT1, ++ TX_FAULT2, ++ TX_FAULT3, ++ TX_FAULT4, ++ TX_DISABLE, ++ TX_DISABLE1, ++ TX_DISABLE2, ++ TX_DISABLE3, ++ TX_DISABLE4, ++ RX_LOS, ++ RX_LOS1, ++ RX_LOS2, ++ RX_LOS3, ++ RX_LOS4, ++ RX_LOS_ALL ++}; ++ ++static ssize_t show_port_number(struct device *dev, struct device_attribute *da, ++ char *buf) ++{ ++ struct i2c_client *client = to_i2c_client(dev); ++ struct sfp_port_data *data = i2c_get_clientdata(client); ++ return sprintf(buf, "%d\n", CPLD_PORT_TO_FRONT_PORT(data->port)); ++} ++ ++static struct sfp_port_data* sfp_update_present(struct i2c_client *client) ++{ ++ int i = 0, j = 0, status = -1; ++ u8 reg; ++ unsigned short cpld_addr; ++ struct sfp_port_data *data = i2c_get_clientdata(client); ++ ++ DEBUG_PRINT("Starting sfp present status update"); ++ mutex_lock(&data->update_lock); ++ data->present = 0; ++ ++ /* Read present status of port 1~48(SFP port) */ ++ for (i = 0; i < 2; i++) { ++ for (j = 0; j < 3; j++) { ++ cpld_addr = 0x61+i; ++ reg = 0x6+j; ++ status = accton_i2c_cpld_read(cpld_addr, reg); ++ ++ if (unlikely(status < 0)) { ++ data = ERR_PTR(status); ++ dev_dbg(&client->dev, "cpld(0x%x) reg(0x%x) err %d\n", cpld_addr, reg, status); ++ goto exit; ++ } ++ ++ DEBUG_PRINT("Present status = 0x%lx\r\n", data->present); ++ data->present |= (u64)status << ((i*24) + (j%3)*8); ++ } ++ } ++ ++ /* Read present status of port 49-54(QSFP port) */ ++ cpld_addr = 0x62; ++ reg = 0x14; ++ status = accton_i2c_cpld_read(cpld_addr, reg); ++ ++ if (unlikely(status < 0)) { ++ data = ERR_PTR(status); ++ dev_dbg(&client->dev, "cpld(0x%x) reg(0x%x) err %d\n", cpld_addr, reg, status); ++ goto exit; ++ } ++ else { ++ data->present |= (u64)status << 48; ++ } ++ ++ DEBUG_PRINT("Present status = 0x%lx", data->present); ++exit: ++ mutex_unlock(&data->update_lock); ++ return data; ++} ++ ++static struct sfp_port_data* sfp_update_tx_rx_status(struct device *dev) ++{ ++ struct i2c_client *client = to_i2c_client(dev); ++ struct sfp_port_data *data = i2c_get_clientdata(client); ++ int i = 0, j = 0; ++ int status = -1; ++ ++ if (time_before(jiffies, data->msa->last_updated + HZ + HZ / 2) && data->msa->valid) { ++ return data; ++ } ++ ++ DEBUG_PRINT("Starting as5512_54x sfp tx rx status update"); ++ mutex_lock(&data->update_lock); ++ data->msa->valid = 0; ++ memset(data->msa->status, 0, sizeof(data->msa->status)); ++ ++ /* Read status of port 1~48(SFP port) */ ++ for (i = 0; i < 2; i++) { ++ for (j = 0; j < 9; j++) { ++ u8 reg; ++ unsigned short cpld_addr; ++ reg = 0x9+j; ++ cpld_addr = 0x61+i; ++ ++ status = accton_i2c_cpld_read(cpld_addr, reg); ++ if (unlikely(status < 0)) { ++ data = ERR_PTR(status); ++ dev_dbg(&client->dev, "cpld(0x%x) reg(0x%x) err %d\n", cpld_addr, reg, status); ++ goto exit; ++ } ++ ++ data->msa->status[j/3] |= (u64)status << ((i*24) + (j%3)*8); ++ } ++ } ++ ++ data->msa->valid = 1; ++ data->msa->last_updated = jiffies; ++ ++exit: ++ mutex_unlock(&data->update_lock); ++ return data; ++} ++ ++static ssize_t sfp_set_tx_disable(struct device *dev, struct device_attribute *da, ++ const char *buf, size_t count) ++{ ++ struct i2c_client *client = to_i2c_client(dev); ++ struct sfp_port_data *data = i2c_get_clientdata(client); ++ unsigned short cpld_addr = 0; ++ u8 cpld_reg = 0, cpld_val = 0, cpld_bit = 0; ++ long disable; ++ int error; ++ ++ error = kstrtol(buf, 10, &disable); ++ if (error) { ++ return error; ++ } ++ ++ mutex_lock(&data->update_lock); ++ ++ if(data->port < 24) { ++ cpld_addr = 0x61; ++ cpld_reg = 0xC + data->port / 8; ++ cpld_bit = 1 << (data->port % 8); ++ } ++ else { /* port 24 ~ 48 */ ++ cpld_addr = 0x62; ++ cpld_reg = 0xC + (data->port - 24) / 8; ++ cpld_bit = 1 << (data->port % 8); ++ } ++ ++ /* Read current status */ ++ cpld_val = accton_i2c_cpld_read(cpld_addr, cpld_reg); ++ ++ /* Update tx_disable status */ ++ if (disable) { ++ data->msa->status[1] |= BIT_INDEX(data->port); ++ cpld_val |= cpld_bit; ++ } ++ else { ++ data->msa->status[1] &= ~BIT_INDEX(data->port); ++ cpld_val &= ~cpld_bit; ++ } ++ ++ accton_i2c_cpld_write(cpld_addr, cpld_reg, cpld_val); ++ mutex_unlock(&data->update_lock); ++ return count; ++} ++ ++static int sfp_is_port_present(struct i2c_client *client, int port) ++{ ++ struct sfp_port_data *data = i2c_get_clientdata(client); ++ ++ data = sfp_update_present(client); ++ if (IS_ERR(data)) { ++ return PTR_ERR(data); ++ } ++ ++ return (data->present & BIT_INDEX(data->port)) ? 0 : 1; ++} ++ ++static ssize_t show_present(struct device *dev, struct device_attribute *da, ++ char *buf) ++{ ++ struct sensor_device_attribute *attr = to_sensor_dev_attr(da); ++ struct i2c_client *client = to_i2c_client(dev); ++ ++ if (PRESENT_ALL == attr->index) { ++ int i; ++ u8 values[7] = {0}; ++ struct sfp_port_data *data = sfp_update_present(client); ++ ++ if (IS_ERR(data)) { ++ return PTR_ERR(data); ++ } ++ ++ for (i = 0; i < ARRAY_SIZE(values); i++) { ++ values[i] = ~(u8)(data->present >> (i * 8)); ++ } ++ ++ /* Return values 1 -> 54 in order */ ++ return sprintf(buf, "%.2x %.2x %.2x %.2x %.2x %.2x %.2x\n", ++ values[0], values[1], values[2], ++ values[3], values[4], values[5], ++ values[6] & 0x3F); ++ } ++ else { ++ struct sfp_port_data *data = i2c_get_clientdata(client); ++ int present = sfp_is_port_present(client, data->port); ++ ++ if (IS_ERR_VALUE(present)) { ++ return present; ++ } ++ ++ /* PRESENT */ ++ return sprintf(buf, "%d\n", present); ++ } ++} ++ ++static struct sfp_port_data *sfp_update_port_type(struct device *dev) ++{ ++ struct i2c_client *client = to_i2c_client(dev); ++ struct sfp_port_data *data = i2c_get_clientdata(client); ++ u8 buf = 0; ++ int status; ++ ++ mutex_lock(&data->update_lock); ++ ++ switch (data->driver_type) { ++ case DRIVER_TYPE_SFP_MSA: ++ { ++ status = sfp_eeprom_read(client, SFF8024_PHYSICAL_DEVICE_ID_ADDR, &buf, sizeof(buf)); ++ if (unlikely(status < 0)) { ++ data->port_type = OOM_DRIVER_PORT_TYPE_INVALID; ++ break; ++ } ++ ++ if (buf != SFF8024_DEVICE_ID_SFP) { ++ data->port_type = OOM_DRIVER_PORT_TYPE_INVALID; ++ break; ++ } ++ ++ status = sfp_eeprom_read(client, SFF8472_10G_ETH_COMPLIANCE_ADDR, &buf, sizeof(buf)); ++ if (unlikely(status < 0)) { ++ data->port_type = OOM_DRIVER_PORT_TYPE_INVALID; ++ break; ++ } ++ ++ DEBUG_PRINT("sfp port type (0x3) data = (0x%x)", buf); ++ data->port_type = buf & SFF8472_10G_BASE_MASK ? OOM_DRIVER_PORT_TYPE_SFP_PLUS : OOM_DRIVER_PORT_TYPE_SFP; ++ break; ++ } ++ case DRIVER_TYPE_QSFP: ++ { ++ status = sfp_eeprom_read(client, SFF8024_PHYSICAL_DEVICE_ID_ADDR, &buf, sizeof(buf)); ++ if (unlikely(status < 0)) { ++ data->port_type = OOM_DRIVER_PORT_TYPE_INVALID; ++ break; ++ } ++ ++ DEBUG_PRINT("qsfp port type (0x0) buf = (0x%x)", buf); ++ switch (buf) { ++ case SFF8024_DEVICE_ID_QSFP: ++ data->port_type = OOM_DRIVER_PORT_TYPE_QSFP; ++ break; ++ case SFF8024_DEVICE_ID_QSFP_PLUS: ++ data->port_type = OOM_DRIVER_PORT_TYPE_QSFP_PLUS; ++ break; ++ case SFF8024_DEVICE_ID_QSFP28: ++ data->port_type = OOM_DRIVER_PORT_TYPE_QSFP_PLUS; ++ break; ++ default: ++ data->port_type = OOM_DRIVER_PORT_TYPE_INVALID; ++ break; ++ } ++ ++ break; ++ } ++ default: ++ break; ++ } ++ ++ mutex_unlock(&data->update_lock); ++ return data; ++} ++ ++static ssize_t show_port_type(struct device *dev, struct device_attribute *da, ++ char *buf) ++{ ++ struct i2c_client *client = to_i2c_client(dev); ++ struct sfp_port_data *data = i2c_get_clientdata(client); ++ int present = sfp_is_port_present(client, data->port); ++ ++ if (IS_ERR_VALUE(present)) { ++ return present; ++ } ++ ++ if (!present) { ++ return sprintf(buf, "%d\n", OOM_DRIVER_PORT_TYPE_NOT_PRESENT); ++ } ++ ++ sfp_update_port_type(dev); ++ return sprintf(buf, "%d\n", data->port_type); ++} ++ ++static struct sfp_port_data* qsfp_update_tx_rx_status(struct device *dev) ++{ ++ struct i2c_client *client = to_i2c_client(dev); ++ struct sfp_port_data *data = i2c_get_clientdata(client); ++ int i, status = -1; ++ u8 buf = 0; ++ u8 reg[] = {SFF8436_TX_FAULT_ADDR, SFF8436_TX_DISABLE_ADDR, SFF8436_RX_LOS_ADDR}; ++ ++ if (time_before(jiffies, data->qsfp->last_updated + HZ + HZ / 2) && data->qsfp->valid) { ++ return data; ++ } ++ ++ DEBUG_PRINT("Starting sfp tx rx status update"); ++ mutex_lock(&data->update_lock); ++ data->qsfp->valid = 0; ++ memset(data->qsfp->status, 0, sizeof(data->qsfp->status)); ++ ++ /* Notify device to update tx fault/ tx disable/ rx los status */ ++ for (i = 0; i < ARRAY_SIZE(reg); i++) { ++ status = sfp_eeprom_read(client, reg[i], &buf, sizeof(buf)); ++ if (unlikely(status < 0)) { ++ data = ERR_PTR(status); ++ goto exit; ++ } ++ } ++ msleep(200); ++ ++ /* Read actual tx fault/ tx disable/ rx los status */ ++ for (i = 0; i < ARRAY_SIZE(reg); i++) { ++ status = sfp_eeprom_read(client, reg[i], &buf, sizeof(buf)); ++ if (unlikely(status < 0)) { ++ data = ERR_PTR(status); ++ goto exit; ++ } ++ ++ DEBUG_PRINT("qsfp reg(0x%x) status = (0x%x)", reg[i], data->qsfp->status[i]); ++ data->qsfp->status[i] = (buf & 0xF); ++ } ++ ++ data->qsfp->valid = 1; ++ data->qsfp->last_updated = jiffies; ++ ++exit: ++ mutex_unlock(&data->update_lock); ++ return data; ++} ++ ++static ssize_t qsfp_show_tx_rx_status(struct device *dev, struct device_attribute *da, ++ char *buf) ++{ ++ int status; ++ u8 val = 0; ++ struct sensor_device_attribute *attr = to_sensor_dev_attr(da); ++ struct i2c_client *client = to_i2c_client(dev); ++ struct sfp_port_data *data = i2c_get_clientdata(client); ++ ++ status = sfp_is_port_present(client, data->port); ++ if (IS_ERR_VALUE(status)) { ++ return status; ++ } ++ ++ data = qsfp_update_tx_rx_status(dev); ++ if (IS_ERR(data)) { ++ return PTR_ERR(data); ++ } ++ ++ switch (attr->index) { ++ case TX_FAULT1: ++ case TX_FAULT2: ++ case TX_FAULT3: ++ case TX_FAULT4: ++ val = (data->qsfp->status[2] & BIT_INDEX(attr->index - TX_FAULT1)) ? 1 : 0; ++ break; ++ case TX_DISABLE1: ++ case TX_DISABLE2: ++ case TX_DISABLE3: ++ case TX_DISABLE4: ++ val = (data->qsfp->status[1] & BIT_INDEX(attr->index - TX_DISABLE1)) ? 1 : 0; ++ break; ++ case RX_LOS1: ++ case RX_LOS2: ++ case RX_LOS3: ++ case RX_LOS4: ++ val = (data->qsfp->status[0] & BIT_INDEX(attr->index - RX_LOS1)) ? 1 : 0; ++ break; ++ default: ++ break; ++ } ++ ++ return sprintf(buf, "%d\n", val); ++} ++ ++static ssize_t qsfp_set_tx_disable(struct device *dev, struct device_attribute *da, ++ const char *buf, size_t count) ++{ ++ long disable; ++ int status; ++ struct sensor_device_attribute *attr = to_sensor_dev_attr(da); ++ struct sfp_port_data *data = NULL; ++ ++ status = kstrtol(buf, 10, &disable); ++ if (status) { ++ return status; ++ } ++ ++ data = qsfp_update_tx_rx_status(dev); ++ if (IS_ERR(data)) { ++ return PTR_ERR(data); ++ } ++ ++ mutex_lock(&data->update_lock); ++ ++ if (disable) { ++ data->qsfp->status[1] |= (1 << (attr->index - TX_DISABLE1)); ++ } ++ else { ++ data->qsfp->status[1] &= ~(1 << (attr->index - TX_DISABLE1)); ++ } ++ ++ DEBUG_PRINT("index = (%d), status = (0x%x)", attr->index, data->qsfp->status[1]); ++ status = sfp_eeprom_write(data->client, SFF8436_TX_DISABLE_ADDR, &data->qsfp->status[1], sizeof(data->qsfp->status[1])); ++ if (unlikely(status < 0)) { ++ count = status; ++ } ++ ++ mutex_unlock(&data->update_lock); ++ return count; ++} ++ ++static ssize_t sfp_show_ddm_implemented(struct device *dev, struct device_attribute *da, ++ char *buf) ++{ ++ int status; ++ char ddm; ++ struct i2c_client *client = to_i2c_client(dev); ++ struct sfp_port_data *data = i2c_get_clientdata(client); ++ ++ status = sfp_is_port_present(client, data->port); ++ if (IS_ERR_VALUE(status)) { ++ return status; ++ } ++ ++ status = sfp_eeprom_read(client, SFF8472_DIAG_MON_TYPE_ADDR, &ddm, sizeof(ddm)); ++ if (unlikely(status < 0)) { ++ return status; ++ } ++ ++ return sprintf(buf, "%d\n", (ddm & SFF8472_DIAG_MON_TYPE_DDM_MASK) ? 1 : 0); ++} ++ ++static ssize_t sfp_show_tx_rx_status(struct device *dev, struct device_attribute *da, ++ char *buf) ++{ ++ u8 val = 0, index = 0; ++ struct sensor_device_attribute *attr = to_sensor_dev_attr(da); ++ struct sfp_port_data *data = sfp_update_tx_rx_status(dev); ++ ++ if (IS_ERR(data)) { ++ return PTR_ERR(data); ++ } ++ ++ if(attr->index == RX_LOS_ALL) { ++ int i = 0; ++ u8 values[6] = {0}; ++ ++ for (i = 0; i < ARRAY_SIZE(values); i++) { ++ values[i] = (u8)(data->msa->status[2] >> (i * 8)); ++ } ++ ++ /** Return values 1 -> 48 in order */ ++ return sprintf(buf, "%.2x %.2x %.2x %.2x %.2x %.2x\n", ++ values[0], values[1], values[2], ++ values[3], values[4], values[5]); ++ } ++ ++ switch (attr->index) { ++ case TX_FAULT: ++ index = 0; ++ break; ++ case TX_DISABLE: ++ index = 1; ++ break; ++ case RX_LOS: ++ index = 2; ++ break; ++ default: ++ break; ++ } ++ ++ val = (data->msa->status[index] & BIT_INDEX(data->port)) ? 1 : 0; ++ return sprintf(buf, "%d\n", val); ++} ++ ++/* SFP/QSFP common attributes for sysfs */ ++static SENSOR_DEVICE_ATTR(sfp_port_number, S_IRUGO, show_port_number, NULL, PORT_NUMBER); ++static SENSOR_DEVICE_ATTR(sfp_port_type, S_IRUGO, show_port_type, NULL, PORT_TYPE); ++static SENSOR_DEVICE_ATTR(sfp_is_present, S_IRUGO, show_present, NULL, PRESENT); ++static SENSOR_DEVICE_ATTR(sfp_is_present_all, S_IRUGO, show_present, NULL, PRESENT_ALL); ++ ++/* QSFP attributes for sysfs */ ++static SENSOR_DEVICE_ATTR(sfp_rx_los1, S_IRUGO, qsfp_show_tx_rx_status, NULL, RX_LOS1); ++static SENSOR_DEVICE_ATTR(sfp_rx_los2, S_IRUGO, qsfp_show_tx_rx_status, NULL, RX_LOS2); ++static SENSOR_DEVICE_ATTR(sfp_rx_los3, S_IRUGO, qsfp_show_tx_rx_status, NULL, RX_LOS3); ++static SENSOR_DEVICE_ATTR(sfp_rx_los4, S_IRUGO, qsfp_show_tx_rx_status, NULL, RX_LOS4); ++static SENSOR_DEVICE_ATTR(sfp_tx_disable1, S_IWUSR | S_IRUGO, qsfp_show_tx_rx_status, qsfp_set_tx_disable, TX_DISABLE1); ++static SENSOR_DEVICE_ATTR(sfp_tx_disable2, S_IWUSR | S_IRUGO, qsfp_show_tx_rx_status, qsfp_set_tx_disable, TX_DISABLE2); ++static SENSOR_DEVICE_ATTR(sfp_tx_disable3, S_IWUSR | S_IRUGO, qsfp_show_tx_rx_status, qsfp_set_tx_disable, TX_DISABLE3); ++static SENSOR_DEVICE_ATTR(sfp_tx_disable4, S_IWUSR | S_IRUGO, qsfp_show_tx_rx_status, qsfp_set_tx_disable, TX_DISABLE4); ++static SENSOR_DEVICE_ATTR(sfp_tx_fault1, S_IRUGO, qsfp_show_tx_rx_status, NULL, TX_FAULT1); ++static SENSOR_DEVICE_ATTR(sfp_tx_fault2, S_IRUGO, qsfp_show_tx_rx_status, NULL, TX_FAULT2); ++static SENSOR_DEVICE_ATTR(sfp_tx_fault3, S_IRUGO, qsfp_show_tx_rx_status, NULL, TX_FAULT3); ++static SENSOR_DEVICE_ATTR(sfp_tx_fault4, S_IRUGO, qsfp_show_tx_rx_status, NULL, TX_FAULT4); ++static struct attribute *qsfp_attributes[] = { ++ &sensor_dev_attr_sfp_port_number.dev_attr.attr, ++ &sensor_dev_attr_sfp_port_type.dev_attr.attr, ++ &sensor_dev_attr_sfp_is_present.dev_attr.attr, ++ &sensor_dev_attr_sfp_is_present_all.dev_attr.attr, ++ &sensor_dev_attr_sfp_rx_los1.dev_attr.attr, ++ &sensor_dev_attr_sfp_rx_los2.dev_attr.attr, ++ &sensor_dev_attr_sfp_rx_los3.dev_attr.attr, ++ &sensor_dev_attr_sfp_rx_los4.dev_attr.attr, ++ &sensor_dev_attr_sfp_tx_disable1.dev_attr.attr, ++ &sensor_dev_attr_sfp_tx_disable2.dev_attr.attr, ++ &sensor_dev_attr_sfp_tx_disable3.dev_attr.attr, ++ &sensor_dev_attr_sfp_tx_disable4.dev_attr.attr, ++ &sensor_dev_attr_sfp_tx_fault1.dev_attr.attr, ++ &sensor_dev_attr_sfp_tx_fault2.dev_attr.attr, ++ &sensor_dev_attr_sfp_tx_fault3.dev_attr.attr, ++ &sensor_dev_attr_sfp_tx_fault4.dev_attr.attr, ++ NULL ++}; ++ ++/* SFP msa attributes for sysfs */ ++static SENSOR_DEVICE_ATTR(sfp_ddm_implemented, S_IRUGO, sfp_show_ddm_implemented, NULL, DDM_IMPLEMENTED); ++static SENSOR_DEVICE_ATTR(sfp_rx_los, S_IRUGO, sfp_show_tx_rx_status, NULL, RX_LOS); ++static SENSOR_DEVICE_ATTR(sfp_rx_los_all, S_IRUGO, sfp_show_tx_rx_status, NULL, RX_LOS_ALL); ++static SENSOR_DEVICE_ATTR(sfp_tx_disable, S_IWUSR | S_IRUGO, sfp_show_tx_rx_status, sfp_set_tx_disable, TX_DISABLE); ++static SENSOR_DEVICE_ATTR(sfp_tx_fault, S_IRUGO, sfp_show_tx_rx_status, NULL, TX_FAULT); ++static struct attribute *sfp_msa_attributes[] = { ++ &sensor_dev_attr_sfp_port_number.dev_attr.attr, ++ &sensor_dev_attr_sfp_port_type.dev_attr.attr, ++ &sensor_dev_attr_sfp_is_present.dev_attr.attr, ++ &sensor_dev_attr_sfp_is_present_all.dev_attr.attr, ++ &sensor_dev_attr_sfp_ddm_implemented.dev_attr.attr, ++ &sensor_dev_attr_sfp_tx_fault.dev_attr.attr, ++ &sensor_dev_attr_sfp_rx_los.dev_attr.attr, ++ &sensor_dev_attr_sfp_rx_los_all.dev_attr.attr, ++ &sensor_dev_attr_sfp_tx_disable.dev_attr.attr, ++ NULL ++}; ++ ++/* SFP ddm attributes for sysfs */ ++static struct attribute *sfp_ddm_attributes[] = { ++ NULL ++}; ++ ++static ssize_t sfp_eeprom_write(struct i2c_client *client, u8 command, const char *data, ++ int data_len) ++{ ++#if USE_I2C_BLOCK_READ ++ int status, retry = I2C_RW_RETRY_COUNT; ++ ++ if (data_len > I2C_SMBUS_BLOCK_MAX) { ++ data_len = I2C_SMBUS_BLOCK_MAX; ++ } ++ ++ while (retry) { ++ status = i2c_smbus_write_i2c_block_data(client, command, data_len, data); ++ if (unlikely(status < 0)) { ++ msleep(I2C_RW_RETRY_INTERVAL); ++ retry--; ++ continue; ++ } ++ ++ break; ++ } ++ ++ if (unlikely(status < 0)) { ++ return status; ++ } ++ ++ return data_len; ++#else ++ int status, retry = I2C_RW_RETRY_COUNT; ++ ++ while (retry) { ++ status = i2c_smbus_write_byte_data(client, command, *data); ++ if (unlikely(status < 0)) { ++ msleep(I2C_RW_RETRY_INTERVAL); ++ retry--; ++ continue; ++ } ++ ++ break; ++ } ++ ++ if (unlikely(status < 0)) { ++ return status; ++ } ++ ++ return 1; ++#endif ++ ++ ++} ++ ++static ssize_t sfp_port_write(struct sfp_port_data *data, ++ const char *buf, loff_t off, size_t count) ++{ ++ ssize_t retval = 0; ++ ++ if (unlikely(!count)) { ++ return count; ++ } ++ ++ /* ++ * Write data to chip, protecting against concurrent updates ++ * from this host, but not from other I2C masters. ++ */ ++ mutex_lock(&data->update_lock); ++ ++ while (count) { ++ ssize_t status; ++ ++ status = sfp_eeprom_write(data->client, off, buf, count); ++ if (status <= 0) { ++ if (retval == 0) { ++ retval = status; ++ } ++ break; ++ } ++ buf += status; ++ off += status; ++ count -= status; ++ retval += status; ++ } ++ ++ mutex_unlock(&data->update_lock); ++ return retval; ++} ++ ++ ++static ssize_t sfp_bin_write(struct file *filp, struct kobject *kobj, ++ struct bin_attribute *attr, ++ char *buf, loff_t off, size_t count) ++{ ++ struct sfp_port_data *data; ++ DEBUG_PRINT("%s(%d) offset = (%d), count = (%d)", off, count); ++ data = dev_get_drvdata(container_of(kobj, struct device, kobj)); ++ return sfp_port_write(data, buf, off, count); ++} ++ ++static ssize_t sfp_eeprom_read(struct i2c_client *client, u8 command, u8 *data, ++ int data_len) ++{ ++#if USE_I2C_BLOCK_READ ++ int status, retry = I2C_RW_RETRY_COUNT; ++ ++ if (data_len > I2C_SMBUS_BLOCK_MAX) { ++ data_len = I2C_SMBUS_BLOCK_MAX; ++ } ++ ++ while (retry) { ++ status = i2c_smbus_read_i2c_block_data(client, command, data_len, data); ++ if (unlikely(status < 0)) { ++ msleep(I2C_RW_RETRY_INTERVAL); ++ retry--; ++ continue; ++ } ++ ++ break; ++ } ++ ++ if (unlikely(status < 0)) { ++ goto abort; ++ } ++ if (unlikely(status != data_len)) { ++ status = -EIO; ++ goto abort; ++ } ++ ++ //result = data_len; ++ ++abort: ++ return status; ++#else ++ int status, retry = I2C_RW_RETRY_COUNT; ++ ++ while (retry) { ++ status = i2c_smbus_read_byte_data(client, command); ++ if (unlikely(status < 0)) { ++ msleep(I2C_RW_RETRY_INTERVAL); ++ retry--; ++ continue; ++ } ++ ++ break; ++ } ++ ++ if (unlikely(status < 0)) { ++ dev_dbg(&client->dev, "sfp read byte data failed, command(0x%2x), data(0x%2x)\r\n", command, result); ++ goto abort; ++ } ++ ++ *data = (u8)status; ++ status = 1; ++ ++abort: ++ return status; ++#endif ++} ++ ++static ssize_t sfp_port_read(struct sfp_port_data *data, ++ char *buf, loff_t off, size_t count) ++{ ++ ssize_t retval = 0; ++ ++ if (unlikely(!count)) { ++ DEBUG_PRINT("Count = 0, return"); ++ return count; ++ } ++ ++ /* ++ * Read data from chip, protecting against concurrent updates ++ * from this host, but not from other I2C masters. ++ */ ++ mutex_lock(&data->update_lock); ++ ++ while (count) { ++ ssize_t status; ++ ++ status = sfp_eeprom_read(data->client, off, buf, count); ++ if (status <= 0) { ++ if (retval == 0) { ++ retval = status; ++ } ++ break; ++ } ++ ++ buf += status; ++ off += status; ++ count -= status; ++ retval += status; ++ } ++ ++ mutex_unlock(&data->update_lock); ++ return retval; ++ ++} ++ ++static ssize_t sfp_bin_read(struct file *filp, struct kobject *kobj, ++ struct bin_attribute *attr, ++ char *buf, loff_t off, size_t count) ++{ ++ struct sfp_port_data *data; ++ DEBUG_PRINT("offset = (%d), count = (%d)", off, count); ++ data = dev_get_drvdata(container_of(kobj, struct device, kobj)); ++ return sfp_port_read(data, buf, off, count); ++} ++ ++static int sfp_sysfs_eeprom_init(struct kobject *kobj, struct bin_attribute *eeprom) ++{ ++ int err; ++ ++ sysfs_bin_attr_init(eeprom); ++ eeprom->attr.name = EEPROM_NAME; ++ eeprom->attr.mode = S_IWUSR | S_IRUGO; ++ eeprom->read = sfp_bin_read; ++ eeprom->write = sfp_bin_write; ++ eeprom->size = EEPROM_SIZE; ++ ++ /* Create eeprom file */ ++ err = sysfs_create_bin_file(kobj, eeprom); ++ if (err) { ++ return err; ++ } ++ ++ return 0; ++} ++ ++static int sfp_sysfs_eeprom_cleanup(struct kobject *kobj, struct bin_attribute *eeprom) ++{ ++ sysfs_remove_bin_file(kobj, eeprom); ++ return 0; ++} ++ ++static const struct attribute_group sfp_msa_group = { ++ .attrs = sfp_msa_attributes, ++}; ++ ++static int sfp_i2c_check_functionality(struct i2c_client *client) ++{ ++#if USE_I2C_BLOCK_READ ++ return i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK); ++#else ++ return i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA); ++#endif ++} ++ ++static int sfp_msa_probe(struct i2c_client *client, const struct i2c_device_id *dev_id, ++ struct sfp_msa_data **data) ++{ ++ int status; ++ struct sfp_msa_data *msa; ++ ++ if (!sfp_i2c_check_functionality(client)) { ++ status = -EIO; ++ goto exit; ++ } ++ ++ msa = kzalloc(sizeof(struct sfp_msa_data), GFP_KERNEL); ++ if (!msa) { ++ status = -ENOMEM; ++ goto exit; ++ } ++ ++ /* Register sysfs hooks */ ++ status = sysfs_create_group(&client->dev.kobj, &sfp_msa_group); ++ if (status) { ++ goto exit_free; ++ } ++ ++ /* init eeprom */ ++ status = sfp_sysfs_eeprom_init(&client->dev.kobj, &msa->eeprom.bin); ++ if (status) { ++ goto exit_remove; ++ } ++ ++ *data = msa; ++ dev_info(&client->dev, "sfp msa '%s'\n", client->name); ++ ++ return 0; ++ ++exit_remove: ++ sysfs_remove_group(&client->dev.kobj, &sfp_msa_group); ++exit_free: ++ kfree(msa); ++exit: ++ ++ return status; ++} ++ ++static const struct attribute_group sfp_ddm_group = { ++ .attrs = sfp_ddm_attributes, ++}; ++ ++static int sfp_ddm_probe(struct i2c_client *client, const struct i2c_device_id *dev_id, ++ struct sfp_ddm_data **data) ++{ ++ int status; ++ struct sfp_ddm_data *ddm; ++ ++ if (!sfp_i2c_check_functionality(client)) { ++ status = -EIO; ++ goto exit; ++ } ++ ++ ddm = kzalloc(sizeof(struct sfp_ddm_data), GFP_KERNEL); ++ if (!ddm) { ++ status = -ENOMEM; ++ goto exit; ++ } ++ ++ /* Register sysfs hooks */ ++ status = sysfs_create_group(&client->dev.kobj, &sfp_ddm_group); ++ if (status) { ++ goto exit_free; ++ } ++ ++ /* init eeprom */ ++ status = sfp_sysfs_eeprom_init(&client->dev.kobj, &ddm->eeprom.bin); ++ if (status) { ++ goto exit_remove; ++ } ++ ++ *data = ddm; ++ dev_info(&client->dev, "sfp ddm '%s'\n", client->name); ++ ++ return 0; ++ ++exit_remove: ++ sysfs_remove_group(&client->dev.kobj, &sfp_ddm_group); ++exit_free: ++ kfree(ddm); ++exit: ++ ++ return status; ++} ++ ++static const struct attribute_group qsfp_group = { ++ .attrs = qsfp_attributes, ++}; ++ ++static int qsfp_probe(struct i2c_client *client, const struct i2c_device_id *dev_id, ++ struct qsfp_data **data) ++{ ++ int status; ++ struct qsfp_data *qsfp; ++ ++ if (!sfp_i2c_check_functionality(client)) { ++ status = -EIO; ++ goto exit; ++ } ++ ++ qsfp = kzalloc(sizeof(struct qsfp_data), GFP_KERNEL); ++ if (!qsfp) { ++ status = -ENOMEM; ++ goto exit; ++ } ++ ++ /* Register sysfs hooks */ ++ status = sysfs_create_group(&client->dev.kobj, &qsfp_group); ++ if (status) { ++ goto exit_free; ++ } ++ ++ /* init eeprom */ ++ status = sfp_sysfs_eeprom_init(&client->dev.kobj, &qsfp->eeprom.bin); ++ if (status) { ++ goto exit_remove; ++ } ++ ++ /* Bring QSFPs out of reset */ ++ accton_i2c_cpld_write(0x62, 0x15, 0x3F); ++ ++ *data = qsfp; ++ dev_info(&client->dev, "qsfp '%s'\n", client->name); ++ ++ return 0; ++ ++exit_remove: ++ sysfs_remove_group(&client->dev.kobj, &qsfp_group); ++exit_free: ++ kfree(qsfp); ++exit: ++ ++ return status; ++} ++ ++static int sfp_device_probe(struct i2c_client *client, ++ const struct i2c_device_id *dev_id) ++{ ++ struct sfp_port_data *data = NULL; ++ ++ data = kzalloc(sizeof(struct sfp_port_data), GFP_KERNEL); ++ if (!data) { ++ return -ENOMEM; ++ } ++ ++ i2c_set_clientdata(client, data); ++ mutex_init(&data->update_lock); ++ data->port = dev_id->driver_data; ++ data->client = client; ++ ++ if (dev_id->driver_data >= sfp1 && dev_id->driver_data <= sfp48) { ++ if (client->addr == SFP_EEPROM_A0_I2C_ADDR) { ++ data->driver_type = DRIVER_TYPE_SFP_MSA; ++ return sfp_msa_probe(client, dev_id, &data->msa); ++ } ++ else if (client->addr == SFP_EEPROM_A2_I2C_ADDR) { ++ data->driver_type = DRIVER_TYPE_SFP_DDM; ++ return sfp_ddm_probe(client, dev_id, &data->ddm); ++ } ++ } ++ else { /* sfp49 ~ sfp54 */ ++ if (client->addr == SFP_EEPROM_A0_I2C_ADDR) { ++ data->driver_type = DRIVER_TYPE_QSFP; ++ return qsfp_probe(client, dev_id, &data->qsfp); ++ } ++ } ++ ++ return -ENODEV; ++} ++ ++static int sfp_msa_remove(struct i2c_client *client, struct sfp_msa_data *data) ++{ ++ sfp_sysfs_eeprom_cleanup(&client->dev.kobj, &data->eeprom.bin); ++ sysfs_remove_group(&client->dev.kobj, &sfp_msa_group); ++ kfree(data); ++ return 0; ++} ++ ++static int sfp_ddm_remove(struct i2c_client *client, struct sfp_ddm_data *data) ++{ ++ sfp_sysfs_eeprom_cleanup(&client->dev.kobj, &data->eeprom.bin); ++ sysfs_remove_group(&client->dev.kobj, &sfp_ddm_group); ++ kfree(data); ++ return 0; ++} ++ ++static int qfp_remove(struct i2c_client *client, struct qsfp_data *data) ++{ ++ sfp_sysfs_eeprom_cleanup(&client->dev.kobj, &data->eeprom.bin); ++ sysfs_remove_group(&client->dev.kobj, &qsfp_group); ++ kfree(data); ++ return 0; ++} ++ ++static int sfp_device_remove(struct i2c_client *client) ++{ ++ struct sfp_port_data *data = i2c_get_clientdata(client); ++ ++ switch (data->driver_type) { ++ case DRIVER_TYPE_SFP_MSA: ++ return sfp_msa_remove(client, data->msa); ++ case DRIVER_TYPE_SFP_DDM: ++ return sfp_ddm_remove(client, data->ddm); ++ case DRIVER_TYPE_QSFP: ++ return qfp_remove(client, data->qsfp); ++ } ++ ++ return 0; ++} ++ ++static struct i2c_driver sfp_driver = { ++ .driver = { ++ .name = DRIVER_NAME, ++ }, ++ .probe = sfp_device_probe, ++ .remove = sfp_device_remove, ++ .id_table = sfp_device_id, ++ .address_list = normal_i2c, ++}; ++ ++static int __init sfp_init(void) ++{ ++ extern int platform_accton_as5512_54x(void); ++ if(!platform_accton_as5512_54x()) { ++ return -ENODEV; ++ } ++ ++ return i2c_add_driver(&sfp_driver); ++} ++ ++static void __exit sfp_exit(void) ++{ ++ i2c_del_driver(&sfp_driver); ++} ++ ++MODULE_AUTHOR("Brandon Chuang "); ++MODULE_DESCRIPTION("accton as5512_54x_sfp driver"); ++MODULE_LICENSE("GPL"); ++ ++module_init(sfp_init); ++module_exit(sfp_exit); ++ ++ diff --git a/packages/base/any/kernels/3.2.65-1+deb7u2/patches/platform-accton-as5712_54x-device-drivers.patch b/packages/base/any/kernels/3.2.65-1+deb7u2/patches/platform-accton-as5712_54x-device-drivers.patch index fc610c5f..67bacd03 100644 --- a/packages/base/any/kernels/3.2.65-1+deb7u2/patches/platform-accton-as5712_54x-device-drivers.patch +++ b/packages/base/any/kernels/3.2.65-1+deb7u2/patches/platform-accton-as5712_54x-device-drivers.patch @@ -869,7 +869,7 @@ index 0000000..6381db5 + { + .ident = "Accton AS5712", + .matches = { -+ DMI_MATCH(DMI_SYS_VENDOR, "Accton"), ++ DMI_MATCH(DMI_BOARD_VENDOR, "Accton"), + DMI_MATCH(DMI_PRODUCT_NAME, "AS5712"), + }, + } diff --git a/packages/base/any/kernels/3.2.65-1+deb7u2/patches/platform-accton-as5812_54t-device-drivers.patch b/packages/base/any/kernels/3.2.65-1+deb7u2/patches/platform-accton-as5812_54t-device-drivers.patch index dfe66f46..5eedbb50 100644 --- a/packages/base/any/kernels/3.2.65-1+deb7u2/patches/platform-accton-as5812_54t-device-drivers.patch +++ b/packages/base/any/kernels/3.2.65-1+deb7u2/patches/platform-accton-as5812_54t-device-drivers.patch @@ -846,7 +846,7 @@ index 3aeb08d..acf88c9 100644 + { + .ident = "Accton AS5812 54t", + .matches = { -+ DMI_MATCH(DMI_SYS_VENDOR, "Accton"), ++ DMI_MATCH(DMI_BOARD_VENDOR, "Accton"), + DMI_MATCH(DMI_PRODUCT_NAME, "AS5812-54T"), + }, + } diff --git a/packages/base/any/kernels/3.2.65-1+deb7u2/patches/platform-accton-as5812_54x-device-drivers.patch b/packages/base/any/kernels/3.2.65-1+deb7u2/patches/platform-accton-as5812_54x-device-drivers.patch index 512715df..92c6d201 100644 --- a/packages/base/any/kernels/3.2.65-1+deb7u2/patches/platform-accton-as5812_54x-device-drivers.patch +++ b/packages/base/any/kernels/3.2.65-1+deb7u2/patches/platform-accton-as5812_54x-device-drivers.patch @@ -868,7 +868,7 @@ index 0000000..e01e557 + { + .ident = "Accton AS5812-54X", + .matches = { -+ DMI_MATCH(DMI_SYS_VENDOR, "Accton"), ++ DMI_MATCH(DMI_BOARD_VENDOR, "Accton"), + DMI_MATCH(DMI_PRODUCT_NAME, "AS5812-54X"), + }, + } diff --git a/packages/base/any/kernels/3.2.65-1+deb7u2/patches/platform-accton-as6712_32x-device-drivers.patch b/packages/base/any/kernels/3.2.65-1+deb7u2/patches/platform-accton-as6712_32x-device-drivers.patch index 4b1220f0..05377b0d 100644 --- a/packages/base/any/kernels/3.2.65-1+deb7u2/patches/platform-accton-as6712_32x-device-drivers.patch +++ b/packages/base/any/kernels/3.2.65-1+deb7u2/patches/platform-accton-as6712_32x-device-drivers.patch @@ -878,7 +878,7 @@ index 0000000..2ec0a59 + { + .ident = "Accton AS6712", + .matches = { -+ DMI_MATCH(DMI_SYS_VENDOR, "Accton"), ++ DMI_MATCH(DMI_BOARD_VENDOR, "Accton"), + DMI_MATCH(DMI_PRODUCT_NAME, "AS6712"), + }, + } diff --git a/packages/base/any/kernels/3.2.65-1+deb7u2/patches/platform-accton-as6812_32x-device-drivers.patch b/packages/base/any/kernels/3.2.65-1+deb7u2/patches/platform-accton-as6812_32x-device-drivers.patch index 3501563d..b71ad20a 100644 --- a/packages/base/any/kernels/3.2.65-1+deb7u2/patches/platform-accton-as6812_32x-device-drivers.patch +++ b/packages/base/any/kernels/3.2.65-1+deb7u2/patches/platform-accton-as6812_32x-device-drivers.patch @@ -871,7 +871,7 @@ index 0000000..d668ca4 + { + .ident = "Accton AS6812", + .matches = { -+ DMI_MATCH(DMI_SYS_VENDOR, "Accton"), ++ DMI_MATCH(DMI_BOARD_VENDOR, "Accton"), + DMI_MATCH(DMI_PRODUCT_NAME, "AS6812"), + }, + } diff --git a/packages/base/any/kernels/3.2.65-1+deb7u2/patches/platform-accton-as7512_32x-device-drivers.patch b/packages/base/any/kernels/3.2.65-1+deb7u2/patches/platform-accton-as7512_32x-device-drivers.patch index 3feb3823..fbecedd4 100644 --- a/packages/base/any/kernels/3.2.65-1+deb7u2/patches/platform-accton-as7512_32x-device-drivers.patch +++ b/packages/base/any/kernels/3.2.65-1+deb7u2/patches/platform-accton-as7512_32x-device-drivers.patch @@ -1080,7 +1080,7 @@ index 0000000..96e3490 + { + .ident = "Accton AS7512", + .matches = { -+ DMI_MATCH(DMI_SYS_VENDOR, "Accton"), ++ DMI_MATCH(DMI_BOARD_VENDOR, "Accton"), + DMI_MATCH(DMI_PRODUCT_NAME, "AS7512"), + }, + } diff --git a/packages/base/any/kernels/3.2.65-1+deb7u2/patches/platform-accton-as7712_32x-device-drivers.patch b/packages/base/any/kernels/3.2.65-1+deb7u2/patches/platform-accton-as7712_32x-device-drivers.patch index 76aae312..2f48944c 100644 --- a/packages/base/any/kernels/3.2.65-1+deb7u2/patches/platform-accton-as7712_32x-device-drivers.patch +++ b/packages/base/any/kernels/3.2.65-1+deb7u2/patches/platform-accton-as7712_32x-device-drivers.patch @@ -811,7 +811,7 @@ index 96e3490..3aeb08d 100644 + { + .ident = "Accton AS7712", + .matches = { -+ DMI_MATCH(DMI_SYS_VENDOR, "Accton"), ++ DMI_MATCH(DMI_BOARD_VENDOR, "Accton"), + DMI_MATCH(DMI_PRODUCT_NAME, "AS7712"), + }, + } diff --git a/packages/base/any/kernels/3.2.65-1+deb7u2/patches/platform-accton-as7716_32x-device-drivers.patch b/packages/base/any/kernels/3.2.65-1+deb7u2/patches/platform-accton-as7716_32x-device-drivers.patch index 73ea06b2..51fca17e 100644 --- a/packages/base/any/kernels/3.2.65-1+deb7u2/patches/platform-accton-as7716_32x-device-drivers.patch +++ b/packages/base/any/kernels/3.2.65-1+deb7u2/patches/platform-accton-as7716_32x-device-drivers.patch @@ -1,15 +1,13 @@ Device driver patches for accton as7716-32x (fan/psu/cpld/led/sfp) diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig -index 89c619d..42abae5 100644 +index 968bd5f..bc10314 100644 --- a/drivers/hwmon/Kconfig +++ b/drivers/hwmon/Kconfig -@@ -1573,7 +1573,25 @@ config SENSORS_ACCTON_AS5812_54t_PSU - +@@ -1592,6 +1592,24 @@ config SENSORS_ACCTON_AS5512_54X_FAN This driver can also be built as a module. If so, the module will - be called accton_as5812_54t_psu. -- -+ + be called accton_as5512_54x_fan. + +config SENSORS_ACCTON_AS7716_32x_FAN + tristate "Accton as7716 32x fan" + depends on I2C && SENSORS_ACCTON_I2C_CPLD @@ -20,25 +18,25 @@ index 89c619d..42abae5 100644 + be called accton_as7716_32x_fan. + +config SENSORS_ACCTON_AS7716_32x_PSU -+ tristate "Accton as7716 32x psu" -+ depends on I2C && SENSORS_ACCTON_I2C_CPLD -+ help -+ If you say yes here you get support for Accton as7716 32x psu. ++ tristate "Accton as7716 32x psu" ++ depends on I2C && SENSORS_ACCTON_I2C_CPLD ++ help ++ If you say yes here you get support for Accton as7716 32x psu. ++ ++ This driver can also be built as a module. If so, the module will ++ be called accton_as7716_32x_psu. + -+ This driver can also be built as a module. If so, the module will -+ be called accton_as7716_32x_psu. -+ if ACPI comment "ACPI drivers" diff --git a/drivers/hwmon/Makefile b/drivers/hwmon/Makefile -index de922bc..9210ab0 100644 +index b8ee7b0..851d90a 100644 --- a/drivers/hwmon/Makefile +++ b/drivers/hwmon/Makefile -@@ -36,6 +36,8 @@ obj-$(CONFIG_SENSORS_ACCTON_AS6812_32x_FAN) += accton_as6812_32x_fan.o - obj-$(CONFIG_SENSORS_ACCTON_AS6812_32x_PSU) += accton_as6812_32x_psu.o - obj-$(CONFIG_SENSORS_ACCTON_AS5812_54t_FAN) += accton_as5812_54t_fan.o +@@ -38,6 +38,8 @@ obj-$(CONFIG_SENSORS_ACCTON_AS5812_54t_FAN) += accton_as5812_54t_fan.o obj-$(CONFIG_SENSORS_ACCTON_AS5812_54t_PSU) += accton_as5812_54t_psu.o + obj-$(CONFIG_SENSORS_ACCTON_AS5512_54X_PSU) += accton_as5512_54x_psu.o + obj-$(CONFIG_SENSORS_ACCTON_AS5512_54X_FAN) += accton_as5512_54x_fan.o +obj-$(CONFIG_SENSORS_ACCTON_AS7716_32x_FAN) += accton_as7716_32x_fan.o +obj-$(CONFIG_SENSORS_ACCTON_AS7716_32x_PSU) += accton_as7716_32x_psu.o obj-$(CONFIG_SENSORS_AD7314) += ad7314.o @@ -802,26 +800,26 @@ index 0000000..4fd15ae +MODULE_LICENSE("GPL"); + diff --git a/drivers/hwmon/accton_i2c_cpld.c b/drivers/hwmon/accton_i2c_cpld.c -index acf88c9..95202ec 100644 +index e50c599..89e3a0e 100644 --- a/drivers/hwmon/accton_i2c_cpld.c +++ b/drivers/hwmon/accton_i2c_cpld.c -@@ -255,6 +255,22 @@ int platform_accton_as5812_54t(void) +@@ -271,6 +271,22 @@ int platform_accton_as5512_54x(void) } - EXPORT_SYMBOL(platform_accton_as5812_54t); + EXPORT_SYMBOL(platform_accton_as5512_54x); +static struct dmi_system_id as7716_dmi_table[] = { -+ { -+ .ident = "Accton AS7716", -+ .matches = { -+ DMI_MATCH(DMI_SYS_VENDOR, "Accton"), -+ DMI_MATCH(DMI_PRODUCT_NAME, "AS7716"), -+ }, -+ } ++ { ++ .ident = "Accton AS7716", ++ .matches = { ++ DMI_MATCH(DMI_BOARD_VENDOR, "Accton"), ++ DMI_MATCH(DMI_PRODUCT_NAME, "AS7716"), ++ }, ++ } +}; + +int platform_accton_as7716_32x(void) +{ -+ return dmi_check_system(as7716_dmi_table); ++ return dmi_check_system(as7716_dmi_table); +} +EXPORT_SYMBOL(platform_accton_as7716_32x); + @@ -829,38 +827,35 @@ index acf88c9..95202ec 100644 MODULE_DESCRIPTION("accton_i2c_cpld driver"); MODULE_LICENSE("GPL"); diff --git a/drivers/leds/Kconfig b/drivers/leds/Kconfig -index 599b97b..bdfb18e 100644 +index 9ba4a1b..e29de21 100644 --- a/drivers/leds/Kconfig +++ b/drivers/leds/Kconfig -@@ -88,7 +88,14 @@ config LEDS_ACCTON_AS5812_54t - help - This option enables support for the LEDs on the Accton as5812 54t. - Say Y to enable LEDs on the Accton as5812 54t. -- -+ +@@ -96,6 +96,13 @@ config LEDS_ACCTON_AS5512_54X + This option enables support for the LEDs on the Accton as5512 54x. + Say Y to enable LEDs on the Accton as5512 54x. + +config LEDS_ACCTON_AS7716_32x + tristate "LED support for the Accton as7716 32x" + depends on LEDS_CLASS && SENSORS_ACCTON_I2C_CPLD + help + This option enables support for the LEDs on the Accton as7716 32x. + Say Y to enable LEDs on the Accton as7716 32x. -+ ++ config LEDS_LM3530 tristate "LCD Backlight driver for LM3530" depends on LEDS_CLASS diff --git a/drivers/leds/Makefile b/drivers/leds/Makefile -index bd20baa..58b1a80 100644 +index ff3be6c..42f274a 100644 --- a/drivers/leds/Makefile +++ b/drivers/leds/Makefile -@@ -50,7 +50,7 @@ obj-$(CONFIG_LEDS_ACCTON_AS7712_32x) += leds-accton_as7712_32x.o - obj-$(CONFIG_LEDS_ACCTON_AS5812_54x) += leds-accton_as5812_54x.o +@@ -51,6 +51,7 @@ obj-$(CONFIG_LEDS_ACCTON_AS5812_54x) += leds-accton_as5812_54x.o obj-$(CONFIG_LEDS_ACCTON_AS6812_32x) += leds-accton_as6812_32x.o obj-$(CONFIG_LEDS_ACCTON_AS5812_54t) += leds-accton_as5812_54t.o -- + obj-$(CONFIG_LEDS_ACCTON_AS5512_54X) += leds-accton_as5512_54x.o +obj-$(CONFIG_LEDS_ACCTON_AS7716_32x) += leds-accton_as7716_32x.o + # LED SPI Drivers obj-$(CONFIG_LEDS_DAC124S085) += leds-dac124s085.o - diff --git a/drivers/leds/leds-accton_as7716_32x.c b/drivers/leds/leds-accton_as7716_32x.c new file mode 100644 index 0000000..5a84897 @@ -1311,15 +1306,13 @@ index 0000000..5a84897 +MODULE_DESCRIPTION("accton_as7716_32x_led driver"); +MODULE_LICENSE("GPL"); diff --git a/drivers/misc/eeprom/Kconfig b/drivers/misc/eeprom/Kconfig -index c75227b..3ef5125 100644 +index 70a3f59..97f811f 100644 --- a/drivers/misc/eeprom/Kconfig +++ b/drivers/misc/eeprom/Kconfig -@@ -135,7 +135,16 @@ config EEPROM_ACCTON_AS5812_54t_SFP +@@ -145,6 +145,15 @@ config EEPROM_ACCTON_AS5512_54X_SFP + This driver can also be built as a module. If so, the module will + be called accton_5512_54x_sfp. - This driver can also be built as a module. If so, the module will - be called accton_as5812_54t_sfp. -- -+ +config EEPROM_ACCTON_AS7716_32x_SFP + tristate "Accton as7716 32x sfp" + depends on I2C && SENSORS_ACCTON_I2C_CPLD @@ -1328,18 +1321,18 @@ index c75227b..3ef5125 100644 + + This driver can also be built as a module. If so, the module will + be called accton_as7716_32x_sfp. -+ ++ config EEPROM_93CX6 tristate "EEPROM 93CX6 support" help diff --git a/drivers/misc/eeprom/Makefile b/drivers/misc/eeprom/Makefile -index 152a8bc..dd47dd2 100644 +index 907f836..b59d70d 100644 --- a/drivers/misc/eeprom/Makefile +++ b/drivers/misc/eeprom/Makefile -@@ -13,4 +13,5 @@ obj-$(CONFIG_EEPROM_ACCTON_AS7712_32x_SFP) += accton_as7712_32x_sfp.o - obj-$(CONFIG_EEPROM_ACCTON_AS5812_54x_SFP) += accton_as5812_54x_sfp.o +@@ -14,4 +14,5 @@ obj-$(CONFIG_EEPROM_ACCTON_AS5812_54x_SFP) += accton_as5812_54x_sfp.o obj-$(CONFIG_EEPROM_ACCTON_AS6812_32x_SFP) += accton_as6812_32x_sfp.o obj-$(CONFIG_EEPROM_ACCTON_AS5812_54t_SFP) += accton_as5812_54t_sfp.o + obj-$(CONFIG_EEPROM_ACCTON_AS5512_54X_SFP) += accton_as5512_54x_sfp.o +obj-$(CONFIG_EEPROM_ACCTON_AS7716_32x_SFP) += accton_as7716_32x_sfp.o obj-$(CONFIG_EEPROM_SFF_8436) += sff_8436_eeprom.o diff --git a/drivers/misc/eeprom/accton_as7716_32x_sfp.c b/drivers/misc/eeprom/accton_as7716_32x_sfp.c diff --git a/packages/base/any/kernels/3.2.65-1+deb7u2/patches/series b/packages/base/any/kernels/3.2.65-1+deb7u2/patches/series index 3b224736..20fa12e4 100644 --- a/packages/base/any/kernels/3.2.65-1+deb7u2/patches/series +++ b/packages/base/any/kernels/3.2.65-1+deb7u2/patches/series @@ -246,6 +246,7 @@ platform-accton-as6812_32x-device-drivers.patch platform-accton-as5812_54t-device-drivers.patch driver-mfd-lpc-ich.patch driver-watchdog-itco-wd.patch +platform-accton-as5512_54x-device-drivers.patch platform-accton-as7716_32x-device-drivers.patch driver-broadcom-tigon3.patch mgmt-port-init-config.patch From 58cf4e503621ffc502281ecbf8defd8cae4a0a32 Mon Sep 17 00:00:00 2001 From: "Carl D. Roth" Date: Mon, 2 May 2016 12:41:21 -0700 Subject: [PATCH 06/62] Updated install template for vendor-config-onl - Include stub shell file for new installer - put Python files in a proper site install location --- packages/base/all/vendor-config-onl/PKG.yml | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/packages/base/all/vendor-config-onl/PKG.yml b/packages/base/all/vendor-config-onl/PKG.yml index 794948a1..923f4274 100644 --- a/packages/base/all/vendor-config-onl/PKG.yml +++ b/packages/base/all/vendor-config-onl/PKG.yml @@ -11,6 +11,7 @@ packages: src/python/onl : $PY_INSTALL/onl src/boot.d : /etc/boot.d src/bin : /usr/bin + src/lib : /lib/vendor-config/onl changelog: Changes @@ -23,7 +24,7 @@ packages: summary: ONL Base Configuration Package (Loader) files: - src/python/onl : /usr/lib/python2.7/onl + src/python/onl : /usr/lib/python2.7/dist-packages/onl src/bin/initmounts : /bin/initmounts changelog: Changes From dc0178c9840f53d7fc245d0e01a1953bc34c5b36 Mon Sep 17 00:00:00 2001 From: "Carl D. Roth" Date: Mon, 2 May 2016 12:42:37 -0700 Subject: [PATCH 07/62] Initial checkin of pythonic installer library - u-boot is currently broken --- .../src/python/onl/install/App.py | 234 +++++ .../src/python/onl/install/BaseInstall.py | 708 +++++++++++++++ .../src/python/onl/install/BaseRecovery.py | 240 +++++ .../src/python/onl/install/ConfUtils.py | 390 ++++++++ .../src/python/onl/install/Fit.py | 578 ++++++++++++ .../src/python/onl/install/InstallUtils.py | 829 ++++++++++++++++++ .../src/python/onl/install/RecoverApp.py | 81 ++ .../src/python/onl/install/ShellApp.py | 251 ++++++ .../src/python/onl/install/__init__.py | 4 + 9 files changed, 3315 insertions(+) create mode 100644 packages/base/all/vendor-config-onl/src/python/onl/install/App.py create mode 100644 packages/base/all/vendor-config-onl/src/python/onl/install/BaseInstall.py create mode 100644 packages/base/all/vendor-config-onl/src/python/onl/install/BaseRecovery.py create mode 100644 packages/base/all/vendor-config-onl/src/python/onl/install/ConfUtils.py create mode 100644 packages/base/all/vendor-config-onl/src/python/onl/install/Fit.py create mode 100644 packages/base/all/vendor-config-onl/src/python/onl/install/InstallUtils.py create mode 100644 packages/base/all/vendor-config-onl/src/python/onl/install/RecoverApp.py create mode 100644 packages/base/all/vendor-config-onl/src/python/onl/install/ShellApp.py create mode 100644 packages/base/all/vendor-config-onl/src/python/onl/install/__init__.py diff --git a/packages/base/all/vendor-config-onl/src/python/onl/install/App.py b/packages/base/all/vendor-config-onl/src/python/onl/install/App.py new file mode 100644 index 00000000..714fd182 --- /dev/null +++ b/packages/base/all/vendor-config-onl/src/python/onl/install/App.py @@ -0,0 +1,234 @@ +"""App.py + +top-level install app +""" + +import subprocess +import sys, os +import logging +import imp +import glob +import distutils.sysconfig + +from InstallUtils import InitrdContext +from InstallUtils import SubprocessMixin +import ConfUtils, BaseInstall + +# locate the platform-config files using SWI path rules +sys.path.append("/usr/lib/python%s/dist-packages" + % (distutils.sysconfig.get_python_version(),)) + +import onl.platform.base +import onl.platform.current + +class App(SubprocessMixin): + + def __init__(self, log=None): + + if log is not None: + self.log = log + else: + self.log = logging.getLogger(self.__class__.__name__) + + self.installer = None + self.machineConf = None + self.installerConf = None + self.platform = None + + def run(self): + + self.log.info("getting installer configuration") + self.machineConf = ConfUtils.MachineConf() + self.installerConf = ConfUtils.InstallerConf() + + ##self.log.info("using native GRUB") + ##self.grubEnv = ConfUtils.GrubEnv(log=self.log.getChild("grub")) + + pat = "/mnt/onie-boot/onie/initrd.img*" + l = glob.glob(pat) + if l: + initrd = l[0] + self.log.info("using native ONIE initrd+chroot GRUB (%s)", initrd) + initrdDir = InitrdContext.mkChroot(initrd, log=self.log) + self.grubEnv = ConfUtils.ChrootGrubEnv(initrdDir, + bootDir="/mnt/onie-boot", + path="/grub/grubenv", + log=self.log.getChild("grub")) + # direct access using ONIE initrd as a chroot + # (will need to fix up bootDir and bootPart later) + else: + self.log.info("using proxy GRUB") + self.grubEnv = ConfUtils.ProxyGrubEnv(self.installerConf, + bootDir="/mnt/onie-boot", + path="/grub/grubenv", + chroot=False, + log=self.log.getChild("grub")) + # indirect access through chroot host + # (will need to fix up bootDir and bootPart later) + + if os.path.exists(ConfUtils.UbootEnv.SETENV): + self.ubootEnv = ConfUtils.UbootEnv(log=self.log.getChild("u-boot")) + else: + self.ubootEnv = None + + self.log.info("ONL Installer %s", self.installerConf.onl_version) + + code = self.findPlatform() + if code: return code + + self.onlPlatform = onl.platform.current.OnlPlatform() + + if 'grub' in self.onlPlatform.platform_config: + self.log.info("trying a GRUB based installer") + iklass = BaseInstall.GrubInstaller + elif 'flat_image_tree' in self.onlPlatform.platform_config: + self.log.info("trying a U-Boot based installer") + iklass = BaseInstall.UbootInstaller + else: + self.log.error("cannot detect installer type") + return 1 + + # run the platform-specific installer + self.installer = iklass(machineConf=self.machineConf, + installerConf=self.installerConf, + platformConf=self.onlPlatform.platform_config, + grubEnv=self.grubEnv, + ubootEnv=self.ubootEnv, + log=self.log) + try: + code = self.installer.run() + except: + self.log.exception("installer failed") + code = 1 + if self.log.level < logging.INFO: + self.post_mortem() + if code: return code + + if getattr(self.installer, 'grub', False): + code = self.finalizeGrub() + if code: return code + if getattr(self.installer, 'uboot', False): + code = self.finalizeUboot() + if code: return code + + self.log.info("Install finished.") + return 0 + + def findPlatform(self): + + plat = getattr(self.machineConf, 'onie_platform', None) + arch = getattr(self.machineConf, 'onie_arch', None) + if plat and arch: + self.log.info("ONL installer running under ONIE.") + plat = plat.replace('_', '-') + self.installerConf.installer_platform = plat + self.installerConf.installer_arch = arch + else: + self.log.error("The installation platform cannot be determined.") + self.log.error("It does not appear that we are running under ONIE or the ONL loader.") + self.log.error("If you know what you are doing you can re-run this installer") + self.log.error("with an explicit 'installer_platform=' setting,") + self.log.error("though this is unlikely to be the correct procedure at this point.") + return 1 + + self.log.info("Detected platform %s", self.installerConf.installer_platform) + + self.installerConf.installer_platform_dir = ("/lib/platform-config/%s" + % (self.installerConf.installer_platform,)) + if not os.path.isdir(self.installerConf.installer_platform_dir): + self.log.error("This installer does not support the %s platform.", + self.installerConf.installer_platform) + self.log.error("Available platforms are:") + for d in os.listdir("/lib/platform-config"): + self.log.error(" %s", d) + self.log.error("Installation cannot continue.") + return 1 + + return 0 + + def finalizeGrub(self): + + def _m(src, dst): + val = getattr(self.installerConf, src, None) + if val is not None: + setattr(self.grubEnv, dst, val) + else: + delattr(self.grubEnv, dst) + + _m('installer_md5', 'onl_installer_md5') + _m('onl_version', 'onl_installer_version') + _m('installer_url', 'onl_installer_url') + + return 0 + + def finalizeUboot(self): + + if self.installer.platform.isOnie(): + def _m(src, dst): + val = getattr(self.installerConf, src, None) + if val is not None: + setattr(self.ubootEnv, dst, val) + else: + delattr(self.ubootEnv, dst) + + _m('installer_md5', 'onl_installer_md5') + _m('onl_version', 'onl_installer_version') + _m('installer_url', 'onl_installer_url') + else: + self.log.info("To configure U-Boot to boot ONL automatically, reboot the switch,") + self.log.info("enter the U-Boot shell, and run these 2 commands:") + self.log.info("=> setenv bootcmd '%s'", self.installer.platform.str_bootcmd()) + self.log.info("saveenv") + + return 0 + + def shutdown(self): + + installer, self.installer = self.installer, None + if installer is not None: + installer.shutdown() + + def post_mortem(self): + self.log.info("re-attaching to tty") + fdno = os.open("/dev/console", os.O_RDWR) + os.dup2(fdno, sys.stdin.fileno()) + os.dup2(fdno, sys.stdout.fileno()) + os.dup2(fdno, sys.stderr.fileno()) + os.close(fdno) + + self.log.info("entering Python debugger (installer_debug=1)") + import pdb + pdb.post_mortem(sys.exc_info()[2]) + + @classmethod + def main(cls): + + logging.basicConfig() + logger = logging.getLogger("install") + logger.setLevel(logging.DEBUG) + + # send to ONIE log + hnd = logging.FileHandler("/dev/console") + logger.addHandler(hnd) + logger.propagate = False + + debug = 'installer_debug' in os.environ + if debug: + logger.setLevel(logging.DEBUG) + + app = cls(log=logger) + try: + code = app.run() + except: + logger.exception("runner failed") + code = 1 + if debug: + app.post_mortem() + + app.shutdown() + sys.exit(code) + +main = App.main + +if __name__ == "__main__": + main() diff --git a/packages/base/all/vendor-config-onl/src/python/onl/install/BaseInstall.py b/packages/base/all/vendor-config-onl/src/python/onl/install/BaseInstall.py new file mode 100644 index 00000000..22ae8850 --- /dev/null +++ b/packages/base/all/vendor-config-onl/src/python/onl/install/BaseInstall.py @@ -0,0 +1,708 @@ +"""BaseInstall.py + +Base classes for installers. +""" + +import os, stat +import subprocess +import re +import tempfile +import logging +import StringIO +import parted +import yaml + +from InstallUtils import MountContext, BlkidParser, PartedParser, SubprocessMixin +import onl.YamlUtils + +class Base: + + class installmeta: + def __init__(self, + installerConf=None, + machineConf=None, + platformConf=None, + grubEnv=None, ubootEnv=None): + self.installerConf = installerConf + self.machineConf = machineConf + self.platformConf = platformConf + self.grubEnv = grubEnv + self.ubootEnv = ubootEnv + + def isOnie(self): + if self.machineConf is None: return False + plat = getattr(self.machineConf, 'onie_platform', None) + return plat is not None + + def __init__(self, + machineConf=None, installerConf=None, platformConf=None, + grubEnv=None, ubootEnv=None, + log=None): + self.machineConf = machineConf + self.installerConf = installerConf + self.im = self.installmeta(installerConf=installerConf, + machineConf=machineConf, + platformConf=platformConf, + grubEnv=grubEnv, + ubootEnv = ubootEnv) + self.grubEnv = grubEnv + self.ubootEnv = ubootEnv + self.log = log or logging.getLogger(self.__class__.__name__) + + def run(self): + self.log.error("not implemented") + return 1 + + def shutdown(self): + pass + + def installSwi(self): + + swis = [x for x in os.listdir(self.installerConf.installer_dir) if x.endswith('.swi')] + if not swis: + self.log.info("No ONL Software Image available for installation.") + self.log.info("Post-install ZTN installation will be required.") + return + if len(swis) > 1: + self.log.warn("Multiple SWIs found in installer: %s", " ".join(swis)) + return + + base = swis[0] + src = os.path.join(self.installerConf.installer_dir, base) + + self.log.info("Installing ONL Software Image (%s)...", base) + dev = self.blkidParts['ONL-IMAGES'] + with MountContext(dev.device, log=self.log) as ctx: + dst = os.path.join(ctx.dir, base) + self.copy2(src, dst) + + return 0 + + def backupConfig(self, dev): + """Back up the ONL-CONFIG partition for later restore.""" + self.configArchive = tempfile.mktemp(prefix="onl-config-", + suffix=".tar.gz") + self.log.info("backing up ONL-CONFIG partition %s to %s", + dev, self.configArchive) + with MountContext(dev, log=self.log) as ctx: + self.log.debug("+ tar -zcf %s -C %s .", + self.configArchive, ctx.dir) + pipe = subprocess.Popen(["tar", "-zcf", self.configArchive, ".",], + cwd=ctx.dir) + pipe.communicate() + code = pipe.wait() + if code: + raise SystemExit("backup of ONL-CONFIG failed") + + def restoreConfig(self, dev): + """Restore the saved ONL-CONFIG.""" + archive, self.configArchive = self.configArchive, None + self.log.info("restoring ONL-CONFIG archive %s to %s", + archive, dev) + with MountContext(dev, log=self.log) as ctx: + self.log.debug("+ tar -zxf %s -C %s", + archive, ctx.dir) + pipe = subprocess.Popen(["tar", "-zxf", archive,], + cwd=ctx.dir) + pipe.communicate() + code = pipe.wait() + if code: + raise SystemExit("backup of ONL-CONFIG failed") + self.unlink(archive) + +GRUB_TPL = """\ +#serial --port=0x3f8 --speed=115200 --word=8 --parity=no --stop=1 +serial %(serial)s +terminal_input serial +terminal_output serial +set timeout=5 + +menuentry OpenNetworkLinux { + search --no-floppy --label --set=root ONL-BOOT + echo 'Loading Open Network Linux ...' + insmod gzio + insmod part_msdos + #linux /kernel-3.9.6-x86-64-all nopat console=ttyS0,115200n8 onl_platform=x86-64-kvm-x86-64-r0 + linux /%(kernel)s %(args)s onl_platform=%(platform)s + initrd /%(initrd)s +} + +# Menu entry to chainload ONIE +menuentry ONIE { + search --no-floppy --label --set=root ONIE-BOOT + echo 'Loading ONIE ...' + chainloader +1 +} +""" + +class GrubInstaller(SubprocessMixin, Base): + """Installer for grub-based systems (x86).""" + + class installmeta(Base.installmeta): + grub = True + + def __init__(self, *args, **kwargs): + Base.__init__(self, *args, **kwargs) + + self.device = None + self.minpart = None + self.nextBlock = None + + self.blkidParts = [] + + self.partedDevice = None + self.partedDisk = None + + self.configArchive = None + # backup of ONL-CONFIG during re-partitioning + + def findGpt(self): + self.blkidParts = BlkidParser(log=self.log.getChild("blkid")) + + deviceOrLabel = self.im.platformConf['grub']['device'] + if deviceOrLabel.startswith('/dev'): + tgtDevice, tgtLabel = deviceOrLabel, None + else: + tgtDevice, tgtLabel = None, deviceOrLabel + + # enumerate labeled partitions to try to identify + # the boot device + for part in self.blkidParts: + dev, partno = part.splitDev() + if tgtLabel is not None and tgtLabel == part.label: + if not len(partno): + self.log.error("cannot use whole disk") + return 1 + if self.device is None: + self.device = dev + else: + self.log.error("found multiple devices: %s, %s", + dev, self.device) + return 1 + elif tgtDevice is not None and tgtDevice == dev: + if not len(partno): + self.log.error("cannot use whole disk") + return 1 + if self.device is None: + self.device = dev + else: + self.log.error("found multiple devices: %s, %s", + dev, self.device) + return 1 + if self.device is None: + self.log.error("cannot find an install device") + return 1 + + # optionally back up a config partition + # if it's on the boot device + for part in self.blkidParts: + dev, partno = part.splitDev() + if dev == self.device and part.label == 'ONL-CONFIG': + self.backupConfig(part.device) + + self.partedDevice = parted.getDevice(self.device) + self.partedDisk = parted.newDisk(self.partedDevice) + + # enumerate the partitions that will stay and go + minpart = -1 + for part in self.partedDisk.partitions: + + if part.getFlag(parted.PARTITION_HIDDEN): + minpart = max(minpart, part.number+1) + continue + + # else, the partition should exist + blkidParts = [x for x in self.blkidParts if x.device == part.path] + if not blkidParts: + self.log.warn("cannot identify partition %s", part) + continue + + blkidPart = blkidParts[0] + if not blkidPart.isOnieReserved(): continue + + # else, check the GPT label for reserved-ness + if (part.name + and ('GRUB' in part.name + or 'ONIE-BOOT' in part.name + or 'DIAG' in part.name)): + minpart = max(minpart, part.number+1) + + if minpart < 0: + self.log.error("cannot find an install partition") + return 1 + self.minpart = minpart + + return 0 + + def deletePartitions(self): + + nextBlock = -1 + for part in self.partedDisk.partitions: + self.log.info("examining %s part %d", + self.partedDisk.device.path, part.number) + if part.number < self.minpart: + self.log.info("skip this part") + nextBlock = max(part.geometry.start+part.geometry.length, + nextBlock) + else: + self.log.info("deleting this part") + self.partedDisk.removePartition(part) + + if nextBlock < 0: + self.log.error("cannot find a starting block") + return 1 + + self.nextBlock = nextBlock + return 0 + + def partitionGpt(self): + + constraint = self.partedDevice.optimalAlignedConstraint + # default partition layout constraint + + devices = {} + + def _u2s(sz, u): + bsz = sz * u + bsz = bsz + self.partedDevice.physicalSectorSize - 1 + return bsz / self.partedDevice.physicalSectorSize + + UNITS = { + 'GiB' : 1024 * 1024 * 1024, + 'G' : 1000 * 1000 * 1000, + 'MiB' : 1024 * 1024, + 'M' : 1000 * 1000, + 'KiB' : 1024, + 'K' : 1000, + } + + for part in self.im.platformConf['installer']: + + label, sz = list(part.items())[0] + if type(sz) == dict: + sz, fmt = sz['='], sz.get('format', 'ext4') + else: + fmt = 'ext4' + + cnt = None + for ul, ub in UNITS.items(): + if sz.endswith(ul): + cnt = _u2s(int(sz[:-len(ul)], 10), ub) + break + if sz == '100%': + cnt = self.partedDevice.getLength() - self.nextBlock + if cnt is None: + self.log.error("invalid size (no units) for %s: %s", + part, sz) + return 1 + + start = self.nextBlock + end = start + cnt - 1 + if end <= self.partedDevice.getLength(): + self.log.info("Allocating %d sectors for %s", + cnt, label) + else: + self.log.warn("%s: start sector %d, end sector %d, max %d", + label, start, end, + self.partedDevice.getLength()) + self.log.error("invalid partition %s [%s] (too big)", + label, sz) + return 1 + + geom = parted.Geometry(device=self.partedDevice, + start=start, length=end-start+1) + fs = parted.FileSystem(type=fmt, geometry=geom) + part = parted.Partition(disk=self.partedDisk, + type=parted.PARTITION_NORMAL, + fs=fs, + geometry=geom) + part.getPedPartition().set_name(label) + self.partedDisk.addPartition(part, constraint=constraint) + self.partedDisk.commit() + + self.log.info("Formatting %s (%s) as %s", + part.path, label, fmt) + if fmt == 'msdos': + cmd = ('mkdosfs', '-n', label, part.path,) + else: + cmd = ('mkfs.%s' % fmt, '-L', label, part.path,) + self.check_call(cmd, vmode=self.V1) + + self.nextBlock, self.minpart = end+1, self.minpart+1 + + devices[label] = part.path + + if label == 'ONL-CONFIG' and self.configArchive is not None: + self.restoreConfig(part.path) + + self.blkidParts = BlkidParser(log=self.log.getChild("blkid")) + # re-read the partitions + + return 0 + + def installBootConfig(self): + dev = self.blkidParts['ONL-BOOT'] + self.log.info("Installing boot-config to %s", dev.device) + + src = os.path.join(self.installerConf.installer_dir, 'boot-config') + with MountContext(dev.device, log=self.log) as ctx: + dst = os.path.join(ctx.dir, 'boot-config') + self.copy2(src, dst) + + with open(src) as fd: + ecf = fd.read().encode('base64', 'strict').strip() + setattr(self.grubEnv, 'boot_config_default', ecf) + + return 0 + + def installLoader(self): + + ctx = {} + + kernel = self.im.platformConf['grub']['kernel'] + ctx['kernel'] = kernel['='] if type(kernel) == dict else kernel + + initrd = self.im.platformConf['grub']['initrd'] + ctx['initrd'] = initrd['='] if type(initrd) == dict else initrd + + ctx['args'] = self.im.platformConf['grub']['args'] + ctx['platform'] = self.installerConf.installer_platform + ctx['serial'] = self.im.platformConf['grub']['serial'] + + cf = GRUB_TPL % ctx + + self.log.info("Installing kernel") + dev = self.blkidParts['ONL-BOOT'] + with MountContext(dev.device, log=self.log) as ctx: + def _cp(b): + src = os.path.join(self.installerConf.installer_dir, b) + if not os.path.isfile(src): return + if b.startswith('kernel-') or b.startswith('onl-loader-initrd-'): + dst = os.path.join(ctx.dir, b) + self.copy2(src, dst) + [_cp(e) for e in os.listdir(self.installerConf.installer_dir)] + + d = os.path.join(ctx.dir, "grub") + self.makedirs(d) + dst = os.path.join(ctx.dir, 'grub/grub.cfg') + with open(dst, "w") as fd: + fd.write(cf) + + return 0 + + def installGrub(self): + self.log.info("Installing GRUB to %s", self.partedDevice.path) + self.grubEnv.install(self.partedDevice.path) + return 0 + + def installGpt(self): + + code = self.findGpt() + if code: return code + + self.log.info("Installing to %s starting at partition %d", + self.device, self.minpart) + + self.log.info("disk is %s", self.partedDevice.path) + + if self.partedDisk.type != 'gpt': + self.log.error("not a GPT partition table") + return 1 + if self.partedDevice.sectorSize != 512: + self.log.error("invalid logical block size") + return 1 + if self.partedDevice.physicalSectorSize != 512: + self.log.error("invalid physical block size") + return 1 + + self.log.info("found a disk with %d blocks", + self.partedDevice.getLength()) + + code = self.deletePartitions() + if code: return code + + self.log.info("next usable block is %s", self.nextBlock) + + code = self.partitionGpt() + if code: return code + + # once we assign the ONL-BOOT partition, + # we can re-target the grub environment + dev = self.blkidParts['ONL-BOOT'] + self.grubEnv.__dict__['bootPart'] = dev.device + self.grubEnv.__dict__['bootDir'] = None + + code = self.installSwi() + if code: return code + + code = self.installLoader() + if code: return code + + code = self.installBootConfig() + if code: return code + + code = self.installGrub() + if code: return code + + self.log.info("ONL loader install successful.") + self.log.info("GRUB installation is required next.") + + return 0 + + def run(self): + if 'grub' not in self.im.platformConf: + self.log.error("platform config is missing a GRUB section") + return 1 + label = self.im.platformConf['grub'].get('label', None) + if label != 'gpt': + self.log.error("invalid GRUB label in platform config: %s", label) + return 1 + return self.installGpt() + + def shutdown(self): + pass + +class UbootInstaller(SubprocessMixin, Base): + + class installmeta(Base.installmeta): + + device = None + uboot = True + + loaderBlocks = None + flashBlocks = None + flash2Blocks = None + # block count, or -1 for "rest" + + loaderRaw = True + # true for raw loader partition (FIT image) + + loaderSrc = None + # default loader source file (auto-detect) + + loaderDst = "onl-loader" + # destination path on ONL-BOOT for non-raw installs + + bootConf = None + # optional pre-formatted boot-config contents + # (string or list of strings) + + bootCmd = None + # pre-formatted string + + bootCmds = None + # ... or a list of strings + + def str_bootcmd(self): + if self.bootCmd is not None: return self.bootCmd + if self.bootCmds: + return "; ".join(self.bootCmds) + raise ValueError("missing boot commands") + + def __init__(self, *args, **kwargs): + kwargs = dict(kwargs) + installerConf = kwargs.pop('installerConf', None) + machineConf = kwargs.pop('machineConf', None) + platformConf = kwargs.pop('platformConf', None) + ubootEnv = kwargs.pop('ubootEnv', None) + self.im = self.installmeta(installerConf=installerConf, + machineConf=machineConf, + platformConf=platormConf, + ubootEnv=ubootEnv) + Base.__init__(self, *args, + machineConf=machineConf, installerConf=installerConf, platformConf=platformConf, + ubootEnv=ubootEnv, + **kwargs) + + # XXX roth + self.onlBootDev = None + self.onlConfigDev = None + self.onlDataDev = None + + def formatBlockdev(self): + + if self.im.loaderBlocks < 0: + self.log.error("no size defined for ONL-BOOT") + return 1 + if self.im.flashBlocks < 0: + self.log.error("no size defined for FLASH") + return 1 + + self.log.info("Formatting %s as %d:%d:%d", + self.im.device, + self.im.loaderBlocks, + self.im.flashBlocks, + self.im.flash2Blocks) + + self.check_call(('parted', '-s', self.im.device, + 'mklabel', 'msdos',)) + + start = 1 + end = start + self.im.loaderBlocks-1 + + self.check_call(('parted', '-s', self.im.device, + 'unit', 's', + 'mkpart', 'primary', 'fat32', str(start)+'s', str(end)+'s',)) + + self.onlBootDev = self.im.device + '1' + if not self.im.loaderRaw: + cmd = ('mkdosfs', '-n', 'ONL-BOOT', self.onlBootDev,) + self.check_call(cmd, vmode=self.V1) + + start = end + 1 + end = start + self.im.flashBlocks-1 + + self.check_call(('parted', '-s', self.im.device, + 'unit', 's', + 'mkpart', 'primary', 'fat32', str(start)+'s', str(end)+'s',)) + + self.onlConfigDev = self.im.device + '2' + cmd = ('mkdosfs', '-n', 'FLASH', self.onlConfigDev,) + self.check_call(cmd, vmode=self.V1) + + start = end + 1 + if self.im.flash2Blocks > -1: + end = start + self.im.flash2Blocks-1 + self.check_call(('parted', '-s', self.im.device, + 'unit', 's', + 'mkpart', 'primary', 'fat32', str(start)+'s', str(end)+'s',)) + else: + self.check_call(('parted', '-s', self.im.device, + 'unit', 's', + 'mkpart', 'primary', 'fat32', str(start)+'s', '100%',)) + + self.onlDataDev = self.im.device + '3' + cmd = ('mkdosfs', '-n', 'FLASH2', self.onlDataDev,) + self.check_call(cmd, vmode=self.V1) + + return 0 + + def installLoader(self): + + loaderSrc = None + for cand in (("%s/%s.itb" + % (self.installerConf.installer_dir, + self.installerConf.installer_platform,)), + os.path.join(self.installerConf.installer_dir, 'powerpc-fit-all.itb'), + self.im.loaderSrc, + ("%s/onl.%s.loader" + % (self.installerConf.installer_dir, + self.installerConf.installer_platform,))): + if os.path.exists(cand): + loaderSrc = cand + break + if not loaderSrc: + self.log.error("The platform loader file is missing.") + self.log.error("This is unexpected - %s", loaderSrc) + return 1 + + self.log.info("Installing the ONL loader...") + + if self.im.loaderRaw: + cmd = ('dd', + 'if=' + loaderSrc, + 'of=' + self.onlBootDev,) + self.check_call(cmd, vmode=self.V2) + else: + with MountContext(self.onlBootDev, log=self.log) as ctx: + dst = os.path.join(ctx, self.im.loaderDst) + self.copy2(loaderSrc, dst) + + return 0 + + def installBootconfig(self): + + cf = None + + p = os.path.join(self.installerConf.installer_dir, 'boot-config') + if cf is None and os.path.exists(p): + cf = open(p, "r").read() + + p = os.path.join(self.installerConf.installer_platform_dir, 'boot-config') + if cf is None and os.path.exists(p): + cf = open(p, "r").read() + + if cf is None and self.im.bootConf: + if isinstance(self.im.bootConf, basestring): + cf = self.im.bootConf + else: + cf = "\n".join(cf) + "\n" + + if cf is None: + buf = StringIO.StringIO() + buf.write("SWI=images:onl-%s.swi\n" + % (self.platformConf.installer_arch,)) + buf.write("NETDEV=ma1\n") + cf = buf.getvalue() + + self.log.info("Writing boot-config.") + with MountContext(self.onlConfigDev, log=self.log) as ctx: + dst = os.path.join(ctx.dir, "boot-config") + with open(dst, "w") as fd: + fd.write(cf) + + ecf = cf.encode('base64', 'strict').strip() + setattr(self.ubootEnv, 'boot-config-default', ecf) + + return 0 + + def installUbootEnv(self): + + # Special access instructions for initrd + off = getattr(self.installerConf, 'initrd_offset', None) + if off is not None: + if self.im.loaderRaw: + a = self.onlBootDev + else: + a = self.installerConf.initrd_archive + s = int(self.installerConf.initrd_offset) + e = s + int(self.installerConf.initrd_size) - 1 + self.ubootEnv.onl_installer_initrd = ("%s:%x:%x" % (a, s, e,)) + else: + try: + del self.installerConf.onl_installer_initrd + except AttributeError: + pass + + if self.im.isOnie(): + self.log.info("Setting ONIE nos_bootcmd to boot ONL") + self.ubootEnv.nos_bootcmd = self.im.str_bootcmd() + else: + self.log.warn("U-boot boot setting is not changed") + + return 0 + + def installUboot(self): + + st = os.stat(self.im.device) + if not stat.S_ISBLK(st[stat.ST_MODE]): + self.log.error("not a block device: %s", + self.im.device) + return 1 + + code = self.formatBlockdev() + if code: return code + + code = self.installLoader() + if code: return code + + code = self.installBootconfig() + if code: return code + + code = self.installSwi() + if code: return code + + self.log.info("syncing block devices") + self.check_call(('sync',)) + # XXX roth probably not needed + + code = self.installUbootEnv() + if code: return code + + return 0 + + def run(self): + return self.installUboot() + + def shutdown(self): + pass diff --git a/packages/base/all/vendor-config-onl/src/python/onl/install/BaseRecovery.py b/packages/base/all/vendor-config-onl/src/python/onl/install/BaseRecovery.py new file mode 100644 index 00000000..881b9b4f --- /dev/null +++ b/packages/base/all/vendor-config-onl/src/python/onl/install/BaseRecovery.py @@ -0,0 +1,240 @@ +"""BaseRecovery.py + +Base classes for recovery. +""" + +import subprocess, os, stat +import tempfile +import binascii +import glob +import logging +from InstallUtils import TempdirContext, MountContext, SubprocessMixin, ProcMountsParser +from InstallUtils import InitrdContext, BlkidParser +from ConfUtils import ChrootGrubEnv + +class Base(SubprocessMixin): + + class recovermeta: + + bootConfig = "/mnt/flash/boot-config" + bootConfigDfl = "/etc/boot-config.default" + + @property + def needRecovery(self): + if os.path.exists('/mnt/flash/.notmounted'): return True + if os.path.exists('/mnt/flash2/.notmounted'): return True + return False + + def __init__(self, + ubootEnv=None, + log=None): + self.platform = self.recovermeta() + self.ubootEnv = ubootEnv + self.log = log or logging.getLogger(self.__class__.__name__) + + def recoverFull(self): + self.log.error("not implemented") + return 1 + + def recoverConfig(self): + if os.path.exists(self.platform.bootConfig): return 0 + self.copy2(self.platform.bootConfigDfl, self.platform.bootConfig) + return 0 + + def run(self): + + if self.platform.needRecovery: + self.log.info("Attempting recovery") + code = self.recoverFull() + if code: return code + + code = self.recoverConfig() + if code: return code + + return 0 + + def umountAny(self, device=None, label=None): + p = ProcMountsParser() + if label is not None: + b = BlkidParser(log=self.log) + for e in b.parts: + if label == e.label: + device = e.device + break + + for m in p.mounts: + if device is not None and device in m.device: + try: + self.check_call(('umount', m.device,), + vmode=self.V1) + except CalledProcessError, what: + self.log.warn("cannot umount %s: %s", + m.device, str(what)) + return 0 + + def shutdown(self): + pass + +class GrubRecovery(Base): + + class recovermeta(Base.recovermeta): + pass + + def recoverX86(self): + + def _u(l): + self.umountAny(label=l) + def _l(l): + try: + return self.check_output(('blkid', '-L', l,)).strip() + except subprocess.CalledProcessError: + return None + def _r(l): + _u(l) + dev = _l(l) + if dev is not None: + self.log.info("Recovering %s partition", l) + self.check_call(('mkdosfs', '-n', l, dev,), + vmode=self.V1) + + _r('FLASH') + _r('FLASH2') + + return 0 + + def recoverGrubConfig(self): + + with MountContext(label='ONIE-BOOT', log=self.log) as octx: + + pat = "%s/onie/initrd.img*" % octx.dir + l = glob.glob(pat) + if not l: + raise ValueError("cannot find ONIE initrd") + initrd = l[0] + + with InitrdContext(initrd=initrd, log=self.log) as ictx: + + # copy the Switch Light grubenv out of its GRUB directory + dst = os.path.join(ictx.dir, "tmp/grubenv") + with MountContext(label='SL-BOOT', log=self.log) as sctx: + src = os.path.join(sctx.dir, "grub/grubenv") + self.copy2(src, dst) + + # use the ONIE runtime's GRUB tools to read it + grubEnv = ChrootGrubEnv(ictx.dir, mounted=True, + bootDir="/", + path="/tmp/grubenv", + log=self.log) + buf = getattr(grubEnv, 'boot_config_default', None) + + if buf is None: + raise ValueError("Cannot recover filesystem(s) -- missing boot_config_default.") + if buf == "": + raise ValueError("Cannot recover filesystem(s) -- empty boot_config_default.") + try: + buf = buf.decode('base64', 'strict') + except binascii.Error: + raise ValueError("Cannot recover filesystem(s) -- corrupted boot_config_default.") + if "SWI=flash" in buf: + raise ValueError("Cannot recover filesystem(s) -- local SWI cannot be recovered.") + + with MountContext(label='FLASH', log=self.log) as ctx: + dst = os.path.join(ctx.dir, 'boot-config') + with open(dst, "w") as fd: + self.log.debug("+ cat > %s", dst) + fd.write(buf) + + return 0 + + def recoverFull(self): + self.log.info("Recovering flash partitions.") + + code = self.recoverX86() + if code: return code + + code = self.recoverGrubConfig() + if code: return code + + self.check_call(('initmounts',)) + + return 0 + +class UbootRecovery(Base): + + class recovermeta(Base.recovermeta): + + def __init__(self, ubootEnv=None): + self.ubootEnv = ubootEnv + + device = None + # fill this in per-platform + + @property + def bootConfigEnv(self): + if self.ubootEnv is None: + raise ValueError("missing u-boot environment tools") + buf = getattr(self.ubootEnv, 'boot-config-default', None) + if buf is None: + raise ValueError("Cannot recover filesystem(s) -- missing boot-config-default.") + if buf == "": + raise ValueError("Cannot recover filesystem(s) -- empty boot-config-default.") + try: + buf = buf.decode('base64', 'strict') + except binascii.Error: + raise ValueError("Cannot recover filesystem(s) -- corrupted boot-config-default.") + if "SWI=flash" in buf: + raise ValueError("Cannot recover filesystem(s) -- local SWI cannot be recovered.") + return buf + + def __init__(self, + ubootEnv=None, + log=None): + self.ubootEnv = ubootEnv + self.platform = self.recovermeta(ubootEnv=ubootEnv) + self.log = log or logging.getLogger(self.__class__.__name__) + + self.flashDev = self.platform.device + '2' + self.flash2Dev = self.platform.device + '3' + + def recoverUboot(self): + if not os.path.exists(self.platform.device): + self.log.error("missing block device, cannot recover") + return 1 + st = os.stat(self.platform.device) + if not stat.S_ISBLK(st[stat.ST_MODE]): + self.log.error("invalid block device") + return 1 + + code = self.umountAny(device=self.platform.device) + if code: return code + + self.log.info("Re-formatting %s", self.platform.device) + cmd = ('mkdosfs', '-n', 'FLASH', self.flashDev,) + self.check_call(cmd, vmode=self.V1) + cmd = ('mkdosfs', '-n', 'FLASH2', self.flash2Dev,) + self.check_call(cmd, vmode=self.V1) + return 0 + + def recoverUbootConfig(self): + with MountContext(self.flashDev, log=self.log) as ctx: + dst = os.path.join(ctx.dir, 'boot-config') + with open(dst, "w") as fd: + self.log.debug("+ cat > %s", dst) + fd.write(self.platform.bootConfigEnv) + return 0 + + def recoverFull(self): + + code = self.recoverUboot() + if code: return code + + self.recoverUbootConfig() + if code: return code + + self.log.info("syncing block devices") + self.check_call(('sync',)) + # XXX roth probably not needed + + self.check_call(('initmounts',)) + + return 0 diff --git a/packages/base/all/vendor-config-onl/src/python/onl/install/ConfUtils.py b/packages/base/all/vendor-config-onl/src/python/onl/install/ConfUtils.py new file mode 100644 index 00000000..b81fd347 --- /dev/null +++ b/packages/base/all/vendor-config-onl/src/python/onl/install/ConfUtils.py @@ -0,0 +1,390 @@ +"""ConfUtils.py + +Config interfaces to different backend mechanisms. +""" + +import os +import logging +import subprocess +from InstallUtils import SubprocessMixin, ChrootSubprocessMixin, MountContext + +class ConfBase: + + def __init__(self): + self._parse() + + def _parse(self): + raise NotImplementedError + + def _feedLine(self, line): + line = line.strip() + if not line: return + + idx = line.find('=') + if idx < 0: + raise ValueError("invalid line in %s: %s" + % (self.path, line,)) + key, val = line[:idx], line[idx+1:] + if val[:1] == '"' and val[-1:] == '"': + val = val[1:-1] + if val[:1] == "'" and val[-1:] == "'": + val = val[1:-1] + self.__dict__['_data'][key] = val + + def __getattr__(self, attr, *args): + if len(args) == 1: + return self.__dict__['_data'].get(attr, args[0]) + elif len(args) == 0: + try: + return self.__dict__['_data'][attr] + except KeyError, what: + raise AttributeError(str(what)) + else: + raise ValueError("extra arguments") + + def __setattr__(self, attr, val): + self.__dict__['_data'][attr] = val + +class ConfFileBase(ConfBase): + + PATH = None + # Override me + + def __init__(self, path=None): + self.__dict__['path'] = path or self.PATH + ConfBase.__init__(self) + + def _parse(self): + self.__dict__['_data'] = {} + with open(self.path) as fd: + for line in fd.xreadlines(): + self._feedLine(line) + +class MachineConf(ConfFileBase): + PATH = "/etc/machine.conf" + +class InstallerConf(ConfFileBase): + PATH = "/etc/onl/installer.conf" + +class ConfBuf(ConfBase): + + def __init__(self, buf): + self.__dict__['buf'] = buf + ConfBase.__init__(self) + + def _parse(self): + self.__dict__['_data'] = {} + for line in self.buf.splitlines(): + self._feedLine(line) + +class GrubEnv(SubprocessMixin): + + INSTALL = "grub-install" + EDITENV = "grub-editenv" + # system default + + ENV_PATH = "/grub/grubenv" + # override me + + def __init__(self, + bootDir=None, bootPart=None, + path=None, + log=None): + + if bootDir and bootPart: + raise ValueError("cannot specify bootDir and bootPart") + if not bootDir and not bootPart: + raise ValueError("missing bootDir or bootPart") + self.__dict__['bootDir'] = bootDir + self.__dict__['bootPart'] = bootPart + # location of GRUB boot files (mounted directory or unmounted partition) + + self.__dict__['path'] = path or self.ENV_PATH + # path to grubenv, relative to above + + self.__dict__['log'] = log or logging.getLogger("grub") + + def mountCtx(self, device): + return MountContext(device, fsType='ext4', log=self.log) + + def asDict(self): + if self.bootPart: + with self.mountCtx(self.bootPart) as ctx: + p = os.path.join(ctx.dir, self.path.lstrip('/')) + buf = self.check_output((self.EDITENV, p, 'list',)).strip() + else: + p = os.path.join(self.bootDir, self.path.lstrip('/')) + buf = self.check_output((self.EDITENV, p, 'list',)).strip() + cf = ConfBuf(buf) + return cf.__dict__['_data'] + + toDict = asDict + + def __getattr__(self, *args): + + args = list(args) + attr = args.pop(0) + + d = self.asDict() + if args: + return d.get(attr, args[0]) + try: + return d[attr] + except KeyError, what: + raise AttributeError(str(what)) + + def __setattr__(self, attr, val): + if self.bootPart: + with self.mountCtx(self.bootPart) as ctx: + p = os.path.join(ctx.dir, self.path.lstrip('/')) + cmd = (self.EDITENV, p, 'set', ("%s=%s" % (attr, val,)),) + self.check_call(cmd) + else: + p = os.path.join(self.bootDir, self.path.lstrip('/')) + cmd = (self.EDITENV, p, 'set', ("%s=%s" % (attr, val,)),) + self.check_call(cmd) + + def __delattr__(self, attr): + if self.bootPart: + with self.mountCtx(self.bootPart) as ctx: + p = os.path.join(ctx.dir, self.path.lstrip('/')) + cmd = (self.EDITENV, p, 'unset', attr,) + self.check_call(cmd) + else: + p = os.path.join(self.bootDir, self.path.lstrip('/')) + cmd = (self.EDITENV, p, 'unset', attr,) + self.check_call(cmd) + + def install(self, device): + if self.bootDir is not None: + self.check_call((self.INSTALL, '--boot-directory=' + self.bootDir, device,)) + elif self.bootPart is not None: + with self.mountCtx(self.bootPart) as ctx: + self.check_call((self.INSTALL, '--boot-directory=' + ctx.dir, device,)) + else: + self.check_call((self.INSTALL, device,)) + +class ChrootGrubEnv(ChrootSubprocessMixin, GrubEnv): + + def __init__(self, + chrootDir, + mounted=False, + bootDir=None, bootPart=None, + path=None, + log=None): + self.__dict__['chrootDir'] = chrootDir + self.__dict__['mounted'] = mounted + GrubEnv.__init__(self, + bootDir=bootDir, bootPart=bootPart, + path=path, + log=log) + + def mountCtx(self, device): + return MountContext(device, + chroot=self.chrootDir, fsType='ext4', + log=self.log) + +class ProxyGrubEnv: + """Pretend to manipulate the GRUB environment. + + Instead, write a trace of shell commands to a log + so that e.g. the chroot's host can execute it with + the proper GRUB runtime. + """ + + INSTALL = "grub-install" + EDITENV = "grub-editenv" + # system defaults + + ENV_PATH = "/grub/grubenv" + # override this + + def __init__(self, + installerConf, + bootDir=None, chroot=True, bootPart=None, + path=None, + log=None): + + self.__dict__['installerConf'] = installerConf + # installer state, to retrieve e.g. chroot directory and trace log + + if bootDir and bootPart: + raise ValueError("cannot specify bootDir and bootPart") + if not bootDir and not bootPart: + raise ValueError("missing bootDir or bootPart") + self.__dict__['bootDir'] = bootDir + self.__dict__['bootPart'] = bootPart + # location of GRUB boot files (mounted directory or unmounted partition) + + self.__dict__['chroot'] = chroot + # True of the bootDir is inside the chroot, + # else bootDir is in the host's file namespace + + self.__dict__['path'] = path or self.ENV_PATH + # path to grubenv, relative to above + + self.__dict__['log'] = log or logging.getLogger("grub") + + def asDict(self): + raise NotImplementedError("proxy grubenv list not implemented") + + toDict = asDict + + def __getattr__(self, *args): + raise NotImplementedError("proxy grubenv list not implemented") + + def __setattr__(self, attr, val): + self.log.warn("deferring commands to %s...", self.installerConf.installer_postinst) + + cmds = [] + if self.bootDir and self.chroot: + p = os.path.join(self.installerConf.installer_chroot, + self.bootDir.lstrip('/'), + self.path.lstrip('/')) + cmds.append(("%s %s set %s=\"%s\"" % (self.EDITENV, p, attr, val,))) + elif self.bootDir: + p = os.path.join(self.bootDir, + self.path.lstrip('/')) + cmds.append(("%s %s set %s=\"%s\"" % (self.EDITENV, p, attr, val,))) + else: + p = ("${mpt}/%s" + % (self.path.lstrip('/'),)) + cmds.append("mpt=$(mktemp -t -d)") + cmds.append("mount %s $mpt" % self.bootPart) + cmds.append(("sts=0; %s %s set %s=\"%s\" || sts=$?" + % (self.EDITENV, p, attr, val,))) + cmds.append("umount $mpt") + cmds.append("rmdir $mpt") + cmds.append("test $sts -eq 0") + + with open(self.installerConf.installer_postinst, "a") as fd: + for cmd in cmds: + self.log.debug("+ [PROXY] " + cmd) + fd.write(cmd) + fd.write("\n") + + def __delattr__(self, attr): + self.log.warn("deferring commands to %s...", self.installerConf.installer_postinst) + + cmds = [] + if self.bootDir and self.chroot: + p = os.path.join(self.installerConf.installer_chroot, + self.bootDir.lstrip('/'), + self.path.lstrip('/')) + cmds.append(("%s %s unset %s" % (self.EDITENV, p, attr,))) + elif self.bootDir: + p = os.path.join(self.bootDir, + self.path.lstrip('/')) + cmds.append(("%s %s unset %s" % (self.EDITENV, p, attr,))) + else: + p = ("$mpt%s" + % (self.path.lstrip('/'),)) + cmds.append("mpt=$(mktemp -t -d)") + cmds.append("mount %s $mpt" % self.bootPart) + cmds.append(("sts=0; %s %s unset %s || sts=$?" + % (self.EDITENV, p, attr,))) + cmds.append("umount $mpt") + cmds.append("rmdir $mpt") + cmds.append("test $sts -eq 0") + + with open(self.installerConf.installer_postinst, "a") as fd: + for cmd in cmds: + self.log.debug("+ [PROXY] " + cmd) + fd.write(cmd) + fd.write("\n") + + def install(self, device): + self.log.warn("deferring commands to %s...", self.installerConf.installer_postinst) + cmds = [] + if self.bootDir and self.chroot: + p = os.pat.join(self.installerConf.installer_chroot, + self.bootDir.lstrip('/')) + cmds.append(("%s --boot-directory=\"%s\" %s" % (self.INSTALL, p, device,))) + elif self.bootDir: + p = self.bootDir + cmds.append(("%s --boot-directory=\"%s\" %s" % (self.INSTALL, p, device,))) + elif self.bootPart: + cmds.append("mpt=$(mktemp -t -d)") + cmds.append("mount %s $mpt" % self.bootPart) + cmds.append(("sts=0; %s --boot-directory=\"$mpt\" %s || sts=$?" + % (self.INSTALL, device,))) + cmds.append("umount $mpt") + cmds.append("rmdir $mpt") + cmds.append("test $sts -eq 0") + else: + cmds.append(("%s %s" + % (self.INSTALL, device,))) + + with open(self.installerConf.installer_postinst, "a") as fd: + for cmd in cmds: + self.log.debug("+ [PROXY] " + cmd) + fd.write(cmd) + fd.write("\n") + +class UbootEnv(SubprocessMixin): + + # ha ha, loader and SWI use different paths + if os.path.exists("/usr/sbin/fw_setenv"): + SETENV = "/usr/sbin/fw_setenv" + elif os.path.exists("/usr/bin/fw_setenv"): + SETENV = "/usr/bin/fw_setenv" + else: + SETENV = "/bin/false" + + if os.path.exists("/usr/sbin/fw_printenv"): + PRINTENV = "/usr/sbin/fw_printenv" + elif os.path.exists("/usr/bin/fw_printenv"): + PRINTENV = "/usr/bin/fw_printenv" + else: + PRINTENV = "/bin/false" + + def __init__(self, log=None): + self.__dict__['log'] = log or logging.getLogger("u-boot") + + self.__dict__['hasForceUpdate'] = False + try: + out = self.check_output((self.SETENV, '--help',), + stderr=subprocess.STDOUT) + if "-f" in out and "Force update" in out: + self.__dict__['hasForceUpdate'] = True + except subprocess.CalledProcessError: + if self.SETENV != '/bin/false': + raise + + def __getattr__(self, *args): + + args = list(args) + attr = args.pop(0) + + with open(os.devnull, "w") as nfd: + try: + out = self.check_output((self.PRINTENV, '-n', attr,), + stderr=nfd.fileno()) + except subprocess.CalledProcessError: + out = None + + if out is not None: return out + + if args: + return args[0] + + raise AttributeError("firmware tag not found") + + def __setattr__(self, attr, val): + if self.hasForceUpdate: + self.check_call((self.SETENV, '-f', attr, val,)) + else: + self.check_call((self.SETENV, attr, val,)) + + def __delattr__(self, attr): + + if self.hasForceUpdate: + self.check_call((self.SETENV, '-f', attr,)) + else: + self.check_call((self.SETENV, attr,)) + + def asDict(self): + buf = self.check_output((self.PRINTENV,)).strip() + return ConfBuf(buf).__dict__['_data'] + + toDict = asDict diff --git a/packages/base/all/vendor-config-onl/src/python/onl/install/Fit.py b/packages/base/all/vendor-config-onl/src/python/onl/install/Fit.py new file mode 100644 index 00000000..b3ca037f --- /dev/null +++ b/packages/base/all/vendor-config-onl/src/python/onl/install/Fit.py @@ -0,0 +1,578 @@ +"""Fit.py + +Parse FIT files. +""" + +import os, sys +import logging +import struct +import argparse +import time + +class FdtProperty: + def __init__(self, name, offset, sz): + self.name = name + self.offset = offset + self.sz = sz + +class FdtNode: + def __init__(self, name): + self.name = name + self.properties = {} + self.nodes = {} + +class Parser: + + FDT_MAGIC = 0xd00dfeed + + FDT_BEGIN_NODE = 1 + FDT_END_NODE = 2 + FDT_PROP = 3 + FDT_NOP = 4 + FDT_END = 9 + + def __init__(self, path=None, stream=None, log=None): + self.log = log or logging.getLogger(self.__class__.__name__) + self.path = path + self.stream = stream + self.rootNodes = {} + self._parse() + + def _parse(self): + if self.stream is not None: + try: + pos = self.stream.tell() + self._parseStream(self.stream) + finally: + self.stream.seek(pos, 0) + elif self.path is not None: + with open(self.path) as fd: + self._parseStream(fd) + else: + raise ValueError("missing file or stream") + + def _parseStream(self, fd): + strings = {} + + buf = fd.read(40) + hdr = list(struct.unpack(">10I", buf)) + magic = hdr.pop(0) + if magic != self.FDT_MAGIC: + raise ValueError("missing magic") + self.fdtSize = hdr.pop(0) + self.structPos = hdr.pop(0) + self.stringPos = hdr.pop(0) + self.version = hdr.pop(0) + if self.version < 17: + raise ValueError("invalid format version") + hdr.pop(0) # last compatible version + hdr.pop(0) # boot cpu + self.stringSize = hdr.pop(0) + self.structSize = hdr.pop(0) + + fd.seek(self.structPos, 0) + + def _align(): + pos = fd.tell() + pos = (pos+3) & ~3 + fd.seek(pos, 0) + + def _label(): + buf = "" + while True: + c = fd.read(1) + if c == '\x00': break + if c: + buf += c + return buf + + def _string(off): + if off in strings: + return strings[off] + pos = fd.tell() + fd.seek(self.stringPos, 0) + fd.seek(off, 1) + buf = _label() + fd.seek(pos) + return buf + + nodeStack = [] + + while True: + buf = fd.read(4) + s = list(struct.unpack(">I", buf)) + tag = s.pop(0) + + if tag == self.FDT_BEGIN_NODE: + name = _label() + _align() + + newNode = FdtNode(name) + + if nodeStack: + if name in nodeStack[-1].nodes: + raise ValueError("duplicate node") + nodeStack[-1].nodes[name] = newNode + nodeStack.append(newNode) + else: + if name in self.rootNodes: + raise ValueError("duplicate node") + self.rootNodes[name] = newNode + nodeStack.append(newNode) + + continue + + if tag == self.FDT_PROP: + buf = fd.read(8) + s = list(struct.unpack(">2I", buf)) + plen = s.pop(0) + nameoff = s.pop(0) + name = _string(nameoff) + pos = fd.tell() + fd.seek(plen, 1) + _align() + + newProp = FdtProperty(name, pos, plen) + + if nodeStack: + if name in nodeStack[-1].properties: + raise ValueError("duplicate property") + nodeStack[-1].properties[name] = newProp + else: + raise ValueError("property with no node") + + continue + + if tag == self.FDT_END_NODE: + if nodeStack: + nodeStack.pop(-1) + else: + raise ValueError("missing begin node") + continue + + if tag == self.FDT_NOP: + print "NOP" + continue + + if tag == self.FDT_END: + if nodeStack: + raise ValueError("missing end node(s)") + break + + raise ValueError("invalid tag %d" % tag) + + def report(self, stream=sys.stdout): + q = [(x, "") for x in self.rootNodes.values()] + while q: + n, pfx = q.pop(0) + + name = n.name or "/" + stream.write("%s%s\n" % (pfx, name,)) + + if n.properties: + stream.write("\n") + for p in n.properties.values(): + stream.write("%s %s (%d bytes)\n" + % (pfx, p.name, p.sz,)) + if n.properties: + stream.write("\n") + + pfx2 = pfx + " " + q[0:0] = [(x, pfx2) for x in n.nodes.values()] + + def getNode(self, path): + if path == '/': + return self.rootNodes.get('', None) + + els = path.split('/') + n = None + while els: + b = els.pop(0) + if n is None: + if b not in self.rootNodes: return None + n = self.rootNodes[b] + else: + if b not in n.nodes: return None + n = n.nodes[b] + return n + + def getNodeProperty(self, node, propName): + if propName not in node.properties: return None + prop = node.properties[propName] + def _get(fd): + fd.seek(self.structPos, 0) + fd.seek(prop.offset) + buf = fd.read(prop.sz) + if buf[-1] == '\x00': + return buf[:-1] + return buf + if self.stream is not None: + return _get(self.stream) + else: + with open(self.path) as fd: + return _get(fd) + + def dumpNodeProperty(self, node, propIsh, outPath): + if isinstance(propIsh, FdtProperty): + prop = propIsh + else: + if propIsh not in node.properties: + raise ValueError("missing property") + prop = node.properties[propIsh] + def _dump(fd): + with open(outPath, "w") as wfd: + fd.seek(prop.offset, 0) + buf = fd.read(prop.sz) + wfd.write(buf) + if self.stream is not None: + try: + pos = self.stream.tell() + _dump(self.stream) + finally: + self.stream.seek(pos, 0) + else: + with open(self.path) as fd: + _dump(fd) + + def getInitrdNode(self, profile=None): + """U-boot mechanism to retrieve boot profile.""" + + node = self.getNode('/configurations') + if node is None: + self.log.warn("missing /configurations node") + return None + if profile is not None: + if profile not in node.nodes: + self.log.warn("missing profile %s", profile) + return None + node = node.nodes[profile] + elif 'default' in node.properties: + pf = self.getNodeProperty(node, 'default') + self.log.debug("default profile is %s", pf) + node = node.nodes[pf] + else: + pf = node.nodes.keys()[0] + self.log.debug("using profile %s", pf) + node = node.nodes[pf] + + if 'ramdisk' not in node.properties: + self.log.warn("ramdisk property not found") + return None + rdName = self.getNodeProperty(node, 'ramdisk') + + self.log.debug("retrieving ramdisk %s", rdName) + node = self.getNode('/images/' + rdName) + return node + +class DumpRunner: + + def __init__(self, stream, + log=None): + self.log = log or logging.getLogger(self.__class__.__name__) + self.stream = stream + + def run(self): + p = Parser(stream=self.stream, log=self.log) + p.report() + return 0 + + def shutdown(self): + stream, self.stream = self.stream, None + if stream is not None: stream.close() + +class ExtractBase: + + def __init__(self, stream, + initrd=False, profile=None, path=None, + property=None, + log=None): + self.log = log or logging.getLogger(self.__class__.__name__) + self.stream = stream + self.initrd = initrd + self.profile = profile + self.path = path + self.property = property + + self.parser = None + self.node = None + self.dataProp = None + + def run(self): + self.parser = Parser(stream=self.stream, log=self.log) + if self.path is not None: + self.node = self.parser.getNode(self.path) + if self.node is None: + self.log.error("cannot find path") + return 1 + elif self.initrd: + self.node = self.parser.getInitrdNode(profile=self.profile) + if self.node is None: + self.log.error("cannot find initrd") + return 1 + else: + self.log.error("missing path or initrd") + return 1 + + def _t(n): + if n is None: return + self.dataProp = self.dataProp or self.node.properties.get(n, None) + _t(self.property) + _t('data') + _t('value') + if self.dataProp is None: + self.log.error("cannot find %s property", self.property) + return 1 + + return self._handleParsed() + + def _handleParsed(self): + raise NotImplementedError + + def shutdown(self): + stream, self.stream = self.stream, None + if stream is not None: stream.close() + +class ExtractRunner(ExtractBase): + + def __init__(self, stream, + outStream=None, + initrd=False, profile=None, path=None, + property=None, + text=False, numeric=False, timestamp=False, hex=False, + log=None): + ExtractBase.__init__(self, stream, + initrd=initrd, profile=profile, + path=path, + property=property, + log=log) + self.outStream = outStream + self.text = text + self.numeric = numeric + self.timestamp = timestamp + self.hex = hex + + def _handleParsed(self): + if (self.numeric or self.timestamp) and self.dataProp.sz != 4: + self.log.error("invalid size for number") + return 1 + def _dump(rfd, wfd): + rfd.seek(self.dataProp.offset, 0) + buf = rfd.read(self.dataProp.sz) + if self.text: + if buf[-1:] != '\x00': + self.log.error("missing NUL terminator") + return 1 + wfd.write(buf[:-1]) + return 0 + if self.numeric: + n = struct.unpack(">I", buf)[0] + wfd.write(str(n)) + return 0 + if self.timestamp: + n = struct.unpack(">I", buf)[0] + wfd.write(time.ctime(n)) + return 0 + if self.hex: + for c in buf: + wfd.write("%02x" % ord(c)) + return 0 + wfd.write(buf) + return 0 + if self.outStream is not None: + return _dump(self.stream, self.outStream) + else: + return _dump(self.stream, sys.stdout) + +class OffsetRunner(ExtractBase): + + def __init__(self, stream, + initrd=False, profile=None, path=None, + property=None, + log=None): + ExtractBase.__init__(self, stream, + initrd=initrd, profile=profile, + path=path, + property=property, + log=log) + + def _handleParsed(self): + start = self.dataProp.offset + self.log.debug("first byte is %d", start) + end = start + self.dataProp.sz - 1 + self.log.debug("data size is %d", self.dataProp.sz) + self.log.debug("last byte is %d", end) + sys.stdout.write("%s %s\n" % (start, end,)) + return 0 + +USAGE = """\ +pyfit [OPTIONS] dump|extract ... +""" + +EPILOG = """\ +Payload for 'offset' and 'extract' is specified as a given +PROPERTY for a tree node at PATH. + +Alternately, the initrd/ramdisk can be specified with '--initrd', +using the PROFILE machine configuration. If no PROFILE is specified, +the built-in default configuration from the FDT is used. +""" + +DESC="""\ +Extract or examine FIT file contents. +""" + +DUMP_USAGE = """\ +pyfit [OPTIONS] dump FIT-FILE +""" + +EXTRACT_USAGE = """\ +pyfit [OPTIONS] extract [OPTIONS] FIT-FILE +""" + +EXTRACT_EPILOG = """\ +Extracts payload to OUTPUT or to stdout if not specified. + +Output can be optionally reformatted +as a NUL-terminated string ('--text'), +as a decimal number ('--number'), +as a UNIX timestamp ('--timestamp'), +or as hex data ('--hex'). + +Numbers and timestamps must be 4-byte payloads. +""" + +OFFSET_USAGE = """\ +pyfit [OPTIONS] offset [OPTIONS] FIT-FILE +""" + +OFFSET_EPILOG = """\ +Outputs the first and last byte offsets, inclusive, containing the +payload. +""" + +class App: + + def __init__(self, log=None): + self.log = log or logging.getLogger("pyfit") + + def run(self): + + ap = argparse.ArgumentParser(usage=USAGE, + description=DESC, + epilog=EPILOG) + ap.add_argument('-q', '--quiet', action='store_true', + help="Suppress log messages") + ap.add_argument('-v', '--verbose', action='store_true', + help="Add more logging") + + sp = ap.add_subparsers() + + apd = sp.add_parser('dump', + help="Dump tree structure", + usage=DUMP_USAGE) + apd.set_defaults(mode='dump') + apd.add_argument('fit-file', type=open, + help="FIT file") + + apx = sp.add_parser('extract', + help="Extract items", + usage=EXTRACT_USAGE, + epilog=EXTRACT_EPILOG) + apx.set_defaults(mode='extract') + apx.add_argument('fit-file', type=open, + help="FIT file") + apx.add_argument('-o', '--output', + type=argparse.FileType('wb', 0), + help="File destination") + apx.add_argument('--initrd', action="store_true", + help="Extract platform initrd") + apx.add_argument('--profile', type=str, + help="Platform profile for initrd selection") + apx.add_argument('--path', type=str, + help="Tree path to extract") + apx.add_argument('--property', type=str, + help="Node property to extract") + apx.add_argument('--text', action='store_true', + help="Format property as text") + apx.add_argument('--numeric', action='store_true', + help="Format property as a number") + apx.add_argument('--hex', action='store_true', + help="Format property as hex") + apx.add_argument('--timestamp', action='store_true', + help="Format property as a date") + + apo = sp.add_parser('offset', + help="Extract item offset", + usage=OFFSET_USAGE, + epilog=OFFSET_EPILOG) + apo.set_defaults(mode='offset') + apo.add_argument('fit-file', type=open, + help="FIT file") + apo.add_argument('--initrd', action="store_true", + help="Extract platform initrd") + apo.add_argument('--profile', type=str, + help="Platform profile for initrd selection") + apo.add_argument('--path', type=str, + help="Tree path to extract") + apo.add_argument('--property', type=str, + help="Node property to extract") + + try: + args = ap.parse_args() + except SystemExit, what: + return what.code + + if args.quiet: + self.log.setLevel(logging.ERROR) + if args.verbose: + self.log.setLevel(logging.DEBUG) + + if args.mode == 'dump': + r = DumpRunner(getattr(args, 'fit-file'), log=self.log) + elif args.mode == 'extract': + r = ExtractRunner(getattr(args, 'fit-file'), + outStream=args.output, + path=args.path, + initrd=args.initrd, profile=args.profile, + property=args.property, + text=args.text, numeric=args.numeric, + timestamp=args.timestamp, hex=args.hex, + log=self.log) + elif args.mode == 'offset': + r = OffsetRunner(getattr(args, 'fit-file'), + path=args.path, + initrd=args.initrd, profile=args.profile, + property=args.property, + log=self.log) + else: + self.log.error("invalid mode") + return 1 + + try: + code = r.run() + except: + self.log.exception("runner failed") + code = 1 + r.shutdown() + return code + + def shutdown(self): + pass + + @classmethod + def main(cls): + logging.basicConfig() + logger = logging.getLogger("pyfit") + app = cls(log=logger) + try: + code = app.run() + except: + logger.exception("app failed") + code = 1 + app.shutdown() + sys.exit(code) + +main = App.main + +if __name__ == "__main__": + main() diff --git a/packages/base/all/vendor-config-onl/src/python/onl/install/InstallUtils.py b/packages/base/all/vendor-config-onl/src/python/onl/install/InstallUtils.py new file mode 100644 index 00000000..922aecef --- /dev/null +++ b/packages/base/all/vendor-config-onl/src/python/onl/install/InstallUtils.py @@ -0,0 +1,829 @@ +"""InstallUtils.py + +""" + +import os, sys +import stat +import logging +import subprocess +import tempfile +import string +import shutil + +class SubprocessMixin: + + V1 = "V1" + V2 = "V2" + + def check_call(self, *args, **kwargs): + args = list(args) + kwargs = dict(kwargs) + + cwd = kwargs.pop('cwd', None) + if cwd is not None: + self.log.debug("+ cd " + cwd) + + if args: + cmd = args.pop(0) + else: + cmd = kwargs.pop('cmd') + + vmode = kwargs.pop('vmode', None) + if vmode == self.V1 and self.log.isEnabledFor(logging.DEBUG): + if isinstance(cmd, basestring): + raise ValueError("vmode=V1 requires a list") + cmd = list(cmd) + cmd[1:1] = ['-v',] + if vmode == self.V2 and self.log.isEnabledFor(logging.DEBUG): + stdout = kwargs.pop('stdout', None) + stderr = kwargs.pop('stderr', None) + if stdout is not None: + raise ValueError("vmode=V2 conflicts with stdout") + if stderr is not None and stderr != subprocess.STDOUT: + raise ValueError("vmode=V2 conflicts with stderr") + fno, v2Out = tempfile.mkstemp(prefix='subprocess-', + suffix='out') + kwargs['stdout'] = fno + kwargs['stderr'] = subprocess.STDOUT + + if isinstance(cmd, basestring): + self.log.debug("+ " + cmd) + else: + self.log.debug("+ " + " ".join(cmd)) + + if vmode == self.V2 and self.log.isEnabledFor(logging.DEBUG): + try: + subprocess.check_call(cmd, *args, cwd=cwd, **kwargs) + finally: + with open(v2Out) as fd: + sys.stderr.write(fd.read()) + os.unlink(v2Out) + else: + subprocess.check_call(cmd, *args, cwd=cwd, **kwargs) + + def check_output(self, *args, **kwargs): + args = list(args) + kwargs = dict(kwargs) + + cwd = kwargs.pop('cwd', None) + if cwd is not None: + self.log.debug("+ cd " + cwd) + + if args: + cmd = args.pop(0) + else: + cmd = kwargs.pop('cmd') + + vmode = kwargs.pop('vmode', None) + if vmode == self.V1 and self.log.isEnabledFor(logging.DEBUG): + if isinstance(cmd, basestring): + raise ValueError("vmode=V1 requires a list") + cmd = list(cmd) + cmd[1:1] = ['-v',] + if vmode == self.V2 and self.log.isEnabledFor(logging.DEBUG): + stdout = kwargs.pop('stdout', None) + stderr = kwargs.pop('stderr', None) + if stdout is not None: + raise ValueError("vmode=V2 conflicts with stdout") + if stderr is not None and stderr != subprocess.STDOUT: + raise ValueError("vmode=V2 conflicts with stderr") + fno, v2Out = tempfile.mkstemp(prefix='subprocess-', + suffix='out') + kwargs['stderr'] = fno + + if isinstance(cmd, basestring): + self.log.debug("+ " + cmd) + else: + self.log.debug("+ " + " ".join(cmd)) + + if vmode == self.V2 and self.log.isEnabledFor(logging.DEBUG): + try: + return subprocess.check_output(cmd, *args, cwd=cwd, **kwargs) + finally: + with open(v2Out) as fd: + sys.stderr.write(fd.read()) + os.unlink(v2Out) + else: + return subprocess.check_output(cmd, *args, cwd=cwd, **kwargs) + + def rmdir(self, path): + self.log.debug("+ /bin/rmdir %s", path) + os.rmdir(path) + + def unlink(self, path): + self.log.debug("+ /bin/rm %s", path) + os.unlink(path) + + def rmtree(self, path): + self.log.debug("+ /bin/rm -fr %s", path) + shutil.rmtree(path) + + def mkdtemp(self, *args, **kwargs): + path = tempfile.mkdtemp(*args, **kwargs) + self.log.debug("+ /bin/mkdir %s", path) + return path + + def copy2(self, src, dst): + self.log.debug("+ /bin/cp -a %s %s", src, dst) + shutil.copy2(src, dst) + + def copyfile(self, src, dst): + self.log.debug("+ /bin/cp %s %s", src, dst) + shutil.copyfile(src, dst) + + def mkdir(self, path): + self.log.debug("+ /bin/mkdir %s", path) + os.mkdir(path) + + def makedirs(self, path): + self.log.debug("+ /bin/mkdir -p %s", path) + os.makedirs(path) + + def symlink(self, tgt, dst): + self.log.debug("+ /bin/ln -s %s %s", tgt, dst) + os.symlink(tgt, dst) + +class TempdirContext(SubprocessMixin): + + def __init__(self, prefix=None, suffix=None, chroot=None, log=None): + self.prefix = prefix + self.suffix = suffix + self.chroot = chroot + self.dir = None + self.hostDir = None + self.log = log or logging.getLogger("mount") + + def __enter__(self): + if self.chroot is not None: + self.hostDir = self.mkdtemp(prefix=self.prefix, + suffix=self.suffix, + dir=self.chroot + "/tmp") + self.dir = self.hostDir[len(self.chroot):] + else: + self.dir = self.hostDir = self.mkdtemp(prefix=self.prefix, + suffix=self.suffix) + return self + + def __exit__(self, type, value, tb): + if self.path: self.rmtree(self.hostDir) + return False + +class MountContext(SubprocessMixin): + + def __init__(self, device=None, chroot=None, label=None, fsType=None, log=None): + self.device = device + self.chroot = chroot + self.label = label + self.fsType = fsType + self.dir = None + self.hostDir = None + self.mounted = False + self.log = log or logging.getLogger("mount") + + if self.device and self.label: + raise ValueError("cannot specify device and label") + if not self.device and not self.label: + raise ValueError("no device or label specified") + + def __enter__(self): + dev = self.device + if dev is None: + try: + dev = self.check_output(('blkid', '-L', self.label,)).strip() + except subprocess.CalledProcessError, what: + raise ValueError("cannot find label %s: %s" + % (self.label, str(what),)) + + if self.chroot is not None: + self.hostDir = self.mkdtemp(prefix="mount-", + suffix=".d", + dir=self.chroot + "/tmp") + self.dir = self.hostDir[len(self.chroot):] + else: + self.dir = self.hostDir = self.mkdtemp(prefix="mount-", + suffix=".d") + + if self.fsType is not None: + cmd = ('mount', '-t', self.fsType, dev, self.hostDir,) + else: + cmd = ('mount', dev, self.hostDir,) + self.check_call(cmd, vmode=self.V1) + self.mounted = True + return self + + def __exit__(self, type, value, tb): + + mounted = False + if self.mounted: + p = ProcMountsParser() + for e in p.mounts: + if e.dir == self.hostDir: + mounted = True + break + # really mounted? + # maybe unmounted e.g. if inside a chroot + if mounted: + cmd = ('umount', self.hostDir,) + self.check_call(cmd, vmode=self.V1) + + self.rmdir(self.hostDir) + return False + +class BlkidEntry: + + def __init__(self, device, **kwargs): + + self.device = device + + kwargs = dict(kwargs) + self.label = kwargs.pop('label', None) + self.uuid = kwargs.pop('uuid', None) + self.fsType = kwargs.pop('fsType', None) + + @classmethod + def fromLine(cls, line): + line = line.strip() + p = line.find(':') + if p < 0: + raise ValueError("invalid blkid output %s" + % line) + dev, line = line[:p], line[p+1:].strip() + + attrs = {} + while line: + p = line.find('=') + if p < 0: + raise ValueError("invalid blkid output %s" + % line) + key = line[:p].lower() + if line[p+1:p+2] == "'": + q = line.find("'", p+2) + if q < 0: + val, line = line[p+1:], "" + else: + val, line = line[p+2:q], line[q+1:].strip() + elif line[p+1:p+2] == '"': + q = line.find('"', p+2) + if q < 0: + val, line = line[p+1:], "" + else: + val, line = line[p+2:q], line[q+1:].strip() + else: + q = line.find(" ", p+1) + if q < 0: + val, line = line[p+1:], "" + else: + val, line = line[p+1:], line[:q].strip() + + if key == 'type': key = 'fsType' + attrs[key] = val + + return cls(dev, **attrs) + + def splitDev(self): + dev, part = self.device, "" + while dev[-1:] in string.digits: + dev, part = dev[:-1], dev[-1] + part + return dev, part + + def isOnieReserved(self): + if self.label is None: return False + + if 'GRUB' in self.label: return True + if 'ONIE-BOOT' in self.label: return True + if 'DIAG' in self.label: return True + + return False + +class BlkidParser(SubprocessMixin): + + def __init__(self, log=None): + self.log = log or logging.getLogger("blkid") + self.parse() + + def parse(self): + cmd = ('blkid',) + lines = self.check_output(cmd).splitlines() + self.parts = [BlkidEntry.fromLine(line) for line in lines] + + def __getitem__(self, idxOrName): + if type(idxOrName) == int: + return self.parts[idxOrName] + for part in self.parts: + if part.label == idxOrName: return part + if part.uuid == idxOrName: return part + raise IndexError("cannot find partition %s" % repr(idxOrName)) + + def __len__(self): + return len(self.parts) + +class ProcMtdEntry: + + def __init__(self, + charDevice, blockDevice, + offset, size, eraseSize, + label=None): + + self.charDevice = charDevice + self.blockDevice = blockDevice + self.offset = offset + self.size = size + self.eraseSize = eraseSize + self.label = label + + @classmethod + def fromLine(cls, line, offset=0): + buf = line.strip() + p = buf.find(':') + if p < 0: + raise ValueError("invalid /proc/mtd entry %s" + % line) + dev, buf = buf[:p], buf[p+1:].strip() + dev = '/dev/' + dev + if not os.path.exists(dev): + raise ValueError("invalid /proc/mtd entry %s (missing device)" + % line) + st = os.stat(dev) + if stat.S_ISBLK(st.st_mode): + cdev, bdev = None, dev + elif stat.S_ISCHR(st.st_mode): + cdev, bdev = dev, None + else: + cdev, bdev = None, None + + if cdev and not bdev: + if cdev.startswith("/dev/mtd") and not cdev.startswith("/dev/mtdblock"): + bdev = "/dev/mtdblock" + cdev[8:] + if not os.path.exists(bdev): + raise ValueError("invalid /proc/mtd entry %s (cannot find block device)" + % line) + st = os.stat(bdev) + if not stat.S_ISBLK(st.st_mode): + raise ValueError("invalid /proc/mtd entry %s (cannot find block device)" + % line) + else: + raise ValueError("invalid /proc/mtd entry %s (cannot find block device)" + % line) + elif not bdev: + raise ValueError("invalid /proc/mtd entry %s (not a block or char device)" + % line) + + p = buf.find(" ") + if p < 0: + raise ValueError("invalid /proc/mtd entry %s (missing size)" + % line) + sz, buf = buf[:p], buf[p+1:].strip() + sz = int(sz, 16) + + if not buf: + raise ValueError("invalid /proc/mtd entry %s (missing erase size)" + % line) + p = buf.find(" ") + if p < 0: + esz, buf = buf, "" + else: + esz, buf = buf[:p], buf[p+1:].strip() + esz = int(esz, 16) + + if not buf: + label = None + elif len(buf) > 1 and buf[0:1] == "'" and buf[-1:] == "'": + label = buf[1:-1] + elif len(buf) > 1 and buf[0:1] == '"' and buf[-1:] == '"': + label = buf[1:-1] + else: + label = buf + + return cls(cdev, bdev, offset, sz, esz, label=label) + +class ProcMtdParser(): + + def __init__(self, log=None): + self.log = log or logging.getLogger("blkid") + self.parse() + + def parse(self): + self.parts = [] + offset = 0 + if os.path.exists("/proc/mtd"): + with open("/proc/mtd") as fd: + for line in fd.xreadlines(): + if line.startswith("dev:"): + pass + else: + part = ProcMtdEntry.fromLine(line, offset=offset) + offset += part.size + self.parts.append(part) + + def __getitem__(self, idxOrName): + if type(idxOrName) == int: + return self.parts[idxOrName] + for part in self.parts: + if part.label == idxOrName: return part + raise IndexError("cannot find MTD partition %s" % repr(idxOrName)) + + def __len__(self): + return len(self.parts) + +class PartedDiskEntry: + + def __init__(self, device, blocks, lbsz, pbsz, + model=None, typ=None, flags=[]): + self.device = device + + self.blocks = blocks + self.lbsz = lbsz + self.pbsz = pbsz + + self.model = model + self.typ = typ + self.flags = flags + + @classmethod + def fromLine(cls, line): + + line = line.strip() + if not line.endswith(';'): + raise ValueError("invalid parted line %s" % line) + line = line[:-1] + rec = line.split(':') + + def _s(): + secs = rec.pop(0) + if secs[-1:] != 's': + raise ValueError("invalid sector count %s" % secs) + return int(secs[:-1]) + + dev = rec.pop(0) + blocks = _s() + model = rec.pop(0) or None + lbsz = int(rec.pop(0), 10) + pbsz = int(rec.pop(0), 10) + typ = rec.pop(0) + label = rec.pop(0) or None + flags = rec.pop(0) + flags = [x.strip() for x in flags.split(',')] + + if rec: + raise ValueError("invalid parted line %s" % line) + + return cls(dev, blocks, lbsz, pbsz, + model=model, typ=typ, + flags=flags) + +class PartedPartEntry: + + def __init__(self, part, start, end, sz, + fs=None, label=None, flags=[]): + self.part = part + self.start = start + self.end = end + self.sz = sz + self.fs = fs + self.label = label + self.flags = flags + + @classmethod + def fromLine(cls, line): + + line = line.strip() + if not line.endswith(';'): + raise ValueError("invalid parted line %s" % line) + line = line[:-1] + rec = line.split(':') + + def _s(): + secs = rec.pop(0) + if secs[-1:] != 's': + raise ValueError("invalid sector count %s" % secs) + return int(secs[:-1]) + + part = int(rec.pop(0), 10) + if part < 1: + raise ValueError("invalid partition %d" % part) + start = _s() + end = _s() + sz = _s() + fs = rec.pop(0) or None + label = rec.pop(0) or None + flags = rec.pop(0) + flags = [x.strip() for x in flags.split(',')] + + if rec: + raise ValueError("invalid parted line %s" % line) + + return cls(part, start, end, sz, + fs=fs, label=label, + flags=flags) + +class PartedParser(SubprocessMixin): + + def __init__(self, device, log=None): + self.device = device + self.log = log or logging.getLogger("parted") + self.parse() + + def parse(self): + + cmd = ('parted', '-m', self.device, + 'unit', 's', + 'print',) + lines = self.check_output(cmd).splitlines() + self.disk = None + parts = {} + for line in lines: + if line.startswith('/dev/'): + self.disk = PartedDiskEntry.fromLine(line) + elif line[0:1] in string.digits: + ent = PartedPartEntry.fromLine(line) + if ent.part in parts: + raise ValueError("duplicate partition") + parts[ent.part] = ent + + self.parts = [] + for partno in sorted(parts.keys()): + self.parts.append(parts[partno]) + + if self.disk is None: + raise ValueError("no partition table found") + + def __len__(self): + return len(self.parts) + +class ProcMountsEntry: + + def __init__(self, device, dir, fsType, flags={}): + self.device = device + self.dir = dir + self.fsType = fsType + self.flags = flags + + @classmethod + def fromLine(cls, line): + buf = line.strip() + + idx = buf.find(' ') + if idx < 0: + raise ValueError("invalid /proc/mounts line %s", line) + + device, buf = buf[:idx], buf[idx+1:].strip() + + idx = buf.find(' ') + if idx < 0: + raise ValueError("invalid /proc/mounts line %s", line) + + dir, buf = buf[:idx], buf[idx+1:].strip() + + idx = buf.find(' ') + if idx < 0: + raise ValueError("invalid /proc/mounts line %s", line) + + fsType, buf = buf[:idx], buf[idx+1:].strip() + + idx = buf.rfind(' ') + if idx < 0: + raise ValueError("invalid /proc/mounts line %s", line) + + buf, _ = buf[:idx], buf[idx+1:].strip() + + idx = buf.rfind(' ') + if idx < 0: + buf = "" + else: + buf, _ = buf[:idx], buf[idx+1:].strip() + + flags = {} + if buf: + for flag in buf.split(','): + idx = flag.find('=') + if idx > -1: + key, val = flag[:idx], flag[idx+1:] + else: + key, val = flag, True + flags[key] = val + + return cls(device, dir, fsType, flags) + +class ProcMountsParser: + + def __init__(self): + self.parse() + + def parse(self): + self.mounts = [] + with open("/proc/mounts") as fd: + for line in fd.readlines(): + self.mounts.append(ProcMountsEntry.fromLine(line)) + +class InitrdContext(SubprocessMixin): + + def __init__(self, initrd=None, dir=None, log=None): + if initrd is None and dir is None: + raise ValueError("missing initrd or initrd dir") + if initrd and dir: + raise ValueError("cannot specify initrd and initrd dir") + self.initrd = initrd + self.dir = dir + self.hlog = log or logging.getLogger("mount") + self.ilog = self.hlog.getChild("initrd") + self.ilog.setLevel(logging.INFO) + self.log = self.hlog + + def _unpack(self): + self.dir = self.mkdtemp(prefix="chroot-", + suffix=".d") + with open(self.initrd) as fd: + mbuf = fd.read(1024) + if mbuf[0:2] == "\x1f\x8b": + c1 = ('gzip', '-dc', self.initrd,) + elif mbuf[0:2] == "BZ": + c1 = ('bzip2', '-dc', self.initrd,) + elif mbuf[0:6] == "\xfd7zXZ\x00": + c1 = ('xz', '-dc', self.initrd,) + else: + raise ValueError("cannot decode initrd") + c2 = ('cpio', '-imd',) + self.log.debug("+ %s | %s", + " ".join(c1), " ".join(c2)) + p1 = subprocess.Popen(c1, + stdout=subprocess.PIPE) + if self.log.isEnabledFor(logging.DEBUG): + p2 = subprocess.Popen(c2, + cwd=self.dir, + stdin=p1.stdout) + else: + p2 = subprocess.Popen(c2, + cwd=self.dir, + stdin=p1.stdout, + stdout=subprocess.PIPE, + stderr=subprocess.STDOUT) + c1 = p1.wait() + out, _ = p2.communicate() + c2 = p2.wait() + if c2 and out: + sys.stderr.write(out) + if c1 or c2: + raise ValueError("initrd unpack failed") + + def _prepDirs(self): + + dev2 = os.path.join(self.dir, "dev") + if not os.path.exists(dev2): + self.mkdir(dev2) + + for e in os.listdir(dev2): + dst = os.path.join(dev2, e) + if os.path.islink(dst): + self.unlink(dst) + elif os.path.isdir(dst): + self.rmtree(dst) + else: + self.unlink(dst) + + for e in os.listdir("/dev"): + src = os.path.join("/dev", e) + dst = os.path.join(dev2, e) + if os.path.islink(src): + self.symlink(os.readlink(src), dst) + elif os.path.isdir(src): + self.mkdir(dst) + elif os.path.isfile(src): + self.copy2(src, dst) + else: + st = os.stat(src) + if stat.S_ISBLK(st.st_mode): + maj, min = os.major(st.st_rdev), os.minor(st.st_rdev) + self.log.debug("+ mknod %s b %d %d", dst, maj, min) + os.mknod(dst, st.st_mode, st.st_rdev) + elif stat.S_ISCHR(st.st_mode): + maj, min = os.major(st.st_rdev), os.minor(st.st_rdev) + self.log.debug("+ mknod %s c %d %d", dst, maj, min) + os.mknod(dst, st.st_mode, st.st_rdev) + else: + self.log.debug("skipping device %s", src) + + dst = os.path.join(self.dir, "dev/pts") + if not os.path.exists(dst): + self.mkdir(dst) + + if 'TMPDIR' in os.environ: + dst = self.dir + os.environ['TMPDIR'] + if not os.path.exists(dst): + self.makedirs(dst) + + def __enter__(self): + + if self.initrd is not None: + + self.log.debug("extracting initrd %s", self.initrd) + self._unpack() + + self.log.debug("preparing chroot in %s", self.dir) + try: + self.log = self.ilog + self._prepDirs() + finally: + self.log = self.hlog + + dst = os.path.join(self.dir, "proc") + cmd = ('mount', '-t', 'proc', 'proc', dst,) + self.check_call(cmd, vmode=self.V1) + + dst = os.path.join(self.dir, "sys") + cmd = ('mount', '-t', 'sysfs', 'sysfs', dst,) + self.check_call(cmd, vmode=self.V1) + + dst = os.path.join(self.dir, "dev/pts") + cmd = ('mount', '-t', 'devpts', 'devpts', dst,) + self.check_call(cmd, vmode=self.V1) + + return self + + def __exit__(self, type, value, tb): + + p = ProcMountsParser() + dirs = [e.dir for e in p.mounts if e.dir.startswith(self.dir)] + + # XXX probabaly also kill files here + + # umount any nested mounts + self.log.debug("un-mounting mounts points in chroot %s", self.dir) + dirs.sort(reverse=True) + for p in dirs: + cmd = ('umount', p,) + self.check_call(cmd, vmode=self.V1) + + if self.initrd is not None: + self.log.debug("cleaning up chroot in %s", self.dir) + self.rmtree(self.dir) + else: + self.log.debug("saving chroot in %s", self.dir) + + return False + + @classmethod + def mkChroot(self, initrd, log=None): + with InitrdContext(initrd=initrd, log=log) as ctx: + initrdDir = ctx.dir + ctx.initrd = None + # save the unpacked directory, do not clean it up + # (it's inside this chroot anyway) + return initrdDir + +class ChrootSubprocessMixin: + + chrootDir = None + mounted = False + # initialize this in a concrete class + + def check_call(self, *args, **kwargs): + args = list(args) + kwargs = dict(kwargs) + + cwd = kwargs.pop('cwd', None) + if cwd is not None: + self.log.debug("+ cd " + cwd) + + if args: + cmd = args.pop(0) + else: + cmd = kwargs.pop('cmd') + if isinstance(cmd, basestring): + cmd = ('chroot', self.chrootDir, + '/bin/sh', '-c', 'IFS=;' + cmd,) + else: + cmd = ['chroot', self.chrootDir,] + list(cmd) + + if not self.mounted: + with InitrdContext(dir=self.chrootDir, log=self.log) as ctx: + self.log.debug("+ " + " ".join(cmd)) + subprocess.check_call(cmd, *args, cwd=cwd, **kwargs) + else: + self.log.debug("+ " + " ".join(cmd)) + subprocess.check_call(cmd, *args, cwd=cwd, **kwargs) + + def check_output(self, *args, **kwargs): + args = list(args) + kwargs = dict(kwargs) + + cwd = kwargs.pop('cwd', None) + if cwd is not None: + self.log.debug("+ cd " + cwd) + + if args: + cmd = args.pop(0) + else: + cmd = kwargs.pop('cmd') + if isinstance(cmd, basestring): + cmd = ('chroot', self.chrootDir, + '/bin/sh', '-c', 'IFS=;' + cmd,) + else: + cmd = ['chroot', self.chrootDir,] + list(cmd) + + if not self.mounted: + with InitrdContext(self.chrootDir, log=self.log) as ctx: + self.log.debug("+ " + " ".join(cmd)) + return subprocess.check_output(cmd, *args, cwd=cwd, **kwargs) + else: + self.log.debug("+ " + " ".join(cmd)) + return subprocess.check_output(cmd, *args, cwd=cwd, **kwargs) diff --git a/packages/base/all/vendor-config-onl/src/python/onl/install/RecoverApp.py b/packages/base/all/vendor-config-onl/src/python/onl/install/RecoverApp.py new file mode 100644 index 00000000..2a4abf4b --- /dev/null +++ b/packages/base/all/vendor-config-onl/src/python/onl/install/RecoverApp.py @@ -0,0 +1,81 @@ +"""RecoverApp.py + +Application-level code for Switch Light recovery. +""" + +import os, sys +import imp +import logging +from ConfUtils import UbootEnv + +class App: + + def __init__(self, log=None): + + if log is not None: + self.log = log + else: + self.log = logging.getLogger(self.__class__.__name__) + + self.recovery = None + + def run(self): + + if os.path.exists(UbootEnv.SETENV): + self.ubootEnv = UbootEnv(log=self.log.getChild("u-boot")) + else: + self.ubootEnv = None + + # load the platform-specific blob + if os.path.exists("/etc/onl/platform"): + with open("/etc/onl/platform") as fd: + plat = fd.read().strip() + else: + self.log.error("cannot recover non-ONL platform") + return 1 + + p = ("/lib/platform-config/%s/python/recover.py" + % (plat,)) + if not os.path.exists(p): + self.log.error("missing recover profile %s", p) + return 1 + mod = imp.load_source("platform_recover", p) + + # run the platform-specific installer + self.recovery = mod.Recovery(ubootEnv=self.ubootEnv, + log=self.log) + try: + code = self.recovery.run() + except: + self.log.exception("recovery failed") + code = 1 + if code: return code + + return 0 + + def shutdown(self): + + recovery, self.recovery = self.recovery, None + if recovery is not None: + recovery.shutdown() + + @classmethod + def main(cls): + + logging.basicConfig() + logger = logging.getLogger("recover") + logger.setLevel(logging.DEBUG) + + app = cls(log=logger) + try: + code = app.run() + except: + logger.exception("runner failed") + code = 1 + app.shutdown() + sys.exit(code) + +main = App.main + +if __name__ == "__main__": + main() diff --git a/packages/base/all/vendor-config-onl/src/python/onl/install/ShellApp.py b/packages/base/all/vendor-config-onl/src/python/onl/install/ShellApp.py new file mode 100644 index 00000000..add79f67 --- /dev/null +++ b/packages/base/all/vendor-config-onl/src/python/onl/install/ShellApp.py @@ -0,0 +1,251 @@ +"""ShellApp.py +""" + +import os, sys +import glob +import tempfile +import logging +import subprocess +import argparse +import string +import struct +from InstallUtils import InitrdContext, MountContext +from InstallUtils import SubprocessMixin +from InstallUtils import ProcMountsParser, ProcMtdParser +import Fit + +class AppBase(SubprocessMixin): + + @property + def PROG(self): + raise NotImplementedError + + def __init__(self, command=None, log=None): + + if log is not None: + self.log = log + else: + self.log = logging.getLogger(self.__class__.__name__) + self.command = command + + def _runInitrdShell(self, initrd): + with InitrdContext(initrd=initrd, log=self.log) as ctx: + if self.command is not None: + cmd = ('chroot', ctx.dir, + '/bin/sh', '-c', 'IFS=;' + self.command) + else: + cmd = ('chroot', ctx.dir, + '/bin/sh', '-i') + try: + self.check_call(cmd) + except subprocess.CalledProcessError, what: + pass + return 0 + + def _runMtdShell(self, device): + self.log.debug("parsing FIT image in %s", device) + p = Fit.Parser(path=device, log=self.log) + node = p.getInitrdNode() + if node is None: + self.log.error("cannot find initrd node in FDT") + return 1 + prop = node.properties.get('data', None) + if prop is None: + self.log.error("cannot find initrd data property in FDT") + return 1 + with open(device) as fd: + self.log.debug("reading initrd at [%x:%x]", + prop.offset, prop.offset+prop.sz) + fd.seek(prop.offset, 0) + buf = fd.read(prop.sz) + try: + fno, initrd = tempfile.mkstemp(prefix="initrd-", + suffix=".img") + self.log.debug("+ cat > %s", initrd) + with os.fdopen(fno, "w") as fd: + fd.write(buf) + return self._runInitrdShell(initrd) + finally: + self.unlink(initrd) + + def shutdown(self): + pass + + @classmethod + def main(cls): + + logging.basicConfig() + logger = logging.getLogger(cls.PROG) + logger.setLevel(logging.INFO) + + ap = argparse.ArgumentParser(prog=cls.PROG) + ap.add_argument('-v', '--verbose', action='store_true', + help='Enable verbose logging') + ap.add_argument('-q', '--quiet', action='store_true', + help='Suppress logging') + ap.add_argument('-c', type=str, dest='command', + help='Run a batch command') + + try: + args = ap.parse_args() + except SystemExit, what: + sys.exit(what.code) + + if args.verbose: + logger.setLevel(logging.DEBUG) + if args.quiet: + logger.setLevel(logging.ERROR) + + app = cls(command=args.command, log=logger) + try: + code = app.run() + except: + logger.exception("runner failed") + code = 1 + app.shutdown() + sys.exit(code) + +class Onie(AppBase): + + PROG = "onie-shell" + + def run(self): + + def _g(d): + pat = os.path.join(d, "onie/initrd.img*") + l = glob.glob(pat) + if l: return l[0] + return None + + # try to find onie initrd on a mounted fs (GRUB) + initrd = _g("/mnt/onie-boot") + if initrd is not None: + self.log.debug("found ONIE initrd at %s", initrd) + return self._runInitrdShell(initrd) + + # try to find the onie boot partition elsewhere + pm = ProcMountsParser() + try: + dev = self.check_output(('blkid', '-L', 'ONIE-BOOT',)).strip() + except subprocess.CalledProcessError, what: + dev = None + if dev is not None: + self.log.debug("found ONIE boot device %s", dev) + parts = [p for p in pm.mounts if p.device == dev] + if parts: + onieDir = parts[0] + self.log.debug("found ONIE boot mounted at %s", onieDir) + initrd = _g(onieDir) + if initrd is not None: + self.log.debug("found ONIE initrd at %s", initrd) + return _runInitrdShell(initrd) + else: + self.log.error("cannot find ONIE initrd") + return 1 + else: + with MountContext(dev, fsType='ext4', log=self.log) as ctx: + initrd = _g(ctx.dir) + if initrd is not None: + self.log.debug("found ONIE initrd at %s", initrd) + return self._runInitrdShell(initrd) + else: + self.log.error("cannot find ONIE initrd") + return 1 + + # grovel through MTD devices (u-boot) + pm = ProcMtdParser(log=self.log) + parts = [p for p in pm.parts if p.label == "onie"] + if parts: + part = parts[0] + self.log.debug("found ONIE MTD device %s", + part.charDevice or part.blockDevice) + return self._runMtdShell(part.blockDevice) + elif pm.parts: + self.log.error("cannot find ONIE MTD device") + return 1 + + self.log.error("cannot find ONIE initrd") + return 1 + +class Loader(AppBase): + + PROG = "loader-shell" + + def run(self): + + def _g(d): + pat = os.path.join(d, "initrd-*") + l = glob.glob(pat) + if l: return l[0] + return None + + # try to find the loader boot partition as a formatted block device + pm = ProcMountsParser() + try: + dev = self.check_output(('blkid', '-L', 'SL-BOOT',)).strip() + except subprocess.CalledProcessError, what: + dev = None + if dev is not None: + self.log.debug("found loader device %s", dev) + parts = [p for p in pm.mounts if p.device == dev] + if parts: + loaderDir = parts[0] + self.log.debug("found loader device mounted at %s", loaderDir) + initrd = _g(loaderDir) + if initrd is not None: + self.log.debug("found loader initrd at %s", initrd) + return _runInitrdShell(initrd) + else: + self.log.error("cannot find loader initrd") + return 1 + else: + with MountContext(dev, fsType='ext4', log=self.log) as ctx: + initrd = _g(ctx.dir) + if initrd is not None: + self.log.debug("found loader initrd at %s", initrd) + return self._runInitrdShell(initrd) + else: + self.log.error("cannot find loader initrd") + return 1 + + # try to find the loader partition on the same desk as /mnt/flash + try: + flashDev = self.check_output(('blkid', '-L', 'FLASH',)).strip() + except subprocess.CalledProcessError, what: + flashDev = None + if flashDev is not None: + self.log.debug("found flash device hint %s", flashDev) + loaderDev = flashDev + while loaderDev and loaderDev[-1] in string.digits: + loaderDev = loaderDev[:-1] + loaderDev = loaderDev + '1' + with open(loaderDev) as fd: + buf = fd.read(4) + magic = struct.unpack(">I", buf)[0] + if magic == Fit.Parser.FDT_MAGIC: + self.log.debug("found loader device %s", loaderDev) + return self._runMtdShell(loaderDev) + else: + self.log.error("bad FDT signature on %s %x", + loaderDev, magic) + return 1 + + # grovel through MTD devices (u-boot) + pm = ProcMtdParser(log=self.log) + parts = [p for p in pm.parts if p.label == "sl-boot"] + if parts: + part = parts[0] + self.log.debug("found loader MTD device %s", + part.charDevice or part.blockDevice) + return self._runMtdShell(part.blockDevice) + elif pm.parts: + self.log.error("cannot find loader MTD device") + return 1 + + self.log.error("cannot find loader initrd") + return 1 + +main = Onie.main + +if __name__ == "__main__": + main() diff --git a/packages/base/all/vendor-config-onl/src/python/onl/install/__init__.py b/packages/base/all/vendor-config-onl/src/python/onl/install/__init__.py new file mode 100644 index 00000000..584287a7 --- /dev/null +++ b/packages/base/all/vendor-config-onl/src/python/onl/install/__init__.py @@ -0,0 +1,4 @@ +"""__init__.py + +Module setup for switchlight.install +""" From 90a45eff50deb97ed84d64018fea3e0e6298dd7a Mon Sep 17 00:00:00 2001 From: "Carl D. Roth" Date: Mon, 2 May 2016 12:52:13 -0700 Subject: [PATCH 08/62] Yaml helper module - util for loading the mongrel YAML platform definitons --- .../src/python/onl/YamlUtils.py | 107 ++++++++++++++++++ 1 file changed, 107 insertions(+) create mode 100644 packages/base/all/vendor-config-onl/src/python/onl/YamlUtils.py diff --git a/packages/base/all/vendor-config-onl/src/python/onl/YamlUtils.py b/packages/base/all/vendor-config-onl/src/python/onl/YamlUtils.py new file mode 100644 index 00000000..44822148 --- /dev/null +++ b/packages/base/all/vendor-config-onl/src/python/onl/YamlUtils.py @@ -0,0 +1,107 @@ +"""YamlUtils.py + +""" + +import yaml +try: + import onlyaml + def load(stream): + return yaml.load(stream, Loader=onlyaml.Loader) +except ImportError: + load = yaml.load + +def merge(p1, p2): + """Merge two YAML files. + + y1 is the 'default' source; leaf values from y2 will override. + Return the merged tree. + + y1 should be a dict with a single top-level key, 'default'. + y2 should be a dict with a single top-level key, not 'default'. + + Set a leaf in y2 to nil ('~') to create a tombstone (discard any key + from y1). + + if a (sub) key in y1, y2 differ in type (dict vs. non-dict) then + the merge will proceed with the non-dict promoted to a dict using + the default-key schema ('='). Consumers of this function should be + prepared to handle such keys. + """ + + with open(p1) as fd: + buf1 = fd.read() + with open(p2) as fd: + buf2 = fd.read() + + # read p1 as-is, make sure it looks like a 'default' YAML + c1 = load(buf1) + k1 = list(c1.keys()) + if k1 != ['default']: + raise ValueError("%s: invalid top-level keys for default mapping: %s" + % (p1, k1,)) + + # read p2 with the default YAML as a sub-key (to resolve anchors) + lines = buf2.splitlines(False) + lines = [x for x in lines if x != '---'] + buf3 = buf1 + "\n" + "\n".join(lines) + c2 = load(buf3) + c2.pop('default', None) + + k2 = list(c2.keys()) + if len(k2) != 1: + raise ValueError("invalid format for target mapping") + tgtKey = k2[0] + + merged = { tgtKey : {} } + q = [(c1['default'], c2[tgtKey], merged[tgtKey])] + while True: + if not q: break + c1, c2, c3 = q.pop(0) + # add in non-overlapping keys + # 'None' keys from p2 are tombstones + s1 = set(c1.keys()) + s2 = set(c2.keys()) + + for k in s1.difference(s2): + v = c1[k] + if type(v) == dict: + c3.setdefault(k, {}) + q.append((v, {}, c3[k],)) + else: + c3.setdefault(k, v) + + for k in s2.difference(s1): + v = c2[k] + if v is None: continue + if type(v) == dict: + c3.setdefault(k, {}) + q.append(({}, v, c3[k],)) + else: + c3.setdefault(k, v) + + # handle overlapping keys + for k in s1.intersection(s2): + v1 = c1[k] + v2 = c2[k] + + if v2 is None: continue + + # two dicts, key-by-key reconciliation required + if type(v1) == dict and type(v2) == dict: + c3.setdefault(k, {}) + q.append((v1, v2, c3[k],)) + continue + + # two non-dicts, p2 wins + if type(v1) != dict and type(v2) != dict: + c3[k] = v2 + continue + + if type(v1) != dict: + v1 = { '=' : v1, } + if type(v2) != dict: + v2 = { '=' : v2, } + c3.setdefault(k, {}) + q.append((v1, v2, c3[k],)) + + return merged From 972f2cdf6f0bc112858b4de9ac0003bccfca1e57 Mon Sep 17 00:00:00 2001 From: "Carl D. Roth" Date: Mon, 2 May 2016 12:53:01 -0700 Subject: [PATCH 09/62] Update the YAML loader for platform configs --- .../src/python/onl/platform/base.py | 35 ++++++++++++++++--- 1 file changed, 30 insertions(+), 5 deletions(-) diff --git a/packages/base/all/vendor-config-onl/src/python/onl/platform/base.py b/packages/base/all/vendor-config-onl/src/python/onl/platform/base.py index 8bf9a2a2..874782a4 100644 --- a/packages/base/all/vendor-config-onl/src/python/onl/platform/base.py +++ b/packages/base/all/vendor-config-onl/src/python/onl/platform/base.py @@ -10,11 +10,13 @@ ############################################################ import pprint -import yaml import json import os import re +import yaml +import onl.YamlUtils + class OnlInfoObject(object): DEFAULT_INDENT=" " @@ -99,18 +101,41 @@ class OnlPlatformBase(object): CONFIG_DIR='/lib/platform-config' CURRENT_DIR=os.path.join(CONFIG_DIR, 'current') + CONFIG_DEFAULT_GRUB = "/lib/vendor-config/onl/platform-config-defaults-x86-64.yml" + CONFIG_DEFAULT_UBOOT = "/lib/vendor-config/onl/platform-config-defaults-uboot.yml" + def __init__(self): self.add_info_json("onie_info", "%s/onie-info.json" % self.basedir_onl(), OnieInfo, required=False) self.add_info_json("platform_info", "%s/platform-info.json" % self.basedir_onl(), required=False) - # Load the platform config yaml file - y = os.path.join(self.basedir_onl(), "%s.yml" % self.platform()) - if os.path.exists(y): - self.platform_config = yaml.load(open(y)) + # Find the base platform config + if self.platform().startswith('x86-64'): + y1 = self.CONFIG_DEFAULT_GRUB + elif self.platform().startswith('powerpc'): + y1 = self.CONFIG_DEFAULT_UBOOT + elif self.platform().startswith('arm'): + y1 = self.CONFIG_DEFAULT_UBOOT + else: + y1 = None + + # Find and load the platform config yaml file + y2 = os.path.join(self.basedir_onl(), "%s.yml" % self.platform()) + if os.path.exists(y1) and os.path.exists(y2): + self.platform_config = onl.YamlUtils.merge(y1, y2) if self.platform() in self.platform_config: self.platform_config = self.platform_config[self.platform()] + elif os.path.exists(y2): + with open(y2) as fd: + self.platform_config = yaml.load(fd) + if self.platform() in self.platform_config: + self.platform_config = self.platform_config[self.platform()] + elif os.path.exists(y1): + with open(y1) as fd: + self.platform_config = yaml.load(fd) + if 'default' in self.platform_config: + self.platform_config = self.platform_config['default'] else: self.platform_config = {} From 15c7af3999280aa9ed2475387455b866412f9bf1 Mon Sep 17 00:00:00 2001 From: "Carl D. Roth" Date: Mon, 2 May 2016 12:53:33 -0700 Subject: [PATCH 10/62] Platform config updates - get the platform type from /etc/machine.conf if run from ONIE --- .../src/python/onl/platform/current.py | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-) diff --git a/packages/base/all/vendor-config-onl/src/python/onl/platform/current.py b/packages/base/all/vendor-config-onl/src/python/onl/platform/current.py index 68606154..545fac04 100644 --- a/packages/base/all/vendor-config-onl/src/python/onl/platform/current.py +++ b/packages/base/all/vendor-config-onl/src/python/onl/platform/current.py @@ -14,12 +14,23 @@ # platform-config packages. # ############################################################ +import os import importlib def import_subsystem_platform_class(subsystem='onl', klass='OnlPlatform'): # Determine the current platform name. - with open("/etc/onl/platform", 'r') as f: - platform=f.read().strip() + platform = None + if os.path.exists("/etc/onl/platform"): + with open("/etc/onl/platform", 'r') as f: + platform=f.read().strip() + elif os.path.exists("/etc/machine.conf"): + with open("/etc/machine.conf", 'r') as f: + lines = f.readlines(False) + lines = [x for x in lines if x.startswith('onie_platform=')] + if lines: + platform = lines[0].partition('=')[2].strip() + if platform is None: + raise RuntimeError("cannot find a platform declaration") platform_module = platform.replace('-', '_') From a780c0b5ebabd350c55ca424b9c98500243c42f9 Mon Sep 17 00:00:00 2001 From: "Carl D. Roth" Date: Mon, 2 May 2016 12:55:05 -0700 Subject: [PATCH 11/62] Userland tools for new installer --- .../base/all/vendor-config-onl/src/bin/loader-shell | 11 +++++++++++ .../base/all/vendor-config-onl/src/bin/onie-shell | 11 +++++++++++ .../base/all/vendor-config-onl/src/bin/onl-install | 11 +++++++++++ .../base/all/vendor-config-onl/src/bin/onl-recover | 11 +++++++++++ packages/base/all/vendor-config-onl/src/bin/pyfit | 11 +++++++++++ 5 files changed, 55 insertions(+) create mode 100755 packages/base/all/vendor-config-onl/src/bin/loader-shell create mode 100755 packages/base/all/vendor-config-onl/src/bin/onie-shell create mode 100755 packages/base/all/vendor-config-onl/src/bin/onl-install create mode 100755 packages/base/all/vendor-config-onl/src/bin/onl-recover create mode 100755 packages/base/all/vendor-config-onl/src/bin/pyfit diff --git a/packages/base/all/vendor-config-onl/src/bin/loader-shell b/packages/base/all/vendor-config-onl/src/bin/loader-shell new file mode 100755 index 00000000..0ee08028 --- /dev/null +++ b/packages/base/all/vendor-config-onl/src/bin/loader-shell @@ -0,0 +1,11 @@ +#!/usr/bin/python + +"""Run native ONIE tools +""" + +import sys +import distutils.sysconfig +sys.path.append("/usr/lib/python%s/dist-packages" + % distutils.sysconfig.get_python_version()) +import onl.install.ShellApp +onl.install.ShellApp.Loader.main() diff --git a/packages/base/all/vendor-config-onl/src/bin/onie-shell b/packages/base/all/vendor-config-onl/src/bin/onie-shell new file mode 100755 index 00000000..ecf8b7a3 --- /dev/null +++ b/packages/base/all/vendor-config-onl/src/bin/onie-shell @@ -0,0 +1,11 @@ +#!/usr/bin/python + +"""Run native ONIE tools +""" + +import sys +import distutils.sysconfig +sys.path.append("/usr/lib/python%s/dist-packages" + % distutils.sysconfig.get_python_version()) +import onl.install.ShellApp +onl.install.ShellApp.Onie.main() diff --git a/packages/base/all/vendor-config-onl/src/bin/onl-install b/packages/base/all/vendor-config-onl/src/bin/onl-install new file mode 100755 index 00000000..6d961e6e --- /dev/null +++ b/packages/base/all/vendor-config-onl/src/bin/onl-install @@ -0,0 +1,11 @@ +#!/usr/bin/python + +"""Install switch light +""" + +import sys +import distutils.sysconfig +sys.path.append("/usr/lib/python%s/dist-packages" + % distutils.sysconfig.get_python_version()) +import onl.install.App +onl.install.App.main() diff --git a/packages/base/all/vendor-config-onl/src/bin/onl-recover b/packages/base/all/vendor-config-onl/src/bin/onl-recover new file mode 100755 index 00000000..f7b6f0c0 --- /dev/null +++ b/packages/base/all/vendor-config-onl/src/bin/onl-recover @@ -0,0 +1,11 @@ +#!/usr/bin/python + +"""Recover switch light +""" + +import sys +import distutils.sysconfig +sys.path.append("/usr/lib/python%s/dist-packages" + % distutils.sysconfig.get_python_version()) +import onl.install.RecoverApp +onl.install.RecoverApp.main() diff --git a/packages/base/all/vendor-config-onl/src/bin/pyfit b/packages/base/all/vendor-config-onl/src/bin/pyfit new file mode 100755 index 00000000..ea644d72 --- /dev/null +++ b/packages/base/all/vendor-config-onl/src/bin/pyfit @@ -0,0 +1,11 @@ +#!/usr/bin/python + +"""Swiss-army-knife FIT decoder +""" + +import sys +import distutils.sysconfig +sys.path.append("/usr/lib/python%s/dist-packages" + % distutils.sysconfig.get_python_version()) +import onl.install.Fit +onl.install.Fit.App.main() From 2a1bb49f18b8f75f605c19af57cfd5597e452bad Mon Sep 17 00:00:00 2001 From: "Carl D. Roth" Date: Mon, 2 May 2016 12:55:53 -0700 Subject: [PATCH 12/62] Helper shell code for new installer --- .../vendor-config-onl/src/lib/install/lib.sh | 101 ++++++++++++++++++ 1 file changed, 101 insertions(+) create mode 100644 packages/base/all/vendor-config-onl/src/lib/install/lib.sh diff --git a/packages/base/all/vendor-config-onl/src/lib/install/lib.sh b/packages/base/all/vendor-config-onl/src/lib/install/lib.sh new file mode 100644 index 00000000..5537de43 --- /dev/null +++ b/packages/base/all/vendor-config-onl/src/lib/install/lib.sh @@ -0,0 +1,101 @@ +#!/bin/sh +# +###################################################################### +# +# helper functions for install +# +###################################################################### + +installer_reboot() { + local dummy sts timeout trapsts + if test $# -gt 0; then + timeout=$1; shift + else + timeout=3 + fi + + installer_say "Rebooting in ${timeout}s" + + unset dummy trapsts + # ha ha, 'local' auto-binds the variables + + trap "trapsts=130" 2 + if read -t $timeout -r -p "Hit CR to continue, CTRL-D or CTRL-C to stop... " dummy; then + sts=0 + else + sts=$? + fi + trap - 2 + test "$trapsts" && sts=$trapsts + + if test ${dummy+set}; then + if test $sts -eq 0; then + installer_say "CR, rebooting" + exit + else + installer_say "CTRL-D, stopped" + exit + fi + fi + + # ha ha, busybox does not report SIGALRM + if test "${trapsts+set}"; then + : + else + installer_say "timeout, rebooting" + reboot + fi + + signo=$(( $sts - 128 )) + if test $signo -eq 14; then + # SIGALRM, possibly irrelevant for busybox + installer_say "timeout, rebooting" + reboot + fi + + # e.g. SIGQUIT + installer_say "signal $signo, stopped" + exit +} + +installer_mkchroot() { + local rootdir + rootdir=$1 + + # special handling for /dev, which usually already has nested mounts + installer_say "Setting up /dev" + rm -fr "${rootdir}/dev"/* + for dev in /dev/*; do + if test -d "$dev"; then + mkdir "${rootdir}${dev}" + else + cp -a "$dev" "${rootdir}${dev}" + fi + done + mkdir -p "${rootdir}/dev/pts" + + installer_say "Setting up mounts" + mount -t proc proc "${rootdir}/proc" + mount -t sysfs sysfs "${rootdir}/sys" + mount -t devpts devpts "${rootdir}/dev/pts" + + if test ${TMPDIR+set}; then + # make the tempdir available to the chroot + mkdir -p "${rootdir}${TMPDIR}" + fi + + # export ONIE defines to the installer + if test -r /etc/machine.conf; then + cp /etc/machine.conf "${rootdir}/etc/machine.conf" + fi + + # export firmware config + if test -r /etc/fw_env.config; then + cp /etc/fw_env.config "${rootdir}/etc/fw_env.config" + fi +} + +# Local variables +# mode: sh +# sh-basic-offset: 2 +# End: From 87fbe5d56febd4ae6f6956ffb24ca1dbe09dc14a Mon Sep 17 00:00:00 2001 From: "Carl D. Roth" Date: Mon, 2 May 2016 12:56:59 -0700 Subject: [PATCH 13/62] Sample templates for platform configs --- .../lib/platform-config-defaults-uboot.yml | 62 ++++++++++ .../lib/platform-config-defaults-x86-64.yml | 106 ++++++++++++++++++ 2 files changed, 168 insertions(+) create mode 100644 packages/base/all/vendor-config-onl/src/lib/platform-config-defaults-uboot.yml create mode 100644 packages/base/all/vendor-config-onl/src/lib/platform-config-defaults-x86-64.yml diff --git a/packages/base/all/vendor-config-onl/src/lib/platform-config-defaults-uboot.yml b/packages/base/all/vendor-config-onl/src/lib/platform-config-defaults-uboot.yml new file mode 100644 index 00000000..c23835c8 --- /dev/null +++ b/packages/base/all/vendor-config-onl/src/lib/platform-config-defaults-uboot.yml @@ -0,0 +1,62 @@ +--- + +###################################################################### +# +# platform-config-defaults-uboot.yml +# +# Configuration for u-boot systems (powerpc and arm) +# +###################################################################### + +default: + + flat_image_tree: + + ############################## + # + # Default kernel packages provided by ONL + # + ############################## + + e500v-kernel-package: &e500v-kernel-package + package: onl-kernel-3.9.6-powerpc-e500v:powerpc + + e500v-kernel: &e500v-kernel + =: kernel-3.9.6-powerpc-e500v.bin.gz + <<: *e500v-kernel-package + + e500mc-kernel-package: &e500mc-kernel-package + package: onl-kernel-3.8.13-powerpc-e500mc:powerpc + + e500mc-kernel: + =: kernel-3.8.13-powerpc-e500mc.bin.gz + <<: *e500mc-kernel-package + + arm-iproc-kernel-package: &arm-iproc-kernel-package + package: onl-kernel-3.2-deb7-arm-iproc-all:armel + + arm-iproc-kernel: + =: kernel-3.2-deb7-arm-iproc-all.bin.gz + <<: *arm-iproc-kernel-package + + ############################## + # + # For your system, pick from the above list + # to compose a 'kernel' and 'dtb' key + # + ############################## + + ### Example, pick one kernel and one DTB + ##kernel: + ## <<: *e500v-kernel + ##dtb: + ## =: powerpc-quanta-lb9-r0.dtb + ## <<: *e500v-kernel-package + + loader: + + partition: /dev/sda1 + ##partition: /dev/mmcblk0p1 + + ### True for raw partitions + ##raw: True diff --git a/packages/base/all/vendor-config-onl/src/lib/platform-config-defaults-x86-64.yml b/packages/base/all/vendor-config-onl/src/lib/platform-config-defaults-x86-64.yml new file mode 100644 index 00000000..2b188f5c --- /dev/null +++ b/packages/base/all/vendor-config-onl/src/lib/platform-config-defaults-x86-64.yml @@ -0,0 +1,106 @@ +--- + +###################################################################### +# +# platform-config-defaults-x86-64.yml +# +# Default settings for x86-64 platform-config YAML declarations +# +# X86 platforms assume a GPT partition table and ext4 partitions +# +###################################################################### + +default: + + grub: + + label: gpt + # default, use a GPT (not msdos) label + # this is mostly to *reject* invalid disk labels, + # since we will never create our own + + initrd-amd64: &initrd-amd64 + =: onl-loader-initrd-amd64.cpio.gz + package: onl-loader-initrd:amd64 + + initrd: + <<: *initrd-amd64 + + kernel-3.2: &kernel-3-2 + =: kernel-3.2-deb7-x86_64-all + package: onl-kernel-3.2-deb7-x86-64-all:amd64 + + kernel-3.9.6: &kernel-3-9-6 + =: kernel-3.9.6-x86-64-all + package: onl-kernel-3.9.6-x86-64-all:amd64 + + kernel-3.18: &kernel-3-18 + =: kernel-3.18-x86_64-all + package: onl-kernel-3.18-x86-64-all:amd64 + + # pick one of the above kernels + kernel: + <<: *kernel-3-2 + + # GRUB command line arguments for 'serial' declaration + # this is equivalent to, but not in the same format as, + # the linux 'console=' arguments below + # Default for ttyS1 + serial: >- + --port=0x2f8 + --speed=115200 + --word=8 + --parity=no + --stop=1 + + # supplemental kernel arguments + # (not including kernel, initrd and ONL-specific options) + # Default for ttyS1 + args: >- + nopat + console=ttyS1,115200n8 + + ### Defaults for ttyS0 + ##serial: >- + ## --port=0x3f8 + ## --speed=115200 + ## --word=8 + ## --parity=no + ## --stop=1 + ##args: >- + ## nopat + ## console=ttyS0,115200n8 + + ##device: /dev/vda + ### install to a specific block device + + device: ONIE-BOOT + # install to the device that contains the ONIE-BOOT partition + # (query using parted and/or blkid) + + # Default partitioning scheme + # boot, config --> 128MiB + # images --> 1GiB + # data --> rest of disk + # default format (as shown) is ext4 + installer: + - ONL-BOOT: + =: 128MiB + format: ext4 + - ONL-CONFIG: + =: 128MiB + format: ext4 + - ONL-IMAGES: + =: 1GiB + format: ext4 + - ONL-DATA: + =: 100% + format: ext4 + + ### Sample partitioning scheme experiencing disk space pressure + ##installer: + ##- ONL-BOOT: 128MiB + ##- ONL-CONFIG: 128MiB + ##- ONL-IMAGES: 384MiB + ##- ONL-DATA: 100% + From a5e443274f165f2d3be78c0c9a22d2e25ef4dcd4 Mon Sep 17 00:00:00 2001 From: "Carl D. Roth" Date: Mon, 2 May 2016 12:58:47 -0700 Subject: [PATCH 14/62] Platform configs for x86-64 systems --- .../src/lib/x86-64-accton-as5712-54x-r0.yml | 27 ++++++++++++++++++ .../src/lib/x86-64-accton-as5812-54t-r0.yml | 25 +++++++++++++++++ .../src/lib/x86-64-accton-as5812-54x-r0.yml | 23 +++++++++++++++ .../src/lib/x86-64-accton-as6712-32x-r0.yml | 25 +++++++++++++++++ .../src/lib/x86-64-accton-as6812-32x-r0.yml | 26 +++++++++++++++++ .../src/lib/x86-64-accton-as7512-32x-r0.yml | 25 +++++++++++++++++ .../src/lib/x86-64-accton-as7712-32x-r0.yml | 25 +++++++++++++++++ .../src/lib/x86-64-accton-as7716-32x-r0.yml | 25 +++++++++++++++++ .../r0/src/lib/x86-64-accton-wedge-16x-r0.yml | 28 +++++++++++++++++++ .../r0/src/lib/x86-64-cel-redstone-xp-r0.yml | 25 +++++++++++++++++ .../r0/src/lib/x86-64-kvm-x86-64-r0.yml | 26 +++++++++++++++++ .../src/lib/x86-64-quanta-ly6-rangeley-r0.yml | 25 +++++++++++++++++ .../src/lib/x86-64-quanta-ly8-rangeley-r0.yml | 25 +++++++++++++++++ 13 files changed, 330 insertions(+) create mode 100644 packages/platforms/accton/x86-64/x86-64-accton-as5712-54x/platform-config/r0/src/lib/x86-64-accton-as5712-54x-r0.yml create mode 100644 packages/platforms/accton/x86-64/x86-64-accton-as5812-54t/platform-config/r0/src/lib/x86-64-accton-as5812-54t-r0.yml create mode 100644 packages/platforms/accton/x86-64/x86-64-accton-as5812-54x/platform-config/r0/src/lib/x86-64-accton-as5812-54x-r0.yml create mode 100644 packages/platforms/accton/x86-64/x86-64-accton-as6712-32x/platform-config/r0/src/lib/x86-64-accton-as6712-32x-r0.yml create mode 100644 packages/platforms/accton/x86-64/x86-64-accton-as6812-32x/platform-config/r0/src/lib/x86-64-accton-as6812-32x-r0.yml create mode 100644 packages/platforms/accton/x86-64/x86-64-accton-as7512-32x/platform-config/r0/src/lib/x86-64-accton-as7512-32x-r0.yml create mode 100644 packages/platforms/accton/x86-64/x86-64-accton-as7712-32x/platform-config/r0/src/lib/x86-64-accton-as7712-32x-r0.yml create mode 100644 packages/platforms/accton/x86-64/x86-64-accton-as7716-32x/platform-config/r0/src/lib/x86-64-accton-as7716-32x-r0.yml create mode 100644 packages/platforms/accton/x86-64/x86-64-accton-wedge-16x/platform-config/r0/src/lib/x86-64-accton-wedge-16x-r0.yml create mode 100644 packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/platform-config/r0/src/lib/x86-64-cel-redstone-xp-r0.yml create mode 100644 packages/platforms/kvm/x86-64/x86-64-kvm-x86-64/platform-config/r0/src/lib/x86-64-kvm-x86-64-r0.yml create mode 100644 packages/platforms/quanta/x86-64/x86-64-quanta-ly6-rangeley/platform-config/r0/src/lib/x86-64-quanta-ly6-rangeley-r0.yml create mode 100644 packages/platforms/quanta/x86-64/x86-64-quanta-ly8-rangeley/platform-config/r0/src/lib/x86-64-quanta-ly8-rangeley-r0.yml diff --git a/packages/platforms/accton/x86-64/x86-64-accton-as5712-54x/platform-config/r0/src/lib/x86-64-accton-as5712-54x-r0.yml b/packages/platforms/accton/x86-64/x86-64-accton-as5712-54x/platform-config/r0/src/lib/x86-64-accton-as5712-54x-r0.yml new file mode 100644 index 00000000..7820c773 --- /dev/null +++ b/packages/platforms/accton/x86-64/x86-64-accton-as5712-54x/platform-config/r0/src/lib/x86-64-accton-as5712-54x-r0.yml @@ -0,0 +1,27 @@ +--- + +###################################################################### +# +# platform-config for AS5712 +# +###################################################################### + +x86-64-accton-as5712-54x-r0: + + grub: + + serial: >- + --port=0x2f8 + --speed=115200 + --word=8 + --parity=no + --stop=1 + + kernel: + <<: *kernel-3-2 + + args: >- + nopat + console=ttyS1,115200n8 + + \ No newline at end of file diff --git a/packages/platforms/accton/x86-64/x86-64-accton-as5812-54t/platform-config/r0/src/lib/x86-64-accton-as5812-54t-r0.yml b/packages/platforms/accton/x86-64/x86-64-accton-as5812-54t/platform-config/r0/src/lib/x86-64-accton-as5812-54t-r0.yml new file mode 100644 index 00000000..35fdeeda --- /dev/null +++ b/packages/platforms/accton/x86-64/x86-64-accton-as5812-54t/platform-config/r0/src/lib/x86-64-accton-as5812-54t-r0.yml @@ -0,0 +1,25 @@ +--- + +###################################################################### +# +# platform-config for AS5812 +# +###################################################################### + +x86-64-accton-as5812-54t-r0: + + grub: + + serial: >- + --port=0x2f8 + --speed=115200 + --word=8 + --parity=no + --stop=1 + + kernel: + <<: *kernel-3-2 + + args: >- + nopat + console=ttyS1,115200n8 diff --git a/packages/platforms/accton/x86-64/x86-64-accton-as5812-54x/platform-config/r0/src/lib/x86-64-accton-as5812-54x-r0.yml b/packages/platforms/accton/x86-64/x86-64-accton-as5812-54x/platform-config/r0/src/lib/x86-64-accton-as5812-54x-r0.yml new file mode 100644 index 00000000..b9f49b96 --- /dev/null +++ b/packages/platforms/accton/x86-64/x86-64-accton-as5812-54x/platform-config/r0/src/lib/x86-64-accton-as5812-54x-r0.yml @@ -0,0 +1,23 @@ +--- + +###################################################################### +# +# platform-config for AS5812 +# +###################################################################### + +x86-64-accton-as5812-54x-r0: + + serial: >- + --port=0x2f8 + --speed=115200 + --word=8 + --parity=no + --stop=1 + + kernel: + <<: *kernel-3-2 + + args: >- + nopat + console=ttyS1,115200n8 diff --git a/packages/platforms/accton/x86-64/x86-64-accton-as6712-32x/platform-config/r0/src/lib/x86-64-accton-as6712-32x-r0.yml b/packages/platforms/accton/x86-64/x86-64-accton-as6712-32x/platform-config/r0/src/lib/x86-64-accton-as6712-32x-r0.yml new file mode 100644 index 00000000..e6274083 --- /dev/null +++ b/packages/platforms/accton/x86-64/x86-64-accton-as6712-32x/platform-config/r0/src/lib/x86-64-accton-as6712-32x-r0.yml @@ -0,0 +1,25 @@ +--- + +###################################################################### +# +# platform-config for AS6712 +# +###################################################################### + +x86-64-accton-as6712-32x-r0: + + grub: + + serial: >- + --port=0x2f8 + --speed=115200 + --word=8 + --parity=no + --stop=1 + + kernel: + <<: *kernel-3-2 + + args: >- + nopat + console=ttyS1,115200n8 diff --git a/packages/platforms/accton/x86-64/x86-64-accton-as6812-32x/platform-config/r0/src/lib/x86-64-accton-as6812-32x-r0.yml b/packages/platforms/accton/x86-64/x86-64-accton-as6812-32x/platform-config/r0/src/lib/x86-64-accton-as6812-32x-r0.yml new file mode 100644 index 00000000..6a6c75d0 --- /dev/null +++ b/packages/platforms/accton/x86-64/x86-64-accton-as6812-32x/platform-config/r0/src/lib/x86-64-accton-as6812-32x-r0.yml @@ -0,0 +1,26 @@ +--- + +###################################################################### +# +# platform-config for AS6812 +# +###################################################################### + +x86-64-accton-as6812-32x-r0: + + grub: + + serial: >- + --port=0x2f8 + --speed=115200 + --word=8 + --parity=no + --stop=1 + + kernel: + <<: *kernel-3-2 + + args: >- + nopat + console=ttyS1,115200n8 + diff --git a/packages/platforms/accton/x86-64/x86-64-accton-as7512-32x/platform-config/r0/src/lib/x86-64-accton-as7512-32x-r0.yml b/packages/platforms/accton/x86-64/x86-64-accton-as7512-32x/platform-config/r0/src/lib/x86-64-accton-as7512-32x-r0.yml new file mode 100644 index 00000000..2c83eb0d --- /dev/null +++ b/packages/platforms/accton/x86-64/x86-64-accton-as7512-32x/platform-config/r0/src/lib/x86-64-accton-as7512-32x-r0.yml @@ -0,0 +1,25 @@ +--- + +###################################################################### +# +# platform-config for AS7512 +# +###################################################################### + +x86-64-accton-as5712-32x-r0: + + grub: + + serial: >- + --port=0x2f8 + --speed=115200 + --word=8 + --parity=no + --stop=1 + + kernel: + <<: *kernel-3-2 + + args: >- + nopat + console=ttyS1,115200n8 diff --git a/packages/platforms/accton/x86-64/x86-64-accton-as7712-32x/platform-config/r0/src/lib/x86-64-accton-as7712-32x-r0.yml b/packages/platforms/accton/x86-64/x86-64-accton-as7712-32x/platform-config/r0/src/lib/x86-64-accton-as7712-32x-r0.yml new file mode 100644 index 00000000..9630c73f --- /dev/null +++ b/packages/platforms/accton/x86-64/x86-64-accton-as7712-32x/platform-config/r0/src/lib/x86-64-accton-as7712-32x-r0.yml @@ -0,0 +1,25 @@ +--- + +###################################################################### +# +# platform-config for AS7712 +# +###################################################################### + +x86-64-accton-as7712-32x-r0: + + grub: + + serial: >- + --port=0x2f8 + --speed=115200 + --word=8 + --parity=no + --stop=1 + + kernel: + <<: *kernel-3-2 + + args: >- + nopat + console=ttyS1,115200n8 diff --git a/packages/platforms/accton/x86-64/x86-64-accton-as7716-32x/platform-config/r0/src/lib/x86-64-accton-as7716-32x-r0.yml b/packages/platforms/accton/x86-64/x86-64-accton-as7716-32x/platform-config/r0/src/lib/x86-64-accton-as7716-32x-r0.yml new file mode 100644 index 00000000..c528084b --- /dev/null +++ b/packages/platforms/accton/x86-64/x86-64-accton-as7716-32x/platform-config/r0/src/lib/x86-64-accton-as7716-32x-r0.yml @@ -0,0 +1,25 @@ +--- + +###################################################################### +# +# platform-config for AS7716 +# +###################################################################### + +x86-64-accton-as7716-32x-r0: + + grub: + + serial: >- + --port=0x3f8 + --speed=115200 + --word=8 + --parity=no + --stop=1 + + kernel: + <<: *kernel-3-2 + + args: >- + nopat + console=ttyS0,115200n8 diff --git a/packages/platforms/accton/x86-64/x86-64-accton-wedge-16x/platform-config/r0/src/lib/x86-64-accton-wedge-16x-r0.yml b/packages/platforms/accton/x86-64/x86-64-accton-wedge-16x/platform-config/r0/src/lib/x86-64-accton-wedge-16x-r0.yml new file mode 100644 index 00000000..bc55cd86 --- /dev/null +++ b/packages/platforms/accton/x86-64/x86-64-accton-wedge-16x/platform-config/r0/src/lib/x86-64-accton-wedge-16x-r0.yml @@ -0,0 +1,28 @@ +--- + +###################################################################### +# +# platform-config for WEDGE +# +###################################################################### + +x86-64-accton-wedge-16x-r0: + + grub: + + serial: >- + --unit=0 + --speed=57600 + --word=8 + --parity=0 + --stop=1 + + kernel: + <<: *kernel-3-2 + + args: >- + nopat + console=ttyS1,57600n8 + rd_NO_MD + rd_NO_LUKS + intel_iommu=off diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/platform-config/r0/src/lib/x86-64-cel-redstone-xp-r0.yml b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/platform-config/r0/src/lib/x86-64-cel-redstone-xp-r0.yml new file mode 100644 index 00000000..69652363 --- /dev/null +++ b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/platform-config/r0/src/lib/x86-64-cel-redstone-xp-r0.yml @@ -0,0 +1,25 @@ +--- + +###################################################################### +# +# platform-config for REDSTONE +# +###################################################################### + +x86-64-cel-redstone-xp-r0: + + grub: + + serial: >- + --port=0x3f8 + --speed=115200 + --word=8 + --parity=no + --stop=1 + + kernel: + <<: *kernel-3-2 + + args: >- + nopat + console=ttyS0,115200n8 diff --git a/packages/platforms/kvm/x86-64/x86-64-kvm-x86-64/platform-config/r0/src/lib/x86-64-kvm-x86-64-r0.yml b/packages/platforms/kvm/x86-64/x86-64-kvm-x86-64/platform-config/r0/src/lib/x86-64-kvm-x86-64-r0.yml new file mode 100644 index 00000000..83133bce --- /dev/null +++ b/packages/platforms/kvm/x86-64/x86-64-kvm-x86-64/platform-config/r0/src/lib/x86-64-kvm-x86-64-r0.yml @@ -0,0 +1,26 @@ +--- + +###################################################################### +# +# platform-config for KVM +# +###################################################################### + +x86-64-kvm-x86-64-r0: + + grub: + + serial: >- + --port=0x3f8 + --speed=115200 + --word=8 + --parity=no + --stop=1 + + kernel: + <<: *kernel-3-9-6 + + args: >- + nopat + console=ttyS0,115200n8 + \ No newline at end of file diff --git a/packages/platforms/quanta/x86-64/x86-64-quanta-ly6-rangeley/platform-config/r0/src/lib/x86-64-quanta-ly6-rangeley-r0.yml b/packages/platforms/quanta/x86-64/x86-64-quanta-ly6-rangeley/platform-config/r0/src/lib/x86-64-quanta-ly6-rangeley-r0.yml new file mode 100644 index 00000000..cf0815d2 --- /dev/null +++ b/packages/platforms/quanta/x86-64/x86-64-quanta-ly6-rangeley/platform-config/r0/src/lib/x86-64-quanta-ly6-rangeley-r0.yml @@ -0,0 +1,25 @@ +--- + +###################################################################### +# +# platform-config for LY6 +# +###################################################################### + +x86-64-quanta-ly6-rangeley-r0: + + grub: + + serial: >- + --port=0x2f8 + --speed=115200 + --word=8 + --parity=no + --stop=1 + + kernel: + <<: *kernel-3-9-6 + + args: >- + console=ttyS1,115200n8 + \ No newline at end of file diff --git a/packages/platforms/quanta/x86-64/x86-64-quanta-ly8-rangeley/platform-config/r0/src/lib/x86-64-quanta-ly8-rangeley-r0.yml b/packages/platforms/quanta/x86-64/x86-64-quanta-ly8-rangeley/platform-config/r0/src/lib/x86-64-quanta-ly8-rangeley-r0.yml new file mode 100644 index 00000000..2fa1247a --- /dev/null +++ b/packages/platforms/quanta/x86-64/x86-64-quanta-ly8-rangeley/platform-config/r0/src/lib/x86-64-quanta-ly8-rangeley-r0.yml @@ -0,0 +1,25 @@ +--- + +###################################################################### +# +# platform-config for LY8 +# +###################################################################### + +x86-64-quanta-ly8-rangeley-r0: + + grub: + + serial: >- + --port=0x2f8 + --speed=115200 + --word=8 + --parity=no + --stop=1 + + kernel: + <<: *kernel-3-9-6 + + args: >- + console=ttyS1,115200n8 + \ No newline at end of file From 672e8d656dfd94c02229f06637b5364694ea9d16 Mon Sep 17 00:00:00 2001 From: "Carl D. Roth" Date: Mon, 2 May 2016 13:00:02 -0700 Subject: [PATCH 15/62] Handle dict values in kernel and dtb --- tools/flat-image-tree.py | 23 +++++++++++++++-------- 1 file changed, 15 insertions(+), 8 deletions(-) diff --git a/tools/flat-image-tree.py b/tools/flat-image-tree.py index 06afa1f9..32865a6f 100755 --- a/tools/flat-image-tree.py +++ b/tools/flat-image-tree.py @@ -20,15 +20,22 @@ class Image(object): self.entry = None self.os = None - if ',' in data: - # Shorthand for tuple specifier - data = tuple([ x.strip() for x in data.split(',') ]) + if type(data) == str: + if ',' in data: + pkg, fname = [x.strip() for x in data.split(',')] + else: + pkg, fname = None, data + elif type(data) == list: + pkg, fname = data + elif type(data) == dict: + fname = data['='] + pkg = data.get('package', None) + else: + raise ValueError("invalid image specifier: %s" % repr(data)) - if(isinstance(data, tuple)): - # - # The data specifies an ONLPM (package,file) pair. - # - self.data = subprocess.check_output("onlpm --quiet --find-file %s %s" % data, shell=True).strip() + if pkg is not None: + cmd = ('onlpm', '--quiet', '--find-file', pkg, fname,) + self.data = subprocess.check_output(cmd).strip() else: self.data = data From 9fefb7955d6730af78480e070df50f91f23b6ea2 Mon Sep 17 00:00:00 2001 From: "Carl D. Roth" Date: Mon, 2 May 2016 13:00:23 -0700 Subject: [PATCH 16/62] Helper script to pull out kernel/initrd/vendor --- tools/onlplatform.py | 82 ++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 82 insertions(+) create mode 100644 tools/onlplatform.py diff --git a/tools/onlplatform.py b/tools/onlplatform.py new file mode 100644 index 00000000..4348cb85 --- /dev/null +++ b/tools/onlplatform.py @@ -0,0 +1,82 @@ +#!/usr/bin/python + +"""onlplatform.py + +Extract install file requirements from the platform YAML file and/or +the platform package metadata. +""" + +import sys, os +import itertools + +toolsdir = os.path.dirname(os.path.abspath(__file__)) +sys.path.append(toolsdir) + +onldir = os.path.dirname(toolsdir) +onlpydir = os.path.join(onldir, "packages/base/all/vendor-config-onl/src/python") +sys.path.append(onlpydir) + +import onl.YamlUtils + +from onlpm import * +# glob import is required here so pickle load load properly + +pm = defaultPm() + +platform = sys.argv[1] +arch = sys.argv[2] +key = sys.argv[3] + +def extractKey(platform, arch, key): + + pkg = "onl-platform-config-%s:%s" % (platform, arch,) + basename = "%s.yml" % platform + pm.require(pkg, force=False, build_missing=False) + platformConfigPath = pm.opr.get_file(pkg, basename) + + if arch in ('amd64',): + pkg = "onl-vendor-config-onl:all" + basename = "platform-config-defaults-x86-64.yml" + subkey = 'grub' + else: + pkg = "onl-vendor-config-onl:all" + basename = "platform-config-defaults-uboot.yml" + subkey = 'flat_image_tree' + pm.require(pkg, force=False, build_missing=False) + defaultConfigPath = pm.opr.get_file(pkg, basename) + + platformConf = onl.YamlUtils.merge(defaultConfigPath, platformConfigPath) + resource = platformConf[platform][subkey][key] + if type(resource) == dict: + pkg = resource['package'] + basename = resource['='] + else: + pkg, sep, basename = resource.partition(',') + if not sep: + raise ValueError("resource missing package declaration: %s" % resource) + pkg = pkg.strip() + basename = basename.strip() + pm.require(pkg, force=False, build_missing=False) + resourcePath = pm.opr.get_file(pkg, basename) + return resourcePath + +def extractVendor(platform, arch): + pkg = "onl-platform-config-%s:%s" % (platform, arch,) + l = pm.opr.lookup_all(pkg) + if not l: + raise SystemExit("cannot find package %s:%s" + % (platform, arch,)) + l = [x for x in pm.package_groups if pkg in x] + l = list(itertools.chain(*[x.prerequisite_packages() for x in l])) + l = [x for x in l if x.startswith('onl-vendor-config-')] + return "\n".join(l) + +if key in ('kernel', 'initrd',): + print extractKey(platform, arch, key) + sys.exit(0) + +if key == 'vendor': + print extractVendor(platform, arch) + sys.exit(0) + +raise SystemExit("invalid key %s" % key) From 7c2bb91b7ccc71f91f17b9cd7c10213e027339fd Mon Sep 17 00:00:00 2001 From: "Carl D. Roth" Date: Mon, 2 May 2016 13:00:55 -0700 Subject: [PATCH 17/62] Clean up onlpm and make it embeddable --- tools/onlpm.py | 32 +++++++++++++++++++++++++++++--- 1 file changed, 29 insertions(+), 3 deletions(-) diff --git a/tools/onlpm.py b/tools/onlpm.py index 62aff9c8..d00e74d3 100755 --- a/tools/onlpm.py +++ b/tools/onlpm.py @@ -765,8 +765,8 @@ class OnlPackageManager(object): self.package_groups = [] self.opr = None - def set_repo(self, repodir): - self.opr = OnlPackageRepo(repodir, ops.repo_package_dir) + def set_repo(self, repodir, packagedir='packages'): + self.opr = OnlPackageRepo(repodir, packagedir=packagedir) def filter(self, subdir=None, arches=None, substr=None): @@ -999,6 +999,32 @@ class OnlPackageManager(object): def pkg_info(self): return "\n".join([ pg.pkg_info() for pg in self.package_groups if not pg.filtered ]) +def defaultPm(): + repo = os.environ.get('ONLPM_OPTION_REPO', None) + envJson = os.environ.get('ONLPM_OPTION_INCLUDE_ENV_JSON', None) + packagedirs = os.environ['ONLPM_OPTION_PACKAGEDIRS'].split(':') + repoPackageDir = os.environ.get('ONLPM_OPTION_REPO_PACKAGE_DIR', 'packages') + subdir = os.getcwd() + arches = ['amd64', 'powerpc', 'armel', 'all',] + + if envJson: + for j in envJson.split(':'): + data = json.load(open(j)) + for (k, v) in data.iteritems(): + try: + v = v.encode('ascii') + except UnicodeEncodeError: + pass + os.environ[k] = v + + pm = OnlPackageManager() + pm.set_repo(repo, packagedir=repoPackageDir) + for pdir in packagedirs: + pm.load(pdir, usecache=True, rebuildcache=False) + pm.filter(subdir = subdir, arches=arches) + + return pm + if __name__ == '__main__': ap = argparse.ArgumentParser("onlpm") @@ -1090,7 +1116,7 @@ if __name__ == '__main__': pm = OnlPackageManager() if ops.repo: logger.debug("Setting repo as '%s'..." % ops.repo) - pm.set_repo(ops.repo) + pm.set_repo(ops.repo, packagedir=ops.repo_package_dir) if ops.in_repo: for p in ops.in_repo: From 5f12eb0f1e57507eddf638fc6174322cb914ccc1 Mon Sep 17 00:00:00 2001 From: "Carl D. Roth" Date: Mon, 2 May 2016 13:07:28 -0700 Subject: [PATCH 18/62] New installer common files --- builds/any/installer/new-hotness/APKG.yml | 35 ++ .../any/installer/new-hotness/installer.sh.in | 308 ++++++++++++++++++ 2 files changed, 343 insertions(+) create mode 100644 builds/any/installer/new-hotness/APKG.yml create mode 100644 builds/any/installer/new-hotness/installer.sh.in diff --git a/builds/any/installer/new-hotness/APKG.yml b/builds/any/installer/new-hotness/APKG.yml new file mode 100644 index 00000000..62ad5191 --- /dev/null +++ b/builds/any/installer/new-hotness/APKG.yml @@ -0,0 +1,35 @@ + +prerequisites: + broken: true + packages: [ "onl-swi:$ARCH" ] + +common: + arch: $ARCH + version: $FNAME_RELEASE_ID + copyright: Copyright 2016 Big Switch Networks + maintainer: support@bigswitch.com + +packages: + - name: onl-installer + summary: Open Network Linux $ARCH Installer + + files: + builds/*INSTALLER : $$PKG_INSTALL/ + builds/*.md5sum : $$PKG_INSTALL/ + + changelog: Change changes changes., + + +release: + - builds/*INSTALLER : $ARCH/ + - builds/*.md5sum : $ARCH/ + + + + + + + + + + diff --git a/builds/any/installer/new-hotness/installer.sh.in b/builds/any/installer/new-hotness/installer.sh.in new file mode 100644 index 00000000..1f5a70ad --- /dev/null +++ b/builds/any/installer/new-hotness/installer.sh.in @@ -0,0 +1,308 @@ +#!/bin/sh +############################################################ +# +# +# Copyright 2013, 2014 BigSwitch Networks, Inc. +# +# +# +# +############################################################ +# +# SwitchLight Installation Script for PPC. +# +# The purpose of this script is to automatically install SwitchLight +# on the target system. +# +# This script is ONIE-compatible. +# +# This script is can be run under a manual boot of the SwitchLight +# Loader as the execution environment for platforms that do not +# support ONIE. +# +############################################################ + +IARCH="@ARCH@" +ARCH=`uname -m` +if test "$ARCH" != "$IARCH"; then + echo + echo "------------------------------------" + echo "Installer Architecture: $IARCH" + echo "Target Architecture: $ARCH" + echo + echo "This installer cannot be used on this" + echo "target." + echo + echo "------------------------------------" + sleep 5 + exit 1 +fi +case "$ARCH" in + ppc|powerpc) + ARCH_PPC=$ARCH + ;; + x86*|amd*|i?86*) + ARCH_X86=$ARCH + ;; + *) + echo "Invalid Architecture: $ARCH" + sleep 5 + exit 1 + ;; +esac + +############################################################ +# +# Installation Main +# +# Installation is performed as follows: +# +# 1. Detect whether we are running under ONIE or SwitchLight +# and perform the appropriate setup. +# +# 2. Unpack the installer files. +# +# 3. Source the installer scriptlet for the current platform. +# 4. Run the installer function from the platform scriptlet. +# +# The platform scriptlet determines the entire installation +# sequence. +# +# Most platforms will just call the installation +# utilities in this script with the approprate platform settings. +# +############################################################ + +set -e +cd $(dirname $0) + +installer_script=${0##*/} +installer_zip=$1 + +BOOTDIR=/mnt/onie-boot +# initial boot partition (onie) + +has_grub_env() +{ + local tag + tag=$1; shift + test -f $BOOTDIR/grub/grubenv || return 1 + case "`grub-editenv $BOOTDIR/grubenv list` 2>/dev/null" in + *${tag}*) return 0 ;; + esac + return 1 +} + +has_uboot_env() +{ + local tag + tag=$1; shift + test -x /usr/sbin/fw_printenv || return 1 + test -f /etc/fw_env.config || return 1 + /usr/sbin/fw_printenv $tag 1>/dev/null 2>&1 && return 0 + return 1 +} + +has_boot_env() +{ + local tag + tag=$1; shift + has_grub_env $tag && return 0 + has_uboot_env $tag && return 0 + return 1 +} + +# Check installer debug option from the boot environment +if has_boot_env onl_installer_debug; then installer_debug=1; fi + +if test "$installer_debug"; then + echo "Debug mode" + set -x +fi + +# Pickup ONIE defines for this machine. +if test -r /etc/machine.conf; then + . /etc/machine.conf +fi + +# +# Installation environment setup. +# + +installer_umount() { + egrep "/tmp/..*" /proc/mounts | cut -d' ' -f2 | sort -r | xargs -n 1 umount +} + +if test "${onie_platform}"; then + # Running under ONIE, most likely in the background in installer mode. + # Our messages have to be sent to the console directly, not to stdout. + installer_say() + { + echo "$@" > /dev/console + } + + # Installation failure message. + installer_cleanup() + { + installer_say "Install failed." + cat /var/log/onie.log > /dev/console + installer_say "Install failed. See log messages above for details" + + installer_umount + + if installer_reboot; then + : + else + sync + sleep 3 + reboot + fi + } +else + if test "$ARCH_X86"; then + echo "Missing onie_platform (invalid /etc/machine.conf)" 1>&2 + exit 1 + fi + # + # Assume we are running in an interactive environment + # + installer_say() + { + echo + echo "* $@" + echo + } + + installer_cleanup() + { + installer_say "Install failed." + installer_umount + exit 1 + } +fi + +trap "installer_cleanup" 0 1 + +# +# Remount tmpfs larger if possible. +# We will be doing all of our work out of /tmp +# +mount -o remount,size=1024M /tmp || true + +# Unpack our distribution +installer_say "Unpacking SwitchLight installer files..." +installer_dir=`pwd` +if test "$SFX_PAD"; then + # ha ha, busybox cannot exclude multiple files + unzip $installer_zip -x $SFX_PAD +elif test "$SFX_UNZIP"; then + unzip $installer_zip -x $installer_script +else + dd if=$installer_zip bs=$SFX_BLOCKSIZE skip=$SFX_BLOCKS \ + | unzip - -x $installer_script +fi + +# Developer debugging +if has_boot_env onl_installer_unpack_only; then installer_unpack_only=1; fi +if test "${installer_unpack_only}"; then + installer_say "Unpack only requested." + exit 1 +fi + +# Replaced during build packaging with the current version. +onl_version="@ONLVERSION@" +initrd_archive="@INITRD_ARCHIVE@" +initrd_offset="@INITRD_OFFSET@" +initrd_size="@INITRD_SIZE@" + +TMPDIR=${TMPDIR-"${installer_dir}"} +export TMPDIR + +rootdir=$(mktemp -d -t "initrd-XXXXXX") +installer_say "Extracting initrd to $rootdir" +if test "$initrd_offset"; then + tmprd=$(mktemp -t initrd-XXXXXX) + dd if="$initrd_archive" of="$tmprd" bs="$initrd_offset" skip=1 + dd if=/dev/null of="$tmprd" bs="$initrd_size" seek=1 + initrd=$tmprd +else + initrd="${installer_dir}/$initrd_archive" +fi +gzip -dc "$initrd" | ( cd "$rootdir" && cpio -imd ) + +# get common installer functions +. "${rootdir}/lib/vendor-config/onl/install/lib.sh" + +installer_mkchroot "${rootdir}" + +# make the installer available to the chroot +mkdir -p "${rootdir}/mnt/installer" +mount -o ro,bind "${installer_dir}" "${rootdir}/mnt/installer" + +# make the onie boot files available to the chroot +mkdir -p "${rootdir}/mnt/onie-boot" +if test -d "/mnt/onie-boot"; then + mount -o ro,bind "/mnt/onie-boot" "${rootdir}/mnt/onie-boot" +fi + +# generate config for installer environment +mkdir -p "${rootdir}/etc/onl" +cp /dev/null "${rootdir}/etc/onl/installer.conf" +echo "onl_version=\"$onl_version\"" >> "${rootdir}/etc/onl/installer.conf" + +# Generate the MD5 signature for ourselves for future reference. +installer_md5=$(md5sum "$0" | awk '{print $1}') +echo "installer_md5=\"$installer_md5\"" >> "${rootdir}/etc/onl/installer.conf" + +# Cache our install URL if available +if test -f "$0.url"; then + installer_url=$(cat "$0.url") + echo "installer_url=\"$installer_url\"" >> "${rootdir}/etc/onl/installer.conf" +fi + +echo "installer_dir=/mnt/installer" >> "${rootdir}/etc/onl/installer.conf" + +# include access details for the initrd +if test "$initrd_offset"; then + echo "initrd_archive=\"$initrd_archive\"" >> "${rootdir}/etc/onl/installer.conf" + echo "initrd_offset=\"$initrd_offset\"" >> "${rootdir}/etc/onl/installer.conf" + echo "initrd_size=\"$initrd_size\"" >> "${rootdir}/etc/onl/installer.conf" +fi + +postinst=$(mktemp -t postinst-XXXXXX) +b=${postinst##*/} +echo "installer_chroot=${rootdir}" >> "${rootdir}/etc/onl/installer.conf" +echo "installer_postinst=/mnt/installer/$b" >> "${rootdir}/etc/onl/installer.conf" + +# for now, skip the other dot-files in /etc/onl, we do not need them +# to enable initial install + +# no special handling for /tmp or /run, since this is all in /tmp +# anyway + +installer_say "Launching Switch Light installer" +installer_shell=${installer_shell-"/usr/bin/onl-install"} +chroot "${rootdir}" $installer_shell +: chroot "${rootdir}" /usr/bin/onl-install + +if test -f "$postinst"; then + installer_say "Invoking post-install actions" + set -x + . "$postinst" + set +x +fi + +trap - 0 1 +installer_umount + +if test "${onie_platform}"; then + installer_reboot +fi + +exit + +# Local variables: +# mode: sh +# sh-basic-offset: 2 +# End: +# Do not add any additional whitespace after this point. From 760c3c779206ae6d29118f0f4da46268d3958e70 Mon Sep 17 00:00:00 2001 From: "Carl D. Roth" Date: Mon, 2 May 2016 13:30:29 -0700 Subject: [PATCH 19/62] x64 build of the new installer --- builds/amd64/installer/new-hotness/Makefile | 1 + builds/amd64/installer/new-hotness/PKG.yml | 2 + .../installer/new-hotness/builds/.gitignore | 1 + .../installer/new-hotness/builds/Makefile | 82 +++++++++++++++++++ .../installer/new-hotness/builds/boot-config | 4 + 5 files changed, 90 insertions(+) create mode 100644 builds/amd64/installer/new-hotness/Makefile create mode 100644 builds/amd64/installer/new-hotness/PKG.yml create mode 100644 builds/amd64/installer/new-hotness/builds/.gitignore create mode 100644 builds/amd64/installer/new-hotness/builds/Makefile create mode 100644 builds/amd64/installer/new-hotness/builds/boot-config diff --git a/builds/amd64/installer/new-hotness/Makefile b/builds/amd64/installer/new-hotness/Makefile new file mode 100644 index 00000000..003238cf --- /dev/null +++ b/builds/amd64/installer/new-hotness/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/builds/amd64/installer/new-hotness/PKG.yml b/builds/amd64/installer/new-hotness/PKG.yml new file mode 100644 index 00000000..55693e33 --- /dev/null +++ b/builds/amd64/installer/new-hotness/PKG.yml @@ -0,0 +1,2 @@ +!include $ONL/builds/any/installer/new-hotness/APKG.yml ARCH=amd64 + diff --git a/builds/amd64/installer/new-hotness/builds/.gitignore b/builds/amd64/installer/new-hotness/builds/.gitignore new file mode 100644 index 00000000..fbd18542 --- /dev/null +++ b/builds/amd64/installer/new-hotness/builds/.gitignore @@ -0,0 +1 @@ +*INSTALLER diff --git a/builds/amd64/installer/new-hotness/builds/Makefile b/builds/amd64/installer/new-hotness/builds/Makefile new file mode 100644 index 00000000..3ec17a99 --- /dev/null +++ b/builds/amd64/installer/new-hotness/builds/Makefile @@ -0,0 +1,82 @@ +include $(ONL)/make/config.amd64.mk + +ONLPLATFORM = python $(ONL)/tools/onlplatform.py +PLATFORMS := $(shell $(ONLPM) --platform-manifest onl-loader-initrd:amd64) + +MKSHAR = $(ONL)/tools/mkshar +MKSHAR_OPTS = --lazy --unzip-pad --fixup-perms autoperms.sh +MKSHAR_PERMS = autoperms.sh + +# Hardcoded to match ONL File naming conventions. +include $(ONL)/make/version-onl.mk +INSTALLER_NAME=$(FNAME_PRODUCT_VERSION)_ONL-OS_$(FNAME_BUILD_ID)_$(UARCH)_INSTALLER + + +__installer: __installer_platform_files __installer_swi_files + $(ONL_V_at)rm -rf *INSTALLER* *.md5sum + $(ONL_V_at)cp /dev/null installer.sh + $(ONL_V_at): ;\ + set -e ;\ + if $(ONL_V_P); then set -x; fi ;\ + set dummy *.cpio.gz; initrd="$$2" ;\ + sed \ + -e 's^@ONLVERSION@^$(VERSION_STRING)^g' \ + -e "s^@INITRD_ARCHIVE@^$$initrd^g" \ + -e 's^@INITRD_OFFSET@^^g' \ + -e 's^@INITRD_SIZE@^^g' \ + -e 's^@ARCH@^x86_64^g' \ + $(ONL)/builds/any/installer/new-hotness/installer.sh.in \ + >> installer.sh + $(ONL_V_at)echo "PAYLOAD_FOLLOWS" >> installer.sh + $(ONL_V_at)cp /dev/null $(MKSHAR_PERMS) + $(ONL_V_at)cp $(ONL)/make/version-onl.sh . + $(ONL_V_at)echo "#!/bin/sh" >> $(MKSHAR_PERMS) + $(ONL_V_at)echo "set -e" >> $(MKSHAR_PERMS) + $(ONL_V_at)echo "set -x" >> $(MKSHAR_PERMS) + $(MKSHAR) $(MKSHAR_OPTS) "$(INSTALLER_NAME)" $(ONL)/tools/scripts/sfx.sh.in installer.sh kernel-* onl-loader-initrd-* *.swi version-onl.sh boot-config + $(ONL_V_at)rm -rf installer.sh kernel-* onl-loader-initrd-* $(ZTN_MANIFEST) *.swi version-onl.sh autoperms.sh + md5sum "$(INSTALLER_NAME)" | awk '{ print $$1 }' > "$(INSTALLER_NAME).md5sum" + +__installer_platform_files: + $(ONL_V_GEN): ;\ + set -e ;\ + if $(ONL_V_P); then set -x; fi ;\ + l="$(PLATFORMS)"; for p in $$l; do \ + src=$$($(ONLPLATFORM) $$p amd64 kernel 2>/dev/null) || : ;\ + if test "$$src"; then \ + dst=$${src##*/} ;\ + if test "$dst" -ot Makefile; then \ + : ;\ + else \ + echo "Staging $$dst for $$p" ;\ + cp "$$src" "$$dst" ;\ + fi ;\ + fi ;\ + src=$$($(ONLPLATFORM) $$p amd64 initrd 2>/dev/null) || : ;\ + if test "$$src"; then \ + dst=$${src##*/} ;\ + if test "$dst" -ot Makefile; then \ + : ;\ + else \ + echo "Staging $$dst for $$p" ;\ + cp "$$src" "$$dst" ;\ + fi ;\ + fi ;\ + done ;\ + : + +__installer_swi_files: + $(ONL_V_GEN): ;\ + set -e ;\ + if $(ONL_V_P); then set -x; fi ;\ + swidir=$$(mktemp -d $(PWD)/swi-d-XXXXXX) ;\ + $(ONLPM) --extract-dir onl-swi:amd64 $$swidir ;\ + mv $$swidir/usr/share/onl/packages/amd64/onl-swi/*.swi . ;\ + rm -fr $$swidir ;\ + : + +shar installer: installer + +clean: + rm -f *.swi *.installer $(notdir $(KERNELS)) *initrd*.cpio.gz + diff --git a/builds/amd64/installer/new-hotness/builds/boot-config b/builds/amd64/installer/new-hotness/builds/boot-config new file mode 100644 index 00000000..40fb0d31 --- /dev/null +++ b/builds/amd64/installer/new-hotness/builds/boot-config @@ -0,0 +1,4 @@ +NETDEV=ma1 +NETAUTO=dhcp +BOOTMODE=SWI +SWI=images::latest From 8c138c6e4d0ad9a8599fb9d7d0094cc68f162520 Mon Sep 17 00:00:00 2001 From: "Carl D. Roth" Date: Mon, 2 May 2016 14:00:13 -0700 Subject: [PATCH 20/62] Update ignore rules --- .gitignore | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/.gitignore b/.gitignore index 108062fa..7ccdfdf1 100644 --- a/.gitignore +++ b/.gitignore @@ -7,6 +7,7 @@ dependmodules.x *.cpio.gz *.sqsh *.pyc +*.pyo # Package cache and lock files .lock @@ -18,3 +19,7 @@ RELEASE/ .bash_history .buildroot-ccache + +# temporary files +*~ +.#* From 08a3f3b5fc18482e90f4ef2906be86a6e7f55e60 Mon Sep 17 00:00:00 2001 From: "Carl D. Roth" Date: Fri, 6 May 2016 11:02:51 -0700 Subject: [PATCH 21/62] Added arm support --- builds/any/installer/new-hotness/installer.sh.in | 3 +++ 1 file changed, 3 insertions(+) diff --git a/builds/any/installer/new-hotness/installer.sh.in b/builds/any/installer/new-hotness/installer.sh.in index 1f5a70ad..6cc81460 100644 --- a/builds/any/installer/new-hotness/installer.sh.in +++ b/builds/any/installer/new-hotness/installer.sh.in @@ -44,6 +44,9 @@ case "$ARCH" in x86*|amd*|i?86*) ARCH_X86=$ARCH ;; + arm*) + ARCH_ARM=$ARCH + ;; *) echo "Invalid Architecture: $ARCH" sleep 5 From a6c36afee2d24adf711c3c020df92ae32b869f4e Mon Sep 17 00:00:00 2001 From: "Carl D. Roth" Date: Fri, 6 May 2016 11:04:54 -0700 Subject: [PATCH 22/62] Relax arch rules for powerpc and arm installer --- .../amd64/installer/new-hotness/builds/Makefile | 15 ++++++++++----- 1 file changed, 10 insertions(+), 5 deletions(-) diff --git a/builds/amd64/installer/new-hotness/builds/Makefile b/builds/amd64/installer/new-hotness/builds/Makefile index 3ec17a99..c3e85267 100644 --- a/builds/amd64/installer/new-hotness/builds/Makefile +++ b/builds/amd64/installer/new-hotness/builds/Makefile @@ -1,7 +1,7 @@ include $(ONL)/make/config.amd64.mk ONLPLATFORM = python $(ONL)/tools/onlplatform.py -PLATFORMS := $(shell $(ONLPM) --platform-manifest onl-loader-initrd:amd64) +PLATFORMS := $(shell $(ONLPM) --platform-manifest onl-loader-initrd:$(ARCH)) MKSHAR = $(ONL)/tools/mkshar MKSHAR_OPTS = --lazy --unzip-pad --fixup-perms autoperms.sh @@ -42,7 +42,7 @@ __installer_platform_files: set -e ;\ if $(ONL_V_P); then set -x; fi ;\ l="$(PLATFORMS)"; for p in $$l; do \ - src=$$($(ONLPLATFORM) $$p amd64 kernel 2>/dev/null) || : ;\ + src=$$($(ONLPLATFORM) $$p $(ARCH) kernel 2>/dev/null) || : ;\ if test "$$src"; then \ dst=$${src##*/} ;\ if test "$dst" -ot Makefile; then \ @@ -52,7 +52,7 @@ __installer_platform_files: cp "$$src" "$$dst" ;\ fi ;\ fi ;\ - src=$$($(ONLPLATFORM) $$p amd64 initrd 2>/dev/null) || : ;\ + src=$$($(ONLPLATFORM) $$p $(ARCH) initrd 2>/dev/null) || : ;\ if test "$$src"; then \ dst=$${src##*/} ;\ if test "$dst" -ot Makefile; then \ @@ -65,15 +65,20 @@ __installer_platform_files: done ;\ : +ifndef NO_SWI __installer_swi_files: $(ONL_V_GEN): ;\ set -e ;\ if $(ONL_V_P); then set -x; fi ;\ swidir=$$(mktemp -d $(PWD)/swi-d-XXXXXX) ;\ - $(ONLPM) --extract-dir onl-swi:amd64 $$swidir ;\ - mv $$swidir/usr/share/onl/packages/amd64/onl-swi/*.swi . ;\ + $(ONLPM) --extract-dir onl-swi:$(ARCH) $$swidir ;\ + mv $$swidir/usr/share/onl/packages/$(ARCH)/onl-swi/*.swi . ;\ rm -fr $$swidir ;\ : +else +__installer_swi_files: + $(ONL_V_GEN): +endif shar installer: installer From 9127a94cf53713e8d730c475fb20fe21c0b405bf Mon Sep 17 00:00:00 2001 From: "Carl D. Roth" Date: Fri, 6 May 2016 11:05:37 -0700 Subject: [PATCH 23/62] Add python compatibility path for debian-derived installs --- packages/base/all/initrds/loader-initrd-files/PKG.yml | 3 ++- .../all/initrds/loader-initrd-files/src/python/debcompat.pth | 1 + 2 files changed, 3 insertions(+), 1 deletion(-) create mode 100644 packages/base/all/initrds/loader-initrd-files/src/python/debcompat.pth diff --git a/packages/base/all/initrds/loader-initrd-files/PKG.yml b/packages/base/all/initrds/loader-initrd-files/PKG.yml index 2fc41557..3ae21ef7 100644 --- a/packages/base/all/initrds/loader-initrd-files/PKG.yml +++ b/packages/base/all/initrds/loader-initrd-files/PKG.yml @@ -14,10 +14,11 @@ packages: - src/etc : /etc - src/lib : /lib - src/bootmodes : /bootmodes + - src/python: /usr/lib/python2.7/site-packages - $ONL/make/version-onl.sh : /etc/onl/loader/versions.sh - $ONL/make/version-onl.json : /etc/onl/loader/versions.json - $ONL/make/version-onl.mk : /etc/onl/loader/versions.mk - + changelog: Change changes changes., diff --git a/packages/base/all/initrds/loader-initrd-files/src/python/debcompat.pth b/packages/base/all/initrds/loader-initrd-files/src/python/debcompat.pth new file mode 100644 index 00000000..5c1cb274 --- /dev/null +++ b/packages/base/all/initrds/loader-initrd-files/src/python/debcompat.pth @@ -0,0 +1 @@ +/usr/lib/python2.7/dist-packages From 161b8e48d893db3d6b911cab03fd936b60f121e8 Mon Sep 17 00:00:00 2001 From: "Carl D. Roth" Date: Fri, 6 May 2016 11:07:10 -0700 Subject: [PATCH 24/62] Revert dumb python path hack --- packages/base/all/vendor-config-onl/src/bin/loader-shell | 4 ---- packages/base/all/vendor-config-onl/src/bin/onie-shell | 4 ---- packages/base/all/vendor-config-onl/src/bin/onl-install | 4 ---- packages/base/all/vendor-config-onl/src/bin/onl-recover | 4 ---- packages/base/all/vendor-config-onl/src/bin/pyfit | 4 ---- 5 files changed, 20 deletions(-) diff --git a/packages/base/all/vendor-config-onl/src/bin/loader-shell b/packages/base/all/vendor-config-onl/src/bin/loader-shell index 0ee08028..e006aef4 100755 --- a/packages/base/all/vendor-config-onl/src/bin/loader-shell +++ b/packages/base/all/vendor-config-onl/src/bin/loader-shell @@ -3,9 +3,5 @@ """Run native ONIE tools """ -import sys -import distutils.sysconfig -sys.path.append("/usr/lib/python%s/dist-packages" - % distutils.sysconfig.get_python_version()) import onl.install.ShellApp onl.install.ShellApp.Loader.main() diff --git a/packages/base/all/vendor-config-onl/src/bin/onie-shell b/packages/base/all/vendor-config-onl/src/bin/onie-shell index ecf8b7a3..8ff8343e 100755 --- a/packages/base/all/vendor-config-onl/src/bin/onie-shell +++ b/packages/base/all/vendor-config-onl/src/bin/onie-shell @@ -3,9 +3,5 @@ """Run native ONIE tools """ -import sys -import distutils.sysconfig -sys.path.append("/usr/lib/python%s/dist-packages" - % distutils.sysconfig.get_python_version()) import onl.install.ShellApp onl.install.ShellApp.Onie.main() diff --git a/packages/base/all/vendor-config-onl/src/bin/onl-install b/packages/base/all/vendor-config-onl/src/bin/onl-install index 6d961e6e..4505eee5 100755 --- a/packages/base/all/vendor-config-onl/src/bin/onl-install +++ b/packages/base/all/vendor-config-onl/src/bin/onl-install @@ -3,9 +3,5 @@ """Install switch light """ -import sys -import distutils.sysconfig -sys.path.append("/usr/lib/python%s/dist-packages" - % distutils.sysconfig.get_python_version()) import onl.install.App onl.install.App.main() diff --git a/packages/base/all/vendor-config-onl/src/bin/onl-recover b/packages/base/all/vendor-config-onl/src/bin/onl-recover index f7b6f0c0..6a9a8589 100755 --- a/packages/base/all/vendor-config-onl/src/bin/onl-recover +++ b/packages/base/all/vendor-config-onl/src/bin/onl-recover @@ -3,9 +3,5 @@ """Recover switch light """ -import sys -import distutils.sysconfig -sys.path.append("/usr/lib/python%s/dist-packages" - % distutils.sysconfig.get_python_version()) import onl.install.RecoverApp onl.install.RecoverApp.main() diff --git a/packages/base/all/vendor-config-onl/src/bin/pyfit b/packages/base/all/vendor-config-onl/src/bin/pyfit index ea644d72..4ee57728 100755 --- a/packages/base/all/vendor-config-onl/src/bin/pyfit +++ b/packages/base/all/vendor-config-onl/src/bin/pyfit @@ -3,9 +3,5 @@ """Swiss-army-knife FIT decoder """ -import sys -import distutils.sysconfig -sys.path.append("/usr/lib/python%s/dist-packages" - % distutils.sysconfig.get_python_version()) import onl.install.Fit onl.install.Fit.App.main() From 71e0cc65c2e07095ffe7c82da8433cb2b8e7761d Mon Sep 17 00:00:00 2001 From: "Carl D. Roth" Date: Fri, 6 May 2016 11:07:54 -0700 Subject: [PATCH 25/62] Added list_platforms api call --- tools/onlpm.py | 25 +++++++++++++++---------- 1 file changed, 15 insertions(+), 10 deletions(-) diff --git a/tools/onlpm.py b/tools/onlpm.py index d00e74d3..62ef67bc 100755 --- a/tools/onlpm.py +++ b/tools/onlpm.py @@ -561,7 +561,6 @@ class OnlPackageGroup(object): with onlu.Lock(os.path.join(self._pkgs['__directory'], '.lock')): self.gmake_locked("clean", 'Clean') - class OnlPackageRepo(object): """Package Repository and Interchange Class @@ -999,6 +998,17 @@ class OnlPackageManager(object): def pkg_info(self): return "\n".join([ pg.pkg_info() for pg in self.package_groups if not pg.filtered ]) + def list_platforms(self, arch): + platforms = [] + for pg in self.package_groups: + for p in pg.packages: + (name, pkgArch) = OnlPackage.idparse(p.id()) + m = re.match(r'onl-platform-config-(?P.*)', name) + if m: + if arch in [ pkgArch, "all", None ]: + platforms.append(m.groups('platform')[0]) + return platforms + def defaultPm(): repo = os.environ.get('ONLPM_OPTION_REPO', None) envJson = os.environ.get('ONLPM_OPTION_INCLUDE_ENV_JSON', None) @@ -1139,15 +1149,10 @@ if __name__ == '__main__': print if ops.list_platforms: - platforms = [] - for pg in pm.package_groups: - for p in pg.packages: - (name, arch) = OnlPackage.idparse(p.id()) - m = re.match(r'onl-platform-config-(?P.*)', name) - if m: - if ops.arch in [ arch, "all", None ]: - platforms.append(m.groups('platform')[0]) - + if not ops.arch: + logger.error("missing --arch with --list-platforms") + sys.exit(1) + platforms = pm.list_platforms(ops.arch) if ops.csv: print ','.join(platforms) else: From c5a8d943b292113357f3dca8427bacc7014faf3c Mon Sep 17 00:00:00 2001 From: "Carl D. Roth" Date: Fri, 6 May 2016 11:08:06 -0700 Subject: [PATCH 26/62] Support dtb and itb extraction --- tools/onlplatform.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tools/onlplatform.py b/tools/onlplatform.py index 4348cb85..633bc722 100644 --- a/tools/onlplatform.py +++ b/tools/onlplatform.py @@ -71,7 +71,7 @@ def extractVendor(platform, arch): l = [x for x in l if x.startswith('onl-vendor-config-')] return "\n".join(l) -if key in ('kernel', 'initrd',): +if key in ('kernel', 'initrd', 'dtb', 'itb',): print extractKey(platform, arch, key) sys.exit(0) From 0c7b466bcd4591da38ba588aa7c608d3a695238d Mon Sep 17 00:00:00 2001 From: "Carl D. Roth" Date: Fri, 6 May 2016 11:08:29 -0700 Subject: [PATCH 27/62] Refactor to use onlpm as a module --- tools/flat-image-tree.py | 95 ++++++++++++++++++++++++++-------------- 1 file changed, 63 insertions(+), 32 deletions(-) diff --git a/tools/flat-image-tree.py b/tools/flat-image-tree.py index 32865a6f..fe95dab8 100755 --- a/tools/flat-image-tree.py +++ b/tools/flat-image-tree.py @@ -7,7 +7,16 @@ import subprocess import yaml import tempfile -import json + +import os, sys +toolsdir = os.path.dirname(os.path.abspath(__file__)) +onldir = os.path.dirname(toolsdir) +pydir = os.path.join(onldir, "packages/base/all/vendor-config-onl/src/python") +sys.path.append(pydir) +import onl.YamlUtils + +from onlpm import * +pm = defaultPm() class Image(object): """Base ITS Image Class""" @@ -34,12 +43,17 @@ class Image(object): raise ValueError("invalid image specifier: %s" % repr(data)) if pkg is not None: - cmd = ('onlpm', '--quiet', '--find-file', pkg, fname,) - self.data = subprocess.check_output(cmd).strip() + pm.require(pkg, force=False, build_missing=False) + self.data = pm.opr.get_file(pkg, fname) else: self.data = data - self.name = os.path.basename(self.data) + try: + self.name = os.path.basename(fname) + except: + import pdb + pdb.set_trace() + raise self.description = self.name @@ -73,8 +87,8 @@ class Image(object): class KernelImage(Image): """Kernel image entry""" - def __init__(self, fname, arch): - Image.__init__(self, "kernel", fname, compression='gzip') + def __init__(self, fdata, arch): + Image.__init__(self, "kernel", fdata, compression='gzip') self.os = '"linux"' # Fixme -- thse should be parameterized @@ -94,8 +108,8 @@ class KernelImage(Image): class InitrdImage(Image): """Initrd image entry""" - def __init__(self, fname, arch): - Image.__init__(self, "ramdisk", fname, compression='gzip') + def __init__(self, fdata, arch): + Image.__init__(self, "ramdisk", fdata, compression='gzip') # Fixme -- thse should be parameterized if arch == 'powerpc': @@ -115,8 +129,8 @@ class InitrdImage(Image): class DtbImage(Image): """DTB Image Entry""" - def __init__(self, fname): - Image.__init__(self, "flat_dt", fname, compression="none") + def __init__(self, fdata): + Image.__init__(self, "flat_dt", fdata, compression="none") def write(self, f): self.start_image(f) @@ -176,18 +190,31 @@ class FlatImageTree(object): initrd = d.get('initrd', None) + sys.stderr.write("*** platform %s kernel %s\n" + % (name, kernel,)) self.add_config(name, kernel, dtb, initrd) - def add_yaml(self, name, fname): - d = yaml.load(open(fname)) + def add_yaml(self, name, fname, defaults=None): + if defaults is not None: + d = onl.YamlUtils.merge(defaults, fname) + else: + with open(fname) as fd: + d = yaml.load(fd) self.add_dict(name, d) def add_platform_package(self, package): print package platform = package.replace(":%s" % ops.arch, "").replace("onl-platform-config-", "") - y = subprocess.check_output("onlpm --quiet --find-file %s %s.yml" % (package, platform), shell=True).strip() - self.add_yaml(platform, y) + + vpkg = "onl-vendor-config-onl:all" + pm.require(vpkg, force=False, build_missing=False) + y1 = pm.opr.get_file(vpkg, "platform-config-defaults-uboot.yml") + + pm.require(package, force=False, build_missing=False) + y2 = pm.opr.get_file(package, platform + '.yml') + + self.add_yaml(platform, y2, defaults=y1) def add_platform(self, platform): if (":%s" % ops.arch) in platform: @@ -202,17 +229,19 @@ class FlatImageTree(object): def writef(self, f): kdict = {} - for k in set(self.kernels): - kdict[k] = KernelImage(k, ops.arch) + for k in self.kernels: + ki = KernelImage(k, ops.arch) + kdict[ki.name] = ki ddict = {} - for d in set(self.dtbs): - ddict[d] = DtbImage(d) + for d in self.dtbs: + di = DtbImage(d) + ddict[di.name] = di idict = {} - for i in set(self.initrds): - idict[i] = InitrdImage(i, ops.arch) - + for i in self.initrds: + ii = InitrdImage(i, ops.arch) + idict[ii.name] = ii f.write("""/* \n""") @@ -227,27 +256,27 @@ class FlatImageTree(object): f.write(""" images {\n\n""") f.write(""" /* Kernel Images */\n""") - for k in set(self.kernels): - KernelImage(k, ops.arch).write(f) + for k in kdict.values(): + k.write(f) f.write("""\n""") f.write(""" /* DTB Images */\n""") - for d in set(self.dtbs): - DtbImage(d).write(f) + for d in ddict.values(): + d.write(f) f.write("""\n""") f.write(""" /* Initrd Images */\n""") - for i in set(self.initrds): - InitrdImage(i, ops.arch).write(f) + for i in idict.values(): + i.write(f) f.write(""" };\n""") f.write(""" configurations {\n""") for (name, (kernel, dtb, initrd)) in self.configurations.iteritems(): f.write(""" %s {\n""" % name) f.write(""" description = "%s";\n""" % name) - f.write(""" kernel = "%s";\n""" % (kdict[kernel].name)) - f.write(""" ramdisk = "%s";\n""" % (idict[initrd].name)) - f.write(""" fdt = "%s";\n""" % (ddict[dtb].name)) + f.write(""" kernel = "%s";\n""" % (KernelImage(kernel, ops.arch).name)) + f.write(""" ramdisk = "%s";\n""" % (InitrdImage(initrd, ops.arch).name)) + f.write(""" fdt = "%s";\n""" % (DtbImage(dtb).name)) f.write(""" };\n\n""") f.write(""" };\n""") f.write("""};\n""") @@ -298,12 +327,14 @@ if __name__ == '__main__': fit.add_yaml(y) if ops.add_platform == [['all']]: - ops.add_platform = [ subprocess.check_output("onlpm --list-platforms --arch %s" % (ops.arch), shell=True).split() ] + ops.add_platform = [ pm.list_platforms(ops.arch) ] if ops.add_platform == [['initrd']]: # Add support for the platforms listed in the initrd's platform manifest (package,f) = initrd.split(':') - mfile = subprocess.check_output("onlpm --find-file %s:%s manifest.json" % (package, ops.arch), shell=True).strip() + pkg = package + ':' + ops.arch + pm.require(pkg, force=False, build_missing=False) + mfile = pm.opr.get_file(pkg, "manifest.json") manifest = json.load(open(mfile)) ops.add_platform = [[ "%s" % p for p in manifest['platforms'] ]] From 07e68fe666ddc18b5a88960404ff4bcc81091129 Mon Sep 17 00:00:00 2001 From: "Carl D. Roth" Date: Fri, 6 May 2016 11:09:57 -0700 Subject: [PATCH 28/62] Working powerpc template, also include arm --- .../lib/platform-config-defaults-uboot.yml | 86 +++++++++++++++++-- 1 file changed, 80 insertions(+), 6 deletions(-) diff --git a/packages/base/all/vendor-config-onl/src/lib/platform-config-defaults-uboot.yml b/packages/base/all/vendor-config-onl/src/lib/platform-config-defaults-uboot.yml index c23835c8..4343389e 100644 --- a/packages/base/all/vendor-config-onl/src/lib/platform-config-defaults-uboot.yml +++ b/packages/base/all/vendor-config-onl/src/lib/platform-config-defaults-uboot.yml @@ -28,14 +28,14 @@ default: e500mc-kernel-package: &e500mc-kernel-package package: onl-kernel-3.8.13-powerpc-e500mc:powerpc - e500mc-kernel: + e500mc-kernel: &e500mc-kernel =: kernel-3.8.13-powerpc-e500mc.bin.gz <<: *e500mc-kernel-package arm-iproc-kernel-package: &arm-iproc-kernel-package package: onl-kernel-3.2-deb7-arm-iproc-all:armel - arm-iproc-kernel: + arm-iproc-kernel: &arm-iproc-kernel =: kernel-3.2-deb7-arm-iproc-all.bin.gz <<: *arm-iproc-kernel-package @@ -53,10 +53,84 @@ default: ## =: powerpc-quanta-lb9-r0.dtb ## <<: *e500v-kernel-package + ############################## + # + # pick an actual loader file, + # usually the 'all' image + # + ############################## + + powerpc-itb: &powerpc-itb + =: onl-loader-fit.itb + package: onl-loader-fit:powerpc + + arm-itb: &arm-itb + =: onl-loader-fit.itb + package: onl-loader-fit:armel + + itb: *powerpc-itb + loader: - partition: /dev/sda1 - ##partition: /dev/mmcblk0p1 + device: /dev/sda + ##device: /dev/mmcblk0 - ### True for raw partitions - ##raw: True + loadaddr: 0x10000000 + ##loadaddr: 70000000 + + # Add your own 'setenv' clauses, + # otherwise lean back and coast with these implicit ones + setenv: + ##- onl_loadaddr: @loadaddr@ + ### added automatically + ##- onl_platform: @platform@ + ### added automatically + ##- onl_itb: @itb@ + - bootargs: >- + console=$consoledev,$baudrate + onl_platform=$onl_platform + + ide_bootcmds: &ide_bootcmds + - ext2load ide 0:1 $onl_loadaddr $onl_itb + - "bootm $onl_loadaddr#$onl_platform" + + usb_bootcmds: &usb_bootcmds + - usb start + - ext2load usb 0:1 $onl_loadaddr $onl_itb + - "bootm $onl_loadaddr#$onl_platform" + + # XXX roth arm example includes the 'usbiddev' magic + usb2_bootcmds: &usb2_bootcmds + - usb start + - usbiddev + - ext2load usb 0:1 $onl_loadaddr $onl_itb + - "bootm $onl_loadaddr#$onl_platform" + + mmc_bootcmds: &mmc_bootcmds + - mmc part 0 + - ext2load mmc 0:1 $onl_loadaddr $onl_itb + - "bootm $onl_loadaddr#$onl_platform" + + nos_bootcmds: *ide_bootcmds + + # Default partitioning scheme + # boot, config --> 128MiB (ext2) + # images --> 1GiB + # data --> rest of disk + # default format (as shown) is ext4 + installer: + - ONL-BOOT: + =: 128MiB + # NOTE that u-boot wants the boot partition ext2, not ext4 + format: ext2 + ##format: raw + + - ONL-CONFIG: + =: 128MiB + format: ext4 + - ONL-IMAGES: + =: 1GiB + format: ext4 + - ONL-DATA: + =: 100% + format: ext4 From ef8c6e701a52c4eb8c394533b83ad097079fa803 Mon Sep 17 00:00:00 2001 From: "Carl D. Roth" Date: Fri, 6 May 2016 11:12:05 -0700 Subject: [PATCH 29/62] Update powerpc and arm profiles for new template --- .../r0/src/lib/arm-accton-as4610-54-r0.yml | 22 ++++++++++-- .../src/lib/powerpc-accton-as4600-54t-r0.yml | 33 ++++++++++++++++-- .../src/lib/powerpc-accton-as5610-52x-r0.yml | 34 +++++++++++++++++-- .../src/lib/powerpc-accton-as5710-54x-r0.yml | 34 ++++++++++++++++--- .../src/lib/powerpc-accton-as5710-54x-r0b.yml | 20 ++++++++--- .../src/lib/powerpc-accton-as6700-32x-r0.yml | 34 +++++++++++++++++-- .../src/lib/powerpc-accton-as6700-32x-r1.yml | 34 +++++++++++++++++-- .../r0/src/lib/arm-qemu-armv7a-r0.yml | 18 ++++++++-- .../r0/src/lib/powerpc-quanta-lb9-r0.yml | 21 +++++++++--- .../r0/src/lib/powerpc-quanta-ly2-r0.yml | 20 +++++++++-- 10 files changed, 238 insertions(+), 32 deletions(-) diff --git a/packages/platforms/accton/armel/arm-accton-as4610-54/platform-config/r0/src/lib/arm-accton-as4610-54-r0.yml b/packages/platforms/accton/armel/arm-accton-as4610-54/platform-config/r0/src/lib/arm-accton-as4610-54-r0.yml index b6df1308..010c3b7d 100644 --- a/packages/platforms/accton/armel/arm-accton-as4610-54/platform-config/r0/src/lib/arm-accton-as4610-54-r0.yml +++ b/packages/platforms/accton/armel/arm-accton-as4610-54/platform-config/r0/src/lib/arm-accton-as4610-54-r0.yml @@ -1,7 +1,23 @@ +--- + +###################################################################### +# +# platform-config for AS4610 +# +###################################################################### + arm-accton-as4610-54-r0: flat_image_tree: - kernel: onl-kernel-3.2-deb7-arm-iproc-all:armel, kernel-3.2-deb7-arm-iproc-all.bin.gz - dtb: onl-kernel-3.2-deb7-arm-iproc-all:armel, accton_as4610_54.dtb + kernel: + <<: *arm-iproc-kernel + dtb: + =: accton_as4610_54.dtb + <<: *arm-iproc-kernel-package + itb: + <<: *arm-itb loader: - partition: /dev/sda1 \ No newline at end of file + device: /dev/sda + ##partition: /dev/sda1 + loadaddr: 0x70000000 + nos_bootcmds: *usb2_bootcmds diff --git a/packages/platforms/accton/powerpc/powerpc-accton-as4600-54t/platform-config/r0/src/lib/powerpc-accton-as4600-54t-r0.yml b/packages/platforms/accton/powerpc/powerpc-accton-as4600-54t/platform-config/r0/src/lib/powerpc-accton-as4600-54t-r0.yml index 4e178c5e..b147cb47 100644 --- a/packages/platforms/accton/powerpc/powerpc-accton-as4600-54t/platform-config/r0/src/lib/powerpc-accton-as4600-54t-r0.yml +++ b/packages/platforms/accton/powerpc/powerpc-accton-as4600-54t/platform-config/r0/src/lib/powerpc-accton-as4600-54t-r0.yml @@ -1,7 +1,34 @@ +--- + +###################################################################### +# +# platform-config for AS4600 +# +###################################################################### + powerpc-accton-as4600-54t-r0: flat_image_tree: - kernel: onl-kernel-3.9.6-powerpc-e500v:powerpc, kernel-3.9.6-powerpc-e500v.bin.gz - dtb: onl-kernel-3.9.6-powerpc-e500v:powerpc, powerpc-as4600-54t.dtb + kernel: + <<: *e500v-kernel + dtb: + =: powerpc-as4600-54t.dtb + <<: *e500v-kernel-package loader: - partition: /dev/sda1 + device: /dev/sda + ##partition: /dev/sda1 + nos_bootcmds: *usb_bootcmds + + installer: + - ONL-BOOT: + =: 32MiB + format: ext2 + - ONL-CONFIG: + =: 32MiB + format: ext4 + - ONL-IMAGES: + =: 448MiB + format: ext4 + - ONL-DATA: + =: 100% + format: ext4 diff --git a/packages/platforms/accton/powerpc/powerpc-accton-as5610-52x/platform-config/r0/src/lib/powerpc-accton-as5610-52x-r0.yml b/packages/platforms/accton/powerpc/powerpc-accton-as5610-52x/platform-config/r0/src/lib/powerpc-accton-as5610-52x-r0.yml index 011674d7..a02ae482 100644 --- a/packages/platforms/accton/powerpc/powerpc-accton-as5610-52x/platform-config/r0/src/lib/powerpc-accton-as5610-52x-r0.yml +++ b/packages/platforms/accton/powerpc/powerpc-accton-as5610-52x/platform-config/r0/src/lib/powerpc-accton-as5610-52x-r0.yml @@ -1,7 +1,35 @@ +--- + +###################################################################### +# +# platform-config for AS5610 +# +###################################################################### + powerpc-accton-as5610-52x-r0: + flat_image_tree: - kernel: onl-kernel-3.9.6-powerpc-e500v:powerpc, kernel-3.9.6-powerpc-e500v.bin.gz - dtb: onl-kernel-3.9.6-powerpc-e500v:powerpc, powerpc-as5610-52x.dtb + kernel: + <<: *e500v-kernel + dtb: + =: powerpc-as5610-52x.dtb + <<: *e500v-kernel-package loader: - partition: /dev/sda1 \ No newline at end of file + device: /dev/sda + ##partition: /dev/sda1 + nos_bootcmds: *usb_bootcmds + + installer: + - ONL-BOOT: + =: 128MiB + format: ext2 + - ONL-CONFIG: + =: 128MiB + format: ext4 + - ONL-IMAGES: + =: 768MiB + format: ext4 + - ONL-DATA: + =: 100% + format: ext4 diff --git a/packages/platforms/accton/powerpc/powerpc-accton-as5710-54x/platform-config/r0/src/lib/powerpc-accton-as5710-54x-r0.yml b/packages/platforms/accton/powerpc/powerpc-accton-as5710-54x/platform-config/r0/src/lib/powerpc-accton-as5710-54x-r0.yml index 2e3bde00..91c166c8 100644 --- a/packages/platforms/accton/powerpc/powerpc-accton-as5710-54x/platform-config/r0/src/lib/powerpc-accton-as5710-54x-r0.yml +++ b/packages/platforms/accton/powerpc/powerpc-accton-as5710-54x/platform-config/r0/src/lib/powerpc-accton-as5710-54x-r0.yml @@ -1,9 +1,35 @@ +--- + +###################################################################### +# +# platform-config for AS5710 +# +###################################################################### + powerpc-accton-as5710-54x-r0: + flat_image_tree: - kernel: onl-kernel-3.8.13-powerpc-e500mc:powerpc, kernel-3.8.13-powerpc-e500mc.bin.gz - dtb: onl-kernel-3.8.13-powerpc-e500mc:powerpc, powerpc-accton-as5710-54x-r0.dtb + kernel: + <<: *e500mc-kernel + dtb: + =: powerpc-accton-as5710-54x-r0.dtb + <<: *e500mc-kernel-package loader: - partition: /dev/sda1 - raw: True + device: /dev/sda + nos_bootcmds: *usb_bootcmds + installer: + - ONL-BOOT: + =: 128MiB + format: ext2 + ##format: raw + - ONL-CONFIG: + =: 128MiB + format: ext4 + - ONL-IMAGES: + =: 1GiB + format: ext4 + - ONL-DATA: + =: 100% + format: ext4 diff --git a/packages/platforms/accton/powerpc/powerpc-accton-as5710-54x/platform-config/r0b/src/lib/powerpc-accton-as5710-54x-r0b.yml b/packages/platforms/accton/powerpc/powerpc-accton-as5710-54x/platform-config/r0b/src/lib/powerpc-accton-as5710-54x-r0b.yml index 1ceabcfe..72b71b5d 100644 --- a/packages/platforms/accton/powerpc/powerpc-accton-as5710-54x/platform-config/r0b/src/lib/powerpc-accton-as5710-54x-r0b.yml +++ b/packages/platforms/accton/powerpc/powerpc-accton-as5710-54x/platform-config/r0b/src/lib/powerpc-accton-as5710-54x-r0b.yml @@ -1,9 +1,21 @@ +--- + +###################################################################### +# +# platform-config for as5710 +# +###################################################################### + powerpc-accton-as5710-54x-r0b: + flat_image_tree: - kernel: onl-kernel-3.8.13-powerpc-e500mc:powerpc, kernel-3.8.13-powerpc-e500mc.bin.gz - dtb: onl-kernel-3.8.13-powerpc-e500mc:powerpc, powerpc-accton-as5710-54x-r0b.dtb + kernel: + <<: *e500mc-kernel + dtb: + =: powerpc-accton-as5710-54x-r0b.dtb + <<: *e500mc-kernel-package loader: - partition: /dev/sda1 - raw: True + device: /dev/sda + nos_bootcmds: *usb_bootcmds diff --git a/packages/platforms/accton/powerpc/powerpc-accton-as6700-32x/platform-config/r0/src/lib/powerpc-accton-as6700-32x-r0.yml b/packages/platforms/accton/powerpc/powerpc-accton-as6700-32x/platform-config/r0/src/lib/powerpc-accton-as6700-32x-r0.yml index a5287fe1..58f15076 100644 --- a/packages/platforms/accton/powerpc/powerpc-accton-as6700-32x/platform-config/r0/src/lib/powerpc-accton-as6700-32x-r0.yml +++ b/packages/platforms/accton/powerpc/powerpc-accton-as6700-32x/platform-config/r0/src/lib/powerpc-accton-as6700-32x-r0.yml @@ -1,8 +1,36 @@ +--- + +###################################################################### +# +# platform-config for AS6700 +# +###################################################################### + powerpc-accton-as6700-32x-r0: + flat_image_tree: - kernel: onl-kernel-3.8.13-powerpc-e500mc:powerpc, kernel-3.8.13-powerpc-e500mc.bin.gz - dtb: onl-kernel-3.8.13-powerpc-e500mc:powerpc, powerpc-accton-as6700-32x-r0.dtb + kernel: + <<: *e500mc-kernel + dtb: + =: powerpc-accton-as6700-32x-r0.dtb + <<: *e500mc-kernel-package loader: - partition: /dev/sda1 + device: /dev/sda + ##partition: /dev/sda1 + nos_bootcmds: *usb_bootcmds + + installer: + - ONL-BOOT: + =: 128MiB + format: ext2 + - ONL-CONFIG: + =: 128MiB + format: ext4 + - ONL-IMAGES: + =: 768MiB + format: ext4 + - ONL-DATA: + =: 100% + format: ext4 diff --git a/packages/platforms/accton/powerpc/powerpc-accton-as6700-32x/platform-config/r1/src/lib/powerpc-accton-as6700-32x-r1.yml b/packages/platforms/accton/powerpc/powerpc-accton-as6700-32x/platform-config/r1/src/lib/powerpc-accton-as6700-32x-r1.yml index dbb1187d..f35a9391 100644 --- a/packages/platforms/accton/powerpc/powerpc-accton-as6700-32x/platform-config/r1/src/lib/powerpc-accton-as6700-32x-r1.yml +++ b/packages/platforms/accton/powerpc/powerpc-accton-as6700-32x/platform-config/r1/src/lib/powerpc-accton-as6700-32x-r1.yml @@ -1,8 +1,36 @@ +--- + +###################################################################### +# +# platform-config for AS6700 +# +###################################################################### + powerpc-accton-as6700-32x-r1: + flat_image_tree: - kernel: onl-kernel-3.8.13-powerpc-e500mc:powerpc, kernel-3.8.13-powerpc-e500mc.bin.gz - dtb: onl-kernel-3.8.13-powerpc-e500mc:powerpc, powerpc-accton-as6700-32x-r1.dtb + kernel: + <<: *e500mc-kernel + dtb: + =: powerpc-accton-as6700-32x-r1.dtb + <<: *e500mc-kernel-package loader: - partition: /dev/sda1 + device: /dev/sda + ##partition: /dev/sda1 + nos_bootcmds: *usb_bootcmds + + installer: + - ONL-BOOT: + =: 128MiB + format: ext2 + - ONL-CONFIG: + =: 128MiB + format: ext4 + - ONL-IMAGES: + =: 768MiB + format: ext4 + - ONL-DATA: + =: 100% + format: ext4 diff --git a/packages/platforms/qemu/arm/arm-qemu-armv7a/platform-config/r0/src/lib/arm-qemu-armv7a-r0.yml b/packages/platforms/qemu/arm/arm-qemu-armv7a/platform-config/r0/src/lib/arm-qemu-armv7a-r0.yml index ce884b4a..dd31aaad 100644 --- a/packages/platforms/qemu/arm/arm-qemu-armv7a/platform-config/r0/src/lib/arm-qemu-armv7a-r0.yml +++ b/packages/platforms/qemu/arm/arm-qemu-armv7a/platform-config/r0/src/lib/arm-qemu-armv7a-r0.yml @@ -1,4 +1,18 @@ +--- + +###################################################################### +# +# platform-config for ARM/QEMU +# +###################################################################### + arm-qemu-armv7a-r0: + flat_image_tree: - kernel: onl-kernel-3.2-deb7-arm-iproc-all:armel, kernel-3.2-deb7-arm-iproc-all.bin.gz - dtb: onl-kernel-3.2-deb7-arm-iproc-all:armel, accton_as4610_54.dtb + kernel: + <<: *arm-iproc-kernel + dtb: + =: accton_as4610_54.dtb + <<: *arm-iproc-kernel-package + itb: + <<: *arm-itb diff --git a/packages/platforms/quanta/powerpc/powerpc-quanta-lb9/platform-config/r0/src/lib/powerpc-quanta-lb9-r0.yml b/packages/platforms/quanta/powerpc/powerpc-quanta-lb9/platform-config/r0/src/lib/powerpc-quanta-lb9-r0.yml index 309845f9..e21363f2 100644 --- a/packages/platforms/quanta/powerpc/powerpc-quanta-lb9/platform-config/r0/src/lib/powerpc-quanta-lb9-r0.yml +++ b/packages/platforms/quanta/powerpc/powerpc-quanta-lb9/platform-config/r0/src/lib/powerpc-quanta-lb9-r0.yml @@ -1,8 +1,21 @@ +--- + +###################################################################### +# +# platform definition for LB9 +# +###################################################################### + powerpc-quanta-lb9-r0: + flat_image_tree: - kernel: onl-kernel-3.9.6-powerpc-e500v:powerpc, kernel-3.9.6-powerpc-e500v.bin.gz - dtb: onl-kernel-3.9.6-powerpc-e500v:powerpc, powerpc-quanta-lb9-r0.dtb + + kernel: + <<: *e500v-kernel + dtb: + =: powerpc-quanta-lb9-r0.dtb + <<: *e500v-kernel-package loader: - partition: /dev/sda1 - raw: True + device: /dev/sda + nos_bootcmds: *ide_bootcmds diff --git a/packages/platforms/quanta/powerpc/powerpc-quanta-ly2/platform-config/r0/src/lib/powerpc-quanta-ly2-r0.yml b/packages/platforms/quanta/powerpc/powerpc-quanta-ly2/platform-config/r0/src/lib/powerpc-quanta-ly2-r0.yml index 95c591b1..80af8e38 100644 --- a/packages/platforms/quanta/powerpc/powerpc-quanta-ly2/platform-config/r0/src/lib/powerpc-quanta-ly2-r0.yml +++ b/packages/platforms/quanta/powerpc/powerpc-quanta-ly2/platform-config/r0/src/lib/powerpc-quanta-ly2-r0.yml @@ -1,7 +1,21 @@ +--- + +###################################################################### +# +# platform-config for LY2 +# +###################################################################### + powerpc-quanta-ly2-r0: + flat_image_tree: - kernel: onl-kernel-3.9.6-powerpc-e500v:powerpc, kernel-3.9.6-powerpc-e500v.bin.gz - dtb: onl-kernel-3.9.6-powerpc-e500v:powerpc, powerpc-quanta-ly2-r0.dtb + kernel: + <<: *e500v-kernel + dtb: + =: powerpc-quanta-ly2-r0.dtb + <<: *e500v-kernel-package loader: - partition: /dev/mmcblk0p1 + device: /dev/mmcblk0 + ##partition: /dev/mmcblk0p1 + nos_bootcmds: *mmc_bootcmds From f8c9f414842095df17533f91ff4d560de3536acd Mon Sep 17 00:00:00 2001 From: "Carl D. Roth" Date: Fri, 6 May 2016 11:12:48 -0700 Subject: [PATCH 30/62] Added vendor config packages to loader --- .../base/any/initrds/loader/builds/Makefile | 17 +++++++++++++---- 1 file changed, 13 insertions(+), 4 deletions(-) diff --git a/packages/base/any/initrds/loader/builds/Makefile b/packages/base/any/initrds/loader/builds/Makefile index dc39a03d..b117a086 100644 --- a/packages/base/any/initrds/loader/builds/Makefile +++ b/packages/base/any/initrds/loader/builds/Makefile @@ -13,6 +13,7 @@ PLATFORMS := $(shell onlpm --list-platforms --arch $(ARCH)) endif PLATFORM_PACKAGES := $(foreach p,$(PLATFORMS),onl-platform-config-$(p):$(ARCH)) +VENDOR_PACKAGES := $(foreach p,$(PLATFORMS),$(shell python $(ONL)/tools/onlplatform.py $(p) $(ARCH) vendor)) ROOT := root TARGET := onl-loader-initrd-$(ARCH).cpio.gz @@ -24,6 +25,7 @@ $(TARGET): $(ONLPM) --sudo --force --extract-dir onl-loader-initrd-files:all $(ROOT) $(ONLPM) --sudo --force --extract-dir onl-vendor-config-onl-loader:all $(ROOT) $(ONLPM) --sudo $(foreach p,$(PLATFORM_PACKAGES),--extract-dir $(p) $(ROOT)) + $(MAKE) __vendor_config_data $(ONLPM) --sudo --force --extract-dir onl-vendor-config-onl:all $(ROOT) $(ONL)/tools/sjson.py --kj version $(ONL)/make/version-onl.json --kl platforms $(PLATFORMS) --kv arch $(ARCH) --out manifest.json sudo mkdir -p $(ROOT)/etc/onl/loader && sudo cp manifest.json $(ROOT)/etc/onl/loader @@ -31,7 +33,14 @@ $(TARGET): sudo $(ONL)/tools/cpiomod.py --cpio onl-buildroot-initrd-$(ARCH).cpio.gz --add-directory $(ROOT) --out $@ sudo rm -rf $(ROOT) onl-buildroot-initrd-$(ARCH).cpio.gz - - - - +__vendor_config_data: + set -e ;\ + vpkgs= ;\ + l="$(PLATFORMS)"; for p in $$l; do \ + vpkg=$$(python $(ONL)/tools/onlplatform.py $$p $(ARCH) vendor) ;\ + case " $$vpkgs " in *" $$vpkg "*) continue ;; esac ;\ + vpkgs=$$vpkgs$${vpkgs:+" "}$$vpkg ;\ + echo "Adding vendor package $$vpkg" ;\ + $(ONLPM) --sudo --force --extract-dir $$vpkg $(ROOT) ;\ + done ;\ + : From 089f5be4d9f76b63338b7f46d7d531f21ac1aa80 Mon Sep 17 00:00:00 2001 From: "Carl D. Roth" Date: Fri, 6 May 2016 11:13:49 -0700 Subject: [PATCH 31/62] Added mkfs commands --- .../src/python/onl/install/InstallUtils.py | 34 +++++++++++++++++++ 1 file changed, 34 insertions(+) diff --git a/packages/base/all/vendor-config-onl/src/python/onl/install/InstallUtils.py b/packages/base/all/vendor-config-onl/src/python/onl/install/InstallUtils.py index 922aecef..4b8f1760 100644 --- a/packages/base/all/vendor-config-onl/src/python/onl/install/InstallUtils.py +++ b/packages/base/all/vendor-config-onl/src/python/onl/install/InstallUtils.py @@ -143,6 +143,40 @@ class SubprocessMixin: self.log.debug("+ /bin/ln -s %s %s", tgt, dst) os.symlink(tgt, dst) + def mkdosfs(self, dev, label=None): + if label is not None: + cmd = ('mkdosfs', '-n', label, dev,) + else: + cmd = ('mkdosfs', dev,) + self.check_call(cmd, vmode=self.V1) + + def mke2fs(self, dev, label=None): + if label is not None: + cmd = ('mkfs.ext2', '-L', label, dev,) + else: + cmd = ('mkfs.ext2', dev,) + self.check_call(cmd, vmode=self.V1) + + def mke4fs(self, dev, label=None, huge_file=True): + if label is not None: + cmd = ['mkfs.ext4', '-L', label, dev,] + else: + cmd = ['mkfs.ext4', dev,] + + if not huge_file: + cmd[1:1] = ['-O', '^huge_file',] + # hack needed for some old ONIE kernels + + self.check_call(cmd, vmode=self.V1) + + def mkfs(self, dev, fstype): + mkfs = 'mkfs.%s' % fstype + cmd = (mkfs, dev,) + + # 'mkfs -h' says to use '-V' for verbose, + # don't believe it + self.check_call(cmd, vmode=self.V1) + class TempdirContext(SubprocessMixin): def __init__(self, prefix=None, suffix=None, chroot=None, log=None): From 9c383236bb96c4b1e438c4767dfda373dae5d660 Mon Sep 17 00:00:00 2001 From: "Carl D. Roth" Date: Fri, 6 May 2016 11:26:54 -0700 Subject: [PATCH 32/62] Update/refactor, u-boot install is now a thing --- .../src/python/onl/install/App.py | 7 +- .../src/python/onl/install/BaseInstall.py | 636 +++++++++--------- 2 files changed, 329 insertions(+), 314 deletions(-) diff --git a/packages/base/all/vendor-config-onl/src/python/onl/install/App.py b/packages/base/all/vendor-config-onl/src/python/onl/install/App.py index 714fd182..79884203 100644 --- a/packages/base/all/vendor-config-onl/src/python/onl/install/App.py +++ b/packages/base/all/vendor-config-onl/src/python/onl/install/App.py @@ -14,11 +14,6 @@ from InstallUtils import InitrdContext from InstallUtils import SubprocessMixin import ConfUtils, BaseInstall -# locate the platform-config files using SWI path rules -sys.path.append("/usr/lib/python%s/dist-packages" - % (distutils.sysconfig.get_python_version(),)) - -import onl.platform.base import onl.platform.current class App(SubprocessMixin): @@ -33,7 +28,7 @@ class App(SubprocessMixin): self.installer = None self.machineConf = None self.installerConf = None - self.platform = None + self.onlPlatform = None def run(self): diff --git a/packages/base/all/vendor-config-onl/src/python/onl/install/BaseInstall.py b/packages/base/all/vendor-config-onl/src/python/onl/install/BaseInstall.py index 22ae8850..d85c1a8c 100644 --- a/packages/base/all/vendor-config-onl/src/python/onl/install/BaseInstall.py +++ b/packages/base/all/vendor-config-onl/src/python/onl/install/BaseInstall.py @@ -18,6 +18,10 @@ import onl.YamlUtils class Base: class installmeta: + + grub = False + uboot = False + def __init__(self, installerConf=None, machineConf=None, @@ -38,17 +42,30 @@ class Base: machineConf=None, installerConf=None, platformConf=None, grubEnv=None, ubootEnv=None, log=None): - self.machineConf = machineConf - self.installerConf = installerConf self.im = self.installmeta(installerConf=installerConf, machineConf=machineConf, platformConf=platformConf, grubEnv=grubEnv, ubootEnv = ubootEnv) - self.grubEnv = grubEnv - self.ubootEnv = ubootEnv self.log = log or logging.getLogger(self.__class__.__name__) + self.device = None + # target device, initialize this later + + self.minpart = None + self.nextBlock = None + # keep track of next partition/next block + + self.blkidParts = [] + # current scan of partitions and labels + + self.partedDevice = None + self.partedDisk = None + # parted state + + self.configArchive = None + # backup of ONL-CONFIG during re-partitioning + def run(self): self.log.error("not implemented") return 1 @@ -58,7 +75,7 @@ class Base: def installSwi(self): - swis = [x for x in os.listdir(self.installerConf.installer_dir) if x.endswith('.swi')] + swis = [x for x in os.listdir(self.im.installerConf.installer_dir) if x.endswith('.swi')] if not swis: self.log.info("No ONL Software Image available for installation.") self.log.info("Post-install ZTN installation will be required.") @@ -68,7 +85,7 @@ class Base: return base = swis[0] - src = os.path.join(self.installerConf.installer_dir, base) + src = os.path.join(self.im.installerConf.installer_dir, base) self.log.info("Installing ONL Software Image (%s)...", base) dev = self.blkidParts['ONL-IMAGES'] @@ -110,6 +127,159 @@ class Base: raise SystemExit("backup of ONL-CONFIG failed") self.unlink(archive) + def deletePartitions(self): + + nextBlock = -1 + dirty = False + for part in self.partedDisk.partitions: + self.log.info("examining %s part %d", + self.partedDisk.device.path, part.number) + if part.number < self.minpart: + self.log.info("skip this part") + nextBlock = max(part.geometry.start+part.geometry.length, + nextBlock) + else: + self.log.info("deleting this part") + self.partedDisk.removePartition(part) + dirty = True + + if dirty: + self.partedDisk.commit() + self.check_call(('partprobe', self.device,)) + + if nextBlock > -1: + self.nextBlock = nextBlock + else: + self.log.warn("no partitions, starting at block 1") + + return 0 + + def partitionParted(self): + """Build partitions according to the partition spec. + + XXX roth -- hopefully the GPT labels specified here + work correctly (that is, are ignored) on an msdos label + """ + + constraint = self.partedDevice.optimalAlignedConstraint + # default partition layout constraint + + devices = {} + + def _u2s(sz, u): + bsz = sz * u + bsz = bsz + self.partedDevice.physicalSectorSize - 1 + return bsz / self.partedDevice.physicalSectorSize + + UNITS = { + 'GiB' : 1024 * 1024 * 1024, + 'G' : 1000 * 1000 * 1000, + 'MiB' : 1024 * 1024, + 'M' : 1000 * 1000, + 'KiB' : 1024, + 'K' : 1000, + } + + for part in self.im.platformConf['installer']: + + label, partData = list(part.items())[0] + if type(partData) == dict: + sz, fmt = partData['='], partData.get('format', 'ext4') + else: + sz, fmt = partData, 'ext4' + + cnt = None + nextBlock = self.nextBlock or 1 + minpart = self.minpart or 1 + for ul, ub in UNITS.items(): + if sz.endswith(ul): + cnt = _u2s(int(sz[:-len(ul)], 10), ub) + break + if sz == '100%': + cnt = self.partedDevice.getLength() - nextBlock + if cnt is None: + self.log.error("invalid size (no units) for %s: %s", + part, sz) + return 1 + + start = nextBlock + end = start + cnt - 1 + if end <= self.partedDevice.getLength(): + self.log.info("Allocating %d sectors for %s", + cnt, label) + else: + self.log.warn("%s: start sector %d, end sector %d, max %d", + label, start, end, + self.partedDevice.getLength()) + self.log.error("invalid partition %s [%s] (too big)", + label, sz) + return 1 + + geom = parted.Geometry(device=self.partedDevice, + start=start, length=end-start+1) + fs = parted.FileSystem(type=fmt, geometry=geom) + part = parted.Partition(disk=self.partedDisk, + type=parted.PARTITION_NORMAL, + fs=fs, + geometry=geom) + if self.partedDisk.type == 'gpt': + part.getPedPartition().set_name(label) + self.partedDisk.addPartition(part, constraint=constraint) + self.partedDisk.commit() + self.check_call(('partprobe', self.device,)) + + if fmt == 'raw': + self.log.info("Leaving %s (%s) unformatted (raw)", + part.path, label) + else: + self.log.info("Formatting %s (%s) as %s", + part.path, label, fmt) + if fmt == 'msdos': + self.mkdosfs(part.path, label=label) + elif fmt == 'ext4': + self.mke4fs(part.path, label=label, huge_file=False) + elif fmt == 'ext2': + self.mke2fs(part.path, label=label) + else: + self.mkfs(part.path, fstype=fmt) + + self.nextBlock, self.minpart = end+1, minpart+1 + + devices[label] = part.path + + if label == 'ONL-CONFIG' and self.configArchive is not None: + self.restoreConfig(part.path) + + self.blkidParts = BlkidParser(log=self.log.getChild("blkid")) + # re-read the partitions + + return 0 + + def installBootConfig(self): + + try: + dev = self.blkidParts['ONL-BOOT'] + except IndexError as ex: + self.log.warn("cannot find ONL-BOOT partition (maybe raw?) : %s", str(ex)) + return 1 + + self.log.info("Installing boot-config to %s", dev.device) + + src = os.path.join(self.im.installerConf.installer_dir, 'boot-config') + ##src = os.path.join(self.im.installerConf.installer_platform_dir, 'boot-config') + with MountContext(dev.device, log=self.log) as ctx: + dst = os.path.join(ctx.dir, 'boot-config') + self.copy2(src, dst) + + with open(src) as fd: + ecf = fd.read().encode('base64', 'strict').strip() + if self.im.grub and self.im.grubEnv is not None: + setattr(self.im.grubEnv, 'boot_config_default', ecf) + if self.im.uboot and self.im.ubootEnv is not None: + setattr(self.im.ubootEnv, 'boot-config-default', ecf) + + return 0 + GRUB_TPL = """\ #serial --port=0x3f8 --speed=115200 --word=8 --parity=no --stop=1 serial %(serial)s @@ -144,18 +314,6 @@ class GrubInstaller(SubprocessMixin, Base): def __init__(self, *args, **kwargs): Base.__init__(self, *args, **kwargs) - self.device = None - self.minpart = None - self.nextBlock = None - - self.blkidParts = [] - - self.partedDevice = None - self.partedDisk = None - - self.configArchive = None - # backup of ONL-CONFIG during re-partitioning - def findGpt(self): self.blkidParts = BlkidParser(log=self.log.getChild("blkid")) @@ -234,127 +392,6 @@ class GrubInstaller(SubprocessMixin, Base): return 0 - def deletePartitions(self): - - nextBlock = -1 - for part in self.partedDisk.partitions: - self.log.info("examining %s part %d", - self.partedDisk.device.path, part.number) - if part.number < self.minpart: - self.log.info("skip this part") - nextBlock = max(part.geometry.start+part.geometry.length, - nextBlock) - else: - self.log.info("deleting this part") - self.partedDisk.removePartition(part) - - if nextBlock < 0: - self.log.error("cannot find a starting block") - return 1 - - self.nextBlock = nextBlock - return 0 - - def partitionGpt(self): - - constraint = self.partedDevice.optimalAlignedConstraint - # default partition layout constraint - - devices = {} - - def _u2s(sz, u): - bsz = sz * u - bsz = bsz + self.partedDevice.physicalSectorSize - 1 - return bsz / self.partedDevice.physicalSectorSize - - UNITS = { - 'GiB' : 1024 * 1024 * 1024, - 'G' : 1000 * 1000 * 1000, - 'MiB' : 1024 * 1024, - 'M' : 1000 * 1000, - 'KiB' : 1024, - 'K' : 1000, - } - - for part in self.im.platformConf['installer']: - - label, sz = list(part.items())[0] - if type(sz) == dict: - sz, fmt = sz['='], sz.get('format', 'ext4') - else: - fmt = 'ext4' - - cnt = None - for ul, ub in UNITS.items(): - if sz.endswith(ul): - cnt = _u2s(int(sz[:-len(ul)], 10), ub) - break - if sz == '100%': - cnt = self.partedDevice.getLength() - self.nextBlock - if cnt is None: - self.log.error("invalid size (no units) for %s: %s", - part, sz) - return 1 - - start = self.nextBlock - end = start + cnt - 1 - if end <= self.partedDevice.getLength(): - self.log.info("Allocating %d sectors for %s", - cnt, label) - else: - self.log.warn("%s: start sector %d, end sector %d, max %d", - label, start, end, - self.partedDevice.getLength()) - self.log.error("invalid partition %s [%s] (too big)", - label, sz) - return 1 - - geom = parted.Geometry(device=self.partedDevice, - start=start, length=end-start+1) - fs = parted.FileSystem(type=fmt, geometry=geom) - part = parted.Partition(disk=self.partedDisk, - type=parted.PARTITION_NORMAL, - fs=fs, - geometry=geom) - part.getPedPartition().set_name(label) - self.partedDisk.addPartition(part, constraint=constraint) - self.partedDisk.commit() - - self.log.info("Formatting %s (%s) as %s", - part.path, label, fmt) - if fmt == 'msdos': - cmd = ('mkdosfs', '-n', label, part.path,) - else: - cmd = ('mkfs.%s' % fmt, '-L', label, part.path,) - self.check_call(cmd, vmode=self.V1) - - self.nextBlock, self.minpart = end+1, self.minpart+1 - - devices[label] = part.path - - if label == 'ONL-CONFIG' and self.configArchive is not None: - self.restoreConfig(part.path) - - self.blkidParts = BlkidParser(log=self.log.getChild("blkid")) - # re-read the partitions - - return 0 - - def installBootConfig(self): - dev = self.blkidParts['ONL-BOOT'] - self.log.info("Installing boot-config to %s", dev.device) - - src = os.path.join(self.installerConf.installer_dir, 'boot-config') - with MountContext(dev.device, log=self.log) as ctx: - dst = os.path.join(ctx.dir, 'boot-config') - self.copy2(src, dst) - - with open(src) as fd: - ecf = fd.read().encode('base64', 'strict').strip() - setattr(self.grubEnv, 'boot_config_default', ecf) - - return 0 - def installLoader(self): ctx = {} @@ -366,7 +403,7 @@ class GrubInstaller(SubprocessMixin, Base): ctx['initrd'] = initrd['='] if type(initrd) == dict else initrd ctx['args'] = self.im.platformConf['grub']['args'] - ctx['platform'] = self.installerConf.installer_platform + ctx['platform'] = self.im.installerConf.installer_platform ctx['serial'] = self.im.platformConf['grub']['serial'] cf = GRUB_TPL % ctx @@ -375,12 +412,12 @@ class GrubInstaller(SubprocessMixin, Base): dev = self.blkidParts['ONL-BOOT'] with MountContext(dev.device, log=self.log) as ctx: def _cp(b): - src = os.path.join(self.installerConf.installer_dir, b) + src = os.path.join(self.im.installerConf.installer_dir, b) if not os.path.isfile(src): return if b.startswith('kernel-') or b.startswith('onl-loader-initrd-'): dst = os.path.join(ctx.dir, b) self.copy2(src, dst) - [_cp(e) for e in os.listdir(self.installerConf.installer_dir)] + [_cp(e) for e in os.listdir(self.im.installerConf.installer_dir)] d = os.path.join(ctx.dir, "grub") self.makedirs(d) @@ -392,7 +429,7 @@ class GrubInstaller(SubprocessMixin, Base): def installGrub(self): self.log.info("Installing GRUB to %s", self.partedDevice.path) - self.grubEnv.install(self.partedDevice.path) + self.im.grubEnv.install(self.partedDevice.path) return 0 def installGpt(self): @@ -423,14 +460,14 @@ class GrubInstaller(SubprocessMixin, Base): self.log.info("next usable block is %s", self.nextBlock) - code = self.partitionGpt() + code = self.partitionParted() if code: return code # once we assign the ONL-BOOT partition, # we can re-target the grub environment dev = self.blkidParts['ONL-BOOT'] - self.grubEnv.__dict__['bootPart'] = dev.device - self.grubEnv.__dict__['bootDir'] = None + self.im.grubEnv.__dict__['bootPart'] = dev.device + self.im.grubEnv.__dict__['bootDir'] = None code = self.installSwi() if code: return code @@ -466,207 +503,142 @@ class UbootInstaller(SubprocessMixin, Base): class installmeta(Base.installmeta): - device = None uboot = True - loaderBlocks = None - flashBlocks = None - flash2Blocks = None - # block count, or -1 for "rest" - - loaderRaw = True - # true for raw loader partition (FIT image) - - loaderSrc = None - # default loader source file (auto-detect) - - loaderDst = "onl-loader" - # destination path on ONL-BOOT for non-raw installs - - bootConf = None - # optional pre-formatted boot-config contents - # (string or list of strings) - - bootCmd = None - # pre-formatted string - - bootCmds = None - # ... or a list of strings + def getDevice(self): + loader = self.platformConf.get('loader', {}) + dev = loader.get('device', None) + return dev def str_bootcmd(self): - if self.bootCmd is not None: return self.bootCmd - if self.bootCmds: - return "; ".join(self.bootCmds) - raise ValueError("missing boot commands") + cmds = [] + cmds.append("setenv onl_loadaddr 0x%x" + % self.platformConf['loader']['loadaddr']) + cmds.append("setenv onl_platform %s" + % self.installerConf.installer_platform) + itb = self.platformConf['flat_image_tree']['itb'] + if type(itb) == dict: itb = itb['='] + cmds.append("setenv onl_itb %s" % itb) + for item in self.platformConf['loader']['setenv']: + k, v = list(item.items())[0] + cmds.append("setenv %s %s" % (k, v,)) + cmds.extend(self.platformConf['loader']['nos_bootcmds']) + return "; ".join(cmds) def __init__(self, *args, **kwargs): - kwargs = dict(kwargs) - installerConf = kwargs.pop('installerConf', None) - machineConf = kwargs.pop('machineConf', None) - platformConf = kwargs.pop('platformConf', None) - ubootEnv = kwargs.pop('ubootEnv', None) - self.im = self.installmeta(installerConf=installerConf, - machineConf=machineConf, - platformConf=platormConf, - ubootEnv=ubootEnv) - Base.__init__(self, *args, - machineConf=machineConf, installerConf=installerConf, platformConf=platformConf, - ubootEnv=ubootEnv, - **kwargs) + Base.__init__(self, *args, **kwargs) - # XXX roth - self.onlBootDev = None - self.onlConfigDev = None - self.onlDataDev = None + self.device = self.im.getDevice() - def formatBlockdev(self): + self.rawLoaderDevice = None + # set to a partition device for raw loader install, + # default to None for FS-based install - if self.im.loaderBlocks < 0: - self.log.error("no size defined for ONL-BOOT") - return 1 - if self.im.flashBlocks < 0: - self.log.error("no size defined for FLASH") - return 1 + def maybeCreateLabel(self): + """Set up an msdos label.""" - self.log.info("Formatting %s as %d:%d:%d", - self.im.device, - self.im.loaderBlocks, - self.im.flashBlocks, - self.im.flash2Blocks) + self.partedDevice = parted.getDevice(self.device) + try: + self.partedDisk = parted.newDisk(self.partedDevice) + if self.partedDisk.type == 'msdos': + self.log.info("disk %s is already msdos", self.device) + return 0 + self.log.warn("disk %s has wrong label %s", + self.device, self.partedDisk.type) + except parted._ped.PartedException as ex: + self.log.error("cannot get partition table from %s: %s", + self.device, str(ex)) - self.check_call(('parted', '-s', self.im.device, - 'mklabel', 'msdos',)) + self.log.info("creating msdos label on %s") + self.partedDisk = parted.freshDisk(self.partedDevice, 'msdos') - start = 1 - end = start + self.im.loaderBlocks-1 + return 0 - self.check_call(('parted', '-s', self.im.device, - 'unit', 's', - 'mkpart', 'primary', 'fat32', str(start)+'s', str(end)+'s',)) + def findMsdos(self): + """Backup any existing data. - self.onlBootDev = self.im.device + '1' - if not self.im.loaderRaw: - cmd = ('mkdosfs', '-n', 'ONL-BOOT', self.onlBootDev,) - self.check_call(cmd, vmode=self.V1) + The GPT version of this function is more tricky since it needs + to save some of the partitions. Here with and msdos label that + is on a different block device from u-boot or ONIE, we don't + really care. + """ - start = end + 1 - end = start + self.im.flashBlocks-1 + # optionally back up a config partition + # if it's on the boot device + for part in self.blkidParts: + dev, partno = part.splitDev() + if dev == self.device and part.label == 'ONL-CONFIG': + self.backupConfig(part.device) - self.check_call(('parted', '-s', self.im.device, - 'unit', 's', - 'mkpart', 'primary', 'fat32', str(start)+'s', str(end)+'s',)) - - self.onlConfigDev = self.im.device + '2' - cmd = ('mkdosfs', '-n', 'FLASH', self.onlConfigDev,) - self.check_call(cmd, vmode=self.V1) - - start = end + 1 - if self.im.flash2Blocks > -1: - end = start + self.im.flash2Blocks-1 - self.check_call(('parted', '-s', self.im.device, - 'unit', 's', - 'mkpart', 'primary', 'fat32', str(start)+'s', str(end)+'s',)) - else: - self.check_call(('parted', '-s', self.im.device, - 'unit', 's', - 'mkpart', 'primary', 'fat32', str(start)+'s', '100%',)) - - self.onlDataDev = self.im.device + '3' - cmd = ('mkdosfs', '-n', 'FLASH2', self.onlDataDev,) - self.check_call(cmd, vmode=self.V1) + self.minPart = -1 + # default, delete all partitions + # XXX roth -- tweak this if we intent to save e.g. + # a diag partition from the vendor return 0 def installLoader(self): loaderSrc = None - for cand in (("%s/%s.itb" - % (self.installerConf.installer_dir, - self.installerConf.installer_platform,)), - os.path.join(self.installerConf.installer_dir, 'powerpc-fit-all.itb'), - self.im.loaderSrc, - ("%s/onl.%s.loader" - % (self.installerConf.installer_dir, - self.installerConf.installer_platform,))): - if os.path.exists(cand): - loaderSrc = cand + c1 = self.im.platformConf['flat_image_tree'].get('itb', None) + if type(c1) == dict: c1 = c1.get('=', None) + c2 = ("%s.itb" + % (self.im.installerConf.installer_platform,)) + c3 = "onl-loader-fit.itb" + + loaderSrc = None + for c in (c1, c2, c3): + if c is None: continue + p = os.path.join(self.im.installerConf.installer_dir, c) + if os.path.exists(p): + loaderSrc = p break + if not loaderSrc: self.log.error("The platform loader file is missing.") - self.log.error("This is unexpected - %s", loaderSrc) return 1 - self.log.info("Installing the ONL loader...") + self.log.info("Installing the ONL loader from %s...", loaderSrc) - if self.im.loaderRaw: + if self.rawLoaderDevice is not None: + self.log.info("Installing ONL loader %s --> %s...", + loaderSrc, self.rawLoaderDevice) cmd = ('dd', 'if=' + loaderSrc, - 'of=' + self.onlBootDev,) + 'of=' + self.rawLoaderDevice,) self.check_call(cmd, vmode=self.V2) else: - with MountContext(self.onlBootDev, log=self.log) as ctx: - dst = os.path.join(ctx, self.im.loaderDst) + dev = self.blkidParts['ONL-BOOT'] + basename = os.path.split(loaderSrc)[1] + self.log.info("Installing ONL loader %s --> %s:%s...", + loaderSrc, dev.device, basename) + with MountContext(dev.device, log=self.log) as ctx: + dst = os.path.join(ctx.dir, basename) self.copy2(loaderSrc, dst) return 0 - def installBootconfig(self): - - cf = None - - p = os.path.join(self.installerConf.installer_dir, 'boot-config') - if cf is None and os.path.exists(p): - cf = open(p, "r").read() - - p = os.path.join(self.installerConf.installer_platform_dir, 'boot-config') - if cf is None and os.path.exists(p): - cf = open(p, "r").read() - - if cf is None and self.im.bootConf: - if isinstance(self.im.bootConf, basestring): - cf = self.im.bootConf - else: - cf = "\n".join(cf) + "\n" - - if cf is None: - buf = StringIO.StringIO() - buf.write("SWI=images:onl-%s.swi\n" - % (self.platformConf.installer_arch,)) - buf.write("NETDEV=ma1\n") - cf = buf.getvalue() - - self.log.info("Writing boot-config.") - with MountContext(self.onlConfigDev, log=self.log) as ctx: - dst = os.path.join(ctx.dir, "boot-config") - with open(dst, "w") as fd: - fd.write(cf) - - ecf = cf.encode('base64', 'strict').strip() - setattr(self.ubootEnv, 'boot-config-default', ecf) - - return 0 - def installUbootEnv(self): # Special access instructions for initrd - off = getattr(self.installerConf, 'initrd_offset', None) + off = getattr(self.im.installerConf, 'initrd_offset', None) if off is not None: - if self.im.loaderRaw: - a = self.onlBootDev + if self.rawLoaderDevice is not None: + a = self.rawLoaderDevice else: - a = self.installerConf.initrd_archive - s = int(self.installerConf.initrd_offset) - e = s + int(self.installerConf.initrd_size) - 1 - self.ubootEnv.onl_installer_initrd = ("%s:%x:%x" % (a, s, e,)) + a = self.im.installerConf.initrd_archive + s = int(self.im.installerConf.initrd_offset) + e = s + int(self.im.installerConf.initrd_size) - 1 + self.im.ubootEnv.onl_installer_initrd = ("%s:%x:%x" % (a, s, e,)) else: try: - del self.installerConf.onl_installer_initrd + del self.im.installerConf.onl_installer_initrd except AttributeError: pass if self.im.isOnie(): self.log.info("Setting ONIE nos_bootcmd to boot ONL") - self.ubootEnv.nos_bootcmd = self.im.str_bootcmd() + self.im.ubootEnv.nos_bootcmd = self.im.str_bootcmd() else: self.log.warn("U-boot boot setting is not changed") @@ -674,23 +646,66 @@ class UbootInstaller(SubprocessMixin, Base): def installUboot(self): - st = os.stat(self.im.device) + if self.device is None: + self.log.error("missing block device YAML config") + return 1 + st = os.stat(self.device) if not stat.S_ISBLK(st[stat.ST_MODE]): - self.log.error("not a block device: %s", - self.im.device) + self.log.error("not a block device: %s", self.device) return 1 - code = self.formatBlockdev() + code = self.maybeCreateLabel() + if code: return code + + self.log.info("Installing to %s", self.device) + + if self.partedDisk.type != 'msdos': + self.log.error("not an MSDOS partition table") + return 1 + if self.partedDevice.sectorSize != 512: + self.log.error("invalid logical block size") + return 1 + if self.partedDevice.physicalSectorSize != 512: + self.log.error("invalid physical block size") + return 1 + + self.log.info("found a disk with %d blocks", + self.partedDevice.getLength()) + + code = self.findMsdos() + if code: return code + + code = self.deletePartitions() + if code: return code + + self.log.info("next usable block is %s", self.nextBlock) + + code = self.partitionParted() + if code: return code + + # compute the path to the raw loader partition, + # if indicated by the configuration + + self.rawLoaderDevice = None + for item in self.im.platformConf['installer']: + partIdx, partData = list(item.items())[0] + label, part = list(partData.items())[0] + if label == 'ONL-BOOT' and part['format'] == 'raw': + self.rawLoaderDevice = self.device + str(partIdx+1) + break + + code = self.installSwi() if code: return code code = self.installLoader() if code: return code - code = self.installBootconfig() - if code: return code - - code = self.installSwi() - if code: return code + if self.rawLoaderDevice is None: + code = self.installBootConfig() + if code: return code + else: + self.log.info("ONL-BOOT is a raw partition (%s), skipping boot-config", + self.rawLoaderDevice) self.log.info("syncing block devices") self.check_call(('sync',)) @@ -702,6 +717,11 @@ class UbootInstaller(SubprocessMixin, Base): return 0 def run(self): + + if 'flat_image_tree' not in self.im.platformConf: + self.log.error("platform config is missing a FIT section") + return 1 + return self.installUboot() def shutdown(self): From 0cf41fd6d9b1917196437a20ab2e6ed9022950ab Mon Sep 17 00:00:00 2001 From: "Carl D. Roth" Date: Fri, 6 May 2016 11:27:26 -0700 Subject: [PATCH 33/62] Re-write shell functions to use OnlPlatform data --- .../src/python/onl/install/ShellApp.py | 242 +++++++++++------- 1 file changed, 147 insertions(+), 95 deletions(-) diff --git a/packages/base/all/vendor-config-onl/src/python/onl/install/ShellApp.py b/packages/base/all/vendor-config-onl/src/python/onl/install/ShellApp.py index add79f67..c0ff2fa2 100644 --- a/packages/base/all/vendor-config-onl/src/python/onl/install/ShellApp.py +++ b/packages/base/all/vendor-config-onl/src/python/onl/install/ShellApp.py @@ -12,8 +12,11 @@ import struct from InstallUtils import InitrdContext, MountContext from InstallUtils import SubprocessMixin from InstallUtils import ProcMountsParser, ProcMtdParser +from InstallUtils import BlkidParser import Fit +import onl.platform.current + class AppBase(SubprocessMixin): @property @@ -42,7 +45,7 @@ class AppBase(SubprocessMixin): pass return 0 - def _runMtdShell(self, device): + def _runFitShell(self, device): self.log.debug("parsing FIT image in %s", device) p = Fit.Parser(path=device, log=self.log) node = p.getInitrdNode() @@ -111,56 +114,66 @@ class Onie(AppBase): def run(self): + self.pm = ProcMountsParser() + self.blkid = BlkidParser(log=self.log.getChild("blkid")) + self.mtd = ProcMtdParser(log=self.log.getChild("mtd")) + def _g(d): pat = os.path.join(d, "onie/initrd.img*") l = glob.glob(pat) if l: return l[0] return None - # try to find onie initrd on a mounted fs (GRUB) - initrd = _g("/mnt/onie-boot") - if initrd is not None: - self.log.debug("found ONIE initrd at %s", initrd) - return self._runInitrdShell(initrd) - - # try to find the onie boot partition elsewhere - pm = ProcMountsParser() + # try to find a mounted, labeled partition try: - dev = self.check_output(('blkid', '-L', 'ONIE-BOOT',)).strip() - except subprocess.CalledProcessError, what: + dev = self.blkid['ONIE-BOOT'].device + except IndexError: dev = None if dev is not None: self.log.debug("found ONIE boot device %s", dev) - parts = [p for p in pm.mounts if p.device == dev] + + parts = [p for p in self.pm.mounts if p.device == dev] if parts: onieDir = parts[0] self.log.debug("found ONIE boot mounted at %s", onieDir) initrd = _g(onieDir) - if initrd is not None: + if initrd is None: + self.log.warn("cannot find ONIE initrd on %s", onieDir) + else: self.log.debug("found ONIE initrd at %s", initrd) return _runInitrdShell(initrd) + + with MountContext(dev, log=self.log) as ctx: + initrd = _g(ctx.dir) + if initrd is None: + self.log.warn("cannot find ONIE initrd on %s", dev) else: - self.log.error("cannot find ONIE initrd") - return 1 + self.log.debug("found ONIE initrd at %s", initrd) + return self._runInitrdShell(initrd) + + self.log.warn("cannot find an ONIE initrd") + return 1 + + # try to find onie initrd on a mounted fs (GRUB); + # for ONIE images this is usually /mnt/onie-boot + for part in self.pm.mounts: + if not part.device.startswith('/dev/'): continue + initrd = _g(part.dir) + if initrd is None: + self.log.debug("cannot find ONIE initrd on %s (%s)", + part.device, part.dir) else: - with MountContext(dev, fsType='ext4', log=self.log) as ctx: - initrd = _g(ctx.dir) - if initrd is not None: - self.log.debug("found ONIE initrd at %s", initrd) - return self._runInitrdShell(initrd) - else: - self.log.error("cannot find ONIE initrd") - return 1 + self.log.debug("found ONIE initrd at %s", initrd) + return self._runInitrdShell(initrd) # grovel through MTD devices (u-boot) - pm = ProcMtdParser(log=self.log) - parts = [p for p in pm.parts if p.label == "onie"] + parts = [p for p in self.mtd.parts if p.label == "onie"] if parts: part = parts[0] self.log.debug("found ONIE MTD device %s", part.charDevice or part.blockDevice) - return self._runMtdShell(part.blockDevice) - elif pm.parts: + return self._runFitShell(part.blockDevice) + elif self.mtd.mounts: self.log.error("cannot find ONIE MTD device") return 1 @@ -171,78 +184,117 @@ class Loader(AppBase): PROG = "loader-shell" - def run(self): + def runGrub(self): - def _g(d): - pat = os.path.join(d, "initrd-*") - l = glob.glob(pat) - if l: return l[0] - return None - - # try to find the loader boot partition as a formatted block device - pm = ProcMountsParser() try: - dev = self.check_output(('blkid', '-L', 'SL-BOOT',)).strip() - except subprocess.CalledProcessError, what: - dev = None - if dev is not None: - self.log.debug("found loader device %s", dev) - parts = [p for p in pm.mounts if p.device == dev] - if parts: - loaderDir = parts[0] - self.log.debug("found loader device mounted at %s", loaderDir) - initrd = _g(loaderDir) - if initrd is not None: - self.log.debug("found loader initrd at %s", initrd) - return _runInitrdShell(initrd) - else: - self.log.error("cannot find loader initrd") - return 1 - else: - with MountContext(dev, fsType='ext4', log=self.log) as ctx: - initrd = _g(ctx.dir) - if initrd is not None: - self.log.debug("found loader initrd at %s", initrd) - return self._runInitrdShell(initrd) - else: - self.log.error("cannot find loader initrd") - return 1 - - # try to find the loader partition on the same desk as /mnt/flash - try: - flashDev = self.check_output(('blkid', '-L', 'FLASH',)).strip() - except subprocess.CalledProcessError, what: - flashDev = None - if flashDev is not None: - self.log.debug("found flash device hint %s", flashDev) - loaderDev = flashDev - while loaderDev and loaderDev[-1] in string.digits: - loaderDev = loaderDev[:-1] - loaderDev = loaderDev + '1' - with open(loaderDev) as fd: - buf = fd.read(4) - magic = struct.unpack(">I", buf)[0] - if magic == Fit.Parser.FDT_MAGIC: - self.log.debug("found loader device %s", loaderDev) - return self._runMtdShell(loaderDev) - else: - self.log.error("bad FDT signature on %s %x", - loaderDev, magic) - return 1 - - # grovel through MTD devices (u-boot) - pm = ProcMtdParser(log=self.log) - parts = [p for p in pm.parts if p.label == "sl-boot"] - if parts: - part = parts[0] - self.log.debug("found loader MTD device %s", - part.charDevice or part.blockDevice) - return self._runMtdShell(part.blockDevice) - elif pm.parts: - self.log.error("cannot find loader MTD device") + dev = self.blkid['ONL-BOOT'].device + except KeyError: + pass + if dev is None: + self.log.error("cannot find GRUB partition %s", dev) return 1 - self.log.error("cannot find loader initrd") + initrd = self.pc['grub']['initrd'] + if type(initrd) == dict: initrd = initrd['='] + + parts = [p for p in self.pm.mounts if p.device == dev] + if parts: + grubDir = parts[0] + self.log.debug("found loader device %s mounted at %s", + dev, grubDir) + p = os.path.join(grubDir, initrd) + if not os.path.exists(p): + self.log.error("cannot find initrd %s", p) + return 1 + self.log.debug("found loader initrd at %s", p) + return self._runInitrdShell(p) + + with MountContext(dev, log=self.log) as ctx: + p = os.path.join(ctx.dir, initrd) + if not os.path.exists(p): + self.log.error("cannot find initrd %s:%s", dev, p) + return 1 + self.log.debug("found loader initrd at %s:%s", dev, p) + return self._runInitrdShell(p) + + def runUboot(self): + + dev = self.pc['loader']['device'] + self.log.info("found loader device %s", dev) + + parts = self.pc['installer'] + bootPart = None + bootPartno = None + for idx, part in enumerate(self.pc['installer']): + label, pdata = list(part.items())[0] + if label == 'ONL-BOOT': + bootPart = pdata + bootPartno = idx + 1 + break + if bootPart is None: + self.log.info("cannot find ONL-BOOT declaration") + return 1 + + fmt = bootPart.get('format', 'ext2') + if fmt == 'raw': + bootDevice = dev + str(bootPartno) + else: + bootDevice = self.blkid['ONL-BOOT'].device + + # run from a raw partition + if fmt == 'raw': + self.log.info("found (raw) boot partition %s", bootDevice) + return self._runFitShell(bootDevice) + + l = [] + + p = self.pc['flat_image_tree']['itb'] + if type(p) == dict: p = p['='] + if p not in l: l.append(p) + + p = self.platform.platform() + '.itb' + if p not in l: l.append(p) + + p = 'onl-loader-fit.itb' + if p not in l: l.append(p) + + self.log.info("looking for loader images %s", ", ".join(l)) + + # run from a file in a mounted filesystem + parts = [p for p in self.pm.mounts if p.device == bootDevice] + if parts: + loaderDir = parts[0] + self.log.debug("found loader device mounted at %s", loaderDir) + for e in l: + p = os.path.join(loaderDir, e) + if os.path.exists(p): return self._runFitShell(p) + self.log.error("cannot find an ITB") + return 1 + + # run from a file in an umounted filesystem + with MountContext(bootDevice, log=self.log) as ctx: + self.log.info("found (%s) loader device %s", fmt, bootDevice) + for e in l: + p = os.path.join(ctx.dir, e) + if os.path.exists(p): return self._runFitShell(p) + self.log.error("cannot find an ITB") + return 1 + + def run(self): + + self.platform = onl.platform.current.OnlPlatform() + self.pc = self.platform.platform_config + + self.pm = ProcMountsParser() + self.blkid = BlkidParser(log=self.log.getChild("blkid")) + + if 'grub' in self.pc: + return self.runGrub() + + if 'flat_image_tree' in self.pc: + return self.runUboot() + + self.log.error("invalid platform-config") return 1 main = Onie.main From 385e78d350db02ecc184d963066b9c5f240921c5 Mon Sep 17 00:00:00 2001 From: "Carl D. Roth" Date: Fri, 6 May 2016 11:31:18 -0700 Subject: [PATCH 34/62] Added powerpc installer build --- builds/powerpc/installer/new-hotness/Makefile | 1 + builds/powerpc/installer/new-hotness/PKG.yml | 2 + .../installer/new-hotness/builds/.gitignore | 1 + .../installer/new-hotness/builds/Makefile | 109 ++++++++++++++++++ .../installer/new-hotness/builds/boot-config | 4 + 5 files changed, 117 insertions(+) create mode 100644 builds/powerpc/installer/new-hotness/Makefile create mode 100644 builds/powerpc/installer/new-hotness/PKG.yml create mode 100644 builds/powerpc/installer/new-hotness/builds/.gitignore create mode 100644 builds/powerpc/installer/new-hotness/builds/Makefile create mode 100644 builds/powerpc/installer/new-hotness/builds/boot-config diff --git a/builds/powerpc/installer/new-hotness/Makefile b/builds/powerpc/installer/new-hotness/Makefile new file mode 100644 index 00000000..003238cf --- /dev/null +++ b/builds/powerpc/installer/new-hotness/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/builds/powerpc/installer/new-hotness/PKG.yml b/builds/powerpc/installer/new-hotness/PKG.yml new file mode 100644 index 00000000..c7c734e7 --- /dev/null +++ b/builds/powerpc/installer/new-hotness/PKG.yml @@ -0,0 +1,2 @@ +!include $ONL/builds/any/installer/new-hotness/APKG.yml ARCH=powerpc + diff --git a/builds/powerpc/installer/new-hotness/builds/.gitignore b/builds/powerpc/installer/new-hotness/builds/.gitignore new file mode 100644 index 00000000..fbd18542 --- /dev/null +++ b/builds/powerpc/installer/new-hotness/builds/.gitignore @@ -0,0 +1 @@ +*INSTALLER diff --git a/builds/powerpc/installer/new-hotness/builds/Makefile b/builds/powerpc/installer/new-hotness/builds/Makefile new file mode 100644 index 00000000..5b24ae41 --- /dev/null +++ b/builds/powerpc/installer/new-hotness/builds/Makefile @@ -0,0 +1,109 @@ +include $(ONL)/make/config.powerpc.mk + +ONLPLATFORM = python $(ONL)/tools/onlplatform.py +PLATFORMS := $(shell $(ONLPM) --platform-manifest onl-loader-initrd:$(ARCH)) + +MKSHAR = $(ONL)/tools/mkshar +MKSHAR_OPTS = --lazy --unzip-pad --fixup-perms autoperms.sh +MKSHAR_PERMS = autoperms.sh + +VONLDIR = $(ONL)/packages/base/all/vendor-config-onl +PYFIT = $(VONLDIR)/src/bin/pyfit +PYFIT_ENVIRONMENT = PYTHONPATH=$(VONLDIR)/src/python + +# Hardcoded to match ONL File naming conventions. +include $(ONL)/make/version-onl.mk +INSTALLER_NAME=$(FNAME_PRODUCT_VERSION)_ONL-OS_$(FNAME_BUILD_ID)_$(UARCH)_INSTALLER + +# default fit image can be used as the canonical location for the initrd +FIT_IMAGE_ALL := $(shell $(ONLPM) --find-file onl-loader-fit:$(ARCH) onl-loader-fit.itb) +INITRD := $(shell $(ONLPM) --find-file onl-loader-initrd:$(ARCH) onl-loader-initrd-$(ARCH).cpio.gz) +INITRD_BOUNDS := $(shell $(PYFIT_ENVIRONMENT) $(PYFIT) -v offset $(FIT_IMAGE_ALL) --initrd) + +__installer: installer.sh __installer_fit_files __installer_platform_files __installer_swi_files + $(ONL_V_at)rm -rf *INSTALLER* *.md5sum + $(ONL_V_at)cp /dev/null $(MKSHAR_PERMS) + $(ONL_V_at)cp $(ONL)/make/version-onl.sh . + $(ONL_V_at)echo "#!/bin/sh" >> $(MKSHAR_PERMS) + $(ONL_V_at)echo "set -e" >> $(MKSHAR_PERMS) + $(ONL_V_at)echo "set -x" >> $(MKSHAR_PERMS) + $(MKSHAR) $(MKSHAR_OPTS) "$(INSTALLER_NAME)" $(ONL)/tools/scripts/sfx.sh.in installer.sh *.swi *.itb version-onl.sh boot-config + $(ONL_V_at)rm -rf installer.sh *.itb *.swi version-onl.sh autoperms.sh + md5sum "$(INSTALLER_NAME)" | awk '{ print $$1 }' > "$(INSTALLER_NAME).md5sum" + +installer.sh: Makefile $(ONL)/builds/any/installer/new-hotness/installer.sh.in + $(ONL_V_GEN)cp /dev/null $@ + $(ONL_V_at): ;\ + set -e ;\ + if $(ONL_V_P); then set -x; fi ;\ + if test "$(INITRD_BOUNDS)"; then \ + a="$(FIT_IMAGE_ALL)"; a=$${a##*/} ;\ + else \ + a="$(INITRD)"; i=$${a##*/} ;\ + fi ;\ + set dummy $(INITRD_BOUNDS); start=$$2; end=$$3; sz=$$(($$end - $$start + 1)) ;\ + sed \ + -e 's^@ONLVERSION@^$(VERSION_STRING)^g' \ + -e "s^@INITRD_ARCHIVE@^$${a}^g" \ + -e "s^@INITRD_OFFSET@^$$start^g" \ + -e "s^@INITRD_SIZE@^$$sz^g" \ + -e 's^@ARCH@^ppc^g' \ + $(ONL)/builds/any/installer/new-hotness/installer.sh.in \ + >> $@ + $(ONL_V_at)echo "PAYLOAD_FOLLOWS" >> $@ + +__installer_fit_files: + $(ONL_V_GEN): ;\ + set -e ;\ + if $(ONL_V_P); then set -x; fi ;\ + src=$(FIT_IMAGE_ALL) ;\ + dst=$${src##*/} ;\ + if test "$$dst" -nt Makefile; then \ + : ;\ + else \ + echo "Staging $$dst" ;\ + cp $$src $$dst ;\ + fi ;\ + : + +############################## +# +# optionally include custom itb files for each platform +# +############################## + +__installer_platform_files: + $(ONL_V_GEN): ;\ + set -e ;\ + if $(ONL_V_P); then set -x; fi ;\ + l="$(PLATFORMS)"; for p in $$l; do \ + echo "Looking for an ITB specific to $$p, ignore errors..." ;\ + src=$$($(ONLPLATFORM) $$p $(ARCH) itb) 2>/dev/null || : ;\ + if test "$$src"; then :; else continue; fi ;\ + dst=$${src##*/} ;\ + echo "Found $$dst" ;\ + if test "$$dst" -nt Makefile; then continue; fi ;\ + echo "Staging $$dst for $$p" ;\ + cp "$$src" "$$dst" ;\ + done ;\ + : + +__installer_swi_files: +ifndef NO_SWI + $(ONL_V_GEN): ;\ + set -e ;\ + if $(ONL_V_P); then set -x; fi ;\ + swidir=$$(mktemp -d $(PWD)/swi-d-XXXXXX) ;\ + $(ONLPM) --extract-dir onl-swi:$(ARCH) $$swidir ;\ + mv $$swidir/usr/share/onl/packages/$(ARCH)/onl-swi/*.swi . ;\ + rm -fr $$swidir ;\ + : +else + $(ONL_V_GEN): +endif + +shar installer: installer + +clean: + rm -f *.swi *.installer *.cpio.gz + diff --git a/builds/powerpc/installer/new-hotness/builds/boot-config b/builds/powerpc/installer/new-hotness/builds/boot-config new file mode 100644 index 00000000..40fb0d31 --- /dev/null +++ b/builds/powerpc/installer/new-hotness/builds/boot-config @@ -0,0 +1,4 @@ +NETDEV=ma1 +NETAUTO=dhcp +BOOTMODE=SWI +SWI=images::latest From 7a1a873985f3181b3751dec51281b6917bcac634 Mon Sep 17 00:00:00 2001 From: "Carl D. Roth" Date: Fri, 6 May 2016 16:37:10 -0700 Subject: [PATCH 35/62] Fixed whitespace in command args --- tools/onlpm.py | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/tools/onlpm.py b/tools/onlpm.py index 62ef67bc..ef893912 100755 --- a/tools/onlpm.py +++ b/tools/onlpm.py @@ -366,12 +366,12 @@ class OnlPackage(object): if 'init' in self.pkg: if not os.path.exists(self.pkg['init']): raise OnlPackageError("Init script '%s' does not exist." % self.pkg['init']) - command = command + "--deb-init %s" % self.pkg['init'] + command = command + "--deb-init %s " % self.pkg['init'] if 'post-install' in self.pkg: if not os.path.exists(self.pkg['post-install']): raise OnlPackageError("Post-install script '%s' does not exist." % self.pkg['post-install']) - command = command + "--after-install %s" % self.pkg['post-install'] + command = command + "--after-install %s " % self.pkg['post-install'] if logger.level < logging.INFO: command = command + "--verbose " From f38e167b77fedd25ff153caf1b6c1a1033726754 Mon Sep 17 00:00:00 2001 From: "Carl D. Roth" Date: Fri, 6 May 2016 16:37:25 -0700 Subject: [PATCH 36/62] Remove deprecated files --- .../builds/patches/python-pyblkid.Config.in | 6 --- .../builds/patches/python-pyblkid.mk | 41 ------------------- 2 files changed, 47 deletions(-) delete mode 100644 packages/base/any/initrds/buildroot/builds/patches/python-pyblkid.Config.in delete mode 100644 packages/base/any/initrds/buildroot/builds/patches/python-pyblkid.mk diff --git a/packages/base/any/initrds/buildroot/builds/patches/python-pyblkid.Config.in b/packages/base/any/initrds/buildroot/builds/patches/python-pyblkid.Config.in deleted file mode 100644 index 6207230a..00000000 --- a/packages/base/any/initrds/buildroot/builds/patches/python-pyblkid.Config.in +++ /dev/null @@ -1,6 +0,0 @@ -config BR2_PACKAGE_PYTHON_PYBLKID - bool "python-pyblkid" - depends on BR2_PACKAGE_PYTHON - depends on BR2_PACKAGE_UTIL_LINUX - help - Include the 'pyblkid' Python library diff --git a/packages/base/any/initrds/buildroot/builds/patches/python-pyblkid.mk b/packages/base/any/initrds/buildroot/builds/patches/python-pyblkid.mk deleted file mode 100644 index 8299426b..00000000 --- a/packages/base/any/initrds/buildroot/builds/patches/python-pyblkid.mk +++ /dev/null @@ -1,41 +0,0 @@ -###################################################################### -## -## python-pyblkid.mk -## -###################################################################### - -PYTHON_PYBLKID_VERSION = 0.0.1 -PYTHON_PYBLKID_SOURCE = pyblkid-$(PYTHON_PYBLKID_VERSION).tar.bz2 -PYTHON_PYBLKID_INSTALL_STAGING = NO -PYTHON_PYBLKID_INSTALL_TARGET = YES -PYTHON_PYBLKID_LICENSE = GPL -PYTHON_PYBLKID_LICENSE_FILES = COPYING - -PYTHON_PYBLKID_DEPENDENCIES = python util-linux - -PYTHON_PYBLKID_INCLUDES = \ - --include-dirs $(STAGING_DIR)/usr/include:$(STAGING_DIR)/usr/include/python$(PYTHON_VERSION_MAJOR) \ - # THIS LINE INTENTIONALLY LEFT BLANK - -PYTHON_PYBLKID_LIBDIRS = \ - --library-dirs $(STAGING_DIR)/usr/lib \ - # THIS LINE INTENTIONALLY LEFT BLANK - -# see python-mad.mk -PYTHON_PYBLKID_ENVIRONMENT = \ - CC="$(TARGET_CC)" \ - CFLAGS="$(TARGET_CFLAGS)" \ - LDSHARED="$(TARGET_CC) -shared" \ - LDFLAGS="$(TARGET_LDFLAGS)" \ - # THIS LINE INTENTIONALLY LEFT BLANK - -define PYTHON_PYBLKID_BUILD_CMDS - (cd $(@D); $(HOST_DIR)/usr/bin/python setup.py build_py) - (cd $(@D); $(PYTHON_PYBLKID_ENVIRONMENT) $(HOST_DIR)/usr/bin/python setup.py build_ext $(PYTHON_PYBLKID_INCLUDES) $(PYTHON_PYBLKID_LIBDIRS)) -endef - -define PYTHON_PYBLKID_INSTALL_TARGET_CMDS - (cd $(@D); $(HOST_DIR)/usr/bin/python setup.py install --prefix=$(TARGET_DIR)/usr --install-scripts=$(TARGET_DIR)/usr/bin) -endef - -$(eval $(generic-package)) From 90990441208597201d2963530b80380bf740b773 Mon Sep 17 00:00:00 2001 From: "Carl D. Roth" Date: Fri, 6 May 2016 16:38:52 -0700 Subject: [PATCH 37/62] Refactor rules for installer --- .../installer/new-hotness/builds/Makefile | 87 +------------- .../new-hotness/grub/builds/Makefile | 94 +++++++++++++++ .../new-hotness/uboot/builds/Makefile | 111 ++++++++++++++++++ .../installer/new-hotness/builds/Makefile | 109 +---------------- 4 files changed, 207 insertions(+), 194 deletions(-) create mode 100644 builds/any/installer/new-hotness/grub/builds/Makefile create mode 100644 builds/any/installer/new-hotness/uboot/builds/Makefile diff --git a/builds/amd64/installer/new-hotness/builds/Makefile b/builds/amd64/installer/new-hotness/builds/Makefile index c3e85267..065c502a 100644 --- a/builds/amd64/installer/new-hotness/builds/Makefile +++ b/builds/amd64/installer/new-hotness/builds/Makefile @@ -1,87 +1,2 @@ include $(ONL)/make/config.amd64.mk - -ONLPLATFORM = python $(ONL)/tools/onlplatform.py -PLATFORMS := $(shell $(ONLPM) --platform-manifest onl-loader-initrd:$(ARCH)) - -MKSHAR = $(ONL)/tools/mkshar -MKSHAR_OPTS = --lazy --unzip-pad --fixup-perms autoperms.sh -MKSHAR_PERMS = autoperms.sh - -# Hardcoded to match ONL File naming conventions. -include $(ONL)/make/version-onl.mk -INSTALLER_NAME=$(FNAME_PRODUCT_VERSION)_ONL-OS_$(FNAME_BUILD_ID)_$(UARCH)_INSTALLER - - -__installer: __installer_platform_files __installer_swi_files - $(ONL_V_at)rm -rf *INSTALLER* *.md5sum - $(ONL_V_at)cp /dev/null installer.sh - $(ONL_V_at): ;\ - set -e ;\ - if $(ONL_V_P); then set -x; fi ;\ - set dummy *.cpio.gz; initrd="$$2" ;\ - sed \ - -e 's^@ONLVERSION@^$(VERSION_STRING)^g' \ - -e "s^@INITRD_ARCHIVE@^$$initrd^g" \ - -e 's^@INITRD_OFFSET@^^g' \ - -e 's^@INITRD_SIZE@^^g' \ - -e 's^@ARCH@^x86_64^g' \ - $(ONL)/builds/any/installer/new-hotness/installer.sh.in \ - >> installer.sh - $(ONL_V_at)echo "PAYLOAD_FOLLOWS" >> installer.sh - $(ONL_V_at)cp /dev/null $(MKSHAR_PERMS) - $(ONL_V_at)cp $(ONL)/make/version-onl.sh . - $(ONL_V_at)echo "#!/bin/sh" >> $(MKSHAR_PERMS) - $(ONL_V_at)echo "set -e" >> $(MKSHAR_PERMS) - $(ONL_V_at)echo "set -x" >> $(MKSHAR_PERMS) - $(MKSHAR) $(MKSHAR_OPTS) "$(INSTALLER_NAME)" $(ONL)/tools/scripts/sfx.sh.in installer.sh kernel-* onl-loader-initrd-* *.swi version-onl.sh boot-config - $(ONL_V_at)rm -rf installer.sh kernel-* onl-loader-initrd-* $(ZTN_MANIFEST) *.swi version-onl.sh autoperms.sh - md5sum "$(INSTALLER_NAME)" | awk '{ print $$1 }' > "$(INSTALLER_NAME).md5sum" - -__installer_platform_files: - $(ONL_V_GEN): ;\ - set -e ;\ - if $(ONL_V_P); then set -x; fi ;\ - l="$(PLATFORMS)"; for p in $$l; do \ - src=$$($(ONLPLATFORM) $$p $(ARCH) kernel 2>/dev/null) || : ;\ - if test "$$src"; then \ - dst=$${src##*/} ;\ - if test "$dst" -ot Makefile; then \ - : ;\ - else \ - echo "Staging $$dst for $$p" ;\ - cp "$$src" "$$dst" ;\ - fi ;\ - fi ;\ - src=$$($(ONLPLATFORM) $$p $(ARCH) initrd 2>/dev/null) || : ;\ - if test "$$src"; then \ - dst=$${src##*/} ;\ - if test "$dst" -ot Makefile; then \ - : ;\ - else \ - echo "Staging $$dst for $$p" ;\ - cp "$$src" "$$dst" ;\ - fi ;\ - fi ;\ - done ;\ - : - -ifndef NO_SWI -__installer_swi_files: - $(ONL_V_GEN): ;\ - set -e ;\ - if $(ONL_V_P); then set -x; fi ;\ - swidir=$$(mktemp -d $(PWD)/swi-d-XXXXXX) ;\ - $(ONLPM) --extract-dir onl-swi:$(ARCH) $$swidir ;\ - mv $$swidir/usr/share/onl/packages/$(ARCH)/onl-swi/*.swi . ;\ - rm -fr $$swidir ;\ - : -else -__installer_swi_files: - $(ONL_V_GEN): -endif - -shar installer: installer - -clean: - rm -f *.swi *.installer $(notdir $(KERNELS)) *initrd*.cpio.gz - +include $(ONL)/builds/any/installer/new-hotness/grub/builds/Makefile diff --git a/builds/any/installer/new-hotness/grub/builds/Makefile b/builds/any/installer/new-hotness/grub/builds/Makefile new file mode 100644 index 00000000..fabadf3b --- /dev/null +++ b/builds/any/installer/new-hotness/grub/builds/Makefile @@ -0,0 +1,94 @@ +ifndef ARCH +$(error $$ARCH not set) +endif + +ONLPLATFORM = python $(ONL)/tools/onlplatform.py +PLATFORMS := $(shell $(ONLPM) --platform-manifest onl-loader-initrd:$(ARCH)) + +MKSHAR = $(ONL)/tools/mkshar +MKSHAR_OPTS = --lazy --unzip-pad --fixup-perms autoperms.sh +MKSHAR_PERMS = autoperms.sh + +# Hardcoded to match ONL File naming conventions. +include $(ONL)/make/version-onl.mk +INSTALLER_NAME=$(FNAME_PRODUCT_VERSION)_ONL-OS_$(FNAME_BUILD_ID)_$(UARCH)_INSTALLER + +ifeq ($(ARCH), amd64) +INSTALLER_ARCH = x86_64 +else +INSTALLER_ARCH = $(ARCH) +endif + +__installer: __installer_platform_files __installer_swi_files + $(ONL_V_at)rm -rf *INSTALLER* *.md5sum + $(ONL_V_at)cp /dev/null installer.sh + $(ONL_V_at): ;\ + set -e ;\ + if $(ONL_V_P); then set -x; fi ;\ + set dummy *.cpio.gz; initrd="$$2" ;\ + sed \ + -e 's^@ONLVERSION@^$(VERSION_STRING)^g' \ + -e "s^@INITRD_ARCHIVE@^$$initrd^g" \ + -e 's^@INITRD_OFFSET@^^g' \ + -e 's^@INITRD_SIZE@^^g' \ + -e 's^@ARCH@^$(INSTALLER_ARCH)^g' \ + $(ONL)/builds/any/installer/new-hotness/installer.sh.in \ + >> installer.sh + $(ONL_V_at)echo "PAYLOAD_FOLLOWS" >> installer.sh + $(ONL_V_at)cp /dev/null $(MKSHAR_PERMS) + $(ONL_V_at)cp $(ONL)/make/version-onl.sh . + $(ONL_V_at)echo "#!/bin/sh" >> $(MKSHAR_PERMS) + $(ONL_V_at)echo "set -e" >> $(MKSHAR_PERMS) + $(ONL_V_at)echo "set -x" >> $(MKSHAR_PERMS) + $(MKSHAR) $(MKSHAR_OPTS) "$(INSTALLER_NAME)" $(ONL)/tools/scripts/sfx.sh.in installer.sh kernel-* onl-loader-initrd-* *.swi version-onl.sh boot-config + $(ONL_V_at)rm -rf installer.sh kernel-* onl-loader-initrd-* $(ZTN_MANIFEST) *.swi version-onl.sh autoperms.sh + md5sum "$(INSTALLER_NAME)" | awk '{ print $$1 }' > "$(INSTALLER_NAME).md5sum" + +__installer_platform_files: + $(ONL_V_GEN): ;\ + set -e ;\ + if $(ONL_V_P); then set -x; fi ;\ + l="$(PLATFORMS)"; for p in $$l; do \ + src=$$($(ONLPLATFORM) $$p $(ARCH) kernel 2>/dev/null) || : ;\ + if test "$$src"; then \ + dst=$${src##*/} ;\ + if test "$dst" -ot Makefile; then \ + : ;\ + else \ + echo "Staging $$dst for $$p" ;\ + cp "$$src" "$$dst" ;\ + fi ;\ + fi ;\ + src=$$($(ONLPLATFORM) $$p $(ARCH) initrd 2>/dev/null) || : ;\ + if test "$$src"; then \ + dst=$${src##*/} ;\ + if test "$dst" -ot Makefile; then \ + : ;\ + else \ + echo "Staging $$dst for $$p" ;\ + cp "$$src" "$$dst" ;\ + fi ;\ + fi ;\ + done ;\ + : + +ifndef NO_SWI +__installer_swi_files: + $(ONL_V_GEN): ;\ + set -e ;\ + if $(ONL_V_P); then set -x; fi ;\ + swidir=$$(mktemp -d $(PWD)/swi-d-XXXXXX) ;\ + $(ONLPM) --extract-dir onl-swi:$(ARCH) $$swidir ;\ + mv $$swidir/usr/share/onl/packages/$(ARCH)/onl-swi/*.swi . ;\ + rm -fr $$swidir ;\ + : +else +__installer_swi_files: + $(ONL_V_GEN): +endif + +shar installer: installer + +clean: + rm -f *.swi *.installer $(notdir $(KERNELS)) *initrd*.cpio.gz + diff --git a/builds/any/installer/new-hotness/uboot/builds/Makefile b/builds/any/installer/new-hotness/uboot/builds/Makefile new file mode 100644 index 00000000..4755bf30 --- /dev/null +++ b/builds/any/installer/new-hotness/uboot/builds/Makefile @@ -0,0 +1,111 @@ +ifndef ARCH +$(error $$ARCH not set) +endif + +ONLPLATFORM = python $(ONL)/tools/onlplatform.py +PLATFORMS := $(shell $(ONLPM) --platform-manifest onl-loader-initrd:$(ARCH)) + +MKSHAR = $(ONL)/tools/mkshar +MKSHAR_OPTS = --lazy --unzip-pad --fixup-perms autoperms.sh +MKSHAR_PERMS = autoperms.sh + +VONLDIR = $(ONL)/packages/base/all/vendor-config-onl +PYFIT = $(VONLDIR)/src/bin/pyfit +PYFIT_ENVIRONMENT = PYTHONPATH=$(VONLDIR)/src/python + +# Hardcoded to match ONL File naming conventions. +include $(ONL)/make/version-onl.mk +INSTALLER_NAME=$(FNAME_PRODUCT_VERSION)_ONL-OS_$(FNAME_BUILD_ID)_$(UARCH)_INSTALLER + +# default fit image can be used as the canonical location for the initrd +FIT_IMAGE_ALL := $(shell $(ONLPM) --find-file onl-loader-fit:$(ARCH) onl-loader-fit.itb) +INITRD := $(shell $(ONLPM) --find-file onl-loader-initrd:$(ARCH) onl-loader-initrd-$(ARCH).cpio.gz) +INITRD_BOUNDS := $(shell $(PYFIT_ENVIRONMENT) $(PYFIT) -v offset $(FIT_IMAGE_ALL) --initrd) + +__installer: installer.sh __installer_fit_files __installer_platform_files __installer_swi_files + $(ONL_V_at)rm -rf *INSTALLER* *.md5sum + $(ONL_V_at)cp /dev/null $(MKSHAR_PERMS) + $(ONL_V_at)cp $(ONL)/make/version-onl.sh . + $(ONL_V_at)echo "#!/bin/sh" >> $(MKSHAR_PERMS) + $(ONL_V_at)echo "set -e" >> $(MKSHAR_PERMS) + $(ONL_V_at)echo "set -x" >> $(MKSHAR_PERMS) + $(MKSHAR) $(MKSHAR_OPTS) "$(INSTALLER_NAME)" $(ONL)/tools/scripts/sfx.sh.in installer.sh *.swi *.itb version-onl.sh boot-config + $(ONL_V_at)rm -rf installer.sh *.itb *.swi version-onl.sh autoperms.sh + md5sum "$(INSTALLER_NAME)" | awk '{ print $$1 }' > "$(INSTALLER_NAME).md5sum" + +installer.sh: Makefile $(ONL)/builds/any/installer/new-hotness/installer.sh.in + $(ONL_V_GEN)cp /dev/null $@ + $(ONL_V_at): ;\ + set -e ;\ + if $(ONL_V_P); then set -x; fi ;\ + if test "$(INITRD_BOUNDS)"; then \ + a="$(FIT_IMAGE_ALL)"; a=$${a##*/} ;\ + else \ + a="$(INITRD)"; i=$${a##*/} ;\ + fi ;\ + set dummy $(INITRD_BOUNDS); start=$$2; end=$$3; sz=$$(($$end - $$start + 1)) ;\ + sed \ + -e 's^@ONLVERSION@^$(VERSION_STRING)^g' \ + -e "s^@INITRD_ARCHIVE@^$${a}^g" \ + -e "s^@INITRD_OFFSET@^$$start^g" \ + -e "s^@INITRD_SIZE@^$$sz^g" \ + -e 's^@ARCH@^ppc^g' \ + $(ONL)/builds/any/installer/new-hotness/installer.sh.in \ + >> $@ + $(ONL_V_at)echo "PAYLOAD_FOLLOWS" >> $@ + +__installer_fit_files: + $(ONL_V_GEN): ;\ + set -e ;\ + if $(ONL_V_P); then set -x; fi ;\ + src=$(FIT_IMAGE_ALL) ;\ + dst=$${src##*/} ;\ + if test "$$dst" -nt Makefile; then \ + : ;\ + else \ + echo "Staging $$dst" ;\ + cp $$src $$dst ;\ + fi ;\ + : + +############################## +# +# optionally include custom itb files for each platform +# +############################## + +__installer_platform_files: + $(ONL_V_GEN): ;\ + set -e ;\ + if $(ONL_V_P); then set -x; fi ;\ + l="$(PLATFORMS)"; for p in $$l; do \ + echo "Looking for an ITB specific to $$p, ignore errors..." ;\ + src=$$($(ONLPLATFORM) $$p $(ARCH) itb) 2>/dev/null || : ;\ + if test "$$src"; then :; else continue; fi ;\ + dst=$${src##*/} ;\ + echo "Found $$dst" ;\ + if test "$$dst" -nt Makefile; then continue; fi ;\ + echo "Staging $$dst for $$p" ;\ + cp "$$src" "$$dst" ;\ + done ;\ + : + +__installer_swi_files: +ifndef NO_SWI + $(ONL_V_GEN): ;\ + set -e ;\ + if $(ONL_V_P); then set -x; fi ;\ + swidir=$$(mktemp -d $(PWD)/swi-d-XXXXXX) ;\ + $(ONLPM) --extract-dir onl-swi:$(ARCH) $$swidir ;\ + mv $$swidir/usr/share/onl/packages/$(ARCH)/onl-swi/*.swi . ;\ + rm -fr $$swidir ;\ + : +else + $(ONL_V_GEN): +endif + +shar installer: installer + +clean: + rm -f *.swi *.installer *.cpio.gz + diff --git a/builds/powerpc/installer/new-hotness/builds/Makefile b/builds/powerpc/installer/new-hotness/builds/Makefile index 5b24ae41..e94db6bd 100644 --- a/builds/powerpc/installer/new-hotness/builds/Makefile +++ b/builds/powerpc/installer/new-hotness/builds/Makefile @@ -1,109 +1,2 @@ include $(ONL)/make/config.powerpc.mk - -ONLPLATFORM = python $(ONL)/tools/onlplatform.py -PLATFORMS := $(shell $(ONLPM) --platform-manifest onl-loader-initrd:$(ARCH)) - -MKSHAR = $(ONL)/tools/mkshar -MKSHAR_OPTS = --lazy --unzip-pad --fixup-perms autoperms.sh -MKSHAR_PERMS = autoperms.sh - -VONLDIR = $(ONL)/packages/base/all/vendor-config-onl -PYFIT = $(VONLDIR)/src/bin/pyfit -PYFIT_ENVIRONMENT = PYTHONPATH=$(VONLDIR)/src/python - -# Hardcoded to match ONL File naming conventions. -include $(ONL)/make/version-onl.mk -INSTALLER_NAME=$(FNAME_PRODUCT_VERSION)_ONL-OS_$(FNAME_BUILD_ID)_$(UARCH)_INSTALLER - -# default fit image can be used as the canonical location for the initrd -FIT_IMAGE_ALL := $(shell $(ONLPM) --find-file onl-loader-fit:$(ARCH) onl-loader-fit.itb) -INITRD := $(shell $(ONLPM) --find-file onl-loader-initrd:$(ARCH) onl-loader-initrd-$(ARCH).cpio.gz) -INITRD_BOUNDS := $(shell $(PYFIT_ENVIRONMENT) $(PYFIT) -v offset $(FIT_IMAGE_ALL) --initrd) - -__installer: installer.sh __installer_fit_files __installer_platform_files __installer_swi_files - $(ONL_V_at)rm -rf *INSTALLER* *.md5sum - $(ONL_V_at)cp /dev/null $(MKSHAR_PERMS) - $(ONL_V_at)cp $(ONL)/make/version-onl.sh . - $(ONL_V_at)echo "#!/bin/sh" >> $(MKSHAR_PERMS) - $(ONL_V_at)echo "set -e" >> $(MKSHAR_PERMS) - $(ONL_V_at)echo "set -x" >> $(MKSHAR_PERMS) - $(MKSHAR) $(MKSHAR_OPTS) "$(INSTALLER_NAME)" $(ONL)/tools/scripts/sfx.sh.in installer.sh *.swi *.itb version-onl.sh boot-config - $(ONL_V_at)rm -rf installer.sh *.itb *.swi version-onl.sh autoperms.sh - md5sum "$(INSTALLER_NAME)" | awk '{ print $$1 }' > "$(INSTALLER_NAME).md5sum" - -installer.sh: Makefile $(ONL)/builds/any/installer/new-hotness/installer.sh.in - $(ONL_V_GEN)cp /dev/null $@ - $(ONL_V_at): ;\ - set -e ;\ - if $(ONL_V_P); then set -x; fi ;\ - if test "$(INITRD_BOUNDS)"; then \ - a="$(FIT_IMAGE_ALL)"; a=$${a##*/} ;\ - else \ - a="$(INITRD)"; i=$${a##*/} ;\ - fi ;\ - set dummy $(INITRD_BOUNDS); start=$$2; end=$$3; sz=$$(($$end - $$start + 1)) ;\ - sed \ - -e 's^@ONLVERSION@^$(VERSION_STRING)^g' \ - -e "s^@INITRD_ARCHIVE@^$${a}^g" \ - -e "s^@INITRD_OFFSET@^$$start^g" \ - -e "s^@INITRD_SIZE@^$$sz^g" \ - -e 's^@ARCH@^ppc^g' \ - $(ONL)/builds/any/installer/new-hotness/installer.sh.in \ - >> $@ - $(ONL_V_at)echo "PAYLOAD_FOLLOWS" >> $@ - -__installer_fit_files: - $(ONL_V_GEN): ;\ - set -e ;\ - if $(ONL_V_P); then set -x; fi ;\ - src=$(FIT_IMAGE_ALL) ;\ - dst=$${src##*/} ;\ - if test "$$dst" -nt Makefile; then \ - : ;\ - else \ - echo "Staging $$dst" ;\ - cp $$src $$dst ;\ - fi ;\ - : - -############################## -# -# optionally include custom itb files for each platform -# -############################## - -__installer_platform_files: - $(ONL_V_GEN): ;\ - set -e ;\ - if $(ONL_V_P); then set -x; fi ;\ - l="$(PLATFORMS)"; for p in $$l; do \ - echo "Looking for an ITB specific to $$p, ignore errors..." ;\ - src=$$($(ONLPLATFORM) $$p $(ARCH) itb) 2>/dev/null || : ;\ - if test "$$src"; then :; else continue; fi ;\ - dst=$${src##*/} ;\ - echo "Found $$dst" ;\ - if test "$$dst" -nt Makefile; then continue; fi ;\ - echo "Staging $$dst for $$p" ;\ - cp "$$src" "$$dst" ;\ - done ;\ - : - -__installer_swi_files: -ifndef NO_SWI - $(ONL_V_GEN): ;\ - set -e ;\ - if $(ONL_V_P); then set -x; fi ;\ - swidir=$$(mktemp -d $(PWD)/swi-d-XXXXXX) ;\ - $(ONLPM) --extract-dir onl-swi:$(ARCH) $$swidir ;\ - mv $$swidir/usr/share/onl/packages/$(ARCH)/onl-swi/*.swi . ;\ - rm -fr $$swidir ;\ - : -else - $(ONL_V_GEN): -endif - -shar installer: installer - -clean: - rm -f *.swi *.installer *.cpio.gz - +include $(ONL)/builds/any/installer/new-hotness/uboot/builds/Makefile From 227a61b210f324364dc536416259783367083f87 Mon Sep 17 00:00:00 2001 From: "Carl D. Roth" Date: Mon, 9 May 2016 12:00:55 -0700 Subject: [PATCH 38/62] Clean up arch handling for ppc and arm --- .../any/installer/new-hotness/installer.sh.in | 30 ++++++++++++------- .../new-hotness/uboot/builds/Makefile | 4 +-- 2 files changed, 21 insertions(+), 13 deletions(-) diff --git a/builds/any/installer/new-hotness/installer.sh.in b/builds/any/installer/new-hotness/installer.sh.in index 6cc81460..6a715a62 100644 --- a/builds/any/installer/new-hotness/installer.sh.in +++ b/builds/any/installer/new-hotness/installer.sh.in @@ -25,17 +25,25 @@ IARCH="@ARCH@" ARCH=`uname -m` if test "$ARCH" != "$IARCH"; then - echo - echo "------------------------------------" - echo "Installer Architecture: $IARCH" - echo "Target Architecture: $ARCH" - echo - echo "This installer cannot be used on this" - echo "target." - echo - echo "------------------------------------" - sleep 5 - exit 1 + : +else + # identify mappings between kernel arch and debian arch + case "$IARCH:$ARCH" in + armel:arm7l) ;; + *) + echo + echo "------------------------------------" + echo "Installer Architecture: $IARCH" + echo "Target Architecture: $ARCH" + echo + echo "This installer cannot be used on this" + echo "target." + echo + echo "------------------------------------" + sleep 5 + exit 1 + ;; + esac fi case "$ARCH" in ppc|powerpc) diff --git a/builds/any/installer/new-hotness/uboot/builds/Makefile b/builds/any/installer/new-hotness/uboot/builds/Makefile index 4755bf30..ebd2248e 100644 --- a/builds/any/installer/new-hotness/uboot/builds/Makefile +++ b/builds/any/installer/new-hotness/uboot/builds/Makefile @@ -31,7 +31,7 @@ __installer: installer.sh __installer_fit_files __installer_platform_files __ins $(ONL_V_at)echo "set -x" >> $(MKSHAR_PERMS) $(MKSHAR) $(MKSHAR_OPTS) "$(INSTALLER_NAME)" $(ONL)/tools/scripts/sfx.sh.in installer.sh *.swi *.itb version-onl.sh boot-config $(ONL_V_at)rm -rf installer.sh *.itb *.swi version-onl.sh autoperms.sh - md5sum "$(INSTALLER_NAME)" | awk '{ print $$1 }' > "$(INSTALLER_NAME).md5sum" + $(ONL_V_at)md5sum "$(INSTALLER_NAME)" | awk '{ print $$1 }' > "$(INSTALLER_NAME).md5sum" installer.sh: Makefile $(ONL)/builds/any/installer/new-hotness/installer.sh.in $(ONL_V_GEN)cp /dev/null $@ @@ -49,7 +49,7 @@ installer.sh: Makefile $(ONL)/builds/any/installer/new-hotness/installer.sh.in -e "s^@INITRD_ARCHIVE@^$${a}^g" \ -e "s^@INITRD_OFFSET@^$$start^g" \ -e "s^@INITRD_SIZE@^$$sz^g" \ - -e 's^@ARCH@^ppc^g' \ + -e 's^@ARCH@^$(ARCH)^g' \ $(ONL)/builds/any/installer/new-hotness/installer.sh.in \ >> $@ $(ONL_V_at)echo "PAYLOAD_FOLLOWS" >> $@ From b6e07b5bf7dac214366c0523b9ae192a945e6973 Mon Sep 17 00:00:00 2001 From: "Carl D. Roth" Date: Mon, 9 May 2016 12:04:37 -0700 Subject: [PATCH 39/62] Added armel installer --- builds/armel/installer/new-hotness/Makefile | 1 + builds/armel/installer/new-hotness/PKG.yml | 2 ++ builds/armel/installer/new-hotness/builds/.gitignore | 1 + builds/armel/installer/new-hotness/builds/Makefile | 2 ++ builds/armel/installer/new-hotness/builds/boot-config | 4 ++++ 5 files changed, 10 insertions(+) create mode 100644 builds/armel/installer/new-hotness/Makefile create mode 100644 builds/armel/installer/new-hotness/PKG.yml create mode 100644 builds/armel/installer/new-hotness/builds/.gitignore create mode 100644 builds/armel/installer/new-hotness/builds/Makefile create mode 100644 builds/armel/installer/new-hotness/builds/boot-config diff --git a/builds/armel/installer/new-hotness/Makefile b/builds/armel/installer/new-hotness/Makefile new file mode 100644 index 00000000..003238cf --- /dev/null +++ b/builds/armel/installer/new-hotness/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/builds/armel/installer/new-hotness/PKG.yml b/builds/armel/installer/new-hotness/PKG.yml new file mode 100644 index 00000000..8cf5ff66 --- /dev/null +++ b/builds/armel/installer/new-hotness/PKG.yml @@ -0,0 +1,2 @@ +!include $ONL/builds/any/installer/new-hotness/APKG.yml ARCH=armel + diff --git a/builds/armel/installer/new-hotness/builds/.gitignore b/builds/armel/installer/new-hotness/builds/.gitignore new file mode 100644 index 00000000..fbd18542 --- /dev/null +++ b/builds/armel/installer/new-hotness/builds/.gitignore @@ -0,0 +1 @@ +*INSTALLER diff --git a/builds/armel/installer/new-hotness/builds/Makefile b/builds/armel/installer/new-hotness/builds/Makefile new file mode 100644 index 00000000..e2eb47a8 --- /dev/null +++ b/builds/armel/installer/new-hotness/builds/Makefile @@ -0,0 +1,2 @@ +include $(ONL)/make/config.armel.mk +include $(ONL)/builds/any/installer/new-hotness/uboot/builds/Makefile diff --git a/builds/armel/installer/new-hotness/builds/boot-config b/builds/armel/installer/new-hotness/builds/boot-config new file mode 100644 index 00000000..40fb0d31 --- /dev/null +++ b/builds/armel/installer/new-hotness/builds/boot-config @@ -0,0 +1,4 @@ +NETDEV=ma1 +NETAUTO=dhcp +BOOTMODE=SWI +SWI=images::latest From bbd3184661d4fd81801298e495b229d77aa55ab7 Mon Sep 17 00:00:00 2001 From: "Carl D. Roth" Date: Mon, 9 May 2016 13:29:09 -0700 Subject: [PATCH 40/62] Added bzip2 and xz for unpacking ONIE images --- builds/any/rootfs/jessie/common/common-packages.yml | 2 ++ builds/any/rootfs/wheezy/common/common-packages.yml | 2 ++ 2 files changed, 4 insertions(+) diff --git a/builds/any/rootfs/jessie/common/common-packages.yml b/builds/any/rootfs/jessie/common/common-packages.yml index 980a86b1..ec1d992c 100644 --- a/builds/any/rootfs/jessie/common/common-packages.yml +++ b/builds/any/rootfs/jessie/common/common-packages.yml @@ -72,3 +72,5 @@ - oom-shim - python-parted - python-yaml +- bzip2 +- xz-utils diff --git a/builds/any/rootfs/wheezy/common/common-packages.yml b/builds/any/rootfs/wheezy/common/common-packages.yml index b93183b1..7f29ba09 100644 --- a/builds/any/rootfs/wheezy/common/common-packages.yml +++ b/builds/any/rootfs/wheezy/common/common-packages.yml @@ -71,3 +71,5 @@ - oom-shim - python-parted - python-yaml +- bzip2 +- xz-utils From 0596237d1305ab0ebe5c9012e3b13cfd7cf56939 Mon Sep 17 00:00:00 2001 From: "Carl D. Roth" Date: Tue, 10 May 2016 12:01:39 -0700 Subject: [PATCH 41/62] Added unzip --- builds/any/rootfs/jessie/common/common-packages.yml | 1 + builds/any/rootfs/wheezy/common/common-packages.yml | 1 + 2 files changed, 2 insertions(+) diff --git a/builds/any/rootfs/jessie/common/common-packages.yml b/builds/any/rootfs/jessie/common/common-packages.yml index ec1d992c..62f64b8e 100644 --- a/builds/any/rootfs/jessie/common/common-packages.yml +++ b/builds/any/rootfs/jessie/common/common-packages.yml @@ -74,3 +74,4 @@ - python-yaml - bzip2 - xz-utils +- unzip diff --git a/builds/any/rootfs/wheezy/common/common-packages.yml b/builds/any/rootfs/wheezy/common/common-packages.yml index 7f29ba09..193e002d 100644 --- a/builds/any/rootfs/wheezy/common/common-packages.yml +++ b/builds/any/rootfs/wheezy/common/common-packages.yml @@ -73,3 +73,4 @@ - python-yaml - bzip2 - xz-utils +- unzip From 51550a194e2a32fe448d8ad9fa8f7efd35d3cfa7 Mon Sep 17 00:00:00 2001 From: "Carl D. Roth" Date: Tue, 10 May 2016 12:02:45 -0700 Subject: [PATCH 42/62] Make sure onl directories are unmounted --- .../src/python/onl/install/BaseInstall.py | 21 ++++++++++++++++++- 1 file changed, 20 insertions(+), 1 deletion(-) diff --git a/packages/base/all/vendor-config-onl/src/python/onl/install/BaseInstall.py b/packages/base/all/vendor-config-onl/src/python/onl/install/BaseInstall.py index d85c1a8c..895a0876 100644 --- a/packages/base/all/vendor-config-onl/src/python/onl/install/BaseInstall.py +++ b/packages/base/all/vendor-config-onl/src/python/onl/install/BaseInstall.py @@ -12,7 +12,10 @@ import StringIO import parted import yaml -from InstallUtils import MountContext, BlkidParser, PartedParser, SubprocessMixin +from InstallUtils import SubprocessMixin +from InstallUtils import MountContext, BlkidParser, PartedParser +from InstallUtils import ProcMountsParser + import onl.YamlUtils class Base: @@ -280,6 +283,16 @@ class Base: return 0 + def assertUnmounted(self): + """Make sure the install device does not have any active mounts.""" + pm = ProcMountsParser() + for m in pm.mounts: + if m.device.startswith(self.device): + self.log.error("mount %s on %s will be erased by install", + m.dir, m.device) + return 1 + return 0 + GRUB_TPL = """\ #serial --port=0x3f8 --speed=115200 --word=8 --parity=no --stop=1 serial %(serial)s @@ -351,6 +364,9 @@ class GrubInstaller(SubprocessMixin, Base): self.log.error("cannot find an install device") return 1 + code = self.assertUnmounted() + if code: return code + # optionally back up a config partition # if it's on the boot device for part in self.blkidParts: @@ -530,6 +546,9 @@ class UbootInstaller(SubprocessMixin, Base): self.device = self.im.getDevice() + code = self.assertUnmounted() + if code: return code + self.rawLoaderDevice = None # set to a partition device for raw loader install, # default to None for FS-based install From c640ddb751f639f99d15e2c688067d1915de2c96 Mon Sep 17 00:00:00 2001 From: "Carl D. Roth" Date: Tue, 10 May 2016 12:02:56 -0700 Subject: [PATCH 43/62] Handle install from within ONL --- .../src/python/onl/install/App.py | 37 +++++++++++++++---- 1 file changed, 30 insertions(+), 7 deletions(-) diff --git a/packages/base/all/vendor-config-onl/src/python/onl/install/App.py b/packages/base/all/vendor-config-onl/src/python/onl/install/App.py index 79884203..55630010 100644 --- a/packages/base/all/vendor-config-onl/src/python/onl/install/App.py +++ b/packages/base/all/vendor-config-onl/src/python/onl/install/App.py @@ -14,8 +14,6 @@ from InstallUtils import InitrdContext from InstallUtils import SubprocessMixin import ConfUtils, BaseInstall -import onl.platform.current - class App(SubprocessMixin): def __init__(self, log=None): @@ -33,7 +31,11 @@ class App(SubprocessMixin): def run(self): self.log.info("getting installer configuration") - self.machineConf = ConfUtils.MachineConf() + if os.path.exists(ConfUtils.MachineConf.PATH): + self.machineConf = ConfUtils.MachineConf() + else: + self.log.warn("missing /etc/machine.conf from ONIE runtime") + self.machineConf = ConfUtils.MachineConf(path='/dev/null') self.installerConf = ConfUtils.InstallerConf() ##self.log.info("using native GRUB") @@ -71,6 +73,15 @@ class App(SubprocessMixin): code = self.findPlatform() if code: return code + try: + import onl.platform.current + except: + self.log.exception("cannot find platform config") + code = 1 + if self.log.level < logging.INFO: + self.post_mortem() + if code: return code + self.onlPlatform = onl.platform.current.OnlPlatform() if 'grub' in self.onlPlatform.platform_config: @@ -111,11 +122,23 @@ class App(SubprocessMixin): def findPlatform(self): - plat = getattr(self.machineConf, 'onie_platform', None) - arch = getattr(self.machineConf, 'onie_arch', None) + plat = arch = None + if os.path.exists(ConfUtils.MachineConf.PATH): + plat = getattr(self.machineConf, 'onie_platform', None) + arch = getattr(self.machineConf, 'onie_arch', None) + if plat and arch: + self.log.info("ONL installer running under ONIE.") + plat = plat.replace('_', '-') + elif os.path.exists("/etc/onl/platform"): + with open("/etc/onl/platform") as fd: + plat = fd.read().strip() + if plat.startswith('x86-64'): + arch = 'x86_64' + else: + arch = plat.partition('-')[0] + self.log.info("ONL installer running under ONL or ONL loader.") + if plat and arch: - self.log.info("ONL installer running under ONIE.") - plat = plat.replace('_', '-') self.installerConf.installer_platform = plat self.installerConf.installer_arch = arch else: From 1f4a489421b8a88fe8757acb7e2538d226761512 Mon Sep 17 00:00:00 2001 From: "Carl D. Roth" Date: Tue, 10 May 2016 12:03:10 -0700 Subject: [PATCH 44/62] Better error reporting for missing tools --- .../src/python/onl/install/InstallUtils.py | 32 ++++++++++++------- 1 file changed, 20 insertions(+), 12 deletions(-) diff --git a/packages/base/all/vendor-config-onl/src/python/onl/install/InstallUtils.py b/packages/base/all/vendor-config-onl/src/python/onl/install/InstallUtils.py index 4b8f1760..f2e2232f 100644 --- a/packages/base/all/vendor-config-onl/src/python/onl/install/InstallUtils.py +++ b/packages/base/all/vendor-config-onl/src/python/onl/install/InstallUtils.py @@ -679,18 +679,26 @@ class InitrdContext(SubprocessMixin): c2 = ('cpio', '-imd',) self.log.debug("+ %s | %s", " ".join(c1), " ".join(c2)) - p1 = subprocess.Popen(c1, - stdout=subprocess.PIPE) - if self.log.isEnabledFor(logging.DEBUG): - p2 = subprocess.Popen(c2, - cwd=self.dir, - stdin=p1.stdout) - else: - p2 = subprocess.Popen(c2, - cwd=self.dir, - stdin=p1.stdout, - stdout=subprocess.PIPE, - stderr=subprocess.STDOUT) + try: + p1 = subprocess.Popen(c1, + stdout=subprocess.PIPE) + except OSError as ex: + self.log.exception("command not found: %s" % c1[0]) + raise ValueError("cannot start pipe") + try: + if self.log.isEnabledFor(logging.DEBUG): + p2 = subprocess.Popen(c2, + cwd=self.dir, + stdin=p1.stdout) + else: + p2 = subprocess.Popen(c2, + cwd=self.dir, + stdin=p1.stdout, + stdout=subprocess.PIPE, + stderr=subprocess.STDOUT) + except OSError as ex: + self.log.exception("cannot start command: %s" % c2[0]) + raise ValueError("cannot start pipe") c1 = p1.wait() out, _ = p2.communicate() c2 = p2.wait() From e63baed466987aa04e18cb48515100664f7c73cc Mon Sep 17 00:00:00 2001 From: "Carl D. Roth" Date: Tue, 10 May 2016 12:04:03 -0700 Subject: [PATCH 45/62] Overhaul tmpfs support - find a suitable TMPDIR that is actually tmpfs/ramfs - resize tmpfs/ramfs as needed - enable unzip overwrite mode --- .../any/installer/new-hotness/installer.sh.in | 167 ++++++++++++++++-- 1 file changed, 150 insertions(+), 17 deletions(-) diff --git a/builds/any/installer/new-hotness/installer.sh.in b/builds/any/installer/new-hotness/installer.sh.in index 6a715a62..ade269f9 100644 --- a/builds/any/installer/new-hotness/installer.sh.in +++ b/builds/any/installer/new-hotness/installer.sh.in @@ -85,14 +85,29 @@ esac ############################################################ set -e -cd $(dirname $0) installer_script=${0##*/} +installer_dir=${0%/*} +installer_dir=$(cd $installer_dir && pwd) installer_zip=$1 +installer_tmpfs= +installer_tmpfs_opts= +# installer_tmpfs=??*, installer_tmpfs_opts= --> temporary mount +# installer_tmpfs=??*, installer_tmpfs_opts=??* --> temporary remount + +installer_tmpfs_kmin=1048576 +# minimum tmpfs/ramfs size to run this installer +# (conservative, could be based on actual installer size) + BOOTDIR=/mnt/onie-boot # initial boot partition (onie) +CR=" +" + +cd $installer_dir + has_grub_env() { local tag @@ -136,12 +151,62 @@ if test -r /etc/machine.conf; then . /etc/machine.conf fi +visit_proc_mounts() { + local ifs line dummy fn rest sts + fn=$1; shift + rest="$@" + + ifs=$IFS; IFS=$CR + for line in $(cat /proc/mounts); do + IFS=$ifs + if eval $fn $line $rest; then + : + else + sts=$? + if test $sts -eq 2; then break; fi + return $sts + fi + done + IFS=$ifs + + return 0 +} + # # Installation environment setup. # installer_umount() { - egrep "/tmp/..*" /proc/mounts | cut -d' ' -f2 | sort -r | xargs -n 1 umount + local cwd mpt tdir + cwd=$PWD + cd / + + tdir=${TMPDIR-"/tmp"} + for mpt in $(cat /proc/mounts | cut -d' ' -f2 | sort -r); do + case "$mpt" in + "$tdir"|"$tdir"/*) umount "$mpt" ;; + esac + done + if test "$installer_tmpfs_opts"; then + case ",$installer_tmpfs_opts," in + *,size=*,*) ;; + *) + # default if unspecified is 50% of physical memory + installer_tmpfs_opts=${installer_tmpfs_opts},size=50% + ;; + esac + installer_say "Remounting $installer_tmpfs with options $installer_tmpfs_opts" + mount -o remount,$installer_tmpfs_opts $installer_tmpfs + installer_tmpfs= + fi + if test "$installer_tmpfs"; then + installer_say "Unmounting $installer_tmpfs" + umount "$installer_tmpfs" + fi + + cd $cwd || : + + return 0 } if test "${onie_platform}"; then @@ -194,23 +259,95 @@ fi trap "installer_cleanup" 0 1 -# -# Remount tmpfs larger if possible. -# We will be doing all of our work out of /tmp -# -mount -o remount,size=1024M /tmp || true +# Find a suitable location for TMPDIR + +scan_tmpfs() { + local dev mpt fstype opts tdir + dev=$1; shift + mpt=$1; shift + fstype=$1; shift + opts=$1; shift + shift + shift + tdir="$1" + + case "$fstype" in + ramfs|tmpfs) ;; + *) return 0 ;; + esac + + case "$tdir" in + "$mpt"|"$mpt"/*) + d1=$(stat -c '%D' "$tdir") + d2=$(stat -c '%D' $mpt) + if test "$d1" = "$d2"; then + installer_say "Found installer $fstype on $installer_dir ($mpt) using opts $opts" + installer_tmpfs=$mpt + installer_tmpfs_opts=${opts:-"defaults"} + return 2 + fi + ;; + esac + + return 0 +} + +# maybe installer script was unpacked to a tmpfs/ramfs filesystem +if test -z "$installer_tmpfs" -a "$installer_dir"; then + visit_proc_mounts scan_tmpfs "$installer_dir" + if test "$installer_tmpfs"; then + TMPDIR="$installer_dir" + export TMPDIR + fi +fi +# maybe TMPDIR is on a tmpfs/ramfs filesystem +if test -z "$installer_tmpfs" -a "$TMPDIR"; then + visit_proc_mounts scan_tmpfs "$TMPDIR" + if test "$installer_tmpfs"; then + : + else + installer_say "TMPDIR $TMPDIR is not actually tmpfs, ignoring" + unset TMPDIR + fi +fi +# else, hopefully /tmp is a tmpfs/ramfs +if test -z "$installer_tmpfs"; then + visit_proc_mounts scan_tmpfs /tmp + if test "$installer_tmpfs"; then + TMPDIR=/tmp + export TMPDIR + fi +fi + +if test "$installer_tmpfs"; then + set dummy $(df -k $installer_tmpfs | tail -1) + if test $3 -lt $installer_tmpfs_kmin; then + installer_say "Resizing tmpfs $installer_tmpfs to ${installer_tmpfs_kmin}k" + mount -o remount,size=${installer_tmpfs_kmin}k $installer_tmpfs + else + # existing installer_tmpfs is fine, + # no need to unmount or remount + installer_tmpfs= + installer_tmpfs_opts= + fi +else + installer_say "Creating tmpfs for installer" + installer_tmpfs=$(mktemp -d -t installer-tmpfs-XXXXXX) + installer_tmpfs_opts= + mount -t tmpfs -o size=1024m tmpfs $installer_tmpfs + export TMPDIR=$installer_tmpfs +fi # Unpack our distribution -installer_say "Unpacking SwitchLight installer files..." -installer_dir=`pwd` +installer_say "Unpacking ONL installer files..." if test "$SFX_PAD"; then # ha ha, busybox cannot exclude multiple files - unzip $installer_zip -x $SFX_PAD + unzip -o $installer_zip -x $SFX_PAD elif test "$SFX_UNZIP"; then - unzip $installer_zip -x $installer_script + unzip -o $installer_zip -x $installer_script else dd if=$installer_zip bs=$SFX_BLOCKSIZE skip=$SFX_BLOCKS \ - | unzip - -x $installer_script + | unzip -o - -x $installer_script fi # Developer debugging @@ -226,9 +363,6 @@ initrd_archive="@INITRD_ARCHIVE@" initrd_offset="@INITRD_OFFSET@" initrd_size="@INITRD_SIZE@" -TMPDIR=${TMPDIR-"${installer_dir}"} -export TMPDIR - rootdir=$(mktemp -d -t "initrd-XXXXXX") installer_say "Extracting initrd to $rootdir" if test "$initrd_offset"; then @@ -291,10 +425,9 @@ echo "installer_postinst=/mnt/installer/$b" >> "${rootdir}/etc/onl/installer.con # no special handling for /tmp or /run, since this is all in /tmp # anyway -installer_say "Launching Switch Light installer" +installer_say "Launching ONL installer" installer_shell=${installer_shell-"/usr/bin/onl-install"} chroot "${rootdir}" $installer_shell -: chroot "${rootdir}" /usr/bin/onl-install if test -f "$postinst"; then installer_say "Invoking post-install actions" From 7166dce5c6b9279bfeb19a8c04c861f35e6cfb7e Mon Sep 17 00:00:00 2001 From: "Carl D. Roth" Date: Tue, 10 May 2016 18:25:20 -0700 Subject: [PATCH 46/62] Updated chroot utils - Set up /run properly - copy in /etc/onl files for self-update --- .../vendor-config-onl/src/lib/install/lib.sh | 28 +++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/packages/base/all/vendor-config-onl/src/lib/install/lib.sh b/packages/base/all/vendor-config-onl/src/lib/install/lib.sh index 5537de43..78a5033b 100644 --- a/packages/base/all/vendor-config-onl/src/lib/install/lib.sh +++ b/packages/base/all/vendor-config-onl/src/lib/install/lib.sh @@ -74,6 +74,28 @@ installer_mkchroot() { done mkdir -p "${rootdir}/dev/pts" + installer_say "Setting up /run" + rm -fr "${rootdir}/run"/* + mkdir -p "${rootdir}/run" + d1=$(stat -c "%D" /run) + for rdir in /run/*; do + if test -d "$rdir"; then + mkdir "${rootdir}${rdir}" + d2=$(stat -c "%D" $rdir) + t2=$(stat -f -c "%T" $rdir) + case "$t2" in + tmpfs|ramfs) + # skip tmpfs, we'll just inherit the initrd ramfs + ;; + *) + if test "$d1" != "$d2"; then + mount -o bind $rdir "${rootdir}${rdir}" + fi + ;; + esac + fi + done + installer_say "Setting up mounts" mount -t proc proc "${rootdir}/proc" mount -t sysfs sysfs "${rootdir}/sys" @@ -89,6 +111,12 @@ installer_mkchroot() { cp /etc/machine.conf "${rootdir}/etc/machine.conf" fi + # export ONL defines to the installer + mkdir -p "${rootdir}/etc/onl" + if test -d /etc/onl; then + cp -a /etc/onl/. "${rootdir}/etc/onl/." + fi + # export firmware config if test -r /etc/fw_env.config; then cp /etc/fw_env.config "${rootdir}/etc/fw_env.config" From d7d53cdedd102c93aa430473ccb399f311632ab1 Mon Sep 17 00:00:00 2001 From: "Carl D. Roth" Date: Tue, 10 May 2016 18:27:01 -0700 Subject: [PATCH 47/62] Installer script overhaul - support lazy unzip within python installer - properly locate or create a tmpfs for expanding the installer - properly resize the tmpfs (and restore it) - export the installer zip file to the install routines --- .../any/installer/new-hotness/installer.sh.in | 88 +++++++++++++------ 1 file changed, 62 insertions(+), 26 deletions(-) diff --git a/builds/any/installer/new-hotness/installer.sh.in b/builds/any/installer/new-hotness/installer.sh.in index ade269f9..b7ada262 100644 --- a/builds/any/installer/new-hotness/installer.sh.in +++ b/builds/any/installer/new-hotness/installer.sh.in @@ -103,6 +103,12 @@ installer_tmpfs_kmin=1048576 BOOTDIR=/mnt/onie-boot # initial boot partition (onie) +# Replaced during build packaging with the current version. +onl_version="@ONLVERSION@" +initrd_archive="@INITRD_ARCHIVE@" +initrd_offset="@INITRD_OFFSET@" +initrd_size="@INITRD_SIZE@" + CR=" " @@ -184,24 +190,41 @@ installer_umount() { tdir=${TMPDIR-"/tmp"} for mpt in $(cat /proc/mounts | cut -d' ' -f2 | sort -r); do case "$mpt" in - "$tdir"|"$tdir"/*) umount "$mpt" ;; - esac - done - if test "$installer_tmpfs_opts"; then - case ",$installer_tmpfs_opts," in - *,size=*,*) ;; - *) - # default if unspecified is 50% of physical memory - installer_tmpfs_opts=${installer_tmpfs_opts},size=50% + "$tdir"|"$tdir"/*) + installer_say "Unmounting $mpt" + umount "$mpt" ;; esac - installer_say "Remounting $installer_tmpfs with options $installer_tmpfs_opts" - mount -o remount,$installer_tmpfs_opts $installer_tmpfs - installer_tmpfs= - fi + done + + # handle installer_tmpfs specially if test "$installer_tmpfs"; then - installer_say "Unmounting $installer_tmpfs" - umount "$installer_tmpfs" + if grep -q " $installer_tmpfs " /proc/mounts; then + + if test "$installer_tmpfs_opts"; then + + # remount if still mounted + + case ",$installer_tmpfs_opts," in + *,size=*,*) ;; + *) + # default if unspecified is 50% of physical memory + installer_tmpfs_opts=${installer_tmpfs_opts},size=50% + ;; + esac + installer_say "Remounting $installer_tmpfs with options $installer_tmpfs_opts" + mount -o remount,$installer_tmpfs_opts $installer_tmpfs + + else + + # else unmount if still mounted + + installer_say "Unmounting $installer_tmpfs" + umount "$installer_tmpfs" + + fi + + fi fi cd $cwd || : @@ -339,15 +362,21 @@ else fi # Unpack our distribution +if test "${installer_unpack_only}"; then + installer_list= +else + installer_list=$initrd_archive +fi + installer_say "Unpacking ONL installer files..." if test "$SFX_PAD"; then # ha ha, busybox cannot exclude multiple files - unzip -o $installer_zip -x $SFX_PAD + unzip -o $installer_zip $installer_list -x $SFX_PAD elif test "$SFX_UNZIP"; then - unzip -o $installer_zip -x $installer_script + unzip -o $installer_zip $installer_list -x $installer_script else dd if=$installer_zip bs=$SFX_BLOCKSIZE skip=$SFX_BLOCKS \ - | unzip -o - -x $installer_script + | unzip -o - $installer_list -x $installer_script fi # Developer debugging @@ -357,12 +386,6 @@ if test "${installer_unpack_only}"; then exit 1 fi -# Replaced during build packaging with the current version. -onl_version="@ONLVERSION@" -initrd_archive="@INITRD_ARCHIVE@" -initrd_offset="@INITRD_OFFSET@" -initrd_size="@INITRD_SIZE@" - rootdir=$(mktemp -d -t "initrd-XXXXXX") installer_say "Extracting initrd to $rootdir" if test "$initrd_offset"; then @@ -399,6 +422,19 @@ echo "onl_version=\"$onl_version\"" >> "${rootdir}/etc/onl/installer.conf" installer_md5=$(md5sum "$0" | awk '{print $1}') echo "installer_md5=\"$installer_md5\"" >> "${rootdir}/etc/onl/installer.conf" +# expose the zip file for later expansion by the initrd +case "$installer_zip" in + "${installer_dir}"/*) + echo "installer_zip=\"${installer_zip##*/}\"" >> "${rootdir}/etc/onl/installer.conf" + ;; + *) + zf=$(mktemp "$installer_dir/installer-zip-XXXXXX") + installer_say "Exposing installer archive as $zf" + mount -o bind "$installer_zip" $zf + echo "installer_zip=\"${zf##*/}\"" >> "${rootdir}/etc/onl/installer.conf" + ;; +esac + # Cache our install URL if available if test -f "$0.url"; then installer_url=$(cat "$0.url") @@ -416,8 +452,8 @@ fi postinst=$(mktemp -t postinst-XXXXXX) b=${postinst##*/} -echo "installer_chroot=${rootdir}" >> "${rootdir}/etc/onl/installer.conf" -echo "installer_postinst=/mnt/installer/$b" >> "${rootdir}/etc/onl/installer.conf" +echo "installer_chroot=\"${rootdir}\"" >> "${rootdir}/etc/onl/installer.conf" +echo "installer_postinst=\"/mnt/installer/$b\"" >> "${rootdir}/etc/onl/installer.conf" # for now, skip the other dot-files in /etc/onl, we do not need them # to enable initial install From 5e35ea9192993e126ac2a49fe7c5586f39a56239 Mon Sep 17 00:00:00 2001 From: "Carl D. Roth" Date: Tue, 10 May 2016 18:28:16 -0700 Subject: [PATCH 48/62] Installer updates - initial support for self-updating within ONL via a URL - lazy unpack support --- .../src/python/onl/install/App.py | 111 +++++++++++- .../src/python/onl/install/BaseInstall.py | 160 +++++++++++++----- 2 files changed, 220 insertions(+), 51 deletions(-) diff --git a/packages/base/all/vendor-config-onl/src/python/onl/install/App.py b/packages/base/all/vendor-config-onl/src/python/onl/install/App.py index 55630010..65968f4c 100644 --- a/packages/base/all/vendor-config-onl/src/python/onl/install/App.py +++ b/packages/base/all/vendor-config-onl/src/python/onl/install/App.py @@ -8,28 +8,110 @@ import sys, os import logging import imp import glob -import distutils.sysconfig +import argparse +import shutil +import urllib +import tempfile +import time from InstallUtils import InitrdContext from InstallUtils import SubprocessMixin +from InstallUtils import ProcMountsParser import ConfUtils, BaseInstall class App(SubprocessMixin): - def __init__(self, log=None): + def __init__(self, url=None, force=False, log=None): if log is not None: self.log = log else: self.log = logging.getLogger(self.__class__.__name__) + self.url = url + self.force = force + # remote-install mode + self.installer = None self.machineConf = None self.installerConf = None self.onlPlatform = None + # local-install mode + + self.nextUpdate = None def run(self): + if self.url is not None: + return self.runUrl() + else: + return self.runLocal() + + def runUrl(self): + pm = ProcMountsParser() + for m in pm.mounts: + if m.dir.startswith('/mnt/onl'): + if not self.force: + self.log.error("directory %s is still mounted", m.dir) + return 1 + self.log.warn("unmounting %s (--force)", m.dir) + self.check_call(('umount', m.dir,)) + + def reporthook(blocks, bsz, sz): + if time.time() < self.nextUpdate: return + self.nextUpdate = time.time() + 0.25 + if sz: + pct = blocks * bsz * 100 / sz + sys.stderr.write("downloaded %d%% ...\r" % pct) + else: + icon = "|/-\\"[blocks % 4] + sys.stderr.write("downloading ... %s\r" % icon) + + p = tempfile.mktemp(prefix="installer-", + suffix=".bin") + try: + self.log.info("downloading installer from %s --> %s", + self.url, p) + self.nextUpdate = 0 + if os.isatty(sys.stdout.fileno()): + dst, headers = urllib.urlretrieve(self.url, p, reporthook) + else: + dst, headers = urllib.urlretrieve(self.url, p) + sys.stdout.write("\n") + + self.log.debug("+ chmod +x %s", p) + os.chmod(p, 0755) + + env = {} + env.update(os.environ) + + if os.path.exists("/etc/onl/platform"): + self.log.debug("enabling unzip features for ONL") + env['SFX_UNZIP'] = '1' + self.log.debug("+ export SFX_UNZIP=1") + env['SFX_LOOP'] = '1' + self.log.debug("+ export SFX_LOOP=1") + env['SFX_PIPE'] = '1' + self.log.debug("+ export SFX_PIPE=1") + + self.log.debug("enabling in-place fixups") + env['SFX_INPLACE'] = '1' + self.log.debug("+ export SFX_INPLACE=1") + + self.log.info("invoking installer...") + try: + self.check_call((p,), env=env) + except subprocess.CalledProcessError as ex: + self.log.error("installer failed") + return ex.returncode + finally: + os.unlink(p) + + self.log.info("please reboot this system now.") + return 0 + + def runLocal(self): + self.log.info("getting installer configuration") if os.path.exists(ConfUtils.MachineConf.PATH): self.machineConf = ConfUtils.MachineConf() @@ -100,6 +182,7 @@ class App(SubprocessMixin): platformConf=self.onlPlatform.platform_config, grubEnv=self.grubEnv, ubootEnv=self.ubootEnv, + force=self.force, log=self.log) try: code = self.installer.run() @@ -230,17 +313,33 @@ class App(SubprocessMixin): logger.addHandler(hnd) logger.propagate = False - debug = 'installer_debug' in os.environ - if debug: + onie_verbose = 'onie_verbose' in os.environ + installer_debug = 'installer_debug' in os.environ + + ap = argparse.ArgumentParser() + ap.add_argument('-v', '--verbose', action='store_true', + default=onie_verbose, + help="Enable verbose logging") + ap.add_argument('-D', '--debug', action='store_true', + default=installer_debug, + help="Enable python debugging") + ap.add_argument('-U', '--url', type=str, + help="Install from a remote URL") + ap.add_argument('-F', '--force', action='store_true', + help="Unmount filesystems before install") + ops = ap.parse_args() + + if ops.verbose: logger.setLevel(logging.DEBUG) - app = cls(log=logger) + app = cls(url=ops.url, force=ops.force, + log=logger) try: code = app.run() except: logger.exception("runner failed") code = 1 - if debug: + if ops.debug: app.post_mortem() app.shutdown() diff --git a/packages/base/all/vendor-config-onl/src/python/onl/install/BaseInstall.py b/packages/base/all/vendor-config-onl/src/python/onl/install/BaseInstall.py index 895a0876..da4c62ab 100644 --- a/packages/base/all/vendor-config-onl/src/python/onl/install/BaseInstall.py +++ b/packages/base/all/vendor-config-onl/src/python/onl/install/BaseInstall.py @@ -11,6 +11,8 @@ import logging import StringIO import parted import yaml +import zipfile +import shutil from InstallUtils import SubprocessMixin from InstallUtils import MountContext, BlkidParser, PartedParser @@ -44,6 +46,7 @@ class Base: def __init__(self, machineConf=None, installerConf=None, platformConf=None, grubEnv=None, ubootEnv=None, + force=False, log=None): self.im = self.installmeta(installerConf=installerConf, machineConf=machineConf, @@ -52,6 +55,9 @@ class Base: ubootEnv = ubootEnv) self.log = log or logging.getLogger(self.__class__.__name__) + self.force = False + # unmount filesystems as needed + self.device = None # target device, initialize this later @@ -69,16 +75,65 @@ class Base: self.configArchive = None # backup of ONL-CONFIG during re-partitioning + self.zf = None + # zipfile handle to installer archive + def run(self): self.log.error("not implemented") return 1 def shutdown(self): - pass + zf, self.zf = self.zf, None + if zf: zf.close() + + def installerCopy(self, basename, dst, optional=False): + """Copy the file as-is, or get it from the installer zip.""" + + src = os.path.join(self.im.installerConf.installer_dir, basename) + if os.path.exists(src): + self.copy2(src, dst) + return + + if basename in self.zf.namelist(): + self.log.debug("+ unzip -p %s %s > %s", + self.im.installerConf.installer_zip, basename, dst) + with self.zf.open(basename, "r") as rfd: + with open(dst, "wb") as wfd: + shutil.copyfileobj(rfd, wfd) + return + + if not optional: + raise ValueError("missing installer file %s" % basename) + + def installerDd(self, basename, device): + + p = os.path.join(self.im.installerConf.installer_dir, basename) + if os.path.exists(p): + cmd = ('dd', + 'if=' + basename, + 'of=' + device,) + self.check_call(cmd, vmode=self.V2) + return + + if basename in self.zf.namelist(): + self.log.debug("+ unzip -p %s %s | dd of=%s", + self.im.installerConf.installer_zip, basename, device) + with self.zf.open(basename, "r") as rfd: + with open(device, "rb+") as wfd: + shutil.copyfileobj(rfd, wfd) + return + + raise ValueError("cannot find file %s" % basename) + + def installerExists(self, basename): + if basename in os.listdir(self.im.installerConf.installer_dir): return True + if basename in self.zf.namelist(): return True + return False def installSwi(self): - swis = [x for x in os.listdir(self.im.installerConf.installer_dir) if x.endswith('.swi')] + files = os.listdir(self.im.installerConf.installer_dir) + self.zf.namelist() + swis = [x for x in files if x.endswith('.swi')] if not swis: self.log.info("No ONL Software Image available for installation.") self.log.info("Post-install ZTN installation will be required.") @@ -88,13 +143,12 @@ class Base: return base = swis[0] - src = os.path.join(self.im.installerConf.installer_dir, base) self.log.info("Installing ONL Software Image (%s)...", base) dev = self.blkidParts['ONL-IMAGES'] with MountContext(dev.device, log=self.log) as ctx: dst = os.path.join(ctx.dir, base) - self.copy2(src, dst) + self.installerCopy(base, dst) return 0 @@ -268,18 +322,18 @@ class Base: self.log.info("Installing boot-config to %s", dev.device) - src = os.path.join(self.im.installerConf.installer_dir, 'boot-config') - ##src = os.path.join(self.im.installerConf.installer_platform_dir, 'boot-config') + basename = 'boot-config' with MountContext(dev.device, log=self.log) as ctx: - dst = os.path.join(ctx.dir, 'boot-config') - self.copy2(src, dst) + dst = os.path.join(ctx.dir, basename) + self.installerCopy(basename, dst) + with open(dst) as fd: + buf = fd.read() - with open(src) as fd: - ecf = fd.read().encode('base64', 'strict').strip() - if self.im.grub and self.im.grubEnv is not None: - setattr(self.im.grubEnv, 'boot_config_default', ecf) - if self.im.uboot and self.im.ubootEnv is not None: - setattr(self.im.ubootEnv, 'boot-config-default', ecf) + ecf = buf.encode('base64', 'strict').strip() + if self.im.grub and self.im.grubEnv is not None: + setattr(self.im.grubEnv, 'boot_config_default', ecf) + if self.im.uboot and self.im.ubootEnv is not None: + setattr(self.im.ubootEnv, 'boot-config-default', ecf) return 0 @@ -288,9 +342,19 @@ class Base: pm = ProcMountsParser() for m in pm.mounts: if m.device.startswith(self.device): - self.log.error("mount %s on %s will be erased by install", - m.dir, m.device) - return 1 + if not self.force: + self.log.error("mount %s on %s will be erased by install", + m.dir, m.device) + return 1 + else: + self.log.warn("unmounting %s from %s (--force)", + m.dir, m.device) + try: + self.check_call(('umount', m.dir,)) + except subprocess.CalledProcessError: + self.log.error("cannot unmount") + return 1 + return 0 GRUB_TPL = """\ @@ -426,14 +490,15 @@ class GrubInstaller(SubprocessMixin, Base): self.log.info("Installing kernel") dev = self.blkidParts['ONL-BOOT'] + + files = set(os.listdir(self.im.installerConf.installer_dir) + self.zf.namelist()) + files = [b for b in files if b.startswith('kernel-') or b.startswith('onl-loader-initrd-')] + with MountContext(dev.device, log=self.log) as ctx: def _cp(b): - src = os.path.join(self.im.installerConf.installer_dir, b) - if not os.path.isfile(src): return - if b.startswith('kernel-') or b.startswith('onl-loader-initrd-'): - dst = os.path.join(ctx.dir, b) - self.copy2(src, dst) - [_cp(e) for e in os.listdir(self.im.installerConf.installer_dir)] + dst = os.path.join(ctx.dir, b) + self.installerCopy(b, dst, optional=True) + [_cp(e) for e in files] d = os.path.join(ctx.dir, "grub") self.makedirs(d) @@ -485,6 +550,11 @@ class GrubInstaller(SubprocessMixin, Base): self.im.grubEnv.__dict__['bootPart'] = dev.device self.im.grubEnv.__dict__['bootDir'] = None + # get a handle to the installer zip + p = os.path.join(self.im.installerConf.installer_dir, + self.im.installerConf.installer_zip) + self.zf = zipfile.ZipFile(p) + code = self.installSwi() if code: return code @@ -513,7 +583,7 @@ class GrubInstaller(SubprocessMixin, Base): return self.installGpt() def shutdown(self): - pass + Base.shutdown(self) class UbootInstaller(SubprocessMixin, Base): @@ -598,42 +668,37 @@ class UbootInstaller(SubprocessMixin, Base): def installLoader(self): - loaderSrc = None c1 = self.im.platformConf['flat_image_tree'].get('itb', None) if type(c1) == dict: c1 = c1.get('=', None) c2 = ("%s.itb" % (self.im.installerConf.installer_platform,)) c3 = "onl-loader-fit.itb" - loaderSrc = None + loaderBasename = None for c in (c1, c2, c3): if c is None: continue - p = os.path.join(self.im.installerConf.installer_dir, c) - if os.path.exists(p): - loaderSrc = p + if self.installerExists(c): + loaderBasename = c break - if not loaderSrc: + if not loaderBasename: self.log.error("The platform loader file is missing.") return 1 - self.log.info("Installing the ONL loader from %s...", loaderSrc) + self.log.info("Installing the ONL loader from %s...", loaderBasename) if self.rawLoaderDevice is not None: self.log.info("Installing ONL loader %s --> %s...", - loaderSrc, self.rawLoaderDevice) - cmd = ('dd', - 'if=' + loaderSrc, - 'of=' + self.rawLoaderDevice,) - self.check_call(cmd, vmode=self.V2) - else: - dev = self.blkidParts['ONL-BOOT'] - basename = os.path.split(loaderSrc)[1] - self.log.info("Installing ONL loader %s --> %s:%s...", - loaderSrc, dev.device, basename) - with MountContext(dev.device, log=self.log) as ctx: - dst = os.path.join(ctx.dir, basename) - self.copy2(loaderSrc, dst) + loaderBasename, self.rawLoaderDevice) + self.installerDd(loaderBasename, self.rawLoaderDevice) + return 0 + + dev = self.blkidParts['ONL-BOOT'] + self.log.info("Installing ONL loader %s --> %s:%s...", + loaderBasename, dev.device, loaderBasename) + with MountContext(dev.device, log=self.log) as ctx: + dst = os.path.join(ctx.dir, loaderBasename) + self.installerCopy(loaderBasename, dst) return 0 @@ -713,6 +778,11 @@ class UbootInstaller(SubprocessMixin, Base): self.rawLoaderDevice = self.device + str(partIdx+1) break + # get a handle to the installer zip + p = os.path.join(self.im.installerConf.installer_dir, + self.im.installerConf.installer_zip) + self.zf = zipfile.ZipFile(p) + code = self.installSwi() if code: return code @@ -744,4 +814,4 @@ class UbootInstaller(SubprocessMixin, Base): return self.installUboot() def shutdown(self): - pass + Base.shutdown(self) From bb1c556cc4e502c9a3465d491a7368740d599a09 Mon Sep 17 00:00:00 2001 From: "Carl D. Roth" Date: Wed, 11 May 2016 13:47:32 -0700 Subject: [PATCH 49/62] Better error handling for failed connections Export debug and verbosity settings --- .../src/python/onl/install/App.py | 17 +++++++++++++++-- 1 file changed, 15 insertions(+), 2 deletions(-) diff --git a/packages/base/all/vendor-config-onl/src/python/onl/install/App.py b/packages/base/all/vendor-config-onl/src/python/onl/install/App.py index 65968f4c..ad98eb1a 100644 --- a/packages/base/all/vendor-config-onl/src/python/onl/install/App.py +++ b/packages/base/all/vendor-config-onl/src/python/onl/install/App.py @@ -21,7 +21,9 @@ import ConfUtils, BaseInstall class App(SubprocessMixin): - def __init__(self, url=None, force=False, log=None): + def __init__(self, url=None, + debug=False, force=False, + log=None): if log is not None: self.log = log @@ -30,6 +32,7 @@ class App(SubprocessMixin): self.url = url self.force = force + self.debug = debug # remote-install mode self.installer = None @@ -98,6 +101,15 @@ class App(SubprocessMixin): env['SFX_INPLACE'] = '1' self.log.debug("+ export SFX_INPLACE=1") + if self.debug: + self.log.debug("enabling installer debug") + env['installer_debug'] = 'y' + self.log.debug("+ export installer_debug=y") + if self.log.level < logging.INFO: + self.log.debug("enabling installer verbose logging") + env['installer_verbose'] = 'y' + self.log.debug("+ export installer_verbose=y") + self.log.info("invoking installer...") try: self.check_call((p,), env=env) @@ -105,7 +117,8 @@ class App(SubprocessMixin): self.log.error("installer failed") return ex.returncode finally: - os.unlink(p) + if os.path.exists(p): + os.unlink(p) self.log.info("please reboot this system now.") return 0 From d2c7fc536a0f6cc3744b150e269c88081eba2078 Mon Sep 17 00:00:00 2001 From: "Carl D. Roth" Date: Wed, 11 May 2016 13:49:50 -0700 Subject: [PATCH 50/62] Updates for loader-based and onl-based installs - allow some SFX settings to be overridden - refactor checksum validation - support --inplace padding fixups to economize on disk space --- tools/mkshar | 23 +++++++++++---- tools/scripts/sfx.sh.in | 62 +++++++++++++++++++++++------------------ 2 files changed, 52 insertions(+), 33 deletions(-) diff --git a/tools/mkshar b/tools/mkshar index 138f2755..fa63795a 100755 --- a/tools/mkshar +++ b/tools/mkshar @@ -36,6 +36,9 @@ parser.add_option('--unzip-loop', parser.add_option('--unzip-pad', action='store_true', help="Special pad options for deficient unzip") +parser.add_option('--inplace', + action='store_true', + help="Perform fixups in-place") parser.add_option('--fixup-perms', type=str, help="Post-unpack shell script to fix permissions") @@ -142,6 +145,10 @@ def _splice(tag, val): line = line + ('#' * llen) buf = buf[:p] + line + buf[q:] +def _spliceMaybe(tag, val): + val = "${%s-\"%s\"}" % (tag, val,) + _splice(tag, val) + logger.info("prepping SFX") _splice('SFX_BYTES', len(buf)) @@ -153,23 +160,27 @@ if opts.lazy: else: _splice('SFX_LAZY', '') if opts.unzip_sfx: - _splice('SFX_UNZIP', '1') + _spliceMaybe('SFX_UNZIP', '1') else: - _splice('SFX_UNZIP', '') + _spliceMaybe('SFX_UNZIP', '') if opts.unzip_pipe: - _splice('SFX_PIPE', '1') + _spliceMaybe('SFX_PIPE', '1') else: - _splice('SFX_PIPE', '') + _spliceMaybe('SFX_PIPE', '') if opts.unzip_loop: - _splice('SFX_LOOP', '1') + _spliceMaybe('SFX_LOOP', '1') else: - _splice('SFX_LOOP', '') + _spliceMaybe('SFX_LOOP', '') if opts.unzip_pad: _splice('SFX_PAD', 'pad.bin') else: _splice('SFX_PAD', '') if opts.fixup_perms: _splice('SFX_PERMS', opts.fixup_perms) +if opts.inplace: + _spliceMaybe('SFX_INPLACE', '1') +else: + _spliceMaybe('SFX_INPLACE', '') # remember the checksum offset ckStart = buf.find("SFX_CHECKSUM=") diff --git a/tools/scripts/sfx.sh.in b/tools/scripts/sfx.sh.in index bd1598bc..43d4463f 100644 --- a/tools/scripts/sfx.sh.in +++ b/tools/scripts/sfx.sh.in @@ -4,7 +4,7 @@ set -e CMD=${0##*/} -UNZIP=/usr/bin/unzip +UNZIP=${UNZIP-"/usr/bin/unzip"} UNZIPOPTS= UNZIPARGS= @@ -29,9 +29,10 @@ SFX_INSTALL=install ## internal script in the payload to run ################# SFX_PERMS= ## internal script to correct file permissions #################### SFX_PAD= ## pad file (this payload) to skip during unpack #################### SFX_LAZY= ## set to '1' to defer extraction to SFX_INSTALL ################## -SFX_UNZIP=1 ## set to '' if this unzip cannot parse SFX headers ############# -SFX_LOOP=1 ## set to '' if this unzip cannot read from a loopback/block #### -SFX_PIPE=1 ## set to '' if this unzip cannot read from a pipe ############## +SFX_UNZIP=1 ## set to '' if this unzip cannot parse SFX headers ############## +SFX_LOOP=1 ## set to '' if this unzip cannot read from a loopback/block ###### +SFX_PIPE=1 ## set to '' if this unzip cannot read from a pipe ################ +SFX_INPLACE= ## set to '1' if this zip file can be modified in place########## if test "$SFX_PAD"; then UNZIPARGS=$UNZIPARGS${UNZIPARGS:+" "}"-x $SFX_PAD" @@ -100,6 +101,23 @@ do_cleanup() } trap "do_cleanup" 0 1 +echo "$CMD: computing checksum of original archive" +{ + dd if="$SHARABS" bs=$SFX_BLOCKSIZE count=$SFX_BLOCKS 2>/dev/null | sed -e "/^SFX_CHECKSUM=/d"; + dd if="$SHARABS" bs=$SFX_BLOCKSIZE skip=$SFX_BLOCKS 2>/dev/null +} | md5sum > "$workdir/ck" + +set dummy `cat "$workdir/ck"` +newck=$2 +rm -f "$workdir/ck" + +if test "$SFX_CHECKSUM" = "$newck"; then + echo "$CMD: checksum is OK" +else + echo "$CMD: *** checksum mismatch" 1>&2 + exit 1 +fi + _t() { local c z @@ -144,11 +162,19 @@ case "$SFX_PAD:$SFX_UNZIP:$SFX_LOOP:$SFX_PIPE" in esac if test "$SFX_PAD"; then - echo "$CMD: copying file and resetting pad" - cp "$SHARABS" $workdir/onie-installer.zip - dd if="$SHARABS" of=$workdir/onie-installer.zip bs=512 skip=$(($SFX_BLOCKS-1)) count=1 conv=notrunc - _CAT=":" - _ZIP="$workdir/onie-installer.zip" + echo "$CMD: extracting pad" + dd if="$SHARABS" of=$workdir/zip.bin bs=512 skip=$(($SFX_BLOCKS-1)) count=1 + if test "$SFX_INPLACE"; then + _CAT=":" + _ZIP="$SHARABS" + else + echo "$CMD: copying file before resetting pad" + cp "$SHARABS" $workdir/onie-installer.zip + _CAT=":" + _ZIP="$workdir/onie-installer.zip" + fi + echo "$CMD: resetting pad" + dd if="$workdir/zip.bin" of="$_ZIP" bs=512 count=1 conv=notrunc elif test "$SFX_UNZIP"; then echo "$CMD: processing SFX with unzip" _CAT=":" @@ -209,24 +235,6 @@ case "$banner" in ;; esac -echo "$CMD: computing checksum" -{ - dd if="$SHARABS" bs=$SFX_BLOCKSIZE count=$SFX_BLOCKS 2>/dev/null | sed -e "/^SFX_CHECKSUM=/d"; - dd if="$SHARABS" bs=$SFX_BLOCKSIZE skip=$SFX_BLOCKS 2>/dev/null -} | md5sum > "$UNZIPDIR/ck" - -set dummy `cat "$UNZIPDIR/ck"` -newck=$2 - -rm -f "$UNZIPDIR/ck" - -if test "$SFX_CHECKSUM" = "$newck"; then - echo "$CMD: checksum is OK" -else - echo "$CMD: *** checksum mismatch" 1>&2 - exit 1 -fi - shardir=`dirname $0` shardir=`cd $shardir && pwd` From 2915cbb35be51f51eab0ffd493b2163188dd3444 Mon Sep 17 00:00:00 2001 From: "Carl D. Roth" Date: Wed, 11 May 2016 13:56:40 -0700 Subject: [PATCH 51/62] Minor tmpfs fixes - don't unmount /tmp - fix bind-mount target so chroot can see the installer file --- builds/any/installer/new-hotness/installer.sh.in | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/builds/any/installer/new-hotness/installer.sh.in b/builds/any/installer/new-hotness/installer.sh.in index b7ada262..050290bc 100644 --- a/builds/any/installer/new-hotness/installer.sh.in +++ b/builds/any/installer/new-hotness/installer.sh.in @@ -190,7 +190,7 @@ installer_umount() { tdir=${TMPDIR-"/tmp"} for mpt in $(cat /proc/mounts | cut -d' ' -f2 | sort -r); do case "$mpt" in - "$tdir"|"$tdir"/*) + "$tdir"/*) installer_say "Unmounting $mpt" umount "$mpt" ;; @@ -215,16 +215,18 @@ installer_umount() { installer_say "Remounting $installer_tmpfs with options $installer_tmpfs_opts" mount -o remount,$installer_tmpfs_opts $installer_tmpfs - else + elif test "$installer_tmpfs" != "/tmp"; then # else unmount if still mounted installer_say "Unmounting $installer_tmpfs" umount "$installer_tmpfs" + rmdir "$installer_tmpfs" fi fi + fi cd $cwd || : @@ -428,9 +430,9 @@ case "$installer_zip" in echo "installer_zip=\"${installer_zip##*/}\"" >> "${rootdir}/etc/onl/installer.conf" ;; *) - zf=$(mktemp "$installer_dir/installer-zip-XXXXXX") - installer_say "Exposing installer archive as $zf" - mount -o bind "$installer_zip" $zf + zf=$(mktemp "$rootdir/mnt/installer/installer-zip-XXXXXX") + installer_say "Exposing installer archive $installer_zip as $zf" + mount --bind "$installer_zip" $zf echo "installer_zip=\"${zf##*/}\"" >> "${rootdir}/etc/onl/installer.conf" ;; esac From 19a8e75036670bc6b60d4ba186571005adc6089a Mon Sep 17 00:00:00 2001 From: "Carl D. Roth" Date: Wed, 11 May 2016 13:57:22 -0700 Subject: [PATCH 52/62] Optionally mount tmpfs within the loader - XXX DANGER @jnealtowns be advised --- .../base/all/initrds/loader-initrd-files/src/bin/sysinit | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/packages/base/all/initrds/loader-initrd-files/src/bin/sysinit b/packages/base/all/initrds/loader-initrd-files/src/bin/sysinit index 6c255b85..f859a4a6 100755 --- a/packages/base/all/initrds/loader-initrd-files/src/bin/sysinit +++ b/packages/base/all/initrds/loader-initrd-files/src/bin/sysinit @@ -36,7 +36,12 @@ trap "restoreconsole; reboot -f" EXIT mount -t proc proc /proc mount -t sysfs sysfs /sys mount -o remount,size=1M /dev - +case "$(stat -f -c "%T" /tmp)" in + tmpfs|ramfs) ;; + *) + mount -t tmpfs tmpfs /tmp + ;; +esac # Grab cmdline settings From 3d8a473b65a476f576c5b639dc60a69c1031d01d Mon Sep 17 00:00:00 2001 From: Lewis Kang Date: Thu, 12 May 2016 18:20:31 +0800 Subject: [PATCH 53/62] support installing NOS to where ONIE image resides while block device is not specified this fixes the issue when an external USB disk is inserted before powering on the switch that may change the device name of the expected installation destination (e.g. /dev/sdb becomes /dev/sdc) --- builds/amd64/installer/legacy/builds/amd64-installer.sh | 9 +++++++++ .../r0/src/lib/install/x86-64-accton-as7712-32x-r0.sh | 2 +- .../r0/src/lib/install/x86-64-accton-as7716-32x-r0.sh | 2 +- 3 files changed, 11 insertions(+), 2 deletions(-) diff --git a/builds/amd64/installer/legacy/builds/amd64-installer.sh b/builds/amd64/installer/legacy/builds/amd64-installer.sh index 86accc8f..6a92de78 100644 --- a/builds/amd64/installer/legacy/builds/amd64-installer.sh +++ b/builds/amd64/installer/legacy/builds/amd64-installer.sh @@ -275,6 +275,15 @@ partition_gpt() installer_standard_gpt_install() { DEV=$1; shift + + if [ -z $DEV ]; then + # Install on the same block device as ONIE + DEV=$(blkid | grep ONIE-BOOT | awk '{print $1}' | sed -e 's/[1-9][0-9]*:.*$//' | sed -e 's/\([0-9]\)\(p\)/\1/' | head -n 1) + [ -b "$DEV" ] || { + echo "Error: Unable to determine block device of ONIE install" + return 1 + } + fi visit_parted $DEV do_handle_disk do_handle_partitions || return 1 partition_gpt $(get_free_space) || return 1 diff --git a/packages/platforms/accton/x86-64/x86-64-accton-as7712-32x/platform-config/r0/src/lib/install/x86-64-accton-as7712-32x-r0.sh b/packages/platforms/accton/x86-64/x86-64-accton-as7712-32x/platform-config/r0/src/lib/install/x86-64-accton-as7712-32x-r0.sh index b964838f..f30823a2 100644 --- a/packages/platforms/accton/x86-64/x86-64-accton-as7712-32x/platform-config/r0/src/lib/install/x86-64-accton-as7712-32x-r0.sh +++ b/packages/platforms/accton/x86-64/x86-64-accton-as7712-32x/platform-config/r0/src/lib/install/x86-64-accton-as7712-32x-r0.sh @@ -11,5 +11,5 @@ platform_installer() { # Standard isntallation to an available GPT partition - installer_standard_gpt_install /dev/sdb + installer_standard_gpt_install } diff --git a/packages/platforms/accton/x86-64/x86-64-accton-as7716-32x/platform-config/r0/src/lib/install/x86-64-accton-as7716-32x-r0.sh b/packages/platforms/accton/x86-64/x86-64-accton-as7716-32x/platform-config/r0/src/lib/install/x86-64-accton-as7716-32x-r0.sh index b964838f..f30823a2 100644 --- a/packages/platforms/accton/x86-64/x86-64-accton-as7716-32x/platform-config/r0/src/lib/install/x86-64-accton-as7716-32x-r0.sh +++ b/packages/platforms/accton/x86-64/x86-64-accton-as7716-32x/platform-config/r0/src/lib/install/x86-64-accton-as7716-32x-r0.sh @@ -11,5 +11,5 @@ platform_installer() { # Standard isntallation to an available GPT partition - installer_standard_gpt_install /dev/sdb + installer_standard_gpt_install } From 04414276f3428c8ca52924d665afe7b68d59ab98 Mon Sep 17 00:00:00 2001 From: Lewis Kang Date: Fri, 13 May 2016 09:38:32 +0800 Subject: [PATCH 54/62] modify the comment and error message --- builds/amd64/installer/legacy/builds/amd64-installer.sh | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/builds/amd64/installer/legacy/builds/amd64-installer.sh b/builds/amd64/installer/legacy/builds/amd64-installer.sh index 6a92de78..c2427083 100644 --- a/builds/amd64/installer/legacy/builds/amd64-installer.sh +++ b/builds/amd64/installer/legacy/builds/amd64-installer.sh @@ -277,10 +277,10 @@ installer_standard_gpt_install() DEV=$1; shift if [ -z $DEV ]; then - # Install on the same block device as ONIE + # Install NOS to the same block device as ONIE image DEV=$(blkid | grep ONIE-BOOT | awk '{print $1}' | sed -e 's/[1-9][0-9]*:.*$//' | sed -e 's/\([0-9]\)\(p\)/\1/' | head -n 1) [ -b "$DEV" ] || { - echo "Error: Unable to determine block device of ONIE install" + echo "Error: Unable to determine the block device to install NOS" return 1 } fi From 2c74660aa97b738ec9157666c8b9b5a980f199ef Mon Sep 17 00:00:00 2001 From: Lewis Kang Date: Fri, 13 May 2016 11:18:19 +0800 Subject: [PATCH 55/62] if error -> exit 1 --- builds/amd64/installer/legacy/builds/amd64-installer.sh | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/builds/amd64/installer/legacy/builds/amd64-installer.sh b/builds/amd64/installer/legacy/builds/amd64-installer.sh index c2427083..5eac7de1 100644 --- a/builds/amd64/installer/legacy/builds/amd64-installer.sh +++ b/builds/amd64/installer/legacy/builds/amd64-installer.sh @@ -281,7 +281,7 @@ installer_standard_gpt_install() DEV=$(blkid | grep ONIE-BOOT | awk '{print $1}' | sed -e 's/[1-9][0-9]*:.*$//' | sed -e 's/\([0-9]\)\(p\)/\1/' | head -n 1) [ -b "$DEV" ] || { echo "Error: Unable to determine the block device to install NOS" - return 1 + exit 1 } fi From bac2e2cdc191f9cc25360f111c94514b637ca97a Mon Sep 17 00:00:00 2001 From: Steven Noble Date: Fri, 13 May 2016 05:17:07 +0000 Subject: [PATCH 56/62] updated 3.18 kernel to include AUFS and other options --- .../configs/x86_64-all/x86_64-all.config | 88 +- .../any/kernels/3.18.25/patches/aufs.patch | 33877 ++++++++++++++++ .../base/any/kernels/3.18.25/patches/series | 1 + 3 files changed, 33941 insertions(+), 25 deletions(-) create mode 100644 packages/base/any/kernels/3.18.25/patches/aufs.patch create mode 100644 packages/base/any/kernels/3.18.25/patches/series diff --git a/packages/base/any/kernels/3.18.25/configs/x86_64-all/x86_64-all.config b/packages/base/any/kernels/3.18.25/configs/x86_64-all/x86_64-all.config index 0f87091b..38eda785 100644 --- a/packages/base/any/kernels/3.18.25/configs/x86_64-all/x86_64-all.config +++ b/packages/base/any/kernels/3.18.25/configs/x86_64-all/x86_64-all.config @@ -1,6 +1,6 @@ # # Automatically generated file; DO NOT EDIT. -# Linux/x86_64 3.18.25 Kernel Configuration +# Linux/x86 3.18.25 Kernel Configuration # CONFIG_64BIT=y CONFIG_X86_64=y @@ -772,10 +772,11 @@ CONFIG_BRIDGE_NETFILTER=y # Core Netfilter Configuration # CONFIG_NETFILTER_NETLINK=y -# CONFIG_NETFILTER_NETLINK_ACCT is not set +CONFIG_NETFILTER_NETLINK_ACCT=y CONFIG_NETFILTER_NETLINK_QUEUE=y CONFIG_NETFILTER_NETLINK_LOG=y CONFIG_NF_CONNTRACK=y +CONFIG_NF_LOG_COMMON=y CONFIG_NF_CONNTRACK_MARK=y CONFIG_NF_CONNTRACK_SECMARK=y CONFIG_NF_CONNTRACK_ZONES=y @@ -783,6 +784,7 @@ CONFIG_NF_CONNTRACK_PROCFS=y CONFIG_NF_CONNTRACK_EVENTS=y # CONFIG_NF_CONNTRACK_TIMEOUT is not set CONFIG_NF_CONNTRACK_TIMESTAMP=y +CONFIG_NF_CONNTRACK_LABELS=y CONFIG_NF_CT_PROTO_DCCP=y CONFIG_NF_CT_PROTO_GRE=y CONFIG_NF_CT_PROTO_SCTP=y @@ -799,8 +801,9 @@ CONFIG_NF_CONNTRACK_SANE=y CONFIG_NF_CONNTRACK_SIP=y CONFIG_NF_CONNTRACK_TFTP=y CONFIG_NF_CT_NETLINK=y -# CONFIG_NF_CT_NETLINK_TIMEOUT is not set -# CONFIG_NETFILTER_NETLINK_QUEUE_CT is not set +CONFIG_NF_CT_NETLINK_TIMEOUT=y +CONFIG_NF_CT_NETLINK_HELPER=y +CONFIG_NETFILTER_NETLINK_QUEUE_CT=y CONFIG_NF_NAT=y CONFIG_NF_NAT_NEEDED=y CONFIG_NF_NAT_PROTO_DCCP=y @@ -832,17 +835,17 @@ CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=y CONFIG_NETFILTER_XT_TARGET_CT=y CONFIG_NETFILTER_XT_TARGET_DSCP=y CONFIG_NETFILTER_XT_TARGET_HL=y -# CONFIG_NETFILTER_XT_TARGET_HMARK is not set +CONFIG_NETFILTER_XT_TARGET_HMARK=y CONFIG_NETFILTER_XT_TARGET_IDLETIMER=y -# CONFIG_NETFILTER_XT_TARGET_LOG is not set +CONFIG_NETFILTER_XT_TARGET_LOG=y CONFIG_NETFILTER_XT_TARGET_MARK=y CONFIG_NETFILTER_XT_NAT=y -# CONFIG_NETFILTER_XT_TARGET_NETMAP is not set +CONFIG_NETFILTER_XT_TARGET_NETMAP=y CONFIG_NETFILTER_XT_TARGET_NFLOG=y CONFIG_NETFILTER_XT_TARGET_NFQUEUE=y CONFIG_NETFILTER_XT_TARGET_NOTRACK=y CONFIG_NETFILTER_XT_TARGET_RATEEST=y -# CONFIG_NETFILTER_XT_TARGET_REDIRECT is not set +CONFIG_NETFILTER_XT_TARGET_REDIRECT=y CONFIG_NETFILTER_XT_TARGET_TEE=y CONFIG_NETFILTER_XT_TARGET_TPROXY=y CONFIG_NETFILTER_XT_TARGET_TRACE=y @@ -854,12 +857,12 @@ CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP=y # Xtables matches # CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=y -# CONFIG_NETFILTER_XT_MATCH_BPF is not set -# CONFIG_NETFILTER_XT_MATCH_CGROUP is not set +CONFIG_NETFILTER_XT_MATCH_BPF=y +CONFIG_NETFILTER_XT_MATCH_CGROUP=y CONFIG_NETFILTER_XT_MATCH_CLUSTER=y CONFIG_NETFILTER_XT_MATCH_COMMENT=y CONFIG_NETFILTER_XT_MATCH_CONNBYTES=y -# CONFIG_NETFILTER_XT_MATCH_CONNLABEL is not set +CONFIG_NETFILTER_XT_MATCH_CONNLABEL=y CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=y CONFIG_NETFILTER_XT_MATCH_CONNMARK=y CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y @@ -872,20 +875,20 @@ CONFIG_NETFILTER_XT_MATCH_ESP=y CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=y CONFIG_NETFILTER_XT_MATCH_HELPER=y CONFIG_NETFILTER_XT_MATCH_HL=y -# CONFIG_NETFILTER_XT_MATCH_IPCOMP is not set +CONFIG_NETFILTER_XT_MATCH_IPCOMP=y CONFIG_NETFILTER_XT_MATCH_IPRANGE=y CONFIG_NETFILTER_XT_MATCH_IPVS=y -# CONFIG_NETFILTER_XT_MATCH_L2TP is not set +CONFIG_NETFILTER_XT_MATCH_L2TP=y CONFIG_NETFILTER_XT_MATCH_LENGTH=y CONFIG_NETFILTER_XT_MATCH_LIMIT=y CONFIG_NETFILTER_XT_MATCH_MAC=y CONFIG_NETFILTER_XT_MATCH_MARK=y CONFIG_NETFILTER_XT_MATCH_MULTIPORT=y -# CONFIG_NETFILTER_XT_MATCH_NFACCT is not set +CONFIG_NETFILTER_XT_MATCH_NFACCT=y CONFIG_NETFILTER_XT_MATCH_OSF=y CONFIG_NETFILTER_XT_MATCH_OWNER=y CONFIG_NETFILTER_XT_MATCH_POLICY=y -# CONFIG_NETFILTER_XT_MATCH_PHYSDEV is not set +CONFIG_NETFILTER_XT_MATCH_PHYSDEV=y CONFIG_NETFILTER_XT_MATCH_PKTTYPE=y CONFIG_NETFILTER_XT_MATCH_QUOTA=y CONFIG_NETFILTER_XT_MATCH_RATEEST=y @@ -965,7 +968,7 @@ CONFIG_NF_DEFRAG_IPV4=y CONFIG_NF_CONNTRACK_IPV4=y CONFIG_NF_CONNTRACK_PROC_COMPAT=y # CONFIG_NF_LOG_ARP is not set -# CONFIG_NF_LOG_IPV4 is not set +CONFIG_NF_LOG_IPV4=y CONFIG_NF_REJECT_IPV4=y CONFIG_NF_NAT_IPV4=y CONFIG_NF_NAT_MASQUERADE_IPV4=y @@ -1000,7 +1003,7 @@ CONFIG_IP_NF_ARP_MANGLE=y CONFIG_NF_DEFRAG_IPV6=y CONFIG_NF_CONNTRACK_IPV6=y CONFIG_NF_REJECT_IPV6=y -# CONFIG_NF_LOG_IPV6 is not set +CONFIG_NF_LOG_IPV6=y # CONFIG_NF_NAT_IPV6 is not set CONFIG_IP6_NF_IPTABLES=y CONFIG_IP6_NF_MATCH_AH=y @@ -1019,7 +1022,27 @@ CONFIG_IP6_NF_TARGET_REJECT=y CONFIG_IP6_NF_MANGLE=y CONFIG_IP6_NF_RAW=y # CONFIG_IP6_NF_NAT is not set -# CONFIG_BRIDGE_NF_EBTABLES is not set +CONFIG_BRIDGE_NF_EBTABLES=y +CONFIG_BRIDGE_EBT_BROUTE=y +CONFIG_BRIDGE_EBT_T_FILTER=y +CONFIG_BRIDGE_EBT_T_NAT=y +CONFIG_BRIDGE_EBT_802_3=y +CONFIG_BRIDGE_EBT_AMONG=y +CONFIG_BRIDGE_EBT_ARP=y +CONFIG_BRIDGE_EBT_IP=y +CONFIG_BRIDGE_EBT_IP6=y +CONFIG_BRIDGE_EBT_LIMIT=y +CONFIG_BRIDGE_EBT_MARK=y +CONFIG_BRIDGE_EBT_PKTTYPE=y +CONFIG_BRIDGE_EBT_STP=y +CONFIG_BRIDGE_EBT_VLAN=y +CONFIG_BRIDGE_EBT_ARPREPLY=y +CONFIG_BRIDGE_EBT_DNAT=y +CONFIG_BRIDGE_EBT_MARK_T=y +CONFIG_BRIDGE_EBT_REDIRECT=y +CONFIG_BRIDGE_EBT_SNAT=y +CONFIG_BRIDGE_EBT_LOG=y +CONFIG_BRIDGE_EBT_NFLOG=y # CONFIG_IP_DCCP is not set CONFIG_IP_SCTP=y # CONFIG_SCTP_DBG_OBJCNT is not set @@ -1035,14 +1058,14 @@ CONFIG_SCTP_COOKIE_HMAC_MD5=y CONFIG_STP=y CONFIG_BRIDGE=y CONFIG_BRIDGE_IGMP_SNOOPING=y -# CONFIG_BRIDGE_VLAN_FILTERING is not set +CONFIG_BRIDGE_VLAN_FILTERING=y CONFIG_HAVE_NET_DSA=y CONFIG_VLAN_8021Q=y # CONFIG_VLAN_8021Q_GVRP is not set # CONFIG_VLAN_8021Q_MVRP is not set # CONFIG_DECNET is not set CONFIG_LLC=y -# CONFIG_LLC2 is not set +CONFIG_LLC2=y # CONFIG_IPX is not set # CONFIG_ATALK is not set # CONFIG_X25 is not set @@ -1056,15 +1079,15 @@ CONFIG_DNS_RESOLVER=y # CONFIG_BATMAN_ADV is not set # CONFIG_OPENVSWITCH is not set # CONFIG_VSOCKETS is not set -# CONFIG_NETLINK_MMAP is not set -# CONFIG_NETLINK_DIAG is not set +CONFIG_NETLINK_MMAP=y +CONFIG_NETLINK_DIAG=y # CONFIG_NET_MPLS_GSO is not set # CONFIG_HSR is not set CONFIG_RPS=y CONFIG_RFS_ACCEL=y CONFIG_XPS=y # CONFIG_CGROUP_NET_PRIO is not set -# CONFIG_CGROUP_NET_CLASSID is not set +CONFIG_CGROUP_NET_CLASSID=y CONFIG_NET_RX_BUSY_POLL=y CONFIG_BQL=y # CONFIG_BPF_JIT is not set @@ -1173,7 +1196,7 @@ CONFIG_BLK_DEV_RAM_SIZE=65536 # # CONFIG_SENSORS_LIS3LV02D is not set # CONFIG_AD525X_DPOT is not set -# CONFIG_DUMMY_IRQ is not set +CONFIG_DUMMY_IRQ=y # CONFIG_IBM_ASM is not set # CONFIG_PHANTOM is not set # CONFIG_SGI_IOC4 is not set @@ -1486,7 +1509,7 @@ CONFIG_NETDEVICES=y CONFIG_MII=y CONFIG_NET_CORE=y # CONFIG_BONDING is not set -# CONFIG_DUMMY is not set +CONFIG_DUMMY=y # CONFIG_EQUALIZER is not set # CONFIG_NET_FC is not set # CONFIG_NET_TEAM is not set @@ -3007,6 +3030,21 @@ CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 # CONFIG_UFS_FS is not set # CONFIG_EXOFS_FS is not set # CONFIG_F2FS_FS is not set +CONFIG_AUFS_FS=y +CONFIG_AUFS_BRANCH_MAX_127=y +# CONFIG_AUFS_BRANCH_MAX_511 is not set +# CONFIG_AUFS_BRANCH_MAX_1023 is not set +# CONFIG_AUFS_BRANCH_MAX_32767 is not set +CONFIG_AUFS_SBILIST=y +# CONFIG_AUFS_HNOTIFY is not set +# CONFIG_AUFS_EXPORT is not set +# CONFIG_AUFS_XATTR is not set +# CONFIG_AUFS_FHSM is not set +# CONFIG_AUFS_RDU is not set +# CONFIG_AUFS_SHWH is not set +# CONFIG_AUFS_BR_RAMFS is not set +CONFIG_AUFS_BDEV_LOOP=y +# CONFIG_AUFS_DEBUG is not set CONFIG_ORE=y CONFIG_NETWORK_FILESYSTEMS=y CONFIG_NFS_FS=y diff --git a/packages/base/any/kernels/3.18.25/patches/aufs.patch b/packages/base/any/kernels/3.18.25/patches/aufs.patch new file mode 100644 index 00000000..b0dd85d1 --- /dev/null +++ b/packages/base/any/kernels/3.18.25/patches/aufs.patch @@ -0,0 +1,33877 @@ +From 9da2de12351d9d38412a0074d49efaf3c5bf6f3f Mon Sep 17 00:00:00 2001 +From: Steven Noble +Date: Thu, 12 May 2016 21:42:28 +0000 +Subject: [PATCH] AUFS patches applied + +--- + MAINTAINERS | 14 + + drivers/block/loop.c | 18 + + fs/Kconfig | 1 + + fs/Makefile | 1 + + fs/aufs/Kconfig | 185 ++++ + fs/aufs/Makefile | 44 + + fs/aufs/aufs.h | 59 ++ + fs/aufs/branch.c | 1402 ++++++++++++++++++++++++++++++ + fs/aufs/branch.h | 279 ++++++ + fs/aufs/conf.mk | 38 + + fs/aufs/cpup.c | 1368 +++++++++++++++++++++++++++++ + fs/aufs/cpup.h | 94 ++ + fs/aufs/dbgaufs.c | 432 +++++++++ + fs/aufs/dbgaufs.h | 48 + + fs/aufs/dcsub.c | 224 +++++ + fs/aufs/dcsub.h | 123 +++ + fs/aufs/debug.c | 436 ++++++++++ + fs/aufs/debug.h | 228 +++++ + fs/aufs/dentry.c | 1129 ++++++++++++++++++++++++ + fs/aufs/dentry.h | 234 +++++ + fs/aufs/dinfo.c | 544 ++++++++++++ + fs/aufs/dir.c | 756 ++++++++++++++++ + fs/aufs/dir.h | 131 +++ + fs/aufs/dynop.c | 379 ++++++++ + fs/aufs/dynop.h | 76 ++ + fs/aufs/export.c | 831 ++++++++++++++++++ + fs/aufs/f_op.c | 781 +++++++++++++++++ + fs/aufs/fhsm.c | 426 +++++++++ + fs/aufs/file.c | 857 ++++++++++++++++++ + fs/aufs/file.h | 291 +++++++ + fs/aufs/finfo.c | 156 ++++ + fs/aufs/fstype.h | 400 +++++++++ + fs/aufs/hfsnotify.c | 288 ++++++ + fs/aufs/hfsplus.c | 56 ++ + fs/aufs/hnotify.c | 714 +++++++++++++++ + fs/aufs/i_op.c | 1460 +++++++++++++++++++++++++++++++ + fs/aufs/i_op_add.c | 930 ++++++++++++++++++++ + fs/aufs/i_op_del.c | 506 +++++++++++ + fs/aufs/i_op_ren.c | 1013 ++++++++++++++++++++++ + fs/aufs/iinfo.c | 277 ++++++ + fs/aufs/inode.c | 522 +++++++++++ + fs/aufs/inode.h | 686 +++++++++++++++ + fs/aufs/ioctl.c | 219 +++++ + fs/aufs/loop.c | 146 ++++ + fs/aufs/loop.h | 52 ++ + fs/aufs/magic.mk | 30 + + fs/aufs/module.c | 222 +++++ + fs/aufs/module.h | 105 +++ + fs/aufs/mvdown.c | 703 +++++++++++++++ + fs/aufs/opts.c | 1878 ++++++++++++++++++++++++++++++++++++++++ + fs/aufs/opts.h | 212 +++++ + fs/aufs/plink.c | 506 +++++++++++ + fs/aufs/poll.c | 52 ++ + fs/aufs/posix_acl.c | 98 +++ + fs/aufs/procfs.c | 169 ++++ + fs/aufs/rdu.c | 388 +++++++++ + fs/aufs/rwsem.h | 191 ++++ + fs/aufs/sbinfo.c | 348 ++++++++ + fs/aufs/spl.h | 111 +++ + fs/aufs/super.c | 1041 ++++++++++++++++++++++ + fs/aufs/super.h | 626 ++++++++++++++ + fs/aufs/sysaufs.c | 104 +++ + fs/aufs/sysaufs.h | 101 +++ + fs/aufs/sysfs.c | 376 ++++++++ + fs/aufs/sysrq.c | 157 ++++ + fs/aufs/vdir.c | 888 +++++++++++++++++++ + fs/aufs/vfsub.c | 864 ++++++++++++++++++ + fs/aufs/vfsub.h | 315 +++++++ + fs/aufs/wbr_policy.c | 765 ++++++++++++++++ + fs/aufs/whout.c | 1061 +++++++++++++++++++++++ + fs/aufs/whout.h | 85 ++ + fs/aufs/wkq.c | 213 +++++ + fs/aufs/wkq.h | 91 ++ + fs/aufs/xattr.c | 344 ++++++++ + fs/aufs/xino.c | 1343 ++++++++++++++++++++++++++++ + fs/buffer.c | 2 +- + fs/dcache.c | 2 +- + fs/fcntl.c | 4 +- + fs/inode.c | 2 +- + fs/proc/base.c | 2 +- + fs/proc/nommu.c | 5 +- + fs/proc/task_mmu.c | 7 +- + fs/proc/task_nommu.c | 5 +- + fs/splice.c | 10 +- + include/linux/file.h | 1 + + include/linux/fs.h | 3 + + include/linux/mm.h | 22 + + include/linux/mm_types.h | 2 + + include/linux/splice.h | 6 + + include/uapi/linux/Kbuild | 1 + + include/uapi/linux/aufs_type.h | 419 +++++++++ + kernel/fork.c | 2 +- + mm/Makefile | 2 +- + mm/filemap.c | 2 +- + mm/fremap.c | 16 +- + mm/memory.c | 2 +- + mm/mmap.c | 12 +- + mm/nommu.c | 10 +- + mm/prfile.c | 86 ++ + 99 files changed, 32835 insertions(+), 31 deletions(-) + create mode 100644 fs/aufs/Kconfig + create mode 100644 fs/aufs/Makefile + create mode 100644 fs/aufs/aufs.h + create mode 100644 fs/aufs/branch.c + create mode 100644 fs/aufs/branch.h + create mode 100644 fs/aufs/conf.mk + create mode 100644 fs/aufs/cpup.c + create mode 100644 fs/aufs/cpup.h + create mode 100644 fs/aufs/dbgaufs.c + create mode 100644 fs/aufs/dbgaufs.h + create mode 100644 fs/aufs/dcsub.c + create mode 100644 fs/aufs/dcsub.h + create mode 100644 fs/aufs/debug.c + create mode 100644 fs/aufs/debug.h + create mode 100644 fs/aufs/dentry.c + create mode 100644 fs/aufs/dentry.h + create mode 100644 fs/aufs/dinfo.c + create mode 100644 fs/aufs/dir.c + create mode 100644 fs/aufs/dir.h + create mode 100644 fs/aufs/dynop.c + create mode 100644 fs/aufs/dynop.h + create mode 100644 fs/aufs/export.c + create mode 100644 fs/aufs/f_op.c + create mode 100644 fs/aufs/fhsm.c + create mode 100644 fs/aufs/file.c + create mode 100644 fs/aufs/file.h + create mode 100644 fs/aufs/finfo.c + create mode 100644 fs/aufs/fstype.h + create mode 100644 fs/aufs/hfsnotify.c + create mode 100644 fs/aufs/hfsplus.c + create mode 100644 fs/aufs/hnotify.c + create mode 100644 fs/aufs/i_op.c + create mode 100644 fs/aufs/i_op_add.c + create mode 100644 fs/aufs/i_op_del.c + create mode 100644 fs/aufs/i_op_ren.c + create mode 100644 fs/aufs/iinfo.c + create mode 100644 fs/aufs/inode.c + create mode 100644 fs/aufs/inode.h + create mode 100644 fs/aufs/ioctl.c + create mode 100644 fs/aufs/loop.c + create mode 100644 fs/aufs/loop.h + create mode 100644 fs/aufs/magic.mk + create mode 100644 fs/aufs/module.c + create mode 100644 fs/aufs/module.h + create mode 100644 fs/aufs/mvdown.c + create mode 100644 fs/aufs/opts.c + create mode 100644 fs/aufs/opts.h + create mode 100644 fs/aufs/plink.c + create mode 100644 fs/aufs/poll.c + create mode 100644 fs/aufs/posix_acl.c + create mode 100644 fs/aufs/procfs.c + create mode 100644 fs/aufs/rdu.c + create mode 100644 fs/aufs/rwsem.h + create mode 100644 fs/aufs/sbinfo.c + create mode 100644 fs/aufs/spl.h + create mode 100644 fs/aufs/super.c + create mode 100644 fs/aufs/super.h + create mode 100644 fs/aufs/sysaufs.c + create mode 100644 fs/aufs/sysaufs.h + create mode 100644 fs/aufs/sysfs.c + create mode 100644 fs/aufs/sysrq.c + create mode 100644 fs/aufs/vdir.c + create mode 100644 fs/aufs/vfsub.c + create mode 100644 fs/aufs/vfsub.h + create mode 100644 fs/aufs/wbr_policy.c + create mode 100644 fs/aufs/whout.c + create mode 100644 fs/aufs/whout.h + create mode 100644 fs/aufs/wkq.c + create mode 100644 fs/aufs/wkq.h + create mode 100644 fs/aufs/xattr.c + create mode 100644 fs/aufs/xino.c + create mode 100644 include/uapi/linux/aufs_type.h + create mode 100644 mm/prfile.c + +diff --git a/MAINTAINERS b/MAINTAINERS +index c721042..83801d0 100644 +--- a/MAINTAINERS ++++ b/MAINTAINERS +@@ -1795,6 +1795,20 @@ F: include/linux/audit.h + F: include/uapi/linux/audit.h + F: kernel/audit* + ++AUFS (advanced multi layered unification filesystem) FILESYSTEM ++M: "J. R. Okajima" ++L: linux-unionfs@vger.kernel.org ++L: aufs-users@lists.sourceforge.net (members only) ++W: http://aufs.sourceforge.net ++T: git://git.code.sf.net/p/aufs/aufs3-linux ++T: git://github.com/sfjro/aufs3-linux.git ++S: Supported ++F: Documentation/filesystems/aufs/ ++F: Documentation/ABI/testing/debugfs-aufs ++F: Documentation/ABI/testing/sysfs-aufs ++F: fs/aufs/ ++F: include/uapi/linux/aufs_type.h ++ + AUXILIARY DISPLAY DRIVERS + M: Miguel Ojeda Sandonis + W: http://miguelojeda.es/auxdisplay.htm +diff --git a/drivers/block/loop.c b/drivers/block/loop.c +index 6cb1beb..12678be 100644 +--- a/drivers/block/loop.c ++++ b/drivers/block/loop.c +@@ -692,6 +692,24 @@ static inline int is_loop_device(struct file *file) + return i && S_ISBLK(i->i_mode) && MAJOR(i->i_rdev) == LOOP_MAJOR; + } + ++/* ++ * for AUFS ++ * no get/put for file. ++ */ ++struct file *loop_backing_file(struct super_block *sb) ++{ ++ struct file *ret; ++ struct loop_device *l; ++ ++ ret = NULL; ++ if (MAJOR(sb->s_dev) == LOOP_MAJOR) { ++ l = sb->s_bdev->bd_disk->private_data; ++ ret = l->lo_backing_file; ++ } ++ return ret; ++} ++EXPORT_SYMBOL_GPL(loop_backing_file); ++ + /* loop sysfs attributes */ + + static ssize_t loop_attr_show(struct device *dev, char *page, +diff --git a/fs/Kconfig b/fs/Kconfig +index 664991a..1481093 100644 +--- a/fs/Kconfig ++++ b/fs/Kconfig +@@ -210,6 +210,7 @@ source "fs/ufs/Kconfig" + source "fs/exofs/Kconfig" + source "fs/f2fs/Kconfig" + source "fs/efivarfs/Kconfig" ++source "fs/aufs/Kconfig" + + endif # MISC_FILESYSTEMS + +diff --git a/fs/Makefile b/fs/Makefile +index da0bbb4..c8bc724 100644 +--- a/fs/Makefile ++++ b/fs/Makefile +@@ -126,3 +126,4 @@ obj-y += exofs/ # Multiple modules + obj-$(CONFIG_CEPH_FS) += ceph/ + obj-$(CONFIG_PSTORE) += pstore/ + obj-$(CONFIG_EFIVAR_FS) += efivarfs/ ++obj-$(CONFIG_AUFS_FS) += aufs/ +diff --git a/fs/aufs/Kconfig b/fs/aufs/Kconfig +new file mode 100644 +index 0000000..63560ce +--- /dev/null ++++ b/fs/aufs/Kconfig +@@ -0,0 +1,185 @@ ++config AUFS_FS ++ tristate "Aufs (Advanced multi layered unification filesystem) support" ++ help ++ Aufs is a stackable unification filesystem such as Unionfs, ++ which unifies several directories and provides a merged single ++ directory. ++ In the early days, aufs was entirely re-designed and ++ re-implemented Unionfs Version 1.x series. Introducing many ++ original ideas, approaches and improvements, it becomes totally ++ different from Unionfs while keeping the basic features. ++ ++if AUFS_FS ++choice ++ prompt "Maximum number of branches" ++ default AUFS_BRANCH_MAX_127 ++ help ++ Specifies the maximum number of branches (or member directories) ++ in a single aufs. The larger value consumes more system ++ resources and has a minor impact to performance. ++config AUFS_BRANCH_MAX_127 ++ bool "127" ++ help ++ Specifies the maximum number of branches (or member directories) ++ in a single aufs. The larger value consumes more system ++ resources and has a minor impact to performance. ++config AUFS_BRANCH_MAX_511 ++ bool "511" ++ help ++ Specifies the maximum number of branches (or member directories) ++ in a single aufs. The larger value consumes more system ++ resources and has a minor impact to performance. ++config AUFS_BRANCH_MAX_1023 ++ bool "1023" ++ help ++ Specifies the maximum number of branches (or member directories) ++ in a single aufs. The larger value consumes more system ++ resources and has a minor impact to performance. ++config AUFS_BRANCH_MAX_32767 ++ bool "32767" ++ help ++ Specifies the maximum number of branches (or member directories) ++ in a single aufs. The larger value consumes more system ++ resources and has a minor impact to performance. ++endchoice ++ ++config AUFS_SBILIST ++ bool ++ depends on AUFS_MAGIC_SYSRQ || PROC_FS ++ default y ++ help ++ Automatic configuration for internal use. ++ When aufs supports Magic SysRq or /proc, enabled automatically. ++ ++config AUFS_HNOTIFY ++ bool "Detect direct branch access (bypassing aufs)" ++ help ++ If you want to modify files on branches directly, eg. bypassing aufs, ++ and want aufs to detect the changes of them fully, then enable this ++ option and use 'udba=notify' mount option. ++ Currently there is only one available configuration, "fsnotify". ++ It will have a negative impact to the performance. ++ See detail in aufs.5. ++ ++choice ++ prompt "method" if AUFS_HNOTIFY ++ default AUFS_HFSNOTIFY ++config AUFS_HFSNOTIFY ++ bool "fsnotify" ++ select FSNOTIFY ++endchoice ++ ++config AUFS_EXPORT ++ bool "NFS-exportable aufs" ++ depends on EXPORTFS ++ help ++ If you want to export your mounted aufs via NFS, then enable this ++ option. There are several requirements for this configuration. ++ See detail in aufs.5. ++ ++config AUFS_INO_T_64 ++ bool ++ depends on AUFS_EXPORT ++ depends on 64BIT && !(ALPHA || S390) ++ default y ++ help ++ Automatic configuration for internal use. ++ /* typedef unsigned long/int __kernel_ino_t */ ++ /* alpha and s390x are int */ ++ ++config AUFS_XATTR ++ bool "support for XATTR/EA (including Security Labels)" ++ help ++ If your branch fs supports XATTR/EA and you want to make them ++ available in aufs too, then enable this opsion and specify the ++ branch attributes for EA. ++ See detail in aufs.5. ++ ++config AUFS_FHSM ++ bool "File-based Hierarchical Storage Management" ++ help ++ Hierarchical Storage Management (or HSM) is a well-known feature ++ in the storage world. Aufs provides this feature as file-based. ++ with multiple branches. ++ These multiple branches are prioritized, ie. the topmost one ++ should be the fastest drive and be used heavily. ++ ++config AUFS_RDU ++ bool "Readdir in userspace" ++ help ++ Aufs has two methods to provide a merged view for a directory, ++ by a user-space library and by kernel-space natively. The latter ++ is always enabled but sometimes large and slow. ++ If you enable this option, install the library in aufs2-util ++ package, and set some environment variables for your readdir(3), ++ then the work will be handled in user-space which generally ++ shows better performance in most cases. ++ See detail in aufs.5. ++ ++config AUFS_SHWH ++ bool "Show whiteouts" ++ help ++ If you want to make the whiteouts in aufs visible, then enable ++ this option and specify 'shwh' mount option. Although it may ++ sounds like philosophy or something, but in technically it ++ simply shows the name of whiteout with keeping its behaviour. ++ ++config AUFS_BR_RAMFS ++ bool "Ramfs (initramfs/rootfs) as an aufs branch" ++ help ++ If you want to use ramfs as an aufs branch fs, then enable this ++ option. Generally tmpfs is recommended. ++ Aufs prohibited them to be a branch fs by default, because ++ initramfs becomes unusable after switch_root or something ++ generally. If you sets initramfs as an aufs branch and boot your ++ system by switch_root, you will meet a problem easily since the ++ files in initramfs may be inaccessible. ++ Unless you are going to use ramfs as an aufs branch fs without ++ switch_root or something, leave it N. ++ ++config AUFS_BR_FUSE ++ bool "Fuse fs as an aufs branch" ++ depends on FUSE_FS ++ select AUFS_POLL ++ help ++ If you want to use fuse-based userspace filesystem as an aufs ++ branch fs, then enable this option. ++ It implements the internal poll(2) operation which is ++ implemented by fuse only (curretnly). ++ ++config AUFS_POLL ++ bool ++ help ++ Automatic configuration for internal use. ++ ++config AUFS_BR_HFSPLUS ++ bool "Hfsplus as an aufs branch" ++ depends on HFSPLUS_FS ++ default y ++ help ++ If you want to use hfsplus fs as an aufs branch fs, then enable ++ this option. This option introduces a small overhead at ++ copying-up a file on hfsplus. ++ ++config AUFS_BDEV_LOOP ++ bool ++ depends on BLK_DEV_LOOP ++ default y ++ help ++ Automatic configuration for internal use. ++ Convert =[ym] into =y. ++ ++config AUFS_DEBUG ++ bool "Debug aufs" ++ help ++ Enable this to compile aufs internal debug code. ++ It will have a negative impact to the performance. ++ ++config AUFS_MAGIC_SYSRQ ++ bool ++ depends on AUFS_DEBUG && MAGIC_SYSRQ ++ default y ++ help ++ Automatic configuration for internal use. ++ When aufs supports Magic SysRq, enabled automatically. ++endif +diff --git a/fs/aufs/Makefile b/fs/aufs/Makefile +new file mode 100644 +index 0000000..c7a501e +--- /dev/null ++++ b/fs/aufs/Makefile +@@ -0,0 +1,44 @@ ++ ++include ${src}/magic.mk ++ifeq (${CONFIG_AUFS_FS},m) ++include ${src}/conf.mk ++endif ++-include ${src}/priv_def.mk ++ ++# cf. include/linux/kernel.h ++# enable pr_debug ++ccflags-y += -DDEBUG ++# sparse requires the full pathname ++ifdef M ++ccflags-y += -include ${M}/../../include/uapi/linux/aufs_type.h ++else ++ccflags-y += -include ${srctree}/include/uapi/linux/aufs_type.h ++endif ++ ++obj-$(CONFIG_AUFS_FS) += aufs.o ++aufs-y := module.o sbinfo.o super.o branch.o xino.o sysaufs.o opts.o \ ++ wkq.o vfsub.o dcsub.o \ ++ cpup.o whout.o wbr_policy.o \ ++ dinfo.o dentry.o \ ++ dynop.o \ ++ finfo.o file.o f_op.o \ ++ dir.o vdir.o \ ++ iinfo.o inode.o i_op.o i_op_add.o i_op_del.o i_op_ren.o \ ++ mvdown.o ioctl.o ++ ++# all are boolean ++aufs-$(CONFIG_PROC_FS) += procfs.o plink.o ++aufs-$(CONFIG_SYSFS) += sysfs.o ++aufs-$(CONFIG_DEBUG_FS) += dbgaufs.o ++aufs-$(CONFIG_AUFS_BDEV_LOOP) += loop.o ++aufs-$(CONFIG_AUFS_HNOTIFY) += hnotify.o ++aufs-$(CONFIG_AUFS_HFSNOTIFY) += hfsnotify.o ++aufs-$(CONFIG_AUFS_EXPORT) += export.o ++aufs-$(CONFIG_AUFS_XATTR) += xattr.o ++aufs-$(CONFIG_FS_POSIX_ACL) += posix_acl.o ++aufs-$(CONFIG_AUFS_FHSM) += fhsm.o ++aufs-$(CONFIG_AUFS_POLL) += poll.o ++aufs-$(CONFIG_AUFS_RDU) += rdu.o ++aufs-$(CONFIG_AUFS_BR_HFSPLUS) += hfsplus.o ++aufs-$(CONFIG_AUFS_DEBUG) += debug.o ++aufs-$(CONFIG_AUFS_MAGIC_SYSRQ) += sysrq.o +diff --git a/fs/aufs/aufs.h b/fs/aufs/aufs.h +new file mode 100644 +index 0000000..e48d268 +--- /dev/null ++++ b/fs/aufs/aufs.h +@@ -0,0 +1,59 @@ ++/* ++ * Copyright (C) 2005-2016 Junjiro R. Okajima ++ * ++ * This program, aufs is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . ++ */ ++ ++/* ++ * all header files ++ */ ++ ++#ifndef __AUFS_H__ ++#define __AUFS_H__ ++ ++#ifdef __KERNEL__ ++ ++#define AuStub(type, name, body, ...) \ ++ static inline type name(__VA_ARGS__) { body; } ++ ++#define AuStubVoid(name, ...) \ ++ AuStub(void, name, , __VA_ARGS__) ++#define AuStubInt0(name, ...) \ ++ AuStub(int, name, return 0, __VA_ARGS__) ++ ++#include "debug.h" ++ ++#include "branch.h" ++#include "cpup.h" ++#include "dcsub.h" ++#include "dbgaufs.h" ++#include "dentry.h" ++#include "dir.h" ++#include "dynop.h" ++#include "file.h" ++#include "fstype.h" ++#include "inode.h" ++#include "loop.h" ++#include "module.h" ++#include "opts.h" ++#include "rwsem.h" ++#include "spl.h" ++#include "super.h" ++#include "sysaufs.h" ++#include "vfsub.h" ++#include "whout.h" ++#include "wkq.h" ++ ++#endif /* __KERNEL__ */ ++#endif /* __AUFS_H__ */ +diff --git a/fs/aufs/branch.c b/fs/aufs/branch.c +new file mode 100644 +index 0000000..17210b2 +--- /dev/null ++++ b/fs/aufs/branch.c +@@ -0,0 +1,1402 @@ ++/* ++ * Copyright (C) 2005-2016 Junjiro R. Okajima ++ * ++ * This program, aufs is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . ++ */ ++ ++/* ++ * branch management ++ */ ++ ++#include ++#include ++#include "aufs.h" ++ ++/* ++ * free a single branch ++ */ ++static void au_br_do_free(struct au_branch *br) ++{ ++ int i; ++ struct au_wbr *wbr; ++ struct au_dykey **key; ++ ++ au_hnotify_fin_br(br); ++ ++ if (br->br_xino.xi_file) ++ fput(br->br_xino.xi_file); ++ mutex_destroy(&br->br_xino.xi_nondir_mtx); ++ ++ AuDebugOn(atomic_read(&br->br_count)); ++ ++ wbr = br->br_wbr; ++ if (wbr) { ++ for (i = 0; i < AuBrWh_Last; i++) ++ dput(wbr->wbr_wh[i]); ++ AuDebugOn(atomic_read(&wbr->wbr_wh_running)); ++ AuRwDestroy(&wbr->wbr_wh_rwsem); ++ } ++ ++ if (br->br_fhsm) { ++ au_br_fhsm_fin(br->br_fhsm); ++ kfree(br->br_fhsm); ++ } ++ ++ key = br->br_dykey; ++ for (i = 0; i < AuBrDynOp; i++, key++) ++ if (*key) ++ au_dy_put(*key); ++ else ++ break; ++ ++ /* recursive lock, s_umount of branch's */ ++ lockdep_off(); ++ path_put(&br->br_path); ++ lockdep_on(); ++ kfree(wbr); ++ kfree(br); ++} ++ ++/* ++ * frees all branches ++ */ ++void au_br_free(struct au_sbinfo *sbinfo) ++{ ++ aufs_bindex_t bmax; ++ struct au_branch **br; ++ ++ AuRwMustWriteLock(&sbinfo->si_rwsem); ++ ++ bmax = sbinfo->si_bend + 1; ++ br = sbinfo->si_branch; ++ while (bmax--) ++ au_br_do_free(*br++); ++} ++ ++/* ++ * find the index of a branch which is specified by @br_id. ++ */ ++int au_br_index(struct super_block *sb, aufs_bindex_t br_id) ++{ ++ aufs_bindex_t bindex, bend; ++ ++ bend = au_sbend(sb); ++ for (bindex = 0; bindex <= bend; bindex++) ++ if (au_sbr_id(sb, bindex) == br_id) ++ return bindex; ++ return -1; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++/* ++ * add a branch ++ */ ++ ++static int test_overlap(struct super_block *sb, struct dentry *h_adding, ++ struct dentry *h_root) ++{ ++ if (unlikely(h_adding == h_root ++ || au_test_loopback_overlap(sb, h_adding))) ++ return 1; ++ if (h_adding->d_sb != h_root->d_sb) ++ return 0; ++ return au_test_subdir(h_adding, h_root) ++ || au_test_subdir(h_root, h_adding); ++} ++ ++/* ++ * returns a newly allocated branch. @new_nbranch is a number of branches ++ * after adding a branch. ++ */ ++static struct au_branch *au_br_alloc(struct super_block *sb, int new_nbranch, ++ int perm) ++{ ++ struct au_branch *add_branch; ++ struct dentry *root; ++ int err; ++ ++ err = -ENOMEM; ++ root = sb->s_root; ++ add_branch = kzalloc(sizeof(*add_branch), GFP_NOFS); ++ if (unlikely(!add_branch)) ++ goto out; ++ ++ err = au_hnotify_init_br(add_branch, perm); ++ if (unlikely(err)) ++ goto out_br; ++ ++ if (au_br_writable(perm)) { ++ /* may be freed separately at changing the branch permission */ ++ add_branch->br_wbr = kzalloc(sizeof(*add_branch->br_wbr), ++ GFP_NOFS); ++ if (unlikely(!add_branch->br_wbr)) ++ goto out_hnotify; ++ } ++ ++ if (au_br_fhsm(perm)) { ++ err = au_fhsm_br_alloc(add_branch); ++ if (unlikely(err)) ++ goto out_wbr; ++ } ++ ++ err = au_sbr_realloc(au_sbi(sb), new_nbranch); ++ if (!err) ++ err = au_di_realloc(au_di(root), new_nbranch); ++ if (!err) ++ err = au_ii_realloc(au_ii(root->d_inode), new_nbranch); ++ if (!err) ++ return add_branch; /* success */ ++ ++out_wbr: ++ kfree(add_branch->br_wbr); ++out_hnotify: ++ au_hnotify_fin_br(add_branch); ++out_br: ++ kfree(add_branch); ++out: ++ return ERR_PTR(err); ++} ++ ++/* ++ * test if the branch permission is legal or not. ++ */ ++static int test_br(struct inode *inode, int brperm, char *path) ++{ ++ int err; ++ ++ err = (au_br_writable(brperm) && IS_RDONLY(inode)); ++ if (!err) ++ goto out; ++ ++ err = -EINVAL; ++ pr_err("write permission for readonly mount or inode, %s\n", path); ++ ++out: ++ return err; ++} ++ ++/* ++ * returns: ++ * 0: success, the caller will add it ++ * plus: success, it is already unified, the caller should ignore it ++ * minus: error ++ */ ++static int test_add(struct super_block *sb, struct au_opt_add *add, int remount) ++{ ++ int err; ++ aufs_bindex_t bend, bindex; ++ struct dentry *root; ++ struct inode *inode, *h_inode; ++ ++ root = sb->s_root; ++ bend = au_sbend(sb); ++ if (unlikely(bend >= 0 ++ && au_find_dbindex(root, add->path.dentry) >= 0)) { ++ err = 1; ++ if (!remount) { ++ err = -EINVAL; ++ pr_err("%s duplicated\n", add->pathname); ++ } ++ goto out; ++ } ++ ++ err = -ENOSPC; /* -E2BIG; */ ++ if (unlikely(AUFS_BRANCH_MAX <= add->bindex ++ || AUFS_BRANCH_MAX - 1 <= bend)) { ++ pr_err("number of branches exceeded %s\n", add->pathname); ++ goto out; ++ } ++ ++ err = -EDOM; ++ if (unlikely(add->bindex < 0 || bend + 1 < add->bindex)) { ++ pr_err("bad index %d\n", add->bindex); ++ goto out; ++ } ++ ++ inode = add->path.dentry->d_inode; ++ err = -ENOENT; ++ if (unlikely(!inode->i_nlink)) { ++ pr_err("no existence %s\n", add->pathname); ++ goto out; ++ } ++ ++ err = -EINVAL; ++ if (unlikely(inode->i_sb == sb)) { ++ pr_err("%s must be outside\n", add->pathname); ++ goto out; ++ } ++ ++ if (unlikely(au_test_fs_unsuppoted(inode->i_sb))) { ++ pr_err("unsupported filesystem, %s (%s)\n", ++ add->pathname, au_sbtype(inode->i_sb)); ++ goto out; ++ } ++ ++ if (unlikely(inode->i_sb->s_stack_depth)) { ++ pr_err("already stacked, %s (%s)\n", ++ add->pathname, au_sbtype(inode->i_sb)); ++ goto out; ++ } ++ ++ err = test_br(add->path.dentry->d_inode, add->perm, add->pathname); ++ if (unlikely(err)) ++ goto out; ++ ++ if (bend < 0) ++ return 0; /* success */ ++ ++ err = -EINVAL; ++ for (bindex = 0; bindex <= bend; bindex++) ++ if (unlikely(test_overlap(sb, add->path.dentry, ++ au_h_dptr(root, bindex)))) { ++ pr_err("%s is overlapped\n", add->pathname); ++ goto out; ++ } ++ ++ err = 0; ++ if (au_opt_test(au_mntflags(sb), WARN_PERM)) { ++ h_inode = au_h_dptr(root, 0)->d_inode; ++ if ((h_inode->i_mode & S_IALLUGO) != (inode->i_mode & S_IALLUGO) ++ || !uid_eq(h_inode->i_uid, inode->i_uid) ++ || !gid_eq(h_inode->i_gid, inode->i_gid)) ++ pr_warn("uid/gid/perm %s %u/%u/0%o, %u/%u/0%o\n", ++ add->pathname, ++ i_uid_read(inode), i_gid_read(inode), ++ (inode->i_mode & S_IALLUGO), ++ i_uid_read(h_inode), i_gid_read(h_inode), ++ (h_inode->i_mode & S_IALLUGO)); ++ } ++ ++out: ++ return err; ++} ++ ++/* ++ * initialize or clean the whiteouts for an adding branch ++ */ ++static int au_br_init_wh(struct super_block *sb, struct au_branch *br, ++ int new_perm) ++{ ++ int err, old_perm; ++ aufs_bindex_t bindex; ++ struct mutex *h_mtx; ++ struct au_wbr *wbr; ++ struct au_hinode *hdir; ++ ++ err = vfsub_mnt_want_write(au_br_mnt(br)); ++ if (unlikely(err)) ++ goto out; ++ ++ wbr = br->br_wbr; ++ old_perm = br->br_perm; ++ br->br_perm = new_perm; ++ hdir = NULL; ++ h_mtx = NULL; ++ bindex = au_br_index(sb, br->br_id); ++ if (0 <= bindex) { ++ hdir = au_hi(sb->s_root->d_inode, bindex); ++ au_hn_imtx_lock_nested(hdir, AuLsc_I_PARENT); ++ } else { ++ h_mtx = &au_br_dentry(br)->d_inode->i_mutex; ++ mutex_lock_nested(h_mtx, AuLsc_I_PARENT); ++ } ++ if (!wbr) ++ err = au_wh_init(br, sb); ++ else { ++ wbr_wh_write_lock(wbr); ++ err = au_wh_init(br, sb); ++ wbr_wh_write_unlock(wbr); ++ } ++ if (hdir) ++ au_hn_imtx_unlock(hdir); ++ else ++ mutex_unlock(h_mtx); ++ vfsub_mnt_drop_write(au_br_mnt(br)); ++ br->br_perm = old_perm; ++ ++ if (!err && wbr && !au_br_writable(new_perm)) { ++ kfree(wbr); ++ br->br_wbr = NULL; ++ } ++ ++out: ++ return err; ++} ++ ++static int au_wbr_init(struct au_branch *br, struct super_block *sb, ++ int perm) ++{ ++ int err; ++ struct kstatfs kst; ++ struct au_wbr *wbr; ++ ++ wbr = br->br_wbr; ++ au_rw_init(&wbr->wbr_wh_rwsem); ++ atomic_set(&wbr->wbr_wh_running, 0); ++ ++ /* ++ * a limit for rmdir/rename a dir ++ * cf. AUFS_MAX_NAMELEN in include/uapi/linux/aufs_type.h ++ */ ++ err = vfs_statfs(&br->br_path, &kst); ++ if (unlikely(err)) ++ goto out; ++ err = -EINVAL; ++ if (kst.f_namelen >= NAME_MAX) ++ err = au_br_init_wh(sb, br, perm); ++ else ++ pr_err("%pd(%s), unsupported namelen %ld\n", ++ au_br_dentry(br), ++ au_sbtype(au_br_dentry(br)->d_sb), kst.f_namelen); ++ ++out: ++ return err; ++} ++ ++/* initialize a new branch */ ++static int au_br_init(struct au_branch *br, struct super_block *sb, ++ struct au_opt_add *add) ++{ ++ int err; ++ ++ err = 0; ++ mutex_init(&br->br_xino.xi_nondir_mtx); ++ br->br_perm = add->perm; ++ br->br_path = add->path; /* set first, path_get() later */ ++ spin_lock_init(&br->br_dykey_lock); ++ atomic_set(&br->br_count, 0); ++ atomic_set(&br->br_xino_running, 0); ++ br->br_id = au_new_br_id(sb); ++ AuDebugOn(br->br_id < 0); ++ ++ if (au_br_writable(add->perm)) { ++ err = au_wbr_init(br, sb, add->perm); ++ if (unlikely(err)) ++ goto out_err; ++ } ++ ++ if (au_opt_test(au_mntflags(sb), XINO)) { ++ err = au_xino_br(sb, br, add->path.dentry->d_inode->i_ino, ++ au_sbr(sb, 0)->br_xino.xi_file, /*do_test*/1); ++ if (unlikely(err)) { ++ AuDebugOn(br->br_xino.xi_file); ++ goto out_err; ++ } ++ } ++ ++ sysaufs_br_init(br); ++ path_get(&br->br_path); ++ goto out; /* success */ ++ ++out_err: ++ memset(&br->br_path, 0, sizeof(br->br_path)); ++out: ++ return err; ++} ++ ++static void au_br_do_add_brp(struct au_sbinfo *sbinfo, aufs_bindex_t bindex, ++ struct au_branch *br, aufs_bindex_t bend, ++ aufs_bindex_t amount) ++{ ++ struct au_branch **brp; ++ ++ AuRwMustWriteLock(&sbinfo->si_rwsem); ++ ++ brp = sbinfo->si_branch + bindex; ++ memmove(brp + 1, brp, sizeof(*brp) * amount); ++ *brp = br; ++ sbinfo->si_bend++; ++ if (unlikely(bend < 0)) ++ sbinfo->si_bend = 0; ++} ++ ++static void au_br_do_add_hdp(struct au_dinfo *dinfo, aufs_bindex_t bindex, ++ aufs_bindex_t bend, aufs_bindex_t amount) ++{ ++ struct au_hdentry *hdp; ++ ++ AuRwMustWriteLock(&dinfo->di_rwsem); ++ ++ hdp = dinfo->di_hdentry + bindex; ++ memmove(hdp + 1, hdp, sizeof(*hdp) * amount); ++ au_h_dentry_init(hdp); ++ dinfo->di_bend++; ++ if (unlikely(bend < 0)) ++ dinfo->di_bstart = 0; ++} ++ ++static void au_br_do_add_hip(struct au_iinfo *iinfo, aufs_bindex_t bindex, ++ aufs_bindex_t bend, aufs_bindex_t amount) ++{ ++ struct au_hinode *hip; ++ ++ AuRwMustWriteLock(&iinfo->ii_rwsem); ++ ++ hip = iinfo->ii_hinode + bindex; ++ memmove(hip + 1, hip, sizeof(*hip) * amount); ++ hip->hi_inode = NULL; ++ au_hn_init(hip); ++ iinfo->ii_bend++; ++ if (unlikely(bend < 0)) ++ iinfo->ii_bstart = 0; ++} ++ ++static void au_br_do_add(struct super_block *sb, struct au_branch *br, ++ aufs_bindex_t bindex) ++{ ++ struct dentry *root, *h_dentry; ++ struct inode *root_inode; ++ aufs_bindex_t bend, amount; ++ ++ root = sb->s_root; ++ root_inode = root->d_inode; ++ bend = au_sbend(sb); ++ amount = bend + 1 - bindex; ++ h_dentry = au_br_dentry(br); ++ au_sbilist_lock(); ++ au_br_do_add_brp(au_sbi(sb), bindex, br, bend, amount); ++ au_br_do_add_hdp(au_di(root), bindex, bend, amount); ++ au_br_do_add_hip(au_ii(root_inode), bindex, bend, amount); ++ au_set_h_dptr(root, bindex, dget(h_dentry)); ++ au_set_h_iptr(root_inode, bindex, au_igrab(h_dentry->d_inode), ++ /*flags*/0); ++ au_sbilist_unlock(); ++} ++ ++int au_br_add(struct super_block *sb, struct au_opt_add *add, int remount) ++{ ++ int err; ++ aufs_bindex_t bend, add_bindex; ++ struct dentry *root, *h_dentry; ++ struct inode *root_inode; ++ struct au_branch *add_branch; ++ ++ root = sb->s_root; ++ root_inode = root->d_inode; ++ IMustLock(root_inode); ++ err = test_add(sb, add, remount); ++ if (unlikely(err < 0)) ++ goto out; ++ if (err) { ++ err = 0; ++ goto out; /* success */ ++ } ++ ++ bend = au_sbend(sb); ++ add_branch = au_br_alloc(sb, bend + 2, add->perm); ++ err = PTR_ERR(add_branch); ++ if (IS_ERR(add_branch)) ++ goto out; ++ ++ err = au_br_init(add_branch, sb, add); ++ if (unlikely(err)) { ++ au_br_do_free(add_branch); ++ goto out; ++ } ++ ++ add_bindex = add->bindex; ++ if (!remount) ++ au_br_do_add(sb, add_branch, add_bindex); ++ else { ++ sysaufs_brs_del(sb, add_bindex); ++ au_br_do_add(sb, add_branch, add_bindex); ++ sysaufs_brs_add(sb, add_bindex); ++ } ++ ++ h_dentry = add->path.dentry; ++ if (!add_bindex) { ++ au_cpup_attr_all(root_inode, /*force*/1); ++ sb->s_maxbytes = h_dentry->d_sb->s_maxbytes; ++ } else ++ au_add_nlink(root_inode, h_dentry->d_inode); ++ ++ /* ++ * this test/set prevents aufs from handling unnecesary notify events ++ * of xino files, in case of re-adding a writable branch which was ++ * once detached from aufs. ++ */ ++ if (au_xino_brid(sb) < 0 ++ && au_br_writable(add_branch->br_perm) ++ && !au_test_fs_bad_xino(h_dentry->d_sb) ++ && add_branch->br_xino.xi_file ++ && add_branch->br_xino.xi_file->f_dentry->d_parent == h_dentry) ++ au_xino_brid_set(sb, add_branch->br_id); ++ ++out: ++ return err; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++static unsigned long long au_farray_cb(void *a, ++ unsigned long long max __maybe_unused, ++ void *arg) ++{ ++ unsigned long long n; ++ struct file **p, *f; ++ struct au_sphlhead *files; ++ struct au_finfo *finfo; ++ struct super_block *sb = arg; ++ ++ n = 0; ++ p = a; ++ files = &au_sbi(sb)->si_files; ++ spin_lock(&files->spin); ++ hlist_for_each_entry(finfo, &files->head, fi_hlist) { ++ f = finfo->fi_file; ++ if (file_count(f) ++ && !special_file(file_inode(f)->i_mode)) { ++ get_file(f); ++ *p++ = f; ++ n++; ++ AuDebugOn(n > max); ++ } ++ } ++ spin_unlock(&files->spin); ++ ++ return n; ++} ++ ++static struct file **au_farray_alloc(struct super_block *sb, ++ unsigned long long *max) ++{ ++ *max = atomic_long_read(&au_sbi(sb)->si_nfiles); ++ return au_array_alloc(max, au_farray_cb, sb); ++} ++ ++static void au_farray_free(struct file **a, unsigned long long max) ++{ ++ unsigned long long ull; ++ ++ for (ull = 0; ull < max; ull++) ++ if (a[ull]) ++ fput(a[ull]); ++ kvfree(a); ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++/* ++ * delete a branch ++ */ ++ ++/* to show the line number, do not make it inlined function */ ++#define AuVerbose(do_info, fmt, ...) do { \ ++ if (do_info) \ ++ pr_info(fmt, ##__VA_ARGS__); \ ++} while (0) ++ ++static int au_test_ibusy(struct inode *inode, aufs_bindex_t bstart, ++ aufs_bindex_t bend) ++{ ++ return (inode && !S_ISDIR(inode->i_mode)) || bstart == bend; ++} ++ ++static int au_test_dbusy(struct dentry *dentry, aufs_bindex_t bstart, ++ aufs_bindex_t bend) ++{ ++ return au_test_ibusy(dentry->d_inode, bstart, bend); ++} ++ ++/* ++ * test if the branch is deletable or not. ++ */ ++static int test_dentry_busy(struct dentry *root, aufs_bindex_t bindex, ++ unsigned int sigen, const unsigned int verbose) ++{ ++ int err, i, j, ndentry; ++ aufs_bindex_t bstart, bend; ++ struct au_dcsub_pages dpages; ++ struct au_dpage *dpage; ++ struct dentry *d; ++ ++ err = au_dpages_init(&dpages, GFP_NOFS); ++ if (unlikely(err)) ++ goto out; ++ err = au_dcsub_pages(&dpages, root, NULL, NULL); ++ if (unlikely(err)) ++ goto out_dpages; ++ ++ for (i = 0; !err && i < dpages.ndpage; i++) { ++ dpage = dpages.dpages + i; ++ ndentry = dpage->ndentry; ++ for (j = 0; !err && j < ndentry; j++) { ++ d = dpage->dentries[j]; ++ AuDebugOn(au_dcount(d) <= 0); ++ if (!au_digen_test(d, sigen)) { ++ di_read_lock_child(d, AuLock_IR); ++ if (unlikely(au_dbrange_test(d))) { ++ di_read_unlock(d, AuLock_IR); ++ continue; ++ } ++ } else { ++ di_write_lock_child(d); ++ if (unlikely(au_dbrange_test(d))) { ++ di_write_unlock(d); ++ continue; ++ } ++ err = au_reval_dpath(d, sigen); ++ if (!err) ++ di_downgrade_lock(d, AuLock_IR); ++ else { ++ di_write_unlock(d); ++ break; ++ } ++ } ++ ++ /* AuDbgDentry(d); */ ++ bstart = au_dbstart(d); ++ bend = au_dbend(d); ++ if (bstart <= bindex ++ && bindex <= bend ++ && au_h_dptr(d, bindex) ++ && au_test_dbusy(d, bstart, bend)) { ++ err = -EBUSY; ++ AuVerbose(verbose, "busy %pd\n", d); ++ AuDbgDentry(d); ++ } ++ di_read_unlock(d, AuLock_IR); ++ } ++ } ++ ++out_dpages: ++ au_dpages_free(&dpages); ++out: ++ return err; ++} ++ ++static int test_inode_busy(struct super_block *sb, aufs_bindex_t bindex, ++ unsigned int sigen, const unsigned int verbose) ++{ ++ int err; ++ unsigned long long max, ull; ++ struct inode *i, **array; ++ aufs_bindex_t bstart, bend; ++ ++ array = au_iarray_alloc(sb, &max); ++ err = PTR_ERR(array); ++ if (IS_ERR(array)) ++ goto out; ++ ++ err = 0; ++ AuDbg("b%d\n", bindex); ++ for (ull = 0; !err && ull < max; ull++) { ++ i = array[ull]; ++ if (unlikely(!i)) ++ break; ++ if (i->i_ino == AUFS_ROOT_INO) ++ continue; ++ ++ /* AuDbgInode(i); */ ++ if (au_iigen(i, NULL) == sigen) ++ ii_read_lock_child(i); ++ else { ++ ii_write_lock_child(i); ++ err = au_refresh_hinode_self(i); ++ au_iigen_dec(i); ++ if (!err) ++ ii_downgrade_lock(i); ++ else { ++ ii_write_unlock(i); ++ break; ++ } ++ } ++ ++ bstart = au_ibstart(i); ++ bend = au_ibend(i); ++ if (bstart <= bindex ++ && bindex <= bend ++ && au_h_iptr(i, bindex) ++ && au_test_ibusy(i, bstart, bend)) { ++ err = -EBUSY; ++ AuVerbose(verbose, "busy i%lu\n", i->i_ino); ++ AuDbgInode(i); ++ } ++ ii_read_unlock(i); ++ } ++ au_iarray_free(array, max); ++ ++out: ++ return err; ++} ++ ++static int test_children_busy(struct dentry *root, aufs_bindex_t bindex, ++ const unsigned int verbose) ++{ ++ int err; ++ unsigned int sigen; ++ ++ sigen = au_sigen(root->d_sb); ++ DiMustNoWaiters(root); ++ IiMustNoWaiters(root->d_inode); ++ di_write_unlock(root); ++ err = test_dentry_busy(root, bindex, sigen, verbose); ++ if (!err) ++ err = test_inode_busy(root->d_sb, bindex, sigen, verbose); ++ di_write_lock_child(root); /* aufs_write_lock() calls ..._child() */ ++ ++ return err; ++} ++ ++static int test_dir_busy(struct file *file, aufs_bindex_t br_id, ++ struct file **to_free, int *idx) ++{ ++ int err; ++ unsigned char matched, root; ++ aufs_bindex_t bindex, bend; ++ struct au_fidir *fidir; ++ struct au_hfile *hfile; ++ ++ err = 0; ++ root = IS_ROOT(file->f_dentry); ++ if (root) { ++ get_file(file); ++ to_free[*idx] = file; ++ (*idx)++; ++ goto out; ++ } ++ ++ matched = 0; ++ fidir = au_fi(file)->fi_hdir; ++ AuDebugOn(!fidir); ++ bend = au_fbend_dir(file); ++ for (bindex = au_fbstart(file); bindex <= bend; bindex++) { ++ hfile = fidir->fd_hfile + bindex; ++ if (!hfile->hf_file) ++ continue; ++ ++ if (hfile->hf_br->br_id == br_id) { ++ matched = 1; ++ break; ++ } ++ } ++ if (matched) ++ err = -EBUSY; ++ ++out: ++ return err; ++} ++ ++static int test_file_busy(struct super_block *sb, aufs_bindex_t br_id, ++ struct file **to_free, int opened) ++{ ++ int err, idx; ++ unsigned long long ull, max; ++ aufs_bindex_t bstart; ++ struct file *file, **array; ++ struct dentry *root; ++ struct au_hfile *hfile; ++ ++ array = au_farray_alloc(sb, &max); ++ err = PTR_ERR(array); ++ if (IS_ERR(array)) ++ goto out; ++ ++ err = 0; ++ idx = 0; ++ root = sb->s_root; ++ di_write_unlock(root); ++ for (ull = 0; ull < max; ull++) { ++ file = array[ull]; ++ if (unlikely(!file)) ++ break; ++ ++ /* AuDbg("%pD\n", file); */ ++ fi_read_lock(file); ++ bstart = au_fbstart(file); ++ if (!d_is_dir(file->f_path.dentry)) { ++ hfile = &au_fi(file)->fi_htop; ++ if (hfile->hf_br->br_id == br_id) ++ err = -EBUSY; ++ } else ++ err = test_dir_busy(file, br_id, to_free, &idx); ++ fi_read_unlock(file); ++ if (unlikely(err)) ++ break; ++ } ++ di_write_lock_child(root); ++ au_farray_free(array, max); ++ AuDebugOn(idx > opened); ++ ++out: ++ return err; ++} ++ ++static void br_del_file(struct file **to_free, unsigned long long opened, ++ aufs_bindex_t br_id) ++{ ++ unsigned long long ull; ++ aufs_bindex_t bindex, bstart, bend, bfound; ++ struct file *file; ++ struct au_fidir *fidir; ++ struct au_hfile *hfile; ++ ++ for (ull = 0; ull < opened; ull++) { ++ file = to_free[ull]; ++ if (unlikely(!file)) ++ break; ++ ++ /* AuDbg("%pD\n", file); */ ++ AuDebugOn(!d_is_dir(file->f_path.dentry)); ++ bfound = -1; ++ fidir = au_fi(file)->fi_hdir; ++ AuDebugOn(!fidir); ++ fi_write_lock(file); ++ bstart = au_fbstart(file); ++ bend = au_fbend_dir(file); ++ for (bindex = bstart; bindex <= bend; bindex++) { ++ hfile = fidir->fd_hfile + bindex; ++ if (!hfile->hf_file) ++ continue; ++ ++ if (hfile->hf_br->br_id == br_id) { ++ bfound = bindex; ++ break; ++ } ++ } ++ AuDebugOn(bfound < 0); ++ au_set_h_fptr(file, bfound, NULL); ++ if (bfound == bstart) { ++ for (bstart++; bstart <= bend; bstart++) ++ if (au_hf_dir(file, bstart)) { ++ au_set_fbstart(file, bstart); ++ break; ++ } ++ } ++ fi_write_unlock(file); ++ } ++} ++ ++static void au_br_do_del_brp(struct au_sbinfo *sbinfo, ++ const aufs_bindex_t bindex, ++ const aufs_bindex_t bend) ++{ ++ struct au_branch **brp, **p; ++ ++ AuRwMustWriteLock(&sbinfo->si_rwsem); ++ ++ brp = sbinfo->si_branch + bindex; ++ if (bindex < bend) ++ memmove(brp, brp + 1, sizeof(*brp) * (bend - bindex)); ++ sbinfo->si_branch[0 + bend] = NULL; ++ sbinfo->si_bend--; ++ ++ p = krealloc(sbinfo->si_branch, sizeof(*p) * bend, AuGFP_SBILIST); ++ if (p) ++ sbinfo->si_branch = p; ++ /* harmless error */ ++} ++ ++static void au_br_do_del_hdp(struct au_dinfo *dinfo, const aufs_bindex_t bindex, ++ const aufs_bindex_t bend) ++{ ++ struct au_hdentry *hdp, *p; ++ ++ AuRwMustWriteLock(&dinfo->di_rwsem); ++ ++ hdp = dinfo->di_hdentry; ++ if (bindex < bend) ++ memmove(hdp + bindex, hdp + bindex + 1, ++ sizeof(*hdp) * (bend - bindex)); ++ hdp[0 + bend].hd_dentry = NULL; ++ dinfo->di_bend--; ++ ++ p = krealloc(hdp, sizeof(*p) * bend, AuGFP_SBILIST); ++ if (p) ++ dinfo->di_hdentry = p; ++ /* harmless error */ ++} ++ ++static void au_br_do_del_hip(struct au_iinfo *iinfo, const aufs_bindex_t bindex, ++ const aufs_bindex_t bend) ++{ ++ struct au_hinode *hip, *p; ++ ++ AuRwMustWriteLock(&iinfo->ii_rwsem); ++ ++ hip = iinfo->ii_hinode + bindex; ++ if (bindex < bend) ++ memmove(hip, hip + 1, sizeof(*hip) * (bend - bindex)); ++ iinfo->ii_hinode[0 + bend].hi_inode = NULL; ++ au_hn_init(iinfo->ii_hinode + bend); ++ iinfo->ii_bend--; ++ ++ p = krealloc(iinfo->ii_hinode, sizeof(*p) * bend, AuGFP_SBILIST); ++ if (p) ++ iinfo->ii_hinode = p; ++ /* harmless error */ ++} ++ ++static void au_br_do_del(struct super_block *sb, aufs_bindex_t bindex, ++ struct au_branch *br) ++{ ++ aufs_bindex_t bend; ++ struct au_sbinfo *sbinfo; ++ struct dentry *root, *h_root; ++ struct inode *inode, *h_inode; ++ struct au_hinode *hinode; ++ ++ SiMustWriteLock(sb); ++ ++ root = sb->s_root; ++ inode = root->d_inode; ++ sbinfo = au_sbi(sb); ++ bend = sbinfo->si_bend; ++ ++ h_root = au_h_dptr(root, bindex); ++ hinode = au_hi(inode, bindex); ++ h_inode = au_igrab(hinode->hi_inode); ++ au_hiput(hinode); ++ ++ au_sbilist_lock(); ++ au_br_do_del_brp(sbinfo, bindex, bend); ++ au_br_do_del_hdp(au_di(root), bindex, bend); ++ au_br_do_del_hip(au_ii(inode), bindex, bend); ++ au_sbilist_unlock(); ++ ++ dput(h_root); ++ iput(h_inode); ++ au_br_do_free(br); ++} ++ ++static unsigned long long empty_cb(void *array, unsigned long long max, ++ void *arg) ++{ ++ return max; ++} ++ ++int au_br_del(struct super_block *sb, struct au_opt_del *del, int remount) ++{ ++ int err, rerr, i; ++ unsigned long long opened; ++ unsigned int mnt_flags; ++ aufs_bindex_t bindex, bend, br_id; ++ unsigned char do_wh, verbose; ++ struct au_branch *br; ++ struct au_wbr *wbr; ++ struct dentry *root; ++ struct file **to_free; ++ ++ err = 0; ++ opened = 0; ++ to_free = NULL; ++ root = sb->s_root; ++ bindex = au_find_dbindex(root, del->h_path.dentry); ++ if (bindex < 0) { ++ if (remount) ++ goto out; /* success */ ++ err = -ENOENT; ++ pr_err("%s no such branch\n", del->pathname); ++ goto out; ++ } ++ AuDbg("bindex b%d\n", bindex); ++ ++ err = -EBUSY; ++ mnt_flags = au_mntflags(sb); ++ verbose = !!au_opt_test(mnt_flags, VERBOSE); ++ bend = au_sbend(sb); ++ if (unlikely(!bend)) { ++ AuVerbose(verbose, "no more branches left\n"); ++ goto out; ++ } ++ br = au_sbr(sb, bindex); ++ AuDebugOn(!path_equal(&br->br_path, &del->h_path)); ++ ++ br_id = br->br_id; ++ opened = atomic_read(&br->br_count); ++ if (unlikely(opened)) { ++ to_free = au_array_alloc(&opened, empty_cb, NULL); ++ err = PTR_ERR(to_free); ++ if (IS_ERR(to_free)) ++ goto out; ++ ++ err = test_file_busy(sb, br_id, to_free, opened); ++ if (unlikely(err)) { ++ AuVerbose(verbose, "%llu file(s) opened\n", opened); ++ goto out; ++ } ++ } ++ ++ wbr = br->br_wbr; ++ do_wh = wbr && (wbr->wbr_whbase || wbr->wbr_plink || wbr->wbr_orph); ++ if (do_wh) { ++ /* instead of WbrWhMustWriteLock(wbr) */ ++ SiMustWriteLock(sb); ++ for (i = 0; i < AuBrWh_Last; i++) { ++ dput(wbr->wbr_wh[i]); ++ wbr->wbr_wh[i] = NULL; ++ } ++ } ++ ++ err = test_children_busy(root, bindex, verbose); ++ if (unlikely(err)) { ++ if (do_wh) ++ goto out_wh; ++ goto out; ++ } ++ ++ err = 0; ++ if (to_free) { ++ /* ++ * now we confirmed the branch is deletable. ++ * let's free the remaining opened dirs on the branch. ++ */ ++ di_write_unlock(root); ++ br_del_file(to_free, opened, br_id); ++ di_write_lock_child(root); ++ } ++ ++ if (!remount) ++ au_br_do_del(sb, bindex, br); ++ else { ++ sysaufs_brs_del(sb, bindex); ++ au_br_do_del(sb, bindex, br); ++ sysaufs_brs_add(sb, bindex); ++ } ++ ++ if (!bindex) { ++ au_cpup_attr_all(root->d_inode, /*force*/1); ++ sb->s_maxbytes = au_sbr_sb(sb, 0)->s_maxbytes; ++ } else ++ au_sub_nlink(root->d_inode, del->h_path.dentry->d_inode); ++ if (au_opt_test(mnt_flags, PLINK)) ++ au_plink_half_refresh(sb, br_id); ++ ++ if (au_xino_brid(sb) == br_id) ++ au_xino_brid_set(sb, -1); ++ goto out; /* success */ ++ ++out_wh: ++ /* revert */ ++ rerr = au_br_init_wh(sb, br, br->br_perm); ++ if (rerr) ++ pr_warn("failed re-creating base whiteout, %s. (%d)\n", ++ del->pathname, rerr); ++out: ++ if (to_free) ++ au_farray_free(to_free, opened); ++ return err; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++static int au_ibusy(struct super_block *sb, struct aufs_ibusy __user *arg) ++{ ++ int err; ++ aufs_bindex_t bstart, bend; ++ struct aufs_ibusy ibusy; ++ struct inode *inode, *h_inode; ++ ++ err = -EPERM; ++ if (unlikely(!capable(CAP_SYS_ADMIN))) ++ goto out; ++ ++ err = copy_from_user(&ibusy, arg, sizeof(ibusy)); ++ if (!err) ++ err = !access_ok(VERIFY_WRITE, &arg->h_ino, sizeof(arg->h_ino)); ++ if (unlikely(err)) { ++ err = -EFAULT; ++ AuTraceErr(err); ++ goto out; ++ } ++ ++ err = -EINVAL; ++ si_read_lock(sb, AuLock_FLUSH); ++ if (unlikely(ibusy.bindex < 0 || ibusy.bindex > au_sbend(sb))) ++ goto out_unlock; ++ ++ err = 0; ++ ibusy.h_ino = 0; /* invalid */ ++ inode = ilookup(sb, ibusy.ino); ++ if (!inode ++ || inode->i_ino == AUFS_ROOT_INO ++ || is_bad_inode(inode)) ++ goto out_unlock; ++ ++ ii_read_lock_child(inode); ++ bstart = au_ibstart(inode); ++ bend = au_ibend(inode); ++ if (bstart <= ibusy.bindex && ibusy.bindex <= bend) { ++ h_inode = au_h_iptr(inode, ibusy.bindex); ++ if (h_inode && au_test_ibusy(inode, bstart, bend)) ++ ibusy.h_ino = h_inode->i_ino; ++ } ++ ii_read_unlock(inode); ++ iput(inode); ++ ++out_unlock: ++ si_read_unlock(sb); ++ if (!err) { ++ err = __put_user(ibusy.h_ino, &arg->h_ino); ++ if (unlikely(err)) { ++ err = -EFAULT; ++ AuTraceErr(err); ++ } ++ } ++out: ++ return err; ++} ++ ++long au_ibusy_ioctl(struct file *file, unsigned long arg) ++{ ++ return au_ibusy(file->f_dentry->d_sb, (void __user *)arg); ++} ++ ++#ifdef CONFIG_COMPAT ++long au_ibusy_compat_ioctl(struct file *file, unsigned long arg) ++{ ++ return au_ibusy(file->f_dentry->d_sb, compat_ptr(arg)); ++} ++#endif ++ ++/* ---------------------------------------------------------------------- */ ++ ++/* ++ * change a branch permission ++ */ ++ ++static void au_warn_ima(void) ++{ ++#ifdef CONFIG_IMA ++ /* since it doesn't support mark_files_ro() */ ++ AuWarn1("RW -> RO makes IMA to produce wrong message\n"); ++#endif ++} ++ ++static int do_need_sigen_inc(int a, int b) ++{ ++ return au_br_whable(a) && !au_br_whable(b); ++} ++ ++static int need_sigen_inc(int old, int new) ++{ ++ return do_need_sigen_inc(old, new) ++ || do_need_sigen_inc(new, old); ++} ++ ++static int au_br_mod_files_ro(struct super_block *sb, aufs_bindex_t bindex) ++{ ++ int err, do_warn; ++ unsigned int mnt_flags; ++ unsigned long long ull, max; ++ aufs_bindex_t br_id; ++ unsigned char verbose, writer; ++ struct file *file, *hf, **array; ++ struct inode *inode; ++ struct au_hfile *hfile; ++ ++ mnt_flags = au_mntflags(sb); ++ verbose = !!au_opt_test(mnt_flags, VERBOSE); ++ ++ array = au_farray_alloc(sb, &max); ++ err = PTR_ERR(array); ++ if (IS_ERR(array)) ++ goto out; ++ ++ do_warn = 0; ++ br_id = au_sbr_id(sb, bindex); ++ for (ull = 0; ull < max; ull++) { ++ file = array[ull]; ++ if (unlikely(!file)) ++ break; ++ ++ /* AuDbg("%pD\n", file); */ ++ fi_read_lock(file); ++ if (unlikely(au_test_mmapped(file))) { ++ err = -EBUSY; ++ AuVerbose(verbose, "mmapped %pD\n", file); ++ AuDbgFile(file); ++ FiMustNoWaiters(file); ++ fi_read_unlock(file); ++ goto out_array; ++ } ++ ++ inode = file_inode(file); ++ hfile = &au_fi(file)->fi_htop; ++ hf = hfile->hf_file; ++ if (!S_ISREG(inode->i_mode) ++ || !(file->f_mode & FMODE_WRITE) ++ || hfile->hf_br->br_id != br_id ++ || !(hf->f_mode & FMODE_WRITE)) ++ array[ull] = NULL; ++ else { ++ do_warn = 1; ++ get_file(file); ++ } ++ ++ FiMustNoWaiters(file); ++ fi_read_unlock(file); ++ fput(file); ++ } ++ ++ err = 0; ++ if (do_warn) ++ au_warn_ima(); ++ ++ for (ull = 0; ull < max; ull++) { ++ file = array[ull]; ++ if (!file) ++ continue; ++ ++ /* todo: already flushed? */ ++ /* ++ * fs/super.c:mark_files_ro() is gone, but aufs keeps its ++ * approach which resets f_mode and calls mnt_drop_write() and ++ * file_release_write() for each file, because the branch ++ * attribute in aufs world is totally different from the native ++ * fs rw/ro mode. ++ */ ++ /* fi_read_lock(file); */ ++ hfile = &au_fi(file)->fi_htop; ++ hf = hfile->hf_file; ++ /* fi_read_unlock(file); */ ++ spin_lock(&hf->f_lock); ++ writer = !!(hf->f_mode & FMODE_WRITER); ++ hf->f_mode &= ~(FMODE_WRITE | FMODE_WRITER); ++ spin_unlock(&hf->f_lock); ++ if (writer) { ++ put_write_access(file_inode(hf)); ++ __mnt_drop_write(hf->f_path.mnt); ++ } ++ } ++ ++out_array: ++ au_farray_free(array, max); ++out: ++ AuTraceErr(err); ++ return err; ++} ++ ++int au_br_mod(struct super_block *sb, struct au_opt_mod *mod, int remount, ++ int *do_refresh) ++{ ++ int err, rerr; ++ aufs_bindex_t bindex; ++ struct dentry *root; ++ struct au_branch *br; ++ struct au_br_fhsm *bf; ++ ++ root = sb->s_root; ++ bindex = au_find_dbindex(root, mod->h_root); ++ if (bindex < 0) { ++ if (remount) ++ return 0; /* success */ ++ err = -ENOENT; ++ pr_err("%s no such branch\n", mod->path); ++ goto out; ++ } ++ AuDbg("bindex b%d\n", bindex); ++ ++ err = test_br(mod->h_root->d_inode, mod->perm, mod->path); ++ if (unlikely(err)) ++ goto out; ++ ++ br = au_sbr(sb, bindex); ++ AuDebugOn(mod->h_root != au_br_dentry(br)); ++ if (br->br_perm == mod->perm) ++ return 0; /* success */ ++ ++ /* pre-allocate for non-fhsm --> fhsm */ ++ bf = NULL; ++ if (!au_br_fhsm(br->br_perm) && au_br_fhsm(mod->perm)) { ++ err = au_fhsm_br_alloc(br); ++ if (unlikely(err)) ++ goto out; ++ bf = br->br_fhsm; ++ br->br_fhsm = NULL; ++ } ++ ++ if (au_br_writable(br->br_perm)) { ++ /* remove whiteout base */ ++ err = au_br_init_wh(sb, br, mod->perm); ++ if (unlikely(err)) ++ goto out_bf; ++ ++ if (!au_br_writable(mod->perm)) { ++ /* rw --> ro, file might be mmapped */ ++ DiMustNoWaiters(root); ++ IiMustNoWaiters(root->d_inode); ++ di_write_unlock(root); ++ err = au_br_mod_files_ro(sb, bindex); ++ /* aufs_write_lock() calls ..._child() */ ++ di_write_lock_child(root); ++ ++ if (unlikely(err)) { ++ rerr = -ENOMEM; ++ br->br_wbr = kzalloc(sizeof(*br->br_wbr), ++ GFP_NOFS); ++ if (br->br_wbr) ++ rerr = au_wbr_init(br, sb, br->br_perm); ++ if (unlikely(rerr)) { ++ AuIOErr("nested error %d (%d)\n", ++ rerr, err); ++ br->br_perm = mod->perm; ++ } ++ } ++ } ++ } else if (au_br_writable(mod->perm)) { ++ /* ro --> rw */ ++ err = -ENOMEM; ++ br->br_wbr = kzalloc(sizeof(*br->br_wbr), GFP_NOFS); ++ if (br->br_wbr) { ++ err = au_wbr_init(br, sb, mod->perm); ++ if (unlikely(err)) { ++ kfree(br->br_wbr); ++ br->br_wbr = NULL; ++ } ++ } ++ } ++ if (unlikely(err)) ++ goto out_bf; ++ ++ if (au_br_fhsm(br->br_perm)) { ++ if (!au_br_fhsm(mod->perm)) { ++ /* fhsm --> non-fhsm */ ++ au_br_fhsm_fin(br->br_fhsm); ++ kfree(br->br_fhsm); ++ br->br_fhsm = NULL; ++ } ++ } else if (au_br_fhsm(mod->perm)) ++ /* non-fhsm --> fhsm */ ++ br->br_fhsm = bf; ++ ++ *do_refresh |= need_sigen_inc(br->br_perm, mod->perm); ++ br->br_perm = mod->perm; ++ goto out; /* success */ ++ ++out_bf: ++ kfree(bf); ++out: ++ AuTraceErr(err); ++ return err; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++int au_br_stfs(struct au_branch *br, struct aufs_stfs *stfs) ++{ ++ int err; ++ struct kstatfs kstfs; ++ ++ err = vfs_statfs(&br->br_path, &kstfs); ++ if (!err) { ++ stfs->f_blocks = kstfs.f_blocks; ++ stfs->f_bavail = kstfs.f_bavail; ++ stfs->f_files = kstfs.f_files; ++ stfs->f_ffree = kstfs.f_ffree; ++ } ++ ++ return err; ++} +diff --git a/fs/aufs/branch.h b/fs/aufs/branch.h +new file mode 100644 +index 0000000..6ae006e +--- /dev/null ++++ b/fs/aufs/branch.h +@@ -0,0 +1,279 @@ ++/* ++ * Copyright (C) 2005-2016 Junjiro R. Okajima ++ * ++ * This program, aufs is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . ++ */ ++ ++/* ++ * branch filesystems and xino for them ++ */ ++ ++#ifndef __AUFS_BRANCH_H__ ++#define __AUFS_BRANCH_H__ ++ ++#ifdef __KERNEL__ ++ ++#include ++#include "dynop.h" ++#include "rwsem.h" ++#include "super.h" ++ ++/* ---------------------------------------------------------------------- */ ++ ++/* a xino file */ ++struct au_xino_file { ++ struct file *xi_file; ++ struct mutex xi_nondir_mtx; ++ ++ /* todo: make xino files an array to support huge inode number */ ++ ++#ifdef CONFIG_DEBUG_FS ++ struct dentry *xi_dbgaufs; ++#endif ++}; ++ ++/* File-based Hierarchical Storage Management */ ++struct au_br_fhsm { ++#ifdef CONFIG_AUFS_FHSM ++ struct mutex bf_lock; ++ unsigned long bf_jiffy; ++ struct aufs_stfs bf_stfs; ++ int bf_readable; ++#endif ++}; ++ ++/* members for writable branch only */ ++enum {AuBrWh_BASE, AuBrWh_PLINK, AuBrWh_ORPH, AuBrWh_Last}; ++struct au_wbr { ++ struct au_rwsem wbr_wh_rwsem; ++ struct dentry *wbr_wh[AuBrWh_Last]; ++ atomic_t wbr_wh_running; ++#define wbr_whbase wbr_wh[AuBrWh_BASE] /* whiteout base */ ++#define wbr_plink wbr_wh[AuBrWh_PLINK] /* pseudo-link dir */ ++#define wbr_orph wbr_wh[AuBrWh_ORPH] /* dir for orphans */ ++ ++ /* mfs mode */ ++ unsigned long long wbr_bytes; ++}; ++ ++/* ext2 has 3 types of operations at least, ext3 has 4 */ ++#define AuBrDynOp (AuDyLast * 4) ++ ++#ifdef CONFIG_AUFS_HFSNOTIFY ++/* support for asynchronous destruction */ ++struct au_br_hfsnotify { ++ struct fsnotify_group *hfsn_group; ++}; ++#endif ++ ++/* sysfs entries */ ++struct au_brsysfs { ++ char name[16]; ++ struct attribute attr; ++}; ++ ++enum { ++ AuBrSysfs_BR, ++ AuBrSysfs_BRID, ++ AuBrSysfs_Last ++}; ++ ++/* protected by superblock rwsem */ ++struct au_branch { ++ struct au_xino_file br_xino; ++ ++ aufs_bindex_t br_id; ++ ++ int br_perm; ++ struct path br_path; ++ spinlock_t br_dykey_lock; ++ struct au_dykey *br_dykey[AuBrDynOp]; ++ atomic_t br_count; ++ ++ struct au_wbr *br_wbr; ++ struct au_br_fhsm *br_fhsm; ++ ++ /* xino truncation */ ++ atomic_t br_xino_running; ++ ++#ifdef CONFIG_AUFS_HFSNOTIFY ++ struct au_br_hfsnotify *br_hfsn; ++#endif ++ ++#ifdef CONFIG_SYSFS ++ /* entries under sysfs per mount-point */ ++ struct au_brsysfs br_sysfs[AuBrSysfs_Last]; ++#endif ++}; ++ ++/* ---------------------------------------------------------------------- */ ++ ++static inline struct vfsmount *au_br_mnt(struct au_branch *br) ++{ ++ return br->br_path.mnt; ++} ++ ++static inline struct dentry *au_br_dentry(struct au_branch *br) ++{ ++ return br->br_path.dentry; ++} ++ ++static inline struct super_block *au_br_sb(struct au_branch *br) ++{ ++ return au_br_mnt(br)->mnt_sb; ++} ++ ++static inline int au_br_rdonly(struct au_branch *br) ++{ ++ return ((au_br_sb(br)->s_flags & MS_RDONLY) ++ || !au_br_writable(br->br_perm)) ++ ? -EROFS : 0; ++} ++ ++static inline int au_br_hnotifyable(int brperm __maybe_unused) ++{ ++#ifdef CONFIG_AUFS_HNOTIFY ++ return !(brperm & AuBrPerm_RR); ++#else ++ return 0; ++#endif ++} ++ ++static inline int au_br_test_oflag(int oflag, struct au_branch *br) ++{ ++ int err, exec_flag; ++ ++ err = 0; ++ exec_flag = oflag & __FMODE_EXEC; ++ if (unlikely(exec_flag && (au_br_mnt(br)->mnt_flags & MNT_NOEXEC))) ++ err = -EACCES; ++ ++ return err; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++/* branch.c */ ++struct au_sbinfo; ++void au_br_free(struct au_sbinfo *sinfo); ++int au_br_index(struct super_block *sb, aufs_bindex_t br_id); ++struct au_opt_add; ++int au_br_add(struct super_block *sb, struct au_opt_add *add, int remount); ++struct au_opt_del; ++int au_br_del(struct super_block *sb, struct au_opt_del *del, int remount); ++long au_ibusy_ioctl(struct file *file, unsigned long arg); ++#ifdef CONFIG_COMPAT ++long au_ibusy_compat_ioctl(struct file *file, unsigned long arg); ++#endif ++struct au_opt_mod; ++int au_br_mod(struct super_block *sb, struct au_opt_mod *mod, int remount, ++ int *do_refresh); ++struct aufs_stfs; ++int au_br_stfs(struct au_branch *br, struct aufs_stfs *stfs); ++ ++/* xino.c */ ++static const loff_t au_loff_max = LLONG_MAX; ++ ++int au_xib_trunc(struct super_block *sb); ++ssize_t xino_fread(au_readf_t func, struct file *file, void *buf, size_t size, ++ loff_t *pos); ++ssize_t xino_fwrite(au_writef_t func, struct file *file, void *buf, size_t size, ++ loff_t *pos); ++struct file *au_xino_create2(struct file *base_file, struct file *copy_src); ++struct file *au_xino_create(struct super_block *sb, char *fname, int silent); ++ino_t au_xino_new_ino(struct super_block *sb); ++void au_xino_delete_inode(struct inode *inode, const int unlinked); ++int au_xino_write(struct super_block *sb, aufs_bindex_t bindex, ino_t h_ino, ++ ino_t ino); ++int au_xino_read(struct super_block *sb, aufs_bindex_t bindex, ino_t h_ino, ++ ino_t *ino); ++int au_xino_br(struct super_block *sb, struct au_branch *br, ino_t hino, ++ struct file *base_file, int do_test); ++int au_xino_trunc(struct super_block *sb, aufs_bindex_t bindex); ++ ++struct au_opt_xino; ++int au_xino_set(struct super_block *sb, struct au_opt_xino *xino, int remount); ++void au_xino_clr(struct super_block *sb); ++struct file *au_xino_def(struct super_block *sb); ++int au_xino_path(struct seq_file *seq, struct file *file); ++ ++/* ---------------------------------------------------------------------- */ ++ ++/* Superblock to branch */ ++static inline ++aufs_bindex_t au_sbr_id(struct super_block *sb, aufs_bindex_t bindex) ++{ ++ return au_sbr(sb, bindex)->br_id; ++} ++ ++static inline ++struct vfsmount *au_sbr_mnt(struct super_block *sb, aufs_bindex_t bindex) ++{ ++ return au_br_mnt(au_sbr(sb, bindex)); ++} ++ ++static inline ++struct super_block *au_sbr_sb(struct super_block *sb, aufs_bindex_t bindex) ++{ ++ return au_br_sb(au_sbr(sb, bindex)); ++} ++ ++static inline void au_sbr_put(struct super_block *sb, aufs_bindex_t bindex) ++{ ++ atomic_dec(&au_sbr(sb, bindex)->br_count); ++} ++ ++static inline int au_sbr_perm(struct super_block *sb, aufs_bindex_t bindex) ++{ ++ return au_sbr(sb, bindex)->br_perm; ++} ++ ++static inline int au_sbr_whable(struct super_block *sb, aufs_bindex_t bindex) ++{ ++ return au_br_whable(au_sbr_perm(sb, bindex)); ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++/* ++ * wbr_wh_read_lock, wbr_wh_write_lock ++ * wbr_wh_read_unlock, wbr_wh_write_unlock, wbr_wh_downgrade_lock ++ */ ++AuSimpleRwsemFuncs(wbr_wh, struct au_wbr *wbr, &wbr->wbr_wh_rwsem); ++ ++#define WbrWhMustNoWaiters(wbr) AuRwMustNoWaiters(&wbr->wbr_wh_rwsem) ++#define WbrWhMustAnyLock(wbr) AuRwMustAnyLock(&wbr->wbr_wh_rwsem) ++#define WbrWhMustWriteLock(wbr) AuRwMustWriteLock(&wbr->wbr_wh_rwsem) ++ ++/* ---------------------------------------------------------------------- */ ++ ++#ifdef CONFIG_AUFS_FHSM ++static inline void au_br_fhsm_init(struct au_br_fhsm *brfhsm) ++{ ++ mutex_init(&brfhsm->bf_lock); ++ brfhsm->bf_jiffy = 0; ++ brfhsm->bf_readable = 0; ++} ++ ++static inline void au_br_fhsm_fin(struct au_br_fhsm *brfhsm) ++{ ++ mutex_destroy(&brfhsm->bf_lock); ++} ++#else ++AuStubVoid(au_br_fhsm_init, struct au_br_fhsm *brfhsm) ++AuStubVoid(au_br_fhsm_fin, struct au_br_fhsm *brfhsm) ++#endif ++ ++#endif /* __KERNEL__ */ ++#endif /* __AUFS_BRANCH_H__ */ +diff --git a/fs/aufs/conf.mk b/fs/aufs/conf.mk +new file mode 100644 +index 0000000..0bbb2d3 +--- /dev/null ++++ b/fs/aufs/conf.mk +@@ -0,0 +1,38 @@ ++ ++AuConfStr = CONFIG_AUFS_FS=${CONFIG_AUFS_FS} ++ ++define AuConf ++ifdef ${1} ++AuConfStr += ${1}=${${1}} ++endif ++endef ++ ++AuConfAll = BRANCH_MAX_127 BRANCH_MAX_511 BRANCH_MAX_1023 BRANCH_MAX_32767 \ ++ SBILIST \ ++ HNOTIFY HFSNOTIFY \ ++ EXPORT INO_T_64 \ ++ XATTR \ ++ FHSM \ ++ RDU \ ++ SHWH \ ++ BR_RAMFS \ ++ BR_FUSE POLL \ ++ BR_HFSPLUS \ ++ BDEV_LOOP \ ++ DEBUG MAGIC_SYSRQ ++$(foreach i, ${AuConfAll}, \ ++ $(eval $(call AuConf,CONFIG_AUFS_${i}))) ++ ++AuConfName = ${obj}/conf.str ++${AuConfName}.tmp: FORCE ++ @echo ${AuConfStr} | tr ' ' '\n' | sed -e 's/^/"/' -e 's/$$/\\n"/' > $@ ++${AuConfName}: ${AuConfName}.tmp ++ @diff -q $< $@ > /dev/null 2>&1 || { \ ++ echo ' GEN ' $@; \ ++ cp -p $< $@; \ ++ } ++FORCE: ++clean-files += ${AuConfName} ${AuConfName}.tmp ++${obj}/sysfs.o: ${AuConfName} ++ ++-include ${srctree}/${src}/conf_priv.mk +diff --git a/fs/aufs/cpup.c b/fs/aufs/cpup.c +new file mode 100644 +index 0000000..9d8b767 +--- /dev/null ++++ b/fs/aufs/cpup.c +@@ -0,0 +1,1368 @@ ++/* ++ * Copyright (C) 2005-2016 Junjiro R. Okajima ++ * ++ * This program, aufs is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . ++ */ ++ ++/* ++ * copy-up functions, see wbr_policy.c for copy-down ++ */ ++ ++#include ++#include ++#include ++#include "aufs.h" ++ ++void au_cpup_attr_flags(struct inode *dst, unsigned int iflags) ++{ ++ const unsigned int mask = S_DEAD | S_SWAPFILE | S_PRIVATE ++ | S_NOATIME | S_NOCMTIME | S_AUTOMOUNT; ++ ++ BUILD_BUG_ON(sizeof(iflags) != sizeof(dst->i_flags)); ++ ++ dst->i_flags |= iflags & ~mask; ++ if (au_test_fs_notime(dst->i_sb)) ++ dst->i_flags |= S_NOATIME | S_NOCMTIME; ++} ++ ++void au_cpup_attr_timesizes(struct inode *inode) ++{ ++ struct inode *h_inode; ++ ++ h_inode = au_h_iptr(inode, au_ibstart(inode)); ++ fsstack_copy_attr_times(inode, h_inode); ++ fsstack_copy_inode_size(inode, h_inode); ++} ++ ++void au_cpup_attr_nlink(struct inode *inode, int force) ++{ ++ struct inode *h_inode; ++ struct super_block *sb; ++ aufs_bindex_t bindex, bend; ++ ++ sb = inode->i_sb; ++ bindex = au_ibstart(inode); ++ h_inode = au_h_iptr(inode, bindex); ++ if (!force ++ && !S_ISDIR(h_inode->i_mode) ++ && au_opt_test(au_mntflags(sb), PLINK) ++ && au_plink_test(inode)) ++ return; ++ ++ /* ++ * 0 can happen in revalidating. ++ * h_inode->i_mutex may not be held here, but it is harmless since once ++ * i_nlink reaches 0, it will never become positive except O_TMPFILE ++ * case. ++ * todo: O_TMPFILE+linkat(AT_SYMLINK_FOLLOW) bypassing aufs may cause ++ * the incorrect link count. ++ */ ++ set_nlink(inode, h_inode->i_nlink); ++ ++ /* ++ * fewer nlink makes find(1) noisy, but larger nlink doesn't. ++ * it may includes whplink directory. ++ */ ++ if (S_ISDIR(h_inode->i_mode)) { ++ bend = au_ibend(inode); ++ for (bindex++; bindex <= bend; bindex++) { ++ h_inode = au_h_iptr(inode, bindex); ++ if (h_inode) ++ au_add_nlink(inode, h_inode); ++ } ++ } ++} ++ ++void au_cpup_attr_changeable(struct inode *inode) ++{ ++ struct inode *h_inode; ++ ++ h_inode = au_h_iptr(inode, au_ibstart(inode)); ++ inode->i_mode = h_inode->i_mode; ++ inode->i_uid = h_inode->i_uid; ++ inode->i_gid = h_inode->i_gid; ++ au_cpup_attr_timesizes(inode); ++ au_cpup_attr_flags(inode, h_inode->i_flags); ++} ++ ++void au_cpup_igen(struct inode *inode, struct inode *h_inode) ++{ ++ struct au_iinfo *iinfo = au_ii(inode); ++ ++ IiMustWriteLock(inode); ++ ++ iinfo->ii_higen = h_inode->i_generation; ++ iinfo->ii_hsb1 = h_inode->i_sb; ++} ++ ++void au_cpup_attr_all(struct inode *inode, int force) ++{ ++ struct inode *h_inode; ++ ++ h_inode = au_h_iptr(inode, au_ibstart(inode)); ++ au_cpup_attr_changeable(inode); ++ if (inode->i_nlink > 0) ++ au_cpup_attr_nlink(inode, force); ++ inode->i_rdev = h_inode->i_rdev; ++ inode->i_blkbits = h_inode->i_blkbits; ++ au_cpup_igen(inode, h_inode); ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++/* Note: dt_dentry and dt_h_dentry are not dget/dput-ed */ ++ ++/* keep the timestamps of the parent dir when cpup */ ++void au_dtime_store(struct au_dtime *dt, struct dentry *dentry, ++ struct path *h_path) ++{ ++ struct inode *h_inode; ++ ++ dt->dt_dentry = dentry; ++ dt->dt_h_path = *h_path; ++ h_inode = h_path->dentry->d_inode; ++ dt->dt_atime = h_inode->i_atime; ++ dt->dt_mtime = h_inode->i_mtime; ++ /* smp_mb(); */ ++} ++ ++void au_dtime_revert(struct au_dtime *dt) ++{ ++ struct iattr attr; ++ int err; ++ ++ attr.ia_atime = dt->dt_atime; ++ attr.ia_mtime = dt->dt_mtime; ++ attr.ia_valid = ATTR_FORCE | ATTR_MTIME | ATTR_MTIME_SET ++ | ATTR_ATIME | ATTR_ATIME_SET; ++ ++ /* no delegation since this is a directory */ ++ err = vfsub_notify_change(&dt->dt_h_path, &attr, /*delegated*/NULL); ++ if (unlikely(err)) ++ pr_warn("restoring timestamps failed(%d). ignored\n", err); ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++/* internal use only */ ++struct au_cpup_reg_attr { ++ int valid; ++ struct kstat st; ++ unsigned int iflags; /* inode->i_flags */ ++}; ++ ++static noinline_for_stack ++int cpup_iattr(struct dentry *dst, aufs_bindex_t bindex, struct dentry *h_src, ++ struct au_cpup_reg_attr *h_src_attr) ++{ ++ int err, sbits, icex; ++ unsigned int mnt_flags; ++ unsigned char verbose; ++ struct iattr ia; ++ struct path h_path; ++ struct inode *h_isrc, *h_idst; ++ struct kstat *h_st; ++ struct au_branch *br; ++ ++ h_path.dentry = au_h_dptr(dst, bindex); ++ h_idst = h_path.dentry->d_inode; ++ br = au_sbr(dst->d_sb, bindex); ++ h_path.mnt = au_br_mnt(br); ++ h_isrc = h_src->d_inode; ++ ia.ia_valid = ATTR_FORCE | ATTR_UID | ATTR_GID ++ | ATTR_ATIME | ATTR_MTIME ++ | ATTR_ATIME_SET | ATTR_MTIME_SET; ++ if (h_src_attr && h_src_attr->valid) { ++ h_st = &h_src_attr->st; ++ ia.ia_uid = h_st->uid; ++ ia.ia_gid = h_st->gid; ++ ia.ia_atime = h_st->atime; ++ ia.ia_mtime = h_st->mtime; ++ if (h_idst->i_mode != h_st->mode ++ && !S_ISLNK(h_idst->i_mode)) { ++ ia.ia_valid |= ATTR_MODE; ++ ia.ia_mode = h_st->mode; ++ } ++ sbits = !!(h_st->mode & (S_ISUID | S_ISGID)); ++ au_cpup_attr_flags(h_idst, h_src_attr->iflags); ++ } else { ++ ia.ia_uid = h_isrc->i_uid; ++ ia.ia_gid = h_isrc->i_gid; ++ ia.ia_atime = h_isrc->i_atime; ++ ia.ia_mtime = h_isrc->i_mtime; ++ if (h_idst->i_mode != h_isrc->i_mode ++ && !S_ISLNK(h_idst->i_mode)) { ++ ia.ia_valid |= ATTR_MODE; ++ ia.ia_mode = h_isrc->i_mode; ++ } ++ sbits = !!(h_isrc->i_mode & (S_ISUID | S_ISGID)); ++ au_cpup_attr_flags(h_idst, h_isrc->i_flags); ++ } ++ /* no delegation since it is just created */ ++ err = vfsub_notify_change(&h_path, &ia, /*delegated*/NULL); ++ ++ /* is this nfs only? */ ++ if (!err && sbits && au_test_nfs(h_path.dentry->d_sb)) { ++ ia.ia_valid = ATTR_FORCE | ATTR_MODE; ++ ia.ia_mode = h_isrc->i_mode; ++ err = vfsub_notify_change(&h_path, &ia, /*delegated*/NULL); ++ } ++ ++ icex = br->br_perm & AuBrAttr_ICEX; ++ if (!err) { ++ mnt_flags = au_mntflags(dst->d_sb); ++ verbose = !!au_opt_test(mnt_flags, VERBOSE); ++ err = au_cpup_xattr(h_path.dentry, h_src, icex, verbose); ++ } ++ ++ return err; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++static int au_do_copy_file(struct file *dst, struct file *src, loff_t len, ++ char *buf, unsigned long blksize) ++{ ++ int err; ++ size_t sz, rbytes, wbytes; ++ unsigned char all_zero; ++ char *p, *zp; ++ struct mutex *h_mtx; ++ /* reduce stack usage */ ++ struct iattr *ia; ++ ++ zp = page_address(ZERO_PAGE(0)); ++ if (unlikely(!zp)) ++ return -ENOMEM; /* possible? */ ++ ++ err = 0; ++ all_zero = 0; ++ while (len) { ++ AuDbg("len %lld\n", len); ++ sz = blksize; ++ if (len < blksize) ++ sz = len; ++ ++ rbytes = 0; ++ /* todo: signal_pending? */ ++ while (!rbytes || err == -EAGAIN || err == -EINTR) { ++ rbytes = vfsub_read_k(src, buf, sz, &src->f_pos); ++ err = rbytes; ++ } ++ if (unlikely(err < 0)) ++ break; ++ ++ all_zero = 0; ++ if (len >= rbytes && rbytes == blksize) ++ all_zero = !memcmp(buf, zp, rbytes); ++ if (!all_zero) { ++ wbytes = rbytes; ++ p = buf; ++ while (wbytes) { ++ size_t b; ++ ++ b = vfsub_write_k(dst, p, wbytes, &dst->f_pos); ++ err = b; ++ /* todo: signal_pending? */ ++ if (unlikely(err == -EAGAIN || err == -EINTR)) ++ continue; ++ if (unlikely(err < 0)) ++ break; ++ wbytes -= b; ++ p += b; ++ } ++ if (unlikely(err < 0)) ++ break; ++ } else { ++ loff_t res; ++ ++ AuLabel(hole); ++ res = vfsub_llseek(dst, rbytes, SEEK_CUR); ++ err = res; ++ if (unlikely(res < 0)) ++ break; ++ } ++ len -= rbytes; ++ err = 0; ++ } ++ ++ /* the last block may be a hole */ ++ if (!err && all_zero) { ++ AuLabel(last hole); ++ ++ err = 1; ++ if (au_test_nfs(dst->f_dentry->d_sb)) { ++ /* nfs requires this step to make last hole */ ++ /* is this only nfs? */ ++ do { ++ /* todo: signal_pending? */ ++ err = vfsub_write_k(dst, "\0", 1, &dst->f_pos); ++ } while (err == -EAGAIN || err == -EINTR); ++ if (err == 1) ++ dst->f_pos--; ++ } ++ ++ if (err == 1) { ++ ia = (void *)buf; ++ ia->ia_size = dst->f_pos; ++ ia->ia_valid = ATTR_SIZE | ATTR_FILE; ++ ia->ia_file = dst; ++ h_mtx = &file_inode(dst)->i_mutex; ++ mutex_lock_nested(h_mtx, AuLsc_I_CHILD2); ++ /* no delegation since it is just created */ ++ err = vfsub_notify_change(&dst->f_path, ia, ++ /*delegated*/NULL); ++ mutex_unlock(h_mtx); ++ } ++ } ++ ++ return err; ++} ++ ++int au_copy_file(struct file *dst, struct file *src, loff_t len) ++{ ++ int err; ++ unsigned long blksize; ++ unsigned char do_kfree; ++ char *buf; ++ ++ err = -ENOMEM; ++ blksize = dst->f_dentry->d_sb->s_blocksize; ++ if (!blksize || PAGE_SIZE < blksize) ++ blksize = PAGE_SIZE; ++ AuDbg("blksize %lu\n", blksize); ++ do_kfree = (blksize != PAGE_SIZE && blksize >= sizeof(struct iattr *)); ++ if (do_kfree) ++ buf = kmalloc(blksize, GFP_NOFS); ++ else ++ buf = (void *)__get_free_page(GFP_NOFS); ++ if (unlikely(!buf)) ++ goto out; ++ ++ if (len > (1 << 22)) ++ AuDbg("copying a large file %lld\n", (long long)len); ++ ++ src->f_pos = 0; ++ dst->f_pos = 0; ++ err = au_do_copy_file(dst, src, len, buf, blksize); ++ if (do_kfree) ++ kfree(buf); ++ else ++ free_page((unsigned long)buf); ++ ++out: ++ return err; ++} ++ ++/* ++ * to support a sparse file which is opened with O_APPEND, ++ * we need to close the file. ++ */ ++static int au_cp_regular(struct au_cp_generic *cpg) ++{ ++ int err, i; ++ enum { SRC, DST }; ++ struct { ++ aufs_bindex_t bindex; ++ unsigned int flags; ++ struct dentry *dentry; ++ int force_wr; ++ struct file *file; ++ void *label; ++ } *f, file[] = { ++ { ++ .bindex = cpg->bsrc, ++ .flags = O_RDONLY | O_NOATIME | O_LARGEFILE, ++ .label = &&out ++ }, ++ { ++ .bindex = cpg->bdst, ++ .flags = O_WRONLY | O_NOATIME | O_LARGEFILE, ++ .force_wr = !!au_ftest_cpup(cpg->flags, RWDST), ++ .label = &&out_src ++ } ++ }; ++ struct super_block *sb; ++ struct task_struct *tsk = current; ++ ++ /* bsrc branch can be ro/rw. */ ++ sb = cpg->dentry->d_sb; ++ f = file; ++ for (i = 0; i < 2; i++, f++) { ++ f->dentry = au_h_dptr(cpg->dentry, f->bindex); ++ f->file = au_h_open(cpg->dentry, f->bindex, f->flags, ++ /*file*/NULL, f->force_wr); ++ err = PTR_ERR(f->file); ++ if (IS_ERR(f->file)) ++ goto *f->label; ++ } ++ ++ /* try stopping to update while we copyup */ ++ IMustLock(file[SRC].dentry->d_inode); ++ err = au_copy_file(file[DST].file, file[SRC].file, cpg->len); ++ ++ /* i wonder if we had O_NO_DELAY_FPUT flag */ ++ if (tsk->flags & PF_KTHREAD) ++ __fput_sync(file[DST].file); ++ else { ++ WARN(1, "%pD\nPlease report this warning to aufs-users ML", ++ file[DST].file); ++ fput(file[DST].file); ++ /* ++ * too bad. ++ * we have to call both since we don't know which place the file ++ * was added to. ++ */ ++ task_work_run(); ++ flush_delayed_fput(); ++ } ++ au_sbr_put(sb, file[DST].bindex); ++ ++out_src: ++ fput(file[SRC].file); ++ au_sbr_put(sb, file[SRC].bindex); ++out: ++ return err; ++} ++ ++static int au_do_cpup_regular(struct au_cp_generic *cpg, ++ struct au_cpup_reg_attr *h_src_attr) ++{ ++ int err, rerr; ++ loff_t l; ++ struct path h_path; ++ struct inode *h_src_inode, *h_dst_inode; ++ ++ err = 0; ++ h_src_inode = au_h_iptr(cpg->dentry->d_inode, cpg->bsrc); ++ l = i_size_read(h_src_inode); ++ if (cpg->len == -1 || l < cpg->len) ++ cpg->len = l; ++ if (cpg->len) { ++ /* try stopping to update while we are referencing */ ++ mutex_lock_nested(&h_src_inode->i_mutex, AuLsc_I_CHILD); ++ au_pin_hdir_unlock(cpg->pin); ++ ++ h_path.dentry = au_h_dptr(cpg->dentry, cpg->bsrc); ++ h_path.mnt = au_sbr_mnt(cpg->dentry->d_sb, cpg->bsrc); ++ h_src_attr->iflags = h_src_inode->i_flags; ++ err = vfs_getattr(&h_path, &h_src_attr->st); ++ if (unlikely(err)) { ++ mutex_unlock(&h_src_inode->i_mutex); ++ goto out; ++ } ++ h_src_attr->valid = 1; ++ err = au_cp_regular(cpg); ++ mutex_unlock(&h_src_inode->i_mutex); ++ rerr = au_pin_hdir_relock(cpg->pin); ++ if (!err && rerr) ++ err = rerr; ++ } ++ if (!err && (h_src_inode->i_state & I_LINKABLE)) { ++ h_path.dentry = au_h_dptr(cpg->dentry, cpg->bdst); ++ h_dst_inode = h_path.dentry->d_inode; ++ spin_lock(&h_dst_inode->i_lock); ++ h_dst_inode->i_state |= I_LINKABLE; ++ spin_unlock(&h_dst_inode->i_lock); ++ } ++ ++out: ++ return err; ++} ++ ++static int au_do_cpup_symlink(struct path *h_path, struct dentry *h_src, ++ struct inode *h_dir) ++{ ++ int err, symlen; ++ mm_segment_t old_fs; ++ union { ++ char *k; ++ char __user *u; ++ } sym; ++ ++ err = -ENOSYS; ++ if (unlikely(!h_src->d_inode->i_op->readlink)) ++ goto out; ++ ++ err = -ENOMEM; ++ sym.k = (void *)__get_free_page(GFP_NOFS); ++ if (unlikely(!sym.k)) ++ goto out; ++ ++ /* unnecessary to support mmap_sem since symlink is not mmap-able */ ++ old_fs = get_fs(); ++ set_fs(KERNEL_DS); ++ symlen = h_src->d_inode->i_op->readlink(h_src, sym.u, PATH_MAX); ++ err = symlen; ++ set_fs(old_fs); ++ ++ if (symlen > 0) { ++ sym.k[symlen] = 0; ++ err = vfsub_symlink(h_dir, h_path, sym.k); ++ } ++ free_page((unsigned long)sym.k); ++ ++out: ++ return err; ++} ++ ++/* ++ * regardless 'acl' option, reset all ACL. ++ * All ACL will be copied up later from the original entry on the lower branch. ++ */ ++static int au_reset_acl(struct inode *h_dir, struct path *h_path, umode_t mode) ++{ ++ int err; ++ struct dentry *h_dentry; ++ struct inode *h_inode; ++ ++ h_dentry = h_path->dentry; ++ h_inode = h_dentry->d_inode; ++ /* forget_all_cached_acls(h_inode)); */ ++ err = vfsub_removexattr(h_dentry, XATTR_NAME_POSIX_ACL_ACCESS); ++ AuTraceErr(err); ++ if (err == -EOPNOTSUPP) ++ err = 0; ++ if (!err) ++ err = vfsub_acl_chmod(h_inode, mode); ++ ++ AuTraceErr(err); ++ return err; ++} ++ ++static int au_do_cpup_dir(struct au_cp_generic *cpg, struct dentry *dst_parent, ++ struct inode *h_dir, struct path *h_path) ++{ ++ int err; ++ struct inode *dir; ++ ++ err = vfsub_removexattr(h_path->dentry, XATTR_NAME_POSIX_ACL_DEFAULT); ++ AuTraceErr(err); ++ if (err == -EOPNOTSUPP) ++ err = 0; ++ if (unlikely(err)) ++ goto out; ++ ++ /* ++ * strange behaviour from the users view, ++ * particularry setattr case ++ */ ++ dir = dst_parent->d_inode; ++ if (au_ibstart(dir) == cpg->bdst) ++ au_cpup_attr_nlink(dir, /*force*/1); ++ au_cpup_attr_nlink(cpg->dentry->d_inode, /*force*/1); ++ ++out: ++ return err; ++} ++ ++static noinline_for_stack ++int cpup_entry(struct au_cp_generic *cpg, struct dentry *dst_parent, ++ struct au_cpup_reg_attr *h_src_attr) ++{ ++ int err; ++ umode_t mode; ++ unsigned int mnt_flags; ++ unsigned char isdir, isreg, force; ++ const unsigned char do_dt = !!au_ftest_cpup(cpg->flags, DTIME); ++ struct au_dtime dt; ++ struct path h_path; ++ struct dentry *h_src, *h_dst, *h_parent; ++ struct inode *h_inode, *h_dir; ++ struct super_block *sb; ++ ++ /* bsrc branch can be ro/rw. */ ++ h_src = au_h_dptr(cpg->dentry, cpg->bsrc); ++ h_inode = h_src->d_inode; ++ AuDebugOn(h_inode != au_h_iptr(cpg->dentry->d_inode, cpg->bsrc)); ++ ++ /* try stopping to be referenced while we are creating */ ++ h_dst = au_h_dptr(cpg->dentry, cpg->bdst); ++ if (au_ftest_cpup(cpg->flags, RENAME)) ++ AuDebugOn(strncmp(h_dst->d_name.name, AUFS_WH_PFX, ++ AUFS_WH_PFX_LEN)); ++ h_parent = h_dst->d_parent; /* dir inode is locked */ ++ h_dir = h_parent->d_inode; ++ IMustLock(h_dir); ++ AuDebugOn(h_parent != h_dst->d_parent); ++ ++ sb = cpg->dentry->d_sb; ++ h_path.mnt = au_sbr_mnt(sb, cpg->bdst); ++ if (do_dt) { ++ h_path.dentry = h_parent; ++ au_dtime_store(&dt, dst_parent, &h_path); ++ } ++ h_path.dentry = h_dst; ++ ++ isreg = 0; ++ isdir = 0; ++ mode = h_inode->i_mode; ++ switch (mode & S_IFMT) { ++ case S_IFREG: ++ isreg = 1; ++ err = vfsub_create(h_dir, &h_path, S_IRUSR | S_IWUSR, ++ /*want_excl*/true); ++ if (!err) ++ err = au_do_cpup_regular(cpg, h_src_attr); ++ break; ++ case S_IFDIR: ++ isdir = 1; ++ err = vfsub_mkdir(h_dir, &h_path, mode); ++ if (!err) ++ err = au_do_cpup_dir(cpg, dst_parent, h_dir, &h_path); ++ break; ++ case S_IFLNK: ++ err = au_do_cpup_symlink(&h_path, h_src, h_dir); ++ break; ++ case S_IFCHR: ++ case S_IFBLK: ++ AuDebugOn(!capable(CAP_MKNOD)); ++ /*FALLTHROUGH*/ ++ case S_IFIFO: ++ case S_IFSOCK: ++ err = vfsub_mknod(h_dir, &h_path, mode, h_inode->i_rdev); ++ break; ++ default: ++ AuIOErr("Unknown inode type 0%o\n", mode); ++ err = -EIO; ++ } ++ if (!err) ++ err = au_reset_acl(h_dir, &h_path, mode); ++ ++ mnt_flags = au_mntflags(sb); ++ if (!au_opt_test(mnt_flags, UDBA_NONE) ++ && !isdir ++ && au_opt_test(mnt_flags, XINO) ++ && (h_inode->i_nlink == 1 ++ || (h_inode->i_state & I_LINKABLE)) ++ /* todo: unnecessary? */ ++ /* && cpg->dentry->d_inode->i_nlink == 1 */ ++ && cpg->bdst < cpg->bsrc ++ && !au_ftest_cpup(cpg->flags, KEEPLINO)) ++ au_xino_write(sb, cpg->bsrc, h_inode->i_ino, /*ino*/0); ++ /* ignore this error */ ++ ++ if (!err) { ++ force = 0; ++ if (isreg) { ++ force = !!cpg->len; ++ if (cpg->len == -1) ++ force = !!i_size_read(h_inode); ++ } ++ au_fhsm_wrote(sb, cpg->bdst, force); ++ } ++ ++ if (do_dt) ++ au_dtime_revert(&dt); ++ return err; ++} ++ ++static int au_do_ren_after_cpup(struct au_cp_generic *cpg, struct path *h_path) ++{ ++ int err; ++ struct dentry *dentry, *h_dentry, *h_parent, *parent; ++ struct inode *h_dir; ++ aufs_bindex_t bdst; ++ ++ dentry = cpg->dentry; ++ bdst = cpg->bdst; ++ h_dentry = au_h_dptr(dentry, bdst); ++ if (!au_ftest_cpup(cpg->flags, OVERWRITE)) { ++ dget(h_dentry); ++ au_set_h_dptr(dentry, bdst, NULL); ++ err = au_lkup_neg(dentry, bdst, /*wh*/0); ++ if (!err) ++ h_path->dentry = dget(au_h_dptr(dentry, bdst)); ++ au_set_h_dptr(dentry, bdst, h_dentry); ++ } else { ++ err = 0; ++ parent = dget_parent(dentry); ++ h_parent = au_h_dptr(parent, bdst); ++ dput(parent); ++ h_path->dentry = vfsub_lkup_one(&dentry->d_name, h_parent); ++ if (IS_ERR(h_path->dentry)) ++ err = PTR_ERR(h_path->dentry); ++ } ++ if (unlikely(err)) ++ goto out; ++ ++ h_parent = h_dentry->d_parent; /* dir inode is locked */ ++ h_dir = h_parent->d_inode; ++ IMustLock(h_dir); ++ AuDbg("%pd %pd\n", h_dentry, h_path->dentry); ++ /* no delegation since it is just created */ ++ err = vfsub_rename(h_dir, h_dentry, h_dir, h_path, /*delegated*/NULL); ++ dput(h_path->dentry); ++ ++out: ++ return err; ++} ++ ++/* ++ * copyup the @dentry from @bsrc to @bdst. ++ * the caller must set the both of lower dentries. ++ * @len is for truncating when it is -1 copyup the entire file. ++ * in link/rename cases, @dst_parent may be different from the real one. ++ * basic->bsrc can be larger than basic->bdst. ++ */ ++static int au_cpup_single(struct au_cp_generic *cpg, struct dentry *dst_parent) ++{ ++ int err, rerr; ++ aufs_bindex_t old_ibstart; ++ unsigned char isdir, plink; ++ struct dentry *h_src, *h_dst, *h_parent; ++ struct inode *dst_inode, *h_dir, *inode, *delegated; ++ struct super_block *sb; ++ struct au_branch *br; ++ /* to reuduce stack size */ ++ struct { ++ struct au_dtime dt; ++ struct path h_path; ++ struct au_cpup_reg_attr h_src_attr; ++ } *a; ++ ++ err = -ENOMEM; ++ a = kmalloc(sizeof(*a), GFP_NOFS); ++ if (unlikely(!a)) ++ goto out; ++ a->h_src_attr.valid = 0; ++ ++ sb = cpg->dentry->d_sb; ++ br = au_sbr(sb, cpg->bdst); ++ a->h_path.mnt = au_br_mnt(br); ++ h_dst = au_h_dptr(cpg->dentry, cpg->bdst); ++ h_parent = h_dst->d_parent; /* dir inode is locked */ ++ h_dir = h_parent->d_inode; ++ IMustLock(h_dir); ++ ++ h_src = au_h_dptr(cpg->dentry, cpg->bsrc); ++ inode = cpg->dentry->d_inode; ++ ++ if (!dst_parent) ++ dst_parent = dget_parent(cpg->dentry); ++ else ++ dget(dst_parent); ++ ++ plink = !!au_opt_test(au_mntflags(sb), PLINK); ++ dst_inode = au_h_iptr(inode, cpg->bdst); ++ if (dst_inode) { ++ if (unlikely(!plink)) { ++ err = -EIO; ++ AuIOErr("hi%lu(i%lu) exists on b%d " ++ "but plink is disabled\n", ++ dst_inode->i_ino, inode->i_ino, cpg->bdst); ++ goto out_parent; ++ } ++ ++ if (dst_inode->i_nlink) { ++ const int do_dt = au_ftest_cpup(cpg->flags, DTIME); ++ ++ h_src = au_plink_lkup(inode, cpg->bdst); ++ err = PTR_ERR(h_src); ++ if (IS_ERR(h_src)) ++ goto out_parent; ++ if (unlikely(!h_src->d_inode)) { ++ err = -EIO; ++ AuIOErr("i%lu exists on b%d " ++ "but not pseudo-linked\n", ++ inode->i_ino, cpg->bdst); ++ dput(h_src); ++ goto out_parent; ++ } ++ ++ if (do_dt) { ++ a->h_path.dentry = h_parent; ++ au_dtime_store(&a->dt, dst_parent, &a->h_path); ++ } ++ ++ a->h_path.dentry = h_dst; ++ delegated = NULL; ++ err = vfsub_link(h_src, h_dir, &a->h_path, &delegated); ++ if (!err && au_ftest_cpup(cpg->flags, RENAME)) ++ err = au_do_ren_after_cpup(cpg, &a->h_path); ++ if (do_dt) ++ au_dtime_revert(&a->dt); ++ if (unlikely(err == -EWOULDBLOCK)) { ++ pr_warn("cannot retry for NFSv4 delegation" ++ " for an internal link\n"); ++ iput(delegated); ++ } ++ dput(h_src); ++ goto out_parent; ++ } else ++ /* todo: cpup_wh_file? */ ++ /* udba work */ ++ au_update_ibrange(inode, /*do_put_zero*/1); ++ } ++ ++ isdir = S_ISDIR(inode->i_mode); ++ old_ibstart = au_ibstart(inode); ++ err = cpup_entry(cpg, dst_parent, &a->h_src_attr); ++ if (unlikely(err)) ++ goto out_rev; ++ dst_inode = h_dst->d_inode; ++ mutex_lock_nested(&dst_inode->i_mutex, AuLsc_I_CHILD2); ++ /* todo: necessary? */ ++ /* au_pin_hdir_unlock(cpg->pin); */ ++ ++ err = cpup_iattr(cpg->dentry, cpg->bdst, h_src, &a->h_src_attr); ++ if (unlikely(err)) { ++ /* todo: necessary? */ ++ /* au_pin_hdir_relock(cpg->pin); */ /* ignore an error */ ++ mutex_unlock(&dst_inode->i_mutex); ++ goto out_rev; ++ } ++ ++ if (cpg->bdst < old_ibstart) { ++ if (S_ISREG(inode->i_mode)) { ++ err = au_dy_iaop(inode, cpg->bdst, dst_inode); ++ if (unlikely(err)) { ++ /* ignore an error */ ++ /* au_pin_hdir_relock(cpg->pin); */ ++ mutex_unlock(&dst_inode->i_mutex); ++ goto out_rev; ++ } ++ } ++ au_set_ibstart(inode, cpg->bdst); ++ } else ++ au_set_ibend(inode, cpg->bdst); ++ au_set_h_iptr(inode, cpg->bdst, au_igrab(dst_inode), ++ au_hi_flags(inode, isdir)); ++ ++ /* todo: necessary? */ ++ /* err = au_pin_hdir_relock(cpg->pin); */ ++ mutex_unlock(&dst_inode->i_mutex); ++ if (unlikely(err)) ++ goto out_rev; ++ ++ if (!isdir ++ && (h_src->d_inode->i_nlink > 1 ++ || h_src->d_inode->i_state & I_LINKABLE) ++ && plink) ++ au_plink_append(inode, cpg->bdst, h_dst); ++ ++ if (au_ftest_cpup(cpg->flags, RENAME)) { ++ a->h_path.dentry = h_dst; ++ err = au_do_ren_after_cpup(cpg, &a->h_path); ++ } ++ if (!err) ++ goto out_parent; /* success */ ++ ++ /* revert */ ++out_rev: ++ a->h_path.dentry = h_parent; ++ au_dtime_store(&a->dt, dst_parent, &a->h_path); ++ a->h_path.dentry = h_dst; ++ rerr = 0; ++ if (h_dst->d_inode) { ++ if (!isdir) { ++ /* no delegation since it is just created */ ++ rerr = vfsub_unlink(h_dir, &a->h_path, ++ /*delegated*/NULL, /*force*/0); ++ } else ++ rerr = vfsub_rmdir(h_dir, &a->h_path); ++ } ++ au_dtime_revert(&a->dt); ++ if (rerr) { ++ AuIOErr("failed removing broken entry(%d, %d)\n", err, rerr); ++ err = -EIO; ++ } ++out_parent: ++ dput(dst_parent); ++ kfree(a); ++out: ++ return err; ++} ++ ++#if 0 /* reserved */ ++struct au_cpup_single_args { ++ int *errp; ++ struct au_cp_generic *cpg; ++ struct dentry *dst_parent; ++}; ++ ++static void au_call_cpup_single(void *args) ++{ ++ struct au_cpup_single_args *a = args; ++ ++ au_pin_hdir_acquire_nest(a->cpg->pin); ++ *a->errp = au_cpup_single(a->cpg, a->dst_parent); ++ au_pin_hdir_release(a->cpg->pin); ++} ++#endif ++ ++/* ++ * prevent SIGXFSZ in copy-up. ++ * testing CAP_MKNOD is for generic fs, ++ * but CAP_FSETID is for xfs only, currently. ++ */ ++static int au_cpup_sio_test(struct au_pin *pin, umode_t mode) ++{ ++ int do_sio; ++ struct super_block *sb; ++ struct inode *h_dir; ++ ++ do_sio = 0; ++ sb = au_pinned_parent(pin)->d_sb; ++ if (!au_wkq_test() ++ && (!au_sbi(sb)->si_plink_maint_pid ++ || au_plink_maint(sb, AuLock_NOPLM))) { ++ switch (mode & S_IFMT) { ++ case S_IFREG: ++ /* no condition about RLIMIT_FSIZE and the file size */ ++ do_sio = 1; ++ break; ++ case S_IFCHR: ++ case S_IFBLK: ++ do_sio = !capable(CAP_MKNOD); ++ break; ++ } ++ if (!do_sio) ++ do_sio = ((mode & (S_ISUID | S_ISGID)) ++ && !capable(CAP_FSETID)); ++ /* this workaround may be removed in the future */ ++ if (!do_sio) { ++ h_dir = au_pinned_h_dir(pin); ++ do_sio = h_dir->i_mode & S_ISVTX; ++ } ++ } ++ ++ return do_sio; ++} ++ ++#if 0 /* reserved */ ++int au_sio_cpup_single(struct au_cp_generic *cpg, struct dentry *dst_parent) ++{ ++ int err, wkq_err; ++ struct dentry *h_dentry; ++ ++ h_dentry = au_h_dptr(cpg->dentry, cpg->bsrc); ++ if (!au_cpup_sio_test(pin, h_dentry->d_inode->i_mode)) ++ err = au_cpup_single(cpg, dst_parent); ++ else { ++ struct au_cpup_single_args args = { ++ .errp = &err, ++ .cpg = cpg, ++ .dst_parent = dst_parent ++ }; ++ wkq_err = au_wkq_wait(au_call_cpup_single, &args); ++ if (unlikely(wkq_err)) ++ err = wkq_err; ++ } ++ ++ return err; ++} ++#endif ++ ++/* ++ * copyup the @dentry from the first active lower branch to @bdst, ++ * using au_cpup_single(). ++ */ ++static int au_cpup_simple(struct au_cp_generic *cpg) ++{ ++ int err; ++ unsigned int flags_orig; ++ struct dentry *dentry; ++ ++ AuDebugOn(cpg->bsrc < 0); ++ ++ dentry = cpg->dentry; ++ DiMustWriteLock(dentry); ++ ++ err = au_lkup_neg(dentry, cpg->bdst, /*wh*/1); ++ if (!err) { ++ flags_orig = cpg->flags; ++ au_fset_cpup(cpg->flags, RENAME); ++ err = au_cpup_single(cpg, NULL); ++ cpg->flags = flags_orig; ++ if (!err) ++ return 0; /* success */ ++ ++ /* revert */ ++ au_set_h_dptr(dentry, cpg->bdst, NULL); ++ au_set_dbstart(dentry, cpg->bsrc); ++ } ++ ++ return err; ++} ++ ++struct au_cpup_simple_args { ++ int *errp; ++ struct au_cp_generic *cpg; ++}; ++ ++static void au_call_cpup_simple(void *args) ++{ ++ struct au_cpup_simple_args *a = args; ++ ++ au_pin_hdir_acquire_nest(a->cpg->pin); ++ *a->errp = au_cpup_simple(a->cpg); ++ au_pin_hdir_release(a->cpg->pin); ++} ++ ++static int au_do_sio_cpup_simple(struct au_cp_generic *cpg) ++{ ++ int err, wkq_err; ++ struct dentry *dentry, *parent; ++ struct file *h_file; ++ struct inode *h_dir; ++ ++ dentry = cpg->dentry; ++ h_file = NULL; ++ if (au_ftest_cpup(cpg->flags, HOPEN)) { ++ AuDebugOn(cpg->bsrc < 0); ++ h_file = au_h_open_pre(dentry, cpg->bsrc, /*force_wr*/0); ++ err = PTR_ERR(h_file); ++ if (IS_ERR(h_file)) ++ goto out; ++ } ++ ++ parent = dget_parent(dentry); ++ h_dir = au_h_iptr(parent->d_inode, cpg->bdst); ++ if (!au_test_h_perm_sio(h_dir, MAY_EXEC | MAY_WRITE) ++ && !au_cpup_sio_test(cpg->pin, dentry->d_inode->i_mode)) ++ err = au_cpup_simple(cpg); ++ else { ++ struct au_cpup_simple_args args = { ++ .errp = &err, ++ .cpg = cpg ++ }; ++ wkq_err = au_wkq_wait(au_call_cpup_simple, &args); ++ if (unlikely(wkq_err)) ++ err = wkq_err; ++ } ++ ++ dput(parent); ++ if (h_file) ++ au_h_open_post(dentry, cpg->bsrc, h_file); ++ ++out: ++ return err; ++} ++ ++int au_sio_cpup_simple(struct au_cp_generic *cpg) ++{ ++ aufs_bindex_t bsrc, bend; ++ struct dentry *dentry, *h_dentry; ++ ++ if (cpg->bsrc < 0) { ++ dentry = cpg->dentry; ++ bend = au_dbend(dentry); ++ for (bsrc = cpg->bdst + 1; bsrc <= bend; bsrc++) { ++ h_dentry = au_h_dptr(dentry, bsrc); ++ if (h_dentry) { ++ AuDebugOn(!h_dentry->d_inode); ++ break; ++ } ++ } ++ AuDebugOn(bsrc > bend); ++ cpg->bsrc = bsrc; ++ } ++ AuDebugOn(cpg->bsrc <= cpg->bdst); ++ return au_do_sio_cpup_simple(cpg); ++} ++ ++int au_sio_cpdown_simple(struct au_cp_generic *cpg) ++{ ++ AuDebugOn(cpg->bdst <= cpg->bsrc); ++ return au_do_sio_cpup_simple(cpg); ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++/* ++ * copyup the deleted file for writing. ++ */ ++static int au_do_cpup_wh(struct au_cp_generic *cpg, struct dentry *wh_dentry, ++ struct file *file) ++{ ++ int err; ++ unsigned int flags_orig; ++ aufs_bindex_t bsrc_orig; ++ struct dentry *h_d_dst, *h_d_start; ++ struct au_dinfo *dinfo; ++ struct au_hdentry *hdp; ++ ++ dinfo = au_di(cpg->dentry); ++ AuRwMustWriteLock(&dinfo->di_rwsem); ++ ++ bsrc_orig = cpg->bsrc; ++ cpg->bsrc = dinfo->di_bstart; ++ hdp = dinfo->di_hdentry; ++ h_d_dst = hdp[0 + cpg->bdst].hd_dentry; ++ dinfo->di_bstart = cpg->bdst; ++ hdp[0 + cpg->bdst].hd_dentry = wh_dentry; ++ h_d_start = NULL; ++ if (file) { ++ h_d_start = hdp[0 + cpg->bsrc].hd_dentry; ++ hdp[0 + cpg->bsrc].hd_dentry = au_hf_top(file)->f_dentry; ++ } ++ flags_orig = cpg->flags; ++ cpg->flags = !AuCpup_DTIME; ++ err = au_cpup_single(cpg, /*h_parent*/NULL); ++ cpg->flags = flags_orig; ++ if (file) { ++ if (!err) ++ err = au_reopen_nondir(file); ++ hdp[0 + cpg->bsrc].hd_dentry = h_d_start; ++ } ++ hdp[0 + cpg->bdst].hd_dentry = h_d_dst; ++ dinfo->di_bstart = cpg->bsrc; ++ cpg->bsrc = bsrc_orig; ++ ++ return err; ++} ++ ++static int au_cpup_wh(struct au_cp_generic *cpg, struct file *file) ++{ ++ int err; ++ aufs_bindex_t bdst; ++ struct au_dtime dt; ++ struct dentry *dentry, *parent, *h_parent, *wh_dentry; ++ struct au_branch *br; ++ struct path h_path; ++ ++ dentry = cpg->dentry; ++ bdst = cpg->bdst; ++ br = au_sbr(dentry->d_sb, bdst); ++ parent = dget_parent(dentry); ++ h_parent = au_h_dptr(parent, bdst); ++ wh_dentry = au_whtmp_lkup(h_parent, br, &dentry->d_name); ++ err = PTR_ERR(wh_dentry); ++ if (IS_ERR(wh_dentry)) ++ goto out; ++ ++ h_path.dentry = h_parent; ++ h_path.mnt = au_br_mnt(br); ++ au_dtime_store(&dt, parent, &h_path); ++ err = au_do_cpup_wh(cpg, wh_dentry, file); ++ if (unlikely(err)) ++ goto out_wh; ++ ++ dget(wh_dentry); ++ h_path.dentry = wh_dentry; ++ if (!d_is_dir(wh_dentry)) { ++ /* no delegation since it is just created */ ++ err = vfsub_unlink(h_parent->d_inode, &h_path, ++ /*delegated*/NULL, /*force*/0); ++ } else ++ err = vfsub_rmdir(h_parent->d_inode, &h_path); ++ if (unlikely(err)) { ++ AuIOErr("failed remove copied-up tmp file %pd(%d)\n", ++ wh_dentry, err); ++ err = -EIO; ++ } ++ au_dtime_revert(&dt); ++ au_set_hi_wh(dentry->d_inode, bdst, wh_dentry); ++ ++out_wh: ++ dput(wh_dentry); ++out: ++ dput(parent); ++ return err; ++} ++ ++struct au_cpup_wh_args { ++ int *errp; ++ struct au_cp_generic *cpg; ++ struct file *file; ++}; ++ ++static void au_call_cpup_wh(void *args) ++{ ++ struct au_cpup_wh_args *a = args; ++ ++ au_pin_hdir_acquire_nest(a->cpg->pin); ++ *a->errp = au_cpup_wh(a->cpg, a->file); ++ au_pin_hdir_release(a->cpg->pin); ++} ++ ++int au_sio_cpup_wh(struct au_cp_generic *cpg, struct file *file) ++{ ++ int err, wkq_err; ++ aufs_bindex_t bdst; ++ struct dentry *dentry, *parent, *h_orph, *h_parent; ++ struct inode *dir, *h_dir, *h_tmpdir; ++ struct au_wbr *wbr; ++ struct au_pin wh_pin, *pin_orig; ++ ++ dentry = cpg->dentry; ++ bdst = cpg->bdst; ++ parent = dget_parent(dentry); ++ dir = parent->d_inode; ++ h_orph = NULL; ++ h_parent = NULL; ++ h_dir = au_igrab(au_h_iptr(dir, bdst)); ++ h_tmpdir = h_dir; ++ pin_orig = NULL; ++ if (!h_dir->i_nlink) { ++ wbr = au_sbr(dentry->d_sb, bdst)->br_wbr; ++ h_orph = wbr->wbr_orph; ++ ++ h_parent = dget(au_h_dptr(parent, bdst)); ++ au_set_h_dptr(parent, bdst, dget(h_orph)); ++ h_tmpdir = h_orph->d_inode; ++ au_set_h_iptr(dir, bdst, au_igrab(h_tmpdir), /*flags*/0); ++ ++ mutex_lock_nested(&h_tmpdir->i_mutex, AuLsc_I_PARENT3); ++ /* todo: au_h_open_pre()? */ ++ ++ pin_orig = cpg->pin; ++ au_pin_init(&wh_pin, dentry, bdst, AuLsc_DI_PARENT, ++ AuLsc_I_PARENT3, cpg->pin->udba, AuPin_DI_LOCKED); ++ cpg->pin = &wh_pin; ++ } ++ ++ if (!au_test_h_perm_sio(h_tmpdir, MAY_EXEC | MAY_WRITE) ++ && !au_cpup_sio_test(cpg->pin, dentry->d_inode->i_mode)) ++ err = au_cpup_wh(cpg, file); ++ else { ++ struct au_cpup_wh_args args = { ++ .errp = &err, ++ .cpg = cpg, ++ .file = file ++ }; ++ wkq_err = au_wkq_wait(au_call_cpup_wh, &args); ++ if (unlikely(wkq_err)) ++ err = wkq_err; ++ } ++ ++ if (h_orph) { ++ mutex_unlock(&h_tmpdir->i_mutex); ++ /* todo: au_h_open_post()? */ ++ au_set_h_iptr(dir, bdst, au_igrab(h_dir), /*flags*/0); ++ au_set_h_dptr(parent, bdst, h_parent); ++ AuDebugOn(!pin_orig); ++ cpg->pin = pin_orig; ++ } ++ iput(h_dir); ++ dput(parent); ++ ++ return err; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++/* ++ * generic routine for both of copy-up and copy-down. ++ */ ++/* cf. revalidate function in file.c */ ++int au_cp_dirs(struct dentry *dentry, aufs_bindex_t bdst, ++ int (*cp)(struct dentry *dentry, aufs_bindex_t bdst, ++ struct au_pin *pin, ++ struct dentry *h_parent, void *arg), ++ void *arg) ++{ ++ int err; ++ struct au_pin pin; ++ struct dentry *d, *parent, *h_parent, *real_parent; ++ ++ err = 0; ++ parent = dget_parent(dentry); ++ if (IS_ROOT(parent)) ++ goto out; ++ ++ au_pin_init(&pin, dentry, bdst, AuLsc_DI_PARENT2, AuLsc_I_PARENT2, ++ au_opt_udba(dentry->d_sb), AuPin_MNT_WRITE); ++ ++ /* do not use au_dpage */ ++ real_parent = parent; ++ while (1) { ++ dput(parent); ++ parent = dget_parent(dentry); ++ h_parent = au_h_dptr(parent, bdst); ++ if (h_parent) ++ goto out; /* success */ ++ ++ /* find top dir which is necessary to cpup */ ++ do { ++ d = parent; ++ dput(parent); ++ parent = dget_parent(d); ++ di_read_lock_parent3(parent, !AuLock_IR); ++ h_parent = au_h_dptr(parent, bdst); ++ di_read_unlock(parent, !AuLock_IR); ++ } while (!h_parent); ++ ++ if (d != real_parent) ++ di_write_lock_child3(d); ++ ++ /* somebody else might create while we were sleeping */ ++ if (!au_h_dptr(d, bdst) || !au_h_dptr(d, bdst)->d_inode) { ++ if (au_h_dptr(d, bdst)) ++ au_update_dbstart(d); ++ ++ au_pin_set_dentry(&pin, d); ++ err = au_do_pin(&pin); ++ if (!err) { ++ err = cp(d, bdst, &pin, h_parent, arg); ++ au_unpin(&pin); ++ } ++ } ++ ++ if (d != real_parent) ++ di_write_unlock(d); ++ if (unlikely(err)) ++ break; ++ } ++ ++out: ++ dput(parent); ++ return err; ++} ++ ++static int au_cpup_dir(struct dentry *dentry, aufs_bindex_t bdst, ++ struct au_pin *pin, ++ struct dentry *h_parent __maybe_unused, ++ void *arg __maybe_unused) ++{ ++ struct au_cp_generic cpg = { ++ .dentry = dentry, ++ .bdst = bdst, ++ .bsrc = -1, ++ .len = 0, ++ .pin = pin, ++ .flags = AuCpup_DTIME ++ }; ++ return au_sio_cpup_simple(&cpg); ++} ++ ++int au_cpup_dirs(struct dentry *dentry, aufs_bindex_t bdst) ++{ ++ return au_cp_dirs(dentry, bdst, au_cpup_dir, NULL); ++} ++ ++int au_test_and_cpup_dirs(struct dentry *dentry, aufs_bindex_t bdst) ++{ ++ int err; ++ struct dentry *parent; ++ struct inode *dir; ++ ++ parent = dget_parent(dentry); ++ dir = parent->d_inode; ++ err = 0; ++ if (au_h_iptr(dir, bdst)) ++ goto out; ++ ++ di_read_unlock(parent, AuLock_IR); ++ di_write_lock_parent(parent); ++ /* someone else might change our inode while we were sleeping */ ++ if (!au_h_iptr(dir, bdst)) ++ err = au_cpup_dirs(dentry, bdst); ++ di_downgrade_lock(parent, AuLock_IR); ++ ++out: ++ dput(parent); ++ return err; ++} +diff --git a/fs/aufs/cpup.h b/fs/aufs/cpup.h +new file mode 100644 +index 0000000..7721429 +--- /dev/null ++++ b/fs/aufs/cpup.h +@@ -0,0 +1,94 @@ ++/* ++ * Copyright (C) 2005-2016 Junjiro R. Okajima ++ * ++ * This program, aufs is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . ++ */ ++ ++/* ++ * copy-up/down functions ++ */ ++ ++#ifndef __AUFS_CPUP_H__ ++#define __AUFS_CPUP_H__ ++ ++#ifdef __KERNEL__ ++ ++#include ++ ++struct inode; ++struct file; ++struct au_pin; ++ ++void au_cpup_attr_flags(struct inode *dst, unsigned int iflags); ++void au_cpup_attr_timesizes(struct inode *inode); ++void au_cpup_attr_nlink(struct inode *inode, int force); ++void au_cpup_attr_changeable(struct inode *inode); ++void au_cpup_igen(struct inode *inode, struct inode *h_inode); ++void au_cpup_attr_all(struct inode *inode, int force); ++ ++/* ---------------------------------------------------------------------- */ ++ ++struct au_cp_generic { ++ struct dentry *dentry; ++ aufs_bindex_t bdst, bsrc; ++ loff_t len; ++ struct au_pin *pin; ++ unsigned int flags; ++}; ++ ++/* cpup flags */ ++#define AuCpup_DTIME 1 /* do dtime_store/revert */ ++#define AuCpup_KEEPLINO (1 << 1) /* do not clear the lower xino, ++ for link(2) */ ++#define AuCpup_RENAME (1 << 2) /* rename after cpup */ ++#define AuCpup_HOPEN (1 << 3) /* call h_open_pre/post() in ++ cpup */ ++#define AuCpup_OVERWRITE (1 << 4) /* allow overwriting the ++ existing entry */ ++#define AuCpup_RWDST (1 << 5) /* force write target even if ++ the branch is marked as RO */ ++ ++#define au_ftest_cpup(flags, name) ((flags) & AuCpup_##name) ++#define au_fset_cpup(flags, name) \ ++ do { (flags) |= AuCpup_##name; } while (0) ++#define au_fclr_cpup(flags, name) \ ++ do { (flags) &= ~AuCpup_##name; } while (0) ++ ++int au_copy_file(struct file *dst, struct file *src, loff_t len); ++int au_sio_cpup_simple(struct au_cp_generic *cpg); ++int au_sio_cpdown_simple(struct au_cp_generic *cpg); ++int au_sio_cpup_wh(struct au_cp_generic *cpg, struct file *file); ++ ++int au_cp_dirs(struct dentry *dentry, aufs_bindex_t bdst, ++ int (*cp)(struct dentry *dentry, aufs_bindex_t bdst, ++ struct au_pin *pin, ++ struct dentry *h_parent, void *arg), ++ void *arg); ++int au_cpup_dirs(struct dentry *dentry, aufs_bindex_t bdst); ++int au_test_and_cpup_dirs(struct dentry *dentry, aufs_bindex_t bdst); ++ ++/* ---------------------------------------------------------------------- */ ++ ++/* keep timestamps when copyup */ ++struct au_dtime { ++ struct dentry *dt_dentry; ++ struct path dt_h_path; ++ struct timespec dt_atime, dt_mtime; ++}; ++void au_dtime_store(struct au_dtime *dt, struct dentry *dentry, ++ struct path *h_path); ++void au_dtime_revert(struct au_dtime *dt); ++ ++#endif /* __KERNEL__ */ ++#endif /* __AUFS_CPUP_H__ */ +diff --git a/fs/aufs/dbgaufs.c b/fs/aufs/dbgaufs.c +new file mode 100644 +index 0000000..b4fdc25 +--- /dev/null ++++ b/fs/aufs/dbgaufs.c +@@ -0,0 +1,432 @@ ++/* ++ * Copyright (C) 2005-2016 Junjiro R. Okajima ++ * ++ * This program, aufs is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . ++ */ ++ ++/* ++ * debugfs interface ++ */ ++ ++#include ++#include "aufs.h" ++ ++#ifndef CONFIG_SYSFS ++#error DEBUG_FS depends upon SYSFS ++#endif ++ ++static struct dentry *dbgaufs; ++static const mode_t dbgaufs_mode = S_IRUSR | S_IRGRP | S_IROTH; ++ ++/* 20 is max digits length of ulong 64 */ ++struct dbgaufs_arg { ++ int n; ++ char a[20 * 4]; ++}; ++ ++/* ++ * common function for all XINO files ++ */ ++static int dbgaufs_xi_release(struct inode *inode __maybe_unused, ++ struct file *file) ++{ ++ kfree(file->private_data); ++ return 0; ++} ++ ++static int dbgaufs_xi_open(struct file *xf, struct file *file, int do_fcnt) ++{ ++ int err; ++ struct kstat st; ++ struct dbgaufs_arg *p; ++ ++ err = -ENOMEM; ++ p = kmalloc(sizeof(*p), GFP_NOFS); ++ if (unlikely(!p)) ++ goto out; ++ ++ err = 0; ++ p->n = 0; ++ file->private_data = p; ++ if (!xf) ++ goto out; ++ ++ err = vfs_getattr(&xf->f_path, &st); ++ if (!err) { ++ if (do_fcnt) ++ p->n = snprintf ++ (p->a, sizeof(p->a), "%ld, %llux%lu %lld\n", ++ (long)file_count(xf), st.blocks, st.blksize, ++ (long long)st.size); ++ else ++ p->n = snprintf(p->a, sizeof(p->a), "%llux%lu %lld\n", ++ st.blocks, st.blksize, ++ (long long)st.size); ++ AuDebugOn(p->n >= sizeof(p->a)); ++ } else { ++ p->n = snprintf(p->a, sizeof(p->a), "err %d\n", err); ++ err = 0; ++ } ++ ++out: ++ return err; ++ ++} ++ ++static ssize_t dbgaufs_xi_read(struct file *file, char __user *buf, ++ size_t count, loff_t *ppos) ++{ ++ struct dbgaufs_arg *p; ++ ++ p = file->private_data; ++ return simple_read_from_buffer(buf, count, ppos, p->a, p->n); ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++struct dbgaufs_plink_arg { ++ int n; ++ char a[]; ++}; ++ ++static int dbgaufs_plink_release(struct inode *inode __maybe_unused, ++ struct file *file) ++{ ++ free_page((unsigned long)file->private_data); ++ return 0; ++} ++ ++static int dbgaufs_plink_open(struct inode *inode, struct file *file) ++{ ++ int err, i, limit; ++ unsigned long n, sum; ++ struct dbgaufs_plink_arg *p; ++ struct au_sbinfo *sbinfo; ++ struct super_block *sb; ++ struct au_sphlhead *sphl; ++ ++ err = -ENOMEM; ++ p = (void *)get_zeroed_page(GFP_NOFS); ++ if (unlikely(!p)) ++ goto out; ++ ++ err = -EFBIG; ++ sbinfo = inode->i_private; ++ sb = sbinfo->si_sb; ++ si_noflush_read_lock(sb); ++ if (au_opt_test(au_mntflags(sb), PLINK)) { ++ limit = PAGE_SIZE - sizeof(p->n); ++ ++ /* the number of buckets */ ++ n = snprintf(p->a + p->n, limit, "%d\n", AuPlink_NHASH); ++ p->n += n; ++ limit -= n; ++ ++ sum = 0; ++ for (i = 0, sphl = sbinfo->si_plink; ++ i < AuPlink_NHASH; ++ i++, sphl++) { ++ n = au_sphl_count(sphl); ++ sum += n; ++ ++ n = snprintf(p->a + p->n, limit, "%lu ", n); ++ p->n += n; ++ limit -= n; ++ if (unlikely(limit <= 0)) ++ goto out_free; ++ } ++ p->a[p->n - 1] = '\n'; ++ ++ /* the sum of plinks */ ++ n = snprintf(p->a + p->n, limit, "%lu\n", sum); ++ p->n += n; ++ limit -= n; ++ if (unlikely(limit <= 0)) ++ goto out_free; ++ } else { ++#define str "1\n0\n0\n" ++ p->n = sizeof(str) - 1; ++ strcpy(p->a, str); ++#undef str ++ } ++ si_read_unlock(sb); ++ ++ err = 0; ++ file->private_data = p; ++ goto out; /* success */ ++ ++out_free: ++ free_page((unsigned long)p); ++out: ++ return err; ++} ++ ++static ssize_t dbgaufs_plink_read(struct file *file, char __user *buf, ++ size_t count, loff_t *ppos) ++{ ++ struct dbgaufs_plink_arg *p; ++ ++ p = file->private_data; ++ return simple_read_from_buffer(buf, count, ppos, p->a, p->n); ++} ++ ++static const struct file_operations dbgaufs_plink_fop = { ++ .owner = THIS_MODULE, ++ .open = dbgaufs_plink_open, ++ .release = dbgaufs_plink_release, ++ .read = dbgaufs_plink_read ++}; ++ ++/* ---------------------------------------------------------------------- */ ++ ++static int dbgaufs_xib_open(struct inode *inode, struct file *file) ++{ ++ int err; ++ struct au_sbinfo *sbinfo; ++ struct super_block *sb; ++ ++ sbinfo = inode->i_private; ++ sb = sbinfo->si_sb; ++ si_noflush_read_lock(sb); ++ err = dbgaufs_xi_open(sbinfo->si_xib, file, /*do_fcnt*/0); ++ si_read_unlock(sb); ++ return err; ++} ++ ++static const struct file_operations dbgaufs_xib_fop = { ++ .owner = THIS_MODULE, ++ .open = dbgaufs_xib_open, ++ .release = dbgaufs_xi_release, ++ .read = dbgaufs_xi_read ++}; ++ ++/* ---------------------------------------------------------------------- */ ++ ++#define DbgaufsXi_PREFIX "xi" ++ ++static int dbgaufs_xino_open(struct inode *inode, struct file *file) ++{ ++ int err; ++ long l; ++ struct au_sbinfo *sbinfo; ++ struct super_block *sb; ++ struct file *xf; ++ struct qstr *name; ++ ++ err = -ENOENT; ++ xf = NULL; ++ name = &file->f_dentry->d_name; ++ if (unlikely(name->len < sizeof(DbgaufsXi_PREFIX) ++ || memcmp(name->name, DbgaufsXi_PREFIX, ++ sizeof(DbgaufsXi_PREFIX) - 1))) ++ goto out; ++ err = kstrtol(name->name + sizeof(DbgaufsXi_PREFIX) - 1, 10, &l); ++ if (unlikely(err)) ++ goto out; ++ ++ sbinfo = inode->i_private; ++ sb = sbinfo->si_sb; ++ si_noflush_read_lock(sb); ++ if (l <= au_sbend(sb)) { ++ xf = au_sbr(sb, (aufs_bindex_t)l)->br_xino.xi_file; ++ err = dbgaufs_xi_open(xf, file, /*do_fcnt*/1); ++ } else ++ err = -ENOENT; ++ si_read_unlock(sb); ++ ++out: ++ return err; ++} ++ ++static const struct file_operations dbgaufs_xino_fop = { ++ .owner = THIS_MODULE, ++ .open = dbgaufs_xino_open, ++ .release = dbgaufs_xi_release, ++ .read = dbgaufs_xi_read ++}; ++ ++void dbgaufs_brs_del(struct super_block *sb, aufs_bindex_t bindex) ++{ ++ aufs_bindex_t bend; ++ struct au_branch *br; ++ struct au_xino_file *xi; ++ ++ if (!au_sbi(sb)->si_dbgaufs) ++ return; ++ ++ bend = au_sbend(sb); ++ for (; bindex <= bend; bindex++) { ++ br = au_sbr(sb, bindex); ++ xi = &br->br_xino; ++ debugfs_remove(xi->xi_dbgaufs); ++ xi->xi_dbgaufs = NULL; ++ } ++} ++ ++void dbgaufs_brs_add(struct super_block *sb, aufs_bindex_t bindex) ++{ ++ struct au_sbinfo *sbinfo; ++ struct dentry *parent; ++ struct au_branch *br; ++ struct au_xino_file *xi; ++ aufs_bindex_t bend; ++ char name[sizeof(DbgaufsXi_PREFIX) + 5]; /* "xi" bindex NULL */ ++ ++ sbinfo = au_sbi(sb); ++ parent = sbinfo->si_dbgaufs; ++ if (!parent) ++ return; ++ ++ bend = au_sbend(sb); ++ for (; bindex <= bend; bindex++) { ++ snprintf(name, sizeof(name), DbgaufsXi_PREFIX "%d", bindex); ++ br = au_sbr(sb, bindex); ++ xi = &br->br_xino; ++ AuDebugOn(xi->xi_dbgaufs); ++ xi->xi_dbgaufs = debugfs_create_file(name, dbgaufs_mode, parent, ++ sbinfo, &dbgaufs_xino_fop); ++ /* ignore an error */ ++ if (unlikely(!xi->xi_dbgaufs)) ++ AuWarn1("failed %s under debugfs\n", name); ++ } ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++#ifdef CONFIG_AUFS_EXPORT ++static int dbgaufs_xigen_open(struct inode *inode, struct file *file) ++{ ++ int err; ++ struct au_sbinfo *sbinfo; ++ struct super_block *sb; ++ ++ sbinfo = inode->i_private; ++ sb = sbinfo->si_sb; ++ si_noflush_read_lock(sb); ++ err = dbgaufs_xi_open(sbinfo->si_xigen, file, /*do_fcnt*/0); ++ si_read_unlock(sb); ++ return err; ++} ++ ++static const struct file_operations dbgaufs_xigen_fop = { ++ .owner = THIS_MODULE, ++ .open = dbgaufs_xigen_open, ++ .release = dbgaufs_xi_release, ++ .read = dbgaufs_xi_read ++}; ++ ++static int dbgaufs_xigen_init(struct au_sbinfo *sbinfo) ++{ ++ int err; ++ ++ /* ++ * This function is a dynamic '__init' function actually, ++ * so the tiny check for si_rwsem is unnecessary. ++ */ ++ /* AuRwMustWriteLock(&sbinfo->si_rwsem); */ ++ ++ err = -EIO; ++ sbinfo->si_dbgaufs_xigen = debugfs_create_file ++ ("xigen", dbgaufs_mode, sbinfo->si_dbgaufs, sbinfo, ++ &dbgaufs_xigen_fop); ++ if (sbinfo->si_dbgaufs_xigen) ++ err = 0; ++ ++ return err; ++} ++#else ++static int dbgaufs_xigen_init(struct au_sbinfo *sbinfo) ++{ ++ return 0; ++} ++#endif /* CONFIG_AUFS_EXPORT */ ++ ++/* ---------------------------------------------------------------------- */ ++ ++void dbgaufs_si_fin(struct au_sbinfo *sbinfo) ++{ ++ /* ++ * This function is a dynamic '__fin' function actually, ++ * so the tiny check for si_rwsem is unnecessary. ++ */ ++ /* AuRwMustWriteLock(&sbinfo->si_rwsem); */ ++ ++ debugfs_remove_recursive(sbinfo->si_dbgaufs); ++ sbinfo->si_dbgaufs = NULL; ++ kobject_put(&sbinfo->si_kobj); ++} ++ ++int dbgaufs_si_init(struct au_sbinfo *sbinfo) ++{ ++ int err; ++ char name[SysaufsSiNameLen]; ++ ++ /* ++ * This function is a dynamic '__init' function actually, ++ * so the tiny check for si_rwsem is unnecessary. ++ */ ++ /* AuRwMustWriteLock(&sbinfo->si_rwsem); */ ++ ++ err = -ENOENT; ++ if (!dbgaufs) { ++ AuErr1("/debug/aufs is uninitialized\n"); ++ goto out; ++ } ++ ++ err = -EIO; ++ sysaufs_name(sbinfo, name); ++ sbinfo->si_dbgaufs = debugfs_create_dir(name, dbgaufs); ++ if (unlikely(!sbinfo->si_dbgaufs)) ++ goto out; ++ kobject_get(&sbinfo->si_kobj); ++ ++ sbinfo->si_dbgaufs_xib = debugfs_create_file ++ ("xib", dbgaufs_mode, sbinfo->si_dbgaufs, sbinfo, ++ &dbgaufs_xib_fop); ++ if (unlikely(!sbinfo->si_dbgaufs_xib)) ++ goto out_dir; ++ ++ sbinfo->si_dbgaufs_plink = debugfs_create_file ++ ("plink", dbgaufs_mode, sbinfo->si_dbgaufs, sbinfo, ++ &dbgaufs_plink_fop); ++ if (unlikely(!sbinfo->si_dbgaufs_plink)) ++ goto out_dir; ++ ++ err = dbgaufs_xigen_init(sbinfo); ++ if (!err) ++ goto out; /* success */ ++ ++out_dir: ++ dbgaufs_si_fin(sbinfo); ++out: ++ return err; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++void dbgaufs_fin(void) ++{ ++ debugfs_remove(dbgaufs); ++} ++ ++int __init dbgaufs_init(void) ++{ ++ int err; ++ ++ err = -EIO; ++ dbgaufs = debugfs_create_dir(AUFS_NAME, NULL); ++ if (dbgaufs) ++ err = 0; ++ return err; ++} +diff --git a/fs/aufs/dbgaufs.h b/fs/aufs/dbgaufs.h +new file mode 100644 +index 0000000..d1e09bd +--- /dev/null ++++ b/fs/aufs/dbgaufs.h +@@ -0,0 +1,48 @@ ++/* ++ * Copyright (C) 2005-2016 Junjiro R. Okajima ++ * ++ * This program, aufs is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . ++ */ ++ ++/* ++ * debugfs interface ++ */ ++ ++#ifndef __DBGAUFS_H__ ++#define __DBGAUFS_H__ ++ ++#ifdef __KERNEL__ ++ ++struct super_block; ++struct au_sbinfo; ++ ++#ifdef CONFIG_DEBUG_FS ++/* dbgaufs.c */ ++void dbgaufs_brs_del(struct super_block *sb, aufs_bindex_t bindex); ++void dbgaufs_brs_add(struct super_block *sb, aufs_bindex_t bindex); ++void dbgaufs_si_fin(struct au_sbinfo *sbinfo); ++int dbgaufs_si_init(struct au_sbinfo *sbinfo); ++void dbgaufs_fin(void); ++int __init dbgaufs_init(void); ++#else ++AuStubVoid(dbgaufs_brs_del, struct super_block *sb, aufs_bindex_t bindex) ++AuStubVoid(dbgaufs_brs_add, struct super_block *sb, aufs_bindex_t bindex) ++AuStubVoid(dbgaufs_si_fin, struct au_sbinfo *sbinfo) ++AuStubInt0(dbgaufs_si_init, struct au_sbinfo *sbinfo) ++AuStubVoid(dbgaufs_fin, void) ++AuStubInt0(__init dbgaufs_init, void) ++#endif /* CONFIG_DEBUG_FS */ ++ ++#endif /* __KERNEL__ */ ++#endif /* __DBGAUFS_H__ */ +diff --git a/fs/aufs/dcsub.c b/fs/aufs/dcsub.c +new file mode 100644 +index 0000000..832baa4 +--- /dev/null ++++ b/fs/aufs/dcsub.c +@@ -0,0 +1,224 @@ ++/* ++ * Copyright (C) 2005-2016 Junjiro R. Okajima ++ * ++ * This program, aufs is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . ++ */ ++ ++/* ++ * sub-routines for dentry cache ++ */ ++ ++#include "aufs.h" ++ ++static void au_dpage_free(struct au_dpage *dpage) ++{ ++ int i; ++ struct dentry **p; ++ ++ p = dpage->dentries; ++ for (i = 0; i < dpage->ndentry; i++) ++ dput(*p++); ++ free_page((unsigned long)dpage->dentries); ++} ++ ++int au_dpages_init(struct au_dcsub_pages *dpages, gfp_t gfp) ++{ ++ int err; ++ void *p; ++ ++ err = -ENOMEM; ++ dpages->dpages = kmalloc(sizeof(*dpages->dpages), gfp); ++ if (unlikely(!dpages->dpages)) ++ goto out; ++ ++ p = (void *)__get_free_page(gfp); ++ if (unlikely(!p)) ++ goto out_dpages; ++ ++ dpages->dpages[0].ndentry = 0; ++ dpages->dpages[0].dentries = p; ++ dpages->ndpage = 1; ++ return 0; /* success */ ++ ++out_dpages: ++ kfree(dpages->dpages); ++out: ++ return err; ++} ++ ++void au_dpages_free(struct au_dcsub_pages *dpages) ++{ ++ int i; ++ struct au_dpage *p; ++ ++ p = dpages->dpages; ++ for (i = 0; i < dpages->ndpage; i++) ++ au_dpage_free(p++); ++ kfree(dpages->dpages); ++} ++ ++static int au_dpages_append(struct au_dcsub_pages *dpages, ++ struct dentry *dentry, gfp_t gfp) ++{ ++ int err, sz; ++ struct au_dpage *dpage; ++ void *p; ++ ++ dpage = dpages->dpages + dpages->ndpage - 1; ++ sz = PAGE_SIZE / sizeof(dentry); ++ if (unlikely(dpage->ndentry >= sz)) { ++ AuLabel(new dpage); ++ err = -ENOMEM; ++ sz = dpages->ndpage * sizeof(*dpages->dpages); ++ p = au_kzrealloc(dpages->dpages, sz, ++ sz + sizeof(*dpages->dpages), gfp); ++ if (unlikely(!p)) ++ goto out; ++ ++ dpages->dpages = p; ++ dpage = dpages->dpages + dpages->ndpage; ++ p = (void *)__get_free_page(gfp); ++ if (unlikely(!p)) ++ goto out; ++ ++ dpage->ndentry = 0; ++ dpage->dentries = p; ++ dpages->ndpage++; ++ } ++ ++ AuDebugOn(au_dcount(dentry) <= 0); ++ dpage->dentries[dpage->ndentry++] = dget_dlock(dentry); ++ return 0; /* success */ ++ ++out: ++ return err; ++} ++ ++/* todo: BAD approach */ ++/* copied from linux/fs/dcache.c */ ++enum d_walk_ret { ++ D_WALK_CONTINUE, ++ D_WALK_QUIT, ++ D_WALK_NORETRY, ++ D_WALK_SKIP, ++}; ++ ++extern void d_walk(struct dentry *parent, void *data, ++ enum d_walk_ret (*enter)(void *, struct dentry *), ++ void (*finish)(void *)); ++ ++struct ac_dpages_arg { ++ int err; ++ struct au_dcsub_pages *dpages; ++ struct super_block *sb; ++ au_dpages_test test; ++ void *arg; ++}; ++ ++static enum d_walk_ret au_call_dpages_append(void *_arg, struct dentry *dentry) ++{ ++ enum d_walk_ret ret; ++ struct ac_dpages_arg *arg = _arg; ++ ++ ret = D_WALK_CONTINUE; ++ if (dentry->d_sb == arg->sb ++ && !IS_ROOT(dentry) ++ && au_dcount(dentry) > 0 ++ && au_di(dentry) ++ && (!arg->test || arg->test(dentry, arg->arg))) { ++ arg->err = au_dpages_append(arg->dpages, dentry, GFP_ATOMIC); ++ if (unlikely(arg->err)) ++ ret = D_WALK_QUIT; ++ } ++ ++ return ret; ++} ++ ++int au_dcsub_pages(struct au_dcsub_pages *dpages, struct dentry *root, ++ au_dpages_test test, void *arg) ++{ ++ struct ac_dpages_arg args = { ++ .err = 0, ++ .dpages = dpages, ++ .sb = root->d_sb, ++ .test = test, ++ .arg = arg ++ }; ++ ++ d_walk(root, &args, au_call_dpages_append, NULL); ++ ++ return args.err; ++} ++ ++int au_dcsub_pages_rev(struct au_dcsub_pages *dpages, struct dentry *dentry, ++ int do_include, au_dpages_test test, void *arg) ++{ ++ int err; ++ ++ err = 0; ++ write_seqlock(&rename_lock); ++ spin_lock(&dentry->d_lock); ++ if (do_include ++ && au_dcount(dentry) > 0 ++ && (!test || test(dentry, arg))) ++ err = au_dpages_append(dpages, dentry, GFP_ATOMIC); ++ spin_unlock(&dentry->d_lock); ++ if (unlikely(err)) ++ goto out; ++ ++ /* ++ * RCU for vfsmount is unnecessary since this is a traverse in a single ++ * mount ++ */ ++ while (!IS_ROOT(dentry)) { ++ dentry = dentry->d_parent; /* rename_lock is locked */ ++ spin_lock(&dentry->d_lock); ++ if (au_dcount(dentry) > 0 ++ && (!test || test(dentry, arg))) ++ err = au_dpages_append(dpages, dentry, GFP_ATOMIC); ++ spin_unlock(&dentry->d_lock); ++ if (unlikely(err)) ++ break; ++ } ++ ++out: ++ write_sequnlock(&rename_lock); ++ return err; ++} ++ ++static inline int au_dcsub_dpages_aufs(struct dentry *dentry, void *arg) ++{ ++ return au_di(dentry) && dentry->d_sb == arg; ++} ++ ++int au_dcsub_pages_rev_aufs(struct au_dcsub_pages *dpages, ++ struct dentry *dentry, int do_include) ++{ ++ return au_dcsub_pages_rev(dpages, dentry, do_include, ++ au_dcsub_dpages_aufs, dentry->d_sb); ++} ++ ++int au_test_subdir(struct dentry *d1, struct dentry *d2) ++{ ++ struct path path[2] = { ++ { ++ .dentry = d1 ++ }, ++ { ++ .dentry = d2 ++ } ++ }; ++ ++ return path_is_under(path + 0, path + 1); ++} +diff --git a/fs/aufs/dcsub.h b/fs/aufs/dcsub.h +new file mode 100644 +index 0000000..7997944 +--- /dev/null ++++ b/fs/aufs/dcsub.h +@@ -0,0 +1,123 @@ ++/* ++ * Copyright (C) 2005-2016 Junjiro R. Okajima ++ * ++ * This program, aufs is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . ++ */ ++ ++/* ++ * sub-routines for dentry cache ++ */ ++ ++#ifndef __AUFS_DCSUB_H__ ++#define __AUFS_DCSUB_H__ ++ ++#ifdef __KERNEL__ ++ ++#include ++#include ++ ++struct au_dpage { ++ int ndentry; ++ struct dentry **dentries; ++}; ++ ++struct au_dcsub_pages { ++ int ndpage; ++ struct au_dpage *dpages; ++}; ++ ++/* ---------------------------------------------------------------------- */ ++ ++/* dcsub.c */ ++int au_dpages_init(struct au_dcsub_pages *dpages, gfp_t gfp); ++void au_dpages_free(struct au_dcsub_pages *dpages); ++typedef int (*au_dpages_test)(struct dentry *dentry, void *arg); ++int au_dcsub_pages(struct au_dcsub_pages *dpages, struct dentry *root, ++ au_dpages_test test, void *arg); ++int au_dcsub_pages_rev(struct au_dcsub_pages *dpages, struct dentry *dentry, ++ int do_include, au_dpages_test test, void *arg); ++int au_dcsub_pages_rev_aufs(struct au_dcsub_pages *dpages, ++ struct dentry *dentry, int do_include); ++int au_test_subdir(struct dentry *d1, struct dentry *d2); ++ ++/* ---------------------------------------------------------------------- */ ++ ++/* ++ * todo: in linux-3.13, several similar (but faster) helpers are added to ++ * include/linux/dcache.h. Try them (in the future). ++ */ ++ ++static inline int au_d_hashed_positive(struct dentry *d) ++{ ++ int err; ++ struct inode *inode = d->d_inode; ++ ++ err = 0; ++ if (unlikely(d_unhashed(d) || !inode || !inode->i_nlink)) ++ err = -ENOENT; ++ return err; ++} ++ ++static inline int au_d_linkable(struct dentry *d) ++{ ++ int err; ++ struct inode *inode = d->d_inode; ++ ++ err = au_d_hashed_positive(d); ++ if (err ++ && inode ++ && (inode->i_state & I_LINKABLE)) ++ err = 0; ++ return err; ++} ++ ++static inline int au_d_alive(struct dentry *d) ++{ ++ int err; ++ struct inode *inode; ++ ++ err = 0; ++ if (!IS_ROOT(d)) ++ err = au_d_hashed_positive(d); ++ else { ++ inode = d->d_inode; ++ if (unlikely(d_unlinked(d) || !inode || !inode->i_nlink)) ++ err = -ENOENT; ++ } ++ return err; ++} ++ ++static inline int au_alive_dir(struct dentry *d) ++{ ++ int err; ++ ++ err = au_d_alive(d); ++ if (unlikely(err || IS_DEADDIR(d->d_inode))) ++ err = -ENOENT; ++ return err; ++} ++ ++static inline int au_qstreq(struct qstr *a, struct qstr *b) ++{ ++ return a->len == b->len ++ && !memcmp(a->name, b->name, a->len); ++} ++ ++static inline int au_dcount(struct dentry *d) ++{ ++ return (int)d_count(d); ++} ++ ++#endif /* __KERNEL__ */ ++#endif /* __AUFS_DCSUB_H__ */ +diff --git a/fs/aufs/debug.c b/fs/aufs/debug.c +new file mode 100644 +index 0000000..2747d13 +--- /dev/null ++++ b/fs/aufs/debug.c +@@ -0,0 +1,436 @@ ++/* ++ * Copyright (C) 2005-2016 Junjiro R. Okajima ++ * ++ * This program, aufs is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . ++ */ ++ ++/* ++ * debug print functions ++ */ ++ ++#include "aufs.h" ++ ++/* Returns 0, or -errno. arg is in kp->arg. */ ++static int param_atomic_t_set(const char *val, const struct kernel_param *kp) ++{ ++ int err, n; ++ ++ err = kstrtoint(val, 0, &n); ++ if (!err) { ++ if (n > 0) ++ au_debug_on(); ++ else ++ au_debug_off(); ++ } ++ return err; ++} ++ ++/* Returns length written or -errno. Buffer is 4k (ie. be short!) */ ++static int param_atomic_t_get(char *buffer, const struct kernel_param *kp) ++{ ++ atomic_t *a; ++ ++ a = kp->arg; ++ return sprintf(buffer, "%d", atomic_read(a)); ++} ++ ++static struct kernel_param_ops param_ops_atomic_t = { ++ .set = param_atomic_t_set, ++ .get = param_atomic_t_get ++ /* void (*free)(void *arg) */ ++}; ++ ++atomic_t aufs_debug = ATOMIC_INIT(0); ++MODULE_PARM_DESC(debug, "debug print"); ++module_param_named(debug, aufs_debug, atomic_t, S_IRUGO | S_IWUSR | S_IWGRP); ++ ++DEFINE_MUTEX(au_dbg_mtx); /* just to serialize the dbg msgs */ ++char *au_plevel = KERN_DEBUG; ++#define dpri(fmt, ...) do { \ ++ if ((au_plevel \ ++ && strcmp(au_plevel, KERN_DEBUG)) \ ++ || au_debug_test()) \ ++ printk("%s" fmt, au_plevel, ##__VA_ARGS__); \ ++} while (0) ++ ++/* ---------------------------------------------------------------------- */ ++ ++void au_dpri_whlist(struct au_nhash *whlist) ++{ ++ unsigned long ul, n; ++ struct hlist_head *head; ++ struct au_vdir_wh *pos; ++ ++ n = whlist->nh_num; ++ head = whlist->nh_head; ++ for (ul = 0; ul < n; ul++) { ++ hlist_for_each_entry(pos, head, wh_hash) ++ dpri("b%d, %.*s, %d\n", ++ pos->wh_bindex, ++ pos->wh_str.len, pos->wh_str.name, ++ pos->wh_str.len); ++ head++; ++ } ++} ++ ++void au_dpri_vdir(struct au_vdir *vdir) ++{ ++ unsigned long ul; ++ union au_vdir_deblk_p p; ++ unsigned char *o; ++ ++ if (!vdir || IS_ERR(vdir)) { ++ dpri("err %ld\n", PTR_ERR(vdir)); ++ return; ++ } ++ ++ dpri("deblk %u, nblk %lu, deblk %p, last{%lu, %p}, ver %lu\n", ++ vdir->vd_deblk_sz, vdir->vd_nblk, vdir->vd_deblk, ++ vdir->vd_last.ul, vdir->vd_last.p.deblk, vdir->vd_version); ++ for (ul = 0; ul < vdir->vd_nblk; ul++) { ++ p.deblk = vdir->vd_deblk[ul]; ++ o = p.deblk; ++ dpri("[%lu]: %p\n", ul, o); ++ } ++} ++ ++static int do_pri_inode(aufs_bindex_t bindex, struct inode *inode, int hn, ++ struct dentry *wh) ++{ ++ char *n = NULL; ++ int l = 0; ++ ++ if (!inode || IS_ERR(inode)) { ++ dpri("i%d: err %ld\n", bindex, PTR_ERR(inode)); ++ return -1; ++ } ++ ++ /* the type of i_blocks depends upon CONFIG_LBDAF */ ++ BUILD_BUG_ON(sizeof(inode->i_blocks) != sizeof(unsigned long) ++ && sizeof(inode->i_blocks) != sizeof(u64)); ++ if (wh) { ++ n = (void *)wh->d_name.name; ++ l = wh->d_name.len; ++ } ++ ++ dpri("i%d: %p, i%lu, %s, cnt %d, nl %u, 0%o, sz %llu, blk %llu," ++ " hn %d, ct %lld, np %lu, st 0x%lx, f 0x%x, v %llu, g %x%s%.*s\n", ++ bindex, inode, ++ inode->i_ino, inode->i_sb ? au_sbtype(inode->i_sb) : "??", ++ atomic_read(&inode->i_count), inode->i_nlink, inode->i_mode, ++ i_size_read(inode), (unsigned long long)inode->i_blocks, ++ hn, (long long)timespec_to_ns(&inode->i_ctime) & 0x0ffff, ++ inode->i_mapping ? inode->i_mapping->nrpages : 0, ++ inode->i_state, inode->i_flags, inode->i_version, ++ inode->i_generation, ++ l ? ", wh " : "", l, n); ++ return 0; ++} ++ ++void au_dpri_inode(struct inode *inode) ++{ ++ struct au_iinfo *iinfo; ++ aufs_bindex_t bindex; ++ int err, hn; ++ ++ err = do_pri_inode(-1, inode, -1, NULL); ++ if (err || !au_test_aufs(inode->i_sb)) ++ return; ++ ++ iinfo = au_ii(inode); ++ if (!iinfo) ++ return; ++ dpri("i-1: bstart %d, bend %d, gen %d\n", ++ iinfo->ii_bstart, iinfo->ii_bend, au_iigen(inode, NULL)); ++ if (iinfo->ii_bstart < 0) ++ return; ++ hn = 0; ++ for (bindex = iinfo->ii_bstart; bindex <= iinfo->ii_bend; bindex++) { ++ hn = !!au_hn(iinfo->ii_hinode + bindex); ++ do_pri_inode(bindex, iinfo->ii_hinode[0 + bindex].hi_inode, hn, ++ iinfo->ii_hinode[0 + bindex].hi_whdentry); ++ } ++} ++ ++void au_dpri_dalias(struct inode *inode) ++{ ++ struct dentry *d; ++ ++ spin_lock(&inode->i_lock); ++ hlist_for_each_entry(d, &inode->i_dentry, d_u.d_alias) ++ au_dpri_dentry(d); ++ spin_unlock(&inode->i_lock); ++} ++ ++static int do_pri_dentry(aufs_bindex_t bindex, struct dentry *dentry) ++{ ++ struct dentry *wh = NULL; ++ int hn; ++ struct au_iinfo *iinfo; ++ ++ if (!dentry || IS_ERR(dentry)) { ++ dpri("d%d: err %ld\n", bindex, PTR_ERR(dentry)); ++ return -1; ++ } ++ /* do not call dget_parent() here */ ++ /* note: access d_xxx without d_lock */ ++ dpri("d%d: %p, %pd2?, %s, cnt %d, flags 0x%x, %shashed\n", ++ bindex, dentry, dentry, ++ dentry->d_sb ? au_sbtype(dentry->d_sb) : "??", ++ au_dcount(dentry), dentry->d_flags, ++ d_unhashed(dentry) ? "un" : ""); ++ hn = -1; ++ if (bindex >= 0 && dentry->d_inode && au_test_aufs(dentry->d_sb)) { ++ iinfo = au_ii(dentry->d_inode); ++ if (iinfo) { ++ hn = !!au_hn(iinfo->ii_hinode + bindex); ++ wh = iinfo->ii_hinode[0 + bindex].hi_whdentry; ++ } ++ } ++ do_pri_inode(bindex, dentry->d_inode, hn, wh); ++ return 0; ++} ++ ++void au_dpri_dentry(struct dentry *dentry) ++{ ++ struct au_dinfo *dinfo; ++ aufs_bindex_t bindex; ++ int err; ++ struct au_hdentry *hdp; ++ ++ err = do_pri_dentry(-1, dentry); ++ if (err || !au_test_aufs(dentry->d_sb)) ++ return; ++ ++ dinfo = au_di(dentry); ++ if (!dinfo) ++ return; ++ dpri("d-1: bstart %d, bend %d, bwh %d, bdiropq %d, gen %d, tmp %d\n", ++ dinfo->di_bstart, dinfo->di_bend, ++ dinfo->di_bwh, dinfo->di_bdiropq, au_digen(dentry), ++ dinfo->di_tmpfile); ++ if (dinfo->di_bstart < 0) ++ return; ++ hdp = dinfo->di_hdentry; ++ for (bindex = dinfo->di_bstart; bindex <= dinfo->di_bend; bindex++) ++ do_pri_dentry(bindex, hdp[0 + bindex].hd_dentry); ++} ++ ++static int do_pri_file(aufs_bindex_t bindex, struct file *file) ++{ ++ char a[32]; ++ ++ if (!file || IS_ERR(file)) { ++ dpri("f%d: err %ld\n", bindex, PTR_ERR(file)); ++ return -1; ++ } ++ a[0] = 0; ++ if (bindex < 0 ++ && !IS_ERR_OR_NULL(file->f_dentry) ++ && au_test_aufs(file->f_dentry->d_sb) ++ && au_fi(file)) ++ snprintf(a, sizeof(a), ", gen %d, mmapped %d", ++ au_figen(file), atomic_read(&au_fi(file)->fi_mmapped)); ++ dpri("f%d: mode 0x%x, flags 0%o, cnt %ld, v %llu, pos %llu%s\n", ++ bindex, file->f_mode, file->f_flags, (long)file_count(file), ++ file->f_version, file->f_pos, a); ++ if (!IS_ERR_OR_NULL(file->f_dentry)) ++ do_pri_dentry(bindex, file->f_dentry); ++ return 0; ++} ++ ++void au_dpri_file(struct file *file) ++{ ++ struct au_finfo *finfo; ++ struct au_fidir *fidir; ++ struct au_hfile *hfile; ++ aufs_bindex_t bindex; ++ int err; ++ ++ err = do_pri_file(-1, file); ++ if (err ++ || IS_ERR_OR_NULL(file->f_dentry) ++ || !au_test_aufs(file->f_dentry->d_sb)) ++ return; ++ ++ finfo = au_fi(file); ++ if (!finfo) ++ return; ++ if (finfo->fi_btop < 0) ++ return; ++ fidir = finfo->fi_hdir; ++ if (!fidir) ++ do_pri_file(finfo->fi_btop, finfo->fi_htop.hf_file); ++ else ++ for (bindex = finfo->fi_btop; ++ bindex >= 0 && bindex <= fidir->fd_bbot; ++ bindex++) { ++ hfile = fidir->fd_hfile + bindex; ++ do_pri_file(bindex, hfile ? hfile->hf_file : NULL); ++ } ++} ++ ++static int do_pri_br(aufs_bindex_t bindex, struct au_branch *br) ++{ ++ struct vfsmount *mnt; ++ struct super_block *sb; ++ ++ if (!br || IS_ERR(br)) ++ goto out; ++ mnt = au_br_mnt(br); ++ if (!mnt || IS_ERR(mnt)) ++ goto out; ++ sb = mnt->mnt_sb; ++ if (!sb || IS_ERR(sb)) ++ goto out; ++ ++ dpri("s%d: {perm 0x%x, id %d, cnt %d, wbr %p}, " ++ "%s, dev 0x%02x%02x, flags 0x%lx, cnt %d, active %d, " ++ "xino %d\n", ++ bindex, br->br_perm, br->br_id, atomic_read(&br->br_count), ++ br->br_wbr, au_sbtype(sb), MAJOR(sb->s_dev), MINOR(sb->s_dev), ++ sb->s_flags, sb->s_count, ++ atomic_read(&sb->s_active), !!br->br_xino.xi_file); ++ return 0; ++ ++out: ++ dpri("s%d: err %ld\n", bindex, PTR_ERR(br)); ++ return -1; ++} ++ ++void au_dpri_sb(struct super_block *sb) ++{ ++ struct au_sbinfo *sbinfo; ++ aufs_bindex_t bindex; ++ int err; ++ /* to reuduce stack size */ ++ struct { ++ struct vfsmount mnt; ++ struct au_branch fake; ++ } *a; ++ ++ /* this function can be called from magic sysrq */ ++ a = kzalloc(sizeof(*a), GFP_ATOMIC); ++ if (unlikely(!a)) { ++ dpri("no memory\n"); ++ return; ++ } ++ ++ a->mnt.mnt_sb = sb; ++ a->fake.br_path.mnt = &a->mnt; ++ atomic_set(&a->fake.br_count, 0); ++ smp_mb(); /* atomic_set */ ++ err = do_pri_br(-1, &a->fake); ++ kfree(a); ++ dpri("dev 0x%x\n", sb->s_dev); ++ if (err || !au_test_aufs(sb)) ++ return; ++ ++ sbinfo = au_sbi(sb); ++ if (!sbinfo) ++ return; ++ dpri("nw %d, gen %u, kobj %d\n", ++ atomic_read(&sbinfo->si_nowait.nw_len), sbinfo->si_generation, ++ atomic_read(&sbinfo->si_kobj.kref.refcount)); ++ for (bindex = 0; bindex <= sbinfo->si_bend; bindex++) ++ do_pri_br(bindex, sbinfo->si_branch[0 + bindex]); ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++void __au_dbg_verify_dinode(struct dentry *dentry, const char *func, int line) ++{ ++ struct inode *h_inode, *inode = dentry->d_inode; ++ struct dentry *h_dentry; ++ aufs_bindex_t bindex, bend, bi; ++ ++ if (!inode /* || au_di(dentry)->di_lsc == AuLsc_DI_TMP */) ++ return; ++ ++ bend = au_dbend(dentry); ++ bi = au_ibend(inode); ++ if (bi < bend) ++ bend = bi; ++ bindex = au_dbstart(dentry); ++ bi = au_ibstart(inode); ++ if (bi > bindex) ++ bindex = bi; ++ ++ for (; bindex <= bend; bindex++) { ++ h_dentry = au_h_dptr(dentry, bindex); ++ if (!h_dentry) ++ continue; ++ h_inode = au_h_iptr(inode, bindex); ++ if (unlikely(h_inode != h_dentry->d_inode)) { ++ au_debug_on(); ++ AuDbg("b%d, %s:%d\n", bindex, func, line); ++ AuDbgDentry(dentry); ++ AuDbgInode(inode); ++ au_debug_off(); ++ BUG(); ++ } ++ } ++} ++ ++void au_dbg_verify_gen(struct dentry *parent, unsigned int sigen) ++{ ++ int err, i, j; ++ struct au_dcsub_pages dpages; ++ struct au_dpage *dpage; ++ struct dentry **dentries; ++ ++ err = au_dpages_init(&dpages, GFP_NOFS); ++ AuDebugOn(err); ++ err = au_dcsub_pages_rev_aufs(&dpages, parent, /*do_include*/1); ++ AuDebugOn(err); ++ for (i = dpages.ndpage - 1; !err && i >= 0; i--) { ++ dpage = dpages.dpages + i; ++ dentries = dpage->dentries; ++ for (j = dpage->ndentry - 1; !err && j >= 0; j--) ++ AuDebugOn(au_digen_test(dentries[j], sigen)); ++ } ++ au_dpages_free(&dpages); ++} ++ ++void au_dbg_verify_kthread(void) ++{ ++ if (au_wkq_test()) { ++ au_dbg_blocked(); ++ /* ++ * It may be recursive, but udba=notify between two aufs mounts, ++ * where a single ro branch is shared, is not a problem. ++ */ ++ /* WARN_ON(1); */ ++ } ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++int __init au_debug_init(void) ++{ ++ aufs_bindex_t bindex; ++ struct au_vdir_destr destr; ++ ++ bindex = -1; ++ AuDebugOn(bindex >= 0); ++ ++ destr.len = -1; ++ AuDebugOn(destr.len < NAME_MAX); ++ ++#ifdef CONFIG_4KSTACKS ++ pr_warn("CONFIG_4KSTACKS is defined.\n"); ++#endif ++ ++ return 0; ++} +diff --git a/fs/aufs/debug.h b/fs/aufs/debug.h +new file mode 100644 +index 0000000..039e6f8 +--- /dev/null ++++ b/fs/aufs/debug.h +@@ -0,0 +1,228 @@ ++/* ++ * Copyright (C) 2005-2016 Junjiro R. Okajima ++ * ++ * This program, aufs is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . ++ */ ++ ++/* ++ * debug print functions ++ */ ++ ++#ifndef __AUFS_DEBUG_H__ ++#define __AUFS_DEBUG_H__ ++ ++#ifdef __KERNEL__ ++ ++#include ++#include ++#include ++#include ++ ++#ifdef CONFIG_AUFS_DEBUG ++#define AuDebugOn(a) BUG_ON(a) ++ ++/* module parameter */ ++extern atomic_t aufs_debug; ++static inline void au_debug_on(void) ++{ ++ atomic_inc(&aufs_debug); ++} ++static inline void au_debug_off(void) ++{ ++ atomic_dec_if_positive(&aufs_debug); ++} ++ ++static inline int au_debug_test(void) ++{ ++ return atomic_read(&aufs_debug) > 0; ++} ++#else ++#define AuDebugOn(a) do {} while (0) ++AuStubVoid(au_debug_on, void) ++AuStubVoid(au_debug_off, void) ++AuStubInt0(au_debug_test, void) ++#endif /* CONFIG_AUFS_DEBUG */ ++ ++#define param_check_atomic_t(name, p) __param_check(name, p, atomic_t) ++ ++/* ---------------------------------------------------------------------- */ ++ ++/* debug print */ ++ ++#define AuDbg(fmt, ...) do { \ ++ if (au_debug_test()) \ ++ pr_debug("DEBUG: " fmt, ##__VA_ARGS__); \ ++} while (0) ++#define AuLabel(l) AuDbg(#l "\n") ++#define AuIOErr(fmt, ...) pr_err("I/O Error, " fmt, ##__VA_ARGS__) ++#define AuWarn1(fmt, ...) do { \ ++ static unsigned char _c; \ ++ if (!_c++) \ ++ pr_warn(fmt, ##__VA_ARGS__); \ ++} while (0) ++ ++#define AuErr1(fmt, ...) do { \ ++ static unsigned char _c; \ ++ if (!_c++) \ ++ pr_err(fmt, ##__VA_ARGS__); \ ++} while (0) ++ ++#define AuIOErr1(fmt, ...) do { \ ++ static unsigned char _c; \ ++ if (!_c++) \ ++ AuIOErr(fmt, ##__VA_ARGS__); \ ++} while (0) ++ ++#define AuUnsupportMsg "This operation is not supported." \ ++ " Please report this application to aufs-users ML." ++#define AuUnsupport(fmt, ...) do { \ ++ pr_err(AuUnsupportMsg "\n" fmt, ##__VA_ARGS__); \ ++ dump_stack(); \ ++} while (0) ++ ++#define AuTraceErr(e) do { \ ++ if (unlikely((e) < 0)) \ ++ AuDbg("err %d\n", (int)(e)); \ ++} while (0) ++ ++#define AuTraceErrPtr(p) do { \ ++ if (IS_ERR(p)) \ ++ AuDbg("err %ld\n", PTR_ERR(p)); \ ++} while (0) ++ ++/* dirty macros for debug print, use with "%.*s" and caution */ ++#define AuLNPair(qstr) (qstr)->len, (qstr)->name ++ ++/* ---------------------------------------------------------------------- */ ++ ++struct dentry; ++#ifdef CONFIG_AUFS_DEBUG ++extern struct mutex au_dbg_mtx; ++extern char *au_plevel; ++struct au_nhash; ++void au_dpri_whlist(struct au_nhash *whlist); ++struct au_vdir; ++void au_dpri_vdir(struct au_vdir *vdir); ++struct inode; ++void au_dpri_inode(struct inode *inode); ++void au_dpri_dalias(struct inode *inode); ++void au_dpri_dentry(struct dentry *dentry); ++struct file; ++void au_dpri_file(struct file *filp); ++struct super_block; ++void au_dpri_sb(struct super_block *sb); ++ ++#define au_dbg_verify_dinode(d) __au_dbg_verify_dinode(d, __func__, __LINE__) ++void __au_dbg_verify_dinode(struct dentry *dentry, const char *func, int line); ++void au_dbg_verify_gen(struct dentry *parent, unsigned int sigen); ++void au_dbg_verify_kthread(void); ++ ++int __init au_debug_init(void); ++ ++#define AuDbgWhlist(w) do { \ ++ mutex_lock(&au_dbg_mtx); \ ++ AuDbg(#w "\n"); \ ++ au_dpri_whlist(w); \ ++ mutex_unlock(&au_dbg_mtx); \ ++} while (0) ++ ++#define AuDbgVdir(v) do { \ ++ mutex_lock(&au_dbg_mtx); \ ++ AuDbg(#v "\n"); \ ++ au_dpri_vdir(v); \ ++ mutex_unlock(&au_dbg_mtx); \ ++} while (0) ++ ++#define AuDbgInode(i) do { \ ++ mutex_lock(&au_dbg_mtx); \ ++ AuDbg(#i "\n"); \ ++ au_dpri_inode(i); \ ++ mutex_unlock(&au_dbg_mtx); \ ++} while (0) ++ ++#define AuDbgDAlias(i) do { \ ++ mutex_lock(&au_dbg_mtx); \ ++ AuDbg(#i "\n"); \ ++ au_dpri_dalias(i); \ ++ mutex_unlock(&au_dbg_mtx); \ ++} while (0) ++ ++#define AuDbgDentry(d) do { \ ++ mutex_lock(&au_dbg_mtx); \ ++ AuDbg(#d "\n"); \ ++ au_dpri_dentry(d); \ ++ mutex_unlock(&au_dbg_mtx); \ ++} while (0) ++ ++#define AuDbgFile(f) do { \ ++ mutex_lock(&au_dbg_mtx); \ ++ AuDbg(#f "\n"); \ ++ au_dpri_file(f); \ ++ mutex_unlock(&au_dbg_mtx); \ ++} while (0) ++ ++#define AuDbgSb(sb) do { \ ++ mutex_lock(&au_dbg_mtx); \ ++ AuDbg(#sb "\n"); \ ++ au_dpri_sb(sb); \ ++ mutex_unlock(&au_dbg_mtx); \ ++} while (0) ++ ++#define AuDbgSym(addr) do { \ ++ char sym[KSYM_SYMBOL_LEN]; \ ++ sprint_symbol(sym, (unsigned long)addr); \ ++ AuDbg("%s\n", sym); \ ++} while (0) ++#else ++AuStubVoid(au_dbg_verify_dinode, struct dentry *dentry) ++AuStubVoid(au_dbg_verify_dir_parent, struct dentry *dentry, unsigned int sigen) ++AuStubVoid(au_dbg_verify_nondir_parent, struct dentry *dentry, ++ unsigned int sigen) ++AuStubVoid(au_dbg_verify_gen, struct dentry *parent, unsigned int sigen) ++AuStubVoid(au_dbg_verify_kthread, void) ++AuStubInt0(__init au_debug_init, void) ++ ++#define AuDbgWhlist(w) do {} while (0) ++#define AuDbgVdir(v) do {} while (0) ++#define AuDbgInode(i) do {} while (0) ++#define AuDbgDAlias(i) do {} while (0) ++#define AuDbgDentry(d) do {} while (0) ++#define AuDbgFile(f) do {} while (0) ++#define AuDbgSb(sb) do {} while (0) ++#define AuDbgSym(addr) do {} while (0) ++#endif /* CONFIG_AUFS_DEBUG */ ++ ++/* ---------------------------------------------------------------------- */ ++ ++#ifdef CONFIG_AUFS_MAGIC_SYSRQ ++int __init au_sysrq_init(void); ++void au_sysrq_fin(void); ++ ++#ifdef CONFIG_HW_CONSOLE ++#define au_dbg_blocked() do { \ ++ WARN_ON(1); \ ++ handle_sysrq('w'); \ ++} while (0) ++#else ++AuStubVoid(au_dbg_blocked, void) ++#endif ++ ++#else ++AuStubInt0(__init au_sysrq_init, void) ++AuStubVoid(au_sysrq_fin, void) ++AuStubVoid(au_dbg_blocked, void) ++#endif /* CONFIG_AUFS_MAGIC_SYSRQ */ ++ ++#endif /* __KERNEL__ */ ++#endif /* __AUFS_DEBUG_H__ */ +diff --git a/fs/aufs/dentry.c b/fs/aufs/dentry.c +new file mode 100644 +index 0000000..ed56947 +--- /dev/null ++++ b/fs/aufs/dentry.c +@@ -0,0 +1,1129 @@ ++/* ++ * Copyright (C) 2005-2016 Junjiro R. Okajima ++ * ++ * This program, aufs is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . ++ */ ++ ++/* ++ * lookup and dentry operations ++ */ ++ ++#include ++#include "aufs.h" ++ ++#define AuLkup_ALLOW_NEG 1 ++#define AuLkup_IGNORE_PERM (1 << 1) ++#define au_ftest_lkup(flags, name) ((flags) & AuLkup_##name) ++#define au_fset_lkup(flags, name) \ ++ do { (flags) |= AuLkup_##name; } while (0) ++#define au_fclr_lkup(flags, name) \ ++ do { (flags) &= ~AuLkup_##name; } while (0) ++ ++struct au_do_lookup_args { ++ unsigned int flags; ++ mode_t type; ++}; ++ ++/* ++ * returns positive/negative dentry, NULL or an error. ++ * NULL means whiteout-ed or not-found. ++ */ ++static struct dentry* ++au_do_lookup(struct dentry *h_parent, struct dentry *dentry, ++ aufs_bindex_t bindex, struct qstr *wh_name, ++ struct au_do_lookup_args *args) ++{ ++ struct dentry *h_dentry; ++ struct inode *h_inode; ++ struct au_branch *br; ++ int wh_found, opq; ++ unsigned char wh_able; ++ const unsigned char allow_neg = !!au_ftest_lkup(args->flags, ALLOW_NEG); ++ const unsigned char ignore_perm = !!au_ftest_lkup(args->flags, ++ IGNORE_PERM); ++ ++ wh_found = 0; ++ br = au_sbr(dentry->d_sb, bindex); ++ wh_able = !!au_br_whable(br->br_perm); ++ if (wh_able) ++ wh_found = au_wh_test(h_parent, wh_name, /*try_sio*/0); ++ h_dentry = ERR_PTR(wh_found); ++ if (!wh_found) ++ goto real_lookup; ++ if (unlikely(wh_found < 0)) ++ goto out; ++ ++ /* We found a whiteout */ ++ /* au_set_dbend(dentry, bindex); */ ++ au_set_dbwh(dentry, bindex); ++ if (!allow_neg) ++ return NULL; /* success */ ++ ++real_lookup: ++ if (!ignore_perm) ++ h_dentry = vfsub_lkup_one(&dentry->d_name, h_parent); ++ else ++ h_dentry = au_sio_lkup_one(&dentry->d_name, h_parent); ++ if (IS_ERR(h_dentry)) { ++ if (PTR_ERR(h_dentry) == -ENAMETOOLONG ++ && !allow_neg) ++ h_dentry = NULL; ++ goto out; ++ } ++ ++ h_inode = h_dentry->d_inode; ++ if (!h_inode) { ++ if (!allow_neg) ++ goto out_neg; ++ } else if (wh_found ++ || (args->type && args->type != (h_inode->i_mode & S_IFMT))) ++ goto out_neg; ++ ++ if (au_dbend(dentry) <= bindex) ++ au_set_dbend(dentry, bindex); ++ if (au_dbstart(dentry) < 0 || bindex < au_dbstart(dentry)) ++ au_set_dbstart(dentry, bindex); ++ au_set_h_dptr(dentry, bindex, h_dentry); ++ ++ if (!d_is_dir(h_dentry) ++ || !wh_able ++ || (d_is_positive(dentry) && !d_is_dir(dentry))) ++ goto out; /* success */ ++ ++ mutex_lock_nested(&h_inode->i_mutex, AuLsc_I_CHILD); ++ opq = au_diropq_test(h_dentry); ++ mutex_unlock(&h_inode->i_mutex); ++ if (opq > 0) ++ au_set_dbdiropq(dentry, bindex); ++ else if (unlikely(opq < 0)) { ++ au_set_h_dptr(dentry, bindex, NULL); ++ h_dentry = ERR_PTR(opq); ++ } ++ goto out; ++ ++out_neg: ++ dput(h_dentry); ++ h_dentry = NULL; ++out: ++ return h_dentry; ++} ++ ++static int au_test_shwh(struct super_block *sb, const struct qstr *name) ++{ ++ if (unlikely(!au_opt_test(au_mntflags(sb), SHWH) ++ && !strncmp(name->name, AUFS_WH_PFX, AUFS_WH_PFX_LEN))) ++ return -EPERM; ++ return 0; ++} ++ ++/* ++ * returns the number of lower positive dentries, ++ * otherwise an error. ++ * can be called at unlinking with @type is zero. ++ */ ++int au_lkup_dentry(struct dentry *dentry, aufs_bindex_t bstart, mode_t type) ++{ ++ int npositive, err; ++ aufs_bindex_t bindex, btail, bdiropq; ++ unsigned char isdir, dirperm1; ++ struct qstr whname; ++ struct au_do_lookup_args args = { ++ .flags = 0, ++ .type = type ++ }; ++ const struct qstr *name = &dentry->d_name; ++ struct dentry *parent; ++ struct inode *inode; ++ struct super_block *sb; ++ ++ sb = dentry->d_sb; ++ err = au_test_shwh(sb, name); ++ if (unlikely(err)) ++ goto out; ++ ++ err = au_wh_name_alloc(&whname, name); ++ if (unlikely(err)) ++ goto out; ++ ++ inode = dentry->d_inode; ++ isdir = !!d_is_dir(dentry); ++ if (!type) ++ au_fset_lkup(args.flags, ALLOW_NEG); ++ dirperm1 = !!au_opt_test(au_mntflags(sb), DIRPERM1); ++ ++ npositive = 0; ++ parent = dget_parent(dentry); ++ btail = au_dbtaildir(parent); ++ for (bindex = bstart; bindex <= btail; bindex++) { ++ struct dentry *h_parent, *h_dentry; ++ struct inode *h_inode, *h_dir; ++ ++ h_dentry = au_h_dptr(dentry, bindex); ++ if (h_dentry) { ++ if (h_dentry->d_inode) ++ npositive++; ++ if (type != S_IFDIR) ++ break; ++ continue; ++ } ++ h_parent = au_h_dptr(parent, bindex); ++ if (!h_parent || !d_is_dir(h_parent)) ++ continue; ++ ++ h_dir = h_parent->d_inode; ++ mutex_lock_nested(&h_dir->i_mutex, AuLsc_I_PARENT); ++ h_dentry = au_do_lookup(h_parent, dentry, bindex, &whname, ++ &args); ++ mutex_unlock(&h_dir->i_mutex); ++ err = PTR_ERR(h_dentry); ++ if (IS_ERR(h_dentry)) ++ goto out_parent; ++ if (h_dentry) ++ au_fclr_lkup(args.flags, ALLOW_NEG); ++ if (dirperm1) ++ au_fset_lkup(args.flags, IGNORE_PERM); ++ ++ if (au_dbwh(dentry) == bindex) ++ break; ++ if (!h_dentry) ++ continue; ++ h_inode = h_dentry->d_inode; ++ if (!h_inode) ++ continue; ++ npositive++; ++ if (!args.type) ++ args.type = h_inode->i_mode & S_IFMT; ++ if (args.type != S_IFDIR) ++ break; ++ else if (isdir) { ++ /* the type of lower may be different */ ++ bdiropq = au_dbdiropq(dentry); ++ if (bdiropq >= 0 && bdiropq <= bindex) ++ break; ++ } ++ } ++ ++ if (npositive) { ++ AuLabel(positive); ++ au_update_dbstart(dentry); ++ } ++ err = npositive; ++ if (unlikely(!au_opt_test(au_mntflags(sb), UDBA_NONE) ++ && au_dbstart(dentry) < 0)) { ++ err = -EIO; ++ AuIOErr("both of real entry and whiteout found, %pd, err %d\n", ++ dentry, err); ++ } ++ ++out_parent: ++ dput(parent); ++ kfree(whname.name); ++out: ++ return err; ++} ++ ++struct dentry *au_sio_lkup_one(struct qstr *name, struct dentry *parent) ++{ ++ struct dentry *dentry; ++ int wkq_err; ++ ++ if (!au_test_h_perm_sio(parent->d_inode, MAY_EXEC)) ++ dentry = vfsub_lkup_one(name, parent); ++ else { ++ struct vfsub_lkup_one_args args = { ++ .errp = &dentry, ++ .name = name, ++ .parent = parent ++ }; ++ ++ wkq_err = au_wkq_wait(vfsub_call_lkup_one, &args); ++ if (unlikely(wkq_err)) ++ dentry = ERR_PTR(wkq_err); ++ } ++ ++ return dentry; ++} ++ ++/* ++ * lookup @dentry on @bindex which should be negative. ++ */ ++int au_lkup_neg(struct dentry *dentry, aufs_bindex_t bindex, int wh) ++{ ++ int err; ++ struct dentry *parent, *h_parent, *h_dentry; ++ struct au_branch *br; ++ ++ parent = dget_parent(dentry); ++ h_parent = au_h_dptr(parent, bindex); ++ br = au_sbr(dentry->d_sb, bindex); ++ if (wh) ++ h_dentry = au_whtmp_lkup(h_parent, br, &dentry->d_name); ++ else ++ h_dentry = au_sio_lkup_one(&dentry->d_name, h_parent); ++ err = PTR_ERR(h_dentry); ++ if (IS_ERR(h_dentry)) ++ goto out; ++ if (unlikely(h_dentry->d_inode)) { ++ err = -EIO; ++ AuIOErr("%pd should be negative on b%d.\n", h_dentry, bindex); ++ dput(h_dentry); ++ goto out; ++ } ++ ++ err = 0; ++ if (bindex < au_dbstart(dentry)) ++ au_set_dbstart(dentry, bindex); ++ if (au_dbend(dentry) < bindex) ++ au_set_dbend(dentry, bindex); ++ au_set_h_dptr(dentry, bindex, h_dentry); ++ ++out: ++ dput(parent); ++ return err; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++/* subset of struct inode */ ++struct au_iattr { ++ unsigned long i_ino; ++ /* unsigned int i_nlink; */ ++ kuid_t i_uid; ++ kgid_t i_gid; ++ u64 i_version; ++/* ++ loff_t i_size; ++ blkcnt_t i_blocks; ++*/ ++ umode_t i_mode; ++}; ++ ++static void au_iattr_save(struct au_iattr *ia, struct inode *h_inode) ++{ ++ ia->i_ino = h_inode->i_ino; ++ /* ia->i_nlink = h_inode->i_nlink; */ ++ ia->i_uid = h_inode->i_uid; ++ ia->i_gid = h_inode->i_gid; ++ ia->i_version = h_inode->i_version; ++/* ++ ia->i_size = h_inode->i_size; ++ ia->i_blocks = h_inode->i_blocks; ++*/ ++ ia->i_mode = (h_inode->i_mode & S_IFMT); ++} ++ ++static int au_iattr_test(struct au_iattr *ia, struct inode *h_inode) ++{ ++ return ia->i_ino != h_inode->i_ino ++ /* || ia->i_nlink != h_inode->i_nlink */ ++ || !uid_eq(ia->i_uid, h_inode->i_uid) ++ || !gid_eq(ia->i_gid, h_inode->i_gid) ++ || ia->i_version != h_inode->i_version ++/* ++ || ia->i_size != h_inode->i_size ++ || ia->i_blocks != h_inode->i_blocks ++*/ ++ || ia->i_mode != (h_inode->i_mode & S_IFMT); ++} ++ ++static int au_h_verify_dentry(struct dentry *h_dentry, struct dentry *h_parent, ++ struct au_branch *br) ++{ ++ int err; ++ struct au_iattr ia; ++ struct inode *h_inode; ++ struct dentry *h_d; ++ struct super_block *h_sb; ++ ++ err = 0; ++ memset(&ia, -1, sizeof(ia)); ++ h_sb = h_dentry->d_sb; ++ h_inode = h_dentry->d_inode; ++ if (h_inode) ++ au_iattr_save(&ia, h_inode); ++ else if (au_test_nfs(h_sb) || au_test_fuse(h_sb)) ++ /* nfs d_revalidate may return 0 for negative dentry */ ++ /* fuse d_revalidate always return 0 for negative dentry */ ++ goto out; ++ ++ /* main purpose is namei.c:cached_lookup() and d_revalidate */ ++ h_d = vfsub_lkup_one(&h_dentry->d_name, h_parent); ++ err = PTR_ERR(h_d); ++ if (IS_ERR(h_d)) ++ goto out; ++ ++ err = 0; ++ if (unlikely(h_d != h_dentry ++ || h_d->d_inode != h_inode ++ || (h_inode && au_iattr_test(&ia, h_inode)))) ++ err = au_busy_or_stale(); ++ dput(h_d); ++ ++out: ++ AuTraceErr(err); ++ return err; ++} ++ ++int au_h_verify(struct dentry *h_dentry, unsigned int udba, struct inode *h_dir, ++ struct dentry *h_parent, struct au_branch *br) ++{ ++ int err; ++ ++ err = 0; ++ if (udba == AuOpt_UDBA_REVAL ++ && !au_test_fs_remote(h_dentry->d_sb)) { ++ IMustLock(h_dir); ++ err = (h_dentry->d_parent->d_inode != h_dir); ++ } else if (udba != AuOpt_UDBA_NONE) ++ err = au_h_verify_dentry(h_dentry, h_parent, br); ++ ++ return err; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++static int au_do_refresh_hdentry(struct dentry *dentry, struct dentry *parent) ++{ ++ int err; ++ aufs_bindex_t new_bindex, bindex, bend, bwh, bdiropq; ++ struct au_hdentry tmp, *p, *q; ++ struct au_dinfo *dinfo; ++ struct super_block *sb; ++ ++ DiMustWriteLock(dentry); ++ ++ sb = dentry->d_sb; ++ dinfo = au_di(dentry); ++ bend = dinfo->di_bend; ++ bwh = dinfo->di_bwh; ++ bdiropq = dinfo->di_bdiropq; ++ p = dinfo->di_hdentry + dinfo->di_bstart; ++ for (bindex = dinfo->di_bstart; bindex <= bend; bindex++, p++) { ++ if (!p->hd_dentry) ++ continue; ++ ++ new_bindex = au_br_index(sb, p->hd_id); ++ if (new_bindex == bindex) ++ continue; ++ ++ if (dinfo->di_bwh == bindex) ++ bwh = new_bindex; ++ if (dinfo->di_bdiropq == bindex) ++ bdiropq = new_bindex; ++ if (new_bindex < 0) { ++ au_hdput(p); ++ p->hd_dentry = NULL; ++ continue; ++ } ++ ++ /* swap two lower dentries, and loop again */ ++ q = dinfo->di_hdentry + new_bindex; ++ tmp = *q; ++ *q = *p; ++ *p = tmp; ++ if (tmp.hd_dentry) { ++ bindex--; ++ p--; ++ } ++ } ++ ++ dinfo->di_bwh = -1; ++ if (bwh >= 0 && bwh <= au_sbend(sb) && au_sbr_whable(sb, bwh)) ++ dinfo->di_bwh = bwh; ++ ++ dinfo->di_bdiropq = -1; ++ if (bdiropq >= 0 ++ && bdiropq <= au_sbend(sb) ++ && au_sbr_whable(sb, bdiropq)) ++ dinfo->di_bdiropq = bdiropq; ++ ++ err = -EIO; ++ dinfo->di_bstart = -1; ++ dinfo->di_bend = -1; ++ bend = au_dbend(parent); ++ p = dinfo->di_hdentry; ++ for (bindex = 0; bindex <= bend; bindex++, p++) ++ if (p->hd_dentry) { ++ dinfo->di_bstart = bindex; ++ break; ++ } ++ ++ if (dinfo->di_bstart >= 0) { ++ p = dinfo->di_hdentry + bend; ++ for (bindex = bend; bindex >= 0; bindex--, p--) ++ if (p->hd_dentry) { ++ dinfo->di_bend = bindex; ++ err = 0; ++ break; ++ } ++ } ++ ++ return err; ++} ++ ++static void au_do_hide(struct dentry *dentry) ++{ ++ struct inode *inode; ++ ++ inode = dentry->d_inode; ++ if (inode) { ++ if (!S_ISDIR(inode->i_mode)) { ++ if (inode->i_nlink && !d_unhashed(dentry)) ++ drop_nlink(inode); ++ } else { ++ clear_nlink(inode); ++ /* stop next lookup */ ++ inode->i_flags |= S_DEAD; ++ } ++ smp_mb(); /* necessary? */ ++ } ++ d_drop(dentry); ++} ++ ++static int au_hide_children(struct dentry *parent) ++{ ++ int err, i, j, ndentry; ++ struct au_dcsub_pages dpages; ++ struct au_dpage *dpage; ++ struct dentry *dentry; ++ ++ err = au_dpages_init(&dpages, GFP_NOFS); ++ if (unlikely(err)) ++ goto out; ++ err = au_dcsub_pages(&dpages, parent, NULL, NULL); ++ if (unlikely(err)) ++ goto out_dpages; ++ ++ /* in reverse order */ ++ for (i = dpages.ndpage - 1; i >= 0; i--) { ++ dpage = dpages.dpages + i; ++ ndentry = dpage->ndentry; ++ for (j = ndentry - 1; j >= 0; j--) { ++ dentry = dpage->dentries[j]; ++ if (dentry != parent) ++ au_do_hide(dentry); ++ } ++ } ++ ++out_dpages: ++ au_dpages_free(&dpages); ++out: ++ return err; ++} ++ ++static void au_hide(struct dentry *dentry) ++{ ++ int err; ++ ++ AuDbgDentry(dentry); ++ if (d_is_dir(dentry)) { ++ /* shrink_dcache_parent(dentry); */ ++ err = au_hide_children(dentry); ++ if (unlikely(err)) ++ AuIOErr("%pd, failed hiding children, ignored %d\n", ++ dentry, err); ++ } ++ au_do_hide(dentry); ++} ++ ++/* ++ * By adding a dirty branch, a cached dentry may be affected in various ways. ++ * ++ * a dirty branch is added ++ * - on the top of layers ++ * - in the middle of layers ++ * - to the bottom of layers ++ * ++ * on the added branch there exists ++ * - a whiteout ++ * - a diropq ++ * - a same named entry ++ * + exist ++ * * negative --> positive ++ * * positive --> positive ++ * - type is unchanged ++ * - type is changed ++ * + doesn't exist ++ * * negative --> negative ++ * * positive --> negative (rejected by au_br_del() for non-dir case) ++ * - none ++ */ ++static int au_refresh_by_dinfo(struct dentry *dentry, struct au_dinfo *dinfo, ++ struct au_dinfo *tmp) ++{ ++ int err; ++ aufs_bindex_t bindex, bend; ++ struct { ++ struct dentry *dentry; ++ struct inode *inode; ++ mode_t mode; ++ } orig_h, tmp_h = { ++ .dentry = NULL ++ }; ++ struct au_hdentry *hd; ++ struct inode *inode, *h_inode; ++ struct dentry *h_dentry; ++ ++ err = 0; ++ AuDebugOn(dinfo->di_bstart < 0); ++ orig_h.dentry = dinfo->di_hdentry[dinfo->di_bstart].hd_dentry; ++ orig_h.inode = orig_h.dentry->d_inode; ++ orig_h.mode = 0; ++ if (orig_h.inode) ++ orig_h.mode = orig_h.inode->i_mode & S_IFMT; ++ if (tmp->di_bstart >= 0) { ++ tmp_h.dentry = tmp->di_hdentry[tmp->di_bstart].hd_dentry; ++ tmp_h.inode = tmp_h.dentry->d_inode; ++ if (tmp_h.inode) ++ tmp_h.mode = tmp_h.inode->i_mode & S_IFMT; ++ } ++ ++ inode = dentry->d_inode; ++ if (!orig_h.inode) { ++ AuDbg("nagative originally\n"); ++ if (inode) { ++ au_hide(dentry); ++ goto out; ++ } ++ AuDebugOn(inode); ++ AuDebugOn(dinfo->di_bstart != dinfo->di_bend); ++ AuDebugOn(dinfo->di_bdiropq != -1); ++ ++ if (!tmp_h.inode) { ++ AuDbg("negative --> negative\n"); ++ /* should have only one negative lower */ ++ if (tmp->di_bstart >= 0 ++ && tmp->di_bstart < dinfo->di_bstart) { ++ AuDebugOn(tmp->di_bstart != tmp->di_bend); ++ AuDebugOn(dinfo->di_bstart != dinfo->di_bend); ++ au_set_h_dptr(dentry, dinfo->di_bstart, NULL); ++ au_di_cp(dinfo, tmp); ++ hd = tmp->di_hdentry + tmp->di_bstart; ++ au_set_h_dptr(dentry, tmp->di_bstart, ++ dget(hd->hd_dentry)); ++ } ++ au_dbg_verify_dinode(dentry); ++ } else { ++ AuDbg("negative --> positive\n"); ++ /* ++ * similar to the behaviour of creating with bypassing ++ * aufs. ++ * unhash it in order to force an error in the ++ * succeeding create operation. ++ * we should not set S_DEAD here. ++ */ ++ d_drop(dentry); ++ /* au_di_swap(tmp, dinfo); */ ++ au_dbg_verify_dinode(dentry); ++ } ++ } else { ++ AuDbg("positive originally\n"); ++ /* inode may be NULL */ ++ AuDebugOn(inode && (inode->i_mode & S_IFMT) != orig_h.mode); ++ if (!tmp_h.inode) { ++ AuDbg("positive --> negative\n"); ++ /* or bypassing aufs */ ++ au_hide(dentry); ++ if (tmp->di_bwh >= 0 && tmp->di_bwh <= dinfo->di_bstart) ++ dinfo->di_bwh = tmp->di_bwh; ++ if (inode) ++ err = au_refresh_hinode_self(inode); ++ au_dbg_verify_dinode(dentry); ++ } else if (orig_h.mode == tmp_h.mode) { ++ AuDbg("positive --> positive, same type\n"); ++ if (!S_ISDIR(orig_h.mode) ++ && dinfo->di_bstart > tmp->di_bstart) { ++ /* ++ * similar to the behaviour of removing and ++ * creating. ++ */ ++ au_hide(dentry); ++ if (inode) ++ err = au_refresh_hinode_self(inode); ++ au_dbg_verify_dinode(dentry); ++ } else { ++ /* fill empty slots */ ++ if (dinfo->di_bstart > tmp->di_bstart) ++ dinfo->di_bstart = tmp->di_bstart; ++ if (dinfo->di_bend < tmp->di_bend) ++ dinfo->di_bend = tmp->di_bend; ++ dinfo->di_bwh = tmp->di_bwh; ++ dinfo->di_bdiropq = tmp->di_bdiropq; ++ hd = tmp->di_hdentry; ++ bend = dinfo->di_bend; ++ for (bindex = tmp->di_bstart; bindex <= bend; ++ bindex++) { ++ if (au_h_dptr(dentry, bindex)) ++ continue; ++ h_dentry = hd[bindex].hd_dentry; ++ if (!h_dentry) ++ continue; ++ h_inode = h_dentry->d_inode; ++ AuDebugOn(!h_inode); ++ AuDebugOn(orig_h.mode ++ != (h_inode->i_mode ++ & S_IFMT)); ++ au_set_h_dptr(dentry, bindex, ++ dget(h_dentry)); ++ } ++ err = au_refresh_hinode(inode, dentry); ++ au_dbg_verify_dinode(dentry); ++ } ++ } else { ++ AuDbg("positive --> positive, different type\n"); ++ /* similar to the behaviour of removing and creating */ ++ au_hide(dentry); ++ if (inode) ++ err = au_refresh_hinode_self(inode); ++ au_dbg_verify_dinode(dentry); ++ } ++ } ++ ++out: ++ return err; ++} ++ ++void au_refresh_dop(struct dentry *dentry, int force_reval) ++{ ++ const struct dentry_operations *dop ++ = force_reval ? &aufs_dop : dentry->d_sb->s_d_op; ++ static const unsigned int mask ++ = DCACHE_OP_REVALIDATE | DCACHE_OP_WEAK_REVALIDATE; ++ ++ BUILD_BUG_ON(sizeof(mask) != sizeof(dentry->d_flags)); ++ ++ if (dentry->d_op == dop) ++ return; ++ ++ AuDbg("%pd\n", dentry); ++ spin_lock(&dentry->d_lock); ++ if (dop == &aufs_dop) ++ dentry->d_flags |= mask; ++ else ++ dentry->d_flags &= ~mask; ++ dentry->d_op = dop; ++ spin_unlock(&dentry->d_lock); ++} ++ ++int au_refresh_dentry(struct dentry *dentry, struct dentry *parent) ++{ ++ int err, ebrange; ++ unsigned int sigen; ++ struct au_dinfo *dinfo, *tmp; ++ struct super_block *sb; ++ struct inode *inode; ++ ++ DiMustWriteLock(dentry); ++ AuDebugOn(IS_ROOT(dentry)); ++ AuDebugOn(!parent->d_inode); ++ ++ sb = dentry->d_sb; ++ inode = dentry->d_inode; ++ sigen = au_sigen(sb); ++ err = au_digen_test(parent, sigen); ++ if (unlikely(err)) ++ goto out; ++ ++ dinfo = au_di(dentry); ++ err = au_di_realloc(dinfo, au_sbend(sb) + 1); ++ if (unlikely(err)) ++ goto out; ++ ebrange = au_dbrange_test(dentry); ++ if (!ebrange) ++ ebrange = au_do_refresh_hdentry(dentry, parent); ++ ++ if (d_unhashed(dentry) || ebrange /* || dinfo->di_tmpfile */) { ++ AuDebugOn(au_dbstart(dentry) < 0 && au_dbend(dentry) >= 0); ++ if (inode) ++ err = au_refresh_hinode_self(inode); ++ au_dbg_verify_dinode(dentry); ++ if (!err) ++ goto out_dgen; /* success */ ++ goto out; ++ } ++ ++ /* temporary dinfo */ ++ AuDbgDentry(dentry); ++ err = -ENOMEM; ++ tmp = au_di_alloc(sb, AuLsc_DI_TMP); ++ if (unlikely(!tmp)) ++ goto out; ++ au_di_swap(tmp, dinfo); ++ /* returns the number of positive dentries */ ++ /* ++ * if current working dir is removed, it returns an error. ++ * but the dentry is legal. ++ */ ++ err = au_lkup_dentry(dentry, /*bstart*/0, /*type*/0); ++ AuDbgDentry(dentry); ++ au_di_swap(tmp, dinfo); ++ if (err == -ENOENT) ++ err = 0; ++ if (err >= 0) { ++ /* compare/refresh by dinfo */ ++ AuDbgDentry(dentry); ++ err = au_refresh_by_dinfo(dentry, dinfo, tmp); ++ au_dbg_verify_dinode(dentry); ++ AuTraceErr(err); ++ } ++ au_rw_write_unlock(&tmp->di_rwsem); ++ au_di_free(tmp); ++ if (unlikely(err)) ++ goto out; ++ ++out_dgen: ++ au_update_digen(dentry); ++out: ++ if (unlikely(err && !(dentry->d_flags & DCACHE_NFSFS_RENAMED))) { ++ AuIOErr("failed refreshing %pd, %d\n", dentry, err); ++ AuDbgDentry(dentry); ++ } ++ AuTraceErr(err); ++ return err; ++} ++ ++static int au_do_h_d_reval(struct dentry *h_dentry, unsigned int flags, ++ struct dentry *dentry, aufs_bindex_t bindex) ++{ ++ int err, valid; ++ ++ err = 0; ++ if (!(h_dentry->d_flags & DCACHE_OP_REVALIDATE)) ++ goto out; ++ ++ AuDbg("b%d\n", bindex); ++ /* ++ * gave up supporting LOOKUP_CREATE/OPEN for lower fs, ++ * due to whiteout and branch permission. ++ */ ++ flags &= ~(/*LOOKUP_PARENT |*/ LOOKUP_OPEN | LOOKUP_CREATE ++ | LOOKUP_FOLLOW | LOOKUP_EXCL); ++ /* it may return tri-state */ ++ valid = h_dentry->d_op->d_revalidate(h_dentry, flags); ++ ++ if (unlikely(valid < 0)) ++ err = valid; ++ else if (!valid) ++ err = -EINVAL; ++ ++out: ++ AuTraceErr(err); ++ return err; ++} ++ ++/* todo: remove this */ ++static int h_d_revalidate(struct dentry *dentry, struct inode *inode, ++ unsigned int flags, int do_udba) ++{ ++ int err; ++ umode_t mode, h_mode; ++ aufs_bindex_t bindex, btail, bstart, ibs, ibe; ++ unsigned char plus, unhashed, is_root, h_plus, h_nfs, tmpfile; ++ struct inode *h_inode, *h_cached_inode; ++ struct dentry *h_dentry; ++ struct qstr *name, *h_name; ++ ++ err = 0; ++ plus = 0; ++ mode = 0; ++ ibs = -1; ++ ibe = -1; ++ unhashed = !!d_unhashed(dentry); ++ is_root = !!IS_ROOT(dentry); ++ name = &dentry->d_name; ++ tmpfile = au_di(dentry)->di_tmpfile; ++ ++ /* ++ * Theoretically, REVAL test should be unnecessary in case of ++ * {FS,I}NOTIFY. ++ * But {fs,i}notify doesn't fire some necessary events, ++ * IN_ATTRIB for atime/nlink/pageio ++ * Let's do REVAL test too. ++ */ ++ if (do_udba && inode) { ++ mode = (inode->i_mode & S_IFMT); ++ plus = (inode->i_nlink > 0); ++ ibs = au_ibstart(inode); ++ ibe = au_ibend(inode); ++ } ++ ++ bstart = au_dbstart(dentry); ++ btail = bstart; ++ if (inode && S_ISDIR(inode->i_mode)) ++ btail = au_dbtaildir(dentry); ++ for (bindex = bstart; bindex <= btail; bindex++) { ++ h_dentry = au_h_dptr(dentry, bindex); ++ if (!h_dentry) ++ continue; ++ ++ AuDbg("b%d, %pd\n", bindex, h_dentry); ++ h_nfs = !!au_test_nfs(h_dentry->d_sb); ++ spin_lock(&h_dentry->d_lock); ++ h_name = &h_dentry->d_name; ++ if (unlikely(do_udba ++ && !is_root ++ && ((!h_nfs ++ && (unhashed != !!d_unhashed(h_dentry) ++ || (!tmpfile ++ && !au_qstreq(name, h_name)) ++ )) ++ || (h_nfs ++ && !(flags & LOOKUP_OPEN) ++ && (h_dentry->d_flags ++ & DCACHE_NFSFS_RENAMED))) ++ )) { ++ int h_unhashed; ++ ++ h_unhashed = d_unhashed(h_dentry); ++ spin_unlock(&h_dentry->d_lock); ++ AuDbg("unhash 0x%x 0x%x, %pd %pd\n", ++ unhashed, h_unhashed, dentry, h_dentry); ++ goto err; ++ } ++ spin_unlock(&h_dentry->d_lock); ++ ++ err = au_do_h_d_reval(h_dentry, flags, dentry, bindex); ++ if (unlikely(err)) ++ /* do not goto err, to keep the errno */ ++ break; ++ ++ /* todo: plink too? */ ++ if (!do_udba) ++ continue; ++ ++ /* UDBA tests */ ++ h_inode = h_dentry->d_inode; ++ if (unlikely(!!inode != !!h_inode)) ++ goto err; ++ ++ h_plus = plus; ++ h_mode = mode; ++ h_cached_inode = h_inode; ++ if (h_inode) { ++ h_mode = (h_inode->i_mode & S_IFMT); ++ h_plus = (h_inode->i_nlink > 0); ++ } ++ if (inode && ibs <= bindex && bindex <= ibe) ++ h_cached_inode = au_h_iptr(inode, bindex); ++ ++ if (!h_nfs) { ++ if (unlikely(plus != h_plus && !tmpfile)) ++ goto err; ++ } else { ++ if (unlikely(!(h_dentry->d_flags & DCACHE_NFSFS_RENAMED) ++ && !is_root ++ && !IS_ROOT(h_dentry) ++ && unhashed != d_unhashed(h_dentry))) ++ goto err; ++ } ++ if (unlikely(mode != h_mode ++ || h_cached_inode != h_inode)) ++ goto err; ++ continue; ++ ++err: ++ err = -EINVAL; ++ break; ++ } ++ ++ AuTraceErr(err); ++ return err; ++} ++ ++/* todo: consolidate with do_refresh() and au_reval_for_attr() */ ++static int simple_reval_dpath(struct dentry *dentry, unsigned int sigen) ++{ ++ int err; ++ struct dentry *parent; ++ ++ if (!au_digen_test(dentry, sigen)) ++ return 0; ++ ++ parent = dget_parent(dentry); ++ di_read_lock_parent(parent, AuLock_IR); ++ AuDebugOn(au_digen_test(parent, sigen)); ++ au_dbg_verify_gen(parent, sigen); ++ err = au_refresh_dentry(dentry, parent); ++ di_read_unlock(parent, AuLock_IR); ++ dput(parent); ++ AuTraceErr(err); ++ return err; ++} ++ ++int au_reval_dpath(struct dentry *dentry, unsigned int sigen) ++{ ++ int err; ++ struct dentry *d, *parent; ++ struct inode *inode; ++ ++ if (!au_ftest_si(au_sbi(dentry->d_sb), FAILED_REFRESH_DIR)) ++ return simple_reval_dpath(dentry, sigen); ++ ++ /* slow loop, keep it simple and stupid */ ++ /* cf: au_cpup_dirs() */ ++ err = 0; ++ parent = NULL; ++ while (au_digen_test(dentry, sigen)) { ++ d = dentry; ++ while (1) { ++ dput(parent); ++ parent = dget_parent(d); ++ if (!au_digen_test(parent, sigen)) ++ break; ++ d = parent; ++ } ++ ++ inode = d->d_inode; ++ if (d != dentry) ++ di_write_lock_child2(d); ++ ++ /* someone might update our dentry while we were sleeping */ ++ if (au_digen_test(d, sigen)) { ++ /* ++ * todo: consolidate with simple_reval_dpath(), ++ * do_refresh() and au_reval_for_attr(). ++ */ ++ di_read_lock_parent(parent, AuLock_IR); ++ err = au_refresh_dentry(d, parent); ++ di_read_unlock(parent, AuLock_IR); ++ } ++ ++ if (d != dentry) ++ di_write_unlock(d); ++ dput(parent); ++ if (unlikely(err)) ++ break; ++ } ++ ++ return err; ++} ++ ++/* ++ * if valid returns 1, otherwise 0. ++ */ ++static int aufs_d_revalidate(struct dentry *dentry, unsigned int flags) ++{ ++ int valid, err; ++ unsigned int sigen; ++ unsigned char do_udba; ++ struct super_block *sb; ++ struct inode *inode; ++ ++ /* todo: support rcu-walk? */ ++ if (flags & LOOKUP_RCU) ++ return -ECHILD; ++ ++ valid = 0; ++ if (unlikely(!au_di(dentry))) ++ goto out; ++ ++ valid = 1; ++ sb = dentry->d_sb; ++ /* ++ * todo: very ugly ++ * i_mutex of parent dir may be held, ++ * but we should not return 'invalid' due to busy. ++ */ ++ err = aufs_read_lock(dentry, AuLock_FLUSH | AuLock_DW | AuLock_NOPLM); ++ if (unlikely(err)) { ++ valid = err; ++ AuTraceErr(err); ++ goto out; ++ } ++ inode = dentry->d_inode; ++ if (unlikely(inode && is_bad_inode(inode))) { ++ err = -EINVAL; ++ AuTraceErr(err); ++ goto out_dgrade; ++ } ++ if (unlikely(au_dbrange_test(dentry))) { ++ err = -EINVAL; ++ AuTraceErr(err); ++ goto out_dgrade; ++ } ++ ++ sigen = au_sigen(sb); ++ if (au_digen_test(dentry, sigen)) { ++ AuDebugOn(IS_ROOT(dentry)); ++ err = au_reval_dpath(dentry, sigen); ++ if (unlikely(err)) { ++ AuTraceErr(err); ++ goto out_dgrade; ++ } ++ } ++ di_downgrade_lock(dentry, AuLock_IR); ++ ++ err = -EINVAL; ++ if (!(flags & (LOOKUP_OPEN | LOOKUP_EMPTY)) ++ && inode ++ && !(inode->i_state && I_LINKABLE) ++ && (IS_DEADDIR(inode) || !inode->i_nlink)) { ++ AuTraceErr(err); ++ goto out_inval; ++ } ++ ++ do_udba = !au_opt_test(au_mntflags(sb), UDBA_NONE); ++ if (do_udba && inode) { ++ aufs_bindex_t bstart = au_ibstart(inode); ++ struct inode *h_inode; ++ ++ if (bstart >= 0) { ++ h_inode = au_h_iptr(inode, bstart); ++ if (h_inode && au_test_higen(inode, h_inode)) { ++ AuTraceErr(err); ++ goto out_inval; ++ } ++ } ++ } ++ ++ err = h_d_revalidate(dentry, inode, flags, do_udba); ++ if (unlikely(!err && do_udba && au_dbstart(dentry) < 0)) { ++ err = -EIO; ++ AuDbg("both of real entry and whiteout found, %p, err %d\n", ++ dentry, err); ++ } ++ goto out_inval; ++ ++out_dgrade: ++ di_downgrade_lock(dentry, AuLock_IR); ++out_inval: ++ aufs_read_unlock(dentry, AuLock_IR); ++ AuTraceErr(err); ++ valid = !err; ++out: ++ if (!valid) { ++ AuDbg("%pd invalid, %d\n", dentry, valid); ++ d_drop(dentry); ++ } ++ return valid; ++} ++ ++static void aufs_d_release(struct dentry *dentry) ++{ ++ if (au_di(dentry)) { ++ au_di_fin(dentry); ++ au_hn_di_reinit(dentry); ++ } ++} ++ ++const struct dentry_operations aufs_dop = { ++ .d_revalidate = aufs_d_revalidate, ++ .d_weak_revalidate = aufs_d_revalidate, ++ .d_release = aufs_d_release ++}; ++ ++/* aufs_dop without d_revalidate */ ++const struct dentry_operations aufs_dop_noreval = { ++ .d_release = aufs_d_release ++}; +diff --git a/fs/aufs/dentry.h b/fs/aufs/dentry.h +new file mode 100644 +index 0000000..4006484 +--- /dev/null ++++ b/fs/aufs/dentry.h +@@ -0,0 +1,234 @@ ++/* ++ * Copyright (C) 2005-2016 Junjiro R. Okajima ++ * ++ * This program, aufs is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . ++ */ ++ ++/* ++ * lookup and dentry operations ++ */ ++ ++#ifndef __AUFS_DENTRY_H__ ++#define __AUFS_DENTRY_H__ ++ ++#ifdef __KERNEL__ ++ ++#include ++#include "rwsem.h" ++ ++struct au_hdentry { ++ struct dentry *hd_dentry; ++ aufs_bindex_t hd_id; ++}; ++ ++struct au_dinfo { ++ atomic_t di_generation; ++ ++ struct au_rwsem di_rwsem; ++ aufs_bindex_t di_bstart, di_bend, di_bwh, di_bdiropq; ++ unsigned char di_tmpfile; /* to allow the different name */ ++ struct au_hdentry *di_hdentry; ++} ____cacheline_aligned_in_smp; ++ ++/* ---------------------------------------------------------------------- */ ++ ++/* dentry.c */ ++extern const struct dentry_operations aufs_dop, aufs_dop_noreval; ++struct au_branch; ++struct dentry *au_sio_lkup_one(struct qstr *name, struct dentry *parent); ++int au_h_verify(struct dentry *h_dentry, unsigned int udba, struct inode *h_dir, ++ struct dentry *h_parent, struct au_branch *br); ++ ++int au_lkup_dentry(struct dentry *dentry, aufs_bindex_t bstart, mode_t type); ++int au_lkup_neg(struct dentry *dentry, aufs_bindex_t bindex, int wh); ++int au_refresh_dentry(struct dentry *dentry, struct dentry *parent); ++int au_reval_dpath(struct dentry *dentry, unsigned int sigen); ++void au_refresh_dop(struct dentry *dentry, int force_reval); ++ ++/* dinfo.c */ ++void au_di_init_once(void *_di); ++struct au_dinfo *au_di_alloc(struct super_block *sb, unsigned int lsc); ++void au_di_free(struct au_dinfo *dinfo); ++void au_di_swap(struct au_dinfo *a, struct au_dinfo *b); ++void au_di_cp(struct au_dinfo *dst, struct au_dinfo *src); ++int au_di_init(struct dentry *dentry); ++void au_di_fin(struct dentry *dentry); ++int au_di_realloc(struct au_dinfo *dinfo, int nbr); ++ ++void di_read_lock(struct dentry *d, int flags, unsigned int lsc); ++void di_read_unlock(struct dentry *d, int flags); ++void di_downgrade_lock(struct dentry *d, int flags); ++void di_write_lock(struct dentry *d, unsigned int lsc); ++void di_write_unlock(struct dentry *d); ++void di_write_lock2_child(struct dentry *d1, struct dentry *d2, int isdir); ++void di_write_lock2_parent(struct dentry *d1, struct dentry *d2, int isdir); ++void di_write_unlock2(struct dentry *d1, struct dentry *d2); ++ ++struct dentry *au_h_dptr(struct dentry *dentry, aufs_bindex_t bindex); ++struct dentry *au_h_d_alias(struct dentry *dentry, aufs_bindex_t bindex); ++aufs_bindex_t au_dbtail(struct dentry *dentry); ++aufs_bindex_t au_dbtaildir(struct dentry *dentry); ++ ++void au_set_h_dptr(struct dentry *dentry, aufs_bindex_t bindex, ++ struct dentry *h_dentry); ++int au_digen_test(struct dentry *dentry, unsigned int sigen); ++int au_dbrange_test(struct dentry *dentry); ++void au_update_digen(struct dentry *dentry); ++void au_update_dbrange(struct dentry *dentry, int do_put_zero); ++void au_update_dbstart(struct dentry *dentry); ++void au_update_dbend(struct dentry *dentry); ++int au_find_dbindex(struct dentry *dentry, struct dentry *h_dentry); ++ ++/* ---------------------------------------------------------------------- */ ++ ++static inline struct au_dinfo *au_di(struct dentry *dentry) ++{ ++ return dentry->d_fsdata; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++/* lock subclass for dinfo */ ++enum { ++ AuLsc_DI_CHILD, /* child first */ ++ AuLsc_DI_CHILD2, /* rename(2), link(2), and cpup at hnotify */ ++ AuLsc_DI_CHILD3, /* copyup dirs */ ++ AuLsc_DI_PARENT, ++ AuLsc_DI_PARENT2, ++ AuLsc_DI_PARENT3, ++ AuLsc_DI_TMP /* temp for replacing dinfo */ ++}; ++ ++/* ++ * di_read_lock_child, di_write_lock_child, ++ * di_read_lock_child2, di_write_lock_child2, ++ * di_read_lock_child3, di_write_lock_child3, ++ * di_read_lock_parent, di_write_lock_parent, ++ * di_read_lock_parent2, di_write_lock_parent2, ++ * di_read_lock_parent3, di_write_lock_parent3, ++ */ ++#define AuReadLockFunc(name, lsc) \ ++static inline void di_read_lock_##name(struct dentry *d, int flags) \ ++{ di_read_lock(d, flags, AuLsc_DI_##lsc); } ++ ++#define AuWriteLockFunc(name, lsc) \ ++static inline void di_write_lock_##name(struct dentry *d) \ ++{ di_write_lock(d, AuLsc_DI_##lsc); } ++ ++#define AuRWLockFuncs(name, lsc) \ ++ AuReadLockFunc(name, lsc) \ ++ AuWriteLockFunc(name, lsc) ++ ++AuRWLockFuncs(child, CHILD); ++AuRWLockFuncs(child2, CHILD2); ++AuRWLockFuncs(child3, CHILD3); ++AuRWLockFuncs(parent, PARENT); ++AuRWLockFuncs(parent2, PARENT2); ++AuRWLockFuncs(parent3, PARENT3); ++ ++#undef AuReadLockFunc ++#undef AuWriteLockFunc ++#undef AuRWLockFuncs ++ ++#define DiMustNoWaiters(d) AuRwMustNoWaiters(&au_di(d)->di_rwsem) ++#define DiMustAnyLock(d) AuRwMustAnyLock(&au_di(d)->di_rwsem) ++#define DiMustWriteLock(d) AuRwMustWriteLock(&au_di(d)->di_rwsem) ++ ++/* ---------------------------------------------------------------------- */ ++ ++/* todo: memory barrier? */ ++static inline unsigned int au_digen(struct dentry *d) ++{ ++ return atomic_read(&au_di(d)->di_generation); ++} ++ ++static inline void au_h_dentry_init(struct au_hdentry *hdentry) ++{ ++ hdentry->hd_dentry = NULL; ++} ++ ++static inline void au_hdput(struct au_hdentry *hd) ++{ ++ if (hd) ++ dput(hd->hd_dentry); ++} ++ ++static inline aufs_bindex_t au_dbstart(struct dentry *dentry) ++{ ++ DiMustAnyLock(dentry); ++ return au_di(dentry)->di_bstart; ++} ++ ++static inline aufs_bindex_t au_dbend(struct dentry *dentry) ++{ ++ DiMustAnyLock(dentry); ++ return au_di(dentry)->di_bend; ++} ++ ++static inline aufs_bindex_t au_dbwh(struct dentry *dentry) ++{ ++ DiMustAnyLock(dentry); ++ return au_di(dentry)->di_bwh; ++} ++ ++static inline aufs_bindex_t au_dbdiropq(struct dentry *dentry) ++{ ++ DiMustAnyLock(dentry); ++ return au_di(dentry)->di_bdiropq; ++} ++ ++/* todo: hard/soft set? */ ++static inline void au_set_dbstart(struct dentry *dentry, aufs_bindex_t bindex) ++{ ++ DiMustWriteLock(dentry); ++ au_di(dentry)->di_bstart = bindex; ++} ++ ++static inline void au_set_dbend(struct dentry *dentry, aufs_bindex_t bindex) ++{ ++ DiMustWriteLock(dentry); ++ au_di(dentry)->di_bend = bindex; ++} ++ ++static inline void au_set_dbwh(struct dentry *dentry, aufs_bindex_t bindex) ++{ ++ DiMustWriteLock(dentry); ++ /* dbwh can be outside of bstart - bend range */ ++ au_di(dentry)->di_bwh = bindex; ++} ++ ++static inline void au_set_dbdiropq(struct dentry *dentry, aufs_bindex_t bindex) ++{ ++ DiMustWriteLock(dentry); ++ au_di(dentry)->di_bdiropq = bindex; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++#ifdef CONFIG_AUFS_HNOTIFY ++static inline void au_digen_dec(struct dentry *d) ++{ ++ atomic_dec(&au_di(d)->di_generation); ++} ++ ++static inline void au_hn_di_reinit(struct dentry *dentry) ++{ ++ dentry->d_fsdata = NULL; ++} ++#else ++AuStubVoid(au_hn_di_reinit, struct dentry *dentry __maybe_unused) ++#endif /* CONFIG_AUFS_HNOTIFY */ ++ ++#endif /* __KERNEL__ */ ++#endif /* __AUFS_DENTRY_H__ */ +diff --git a/fs/aufs/dinfo.c b/fs/aufs/dinfo.c +new file mode 100644 +index 0000000..28c02b3 +--- /dev/null ++++ b/fs/aufs/dinfo.c +@@ -0,0 +1,544 @@ ++/* ++ * Copyright (C) 2005-2016 Junjiro R. Okajima ++ * ++ * This program, aufs is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . ++ */ ++ ++/* ++ * dentry private data ++ */ ++ ++#include "aufs.h" ++ ++void au_di_init_once(void *_dinfo) ++{ ++ struct au_dinfo *dinfo = _dinfo; ++ static struct lock_class_key aufs_di; ++ ++ au_rw_init(&dinfo->di_rwsem); ++ au_rw_class(&dinfo->di_rwsem, &aufs_di); ++} ++ ++struct au_dinfo *au_di_alloc(struct super_block *sb, unsigned int lsc) ++{ ++ struct au_dinfo *dinfo; ++ int nbr, i; ++ ++ dinfo = au_cache_alloc_dinfo(); ++ if (unlikely(!dinfo)) ++ goto out; ++ ++ nbr = au_sbend(sb) + 1; ++ if (nbr <= 0) ++ nbr = 1; ++ dinfo->di_hdentry = kcalloc(nbr, sizeof(*dinfo->di_hdentry), GFP_NOFS); ++ if (dinfo->di_hdentry) { ++ au_rw_write_lock_nested(&dinfo->di_rwsem, lsc); ++ dinfo->di_bstart = -1; ++ dinfo->di_bend = -1; ++ dinfo->di_bwh = -1; ++ dinfo->di_bdiropq = -1; ++ dinfo->di_tmpfile = 0; ++ for (i = 0; i < nbr; i++) ++ dinfo->di_hdentry[i].hd_id = -1; ++ goto out; ++ } ++ ++ au_cache_free_dinfo(dinfo); ++ dinfo = NULL; ++ ++out: ++ return dinfo; ++} ++ ++void au_di_free(struct au_dinfo *dinfo) ++{ ++ struct au_hdentry *p; ++ aufs_bindex_t bend, bindex; ++ ++ /* dentry may not be revalidated */ ++ bindex = dinfo->di_bstart; ++ if (bindex >= 0) { ++ bend = dinfo->di_bend; ++ p = dinfo->di_hdentry + bindex; ++ while (bindex++ <= bend) ++ au_hdput(p++); ++ } ++ kfree(dinfo->di_hdentry); ++ au_cache_free_dinfo(dinfo); ++} ++ ++void au_di_swap(struct au_dinfo *a, struct au_dinfo *b) ++{ ++ struct au_hdentry *p; ++ aufs_bindex_t bi; ++ ++ AuRwMustWriteLock(&a->di_rwsem); ++ AuRwMustWriteLock(&b->di_rwsem); ++ ++#define DiSwap(v, name) \ ++ do { \ ++ v = a->di_##name; \ ++ a->di_##name = b->di_##name; \ ++ b->di_##name = v; \ ++ } while (0) ++ ++ DiSwap(p, hdentry); ++ DiSwap(bi, bstart); ++ DiSwap(bi, bend); ++ DiSwap(bi, bwh); ++ DiSwap(bi, bdiropq); ++ /* smp_mb(); */ ++ ++#undef DiSwap ++} ++ ++void au_di_cp(struct au_dinfo *dst, struct au_dinfo *src) ++{ ++ AuRwMustWriteLock(&dst->di_rwsem); ++ AuRwMustWriteLock(&src->di_rwsem); ++ ++ dst->di_bstart = src->di_bstart; ++ dst->di_bend = src->di_bend; ++ dst->di_bwh = src->di_bwh; ++ dst->di_bdiropq = src->di_bdiropq; ++ /* smp_mb(); */ ++} ++ ++int au_di_init(struct dentry *dentry) ++{ ++ int err; ++ struct super_block *sb; ++ struct au_dinfo *dinfo; ++ ++ err = 0; ++ sb = dentry->d_sb; ++ dinfo = au_di_alloc(sb, AuLsc_DI_CHILD); ++ if (dinfo) { ++ atomic_set(&dinfo->di_generation, au_sigen(sb)); ++ /* smp_mb(); */ /* atomic_set */ ++ dentry->d_fsdata = dinfo; ++ } else ++ err = -ENOMEM; ++ ++ return err; ++} ++ ++void au_di_fin(struct dentry *dentry) ++{ ++ struct au_dinfo *dinfo; ++ ++ dinfo = au_di(dentry); ++ AuRwDestroy(&dinfo->di_rwsem); ++ au_di_free(dinfo); ++} ++ ++int au_di_realloc(struct au_dinfo *dinfo, int nbr) ++{ ++ int err, sz; ++ struct au_hdentry *hdp; ++ ++ AuRwMustWriteLock(&dinfo->di_rwsem); ++ ++ err = -ENOMEM; ++ sz = sizeof(*hdp) * (dinfo->di_bend + 1); ++ if (!sz) ++ sz = sizeof(*hdp); ++ hdp = au_kzrealloc(dinfo->di_hdentry, sz, sizeof(*hdp) * nbr, GFP_NOFS); ++ if (hdp) { ++ dinfo->di_hdentry = hdp; ++ err = 0; ++ } ++ ++ return err; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++static void do_ii_write_lock(struct inode *inode, unsigned int lsc) ++{ ++ switch (lsc) { ++ case AuLsc_DI_CHILD: ++ ii_write_lock_child(inode); ++ break; ++ case AuLsc_DI_CHILD2: ++ ii_write_lock_child2(inode); ++ break; ++ case AuLsc_DI_CHILD3: ++ ii_write_lock_child3(inode); ++ break; ++ case AuLsc_DI_PARENT: ++ ii_write_lock_parent(inode); ++ break; ++ case AuLsc_DI_PARENT2: ++ ii_write_lock_parent2(inode); ++ break; ++ case AuLsc_DI_PARENT3: ++ ii_write_lock_parent3(inode); ++ break; ++ default: ++ BUG(); ++ } ++} ++ ++static void do_ii_read_lock(struct inode *inode, unsigned int lsc) ++{ ++ switch (lsc) { ++ case AuLsc_DI_CHILD: ++ ii_read_lock_child(inode); ++ break; ++ case AuLsc_DI_CHILD2: ++ ii_read_lock_child2(inode); ++ break; ++ case AuLsc_DI_CHILD3: ++ ii_read_lock_child3(inode); ++ break; ++ case AuLsc_DI_PARENT: ++ ii_read_lock_parent(inode); ++ break; ++ case AuLsc_DI_PARENT2: ++ ii_read_lock_parent2(inode); ++ break; ++ case AuLsc_DI_PARENT3: ++ ii_read_lock_parent3(inode); ++ break; ++ default: ++ BUG(); ++ } ++} ++ ++void di_read_lock(struct dentry *d, int flags, unsigned int lsc) ++{ ++ au_rw_read_lock_nested(&au_di(d)->di_rwsem, lsc); ++ if (d->d_inode) { ++ if (au_ftest_lock(flags, IW)) ++ do_ii_write_lock(d->d_inode, lsc); ++ else if (au_ftest_lock(flags, IR)) ++ do_ii_read_lock(d->d_inode, lsc); ++ } ++} ++ ++void di_read_unlock(struct dentry *d, int flags) ++{ ++ if (d->d_inode) { ++ if (au_ftest_lock(flags, IW)) { ++ au_dbg_verify_dinode(d); ++ ii_write_unlock(d->d_inode); ++ } else if (au_ftest_lock(flags, IR)) { ++ au_dbg_verify_dinode(d); ++ ii_read_unlock(d->d_inode); ++ } ++ } ++ au_rw_read_unlock(&au_di(d)->di_rwsem); ++} ++ ++void di_downgrade_lock(struct dentry *d, int flags) ++{ ++ if (d->d_inode && au_ftest_lock(flags, IR)) ++ ii_downgrade_lock(d->d_inode); ++ au_rw_dgrade_lock(&au_di(d)->di_rwsem); ++} ++ ++void di_write_lock(struct dentry *d, unsigned int lsc) ++{ ++ au_rw_write_lock_nested(&au_di(d)->di_rwsem, lsc); ++ if (d->d_inode) ++ do_ii_write_lock(d->d_inode, lsc); ++} ++ ++void di_write_unlock(struct dentry *d) ++{ ++ au_dbg_verify_dinode(d); ++ if (d->d_inode) ++ ii_write_unlock(d->d_inode); ++ au_rw_write_unlock(&au_di(d)->di_rwsem); ++} ++ ++void di_write_lock2_child(struct dentry *d1, struct dentry *d2, int isdir) ++{ ++ AuDebugOn(d1 == d2 ++ || d1->d_inode == d2->d_inode ++ || d1->d_sb != d2->d_sb); ++ ++ if (isdir && au_test_subdir(d1, d2)) { ++ di_write_lock_child(d1); ++ di_write_lock_child2(d2); ++ } else { ++ /* there should be no races */ ++ di_write_lock_child(d2); ++ di_write_lock_child2(d1); ++ } ++} ++ ++void di_write_lock2_parent(struct dentry *d1, struct dentry *d2, int isdir) ++{ ++ AuDebugOn(d1 == d2 ++ || d1->d_inode == d2->d_inode ++ || d1->d_sb != d2->d_sb); ++ ++ if (isdir && au_test_subdir(d1, d2)) { ++ di_write_lock_parent(d1); ++ di_write_lock_parent2(d2); ++ } else { ++ /* there should be no races */ ++ di_write_lock_parent(d2); ++ di_write_lock_parent2(d1); ++ } ++} ++ ++void di_write_unlock2(struct dentry *d1, struct dentry *d2) ++{ ++ di_write_unlock(d1); ++ if (d1->d_inode == d2->d_inode) ++ au_rw_write_unlock(&au_di(d2)->di_rwsem); ++ else ++ di_write_unlock(d2); ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++struct dentry *au_h_dptr(struct dentry *dentry, aufs_bindex_t bindex) ++{ ++ struct dentry *d; ++ ++ DiMustAnyLock(dentry); ++ ++ if (au_dbstart(dentry) < 0 || bindex < au_dbstart(dentry)) ++ return NULL; ++ AuDebugOn(bindex < 0); ++ d = au_di(dentry)->di_hdentry[0 + bindex].hd_dentry; ++ AuDebugOn(d && au_dcount(d) <= 0); ++ return d; ++} ++ ++/* ++ * extended version of au_h_dptr(). ++ * returns a hashed and positive (or linkable) h_dentry in bindex, NULL, or ++ * error. ++ */ ++struct dentry *au_h_d_alias(struct dentry *dentry, aufs_bindex_t bindex) ++{ ++ struct dentry *h_dentry; ++ struct inode *inode, *h_inode; ++ ++ inode = dentry->d_inode; ++ AuDebugOn(!inode); ++ ++ h_dentry = NULL; ++ if (au_dbstart(dentry) <= bindex ++ && bindex <= au_dbend(dentry)) ++ h_dentry = au_h_dptr(dentry, bindex); ++ if (h_dentry && !au_d_linkable(h_dentry)) { ++ dget(h_dentry); ++ goto out; /* success */ ++ } ++ ++ AuDebugOn(bindex < au_ibstart(inode)); ++ AuDebugOn(au_ibend(inode) < bindex); ++ h_inode = au_h_iptr(inode, bindex); ++ h_dentry = d_find_alias(h_inode); ++ if (h_dentry) { ++ if (!IS_ERR(h_dentry)) { ++ if (!au_d_linkable(h_dentry)) ++ goto out; /* success */ ++ dput(h_dentry); ++ } else ++ goto out; ++ } ++ ++ if (au_opt_test(au_mntflags(dentry->d_sb), PLINK)) { ++ h_dentry = au_plink_lkup(inode, bindex); ++ AuDebugOn(!h_dentry); ++ if (!IS_ERR(h_dentry)) { ++ if (!au_d_hashed_positive(h_dentry)) ++ goto out; /* success */ ++ dput(h_dentry); ++ h_dentry = NULL; ++ } ++ } ++ ++out: ++ AuDbgDentry(h_dentry); ++ return h_dentry; ++} ++ ++aufs_bindex_t au_dbtail(struct dentry *dentry) ++{ ++ aufs_bindex_t bend, bwh; ++ ++ bend = au_dbend(dentry); ++ if (0 <= bend) { ++ bwh = au_dbwh(dentry); ++ if (!bwh) ++ return bwh; ++ if (0 < bwh && bwh < bend) ++ return bwh - 1; ++ } ++ return bend; ++} ++ ++aufs_bindex_t au_dbtaildir(struct dentry *dentry) ++{ ++ aufs_bindex_t bend, bopq; ++ ++ bend = au_dbtail(dentry); ++ if (0 <= bend) { ++ bopq = au_dbdiropq(dentry); ++ if (0 <= bopq && bopq < bend) ++ bend = bopq; ++ } ++ return bend; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++void au_set_h_dptr(struct dentry *dentry, aufs_bindex_t bindex, ++ struct dentry *h_dentry) ++{ ++ struct au_hdentry *hd = au_di(dentry)->di_hdentry + bindex; ++ struct au_branch *br; ++ ++ DiMustWriteLock(dentry); ++ ++ au_hdput(hd); ++ hd->hd_dentry = h_dentry; ++ if (h_dentry) { ++ br = au_sbr(dentry->d_sb, bindex); ++ hd->hd_id = br->br_id; ++ } ++} ++ ++int au_dbrange_test(struct dentry *dentry) ++{ ++ int err; ++ aufs_bindex_t bstart, bend; ++ ++ err = 0; ++ bstart = au_dbstart(dentry); ++ bend = au_dbend(dentry); ++ if (bstart >= 0) ++ AuDebugOn(bend < 0 && bstart > bend); ++ else { ++ err = -EIO; ++ AuDebugOn(bend >= 0); ++ } ++ ++ return err; ++} ++ ++int au_digen_test(struct dentry *dentry, unsigned int sigen) ++{ ++ int err; ++ ++ err = 0; ++ if (unlikely(au_digen(dentry) != sigen ++ || au_iigen_test(dentry->d_inode, sigen))) ++ err = -EIO; ++ ++ return err; ++} ++ ++void au_update_digen(struct dentry *dentry) ++{ ++ atomic_set(&au_di(dentry)->di_generation, au_sigen(dentry->d_sb)); ++ /* smp_mb(); */ /* atomic_set */ ++} ++ ++void au_update_dbrange(struct dentry *dentry, int do_put_zero) ++{ ++ struct au_dinfo *dinfo; ++ struct dentry *h_d; ++ struct au_hdentry *hdp; ++ ++ DiMustWriteLock(dentry); ++ ++ dinfo = au_di(dentry); ++ if (!dinfo || dinfo->di_bstart < 0) ++ return; ++ ++ hdp = dinfo->di_hdentry; ++ if (do_put_zero) { ++ aufs_bindex_t bindex, bend; ++ ++ bend = dinfo->di_bend; ++ for (bindex = dinfo->di_bstart; bindex <= bend; bindex++) { ++ h_d = hdp[0 + bindex].hd_dentry; ++ if (h_d && !h_d->d_inode) ++ au_set_h_dptr(dentry, bindex, NULL); ++ } ++ } ++ ++ dinfo->di_bstart = -1; ++ while (++dinfo->di_bstart <= dinfo->di_bend) ++ if (hdp[0 + dinfo->di_bstart].hd_dentry) ++ break; ++ if (dinfo->di_bstart > dinfo->di_bend) { ++ dinfo->di_bstart = -1; ++ dinfo->di_bend = -1; ++ return; ++ } ++ ++ dinfo->di_bend++; ++ while (0 <= --dinfo->di_bend) ++ if (hdp[0 + dinfo->di_bend].hd_dentry) ++ break; ++ AuDebugOn(dinfo->di_bstart > dinfo->di_bend || dinfo->di_bend < 0); ++} ++ ++void au_update_dbstart(struct dentry *dentry) ++{ ++ aufs_bindex_t bindex, bend; ++ struct dentry *h_dentry; ++ ++ bend = au_dbend(dentry); ++ for (bindex = au_dbstart(dentry); bindex <= bend; bindex++) { ++ h_dentry = au_h_dptr(dentry, bindex); ++ if (!h_dentry) ++ continue; ++ if (h_dentry->d_inode) { ++ au_set_dbstart(dentry, bindex); ++ return; ++ } ++ au_set_h_dptr(dentry, bindex, NULL); ++ } ++} ++ ++void au_update_dbend(struct dentry *dentry) ++{ ++ aufs_bindex_t bindex, bstart; ++ struct dentry *h_dentry; ++ ++ bstart = au_dbstart(dentry); ++ for (bindex = au_dbend(dentry); bindex >= bstart; bindex--) { ++ h_dentry = au_h_dptr(dentry, bindex); ++ if (!h_dentry) ++ continue; ++ if (h_dentry->d_inode) { ++ au_set_dbend(dentry, bindex); ++ return; ++ } ++ au_set_h_dptr(dentry, bindex, NULL); ++ } ++} ++ ++int au_find_dbindex(struct dentry *dentry, struct dentry *h_dentry) ++{ ++ aufs_bindex_t bindex, bend; ++ ++ bend = au_dbend(dentry); ++ for (bindex = au_dbstart(dentry); bindex <= bend; bindex++) ++ if (au_h_dptr(dentry, bindex) == h_dentry) ++ return bindex; ++ return -1; ++} +diff --git a/fs/aufs/dir.c b/fs/aufs/dir.c +new file mode 100644 +index 0000000..3d61b05 +--- /dev/null ++++ b/fs/aufs/dir.c +@@ -0,0 +1,756 @@ ++/* ++ * Copyright (C) 2005-2016 Junjiro R. Okajima ++ * ++ * This program, aufs is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . ++ */ ++ ++/* ++ * directory operations ++ */ ++ ++#include ++#include "aufs.h" ++ ++void au_add_nlink(struct inode *dir, struct inode *h_dir) ++{ ++ unsigned int nlink; ++ ++ AuDebugOn(!S_ISDIR(dir->i_mode) || !S_ISDIR(h_dir->i_mode)); ++ ++ nlink = dir->i_nlink; ++ nlink += h_dir->i_nlink - 2; ++ if (h_dir->i_nlink < 2) ++ nlink += 2; ++ smp_mb(); /* for i_nlink */ ++ /* 0 can happen in revaliding */ ++ set_nlink(dir, nlink); ++} ++ ++void au_sub_nlink(struct inode *dir, struct inode *h_dir) ++{ ++ unsigned int nlink; ++ ++ AuDebugOn(!S_ISDIR(dir->i_mode) || !S_ISDIR(h_dir->i_mode)); ++ ++ nlink = dir->i_nlink; ++ nlink -= h_dir->i_nlink - 2; ++ if (h_dir->i_nlink < 2) ++ nlink -= 2; ++ smp_mb(); /* for i_nlink */ ++ /* nlink == 0 means the branch-fs is broken */ ++ set_nlink(dir, nlink); ++} ++ ++loff_t au_dir_size(struct file *file, struct dentry *dentry) ++{ ++ loff_t sz; ++ aufs_bindex_t bindex, bend; ++ struct file *h_file; ++ struct dentry *h_dentry; ++ ++ sz = 0; ++ if (file) { ++ AuDebugOn(!d_is_dir(file->f_path.dentry)); ++ ++ bend = au_fbend_dir(file); ++ for (bindex = au_fbstart(file); ++ bindex <= bend && sz < KMALLOC_MAX_SIZE; ++ bindex++) { ++ h_file = au_hf_dir(file, bindex); ++ if (h_file && file_inode(h_file)) ++ sz += vfsub_f_size_read(h_file); ++ } ++ } else { ++ AuDebugOn(!dentry); ++ AuDebugOn(!d_is_dir(dentry)); ++ ++ bend = au_dbtaildir(dentry); ++ for (bindex = au_dbstart(dentry); ++ bindex <= bend && sz < KMALLOC_MAX_SIZE; ++ bindex++) { ++ h_dentry = au_h_dptr(dentry, bindex); ++ if (h_dentry && h_dentry->d_inode) ++ sz += i_size_read(h_dentry->d_inode); ++ } ++ } ++ if (sz < KMALLOC_MAX_SIZE) ++ sz = roundup_pow_of_two(sz); ++ if (sz > KMALLOC_MAX_SIZE) ++ sz = KMALLOC_MAX_SIZE; ++ else if (sz < NAME_MAX) { ++ BUILD_BUG_ON(AUFS_RDBLK_DEF < NAME_MAX); ++ sz = AUFS_RDBLK_DEF; ++ } ++ return sz; ++} ++ ++struct au_dir_ts_arg { ++ struct dentry *dentry; ++ aufs_bindex_t brid; ++}; ++ ++static void au_do_dir_ts(void *arg) ++{ ++ struct au_dir_ts_arg *a = arg; ++ struct au_dtime dt; ++ struct path h_path; ++ struct inode *dir, *h_dir; ++ struct super_block *sb; ++ struct au_branch *br; ++ struct au_hinode *hdir; ++ int err; ++ aufs_bindex_t bstart, bindex; ++ ++ sb = a->dentry->d_sb; ++ dir = a->dentry->d_inode; ++ if (!dir) ++ goto out; ++ /* no dir->i_mutex lock */ ++ aufs_read_lock(a->dentry, AuLock_DW); /* noflush */ ++ ++ bstart = au_ibstart(dir); ++ bindex = au_br_index(sb, a->brid); ++ if (bindex < bstart) ++ goto out_unlock; ++ ++ br = au_sbr(sb, bindex); ++ h_path.dentry = au_h_dptr(a->dentry, bindex); ++ if (!h_path.dentry) ++ goto out_unlock; ++ h_path.mnt = au_br_mnt(br); ++ au_dtime_store(&dt, a->dentry, &h_path); ++ ++ br = au_sbr(sb, bstart); ++ if (!au_br_writable(br->br_perm)) ++ goto out_unlock; ++ h_path.dentry = au_h_dptr(a->dentry, bstart); ++ h_path.mnt = au_br_mnt(br); ++ err = vfsub_mnt_want_write(h_path.mnt); ++ if (err) ++ goto out_unlock; ++ hdir = au_hi(dir, bstart); ++ au_hn_imtx_lock_nested(hdir, AuLsc_I_PARENT); ++ h_dir = au_h_iptr(dir, bstart); ++ if (h_dir->i_nlink ++ && timespec_compare(&h_dir->i_mtime, &dt.dt_mtime) < 0) { ++ dt.dt_h_path = h_path; ++ au_dtime_revert(&dt); ++ } ++ au_hn_imtx_unlock(hdir); ++ vfsub_mnt_drop_write(h_path.mnt); ++ au_cpup_attr_timesizes(dir); ++ ++out_unlock: ++ aufs_read_unlock(a->dentry, AuLock_DW); ++out: ++ dput(a->dentry); ++ au_nwt_done(&au_sbi(sb)->si_nowait); ++ kfree(arg); ++} ++ ++void au_dir_ts(struct inode *dir, aufs_bindex_t bindex) ++{ ++ int perm, wkq_err; ++ aufs_bindex_t bstart; ++ struct au_dir_ts_arg *arg; ++ struct dentry *dentry; ++ struct super_block *sb; ++ ++ IMustLock(dir); ++ ++ dentry = d_find_any_alias(dir); ++ AuDebugOn(!dentry); ++ sb = dentry->d_sb; ++ bstart = au_ibstart(dir); ++ if (bstart == bindex) { ++ au_cpup_attr_timesizes(dir); ++ goto out; ++ } ++ ++ perm = au_sbr_perm(sb, bstart); ++ if (!au_br_writable(perm)) ++ goto out; ++ ++ arg = kmalloc(sizeof(*arg), GFP_NOFS); ++ if (!arg) ++ goto out; ++ ++ arg->dentry = dget(dentry); /* will be dput-ted by au_do_dir_ts() */ ++ arg->brid = au_sbr_id(sb, bindex); ++ wkq_err = au_wkq_nowait(au_do_dir_ts, arg, sb, /*flags*/0); ++ if (unlikely(wkq_err)) { ++ pr_err("wkq %d\n", wkq_err); ++ dput(dentry); ++ kfree(arg); ++ } ++ ++out: ++ dput(dentry); ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++static int reopen_dir(struct file *file) ++{ ++ int err; ++ unsigned int flags; ++ aufs_bindex_t bindex, btail, bstart; ++ struct dentry *dentry, *h_dentry; ++ struct file *h_file; ++ ++ /* open all lower dirs */ ++ dentry = file->f_dentry; ++ bstart = au_dbstart(dentry); ++ for (bindex = au_fbstart(file); bindex < bstart; bindex++) ++ au_set_h_fptr(file, bindex, NULL); ++ au_set_fbstart(file, bstart); ++ ++ btail = au_dbtaildir(dentry); ++ for (bindex = au_fbend_dir(file); btail < bindex; bindex--) ++ au_set_h_fptr(file, bindex, NULL); ++ au_set_fbend_dir(file, btail); ++ ++ flags = vfsub_file_flags(file); ++ for (bindex = bstart; bindex <= btail; bindex++) { ++ h_dentry = au_h_dptr(dentry, bindex); ++ if (!h_dentry) ++ continue; ++ h_file = au_hf_dir(file, bindex); ++ if (h_file) ++ continue; ++ ++ h_file = au_h_open(dentry, bindex, flags, file, /*force_wr*/0); ++ err = PTR_ERR(h_file); ++ if (IS_ERR(h_file)) ++ goto out; /* close all? */ ++ au_set_h_fptr(file, bindex, h_file); ++ } ++ au_update_figen(file); ++ /* todo: necessary? */ ++ /* file->f_ra = h_file->f_ra; */ ++ err = 0; ++ ++out: ++ return err; ++} ++ ++static int do_open_dir(struct file *file, int flags, struct file *h_file) ++{ ++ int err; ++ aufs_bindex_t bindex, btail; ++ struct dentry *dentry, *h_dentry; ++ struct vfsmount *mnt; ++ ++ FiMustWriteLock(file); ++ AuDebugOn(h_file); ++ ++ err = 0; ++ mnt = file->f_path.mnt; ++ dentry = file->f_dentry; ++ file->f_version = dentry->d_inode->i_version; ++ bindex = au_dbstart(dentry); ++ au_set_fbstart(file, bindex); ++ btail = au_dbtaildir(dentry); ++ au_set_fbend_dir(file, btail); ++ for (; !err && bindex <= btail; bindex++) { ++ h_dentry = au_h_dptr(dentry, bindex); ++ if (!h_dentry) ++ continue; ++ ++ err = vfsub_test_mntns(mnt, h_dentry->d_sb); ++ if (unlikely(err)) ++ break; ++ h_file = au_h_open(dentry, bindex, flags, file, /*force_wr*/0); ++ if (IS_ERR(h_file)) { ++ err = PTR_ERR(h_file); ++ break; ++ } ++ au_set_h_fptr(file, bindex, h_file); ++ } ++ au_update_figen(file); ++ /* todo: necessary? */ ++ /* file->f_ra = h_file->f_ra; */ ++ if (!err) ++ return 0; /* success */ ++ ++ /* close all */ ++ for (bindex = au_fbstart(file); bindex <= btail; bindex++) ++ au_set_h_fptr(file, bindex, NULL); ++ au_set_fbstart(file, -1); ++ au_set_fbend_dir(file, -1); ++ ++ return err; ++} ++ ++static int aufs_open_dir(struct inode *inode __maybe_unused, ++ struct file *file) ++{ ++ int err; ++ struct super_block *sb; ++ struct au_fidir *fidir; ++ ++ err = -ENOMEM; ++ sb = file->f_dentry->d_sb; ++ si_read_lock(sb, AuLock_FLUSH); ++ fidir = au_fidir_alloc(sb); ++ if (fidir) { ++ struct au_do_open_args args = { ++ .open = do_open_dir, ++ .fidir = fidir ++ }; ++ err = au_do_open(file, &args); ++ if (unlikely(err)) ++ kfree(fidir); ++ } ++ si_read_unlock(sb); ++ return err; ++} ++ ++static int aufs_release_dir(struct inode *inode __maybe_unused, ++ struct file *file) ++{ ++ struct au_vdir *vdir_cache; ++ struct au_finfo *finfo; ++ struct au_fidir *fidir; ++ aufs_bindex_t bindex, bend; ++ ++ finfo = au_fi(file); ++ fidir = finfo->fi_hdir; ++ if (fidir) { ++ au_sphl_del(&finfo->fi_hlist, ++ &au_sbi(file->f_dentry->d_sb)->si_files); ++ vdir_cache = fidir->fd_vdir_cache; /* lock-free */ ++ if (vdir_cache) ++ au_vdir_free(vdir_cache); ++ ++ bindex = finfo->fi_btop; ++ if (bindex >= 0) { ++ /* ++ * calls fput() instead of filp_close(), ++ * since no dnotify or lock for the lower file. ++ */ ++ bend = fidir->fd_bbot; ++ for (; bindex <= bend; bindex++) ++ au_set_h_fptr(file, bindex, NULL); ++ } ++ kfree(fidir); ++ finfo->fi_hdir = NULL; ++ } ++ au_finfo_fin(file); ++ return 0; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++static int au_do_flush_dir(struct file *file, fl_owner_t id) ++{ ++ int err; ++ aufs_bindex_t bindex, bend; ++ struct file *h_file; ++ ++ err = 0; ++ bend = au_fbend_dir(file); ++ for (bindex = au_fbstart(file); !err && bindex <= bend; bindex++) { ++ h_file = au_hf_dir(file, bindex); ++ if (h_file) ++ err = vfsub_flush(h_file, id); ++ } ++ return err; ++} ++ ++static int aufs_flush_dir(struct file *file, fl_owner_t id) ++{ ++ return au_do_flush(file, id, au_do_flush_dir); ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++static int au_do_fsync_dir_no_file(struct dentry *dentry, int datasync) ++{ ++ int err; ++ aufs_bindex_t bend, bindex; ++ struct inode *inode; ++ struct super_block *sb; ++ ++ err = 0; ++ sb = dentry->d_sb; ++ inode = dentry->d_inode; ++ IMustLock(inode); ++ bend = au_dbend(dentry); ++ for (bindex = au_dbstart(dentry); !err && bindex <= bend; bindex++) { ++ struct path h_path; ++ ++ if (au_test_ro(sb, bindex, inode)) ++ continue; ++ h_path.dentry = au_h_dptr(dentry, bindex); ++ if (!h_path.dentry) ++ continue; ++ ++ h_path.mnt = au_sbr_mnt(sb, bindex); ++ err = vfsub_fsync(NULL, &h_path, datasync); ++ } ++ ++ return err; ++} ++ ++static int au_do_fsync_dir(struct file *file, int datasync) ++{ ++ int err; ++ aufs_bindex_t bend, bindex; ++ struct file *h_file; ++ struct super_block *sb; ++ struct inode *inode; ++ ++ err = au_reval_and_lock_fdi(file, reopen_dir, /*wlock*/1); ++ if (unlikely(err)) ++ goto out; ++ ++ inode = file_inode(file); ++ sb = inode->i_sb; ++ bend = au_fbend_dir(file); ++ for (bindex = au_fbstart(file); !err && bindex <= bend; bindex++) { ++ h_file = au_hf_dir(file, bindex); ++ if (!h_file || au_test_ro(sb, bindex, inode)) ++ continue; ++ ++ err = vfsub_fsync(h_file, &h_file->f_path, datasync); ++ } ++ ++out: ++ return err; ++} ++ ++/* ++ * @file may be NULL ++ */ ++static int aufs_fsync_dir(struct file *file, loff_t start, loff_t end, ++ int datasync) ++{ ++ int err; ++ struct dentry *dentry; ++ struct super_block *sb; ++ struct mutex *mtx; ++ ++ err = 0; ++ dentry = file->f_dentry; ++ mtx = &dentry->d_inode->i_mutex; ++ mutex_lock(mtx); ++ sb = dentry->d_sb; ++ si_noflush_read_lock(sb); ++ if (file) ++ err = au_do_fsync_dir(file, datasync); ++ else { ++ di_write_lock_child(dentry); ++ err = au_do_fsync_dir_no_file(dentry, datasync); ++ } ++ au_cpup_attr_timesizes(dentry->d_inode); ++ di_write_unlock(dentry); ++ if (file) ++ fi_write_unlock(file); ++ ++ si_read_unlock(sb); ++ mutex_unlock(mtx); ++ return err; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++static int aufs_iterate(struct file *file, struct dir_context *ctx) ++{ ++ int err; ++ struct dentry *dentry; ++ struct inode *inode, *h_inode; ++ struct super_block *sb; ++ ++ AuDbg("%pD, ctx{%pf, %llu}\n", file, ctx->actor, ctx->pos); ++ ++ dentry = file->f_dentry; ++ inode = dentry->d_inode; ++ IMustLock(inode); ++ ++ sb = dentry->d_sb; ++ si_read_lock(sb, AuLock_FLUSH); ++ err = au_reval_and_lock_fdi(file, reopen_dir, /*wlock*/1); ++ if (unlikely(err)) ++ goto out; ++ err = au_alive_dir(dentry); ++ if (!err) ++ err = au_vdir_init(file); ++ di_downgrade_lock(dentry, AuLock_IR); ++ if (unlikely(err)) ++ goto out_unlock; ++ ++ h_inode = au_h_iptr(inode, au_ibstart(inode)); ++ if (!au_test_nfsd()) { ++ err = au_vdir_fill_de(file, ctx); ++ fsstack_copy_attr_atime(inode, h_inode); ++ } else { ++ /* ++ * nfsd filldir may call lookup_one_len(), vfs_getattr(), ++ * encode_fh() and others. ++ */ ++ atomic_inc(&h_inode->i_count); ++ di_read_unlock(dentry, AuLock_IR); ++ si_read_unlock(sb); ++ err = au_vdir_fill_de(file, ctx); ++ fsstack_copy_attr_atime(inode, h_inode); ++ fi_write_unlock(file); ++ iput(h_inode); ++ ++ AuTraceErr(err); ++ return err; ++ } ++ ++out_unlock: ++ di_read_unlock(dentry, AuLock_IR); ++ fi_write_unlock(file); ++out: ++ si_read_unlock(sb); ++ return err; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++#define AuTestEmpty_WHONLY 1 ++#define AuTestEmpty_CALLED (1 << 1) ++#define AuTestEmpty_SHWH (1 << 2) ++#define au_ftest_testempty(flags, name) ((flags) & AuTestEmpty_##name) ++#define au_fset_testempty(flags, name) \ ++ do { (flags) |= AuTestEmpty_##name; } while (0) ++#define au_fclr_testempty(flags, name) \ ++ do { (flags) &= ~AuTestEmpty_##name; } while (0) ++ ++#ifndef CONFIG_AUFS_SHWH ++#undef AuTestEmpty_SHWH ++#define AuTestEmpty_SHWH 0 ++#endif ++ ++struct test_empty_arg { ++ struct dir_context ctx; ++ struct au_nhash *whlist; ++ unsigned int flags; ++ int err; ++ aufs_bindex_t bindex; ++}; ++ ++static int test_empty_cb(struct dir_context *ctx, const char *__name, ++ int namelen, loff_t offset __maybe_unused, u64 ino, ++ unsigned int d_type) ++{ ++ struct test_empty_arg *arg = container_of(ctx, struct test_empty_arg, ++ ctx); ++ char *name = (void *)__name; ++ ++ arg->err = 0; ++ au_fset_testempty(arg->flags, CALLED); ++ /* smp_mb(); */ ++ if (name[0] == '.' ++ && (namelen == 1 || (name[1] == '.' && namelen == 2))) ++ goto out; /* success */ ++ ++ if (namelen <= AUFS_WH_PFX_LEN ++ || memcmp(name, AUFS_WH_PFX, AUFS_WH_PFX_LEN)) { ++ if (au_ftest_testempty(arg->flags, WHONLY) ++ && !au_nhash_test_known_wh(arg->whlist, name, namelen)) ++ arg->err = -ENOTEMPTY; ++ goto out; ++ } ++ ++ name += AUFS_WH_PFX_LEN; ++ namelen -= AUFS_WH_PFX_LEN; ++ if (!au_nhash_test_known_wh(arg->whlist, name, namelen)) ++ arg->err = au_nhash_append_wh ++ (arg->whlist, name, namelen, ino, d_type, arg->bindex, ++ au_ftest_testempty(arg->flags, SHWH)); ++ ++out: ++ /* smp_mb(); */ ++ AuTraceErr(arg->err); ++ return arg->err; ++} ++ ++static int do_test_empty(struct dentry *dentry, struct test_empty_arg *arg) ++{ ++ int err; ++ struct file *h_file; ++ ++ h_file = au_h_open(dentry, arg->bindex, ++ O_RDONLY | O_NONBLOCK | O_DIRECTORY | O_LARGEFILE, ++ /*file*/NULL, /*force_wr*/0); ++ err = PTR_ERR(h_file); ++ if (IS_ERR(h_file)) ++ goto out; ++ ++ err = 0; ++ if (!au_opt_test(au_mntflags(dentry->d_sb), UDBA_NONE) ++ && !file_inode(h_file)->i_nlink) ++ goto out_put; ++ ++ do { ++ arg->err = 0; ++ au_fclr_testempty(arg->flags, CALLED); ++ /* smp_mb(); */ ++ err = vfsub_iterate_dir(h_file, &arg->ctx); ++ if (err >= 0) ++ err = arg->err; ++ } while (!err && au_ftest_testempty(arg->flags, CALLED)); ++ ++out_put: ++ fput(h_file); ++ au_sbr_put(dentry->d_sb, arg->bindex); ++out: ++ return err; ++} ++ ++struct do_test_empty_args { ++ int *errp; ++ struct dentry *dentry; ++ struct test_empty_arg *arg; ++}; ++ ++static void call_do_test_empty(void *args) ++{ ++ struct do_test_empty_args *a = args; ++ *a->errp = do_test_empty(a->dentry, a->arg); ++} ++ ++static int sio_test_empty(struct dentry *dentry, struct test_empty_arg *arg) ++{ ++ int err, wkq_err; ++ struct dentry *h_dentry; ++ struct inode *h_inode; ++ ++ h_dentry = au_h_dptr(dentry, arg->bindex); ++ h_inode = h_dentry->d_inode; ++ /* todo: i_mode changes anytime? */ ++ mutex_lock_nested(&h_inode->i_mutex, AuLsc_I_CHILD); ++ err = au_test_h_perm_sio(h_inode, MAY_EXEC | MAY_READ); ++ mutex_unlock(&h_inode->i_mutex); ++ if (!err) ++ err = do_test_empty(dentry, arg); ++ else { ++ struct do_test_empty_args args = { ++ .errp = &err, ++ .dentry = dentry, ++ .arg = arg ++ }; ++ unsigned int flags = arg->flags; ++ ++ wkq_err = au_wkq_wait(call_do_test_empty, &args); ++ if (unlikely(wkq_err)) ++ err = wkq_err; ++ arg->flags = flags; ++ } ++ ++ return err; ++} ++ ++int au_test_empty_lower(struct dentry *dentry) ++{ ++ int err; ++ unsigned int rdhash; ++ aufs_bindex_t bindex, bstart, btail; ++ struct au_nhash whlist; ++ struct test_empty_arg arg = { ++ .ctx = { ++ .actor = au_diractor(test_empty_cb) ++ } ++ }; ++ int (*test_empty)(struct dentry *dentry, struct test_empty_arg *arg); ++ ++ SiMustAnyLock(dentry->d_sb); ++ ++ rdhash = au_sbi(dentry->d_sb)->si_rdhash; ++ if (!rdhash) ++ rdhash = au_rdhash_est(au_dir_size(/*file*/NULL, dentry)); ++ err = au_nhash_alloc(&whlist, rdhash, GFP_NOFS); ++ if (unlikely(err)) ++ goto out; ++ ++ arg.flags = 0; ++ arg.whlist = &whlist; ++ bstart = au_dbstart(dentry); ++ if (au_opt_test(au_mntflags(dentry->d_sb), SHWH)) ++ au_fset_testempty(arg.flags, SHWH); ++ test_empty = do_test_empty; ++ if (au_opt_test(au_mntflags(dentry->d_sb), DIRPERM1)) ++ test_empty = sio_test_empty; ++ arg.bindex = bstart; ++ err = test_empty(dentry, &arg); ++ if (unlikely(err)) ++ goto out_whlist; ++ ++ au_fset_testempty(arg.flags, WHONLY); ++ btail = au_dbtaildir(dentry); ++ for (bindex = bstart + 1; !err && bindex <= btail; bindex++) { ++ struct dentry *h_dentry; ++ ++ h_dentry = au_h_dptr(dentry, bindex); ++ if (h_dentry && h_dentry->d_inode) { ++ arg.bindex = bindex; ++ err = test_empty(dentry, &arg); ++ } ++ } ++ ++out_whlist: ++ au_nhash_wh_free(&whlist); ++out: ++ return err; ++} ++ ++int au_test_empty(struct dentry *dentry, struct au_nhash *whlist) ++{ ++ int err; ++ struct test_empty_arg arg = { ++ .ctx = { ++ .actor = au_diractor(test_empty_cb) ++ } ++ }; ++ aufs_bindex_t bindex, btail; ++ ++ err = 0; ++ arg.whlist = whlist; ++ arg.flags = AuTestEmpty_WHONLY; ++ if (au_opt_test(au_mntflags(dentry->d_sb), SHWH)) ++ au_fset_testempty(arg.flags, SHWH); ++ btail = au_dbtaildir(dentry); ++ for (bindex = au_dbstart(dentry); !err && bindex <= btail; bindex++) { ++ struct dentry *h_dentry; ++ ++ h_dentry = au_h_dptr(dentry, bindex); ++ if (h_dentry && h_dentry->d_inode) { ++ arg.bindex = bindex; ++ err = sio_test_empty(dentry, &arg); ++ } ++ } ++ ++ return err; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++const struct file_operations aufs_dir_fop = { ++ .owner = THIS_MODULE, ++ .llseek = default_llseek, ++ .read = generic_read_dir, ++ .iterate = aufs_iterate, ++ .unlocked_ioctl = aufs_ioctl_dir, ++#ifdef CONFIG_COMPAT ++ .compat_ioctl = aufs_compat_ioctl_dir, ++#endif ++ .open = aufs_open_dir, ++ .release = aufs_release_dir, ++ .flush = aufs_flush_dir, ++ .fsync = aufs_fsync_dir ++}; +diff --git a/fs/aufs/dir.h b/fs/aufs/dir.h +new file mode 100644 +index 0000000..16821f9 +--- /dev/null ++++ b/fs/aufs/dir.h +@@ -0,0 +1,131 @@ ++/* ++ * Copyright (C) 2005-2016 Junjiro R. Okajima ++ * ++ * This program, aufs is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . ++ */ ++ ++/* ++ * directory operations ++ */ ++ ++#ifndef __AUFS_DIR_H__ ++#define __AUFS_DIR_H__ ++ ++#ifdef __KERNEL__ ++ ++#include ++ ++/* ---------------------------------------------------------------------- */ ++ ++/* need to be faster and smaller */ ++ ++struct au_nhash { ++ unsigned int nh_num; ++ struct hlist_head *nh_head; ++}; ++ ++struct au_vdir_destr { ++ unsigned char len; ++ unsigned char name[0]; ++} __packed; ++ ++struct au_vdir_dehstr { ++ struct hlist_node hash; ++ struct au_vdir_destr *str; ++} ____cacheline_aligned_in_smp; ++ ++struct au_vdir_de { ++ ino_t de_ino; ++ unsigned char de_type; ++ /* caution: packed */ ++ struct au_vdir_destr de_str; ++} __packed; ++ ++struct au_vdir_wh { ++ struct hlist_node wh_hash; ++#ifdef CONFIG_AUFS_SHWH ++ ino_t wh_ino; ++ aufs_bindex_t wh_bindex; ++ unsigned char wh_type; ++#else ++ aufs_bindex_t wh_bindex; ++#endif ++ /* caution: packed */ ++ struct au_vdir_destr wh_str; ++} __packed; ++ ++union au_vdir_deblk_p { ++ unsigned char *deblk; ++ struct au_vdir_de *de; ++}; ++ ++struct au_vdir { ++ unsigned char **vd_deblk; ++ unsigned long vd_nblk; ++ struct { ++ unsigned long ul; ++ union au_vdir_deblk_p p; ++ } vd_last; ++ ++ unsigned long vd_version; ++ unsigned int vd_deblk_sz; ++ unsigned long vd_jiffy; ++} ____cacheline_aligned_in_smp; ++ ++/* ---------------------------------------------------------------------- */ ++ ++/* dir.c */ ++extern const struct file_operations aufs_dir_fop; ++void au_add_nlink(struct inode *dir, struct inode *h_dir); ++void au_sub_nlink(struct inode *dir, struct inode *h_dir); ++loff_t au_dir_size(struct file *file, struct dentry *dentry); ++void au_dir_ts(struct inode *dir, aufs_bindex_t bsrc); ++int au_test_empty_lower(struct dentry *dentry); ++int au_test_empty(struct dentry *dentry, struct au_nhash *whlist); ++ ++/* vdir.c */ ++unsigned int au_rdhash_est(loff_t sz); ++int au_nhash_alloc(struct au_nhash *nhash, unsigned int num_hash, gfp_t gfp); ++void au_nhash_wh_free(struct au_nhash *whlist); ++int au_nhash_test_longer_wh(struct au_nhash *whlist, aufs_bindex_t btgt, ++ int limit); ++int au_nhash_test_known_wh(struct au_nhash *whlist, char *name, int nlen); ++int au_nhash_append_wh(struct au_nhash *whlist, char *name, int nlen, ino_t ino, ++ unsigned int d_type, aufs_bindex_t bindex, ++ unsigned char shwh); ++void au_vdir_free(struct au_vdir *vdir); ++int au_vdir_init(struct file *file); ++int au_vdir_fill_de(struct file *file, struct dir_context *ctx); ++ ++/* ioctl.c */ ++long aufs_ioctl_dir(struct file *file, unsigned int cmd, unsigned long arg); ++ ++#ifdef CONFIG_AUFS_RDU ++/* rdu.c */ ++long au_rdu_ioctl(struct file *file, unsigned int cmd, unsigned long arg); ++#ifdef CONFIG_COMPAT ++long au_rdu_compat_ioctl(struct file *file, unsigned int cmd, ++ unsigned long arg); ++#endif ++#else ++AuStub(long, au_rdu_ioctl, return -EINVAL, struct file *file, ++ unsigned int cmd, unsigned long arg) ++#ifdef CONFIG_COMPAT ++AuStub(long, au_rdu_compat_ioctl, return -EINVAL, struct file *file, ++ unsigned int cmd, unsigned long arg) ++#endif ++#endif ++ ++#endif /* __KERNEL__ */ ++#endif /* __AUFS_DIR_H__ */ +diff --git a/fs/aufs/dynop.c b/fs/aufs/dynop.c +new file mode 100644 +index 0000000..d758805 +--- /dev/null ++++ b/fs/aufs/dynop.c +@@ -0,0 +1,379 @@ ++/* ++ * Copyright (C) 2010-2016 Junjiro R. Okajima ++ * ++ * This program, aufs is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . ++ */ ++ ++/* ++ * dynamically customizable operations for regular files ++ */ ++ ++#include "aufs.h" ++ ++#define DyPrSym(key) AuDbgSym(key->dk_op.dy_hop) ++ ++/* ++ * How large will these lists be? ++ * Usually just a few elements, 20-30 at most for each, I guess. ++ */ ++static struct au_splhead dynop[AuDyLast]; ++ ++static struct au_dykey *dy_gfind_get(struct au_splhead *spl, const void *h_op) ++{ ++ struct au_dykey *key, *tmp; ++ struct list_head *head; ++ ++ key = NULL; ++ head = &spl->head; ++ rcu_read_lock(); ++ list_for_each_entry_rcu(tmp, head, dk_list) ++ if (tmp->dk_op.dy_hop == h_op) { ++ key = tmp; ++ kref_get(&key->dk_kref); ++ break; ++ } ++ rcu_read_unlock(); ++ ++ return key; ++} ++ ++static struct au_dykey *dy_bradd(struct au_branch *br, struct au_dykey *key) ++{ ++ struct au_dykey **k, *found; ++ const void *h_op = key->dk_op.dy_hop; ++ int i; ++ ++ found = NULL; ++ k = br->br_dykey; ++ for (i = 0; i < AuBrDynOp; i++) ++ if (k[i]) { ++ if (k[i]->dk_op.dy_hop == h_op) { ++ found = k[i]; ++ break; ++ } ++ } else ++ break; ++ if (!found) { ++ spin_lock(&br->br_dykey_lock); ++ for (; i < AuBrDynOp; i++) ++ if (k[i]) { ++ if (k[i]->dk_op.dy_hop == h_op) { ++ found = k[i]; ++ break; ++ } ++ } else { ++ k[i] = key; ++ break; ++ } ++ spin_unlock(&br->br_dykey_lock); ++ BUG_ON(i == AuBrDynOp); /* expand the array */ ++ } ++ ++ return found; ++} ++ ++/* kref_get() if @key is already added */ ++static struct au_dykey *dy_gadd(struct au_splhead *spl, struct au_dykey *key) ++{ ++ struct au_dykey *tmp, *found; ++ struct list_head *head; ++ const void *h_op = key->dk_op.dy_hop; ++ ++ found = NULL; ++ head = &spl->head; ++ spin_lock(&spl->spin); ++ list_for_each_entry(tmp, head, dk_list) ++ if (tmp->dk_op.dy_hop == h_op) { ++ kref_get(&tmp->dk_kref); ++ found = tmp; ++ break; ++ } ++ if (!found) ++ list_add_rcu(&key->dk_list, head); ++ spin_unlock(&spl->spin); ++ ++ if (!found) ++ DyPrSym(key); ++ return found; ++} ++ ++static void dy_free_rcu(struct rcu_head *rcu) ++{ ++ struct au_dykey *key; ++ ++ key = container_of(rcu, struct au_dykey, dk_rcu); ++ DyPrSym(key); ++ kfree(key); ++} ++ ++static void dy_free(struct kref *kref) ++{ ++ struct au_dykey *key; ++ struct au_splhead *spl; ++ ++ key = container_of(kref, struct au_dykey, dk_kref); ++ spl = dynop + key->dk_op.dy_type; ++ au_spl_del_rcu(&key->dk_list, spl); ++ call_rcu(&key->dk_rcu, dy_free_rcu); ++} ++ ++void au_dy_put(struct au_dykey *key) ++{ ++ kref_put(&key->dk_kref, dy_free); ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++#define DyDbgSize(cnt, op) AuDebugOn(cnt != sizeof(op)/sizeof(void *)) ++ ++#ifdef CONFIG_AUFS_DEBUG ++#define DyDbgDeclare(cnt) unsigned int cnt = 0 ++#define DyDbgInc(cnt) do { cnt++; } while (0) ++#else ++#define DyDbgDeclare(cnt) do {} while (0) ++#define DyDbgInc(cnt) do {} while (0) ++#endif ++ ++#define DySet(func, dst, src, h_op, h_sb) do { \ ++ DyDbgInc(cnt); \ ++ if (h_op->func) { \ ++ if (src.func) \ ++ dst.func = src.func; \ ++ else \ ++ AuDbg("%s %s\n", au_sbtype(h_sb), #func); \ ++ } \ ++} while (0) ++ ++#define DySetForce(func, dst, src) do { \ ++ AuDebugOn(!src.func); \ ++ DyDbgInc(cnt); \ ++ dst.func = src.func; \ ++} while (0) ++ ++#define DySetAop(func) \ ++ DySet(func, dyaop->da_op, aufs_aop, h_aop, h_sb) ++#define DySetAopForce(func) \ ++ DySetForce(func, dyaop->da_op, aufs_aop) ++ ++static void dy_aop(struct au_dykey *key, const void *h_op, ++ struct super_block *h_sb __maybe_unused) ++{ ++ struct au_dyaop *dyaop = (void *)key; ++ const struct address_space_operations *h_aop = h_op; ++ DyDbgDeclare(cnt); ++ ++ AuDbg("%s\n", au_sbtype(h_sb)); ++ ++ DySetAop(writepage); ++ DySetAopForce(readpage); /* force */ ++ DySetAop(writepages); ++ DySetAop(set_page_dirty); ++ DySetAop(readpages); ++ DySetAop(write_begin); ++ DySetAop(write_end); ++ DySetAop(bmap); ++ DySetAop(invalidatepage); ++ DySetAop(releasepage); ++ DySetAop(freepage); ++ /* these two will be changed according to an aufs mount option */ ++ DySetAop(direct_IO); ++ DySetAop(get_xip_mem); ++ DySetAop(migratepage); ++ DySetAop(launder_page); ++ DySetAop(is_partially_uptodate); ++ DySetAop(is_dirty_writeback); ++ DySetAop(error_remove_page); ++ DySetAop(swap_activate); ++ DySetAop(swap_deactivate); ++ ++ DyDbgSize(cnt, *h_aop); ++ dyaop->da_get_xip_mem = h_aop->get_xip_mem; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++static void dy_bug(struct kref *kref) ++{ ++ BUG(); ++} ++ ++static struct au_dykey *dy_get(struct au_dynop *op, struct au_branch *br) ++{ ++ struct au_dykey *key, *old; ++ struct au_splhead *spl; ++ struct op { ++ unsigned int sz; ++ void (*set)(struct au_dykey *key, const void *h_op, ++ struct super_block *h_sb __maybe_unused); ++ }; ++ static const struct op a[] = { ++ [AuDy_AOP] = { ++ .sz = sizeof(struct au_dyaop), ++ .set = dy_aop ++ } ++ }; ++ const struct op *p; ++ ++ spl = dynop + op->dy_type; ++ key = dy_gfind_get(spl, op->dy_hop); ++ if (key) ++ goto out_add; /* success */ ++ ++ p = a + op->dy_type; ++ key = kzalloc(p->sz, GFP_NOFS); ++ if (unlikely(!key)) { ++ key = ERR_PTR(-ENOMEM); ++ goto out; ++ } ++ ++ key->dk_op.dy_hop = op->dy_hop; ++ kref_init(&key->dk_kref); ++ p->set(key, op->dy_hop, au_br_sb(br)); ++ old = dy_gadd(spl, key); ++ if (old) { ++ kfree(key); ++ key = old; ++ } ++ ++out_add: ++ old = dy_bradd(br, key); ++ if (old) ++ /* its ref-count should never be zero here */ ++ kref_put(&key->dk_kref, dy_bug); ++out: ++ return key; ++} ++ ++/* ---------------------------------------------------------------------- */ ++/* ++ * Aufs prohibits O_DIRECT by defaut even if the branch supports it. ++ * This behaviour is necessary to return an error from open(O_DIRECT) instead ++ * of the succeeding I/O. The dio mount option enables O_DIRECT and makes ++ * open(O_DIRECT) always succeed, but the succeeding I/O may return an error. ++ * See the aufs manual in detail. ++ * ++ * To keep this behaviour, aufs has to set NULL to ->get_xip_mem too, and the ++ * performance of fadvise() and madvise() may be affected. ++ */ ++static void dy_adx(struct au_dyaop *dyaop, int do_dx) ++{ ++ if (!do_dx) { ++ dyaop->da_op.direct_IO = NULL; ++ dyaop->da_op.get_xip_mem = NULL; ++ } else { ++ dyaop->da_op.direct_IO = aufs_aop.direct_IO; ++ dyaop->da_op.get_xip_mem = aufs_aop.get_xip_mem; ++ if (!dyaop->da_get_xip_mem) ++ dyaop->da_op.get_xip_mem = NULL; ++ } ++} ++ ++static struct au_dyaop *dy_aget(struct au_branch *br, ++ const struct address_space_operations *h_aop, ++ int do_dx) ++{ ++ struct au_dyaop *dyaop; ++ struct au_dynop op; ++ ++ op.dy_type = AuDy_AOP; ++ op.dy_haop = h_aop; ++ dyaop = (void *)dy_get(&op, br); ++ if (IS_ERR(dyaop)) ++ goto out; ++ dy_adx(dyaop, do_dx); ++ ++out: ++ return dyaop; ++} ++ ++int au_dy_iaop(struct inode *inode, aufs_bindex_t bindex, ++ struct inode *h_inode) ++{ ++ int err, do_dx; ++ struct super_block *sb; ++ struct au_branch *br; ++ struct au_dyaop *dyaop; ++ ++ AuDebugOn(!S_ISREG(h_inode->i_mode)); ++ IiMustWriteLock(inode); ++ ++ sb = inode->i_sb; ++ br = au_sbr(sb, bindex); ++ do_dx = !!au_opt_test(au_mntflags(sb), DIO); ++ dyaop = dy_aget(br, h_inode->i_mapping->a_ops, do_dx); ++ err = PTR_ERR(dyaop); ++ if (IS_ERR(dyaop)) ++ /* unnecessary to call dy_fput() */ ++ goto out; ++ ++ err = 0; ++ inode->i_mapping->a_ops = &dyaop->da_op; ++ ++out: ++ return err; ++} ++ ++/* ++ * Is it safe to replace a_ops during the inode/file is in operation? ++ * Yes, I hope so. ++ */ ++int au_dy_irefresh(struct inode *inode) ++{ ++ int err; ++ aufs_bindex_t bstart; ++ struct inode *h_inode; ++ ++ err = 0; ++ if (S_ISREG(inode->i_mode)) { ++ bstart = au_ibstart(inode); ++ h_inode = au_h_iptr(inode, bstart); ++ err = au_dy_iaop(inode, bstart, h_inode); ++ } ++ return err; ++} ++ ++void au_dy_arefresh(int do_dx) ++{ ++ struct au_splhead *spl; ++ struct list_head *head; ++ struct au_dykey *key; ++ ++ spl = dynop + AuDy_AOP; ++ head = &spl->head; ++ spin_lock(&spl->spin); ++ list_for_each_entry(key, head, dk_list) ++ dy_adx((void *)key, do_dx); ++ spin_unlock(&spl->spin); ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++void __init au_dy_init(void) ++{ ++ int i; ++ ++ /* make sure that 'struct au_dykey *' can be any type */ ++ BUILD_BUG_ON(offsetof(struct au_dyaop, da_key)); ++ ++ for (i = 0; i < AuDyLast; i++) ++ au_spl_init(dynop + i); ++} ++ ++void au_dy_fin(void) ++{ ++ int i; ++ ++ for (i = 0; i < AuDyLast; i++) ++ WARN_ON(!list_empty(&dynop[i].head)); ++} +diff --git a/fs/aufs/dynop.h b/fs/aufs/dynop.h +new file mode 100644 +index 0000000..cdf1499 +--- /dev/null ++++ b/fs/aufs/dynop.h +@@ -0,0 +1,76 @@ ++/* ++ * Copyright (C) 2010-2016 Junjiro R. Okajima ++ * ++ * This program, aufs is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . ++ */ ++ ++/* ++ * dynamically customizable operations (for regular files only) ++ */ ++ ++#ifndef __AUFS_DYNOP_H__ ++#define __AUFS_DYNOP_H__ ++ ++#ifdef __KERNEL__ ++ ++#include ++#include ++ ++enum {AuDy_AOP, AuDyLast}; ++ ++struct au_dynop { ++ int dy_type; ++ union { ++ const void *dy_hop; ++ const struct address_space_operations *dy_haop; ++ }; ++}; ++ ++struct au_dykey { ++ union { ++ struct list_head dk_list; ++ struct rcu_head dk_rcu; ++ }; ++ struct au_dynop dk_op; ++ ++ /* ++ * during I am in the branch local array, kref is gotten. when the ++ * branch is removed, kref is put. ++ */ ++ struct kref dk_kref; ++}; ++ ++/* stop unioning since their sizes are very different from each other */ ++struct au_dyaop { ++ struct au_dykey da_key; ++ struct address_space_operations da_op; /* not const */ ++ int (*da_get_xip_mem)(struct address_space *, pgoff_t, int, ++ void **, unsigned long *); ++}; ++ ++/* ---------------------------------------------------------------------- */ ++ ++/* dynop.c */ ++struct au_branch; ++void au_dy_put(struct au_dykey *key); ++int au_dy_iaop(struct inode *inode, aufs_bindex_t bindex, ++ struct inode *h_inode); ++int au_dy_irefresh(struct inode *inode); ++void au_dy_arefresh(int do_dio); ++ ++void __init au_dy_init(void); ++void au_dy_fin(void); ++ ++#endif /* __KERNEL__ */ ++#endif /* __AUFS_DYNOP_H__ */ +diff --git a/fs/aufs/export.c b/fs/aufs/export.c +new file mode 100644 +index 0000000..c5bfa76 +--- /dev/null ++++ b/fs/aufs/export.c +@@ -0,0 +1,831 @@ ++/* ++ * Copyright (C) 2005-2016 Junjiro R. Okajima ++ * ++ * This program, aufs is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . ++ */ ++ ++/* ++ * export via nfs ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include "../fs/mount.h" ++#include "aufs.h" ++ ++union conv { ++#ifdef CONFIG_AUFS_INO_T_64 ++ __u32 a[2]; ++#else ++ __u32 a[1]; ++#endif ++ ino_t ino; ++}; ++ ++static ino_t decode_ino(__u32 *a) ++{ ++ union conv u; ++ ++ BUILD_BUG_ON(sizeof(u.ino) != sizeof(u.a)); ++ u.a[0] = a[0]; ++#ifdef CONFIG_AUFS_INO_T_64 ++ u.a[1] = a[1]; ++#endif ++ return u.ino; ++} ++ ++static void encode_ino(__u32 *a, ino_t ino) ++{ ++ union conv u; ++ ++ u.ino = ino; ++ a[0] = u.a[0]; ++#ifdef CONFIG_AUFS_INO_T_64 ++ a[1] = u.a[1]; ++#endif ++} ++ ++/* NFS file handle */ ++enum { ++ Fh_br_id, ++ Fh_sigen, ++#ifdef CONFIG_AUFS_INO_T_64 ++ /* support 64bit inode number */ ++ Fh_ino1, ++ Fh_ino2, ++ Fh_dir_ino1, ++ Fh_dir_ino2, ++#else ++ Fh_ino1, ++ Fh_dir_ino1, ++#endif ++ Fh_igen, ++ Fh_h_type, ++ Fh_tail, ++ ++ Fh_ino = Fh_ino1, ++ Fh_dir_ino = Fh_dir_ino1 ++}; ++ ++static int au_test_anon(struct dentry *dentry) ++{ ++ /* note: read d_flags without d_lock */ ++ return !!(dentry->d_flags & DCACHE_DISCONNECTED); ++} ++ ++int au_test_nfsd(void) ++{ ++ int ret; ++ struct task_struct *tsk = current; ++ char comm[sizeof(tsk->comm)]; ++ ++ ret = 0; ++ if (tsk->flags & PF_KTHREAD) { ++ get_task_comm(comm, tsk); ++ ret = !strcmp(comm, "nfsd"); ++ } ++ ++ return ret; ++} ++ ++/* ---------------------------------------------------------------------- */ ++/* inode generation external table */ ++ ++void au_xigen_inc(struct inode *inode) ++{ ++ loff_t pos; ++ ssize_t sz; ++ __u32 igen; ++ struct super_block *sb; ++ struct au_sbinfo *sbinfo; ++ ++ sb = inode->i_sb; ++ AuDebugOn(!au_opt_test(au_mntflags(sb), XINO)); ++ ++ sbinfo = au_sbi(sb); ++ pos = inode->i_ino; ++ pos *= sizeof(igen); ++ igen = inode->i_generation + 1; ++ sz = xino_fwrite(sbinfo->si_xwrite, sbinfo->si_xigen, &igen, ++ sizeof(igen), &pos); ++ if (sz == sizeof(igen)) ++ return; /* success */ ++ ++ if (unlikely(sz >= 0)) ++ AuIOErr("xigen error (%zd)\n", sz); ++} ++ ++int au_xigen_new(struct inode *inode) ++{ ++ int err; ++ loff_t pos; ++ ssize_t sz; ++ struct super_block *sb; ++ struct au_sbinfo *sbinfo; ++ struct file *file; ++ ++ err = 0; ++ /* todo: dirty, at mount time */ ++ if (inode->i_ino == AUFS_ROOT_INO) ++ goto out; ++ sb = inode->i_sb; ++ SiMustAnyLock(sb); ++ if (unlikely(!au_opt_test(au_mntflags(sb), XINO))) ++ goto out; ++ ++ err = -EFBIG; ++ pos = inode->i_ino; ++ if (unlikely(au_loff_max / sizeof(inode->i_generation) - 1 < pos)) { ++ AuIOErr1("too large i%lld\n", pos); ++ goto out; ++ } ++ pos *= sizeof(inode->i_generation); ++ ++ err = 0; ++ sbinfo = au_sbi(sb); ++ file = sbinfo->si_xigen; ++ BUG_ON(!file); ++ ++ if (vfsub_f_size_read(file) ++ < pos + sizeof(inode->i_generation)) { ++ inode->i_generation = atomic_inc_return(&sbinfo->si_xigen_next); ++ sz = xino_fwrite(sbinfo->si_xwrite, file, &inode->i_generation, ++ sizeof(inode->i_generation), &pos); ++ } else ++ sz = xino_fread(sbinfo->si_xread, file, &inode->i_generation, ++ sizeof(inode->i_generation), &pos); ++ if (sz == sizeof(inode->i_generation)) ++ goto out; /* success */ ++ ++ err = sz; ++ if (unlikely(sz >= 0)) { ++ err = -EIO; ++ AuIOErr("xigen error (%zd)\n", sz); ++ } ++ ++out: ++ return err; ++} ++ ++int au_xigen_set(struct super_block *sb, struct file *base) ++{ ++ int err; ++ struct au_sbinfo *sbinfo; ++ struct file *file; ++ ++ SiMustWriteLock(sb); ++ ++ sbinfo = au_sbi(sb); ++ file = au_xino_create2(base, sbinfo->si_xigen); ++ err = PTR_ERR(file); ++ if (IS_ERR(file)) ++ goto out; ++ err = 0; ++ if (sbinfo->si_xigen) ++ fput(sbinfo->si_xigen); ++ sbinfo->si_xigen = file; ++ ++out: ++ return err; ++} ++ ++void au_xigen_clr(struct super_block *sb) ++{ ++ struct au_sbinfo *sbinfo; ++ ++ SiMustWriteLock(sb); ++ ++ sbinfo = au_sbi(sb); ++ if (sbinfo->si_xigen) { ++ fput(sbinfo->si_xigen); ++ sbinfo->si_xigen = NULL; ++ } ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++static struct dentry *decode_by_ino(struct super_block *sb, ino_t ino, ++ ino_t dir_ino) ++{ ++ struct dentry *dentry, *d; ++ struct inode *inode; ++ unsigned int sigen; ++ ++ dentry = NULL; ++ inode = ilookup(sb, ino); ++ if (!inode) ++ goto out; ++ ++ dentry = ERR_PTR(-ESTALE); ++ sigen = au_sigen(sb); ++ if (unlikely(is_bad_inode(inode) ++ || IS_DEADDIR(inode) ++ || sigen != au_iigen(inode, NULL))) ++ goto out_iput; ++ ++ dentry = NULL; ++ if (!dir_ino || S_ISDIR(inode->i_mode)) ++ dentry = d_find_alias(inode); ++ else { ++ spin_lock(&inode->i_lock); ++ hlist_for_each_entry(d, &inode->i_dentry, d_u.d_alias) { ++ spin_lock(&d->d_lock); ++ if (!au_test_anon(d) ++ && d->d_parent->d_inode->i_ino == dir_ino) { ++ dentry = dget_dlock(d); ++ spin_unlock(&d->d_lock); ++ break; ++ } ++ spin_unlock(&d->d_lock); ++ } ++ spin_unlock(&inode->i_lock); ++ } ++ if (unlikely(dentry && au_digen_test(dentry, sigen))) { ++ /* need to refresh */ ++ dput(dentry); ++ dentry = NULL; ++ } ++ ++out_iput: ++ iput(inode); ++out: ++ AuTraceErrPtr(dentry); ++ return dentry; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++/* todo: dirty? */ ++/* if exportfs_decode_fh() passed vfsmount*, we could be happy */ ++ ++struct au_compare_mnt_args { ++ /* input */ ++ struct super_block *sb; ++ ++ /* output */ ++ struct vfsmount *mnt; ++}; ++ ++static int au_compare_mnt(struct vfsmount *mnt, void *arg) ++{ ++ struct au_compare_mnt_args *a = arg; ++ ++ if (mnt->mnt_sb != a->sb) ++ return 0; ++ a->mnt = mntget(mnt); ++ return 1; ++} ++ ++static struct vfsmount *au_mnt_get(struct super_block *sb) ++{ ++ int err; ++ struct path root; ++ struct au_compare_mnt_args args = { ++ .sb = sb ++ }; ++ ++ get_fs_root(current->fs, &root); ++ rcu_read_lock(); ++ err = iterate_mounts(au_compare_mnt, &args, root.mnt); ++ rcu_read_unlock(); ++ path_put(&root); ++ AuDebugOn(!err); ++ AuDebugOn(!args.mnt); ++ return args.mnt; ++} ++ ++struct au_nfsd_si_lock { ++ unsigned int sigen; ++ aufs_bindex_t bindex, br_id; ++ unsigned char force_lock; ++}; ++ ++static int si_nfsd_read_lock(struct super_block *sb, ++ struct au_nfsd_si_lock *nsi_lock) ++{ ++ int err; ++ aufs_bindex_t bindex; ++ ++ si_read_lock(sb, AuLock_FLUSH); ++ ++ /* branch id may be wrapped around */ ++ err = 0; ++ bindex = au_br_index(sb, nsi_lock->br_id); ++ if (bindex >= 0 && nsi_lock->sigen + AUFS_BRANCH_MAX > au_sigen(sb)) ++ goto out; /* success */ ++ ++ err = -ESTALE; ++ bindex = -1; ++ if (!nsi_lock->force_lock) ++ si_read_unlock(sb); ++ ++out: ++ nsi_lock->bindex = bindex; ++ return err; ++} ++ ++struct find_name_by_ino { ++ struct dir_context ctx; ++ int called, found; ++ ino_t ino; ++ char *name; ++ int namelen; ++}; ++ ++static int ++find_name_by_ino(struct dir_context *ctx, const char *name, int namelen, ++ loff_t offset, u64 ino, unsigned int d_type) ++{ ++ struct find_name_by_ino *a = container_of(ctx, struct find_name_by_ino, ++ ctx); ++ ++ a->called++; ++ if (a->ino != ino) ++ return 0; ++ ++ memcpy(a->name, name, namelen); ++ a->namelen = namelen; ++ a->found = 1; ++ return 1; ++} ++ ++static struct dentry *au_lkup_by_ino(struct path *path, ino_t ino, ++ struct au_nfsd_si_lock *nsi_lock) ++{ ++ struct dentry *dentry, *parent; ++ struct file *file; ++ struct inode *dir; ++ struct find_name_by_ino arg = { ++ .ctx = { ++ .actor = au_diractor(find_name_by_ino) ++ } ++ }; ++ int err; ++ ++ parent = path->dentry; ++ if (nsi_lock) ++ si_read_unlock(parent->d_sb); ++ file = vfsub_dentry_open(path, au_dir_roflags); ++ dentry = (void *)file; ++ if (IS_ERR(file)) ++ goto out; ++ ++ dentry = ERR_PTR(-ENOMEM); ++ arg.name = (void *)__get_free_page(GFP_NOFS); ++ if (unlikely(!arg.name)) ++ goto out_file; ++ arg.ino = ino; ++ arg.found = 0; ++ do { ++ arg.called = 0; ++ /* smp_mb(); */ ++ err = vfsub_iterate_dir(file, &arg.ctx); ++ } while (!err && !arg.found && arg.called); ++ dentry = ERR_PTR(err); ++ if (unlikely(err)) ++ goto out_name; ++ /* instead of ENOENT */ ++ dentry = ERR_PTR(-ESTALE); ++ if (!arg.found) ++ goto out_name; ++ ++ /* do not call vfsub_lkup_one() */ ++ dir = parent->d_inode; ++ mutex_lock(&dir->i_mutex); ++ dentry = vfsub_lookup_one_len(arg.name, parent, arg.namelen); ++ mutex_unlock(&dir->i_mutex); ++ AuTraceErrPtr(dentry); ++ if (IS_ERR(dentry)) ++ goto out_name; ++ AuDebugOn(au_test_anon(dentry)); ++ if (unlikely(!dentry->d_inode)) { ++ dput(dentry); ++ dentry = ERR_PTR(-ENOENT); ++ } ++ ++out_name: ++ free_page((unsigned long)arg.name); ++out_file: ++ fput(file); ++out: ++ if (unlikely(nsi_lock ++ && si_nfsd_read_lock(parent->d_sb, nsi_lock) < 0)) ++ if (!IS_ERR(dentry)) { ++ dput(dentry); ++ dentry = ERR_PTR(-ESTALE); ++ } ++ AuTraceErrPtr(dentry); ++ return dentry; ++} ++ ++static struct dentry *decode_by_dir_ino(struct super_block *sb, ino_t ino, ++ ino_t dir_ino, ++ struct au_nfsd_si_lock *nsi_lock) ++{ ++ struct dentry *dentry; ++ struct path path; ++ ++ if (dir_ino != AUFS_ROOT_INO) { ++ path.dentry = decode_by_ino(sb, dir_ino, 0); ++ dentry = path.dentry; ++ if (!path.dentry || IS_ERR(path.dentry)) ++ goto out; ++ AuDebugOn(au_test_anon(path.dentry)); ++ } else ++ path.dentry = dget(sb->s_root); ++ ++ path.mnt = au_mnt_get(sb); ++ dentry = au_lkup_by_ino(&path, ino, nsi_lock); ++ path_put(&path); ++ ++out: ++ AuTraceErrPtr(dentry); ++ return dentry; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++static int h_acceptable(void *expv, struct dentry *dentry) ++{ ++ return 1; ++} ++ ++static char *au_build_path(struct dentry *h_parent, struct path *h_rootpath, ++ char *buf, int len, struct super_block *sb) ++{ ++ char *p; ++ int n; ++ struct path path; ++ ++ p = d_path(h_rootpath, buf, len); ++ if (IS_ERR(p)) ++ goto out; ++ n = strlen(p); ++ ++ path.mnt = h_rootpath->mnt; ++ path.dentry = h_parent; ++ p = d_path(&path, buf, len); ++ if (IS_ERR(p)) ++ goto out; ++ if (n != 1) ++ p += n; ++ ++ path.mnt = au_mnt_get(sb); ++ path.dentry = sb->s_root; ++ p = d_path(&path, buf, len - strlen(p)); ++ mntput(path.mnt); ++ if (IS_ERR(p)) ++ goto out; ++ if (n != 1) ++ p[strlen(p)] = '/'; ++ ++out: ++ AuTraceErrPtr(p); ++ return p; ++} ++ ++static ++struct dentry *decode_by_path(struct super_block *sb, ino_t ino, __u32 *fh, ++ int fh_len, struct au_nfsd_si_lock *nsi_lock) ++{ ++ struct dentry *dentry, *h_parent, *root; ++ struct super_block *h_sb; ++ char *pathname, *p; ++ struct vfsmount *h_mnt; ++ struct au_branch *br; ++ int err; ++ struct path path; ++ ++ br = au_sbr(sb, nsi_lock->bindex); ++ h_mnt = au_br_mnt(br); ++ h_sb = h_mnt->mnt_sb; ++ /* todo: call lower fh_to_dentry()? fh_to_parent()? */ ++ h_parent = exportfs_decode_fh(h_mnt, (void *)(fh + Fh_tail), ++ fh_len - Fh_tail, fh[Fh_h_type], ++ h_acceptable, /*context*/NULL); ++ dentry = h_parent; ++ if (unlikely(!h_parent || IS_ERR(h_parent))) { ++ AuWarn1("%s decode_fh failed, %ld\n", ++ au_sbtype(h_sb), PTR_ERR(h_parent)); ++ goto out; ++ } ++ dentry = NULL; ++ if (unlikely(au_test_anon(h_parent))) { ++ AuWarn1("%s decode_fh returned a disconnected dentry\n", ++ au_sbtype(h_sb)); ++ goto out_h_parent; ++ } ++ ++ dentry = ERR_PTR(-ENOMEM); ++ pathname = (void *)__get_free_page(GFP_NOFS); ++ if (unlikely(!pathname)) ++ goto out_h_parent; ++ ++ root = sb->s_root; ++ path.mnt = h_mnt; ++ di_read_lock_parent(root, !AuLock_IR); ++ path.dentry = au_h_dptr(root, nsi_lock->bindex); ++ di_read_unlock(root, !AuLock_IR); ++ p = au_build_path(h_parent, &path, pathname, PAGE_SIZE, sb); ++ dentry = (void *)p; ++ if (IS_ERR(p)) ++ goto out_pathname; ++ ++ si_read_unlock(sb); ++ err = vfsub_kern_path(p, LOOKUP_FOLLOW | LOOKUP_DIRECTORY, &path); ++ dentry = ERR_PTR(err); ++ if (unlikely(err)) ++ goto out_relock; ++ ++ dentry = ERR_PTR(-ENOENT); ++ AuDebugOn(au_test_anon(path.dentry)); ++ if (unlikely(!path.dentry->d_inode)) ++ goto out_path; ++ ++ if (ino != path.dentry->d_inode->i_ino) ++ dentry = au_lkup_by_ino(&path, ino, /*nsi_lock*/NULL); ++ else ++ dentry = dget(path.dentry); ++ ++out_path: ++ path_put(&path); ++out_relock: ++ if (unlikely(si_nfsd_read_lock(sb, nsi_lock) < 0)) ++ if (!IS_ERR(dentry)) { ++ dput(dentry); ++ dentry = ERR_PTR(-ESTALE); ++ } ++out_pathname: ++ free_page((unsigned long)pathname); ++out_h_parent: ++ dput(h_parent); ++out: ++ AuTraceErrPtr(dentry); ++ return dentry; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++static struct dentry * ++aufs_fh_to_dentry(struct super_block *sb, struct fid *fid, int fh_len, ++ int fh_type) ++{ ++ struct dentry *dentry; ++ __u32 *fh = fid->raw; ++ struct au_branch *br; ++ ino_t ino, dir_ino; ++ struct au_nfsd_si_lock nsi_lock = { ++ .force_lock = 0 ++ }; ++ ++ dentry = ERR_PTR(-ESTALE); ++ /* it should never happen, but the file handle is unreliable */ ++ if (unlikely(fh_len < Fh_tail)) ++ goto out; ++ nsi_lock.sigen = fh[Fh_sigen]; ++ nsi_lock.br_id = fh[Fh_br_id]; ++ ++ /* branch id may be wrapped around */ ++ br = NULL; ++ if (unlikely(si_nfsd_read_lock(sb, &nsi_lock))) ++ goto out; ++ nsi_lock.force_lock = 1; ++ ++ /* is this inode still cached? */ ++ ino = decode_ino(fh + Fh_ino); ++ /* it should never happen */ ++ if (unlikely(ino == AUFS_ROOT_INO)) ++ goto out_unlock; ++ ++ dir_ino = decode_ino(fh + Fh_dir_ino); ++ dentry = decode_by_ino(sb, ino, dir_ino); ++ if (IS_ERR(dentry)) ++ goto out_unlock; ++ if (dentry) ++ goto accept; ++ ++ /* is the parent dir cached? */ ++ br = au_sbr(sb, nsi_lock.bindex); ++ atomic_inc(&br->br_count); ++ dentry = decode_by_dir_ino(sb, ino, dir_ino, &nsi_lock); ++ if (IS_ERR(dentry)) ++ goto out_unlock; ++ if (dentry) ++ goto accept; ++ ++ /* lookup path */ ++ dentry = decode_by_path(sb, ino, fh, fh_len, &nsi_lock); ++ if (IS_ERR(dentry)) ++ goto out_unlock; ++ if (unlikely(!dentry)) ++ /* todo?: make it ESTALE */ ++ goto out_unlock; ++ ++accept: ++ if (!au_digen_test(dentry, au_sigen(sb)) ++ && dentry->d_inode->i_generation == fh[Fh_igen]) ++ goto out_unlock; /* success */ ++ ++ dput(dentry); ++ dentry = ERR_PTR(-ESTALE); ++out_unlock: ++ if (br) ++ atomic_dec(&br->br_count); ++ si_read_unlock(sb); ++out: ++ AuTraceErrPtr(dentry); ++ return dentry; ++} ++ ++#if 0 /* reserved for future use */ ++/* support subtreecheck option */ ++static struct dentry *aufs_fh_to_parent(struct super_block *sb, struct fid *fid, ++ int fh_len, int fh_type) ++{ ++ struct dentry *parent; ++ __u32 *fh = fid->raw; ++ ino_t dir_ino; ++ ++ dir_ino = decode_ino(fh + Fh_dir_ino); ++ parent = decode_by_ino(sb, dir_ino, 0); ++ if (IS_ERR(parent)) ++ goto out; ++ if (!parent) ++ parent = decode_by_path(sb, au_br_index(sb, fh[Fh_br_id]), ++ dir_ino, fh, fh_len); ++ ++out: ++ AuTraceErrPtr(parent); ++ return parent; ++} ++#endif ++ ++/* ---------------------------------------------------------------------- */ ++ ++static int aufs_encode_fh(struct inode *inode, __u32 *fh, int *max_len, ++ struct inode *dir) ++{ ++ int err; ++ aufs_bindex_t bindex; ++ struct super_block *sb, *h_sb; ++ struct dentry *dentry, *parent, *h_parent; ++ struct inode *h_dir; ++ struct au_branch *br; ++ ++ err = -ENOSPC; ++ if (unlikely(*max_len <= Fh_tail)) { ++ AuWarn1("NFSv2 client (max_len %d)?\n", *max_len); ++ goto out; ++ } ++ ++ err = FILEID_ROOT; ++ if (inode->i_ino == AUFS_ROOT_INO) { ++ AuDebugOn(inode->i_ino != AUFS_ROOT_INO); ++ goto out; ++ } ++ ++ h_parent = NULL; ++ sb = inode->i_sb; ++ err = si_read_lock(sb, AuLock_FLUSH); ++ if (unlikely(err)) ++ goto out; ++ ++#ifdef CONFIG_AUFS_DEBUG ++ if (unlikely(!au_opt_test(au_mntflags(sb), XINO))) ++ AuWarn1("NFS-exporting requires xino\n"); ++#endif ++ err = -EIO; ++ parent = NULL; ++ ii_read_lock_child(inode); ++ bindex = au_ibstart(inode); ++ if (!dir) { ++ dentry = d_find_any_alias(inode); ++ if (unlikely(!dentry)) ++ goto out_unlock; ++ AuDebugOn(au_test_anon(dentry)); ++ parent = dget_parent(dentry); ++ dput(dentry); ++ if (unlikely(!parent)) ++ goto out_unlock; ++ dir = parent->d_inode; ++ } ++ ++ ii_read_lock_parent(dir); ++ h_dir = au_h_iptr(dir, bindex); ++ ii_read_unlock(dir); ++ if (unlikely(!h_dir)) ++ goto out_parent; ++ h_parent = d_find_any_alias(h_dir); ++ if (unlikely(!h_parent)) ++ goto out_hparent; ++ ++ err = -EPERM; ++ br = au_sbr(sb, bindex); ++ h_sb = au_br_sb(br); ++ if (unlikely(!h_sb->s_export_op)) { ++ AuErr1("%s branch is not exportable\n", au_sbtype(h_sb)); ++ goto out_hparent; ++ } ++ ++ fh[Fh_br_id] = br->br_id; ++ fh[Fh_sigen] = au_sigen(sb); ++ encode_ino(fh + Fh_ino, inode->i_ino); ++ encode_ino(fh + Fh_dir_ino, dir->i_ino); ++ fh[Fh_igen] = inode->i_generation; ++ ++ *max_len -= Fh_tail; ++ fh[Fh_h_type] = exportfs_encode_fh(h_parent, (void *)(fh + Fh_tail), ++ max_len, ++ /*connectable or subtreecheck*/0); ++ err = fh[Fh_h_type]; ++ *max_len += Fh_tail; ++ /* todo: macros? */ ++ if (err != FILEID_INVALID) ++ err = 99; ++ else ++ AuWarn1("%s encode_fh failed\n", au_sbtype(h_sb)); ++ ++out_hparent: ++ dput(h_parent); ++out_parent: ++ dput(parent); ++out_unlock: ++ ii_read_unlock(inode); ++ si_read_unlock(sb); ++out: ++ if (unlikely(err < 0)) ++ err = FILEID_INVALID; ++ return err; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++static int aufs_commit_metadata(struct inode *inode) ++{ ++ int err; ++ aufs_bindex_t bindex; ++ struct super_block *sb; ++ struct inode *h_inode; ++ int (*f)(struct inode *inode); ++ ++ sb = inode->i_sb; ++ si_read_lock(sb, AuLock_FLUSH | AuLock_NOPLMW); ++ ii_write_lock_child(inode); ++ bindex = au_ibstart(inode); ++ AuDebugOn(bindex < 0); ++ h_inode = au_h_iptr(inode, bindex); ++ ++ f = h_inode->i_sb->s_export_op->commit_metadata; ++ if (f) ++ err = f(h_inode); ++ else { ++ struct writeback_control wbc = { ++ .sync_mode = WB_SYNC_ALL, ++ .nr_to_write = 0 /* metadata only */ ++ }; ++ ++ err = sync_inode(h_inode, &wbc); ++ } ++ ++ au_cpup_attr_timesizes(inode); ++ ii_write_unlock(inode); ++ si_read_unlock(sb); ++ return err; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++static struct export_operations aufs_export_op = { ++ .fh_to_dentry = aufs_fh_to_dentry, ++ /* .fh_to_parent = aufs_fh_to_parent, */ ++ .encode_fh = aufs_encode_fh, ++ .commit_metadata = aufs_commit_metadata ++}; ++ ++void au_export_init(struct super_block *sb) ++{ ++ struct au_sbinfo *sbinfo; ++ __u32 u; ++ ++ sb->s_export_op = &aufs_export_op; ++ sbinfo = au_sbi(sb); ++ sbinfo->si_xigen = NULL; ++ get_random_bytes(&u, sizeof(u)); ++ BUILD_BUG_ON(sizeof(u) != sizeof(int)); ++ atomic_set(&sbinfo->si_xigen_next, u); ++} +diff --git a/fs/aufs/f_op.c b/fs/aufs/f_op.c +new file mode 100644 +index 0000000..b08981a +--- /dev/null ++++ b/fs/aufs/f_op.c +@@ -0,0 +1,781 @@ ++/* ++ * Copyright (C) 2005-2016 Junjiro R. Okajima ++ * ++ * This program, aufs is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . ++ */ ++ ++/* ++ * file and vm operations ++ */ ++ ++#include ++#include ++#include ++#include ++#include "aufs.h" ++ ++int au_do_open_nondir(struct file *file, int flags, struct file *h_file) ++{ ++ int err; ++ aufs_bindex_t bindex; ++ struct dentry *dentry, *h_dentry; ++ struct au_finfo *finfo; ++ struct inode *h_inode; ++ ++ FiMustWriteLock(file); ++ ++ err = 0; ++ dentry = file->f_dentry; ++ AuDebugOn(IS_ERR_OR_NULL(dentry)); ++ finfo = au_fi(file); ++ memset(&finfo->fi_htop, 0, sizeof(finfo->fi_htop)); ++ atomic_set(&finfo->fi_mmapped, 0); ++ bindex = au_dbstart(dentry); ++ if (!h_file) { ++ h_dentry = au_h_dptr(dentry, bindex); ++ err = vfsub_test_mntns(file->f_path.mnt, h_dentry->d_sb); ++ if (unlikely(err)) ++ goto out; ++ h_file = au_h_open(dentry, bindex, flags, file, /*force_wr*/0); ++ } else { ++ h_dentry = h_file->f_dentry; ++ err = vfsub_test_mntns(file->f_path.mnt, h_dentry->d_sb); ++ if (unlikely(err)) ++ goto out; ++ get_file(h_file); ++ } ++ if (IS_ERR(h_file)) ++ err = PTR_ERR(h_file); ++ else { ++ if ((flags & __O_TMPFILE) ++ && !(flags & O_EXCL)) { ++ h_inode = file_inode(h_file); ++ spin_lock(&h_inode->i_lock); ++ h_inode->i_state |= I_LINKABLE; ++ spin_unlock(&h_inode->i_lock); ++ } ++ au_set_fbstart(file, bindex); ++ au_set_h_fptr(file, bindex, h_file); ++ au_update_figen(file); ++ /* todo: necessary? */ ++ /* file->f_ra = h_file->f_ra; */ ++ } ++ ++out: ++ return err; ++} ++ ++static int aufs_open_nondir(struct inode *inode __maybe_unused, ++ struct file *file) ++{ ++ int err; ++ struct super_block *sb; ++ struct au_do_open_args args = { ++ .open = au_do_open_nondir ++ }; ++ ++ AuDbg("%pD, f_flags 0x%x, f_mode 0x%x\n", ++ file, vfsub_file_flags(file), file->f_mode); ++ ++ sb = file->f_dentry->d_sb; ++ si_read_lock(sb, AuLock_FLUSH); ++ err = au_do_open(file, &args); ++ si_read_unlock(sb); ++ return err; ++} ++ ++int aufs_release_nondir(struct inode *inode __maybe_unused, struct file *file) ++{ ++ struct au_finfo *finfo; ++ aufs_bindex_t bindex; ++ ++ finfo = au_fi(file); ++ au_sphl_del(&finfo->fi_hlist, &au_sbi(file->f_dentry->d_sb)->si_files); ++ bindex = finfo->fi_btop; ++ if (bindex >= 0) ++ au_set_h_fptr(file, bindex, NULL); ++ ++ au_finfo_fin(file); ++ return 0; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++static int au_do_flush_nondir(struct file *file, fl_owner_t id) ++{ ++ int err; ++ struct file *h_file; ++ ++ err = 0; ++ h_file = au_hf_top(file); ++ if (h_file) ++ err = vfsub_flush(h_file, id); ++ return err; ++} ++ ++static int aufs_flush_nondir(struct file *file, fl_owner_t id) ++{ ++ return au_do_flush(file, id, au_do_flush_nondir); ++} ++ ++/* ---------------------------------------------------------------------- */ ++/* ++ * read and write functions acquire [fdi]_rwsem once, but release before ++ * mmap_sem. This is because to stop a race condition between mmap(2). ++ * Releasing these aufs-rwsem should be safe, no branch-mamagement (by keeping ++ * si_rwsem), no harmful copy-up should happen. Actually copy-up may happen in ++ * read functions after [fdi]_rwsem are released, but it should be harmless. ++ */ ++ ++/* Callers should call au_read_post() or fput() in the end */ ++struct file *au_read_pre(struct file *file, int keep_fi) ++{ ++ struct file *h_file; ++ int err; ++ ++ err = au_reval_and_lock_fdi(file, au_reopen_nondir, /*wlock*/0); ++ if (!err) { ++ di_read_unlock(file->f_dentry, AuLock_IR); ++ h_file = au_hf_top(file); ++ get_file(h_file); ++ if (!keep_fi) ++ fi_read_unlock(file); ++ } else ++ h_file = ERR_PTR(err); ++ ++ return h_file; ++} ++ ++static void au_read_post(struct inode *inode, struct file *h_file) ++{ ++ /* update without lock, I don't think it a problem */ ++ fsstack_copy_attr_atime(inode, file_inode(h_file)); ++ fput(h_file); ++} ++ ++struct au_write_pre { ++ blkcnt_t blks; ++ aufs_bindex_t bstart; ++}; ++ ++/* ++ * return with iinfo is write-locked ++ * callers should call au_write_post() or iinfo_write_unlock() + fput() in the ++ * end ++ */ ++static struct file *au_write_pre(struct file *file, int do_ready, ++ struct au_write_pre *wpre) ++{ ++ struct file *h_file; ++ struct dentry *dentry; ++ int err; ++ struct au_pin pin; ++ ++ err = au_reval_and_lock_fdi(file, au_reopen_nondir, /*wlock*/1); ++ h_file = ERR_PTR(err); ++ if (unlikely(err)) ++ goto out; ++ ++ dentry = file->f_dentry; ++ if (do_ready) { ++ err = au_ready_to_write(file, -1, &pin); ++ if (unlikely(err)) { ++ h_file = ERR_PTR(err); ++ di_write_unlock(dentry); ++ goto out_fi; ++ } ++ } ++ ++ di_downgrade_lock(dentry, /*flags*/0); ++ if (wpre) ++ wpre->bstart = au_fbstart(file); ++ h_file = au_hf_top(file); ++ get_file(h_file); ++ if (wpre) ++ wpre->blks = file_inode(h_file)->i_blocks; ++ if (do_ready) ++ au_unpin(&pin); ++ di_read_unlock(dentry, /*flags*/0); ++ ++out_fi: ++ fi_write_unlock(file); ++out: ++ return h_file; ++} ++ ++static void au_write_post(struct inode *inode, struct file *h_file, ++ struct au_write_pre *wpre, ssize_t written) ++{ ++ struct inode *h_inode; ++ ++ au_cpup_attr_timesizes(inode); ++ AuDebugOn(au_ibstart(inode) != wpre->bstart); ++ h_inode = file_inode(h_file); ++ inode->i_mode = h_inode->i_mode; ++ ii_write_unlock(inode); ++ fput(h_file); ++ ++ /* AuDbg("blks %llu, %llu\n", (u64)blks, (u64)h_inode->i_blocks); */ ++ if (written > 0) ++ au_fhsm_wrote(inode->i_sb, wpre->bstart, ++ /*force*/h_inode->i_blocks > wpre->blks); ++} ++ ++static ssize_t aufs_read(struct file *file, char __user *buf, size_t count, ++ loff_t *ppos) ++{ ++ ssize_t err; ++ struct inode *inode; ++ struct file *h_file; ++ struct super_block *sb; ++ ++ inode = file_inode(file); ++ sb = inode->i_sb; ++ si_read_lock(sb, AuLock_FLUSH | AuLock_NOPLMW); ++ ++ h_file = au_read_pre(file, /*keep_fi*/0); ++ err = PTR_ERR(h_file); ++ if (IS_ERR(h_file)) ++ goto out; ++ ++ /* filedata may be obsoleted by concurrent copyup, but no problem */ ++ err = vfsub_read_u(h_file, buf, count, ppos); ++ /* todo: necessary? */ ++ /* file->f_ra = h_file->f_ra; */ ++ au_read_post(inode, h_file); ++ ++out: ++ si_read_unlock(sb); ++ return err; ++} ++ ++/* ++ * todo: very ugly ++ * it locks both of i_mutex and si_rwsem for read in safe. ++ * if the plink maintenance mode continues forever (that is the problem), ++ * may loop forever. ++ */ ++static void au_mtx_and_read_lock(struct inode *inode) ++{ ++ int err; ++ struct super_block *sb = inode->i_sb; ++ ++ while (1) { ++ mutex_lock(&inode->i_mutex); ++ err = si_read_lock(sb, AuLock_FLUSH | AuLock_NOPLM); ++ if (!err) ++ break; ++ mutex_unlock(&inode->i_mutex); ++ si_read_lock(sb, AuLock_NOPLMW); ++ si_read_unlock(sb); ++ } ++} ++ ++static ssize_t aufs_write(struct file *file, const char __user *ubuf, ++ size_t count, loff_t *ppos) ++{ ++ ssize_t err; ++ struct au_write_pre wpre; ++ struct inode *inode; ++ struct file *h_file; ++ char __user *buf = (char __user *)ubuf; ++ ++ inode = file_inode(file); ++ au_mtx_and_read_lock(inode); ++ ++ h_file = au_write_pre(file, /*do_ready*/1, &wpre); ++ err = PTR_ERR(h_file); ++ if (IS_ERR(h_file)) ++ goto out; ++ ++ err = vfsub_write_u(h_file, buf, count, ppos); ++ au_write_post(inode, h_file, &wpre, err); ++ ++out: ++ si_read_unlock(inode->i_sb); ++ mutex_unlock(&inode->i_mutex); ++ return err; ++} ++ ++static ssize_t au_do_iter(struct file *h_file, int rw, struct kiocb *kio, ++ struct iov_iter *iov_iter) ++{ ++ ssize_t err; ++ struct file *file; ++ ssize_t (*iter)(struct kiocb *, struct iov_iter *); ++ ssize_t (*aio)(struct kiocb *, const struct iovec *, unsigned long, ++ loff_t); ++ ++ err = security_file_permission(h_file, rw); ++ if (unlikely(err)) ++ goto out; ++ ++ err = -ENOSYS; ++ iter = NULL; ++ aio = NULL; ++ if (rw == MAY_READ) { ++ iter = h_file->f_op->read_iter; ++ aio = h_file->f_op->aio_read; ++ } else if (rw == MAY_WRITE) { ++ iter = h_file->f_op->write_iter; ++ aio = h_file->f_op->aio_write; ++ } ++ ++ file = kio->ki_filp; ++ kio->ki_filp = h_file; ++ if (iter) { ++ lockdep_off(); ++ err = iter(kio, iov_iter); ++ lockdep_on(); ++ } else if (aio) { ++ lockdep_off(); ++ err = aio(kio, iov_iter->iov, iov_iter->nr_segs, kio->ki_pos); ++ lockdep_on(); ++ } else ++ /* currently there is no such fs */ ++ WARN_ON_ONCE(1); ++ kio->ki_filp = file; ++ ++out: ++ return err; ++} ++ ++static ssize_t aufs_read_iter(struct kiocb *kio, struct iov_iter *iov_iter) ++{ ++ ssize_t err; ++ struct file *file, *h_file; ++ struct inode *inode; ++ struct super_block *sb; ++ ++ file = kio->ki_filp; ++ inode = file_inode(file); ++ sb = inode->i_sb; ++ si_read_lock(sb, AuLock_FLUSH | AuLock_NOPLMW); ++ ++ h_file = au_read_pre(file, /*keep_fi*/0); ++ err = PTR_ERR(h_file); ++ if (IS_ERR(h_file)) ++ goto out; ++ ++ err = au_do_iter(h_file, MAY_READ, kio, iov_iter); ++ /* todo: necessary? */ ++ /* file->f_ra = h_file->f_ra; */ ++ au_read_post(inode, h_file); ++ ++out: ++ si_read_unlock(sb); ++ return err; ++} ++ ++static ssize_t aufs_write_iter(struct kiocb *kio, struct iov_iter *iov_iter) ++{ ++ ssize_t err; ++ struct au_write_pre wpre; ++ struct inode *inode; ++ struct file *file, *h_file; ++ ++ file = kio->ki_filp; ++ inode = file_inode(file); ++ au_mtx_and_read_lock(inode); ++ ++ h_file = au_write_pre(file, /*do_ready*/1, &wpre); ++ err = PTR_ERR(h_file); ++ if (IS_ERR(h_file)) ++ goto out; ++ ++ err = au_do_iter(h_file, MAY_WRITE, kio, iov_iter); ++ au_write_post(inode, h_file, &wpre, err); ++ ++out: ++ si_read_unlock(inode->i_sb); ++ mutex_unlock(&inode->i_mutex); ++ return err; ++} ++ ++static ssize_t aufs_splice_read(struct file *file, loff_t *ppos, ++ struct pipe_inode_info *pipe, size_t len, ++ unsigned int flags) ++{ ++ ssize_t err; ++ struct file *h_file; ++ struct inode *inode; ++ struct super_block *sb; ++ ++ inode = file_inode(file); ++ sb = inode->i_sb; ++ si_read_lock(sb, AuLock_FLUSH | AuLock_NOPLMW); ++ ++ h_file = au_read_pre(file, /*keep_fi*/1); ++ err = PTR_ERR(h_file); ++ if (IS_ERR(h_file)) ++ goto out; ++ ++ if (au_test_loopback_kthread()) { ++ au_warn_loopback(h_file->f_dentry->d_sb); ++ if (file->f_mapping != h_file->f_mapping) { ++ file->f_mapping = h_file->f_mapping; ++ smp_mb(); /* unnecessary? */ ++ } ++ } ++ fi_read_unlock(file); ++ ++ err = vfsub_splice_to(h_file, ppos, pipe, len, flags); ++ /* todo: necessasry? */ ++ /* file->f_ra = h_file->f_ra; */ ++ au_read_post(inode, h_file); ++ ++out: ++ si_read_unlock(sb); ++ return err; ++} ++ ++static ssize_t ++aufs_splice_write(struct pipe_inode_info *pipe, struct file *file, loff_t *ppos, ++ size_t len, unsigned int flags) ++{ ++ ssize_t err; ++ struct au_write_pre wpre; ++ struct inode *inode; ++ struct file *h_file; ++ ++ inode = file_inode(file); ++ au_mtx_and_read_lock(inode); ++ ++ h_file = au_write_pre(file, /*do_ready*/1, &wpre); ++ err = PTR_ERR(h_file); ++ if (IS_ERR(h_file)) ++ goto out; ++ ++ err = vfsub_splice_from(pipe, h_file, ppos, len, flags); ++ au_write_post(inode, h_file, &wpre, err); ++ ++out: ++ si_read_unlock(inode->i_sb); ++ mutex_unlock(&inode->i_mutex); ++ return err; ++} ++ ++static long aufs_fallocate(struct file *file, int mode, loff_t offset, ++ loff_t len) ++{ ++ long err; ++ struct au_write_pre wpre; ++ struct inode *inode; ++ struct file *h_file; ++ ++ inode = file_inode(file); ++ au_mtx_and_read_lock(inode); ++ ++ h_file = au_write_pre(file, /*do_ready*/1, &wpre); ++ err = PTR_ERR(h_file); ++ if (IS_ERR(h_file)) ++ goto out; ++ ++ lockdep_off(); ++ err = do_fallocate(h_file, mode, offset, len); ++ lockdep_on(); ++ au_write_post(inode, h_file, &wpre, /*written*/1); ++ ++out: ++ si_read_unlock(inode->i_sb); ++ mutex_unlock(&inode->i_mutex); ++ return err; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++/* ++ * The locking order around current->mmap_sem. ++ * - in most and regular cases ++ * file I/O syscall -- aufs_read() or something ++ * -- si_rwsem for read -- mmap_sem ++ * (Note that [fdi]i_rwsem are released before mmap_sem). ++ * - in mmap case ++ * mmap(2) -- mmap_sem -- aufs_mmap() -- si_rwsem for read -- [fdi]i_rwsem ++ * This AB-BA order is definitly bad, but is not a problem since "si_rwsem for ++ * read" allows muliple processes to acquire it and [fdi]i_rwsem are not held in ++ * file I/O. Aufs needs to stop lockdep in aufs_mmap() though. ++ * It means that when aufs acquires si_rwsem for write, the process should never ++ * acquire mmap_sem. ++ * ++ * Actually aufs_iterate() holds [fdi]i_rwsem before mmap_sem, but this is not a ++ * problem either since any directory is not able to be mmap-ed. ++ * The similar scenario is applied to aufs_readlink() too. ++ */ ++ ++#if 0 /* stop calling security_file_mmap() */ ++/* cf. linux/include/linux/mman.h: calc_vm_prot_bits() */ ++#define AuConv_VM_PROT(f, b) _calc_vm_trans(f, VM_##b, PROT_##b) ++ ++static unsigned long au_arch_prot_conv(unsigned long flags) ++{ ++ /* currently ppc64 only */ ++#ifdef CONFIG_PPC64 ++ /* cf. linux/arch/powerpc/include/asm/mman.h */ ++ AuDebugOn(arch_calc_vm_prot_bits(-1) != VM_SAO); ++ return AuConv_VM_PROT(flags, SAO); ++#else ++ AuDebugOn(arch_calc_vm_prot_bits(-1)); ++ return 0; ++#endif ++} ++ ++static unsigned long au_prot_conv(unsigned long flags) ++{ ++ return AuConv_VM_PROT(flags, READ) ++ | AuConv_VM_PROT(flags, WRITE) ++ | AuConv_VM_PROT(flags, EXEC) ++ | au_arch_prot_conv(flags); ++} ++ ++/* cf. linux/include/linux/mman.h: calc_vm_flag_bits() */ ++#define AuConv_VM_MAP(f, b) _calc_vm_trans(f, VM_##b, MAP_##b) ++ ++static unsigned long au_flag_conv(unsigned long flags) ++{ ++ return AuConv_VM_MAP(flags, GROWSDOWN) ++ | AuConv_VM_MAP(flags, DENYWRITE) ++ | AuConv_VM_MAP(flags, LOCKED); ++} ++#endif ++ ++static int aufs_mmap(struct file *file, struct vm_area_struct *vma) ++{ ++ int err; ++ const unsigned char wlock ++ = (file->f_mode & FMODE_WRITE) && (vma->vm_flags & VM_SHARED); ++ struct super_block *sb; ++ struct file *h_file; ++ struct inode *inode; ++ ++ AuDbgVmRegion(file, vma); ++ ++ inode = file_inode(file); ++ sb = inode->i_sb; ++ lockdep_off(); ++ si_read_lock(sb, AuLock_NOPLMW); ++ ++ h_file = au_write_pre(file, wlock, /*wpre*/NULL); ++ lockdep_on(); ++ err = PTR_ERR(h_file); ++ if (IS_ERR(h_file)) ++ goto out; ++ ++ err = 0; ++ au_set_mmapped(file); ++ au_vm_file_reset(vma, h_file); ++ /* ++ * we cannot call security_mmap_file() here since it may acquire ++ * mmap_sem or i_mutex. ++ * ++ * err = security_mmap_file(h_file, au_prot_conv(vma->vm_flags), ++ * au_flag_conv(vma->vm_flags)); ++ */ ++ if (!err) ++ err = h_file->f_op->mmap(h_file, vma); ++ if (!err) { ++ au_vm_prfile_set(vma, file); ++ fsstack_copy_attr_atime(inode, file_inode(h_file)); ++ goto out_fput; /* success */ ++ } ++ au_unset_mmapped(file); ++ au_vm_file_reset(vma, file); ++ ++out_fput: ++ lockdep_off(); ++ ii_write_unlock(inode); ++ lockdep_on(); ++ fput(h_file); ++out: ++ lockdep_off(); ++ si_read_unlock(sb); ++ lockdep_on(); ++ AuTraceErr(err); ++ return err; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++static int aufs_fsync_nondir(struct file *file, loff_t start, loff_t end, ++ int datasync) ++{ ++ int err; ++ struct au_write_pre wpre; ++ struct inode *inode; ++ struct file *h_file; ++ ++ err = 0; /* -EBADF; */ /* posix? */ ++ if (unlikely(!(file->f_mode & FMODE_WRITE))) ++ goto out; ++ ++ inode = file_inode(file); ++ au_mtx_and_read_lock(inode); ++ ++ h_file = au_write_pre(file, /*do_ready*/1, &wpre); ++ err = PTR_ERR(h_file); ++ if (IS_ERR(h_file)) ++ goto out_unlock; ++ ++ err = vfsub_fsync(h_file, &h_file->f_path, datasync); ++ au_write_post(inode, h_file, &wpre, /*written*/0); ++ ++out_unlock: ++ si_read_unlock(inode->i_sb); ++ mutex_unlock(&inode->i_mutex); ++out: ++ return err; ++} ++ ++/* no one supports this operation, currently */ ++#if 0 ++static int aufs_aio_fsync_nondir(struct kiocb *kio, int datasync) ++{ ++ int err; ++ struct au_write_pre wpre; ++ struct inode *inode; ++ struct file *file, *h_file; ++ ++ err = 0; /* -EBADF; */ /* posix? */ ++ if (unlikely(!(file->f_mode & FMODE_WRITE))) ++ goto out; ++ ++ file = kio->ki_filp; ++ inode = file_inode(file); ++ au_mtx_and_read_lock(inode); ++ ++ h_file = au_write_pre(file, /*do_ready*/1, &wpre); ++ err = PTR_ERR(h_file); ++ if (IS_ERR(h_file)) ++ goto out_unlock; ++ ++ err = -ENOSYS; ++ h_file = au_hf_top(file); ++ if (h_file->f_op->aio_fsync) { ++ struct mutex *h_mtx; ++ ++ h_mtx = &file_inode(h_file)->i_mutex; ++ if (!is_sync_kiocb(kio)) { ++ get_file(h_file); ++ fput(file); ++ } ++ kio->ki_filp = h_file; ++ err = h_file->f_op->aio_fsync(kio, datasync); ++ mutex_lock_nested(h_mtx, AuLsc_I_CHILD); ++ if (!err) ++ vfsub_update_h_iattr(&h_file->f_path, /*did*/NULL); ++ /*ignore*/ ++ mutex_unlock(h_mtx); ++ } ++ au_write_post(inode, h_file, &wpre, /*written*/0); ++ ++out_unlock: ++ si_read_unlock(inode->sb); ++ mutex_unlock(&inode->i_mutex); ++out: ++ return err; ++} ++#endif ++ ++static int aufs_fasync(int fd, struct file *file, int flag) ++{ ++ int err; ++ struct file *h_file; ++ struct super_block *sb; ++ ++ sb = file->f_dentry->d_sb; ++ si_read_lock(sb, AuLock_FLUSH | AuLock_NOPLMW); ++ ++ h_file = au_read_pre(file, /*keep_fi*/0); ++ err = PTR_ERR(h_file); ++ if (IS_ERR(h_file)) ++ goto out; ++ ++ if (h_file->f_op->fasync) ++ err = h_file->f_op->fasync(fd, h_file, flag); ++ fput(h_file); /* instead of au_read_post() */ ++ ++out: ++ si_read_unlock(sb); ++ return err; ++} ++ ++static int aufs_setfl(struct file *file, unsigned long arg) ++{ ++ int err; ++ struct file *h_file; ++ struct super_block *sb; ++ ++ sb = file->f_dentry->d_sb; ++ si_read_lock(sb, AuLock_FLUSH | AuLock_NOPLMW); ++ ++ h_file = au_read_pre(file, /*keep_fi*/0); ++ err = PTR_ERR(h_file); ++ if (IS_ERR(h_file)) ++ goto out; ++ ++ arg |= vfsub_file_flags(file) & FASYNC; /* stop calling h_file->fasync */ ++ err = setfl(/*unused fd*/-1, h_file, arg); ++ fput(h_file); /* instead of au_read_post() */ ++ ++out: ++ si_read_unlock(sb); ++ return err; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++/* no one supports this operation, currently */ ++#if 0 ++static ssize_t aufs_sendpage(struct file *file, struct page *page, int offset, ++ size_t len, loff_t *pos, int more) ++{ ++} ++#endif ++ ++/* ---------------------------------------------------------------------- */ ++ ++const struct file_operations aufs_file_fop = { ++ .owner = THIS_MODULE, ++ ++ .llseek = default_llseek, ++ ++ .read = aufs_read, ++ .write = aufs_write, ++ .read_iter = aufs_read_iter, ++ .write_iter = aufs_write_iter, ++ ++#ifdef CONFIG_AUFS_POLL ++ .poll = aufs_poll, ++#endif ++ .unlocked_ioctl = aufs_ioctl_nondir, ++#ifdef CONFIG_COMPAT ++ .compat_ioctl = aufs_compat_ioctl_nondir, ++#endif ++ .mmap = aufs_mmap, ++ .open = aufs_open_nondir, ++ .flush = aufs_flush_nondir, ++ .release = aufs_release_nondir, ++ .fsync = aufs_fsync_nondir, ++ /* .aio_fsync = aufs_aio_fsync_nondir, */ ++ .fasync = aufs_fasync, ++ /* .sendpage = aufs_sendpage, */ ++ .setfl = aufs_setfl, ++ .splice_write = aufs_splice_write, ++ .splice_read = aufs_splice_read, ++#if 0 ++ .aio_splice_write = aufs_aio_splice_write, ++ .aio_splice_read = aufs_aio_splice_read, ++#endif ++ .fallocate = aufs_fallocate ++}; +diff --git a/fs/aufs/fhsm.c b/fs/aufs/fhsm.c +new file mode 100644 +index 0000000..5b3ad74 +--- /dev/null ++++ b/fs/aufs/fhsm.c +@@ -0,0 +1,426 @@ ++/* ++ * Copyright (C) 2011-2016 Junjiro R. Okajima ++ * ++ * This program, aufs is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ++ */ ++ ++/* ++ * File-based Hierarchy Storage Management ++ */ ++ ++#include ++#include ++#include ++#include ++#include "aufs.h" ++ ++static aufs_bindex_t au_fhsm_bottom(struct super_block *sb) ++{ ++ struct au_sbinfo *sbinfo; ++ struct au_fhsm *fhsm; ++ ++ SiMustAnyLock(sb); ++ ++ sbinfo = au_sbi(sb); ++ fhsm = &sbinfo->si_fhsm; ++ AuDebugOn(!fhsm); ++ return fhsm->fhsm_bottom; ++} ++ ++void au_fhsm_set_bottom(struct super_block *sb, aufs_bindex_t bindex) ++{ ++ struct au_sbinfo *sbinfo; ++ struct au_fhsm *fhsm; ++ ++ SiMustWriteLock(sb); ++ ++ sbinfo = au_sbi(sb); ++ fhsm = &sbinfo->si_fhsm; ++ AuDebugOn(!fhsm); ++ fhsm->fhsm_bottom = bindex; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++static int au_fhsm_test_jiffy(struct au_sbinfo *sbinfo, struct au_branch *br) ++{ ++ struct au_br_fhsm *bf; ++ ++ bf = br->br_fhsm; ++ MtxMustLock(&bf->bf_lock); ++ ++ return !bf->bf_readable ++ || time_after(jiffies, ++ bf->bf_jiffy + sbinfo->si_fhsm.fhsm_expire); ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++static void au_fhsm_notify(struct super_block *sb, int val) ++{ ++ struct au_sbinfo *sbinfo; ++ struct au_fhsm *fhsm; ++ ++ SiMustAnyLock(sb); ++ ++ sbinfo = au_sbi(sb); ++ fhsm = &sbinfo->si_fhsm; ++ if (au_fhsm_pid(fhsm) ++ && atomic_read(&fhsm->fhsm_readable) != -1) { ++ atomic_set(&fhsm->fhsm_readable, val); ++ if (val) ++ wake_up(&fhsm->fhsm_wqh); ++ } ++} ++ ++static int au_fhsm_stfs(struct super_block *sb, aufs_bindex_t bindex, ++ struct aufs_stfs *rstfs, int do_lock, int do_notify) ++{ ++ int err; ++ struct au_branch *br; ++ struct au_br_fhsm *bf; ++ ++ br = au_sbr(sb, bindex); ++ AuDebugOn(au_br_rdonly(br)); ++ bf = br->br_fhsm; ++ AuDebugOn(!bf); ++ ++ if (do_lock) ++ mutex_lock(&bf->bf_lock); ++ else ++ MtxMustLock(&bf->bf_lock); ++ ++ /* sb->s_root for NFS is unreliable */ ++ err = au_br_stfs(br, &bf->bf_stfs); ++ if (unlikely(err)) { ++ AuErr1("FHSM failed (%d), b%d, ignored.\n", bindex, err); ++ goto out; ++ } ++ ++ bf->bf_jiffy = jiffies; ++ bf->bf_readable = 1; ++ if (do_notify) ++ au_fhsm_notify(sb, /*val*/1); ++ if (rstfs) ++ *rstfs = bf->bf_stfs; ++ ++out: ++ if (do_lock) ++ mutex_unlock(&bf->bf_lock); ++ au_fhsm_notify(sb, /*val*/1); ++ ++ return err; ++} ++ ++void au_fhsm_wrote(struct super_block *sb, aufs_bindex_t bindex, int force) ++{ ++ int err; ++ struct au_sbinfo *sbinfo; ++ struct au_fhsm *fhsm; ++ struct au_branch *br; ++ struct au_br_fhsm *bf; ++ ++ AuDbg("b%d, force %d\n", bindex, force); ++ SiMustAnyLock(sb); ++ ++ sbinfo = au_sbi(sb); ++ fhsm = &sbinfo->si_fhsm; ++ if (!au_ftest_si(sbinfo, FHSM) ++ || fhsm->fhsm_bottom == bindex) ++ return; ++ ++ br = au_sbr(sb, bindex); ++ bf = br->br_fhsm; ++ AuDebugOn(!bf); ++ mutex_lock(&bf->bf_lock); ++ if (force ++ || au_fhsm_pid(fhsm) ++ || au_fhsm_test_jiffy(sbinfo, br)) ++ err = au_fhsm_stfs(sb, bindex, /*rstfs*/NULL, /*do_lock*/0, ++ /*do_notify*/1); ++ mutex_unlock(&bf->bf_lock); ++} ++ ++void au_fhsm_wrote_all(struct super_block *sb, int force) ++{ ++ aufs_bindex_t bindex, bend; ++ struct au_branch *br; ++ ++ /* exclude the bottom */ ++ bend = au_fhsm_bottom(sb); ++ for (bindex = 0; bindex < bend; bindex++) { ++ br = au_sbr(sb, bindex); ++ if (au_br_fhsm(br->br_perm)) ++ au_fhsm_wrote(sb, bindex, force); ++ } ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++static unsigned int au_fhsm_poll(struct file *file, ++ struct poll_table_struct *wait) ++{ ++ unsigned int mask; ++ struct au_sbinfo *sbinfo; ++ struct au_fhsm *fhsm; ++ ++ mask = 0; ++ sbinfo = file->private_data; ++ fhsm = &sbinfo->si_fhsm; ++ poll_wait(file, &fhsm->fhsm_wqh, wait); ++ if (atomic_read(&fhsm->fhsm_readable)) ++ mask = POLLIN /* | POLLRDNORM */; ++ ++ AuTraceErr((int)mask); ++ return mask; ++} ++ ++static int au_fhsm_do_read_one(struct aufs_stbr __user *stbr, ++ struct aufs_stfs *stfs, __s16 brid) ++{ ++ int err; ++ ++ err = copy_to_user(&stbr->stfs, stfs, sizeof(*stfs)); ++ if (!err) ++ err = __put_user(brid, &stbr->brid); ++ if (unlikely(err)) ++ err = -EFAULT; ++ ++ return err; ++} ++ ++static ssize_t au_fhsm_do_read(struct super_block *sb, ++ struct aufs_stbr __user *stbr, size_t count) ++{ ++ ssize_t err; ++ int nstbr; ++ aufs_bindex_t bindex, bend; ++ struct au_branch *br; ++ struct au_br_fhsm *bf; ++ ++ /* except the bottom branch */ ++ err = 0; ++ nstbr = 0; ++ bend = au_fhsm_bottom(sb); ++ for (bindex = 0; !err && bindex < bend; bindex++) { ++ br = au_sbr(sb, bindex); ++ if (!au_br_fhsm(br->br_perm)) ++ continue; ++ ++ bf = br->br_fhsm; ++ mutex_lock(&bf->bf_lock); ++ if (bf->bf_readable) { ++ err = -EFAULT; ++ if (count >= sizeof(*stbr)) ++ err = au_fhsm_do_read_one(stbr++, &bf->bf_stfs, ++ br->br_id); ++ if (!err) { ++ bf->bf_readable = 0; ++ count -= sizeof(*stbr); ++ nstbr++; ++ } ++ } ++ mutex_unlock(&bf->bf_lock); ++ } ++ if (!err) ++ err = sizeof(*stbr) * nstbr; ++ ++ return err; ++} ++ ++static ssize_t au_fhsm_read(struct file *file, char __user *buf, size_t count, ++ loff_t *pos) ++{ ++ ssize_t err; ++ int readable; ++ aufs_bindex_t nfhsm, bindex, bend; ++ struct au_sbinfo *sbinfo; ++ struct au_fhsm *fhsm; ++ struct au_branch *br; ++ struct super_block *sb; ++ ++ err = 0; ++ sbinfo = file->private_data; ++ fhsm = &sbinfo->si_fhsm; ++need_data: ++ spin_lock_irq(&fhsm->fhsm_wqh.lock); ++ if (!atomic_read(&fhsm->fhsm_readable)) { ++ if (vfsub_file_flags(file) & O_NONBLOCK) ++ err = -EAGAIN; ++ else ++ err = wait_event_interruptible_locked_irq ++ (fhsm->fhsm_wqh, ++ atomic_read(&fhsm->fhsm_readable)); ++ } ++ spin_unlock_irq(&fhsm->fhsm_wqh.lock); ++ if (unlikely(err)) ++ goto out; ++ ++ /* sb may already be dead */ ++ au_rw_read_lock(&sbinfo->si_rwsem); ++ readable = atomic_read(&fhsm->fhsm_readable); ++ if (readable > 0) { ++ sb = sbinfo->si_sb; ++ AuDebugOn(!sb); ++ /* exclude the bottom branch */ ++ nfhsm = 0; ++ bend = au_fhsm_bottom(sb); ++ for (bindex = 0; bindex < bend; bindex++) { ++ br = au_sbr(sb, bindex); ++ if (au_br_fhsm(br->br_perm)) ++ nfhsm++; ++ } ++ err = -EMSGSIZE; ++ if (nfhsm * sizeof(struct aufs_stbr) <= count) { ++ atomic_set(&fhsm->fhsm_readable, 0); ++ err = au_fhsm_do_read(sbinfo->si_sb, (void __user *)buf, ++ count); ++ } ++ } ++ au_rw_read_unlock(&sbinfo->si_rwsem); ++ if (!readable) ++ goto need_data; ++ ++out: ++ return err; ++} ++ ++static int au_fhsm_release(struct inode *inode, struct file *file) ++{ ++ struct au_sbinfo *sbinfo; ++ struct au_fhsm *fhsm; ++ ++ /* sb may already be dead */ ++ sbinfo = file->private_data; ++ fhsm = &sbinfo->si_fhsm; ++ spin_lock(&fhsm->fhsm_spin); ++ fhsm->fhsm_pid = 0; ++ spin_unlock(&fhsm->fhsm_spin); ++ kobject_put(&sbinfo->si_kobj); ++ ++ return 0; ++} ++ ++static const struct file_operations au_fhsm_fops = { ++ .owner = THIS_MODULE, ++ .llseek = noop_llseek, ++ .read = au_fhsm_read, ++ .poll = au_fhsm_poll, ++ .release = au_fhsm_release ++}; ++ ++int au_fhsm_fd(struct super_block *sb, int oflags) ++{ ++ int err, fd; ++ struct au_sbinfo *sbinfo; ++ struct au_fhsm *fhsm; ++ ++ err = -EPERM; ++ if (unlikely(!capable(CAP_SYS_ADMIN))) ++ goto out; ++ ++ err = -EINVAL; ++ if (unlikely(oflags & ~(O_CLOEXEC | O_NONBLOCK))) ++ goto out; ++ ++ err = 0; ++ sbinfo = au_sbi(sb); ++ fhsm = &sbinfo->si_fhsm; ++ spin_lock(&fhsm->fhsm_spin); ++ if (!fhsm->fhsm_pid) ++ fhsm->fhsm_pid = current->pid; ++ else ++ err = -EBUSY; ++ spin_unlock(&fhsm->fhsm_spin); ++ if (unlikely(err)) ++ goto out; ++ ++ oflags |= O_RDONLY; ++ /* oflags |= FMODE_NONOTIFY; */ ++ fd = anon_inode_getfd("[aufs_fhsm]", &au_fhsm_fops, sbinfo, oflags); ++ err = fd; ++ if (unlikely(fd < 0)) ++ goto out_pid; ++ ++ /* succeed reglardless 'fhsm' status */ ++ kobject_get(&sbinfo->si_kobj); ++ si_noflush_read_lock(sb); ++ if (au_ftest_si(sbinfo, FHSM)) ++ au_fhsm_wrote_all(sb, /*force*/0); ++ si_read_unlock(sb); ++ goto out; /* success */ ++ ++out_pid: ++ spin_lock(&fhsm->fhsm_spin); ++ fhsm->fhsm_pid = 0; ++ spin_unlock(&fhsm->fhsm_spin); ++out: ++ AuTraceErr(err); ++ return err; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++int au_fhsm_br_alloc(struct au_branch *br) ++{ ++ int err; ++ ++ err = 0; ++ br->br_fhsm = kmalloc(sizeof(*br->br_fhsm), GFP_NOFS); ++ if (br->br_fhsm) ++ au_br_fhsm_init(br->br_fhsm); ++ else ++ err = -ENOMEM; ++ ++ return err; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++void au_fhsm_fin(struct super_block *sb) ++{ ++ au_fhsm_notify(sb, /*val*/-1); ++} ++ ++void au_fhsm_init(struct au_sbinfo *sbinfo) ++{ ++ struct au_fhsm *fhsm; ++ ++ fhsm = &sbinfo->si_fhsm; ++ spin_lock_init(&fhsm->fhsm_spin); ++ init_waitqueue_head(&fhsm->fhsm_wqh); ++ atomic_set(&fhsm->fhsm_readable, 0); ++ fhsm->fhsm_expire ++ = msecs_to_jiffies(AUFS_FHSM_CACHE_DEF_SEC * MSEC_PER_SEC); ++ fhsm->fhsm_bottom = -1; ++} ++ ++void au_fhsm_set(struct au_sbinfo *sbinfo, unsigned int sec) ++{ ++ sbinfo->si_fhsm.fhsm_expire ++ = msecs_to_jiffies(sec * MSEC_PER_SEC); ++} ++ ++void au_fhsm_show(struct seq_file *seq, struct au_sbinfo *sbinfo) ++{ ++ unsigned int u; ++ ++ if (!au_ftest_si(sbinfo, FHSM)) ++ return; ++ ++ u = jiffies_to_msecs(sbinfo->si_fhsm.fhsm_expire) / MSEC_PER_SEC; ++ if (u != AUFS_FHSM_CACHE_DEF_SEC) ++ seq_printf(seq, ",fhsm_sec=%u", u); ++} +diff --git a/fs/aufs/file.c b/fs/aufs/file.c +new file mode 100644 +index 0000000..12c7620 +--- /dev/null ++++ b/fs/aufs/file.c +@@ -0,0 +1,857 @@ ++/* ++ * Copyright (C) 2005-2016 Junjiro R. Okajima ++ * ++ * This program, aufs is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . ++ */ ++ ++/* ++ * handling file/dir, and address_space operation ++ */ ++ ++#ifdef CONFIG_AUFS_DEBUG ++#include ++#endif ++#include ++#include "aufs.h" ++ ++/* drop flags for writing */ ++unsigned int au_file_roflags(unsigned int flags) ++{ ++ flags &= ~(O_WRONLY | O_RDWR | O_APPEND | O_CREAT | O_TRUNC); ++ flags |= O_RDONLY | O_NOATIME; ++ return flags; ++} ++ ++/* common functions to regular file and dir */ ++struct file *au_h_open(struct dentry *dentry, aufs_bindex_t bindex, int flags, ++ struct file *file, int force_wr) ++{ ++ struct file *h_file; ++ struct dentry *h_dentry; ++ struct inode *h_inode; ++ struct super_block *sb; ++ struct au_branch *br; ++ struct path h_path; ++ int err; ++ ++ /* a race condition can happen between open and unlink/rmdir */ ++ h_file = ERR_PTR(-ENOENT); ++ h_dentry = au_h_dptr(dentry, bindex); ++ if (au_test_nfsd() && !h_dentry) ++ goto out; ++ h_inode = h_dentry->d_inode; ++ if (au_test_nfsd() && !h_inode) ++ goto out; ++ spin_lock(&h_dentry->d_lock); ++ err = (!d_unhashed(dentry) && d_unlinked(h_dentry)) ++ || !h_inode ++ /* || !dentry->d_inode->i_nlink */ ++ ; ++ spin_unlock(&h_dentry->d_lock); ++ if (unlikely(err)) ++ goto out; ++ ++ sb = dentry->d_sb; ++ br = au_sbr(sb, bindex); ++ err = au_br_test_oflag(flags, br); ++ h_file = ERR_PTR(err); ++ if (unlikely(err)) ++ goto out; ++ ++ /* drop flags for writing */ ++ if (au_test_ro(sb, bindex, dentry->d_inode)) { ++ if (force_wr && !(flags & O_WRONLY)) ++ force_wr = 0; ++ flags = au_file_roflags(flags); ++ if (force_wr) { ++ h_file = ERR_PTR(-EROFS); ++ flags = au_file_roflags(flags); ++ if (unlikely(vfsub_native_ro(h_inode) ++ || IS_APPEND(h_inode))) ++ goto out; ++ flags &= ~O_ACCMODE; ++ flags |= O_WRONLY; ++ } ++ } ++ flags &= ~O_CREAT; ++ atomic_inc(&br->br_count); ++ h_path.dentry = h_dentry; ++ h_path.mnt = au_br_mnt(br); ++ h_file = vfsub_dentry_open(&h_path, flags); ++ if (IS_ERR(h_file)) ++ goto out_br; ++ ++ if (flags & __FMODE_EXEC) { ++ err = deny_write_access(h_file); ++ if (unlikely(err)) { ++ fput(h_file); ++ h_file = ERR_PTR(err); ++ goto out_br; ++ } ++ } ++ fsnotify_open(h_file); ++ goto out; /* success */ ++ ++out_br: ++ atomic_dec(&br->br_count); ++out: ++ return h_file; ++} ++ ++static int au_cmoo(struct dentry *dentry) ++{ ++ int err, cmoo; ++ unsigned int udba; ++ struct path h_path; ++ struct au_pin pin; ++ struct au_cp_generic cpg = { ++ .dentry = dentry, ++ .bdst = -1, ++ .bsrc = -1, ++ .len = -1, ++ .pin = &pin, ++ .flags = AuCpup_DTIME | AuCpup_HOPEN ++ }; ++ struct inode *inode, *delegated; ++ struct super_block *sb; ++ struct au_sbinfo *sbinfo; ++ struct au_fhsm *fhsm; ++ pid_t pid; ++ struct au_branch *br; ++ struct dentry *parent; ++ struct au_hinode *hdir; ++ ++ DiMustWriteLock(dentry); ++ inode = dentry->d_inode; ++ IiMustWriteLock(inode); ++ ++ err = 0; ++ if (IS_ROOT(dentry)) ++ goto out; ++ cpg.bsrc = au_dbstart(dentry); ++ if (!cpg.bsrc) ++ goto out; ++ ++ sb = dentry->d_sb; ++ sbinfo = au_sbi(sb); ++ fhsm = &sbinfo->si_fhsm; ++ pid = au_fhsm_pid(fhsm); ++ if (pid ++ && (current->pid == pid ++ || current->real_parent->pid == pid)) ++ goto out; ++ ++ br = au_sbr(sb, cpg.bsrc); ++ cmoo = au_br_cmoo(br->br_perm); ++ if (!cmoo) ++ goto out; ++ if (!S_ISREG(inode->i_mode)) ++ cmoo &= AuBrAttr_COO_ALL; ++ if (!cmoo) ++ goto out; ++ ++ parent = dget_parent(dentry); ++ di_write_lock_parent(parent); ++ err = au_wbr_do_copyup_bu(dentry, cpg.bsrc - 1); ++ cpg.bdst = err; ++ if (unlikely(err < 0)) { ++ err = 0; /* there is no upper writable branch */ ++ goto out_dgrade; ++ } ++ AuDbg("bsrc %d, bdst %d\n", cpg.bsrc, cpg.bdst); ++ ++ /* do not respect the coo attrib for the target branch */ ++ err = au_cpup_dirs(dentry, cpg.bdst); ++ if (unlikely(err)) ++ goto out_dgrade; ++ ++ di_downgrade_lock(parent, AuLock_IR); ++ udba = au_opt_udba(sb); ++ err = au_pin(&pin, dentry, cpg.bdst, udba, ++ AuPin_DI_LOCKED | AuPin_MNT_WRITE); ++ if (unlikely(err)) ++ goto out_parent; ++ ++ err = au_sio_cpup_simple(&cpg); ++ au_unpin(&pin); ++ if (unlikely(err)) ++ goto out_parent; ++ if (!(cmoo & AuBrWAttr_MOO)) ++ goto out_parent; /* success */ ++ ++ err = au_pin(&pin, dentry, cpg.bsrc, udba, ++ AuPin_DI_LOCKED | AuPin_MNT_WRITE); ++ if (unlikely(err)) ++ goto out_parent; ++ ++ h_path.mnt = au_br_mnt(br); ++ h_path.dentry = au_h_dptr(dentry, cpg.bsrc); ++ hdir = au_hi(parent->d_inode, cpg.bsrc); ++ delegated = NULL; ++ err = vfsub_unlink(hdir->hi_inode, &h_path, &delegated, /*force*/1); ++ au_unpin(&pin); ++ /* todo: keep h_dentry or not? */ ++ if (unlikely(err == -EWOULDBLOCK)) { ++ pr_warn("cannot retry for NFSv4 delegation" ++ " for an internal unlink\n"); ++ iput(delegated); ++ } ++ if (unlikely(err)) { ++ pr_err("unlink %pd after coo failed (%d), ignored\n", ++ dentry, err); ++ err = 0; ++ } ++ goto out_parent; /* success */ ++ ++out_dgrade: ++ di_downgrade_lock(parent, AuLock_IR); ++out_parent: ++ di_read_unlock(parent, AuLock_IR); ++ dput(parent); ++out: ++ AuTraceErr(err); ++ return err; ++} ++ ++int au_do_open(struct file *file, struct au_do_open_args *args) ++{ ++ int err, no_lock = args->no_lock; ++ struct dentry *dentry; ++ struct au_finfo *finfo; ++ ++ if (!no_lock) ++ err = au_finfo_init(file, args->fidir); ++ else { ++ lockdep_off(); ++ err = au_finfo_init(file, args->fidir); ++ lockdep_on(); ++ } ++ if (unlikely(err)) ++ goto out; ++ ++ dentry = file->f_dentry; ++ AuDebugOn(IS_ERR_OR_NULL(dentry)); ++ if (!no_lock) { ++ di_write_lock_child(dentry); ++ err = au_cmoo(dentry); ++ di_downgrade_lock(dentry, AuLock_IR); ++ if (!err) ++ err = args->open(file, vfsub_file_flags(file), NULL); ++ di_read_unlock(dentry, AuLock_IR); ++ } else { ++ err = au_cmoo(dentry); ++ if (!err) ++ err = args->open(file, vfsub_file_flags(file), ++ args->h_file); ++ if (!err && au_fbstart(file) != au_dbstart(dentry)) ++ /* ++ * cmoo happens after h_file was opened. ++ * need to refresh file later. ++ */ ++ atomic_dec(&au_fi(file)->fi_generation); ++ } ++ ++ finfo = au_fi(file); ++ if (!err) { ++ finfo->fi_file = file; ++ au_sphl_add(&finfo->fi_hlist, ++ &au_sbi(file->f_dentry->d_sb)->si_files); ++ } ++ if (!no_lock) ++ fi_write_unlock(file); ++ else { ++ lockdep_off(); ++ fi_write_unlock(file); ++ lockdep_on(); ++ } ++ if (unlikely(err)) { ++ finfo->fi_hdir = NULL; ++ au_finfo_fin(file); ++ } ++ ++out: ++ return err; ++} ++ ++int au_reopen_nondir(struct file *file) ++{ ++ int err; ++ aufs_bindex_t bstart; ++ struct dentry *dentry; ++ struct file *h_file, *h_file_tmp; ++ ++ dentry = file->f_dentry; ++ bstart = au_dbstart(dentry); ++ h_file_tmp = NULL; ++ if (au_fbstart(file) == bstart) { ++ h_file = au_hf_top(file); ++ if (file->f_mode == h_file->f_mode) ++ return 0; /* success */ ++ h_file_tmp = h_file; ++ get_file(h_file_tmp); ++ au_set_h_fptr(file, bstart, NULL); ++ } ++ AuDebugOn(au_fi(file)->fi_hdir); ++ /* ++ * it can happen ++ * file exists on both of rw and ro ++ * open --> dbstart and fbstart are both 0 ++ * prepend a branch as rw, "rw" become ro ++ * remove rw/file ++ * delete the top branch, "rw" becomes rw again ++ * --> dbstart is 1, fbstart is still 0 ++ * write --> fbstart is 0 but dbstart is 1 ++ */ ++ /* AuDebugOn(au_fbstart(file) < bstart); */ ++ ++ h_file = au_h_open(dentry, bstart, vfsub_file_flags(file) & ~O_TRUNC, ++ file, /*force_wr*/0); ++ err = PTR_ERR(h_file); ++ if (IS_ERR(h_file)) { ++ if (h_file_tmp) { ++ atomic_inc(&au_sbr(dentry->d_sb, bstart)->br_count); ++ au_set_h_fptr(file, bstart, h_file_tmp); ++ h_file_tmp = NULL; ++ } ++ goto out; /* todo: close all? */ ++ } ++ ++ err = 0; ++ au_set_fbstart(file, bstart); ++ au_set_h_fptr(file, bstart, h_file); ++ au_update_figen(file); ++ /* todo: necessary? */ ++ /* file->f_ra = h_file->f_ra; */ ++ ++out: ++ if (h_file_tmp) ++ fput(h_file_tmp); ++ return err; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++static int au_reopen_wh(struct file *file, aufs_bindex_t btgt, ++ struct dentry *hi_wh) ++{ ++ int err; ++ aufs_bindex_t bstart; ++ struct au_dinfo *dinfo; ++ struct dentry *h_dentry; ++ struct au_hdentry *hdp; ++ ++ dinfo = au_di(file->f_dentry); ++ AuRwMustWriteLock(&dinfo->di_rwsem); ++ ++ bstart = dinfo->di_bstart; ++ dinfo->di_bstart = btgt; ++ hdp = dinfo->di_hdentry; ++ h_dentry = hdp[0 + btgt].hd_dentry; ++ hdp[0 + btgt].hd_dentry = hi_wh; ++ err = au_reopen_nondir(file); ++ hdp[0 + btgt].hd_dentry = h_dentry; ++ dinfo->di_bstart = bstart; ++ ++ return err; ++} ++ ++static int au_ready_to_write_wh(struct file *file, loff_t len, ++ aufs_bindex_t bcpup, struct au_pin *pin) ++{ ++ int err; ++ struct inode *inode, *h_inode; ++ struct dentry *h_dentry, *hi_wh; ++ struct au_cp_generic cpg = { ++ .dentry = file->f_dentry, ++ .bdst = bcpup, ++ .bsrc = -1, ++ .len = len, ++ .pin = pin ++ }; ++ ++ au_update_dbstart(cpg.dentry); ++ inode = cpg.dentry->d_inode; ++ h_inode = NULL; ++ if (au_dbstart(cpg.dentry) <= bcpup ++ && au_dbend(cpg.dentry) >= bcpup) { ++ h_dentry = au_h_dptr(cpg.dentry, bcpup); ++ if (h_dentry) ++ h_inode = h_dentry->d_inode; ++ } ++ hi_wh = au_hi_wh(inode, bcpup); ++ if (!hi_wh && !h_inode) ++ err = au_sio_cpup_wh(&cpg, file); ++ else ++ /* already copied-up after unlink */ ++ err = au_reopen_wh(file, bcpup, hi_wh); ++ ++ if (!err ++ && (inode->i_nlink > 1 ++ || (inode->i_state & I_LINKABLE)) ++ && au_opt_test(au_mntflags(cpg.dentry->d_sb), PLINK)) ++ au_plink_append(inode, bcpup, au_h_dptr(cpg.dentry, bcpup)); ++ ++ return err; ++} ++ ++/* ++ * prepare the @file for writing. ++ */ ++int au_ready_to_write(struct file *file, loff_t len, struct au_pin *pin) ++{ ++ int err; ++ aufs_bindex_t dbstart; ++ struct dentry *parent; ++ struct inode *inode; ++ struct super_block *sb; ++ struct file *h_file; ++ struct au_cp_generic cpg = { ++ .dentry = file->f_dentry, ++ .bdst = -1, ++ .bsrc = -1, ++ .len = len, ++ .pin = pin, ++ .flags = AuCpup_DTIME ++ }; ++ ++ sb = cpg.dentry->d_sb; ++ inode = cpg.dentry->d_inode; ++ cpg.bsrc = au_fbstart(file); ++ err = au_test_ro(sb, cpg.bsrc, inode); ++ if (!err && (au_hf_top(file)->f_mode & FMODE_WRITE)) { ++ err = au_pin(pin, cpg.dentry, cpg.bsrc, AuOpt_UDBA_NONE, ++ /*flags*/0); ++ goto out; ++ } ++ ++ /* need to cpup or reopen */ ++ parent = dget_parent(cpg.dentry); ++ di_write_lock_parent(parent); ++ err = AuWbrCopyup(au_sbi(sb), cpg.dentry); ++ cpg.bdst = err; ++ if (unlikely(err < 0)) ++ goto out_dgrade; ++ err = 0; ++ ++ if (!d_unhashed(cpg.dentry) && !au_h_dptr(parent, cpg.bdst)) { ++ err = au_cpup_dirs(cpg.dentry, cpg.bdst); ++ if (unlikely(err)) ++ goto out_dgrade; ++ } ++ ++ err = au_pin(pin, cpg.dentry, cpg.bdst, AuOpt_UDBA_NONE, ++ AuPin_DI_LOCKED | AuPin_MNT_WRITE); ++ if (unlikely(err)) ++ goto out_dgrade; ++ ++ dbstart = au_dbstart(cpg.dentry); ++ if (dbstart <= cpg.bdst) ++ cpg.bsrc = cpg.bdst; ++ ++ if (dbstart <= cpg.bdst /* just reopen */ ++ || !d_unhashed(cpg.dentry) /* copyup and reopen */ ++ ) { ++ h_file = au_h_open_pre(cpg.dentry, cpg.bsrc, /*force_wr*/0); ++ if (IS_ERR(h_file)) ++ err = PTR_ERR(h_file); ++ else { ++ di_downgrade_lock(parent, AuLock_IR); ++ if (dbstart > cpg.bdst) ++ err = au_sio_cpup_simple(&cpg); ++ if (!err) ++ err = au_reopen_nondir(file); ++ au_h_open_post(cpg.dentry, cpg.bsrc, h_file); ++ } ++ } else { /* copyup as wh and reopen */ ++ /* ++ * since writable hfsplus branch is not supported, ++ * h_open_pre/post() are unnecessary. ++ */ ++ err = au_ready_to_write_wh(file, len, cpg.bdst, pin); ++ di_downgrade_lock(parent, AuLock_IR); ++ } ++ ++ if (!err) { ++ au_pin_set_parent_lflag(pin, /*lflag*/0); ++ goto out_dput; /* success */ ++ } ++ au_unpin(pin); ++ goto out_unlock; ++ ++out_dgrade: ++ di_downgrade_lock(parent, AuLock_IR); ++out_unlock: ++ di_read_unlock(parent, AuLock_IR); ++out_dput: ++ dput(parent); ++out: ++ return err; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++int au_do_flush(struct file *file, fl_owner_t id, ++ int (*flush)(struct file *file, fl_owner_t id)) ++{ ++ int err; ++ struct super_block *sb; ++ struct inode *inode; ++ ++ inode = file_inode(file); ++ sb = inode->i_sb; ++ si_noflush_read_lock(sb); ++ fi_read_lock(file); ++ ii_read_lock_child(inode); ++ ++ err = flush(file, id); ++ au_cpup_attr_timesizes(inode); ++ ++ ii_read_unlock(inode); ++ fi_read_unlock(file); ++ si_read_unlock(sb); ++ return err; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++static int au_file_refresh_by_inode(struct file *file, int *need_reopen) ++{ ++ int err; ++ struct au_pin pin; ++ struct au_finfo *finfo; ++ struct dentry *parent, *hi_wh; ++ struct inode *inode; ++ struct super_block *sb; ++ struct au_cp_generic cpg = { ++ .dentry = file->f_dentry, ++ .bdst = -1, ++ .bsrc = -1, ++ .len = -1, ++ .pin = &pin, ++ .flags = AuCpup_DTIME ++ }; ++ ++ FiMustWriteLock(file); ++ ++ err = 0; ++ finfo = au_fi(file); ++ sb = cpg.dentry->d_sb; ++ inode = cpg.dentry->d_inode; ++ cpg.bdst = au_ibstart(inode); ++ if (cpg.bdst == finfo->fi_btop || IS_ROOT(cpg.dentry)) ++ goto out; ++ ++ parent = dget_parent(cpg.dentry); ++ if (au_test_ro(sb, cpg.bdst, inode)) { ++ di_read_lock_parent(parent, !AuLock_IR); ++ err = AuWbrCopyup(au_sbi(sb), cpg.dentry); ++ cpg.bdst = err; ++ di_read_unlock(parent, !AuLock_IR); ++ if (unlikely(err < 0)) ++ goto out_parent; ++ err = 0; ++ } ++ ++ di_read_lock_parent(parent, AuLock_IR); ++ hi_wh = au_hi_wh(inode, cpg.bdst); ++ if (!S_ISDIR(inode->i_mode) ++ && au_opt_test(au_mntflags(sb), PLINK) ++ && au_plink_test(inode) ++ && !d_unhashed(cpg.dentry) ++ && cpg.bdst < au_dbstart(cpg.dentry)) { ++ err = au_test_and_cpup_dirs(cpg.dentry, cpg.bdst); ++ if (unlikely(err)) ++ goto out_unlock; ++ ++ /* always superio. */ ++ err = au_pin(&pin, cpg.dentry, cpg.bdst, AuOpt_UDBA_NONE, ++ AuPin_DI_LOCKED | AuPin_MNT_WRITE); ++ if (!err) { ++ err = au_sio_cpup_simple(&cpg); ++ au_unpin(&pin); ++ } ++ } else if (hi_wh) { ++ /* already copied-up after unlink */ ++ err = au_reopen_wh(file, cpg.bdst, hi_wh); ++ *need_reopen = 0; ++ } ++ ++out_unlock: ++ di_read_unlock(parent, AuLock_IR); ++out_parent: ++ dput(parent); ++out: ++ return err; ++} ++ ++static void au_do_refresh_dir(struct file *file) ++{ ++ aufs_bindex_t bindex, bend, new_bindex, brid; ++ struct au_hfile *p, tmp, *q; ++ struct au_finfo *finfo; ++ struct super_block *sb; ++ struct au_fidir *fidir; ++ ++ FiMustWriteLock(file); ++ ++ sb = file->f_dentry->d_sb; ++ finfo = au_fi(file); ++ fidir = finfo->fi_hdir; ++ AuDebugOn(!fidir); ++ p = fidir->fd_hfile + finfo->fi_btop; ++ brid = p->hf_br->br_id; ++ bend = fidir->fd_bbot; ++ for (bindex = finfo->fi_btop; bindex <= bend; bindex++, p++) { ++ if (!p->hf_file) ++ continue; ++ ++ new_bindex = au_br_index(sb, p->hf_br->br_id); ++ if (new_bindex == bindex) ++ continue; ++ if (new_bindex < 0) { ++ au_set_h_fptr(file, bindex, NULL); ++ continue; ++ } ++ ++ /* swap two lower inode, and loop again */ ++ q = fidir->fd_hfile + new_bindex; ++ tmp = *q; ++ *q = *p; ++ *p = tmp; ++ if (tmp.hf_file) { ++ bindex--; ++ p--; ++ } ++ } ++ ++ p = fidir->fd_hfile; ++ if (!au_test_mmapped(file) && !d_unlinked(file->f_dentry)) { ++ bend = au_sbend(sb); ++ for (finfo->fi_btop = 0; finfo->fi_btop <= bend; ++ finfo->fi_btop++, p++) ++ if (p->hf_file) { ++ if (file_inode(p->hf_file)) ++ break; ++ au_hfput(p, file); ++ } ++ } else { ++ bend = au_br_index(sb, brid); ++ for (finfo->fi_btop = 0; finfo->fi_btop < bend; ++ finfo->fi_btop++, p++) ++ if (p->hf_file) ++ au_hfput(p, file); ++ bend = au_sbend(sb); ++ } ++ ++ p = fidir->fd_hfile + bend; ++ for (fidir->fd_bbot = bend; fidir->fd_bbot >= finfo->fi_btop; ++ fidir->fd_bbot--, p--) ++ if (p->hf_file) { ++ if (file_inode(p->hf_file)) ++ break; ++ au_hfput(p, file); ++ } ++ AuDebugOn(fidir->fd_bbot < finfo->fi_btop); ++} ++ ++/* ++ * after branch manipulating, refresh the file. ++ */ ++static int refresh_file(struct file *file, int (*reopen)(struct file *file)) ++{ ++ int err, need_reopen; ++ aufs_bindex_t bend, bindex; ++ struct dentry *dentry; ++ struct au_finfo *finfo; ++ struct au_hfile *hfile; ++ ++ dentry = file->f_dentry; ++ finfo = au_fi(file); ++ if (!finfo->fi_hdir) { ++ hfile = &finfo->fi_htop; ++ AuDebugOn(!hfile->hf_file); ++ bindex = au_br_index(dentry->d_sb, hfile->hf_br->br_id); ++ AuDebugOn(bindex < 0); ++ if (bindex != finfo->fi_btop) ++ au_set_fbstart(file, bindex); ++ } else { ++ err = au_fidir_realloc(finfo, au_sbend(dentry->d_sb) + 1); ++ if (unlikely(err)) ++ goto out; ++ au_do_refresh_dir(file); ++ } ++ ++ err = 0; ++ need_reopen = 1; ++ if (!au_test_mmapped(file)) ++ err = au_file_refresh_by_inode(file, &need_reopen); ++ if (!err && need_reopen && !d_unlinked(dentry)) ++ err = reopen(file); ++ if (!err) { ++ au_update_figen(file); ++ goto out; /* success */ ++ } ++ ++ /* error, close all lower files */ ++ if (finfo->fi_hdir) { ++ bend = au_fbend_dir(file); ++ for (bindex = au_fbstart(file); bindex <= bend; bindex++) ++ au_set_h_fptr(file, bindex, NULL); ++ } ++ ++out: ++ return err; ++} ++ ++/* common function to regular file and dir */ ++int au_reval_and_lock_fdi(struct file *file, int (*reopen)(struct file *file), ++ int wlock) ++{ ++ int err; ++ unsigned int sigen, figen; ++ aufs_bindex_t bstart; ++ unsigned char pseudo_link; ++ struct dentry *dentry; ++ struct inode *inode; ++ ++ err = 0; ++ dentry = file->f_dentry; ++ inode = dentry->d_inode; ++ sigen = au_sigen(dentry->d_sb); ++ fi_write_lock(file); ++ figen = au_figen(file); ++ di_write_lock_child(dentry); ++ bstart = au_dbstart(dentry); ++ pseudo_link = (bstart != au_ibstart(inode)); ++ if (sigen == figen && !pseudo_link && au_fbstart(file) == bstart) { ++ if (!wlock) { ++ di_downgrade_lock(dentry, AuLock_IR); ++ fi_downgrade_lock(file); ++ } ++ goto out; /* success */ ++ } ++ ++ AuDbg("sigen %d, figen %d\n", sigen, figen); ++ if (au_digen_test(dentry, sigen)) { ++ err = au_reval_dpath(dentry, sigen); ++ AuDebugOn(!err && au_digen_test(dentry, sigen)); ++ } ++ ++ if (!err) ++ err = refresh_file(file, reopen); ++ if (!err) { ++ if (!wlock) { ++ di_downgrade_lock(dentry, AuLock_IR); ++ fi_downgrade_lock(file); ++ } ++ } else { ++ di_write_unlock(dentry); ++ fi_write_unlock(file); ++ } ++ ++out: ++ return err; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++/* cf. aufs_nopage() */ ++/* for madvise(2) */ ++static int aufs_readpage(struct file *file __maybe_unused, struct page *page) ++{ ++ unlock_page(page); ++ return 0; ++} ++ ++/* it will never be called, but necessary to support O_DIRECT */ ++static ssize_t aufs_direct_IO(int rw, struct kiocb *iocb, ++ struct iov_iter *iter, loff_t offset) ++{ BUG(); return 0; } ++ ++/* ++ * it will never be called, but madvise and fadvise behaves differently ++ * when get_xip_mem is defined ++ */ ++static int aufs_get_xip_mem(struct address_space *mapping, pgoff_t pgoff, ++ int create, void **kmem, unsigned long *pfn) ++{ BUG(); return 0; } ++ ++/* they will never be called. */ ++#ifdef CONFIG_AUFS_DEBUG ++static int aufs_write_begin(struct file *file, struct address_space *mapping, ++ loff_t pos, unsigned len, unsigned flags, ++ struct page **pagep, void **fsdata) ++{ AuUnsupport(); return 0; } ++static int aufs_write_end(struct file *file, struct address_space *mapping, ++ loff_t pos, unsigned len, unsigned copied, ++ struct page *page, void *fsdata) ++{ AuUnsupport(); return 0; } ++static int aufs_writepage(struct page *page, struct writeback_control *wbc) ++{ AuUnsupport(); return 0; } ++ ++static int aufs_set_page_dirty(struct page *page) ++{ AuUnsupport(); return 0; } ++static void aufs_invalidatepage(struct page *page, unsigned int offset, ++ unsigned int length) ++{ AuUnsupport(); } ++static int aufs_releasepage(struct page *page, gfp_t gfp) ++{ AuUnsupport(); return 0; } ++#if 0 /* called by memory compaction regardless file */ ++static int aufs_migratepage(struct address_space *mapping, struct page *newpage, ++ struct page *page, enum migrate_mode mode) ++{ AuUnsupport(); return 0; } ++#endif ++static int aufs_launder_page(struct page *page) ++{ AuUnsupport(); return 0; } ++static int aufs_is_partially_uptodate(struct page *page, ++ unsigned long from, ++ unsigned long count) ++{ AuUnsupport(); return 0; } ++static void aufs_is_dirty_writeback(struct page *page, bool *dirty, ++ bool *writeback) ++{ AuUnsupport(); } ++static int aufs_error_remove_page(struct address_space *mapping, ++ struct page *page) ++{ AuUnsupport(); return 0; } ++static int aufs_swap_activate(struct swap_info_struct *sis, struct file *file, ++ sector_t *span) ++{ AuUnsupport(); return 0; } ++static void aufs_swap_deactivate(struct file *file) ++{ AuUnsupport(); } ++#endif /* CONFIG_AUFS_DEBUG */ ++ ++const struct address_space_operations aufs_aop = { ++ .readpage = aufs_readpage, ++ .direct_IO = aufs_direct_IO, ++ .get_xip_mem = aufs_get_xip_mem, ++#ifdef CONFIG_AUFS_DEBUG ++ .writepage = aufs_writepage, ++ /* no writepages, because of writepage */ ++ .set_page_dirty = aufs_set_page_dirty, ++ /* no readpages, because of readpage */ ++ .write_begin = aufs_write_begin, ++ .write_end = aufs_write_end, ++ /* no bmap, no block device */ ++ .invalidatepage = aufs_invalidatepage, ++ .releasepage = aufs_releasepage, ++ /* is fallback_migrate_page ok? */ ++ /* .migratepage = aufs_migratepage, */ ++ .launder_page = aufs_launder_page, ++ .is_partially_uptodate = aufs_is_partially_uptodate, ++ .is_dirty_writeback = aufs_is_dirty_writeback, ++ .error_remove_page = aufs_error_remove_page, ++ .swap_activate = aufs_swap_activate, ++ .swap_deactivate = aufs_swap_deactivate ++#endif /* CONFIG_AUFS_DEBUG */ ++}; +diff --git a/fs/aufs/file.h b/fs/aufs/file.h +new file mode 100644 +index 0000000..564be91 +--- /dev/null ++++ b/fs/aufs/file.h +@@ -0,0 +1,291 @@ ++/* ++ * Copyright (C) 2005-2016 Junjiro R. Okajima ++ * ++ * This program, aufs is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . ++ */ ++ ++/* ++ * file operations ++ */ ++ ++#ifndef __AUFS_FILE_H__ ++#define __AUFS_FILE_H__ ++ ++#ifdef __KERNEL__ ++ ++#include ++#include ++#include ++#include "rwsem.h" ++ ++struct au_branch; ++struct au_hfile { ++ struct file *hf_file; ++ struct au_branch *hf_br; ++}; ++ ++struct au_vdir; ++struct au_fidir { ++ aufs_bindex_t fd_bbot; ++ aufs_bindex_t fd_nent; ++ struct au_vdir *fd_vdir_cache; ++ struct au_hfile fd_hfile[]; ++}; ++ ++static inline int au_fidir_sz(int nent) ++{ ++ AuDebugOn(nent < 0); ++ return sizeof(struct au_fidir) + sizeof(struct au_hfile) * nent; ++} ++ ++struct au_finfo { ++ atomic_t fi_generation; ++ ++ struct au_rwsem fi_rwsem; ++ aufs_bindex_t fi_btop; ++ ++ /* do not union them */ ++ struct { /* for non-dir */ ++ struct au_hfile fi_htop; ++ atomic_t fi_mmapped; ++ }; ++ struct au_fidir *fi_hdir; /* for dir only */ ++ ++ struct hlist_node fi_hlist; ++ struct file *fi_file; /* very ugly */ ++} ____cacheline_aligned_in_smp; ++ ++/* ---------------------------------------------------------------------- */ ++ ++/* file.c */ ++extern const struct address_space_operations aufs_aop; ++unsigned int au_file_roflags(unsigned int flags); ++struct file *au_h_open(struct dentry *dentry, aufs_bindex_t bindex, int flags, ++ struct file *file, int force_wr); ++struct au_do_open_args { ++ int no_lock; ++ int (*open)(struct file *file, int flags, ++ struct file *h_file); ++ struct au_fidir *fidir; ++ struct file *h_file; ++}; ++int au_do_open(struct file *file, struct au_do_open_args *args); ++int au_reopen_nondir(struct file *file); ++struct au_pin; ++int au_ready_to_write(struct file *file, loff_t len, struct au_pin *pin); ++int au_reval_and_lock_fdi(struct file *file, int (*reopen)(struct file *file), ++ int wlock); ++int au_do_flush(struct file *file, fl_owner_t id, ++ int (*flush)(struct file *file, fl_owner_t id)); ++ ++/* poll.c */ ++#ifdef CONFIG_AUFS_POLL ++unsigned int aufs_poll(struct file *file, poll_table *wait); ++#endif ++ ++#ifdef CONFIG_AUFS_BR_HFSPLUS ++/* hfsplus.c */ ++struct file *au_h_open_pre(struct dentry *dentry, aufs_bindex_t bindex, ++ int force_wr); ++void au_h_open_post(struct dentry *dentry, aufs_bindex_t bindex, ++ struct file *h_file); ++#else ++AuStub(struct file *, au_h_open_pre, return NULL, struct dentry *dentry, ++ aufs_bindex_t bindex, int force_wr) ++AuStubVoid(au_h_open_post, struct dentry *dentry, aufs_bindex_t bindex, ++ struct file *h_file); ++#endif ++ ++/* f_op.c */ ++extern const struct file_operations aufs_file_fop; ++int au_do_open_nondir(struct file *file, int flags, struct file *h_file); ++int aufs_release_nondir(struct inode *inode __maybe_unused, struct file *file); ++struct file *au_read_pre(struct file *file, int keep_fi); ++ ++/* finfo.c */ ++void au_hfput(struct au_hfile *hf, struct file *file); ++void au_set_h_fptr(struct file *file, aufs_bindex_t bindex, ++ struct file *h_file); ++ ++void au_update_figen(struct file *file); ++struct au_fidir *au_fidir_alloc(struct super_block *sb); ++int au_fidir_realloc(struct au_finfo *finfo, int nbr); ++ ++void au_fi_init_once(void *_fi); ++void au_finfo_fin(struct file *file); ++int au_finfo_init(struct file *file, struct au_fidir *fidir); ++ ++/* ioctl.c */ ++long aufs_ioctl_nondir(struct file *file, unsigned int cmd, unsigned long arg); ++#ifdef CONFIG_COMPAT ++long aufs_compat_ioctl_dir(struct file *file, unsigned int cmd, ++ unsigned long arg); ++long aufs_compat_ioctl_nondir(struct file *file, unsigned int cmd, ++ unsigned long arg); ++#endif ++ ++/* ---------------------------------------------------------------------- */ ++ ++static inline struct au_finfo *au_fi(struct file *file) ++{ ++ return file->private_data; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++/* ++ * fi_read_lock, fi_write_lock, ++ * fi_read_unlock, fi_write_unlock, fi_downgrade_lock ++ */ ++AuSimpleRwsemFuncs(fi, struct file *f, &au_fi(f)->fi_rwsem); ++ ++#define FiMustNoWaiters(f) AuRwMustNoWaiters(&au_fi(f)->fi_rwsem) ++#define FiMustAnyLock(f) AuRwMustAnyLock(&au_fi(f)->fi_rwsem) ++#define FiMustWriteLock(f) AuRwMustWriteLock(&au_fi(f)->fi_rwsem) ++ ++/* ---------------------------------------------------------------------- */ ++ ++/* todo: hard/soft set? */ ++static inline aufs_bindex_t au_fbstart(struct file *file) ++{ ++ FiMustAnyLock(file); ++ return au_fi(file)->fi_btop; ++} ++ ++static inline aufs_bindex_t au_fbend_dir(struct file *file) ++{ ++ FiMustAnyLock(file); ++ AuDebugOn(!au_fi(file)->fi_hdir); ++ return au_fi(file)->fi_hdir->fd_bbot; ++} ++ ++static inline struct au_vdir *au_fvdir_cache(struct file *file) ++{ ++ FiMustAnyLock(file); ++ AuDebugOn(!au_fi(file)->fi_hdir); ++ return au_fi(file)->fi_hdir->fd_vdir_cache; ++} ++ ++static inline void au_set_fbstart(struct file *file, aufs_bindex_t bindex) ++{ ++ FiMustWriteLock(file); ++ au_fi(file)->fi_btop = bindex; ++} ++ ++static inline void au_set_fbend_dir(struct file *file, aufs_bindex_t bindex) ++{ ++ FiMustWriteLock(file); ++ AuDebugOn(!au_fi(file)->fi_hdir); ++ au_fi(file)->fi_hdir->fd_bbot = bindex; ++} ++ ++static inline void au_set_fvdir_cache(struct file *file, ++ struct au_vdir *vdir_cache) ++{ ++ FiMustWriteLock(file); ++ AuDebugOn(!au_fi(file)->fi_hdir); ++ au_fi(file)->fi_hdir->fd_vdir_cache = vdir_cache; ++} ++ ++static inline struct file *au_hf_top(struct file *file) ++{ ++ FiMustAnyLock(file); ++ AuDebugOn(au_fi(file)->fi_hdir); ++ return au_fi(file)->fi_htop.hf_file; ++} ++ ++static inline struct file *au_hf_dir(struct file *file, aufs_bindex_t bindex) ++{ ++ FiMustAnyLock(file); ++ AuDebugOn(!au_fi(file)->fi_hdir); ++ return au_fi(file)->fi_hdir->fd_hfile[0 + bindex].hf_file; ++} ++ ++/* todo: memory barrier? */ ++static inline unsigned int au_figen(struct file *f) ++{ ++ return atomic_read(&au_fi(f)->fi_generation); ++} ++ ++static inline void au_set_mmapped(struct file *f) ++{ ++ if (atomic_inc_return(&au_fi(f)->fi_mmapped)) ++ return; ++ pr_warn("fi_mmapped wrapped around\n"); ++ while (!atomic_inc_return(&au_fi(f)->fi_mmapped)) ++ ; ++} ++ ++static inline void au_unset_mmapped(struct file *f) ++{ ++ atomic_dec(&au_fi(f)->fi_mmapped); ++} ++ ++static inline int au_test_mmapped(struct file *f) ++{ ++ return atomic_read(&au_fi(f)->fi_mmapped); ++} ++ ++/* customize vma->vm_file */ ++ ++static inline void au_do_vm_file_reset(struct vm_area_struct *vma, ++ struct file *file) ++{ ++ struct file *f; ++ ++ f = vma->vm_file; ++ get_file(file); ++ vma->vm_file = file; ++ fput(f); ++} ++ ++#ifdef CONFIG_MMU ++#define AuDbgVmRegion(file, vma) do {} while (0) ++ ++static inline void au_vm_file_reset(struct vm_area_struct *vma, ++ struct file *file) ++{ ++ au_do_vm_file_reset(vma, file); ++} ++#else ++#define AuDbgVmRegion(file, vma) \ ++ AuDebugOn((vma)->vm_region && (vma)->vm_region->vm_file != (file)) ++ ++static inline void au_vm_file_reset(struct vm_area_struct *vma, ++ struct file *file) ++{ ++ struct file *f; ++ ++ au_do_vm_file_reset(vma, file); ++ f = vma->vm_region->vm_file; ++ get_file(file); ++ vma->vm_region->vm_file = file; ++ fput(f); ++} ++#endif /* CONFIG_MMU */ ++ ++/* handle vma->vm_prfile */ ++static inline void au_vm_prfile_set(struct vm_area_struct *vma, ++ struct file *file) ++{ ++ get_file(file); ++ vma->vm_prfile = file; ++#ifndef CONFIG_MMU ++ get_file(file); ++ vma->vm_region->vm_prfile = file; ++#endif ++} ++ ++#endif /* __KERNEL__ */ ++#endif /* __AUFS_FILE_H__ */ +diff --git a/fs/aufs/finfo.c b/fs/aufs/finfo.c +new file mode 100644 +index 0000000..7e25db3 +--- /dev/null ++++ b/fs/aufs/finfo.c +@@ -0,0 +1,156 @@ ++/* ++ * Copyright (C) 2005-2016 Junjiro R. Okajima ++ * ++ * This program, aufs is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . ++ */ ++ ++/* ++ * file private data ++ */ ++ ++#include "aufs.h" ++ ++void au_hfput(struct au_hfile *hf, struct file *file) ++{ ++ /* todo: direct access f_flags */ ++ if (vfsub_file_flags(file) & __FMODE_EXEC) ++ allow_write_access(hf->hf_file); ++ fput(hf->hf_file); ++ hf->hf_file = NULL; ++ atomic_dec(&hf->hf_br->br_count); ++ hf->hf_br = NULL; ++} ++ ++void au_set_h_fptr(struct file *file, aufs_bindex_t bindex, struct file *val) ++{ ++ struct au_finfo *finfo = au_fi(file); ++ struct au_hfile *hf; ++ struct au_fidir *fidir; ++ ++ fidir = finfo->fi_hdir; ++ if (!fidir) { ++ AuDebugOn(finfo->fi_btop != bindex); ++ hf = &finfo->fi_htop; ++ } else ++ hf = fidir->fd_hfile + bindex; ++ ++ if (hf && hf->hf_file) ++ au_hfput(hf, file); ++ if (val) { ++ FiMustWriteLock(file); ++ AuDebugOn(IS_ERR_OR_NULL(file->f_dentry)); ++ hf->hf_file = val; ++ hf->hf_br = au_sbr(file->f_dentry->d_sb, bindex); ++ } ++} ++ ++void au_update_figen(struct file *file) ++{ ++ atomic_set(&au_fi(file)->fi_generation, au_digen(file->f_dentry)); ++ /* smp_mb(); */ /* atomic_set */ ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++struct au_fidir *au_fidir_alloc(struct super_block *sb) ++{ ++ struct au_fidir *fidir; ++ int nbr; ++ ++ nbr = au_sbend(sb) + 1; ++ if (nbr < 2) ++ nbr = 2; /* initial allocate for 2 branches */ ++ fidir = kzalloc(au_fidir_sz(nbr), GFP_NOFS); ++ if (fidir) { ++ fidir->fd_bbot = -1; ++ fidir->fd_nent = nbr; ++ } ++ ++ return fidir; ++} ++ ++int au_fidir_realloc(struct au_finfo *finfo, int nbr) ++{ ++ int err; ++ struct au_fidir *fidir, *p; ++ ++ AuRwMustWriteLock(&finfo->fi_rwsem); ++ fidir = finfo->fi_hdir; ++ AuDebugOn(!fidir); ++ ++ err = -ENOMEM; ++ p = au_kzrealloc(fidir, au_fidir_sz(fidir->fd_nent), au_fidir_sz(nbr), ++ GFP_NOFS); ++ if (p) { ++ p->fd_nent = nbr; ++ finfo->fi_hdir = p; ++ err = 0; ++ } ++ ++ return err; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++void au_finfo_fin(struct file *file) ++{ ++ struct au_finfo *finfo; ++ ++ au_nfiles_dec(file->f_dentry->d_sb); ++ ++ finfo = au_fi(file); ++ AuDebugOn(finfo->fi_hdir); ++ AuRwDestroy(&finfo->fi_rwsem); ++ au_cache_free_finfo(finfo); ++} ++ ++void au_fi_init_once(void *_finfo) ++{ ++ struct au_finfo *finfo = _finfo; ++ static struct lock_class_key aufs_fi; ++ ++ au_rw_init(&finfo->fi_rwsem); ++ au_rw_class(&finfo->fi_rwsem, &aufs_fi); ++} ++ ++int au_finfo_init(struct file *file, struct au_fidir *fidir) ++{ ++ int err; ++ struct au_finfo *finfo; ++ struct dentry *dentry; ++ ++ err = -ENOMEM; ++ dentry = file->f_dentry; ++ finfo = au_cache_alloc_finfo(); ++ if (unlikely(!finfo)) ++ goto out; ++ ++ err = 0; ++ au_nfiles_inc(dentry->d_sb); ++ /* verbose coding for lock class name */ ++ if (!fidir) ++ au_rw_class(&finfo->fi_rwsem, au_lc_key + AuLcNonDir_FIINFO); ++ else ++ au_rw_class(&finfo->fi_rwsem, au_lc_key + AuLcDir_FIINFO); ++ au_rw_write_lock(&finfo->fi_rwsem); ++ finfo->fi_btop = -1; ++ finfo->fi_hdir = fidir; ++ atomic_set(&finfo->fi_generation, au_digen(dentry)); ++ /* smp_mb(); */ /* atomic_set */ ++ ++ file->private_data = finfo; ++ ++out: ++ return err; ++} +diff --git a/fs/aufs/fstype.h b/fs/aufs/fstype.h +new file mode 100644 +index 0000000..2842400 +--- /dev/null ++++ b/fs/aufs/fstype.h +@@ -0,0 +1,400 @@ ++/* ++ * Copyright (C) 2005-2016 Junjiro R. Okajima ++ * ++ * This program, aufs is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . ++ */ ++ ++/* ++ * judging filesystem type ++ */ ++ ++#ifndef __AUFS_FSTYPE_H__ ++#define __AUFS_FSTYPE_H__ ++ ++#ifdef __KERNEL__ ++ ++#include ++#include ++#include ++#include ++ ++static inline int au_test_aufs(struct super_block *sb) ++{ ++ return sb->s_magic == AUFS_SUPER_MAGIC; ++} ++ ++static inline const char *au_sbtype(struct super_block *sb) ++{ ++ return sb->s_type->name; ++} ++ ++static inline int au_test_iso9660(struct super_block *sb __maybe_unused) ++{ ++#if defined(CONFIG_ISO9660_FS) || defined(CONFIG_ISO9660_FS_MODULE) ++ return sb->s_magic == ISOFS_SUPER_MAGIC; ++#else ++ return 0; ++#endif ++} ++ ++static inline int au_test_romfs(struct super_block *sb __maybe_unused) ++{ ++#if defined(CONFIG_ROMFS_FS) || defined(CONFIG_ROMFS_FS_MODULE) ++ return sb->s_magic == ROMFS_MAGIC; ++#else ++ return 0; ++#endif ++} ++ ++static inline int au_test_cramfs(struct super_block *sb __maybe_unused) ++{ ++#if defined(CONFIG_CRAMFS) || defined(CONFIG_CRAMFS_MODULE) ++ return sb->s_magic == CRAMFS_MAGIC; ++#endif ++ return 0; ++} ++ ++static inline int au_test_nfs(struct super_block *sb __maybe_unused) ++{ ++#if defined(CONFIG_NFS_FS) || defined(CONFIG_NFS_FS_MODULE) ++ return sb->s_magic == NFS_SUPER_MAGIC; ++#else ++ return 0; ++#endif ++} ++ ++static inline int au_test_fuse(struct super_block *sb __maybe_unused) ++{ ++#if defined(CONFIG_FUSE_FS) || defined(CONFIG_FUSE_FS_MODULE) ++ return sb->s_magic == FUSE_SUPER_MAGIC; ++#else ++ return 0; ++#endif ++} ++ ++static inline int au_test_xfs(struct super_block *sb __maybe_unused) ++{ ++#if defined(CONFIG_XFS_FS) || defined(CONFIG_XFS_FS_MODULE) ++ return sb->s_magic == XFS_SB_MAGIC; ++#else ++ return 0; ++#endif ++} ++ ++static inline int au_test_tmpfs(struct super_block *sb __maybe_unused) ++{ ++#ifdef CONFIG_TMPFS ++ return sb->s_magic == TMPFS_MAGIC; ++#else ++ return 0; ++#endif ++} ++ ++static inline int au_test_ecryptfs(struct super_block *sb __maybe_unused) ++{ ++#if defined(CONFIG_ECRYPT_FS) || defined(CONFIG_ECRYPT_FS_MODULE) ++ return !strcmp(au_sbtype(sb), "ecryptfs"); ++#else ++ return 0; ++#endif ++} ++ ++static inline int au_test_ramfs(struct super_block *sb) ++{ ++ return sb->s_magic == RAMFS_MAGIC; ++} ++ ++static inline int au_test_ubifs(struct super_block *sb __maybe_unused) ++{ ++#if defined(CONFIG_UBIFS_FS) || defined(CONFIG_UBIFS_FS_MODULE) ++ return sb->s_magic == UBIFS_SUPER_MAGIC; ++#else ++ return 0; ++#endif ++} ++ ++static inline int au_test_procfs(struct super_block *sb __maybe_unused) ++{ ++#ifdef CONFIG_PROC_FS ++ return sb->s_magic == PROC_SUPER_MAGIC; ++#else ++ return 0; ++#endif ++} ++ ++static inline int au_test_sysfs(struct super_block *sb __maybe_unused) ++{ ++#ifdef CONFIG_SYSFS ++ return sb->s_magic == SYSFS_MAGIC; ++#else ++ return 0; ++#endif ++} ++ ++static inline int au_test_configfs(struct super_block *sb __maybe_unused) ++{ ++#if defined(CONFIG_CONFIGFS_FS) || defined(CONFIG_CONFIGFS_FS_MODULE) ++ return sb->s_magic == CONFIGFS_MAGIC; ++#else ++ return 0; ++#endif ++} ++ ++static inline int au_test_minix(struct super_block *sb __maybe_unused) ++{ ++#if defined(CONFIG_MINIX_FS) || defined(CONFIG_MINIX_FS_MODULE) ++ return sb->s_magic == MINIX3_SUPER_MAGIC ++ || sb->s_magic == MINIX2_SUPER_MAGIC ++ || sb->s_magic == MINIX2_SUPER_MAGIC2 ++ || sb->s_magic == MINIX_SUPER_MAGIC ++ || sb->s_magic == MINIX_SUPER_MAGIC2; ++#else ++ return 0; ++#endif ++} ++ ++static inline int au_test_fat(struct super_block *sb __maybe_unused) ++{ ++#if defined(CONFIG_FAT_FS) || defined(CONFIG_FAT_FS_MODULE) ++ return sb->s_magic == MSDOS_SUPER_MAGIC; ++#else ++ return 0; ++#endif ++} ++ ++static inline int au_test_msdos(struct super_block *sb) ++{ ++ return au_test_fat(sb); ++} ++ ++static inline int au_test_vfat(struct super_block *sb) ++{ ++ return au_test_fat(sb); ++} ++ ++static inline int au_test_securityfs(struct super_block *sb __maybe_unused) ++{ ++#ifdef CONFIG_SECURITYFS ++ return sb->s_magic == SECURITYFS_MAGIC; ++#else ++ return 0; ++#endif ++} ++ ++static inline int au_test_squashfs(struct super_block *sb __maybe_unused) ++{ ++#if defined(CONFIG_SQUASHFS) || defined(CONFIG_SQUASHFS_MODULE) ++ return sb->s_magic == SQUASHFS_MAGIC; ++#else ++ return 0; ++#endif ++} ++ ++static inline int au_test_btrfs(struct super_block *sb __maybe_unused) ++{ ++#if defined(CONFIG_BTRFS_FS) || defined(CONFIG_BTRFS_FS_MODULE) ++ return sb->s_magic == BTRFS_SUPER_MAGIC; ++#else ++ return 0; ++#endif ++} ++ ++static inline int au_test_xenfs(struct super_block *sb __maybe_unused) ++{ ++#if defined(CONFIG_XENFS) || defined(CONFIG_XENFS_MODULE) ++ return sb->s_magic == XENFS_SUPER_MAGIC; ++#else ++ return 0; ++#endif ++} ++ ++static inline int au_test_debugfs(struct super_block *sb __maybe_unused) ++{ ++#ifdef CONFIG_DEBUG_FS ++ return sb->s_magic == DEBUGFS_MAGIC; ++#else ++ return 0; ++#endif ++} ++ ++static inline int au_test_nilfs(struct super_block *sb __maybe_unused) ++{ ++#if defined(CONFIG_NILFS) || defined(CONFIG_NILFS_MODULE) ++ return sb->s_magic == NILFS_SUPER_MAGIC; ++#else ++ return 0; ++#endif ++} ++ ++static inline int au_test_hfsplus(struct super_block *sb __maybe_unused) ++{ ++#if defined(CONFIG_HFSPLUS_FS) || defined(CONFIG_HFSPLUS_FS_MODULE) ++ return sb->s_magic == HFSPLUS_SUPER_MAGIC; ++#else ++ return 0; ++#endif ++} ++ ++/* ---------------------------------------------------------------------- */ ++/* ++ * they can't be an aufs branch. ++ */ ++static inline int au_test_fs_unsuppoted(struct super_block *sb) ++{ ++ return ++#ifndef CONFIG_AUFS_BR_RAMFS ++ au_test_ramfs(sb) || ++#endif ++ au_test_procfs(sb) ++ || au_test_sysfs(sb) ++ || au_test_configfs(sb) ++ || au_test_debugfs(sb) ++ || au_test_securityfs(sb) ++ || au_test_xenfs(sb) ++ || au_test_ecryptfs(sb) ++ /* || !strcmp(au_sbtype(sb), "unionfs") */ ++ || au_test_aufs(sb); /* will be supported in next version */ ++} ++ ++static inline int au_test_fs_remote(struct super_block *sb) ++{ ++ return !au_test_tmpfs(sb) ++#ifdef CONFIG_AUFS_BR_RAMFS ++ && !au_test_ramfs(sb) ++#endif ++ && !(sb->s_type->fs_flags & FS_REQUIRES_DEV); ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++/* ++ * Note: these functions (below) are created after reading ->getattr() in all ++ * filesystems under linux/fs. it means we have to do so in every update... ++ */ ++ ++/* ++ * some filesystems require getattr to refresh the inode attributes before ++ * referencing. ++ * in most cases, we can rely on the inode attribute in NFS (or every remote fs) ++ * and leave the work for d_revalidate() ++ */ ++static inline int au_test_fs_refresh_iattr(struct super_block *sb) ++{ ++ return au_test_nfs(sb) ++ || au_test_fuse(sb) ++ /* || au_test_btrfs(sb) */ /* untested */ ++ ; ++} ++ ++/* ++ * filesystems which don't maintain i_size or i_blocks. ++ */ ++static inline int au_test_fs_bad_iattr_size(struct super_block *sb) ++{ ++ return au_test_xfs(sb) ++ || au_test_btrfs(sb) ++ || au_test_ubifs(sb) ++ || au_test_hfsplus(sb) /* maintained, but incorrect */ ++ /* || au_test_minix(sb) */ /* untested */ ++ ; ++} ++ ++/* ++ * filesystems which don't store the correct value in some of their inode ++ * attributes. ++ */ ++static inline int au_test_fs_bad_iattr(struct super_block *sb) ++{ ++ return au_test_fs_bad_iattr_size(sb) ++ || au_test_fat(sb) ++ || au_test_msdos(sb) ++ || au_test_vfat(sb); ++} ++ ++/* they don't check i_nlink in link(2) */ ++static inline int au_test_fs_no_limit_nlink(struct super_block *sb) ++{ ++ return au_test_tmpfs(sb) ++#ifdef CONFIG_AUFS_BR_RAMFS ++ || au_test_ramfs(sb) ++#endif ++ || au_test_ubifs(sb) ++ || au_test_hfsplus(sb); ++} ++ ++/* ++ * filesystems which sets S_NOATIME and S_NOCMTIME. ++ */ ++static inline int au_test_fs_notime(struct super_block *sb) ++{ ++ return au_test_nfs(sb) ++ || au_test_fuse(sb) ++ || au_test_ubifs(sb) ++ ; ++} ++ ++/* temporary support for i#1 in cramfs */ ++static inline int au_test_fs_unique_ino(struct inode *inode) ++{ ++ if (au_test_cramfs(inode->i_sb)) ++ return inode->i_ino != 1; ++ return 1; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++/* ++ * the filesystem where the xino files placed must support i/o after unlink and ++ * maintain i_size and i_blocks. ++ */ ++static inline int au_test_fs_bad_xino(struct super_block *sb) ++{ ++ return au_test_fs_remote(sb) ++ || au_test_fs_bad_iattr_size(sb) ++ /* don't want unnecessary work for xino */ ++ || au_test_aufs(sb) ++ || au_test_ecryptfs(sb) ++ || au_test_nilfs(sb); ++} ++ ++static inline int au_test_fs_trunc_xino(struct super_block *sb) ++{ ++ return au_test_tmpfs(sb) ++ || au_test_ramfs(sb); ++} ++ ++/* ++ * test if the @sb is real-readonly. ++ */ ++static inline int au_test_fs_rr(struct super_block *sb) ++{ ++ return au_test_squashfs(sb) ++ || au_test_iso9660(sb) ++ || au_test_cramfs(sb) ++ || au_test_romfs(sb); ++} ++ ++/* ++ * test if the @inode is nfs with 'noacl' option ++ * NFS always sets MS_POSIXACL regardless its mount option 'noacl.' ++ */ ++static inline int au_test_nfs_noacl(struct inode *inode) ++{ ++ return au_test_nfs(inode->i_sb) ++ /* && IS_POSIXACL(inode) */ ++ && !nfs_server_capable(inode, NFS_CAP_ACLS); ++} ++ ++#endif /* __KERNEL__ */ ++#endif /* __AUFS_FSTYPE_H__ */ +diff --git a/fs/aufs/hfsnotify.c b/fs/aufs/hfsnotify.c +new file mode 100644 +index 0000000..6fa79b0 +--- /dev/null ++++ b/fs/aufs/hfsnotify.c +@@ -0,0 +1,288 @@ ++/* ++ * Copyright (C) 2005-2016 Junjiro R. Okajima ++ * ++ * This program, aufs is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . ++ */ ++ ++/* ++ * fsnotify for the lower directories ++ */ ++ ++#include "aufs.h" ++ ++/* FS_IN_IGNORED is unnecessary */ ++static const __u32 AuHfsnMask = (FS_MOVED_TO | FS_MOVED_FROM | FS_DELETE ++ | FS_CREATE | FS_EVENT_ON_CHILD); ++static DECLARE_WAIT_QUEUE_HEAD(au_hfsn_wq); ++static __cacheline_aligned_in_smp atomic64_t au_hfsn_ifree = ATOMIC64_INIT(0); ++ ++static void au_hfsn_free_mark(struct fsnotify_mark *mark) ++{ ++ struct au_hnotify *hn = container_of(mark, struct au_hnotify, ++ hn_mark); ++ AuDbg("here\n"); ++ au_cache_free_hnotify(hn); ++ smp_mb__before_atomic(); ++ if (atomic64_dec_and_test(&au_hfsn_ifree)) ++ wake_up(&au_hfsn_wq); ++} ++ ++static int au_hfsn_alloc(struct au_hinode *hinode) ++{ ++ int err; ++ struct au_hnotify *hn; ++ struct super_block *sb; ++ struct au_branch *br; ++ struct fsnotify_mark *mark; ++ aufs_bindex_t bindex; ++ ++ hn = hinode->hi_notify; ++ sb = hn->hn_aufs_inode->i_sb; ++ bindex = au_br_index(sb, hinode->hi_id); ++ br = au_sbr(sb, bindex); ++ AuDebugOn(!br->br_hfsn); ++ ++ mark = &hn->hn_mark; ++ fsnotify_init_mark(mark, au_hfsn_free_mark); ++ mark->mask = AuHfsnMask; ++ /* ++ * by udba rename or rmdir, aufs assign a new inode to the known ++ * h_inode, so specify 1 to allow dups. ++ */ ++ lockdep_off(); ++ err = fsnotify_add_mark(mark, br->br_hfsn->hfsn_group, hinode->hi_inode, ++ /*mnt*/NULL, /*allow_dups*/1); ++ /* even if err */ ++ fsnotify_put_mark(mark); ++ lockdep_on(); ++ ++ return err; ++} ++ ++static int au_hfsn_free(struct au_hinode *hinode, struct au_hnotify *hn) ++{ ++ struct fsnotify_mark *mark; ++ unsigned long long ull; ++ struct fsnotify_group *group; ++ ++ ull = atomic64_inc_return(&au_hfsn_ifree); ++ BUG_ON(!ull); ++ ++ mark = &hn->hn_mark; ++ spin_lock(&mark->lock); ++ group = mark->group; ++ fsnotify_get_group(group); ++ spin_unlock(&mark->lock); ++ lockdep_off(); ++ fsnotify_destroy_mark(mark, group); ++ fsnotify_put_group(group); ++ lockdep_on(); ++ ++ /* free hn by myself */ ++ return 0; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++static void au_hfsn_ctl(struct au_hinode *hinode, int do_set) ++{ ++ struct fsnotify_mark *mark; ++ ++ mark = &hinode->hi_notify->hn_mark; ++ spin_lock(&mark->lock); ++ if (do_set) { ++ AuDebugOn(mark->mask & AuHfsnMask); ++ mark->mask |= AuHfsnMask; ++ } else { ++ AuDebugOn(!(mark->mask & AuHfsnMask)); ++ mark->mask &= ~AuHfsnMask; ++ } ++ spin_unlock(&mark->lock); ++ /* fsnotify_recalc_inode_mask(hinode->hi_inode); */ ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++/* #define AuDbgHnotify */ ++#ifdef AuDbgHnotify ++static char *au_hfsn_name(u32 mask) ++{ ++#ifdef CONFIG_AUFS_DEBUG ++#define test_ret(flag) \ ++ do { \ ++ if (mask & flag) \ ++ return #flag; \ ++ } while (0) ++ test_ret(FS_ACCESS); ++ test_ret(FS_MODIFY); ++ test_ret(FS_ATTRIB); ++ test_ret(FS_CLOSE_WRITE); ++ test_ret(FS_CLOSE_NOWRITE); ++ test_ret(FS_OPEN); ++ test_ret(FS_MOVED_FROM); ++ test_ret(FS_MOVED_TO); ++ test_ret(FS_CREATE); ++ test_ret(FS_DELETE); ++ test_ret(FS_DELETE_SELF); ++ test_ret(FS_MOVE_SELF); ++ test_ret(FS_UNMOUNT); ++ test_ret(FS_Q_OVERFLOW); ++ test_ret(FS_IN_IGNORED); ++ test_ret(FS_ISDIR); ++ test_ret(FS_IN_ONESHOT); ++ test_ret(FS_EVENT_ON_CHILD); ++ return ""; ++#undef test_ret ++#else ++ return "??"; ++#endif ++} ++#endif ++ ++/* ---------------------------------------------------------------------- */ ++ ++static void au_hfsn_free_group(struct fsnotify_group *group) ++{ ++ struct au_br_hfsnotify *hfsn = group->private; ++ ++ AuDbg("here\n"); ++ kfree(hfsn); ++} ++ ++static int au_hfsn_handle_event(struct fsnotify_group *group, ++ struct inode *inode, ++ struct fsnotify_mark *inode_mark, ++ struct fsnotify_mark *vfsmount_mark, ++ u32 mask, void *data, int data_type, ++ const unsigned char *file_name, u32 cookie) ++{ ++ int err; ++ struct au_hnotify *hnotify; ++ struct inode *h_dir, *h_inode; ++ struct qstr h_child_qstr = QSTR_INIT(file_name, strlen(file_name)); ++ ++ AuDebugOn(data_type != FSNOTIFY_EVENT_INODE); ++ ++ err = 0; ++ /* if FS_UNMOUNT happens, there must be another bug */ ++ AuDebugOn(mask & FS_UNMOUNT); ++ if (mask & (FS_IN_IGNORED | FS_UNMOUNT)) ++ goto out; ++ ++ h_dir = inode; ++ h_inode = NULL; ++#ifdef AuDbgHnotify ++ au_debug_on(); ++ if (1 || h_child_qstr.len != sizeof(AUFS_XINO_FNAME) - 1 ++ || strncmp(h_child_qstr.name, AUFS_XINO_FNAME, h_child_qstr.len)) { ++ AuDbg("i%lu, mask 0x%x %s, hcname %.*s, hi%lu\n", ++ h_dir->i_ino, mask, au_hfsn_name(mask), ++ AuLNPair(&h_child_qstr), h_inode ? h_inode->i_ino : 0); ++ /* WARN_ON(1); */ ++ } ++ au_debug_off(); ++#endif ++ ++ AuDebugOn(!inode_mark); ++ hnotify = container_of(inode_mark, struct au_hnotify, hn_mark); ++ err = au_hnotify(h_dir, hnotify, mask, &h_child_qstr, h_inode); ++ ++out: ++ return err; ++} ++ ++static struct fsnotify_ops au_hfsn_ops = { ++ .handle_event = au_hfsn_handle_event, ++ .free_group_priv = au_hfsn_free_group ++}; ++ ++/* ---------------------------------------------------------------------- */ ++ ++static void au_hfsn_fin_br(struct au_branch *br) ++{ ++ struct au_br_hfsnotify *hfsn; ++ ++ hfsn = br->br_hfsn; ++ if (hfsn) { ++ lockdep_off(); ++ fsnotify_put_group(hfsn->hfsn_group); ++ lockdep_on(); ++ } ++} ++ ++static int au_hfsn_init_br(struct au_branch *br, int perm) ++{ ++ int err; ++ struct fsnotify_group *group; ++ struct au_br_hfsnotify *hfsn; ++ ++ err = 0; ++ br->br_hfsn = NULL; ++ if (!au_br_hnotifyable(perm)) ++ goto out; ++ ++ err = -ENOMEM; ++ hfsn = kmalloc(sizeof(*hfsn), GFP_NOFS); ++ if (unlikely(!hfsn)) ++ goto out; ++ ++ err = 0; ++ group = fsnotify_alloc_group(&au_hfsn_ops); ++ if (IS_ERR(group)) { ++ err = PTR_ERR(group); ++ pr_err("fsnotify_alloc_group() failed, %d\n", err); ++ goto out_hfsn; ++ } ++ ++ group->private = hfsn; ++ hfsn->hfsn_group = group; ++ br->br_hfsn = hfsn; ++ goto out; /* success */ ++ ++out_hfsn: ++ kfree(hfsn); ++out: ++ return err; ++} ++ ++static int au_hfsn_reset_br(unsigned int udba, struct au_branch *br, int perm) ++{ ++ int err; ++ ++ err = 0; ++ if (!br->br_hfsn) ++ err = au_hfsn_init_br(br, perm); ++ ++ return err; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++static void au_hfsn_fin(void) ++{ ++ AuDbg("au_hfsn_ifree %lld\n", (long long)atomic64_read(&au_hfsn_ifree)); ++ wait_event(au_hfsn_wq, !atomic64_read(&au_hfsn_ifree)); ++} ++ ++const struct au_hnotify_op au_hnotify_op = { ++ .ctl = au_hfsn_ctl, ++ .alloc = au_hfsn_alloc, ++ .free = au_hfsn_free, ++ ++ .fin = au_hfsn_fin, ++ ++ .reset_br = au_hfsn_reset_br, ++ .fin_br = au_hfsn_fin_br, ++ .init_br = au_hfsn_init_br ++}; +diff --git a/fs/aufs/hfsplus.c b/fs/aufs/hfsplus.c +new file mode 100644 +index 0000000..8a54c82 +--- /dev/null ++++ b/fs/aufs/hfsplus.c +@@ -0,0 +1,56 @@ ++/* ++ * Copyright (C) 2010-2016 Junjiro R. Okajima ++ * ++ * This program, aufs is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . ++ */ ++ ++/* ++ * special support for filesystems which aqucires an inode mutex ++ * at final closing a file, eg, hfsplus. ++ * ++ * This trick is very simple and stupid, just to open the file before really ++ * neceeary open to tell hfsplus that this is not the final closing. ++ * The caller should call au_h_open_pre() after acquiring the inode mutex, ++ * and au_h_open_post() after releasing it. ++ */ ++ ++#include "aufs.h" ++ ++struct file *au_h_open_pre(struct dentry *dentry, aufs_bindex_t bindex, ++ int force_wr) ++{ ++ struct file *h_file; ++ struct dentry *h_dentry; ++ ++ h_dentry = au_h_dptr(dentry, bindex); ++ AuDebugOn(!h_dentry); ++ AuDebugOn(!h_dentry->d_inode); ++ ++ h_file = NULL; ++ if (au_test_hfsplus(h_dentry->d_sb) ++ && S_ISREG(h_dentry->d_inode->i_mode)) ++ h_file = au_h_open(dentry, bindex, ++ O_RDONLY | O_NOATIME | O_LARGEFILE, ++ /*file*/NULL, force_wr); ++ return h_file; ++} ++ ++void au_h_open_post(struct dentry *dentry, aufs_bindex_t bindex, ++ struct file *h_file) ++{ ++ if (h_file) { ++ fput(h_file); ++ au_sbr_put(dentry->d_sb, bindex); ++ } ++} +diff --git a/fs/aufs/hnotify.c b/fs/aufs/hnotify.c +new file mode 100644 +index 0000000..1801420 +--- /dev/null ++++ b/fs/aufs/hnotify.c +@@ -0,0 +1,714 @@ ++/* ++ * Copyright (C) 2005-2016 Junjiro R. Okajima ++ * ++ * This program, aufs is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . ++ */ ++ ++/* ++ * abstraction to notify the direct changes on lower directories ++ */ ++ ++#include "aufs.h" ++ ++int au_hn_alloc(struct au_hinode *hinode, struct inode *inode) ++{ ++ int err; ++ struct au_hnotify *hn; ++ ++ err = -ENOMEM; ++ hn = au_cache_alloc_hnotify(); ++ if (hn) { ++ hn->hn_aufs_inode = inode; ++ hinode->hi_notify = hn; ++ err = au_hnotify_op.alloc(hinode); ++ AuTraceErr(err); ++ if (unlikely(err)) { ++ hinode->hi_notify = NULL; ++ au_cache_free_hnotify(hn); ++ /* ++ * The upper dir was removed by udba, but the same named ++ * dir left. In this case, aufs assignes a new inode ++ * number and set the monitor again. ++ * For the lower dir, the old monitnor is still left. ++ */ ++ if (err == -EEXIST) ++ err = 0; ++ } ++ } ++ ++ AuTraceErr(err); ++ return err; ++} ++ ++void au_hn_free(struct au_hinode *hinode) ++{ ++ struct au_hnotify *hn; ++ ++ hn = hinode->hi_notify; ++ if (hn) { ++ hinode->hi_notify = NULL; ++ if (au_hnotify_op.free(hinode, hn)) ++ au_cache_free_hnotify(hn); ++ } ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++void au_hn_ctl(struct au_hinode *hinode, int do_set) ++{ ++ if (hinode->hi_notify) ++ au_hnotify_op.ctl(hinode, do_set); ++} ++ ++void au_hn_reset(struct inode *inode, unsigned int flags) ++{ ++ aufs_bindex_t bindex, bend; ++ struct inode *hi; ++ struct dentry *iwhdentry; ++ ++ bend = au_ibend(inode); ++ for (bindex = au_ibstart(inode); bindex <= bend; bindex++) { ++ hi = au_h_iptr(inode, bindex); ++ if (!hi) ++ continue; ++ ++ /* mutex_lock_nested(&hi->i_mutex, AuLsc_I_CHILD); */ ++ iwhdentry = au_hi_wh(inode, bindex); ++ if (iwhdentry) ++ dget(iwhdentry); ++ au_igrab(hi); ++ au_set_h_iptr(inode, bindex, NULL, 0); ++ au_set_h_iptr(inode, bindex, au_igrab(hi), ++ flags & ~AuHi_XINO); ++ iput(hi); ++ dput(iwhdentry); ++ /* mutex_unlock(&hi->i_mutex); */ ++ } ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++static int hn_xino(struct inode *inode, struct inode *h_inode) ++{ ++ int err; ++ aufs_bindex_t bindex, bend, bfound, bstart; ++ struct inode *h_i; ++ ++ err = 0; ++ if (unlikely(inode->i_ino == AUFS_ROOT_INO)) { ++ pr_warn("branch root dir was changed\n"); ++ goto out; ++ } ++ ++ bfound = -1; ++ bend = au_ibend(inode); ++ bstart = au_ibstart(inode); ++#if 0 /* reserved for future use */ ++ if (bindex == bend) { ++ /* keep this ino in rename case */ ++ goto out; ++ } ++#endif ++ for (bindex = bstart; bindex <= bend; bindex++) ++ if (au_h_iptr(inode, bindex) == h_inode) { ++ bfound = bindex; ++ break; ++ } ++ if (bfound < 0) ++ goto out; ++ ++ for (bindex = bstart; bindex <= bend; bindex++) { ++ h_i = au_h_iptr(inode, bindex); ++ if (!h_i) ++ continue; ++ ++ err = au_xino_write(inode->i_sb, bindex, h_i->i_ino, /*ino*/0); ++ /* ignore this error */ ++ /* bad action? */ ++ } ++ ++ /* children inode number will be broken */ ++ ++out: ++ AuTraceErr(err); ++ return err; ++} ++ ++static int hn_gen_tree(struct dentry *dentry) ++{ ++ int err, i, j, ndentry; ++ struct au_dcsub_pages dpages; ++ struct au_dpage *dpage; ++ struct dentry **dentries; ++ ++ err = au_dpages_init(&dpages, GFP_NOFS); ++ if (unlikely(err)) ++ goto out; ++ err = au_dcsub_pages(&dpages, dentry, NULL, NULL); ++ if (unlikely(err)) ++ goto out_dpages; ++ ++ for (i = 0; i < dpages.ndpage; i++) { ++ dpage = dpages.dpages + i; ++ dentries = dpage->dentries; ++ ndentry = dpage->ndentry; ++ for (j = 0; j < ndentry; j++) { ++ struct dentry *d; ++ ++ d = dentries[j]; ++ if (IS_ROOT(d)) ++ continue; ++ ++ au_digen_dec(d); ++ if (d->d_inode) ++ /* todo: reset children xino? ++ cached children only? */ ++ au_iigen_dec(d->d_inode); ++ } ++ } ++ ++out_dpages: ++ au_dpages_free(&dpages); ++ ++#if 0 ++ /* discard children */ ++ dentry_unhash(dentry); ++ dput(dentry); ++#endif ++out: ++ return err; ++} ++ ++/* ++ * return 0 if processed. ++ */ ++static int hn_gen_by_inode(char *name, unsigned int nlen, struct inode *inode, ++ const unsigned int isdir) ++{ ++ int err; ++ struct dentry *d; ++ struct qstr *dname; ++ ++ err = 1; ++ if (unlikely(inode->i_ino == AUFS_ROOT_INO)) { ++ pr_warn("branch root dir was changed\n"); ++ err = 0; ++ goto out; ++ } ++ ++ if (!isdir) { ++ AuDebugOn(!name); ++ au_iigen_dec(inode); ++ spin_lock(&inode->i_lock); ++ hlist_for_each_entry(d, &inode->i_dentry, d_u.d_alias) { ++ spin_lock(&d->d_lock); ++ dname = &d->d_name; ++ if (dname->len != nlen ++ && memcmp(dname->name, name, nlen)) { ++ spin_unlock(&d->d_lock); ++ continue; ++ } ++ err = 0; ++ au_digen_dec(d); ++ spin_unlock(&d->d_lock); ++ break; ++ } ++ spin_unlock(&inode->i_lock); ++ } else { ++ au_fset_si(au_sbi(inode->i_sb), FAILED_REFRESH_DIR); ++ d = d_find_any_alias(inode); ++ if (!d) { ++ au_iigen_dec(inode); ++ goto out; ++ } ++ ++ spin_lock(&d->d_lock); ++ dname = &d->d_name; ++ if (dname->len == nlen && !memcmp(dname->name, name, nlen)) { ++ spin_unlock(&d->d_lock); ++ err = hn_gen_tree(d); ++ spin_lock(&d->d_lock); ++ } ++ spin_unlock(&d->d_lock); ++ dput(d); ++ } ++ ++out: ++ AuTraceErr(err); ++ return err; ++} ++ ++static int hn_gen_by_name(struct dentry *dentry, const unsigned int isdir) ++{ ++ int err; ++ struct inode *inode; ++ ++ inode = dentry->d_inode; ++ if (IS_ROOT(dentry) ++ /* || (inode && inode->i_ino == AUFS_ROOT_INO) */ ++ ) { ++ pr_warn("branch root dir was changed\n"); ++ return 0; ++ } ++ ++ err = 0; ++ if (!isdir) { ++ au_digen_dec(dentry); ++ if (inode) ++ au_iigen_dec(inode); ++ } else { ++ au_fset_si(au_sbi(dentry->d_sb), FAILED_REFRESH_DIR); ++ if (inode) ++ err = hn_gen_tree(dentry); ++ } ++ ++ AuTraceErr(err); ++ return err; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++/* hnotify job flags */ ++#define AuHnJob_XINO0 1 ++#define AuHnJob_GEN (1 << 1) ++#define AuHnJob_DIRENT (1 << 2) ++#define AuHnJob_ISDIR (1 << 3) ++#define AuHnJob_TRYXINO0 (1 << 4) ++#define AuHnJob_MNTPNT (1 << 5) ++#define au_ftest_hnjob(flags, name) ((flags) & AuHnJob_##name) ++#define au_fset_hnjob(flags, name) \ ++ do { (flags) |= AuHnJob_##name; } while (0) ++#define au_fclr_hnjob(flags, name) \ ++ do { (flags) &= ~AuHnJob_##name; } while (0) ++ ++enum { ++ AuHn_CHILD, ++ AuHn_PARENT, ++ AuHnLast ++}; ++ ++struct au_hnotify_args { ++ struct inode *h_dir, *dir, *h_child_inode; ++ u32 mask; ++ unsigned int flags[AuHnLast]; ++ unsigned int h_child_nlen; ++ char h_child_name[]; ++}; ++ ++struct hn_job_args { ++ unsigned int flags; ++ struct inode *inode, *h_inode, *dir, *h_dir; ++ struct dentry *dentry; ++ char *h_name; ++ int h_nlen; ++}; ++ ++static int hn_job(struct hn_job_args *a) ++{ ++ const unsigned int isdir = au_ftest_hnjob(a->flags, ISDIR); ++ int e; ++ ++ /* reset xino */ ++ if (au_ftest_hnjob(a->flags, XINO0) && a->inode) ++ hn_xino(a->inode, a->h_inode); /* ignore this error */ ++ ++ if (au_ftest_hnjob(a->flags, TRYXINO0) ++ && a->inode ++ && a->h_inode) { ++ mutex_lock_nested(&a->h_inode->i_mutex, AuLsc_I_CHILD); ++ if (!a->h_inode->i_nlink ++ && !(a->h_inode->i_state & I_LINKABLE)) ++ hn_xino(a->inode, a->h_inode); /* ignore this error */ ++ mutex_unlock(&a->h_inode->i_mutex); ++ } ++ ++ /* make the generation obsolete */ ++ if (au_ftest_hnjob(a->flags, GEN)) { ++ e = -1; ++ if (a->inode) ++ e = hn_gen_by_inode(a->h_name, a->h_nlen, a->inode, ++ isdir); ++ if (e && a->dentry) ++ hn_gen_by_name(a->dentry, isdir); ++ /* ignore this error */ ++ } ++ ++ /* make dir entries obsolete */ ++ if (au_ftest_hnjob(a->flags, DIRENT) && a->inode) { ++ struct au_vdir *vdir; ++ ++ vdir = au_ivdir(a->inode); ++ if (vdir) ++ vdir->vd_jiffy = 0; ++ /* IMustLock(a->inode); */ ++ /* a->inode->i_version++; */ ++ } ++ ++ /* can do nothing but warn */ ++ if (au_ftest_hnjob(a->flags, MNTPNT) ++ && a->dentry ++ && d_mountpoint(a->dentry)) ++ pr_warn("mount-point %pd is removed or renamed\n", a->dentry); ++ ++ return 0; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++static struct dentry *lookup_wlock_by_name(char *name, unsigned int nlen, ++ struct inode *dir) ++{ ++ struct dentry *dentry, *d, *parent; ++ struct qstr *dname; ++ ++ parent = d_find_any_alias(dir); ++ if (!parent) ++ return NULL; ++ ++ dentry = NULL; ++ spin_lock(&parent->d_lock); ++ list_for_each_entry(d, &parent->d_subdirs, d_child) { ++ /* AuDbg("%pd\n", d); */ ++ spin_lock_nested(&d->d_lock, DENTRY_D_LOCK_NESTED); ++ dname = &d->d_name; ++ if (dname->len != nlen || memcmp(dname->name, name, nlen)) ++ goto cont_unlock; ++ if (au_di(d)) ++ au_digen_dec(d); ++ else ++ goto cont_unlock; ++ if (au_dcount(d) > 0) { ++ dentry = dget_dlock(d); ++ spin_unlock(&d->d_lock); ++ break; ++ } ++ ++cont_unlock: ++ spin_unlock(&d->d_lock); ++ } ++ spin_unlock(&parent->d_lock); ++ dput(parent); ++ ++ if (dentry) ++ di_write_lock_child(dentry); ++ ++ return dentry; ++} ++ ++static struct inode *lookup_wlock_by_ino(struct super_block *sb, ++ aufs_bindex_t bindex, ino_t h_ino) ++{ ++ struct inode *inode; ++ ino_t ino; ++ int err; ++ ++ inode = NULL; ++ err = au_xino_read(sb, bindex, h_ino, &ino); ++ if (!err && ino) ++ inode = ilookup(sb, ino); ++ if (!inode) ++ goto out; ++ ++ if (unlikely(inode->i_ino == AUFS_ROOT_INO)) { ++ pr_warn("wrong root branch\n"); ++ iput(inode); ++ inode = NULL; ++ goto out; ++ } ++ ++ ii_write_lock_child(inode); ++ ++out: ++ return inode; ++} ++ ++static void au_hn_bh(void *_args) ++{ ++ struct au_hnotify_args *a = _args; ++ struct super_block *sb; ++ aufs_bindex_t bindex, bend, bfound; ++ unsigned char xino, try_iput; ++ int err; ++ struct inode *inode; ++ ino_t h_ino; ++ struct hn_job_args args; ++ struct dentry *dentry; ++ struct au_sbinfo *sbinfo; ++ ++ AuDebugOn(!_args); ++ AuDebugOn(!a->h_dir); ++ AuDebugOn(!a->dir); ++ AuDebugOn(!a->mask); ++ AuDbg("mask 0x%x, i%lu, hi%lu, hci%lu\n", ++ a->mask, a->dir->i_ino, a->h_dir->i_ino, ++ a->h_child_inode ? a->h_child_inode->i_ino : 0); ++ ++ inode = NULL; ++ dentry = NULL; ++ /* ++ * do not lock a->dir->i_mutex here ++ * because of d_revalidate() may cause a deadlock. ++ */ ++ sb = a->dir->i_sb; ++ AuDebugOn(!sb); ++ sbinfo = au_sbi(sb); ++ AuDebugOn(!sbinfo); ++ si_write_lock(sb, AuLock_NOPLMW); ++ ++ ii_read_lock_parent(a->dir); ++ bfound = -1; ++ bend = au_ibend(a->dir); ++ for (bindex = au_ibstart(a->dir); bindex <= bend; bindex++) ++ if (au_h_iptr(a->dir, bindex) == a->h_dir) { ++ bfound = bindex; ++ break; ++ } ++ ii_read_unlock(a->dir); ++ if (unlikely(bfound < 0)) ++ goto out; ++ ++ xino = !!au_opt_test(au_mntflags(sb), XINO); ++ h_ino = 0; ++ if (a->h_child_inode) ++ h_ino = a->h_child_inode->i_ino; ++ ++ if (a->h_child_nlen ++ && (au_ftest_hnjob(a->flags[AuHn_CHILD], GEN) ++ || au_ftest_hnjob(a->flags[AuHn_CHILD], MNTPNT))) ++ dentry = lookup_wlock_by_name(a->h_child_name, a->h_child_nlen, ++ a->dir); ++ try_iput = 0; ++ if (dentry) ++ inode = dentry->d_inode; ++ if (xino && !inode && h_ino ++ && (au_ftest_hnjob(a->flags[AuHn_CHILD], XINO0) ++ || au_ftest_hnjob(a->flags[AuHn_CHILD], TRYXINO0) ++ || au_ftest_hnjob(a->flags[AuHn_CHILD], GEN))) { ++ inode = lookup_wlock_by_ino(sb, bfound, h_ino); ++ try_iput = 1; ++ } ++ ++ args.flags = a->flags[AuHn_CHILD]; ++ args.dentry = dentry; ++ args.inode = inode; ++ args.h_inode = a->h_child_inode; ++ args.dir = a->dir; ++ args.h_dir = a->h_dir; ++ args.h_name = a->h_child_name; ++ args.h_nlen = a->h_child_nlen; ++ err = hn_job(&args); ++ if (dentry) { ++ if (au_di(dentry)) ++ di_write_unlock(dentry); ++ dput(dentry); ++ } ++ if (inode && try_iput) { ++ ii_write_unlock(inode); ++ iput(inode); ++ } ++ ++ ii_write_lock_parent(a->dir); ++ args.flags = a->flags[AuHn_PARENT]; ++ args.dentry = NULL; ++ args.inode = a->dir; ++ args.h_inode = a->h_dir; ++ args.dir = NULL; ++ args.h_dir = NULL; ++ args.h_name = NULL; ++ args.h_nlen = 0; ++ err = hn_job(&args); ++ ii_write_unlock(a->dir); ++ ++out: ++ iput(a->h_child_inode); ++ iput(a->h_dir); ++ iput(a->dir); ++ si_write_unlock(sb); ++ au_nwt_done(&sbinfo->si_nowait); ++ kfree(a); ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++int au_hnotify(struct inode *h_dir, struct au_hnotify *hnotify, u32 mask, ++ struct qstr *h_child_qstr, struct inode *h_child_inode) ++{ ++ int err, len; ++ unsigned int flags[AuHnLast], f; ++ unsigned char isdir, isroot, wh; ++ struct inode *dir; ++ struct au_hnotify_args *args; ++ char *p, *h_child_name; ++ ++ err = 0; ++ AuDebugOn(!hnotify || !hnotify->hn_aufs_inode); ++ dir = igrab(hnotify->hn_aufs_inode); ++ if (!dir) ++ goto out; ++ ++ isroot = (dir->i_ino == AUFS_ROOT_INO); ++ wh = 0; ++ h_child_name = (void *)h_child_qstr->name; ++ len = h_child_qstr->len; ++ if (h_child_name) { ++ if (len > AUFS_WH_PFX_LEN ++ && !memcmp(h_child_name, AUFS_WH_PFX, AUFS_WH_PFX_LEN)) { ++ h_child_name += AUFS_WH_PFX_LEN; ++ len -= AUFS_WH_PFX_LEN; ++ wh = 1; ++ } ++ } ++ ++ isdir = 0; ++ if (h_child_inode) ++ isdir = !!S_ISDIR(h_child_inode->i_mode); ++ flags[AuHn_PARENT] = AuHnJob_ISDIR; ++ flags[AuHn_CHILD] = 0; ++ if (isdir) ++ flags[AuHn_CHILD] = AuHnJob_ISDIR; ++ au_fset_hnjob(flags[AuHn_PARENT], DIRENT); ++ au_fset_hnjob(flags[AuHn_CHILD], GEN); ++ switch (mask & FS_EVENTS_POSS_ON_CHILD) { ++ case FS_MOVED_FROM: ++ case FS_MOVED_TO: ++ au_fset_hnjob(flags[AuHn_CHILD], XINO0); ++ au_fset_hnjob(flags[AuHn_CHILD], MNTPNT); ++ /*FALLTHROUGH*/ ++ case FS_CREATE: ++ AuDebugOn(!h_child_name); ++ break; ++ ++ case FS_DELETE: ++ /* ++ * aufs never be able to get this child inode. ++ * revalidation should be in d_revalidate() ++ * by checking i_nlink, i_generation or d_unhashed(). ++ */ ++ AuDebugOn(!h_child_name); ++ au_fset_hnjob(flags[AuHn_CHILD], TRYXINO0); ++ au_fset_hnjob(flags[AuHn_CHILD], MNTPNT); ++ break; ++ ++ default: ++ AuDebugOn(1); ++ } ++ ++ if (wh) ++ h_child_inode = NULL; ++ ++ err = -ENOMEM; ++ /* iput() and kfree() will be called in au_hnotify() */ ++ args = kmalloc(sizeof(*args) + len + 1, GFP_NOFS); ++ if (unlikely(!args)) { ++ AuErr1("no memory\n"); ++ iput(dir); ++ goto out; ++ } ++ args->flags[AuHn_PARENT] = flags[AuHn_PARENT]; ++ args->flags[AuHn_CHILD] = flags[AuHn_CHILD]; ++ args->mask = mask; ++ args->dir = dir; ++ args->h_dir = igrab(h_dir); ++ if (h_child_inode) ++ h_child_inode = igrab(h_child_inode); /* can be NULL */ ++ args->h_child_inode = h_child_inode; ++ args->h_child_nlen = len; ++ if (len) { ++ p = (void *)args; ++ p += sizeof(*args); ++ memcpy(p, h_child_name, len); ++ p[len] = 0; ++ } ++ ++ /* NFS fires the event for silly-renamed one from kworker */ ++ f = 0; ++ if (!dir->i_nlink ++ || (au_test_nfs(h_dir->i_sb) && (mask & FS_DELETE))) ++ f = AuWkq_NEST; ++ err = au_wkq_nowait(au_hn_bh, args, dir->i_sb, f); ++ if (unlikely(err)) { ++ pr_err("wkq %d\n", err); ++ iput(args->h_child_inode); ++ iput(args->h_dir); ++ iput(args->dir); ++ kfree(args); ++ } ++ ++out: ++ return err; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++int au_hnotify_reset_br(unsigned int udba, struct au_branch *br, int perm) ++{ ++ int err; ++ ++ AuDebugOn(!(udba & AuOptMask_UDBA)); ++ ++ err = 0; ++ if (au_hnotify_op.reset_br) ++ err = au_hnotify_op.reset_br(udba, br, perm); ++ ++ return err; ++} ++ ++int au_hnotify_init_br(struct au_branch *br, int perm) ++{ ++ int err; ++ ++ err = 0; ++ if (au_hnotify_op.init_br) ++ err = au_hnotify_op.init_br(br, perm); ++ ++ return err; ++} ++ ++void au_hnotify_fin_br(struct au_branch *br) ++{ ++ if (au_hnotify_op.fin_br) ++ au_hnotify_op.fin_br(br); ++} ++ ++static void au_hn_destroy_cache(void) ++{ ++ kmem_cache_destroy(au_cachep[AuCache_HNOTIFY]); ++ au_cachep[AuCache_HNOTIFY] = NULL; ++} ++ ++int __init au_hnotify_init(void) ++{ ++ int err; ++ ++ err = -ENOMEM; ++ au_cachep[AuCache_HNOTIFY] = AuCache(au_hnotify); ++ if (au_cachep[AuCache_HNOTIFY]) { ++ err = 0; ++ if (au_hnotify_op.init) ++ err = au_hnotify_op.init(); ++ if (unlikely(err)) ++ au_hn_destroy_cache(); ++ } ++ AuTraceErr(err); ++ return err; ++} ++ ++void au_hnotify_fin(void) ++{ ++ if (au_hnotify_op.fin) ++ au_hnotify_op.fin(); ++ /* cf. au_cache_fin() */ ++ if (au_cachep[AuCache_HNOTIFY]) ++ au_hn_destroy_cache(); ++} +diff --git a/fs/aufs/i_op.c b/fs/aufs/i_op.c +new file mode 100644 +index 0000000..02dc95a +--- /dev/null ++++ b/fs/aufs/i_op.c +@@ -0,0 +1,1460 @@ ++/* ++ * Copyright (C) 2005-2016 Junjiro R. Okajima ++ * ++ * This program, aufs is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . ++ */ ++ ++/* ++ * inode operations (except add/del/rename) ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include "aufs.h" ++ ++static int h_permission(struct inode *h_inode, int mask, ++ struct vfsmount *h_mnt, int brperm) ++{ ++ int err; ++ const unsigned char write_mask = !!(mask & (MAY_WRITE | MAY_APPEND)); ++ ++ err = -EACCES; ++ if ((write_mask && IS_IMMUTABLE(h_inode)) ++ || ((mask & MAY_EXEC) ++ && S_ISREG(h_inode->i_mode) ++ && ((h_mnt->mnt_flags & MNT_NOEXEC) ++ || !(h_inode->i_mode & S_IXUGO)))) ++ goto out; ++ ++ /* ++ * - skip the lower fs test in the case of write to ro branch. ++ * - nfs dir permission write check is optimized, but a policy for ++ * link/rename requires a real check. ++ * - nfs always sets MS_POSIXACL regardless its mount option 'noacl.' ++ * in this case, generic_permission() returns -EOPNOTSUPP. ++ */ ++ if ((write_mask && !au_br_writable(brperm)) ++ || (au_test_nfs(h_inode->i_sb) && S_ISDIR(h_inode->i_mode) ++ && write_mask && !(mask & MAY_READ)) ++ || !h_inode->i_op->permission) { ++ /* AuLabel(generic_permission); */ ++ /* AuDbg("get_acl %pf\n", h_inode->i_op->get_acl); */ ++ err = generic_permission(h_inode, mask); ++ if (err == -EOPNOTSUPP && au_test_nfs_noacl(h_inode)) ++ err = h_inode->i_op->permission(h_inode, mask); ++ AuTraceErr(err); ++ } else { ++ /* AuLabel(h_inode->permission); */ ++ err = h_inode->i_op->permission(h_inode, mask); ++ AuTraceErr(err); ++ } ++ ++ if (!err) ++ err = devcgroup_inode_permission(h_inode, mask); ++ if (!err) ++ err = security_inode_permission(h_inode, mask); ++ ++#if 0 ++ if (!err) { ++ /* todo: do we need to call ima_path_check()? */ ++ struct path h_path = { ++ .dentry = ++ .mnt = h_mnt ++ }; ++ err = ima_path_check(&h_path, ++ mask & (MAY_READ | MAY_WRITE | MAY_EXEC), ++ IMA_COUNT_LEAVE); ++ } ++#endif ++ ++out: ++ return err; ++} ++ ++static int aufs_permission(struct inode *inode, int mask) ++{ ++ int err; ++ aufs_bindex_t bindex, bend; ++ const unsigned char isdir = !!S_ISDIR(inode->i_mode), ++ write_mask = !!(mask & (MAY_WRITE | MAY_APPEND)); ++ struct inode *h_inode; ++ struct super_block *sb; ++ struct au_branch *br; ++ ++ /* todo: support rcu-walk? */ ++ if (mask & MAY_NOT_BLOCK) ++ return -ECHILD; ++ ++ sb = inode->i_sb; ++ si_read_lock(sb, AuLock_FLUSH); ++ ii_read_lock_child(inode); ++#if 0 ++ err = au_iigen_test(inode, au_sigen(sb)); ++ if (unlikely(err)) ++ goto out; ++#endif ++ ++ if (!isdir ++ || write_mask ++ || au_opt_test(au_mntflags(sb), DIRPERM1)) { ++ err = au_busy_or_stale(); ++ h_inode = au_h_iptr(inode, au_ibstart(inode)); ++ if (unlikely(!h_inode ++ || (h_inode->i_mode & S_IFMT) ++ != (inode->i_mode & S_IFMT))) ++ goto out; ++ ++ err = 0; ++ bindex = au_ibstart(inode); ++ br = au_sbr(sb, bindex); ++ err = h_permission(h_inode, mask, au_br_mnt(br), br->br_perm); ++ if (write_mask ++ && !err ++ && !special_file(h_inode->i_mode)) { ++ /* test whether the upper writable branch exists */ ++ err = -EROFS; ++ for (; bindex >= 0; bindex--) ++ if (!au_br_rdonly(au_sbr(sb, bindex))) { ++ err = 0; ++ break; ++ } ++ } ++ goto out; ++ } ++ ++ /* non-write to dir */ ++ err = 0; ++ bend = au_ibend(inode); ++ for (bindex = au_ibstart(inode); !err && bindex <= bend; bindex++) { ++ h_inode = au_h_iptr(inode, bindex); ++ if (h_inode) { ++ err = au_busy_or_stale(); ++ if (unlikely(!S_ISDIR(h_inode->i_mode))) ++ break; ++ ++ br = au_sbr(sb, bindex); ++ err = h_permission(h_inode, mask, au_br_mnt(br), ++ br->br_perm); ++ } ++ } ++ ++out: ++ ii_read_unlock(inode); ++ si_read_unlock(sb); ++ return err; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++static struct dentry *aufs_lookup(struct inode *dir, struct dentry *dentry, ++ unsigned int flags) ++{ ++ struct dentry *ret, *parent; ++ struct inode *inode; ++ struct super_block *sb; ++ int err, npositive; ++ ++ IMustLock(dir); ++ ++ /* todo: support rcu-walk? */ ++ ret = ERR_PTR(-ECHILD); ++ if (flags & LOOKUP_RCU) ++ goto out; ++ ++ ret = ERR_PTR(-ENAMETOOLONG); ++ if (unlikely(dentry->d_name.len > AUFS_MAX_NAMELEN)) ++ goto out; ++ ++ sb = dir->i_sb; ++ err = si_read_lock(sb, AuLock_FLUSH | AuLock_NOPLM); ++ ret = ERR_PTR(err); ++ if (unlikely(err)) ++ goto out; ++ ++ err = au_di_init(dentry); ++ ret = ERR_PTR(err); ++ if (unlikely(err)) ++ goto out_si; ++ ++ inode = NULL; ++ npositive = 0; /* suppress a warning */ ++ parent = dentry->d_parent; /* dir inode is locked */ ++ di_read_lock_parent(parent, AuLock_IR); ++ err = au_alive_dir(parent); ++ if (!err) ++ err = au_digen_test(parent, au_sigen(sb)); ++ if (!err) { ++ npositive = au_lkup_dentry(dentry, au_dbstart(parent), ++ /*type*/0); ++ err = npositive; ++ } ++ di_read_unlock(parent, AuLock_IR); ++ ret = ERR_PTR(err); ++ if (unlikely(err < 0)) ++ goto out_unlock; ++ ++ if (npositive) { ++ inode = au_new_inode(dentry, /*must_new*/0); ++ if (IS_ERR(inode)) { ++ ret = (void *)inode; ++ inode = NULL; ++ goto out_unlock; ++ } ++ } ++ ++ if (inode) ++ atomic_inc(&inode->i_count); ++ ret = d_splice_alias(inode, dentry); ++ if (IS_ERR(ret) ++ && PTR_ERR(ret) == -EIO ++ && inode ++ && S_ISDIR(inode->i_mode)) { ++ atomic_inc(&inode->i_count); ++ ret = d_materialise_unique(dentry, inode); ++ if (!IS_ERR(ret)) ++ ii_write_unlock(inode); ++ } ++#if 0 ++ if (unlikely(d_need_lookup(dentry))) { ++ spin_lock(&dentry->d_lock); ++ dentry->d_flags &= ~DCACHE_NEED_LOOKUP; ++ spin_unlock(&dentry->d_lock); ++ } else ++#endif ++ if (inode) { ++ if (!IS_ERR(ret)) ++ iput(inode); ++ else { ++ ii_write_unlock(inode); ++ iput(inode); ++ inode = NULL; ++ } ++ } ++ ++out_unlock: ++ di_write_unlock(dentry); ++ if (inode) { ++ /* verbose coding for lock class name */ ++ if (unlikely(S_ISLNK(inode->i_mode))) ++ au_rw_class(&au_di(dentry)->di_rwsem, ++ au_lc_key + AuLcSymlink_DIINFO); ++ else if (unlikely(S_ISDIR(inode->i_mode))) ++ au_rw_class(&au_di(dentry)->di_rwsem, ++ au_lc_key + AuLcDir_DIINFO); ++ else /* likely */ ++ au_rw_class(&au_di(dentry)->di_rwsem, ++ au_lc_key + AuLcNonDir_DIINFO); ++ } ++out_si: ++ si_read_unlock(sb); ++out: ++ return ret; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++struct aopen_node { ++ struct hlist_node hlist; ++ struct file *file, *h_file; ++}; ++ ++static int au_do_aopen(struct inode *inode, struct file *file) ++{ ++ struct au_sphlhead *aopen; ++ struct aopen_node *node; ++ struct au_do_open_args args = { ++ .no_lock = 1, ++ .open = au_do_open_nondir ++ }; ++ ++ aopen = &au_sbi(inode->i_sb)->si_aopen; ++ spin_lock(&aopen->spin); ++ hlist_for_each_entry(node, &aopen->head, hlist) ++ if (node->file == file) { ++ args.h_file = node->h_file; ++ break; ++ } ++ spin_unlock(&aopen->spin); ++ /* AuDebugOn(!args.h_file); */ ++ ++ return au_do_open(file, &args); ++} ++ ++static int aufs_atomic_open(struct inode *dir, struct dentry *dentry, ++ struct file *file, unsigned int open_flag, ++ umode_t create_mode, int *opened) ++{ ++ int err, h_opened = *opened; ++ struct dentry *parent; ++ struct dentry *d; ++ struct au_sphlhead *aopen; ++ struct vfsub_aopen_args args = { ++ .open_flag = open_flag, ++ .create_mode = create_mode, ++ .opened = &h_opened ++ }; ++ struct aopen_node aopen_node = { ++ .file = file ++ }; ++ ++ IMustLock(dir); ++ AuDbg("open_flag 0x%x\n", open_flag); ++ AuDbgDentry(dentry); ++ ++ err = 0; ++ if (!au_di(dentry)) { ++ d = aufs_lookup(dir, dentry, /*flags*/0); ++ if (IS_ERR(d)) { ++ err = PTR_ERR(d); ++ goto out; ++ } else if (d) { ++ /* ++ * obsoleted dentry found. ++ * another error will be returned later. ++ */ ++ d_drop(d); ++ dput(d); ++ AuDbgDentry(d); ++ } ++ AuDbgDentry(dentry); ++ } ++ ++ if (d_is_positive(dentry) ++ || d_unhashed(dentry) ++ || d_unlinked(dentry) ++ || !(open_flag & O_CREAT)) ++ goto out_no_open; ++ ++ err = aufs_read_lock(dentry, AuLock_DW | AuLock_FLUSH | AuLock_GEN); ++ if (unlikely(err)) ++ goto out; ++ ++ parent = dentry->d_parent; /* dir is locked */ ++ di_write_lock_parent(parent); ++ err = au_lkup_dentry(dentry, /*bstart*/0, /*type*/0); ++ if (unlikely(err)) ++ goto out_unlock; ++ ++ AuDbgDentry(dentry); ++ if (d_is_positive(dentry)) ++ goto out_unlock; ++ ++ args.file = get_empty_filp(); ++ err = PTR_ERR(args.file); ++ if (IS_ERR(args.file)) ++ goto out_unlock; ++ ++ args.file->f_flags = file->f_flags; ++ err = au_aopen_or_create(dir, dentry, &args); ++ AuTraceErr(err); ++ AuDbgFile(args.file); ++ if (unlikely(err < 0)) { ++ if (h_opened & FILE_OPENED) ++ fput(args.file); ++ else ++ put_filp(args.file); ++ goto out_unlock; ++ } ++ ++ /* some filesystems don't set FILE_CREATED while succeeded? */ ++ *opened |= FILE_CREATED; ++ if (h_opened & FILE_OPENED) ++ aopen_node.h_file = args.file; ++ else { ++ put_filp(args.file); ++ args.file = NULL; ++ } ++ aopen = &au_sbi(dir->i_sb)->si_aopen; ++ au_sphl_add(&aopen_node.hlist, aopen); ++ err = finish_open(file, dentry, au_do_aopen, opened); ++ au_sphl_del(&aopen_node.hlist, aopen); ++ AuTraceErr(err); ++ AuDbgFile(file); ++ if (aopen_node.h_file) ++ fput(aopen_node.h_file); ++ ++out_unlock: ++ di_write_unlock(parent); ++ aufs_read_unlock(dentry, AuLock_DW); ++ AuDbgDentry(dentry); ++ if (unlikely(err)) ++ goto out; ++out_no_open: ++ if (!err && !(*opened & FILE_CREATED)) { ++ AuLabel(out_no_open); ++ dget(dentry); ++ err = finish_no_open(file, dentry); ++ } ++out: ++ AuDbg("%pd%s%s\n", dentry, ++ (*opened & FILE_CREATED) ? " created" : "", ++ (*opened & FILE_OPENED) ? " opened" : ""); ++ AuTraceErr(err); ++ return err; ++} ++ ++ ++/* ---------------------------------------------------------------------- */ ++ ++static int au_wr_dir_cpup(struct dentry *dentry, struct dentry *parent, ++ const unsigned char add_entry, aufs_bindex_t bcpup, ++ aufs_bindex_t bstart) ++{ ++ int err; ++ struct dentry *h_parent; ++ struct inode *h_dir; ++ ++ if (add_entry) ++ IMustLock(parent->d_inode); ++ else ++ di_write_lock_parent(parent); ++ ++ err = 0; ++ if (!au_h_dptr(parent, bcpup)) { ++ if (bstart > bcpup) ++ err = au_cpup_dirs(dentry, bcpup); ++ else if (bstart < bcpup) ++ err = au_cpdown_dirs(dentry, bcpup); ++ else ++ BUG(); ++ } ++ if (!err && add_entry && !au_ftest_wrdir(add_entry, TMPFILE)) { ++ h_parent = au_h_dptr(parent, bcpup); ++ h_dir = h_parent->d_inode; ++ mutex_lock_nested(&h_dir->i_mutex, AuLsc_I_PARENT); ++ err = au_lkup_neg(dentry, bcpup, /*wh*/0); ++ /* todo: no unlock here */ ++ mutex_unlock(&h_dir->i_mutex); ++ ++ AuDbg("bcpup %d\n", bcpup); ++ if (!err) { ++ if (!dentry->d_inode) ++ au_set_h_dptr(dentry, bstart, NULL); ++ au_update_dbrange(dentry, /*do_put_zero*/0); ++ } ++ } ++ ++ if (!add_entry) ++ di_write_unlock(parent); ++ if (!err) ++ err = bcpup; /* success */ ++ ++ AuTraceErr(err); ++ return err; ++} ++ ++/* ++ * decide the branch and the parent dir where we will create a new entry. ++ * returns new bindex or an error. ++ * copyup the parent dir if needed. ++ */ ++int au_wr_dir(struct dentry *dentry, struct dentry *src_dentry, ++ struct au_wr_dir_args *args) ++{ ++ int err; ++ unsigned int flags; ++ aufs_bindex_t bcpup, bstart, src_bstart; ++ const unsigned char add_entry ++ = au_ftest_wrdir(args->flags, ADD_ENTRY) ++ | au_ftest_wrdir(args->flags, TMPFILE); ++ struct super_block *sb; ++ struct dentry *parent; ++ struct au_sbinfo *sbinfo; ++ ++ sb = dentry->d_sb; ++ sbinfo = au_sbi(sb); ++ parent = dget_parent(dentry); ++ bstart = au_dbstart(dentry); ++ bcpup = bstart; ++ if (args->force_btgt < 0) { ++ if (src_dentry) { ++ src_bstart = au_dbstart(src_dentry); ++ if (src_bstart < bstart) ++ bcpup = src_bstart; ++ } else if (add_entry) { ++ flags = 0; ++ if (au_ftest_wrdir(args->flags, ISDIR)) ++ au_fset_wbr(flags, DIR); ++ err = AuWbrCreate(sbinfo, dentry, flags); ++ bcpup = err; ++ } ++ ++ if (bcpup < 0 || au_test_ro(sb, bcpup, dentry->d_inode)) { ++ if (add_entry) ++ err = AuWbrCopyup(sbinfo, dentry); ++ else { ++ if (!IS_ROOT(dentry)) { ++ di_read_lock_parent(parent, !AuLock_IR); ++ err = AuWbrCopyup(sbinfo, dentry); ++ di_read_unlock(parent, !AuLock_IR); ++ } else ++ err = AuWbrCopyup(sbinfo, dentry); ++ } ++ bcpup = err; ++ if (unlikely(err < 0)) ++ goto out; ++ } ++ } else { ++ bcpup = args->force_btgt; ++ AuDebugOn(au_test_ro(sb, bcpup, dentry->d_inode)); ++ } ++ ++ AuDbg("bstart %d, bcpup %d\n", bstart, bcpup); ++ err = bcpup; ++ if (bcpup == bstart) ++ goto out; /* success */ ++ ++ /* copyup the new parent into the branch we process */ ++ err = au_wr_dir_cpup(dentry, parent, add_entry, bcpup, bstart); ++ if (err >= 0) { ++ if (!dentry->d_inode) { ++ au_set_h_dptr(dentry, bstart, NULL); ++ au_set_dbstart(dentry, bcpup); ++ au_set_dbend(dentry, bcpup); ++ } ++ AuDebugOn(add_entry ++ && !au_ftest_wrdir(args->flags, TMPFILE) ++ && !au_h_dptr(dentry, bcpup)); ++ } ++ ++out: ++ dput(parent); ++ return err; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++void au_pin_hdir_unlock(struct au_pin *p) ++{ ++ if (p->hdir) ++ au_hn_imtx_unlock(p->hdir); ++} ++ ++int au_pin_hdir_lock(struct au_pin *p) ++{ ++ int err; ++ ++ err = 0; ++ if (!p->hdir) ++ goto out; ++ ++ /* even if an error happens later, keep this lock */ ++ au_hn_imtx_lock_nested(p->hdir, p->lsc_hi); ++ ++ err = -EBUSY; ++ if (unlikely(p->hdir->hi_inode != p->h_parent->d_inode)) ++ goto out; ++ ++ err = 0; ++ if (p->h_dentry) ++ err = au_h_verify(p->h_dentry, p->udba, p->hdir->hi_inode, ++ p->h_parent, p->br); ++ ++out: ++ return err; ++} ++ ++int au_pin_hdir_relock(struct au_pin *p) ++{ ++ int err, i; ++ struct inode *h_i; ++ struct dentry *h_d[] = { ++ p->h_dentry, ++ p->h_parent ++ }; ++ ++ err = au_pin_hdir_lock(p); ++ if (unlikely(err)) ++ goto out; ++ ++ for (i = 0; !err && i < sizeof(h_d)/sizeof(*h_d); i++) { ++ if (!h_d[i]) ++ continue; ++ h_i = h_d[i]->d_inode; ++ if (h_i) ++ err = !h_i->i_nlink; ++ } ++ ++out: ++ return err; ++} ++ ++void au_pin_hdir_set_owner(struct au_pin *p, struct task_struct *task) ++{ ++#if defined(CONFIG_DEBUG_MUTEXES) || defined(CONFIG_SMP) ++ p->hdir->hi_inode->i_mutex.owner = task; ++#endif ++} ++ ++void au_pin_hdir_acquire_nest(struct au_pin *p) ++{ ++ if (p->hdir) { ++ mutex_acquire_nest(&p->hdir->hi_inode->i_mutex.dep_map, ++ p->lsc_hi, 0, NULL, _RET_IP_); ++ au_pin_hdir_set_owner(p, current); ++ } ++} ++ ++void au_pin_hdir_release(struct au_pin *p) ++{ ++ if (p->hdir) { ++ au_pin_hdir_set_owner(p, p->task); ++ mutex_release(&p->hdir->hi_inode->i_mutex.dep_map, 1, _RET_IP_); ++ } ++} ++ ++struct dentry *au_pinned_h_parent(struct au_pin *pin) ++{ ++ if (pin && pin->parent) ++ return au_h_dptr(pin->parent, pin->bindex); ++ return NULL; ++} ++ ++void au_unpin(struct au_pin *p) ++{ ++ if (p->hdir) ++ au_pin_hdir_unlock(p); ++ if (p->h_mnt && au_ftest_pin(p->flags, MNT_WRITE)) ++ vfsub_mnt_drop_write(p->h_mnt); ++ if (!p->hdir) ++ return; ++ ++ if (!au_ftest_pin(p->flags, DI_LOCKED)) ++ di_read_unlock(p->parent, AuLock_IR); ++ iput(p->hdir->hi_inode); ++ dput(p->parent); ++ p->parent = NULL; ++ p->hdir = NULL; ++ p->h_mnt = NULL; ++ /* do not clear p->task */ ++} ++ ++int au_do_pin(struct au_pin *p) ++{ ++ int err; ++ struct super_block *sb; ++ struct inode *h_dir; ++ ++ err = 0; ++ sb = p->dentry->d_sb; ++ p->br = au_sbr(sb, p->bindex); ++ if (IS_ROOT(p->dentry)) { ++ if (au_ftest_pin(p->flags, MNT_WRITE)) { ++ p->h_mnt = au_br_mnt(p->br); ++ err = vfsub_mnt_want_write(p->h_mnt); ++ if (unlikely(err)) { ++ au_fclr_pin(p->flags, MNT_WRITE); ++ goto out_err; ++ } ++ } ++ goto out; ++ } ++ ++ p->h_dentry = NULL; ++ if (p->bindex <= au_dbend(p->dentry)) ++ p->h_dentry = au_h_dptr(p->dentry, p->bindex); ++ ++ p->parent = dget_parent(p->dentry); ++ if (!au_ftest_pin(p->flags, DI_LOCKED)) ++ di_read_lock(p->parent, AuLock_IR, p->lsc_di); ++ ++ h_dir = NULL; ++ p->h_parent = au_h_dptr(p->parent, p->bindex); ++ p->hdir = au_hi(p->parent->d_inode, p->bindex); ++ if (p->hdir) ++ h_dir = p->hdir->hi_inode; ++ ++ /* ++ * udba case, or ++ * if DI_LOCKED is not set, then p->parent may be different ++ * and h_parent can be NULL. ++ */ ++ if (unlikely(!p->hdir || !h_dir || !p->h_parent)) { ++ err = -EBUSY; ++ if (!au_ftest_pin(p->flags, DI_LOCKED)) ++ di_read_unlock(p->parent, AuLock_IR); ++ dput(p->parent); ++ p->parent = NULL; ++ goto out_err; ++ } ++ ++ if (au_ftest_pin(p->flags, MNT_WRITE)) { ++ p->h_mnt = au_br_mnt(p->br); ++ err = vfsub_mnt_want_write(p->h_mnt); ++ if (unlikely(err)) { ++ au_fclr_pin(p->flags, MNT_WRITE); ++ if (!au_ftest_pin(p->flags, DI_LOCKED)) ++ di_read_unlock(p->parent, AuLock_IR); ++ dput(p->parent); ++ p->parent = NULL; ++ goto out_err; ++ } ++ } ++ ++ au_igrab(h_dir); ++ err = au_pin_hdir_lock(p); ++ if (!err) ++ goto out; /* success */ ++ ++ au_unpin(p); ++ ++out_err: ++ pr_err("err %d\n", err); ++ err = au_busy_or_stale(); ++out: ++ return err; ++} ++ ++void au_pin_init(struct au_pin *p, struct dentry *dentry, ++ aufs_bindex_t bindex, int lsc_di, int lsc_hi, ++ unsigned int udba, unsigned char flags) ++{ ++ p->dentry = dentry; ++ p->udba = udba; ++ p->lsc_di = lsc_di; ++ p->lsc_hi = lsc_hi; ++ p->flags = flags; ++ p->bindex = bindex; ++ ++ p->parent = NULL; ++ p->hdir = NULL; ++ p->h_mnt = NULL; ++ ++ p->h_dentry = NULL; ++ p->h_parent = NULL; ++ p->br = NULL; ++ p->task = current; ++} ++ ++int au_pin(struct au_pin *pin, struct dentry *dentry, aufs_bindex_t bindex, ++ unsigned int udba, unsigned char flags) ++{ ++ au_pin_init(pin, dentry, bindex, AuLsc_DI_PARENT, AuLsc_I_PARENT2, ++ udba, flags); ++ return au_do_pin(pin); ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++/* ++ * ->setattr() and ->getattr() are called in various cases. ++ * chmod, stat: dentry is revalidated. ++ * fchmod, fstat: file and dentry are not revalidated, additionally they may be ++ * unhashed. ++ * for ->setattr(), ia->ia_file is passed from ftruncate only. ++ */ ++/* todo: consolidate with do_refresh() and simple_reval_dpath() */ ++int au_reval_for_attr(struct dentry *dentry, unsigned int sigen) ++{ ++ int err; ++ struct inode *inode; ++ struct dentry *parent; ++ ++ err = 0; ++ inode = dentry->d_inode; ++ if (au_digen_test(dentry, sigen)) { ++ parent = dget_parent(dentry); ++ di_read_lock_parent(parent, AuLock_IR); ++ err = au_refresh_dentry(dentry, parent); ++ di_read_unlock(parent, AuLock_IR); ++ dput(parent); ++ } ++ ++ AuTraceErr(err); ++ return err; ++} ++ ++int au_pin_and_icpup(struct dentry *dentry, struct iattr *ia, ++ struct au_icpup_args *a) ++{ ++ int err; ++ loff_t sz; ++ aufs_bindex_t bstart, ibstart; ++ struct dentry *hi_wh, *parent; ++ struct inode *inode; ++ struct au_wr_dir_args wr_dir_args = { ++ .force_btgt = -1, ++ .flags = 0 ++ }; ++ ++ if (d_is_dir(dentry)) ++ au_fset_wrdir(wr_dir_args.flags, ISDIR); ++ /* plink or hi_wh() case */ ++ bstart = au_dbstart(dentry); ++ inode = dentry->d_inode; ++ ibstart = au_ibstart(inode); ++ if (bstart != ibstart && !au_test_ro(inode->i_sb, ibstart, inode)) ++ wr_dir_args.force_btgt = ibstart; ++ err = au_wr_dir(dentry, /*src_dentry*/NULL, &wr_dir_args); ++ if (unlikely(err < 0)) ++ goto out; ++ a->btgt = err; ++ if (err != bstart) ++ au_fset_icpup(a->flags, DID_CPUP); ++ ++ err = 0; ++ a->pin_flags = AuPin_MNT_WRITE; ++ parent = NULL; ++ if (!IS_ROOT(dentry)) { ++ au_fset_pin(a->pin_flags, DI_LOCKED); ++ parent = dget_parent(dentry); ++ di_write_lock_parent(parent); ++ } ++ ++ err = au_pin(&a->pin, dentry, a->btgt, a->udba, a->pin_flags); ++ if (unlikely(err)) ++ goto out_parent; ++ ++ a->h_path.dentry = au_h_dptr(dentry, bstart); ++ a->h_inode = a->h_path.dentry->d_inode; ++ sz = -1; ++ if (ia && (ia->ia_valid & ATTR_SIZE)) { ++ mutex_lock_nested(&a->h_inode->i_mutex, AuLsc_I_CHILD); ++ if (ia->ia_size < i_size_read(a->h_inode)) ++ sz = ia->ia_size; ++ mutex_unlock(&a->h_inode->i_mutex); ++ } ++ ++ hi_wh = NULL; ++ if (au_ftest_icpup(a->flags, DID_CPUP) && d_unlinked(dentry)) { ++ hi_wh = au_hi_wh(inode, a->btgt); ++ if (!hi_wh) { ++ struct au_cp_generic cpg = { ++ .dentry = dentry, ++ .bdst = a->btgt, ++ .bsrc = -1, ++ .len = sz, ++ .pin = &a->pin ++ }; ++ err = au_sio_cpup_wh(&cpg, /*file*/NULL); ++ if (unlikely(err)) ++ goto out_unlock; ++ hi_wh = au_hi_wh(inode, a->btgt); ++ /* todo: revalidate hi_wh? */ ++ } ++ } ++ ++ if (parent) { ++ au_pin_set_parent_lflag(&a->pin, /*lflag*/0); ++ di_downgrade_lock(parent, AuLock_IR); ++ dput(parent); ++ parent = NULL; ++ } ++ if (!au_ftest_icpup(a->flags, DID_CPUP)) ++ goto out; /* success */ ++ ++ if (!d_unhashed(dentry)) { ++ struct au_cp_generic cpg = { ++ .dentry = dentry, ++ .bdst = a->btgt, ++ .bsrc = bstart, ++ .len = sz, ++ .pin = &a->pin, ++ .flags = AuCpup_DTIME | AuCpup_HOPEN ++ }; ++ err = au_sio_cpup_simple(&cpg); ++ if (!err) ++ a->h_path.dentry = au_h_dptr(dentry, a->btgt); ++ } else if (!hi_wh) ++ a->h_path.dentry = au_h_dptr(dentry, a->btgt); ++ else ++ a->h_path.dentry = hi_wh; /* do not dget here */ ++ ++out_unlock: ++ a->h_inode = a->h_path.dentry->d_inode; ++ if (!err) ++ goto out; /* success */ ++ au_unpin(&a->pin); ++out_parent: ++ if (parent) { ++ di_write_unlock(parent); ++ dput(parent); ++ } ++out: ++ if (!err) ++ mutex_lock_nested(&a->h_inode->i_mutex, AuLsc_I_CHILD); ++ return err; ++} ++ ++static int aufs_setattr(struct dentry *dentry, struct iattr *ia) ++{ ++ int err; ++ struct inode *inode, *delegated; ++ struct super_block *sb; ++ struct file *file; ++ struct au_icpup_args *a; ++ ++ inode = dentry->d_inode; ++ IMustLock(inode); ++ ++ err = -ENOMEM; ++ a = kzalloc(sizeof(*a), GFP_NOFS); ++ if (unlikely(!a)) ++ goto out; ++ ++ if (ia->ia_valid & (ATTR_KILL_SUID | ATTR_KILL_SGID)) ++ ia->ia_valid &= ~ATTR_MODE; ++ ++ file = NULL; ++ sb = dentry->d_sb; ++ err = si_read_lock(sb, AuLock_FLUSH | AuLock_NOPLM); ++ if (unlikely(err)) ++ goto out_kfree; ++ ++ if (ia->ia_valid & ATTR_FILE) { ++ /* currently ftruncate(2) only */ ++ AuDebugOn(!S_ISREG(inode->i_mode)); ++ file = ia->ia_file; ++ err = au_reval_and_lock_fdi(file, au_reopen_nondir, /*wlock*/1); ++ if (unlikely(err)) ++ goto out_si; ++ ia->ia_file = au_hf_top(file); ++ a->udba = AuOpt_UDBA_NONE; ++ } else { ++ /* fchmod() doesn't pass ia_file */ ++ a->udba = au_opt_udba(sb); ++ di_write_lock_child(dentry); ++ /* no d_unlinked(), to set UDBA_NONE for root */ ++ if (d_unhashed(dentry)) ++ a->udba = AuOpt_UDBA_NONE; ++ if (a->udba != AuOpt_UDBA_NONE) { ++ AuDebugOn(IS_ROOT(dentry)); ++ err = au_reval_for_attr(dentry, au_sigen(sb)); ++ if (unlikely(err)) ++ goto out_dentry; ++ } ++ } ++ ++ err = au_pin_and_icpup(dentry, ia, a); ++ if (unlikely(err < 0)) ++ goto out_dentry; ++ if (au_ftest_icpup(a->flags, DID_CPUP)) { ++ ia->ia_file = NULL; ++ ia->ia_valid &= ~ATTR_FILE; ++ } ++ ++ a->h_path.mnt = au_sbr_mnt(sb, a->btgt); ++ if ((ia->ia_valid & (ATTR_MODE | ATTR_CTIME)) ++ == (ATTR_MODE | ATTR_CTIME)) { ++ err = security_path_chmod(&a->h_path, ia->ia_mode); ++ if (unlikely(err)) ++ goto out_unlock; ++ } else if ((ia->ia_valid & (ATTR_UID | ATTR_GID)) ++ && (ia->ia_valid & ATTR_CTIME)) { ++ err = security_path_chown(&a->h_path, ia->ia_uid, ia->ia_gid); ++ if (unlikely(err)) ++ goto out_unlock; ++ } ++ ++ if (ia->ia_valid & ATTR_SIZE) { ++ struct file *f; ++ ++ if (ia->ia_size < i_size_read(inode)) ++ /* unmap only */ ++ truncate_setsize(inode, ia->ia_size); ++ ++ f = NULL; ++ if (ia->ia_valid & ATTR_FILE) ++ f = ia->ia_file; ++ mutex_unlock(&a->h_inode->i_mutex); ++ err = vfsub_trunc(&a->h_path, ia->ia_size, ia->ia_valid, f); ++ mutex_lock_nested(&a->h_inode->i_mutex, AuLsc_I_CHILD); ++ } else { ++ delegated = NULL; ++ while (1) { ++ err = vfsub_notify_change(&a->h_path, ia, &delegated); ++ if (delegated) { ++ err = break_deleg_wait(&delegated); ++ if (!err) ++ continue; ++ } ++ break; ++ } ++ } ++ /* ++ * regardless aufs 'acl' option setting. ++ * why don't all acl-aware fs call this func from their ->setattr()? ++ */ ++ if (!err && (ia->ia_valid & ATTR_MODE)) ++ err = vfsub_acl_chmod(a->h_inode, ia->ia_mode); ++ if (!err) ++ au_cpup_attr_changeable(inode); ++ ++out_unlock: ++ mutex_unlock(&a->h_inode->i_mutex); ++ au_unpin(&a->pin); ++ if (unlikely(err)) ++ au_update_dbstart(dentry); ++out_dentry: ++ di_write_unlock(dentry); ++ if (file) { ++ fi_write_unlock(file); ++ ia->ia_file = file; ++ ia->ia_valid |= ATTR_FILE; ++ } ++out_si: ++ si_read_unlock(sb); ++out_kfree: ++ kfree(a); ++out: ++ AuTraceErr(err); ++ return err; ++} ++ ++#if IS_ENABLED(CONFIG_AUFS_XATTR) || IS_ENABLED(CONFIG_FS_POSIX_ACL) ++static int au_h_path_to_set_attr(struct dentry *dentry, ++ struct au_icpup_args *a, struct path *h_path) ++{ ++ int err; ++ struct super_block *sb; ++ ++ sb = dentry->d_sb; ++ a->udba = au_opt_udba(sb); ++ /* no d_unlinked(), to set UDBA_NONE for root */ ++ if (d_unhashed(dentry)) ++ a->udba = AuOpt_UDBA_NONE; ++ if (a->udba != AuOpt_UDBA_NONE) { ++ AuDebugOn(IS_ROOT(dentry)); ++ err = au_reval_for_attr(dentry, au_sigen(sb)); ++ if (unlikely(err)) ++ goto out; ++ } ++ err = au_pin_and_icpup(dentry, /*ia*/NULL, a); ++ if (unlikely(err < 0)) ++ goto out; ++ ++ h_path->dentry = a->h_path.dentry; ++ h_path->mnt = au_sbr_mnt(sb, a->btgt); ++ ++out: ++ return err; ++} ++ ++ssize_t au_srxattr(struct dentry *dentry, struct au_srxattr *arg) ++{ ++ int err; ++ struct path h_path; ++ struct super_block *sb; ++ struct au_icpup_args *a; ++ struct inode *inode, *h_inode; ++ ++ inode = dentry->d_inode; ++ IMustLock(inode); ++ ++ err = -ENOMEM; ++ a = kzalloc(sizeof(*a), GFP_NOFS); ++ if (unlikely(!a)) ++ goto out; ++ ++ sb = dentry->d_sb; ++ err = si_read_lock(sb, AuLock_FLUSH | AuLock_NOPLM); ++ if (unlikely(err)) ++ goto out_kfree; ++ ++ h_path.dentry = NULL; /* silence gcc */ ++ di_write_lock_child(dentry); ++ err = au_h_path_to_set_attr(dentry, a, &h_path); ++ if (unlikely(err)) ++ goto out_di; ++ ++ mutex_unlock(&a->h_inode->i_mutex); ++ switch (arg->type) { ++ case AU_XATTR_SET: ++ err = vfsub_setxattr(h_path.dentry, ++ arg->u.set.name, arg->u.set.value, ++ arg->u.set.size, arg->u.set.flags); ++ break; ++ case AU_XATTR_REMOVE: ++ err = vfsub_removexattr(h_path.dentry, arg->u.remove.name); ++ break; ++ case AU_ACL_SET: ++ err = -EOPNOTSUPP; ++ h_inode = h_path.dentry->d_inode; ++ if (h_inode->i_op->set_acl) ++ err = h_inode->i_op->set_acl(h_inode, ++ arg->u.acl_set.acl, ++ arg->u.acl_set.type); ++ break; ++ } ++ if (!err) ++ au_cpup_attr_timesizes(inode); ++ ++ au_unpin(&a->pin); ++ if (unlikely(err)) ++ au_update_dbstart(dentry); ++ ++out_di: ++ di_write_unlock(dentry); ++ si_read_unlock(sb); ++out_kfree: ++ kfree(a); ++out: ++ AuTraceErr(err); ++ return err; ++} ++#endif ++ ++static void au_refresh_iattr(struct inode *inode, struct kstat *st, ++ unsigned int nlink) ++{ ++ unsigned int n; ++ ++ inode->i_mode = st->mode; ++ /* don't i_[ug]id_write() here */ ++ inode->i_uid = st->uid; ++ inode->i_gid = st->gid; ++ inode->i_atime = st->atime; ++ inode->i_mtime = st->mtime; ++ inode->i_ctime = st->ctime; ++ ++ au_cpup_attr_nlink(inode, /*force*/0); ++ if (S_ISDIR(inode->i_mode)) { ++ n = inode->i_nlink; ++ n -= nlink; ++ n += st->nlink; ++ smp_mb(); /* for i_nlink */ ++ /* 0 can happen */ ++ set_nlink(inode, n); ++ } ++ ++ spin_lock(&inode->i_lock); ++ inode->i_blocks = st->blocks; ++ i_size_write(inode, st->size); ++ spin_unlock(&inode->i_lock); ++} ++ ++/* ++ * common routine for aufs_getattr() and aufs_getxattr(). ++ * returns zero or negative (an error). ++ * @dentry will be read-locked in success. ++ */ ++int au_h_path_getattr(struct dentry *dentry, int force, struct path *h_path) ++{ ++ int err; ++ unsigned int mnt_flags, sigen; ++ unsigned char udba_none; ++ aufs_bindex_t bindex; ++ struct super_block *sb, *h_sb; ++ struct inode *inode; ++ ++ h_path->mnt = NULL; ++ h_path->dentry = NULL; ++ ++ err = 0; ++ sb = dentry->d_sb; ++ mnt_flags = au_mntflags(sb); ++ udba_none = !!au_opt_test(mnt_flags, UDBA_NONE); ++ ++ /* support fstat(2) */ ++ if (!d_unlinked(dentry) && !udba_none) { ++ sigen = au_sigen(sb); ++ err = au_digen_test(dentry, sigen); ++ if (!err) { ++ di_read_lock_child(dentry, AuLock_IR); ++ err = au_dbrange_test(dentry); ++ if (unlikely(err)) { ++ di_read_unlock(dentry, AuLock_IR); ++ goto out; ++ } ++ } else { ++ AuDebugOn(IS_ROOT(dentry)); ++ di_write_lock_child(dentry); ++ err = au_dbrange_test(dentry); ++ if (!err) ++ err = au_reval_for_attr(dentry, sigen); ++ if (!err) ++ di_downgrade_lock(dentry, AuLock_IR); ++ else { ++ di_write_unlock(dentry); ++ goto out; ++ } ++ } ++ } else ++ di_read_lock_child(dentry, AuLock_IR); ++ ++ inode = dentry->d_inode; ++ bindex = au_ibstart(inode); ++ h_path->mnt = au_sbr_mnt(sb, bindex); ++ h_sb = h_path->mnt->mnt_sb; ++ if (!force ++ && !au_test_fs_bad_iattr(h_sb) ++ && udba_none) ++ goto out; /* success */ ++ ++ if (au_dbstart(dentry) == bindex) ++ h_path->dentry = au_h_dptr(dentry, bindex); ++ else if (au_opt_test(mnt_flags, PLINK) && au_plink_test(inode)) { ++ h_path->dentry = au_plink_lkup(inode, bindex); ++ if (IS_ERR(h_path->dentry)) ++ /* pretending success */ ++ h_path->dentry = NULL; ++ else ++ dput(h_path->dentry); ++ } ++ ++out: ++ return err; ++} ++ ++static int aufs_getattr(struct vfsmount *mnt __maybe_unused, ++ struct dentry *dentry, struct kstat *st) ++{ ++ int err; ++ unsigned char positive; ++ struct path h_path; ++ struct inode *inode; ++ struct super_block *sb; ++ ++ inode = dentry->d_inode; ++ sb = dentry->d_sb; ++ err = si_read_lock(sb, AuLock_FLUSH | AuLock_NOPLM); ++ if (unlikely(err)) ++ goto out; ++ err = au_h_path_getattr(dentry, /*force*/0, &h_path); ++ if (unlikely(err)) ++ goto out_si; ++ if (unlikely(!h_path.dentry)) ++ /* illegally overlapped or something */ ++ goto out_fill; /* pretending success */ ++ ++ positive = !!h_path.dentry->d_inode; ++ if (positive) ++ err = vfs_getattr(&h_path, st); ++ if (!err) { ++ if (positive) ++ au_refresh_iattr(inode, st, ++ h_path.dentry->d_inode->i_nlink); ++ goto out_fill; /* success */ ++ } ++ AuTraceErr(err); ++ goto out_di; ++ ++out_fill: ++ generic_fillattr(inode, st); ++out_di: ++ di_read_unlock(dentry, AuLock_IR); ++out_si: ++ si_read_unlock(sb); ++out: ++ AuTraceErr(err); ++ return err; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++static int h_readlink(struct dentry *dentry, int bindex, char __user *buf, ++ int bufsiz) ++{ ++ int err; ++ struct super_block *sb; ++ struct dentry *h_dentry; ++ ++ err = -EINVAL; ++ h_dentry = au_h_dptr(dentry, bindex); ++ if (unlikely(!h_dentry->d_inode->i_op->readlink)) ++ goto out; ++ ++ err = security_inode_readlink(h_dentry); ++ if (unlikely(err)) ++ goto out; ++ ++ sb = dentry->d_sb; ++ if (!au_test_ro(sb, bindex, dentry->d_inode)) { ++ vfsub_touch_atime(au_sbr_mnt(sb, bindex), h_dentry); ++ fsstack_copy_attr_atime(dentry->d_inode, h_dentry->d_inode); ++ } ++ err = h_dentry->d_inode->i_op->readlink(h_dentry, buf, bufsiz); ++ ++out: ++ return err; ++} ++ ++static int aufs_readlink(struct dentry *dentry, char __user *buf, int bufsiz) ++{ ++ int err; ++ ++ err = aufs_read_lock(dentry, AuLock_IR | AuLock_GEN); ++ if (unlikely(err)) ++ goto out; ++ err = au_d_hashed_positive(dentry); ++ if (!err) ++ err = h_readlink(dentry, au_dbstart(dentry), buf, bufsiz); ++ aufs_read_unlock(dentry, AuLock_IR); ++ ++out: ++ return err; ++} ++ ++static void *aufs_follow_link(struct dentry *dentry, struct nameidata *nd) ++{ ++ int err; ++ mm_segment_t old_fs; ++ union { ++ char *k; ++ char __user *u; ++ } buf; ++ ++ err = -ENOMEM; ++ buf.k = (void *)__get_free_page(GFP_NOFS); ++ if (unlikely(!buf.k)) ++ goto out; ++ ++ err = aufs_read_lock(dentry, AuLock_IR | AuLock_GEN); ++ if (unlikely(err)) ++ goto out_name; ++ ++ err = au_d_hashed_positive(dentry); ++ if (!err) { ++ old_fs = get_fs(); ++ set_fs(KERNEL_DS); ++ err = h_readlink(dentry, au_dbstart(dentry), buf.u, PATH_MAX); ++ set_fs(old_fs); ++ } ++ aufs_read_unlock(dentry, AuLock_IR); ++ ++ if (err >= 0) { ++ buf.k[err] = 0; ++ /* will be freed by put_link */ ++ nd_set_link(nd, buf.k); ++ return NULL; /* success */ ++ } ++ ++out_name: ++ free_page((unsigned long)buf.k); ++out: ++ AuTraceErr(err); ++ return ERR_PTR(err); ++} ++ ++static void aufs_put_link(struct dentry *dentry __maybe_unused, ++ struct nameidata *nd, void *cookie __maybe_unused) ++{ ++ char *p; ++ ++ p = nd_get_link(nd); ++ if (!IS_ERR_OR_NULL(p)) ++ free_page((unsigned long)p); ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++static int aufs_update_time(struct inode *inode, struct timespec *ts, int flags) ++{ ++ int err; ++ struct super_block *sb; ++ struct inode *h_inode; ++ ++ sb = inode->i_sb; ++ /* mmap_sem might be acquired already, cf. aufs_mmap() */ ++ lockdep_off(); ++ si_read_lock(sb, AuLock_FLUSH); ++ ii_write_lock_child(inode); ++ lockdep_on(); ++ h_inode = au_h_iptr(inode, au_ibstart(inode)); ++ err = vfsub_update_time(h_inode, ts, flags); ++ lockdep_off(); ++ if (!err) ++ au_cpup_attr_timesizes(inode); ++ ii_write_unlock(inode); ++ si_read_unlock(sb); ++ lockdep_on(); ++ ++ if (!err && (flags & S_VERSION)) ++ inode_inc_iversion(inode); ++ ++ return err; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++/* no getattr version will be set by module.c:aufs_init() */ ++struct inode_operations aufs_iop_nogetattr[AuIop_Last], ++ aufs_iop[] = { ++ [AuIop_SYMLINK] = { ++ .permission = aufs_permission, ++#ifdef CONFIG_FS_POSIX_ACL ++ .get_acl = aufs_get_acl, ++ .set_acl = aufs_set_acl, /* unsupport for symlink? */ ++#endif ++ ++ .setattr = aufs_setattr, ++ .getattr = aufs_getattr, ++ ++#ifdef CONFIG_AUFS_XATTR ++ .setxattr = aufs_setxattr, ++ .getxattr = aufs_getxattr, ++ .listxattr = aufs_listxattr, ++ .removexattr = aufs_removexattr, ++#endif ++ ++ .readlink = aufs_readlink, ++ .follow_link = aufs_follow_link, ++ .put_link = aufs_put_link, ++ ++ /* .update_time = aufs_update_time */ ++ }, ++ [AuIop_DIR] = { ++ .create = aufs_create, ++ .lookup = aufs_lookup, ++ .link = aufs_link, ++ .unlink = aufs_unlink, ++ .symlink = aufs_symlink, ++ .mkdir = aufs_mkdir, ++ .rmdir = aufs_rmdir, ++ .mknod = aufs_mknod, ++ .rename = aufs_rename, ++ ++ .permission = aufs_permission, ++#ifdef CONFIG_FS_POSIX_ACL ++ .get_acl = aufs_get_acl, ++ .set_acl = aufs_set_acl, ++#endif ++ ++ .setattr = aufs_setattr, ++ .getattr = aufs_getattr, ++ ++#ifdef CONFIG_AUFS_XATTR ++ .setxattr = aufs_setxattr, ++ .getxattr = aufs_getxattr, ++ .listxattr = aufs_listxattr, ++ .removexattr = aufs_removexattr, ++#endif ++ ++ .update_time = aufs_update_time, ++ .atomic_open = aufs_atomic_open, ++ .tmpfile = aufs_tmpfile ++ }, ++ [AuIop_OTHER] = { ++ .permission = aufs_permission, ++#ifdef CONFIG_FS_POSIX_ACL ++ .get_acl = aufs_get_acl, ++ .set_acl = aufs_set_acl, ++#endif ++ ++ .setattr = aufs_setattr, ++ .getattr = aufs_getattr, ++ ++#ifdef CONFIG_AUFS_XATTR ++ .setxattr = aufs_setxattr, ++ .getxattr = aufs_getxattr, ++ .listxattr = aufs_listxattr, ++ .removexattr = aufs_removexattr, ++#endif ++ ++ .update_time = aufs_update_time ++ } ++}; +diff --git a/fs/aufs/i_op_add.c b/fs/aufs/i_op_add.c +new file mode 100644 +index 0000000..9e4f65c +--- /dev/null ++++ b/fs/aufs/i_op_add.c +@@ -0,0 +1,930 @@ ++/* ++ * Copyright (C) 2005-2016 Junjiro R. Okajima ++ * ++ * This program, aufs is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . ++ */ ++ ++/* ++ * inode operations (add entry) ++ */ ++ ++#include "aufs.h" ++ ++/* ++ * final procedure of adding a new entry, except link(2). ++ * remove whiteout, instantiate, copyup the parent dir's times and size ++ * and update version. ++ * if it failed, re-create the removed whiteout. ++ */ ++static int epilog(struct inode *dir, aufs_bindex_t bindex, ++ struct dentry *wh_dentry, struct dentry *dentry) ++{ ++ int err, rerr; ++ aufs_bindex_t bwh; ++ struct path h_path; ++ struct super_block *sb; ++ struct inode *inode, *h_dir; ++ struct dentry *wh; ++ ++ bwh = -1; ++ sb = dir->i_sb; ++ if (wh_dentry) { ++ h_dir = wh_dentry->d_parent->d_inode; /* dir inode is locked */ ++ IMustLock(h_dir); ++ AuDebugOn(au_h_iptr(dir, bindex) != h_dir); ++ bwh = au_dbwh(dentry); ++ h_path.dentry = wh_dentry; ++ h_path.mnt = au_sbr_mnt(sb, bindex); ++ err = au_wh_unlink_dentry(au_h_iptr(dir, bindex), &h_path, ++ dentry); ++ if (unlikely(err)) ++ goto out; ++ } ++ ++ inode = au_new_inode(dentry, /*must_new*/1); ++ if (!IS_ERR(inode)) { ++ d_instantiate(dentry, inode); ++ dir = dentry->d_parent->d_inode; /* dir inode is locked */ ++ IMustLock(dir); ++ au_dir_ts(dir, bindex); ++ dir->i_version++; ++ au_fhsm_wrote(sb, bindex, /*force*/0); ++ return 0; /* success */ ++ } ++ ++ err = PTR_ERR(inode); ++ if (!wh_dentry) ++ goto out; ++ ++ /* revert */ ++ /* dir inode is locked */ ++ wh = au_wh_create(dentry, bwh, wh_dentry->d_parent); ++ rerr = PTR_ERR(wh); ++ if (IS_ERR(wh)) { ++ AuIOErr("%pd reverting whiteout failed(%d, %d)\n", ++ dentry, err, rerr); ++ err = -EIO; ++ } else ++ dput(wh); ++ ++out: ++ return err; ++} ++ ++static int au_d_may_add(struct dentry *dentry) ++{ ++ int err; ++ ++ err = 0; ++ if (unlikely(d_unhashed(dentry))) ++ err = -ENOENT; ++ if (unlikely(dentry->d_inode)) ++ err = -EEXIST; ++ return err; ++} ++ ++/* ++ * simple tests for the adding inode operations. ++ * following the checks in vfs, plus the parent-child relationship. ++ */ ++int au_may_add(struct dentry *dentry, aufs_bindex_t bindex, ++ struct dentry *h_parent, int isdir) ++{ ++ int err; ++ umode_t h_mode; ++ struct dentry *h_dentry; ++ struct inode *h_inode; ++ ++ err = -ENAMETOOLONG; ++ if (unlikely(dentry->d_name.len > AUFS_MAX_NAMELEN)) ++ goto out; ++ ++ h_dentry = au_h_dptr(dentry, bindex); ++ h_inode = h_dentry->d_inode; ++ if (!dentry->d_inode) { ++ err = -EEXIST; ++ if (unlikely(h_inode)) ++ goto out; ++ } else { ++ /* rename(2) case */ ++ err = -EIO; ++ if (unlikely(!h_inode || !h_inode->i_nlink)) ++ goto out; ++ ++ h_mode = h_inode->i_mode; ++ if (!isdir) { ++ err = -EISDIR; ++ if (unlikely(S_ISDIR(h_mode))) ++ goto out; ++ } else if (unlikely(!S_ISDIR(h_mode))) { ++ err = -ENOTDIR; ++ goto out; ++ } ++ } ++ ++ err = 0; ++ /* expected parent dir is locked */ ++ if (unlikely(h_parent != h_dentry->d_parent)) ++ err = -EIO; ++ ++out: ++ AuTraceErr(err); ++ return err; ++} ++ ++/* ++ * initial procedure of adding a new entry. ++ * prepare writable branch and the parent dir, lock it, ++ * and lookup whiteout for the new entry. ++ */ ++static struct dentry* ++lock_hdir_lkup_wh(struct dentry *dentry, struct au_dtime *dt, ++ struct dentry *src_dentry, struct au_pin *pin, ++ struct au_wr_dir_args *wr_dir_args) ++{ ++ struct dentry *wh_dentry, *h_parent; ++ struct super_block *sb; ++ struct au_branch *br; ++ int err; ++ unsigned int udba; ++ aufs_bindex_t bcpup; ++ ++ AuDbg("%pd\n", dentry); ++ ++ err = au_wr_dir(dentry, src_dentry, wr_dir_args); ++ bcpup = err; ++ wh_dentry = ERR_PTR(err); ++ if (unlikely(err < 0)) ++ goto out; ++ ++ sb = dentry->d_sb; ++ udba = au_opt_udba(sb); ++ err = au_pin(pin, dentry, bcpup, udba, ++ AuPin_DI_LOCKED | AuPin_MNT_WRITE); ++ wh_dentry = ERR_PTR(err); ++ if (unlikely(err)) ++ goto out; ++ ++ h_parent = au_pinned_h_parent(pin); ++ if (udba != AuOpt_UDBA_NONE ++ && au_dbstart(dentry) == bcpup) ++ err = au_may_add(dentry, bcpup, h_parent, ++ au_ftest_wrdir(wr_dir_args->flags, ISDIR)); ++ else if (unlikely(dentry->d_name.len > AUFS_MAX_NAMELEN)) ++ err = -ENAMETOOLONG; ++ wh_dentry = ERR_PTR(err); ++ if (unlikely(err)) ++ goto out_unpin; ++ ++ br = au_sbr(sb, bcpup); ++ if (dt) { ++ struct path tmp = { ++ .dentry = h_parent, ++ .mnt = au_br_mnt(br) ++ }; ++ au_dtime_store(dt, au_pinned_parent(pin), &tmp); ++ } ++ ++ wh_dentry = NULL; ++ if (bcpup != au_dbwh(dentry)) ++ goto out; /* success */ ++ ++ /* ++ * ENAMETOOLONG here means that if we allowed create such name, then it ++ * would not be able to removed in the future. So we don't allow such ++ * name here and we don't handle ENAMETOOLONG differently here. ++ */ ++ wh_dentry = au_wh_lkup(h_parent, &dentry->d_name, br); ++ ++out_unpin: ++ if (IS_ERR(wh_dentry)) ++ au_unpin(pin); ++out: ++ return wh_dentry; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++enum { Mknod, Symlink, Creat }; ++struct simple_arg { ++ int type; ++ union { ++ struct { ++ umode_t mode; ++ bool want_excl; ++ bool try_aopen; ++ struct vfsub_aopen_args *aopen; ++ } c; ++ struct { ++ const char *symname; ++ } s; ++ struct { ++ umode_t mode; ++ dev_t dev; ++ } m; ++ } u; ++}; ++ ++static int add_simple(struct inode *dir, struct dentry *dentry, ++ struct simple_arg *arg) ++{ ++ int err, rerr; ++ aufs_bindex_t bstart; ++ unsigned char created; ++ const unsigned char try_aopen ++ = (arg->type == Creat && arg->u.c.try_aopen); ++ struct dentry *wh_dentry, *parent; ++ struct inode *h_dir; ++ struct super_block *sb; ++ struct au_branch *br; ++ /* to reuduce stack size */ ++ struct { ++ struct au_dtime dt; ++ struct au_pin pin; ++ struct path h_path; ++ struct au_wr_dir_args wr_dir_args; ++ } *a; ++ ++ AuDbg("%pd\n", dentry); ++ IMustLock(dir); ++ ++ err = -ENOMEM; ++ a = kmalloc(sizeof(*a), GFP_NOFS); ++ if (unlikely(!a)) ++ goto out; ++ a->wr_dir_args.force_btgt = -1; ++ a->wr_dir_args.flags = AuWrDir_ADD_ENTRY; ++ ++ parent = dentry->d_parent; /* dir inode is locked */ ++ if (!try_aopen) { ++ err = aufs_read_lock(dentry, AuLock_DW | AuLock_GEN); ++ if (unlikely(err)) ++ goto out_free; ++ } ++ err = au_d_may_add(dentry); ++ if (unlikely(err)) ++ goto out_unlock; ++ if (!try_aopen) ++ di_write_lock_parent(parent); ++ wh_dentry = lock_hdir_lkup_wh(dentry, &a->dt, /*src_dentry*/NULL, ++ &a->pin, &a->wr_dir_args); ++ err = PTR_ERR(wh_dentry); ++ if (IS_ERR(wh_dentry)) ++ goto out_parent; ++ ++ bstart = au_dbstart(dentry); ++ sb = dentry->d_sb; ++ br = au_sbr(sb, bstart); ++ a->h_path.dentry = au_h_dptr(dentry, bstart); ++ a->h_path.mnt = au_br_mnt(br); ++ h_dir = au_pinned_h_dir(&a->pin); ++ switch (arg->type) { ++ case Creat: ++ err = 0; ++ if (!try_aopen || !h_dir->i_op->atomic_open) ++ err = vfsub_create(h_dir, &a->h_path, arg->u.c.mode, ++ arg->u.c.want_excl); ++ else ++ err = vfsub_atomic_open(h_dir, a->h_path.dentry, ++ arg->u.c.aopen, br); ++ break; ++ case Symlink: ++ err = vfsub_symlink(h_dir, &a->h_path, arg->u.s.symname); ++ break; ++ case Mknod: ++ err = vfsub_mknod(h_dir, &a->h_path, arg->u.m.mode, ++ arg->u.m.dev); ++ break; ++ default: ++ BUG(); ++ } ++ created = !err; ++ if (!err) ++ err = epilog(dir, bstart, wh_dentry, dentry); ++ ++ /* revert */ ++ if (unlikely(created && err && a->h_path.dentry->d_inode)) { ++ /* no delegation since it is just created */ ++ rerr = vfsub_unlink(h_dir, &a->h_path, /*delegated*/NULL, ++ /*force*/0); ++ if (rerr) { ++ AuIOErr("%pd revert failure(%d, %d)\n", ++ dentry, err, rerr); ++ err = -EIO; ++ } ++ au_dtime_revert(&a->dt); ++ } ++ ++ if (!err && try_aopen && !h_dir->i_op->atomic_open) ++ *arg->u.c.aopen->opened |= FILE_CREATED; ++ ++ au_unpin(&a->pin); ++ dput(wh_dentry); ++ ++out_parent: ++ if (!try_aopen) ++ di_write_unlock(parent); ++out_unlock: ++ if (unlikely(err)) { ++ au_update_dbstart(dentry); ++ d_drop(dentry); ++ } ++ if (!try_aopen) ++ aufs_read_unlock(dentry, AuLock_DW); ++out_free: ++ kfree(a); ++out: ++ return err; ++} ++ ++int aufs_mknod(struct inode *dir, struct dentry *dentry, umode_t mode, ++ dev_t dev) ++{ ++ struct simple_arg arg = { ++ .type = Mknod, ++ .u.m = { ++ .mode = mode, ++ .dev = dev ++ } ++ }; ++ return add_simple(dir, dentry, &arg); ++} ++ ++int aufs_symlink(struct inode *dir, struct dentry *dentry, const char *symname) ++{ ++ struct simple_arg arg = { ++ .type = Symlink, ++ .u.s.symname = symname ++ }; ++ return add_simple(dir, dentry, &arg); ++} ++ ++int aufs_create(struct inode *dir, struct dentry *dentry, umode_t mode, ++ bool want_excl) ++{ ++ struct simple_arg arg = { ++ .type = Creat, ++ .u.c = { ++ .mode = mode, ++ .want_excl = want_excl ++ } ++ }; ++ return add_simple(dir, dentry, &arg); ++} ++ ++int au_aopen_or_create(struct inode *dir, struct dentry *dentry, ++ struct vfsub_aopen_args *aopen_args) ++{ ++ struct simple_arg arg = { ++ .type = Creat, ++ .u.c = { ++ .mode = aopen_args->create_mode, ++ .want_excl = aopen_args->open_flag & O_EXCL, ++ .try_aopen = true, ++ .aopen = aopen_args ++ } ++ }; ++ return add_simple(dir, dentry, &arg); ++} ++ ++int aufs_tmpfile(struct inode *dir, struct dentry *dentry, umode_t mode) ++{ ++ int err; ++ aufs_bindex_t bindex; ++ struct super_block *sb; ++ struct dentry *parent, *h_parent, *h_dentry; ++ struct inode *h_dir, *inode; ++ struct vfsmount *h_mnt; ++ struct au_wr_dir_args wr_dir_args = { ++ .force_btgt = -1, ++ .flags = AuWrDir_TMPFILE ++ }; ++ ++ /* copy-up may happen */ ++ mutex_lock(&dir->i_mutex); ++ ++ sb = dir->i_sb; ++ err = si_read_lock(sb, AuLock_FLUSH | AuLock_NOPLM); ++ if (unlikely(err)) ++ goto out; ++ ++ err = au_di_init(dentry); ++ if (unlikely(err)) ++ goto out_si; ++ ++ err = -EBUSY; ++ parent = d_find_any_alias(dir); ++ AuDebugOn(!parent); ++ di_write_lock_parent(parent); ++ if (unlikely(parent->d_inode != dir)) ++ goto out_parent; ++ ++ err = au_digen_test(parent, au_sigen(sb)); ++ if (unlikely(err)) ++ goto out_parent; ++ ++ bindex = au_dbstart(parent); ++ au_set_dbstart(dentry, bindex); ++ au_set_dbend(dentry, bindex); ++ err = au_wr_dir(dentry, /*src_dentry*/NULL, &wr_dir_args); ++ bindex = err; ++ if (unlikely(err < 0)) ++ goto out_parent; ++ ++ err = -EOPNOTSUPP; ++ h_dir = au_h_iptr(dir, bindex); ++ if (unlikely(!h_dir->i_op->tmpfile)) ++ goto out_parent; ++ ++ h_mnt = au_sbr_mnt(sb, bindex); ++ err = vfsub_mnt_want_write(h_mnt); ++ if (unlikely(err)) ++ goto out_parent; ++ ++ h_parent = au_h_dptr(parent, bindex); ++ err = inode_permission(h_parent->d_inode, MAY_WRITE | MAY_EXEC); ++ if (unlikely(err)) ++ goto out_mnt; ++ ++ err = -ENOMEM; ++ h_dentry = d_alloc(h_parent, &dentry->d_name); ++ if (unlikely(!h_dentry)) ++ goto out_mnt; ++ ++ err = h_dir->i_op->tmpfile(h_dir, h_dentry, mode); ++ if (unlikely(err)) ++ goto out_dentry; ++ ++ au_set_dbstart(dentry, bindex); ++ au_set_dbend(dentry, bindex); ++ au_set_h_dptr(dentry, bindex, dget(h_dentry)); ++ inode = au_new_inode(dentry, /*must_new*/1); ++ if (IS_ERR(inode)) { ++ err = PTR_ERR(inode); ++ au_set_h_dptr(dentry, bindex, NULL); ++ au_set_dbstart(dentry, -1); ++ au_set_dbend(dentry, -1); ++ } else { ++ if (!inode->i_nlink) ++ set_nlink(inode, 1); ++ d_tmpfile(dentry, inode); ++ au_di(dentry)->di_tmpfile = 1; ++ ++ /* update without i_mutex */ ++ if (au_ibstart(dir) == au_dbstart(dentry)) ++ au_cpup_attr_timesizes(dir); ++ } ++ ++out_dentry: ++ dput(h_dentry); ++out_mnt: ++ vfsub_mnt_drop_write(h_mnt); ++out_parent: ++ di_write_unlock(parent); ++ dput(parent); ++ di_write_unlock(dentry); ++ if (!err) ++#if 0 ++ /* verbose coding for lock class name */ ++ au_rw_class(&au_di(dentry)->di_rwsem, ++ au_lc_key + AuLcNonDir_DIINFO); ++#else ++ ; ++#endif ++ else { ++ au_di_fin(dentry); ++ dentry->d_fsdata = NULL; ++ } ++out_si: ++ si_read_unlock(sb); ++out: ++ mutex_unlock(&dir->i_mutex); ++ return err; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++struct au_link_args { ++ aufs_bindex_t bdst, bsrc; ++ struct au_pin pin; ++ struct path h_path; ++ struct dentry *src_parent, *parent; ++}; ++ ++static int au_cpup_before_link(struct dentry *src_dentry, ++ struct au_link_args *a) ++{ ++ int err; ++ struct dentry *h_src_dentry; ++ struct au_cp_generic cpg = { ++ .dentry = src_dentry, ++ .bdst = a->bdst, ++ .bsrc = a->bsrc, ++ .len = -1, ++ .pin = &a->pin, ++ .flags = AuCpup_DTIME | AuCpup_HOPEN /* | AuCpup_KEEPLINO */ ++ }; ++ ++ di_read_lock_parent(a->src_parent, AuLock_IR); ++ err = au_test_and_cpup_dirs(src_dentry, a->bdst); ++ if (unlikely(err)) ++ goto out; ++ ++ h_src_dentry = au_h_dptr(src_dentry, a->bsrc); ++ err = au_pin(&a->pin, src_dentry, a->bdst, ++ au_opt_udba(src_dentry->d_sb), ++ AuPin_DI_LOCKED | AuPin_MNT_WRITE); ++ if (unlikely(err)) ++ goto out; ++ ++ err = au_sio_cpup_simple(&cpg); ++ au_unpin(&a->pin); ++ ++out: ++ di_read_unlock(a->src_parent, AuLock_IR); ++ return err; ++} ++ ++static int au_cpup_or_link(struct dentry *src_dentry, struct dentry *dentry, ++ struct au_link_args *a) ++{ ++ int err; ++ unsigned char plink; ++ aufs_bindex_t bend; ++ struct dentry *h_src_dentry; ++ struct inode *h_inode, *inode, *delegated; ++ struct super_block *sb; ++ struct file *h_file; ++ ++ plink = 0; ++ h_inode = NULL; ++ sb = src_dentry->d_sb; ++ inode = src_dentry->d_inode; ++ if (au_ibstart(inode) <= a->bdst) ++ h_inode = au_h_iptr(inode, a->bdst); ++ if (!h_inode || !h_inode->i_nlink) { ++ /* copyup src_dentry as the name of dentry. */ ++ bend = au_dbend(dentry); ++ if (bend < a->bsrc) ++ au_set_dbend(dentry, a->bsrc); ++ au_set_h_dptr(dentry, a->bsrc, ++ dget(au_h_dptr(src_dentry, a->bsrc))); ++ dget(a->h_path.dentry); ++ au_set_h_dptr(dentry, a->bdst, NULL); ++ AuDbg("temporary d_inode...\n"); ++ spin_lock(&dentry->d_lock); ++ dentry->d_inode = src_dentry->d_inode; /* tmp */ ++ spin_unlock(&dentry->d_lock); ++ h_file = au_h_open_pre(dentry, a->bsrc, /*force_wr*/0); ++ if (IS_ERR(h_file)) ++ err = PTR_ERR(h_file); ++ else { ++ struct au_cp_generic cpg = { ++ .dentry = dentry, ++ .bdst = a->bdst, ++ .bsrc = -1, ++ .len = -1, ++ .pin = &a->pin, ++ .flags = AuCpup_KEEPLINO ++ }; ++ err = au_sio_cpup_simple(&cpg); ++ au_h_open_post(dentry, a->bsrc, h_file); ++ if (!err) { ++ dput(a->h_path.dentry); ++ a->h_path.dentry = au_h_dptr(dentry, a->bdst); ++ } else ++ au_set_h_dptr(dentry, a->bdst, ++ a->h_path.dentry); ++ } ++ spin_lock(&dentry->d_lock); ++ dentry->d_inode = NULL; /* restore */ ++ spin_unlock(&dentry->d_lock); ++ AuDbg("temporary d_inode...done\n"); ++ au_set_h_dptr(dentry, a->bsrc, NULL); ++ au_set_dbend(dentry, bend); ++ } else { ++ /* the inode of src_dentry already exists on a.bdst branch */ ++ h_src_dentry = d_find_alias(h_inode); ++ if (!h_src_dentry && au_plink_test(inode)) { ++ plink = 1; ++ h_src_dentry = au_plink_lkup(inode, a->bdst); ++ err = PTR_ERR(h_src_dentry); ++ if (IS_ERR(h_src_dentry)) ++ goto out; ++ ++ if (unlikely(!h_src_dentry->d_inode)) { ++ dput(h_src_dentry); ++ h_src_dentry = NULL; ++ } ++ ++ } ++ if (h_src_dentry) { ++ delegated = NULL; ++ err = vfsub_link(h_src_dentry, au_pinned_h_dir(&a->pin), ++ &a->h_path, &delegated); ++ if (unlikely(err == -EWOULDBLOCK)) { ++ pr_warn("cannot retry for NFSv4 delegation" ++ " for an internal link\n"); ++ iput(delegated); ++ } ++ dput(h_src_dentry); ++ } else { ++ AuIOErr("no dentry found for hi%lu on b%d\n", ++ h_inode->i_ino, a->bdst); ++ err = -EIO; ++ } ++ } ++ ++ if (!err && !plink) ++ au_plink_append(inode, a->bdst, a->h_path.dentry); ++ ++out: ++ AuTraceErr(err); ++ return err; ++} ++ ++int aufs_link(struct dentry *src_dentry, struct inode *dir, ++ struct dentry *dentry) ++{ ++ int err, rerr; ++ struct au_dtime dt; ++ struct au_link_args *a; ++ struct dentry *wh_dentry, *h_src_dentry; ++ struct inode *inode, *delegated; ++ struct super_block *sb; ++ struct au_wr_dir_args wr_dir_args = { ++ /* .force_btgt = -1, */ ++ .flags = AuWrDir_ADD_ENTRY ++ }; ++ ++ IMustLock(dir); ++ inode = src_dentry->d_inode; ++ IMustLock(inode); ++ ++ err = -ENOMEM; ++ a = kzalloc(sizeof(*a), GFP_NOFS); ++ if (unlikely(!a)) ++ goto out; ++ ++ a->parent = dentry->d_parent; /* dir inode is locked */ ++ err = aufs_read_and_write_lock2(dentry, src_dentry, ++ AuLock_NOPLM | AuLock_GEN); ++ if (unlikely(err)) ++ goto out_kfree; ++ err = au_d_linkable(src_dentry); ++ if (unlikely(err)) ++ goto out_unlock; ++ err = au_d_may_add(dentry); ++ if (unlikely(err)) ++ goto out_unlock; ++ ++ a->src_parent = dget_parent(src_dentry); ++ wr_dir_args.force_btgt = au_ibstart(inode); ++ ++ di_write_lock_parent(a->parent); ++ wr_dir_args.force_btgt = au_wbr(dentry, wr_dir_args.force_btgt); ++ wh_dentry = lock_hdir_lkup_wh(dentry, &dt, src_dentry, &a->pin, ++ &wr_dir_args); ++ err = PTR_ERR(wh_dentry); ++ if (IS_ERR(wh_dentry)) ++ goto out_parent; ++ ++ err = 0; ++ sb = dentry->d_sb; ++ a->bdst = au_dbstart(dentry); ++ a->h_path.dentry = au_h_dptr(dentry, a->bdst); ++ a->h_path.mnt = au_sbr_mnt(sb, a->bdst); ++ a->bsrc = au_ibstart(inode); ++ h_src_dentry = au_h_d_alias(src_dentry, a->bsrc); ++ if (!h_src_dentry && au_di(src_dentry)->di_tmpfile) ++ h_src_dentry = dget(au_hi_wh(inode, a->bsrc)); ++ if (!h_src_dentry) { ++ a->bsrc = au_dbstart(src_dentry); ++ h_src_dentry = au_h_d_alias(src_dentry, a->bsrc); ++ AuDebugOn(!h_src_dentry); ++ } else if (IS_ERR(h_src_dentry)) { ++ err = PTR_ERR(h_src_dentry); ++ goto out_parent; ++ } ++ ++ if (au_opt_test(au_mntflags(sb), PLINK)) { ++ if (a->bdst < a->bsrc ++ /* && h_src_dentry->d_sb != a->h_path.dentry->d_sb */) ++ err = au_cpup_or_link(src_dentry, dentry, a); ++ else { ++ delegated = NULL; ++ err = vfsub_link(h_src_dentry, au_pinned_h_dir(&a->pin), ++ &a->h_path, &delegated); ++ if (unlikely(err == -EWOULDBLOCK)) { ++ pr_warn("cannot retry for NFSv4 delegation" ++ " for an internal link\n"); ++ iput(delegated); ++ } ++ } ++ dput(h_src_dentry); ++ } else { ++ /* ++ * copyup src_dentry to the branch we process, ++ * and then link(2) to it. ++ */ ++ dput(h_src_dentry); ++ if (a->bdst < a->bsrc ++ /* && h_src_dentry->d_sb != a->h_path.dentry->d_sb */) { ++ au_unpin(&a->pin); ++ di_write_unlock(a->parent); ++ err = au_cpup_before_link(src_dentry, a); ++ di_write_lock_parent(a->parent); ++ if (!err) ++ err = au_pin(&a->pin, dentry, a->bdst, ++ au_opt_udba(sb), ++ AuPin_DI_LOCKED | AuPin_MNT_WRITE); ++ if (unlikely(err)) ++ goto out_wh; ++ } ++ if (!err) { ++ h_src_dentry = au_h_dptr(src_dentry, a->bdst); ++ err = -ENOENT; ++ if (h_src_dentry && h_src_dentry->d_inode) { ++ delegated = NULL; ++ err = vfsub_link(h_src_dentry, ++ au_pinned_h_dir(&a->pin), ++ &a->h_path, &delegated); ++ if (unlikely(err == -EWOULDBLOCK)) { ++ pr_warn("cannot retry" ++ " for NFSv4 delegation" ++ " for an internal link\n"); ++ iput(delegated); ++ } ++ } ++ } ++ } ++ if (unlikely(err)) ++ goto out_unpin; ++ ++ if (wh_dentry) { ++ a->h_path.dentry = wh_dentry; ++ err = au_wh_unlink_dentry(au_pinned_h_dir(&a->pin), &a->h_path, ++ dentry); ++ if (unlikely(err)) ++ goto out_revert; ++ } ++ ++ au_dir_ts(dir, a->bdst); ++ dir->i_version++; ++ inc_nlink(inode); ++ inode->i_ctime = dir->i_ctime; ++ d_instantiate(dentry, au_igrab(inode)); ++ if (d_unhashed(a->h_path.dentry)) ++ /* some filesystem calls d_drop() */ ++ d_drop(dentry); ++ /* some filesystems consume an inode even hardlink */ ++ au_fhsm_wrote(sb, a->bdst, /*force*/0); ++ goto out_unpin; /* success */ ++ ++out_revert: ++ /* no delegation since it is just created */ ++ rerr = vfsub_unlink(au_pinned_h_dir(&a->pin), &a->h_path, ++ /*delegated*/NULL, /*force*/0); ++ if (unlikely(rerr)) { ++ AuIOErr("%pd reverting failed(%d, %d)\n", dentry, err, rerr); ++ err = -EIO; ++ } ++ au_dtime_revert(&dt); ++out_unpin: ++ au_unpin(&a->pin); ++out_wh: ++ dput(wh_dentry); ++out_parent: ++ di_write_unlock(a->parent); ++ dput(a->src_parent); ++out_unlock: ++ if (unlikely(err)) { ++ au_update_dbstart(dentry); ++ d_drop(dentry); ++ } ++ aufs_read_and_write_unlock2(dentry, src_dentry); ++out_kfree: ++ kfree(a); ++out: ++ AuTraceErr(err); ++ return err; ++} ++ ++int aufs_mkdir(struct inode *dir, struct dentry *dentry, umode_t mode) ++{ ++ int err, rerr; ++ aufs_bindex_t bindex; ++ unsigned char diropq; ++ struct path h_path; ++ struct dentry *wh_dentry, *parent, *opq_dentry; ++ struct mutex *h_mtx; ++ struct super_block *sb; ++ struct { ++ struct au_pin pin; ++ struct au_dtime dt; ++ } *a; /* reduce the stack usage */ ++ struct au_wr_dir_args wr_dir_args = { ++ .force_btgt = -1, ++ .flags = AuWrDir_ADD_ENTRY | AuWrDir_ISDIR ++ }; ++ ++ IMustLock(dir); ++ ++ err = -ENOMEM; ++ a = kmalloc(sizeof(*a), GFP_NOFS); ++ if (unlikely(!a)) ++ goto out; ++ ++ err = aufs_read_lock(dentry, AuLock_DW | AuLock_GEN); ++ if (unlikely(err)) ++ goto out_free; ++ err = au_d_may_add(dentry); ++ if (unlikely(err)) ++ goto out_unlock; ++ ++ parent = dentry->d_parent; /* dir inode is locked */ ++ di_write_lock_parent(parent); ++ wh_dentry = lock_hdir_lkup_wh(dentry, &a->dt, /*src_dentry*/NULL, ++ &a->pin, &wr_dir_args); ++ err = PTR_ERR(wh_dentry); ++ if (IS_ERR(wh_dentry)) ++ goto out_parent; ++ ++ sb = dentry->d_sb; ++ bindex = au_dbstart(dentry); ++ h_path.dentry = au_h_dptr(dentry, bindex); ++ h_path.mnt = au_sbr_mnt(sb, bindex); ++ err = vfsub_mkdir(au_pinned_h_dir(&a->pin), &h_path, mode); ++ if (unlikely(err)) ++ goto out_unpin; ++ ++ /* make the dir opaque */ ++ diropq = 0; ++ h_mtx = &h_path.dentry->d_inode->i_mutex; ++ if (wh_dentry ++ || au_opt_test(au_mntflags(sb), ALWAYS_DIROPQ)) { ++ mutex_lock_nested(h_mtx, AuLsc_I_CHILD); ++ opq_dentry = au_diropq_create(dentry, bindex); ++ mutex_unlock(h_mtx); ++ err = PTR_ERR(opq_dentry); ++ if (IS_ERR(opq_dentry)) ++ goto out_dir; ++ dput(opq_dentry); ++ diropq = 1; ++ } ++ ++ err = epilog(dir, bindex, wh_dentry, dentry); ++ if (!err) { ++ inc_nlink(dir); ++ goto out_unpin; /* success */ ++ } ++ ++ /* revert */ ++ if (diropq) { ++ AuLabel(revert opq); ++ mutex_lock_nested(h_mtx, AuLsc_I_CHILD); ++ rerr = au_diropq_remove(dentry, bindex); ++ mutex_unlock(h_mtx); ++ if (rerr) { ++ AuIOErr("%pd reverting diropq failed(%d, %d)\n", ++ dentry, err, rerr); ++ err = -EIO; ++ } ++ } ++ ++out_dir: ++ AuLabel(revert dir); ++ rerr = vfsub_rmdir(au_pinned_h_dir(&a->pin), &h_path); ++ if (rerr) { ++ AuIOErr("%pd reverting dir failed(%d, %d)\n", ++ dentry, err, rerr); ++ err = -EIO; ++ } ++ au_dtime_revert(&a->dt); ++out_unpin: ++ au_unpin(&a->pin); ++ dput(wh_dentry); ++out_parent: ++ di_write_unlock(parent); ++out_unlock: ++ if (unlikely(err)) { ++ au_update_dbstart(dentry); ++ d_drop(dentry); ++ } ++ aufs_read_unlock(dentry, AuLock_DW); ++out_free: ++ kfree(a); ++out: ++ return err; ++} +diff --git a/fs/aufs/i_op_del.c b/fs/aufs/i_op_del.c +new file mode 100644 +index 0000000..b4dd686 +--- /dev/null ++++ b/fs/aufs/i_op_del.c +@@ -0,0 +1,506 @@ ++/* ++ * Copyright (C) 2005-2016 Junjiro R. Okajima ++ * ++ * This program, aufs is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . ++ */ ++ ++/* ++ * inode operations (del entry) ++ */ ++ ++#include "aufs.h" ++ ++/* ++ * decide if a new whiteout for @dentry is necessary or not. ++ * when it is necessary, prepare the parent dir for the upper branch whose ++ * branch index is @bcpup for creation. the actual creation of the whiteout will ++ * be done by caller. ++ * return value: ++ * 0: wh is unnecessary ++ * plus: wh is necessary ++ * minus: error ++ */ ++int au_wr_dir_need_wh(struct dentry *dentry, int isdir, aufs_bindex_t *bcpup) ++{ ++ int need_wh, err; ++ aufs_bindex_t bstart; ++ struct super_block *sb; ++ ++ sb = dentry->d_sb; ++ bstart = au_dbstart(dentry); ++ if (*bcpup < 0) { ++ *bcpup = bstart; ++ if (au_test_ro(sb, bstart, dentry->d_inode)) { ++ err = AuWbrCopyup(au_sbi(sb), dentry); ++ *bcpup = err; ++ if (unlikely(err < 0)) ++ goto out; ++ } ++ } else ++ AuDebugOn(bstart < *bcpup ++ || au_test_ro(sb, *bcpup, dentry->d_inode)); ++ AuDbg("bcpup %d, bstart %d\n", *bcpup, bstart); ++ ++ if (*bcpup != bstart) { ++ err = au_cpup_dirs(dentry, *bcpup); ++ if (unlikely(err)) ++ goto out; ++ need_wh = 1; ++ } else { ++ struct au_dinfo *dinfo, *tmp; ++ ++ need_wh = -ENOMEM; ++ dinfo = au_di(dentry); ++ tmp = au_di_alloc(sb, AuLsc_DI_TMP); ++ if (tmp) { ++ au_di_cp(tmp, dinfo); ++ au_di_swap(tmp, dinfo); ++ /* returns the number of positive dentries */ ++ need_wh = au_lkup_dentry(dentry, bstart + 1, /*type*/0); ++ au_di_swap(tmp, dinfo); ++ au_rw_write_unlock(&tmp->di_rwsem); ++ au_di_free(tmp); ++ } ++ } ++ AuDbg("need_wh %d\n", need_wh); ++ err = need_wh; ++ ++out: ++ return err; ++} ++ ++/* ++ * simple tests for the del-entry operations. ++ * following the checks in vfs, plus the parent-child relationship. ++ */ ++int au_may_del(struct dentry *dentry, aufs_bindex_t bindex, ++ struct dentry *h_parent, int isdir) ++{ ++ int err; ++ umode_t h_mode; ++ struct dentry *h_dentry, *h_latest; ++ struct inode *h_inode; ++ ++ h_dentry = au_h_dptr(dentry, bindex); ++ h_inode = h_dentry->d_inode; ++ if (dentry->d_inode) { ++ err = -ENOENT; ++ if (unlikely(!h_inode || !h_inode->i_nlink)) ++ goto out; ++ ++ h_mode = h_inode->i_mode; ++ if (!isdir) { ++ err = -EISDIR; ++ if (unlikely(S_ISDIR(h_mode))) ++ goto out; ++ } else if (unlikely(!S_ISDIR(h_mode))) { ++ err = -ENOTDIR; ++ goto out; ++ } ++ } else { ++ /* rename(2) case */ ++ err = -EIO; ++ if (unlikely(h_inode)) ++ goto out; ++ } ++ ++ err = -ENOENT; ++ /* expected parent dir is locked */ ++ if (unlikely(h_parent != h_dentry->d_parent)) ++ goto out; ++ err = 0; ++ ++ /* ++ * rmdir a dir may break the consistency on some filesystem. ++ * let's try heavy test. ++ */ ++ err = -EACCES; ++ if (unlikely(!au_opt_test(au_mntflags(dentry->d_sb), DIRPERM1) ++ && au_test_h_perm(h_parent->d_inode, ++ MAY_EXEC | MAY_WRITE))) ++ goto out; ++ ++ h_latest = au_sio_lkup_one(&dentry->d_name, h_parent); ++ err = -EIO; ++ if (IS_ERR(h_latest)) ++ goto out; ++ if (h_latest == h_dentry) ++ err = 0; ++ dput(h_latest); ++ ++out: ++ return err; ++} ++ ++/* ++ * decide the branch where we operate for @dentry. the branch index will be set ++ * @rbcpup. after diciding it, 'pin' it and store the timestamps of the parent ++ * dir for reverting. ++ * when a new whiteout is necessary, create it. ++ */ ++static struct dentry* ++lock_hdir_create_wh(struct dentry *dentry, int isdir, aufs_bindex_t *rbcpup, ++ struct au_dtime *dt, struct au_pin *pin) ++{ ++ struct dentry *wh_dentry; ++ struct super_block *sb; ++ struct path h_path; ++ int err, need_wh; ++ unsigned int udba; ++ aufs_bindex_t bcpup; ++ ++ need_wh = au_wr_dir_need_wh(dentry, isdir, rbcpup); ++ wh_dentry = ERR_PTR(need_wh); ++ if (unlikely(need_wh < 0)) ++ goto out; ++ ++ sb = dentry->d_sb; ++ udba = au_opt_udba(sb); ++ bcpup = *rbcpup; ++ err = au_pin(pin, dentry, bcpup, udba, ++ AuPin_DI_LOCKED | AuPin_MNT_WRITE); ++ wh_dentry = ERR_PTR(err); ++ if (unlikely(err)) ++ goto out; ++ ++ h_path.dentry = au_pinned_h_parent(pin); ++ if (udba != AuOpt_UDBA_NONE ++ && au_dbstart(dentry) == bcpup) { ++ err = au_may_del(dentry, bcpup, h_path.dentry, isdir); ++ wh_dentry = ERR_PTR(err); ++ if (unlikely(err)) ++ goto out_unpin; ++ } ++ ++ h_path.mnt = au_sbr_mnt(sb, bcpup); ++ au_dtime_store(dt, au_pinned_parent(pin), &h_path); ++ wh_dentry = NULL; ++ if (!need_wh) ++ goto out; /* success, no need to create whiteout */ ++ ++ wh_dentry = au_wh_create(dentry, bcpup, h_path.dentry); ++ if (IS_ERR(wh_dentry)) ++ goto out_unpin; ++ ++ /* returns with the parent is locked and wh_dentry is dget-ed */ ++ goto out; /* success */ ++ ++out_unpin: ++ au_unpin(pin); ++out: ++ return wh_dentry; ++} ++ ++/* ++ * when removing a dir, rename it to a unique temporary whiteout-ed name first ++ * in order to be revertible and save time for removing many child whiteouts ++ * under the dir. ++ * returns 1 when there are too many child whiteout and caller should remove ++ * them asynchronously. returns 0 when the number of children is enough small to ++ * remove now or the branch fs is a remote fs. ++ * otherwise return an error. ++ */ ++static int renwh_and_rmdir(struct dentry *dentry, aufs_bindex_t bindex, ++ struct au_nhash *whlist, struct inode *dir) ++{ ++ int rmdir_later, err, dirwh; ++ struct dentry *h_dentry; ++ struct super_block *sb; ++ ++ sb = dentry->d_sb; ++ SiMustAnyLock(sb); ++ h_dentry = au_h_dptr(dentry, bindex); ++ err = au_whtmp_ren(h_dentry, au_sbr(sb, bindex)); ++ if (unlikely(err)) ++ goto out; ++ ++ /* stop monitoring */ ++ au_hn_free(au_hi(dentry->d_inode, bindex)); ++ ++ if (!au_test_fs_remote(h_dentry->d_sb)) { ++ dirwh = au_sbi(sb)->si_dirwh; ++ rmdir_later = (dirwh <= 1); ++ if (!rmdir_later) ++ rmdir_later = au_nhash_test_longer_wh(whlist, bindex, ++ dirwh); ++ if (rmdir_later) ++ return rmdir_later; ++ } ++ ++ err = au_whtmp_rmdir(dir, bindex, h_dentry, whlist); ++ if (unlikely(err)) { ++ AuIOErr("rmdir %pd, b%d failed, %d. ignored\n", ++ h_dentry, bindex, err); ++ err = 0; ++ } ++ ++out: ++ AuTraceErr(err); ++ return err; ++} ++ ++/* ++ * final procedure for deleting a entry. ++ * maintain dentry and iattr. ++ */ ++static void epilog(struct inode *dir, struct dentry *dentry, ++ aufs_bindex_t bindex) ++{ ++ struct inode *inode; ++ ++ inode = dentry->d_inode; ++ d_drop(dentry); ++ inode->i_ctime = dir->i_ctime; ++ ++ au_dir_ts(dir, bindex); ++ dir->i_version++; ++} ++ ++/* ++ * when an error happened, remove the created whiteout and revert everything. ++ */ ++static int do_revert(int err, struct inode *dir, aufs_bindex_t bindex, ++ aufs_bindex_t bwh, struct dentry *wh_dentry, ++ struct dentry *dentry, struct au_dtime *dt) ++{ ++ int rerr; ++ struct path h_path = { ++ .dentry = wh_dentry, ++ .mnt = au_sbr_mnt(dir->i_sb, bindex) ++ }; ++ ++ rerr = au_wh_unlink_dentry(au_h_iptr(dir, bindex), &h_path, dentry); ++ if (!rerr) { ++ au_set_dbwh(dentry, bwh); ++ au_dtime_revert(dt); ++ return 0; ++ } ++ ++ AuIOErr("%pd reverting whiteout failed(%d, %d)\n", dentry, err, rerr); ++ return -EIO; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++int aufs_unlink(struct inode *dir, struct dentry *dentry) ++{ ++ int err; ++ aufs_bindex_t bwh, bindex, bstart; ++ struct inode *inode, *h_dir, *delegated; ++ struct dentry *parent, *wh_dentry; ++ /* to reuduce stack size */ ++ struct { ++ struct au_dtime dt; ++ struct au_pin pin; ++ struct path h_path; ++ } *a; ++ ++ IMustLock(dir); ++ ++ err = -ENOMEM; ++ a = kmalloc(sizeof(*a), GFP_NOFS); ++ if (unlikely(!a)) ++ goto out; ++ ++ err = aufs_read_lock(dentry, AuLock_DW | AuLock_GEN); ++ if (unlikely(err)) ++ goto out_free; ++ err = au_d_hashed_positive(dentry); ++ if (unlikely(err)) ++ goto out_unlock; ++ inode = dentry->d_inode; ++ IMustLock(inode); ++ err = -EISDIR; ++ if (unlikely(d_is_dir(dentry))) ++ goto out_unlock; /* possible? */ ++ ++ bstart = au_dbstart(dentry); ++ bwh = au_dbwh(dentry); ++ bindex = -1; ++ parent = dentry->d_parent; /* dir inode is locked */ ++ di_write_lock_parent(parent); ++ wh_dentry = lock_hdir_create_wh(dentry, /*isdir*/0, &bindex, &a->dt, ++ &a->pin); ++ err = PTR_ERR(wh_dentry); ++ if (IS_ERR(wh_dentry)) ++ goto out_parent; ++ ++ a->h_path.mnt = au_sbr_mnt(dentry->d_sb, bstart); ++ a->h_path.dentry = au_h_dptr(dentry, bstart); ++ dget(a->h_path.dentry); ++ if (bindex == bstart) { ++ h_dir = au_pinned_h_dir(&a->pin); ++ delegated = NULL; ++ err = vfsub_unlink(h_dir, &a->h_path, &delegated, /*force*/0); ++ if (unlikely(err == -EWOULDBLOCK)) { ++ pr_warn("cannot retry for NFSv4 delegation" ++ " for an internal unlink\n"); ++ iput(delegated); ++ } ++ } else { ++ /* dir inode is locked */ ++ h_dir = wh_dentry->d_parent->d_inode; ++ IMustLock(h_dir); ++ err = 0; ++ } ++ ++ if (!err) { ++ vfsub_drop_nlink(inode); ++ epilog(dir, dentry, bindex); ++ ++ /* update target timestamps */ ++ if (bindex == bstart) { ++ vfsub_update_h_iattr(&a->h_path, /*did*/NULL); ++ /*ignore*/ ++ inode->i_ctime = a->h_path.dentry->d_inode->i_ctime; ++ } else ++ /* todo: this timestamp may be reverted later */ ++ inode->i_ctime = h_dir->i_ctime; ++ goto out_unpin; /* success */ ++ } ++ ++ /* revert */ ++ if (wh_dentry) { ++ int rerr; ++ ++ rerr = do_revert(err, dir, bindex, bwh, wh_dentry, dentry, ++ &a->dt); ++ if (rerr) ++ err = rerr; ++ } ++ ++out_unpin: ++ au_unpin(&a->pin); ++ dput(wh_dentry); ++ dput(a->h_path.dentry); ++out_parent: ++ di_write_unlock(parent); ++out_unlock: ++ aufs_read_unlock(dentry, AuLock_DW); ++out_free: ++ kfree(a); ++out: ++ return err; ++} ++ ++int aufs_rmdir(struct inode *dir, struct dentry *dentry) ++{ ++ int err, rmdir_later; ++ aufs_bindex_t bwh, bindex, bstart; ++ struct inode *inode; ++ struct dentry *parent, *wh_dentry, *h_dentry; ++ struct au_whtmp_rmdir *args; ++ /* to reuduce stack size */ ++ struct { ++ struct au_dtime dt; ++ struct au_pin pin; ++ } *a; ++ ++ IMustLock(dir); ++ ++ err = -ENOMEM; ++ a = kmalloc(sizeof(*a), GFP_NOFS); ++ if (unlikely(!a)) ++ goto out; ++ ++ err = aufs_read_lock(dentry, AuLock_DW | AuLock_FLUSH | AuLock_GEN); ++ if (unlikely(err)) ++ goto out_free; ++ err = au_alive_dir(dentry); ++ if (unlikely(err)) ++ goto out_unlock; ++ inode = dentry->d_inode; ++ IMustLock(inode); ++ err = -ENOTDIR; ++ if (unlikely(!d_is_dir(dentry))) ++ goto out_unlock; /* possible? */ ++ ++ err = -ENOMEM; ++ args = au_whtmp_rmdir_alloc(dir->i_sb, GFP_NOFS); ++ if (unlikely(!args)) ++ goto out_unlock; ++ ++ parent = dentry->d_parent; /* dir inode is locked */ ++ di_write_lock_parent(parent); ++ err = au_test_empty(dentry, &args->whlist); ++ if (unlikely(err)) ++ goto out_parent; ++ ++ bstart = au_dbstart(dentry); ++ bwh = au_dbwh(dentry); ++ bindex = -1; ++ wh_dentry = lock_hdir_create_wh(dentry, /*isdir*/1, &bindex, &a->dt, ++ &a->pin); ++ err = PTR_ERR(wh_dentry); ++ if (IS_ERR(wh_dentry)) ++ goto out_parent; ++ ++ h_dentry = au_h_dptr(dentry, bstart); ++ dget(h_dentry); ++ rmdir_later = 0; ++ if (bindex == bstart) { ++ err = renwh_and_rmdir(dentry, bstart, &args->whlist, dir); ++ if (err > 0) { ++ rmdir_later = err; ++ err = 0; ++ } ++ } else { ++ /* stop monitoring */ ++ au_hn_free(au_hi(inode, bstart)); ++ ++ /* dir inode is locked */ ++ IMustLock(wh_dentry->d_parent->d_inode); ++ err = 0; ++ } ++ ++ if (!err) { ++ vfsub_dead_dir(inode); ++ au_set_dbdiropq(dentry, -1); ++ epilog(dir, dentry, bindex); ++ ++ if (rmdir_later) { ++ au_whtmp_kick_rmdir(dir, bstart, h_dentry, args); ++ args = NULL; ++ } ++ ++ goto out_unpin; /* success */ ++ } ++ ++ /* revert */ ++ AuLabel(revert); ++ if (wh_dentry) { ++ int rerr; ++ ++ rerr = do_revert(err, dir, bindex, bwh, wh_dentry, dentry, ++ &a->dt); ++ if (rerr) ++ err = rerr; ++ } ++ ++out_unpin: ++ au_unpin(&a->pin); ++ dput(wh_dentry); ++ dput(h_dentry); ++out_parent: ++ di_write_unlock(parent); ++ if (args) ++ au_whtmp_rmdir_free(args); ++out_unlock: ++ aufs_read_unlock(dentry, AuLock_DW); ++out_free: ++ kfree(a); ++out: ++ AuTraceErr(err); ++ return err; ++} +diff --git a/fs/aufs/i_op_ren.c b/fs/aufs/i_op_ren.c +new file mode 100644 +index 0000000..6ce2ed6 +--- /dev/null ++++ b/fs/aufs/i_op_ren.c +@@ -0,0 +1,1013 @@ ++/* ++ * Copyright (C) 2005-2016 Junjiro R. Okajima ++ * ++ * This program, aufs is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . ++ */ ++ ++/* ++ * inode operation (rename entry) ++ * todo: this is crazy monster ++ */ ++ ++#include "aufs.h" ++ ++enum { AuSRC, AuDST, AuSrcDst }; ++enum { AuPARENT, AuCHILD, AuParentChild }; ++ ++#define AuRen_ISDIR 1 ++#define AuRen_ISSAMEDIR (1 << 1) ++#define AuRen_WHSRC (1 << 2) ++#define AuRen_WHDST (1 << 3) ++#define AuRen_MNT_WRITE (1 << 4) ++#define AuRen_DT_DSTDIR (1 << 5) ++#define AuRen_DIROPQ (1 << 6) ++#define au_ftest_ren(flags, name) ((flags) & AuRen_##name) ++#define au_fset_ren(flags, name) \ ++ do { (flags) |= AuRen_##name; } while (0) ++#define au_fclr_ren(flags, name) \ ++ do { (flags) &= ~AuRen_##name; } while (0) ++ ++struct au_ren_args { ++ struct { ++ struct dentry *dentry, *h_dentry, *parent, *h_parent, ++ *wh_dentry; ++ struct inode *dir, *inode; ++ struct au_hinode *hdir; ++ struct au_dtime dt[AuParentChild]; ++ aufs_bindex_t bstart; ++ } sd[AuSrcDst]; ++ ++#define src_dentry sd[AuSRC].dentry ++#define src_dir sd[AuSRC].dir ++#define src_inode sd[AuSRC].inode ++#define src_h_dentry sd[AuSRC].h_dentry ++#define src_parent sd[AuSRC].parent ++#define src_h_parent sd[AuSRC].h_parent ++#define src_wh_dentry sd[AuSRC].wh_dentry ++#define src_hdir sd[AuSRC].hdir ++#define src_h_dir sd[AuSRC].hdir->hi_inode ++#define src_dt sd[AuSRC].dt ++#define src_bstart sd[AuSRC].bstart ++ ++#define dst_dentry sd[AuDST].dentry ++#define dst_dir sd[AuDST].dir ++#define dst_inode sd[AuDST].inode ++#define dst_h_dentry sd[AuDST].h_dentry ++#define dst_parent sd[AuDST].parent ++#define dst_h_parent sd[AuDST].h_parent ++#define dst_wh_dentry sd[AuDST].wh_dentry ++#define dst_hdir sd[AuDST].hdir ++#define dst_h_dir sd[AuDST].hdir->hi_inode ++#define dst_dt sd[AuDST].dt ++#define dst_bstart sd[AuDST].bstart ++ ++ struct dentry *h_trap; ++ struct au_branch *br; ++ struct au_hinode *src_hinode; ++ struct path h_path; ++ struct au_nhash whlist; ++ aufs_bindex_t btgt, src_bwh, src_bdiropq; ++ ++ unsigned int flags; ++ ++ struct au_whtmp_rmdir *thargs; ++ struct dentry *h_dst; ++}; ++ ++/* ---------------------------------------------------------------------- */ ++ ++/* ++ * functions for reverting. ++ * when an error happened in a single rename systemcall, we should revert ++ * everything as if nothing happened. ++ * we don't need to revert the copied-up/down the parent dir since they are ++ * harmless. ++ */ ++ ++#define RevertFailure(fmt, ...) do { \ ++ AuIOErr("revert failure: " fmt " (%d, %d)\n", \ ++ ##__VA_ARGS__, err, rerr); \ ++ err = -EIO; \ ++} while (0) ++ ++static void au_ren_rev_diropq(int err, struct au_ren_args *a) ++{ ++ int rerr; ++ ++ au_hn_imtx_lock_nested(a->src_hinode, AuLsc_I_CHILD); ++ rerr = au_diropq_remove(a->src_dentry, a->btgt); ++ au_hn_imtx_unlock(a->src_hinode); ++ au_set_dbdiropq(a->src_dentry, a->src_bdiropq); ++ if (rerr) ++ RevertFailure("remove diropq %pd", a->src_dentry); ++} ++ ++static void au_ren_rev_rename(int err, struct au_ren_args *a) ++{ ++ int rerr; ++ struct inode *delegated; ++ ++ a->h_path.dentry = vfsub_lkup_one(&a->src_dentry->d_name, ++ a->src_h_parent); ++ rerr = PTR_ERR(a->h_path.dentry); ++ if (IS_ERR(a->h_path.dentry)) { ++ RevertFailure("lkup one %pd", a->src_dentry); ++ return; ++ } ++ ++ delegated = NULL; ++ rerr = vfsub_rename(a->dst_h_dir, ++ au_h_dptr(a->src_dentry, a->btgt), ++ a->src_h_dir, &a->h_path, &delegated); ++ if (unlikely(rerr == -EWOULDBLOCK)) { ++ pr_warn("cannot retry for NFSv4 delegation" ++ " for an internal rename\n"); ++ iput(delegated); ++ } ++ d_drop(a->h_path.dentry); ++ dput(a->h_path.dentry); ++ /* au_set_h_dptr(a->src_dentry, a->btgt, NULL); */ ++ if (rerr) ++ RevertFailure("rename %pd", a->src_dentry); ++} ++ ++static void au_ren_rev_whtmp(int err, struct au_ren_args *a) ++{ ++ int rerr; ++ struct inode *delegated; ++ ++ a->h_path.dentry = vfsub_lkup_one(&a->dst_dentry->d_name, ++ a->dst_h_parent); ++ rerr = PTR_ERR(a->h_path.dentry); ++ if (IS_ERR(a->h_path.dentry)) { ++ RevertFailure("lkup one %pd", a->dst_dentry); ++ return; ++ } ++ if (a->h_path.dentry->d_inode) { ++ d_drop(a->h_path.dentry); ++ dput(a->h_path.dentry); ++ return; ++ } ++ ++ delegated = NULL; ++ rerr = vfsub_rename(a->dst_h_dir, a->h_dst, a->dst_h_dir, &a->h_path, ++ &delegated); ++ if (unlikely(rerr == -EWOULDBLOCK)) { ++ pr_warn("cannot retry for NFSv4 delegation" ++ " for an internal rename\n"); ++ iput(delegated); ++ } ++ d_drop(a->h_path.dentry); ++ dput(a->h_path.dentry); ++ if (!rerr) ++ au_set_h_dptr(a->dst_dentry, a->btgt, dget(a->h_dst)); ++ else ++ RevertFailure("rename %pd", a->h_dst); ++} ++ ++static void au_ren_rev_whsrc(int err, struct au_ren_args *a) ++{ ++ int rerr; ++ ++ a->h_path.dentry = a->src_wh_dentry; ++ rerr = au_wh_unlink_dentry(a->src_h_dir, &a->h_path, a->src_dentry); ++ au_set_dbwh(a->src_dentry, a->src_bwh); ++ if (rerr) ++ RevertFailure("unlink %pd", a->src_wh_dentry); ++} ++#undef RevertFailure ++ ++/* ---------------------------------------------------------------------- */ ++ ++/* ++ * when we have to copyup the renaming entry, do it with the rename-target name ++ * in order to minimize the cost (the later actual rename is unnecessary). ++ * otherwise rename it on the target branch. ++ */ ++static int au_ren_or_cpup(struct au_ren_args *a) ++{ ++ int err; ++ struct dentry *d; ++ struct inode *delegated; ++ ++ d = a->src_dentry; ++ if (au_dbstart(d) == a->btgt) { ++ a->h_path.dentry = a->dst_h_dentry; ++ if (au_ftest_ren(a->flags, DIROPQ) ++ && au_dbdiropq(d) == a->btgt) ++ au_fclr_ren(a->flags, DIROPQ); ++ AuDebugOn(au_dbstart(d) != a->btgt); ++ delegated = NULL; ++ err = vfsub_rename(a->src_h_dir, au_h_dptr(d, a->btgt), ++ a->dst_h_dir, &a->h_path, &delegated); ++ if (unlikely(err == -EWOULDBLOCK)) { ++ pr_warn("cannot retry for NFSv4 delegation" ++ " for an internal rename\n"); ++ iput(delegated); ++ } ++ } else ++ BUG(); ++ ++ if (!err && a->h_dst) ++ /* it will be set to dinfo later */ ++ dget(a->h_dst); ++ ++ return err; ++} ++ ++/* cf. aufs_rmdir() */ ++static int au_ren_del_whtmp(struct au_ren_args *a) ++{ ++ int err; ++ struct inode *dir; ++ ++ dir = a->dst_dir; ++ SiMustAnyLock(dir->i_sb); ++ if (!au_nhash_test_longer_wh(&a->whlist, a->btgt, ++ au_sbi(dir->i_sb)->si_dirwh) ++ || au_test_fs_remote(a->h_dst->d_sb)) { ++ err = au_whtmp_rmdir(dir, a->btgt, a->h_dst, &a->whlist); ++ if (unlikely(err)) ++ pr_warn("failed removing whtmp dir %pd (%d), " ++ "ignored.\n", a->h_dst, err); ++ } else { ++ au_nhash_wh_free(&a->thargs->whlist); ++ a->thargs->whlist = a->whlist; ++ a->whlist.nh_num = 0; ++ au_whtmp_kick_rmdir(dir, a->btgt, a->h_dst, a->thargs); ++ dput(a->h_dst); ++ a->thargs = NULL; ++ } ++ ++ return 0; ++} ++ ++/* make it 'opaque' dir. */ ++static int au_ren_diropq(struct au_ren_args *a) ++{ ++ int err; ++ struct dentry *diropq; ++ ++ err = 0; ++ a->src_bdiropq = au_dbdiropq(a->src_dentry); ++ a->src_hinode = au_hi(a->src_inode, a->btgt); ++ au_hn_imtx_lock_nested(a->src_hinode, AuLsc_I_CHILD); ++ diropq = au_diropq_create(a->src_dentry, a->btgt); ++ au_hn_imtx_unlock(a->src_hinode); ++ if (IS_ERR(diropq)) ++ err = PTR_ERR(diropq); ++ else ++ dput(diropq); ++ ++ return err; ++} ++ ++static int do_rename(struct au_ren_args *a) ++{ ++ int err; ++ struct dentry *d, *h_d; ++ ++ /* prepare workqueue args for asynchronous rmdir */ ++ h_d = a->dst_h_dentry; ++ if (au_ftest_ren(a->flags, ISDIR) && h_d->d_inode) { ++ err = -ENOMEM; ++ a->thargs = au_whtmp_rmdir_alloc(a->src_dentry->d_sb, GFP_NOFS); ++ if (unlikely(!a->thargs)) ++ goto out; ++ a->h_dst = dget(h_d); ++ } ++ ++ /* create whiteout for src_dentry */ ++ if (au_ftest_ren(a->flags, WHSRC)) { ++ a->src_bwh = au_dbwh(a->src_dentry); ++ AuDebugOn(a->src_bwh >= 0); ++ a->src_wh_dentry ++ = au_wh_create(a->src_dentry, a->btgt, a->src_h_parent); ++ err = PTR_ERR(a->src_wh_dentry); ++ if (IS_ERR(a->src_wh_dentry)) ++ goto out_thargs; ++ } ++ ++ /* lookup whiteout for dentry */ ++ if (au_ftest_ren(a->flags, WHDST)) { ++ h_d = au_wh_lkup(a->dst_h_parent, &a->dst_dentry->d_name, ++ a->br); ++ err = PTR_ERR(h_d); ++ if (IS_ERR(h_d)) ++ goto out_whsrc; ++ if (!h_d->d_inode) ++ dput(h_d); ++ else ++ a->dst_wh_dentry = h_d; ++ } ++ ++ /* rename dentry to tmpwh */ ++ if (a->thargs) { ++ err = au_whtmp_ren(a->dst_h_dentry, a->br); ++ if (unlikely(err)) ++ goto out_whdst; ++ ++ d = a->dst_dentry; ++ au_set_h_dptr(d, a->btgt, NULL); ++ err = au_lkup_neg(d, a->btgt, /*wh*/0); ++ if (unlikely(err)) ++ goto out_whtmp; ++ a->dst_h_dentry = au_h_dptr(d, a->btgt); ++ } ++ ++ BUG_ON(a->dst_h_dentry->d_inode && a->src_bstart != a->btgt); ++ ++ /* rename by vfs_rename or cpup */ ++ d = a->dst_dentry; ++ if (au_ftest_ren(a->flags, ISDIR) ++ && (a->dst_wh_dentry ++ || au_dbdiropq(d) == a->btgt ++ /* hide the lower to keep xino */ ++ || a->btgt < au_dbend(d) ++ || au_opt_test(au_mntflags(d->d_sb), ALWAYS_DIROPQ))) ++ au_fset_ren(a->flags, DIROPQ); ++ err = au_ren_or_cpup(a); ++ if (unlikely(err)) ++ /* leave the copied-up one */ ++ goto out_whtmp; ++ ++ /* make dir opaque */ ++ if (au_ftest_ren(a->flags, DIROPQ)) { ++ err = au_ren_diropq(a); ++ if (unlikely(err)) ++ goto out_rename; ++ } ++ ++ /* update target timestamps */ ++ AuDebugOn(au_dbstart(a->src_dentry) != a->btgt); ++ a->h_path.dentry = au_h_dptr(a->src_dentry, a->btgt); ++ vfsub_update_h_iattr(&a->h_path, /*did*/NULL); /*ignore*/ ++ a->src_inode->i_ctime = a->h_path.dentry->d_inode->i_ctime; ++ ++ /* remove whiteout for dentry */ ++ if (a->dst_wh_dentry) { ++ a->h_path.dentry = a->dst_wh_dentry; ++ err = au_wh_unlink_dentry(a->dst_h_dir, &a->h_path, ++ a->dst_dentry); ++ if (unlikely(err)) ++ goto out_diropq; ++ } ++ ++ /* remove whtmp */ ++ if (a->thargs) ++ au_ren_del_whtmp(a); /* ignore this error */ ++ ++ au_fhsm_wrote(a->src_dentry->d_sb, a->btgt, /*force*/0); ++ err = 0; ++ goto out_success; ++ ++out_diropq: ++ if (au_ftest_ren(a->flags, DIROPQ)) ++ au_ren_rev_diropq(err, a); ++out_rename: ++ au_ren_rev_rename(err, a); ++ dput(a->h_dst); ++out_whtmp: ++ if (a->thargs) ++ au_ren_rev_whtmp(err, a); ++out_whdst: ++ dput(a->dst_wh_dentry); ++ a->dst_wh_dentry = NULL; ++out_whsrc: ++ if (a->src_wh_dentry) ++ au_ren_rev_whsrc(err, a); ++out_success: ++ dput(a->src_wh_dentry); ++ dput(a->dst_wh_dentry); ++out_thargs: ++ if (a->thargs) { ++ dput(a->h_dst); ++ au_whtmp_rmdir_free(a->thargs); ++ a->thargs = NULL; ++ } ++out: ++ return err; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++/* ++ * test if @dentry dir can be rename destination or not. ++ * success means, it is a logically empty dir. ++ */ ++static int may_rename_dstdir(struct dentry *dentry, struct au_nhash *whlist) ++{ ++ return au_test_empty(dentry, whlist); ++} ++ ++/* ++ * test if @dentry dir can be rename source or not. ++ * if it can, return 0 and @children is filled. ++ * success means, ++ * - it is a logically empty dir. ++ * - or, it exists on writable branch and has no children including whiteouts ++ * on the lower branch. ++ */ ++static int may_rename_srcdir(struct dentry *dentry, aufs_bindex_t btgt) ++{ ++ int err; ++ unsigned int rdhash; ++ aufs_bindex_t bstart; ++ ++ bstart = au_dbstart(dentry); ++ if (bstart != btgt) { ++ struct au_nhash whlist; ++ ++ SiMustAnyLock(dentry->d_sb); ++ rdhash = au_sbi(dentry->d_sb)->si_rdhash; ++ if (!rdhash) ++ rdhash = au_rdhash_est(au_dir_size(/*file*/NULL, ++ dentry)); ++ err = au_nhash_alloc(&whlist, rdhash, GFP_NOFS); ++ if (unlikely(err)) ++ goto out; ++ err = au_test_empty(dentry, &whlist); ++ au_nhash_wh_free(&whlist); ++ goto out; ++ } ++ ++ if (bstart == au_dbtaildir(dentry)) ++ return 0; /* success */ ++ ++ err = au_test_empty_lower(dentry); ++ ++out: ++ if (err == -ENOTEMPTY) { ++ AuWarn1("renaming dir who has child(ren) on multiple branches," ++ " is not supported\n"); ++ err = -EXDEV; ++ } ++ return err; ++} ++ ++/* side effect: sets whlist and h_dentry */ ++static int au_ren_may_dir(struct au_ren_args *a) ++{ ++ int err; ++ unsigned int rdhash; ++ struct dentry *d; ++ ++ d = a->dst_dentry; ++ SiMustAnyLock(d->d_sb); ++ ++ err = 0; ++ if (au_ftest_ren(a->flags, ISDIR) && a->dst_inode) { ++ rdhash = au_sbi(d->d_sb)->si_rdhash; ++ if (!rdhash) ++ rdhash = au_rdhash_est(au_dir_size(/*file*/NULL, d)); ++ err = au_nhash_alloc(&a->whlist, rdhash, GFP_NOFS); ++ if (unlikely(err)) ++ goto out; ++ ++ au_set_dbstart(d, a->dst_bstart); ++ err = may_rename_dstdir(d, &a->whlist); ++ au_set_dbstart(d, a->btgt); ++ } ++ a->dst_h_dentry = au_h_dptr(d, au_dbstart(d)); ++ if (unlikely(err)) ++ goto out; ++ ++ d = a->src_dentry; ++ a->src_h_dentry = au_h_dptr(d, au_dbstart(d)); ++ if (au_ftest_ren(a->flags, ISDIR)) { ++ err = may_rename_srcdir(d, a->btgt); ++ if (unlikely(err)) { ++ au_nhash_wh_free(&a->whlist); ++ a->whlist.nh_num = 0; ++ } ++ } ++out: ++ return err; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++/* ++ * simple tests for rename. ++ * following the checks in vfs, plus the parent-child relationship. ++ */ ++static int au_may_ren(struct au_ren_args *a) ++{ ++ int err, isdir; ++ struct inode *h_inode; ++ ++ if (a->src_bstart == a->btgt) { ++ err = au_may_del(a->src_dentry, a->btgt, a->src_h_parent, ++ au_ftest_ren(a->flags, ISDIR)); ++ if (unlikely(err)) ++ goto out; ++ err = -EINVAL; ++ if (unlikely(a->src_h_dentry == a->h_trap)) ++ goto out; ++ } ++ ++ err = 0; ++ if (a->dst_bstart != a->btgt) ++ goto out; ++ ++ err = -ENOTEMPTY; ++ if (unlikely(a->dst_h_dentry == a->h_trap)) ++ goto out; ++ ++ err = -EIO; ++ h_inode = a->dst_h_dentry->d_inode; ++ isdir = !!au_ftest_ren(a->flags, ISDIR); ++ if (!a->dst_dentry->d_inode) { ++ if (unlikely(h_inode)) ++ goto out; ++ err = au_may_add(a->dst_dentry, a->btgt, a->dst_h_parent, ++ isdir); ++ } else { ++ if (unlikely(!h_inode || !h_inode->i_nlink)) ++ goto out; ++ err = au_may_del(a->dst_dentry, a->btgt, a->dst_h_parent, ++ isdir); ++ if (unlikely(err)) ++ goto out; ++ } ++ ++out: ++ if (unlikely(err == -ENOENT || err == -EEXIST)) ++ err = -EIO; ++ AuTraceErr(err); ++ return err; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++/* ++ * locking order ++ * (VFS) ++ * - src_dir and dir by lock_rename() ++ * - inode if exitsts ++ * (aufs) ++ * - lock all ++ * + src_dentry and dentry by aufs_read_and_write_lock2() which calls, ++ * + si_read_lock ++ * + di_write_lock2_child() ++ * + di_write_lock_child() ++ * + ii_write_lock_child() ++ * + di_write_lock_child2() ++ * + ii_write_lock_child2() ++ * + src_parent and parent ++ * + di_write_lock_parent() ++ * + ii_write_lock_parent() ++ * + di_write_lock_parent2() ++ * + ii_write_lock_parent2() ++ * + lower src_dir and dir by vfsub_lock_rename() ++ * + verify the every relationships between child and parent. if any ++ * of them failed, unlock all and return -EBUSY. ++ */ ++static void au_ren_unlock(struct au_ren_args *a) ++{ ++ vfsub_unlock_rename(a->src_h_parent, a->src_hdir, ++ a->dst_h_parent, a->dst_hdir); ++ if (au_ftest_ren(a->flags, MNT_WRITE)) ++ vfsub_mnt_drop_write(au_br_mnt(a->br)); ++} ++ ++static int au_ren_lock(struct au_ren_args *a) ++{ ++ int err; ++ unsigned int udba; ++ ++ err = 0; ++ a->src_h_parent = au_h_dptr(a->src_parent, a->btgt); ++ a->src_hdir = au_hi(a->src_dir, a->btgt); ++ a->dst_h_parent = au_h_dptr(a->dst_parent, a->btgt); ++ a->dst_hdir = au_hi(a->dst_dir, a->btgt); ++ ++ err = vfsub_mnt_want_write(au_br_mnt(a->br)); ++ if (unlikely(err)) ++ goto out; ++ au_fset_ren(a->flags, MNT_WRITE); ++ a->h_trap = vfsub_lock_rename(a->src_h_parent, a->src_hdir, ++ a->dst_h_parent, a->dst_hdir); ++ udba = au_opt_udba(a->src_dentry->d_sb); ++ if (unlikely(a->src_hdir->hi_inode != a->src_h_parent->d_inode ++ || a->dst_hdir->hi_inode != a->dst_h_parent->d_inode)) ++ err = au_busy_or_stale(); ++ if (!err && au_dbstart(a->src_dentry) == a->btgt) ++ err = au_h_verify(a->src_h_dentry, udba, ++ a->src_h_parent->d_inode, a->src_h_parent, ++ a->br); ++ if (!err && au_dbstart(a->dst_dentry) == a->btgt) ++ err = au_h_verify(a->dst_h_dentry, udba, ++ a->dst_h_parent->d_inode, a->dst_h_parent, ++ a->br); ++ if (!err) ++ goto out; /* success */ ++ ++ err = au_busy_or_stale(); ++ au_ren_unlock(a); ++ ++out: ++ return err; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++static void au_ren_refresh_dir(struct au_ren_args *a) ++{ ++ struct inode *dir; ++ ++ dir = a->dst_dir; ++ dir->i_version++; ++ if (au_ftest_ren(a->flags, ISDIR)) { ++ /* is this updating defined in POSIX? */ ++ au_cpup_attr_timesizes(a->src_inode); ++ au_cpup_attr_nlink(dir, /*force*/1); ++ } ++ ++ au_dir_ts(dir, a->btgt); ++ ++ if (au_ftest_ren(a->flags, ISSAMEDIR)) ++ return; ++ ++ dir = a->src_dir; ++ dir->i_version++; ++ if (au_ftest_ren(a->flags, ISDIR)) ++ au_cpup_attr_nlink(dir, /*force*/1); ++ au_dir_ts(dir, a->btgt); ++} ++ ++static void au_ren_refresh(struct au_ren_args *a) ++{ ++ aufs_bindex_t bend, bindex; ++ struct dentry *d, *h_d; ++ struct inode *i, *h_i; ++ struct super_block *sb; ++ ++ d = a->dst_dentry; ++ d_drop(d); ++ if (a->h_dst) ++ /* already dget-ed by au_ren_or_cpup() */ ++ au_set_h_dptr(d, a->btgt, a->h_dst); ++ ++ i = a->dst_inode; ++ if (i) { ++ if (!au_ftest_ren(a->flags, ISDIR)) ++ vfsub_drop_nlink(i); ++ else { ++ vfsub_dead_dir(i); ++ au_cpup_attr_timesizes(i); ++ } ++ au_update_dbrange(d, /*do_put_zero*/1); ++ } else { ++ bend = a->btgt; ++ for (bindex = au_dbstart(d); bindex < bend; bindex++) ++ au_set_h_dptr(d, bindex, NULL); ++ bend = au_dbend(d); ++ for (bindex = a->btgt + 1; bindex <= bend; bindex++) ++ au_set_h_dptr(d, bindex, NULL); ++ au_update_dbrange(d, /*do_put_zero*/0); ++ } ++ ++ d = a->src_dentry; ++ au_set_dbwh(d, -1); ++ bend = au_dbend(d); ++ for (bindex = a->btgt + 1; bindex <= bend; bindex++) { ++ h_d = au_h_dptr(d, bindex); ++ if (h_d) ++ au_set_h_dptr(d, bindex, NULL); ++ } ++ au_set_dbend(d, a->btgt); ++ ++ sb = d->d_sb; ++ i = a->src_inode; ++ if (au_opt_test(au_mntflags(sb), PLINK) && au_plink_test(i)) ++ return; /* success */ ++ ++ bend = au_ibend(i); ++ for (bindex = a->btgt + 1; bindex <= bend; bindex++) { ++ h_i = au_h_iptr(i, bindex); ++ if (h_i) { ++ au_xino_write(sb, bindex, h_i->i_ino, /*ino*/0); ++ /* ignore this error */ ++ au_set_h_iptr(i, bindex, NULL, 0); ++ } ++ } ++ au_set_ibend(i, a->btgt); ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++/* mainly for link(2) and rename(2) */ ++int au_wbr(struct dentry *dentry, aufs_bindex_t btgt) ++{ ++ aufs_bindex_t bdiropq, bwh; ++ struct dentry *parent; ++ struct au_branch *br; ++ ++ parent = dentry->d_parent; ++ IMustLock(parent->d_inode); /* dir is locked */ ++ ++ bdiropq = au_dbdiropq(parent); ++ bwh = au_dbwh(dentry); ++ br = au_sbr(dentry->d_sb, btgt); ++ if (au_br_rdonly(br) ++ || (0 <= bdiropq && bdiropq < btgt) ++ || (0 <= bwh && bwh < btgt)) ++ btgt = -1; ++ ++ AuDbg("btgt %d\n", btgt); ++ return btgt; ++} ++ ++/* sets src_bstart, dst_bstart and btgt */ ++static int au_ren_wbr(struct au_ren_args *a) ++{ ++ int err; ++ struct au_wr_dir_args wr_dir_args = { ++ /* .force_btgt = -1, */ ++ .flags = AuWrDir_ADD_ENTRY ++ }; ++ ++ a->src_bstart = au_dbstart(a->src_dentry); ++ a->dst_bstart = au_dbstart(a->dst_dentry); ++ if (au_ftest_ren(a->flags, ISDIR)) ++ au_fset_wrdir(wr_dir_args.flags, ISDIR); ++ wr_dir_args.force_btgt = a->src_bstart; ++ if (a->dst_inode && a->dst_bstart < a->src_bstart) ++ wr_dir_args.force_btgt = a->dst_bstart; ++ wr_dir_args.force_btgt = au_wbr(a->dst_dentry, wr_dir_args.force_btgt); ++ err = au_wr_dir(a->dst_dentry, a->src_dentry, &wr_dir_args); ++ a->btgt = err; ++ ++ return err; ++} ++ ++static void au_ren_dt(struct au_ren_args *a) ++{ ++ a->h_path.dentry = a->src_h_parent; ++ au_dtime_store(a->src_dt + AuPARENT, a->src_parent, &a->h_path); ++ if (!au_ftest_ren(a->flags, ISSAMEDIR)) { ++ a->h_path.dentry = a->dst_h_parent; ++ au_dtime_store(a->dst_dt + AuPARENT, a->dst_parent, &a->h_path); ++ } ++ ++ au_fclr_ren(a->flags, DT_DSTDIR); ++ if (!au_ftest_ren(a->flags, ISDIR)) ++ return; ++ ++ a->h_path.dentry = a->src_h_dentry; ++ au_dtime_store(a->src_dt + AuCHILD, a->src_dentry, &a->h_path); ++ if (a->dst_h_dentry->d_inode) { ++ au_fset_ren(a->flags, DT_DSTDIR); ++ a->h_path.dentry = a->dst_h_dentry; ++ au_dtime_store(a->dst_dt + AuCHILD, a->dst_dentry, &a->h_path); ++ } ++} ++ ++static void au_ren_rev_dt(int err, struct au_ren_args *a) ++{ ++ struct dentry *h_d; ++ struct mutex *h_mtx; ++ ++ au_dtime_revert(a->src_dt + AuPARENT); ++ if (!au_ftest_ren(a->flags, ISSAMEDIR)) ++ au_dtime_revert(a->dst_dt + AuPARENT); ++ ++ if (au_ftest_ren(a->flags, ISDIR) && err != -EIO) { ++ h_d = a->src_dt[AuCHILD].dt_h_path.dentry; ++ h_mtx = &h_d->d_inode->i_mutex; ++ mutex_lock_nested(h_mtx, AuLsc_I_CHILD); ++ au_dtime_revert(a->src_dt + AuCHILD); ++ mutex_unlock(h_mtx); ++ ++ if (au_ftest_ren(a->flags, DT_DSTDIR)) { ++ h_d = a->dst_dt[AuCHILD].dt_h_path.dentry; ++ h_mtx = &h_d->d_inode->i_mutex; ++ mutex_lock_nested(h_mtx, AuLsc_I_CHILD); ++ au_dtime_revert(a->dst_dt + AuCHILD); ++ mutex_unlock(h_mtx); ++ } ++ } ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++int aufs_rename(struct inode *_src_dir, struct dentry *_src_dentry, ++ struct inode *_dst_dir, struct dentry *_dst_dentry) ++{ ++ int err, flags; ++ /* reduce stack space */ ++ struct au_ren_args *a; ++ ++ AuDbg("%pd, %pd\n", _src_dentry, _dst_dentry); ++ IMustLock(_src_dir); ++ IMustLock(_dst_dir); ++ ++ err = -ENOMEM; ++ BUILD_BUG_ON(sizeof(*a) > PAGE_SIZE); ++ a = kzalloc(sizeof(*a), GFP_NOFS); ++ if (unlikely(!a)) ++ goto out; ++ ++ a->src_dir = _src_dir; ++ a->src_dentry = _src_dentry; ++ a->src_inode = a->src_dentry->d_inode; ++ a->src_parent = a->src_dentry->d_parent; /* dir inode is locked */ ++ a->dst_dir = _dst_dir; ++ a->dst_dentry = _dst_dentry; ++ a->dst_inode = a->dst_dentry->d_inode; ++ a->dst_parent = a->dst_dentry->d_parent; /* dir inode is locked */ ++ if (a->dst_inode) { ++ IMustLock(a->dst_inode); ++ au_igrab(a->dst_inode); ++ } ++ ++ err = -ENOTDIR; ++ flags = AuLock_FLUSH | AuLock_NOPLM | AuLock_GEN; ++ if (d_is_dir(a->src_dentry)) { ++ au_fset_ren(a->flags, ISDIR); ++ if (unlikely(d_is_positive(a->dst_dentry) ++ && !d_is_dir(a->dst_dentry))) ++ goto out_free; ++ flags |= AuLock_DIRS; ++ } ++ err = aufs_read_and_write_lock2(a->dst_dentry, a->src_dentry, flags); ++ if (unlikely(err)) ++ goto out_free; ++ ++ err = au_d_hashed_positive(a->src_dentry); ++ if (unlikely(err)) ++ goto out_unlock; ++ err = -ENOENT; ++ if (a->dst_inode) { ++ /* ++ * If it is a dir, VFS unhash dst_dentry before this ++ * function. It means we cannot rely upon d_unhashed(). ++ */ ++ if (unlikely(!a->dst_inode->i_nlink)) ++ goto out_unlock; ++ if (!S_ISDIR(a->dst_inode->i_mode)) { ++ err = au_d_hashed_positive(a->dst_dentry); ++ if (unlikely(err)) ++ goto out_unlock; ++ } else if (unlikely(IS_DEADDIR(a->dst_inode))) ++ goto out_unlock; ++ } else if (unlikely(d_unhashed(a->dst_dentry))) ++ goto out_unlock; ++ ++ /* ++ * is it possible? ++ * yes, it happened (in linux-3.3-rcN) but I don't know why. ++ * there may exist a problem somewhere else. ++ */ ++ err = -EINVAL; ++ if (unlikely(a->dst_parent->d_inode == a->src_dentry->d_inode)) ++ goto out_unlock; ++ ++ au_fset_ren(a->flags, ISSAMEDIR); /* temporary */ ++ di_write_lock_parent(a->dst_parent); ++ ++ /* which branch we process */ ++ err = au_ren_wbr(a); ++ if (unlikely(err < 0)) ++ goto out_parent; ++ a->br = au_sbr(a->dst_dentry->d_sb, a->btgt); ++ a->h_path.mnt = au_br_mnt(a->br); ++ ++ /* are they available to be renamed */ ++ err = au_ren_may_dir(a); ++ if (unlikely(err)) ++ goto out_children; ++ ++ /* prepare the writable parent dir on the same branch */ ++ if (a->dst_bstart == a->btgt) { ++ au_fset_ren(a->flags, WHDST); ++ } else { ++ err = au_cpup_dirs(a->dst_dentry, a->btgt); ++ if (unlikely(err)) ++ goto out_children; ++ } ++ ++ if (a->src_dir != a->dst_dir) { ++ /* ++ * this temporary unlock is safe, ++ * because both dir->i_mutex are locked. ++ */ ++ di_write_unlock(a->dst_parent); ++ di_write_lock_parent(a->src_parent); ++ err = au_wr_dir_need_wh(a->src_dentry, ++ au_ftest_ren(a->flags, ISDIR), ++ &a->btgt); ++ di_write_unlock(a->src_parent); ++ di_write_lock2_parent(a->src_parent, a->dst_parent, /*isdir*/1); ++ au_fclr_ren(a->flags, ISSAMEDIR); ++ } else ++ err = au_wr_dir_need_wh(a->src_dentry, ++ au_ftest_ren(a->flags, ISDIR), ++ &a->btgt); ++ if (unlikely(err < 0)) ++ goto out_children; ++ if (err) ++ au_fset_ren(a->flags, WHSRC); ++ ++ /* cpup src */ ++ if (a->src_bstart != a->btgt) { ++ struct au_pin pin; ++ ++ err = au_pin(&pin, a->src_dentry, a->btgt, ++ au_opt_udba(a->src_dentry->d_sb), ++ AuPin_DI_LOCKED | AuPin_MNT_WRITE); ++ if (!err) { ++ struct au_cp_generic cpg = { ++ .dentry = a->src_dentry, ++ .bdst = a->btgt, ++ .bsrc = a->src_bstart, ++ .len = -1, ++ .pin = &pin, ++ .flags = AuCpup_DTIME | AuCpup_HOPEN ++ }; ++ AuDebugOn(au_dbstart(a->src_dentry) != a->src_bstart); ++ err = au_sio_cpup_simple(&cpg); ++ au_unpin(&pin); ++ } ++ if (unlikely(err)) ++ goto out_children; ++ a->src_bstart = a->btgt; ++ a->src_h_dentry = au_h_dptr(a->src_dentry, a->btgt); ++ au_fset_ren(a->flags, WHSRC); ++ } ++ ++ /* lock them all */ ++ err = au_ren_lock(a); ++ if (unlikely(err)) ++ /* leave the copied-up one */ ++ goto out_children; ++ ++ if (!au_opt_test(au_mntflags(a->dst_dir->i_sb), UDBA_NONE)) ++ err = au_may_ren(a); ++ else if (unlikely(a->dst_dentry->d_name.len > AUFS_MAX_NAMELEN)) ++ err = -ENAMETOOLONG; ++ if (unlikely(err)) ++ goto out_hdir; ++ ++ /* store timestamps to be revertible */ ++ au_ren_dt(a); ++ ++ /* here we go */ ++ err = do_rename(a); ++ if (unlikely(err)) ++ goto out_dt; ++ ++ /* update dir attributes */ ++ au_ren_refresh_dir(a); ++ ++ /* dput/iput all lower dentries */ ++ au_ren_refresh(a); ++ ++ goto out_hdir; /* success */ ++ ++out_dt: ++ au_ren_rev_dt(err, a); ++out_hdir: ++ au_ren_unlock(a); ++out_children: ++ au_nhash_wh_free(&a->whlist); ++ if (err && a->dst_inode && a->dst_bstart != a->btgt) { ++ AuDbg("bstart %d, btgt %d\n", a->dst_bstart, a->btgt); ++ au_set_h_dptr(a->dst_dentry, a->btgt, NULL); ++ au_set_dbstart(a->dst_dentry, a->dst_bstart); ++ } ++out_parent: ++ if (!err) ++ d_move(a->src_dentry, a->dst_dentry); ++ else { ++ au_update_dbstart(a->dst_dentry); ++ if (!a->dst_inode) ++ d_drop(a->dst_dentry); ++ } ++ if (au_ftest_ren(a->flags, ISSAMEDIR)) ++ di_write_unlock(a->dst_parent); ++ else ++ di_write_unlock2(a->src_parent, a->dst_parent); ++out_unlock: ++ aufs_read_and_write_unlock2(a->dst_dentry, a->src_dentry); ++out_free: ++ iput(a->dst_inode); ++ if (a->thargs) ++ au_whtmp_rmdir_free(a->thargs); ++ kfree(a); ++out: ++ AuTraceErr(err); ++ return err; ++} +diff --git a/fs/aufs/iinfo.c b/fs/aufs/iinfo.c +new file mode 100644 +index 0000000..f889aba +--- /dev/null ++++ b/fs/aufs/iinfo.c +@@ -0,0 +1,277 @@ ++/* ++ * Copyright (C) 2005-2016 Junjiro R. Okajima ++ * ++ * This program, aufs is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . ++ */ ++ ++/* ++ * inode private data ++ */ ++ ++#include "aufs.h" ++ ++struct inode *au_h_iptr(struct inode *inode, aufs_bindex_t bindex) ++{ ++ struct inode *h_inode; ++ ++ IiMustAnyLock(inode); ++ ++ h_inode = au_ii(inode)->ii_hinode[0 + bindex].hi_inode; ++ AuDebugOn(h_inode && atomic_read(&h_inode->i_count) <= 0); ++ return h_inode; ++} ++ ++/* todo: hard/soft set? */ ++void au_hiput(struct au_hinode *hinode) ++{ ++ au_hn_free(hinode); ++ dput(hinode->hi_whdentry); ++ iput(hinode->hi_inode); ++} ++ ++unsigned int au_hi_flags(struct inode *inode, int isdir) ++{ ++ unsigned int flags; ++ const unsigned int mnt_flags = au_mntflags(inode->i_sb); ++ ++ flags = 0; ++ if (au_opt_test(mnt_flags, XINO)) ++ au_fset_hi(flags, XINO); ++ if (isdir && au_opt_test(mnt_flags, UDBA_HNOTIFY)) ++ au_fset_hi(flags, HNOTIFY); ++ return flags; ++} ++ ++void au_set_h_iptr(struct inode *inode, aufs_bindex_t bindex, ++ struct inode *h_inode, unsigned int flags) ++{ ++ struct au_hinode *hinode; ++ struct inode *hi; ++ struct au_iinfo *iinfo = au_ii(inode); ++ ++ IiMustWriteLock(inode); ++ ++ hinode = iinfo->ii_hinode + bindex; ++ hi = hinode->hi_inode; ++ AuDebugOn(h_inode && atomic_read(&h_inode->i_count) <= 0); ++ ++ if (hi) ++ au_hiput(hinode); ++ hinode->hi_inode = h_inode; ++ if (h_inode) { ++ int err; ++ struct super_block *sb = inode->i_sb; ++ struct au_branch *br; ++ ++ AuDebugOn(inode->i_mode ++ && (h_inode->i_mode & S_IFMT) ++ != (inode->i_mode & S_IFMT)); ++ if (bindex == iinfo->ii_bstart) ++ au_cpup_igen(inode, h_inode); ++ br = au_sbr(sb, bindex); ++ hinode->hi_id = br->br_id; ++ if (au_ftest_hi(flags, XINO)) { ++ err = au_xino_write(sb, bindex, h_inode->i_ino, ++ inode->i_ino); ++ if (unlikely(err)) ++ AuIOErr1("failed au_xino_write() %d\n", err); ++ } ++ ++ if (au_ftest_hi(flags, HNOTIFY) ++ && au_br_hnotifyable(br->br_perm)) { ++ err = au_hn_alloc(hinode, inode); ++ if (unlikely(err)) ++ AuIOErr1("au_hn_alloc() %d\n", err); ++ } ++ } ++} ++ ++void au_set_hi_wh(struct inode *inode, aufs_bindex_t bindex, ++ struct dentry *h_wh) ++{ ++ struct au_hinode *hinode; ++ ++ IiMustWriteLock(inode); ++ ++ hinode = au_ii(inode)->ii_hinode + bindex; ++ AuDebugOn(hinode->hi_whdentry); ++ hinode->hi_whdentry = h_wh; ++} ++ ++void au_update_iigen(struct inode *inode, int half) ++{ ++ struct au_iinfo *iinfo; ++ struct au_iigen *iigen; ++ unsigned int sigen; ++ ++ sigen = au_sigen(inode->i_sb); ++ iinfo = au_ii(inode); ++ iigen = &iinfo->ii_generation; ++ spin_lock(&iigen->ig_spin); ++ iigen->ig_generation = sigen; ++ if (half) ++ au_ig_fset(iigen->ig_flags, HALF_REFRESHED); ++ else ++ au_ig_fclr(iigen->ig_flags, HALF_REFRESHED); ++ spin_unlock(&iigen->ig_spin); ++} ++ ++/* it may be called at remount time, too */ ++void au_update_ibrange(struct inode *inode, int do_put_zero) ++{ ++ struct au_iinfo *iinfo; ++ aufs_bindex_t bindex, bend; ++ ++ iinfo = au_ii(inode); ++ if (!iinfo) ++ return; ++ ++ IiMustWriteLock(inode); ++ ++ if (do_put_zero && iinfo->ii_bstart >= 0) { ++ for (bindex = iinfo->ii_bstart; bindex <= iinfo->ii_bend; ++ bindex++) { ++ struct inode *h_i; ++ ++ h_i = iinfo->ii_hinode[0 + bindex].hi_inode; ++ if (h_i ++ && !h_i->i_nlink ++ && !(h_i->i_state & I_LINKABLE)) ++ au_set_h_iptr(inode, bindex, NULL, 0); ++ } ++ } ++ ++ iinfo->ii_bstart = -1; ++ iinfo->ii_bend = -1; ++ bend = au_sbend(inode->i_sb); ++ for (bindex = 0; bindex <= bend; bindex++) ++ if (iinfo->ii_hinode[0 + bindex].hi_inode) { ++ iinfo->ii_bstart = bindex; ++ break; ++ } ++ if (iinfo->ii_bstart >= 0) ++ for (bindex = bend; bindex >= iinfo->ii_bstart; bindex--) ++ if (iinfo->ii_hinode[0 + bindex].hi_inode) { ++ iinfo->ii_bend = bindex; ++ break; ++ } ++ AuDebugOn(iinfo->ii_bstart > iinfo->ii_bend); ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++void au_icntnr_init_once(void *_c) ++{ ++ struct au_icntnr *c = _c; ++ struct au_iinfo *iinfo = &c->iinfo; ++ static struct lock_class_key aufs_ii; ++ ++ spin_lock_init(&iinfo->ii_generation.ig_spin); ++ au_rw_init(&iinfo->ii_rwsem); ++ au_rw_class(&iinfo->ii_rwsem, &aufs_ii); ++ inode_init_once(&c->vfs_inode); ++} ++ ++int au_iinfo_init(struct inode *inode) ++{ ++ struct au_iinfo *iinfo; ++ struct super_block *sb; ++ int nbr, i; ++ ++ sb = inode->i_sb; ++ iinfo = &(container_of(inode, struct au_icntnr, vfs_inode)->iinfo); ++ nbr = au_sbend(sb) + 1; ++ if (unlikely(nbr <= 0)) ++ nbr = 1; ++ iinfo->ii_hinode = kcalloc(nbr, sizeof(*iinfo->ii_hinode), GFP_NOFS); ++ if (iinfo->ii_hinode) { ++ au_ninodes_inc(sb); ++ for (i = 0; i < nbr; i++) ++ iinfo->ii_hinode[i].hi_id = -1; ++ ++ iinfo->ii_generation.ig_generation = au_sigen(sb); ++ iinfo->ii_bstart = -1; ++ iinfo->ii_bend = -1; ++ iinfo->ii_vdir = NULL; ++ return 0; ++ } ++ return -ENOMEM; ++} ++ ++int au_ii_realloc(struct au_iinfo *iinfo, int nbr) ++{ ++ int err, sz; ++ struct au_hinode *hip; ++ ++ AuRwMustWriteLock(&iinfo->ii_rwsem); ++ ++ err = -ENOMEM; ++ sz = sizeof(*hip) * (iinfo->ii_bend + 1); ++ if (!sz) ++ sz = sizeof(*hip); ++ hip = au_kzrealloc(iinfo->ii_hinode, sz, sizeof(*hip) * nbr, GFP_NOFS); ++ if (hip) { ++ iinfo->ii_hinode = hip; ++ err = 0; ++ } ++ ++ return err; ++} ++ ++void au_iinfo_fin(struct inode *inode) ++{ ++ struct au_iinfo *iinfo; ++ struct au_hinode *hi; ++ struct super_block *sb; ++ aufs_bindex_t bindex, bend; ++ const unsigned char unlinked = !inode->i_nlink; ++ ++ iinfo = au_ii(inode); ++ /* bad_inode case */ ++ if (!iinfo) ++ return; ++ ++ sb = inode->i_sb; ++ au_ninodes_dec(sb); ++ if (si_pid_test(sb)) ++ au_xino_delete_inode(inode, unlinked); ++ else { ++ /* ++ * it is safe to hide the dependency between sbinfo and ++ * sb->s_umount. ++ */ ++ lockdep_off(); ++ si_noflush_read_lock(sb); ++ au_xino_delete_inode(inode, unlinked); ++ si_read_unlock(sb); ++ lockdep_on(); ++ } ++ ++ if (iinfo->ii_vdir) ++ au_vdir_free(iinfo->ii_vdir); ++ ++ bindex = iinfo->ii_bstart; ++ if (bindex >= 0) { ++ hi = iinfo->ii_hinode + bindex; ++ bend = iinfo->ii_bend; ++ while (bindex++ <= bend) { ++ if (hi->hi_inode) ++ au_hiput(hi); ++ hi++; ++ } ++ } ++ kfree(iinfo->ii_hinode); ++ iinfo->ii_hinode = NULL; ++ AuRwDestroy(&iinfo->ii_rwsem); ++} +diff --git a/fs/aufs/inode.c b/fs/aufs/inode.c +new file mode 100644 +index 0000000..75ec2e5 +--- /dev/null ++++ b/fs/aufs/inode.c +@@ -0,0 +1,522 @@ ++/* ++ * Copyright (C) 2005-2016 Junjiro R. Okajima ++ * ++ * This program, aufs is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . ++ */ ++ ++/* ++ * inode functions ++ */ ++ ++#include "aufs.h" ++ ++struct inode *au_igrab(struct inode *inode) ++{ ++ if (inode) { ++ AuDebugOn(!atomic_read(&inode->i_count)); ++ ihold(inode); ++ } ++ return inode; ++} ++ ++static void au_refresh_hinode_attr(struct inode *inode, int do_version) ++{ ++ au_cpup_attr_all(inode, /*force*/0); ++ au_update_iigen(inode, /*half*/1); ++ if (do_version) ++ inode->i_version++; ++} ++ ++static int au_ii_refresh(struct inode *inode, int *update) ++{ ++ int err, e; ++ umode_t type; ++ aufs_bindex_t bindex, new_bindex; ++ struct super_block *sb; ++ struct au_iinfo *iinfo; ++ struct au_hinode *p, *q, tmp; ++ ++ IiMustWriteLock(inode); ++ ++ *update = 0; ++ sb = inode->i_sb; ++ type = inode->i_mode & S_IFMT; ++ iinfo = au_ii(inode); ++ err = au_ii_realloc(iinfo, au_sbend(sb) + 1); ++ if (unlikely(err)) ++ goto out; ++ ++ AuDebugOn(iinfo->ii_bstart < 0); ++ p = iinfo->ii_hinode + iinfo->ii_bstart; ++ for (bindex = iinfo->ii_bstart; bindex <= iinfo->ii_bend; ++ bindex++, p++) { ++ if (!p->hi_inode) ++ continue; ++ ++ AuDebugOn(type != (p->hi_inode->i_mode & S_IFMT)); ++ new_bindex = au_br_index(sb, p->hi_id); ++ if (new_bindex == bindex) ++ continue; ++ ++ if (new_bindex < 0) { ++ *update = 1; ++ au_hiput(p); ++ p->hi_inode = NULL; ++ continue; ++ } ++ ++ if (new_bindex < iinfo->ii_bstart) ++ iinfo->ii_bstart = new_bindex; ++ if (iinfo->ii_bend < new_bindex) ++ iinfo->ii_bend = new_bindex; ++ /* swap two lower inode, and loop again */ ++ q = iinfo->ii_hinode + new_bindex; ++ tmp = *q; ++ *q = *p; ++ *p = tmp; ++ if (tmp.hi_inode) { ++ bindex--; ++ p--; ++ } ++ } ++ au_update_ibrange(inode, /*do_put_zero*/0); ++ e = au_dy_irefresh(inode); ++ if (unlikely(e && !err)) ++ err = e; ++ ++out: ++ AuTraceErr(err); ++ return err; ++} ++ ++void au_refresh_iop(struct inode *inode, int force_getattr) ++{ ++ int type; ++ struct au_sbinfo *sbi = au_sbi(inode->i_sb); ++ const struct inode_operations *iop ++ = force_getattr ? aufs_iop : sbi->si_iop_array; ++ ++ if (inode->i_op == iop) ++ return; ++ ++ switch (inode->i_mode & S_IFMT) { ++ case S_IFDIR: ++ type = AuIop_DIR; ++ break; ++ case S_IFLNK: ++ type = AuIop_SYMLINK; ++ break; ++ default: ++ type = AuIop_OTHER; ++ break; ++ } ++ ++ inode->i_op = iop + type; ++ /* unnecessary smp_wmb() */ ++} ++ ++int au_refresh_hinode_self(struct inode *inode) ++{ ++ int err, update; ++ ++ err = au_ii_refresh(inode, &update); ++ if (!err) ++ au_refresh_hinode_attr(inode, update && S_ISDIR(inode->i_mode)); ++ ++ AuTraceErr(err); ++ return err; ++} ++ ++int au_refresh_hinode(struct inode *inode, struct dentry *dentry) ++{ ++ int err, e, update; ++ unsigned int flags; ++ umode_t mode; ++ aufs_bindex_t bindex, bend; ++ unsigned char isdir; ++ struct au_hinode *p; ++ struct au_iinfo *iinfo; ++ ++ err = au_ii_refresh(inode, &update); ++ if (unlikely(err)) ++ goto out; ++ ++ update = 0; ++ iinfo = au_ii(inode); ++ p = iinfo->ii_hinode + iinfo->ii_bstart; ++ mode = (inode->i_mode & S_IFMT); ++ isdir = S_ISDIR(mode); ++ flags = au_hi_flags(inode, isdir); ++ bend = au_dbend(dentry); ++ for (bindex = au_dbstart(dentry); bindex <= bend; bindex++) { ++ struct inode *h_i; ++ struct dentry *h_d; ++ ++ h_d = au_h_dptr(dentry, bindex); ++ if (!h_d || !h_d->d_inode) ++ continue; ++ ++ AuDebugOn(mode != (h_d->d_inode->i_mode & S_IFMT)); ++ if (iinfo->ii_bstart <= bindex && bindex <= iinfo->ii_bend) { ++ h_i = au_h_iptr(inode, bindex); ++ if (h_i) { ++ if (h_i == h_d->d_inode) ++ continue; ++ err = -EIO; ++ break; ++ } ++ } ++ if (bindex < iinfo->ii_bstart) ++ iinfo->ii_bstart = bindex; ++ if (iinfo->ii_bend < bindex) ++ iinfo->ii_bend = bindex; ++ au_set_h_iptr(inode, bindex, au_igrab(h_d->d_inode), flags); ++ update = 1; ++ } ++ au_update_ibrange(inode, /*do_put_zero*/0); ++ e = au_dy_irefresh(inode); ++ if (unlikely(e && !err)) ++ err = e; ++ if (!err) ++ au_refresh_hinode_attr(inode, update && isdir); ++ ++out: ++ AuTraceErr(err); ++ return err; ++} ++ ++static int set_inode(struct inode *inode, struct dentry *dentry) ++{ ++ int err; ++ unsigned int flags; ++ umode_t mode; ++ aufs_bindex_t bindex, bstart, btail; ++ unsigned char isdir; ++ struct dentry *h_dentry; ++ struct inode *h_inode; ++ struct au_iinfo *iinfo; ++ struct inode_operations *iop; ++ ++ IiMustWriteLock(inode); ++ ++ err = 0; ++ isdir = 0; ++ iop = au_sbi(inode->i_sb)->si_iop_array; ++ bstart = au_dbstart(dentry); ++ h_inode = au_h_dptr(dentry, bstart)->d_inode; ++ mode = h_inode->i_mode; ++ switch (mode & S_IFMT) { ++ case S_IFREG: ++ btail = au_dbtail(dentry); ++ inode->i_op = iop + AuIop_OTHER; ++ inode->i_fop = &aufs_file_fop; ++ err = au_dy_iaop(inode, bstart, h_inode); ++ if (unlikely(err)) ++ goto out; ++ break; ++ case S_IFDIR: ++ isdir = 1; ++ btail = au_dbtaildir(dentry); ++ inode->i_op = iop + AuIop_DIR; ++ inode->i_fop = &aufs_dir_fop; ++ break; ++ case S_IFLNK: ++ btail = au_dbtail(dentry); ++ inode->i_op = iop + AuIop_SYMLINK; ++ break; ++ case S_IFBLK: ++ case S_IFCHR: ++ case S_IFIFO: ++ case S_IFSOCK: ++ btail = au_dbtail(dentry); ++ inode->i_op = iop + AuIop_OTHER; ++ init_special_inode(inode, mode, h_inode->i_rdev); ++ break; ++ default: ++ AuIOErr("Unknown file type 0%o\n", mode); ++ err = -EIO; ++ goto out; ++ } ++ ++ /* do not set hnotify for whiteouted dirs (SHWH mode) */ ++ flags = au_hi_flags(inode, isdir); ++ if (au_opt_test(au_mntflags(dentry->d_sb), SHWH) ++ && au_ftest_hi(flags, HNOTIFY) ++ && dentry->d_name.len > AUFS_WH_PFX_LEN ++ && !memcmp(dentry->d_name.name, AUFS_WH_PFX, AUFS_WH_PFX_LEN)) ++ au_fclr_hi(flags, HNOTIFY); ++ iinfo = au_ii(inode); ++ iinfo->ii_bstart = bstart; ++ iinfo->ii_bend = btail; ++ for (bindex = bstart; bindex <= btail; bindex++) { ++ h_dentry = au_h_dptr(dentry, bindex); ++ if (h_dentry) ++ au_set_h_iptr(inode, bindex, ++ au_igrab(h_dentry->d_inode), flags); ++ } ++ au_cpup_attr_all(inode, /*force*/1); ++ /* ++ * to force calling aufs_get_acl() every time, ++ * do not call cache_no_acl() for aufs inode. ++ */ ++ ++out: ++ return err; ++} ++ ++/* ++ * successful returns with iinfo write_locked ++ * minus: errno ++ * zero: success, matched ++ * plus: no error, but unmatched ++ */ ++static int reval_inode(struct inode *inode, struct dentry *dentry) ++{ ++ int err; ++ unsigned int gen, igflags; ++ aufs_bindex_t bindex, bend; ++ struct inode *h_inode, *h_dinode; ++ ++ /* ++ * before this function, if aufs got any iinfo lock, it must be only ++ * one, the parent dir. ++ * it can happen by UDBA and the obsoleted inode number. ++ */ ++ err = -EIO; ++ if (unlikely(inode->i_ino == parent_ino(dentry))) ++ goto out; ++ ++ err = 1; ++ ii_write_lock_new_child(inode); ++ h_dinode = au_h_dptr(dentry, au_dbstart(dentry))->d_inode; ++ bend = au_ibend(inode); ++ for (bindex = au_ibstart(inode); bindex <= bend; bindex++) { ++ h_inode = au_h_iptr(inode, bindex); ++ if (!h_inode || h_inode != h_dinode) ++ continue; ++ ++ err = 0; ++ gen = au_iigen(inode, &igflags); ++ if (gen == au_digen(dentry) ++ && !au_ig_ftest(igflags, HALF_REFRESHED)) ++ break; ++ ++ /* fully refresh inode using dentry */ ++ err = au_refresh_hinode(inode, dentry); ++ if (!err) ++ au_update_iigen(inode, /*half*/0); ++ break; ++ } ++ ++ if (unlikely(err)) ++ ii_write_unlock(inode); ++out: ++ return err; ++} ++ ++int au_ino(struct super_block *sb, aufs_bindex_t bindex, ino_t h_ino, ++ unsigned int d_type, ino_t *ino) ++{ ++ int err; ++ struct mutex *mtx; ++ ++ /* prevent hardlinked inode number from race condition */ ++ mtx = NULL; ++ if (d_type != DT_DIR) { ++ mtx = &au_sbr(sb, bindex)->br_xino.xi_nondir_mtx; ++ mutex_lock(mtx); ++ } ++ err = au_xino_read(sb, bindex, h_ino, ino); ++ if (unlikely(err)) ++ goto out; ++ ++ if (!*ino) { ++ err = -EIO; ++ *ino = au_xino_new_ino(sb); ++ if (unlikely(!*ino)) ++ goto out; ++ err = au_xino_write(sb, bindex, h_ino, *ino); ++ if (unlikely(err)) ++ goto out; ++ } ++ ++out: ++ if (mtx) ++ mutex_unlock(mtx); ++ return err; ++} ++ ++/* successful returns with iinfo write_locked */ ++/* todo: return with unlocked? */ ++struct inode *au_new_inode(struct dentry *dentry, int must_new) ++{ ++ struct inode *inode; ++ struct dentry *h_dentry; ++ struct super_block *sb; ++ struct mutex *mtx; ++ ino_t h_ino, ino; ++ int err; ++ aufs_bindex_t bstart; ++ ++ sb = dentry->d_sb; ++ bstart = au_dbstart(dentry); ++ h_dentry = au_h_dptr(dentry, bstart); ++ h_ino = h_dentry->d_inode->i_ino; ++ ++ /* ++ * stop 'race'-ing between hardlinks under different ++ * parents. ++ */ ++ mtx = NULL; ++ if (!d_is_dir(h_dentry)) ++ mtx = &au_sbr(sb, bstart)->br_xino.xi_nondir_mtx; ++ ++new_ino: ++ if (mtx) ++ mutex_lock(mtx); ++ err = au_xino_read(sb, bstart, h_ino, &ino); ++ inode = ERR_PTR(err); ++ if (unlikely(err)) ++ goto out; ++ ++ if (!ino) { ++ ino = au_xino_new_ino(sb); ++ if (unlikely(!ino)) { ++ inode = ERR_PTR(-EIO); ++ goto out; ++ } ++ } ++ ++ AuDbg("i%lu\n", (unsigned long)ino); ++ inode = au_iget_locked(sb, ino); ++ err = PTR_ERR(inode); ++ if (IS_ERR(inode)) ++ goto out; ++ ++ AuDbg("%lx, new %d\n", inode->i_state, !!(inode->i_state & I_NEW)); ++ if (inode->i_state & I_NEW) { ++ /* verbose coding for lock class name */ ++ if (unlikely(d_is_symlink(h_dentry))) ++ au_rw_class(&au_ii(inode)->ii_rwsem, ++ au_lc_key + AuLcSymlink_IIINFO); ++ else if (unlikely(d_is_dir(h_dentry))) ++ au_rw_class(&au_ii(inode)->ii_rwsem, ++ au_lc_key + AuLcDir_IIINFO); ++ else /* likely */ ++ au_rw_class(&au_ii(inode)->ii_rwsem, ++ au_lc_key + AuLcNonDir_IIINFO); ++ ++ ii_write_lock_new_child(inode); ++ err = set_inode(inode, dentry); ++ if (!err) { ++ unlock_new_inode(inode); ++ goto out; /* success */ ++ } ++ ++ /* ++ * iget_failed() calls iput(), but we need to call ++ * ii_write_unlock() after iget_failed(). so dirty hack for ++ * i_count. ++ */ ++ atomic_inc(&inode->i_count); ++ iget_failed(inode); ++ ii_write_unlock(inode); ++ au_xino_write(sb, bstart, h_ino, /*ino*/0); ++ /* ignore this error */ ++ goto out_iput; ++ } else if (!must_new && !IS_DEADDIR(inode) && inode->i_nlink) { ++ /* ++ * horrible race condition between lookup, readdir and copyup ++ * (or something). ++ */ ++ if (mtx) ++ mutex_unlock(mtx); ++ err = reval_inode(inode, dentry); ++ if (unlikely(err < 0)) { ++ mtx = NULL; ++ goto out_iput; ++ } ++ ++ if (!err) { ++ mtx = NULL; ++ goto out; /* success */ ++ } else if (mtx) ++ mutex_lock(mtx); ++ } ++ ++ if (unlikely(au_test_fs_unique_ino(h_dentry->d_inode))) ++ AuWarn1("Warning: Un-notified UDBA or repeatedly renamed dir," ++ " b%d, %s, %pd, hi%lu, i%lu.\n", ++ bstart, au_sbtype(h_dentry->d_sb), dentry, ++ (unsigned long)h_ino, (unsigned long)ino); ++ ino = 0; ++ err = au_xino_write(sb, bstart, h_ino, /*ino*/0); ++ if (!err) { ++ iput(inode); ++ if (mtx) ++ mutex_unlock(mtx); ++ goto new_ino; ++ } ++ ++out_iput: ++ iput(inode); ++ inode = ERR_PTR(err); ++out: ++ if (mtx) ++ mutex_unlock(mtx); ++ return inode; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++int au_test_ro(struct super_block *sb, aufs_bindex_t bindex, ++ struct inode *inode) ++{ ++ int err; ++ struct inode *hi; ++ ++ err = au_br_rdonly(au_sbr(sb, bindex)); ++ ++ /* pseudo-link after flushed may happen out of bounds */ ++ if (!err ++ && inode ++ && au_ibstart(inode) <= bindex ++ && bindex <= au_ibend(inode)) { ++ /* ++ * permission check is unnecessary since vfsub routine ++ * will be called later ++ */ ++ hi = au_h_iptr(inode, bindex); ++ if (hi) ++ err = IS_IMMUTABLE(hi) ? -EROFS : 0; ++ } ++ ++ return err; ++} ++ ++int au_test_h_perm(struct inode *h_inode, int mask) ++{ ++ if (uid_eq(current_fsuid(), GLOBAL_ROOT_UID)) ++ return 0; ++ return inode_permission(h_inode, mask); ++} ++ ++int au_test_h_perm_sio(struct inode *h_inode, int mask) ++{ ++ if (au_test_nfs(h_inode->i_sb) ++ && (mask & MAY_WRITE) ++ && S_ISDIR(h_inode->i_mode)) ++ mask |= MAY_READ; /* force permission check */ ++ return au_test_h_perm(h_inode, mask); ++} +diff --git a/fs/aufs/inode.h b/fs/aufs/inode.h +new file mode 100644 +index 0000000..49d53a2 +--- /dev/null ++++ b/fs/aufs/inode.h +@@ -0,0 +1,686 @@ ++/* ++ * Copyright (C) 2005-2016 Junjiro R. Okajima ++ * ++ * This program, aufs is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . ++ */ ++ ++/* ++ * inode operations ++ */ ++ ++#ifndef __AUFS_INODE_H__ ++#define __AUFS_INODE_H__ ++ ++#ifdef __KERNEL__ ++ ++#include ++#include "rwsem.h" ++ ++struct vfsmount; ++ ++struct au_hnotify { ++#ifdef CONFIG_AUFS_HNOTIFY ++#ifdef CONFIG_AUFS_HFSNOTIFY ++ /* never use fsnotify_add_vfsmount_mark() */ ++ struct fsnotify_mark hn_mark; ++#endif ++ struct inode *hn_aufs_inode; /* no get/put */ ++#endif ++} ____cacheline_aligned_in_smp; ++ ++struct au_hinode { ++ struct inode *hi_inode; ++ aufs_bindex_t hi_id; ++#ifdef CONFIG_AUFS_HNOTIFY ++ struct au_hnotify *hi_notify; ++#endif ++ ++ /* reference to the copied-up whiteout with get/put */ ++ struct dentry *hi_whdentry; ++}; ++ ++/* ig_flags */ ++#define AuIG_HALF_REFRESHED 1 ++#define au_ig_ftest(flags, name) ((flags) & AuIG_##name) ++#define au_ig_fset(flags, name) \ ++ do { (flags) |= AuIG_##name; } while (0) ++#define au_ig_fclr(flags, name) \ ++ do { (flags) &= ~AuIG_##name; } while (0) ++ ++struct au_iigen { ++ spinlock_t ig_spin; ++ __u32 ig_generation, ig_flags; ++}; ++ ++struct au_vdir; ++struct au_iinfo { ++ struct au_iigen ii_generation; ++ struct super_block *ii_hsb1; /* no get/put */ ++ ++ struct au_rwsem ii_rwsem; ++ aufs_bindex_t ii_bstart, ii_bend; ++ __u32 ii_higen; ++ struct au_hinode *ii_hinode; ++ struct au_vdir *ii_vdir; ++}; ++ ++struct au_icntnr { ++ struct au_iinfo iinfo; ++ struct inode vfs_inode; ++ struct hlist_node plink; ++} ____cacheline_aligned_in_smp; ++ ++/* au_pin flags */ ++#define AuPin_DI_LOCKED 1 ++#define AuPin_MNT_WRITE (1 << 1) ++#define au_ftest_pin(flags, name) ((flags) & AuPin_##name) ++#define au_fset_pin(flags, name) \ ++ do { (flags) |= AuPin_##name; } while (0) ++#define au_fclr_pin(flags, name) \ ++ do { (flags) &= ~AuPin_##name; } while (0) ++ ++struct au_pin { ++ /* input */ ++ struct dentry *dentry; ++ unsigned int udba; ++ unsigned char lsc_di, lsc_hi, flags; ++ aufs_bindex_t bindex; ++ ++ /* output */ ++ struct dentry *parent; ++ struct au_hinode *hdir; ++ struct vfsmount *h_mnt; ++ ++ /* temporary unlock/relock for copyup */ ++ struct dentry *h_dentry, *h_parent; ++ struct au_branch *br; ++ struct task_struct *task; ++}; ++ ++void au_pin_hdir_unlock(struct au_pin *p); ++int au_pin_hdir_lock(struct au_pin *p); ++int au_pin_hdir_relock(struct au_pin *p); ++void au_pin_hdir_set_owner(struct au_pin *p, struct task_struct *task); ++void au_pin_hdir_acquire_nest(struct au_pin *p); ++void au_pin_hdir_release(struct au_pin *p); ++ ++/* ---------------------------------------------------------------------- */ ++ ++static inline struct au_iinfo *au_ii(struct inode *inode) ++{ ++ struct au_iinfo *iinfo; ++ ++ iinfo = &(container_of(inode, struct au_icntnr, vfs_inode)->iinfo); ++ if (iinfo->ii_hinode) ++ return iinfo; ++ return NULL; /* debugging bad_inode case */ ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++/* inode.c */ ++struct inode *au_igrab(struct inode *inode); ++void au_refresh_iop(struct inode *inode, int force_getattr); ++int au_refresh_hinode_self(struct inode *inode); ++int au_refresh_hinode(struct inode *inode, struct dentry *dentry); ++int au_ino(struct super_block *sb, aufs_bindex_t bindex, ino_t h_ino, ++ unsigned int d_type, ino_t *ino); ++struct inode *au_new_inode(struct dentry *dentry, int must_new); ++int au_test_ro(struct super_block *sb, aufs_bindex_t bindex, ++ struct inode *inode); ++int au_test_h_perm(struct inode *h_inode, int mask); ++int au_test_h_perm_sio(struct inode *h_inode, int mask); ++ ++static inline int au_wh_ino(struct super_block *sb, aufs_bindex_t bindex, ++ ino_t h_ino, unsigned int d_type, ino_t *ino) ++{ ++#ifdef CONFIG_AUFS_SHWH ++ return au_ino(sb, bindex, h_ino, d_type, ino); ++#else ++ return 0; ++#endif ++} ++ ++/* i_op.c */ ++enum { ++ AuIop_SYMLINK, ++ AuIop_DIR, ++ AuIop_OTHER, ++ AuIop_Last ++}; ++extern struct inode_operations aufs_iop[AuIop_Last], ++ aufs_iop_nogetattr[AuIop_Last]; ++ ++/* au_wr_dir flags */ ++#define AuWrDir_ADD_ENTRY 1 ++#define AuWrDir_ISDIR (1 << 1) ++#define AuWrDir_TMPFILE (1 << 2) ++#define au_ftest_wrdir(flags, name) ((flags) & AuWrDir_##name) ++#define au_fset_wrdir(flags, name) \ ++ do { (flags) |= AuWrDir_##name; } while (0) ++#define au_fclr_wrdir(flags, name) \ ++ do { (flags) &= ~AuWrDir_##name; } while (0) ++ ++struct au_wr_dir_args { ++ aufs_bindex_t force_btgt; ++ unsigned char flags; ++}; ++int au_wr_dir(struct dentry *dentry, struct dentry *src_dentry, ++ struct au_wr_dir_args *args); ++ ++struct dentry *au_pinned_h_parent(struct au_pin *pin); ++void au_pin_init(struct au_pin *pin, struct dentry *dentry, ++ aufs_bindex_t bindex, int lsc_di, int lsc_hi, ++ unsigned int udba, unsigned char flags); ++int au_pin(struct au_pin *pin, struct dentry *dentry, aufs_bindex_t bindex, ++ unsigned int udba, unsigned char flags) __must_check; ++int au_do_pin(struct au_pin *pin) __must_check; ++void au_unpin(struct au_pin *pin); ++int au_reval_for_attr(struct dentry *dentry, unsigned int sigen); ++ ++#define AuIcpup_DID_CPUP 1 ++#define au_ftest_icpup(flags, name) ((flags) & AuIcpup_##name) ++#define au_fset_icpup(flags, name) \ ++ do { (flags) |= AuIcpup_##name; } while (0) ++#define au_fclr_icpup(flags, name) \ ++ do { (flags) &= ~AuIcpup_##name; } while (0) ++ ++struct au_icpup_args { ++ unsigned char flags; ++ unsigned char pin_flags; ++ aufs_bindex_t btgt; ++ unsigned int udba; ++ struct au_pin pin; ++ struct path h_path; ++ struct inode *h_inode; ++}; ++ ++int au_pin_and_icpup(struct dentry *dentry, struct iattr *ia, ++ struct au_icpup_args *a); ++ ++int au_h_path_getattr(struct dentry *dentry, int force, struct path *h_path); ++ ++/* i_op_add.c */ ++int au_may_add(struct dentry *dentry, aufs_bindex_t bindex, ++ struct dentry *h_parent, int isdir); ++int aufs_mknod(struct inode *dir, struct dentry *dentry, umode_t mode, ++ dev_t dev); ++int aufs_symlink(struct inode *dir, struct dentry *dentry, const char *symname); ++int aufs_create(struct inode *dir, struct dentry *dentry, umode_t mode, ++ bool want_excl); ++struct vfsub_aopen_args; ++int au_aopen_or_create(struct inode *dir, struct dentry *dentry, ++ struct vfsub_aopen_args *args); ++int aufs_tmpfile(struct inode *dir, struct dentry *dentry, umode_t mode); ++int aufs_link(struct dentry *src_dentry, struct inode *dir, ++ struct dentry *dentry); ++int aufs_mkdir(struct inode *dir, struct dentry *dentry, umode_t mode); ++ ++/* i_op_del.c */ ++int au_wr_dir_need_wh(struct dentry *dentry, int isdir, aufs_bindex_t *bcpup); ++int au_may_del(struct dentry *dentry, aufs_bindex_t bindex, ++ struct dentry *h_parent, int isdir); ++int aufs_unlink(struct inode *dir, struct dentry *dentry); ++int aufs_rmdir(struct inode *dir, struct dentry *dentry); ++ ++/* i_op_ren.c */ ++int au_wbr(struct dentry *dentry, aufs_bindex_t btgt); ++int aufs_rename(struct inode *src_dir, struct dentry *src_dentry, ++ struct inode *dir, struct dentry *dentry); ++ ++/* iinfo.c */ ++struct inode *au_h_iptr(struct inode *inode, aufs_bindex_t bindex); ++void au_hiput(struct au_hinode *hinode); ++void au_set_hi_wh(struct inode *inode, aufs_bindex_t bindex, ++ struct dentry *h_wh); ++unsigned int au_hi_flags(struct inode *inode, int isdir); ++ ++/* hinode flags */ ++#define AuHi_XINO 1 ++#define AuHi_HNOTIFY (1 << 1) ++#define au_ftest_hi(flags, name) ((flags) & AuHi_##name) ++#define au_fset_hi(flags, name) \ ++ do { (flags) |= AuHi_##name; } while (0) ++#define au_fclr_hi(flags, name) \ ++ do { (flags) &= ~AuHi_##name; } while (0) ++ ++#ifndef CONFIG_AUFS_HNOTIFY ++#undef AuHi_HNOTIFY ++#define AuHi_HNOTIFY 0 ++#endif ++ ++void au_set_h_iptr(struct inode *inode, aufs_bindex_t bindex, ++ struct inode *h_inode, unsigned int flags); ++ ++void au_update_iigen(struct inode *inode, int half); ++void au_update_ibrange(struct inode *inode, int do_put_zero); ++ ++void au_icntnr_init_once(void *_c); ++int au_iinfo_init(struct inode *inode); ++void au_iinfo_fin(struct inode *inode); ++int au_ii_realloc(struct au_iinfo *iinfo, int nbr); ++ ++#ifdef CONFIG_PROC_FS ++/* plink.c */ ++int au_plink_maint(struct super_block *sb, int flags); ++struct au_sbinfo; ++void au_plink_maint_leave(struct au_sbinfo *sbinfo); ++int au_plink_maint_enter(struct super_block *sb); ++#ifdef CONFIG_AUFS_DEBUG ++void au_plink_list(struct super_block *sb); ++#else ++AuStubVoid(au_plink_list, struct super_block *sb) ++#endif ++int au_plink_test(struct inode *inode); ++struct dentry *au_plink_lkup(struct inode *inode, aufs_bindex_t bindex); ++void au_plink_append(struct inode *inode, aufs_bindex_t bindex, ++ struct dentry *h_dentry); ++void au_plink_put(struct super_block *sb, int verbose); ++void au_plink_clean(struct super_block *sb, int verbose); ++void au_plink_half_refresh(struct super_block *sb, aufs_bindex_t br_id); ++#else ++AuStubInt0(au_plink_maint, struct super_block *sb, int flags); ++AuStubVoid(au_plink_maint_leave, struct au_sbinfo *sbinfo); ++AuStubInt0(au_plink_maint_enter, struct super_block *sb); ++AuStubVoid(au_plink_list, struct super_block *sb); ++AuStubInt0(au_plink_test, struct inode *inode); ++AuStub(struct dentry *, au_plink_lkup, return NULL, ++ struct inode *inode, aufs_bindex_t bindex); ++AuStubVoid(au_plink_append, struct inode *inode, aufs_bindex_t bindex, ++ struct dentry *h_dentry); ++AuStubVoid(au_plink_put, struct super_block *sb, int verbose); ++AuStubVoid(au_plink_clean, struct super_block *sb, int verbose); ++AuStubVoid(au_plink_half_refresh, struct super_block *sb, aufs_bindex_t br_id); ++#endif /* CONFIG_PROC_FS */ ++ ++#ifdef CONFIG_AUFS_XATTR ++/* xattr.c */ ++int au_cpup_xattr(struct dentry *h_dst, struct dentry *h_src, int ignore_flags, ++ unsigned int verbose); ++ssize_t aufs_listxattr(struct dentry *dentry, char *list, size_t size); ++ssize_t aufs_getxattr(struct dentry *dentry, const char *name, void *value, ++ size_t size); ++int aufs_setxattr(struct dentry *dentry, const char *name, const void *value, ++ size_t size, int flags); ++int aufs_removexattr(struct dentry *dentry, const char *name); ++ ++/* void au_xattr_init(struct super_block *sb); */ ++#else ++AuStubInt0(au_cpup_xattr, struct dentry *h_dst, struct dentry *h_src, ++ int ignore_flags, unsigned int verbose); ++/* AuStubVoid(au_xattr_init, struct super_block *sb); */ ++#endif ++ ++#ifdef CONFIG_FS_POSIX_ACL ++struct posix_acl *aufs_get_acl(struct inode *inode, int type); ++int aufs_set_acl(struct inode *inode, struct posix_acl *acl, int type); ++#endif ++ ++#if IS_ENABLED(CONFIG_AUFS_XATTR) || IS_ENABLED(CONFIG_FS_POSIX_ACL) ++enum { ++ AU_XATTR_SET, ++ AU_XATTR_REMOVE, ++ AU_ACL_SET ++}; ++ ++struct au_srxattr { ++ int type; ++ union { ++ struct { ++ const char *name; ++ const void *value; ++ size_t size; ++ int flags; ++ } set; ++ struct { ++ const char *name; ++ } remove; ++ struct { ++ struct posix_acl *acl; ++ int type; ++ } acl_set; ++ } u; ++}; ++ssize_t au_srxattr(struct dentry *dentry, struct au_srxattr *arg); ++#endif ++ ++/* ---------------------------------------------------------------------- */ ++ ++/* lock subclass for iinfo */ ++enum { ++ AuLsc_II_CHILD, /* child first */ ++ AuLsc_II_CHILD2, /* rename(2), link(2), and cpup at hnotify */ ++ AuLsc_II_CHILD3, /* copyup dirs */ ++ AuLsc_II_PARENT, /* see AuLsc_I_PARENT in vfsub.h */ ++ AuLsc_II_PARENT2, ++ AuLsc_II_PARENT3, /* copyup dirs */ ++ AuLsc_II_NEW_CHILD ++}; ++ ++/* ++ * ii_read_lock_child, ii_write_lock_child, ++ * ii_read_lock_child2, ii_write_lock_child2, ++ * ii_read_lock_child3, ii_write_lock_child3, ++ * ii_read_lock_parent, ii_write_lock_parent, ++ * ii_read_lock_parent2, ii_write_lock_parent2, ++ * ii_read_lock_parent3, ii_write_lock_parent3, ++ * ii_read_lock_new_child, ii_write_lock_new_child, ++ */ ++#define AuReadLockFunc(name, lsc) \ ++static inline void ii_read_lock_##name(struct inode *i) \ ++{ \ ++ au_rw_read_lock_nested(&au_ii(i)->ii_rwsem, AuLsc_II_##lsc); \ ++} ++ ++#define AuWriteLockFunc(name, lsc) \ ++static inline void ii_write_lock_##name(struct inode *i) \ ++{ \ ++ au_rw_write_lock_nested(&au_ii(i)->ii_rwsem, AuLsc_II_##lsc); \ ++} ++ ++#define AuRWLockFuncs(name, lsc) \ ++ AuReadLockFunc(name, lsc) \ ++ AuWriteLockFunc(name, lsc) ++ ++AuRWLockFuncs(child, CHILD); ++AuRWLockFuncs(child2, CHILD2); ++AuRWLockFuncs(child3, CHILD3); ++AuRWLockFuncs(parent, PARENT); ++AuRWLockFuncs(parent2, PARENT2); ++AuRWLockFuncs(parent3, PARENT3); ++AuRWLockFuncs(new_child, NEW_CHILD); ++ ++#undef AuReadLockFunc ++#undef AuWriteLockFunc ++#undef AuRWLockFuncs ++ ++/* ++ * ii_read_unlock, ii_write_unlock, ii_downgrade_lock ++ */ ++AuSimpleUnlockRwsemFuncs(ii, struct inode *i, &au_ii(i)->ii_rwsem); ++ ++#define IiMustNoWaiters(i) AuRwMustNoWaiters(&au_ii(i)->ii_rwsem) ++#define IiMustAnyLock(i) AuRwMustAnyLock(&au_ii(i)->ii_rwsem) ++#define IiMustWriteLock(i) AuRwMustWriteLock(&au_ii(i)->ii_rwsem) ++ ++/* ---------------------------------------------------------------------- */ ++ ++static inline void au_icntnr_init(struct au_icntnr *c) ++{ ++#ifdef CONFIG_AUFS_DEBUG ++ c->vfs_inode.i_mode = 0; ++#endif ++} ++ ++static inline unsigned int au_iigen(struct inode *inode, unsigned int *igflags) ++{ ++ unsigned int gen; ++ struct au_iinfo *iinfo; ++ struct au_iigen *iigen; ++ ++ iinfo = au_ii(inode); ++ iigen = &iinfo->ii_generation; ++ spin_lock(&iigen->ig_spin); ++ if (igflags) ++ *igflags = iigen->ig_flags; ++ gen = iigen->ig_generation; ++ spin_unlock(&iigen->ig_spin); ++ ++ return gen; ++} ++ ++/* tiny test for inode number */ ++/* tmpfs generation is too rough */ ++static inline int au_test_higen(struct inode *inode, struct inode *h_inode) ++{ ++ struct au_iinfo *iinfo; ++ ++ iinfo = au_ii(inode); ++ AuRwMustAnyLock(&iinfo->ii_rwsem); ++ return !(iinfo->ii_hsb1 == h_inode->i_sb ++ && iinfo->ii_higen == h_inode->i_generation); ++} ++ ++static inline void au_iigen_dec(struct inode *inode) ++{ ++ struct au_iinfo *iinfo; ++ struct au_iigen *iigen; ++ ++ iinfo = au_ii(inode); ++ iigen = &iinfo->ii_generation; ++ spin_lock(&iigen->ig_spin); ++ iigen->ig_generation--; ++ spin_unlock(&iigen->ig_spin); ++} ++ ++static inline int au_iigen_test(struct inode *inode, unsigned int sigen) ++{ ++ int err; ++ ++ err = 0; ++ if (unlikely(inode && au_iigen(inode, NULL) != sigen)) ++ err = -EIO; ++ ++ return err; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++static inline aufs_bindex_t au_ii_br_id(struct inode *inode, ++ aufs_bindex_t bindex) ++{ ++ IiMustAnyLock(inode); ++ return au_ii(inode)->ii_hinode[0 + bindex].hi_id; ++} ++ ++static inline aufs_bindex_t au_ibstart(struct inode *inode) ++{ ++ IiMustAnyLock(inode); ++ return au_ii(inode)->ii_bstart; ++} ++ ++static inline aufs_bindex_t au_ibend(struct inode *inode) ++{ ++ IiMustAnyLock(inode); ++ return au_ii(inode)->ii_bend; ++} ++ ++static inline struct au_vdir *au_ivdir(struct inode *inode) ++{ ++ IiMustAnyLock(inode); ++ return au_ii(inode)->ii_vdir; ++} ++ ++static inline struct dentry *au_hi_wh(struct inode *inode, aufs_bindex_t bindex) ++{ ++ IiMustAnyLock(inode); ++ return au_ii(inode)->ii_hinode[0 + bindex].hi_whdentry; ++} ++ ++static inline void au_set_ibstart(struct inode *inode, aufs_bindex_t bindex) ++{ ++ IiMustWriteLock(inode); ++ au_ii(inode)->ii_bstart = bindex; ++} ++ ++static inline void au_set_ibend(struct inode *inode, aufs_bindex_t bindex) ++{ ++ IiMustWriteLock(inode); ++ au_ii(inode)->ii_bend = bindex; ++} ++ ++static inline void au_set_ivdir(struct inode *inode, struct au_vdir *vdir) ++{ ++ IiMustWriteLock(inode); ++ au_ii(inode)->ii_vdir = vdir; ++} ++ ++static inline struct au_hinode *au_hi(struct inode *inode, aufs_bindex_t bindex) ++{ ++ IiMustAnyLock(inode); ++ return au_ii(inode)->ii_hinode + bindex; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++static inline struct dentry *au_pinned_parent(struct au_pin *pin) ++{ ++ if (pin) ++ return pin->parent; ++ return NULL; ++} ++ ++static inline struct inode *au_pinned_h_dir(struct au_pin *pin) ++{ ++ if (pin && pin->hdir) ++ return pin->hdir->hi_inode; ++ return NULL; ++} ++ ++static inline struct au_hinode *au_pinned_hdir(struct au_pin *pin) ++{ ++ if (pin) ++ return pin->hdir; ++ return NULL; ++} ++ ++static inline void au_pin_set_dentry(struct au_pin *pin, struct dentry *dentry) ++{ ++ if (pin) ++ pin->dentry = dentry; ++} ++ ++static inline void au_pin_set_parent_lflag(struct au_pin *pin, ++ unsigned char lflag) ++{ ++ if (pin) { ++ if (lflag) ++ au_fset_pin(pin->flags, DI_LOCKED); ++ else ++ au_fclr_pin(pin->flags, DI_LOCKED); ++ } ++} ++ ++#if 0 /* reserved */ ++static inline void au_pin_set_parent(struct au_pin *pin, struct dentry *parent) ++{ ++ if (pin) { ++ dput(pin->parent); ++ pin->parent = dget(parent); ++ } ++} ++#endif ++ ++/* ---------------------------------------------------------------------- */ ++ ++struct au_branch; ++#ifdef CONFIG_AUFS_HNOTIFY ++struct au_hnotify_op { ++ void (*ctl)(struct au_hinode *hinode, int do_set); ++ int (*alloc)(struct au_hinode *hinode); ++ ++ /* ++ * if it returns true, the the caller should free hinode->hi_notify, ++ * otherwise ->free() frees it. ++ */ ++ int (*free)(struct au_hinode *hinode, ++ struct au_hnotify *hn) __must_check; ++ ++ void (*fin)(void); ++ int (*init)(void); ++ ++ int (*reset_br)(unsigned int udba, struct au_branch *br, int perm); ++ void (*fin_br)(struct au_branch *br); ++ int (*init_br)(struct au_branch *br, int perm); ++}; ++ ++/* hnotify.c */ ++int au_hn_alloc(struct au_hinode *hinode, struct inode *inode); ++void au_hn_free(struct au_hinode *hinode); ++void au_hn_ctl(struct au_hinode *hinode, int do_set); ++void au_hn_reset(struct inode *inode, unsigned int flags); ++int au_hnotify(struct inode *h_dir, struct au_hnotify *hnotify, u32 mask, ++ struct qstr *h_child_qstr, struct inode *h_child_inode); ++int au_hnotify_reset_br(unsigned int udba, struct au_branch *br, int perm); ++int au_hnotify_init_br(struct au_branch *br, int perm); ++void au_hnotify_fin_br(struct au_branch *br); ++int __init au_hnotify_init(void); ++void au_hnotify_fin(void); ++ ++/* hfsnotify.c */ ++extern const struct au_hnotify_op au_hnotify_op; ++ ++static inline ++void au_hn_init(struct au_hinode *hinode) ++{ ++ hinode->hi_notify = NULL; ++} ++ ++static inline struct au_hnotify *au_hn(struct au_hinode *hinode) ++{ ++ return hinode->hi_notify; ++} ++ ++#else ++AuStub(int, au_hn_alloc, return -EOPNOTSUPP, ++ struct au_hinode *hinode __maybe_unused, ++ struct inode *inode __maybe_unused) ++AuStub(struct au_hnotify *, au_hn, return NULL, struct au_hinode *hinode) ++AuStubVoid(au_hn_free, struct au_hinode *hinode __maybe_unused) ++AuStubVoid(au_hn_ctl, struct au_hinode *hinode __maybe_unused, ++ int do_set __maybe_unused) ++AuStubVoid(au_hn_reset, struct inode *inode __maybe_unused, ++ unsigned int flags __maybe_unused) ++AuStubInt0(au_hnotify_reset_br, unsigned int udba __maybe_unused, ++ struct au_branch *br __maybe_unused, ++ int perm __maybe_unused) ++AuStubInt0(au_hnotify_init_br, struct au_branch *br __maybe_unused, ++ int perm __maybe_unused) ++AuStubVoid(au_hnotify_fin_br, struct au_branch *br __maybe_unused) ++AuStubInt0(__init au_hnotify_init, void) ++AuStubVoid(au_hnotify_fin, void) ++AuStubVoid(au_hn_init, struct au_hinode *hinode __maybe_unused) ++#endif /* CONFIG_AUFS_HNOTIFY */ ++ ++static inline void au_hn_suspend(struct au_hinode *hdir) ++{ ++ au_hn_ctl(hdir, /*do_set*/0); ++} ++ ++static inline void au_hn_resume(struct au_hinode *hdir) ++{ ++ au_hn_ctl(hdir, /*do_set*/1); ++} ++ ++static inline void au_hn_imtx_lock(struct au_hinode *hdir) ++{ ++ mutex_lock(&hdir->hi_inode->i_mutex); ++ au_hn_suspend(hdir); ++} ++ ++static inline void au_hn_imtx_lock_nested(struct au_hinode *hdir, ++ unsigned int sc __maybe_unused) ++{ ++ mutex_lock_nested(&hdir->hi_inode->i_mutex, sc); ++ au_hn_suspend(hdir); ++} ++ ++static inline void au_hn_imtx_unlock(struct au_hinode *hdir) ++{ ++ au_hn_resume(hdir); ++ mutex_unlock(&hdir->hi_inode->i_mutex); ++} ++ ++#endif /* __KERNEL__ */ ++#endif /* __AUFS_INODE_H__ */ +diff --git a/fs/aufs/ioctl.c b/fs/aufs/ioctl.c +new file mode 100644 +index 0000000..10e2315 +--- /dev/null ++++ b/fs/aufs/ioctl.c +@@ -0,0 +1,219 @@ ++/* ++ * Copyright (C) 2005-2016 Junjiro R. Okajima ++ * ++ * This program, aufs is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . ++ */ ++ ++/* ++ * ioctl ++ * plink-management and readdir in userspace. ++ * assist the pathconf(3) wrapper library. ++ * move-down ++ * File-based Hierarchical Storage Management. ++ */ ++ ++#include ++#include ++#include "aufs.h" ++ ++static int au_wbr_fd(struct path *path, struct aufs_wbr_fd __user *arg) ++{ ++ int err, fd; ++ aufs_bindex_t wbi, bindex, bend; ++ struct file *h_file; ++ struct super_block *sb; ++ struct dentry *root; ++ struct au_branch *br; ++ struct aufs_wbr_fd wbrfd = { ++ .oflags = au_dir_roflags, ++ .brid = -1 ++ }; ++ const int valid = O_RDONLY | O_NONBLOCK | O_LARGEFILE | O_DIRECTORY ++ | O_NOATIME | O_CLOEXEC; ++ ++ AuDebugOn(wbrfd.oflags & ~valid); ++ ++ if (arg) { ++ err = copy_from_user(&wbrfd, arg, sizeof(wbrfd)); ++ if (unlikely(err)) { ++ err = -EFAULT; ++ goto out; ++ } ++ ++ err = -EINVAL; ++ AuDbg("wbrfd{0%o, %d}\n", wbrfd.oflags, wbrfd.brid); ++ wbrfd.oflags |= au_dir_roflags; ++ AuDbg("0%o\n", wbrfd.oflags); ++ if (unlikely(wbrfd.oflags & ~valid)) ++ goto out; ++ } ++ ++ fd = get_unused_fd(); ++ err = fd; ++ if (unlikely(fd < 0)) ++ goto out; ++ ++ h_file = ERR_PTR(-EINVAL); ++ wbi = 0; ++ br = NULL; ++ sb = path->dentry->d_sb; ++ root = sb->s_root; ++ aufs_read_lock(root, AuLock_IR); ++ bend = au_sbend(sb); ++ if (wbrfd.brid >= 0) { ++ wbi = au_br_index(sb, wbrfd.brid); ++ if (unlikely(wbi < 0 || wbi > bend)) ++ goto out_unlock; ++ } ++ ++ h_file = ERR_PTR(-ENOENT); ++ br = au_sbr(sb, wbi); ++ if (!au_br_writable(br->br_perm)) { ++ if (arg) ++ goto out_unlock; ++ ++ bindex = wbi + 1; ++ wbi = -1; ++ for (; bindex <= bend; bindex++) { ++ br = au_sbr(sb, bindex); ++ if (au_br_writable(br->br_perm)) { ++ wbi = bindex; ++ br = au_sbr(sb, wbi); ++ break; ++ } ++ } ++ } ++ AuDbg("wbi %d\n", wbi); ++ if (wbi >= 0) ++ h_file = au_h_open(root, wbi, wbrfd.oflags, NULL, ++ /*force_wr*/0); ++ ++out_unlock: ++ aufs_read_unlock(root, AuLock_IR); ++ err = PTR_ERR(h_file); ++ if (IS_ERR(h_file)) ++ goto out_fd; ++ ++ atomic_dec(&br->br_count); /* cf. au_h_open() */ ++ fd_install(fd, h_file); ++ err = fd; ++ goto out; /* success */ ++ ++out_fd: ++ put_unused_fd(fd); ++out: ++ AuTraceErr(err); ++ return err; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++long aufs_ioctl_dir(struct file *file, unsigned int cmd, unsigned long arg) ++{ ++ long err; ++ struct dentry *dentry; ++ ++ switch (cmd) { ++ case AUFS_CTL_RDU: ++ case AUFS_CTL_RDU_INO: ++ err = au_rdu_ioctl(file, cmd, arg); ++ break; ++ ++ case AUFS_CTL_WBR_FD: ++ err = au_wbr_fd(&file->f_path, (void __user *)arg); ++ break; ++ ++ case AUFS_CTL_IBUSY: ++ err = au_ibusy_ioctl(file, arg); ++ break; ++ ++ case AUFS_CTL_BRINFO: ++ err = au_brinfo_ioctl(file, arg); ++ break; ++ ++ case AUFS_CTL_FHSM_FD: ++ dentry = file->f_dentry; ++ if (IS_ROOT(dentry)) ++ err = au_fhsm_fd(dentry->d_sb, arg); ++ else ++ err = -ENOTTY; ++ break; ++ ++ default: ++ /* do not call the lower */ ++ AuDbg("0x%x\n", cmd); ++ err = -ENOTTY; ++ } ++ ++ AuTraceErr(err); ++ return err; ++} ++ ++long aufs_ioctl_nondir(struct file *file, unsigned int cmd, unsigned long arg) ++{ ++ long err; ++ ++ switch (cmd) { ++ case AUFS_CTL_MVDOWN: ++ err = au_mvdown(file->f_dentry, (void __user *)arg); ++ break; ++ ++ case AUFS_CTL_WBR_FD: ++ err = au_wbr_fd(&file->f_path, (void __user *)arg); ++ break; ++ ++ default: ++ /* do not call the lower */ ++ AuDbg("0x%x\n", cmd); ++ err = -ENOTTY; ++ } ++ ++ AuTraceErr(err); ++ return err; ++} ++ ++#ifdef CONFIG_COMPAT ++long aufs_compat_ioctl_dir(struct file *file, unsigned int cmd, ++ unsigned long arg) ++{ ++ long err; ++ ++ switch (cmd) { ++ case AUFS_CTL_RDU: ++ case AUFS_CTL_RDU_INO: ++ err = au_rdu_compat_ioctl(file, cmd, arg); ++ break; ++ ++ case AUFS_CTL_IBUSY: ++ err = au_ibusy_compat_ioctl(file, arg); ++ break; ++ ++ case AUFS_CTL_BRINFO: ++ err = au_brinfo_compat_ioctl(file, arg); ++ break; ++ ++ default: ++ err = aufs_ioctl_dir(file, cmd, arg); ++ } ++ ++ AuTraceErr(err); ++ return err; ++} ++ ++long aufs_compat_ioctl_nondir(struct file *file, unsigned int cmd, ++ unsigned long arg) ++{ ++ return aufs_ioctl_nondir(file, cmd, (unsigned long)compat_ptr(arg)); ++} ++#endif +diff --git a/fs/aufs/loop.c b/fs/aufs/loop.c +new file mode 100644 +index 0000000..1eaf59f +--- /dev/null ++++ b/fs/aufs/loop.c +@@ -0,0 +1,146 @@ ++/* ++ * Copyright (C) 2005-2016 Junjiro R. Okajima ++ * ++ * This program, aufs is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . ++ */ ++ ++/* ++ * support for loopback block device as a branch ++ */ ++ ++#include "aufs.h" ++ ++/* added into drivers/block/loop.c */ ++static struct file *(*backing_file_func)(struct super_block *sb); ++ ++/* ++ * test if two lower dentries have overlapping branches. ++ */ ++int au_test_loopback_overlap(struct super_block *sb, struct dentry *h_adding) ++{ ++ struct super_block *h_sb; ++ struct file *backing_file; ++ ++ if (unlikely(!backing_file_func)) { ++ /* don't load "loop" module here */ ++ backing_file_func = symbol_get(loop_backing_file); ++ if (unlikely(!backing_file_func)) ++ /* "loop" module is not loaded */ ++ return 0; ++ } ++ ++ h_sb = h_adding->d_sb; ++ backing_file = backing_file_func(h_sb); ++ if (!backing_file) ++ return 0; ++ ++ h_adding = backing_file->f_dentry; ++ /* ++ * h_adding can be local NFS. ++ * in this case aufs cannot detect the loop. ++ */ ++ if (unlikely(h_adding->d_sb == sb)) ++ return 1; ++ return !!au_test_subdir(h_adding, sb->s_root); ++} ++ ++/* true if a kernel thread named 'loop[0-9].*' accesses a file */ ++int au_test_loopback_kthread(void) ++{ ++ int ret; ++ struct task_struct *tsk = current; ++ char c, comm[sizeof(tsk->comm)]; ++ ++ ret = 0; ++ if (tsk->flags & PF_KTHREAD) { ++ get_task_comm(comm, tsk); ++ c = comm[4]; ++ ret = ('0' <= c && c <= '9' ++ && !strncmp(comm, "loop", 4)); ++ } ++ ++ return ret; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++#define au_warn_loopback_step 16 ++static int au_warn_loopback_nelem = au_warn_loopback_step; ++static unsigned long *au_warn_loopback_array; ++ ++void au_warn_loopback(struct super_block *h_sb) ++{ ++ int i, new_nelem; ++ unsigned long *a, magic; ++ static DEFINE_SPINLOCK(spin); ++ ++ magic = h_sb->s_magic; ++ spin_lock(&spin); ++ a = au_warn_loopback_array; ++ for (i = 0; i < au_warn_loopback_nelem && *a; i++) ++ if (a[i] == magic) { ++ spin_unlock(&spin); ++ return; ++ } ++ ++ /* h_sb is new to us, print it */ ++ if (i < au_warn_loopback_nelem) { ++ a[i] = magic; ++ goto pr; ++ } ++ ++ /* expand the array */ ++ new_nelem = au_warn_loopback_nelem + au_warn_loopback_step; ++ a = au_kzrealloc(au_warn_loopback_array, ++ au_warn_loopback_nelem * sizeof(unsigned long), ++ new_nelem * sizeof(unsigned long), GFP_ATOMIC); ++ if (a) { ++ au_warn_loopback_nelem = new_nelem; ++ au_warn_loopback_array = a; ++ a[i] = magic; ++ goto pr; ++ } ++ ++ spin_unlock(&spin); ++ AuWarn1("realloc failed, ignored\n"); ++ return; ++ ++pr: ++ spin_unlock(&spin); ++ pr_warn("you may want to try another patch for loopback file " ++ "on %s(0x%lx) branch\n", au_sbtype(h_sb), magic); ++} ++ ++int au_loopback_init(void) ++{ ++ int err; ++ struct super_block *sb __maybe_unused; ++ ++ BUILD_BUG_ON(sizeof(sb->s_magic) != sizeof(unsigned long)); ++ ++ err = 0; ++ au_warn_loopback_array = kcalloc(au_warn_loopback_step, ++ sizeof(unsigned long), GFP_NOFS); ++ if (unlikely(!au_warn_loopback_array)) ++ err = -ENOMEM; ++ ++ return err; ++} ++ ++void au_loopback_fin(void) ++{ ++ if (backing_file_func) ++ symbol_put(loop_backing_file); ++ kfree(au_warn_loopback_array); ++} +diff --git a/fs/aufs/loop.h b/fs/aufs/loop.h +new file mode 100644 +index 0000000..35f7446 +--- /dev/null ++++ b/fs/aufs/loop.h +@@ -0,0 +1,52 @@ ++/* ++ * Copyright (C) 2005-2016 Junjiro R. Okajima ++ * ++ * This program, aufs is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . ++ */ ++ ++/* ++ * support for loopback mount as a branch ++ */ ++ ++#ifndef __AUFS_LOOP_H__ ++#define __AUFS_LOOP_H__ ++ ++#ifdef __KERNEL__ ++ ++struct dentry; ++struct super_block; ++ ++#ifdef CONFIG_AUFS_BDEV_LOOP ++/* drivers/block/loop.c */ ++struct file *loop_backing_file(struct super_block *sb); ++ ++/* loop.c */ ++int au_test_loopback_overlap(struct super_block *sb, struct dentry *h_adding); ++int au_test_loopback_kthread(void); ++void au_warn_loopback(struct super_block *h_sb); ++ ++int au_loopback_init(void); ++void au_loopback_fin(void); ++#else ++AuStubInt0(au_test_loopback_overlap, struct super_block *sb, ++ struct dentry *h_adding) ++AuStubInt0(au_test_loopback_kthread, void) ++AuStubVoid(au_warn_loopback, struct super_block *h_sb) ++ ++AuStubInt0(au_loopback_init, void) ++AuStubVoid(au_loopback_fin, void) ++#endif /* BLK_DEV_LOOP */ ++ ++#endif /* __KERNEL__ */ ++#endif /* __AUFS_LOOP_H__ */ +diff --git a/fs/aufs/magic.mk b/fs/aufs/magic.mk +new file mode 100644 +index 0000000..4f83bdf +--- /dev/null ++++ b/fs/aufs/magic.mk +@@ -0,0 +1,30 @@ ++ ++# defined in ${srctree}/fs/fuse/inode.c ++# tristate ++ifdef CONFIG_FUSE_FS ++ccflags-y += -DFUSE_SUPER_MAGIC=0x65735546 ++endif ++ ++# defined in ${srctree}/fs/xfs/xfs_sb.h ++# tristate ++ifdef CONFIG_XFS_FS ++ccflags-y += -DXFS_SB_MAGIC=0x58465342 ++endif ++ ++# defined in ${srctree}/fs/configfs/mount.c ++# tristate ++ifdef CONFIG_CONFIGFS_FS ++ccflags-y += -DCONFIGFS_MAGIC=0x62656570 ++endif ++ ++# defined in ${srctree}/fs/ubifs/ubifs.h ++# tristate ++ifdef CONFIG_UBIFS_FS ++ccflags-y += -DUBIFS_SUPER_MAGIC=0x24051905 ++endif ++ ++# defined in ${srctree}/fs/hfsplus/hfsplus_raw.h ++# tristate ++ifdef CONFIG_HFSPLUS_FS ++ccflags-y += -DHFSPLUS_SUPER_MAGIC=0x482b ++endif +diff --git a/fs/aufs/module.c b/fs/aufs/module.c +new file mode 100644 +index 0000000..e4e04aa +--- /dev/null ++++ b/fs/aufs/module.c +@@ -0,0 +1,222 @@ ++/* ++ * Copyright (C) 2005-2016 Junjiro R. Okajima ++ * ++ * This program, aufs is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . ++ */ ++ ++/* ++ * module global variables and operations ++ */ ++ ++#include ++#include ++#include "aufs.h" ++ ++void *au_kzrealloc(void *p, unsigned int nused, unsigned int new_sz, gfp_t gfp) ++{ ++ if (new_sz <= nused) ++ return p; ++ ++ p = krealloc(p, new_sz, gfp); ++ if (p) ++ memset(p + nused, 0, new_sz - nused); ++ return p; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++/* ++ * aufs caches ++ */ ++struct kmem_cache *au_cachep[AuCache_Last]; ++static int __init au_cache_init(void) ++{ ++ au_cachep[AuCache_DINFO] = AuCacheCtor(au_dinfo, au_di_init_once); ++ if (au_cachep[AuCache_DINFO]) ++ /* SLAB_DESTROY_BY_RCU */ ++ au_cachep[AuCache_ICNTNR] = AuCacheCtor(au_icntnr, ++ au_icntnr_init_once); ++ if (au_cachep[AuCache_ICNTNR]) ++ au_cachep[AuCache_FINFO] = AuCacheCtor(au_finfo, ++ au_fi_init_once); ++ if (au_cachep[AuCache_FINFO]) ++ au_cachep[AuCache_VDIR] = AuCache(au_vdir); ++ if (au_cachep[AuCache_VDIR]) ++ au_cachep[AuCache_DEHSTR] = AuCache(au_vdir_dehstr); ++ if (au_cachep[AuCache_DEHSTR]) ++ return 0; ++ ++ return -ENOMEM; ++} ++ ++static void au_cache_fin(void) ++{ ++ int i; ++ ++ /* ++ * Make sure all delayed rcu free inodes are flushed before we ++ * destroy cache. ++ */ ++ rcu_barrier(); ++ ++ /* excluding AuCache_HNOTIFY */ ++ BUILD_BUG_ON(AuCache_HNOTIFY + 1 != AuCache_Last); ++ for (i = 0; i < AuCache_HNOTIFY; i++) ++ if (au_cachep[i]) { ++ kmem_cache_destroy(au_cachep[i]); ++ au_cachep[i] = NULL; ++ } ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++int au_dir_roflags; ++ ++#ifdef CONFIG_AUFS_SBILIST ++/* ++ * iterate_supers_type() doesn't protect us from ++ * remounting (branch management) ++ */ ++struct au_sphlhead au_sbilist; ++#endif ++ ++struct lock_class_key au_lc_key[AuLcKey_Last]; ++ ++/* ++ * functions for module interface. ++ */ ++MODULE_LICENSE("GPL"); ++/* MODULE_LICENSE("GPL v2"); */ ++MODULE_AUTHOR("Junjiro R. Okajima "); ++MODULE_DESCRIPTION(AUFS_NAME ++ " -- Advanced multi layered unification filesystem"); ++MODULE_VERSION(AUFS_VERSION); ++MODULE_ALIAS_FS(AUFS_NAME); ++ ++/* this module parameter has no meaning when SYSFS is disabled */ ++int sysaufs_brs = 1; ++MODULE_PARM_DESC(brs, "use /fs/aufs/si_*/brN"); ++module_param_named(brs, sysaufs_brs, int, S_IRUGO); ++ ++/* this module parameter has no meaning when USER_NS is disabled */ ++bool au_userns; ++MODULE_PARM_DESC(allow_userns, "allow unprivileged to mount under userns"); ++module_param_named(allow_userns, au_userns, bool, S_IRUGO); ++ ++/* ---------------------------------------------------------------------- */ ++ ++static char au_esc_chars[0x20 + 3]; /* 0x01-0x20, backslash, del, and NULL */ ++ ++int au_seq_path(struct seq_file *seq, struct path *path) ++{ ++ int err; ++ ++ err = seq_path(seq, path, au_esc_chars); ++ if (err > 0) ++ err = 0; ++ else if (err < 0) ++ err = -ENOMEM; ++ ++ return err; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++static int __init aufs_init(void) ++{ ++ int err, i; ++ char *p; ++ ++ p = au_esc_chars; ++ for (i = 1; i <= ' '; i++) ++ *p++ = i; ++ *p++ = '\\'; ++ *p++ = '\x7f'; ++ *p = 0; ++ ++ au_dir_roflags = au_file_roflags(O_DIRECTORY | O_LARGEFILE); ++ ++ memcpy(aufs_iop_nogetattr, aufs_iop, sizeof(aufs_iop)); ++ for (i = 0; i < AuIop_Last; i++) ++ aufs_iop_nogetattr[i].getattr = NULL; ++ ++ au_sbilist_init(); ++ sysaufs_brs_init(); ++ au_debug_init(); ++ au_dy_init(); ++ err = sysaufs_init(); ++ if (unlikely(err)) ++ goto out; ++ err = au_procfs_init(); ++ if (unlikely(err)) ++ goto out_sysaufs; ++ err = au_wkq_init(); ++ if (unlikely(err)) ++ goto out_procfs; ++ err = au_loopback_init(); ++ if (unlikely(err)) ++ goto out_wkq; ++ err = au_hnotify_init(); ++ if (unlikely(err)) ++ goto out_loopback; ++ err = au_sysrq_init(); ++ if (unlikely(err)) ++ goto out_hin; ++ err = au_cache_init(); ++ if (unlikely(err)) ++ goto out_sysrq; ++ ++ aufs_fs_type.fs_flags |= au_userns ? FS_USERNS_MOUNT : 0; ++ err = register_filesystem(&aufs_fs_type); ++ if (unlikely(err)) ++ goto out_cache; ++ ++ /* since we define pr_fmt, call printk directly */ ++ printk(KERN_INFO AUFS_NAME " " AUFS_VERSION "\n"); ++ goto out; /* success */ ++ ++out_cache: ++ au_cache_fin(); ++out_sysrq: ++ au_sysrq_fin(); ++out_hin: ++ au_hnotify_fin(); ++out_loopback: ++ au_loopback_fin(); ++out_wkq: ++ au_wkq_fin(); ++out_procfs: ++ au_procfs_fin(); ++out_sysaufs: ++ sysaufs_fin(); ++ au_dy_fin(); ++out: ++ return err; ++} ++ ++static void __exit aufs_exit(void) ++{ ++ unregister_filesystem(&aufs_fs_type); ++ au_cache_fin(); ++ au_sysrq_fin(); ++ au_hnotify_fin(); ++ au_loopback_fin(); ++ au_wkq_fin(); ++ au_procfs_fin(); ++ sysaufs_fin(); ++ au_dy_fin(); ++} ++ ++module_init(aufs_init); ++module_exit(aufs_exit); +diff --git a/fs/aufs/module.h b/fs/aufs/module.h +new file mode 100644 +index 0000000..90c3c8f +--- /dev/null ++++ b/fs/aufs/module.h +@@ -0,0 +1,105 @@ ++/* ++ * Copyright (C) 2005-2016 Junjiro R. Okajima ++ * ++ * This program, aufs is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . ++ */ ++ ++/* ++ * module initialization and module-global ++ */ ++ ++#ifndef __AUFS_MODULE_H__ ++#define __AUFS_MODULE_H__ ++ ++#ifdef __KERNEL__ ++ ++#include ++ ++struct path; ++struct seq_file; ++ ++/* module parameters */ ++extern int sysaufs_brs; ++extern bool au_userns; ++ ++/* ---------------------------------------------------------------------- */ ++ ++extern int au_dir_roflags; ++ ++enum { ++ AuLcNonDir_FIINFO, ++ AuLcNonDir_DIINFO, ++ AuLcNonDir_IIINFO, ++ ++ AuLcDir_FIINFO, ++ AuLcDir_DIINFO, ++ AuLcDir_IIINFO, ++ ++ AuLcSymlink_DIINFO, ++ AuLcSymlink_IIINFO, ++ ++ AuLcKey_Last ++}; ++extern struct lock_class_key au_lc_key[AuLcKey_Last]; ++ ++void *au_kzrealloc(void *p, unsigned int nused, unsigned int new_sz, gfp_t gfp); ++int au_seq_path(struct seq_file *seq, struct path *path); ++ ++#ifdef CONFIG_PROC_FS ++/* procfs.c */ ++int __init au_procfs_init(void); ++void au_procfs_fin(void); ++#else ++AuStubInt0(au_procfs_init, void); ++AuStubVoid(au_procfs_fin, void); ++#endif ++ ++/* ---------------------------------------------------------------------- */ ++ ++/* kmem cache */ ++enum { ++ AuCache_DINFO, ++ AuCache_ICNTNR, ++ AuCache_FINFO, ++ AuCache_VDIR, ++ AuCache_DEHSTR, ++ AuCache_HNOTIFY, /* must be last */ ++ AuCache_Last ++}; ++ ++#define AuCacheFlags (SLAB_RECLAIM_ACCOUNT | SLAB_MEM_SPREAD) ++#define AuCache(type) KMEM_CACHE(type, AuCacheFlags) ++#define AuCacheCtor(type, ctor) \ ++ kmem_cache_create(#type, sizeof(struct type), \ ++ __alignof__(struct type), AuCacheFlags, ctor) ++ ++extern struct kmem_cache *au_cachep[]; ++ ++#define AuCacheFuncs(name, index) \ ++static inline struct au_##name *au_cache_alloc_##name(void) \ ++{ return kmem_cache_alloc(au_cachep[AuCache_##index], GFP_NOFS); } \ ++static inline void au_cache_free_##name(struct au_##name *p) \ ++{ kmem_cache_free(au_cachep[AuCache_##index], p); } ++ ++AuCacheFuncs(dinfo, DINFO); ++AuCacheFuncs(icntnr, ICNTNR); ++AuCacheFuncs(finfo, FINFO); ++AuCacheFuncs(vdir, VDIR); ++AuCacheFuncs(vdir_dehstr, DEHSTR); ++#ifdef CONFIG_AUFS_HNOTIFY ++AuCacheFuncs(hnotify, HNOTIFY); ++#endif ++ ++#endif /* __KERNEL__ */ ++#endif /* __AUFS_MODULE_H__ */ +diff --git a/fs/aufs/mvdown.c b/fs/aufs/mvdown.c +new file mode 100644 +index 0000000..e660c8f +--- /dev/null ++++ b/fs/aufs/mvdown.c +@@ -0,0 +1,703 @@ ++/* ++ * Copyright (C) 2011-2016 Junjiro R. Okajima ++ * ++ * This program, aufs is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . ++ */ ++ ++/* ++ * move-down, opposite of copy-up ++ */ ++ ++#include "aufs.h" ++ ++struct au_mvd_args { ++ struct { ++ struct super_block *h_sb; ++ struct dentry *h_parent; ++ struct au_hinode *hdir; ++ struct inode *h_dir, *h_inode; ++ struct au_pin pin; ++ } info[AUFS_MVDOWN_NARRAY]; ++ ++ struct aufs_mvdown mvdown; ++ struct dentry *dentry, *parent; ++ struct inode *inode, *dir; ++ struct super_block *sb; ++ aufs_bindex_t bopq, bwh, bfound; ++ unsigned char rename_lock; ++}; ++ ++#define mvd_errno mvdown.au_errno ++#define mvd_bsrc mvdown.stbr[AUFS_MVDOWN_UPPER].bindex ++#define mvd_src_brid mvdown.stbr[AUFS_MVDOWN_UPPER].brid ++#define mvd_bdst mvdown.stbr[AUFS_MVDOWN_LOWER].bindex ++#define mvd_dst_brid mvdown.stbr[AUFS_MVDOWN_LOWER].brid ++ ++#define mvd_h_src_sb info[AUFS_MVDOWN_UPPER].h_sb ++#define mvd_h_src_parent info[AUFS_MVDOWN_UPPER].h_parent ++#define mvd_hdir_src info[AUFS_MVDOWN_UPPER].hdir ++#define mvd_h_src_dir info[AUFS_MVDOWN_UPPER].h_dir ++#define mvd_h_src_inode info[AUFS_MVDOWN_UPPER].h_inode ++#define mvd_pin_src info[AUFS_MVDOWN_UPPER].pin ++ ++#define mvd_h_dst_sb info[AUFS_MVDOWN_LOWER].h_sb ++#define mvd_h_dst_parent info[AUFS_MVDOWN_LOWER].h_parent ++#define mvd_hdir_dst info[AUFS_MVDOWN_LOWER].hdir ++#define mvd_h_dst_dir info[AUFS_MVDOWN_LOWER].h_dir ++#define mvd_h_dst_inode info[AUFS_MVDOWN_LOWER].h_inode ++#define mvd_pin_dst info[AUFS_MVDOWN_LOWER].pin ++ ++#define AU_MVD_PR(flag, ...) do { \ ++ if (flag) \ ++ pr_err(__VA_ARGS__); \ ++ } while (0) ++ ++static int find_lower_writable(struct au_mvd_args *a) ++{ ++ struct super_block *sb; ++ aufs_bindex_t bindex, bend; ++ struct au_branch *br; ++ ++ sb = a->sb; ++ bindex = a->mvd_bsrc; ++ bend = au_sbend(sb); ++ if (a->mvdown.flags & AUFS_MVDOWN_FHSM_LOWER) ++ for (bindex++; bindex <= bend; bindex++) { ++ br = au_sbr(sb, bindex); ++ if (au_br_fhsm(br->br_perm) ++ && (!(au_br_sb(br)->s_flags & MS_RDONLY))) ++ return bindex; ++ } ++ else if (!(a->mvdown.flags & AUFS_MVDOWN_ROLOWER)) ++ for (bindex++; bindex <= bend; bindex++) { ++ br = au_sbr(sb, bindex); ++ if (!au_br_rdonly(br)) ++ return bindex; ++ } ++ else ++ for (bindex++; bindex <= bend; bindex++) { ++ br = au_sbr(sb, bindex); ++ if (!(au_br_sb(br)->s_flags & MS_RDONLY)) { ++ if (au_br_rdonly(br)) ++ a->mvdown.flags ++ |= AUFS_MVDOWN_ROLOWER_R; ++ return bindex; ++ } ++ } ++ ++ return -1; ++} ++ ++/* make the parent dir on bdst */ ++static int au_do_mkdir(const unsigned char dmsg, struct au_mvd_args *a) ++{ ++ int err; ++ ++ err = 0; ++ a->mvd_hdir_src = au_hi(a->dir, a->mvd_bsrc); ++ a->mvd_hdir_dst = au_hi(a->dir, a->mvd_bdst); ++ a->mvd_h_src_parent = au_h_dptr(a->parent, a->mvd_bsrc); ++ a->mvd_h_dst_parent = NULL; ++ if (au_dbend(a->parent) >= a->mvd_bdst) ++ a->mvd_h_dst_parent = au_h_dptr(a->parent, a->mvd_bdst); ++ if (!a->mvd_h_dst_parent) { ++ err = au_cpdown_dirs(a->dentry, a->mvd_bdst); ++ if (unlikely(err)) { ++ AU_MVD_PR(dmsg, "cpdown_dirs failed\n"); ++ goto out; ++ } ++ a->mvd_h_dst_parent = au_h_dptr(a->parent, a->mvd_bdst); ++ } ++ ++out: ++ AuTraceErr(err); ++ return err; ++} ++ ++/* lock them all */ ++static int au_do_lock(const unsigned char dmsg, struct au_mvd_args *a) ++{ ++ int err; ++ struct dentry *h_trap; ++ ++ a->mvd_h_src_sb = au_sbr_sb(a->sb, a->mvd_bsrc); ++ a->mvd_h_dst_sb = au_sbr_sb(a->sb, a->mvd_bdst); ++ err = au_pin(&a->mvd_pin_dst, a->dentry, a->mvd_bdst, ++ au_opt_udba(a->sb), ++ AuPin_MNT_WRITE | AuPin_DI_LOCKED); ++ AuTraceErr(err); ++ if (unlikely(err)) { ++ AU_MVD_PR(dmsg, "pin_dst failed\n"); ++ goto out; ++ } ++ ++ if (a->mvd_h_src_sb != a->mvd_h_dst_sb) { ++ a->rename_lock = 0; ++ au_pin_init(&a->mvd_pin_src, a->dentry, a->mvd_bsrc, ++ AuLsc_DI_PARENT, AuLsc_I_PARENT3, ++ au_opt_udba(a->sb), ++ AuPin_MNT_WRITE | AuPin_DI_LOCKED); ++ err = au_do_pin(&a->mvd_pin_src); ++ AuTraceErr(err); ++ a->mvd_h_src_dir = a->mvd_h_src_parent->d_inode; ++ if (unlikely(err)) { ++ AU_MVD_PR(dmsg, "pin_src failed\n"); ++ goto out_dst; ++ } ++ goto out; /* success */ ++ } ++ ++ a->rename_lock = 1; ++ au_pin_hdir_unlock(&a->mvd_pin_dst); ++ err = au_pin(&a->mvd_pin_src, a->dentry, a->mvd_bsrc, ++ au_opt_udba(a->sb), ++ AuPin_MNT_WRITE | AuPin_DI_LOCKED); ++ AuTraceErr(err); ++ a->mvd_h_src_dir = a->mvd_h_src_parent->d_inode; ++ if (unlikely(err)) { ++ AU_MVD_PR(dmsg, "pin_src failed\n"); ++ au_pin_hdir_lock(&a->mvd_pin_dst); ++ goto out_dst; ++ } ++ au_pin_hdir_unlock(&a->mvd_pin_src); ++ h_trap = vfsub_lock_rename(a->mvd_h_src_parent, a->mvd_hdir_src, ++ a->mvd_h_dst_parent, a->mvd_hdir_dst); ++ if (h_trap) { ++ err = (h_trap != a->mvd_h_src_parent); ++ if (err) ++ err = (h_trap != a->mvd_h_dst_parent); ++ } ++ BUG_ON(err); /* it should never happen */ ++ if (unlikely(a->mvd_h_src_dir != au_pinned_h_dir(&a->mvd_pin_src))) { ++ err = -EBUSY; ++ AuTraceErr(err); ++ vfsub_unlock_rename(a->mvd_h_src_parent, a->mvd_hdir_src, ++ a->mvd_h_dst_parent, a->mvd_hdir_dst); ++ au_pin_hdir_lock(&a->mvd_pin_src); ++ au_unpin(&a->mvd_pin_src); ++ au_pin_hdir_lock(&a->mvd_pin_dst); ++ goto out_dst; ++ } ++ goto out; /* success */ ++ ++out_dst: ++ au_unpin(&a->mvd_pin_dst); ++out: ++ AuTraceErr(err); ++ return err; ++} ++ ++static void au_do_unlock(const unsigned char dmsg, struct au_mvd_args *a) ++{ ++ if (!a->rename_lock) ++ au_unpin(&a->mvd_pin_src); ++ else { ++ vfsub_unlock_rename(a->mvd_h_src_parent, a->mvd_hdir_src, ++ a->mvd_h_dst_parent, a->mvd_hdir_dst); ++ au_pin_hdir_lock(&a->mvd_pin_src); ++ au_unpin(&a->mvd_pin_src); ++ au_pin_hdir_lock(&a->mvd_pin_dst); ++ } ++ au_unpin(&a->mvd_pin_dst); ++} ++ ++/* copy-down the file */ ++static int au_do_cpdown(const unsigned char dmsg, struct au_mvd_args *a) ++{ ++ int err; ++ struct au_cp_generic cpg = { ++ .dentry = a->dentry, ++ .bdst = a->mvd_bdst, ++ .bsrc = a->mvd_bsrc, ++ .len = -1, ++ .pin = &a->mvd_pin_dst, ++ .flags = AuCpup_DTIME | AuCpup_HOPEN ++ }; ++ ++ AuDbg("b%d, b%d\n", cpg.bsrc, cpg.bdst); ++ if (a->mvdown.flags & AUFS_MVDOWN_OWLOWER) ++ au_fset_cpup(cpg.flags, OVERWRITE); ++ if (a->mvdown.flags & AUFS_MVDOWN_ROLOWER) ++ au_fset_cpup(cpg.flags, RWDST); ++ err = au_sio_cpdown_simple(&cpg); ++ if (unlikely(err)) ++ AU_MVD_PR(dmsg, "cpdown failed\n"); ++ ++ AuTraceErr(err); ++ return err; ++} ++ ++/* ++ * unlink the whiteout on bdst if exist which may be created by UDBA while we ++ * were sleeping ++ */ ++static int au_do_unlink_wh(const unsigned char dmsg, struct au_mvd_args *a) ++{ ++ int err; ++ struct path h_path; ++ struct au_branch *br; ++ struct inode *delegated; ++ ++ br = au_sbr(a->sb, a->mvd_bdst); ++ h_path.dentry = au_wh_lkup(a->mvd_h_dst_parent, &a->dentry->d_name, br); ++ err = PTR_ERR(h_path.dentry); ++ if (IS_ERR(h_path.dentry)) { ++ AU_MVD_PR(dmsg, "wh_lkup failed\n"); ++ goto out; ++ } ++ ++ err = 0; ++ if (h_path.dentry->d_inode) { ++ h_path.mnt = au_br_mnt(br); ++ delegated = NULL; ++ err = vfsub_unlink(a->mvd_h_dst_parent->d_inode, &h_path, ++ &delegated, /*force*/0); ++ if (unlikely(err == -EWOULDBLOCK)) { ++ pr_warn("cannot retry for NFSv4 delegation" ++ " for an internal unlink\n"); ++ iput(delegated); ++ } ++ if (unlikely(err)) ++ AU_MVD_PR(dmsg, "wh_unlink failed\n"); ++ } ++ dput(h_path.dentry); ++ ++out: ++ AuTraceErr(err); ++ return err; ++} ++ ++/* ++ * unlink the topmost h_dentry ++ */ ++static int au_do_unlink(const unsigned char dmsg, struct au_mvd_args *a) ++{ ++ int err; ++ struct path h_path; ++ struct inode *delegated; ++ ++ h_path.mnt = au_sbr_mnt(a->sb, a->mvd_bsrc); ++ h_path.dentry = au_h_dptr(a->dentry, a->mvd_bsrc); ++ delegated = NULL; ++ err = vfsub_unlink(a->mvd_h_src_dir, &h_path, &delegated, /*force*/0); ++ if (unlikely(err == -EWOULDBLOCK)) { ++ pr_warn("cannot retry for NFSv4 delegation" ++ " for an internal unlink\n"); ++ iput(delegated); ++ } ++ if (unlikely(err)) ++ AU_MVD_PR(dmsg, "unlink failed\n"); ++ ++ AuTraceErr(err); ++ return err; ++} ++ ++/* Since mvdown succeeded, we ignore an error of this function */ ++static void au_do_stfs(const unsigned char dmsg, struct au_mvd_args *a) ++{ ++ int err; ++ struct au_branch *br; ++ ++ a->mvdown.flags |= AUFS_MVDOWN_STFS_FAILED; ++ br = au_sbr(a->sb, a->mvd_bsrc); ++ err = au_br_stfs(br, &a->mvdown.stbr[AUFS_MVDOWN_UPPER].stfs); ++ if (!err) { ++ br = au_sbr(a->sb, a->mvd_bdst); ++ a->mvdown.stbr[AUFS_MVDOWN_LOWER].brid = br->br_id; ++ err = au_br_stfs(br, &a->mvdown.stbr[AUFS_MVDOWN_LOWER].stfs); ++ } ++ if (!err) ++ a->mvdown.flags &= ~AUFS_MVDOWN_STFS_FAILED; ++ else ++ AU_MVD_PR(dmsg, "statfs failed (%d), ignored\n", err); ++} ++ ++/* ++ * copy-down the file and unlink the bsrc file. ++ * - unlink the bdst whout if exist ++ * - copy-down the file (with whtmp name and rename) ++ * - unlink the bsrc file ++ */ ++static int au_do_mvdown(const unsigned char dmsg, struct au_mvd_args *a) ++{ ++ int err; ++ ++ err = au_do_mkdir(dmsg, a); ++ if (!err) ++ err = au_do_lock(dmsg, a); ++ if (unlikely(err)) ++ goto out; ++ ++ /* ++ * do not revert the activities we made on bdst since they should be ++ * harmless in aufs. ++ */ ++ ++ err = au_do_cpdown(dmsg, a); ++ if (!err) ++ err = au_do_unlink_wh(dmsg, a); ++ if (!err && !(a->mvdown.flags & AUFS_MVDOWN_KUPPER)) ++ err = au_do_unlink(dmsg, a); ++ if (unlikely(err)) ++ goto out_unlock; ++ ++ AuDbg("%pd2, 0x%x, %d --> %d\n", ++ a->dentry, a->mvdown.flags, a->mvd_bsrc, a->mvd_bdst); ++ if (find_lower_writable(a) < 0) ++ a->mvdown.flags |= AUFS_MVDOWN_BOTTOM; ++ ++ if (a->mvdown.flags & AUFS_MVDOWN_STFS) ++ au_do_stfs(dmsg, a); ++ ++ /* maintain internal array */ ++ if (!(a->mvdown.flags & AUFS_MVDOWN_KUPPER)) { ++ au_set_h_dptr(a->dentry, a->mvd_bsrc, NULL); ++ au_set_dbstart(a->dentry, a->mvd_bdst); ++ au_set_h_iptr(a->inode, a->mvd_bsrc, NULL, /*flags*/0); ++ au_set_ibstart(a->inode, a->mvd_bdst); ++ } else { ++ /* hide the lower */ ++ au_set_h_dptr(a->dentry, a->mvd_bdst, NULL); ++ au_set_dbend(a->dentry, a->mvd_bsrc); ++ au_set_h_iptr(a->inode, a->mvd_bdst, NULL, /*flags*/0); ++ au_set_ibend(a->inode, a->mvd_bsrc); ++ } ++ if (au_dbend(a->dentry) < a->mvd_bdst) ++ au_set_dbend(a->dentry, a->mvd_bdst); ++ if (au_ibend(a->inode) < a->mvd_bdst) ++ au_set_ibend(a->inode, a->mvd_bdst); ++ ++out_unlock: ++ au_do_unlock(dmsg, a); ++out: ++ AuTraceErr(err); ++ return err; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++/* make sure the file is idle */ ++static int au_mvd_args_busy(const unsigned char dmsg, struct au_mvd_args *a) ++{ ++ int err, plinked; ++ ++ err = 0; ++ plinked = !!au_opt_test(au_mntflags(a->sb), PLINK); ++ if (au_dbstart(a->dentry) == a->mvd_bsrc ++ && au_dcount(a->dentry) == 1 ++ && atomic_read(&a->inode->i_count) == 1 ++ /* && a->mvd_h_src_inode->i_nlink == 1 */ ++ && (!plinked || !au_plink_test(a->inode)) ++ && a->inode->i_nlink == 1) ++ goto out; ++ ++ err = -EBUSY; ++ AU_MVD_PR(dmsg, ++ "b%d, d{b%d, c%d?}, i{c%d?, l%u}, hi{l%u}, p{%d, %d}\n", ++ a->mvd_bsrc, au_dbstart(a->dentry), au_dcount(a->dentry), ++ atomic_read(&a->inode->i_count), a->inode->i_nlink, ++ a->mvd_h_src_inode->i_nlink, ++ plinked, plinked ? au_plink_test(a->inode) : 0); ++ ++out: ++ AuTraceErr(err); ++ return err; ++} ++ ++/* make sure the parent dir is fine */ ++static int au_mvd_args_parent(const unsigned char dmsg, ++ struct au_mvd_args *a) ++{ ++ int err; ++ aufs_bindex_t bindex; ++ ++ err = 0; ++ if (unlikely(au_alive_dir(a->parent))) { ++ err = -ENOENT; ++ AU_MVD_PR(dmsg, "parent dir is dead\n"); ++ goto out; ++ } ++ ++ a->bopq = au_dbdiropq(a->parent); ++ bindex = au_wbr_nonopq(a->dentry, a->mvd_bdst); ++ AuDbg("b%d\n", bindex); ++ if (unlikely((bindex >= 0 && bindex < a->mvd_bdst) ++ || (a->bopq != -1 && a->bopq < a->mvd_bdst))) { ++ err = -EINVAL; ++ a->mvd_errno = EAU_MVDOWN_OPAQUE; ++ AU_MVD_PR(dmsg, "ancestor is opaque b%d, b%d\n", ++ a->bopq, a->mvd_bdst); ++ } ++ ++out: ++ AuTraceErr(err); ++ return err; ++} ++ ++static int au_mvd_args_intermediate(const unsigned char dmsg, ++ struct au_mvd_args *a) ++{ ++ int err; ++ struct au_dinfo *dinfo, *tmp; ++ ++ /* lookup the next lower positive entry */ ++ err = -ENOMEM; ++ tmp = au_di_alloc(a->sb, AuLsc_DI_TMP); ++ if (unlikely(!tmp)) ++ goto out; ++ ++ a->bfound = -1; ++ a->bwh = -1; ++ dinfo = au_di(a->dentry); ++ au_di_cp(tmp, dinfo); ++ au_di_swap(tmp, dinfo); ++ ++ /* returns the number of positive dentries */ ++ err = au_lkup_dentry(a->dentry, a->mvd_bsrc + 1, /*type*/0); ++ if (!err) ++ a->bwh = au_dbwh(a->dentry); ++ else if (err > 0) ++ a->bfound = au_dbstart(a->dentry); ++ ++ au_di_swap(tmp, dinfo); ++ au_rw_write_unlock(&tmp->di_rwsem); ++ au_di_free(tmp); ++ if (unlikely(err < 0)) ++ AU_MVD_PR(dmsg, "failed look-up lower\n"); ++ ++ /* ++ * here, we have these cases. ++ * bfound == -1 ++ * no positive dentry under bsrc. there are more sub-cases. ++ * bwh < 0 ++ * there no whiteout, we can safely move-down. ++ * bwh <= bsrc ++ * impossible ++ * bsrc < bwh && bwh < bdst ++ * there is a whiteout on RO branch. cannot proceed. ++ * bwh == bdst ++ * there is a whiteout on the RW target branch. it should ++ * be removed. ++ * bdst < bwh ++ * there is a whiteout somewhere unrelated branch. ++ * -1 < bfound && bfound <= bsrc ++ * impossible. ++ * bfound < bdst ++ * found, but it is on RO branch between bsrc and bdst. cannot ++ * proceed. ++ * bfound == bdst ++ * found, replace it if AUFS_MVDOWN_FORCE is set. otherwise return ++ * error. ++ * bdst < bfound ++ * found, after we create the file on bdst, it will be hidden. ++ */ ++ ++ AuDebugOn(a->bfound == -1 ++ && a->bwh != -1 ++ && a->bwh <= a->mvd_bsrc); ++ AuDebugOn(-1 < a->bfound ++ && a->bfound <= a->mvd_bsrc); ++ ++ err = -EINVAL; ++ if (a->bfound == -1 ++ && a->mvd_bsrc < a->bwh ++ && a->bwh != -1 ++ && a->bwh < a->mvd_bdst) { ++ a->mvd_errno = EAU_MVDOWN_WHITEOUT; ++ AU_MVD_PR(dmsg, "bsrc %d, bdst %d, bfound %d, bwh %d\n", ++ a->mvd_bsrc, a->mvd_bdst, a->bfound, a->bwh); ++ goto out; ++ } else if (a->bfound != -1 && a->bfound < a->mvd_bdst) { ++ a->mvd_errno = EAU_MVDOWN_UPPER; ++ AU_MVD_PR(dmsg, "bdst %d, bfound %d\n", ++ a->mvd_bdst, a->bfound); ++ goto out; ++ } ++ ++ err = 0; /* success */ ++ ++out: ++ AuTraceErr(err); ++ return err; ++} ++ ++static int au_mvd_args_exist(const unsigned char dmsg, struct au_mvd_args *a) ++{ ++ int err; ++ ++ err = 0; ++ if (!(a->mvdown.flags & AUFS_MVDOWN_OWLOWER) ++ && a->bfound == a->mvd_bdst) ++ err = -EEXIST; ++ AuTraceErr(err); ++ return err; ++} ++ ++static int au_mvd_args(const unsigned char dmsg, struct au_mvd_args *a) ++{ ++ int err; ++ struct au_branch *br; ++ ++ err = -EISDIR; ++ if (unlikely(S_ISDIR(a->inode->i_mode))) ++ goto out; ++ ++ err = -EINVAL; ++ if (!(a->mvdown.flags & AUFS_MVDOWN_BRID_UPPER)) ++ a->mvd_bsrc = au_ibstart(a->inode); ++ else { ++ a->mvd_bsrc = au_br_index(a->sb, a->mvd_src_brid); ++ if (unlikely(a->mvd_bsrc < 0 ++ || (a->mvd_bsrc < au_dbstart(a->dentry) ++ || au_dbend(a->dentry) < a->mvd_bsrc ++ || !au_h_dptr(a->dentry, a->mvd_bsrc)) ++ || (a->mvd_bsrc < au_ibstart(a->inode) ++ || au_ibend(a->inode) < a->mvd_bsrc ++ || !au_h_iptr(a->inode, a->mvd_bsrc)))) { ++ a->mvd_errno = EAU_MVDOWN_NOUPPER; ++ AU_MVD_PR(dmsg, "no upper\n"); ++ goto out; ++ } ++ } ++ if (unlikely(a->mvd_bsrc == au_sbend(a->sb))) { ++ a->mvd_errno = EAU_MVDOWN_BOTTOM; ++ AU_MVD_PR(dmsg, "on the bottom\n"); ++ goto out; ++ } ++ a->mvd_h_src_inode = au_h_iptr(a->inode, a->mvd_bsrc); ++ br = au_sbr(a->sb, a->mvd_bsrc); ++ err = au_br_rdonly(br); ++ if (!(a->mvdown.flags & AUFS_MVDOWN_ROUPPER)) { ++ if (unlikely(err)) ++ goto out; ++ } else if (!(vfsub_native_ro(a->mvd_h_src_inode) ++ || IS_APPEND(a->mvd_h_src_inode))) { ++ if (err) ++ a->mvdown.flags |= AUFS_MVDOWN_ROUPPER_R; ++ /* go on */ ++ } else ++ goto out; ++ ++ err = -EINVAL; ++ if (!(a->mvdown.flags & AUFS_MVDOWN_BRID_LOWER)) { ++ a->mvd_bdst = find_lower_writable(a); ++ if (unlikely(a->mvd_bdst < 0)) { ++ a->mvd_errno = EAU_MVDOWN_BOTTOM; ++ AU_MVD_PR(dmsg, "no writable lower branch\n"); ++ goto out; ++ } ++ } else { ++ a->mvd_bdst = au_br_index(a->sb, a->mvd_dst_brid); ++ if (unlikely(a->mvd_bdst < 0 ++ || au_sbend(a->sb) < a->mvd_bdst)) { ++ a->mvd_errno = EAU_MVDOWN_NOLOWERBR; ++ AU_MVD_PR(dmsg, "no lower brid\n"); ++ goto out; ++ } ++ } ++ ++ err = au_mvd_args_busy(dmsg, a); ++ if (!err) ++ err = au_mvd_args_parent(dmsg, a); ++ if (!err) ++ err = au_mvd_args_intermediate(dmsg, a); ++ if (!err) ++ err = au_mvd_args_exist(dmsg, a); ++ if (!err) ++ AuDbg("b%d, b%d\n", a->mvd_bsrc, a->mvd_bdst); ++ ++out: ++ AuTraceErr(err); ++ return err; ++} ++ ++int au_mvdown(struct dentry *dentry, struct aufs_mvdown __user *uarg) ++{ ++ int err, e; ++ unsigned char dmsg; ++ struct au_mvd_args *args; ++ struct inode *inode; ++ ++ inode = dentry->d_inode; ++ err = -EPERM; ++ if (unlikely(!capable(CAP_SYS_ADMIN))) ++ goto out; ++ ++ err = -ENOMEM; ++ args = kmalloc(sizeof(*args), GFP_NOFS); ++ if (unlikely(!args)) ++ goto out; ++ ++ err = copy_from_user(&args->mvdown, uarg, sizeof(args->mvdown)); ++ if (!err) ++ err = !access_ok(VERIFY_WRITE, uarg, sizeof(*uarg)); ++ if (unlikely(err)) { ++ err = -EFAULT; ++ AuTraceErr(err); ++ goto out_free; ++ } ++ AuDbg("flags 0x%x\n", args->mvdown.flags); ++ args->mvdown.flags &= ~(AUFS_MVDOWN_ROLOWER_R | AUFS_MVDOWN_ROUPPER_R); ++ args->mvdown.au_errno = 0; ++ args->dentry = dentry; ++ args->inode = inode; ++ args->sb = dentry->d_sb; ++ ++ err = -ENOENT; ++ dmsg = !!(args->mvdown.flags & AUFS_MVDOWN_DMSG); ++ args->parent = dget_parent(dentry); ++ args->dir = args->parent->d_inode; ++ mutex_lock_nested(&args->dir->i_mutex, I_MUTEX_PARENT); ++ dput(args->parent); ++ if (unlikely(args->parent != dentry->d_parent)) { ++ AU_MVD_PR(dmsg, "parent dir is moved\n"); ++ goto out_dir; ++ } ++ ++ mutex_lock_nested(&inode->i_mutex, I_MUTEX_CHILD); ++ err = aufs_read_lock(dentry, AuLock_DW | AuLock_FLUSH | AuLock_NOPLMW); ++ if (unlikely(err)) ++ goto out_inode; ++ ++ di_write_lock_parent(args->parent); ++ err = au_mvd_args(dmsg, args); ++ if (unlikely(err)) ++ goto out_parent; ++ ++ err = au_do_mvdown(dmsg, args); ++ if (unlikely(err)) ++ goto out_parent; ++ ++ au_cpup_attr_timesizes(args->dir); ++ au_cpup_attr_timesizes(inode); ++ if (!(args->mvdown.flags & AUFS_MVDOWN_KUPPER)) ++ au_cpup_igen(inode, au_h_iptr(inode, args->mvd_bdst)); ++ /* au_digen_dec(dentry); */ ++ ++out_parent: ++ di_write_unlock(args->parent); ++ aufs_read_unlock(dentry, AuLock_DW); ++out_inode: ++ mutex_unlock(&inode->i_mutex); ++out_dir: ++ mutex_unlock(&args->dir->i_mutex); ++out_free: ++ e = copy_to_user(uarg, &args->mvdown, sizeof(args->mvdown)); ++ if (unlikely(e)) ++ err = -EFAULT; ++ kfree(args); ++out: ++ AuTraceErr(err); ++ return err; ++} +diff --git a/fs/aufs/opts.c b/fs/aufs/opts.c +new file mode 100644 +index 0000000..0363f67 +--- /dev/null ++++ b/fs/aufs/opts.c +@@ -0,0 +1,1878 @@ ++/* ++ * Copyright (C) 2005-2016 Junjiro R. Okajima ++ * ++ * This program, aufs is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . ++ */ ++ ++/* ++ * mount options/flags ++ */ ++ ++#include ++#include /* a distribution requires */ ++#include ++#include "aufs.h" ++ ++/* ---------------------------------------------------------------------- */ ++ ++enum { ++ Opt_br, ++ Opt_add, Opt_del, Opt_mod, Opt_append, Opt_prepend, ++ Opt_idel, Opt_imod, ++ Opt_dirwh, Opt_rdcache, Opt_rdblk, Opt_rdhash, ++ Opt_rdblk_def, Opt_rdhash_def, ++ Opt_xino, Opt_noxino, ++ Opt_trunc_xino, Opt_trunc_xino_v, Opt_notrunc_xino, ++ Opt_trunc_xino_path, Opt_itrunc_xino, ++ Opt_trunc_xib, Opt_notrunc_xib, ++ Opt_shwh, Opt_noshwh, ++ Opt_plink, Opt_noplink, Opt_list_plink, ++ Opt_udba, ++ Opt_dio, Opt_nodio, ++ Opt_diropq_a, Opt_diropq_w, ++ Opt_warn_perm, Opt_nowarn_perm, ++ Opt_wbr_copyup, Opt_wbr_create, ++ Opt_fhsm_sec, ++ Opt_refrof, Opt_norefrof, ++ Opt_verbose, Opt_noverbose, ++ Opt_sum, Opt_nosum, Opt_wsum, ++ Opt_dirperm1, Opt_nodirperm1, ++ Opt_acl, Opt_noacl, ++ Opt_tail, Opt_ignore, Opt_ignore_silent, Opt_err ++}; ++ ++static match_table_t options = { ++ {Opt_br, "br=%s"}, ++ {Opt_br, "br:%s"}, ++ ++ {Opt_add, "add=%d:%s"}, ++ {Opt_add, "add:%d:%s"}, ++ {Opt_add, "ins=%d:%s"}, ++ {Opt_add, "ins:%d:%s"}, ++ {Opt_append, "append=%s"}, ++ {Opt_append, "append:%s"}, ++ {Opt_prepend, "prepend=%s"}, ++ {Opt_prepend, "prepend:%s"}, ++ ++ {Opt_del, "del=%s"}, ++ {Opt_del, "del:%s"}, ++ /* {Opt_idel, "idel:%d"}, */ ++ {Opt_mod, "mod=%s"}, ++ {Opt_mod, "mod:%s"}, ++ /* {Opt_imod, "imod:%d:%s"}, */ ++ ++ {Opt_dirwh, "dirwh=%d"}, ++ ++ {Opt_xino, "xino=%s"}, ++ {Opt_noxino, "noxino"}, ++ {Opt_trunc_xino, "trunc_xino"}, ++ {Opt_trunc_xino_v, "trunc_xino_v=%d:%d"}, ++ {Opt_notrunc_xino, "notrunc_xino"}, ++ {Opt_trunc_xino_path, "trunc_xino=%s"}, ++ {Opt_itrunc_xino, "itrunc_xino=%d"}, ++ /* {Opt_zxino, "zxino=%s"}, */ ++ {Opt_trunc_xib, "trunc_xib"}, ++ {Opt_notrunc_xib, "notrunc_xib"}, ++ ++#ifdef CONFIG_PROC_FS ++ {Opt_plink, "plink"}, ++#else ++ {Opt_ignore_silent, "plink"}, ++#endif ++ ++ {Opt_noplink, "noplink"}, ++ ++#ifdef CONFIG_AUFS_DEBUG ++ {Opt_list_plink, "list_plink"}, ++#endif ++ ++ {Opt_udba, "udba=%s"}, ++ ++ {Opt_dio, "dio"}, ++ {Opt_nodio, "nodio"}, ++ ++#ifdef CONFIG_AUFS_FHSM ++ {Opt_fhsm_sec, "fhsm_sec=%d"}, ++#else ++ {Opt_ignore_silent, "fhsm_sec=%d"}, ++#endif ++ ++ {Opt_diropq_a, "diropq=always"}, ++ {Opt_diropq_a, "diropq=a"}, ++ {Opt_diropq_w, "diropq=whiteouted"}, ++ {Opt_diropq_w, "diropq=w"}, ++ ++ {Opt_warn_perm, "warn_perm"}, ++ {Opt_nowarn_perm, "nowarn_perm"}, ++ ++ /* keep them temporary */ ++ {Opt_ignore_silent, "nodlgt"}, ++ {Opt_ignore_silent, "clean_plink"}, ++ ++#ifdef CONFIG_AUFS_SHWH ++ {Opt_shwh, "shwh"}, ++#endif ++ {Opt_noshwh, "noshwh"}, ++ ++ {Opt_dirperm1, "dirperm1"}, ++ {Opt_nodirperm1, "nodirperm1"}, ++ ++ {Opt_refrof, "refrof"}, ++ {Opt_norefrof, "norefrof"}, ++ ++ {Opt_verbose, "verbose"}, ++ {Opt_verbose, "v"}, ++ {Opt_noverbose, "noverbose"}, ++ {Opt_noverbose, "quiet"}, ++ {Opt_noverbose, "q"}, ++ {Opt_noverbose, "silent"}, ++ ++ {Opt_sum, "sum"}, ++ {Opt_nosum, "nosum"}, ++ {Opt_wsum, "wsum"}, ++ ++ {Opt_rdcache, "rdcache=%d"}, ++ {Opt_rdblk, "rdblk=%d"}, ++ {Opt_rdblk_def, "rdblk=def"}, ++ {Opt_rdhash, "rdhash=%d"}, ++ {Opt_rdhash_def, "rdhash=def"}, ++ ++ {Opt_wbr_create, "create=%s"}, ++ {Opt_wbr_create, "create_policy=%s"}, ++ {Opt_wbr_copyup, "cpup=%s"}, ++ {Opt_wbr_copyup, "copyup=%s"}, ++ {Opt_wbr_copyup, "copyup_policy=%s"}, ++ ++ /* generic VFS flag */ ++#ifdef CONFIG_FS_POSIX_ACL ++ {Opt_acl, "acl"}, ++ {Opt_noacl, "noacl"}, ++#else ++ {Opt_ignore_silent, "acl"}, ++ {Opt_ignore_silent, "noacl"}, ++#endif ++ ++ /* internal use for the scripts */ ++ {Opt_ignore_silent, "si=%s"}, ++ ++ {Opt_br, "dirs=%s"}, ++ {Opt_ignore, "debug=%d"}, ++ {Opt_ignore, "delete=whiteout"}, ++ {Opt_ignore, "delete=all"}, ++ {Opt_ignore, "imap=%s"}, ++ ++ /* temporary workaround, due to old mount(8)? */ ++ {Opt_ignore_silent, "relatime"}, ++ ++ {Opt_err, NULL} ++}; ++ ++/* ---------------------------------------------------------------------- */ ++ ++static const char *au_parser_pattern(int val, match_table_t tbl) ++{ ++ struct match_token *p; ++ ++ p = tbl; ++ while (p->pattern) { ++ if (p->token == val) ++ return p->pattern; ++ p++; ++ } ++ BUG(); ++ return "??"; ++} ++ ++static const char *au_optstr(int *val, match_table_t tbl) ++{ ++ struct match_token *p; ++ int v; ++ ++ v = *val; ++ if (!v) ++ goto out; ++ p = tbl; ++ while (p->pattern) { ++ if (p->token ++ && (v & p->token) == p->token) { ++ *val &= ~p->token; ++ return p->pattern; ++ } ++ p++; ++ } ++ ++out: ++ return NULL; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++static match_table_t brperm = { ++ {AuBrPerm_RO, AUFS_BRPERM_RO}, ++ {AuBrPerm_RR, AUFS_BRPERM_RR}, ++ {AuBrPerm_RW, AUFS_BRPERM_RW}, ++ {0, NULL} ++}; ++ ++static match_table_t brattr = { ++ /* general */ ++ {AuBrAttr_COO_REG, AUFS_BRATTR_COO_REG}, ++ {AuBrAttr_COO_ALL, AUFS_BRATTR_COO_ALL}, ++ /* 'unpin' attrib is meaningless since linux-3.18-rc1 */ ++ {AuBrAttr_UNPIN, AUFS_BRATTR_UNPIN}, ++#ifdef CONFIG_AUFS_FHSM ++ {AuBrAttr_FHSM, AUFS_BRATTR_FHSM}, ++#endif ++#ifdef CONFIG_AUFS_XATTR ++ {AuBrAttr_ICEX, AUFS_BRATTR_ICEX}, ++ {AuBrAttr_ICEX_SEC, AUFS_BRATTR_ICEX_SEC}, ++ {AuBrAttr_ICEX_SYS, AUFS_BRATTR_ICEX_SYS}, ++ {AuBrAttr_ICEX_TR, AUFS_BRATTR_ICEX_TR}, ++ {AuBrAttr_ICEX_USR, AUFS_BRATTR_ICEX_USR}, ++ {AuBrAttr_ICEX_OTH, AUFS_BRATTR_ICEX_OTH}, ++#endif ++ ++ /* ro/rr branch */ ++ {AuBrRAttr_WH, AUFS_BRRATTR_WH}, ++ ++ /* rw branch */ ++ {AuBrWAttr_MOO, AUFS_BRWATTR_MOO}, ++ {AuBrWAttr_NoLinkWH, AUFS_BRWATTR_NLWH}, ++ ++ {0, NULL} ++}; ++ ++static int br_attr_val(char *str, match_table_t table, substring_t args[]) ++{ ++ int attr, v; ++ char *p; ++ ++ attr = 0; ++ do { ++ p = strchr(str, '+'); ++ if (p) ++ *p = 0; ++ v = match_token(str, table, args); ++ if (v) { ++ if (v & AuBrAttr_CMOO_Mask) ++ attr &= ~AuBrAttr_CMOO_Mask; ++ attr |= v; ++ } else { ++ if (p) ++ *p = '+'; ++ pr_warn("ignored branch attribute %s\n", str); ++ break; ++ } ++ if (p) ++ str = p + 1; ++ } while (p); ++ ++ return attr; ++} ++ ++static int au_do_optstr_br_attr(au_br_perm_str_t *str, int perm) ++{ ++ int sz; ++ const char *p; ++ char *q; ++ ++ q = str->a; ++ *q = 0; ++ p = au_optstr(&perm, brattr); ++ if (p) { ++ sz = strlen(p); ++ memcpy(q, p, sz + 1); ++ q += sz; ++ } else ++ goto out; ++ ++ do { ++ p = au_optstr(&perm, brattr); ++ if (p) { ++ *q++ = '+'; ++ sz = strlen(p); ++ memcpy(q, p, sz + 1); ++ q += sz; ++ } ++ } while (p); ++ ++out: ++ return q - str->a; ++} ++ ++static int noinline_for_stack br_perm_val(char *perm) ++{ ++ int val, bad, sz; ++ char *p; ++ substring_t args[MAX_OPT_ARGS]; ++ au_br_perm_str_t attr; ++ ++ p = strchr(perm, '+'); ++ if (p) ++ *p = 0; ++ val = match_token(perm, brperm, args); ++ if (!val) { ++ if (p) ++ *p = '+'; ++ pr_warn("ignored branch permission %s\n", perm); ++ val = AuBrPerm_RO; ++ goto out; ++ } ++ if (!p) ++ goto out; ++ ++ val |= br_attr_val(p + 1, brattr, args); ++ ++ bad = 0; ++ switch (val & AuBrPerm_Mask) { ++ case AuBrPerm_RO: ++ case AuBrPerm_RR: ++ bad = val & AuBrWAttr_Mask; ++ val &= ~AuBrWAttr_Mask; ++ break; ++ case AuBrPerm_RW: ++ bad = val & AuBrRAttr_Mask; ++ val &= ~AuBrRAttr_Mask; ++ break; ++ } ++ ++ /* ++ * 'unpin' attrib becomes meaningless since linux-3.18-rc1, but aufs ++ * does not treat it as an error, just warning. ++ * this is a tiny guard for the user operation. ++ */ ++ if (val & AuBrAttr_UNPIN) { ++ bad |= AuBrAttr_UNPIN; ++ val &= ~AuBrAttr_UNPIN; ++ } ++ ++ if (unlikely(bad)) { ++ sz = au_do_optstr_br_attr(&attr, bad); ++ AuDebugOn(!sz); ++ pr_warn("ignored branch attribute %s\n", attr.a); ++ } ++ ++out: ++ return val; ++} ++ ++void au_optstr_br_perm(au_br_perm_str_t *str, int perm) ++{ ++ au_br_perm_str_t attr; ++ const char *p; ++ char *q; ++ int sz; ++ ++ q = str->a; ++ p = au_optstr(&perm, brperm); ++ AuDebugOn(!p || !*p); ++ sz = strlen(p); ++ memcpy(q, p, sz + 1); ++ q += sz; ++ ++ sz = au_do_optstr_br_attr(&attr, perm); ++ if (sz) { ++ *q++ = '+'; ++ memcpy(q, attr.a, sz + 1); ++ } ++ ++ AuDebugOn(strlen(str->a) >= sizeof(str->a)); ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++static match_table_t udbalevel = { ++ {AuOpt_UDBA_REVAL, "reval"}, ++ {AuOpt_UDBA_NONE, "none"}, ++#ifdef CONFIG_AUFS_HNOTIFY ++ {AuOpt_UDBA_HNOTIFY, "notify"}, /* abstraction */ ++#ifdef CONFIG_AUFS_HFSNOTIFY ++ {AuOpt_UDBA_HNOTIFY, "fsnotify"}, ++#endif ++#endif ++ {-1, NULL} ++}; ++ ++static int noinline_for_stack udba_val(char *str) ++{ ++ substring_t args[MAX_OPT_ARGS]; ++ ++ return match_token(str, udbalevel, args); ++} ++ ++const char *au_optstr_udba(int udba) ++{ ++ return au_parser_pattern(udba, udbalevel); ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++static match_table_t au_wbr_create_policy = { ++ {AuWbrCreate_TDP, "tdp"}, ++ {AuWbrCreate_TDP, "top-down-parent"}, ++ {AuWbrCreate_RR, "rr"}, ++ {AuWbrCreate_RR, "round-robin"}, ++ {AuWbrCreate_MFS, "mfs"}, ++ {AuWbrCreate_MFS, "most-free-space"}, ++ {AuWbrCreate_MFSV, "mfs:%d"}, ++ {AuWbrCreate_MFSV, "most-free-space:%d"}, ++ ++ {AuWbrCreate_MFSRR, "mfsrr:%d"}, ++ {AuWbrCreate_MFSRRV, "mfsrr:%d:%d"}, ++ {AuWbrCreate_PMFS, "pmfs"}, ++ {AuWbrCreate_PMFSV, "pmfs:%d"}, ++ {AuWbrCreate_PMFSRR, "pmfsrr:%d"}, ++ {AuWbrCreate_PMFSRRV, "pmfsrr:%d:%d"}, ++ ++ {-1, NULL} ++}; ++ ++/* ++ * cf. linux/lib/parser.c and cmdline.c ++ * gave up calling memparse() since it uses simple_strtoull() instead of ++ * kstrto...(). ++ */ ++static int noinline_for_stack ++au_match_ull(substring_t *s, unsigned long long *result) ++{ ++ int err; ++ unsigned int len; ++ char a[32]; ++ ++ err = -ERANGE; ++ len = s->to - s->from; ++ if (len + 1 <= sizeof(a)) { ++ memcpy(a, s->from, len); ++ a[len] = '\0'; ++ err = kstrtoull(a, 0, result); ++ } ++ return err; ++} ++ ++static int au_wbr_mfs_wmark(substring_t *arg, char *str, ++ struct au_opt_wbr_create *create) ++{ ++ int err; ++ unsigned long long ull; ++ ++ err = 0; ++ if (!au_match_ull(arg, &ull)) ++ create->mfsrr_watermark = ull; ++ else { ++ pr_err("bad integer in %s\n", str); ++ err = -EINVAL; ++ } ++ ++ return err; ++} ++ ++static int au_wbr_mfs_sec(substring_t *arg, char *str, ++ struct au_opt_wbr_create *create) ++{ ++ int n, err; ++ ++ err = 0; ++ if (!match_int(arg, &n) && 0 <= n && n <= AUFS_MFS_MAX_SEC) ++ create->mfs_second = n; ++ else { ++ pr_err("bad integer in %s\n", str); ++ err = -EINVAL; ++ } ++ ++ return err; ++} ++ ++static int noinline_for_stack ++au_wbr_create_val(char *str, struct au_opt_wbr_create *create) ++{ ++ int err, e; ++ substring_t args[MAX_OPT_ARGS]; ++ ++ err = match_token(str, au_wbr_create_policy, args); ++ create->wbr_create = err; ++ switch (err) { ++ case AuWbrCreate_MFSRRV: ++ case AuWbrCreate_PMFSRRV: ++ e = au_wbr_mfs_wmark(&args[0], str, create); ++ if (!e) ++ e = au_wbr_mfs_sec(&args[1], str, create); ++ if (unlikely(e)) ++ err = e; ++ break; ++ case AuWbrCreate_MFSRR: ++ case AuWbrCreate_PMFSRR: ++ e = au_wbr_mfs_wmark(&args[0], str, create); ++ if (unlikely(e)) { ++ err = e; ++ break; ++ } ++ /*FALLTHROUGH*/ ++ case AuWbrCreate_MFS: ++ case AuWbrCreate_PMFS: ++ create->mfs_second = AUFS_MFS_DEF_SEC; ++ break; ++ case AuWbrCreate_MFSV: ++ case AuWbrCreate_PMFSV: ++ e = au_wbr_mfs_sec(&args[0], str, create); ++ if (unlikely(e)) ++ err = e; ++ break; ++ } ++ ++ return err; ++} ++ ++const char *au_optstr_wbr_create(int wbr_create) ++{ ++ return au_parser_pattern(wbr_create, au_wbr_create_policy); ++} ++ ++static match_table_t au_wbr_copyup_policy = { ++ {AuWbrCopyup_TDP, "tdp"}, ++ {AuWbrCopyup_TDP, "top-down-parent"}, ++ {AuWbrCopyup_BUP, "bup"}, ++ {AuWbrCopyup_BUP, "bottom-up-parent"}, ++ {AuWbrCopyup_BU, "bu"}, ++ {AuWbrCopyup_BU, "bottom-up"}, ++ {-1, NULL} ++}; ++ ++static int noinline_for_stack au_wbr_copyup_val(char *str) ++{ ++ substring_t args[MAX_OPT_ARGS]; ++ ++ return match_token(str, au_wbr_copyup_policy, args); ++} ++ ++const char *au_optstr_wbr_copyup(int wbr_copyup) ++{ ++ return au_parser_pattern(wbr_copyup, au_wbr_copyup_policy); ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++static const int lkup_dirflags = LOOKUP_FOLLOW | LOOKUP_DIRECTORY; ++ ++static void dump_opts(struct au_opts *opts) ++{ ++#ifdef CONFIG_AUFS_DEBUG ++ /* reduce stack space */ ++ union { ++ struct au_opt_add *add; ++ struct au_opt_del *del; ++ struct au_opt_mod *mod; ++ struct au_opt_xino *xino; ++ struct au_opt_xino_itrunc *xino_itrunc; ++ struct au_opt_wbr_create *create; ++ } u; ++ struct au_opt *opt; ++ ++ opt = opts->opt; ++ while (opt->type != Opt_tail) { ++ switch (opt->type) { ++ case Opt_add: ++ u.add = &opt->add; ++ AuDbg("add {b%d, %s, 0x%x, %p}\n", ++ u.add->bindex, u.add->pathname, u.add->perm, ++ u.add->path.dentry); ++ break; ++ case Opt_del: ++ case Opt_idel: ++ u.del = &opt->del; ++ AuDbg("del {%s, %p}\n", ++ u.del->pathname, u.del->h_path.dentry); ++ break; ++ case Opt_mod: ++ case Opt_imod: ++ u.mod = &opt->mod; ++ AuDbg("mod {%s, 0x%x, %p}\n", ++ u.mod->path, u.mod->perm, u.mod->h_root); ++ break; ++ case Opt_append: ++ u.add = &opt->add; ++ AuDbg("append {b%d, %s, 0x%x, %p}\n", ++ u.add->bindex, u.add->pathname, u.add->perm, ++ u.add->path.dentry); ++ break; ++ case Opt_prepend: ++ u.add = &opt->add; ++ AuDbg("prepend {b%d, %s, 0x%x, %p}\n", ++ u.add->bindex, u.add->pathname, u.add->perm, ++ u.add->path.dentry); ++ break; ++ case Opt_dirwh: ++ AuDbg("dirwh %d\n", opt->dirwh); ++ break; ++ case Opt_rdcache: ++ AuDbg("rdcache %d\n", opt->rdcache); ++ break; ++ case Opt_rdblk: ++ AuDbg("rdblk %u\n", opt->rdblk); ++ break; ++ case Opt_rdblk_def: ++ AuDbg("rdblk_def\n"); ++ break; ++ case Opt_rdhash: ++ AuDbg("rdhash %u\n", opt->rdhash); ++ break; ++ case Opt_rdhash_def: ++ AuDbg("rdhash_def\n"); ++ break; ++ case Opt_xino: ++ u.xino = &opt->xino; ++ AuDbg("xino {%s %pD}\n", u.xino->path, u.xino->file); ++ break; ++ case Opt_trunc_xino: ++ AuLabel(trunc_xino); ++ break; ++ case Opt_notrunc_xino: ++ AuLabel(notrunc_xino); ++ break; ++ case Opt_trunc_xino_path: ++ case Opt_itrunc_xino: ++ u.xino_itrunc = &opt->xino_itrunc; ++ AuDbg("trunc_xino %d\n", u.xino_itrunc->bindex); ++ break; ++ case Opt_noxino: ++ AuLabel(noxino); ++ break; ++ case Opt_trunc_xib: ++ AuLabel(trunc_xib); ++ break; ++ case Opt_notrunc_xib: ++ AuLabel(notrunc_xib); ++ break; ++ case Opt_shwh: ++ AuLabel(shwh); ++ break; ++ case Opt_noshwh: ++ AuLabel(noshwh); ++ break; ++ case Opt_dirperm1: ++ AuLabel(dirperm1); ++ break; ++ case Opt_nodirperm1: ++ AuLabel(nodirperm1); ++ break; ++ case Opt_plink: ++ AuLabel(plink); ++ break; ++ case Opt_noplink: ++ AuLabel(noplink); ++ break; ++ case Opt_list_plink: ++ AuLabel(list_plink); ++ break; ++ case Opt_udba: ++ AuDbg("udba %d, %s\n", ++ opt->udba, au_optstr_udba(opt->udba)); ++ break; ++ case Opt_dio: ++ AuLabel(dio); ++ break; ++ case Opt_nodio: ++ AuLabel(nodio); ++ break; ++ case Opt_diropq_a: ++ AuLabel(diropq_a); ++ break; ++ case Opt_diropq_w: ++ AuLabel(diropq_w); ++ break; ++ case Opt_warn_perm: ++ AuLabel(warn_perm); ++ break; ++ case Opt_nowarn_perm: ++ AuLabel(nowarn_perm); ++ break; ++ case Opt_refrof: ++ AuLabel(refrof); ++ break; ++ case Opt_norefrof: ++ AuLabel(norefrof); ++ break; ++ case Opt_verbose: ++ AuLabel(verbose); ++ break; ++ case Opt_noverbose: ++ AuLabel(noverbose); ++ break; ++ case Opt_sum: ++ AuLabel(sum); ++ break; ++ case Opt_nosum: ++ AuLabel(nosum); ++ break; ++ case Opt_wsum: ++ AuLabel(wsum); ++ break; ++ case Opt_wbr_create: ++ u.create = &opt->wbr_create; ++ AuDbg("create %d, %s\n", u.create->wbr_create, ++ au_optstr_wbr_create(u.create->wbr_create)); ++ switch (u.create->wbr_create) { ++ case AuWbrCreate_MFSV: ++ case AuWbrCreate_PMFSV: ++ AuDbg("%d sec\n", u.create->mfs_second); ++ break; ++ case AuWbrCreate_MFSRR: ++ AuDbg("%llu watermark\n", ++ u.create->mfsrr_watermark); ++ break; ++ case AuWbrCreate_MFSRRV: ++ case AuWbrCreate_PMFSRRV: ++ AuDbg("%llu watermark, %d sec\n", ++ u.create->mfsrr_watermark, ++ u.create->mfs_second); ++ break; ++ } ++ break; ++ case Opt_wbr_copyup: ++ AuDbg("copyup %d, %s\n", opt->wbr_copyup, ++ au_optstr_wbr_copyup(opt->wbr_copyup)); ++ break; ++ case Opt_fhsm_sec: ++ AuDbg("fhsm_sec %u\n", opt->fhsm_second); ++ break; ++ case Opt_acl: ++ AuLabel(acl); ++ break; ++ case Opt_noacl: ++ AuLabel(noacl); ++ break; ++ default: ++ BUG(); ++ } ++ opt++; ++ } ++#endif ++} ++ ++void au_opts_free(struct au_opts *opts) ++{ ++ struct au_opt *opt; ++ ++ opt = opts->opt; ++ while (opt->type != Opt_tail) { ++ switch (opt->type) { ++ case Opt_add: ++ case Opt_append: ++ case Opt_prepend: ++ path_put(&opt->add.path); ++ break; ++ case Opt_del: ++ case Opt_idel: ++ path_put(&opt->del.h_path); ++ break; ++ case Opt_mod: ++ case Opt_imod: ++ dput(opt->mod.h_root); ++ break; ++ case Opt_xino: ++ fput(opt->xino.file); ++ break; ++ } ++ opt++; ++ } ++} ++ ++static int opt_add(struct au_opt *opt, char *opt_str, unsigned long sb_flags, ++ aufs_bindex_t bindex) ++{ ++ int err; ++ struct au_opt_add *add = &opt->add; ++ char *p; ++ ++ add->bindex = bindex; ++ add->perm = AuBrPerm_RO; ++ add->pathname = opt_str; ++ p = strchr(opt_str, '='); ++ if (p) { ++ *p++ = 0; ++ if (*p) ++ add->perm = br_perm_val(p); ++ } ++ ++ err = vfsub_kern_path(add->pathname, lkup_dirflags, &add->path); ++ if (!err) { ++ if (!p) { ++ add->perm = AuBrPerm_RO; ++ if (au_test_fs_rr(add->path.dentry->d_sb)) ++ add->perm = AuBrPerm_RR; ++ else if (!bindex && !(sb_flags & MS_RDONLY)) ++ add->perm = AuBrPerm_RW; ++ } ++ opt->type = Opt_add; ++ goto out; ++ } ++ pr_err("lookup failed %s (%d)\n", add->pathname, err); ++ err = -EINVAL; ++ ++out: ++ return err; ++} ++ ++static int au_opts_parse_del(struct au_opt_del *del, substring_t args[]) ++{ ++ int err; ++ ++ del->pathname = args[0].from; ++ AuDbg("del path %s\n", del->pathname); ++ ++ err = vfsub_kern_path(del->pathname, lkup_dirflags, &del->h_path); ++ if (unlikely(err)) ++ pr_err("lookup failed %s (%d)\n", del->pathname, err); ++ ++ return err; ++} ++ ++#if 0 /* reserved for future use */ ++static int au_opts_parse_idel(struct super_block *sb, aufs_bindex_t bindex, ++ struct au_opt_del *del, substring_t args[]) ++{ ++ int err; ++ struct dentry *root; ++ ++ err = -EINVAL; ++ root = sb->s_root; ++ aufs_read_lock(root, AuLock_FLUSH); ++ if (bindex < 0 || au_sbend(sb) < bindex) { ++ pr_err("out of bounds, %d\n", bindex); ++ goto out; ++ } ++ ++ err = 0; ++ del->h_path.dentry = dget(au_h_dptr(root, bindex)); ++ del->h_path.mnt = mntget(au_sbr_mnt(sb, bindex)); ++ ++out: ++ aufs_read_unlock(root, !AuLock_IR); ++ return err; ++} ++#endif ++ ++static int noinline_for_stack ++au_opts_parse_mod(struct au_opt_mod *mod, substring_t args[]) ++{ ++ int err; ++ struct path path; ++ char *p; ++ ++ err = -EINVAL; ++ mod->path = args[0].from; ++ p = strchr(mod->path, '='); ++ if (unlikely(!p)) { ++ pr_err("no permssion %s\n", args[0].from); ++ goto out; ++ } ++ ++ *p++ = 0; ++ err = vfsub_kern_path(mod->path, lkup_dirflags, &path); ++ if (unlikely(err)) { ++ pr_err("lookup failed %s (%d)\n", mod->path, err); ++ goto out; ++ } ++ ++ mod->perm = br_perm_val(p); ++ AuDbg("mod path %s, perm 0x%x, %s\n", mod->path, mod->perm, p); ++ mod->h_root = dget(path.dentry); ++ path_put(&path); ++ ++out: ++ return err; ++} ++ ++#if 0 /* reserved for future use */ ++static int au_opts_parse_imod(struct super_block *sb, aufs_bindex_t bindex, ++ struct au_opt_mod *mod, substring_t args[]) ++{ ++ int err; ++ struct dentry *root; ++ ++ err = -EINVAL; ++ root = sb->s_root; ++ aufs_read_lock(root, AuLock_FLUSH); ++ if (bindex < 0 || au_sbend(sb) < bindex) { ++ pr_err("out of bounds, %d\n", bindex); ++ goto out; ++ } ++ ++ err = 0; ++ mod->perm = br_perm_val(args[1].from); ++ AuDbg("mod path %s, perm 0x%x, %s\n", ++ mod->path, mod->perm, args[1].from); ++ mod->h_root = dget(au_h_dptr(root, bindex)); ++ ++out: ++ aufs_read_unlock(root, !AuLock_IR); ++ return err; ++} ++#endif ++ ++static int au_opts_parse_xino(struct super_block *sb, struct au_opt_xino *xino, ++ substring_t args[]) ++{ ++ int err; ++ struct file *file; ++ ++ file = au_xino_create(sb, args[0].from, /*silent*/0); ++ err = PTR_ERR(file); ++ if (IS_ERR(file)) ++ goto out; ++ ++ err = -EINVAL; ++ if (unlikely(file->f_dentry->d_sb == sb)) { ++ fput(file); ++ pr_err("%s must be outside\n", args[0].from); ++ goto out; ++ } ++ ++ err = 0; ++ xino->file = file; ++ xino->path = args[0].from; ++ ++out: ++ return err; ++} ++ ++static int noinline_for_stack ++au_opts_parse_xino_itrunc_path(struct super_block *sb, ++ struct au_opt_xino_itrunc *xino_itrunc, ++ substring_t args[]) ++{ ++ int err; ++ aufs_bindex_t bend, bindex; ++ struct path path; ++ struct dentry *root; ++ ++ err = vfsub_kern_path(args[0].from, lkup_dirflags, &path); ++ if (unlikely(err)) { ++ pr_err("lookup failed %s (%d)\n", args[0].from, err); ++ goto out; ++ } ++ ++ xino_itrunc->bindex = -1; ++ root = sb->s_root; ++ aufs_read_lock(root, AuLock_FLUSH); ++ bend = au_sbend(sb); ++ for (bindex = 0; bindex <= bend; bindex++) { ++ if (au_h_dptr(root, bindex) == path.dentry) { ++ xino_itrunc->bindex = bindex; ++ break; ++ } ++ } ++ aufs_read_unlock(root, !AuLock_IR); ++ path_put(&path); ++ ++ if (unlikely(xino_itrunc->bindex < 0)) { ++ pr_err("no such branch %s\n", args[0].from); ++ err = -EINVAL; ++ } ++ ++out: ++ return err; ++} ++ ++/* called without aufs lock */ ++int au_opts_parse(struct super_block *sb, char *str, struct au_opts *opts) ++{ ++ int err, n, token; ++ aufs_bindex_t bindex; ++ unsigned char skipped; ++ struct dentry *root; ++ struct au_opt *opt, *opt_tail; ++ char *opt_str; ++ /* reduce the stack space */ ++ union { ++ struct au_opt_xino_itrunc *xino_itrunc; ++ struct au_opt_wbr_create *create; ++ } u; ++ struct { ++ substring_t args[MAX_OPT_ARGS]; ++ } *a; ++ ++ err = -ENOMEM; ++ a = kmalloc(sizeof(*a), GFP_NOFS); ++ if (unlikely(!a)) ++ goto out; ++ ++ root = sb->s_root; ++ err = 0; ++ bindex = 0; ++ opt = opts->opt; ++ opt_tail = opt + opts->max_opt - 1; ++ opt->type = Opt_tail; ++ while (!err && (opt_str = strsep(&str, ",")) && *opt_str) { ++ err = -EINVAL; ++ skipped = 0; ++ token = match_token(opt_str, options, a->args); ++ switch (token) { ++ case Opt_br: ++ err = 0; ++ while (!err && (opt_str = strsep(&a->args[0].from, ":")) ++ && *opt_str) { ++ err = opt_add(opt, opt_str, opts->sb_flags, ++ bindex++); ++ if (unlikely(!err && ++opt > opt_tail)) { ++ err = -E2BIG; ++ break; ++ } ++ opt->type = Opt_tail; ++ skipped = 1; ++ } ++ break; ++ case Opt_add: ++ if (unlikely(match_int(&a->args[0], &n))) { ++ pr_err("bad integer in %s\n", opt_str); ++ break; ++ } ++ bindex = n; ++ err = opt_add(opt, a->args[1].from, opts->sb_flags, ++ bindex); ++ if (!err) ++ opt->type = token; ++ break; ++ case Opt_append: ++ err = opt_add(opt, a->args[0].from, opts->sb_flags, ++ /*dummy bindex*/1); ++ if (!err) ++ opt->type = token; ++ break; ++ case Opt_prepend: ++ err = opt_add(opt, a->args[0].from, opts->sb_flags, ++ /*bindex*/0); ++ if (!err) ++ opt->type = token; ++ break; ++ case Opt_del: ++ err = au_opts_parse_del(&opt->del, a->args); ++ if (!err) ++ opt->type = token; ++ break; ++#if 0 /* reserved for future use */ ++ case Opt_idel: ++ del->pathname = "(indexed)"; ++ if (unlikely(match_int(&args[0], &n))) { ++ pr_err("bad integer in %s\n", opt_str); ++ break; ++ } ++ err = au_opts_parse_idel(sb, n, &opt->del, a->args); ++ if (!err) ++ opt->type = token; ++ break; ++#endif ++ case Opt_mod: ++ err = au_opts_parse_mod(&opt->mod, a->args); ++ if (!err) ++ opt->type = token; ++ break; ++#ifdef IMOD /* reserved for future use */ ++ case Opt_imod: ++ u.mod->path = "(indexed)"; ++ if (unlikely(match_int(&a->args[0], &n))) { ++ pr_err("bad integer in %s\n", opt_str); ++ break; ++ } ++ err = au_opts_parse_imod(sb, n, &opt->mod, a->args); ++ if (!err) ++ opt->type = token; ++ break; ++#endif ++ case Opt_xino: ++ err = au_opts_parse_xino(sb, &opt->xino, a->args); ++ if (!err) ++ opt->type = token; ++ break; ++ ++ case Opt_trunc_xino_path: ++ err = au_opts_parse_xino_itrunc_path ++ (sb, &opt->xino_itrunc, a->args); ++ if (!err) ++ opt->type = token; ++ break; ++ ++ case Opt_itrunc_xino: ++ u.xino_itrunc = &opt->xino_itrunc; ++ if (unlikely(match_int(&a->args[0], &n))) { ++ pr_err("bad integer in %s\n", opt_str); ++ break; ++ } ++ u.xino_itrunc->bindex = n; ++ aufs_read_lock(root, AuLock_FLUSH); ++ if (n < 0 || au_sbend(sb) < n) { ++ pr_err("out of bounds, %d\n", n); ++ aufs_read_unlock(root, !AuLock_IR); ++ break; ++ } ++ aufs_read_unlock(root, !AuLock_IR); ++ err = 0; ++ opt->type = token; ++ break; ++ ++ case Opt_dirwh: ++ if (unlikely(match_int(&a->args[0], &opt->dirwh))) ++ break; ++ err = 0; ++ opt->type = token; ++ break; ++ ++ case Opt_rdcache: ++ if (unlikely(match_int(&a->args[0], &n))) { ++ pr_err("bad integer in %s\n", opt_str); ++ break; ++ } ++ if (unlikely(n > AUFS_RDCACHE_MAX)) { ++ pr_err("rdcache must be smaller than %d\n", ++ AUFS_RDCACHE_MAX); ++ break; ++ } ++ opt->rdcache = n; ++ err = 0; ++ opt->type = token; ++ break; ++ case Opt_rdblk: ++ if (unlikely(match_int(&a->args[0], &n) ++ || n < 0 ++ || n > KMALLOC_MAX_SIZE)) { ++ pr_err("bad integer in %s\n", opt_str); ++ break; ++ } ++ if (unlikely(n && n < NAME_MAX)) { ++ pr_err("rdblk must be larger than %d\n", ++ NAME_MAX); ++ break; ++ } ++ opt->rdblk = n; ++ err = 0; ++ opt->type = token; ++ break; ++ case Opt_rdhash: ++ if (unlikely(match_int(&a->args[0], &n) ++ || n < 0 ++ || n * sizeof(struct hlist_head) ++ > KMALLOC_MAX_SIZE)) { ++ pr_err("bad integer in %s\n", opt_str); ++ break; ++ } ++ opt->rdhash = n; ++ err = 0; ++ opt->type = token; ++ break; ++ ++ case Opt_trunc_xino: ++ case Opt_notrunc_xino: ++ case Opt_noxino: ++ case Opt_trunc_xib: ++ case Opt_notrunc_xib: ++ case Opt_shwh: ++ case Opt_noshwh: ++ case Opt_dirperm1: ++ case Opt_nodirperm1: ++ case Opt_plink: ++ case Opt_noplink: ++ case Opt_list_plink: ++ case Opt_dio: ++ case Opt_nodio: ++ case Opt_diropq_a: ++ case Opt_diropq_w: ++ case Opt_warn_perm: ++ case Opt_nowarn_perm: ++ case Opt_refrof: ++ case Opt_norefrof: ++ case Opt_verbose: ++ case Opt_noverbose: ++ case Opt_sum: ++ case Opt_nosum: ++ case Opt_wsum: ++ case Opt_rdblk_def: ++ case Opt_rdhash_def: ++ case Opt_acl: ++ case Opt_noacl: ++ err = 0; ++ opt->type = token; ++ break; ++ ++ case Opt_udba: ++ opt->udba = udba_val(a->args[0].from); ++ if (opt->udba >= 0) { ++ err = 0; ++ opt->type = token; ++ } else ++ pr_err("wrong value, %s\n", opt_str); ++ break; ++ ++ case Opt_wbr_create: ++ u.create = &opt->wbr_create; ++ u.create->wbr_create ++ = au_wbr_create_val(a->args[0].from, u.create); ++ if (u.create->wbr_create >= 0) { ++ err = 0; ++ opt->type = token; ++ } else ++ pr_err("wrong value, %s\n", opt_str); ++ break; ++ case Opt_wbr_copyup: ++ opt->wbr_copyup = au_wbr_copyup_val(a->args[0].from); ++ if (opt->wbr_copyup >= 0) { ++ err = 0; ++ opt->type = token; ++ } else ++ pr_err("wrong value, %s\n", opt_str); ++ break; ++ ++ case Opt_fhsm_sec: ++ if (unlikely(match_int(&a->args[0], &n) ++ || n < 0)) { ++ pr_err("bad integer in %s\n", opt_str); ++ break; ++ } ++ if (sysaufs_brs) { ++ opt->fhsm_second = n; ++ opt->type = token; ++ } else ++ pr_warn("ignored %s\n", opt_str); ++ err = 0; ++ break; ++ ++ case Opt_ignore: ++ pr_warn("ignored %s\n", opt_str); ++ /*FALLTHROUGH*/ ++ case Opt_ignore_silent: ++ skipped = 1; ++ err = 0; ++ break; ++ case Opt_err: ++ pr_err("unknown option %s\n", opt_str); ++ break; ++ } ++ ++ if (!err && !skipped) { ++ if (unlikely(++opt > opt_tail)) { ++ err = -E2BIG; ++ opt--; ++ opt->type = Opt_tail; ++ break; ++ } ++ opt->type = Opt_tail; ++ } ++ } ++ ++ kfree(a); ++ dump_opts(opts); ++ if (unlikely(err)) ++ au_opts_free(opts); ++ ++out: ++ return err; ++} ++ ++static int au_opt_wbr_create(struct super_block *sb, ++ struct au_opt_wbr_create *create) ++{ ++ int err; ++ struct au_sbinfo *sbinfo; ++ ++ SiMustWriteLock(sb); ++ ++ err = 1; /* handled */ ++ sbinfo = au_sbi(sb); ++ if (sbinfo->si_wbr_create_ops->fin) { ++ err = sbinfo->si_wbr_create_ops->fin(sb); ++ if (!err) ++ err = 1; ++ } ++ ++ sbinfo->si_wbr_create = create->wbr_create; ++ sbinfo->si_wbr_create_ops = au_wbr_create_ops + create->wbr_create; ++ switch (create->wbr_create) { ++ case AuWbrCreate_MFSRRV: ++ case AuWbrCreate_MFSRR: ++ case AuWbrCreate_PMFSRR: ++ case AuWbrCreate_PMFSRRV: ++ sbinfo->si_wbr_mfs.mfsrr_watermark = create->mfsrr_watermark; ++ /*FALLTHROUGH*/ ++ case AuWbrCreate_MFS: ++ case AuWbrCreate_MFSV: ++ case AuWbrCreate_PMFS: ++ case AuWbrCreate_PMFSV: ++ sbinfo->si_wbr_mfs.mfs_expire ++ = msecs_to_jiffies(create->mfs_second * MSEC_PER_SEC); ++ break; ++ } ++ ++ if (sbinfo->si_wbr_create_ops->init) ++ sbinfo->si_wbr_create_ops->init(sb); /* ignore */ ++ ++ return err; ++} ++ ++/* ++ * returns, ++ * plus: processed without an error ++ * zero: unprocessed ++ */ ++static int au_opt_simple(struct super_block *sb, struct au_opt *opt, ++ struct au_opts *opts) ++{ ++ int err; ++ struct au_sbinfo *sbinfo; ++ ++ SiMustWriteLock(sb); ++ ++ err = 1; /* handled */ ++ sbinfo = au_sbi(sb); ++ switch (opt->type) { ++ case Opt_udba: ++ sbinfo->si_mntflags &= ~AuOptMask_UDBA; ++ sbinfo->si_mntflags |= opt->udba; ++ opts->given_udba |= opt->udba; ++ break; ++ ++ case Opt_plink: ++ au_opt_set(sbinfo->si_mntflags, PLINK); ++ break; ++ case Opt_noplink: ++ if (au_opt_test(sbinfo->si_mntflags, PLINK)) ++ au_plink_put(sb, /*verbose*/1); ++ au_opt_clr(sbinfo->si_mntflags, PLINK); ++ break; ++ case Opt_list_plink: ++ if (au_opt_test(sbinfo->si_mntflags, PLINK)) ++ au_plink_list(sb); ++ break; ++ ++ case Opt_dio: ++ au_opt_set(sbinfo->si_mntflags, DIO); ++ au_fset_opts(opts->flags, REFRESH_DYAOP); ++ break; ++ case Opt_nodio: ++ au_opt_clr(sbinfo->si_mntflags, DIO); ++ au_fset_opts(opts->flags, REFRESH_DYAOP); ++ break; ++ ++ case Opt_fhsm_sec: ++ au_fhsm_set(sbinfo, opt->fhsm_second); ++ break; ++ ++ case Opt_diropq_a: ++ au_opt_set(sbinfo->si_mntflags, ALWAYS_DIROPQ); ++ break; ++ case Opt_diropq_w: ++ au_opt_clr(sbinfo->si_mntflags, ALWAYS_DIROPQ); ++ break; ++ ++ case Opt_warn_perm: ++ au_opt_set(sbinfo->si_mntflags, WARN_PERM); ++ break; ++ case Opt_nowarn_perm: ++ au_opt_clr(sbinfo->si_mntflags, WARN_PERM); ++ break; ++ ++ case Opt_refrof: ++ au_opt_set(sbinfo->si_mntflags, REFROF); ++ break; ++ case Opt_norefrof: ++ au_opt_clr(sbinfo->si_mntflags, REFROF); ++ break; ++ ++ case Opt_verbose: ++ au_opt_set(sbinfo->si_mntflags, VERBOSE); ++ break; ++ case Opt_noverbose: ++ au_opt_clr(sbinfo->si_mntflags, VERBOSE); ++ break; ++ ++ case Opt_sum: ++ au_opt_set(sbinfo->si_mntflags, SUM); ++ break; ++ case Opt_wsum: ++ au_opt_clr(sbinfo->si_mntflags, SUM); ++ au_opt_set(sbinfo->si_mntflags, SUM_W); ++ case Opt_nosum: ++ au_opt_clr(sbinfo->si_mntflags, SUM); ++ au_opt_clr(sbinfo->si_mntflags, SUM_W); ++ break; ++ ++ case Opt_wbr_create: ++ err = au_opt_wbr_create(sb, &opt->wbr_create); ++ break; ++ case Opt_wbr_copyup: ++ sbinfo->si_wbr_copyup = opt->wbr_copyup; ++ sbinfo->si_wbr_copyup_ops = au_wbr_copyup_ops + opt->wbr_copyup; ++ break; ++ ++ case Opt_dirwh: ++ sbinfo->si_dirwh = opt->dirwh; ++ break; ++ ++ case Opt_rdcache: ++ sbinfo->si_rdcache ++ = msecs_to_jiffies(opt->rdcache * MSEC_PER_SEC); ++ break; ++ case Opt_rdblk: ++ sbinfo->si_rdblk = opt->rdblk; ++ break; ++ case Opt_rdblk_def: ++ sbinfo->si_rdblk = AUFS_RDBLK_DEF; ++ break; ++ case Opt_rdhash: ++ sbinfo->si_rdhash = opt->rdhash; ++ break; ++ case Opt_rdhash_def: ++ sbinfo->si_rdhash = AUFS_RDHASH_DEF; ++ break; ++ ++ case Opt_shwh: ++ au_opt_set(sbinfo->si_mntflags, SHWH); ++ break; ++ case Opt_noshwh: ++ au_opt_clr(sbinfo->si_mntflags, SHWH); ++ break; ++ ++ case Opt_dirperm1: ++ au_opt_set(sbinfo->si_mntflags, DIRPERM1); ++ break; ++ case Opt_nodirperm1: ++ au_opt_clr(sbinfo->si_mntflags, DIRPERM1); ++ break; ++ ++ case Opt_trunc_xino: ++ au_opt_set(sbinfo->si_mntflags, TRUNC_XINO); ++ break; ++ case Opt_notrunc_xino: ++ au_opt_clr(sbinfo->si_mntflags, TRUNC_XINO); ++ break; ++ ++ case Opt_trunc_xino_path: ++ case Opt_itrunc_xino: ++ err = au_xino_trunc(sb, opt->xino_itrunc.bindex); ++ if (!err) ++ err = 1; ++ break; ++ ++ case Opt_trunc_xib: ++ au_fset_opts(opts->flags, TRUNC_XIB); ++ break; ++ case Opt_notrunc_xib: ++ au_fclr_opts(opts->flags, TRUNC_XIB); ++ break; ++ ++ case Opt_acl: ++ sb->s_flags |= MS_POSIXACL; ++ break; ++ case Opt_noacl: ++ sb->s_flags &= ~MS_POSIXACL; ++ break; ++ ++ default: ++ err = 0; ++ break; ++ } ++ ++ return err; ++} ++ ++/* ++ * returns tri-state. ++ * plus: processed without an error ++ * zero: unprocessed ++ * minus: error ++ */ ++static int au_opt_br(struct super_block *sb, struct au_opt *opt, ++ struct au_opts *opts) ++{ ++ int err, do_refresh; ++ ++ err = 0; ++ switch (opt->type) { ++ case Opt_append: ++ opt->add.bindex = au_sbend(sb) + 1; ++ if (opt->add.bindex < 0) ++ opt->add.bindex = 0; ++ goto add; ++ case Opt_prepend: ++ opt->add.bindex = 0; ++ add: /* indented label */ ++ case Opt_add: ++ err = au_br_add(sb, &opt->add, ++ au_ftest_opts(opts->flags, REMOUNT)); ++ if (!err) { ++ err = 1; ++ au_fset_opts(opts->flags, REFRESH); ++ } ++ break; ++ ++ case Opt_del: ++ case Opt_idel: ++ err = au_br_del(sb, &opt->del, ++ au_ftest_opts(opts->flags, REMOUNT)); ++ if (!err) { ++ err = 1; ++ au_fset_opts(opts->flags, TRUNC_XIB); ++ au_fset_opts(opts->flags, REFRESH); ++ } ++ break; ++ ++ case Opt_mod: ++ case Opt_imod: ++ err = au_br_mod(sb, &opt->mod, ++ au_ftest_opts(opts->flags, REMOUNT), ++ &do_refresh); ++ if (!err) { ++ err = 1; ++ if (do_refresh) ++ au_fset_opts(opts->flags, REFRESH); ++ } ++ break; ++ } ++ ++ return err; ++} ++ ++static int au_opt_xino(struct super_block *sb, struct au_opt *opt, ++ struct au_opt_xino **opt_xino, ++ struct au_opts *opts) ++{ ++ int err; ++ aufs_bindex_t bend, bindex; ++ struct dentry *root, *parent, *h_root; ++ ++ err = 0; ++ switch (opt->type) { ++ case Opt_xino: ++ err = au_xino_set(sb, &opt->xino, ++ !!au_ftest_opts(opts->flags, REMOUNT)); ++ if (unlikely(err)) ++ break; ++ ++ *opt_xino = &opt->xino; ++ au_xino_brid_set(sb, -1); ++ ++ /* safe d_parent access */ ++ parent = opt->xino.file->f_dentry->d_parent; ++ root = sb->s_root; ++ bend = au_sbend(sb); ++ for (bindex = 0; bindex <= bend; bindex++) { ++ h_root = au_h_dptr(root, bindex); ++ if (h_root == parent) { ++ au_xino_brid_set(sb, au_sbr_id(sb, bindex)); ++ break; ++ } ++ } ++ break; ++ ++ case Opt_noxino: ++ au_xino_clr(sb); ++ au_xino_brid_set(sb, -1); ++ *opt_xino = (void *)-1; ++ break; ++ } ++ ++ return err; ++} ++ ++int au_opts_verify(struct super_block *sb, unsigned long sb_flags, ++ unsigned int pending) ++{ ++ int err, fhsm; ++ aufs_bindex_t bindex, bend; ++ unsigned char do_plink, skip, do_free, can_no_dreval; ++ struct au_branch *br; ++ struct au_wbr *wbr; ++ struct dentry *root, *dentry; ++ struct inode *dir, *h_dir; ++ struct au_sbinfo *sbinfo; ++ struct au_hinode *hdir; ++ ++ SiMustAnyLock(sb); ++ ++ sbinfo = au_sbi(sb); ++ AuDebugOn(!(sbinfo->si_mntflags & AuOptMask_UDBA)); ++ ++ if (!(sb_flags & MS_RDONLY)) { ++ if (unlikely(!au_br_writable(au_sbr_perm(sb, 0)))) ++ pr_warn("first branch should be rw\n"); ++ if (unlikely(au_opt_test(sbinfo->si_mntflags, SHWH))) ++ pr_warn_once("shwh should be used with ro\n"); ++ } ++ ++ if (au_opt_test((sbinfo->si_mntflags | pending), UDBA_HNOTIFY) ++ && !au_opt_test(sbinfo->si_mntflags, XINO)) ++ pr_warn_once("udba=*notify requires xino\n"); ++ ++ if (au_opt_test(sbinfo->si_mntflags, DIRPERM1)) ++ pr_warn_once("dirperm1 breaks the protection" ++ " by the permission bits on the lower branch\n"); ++ ++ err = 0; ++ fhsm = 0; ++ root = sb->s_root; ++ dir = root->d_inode; ++ do_plink = !!au_opt_test(sbinfo->si_mntflags, PLINK); ++ can_no_dreval = !!au_opt_test((sbinfo->si_mntflags | pending), ++ UDBA_NONE); ++ bend = au_sbend(sb); ++ for (bindex = 0; !err && bindex <= bend; bindex++) { ++ skip = 0; ++ h_dir = au_h_iptr(dir, bindex); ++ br = au_sbr(sb, bindex); ++ ++ if ((br->br_perm & AuBrAttr_ICEX) ++ && !h_dir->i_op->listxattr) ++ br->br_perm &= ~AuBrAttr_ICEX; ++#if 0 ++ if ((br->br_perm & AuBrAttr_ICEX_SEC) ++ && (au_br_sb(br)->s_flags & MS_NOSEC)) ++ br->br_perm &= ~AuBrAttr_ICEX_SEC; ++#endif ++ ++ do_free = 0; ++ wbr = br->br_wbr; ++ if (wbr) ++ wbr_wh_read_lock(wbr); ++ ++ if (!au_br_writable(br->br_perm)) { ++ do_free = !!wbr; ++ skip = (!wbr ++ || (!wbr->wbr_whbase ++ && !wbr->wbr_plink ++ && !wbr->wbr_orph)); ++ } else if (!au_br_wh_linkable(br->br_perm)) { ++ /* skip = (!br->br_whbase && !br->br_orph); */ ++ skip = (!wbr || !wbr->wbr_whbase); ++ if (skip && wbr) { ++ if (do_plink) ++ skip = !!wbr->wbr_plink; ++ else ++ skip = !wbr->wbr_plink; ++ } ++ } else { ++ /* skip = (br->br_whbase && br->br_ohph); */ ++ skip = (wbr && wbr->wbr_whbase); ++ if (skip) { ++ if (do_plink) ++ skip = !!wbr->wbr_plink; ++ else ++ skip = !wbr->wbr_plink; ++ } ++ } ++ if (wbr) ++ wbr_wh_read_unlock(wbr); ++ ++ if (can_no_dreval) { ++ dentry = br->br_path.dentry; ++ spin_lock(&dentry->d_lock); ++ if (dentry->d_flags & ++ (DCACHE_OP_REVALIDATE | DCACHE_OP_WEAK_REVALIDATE)) ++ can_no_dreval = 0; ++ spin_unlock(&dentry->d_lock); ++ } ++ ++ if (au_br_fhsm(br->br_perm)) { ++ fhsm++; ++ AuDebugOn(!br->br_fhsm); ++ } ++ ++ if (skip) ++ continue; ++ ++ hdir = au_hi(dir, bindex); ++ au_hn_imtx_lock_nested(hdir, AuLsc_I_PARENT); ++ if (wbr) ++ wbr_wh_write_lock(wbr); ++ err = au_wh_init(br, sb); ++ if (wbr) ++ wbr_wh_write_unlock(wbr); ++ au_hn_imtx_unlock(hdir); ++ ++ if (!err && do_free) { ++ kfree(wbr); ++ br->br_wbr = NULL; ++ } ++ } ++ ++ if (can_no_dreval) ++ au_fset_si(sbinfo, NO_DREVAL); ++ else ++ au_fclr_si(sbinfo, NO_DREVAL); ++ ++ if (fhsm >= 2) { ++ au_fset_si(sbinfo, FHSM); ++ for (bindex = bend; bindex >= 0; bindex--) { ++ br = au_sbr(sb, bindex); ++ if (au_br_fhsm(br->br_perm)) { ++ au_fhsm_set_bottom(sb, bindex); ++ break; ++ } ++ } ++ } else { ++ au_fclr_si(sbinfo, FHSM); ++ au_fhsm_set_bottom(sb, -1); ++ } ++ ++ return err; ++} ++ ++int au_opts_mount(struct super_block *sb, struct au_opts *opts) ++{ ++ int err; ++ unsigned int tmp; ++ aufs_bindex_t bindex, bend; ++ struct au_opt *opt; ++ struct au_opt_xino *opt_xino, xino; ++ struct au_sbinfo *sbinfo; ++ struct au_branch *br; ++ struct inode *dir; ++ ++ SiMustWriteLock(sb); ++ ++ err = 0; ++ opt_xino = NULL; ++ opt = opts->opt; ++ while (err >= 0 && opt->type != Opt_tail) ++ err = au_opt_simple(sb, opt++, opts); ++ if (err > 0) ++ err = 0; ++ else if (unlikely(err < 0)) ++ goto out; ++ ++ /* disable xino and udba temporary */ ++ sbinfo = au_sbi(sb); ++ tmp = sbinfo->si_mntflags; ++ au_opt_clr(sbinfo->si_mntflags, XINO); ++ au_opt_set_udba(sbinfo->si_mntflags, UDBA_REVAL); ++ ++ opt = opts->opt; ++ while (err >= 0 && opt->type != Opt_tail) ++ err = au_opt_br(sb, opt++, opts); ++ if (err > 0) ++ err = 0; ++ else if (unlikely(err < 0)) ++ goto out; ++ ++ bend = au_sbend(sb); ++ if (unlikely(bend < 0)) { ++ err = -EINVAL; ++ pr_err("no branches\n"); ++ goto out; ++ } ++ ++ if (au_opt_test(tmp, XINO)) ++ au_opt_set(sbinfo->si_mntflags, XINO); ++ opt = opts->opt; ++ while (!err && opt->type != Opt_tail) ++ err = au_opt_xino(sb, opt++, &opt_xino, opts); ++ if (unlikely(err)) ++ goto out; ++ ++ err = au_opts_verify(sb, sb->s_flags, tmp); ++ if (unlikely(err)) ++ goto out; ++ ++ /* restore xino */ ++ if (au_opt_test(tmp, XINO) && !opt_xino) { ++ xino.file = au_xino_def(sb); ++ err = PTR_ERR(xino.file); ++ if (IS_ERR(xino.file)) ++ goto out; ++ ++ err = au_xino_set(sb, &xino, /*remount*/0); ++ fput(xino.file); ++ if (unlikely(err)) ++ goto out; ++ } ++ ++ /* restore udba */ ++ tmp &= AuOptMask_UDBA; ++ sbinfo->si_mntflags &= ~AuOptMask_UDBA; ++ sbinfo->si_mntflags |= tmp; ++ bend = au_sbend(sb); ++ for (bindex = 0; bindex <= bend; bindex++) { ++ br = au_sbr(sb, bindex); ++ err = au_hnotify_reset_br(tmp, br, br->br_perm); ++ if (unlikely(err)) ++ AuIOErr("hnotify failed on br %d, %d, ignored\n", ++ bindex, err); ++ /* go on even if err */ ++ } ++ if (au_opt_test(tmp, UDBA_HNOTIFY)) { ++ dir = sb->s_root->d_inode; ++ au_hn_reset(dir, au_hi_flags(dir, /*isdir*/1) & ~AuHi_XINO); ++ } ++ ++out: ++ return err; ++} ++ ++int au_opts_remount(struct super_block *sb, struct au_opts *opts) ++{ ++ int err, rerr; ++ unsigned char no_dreval; ++ struct inode *dir; ++ struct au_opt_xino *opt_xino; ++ struct au_opt *opt; ++ struct au_sbinfo *sbinfo; ++ ++ SiMustWriteLock(sb); ++ ++ err = 0; ++ dir = sb->s_root->d_inode; ++ sbinfo = au_sbi(sb); ++ opt_xino = NULL; ++ opt = opts->opt; ++ while (err >= 0 && opt->type != Opt_tail) { ++ err = au_opt_simple(sb, opt, opts); ++ if (!err) ++ err = au_opt_br(sb, opt, opts); ++ if (!err) ++ err = au_opt_xino(sb, opt, &opt_xino, opts); ++ opt++; ++ } ++ if (err > 0) ++ err = 0; ++ AuTraceErr(err); ++ /* go on even err */ ++ ++ no_dreval = !!au_ftest_si(sbinfo, NO_DREVAL); ++ rerr = au_opts_verify(sb, opts->sb_flags, /*pending*/0); ++ if (unlikely(rerr && !err)) ++ err = rerr; ++ ++ if (no_dreval != !!au_ftest_si(sbinfo, NO_DREVAL)) ++ au_fset_opts(opts->flags, REFRESH_IDOP); ++ ++ if (au_ftest_opts(opts->flags, TRUNC_XIB)) { ++ rerr = au_xib_trunc(sb); ++ if (unlikely(rerr && !err)) ++ err = rerr; ++ } ++ ++ /* will be handled by the caller */ ++ if (!au_ftest_opts(opts->flags, REFRESH) ++ && (opts->given_udba ++ || au_opt_test(sbinfo->si_mntflags, XINO) ++ || au_ftest_opts(opts->flags, REFRESH_IDOP) ++ )) ++ au_fset_opts(opts->flags, REFRESH); ++ ++ AuDbg("status 0x%x\n", opts->flags); ++ return err; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++unsigned int au_opt_udba(struct super_block *sb) ++{ ++ return au_mntflags(sb) & AuOptMask_UDBA; ++} +diff --git a/fs/aufs/opts.h b/fs/aufs/opts.h +new file mode 100644 +index 0000000..50949a0 +--- /dev/null ++++ b/fs/aufs/opts.h +@@ -0,0 +1,212 @@ ++/* ++ * Copyright (C) 2005-2016 Junjiro R. Okajima ++ * ++ * This program, aufs is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . ++ */ ++ ++/* ++ * mount options/flags ++ */ ++ ++#ifndef __AUFS_OPTS_H__ ++#define __AUFS_OPTS_H__ ++ ++#ifdef __KERNEL__ ++ ++#include ++ ++struct file; ++struct super_block; ++ ++/* ---------------------------------------------------------------------- */ ++ ++/* mount flags */ ++#define AuOpt_XINO 1 /* external inode number bitmap ++ and translation table */ ++#define AuOpt_TRUNC_XINO (1 << 1) /* truncate xino files */ ++#define AuOpt_UDBA_NONE (1 << 2) /* users direct branch access */ ++#define AuOpt_UDBA_REVAL (1 << 3) ++#define AuOpt_UDBA_HNOTIFY (1 << 4) ++#define AuOpt_SHWH (1 << 5) /* show whiteout */ ++#define AuOpt_PLINK (1 << 6) /* pseudo-link */ ++#define AuOpt_DIRPERM1 (1 << 7) /* ignore the lower dir's perm ++ bits */ ++#define AuOpt_REFROF (1 << 8) /* unimplemented */ ++#define AuOpt_ALWAYS_DIROPQ (1 << 9) /* policy to creating diropq */ ++#define AuOpt_SUM (1 << 10) /* summation for statfs(2) */ ++#define AuOpt_SUM_W (1 << 11) /* unimplemented */ ++#define AuOpt_WARN_PERM (1 << 12) /* warn when add-branch */ ++#define AuOpt_VERBOSE (1 << 13) /* busy inode when del-branch */ ++#define AuOpt_DIO (1 << 14) /* direct io */ ++ ++#ifndef CONFIG_AUFS_HNOTIFY ++#undef AuOpt_UDBA_HNOTIFY ++#define AuOpt_UDBA_HNOTIFY 0 ++#endif ++#ifndef CONFIG_AUFS_SHWH ++#undef AuOpt_SHWH ++#define AuOpt_SHWH 0 ++#endif ++ ++#define AuOpt_Def (AuOpt_XINO \ ++ | AuOpt_UDBA_REVAL \ ++ | AuOpt_PLINK \ ++ /* | AuOpt_DIRPERM1 */ \ ++ | AuOpt_WARN_PERM) ++#define AuOptMask_UDBA (AuOpt_UDBA_NONE \ ++ | AuOpt_UDBA_REVAL \ ++ | AuOpt_UDBA_HNOTIFY) ++ ++#define au_opt_test(flags, name) (flags & AuOpt_##name) ++#define au_opt_set(flags, name) do { \ ++ BUILD_BUG_ON(AuOpt_##name & AuOptMask_UDBA); \ ++ ((flags) |= AuOpt_##name); \ ++} while (0) ++#define au_opt_set_udba(flags, name) do { \ ++ (flags) &= ~AuOptMask_UDBA; \ ++ ((flags) |= AuOpt_##name); \ ++} while (0) ++#define au_opt_clr(flags, name) do { \ ++ ((flags) &= ~AuOpt_##name); \ ++} while (0) ++ ++static inline unsigned int au_opts_plink(unsigned int mntflags) ++{ ++#ifdef CONFIG_PROC_FS ++ return mntflags; ++#else ++ return mntflags & ~AuOpt_PLINK; ++#endif ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++/* policies to select one among multiple writable branches */ ++enum { ++ AuWbrCreate_TDP, /* top down parent */ ++ AuWbrCreate_RR, /* round robin */ ++ AuWbrCreate_MFS, /* most free space */ ++ AuWbrCreate_MFSV, /* mfs with seconds */ ++ AuWbrCreate_MFSRR, /* mfs then rr */ ++ AuWbrCreate_MFSRRV, /* mfs then rr with seconds */ ++ AuWbrCreate_PMFS, /* parent and mfs */ ++ AuWbrCreate_PMFSV, /* parent and mfs with seconds */ ++ AuWbrCreate_PMFSRR, /* parent, mfs and round-robin */ ++ AuWbrCreate_PMFSRRV, /* plus seconds */ ++ ++ AuWbrCreate_Def = AuWbrCreate_TDP ++}; ++ ++enum { ++ AuWbrCopyup_TDP, /* top down parent */ ++ AuWbrCopyup_BUP, /* bottom up parent */ ++ AuWbrCopyup_BU, /* bottom up */ ++ ++ AuWbrCopyup_Def = AuWbrCopyup_TDP ++}; ++ ++/* ---------------------------------------------------------------------- */ ++ ++struct au_opt_add { ++ aufs_bindex_t bindex; ++ char *pathname; ++ int perm; ++ struct path path; ++}; ++ ++struct au_opt_del { ++ char *pathname; ++ struct path h_path; ++}; ++ ++struct au_opt_mod { ++ char *path; ++ int perm; ++ struct dentry *h_root; ++}; ++ ++struct au_opt_xino { ++ char *path; ++ struct file *file; ++}; ++ ++struct au_opt_xino_itrunc { ++ aufs_bindex_t bindex; ++}; ++ ++struct au_opt_wbr_create { ++ int wbr_create; ++ int mfs_second; ++ unsigned long long mfsrr_watermark; ++}; ++ ++struct au_opt { ++ int type; ++ union { ++ struct au_opt_xino xino; ++ struct au_opt_xino_itrunc xino_itrunc; ++ struct au_opt_add add; ++ struct au_opt_del del; ++ struct au_opt_mod mod; ++ int dirwh; ++ int rdcache; ++ unsigned int rdblk; ++ unsigned int rdhash; ++ int udba; ++ struct au_opt_wbr_create wbr_create; ++ int wbr_copyup; ++ unsigned int fhsm_second; ++ }; ++}; ++ ++/* opts flags */ ++#define AuOpts_REMOUNT 1 ++#define AuOpts_REFRESH (1 << 1) ++#define AuOpts_TRUNC_XIB (1 << 2) ++#define AuOpts_REFRESH_DYAOP (1 << 3) ++#define AuOpts_REFRESH_IDOP (1 << 4) ++#define au_ftest_opts(flags, name) ((flags) & AuOpts_##name) ++#define au_fset_opts(flags, name) \ ++ do { (flags) |= AuOpts_##name; } while (0) ++#define au_fclr_opts(flags, name) \ ++ do { (flags) &= ~AuOpts_##name; } while (0) ++ ++struct au_opts { ++ struct au_opt *opt; ++ int max_opt; ++ ++ unsigned int given_udba; ++ unsigned int flags; ++ unsigned long sb_flags; ++}; ++ ++/* ---------------------------------------------------------------------- */ ++ ++/* opts.c */ ++void au_optstr_br_perm(au_br_perm_str_t *str, int perm); ++const char *au_optstr_udba(int udba); ++const char *au_optstr_wbr_copyup(int wbr_copyup); ++const char *au_optstr_wbr_create(int wbr_create); ++ ++void au_opts_free(struct au_opts *opts); ++int au_opts_parse(struct super_block *sb, char *str, struct au_opts *opts); ++int au_opts_verify(struct super_block *sb, unsigned long sb_flags, ++ unsigned int pending); ++int au_opts_mount(struct super_block *sb, struct au_opts *opts); ++int au_opts_remount(struct super_block *sb, struct au_opts *opts); ++ ++unsigned int au_opt_udba(struct super_block *sb); ++ ++#endif /* __KERNEL__ */ ++#endif /* __AUFS_OPTS_H__ */ +diff --git a/fs/aufs/plink.c b/fs/aufs/plink.c +new file mode 100644 +index 0000000..4f372ec +--- /dev/null ++++ b/fs/aufs/plink.c +@@ -0,0 +1,506 @@ ++/* ++ * Copyright (C) 2005-2016 Junjiro R. Okajima ++ * ++ * This program, aufs is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . ++ */ ++ ++/* ++ * pseudo-link ++ */ ++ ++#include "aufs.h" ++ ++/* ++ * the pseudo-link maintenance mode. ++ * during a user process maintains the pseudo-links, ++ * prohibit adding a new plink and branch manipulation. ++ * ++ * Flags ++ * NOPLM: ++ * For entry functions which will handle plink, and i_mutex is already held ++ * in VFS. ++ * They cannot wait and should return an error at once. ++ * Callers has to check the error. ++ * NOPLMW: ++ * For entry functions which will handle plink, but i_mutex is not held ++ * in VFS. ++ * They can wait the plink maintenance mode to finish. ++ * ++ * They behave like F_SETLK and F_SETLKW. ++ * If the caller never handle plink, then both flags are unnecessary. ++ */ ++ ++int au_plink_maint(struct super_block *sb, int flags) ++{ ++ int err; ++ pid_t pid, ppid; ++ struct au_sbinfo *sbi; ++ ++ SiMustAnyLock(sb); ++ ++ err = 0; ++ if (!au_opt_test(au_mntflags(sb), PLINK)) ++ goto out; ++ ++ sbi = au_sbi(sb); ++ pid = sbi->si_plink_maint_pid; ++ if (!pid || pid == current->pid) ++ goto out; ++ ++ /* todo: it highly depends upon /sbin/mount.aufs */ ++ rcu_read_lock(); ++ ppid = task_pid_vnr(rcu_dereference(current->real_parent)); ++ rcu_read_unlock(); ++ if (pid == ppid) ++ goto out; ++ ++ if (au_ftest_lock(flags, NOPLMW)) { ++ /* if there is no i_mutex lock in VFS, we don't need to wait */ ++ /* AuDebugOn(!lockdep_depth(current)); */ ++ while (sbi->si_plink_maint_pid) { ++ si_read_unlock(sb); ++ /* gave up wake_up_bit() */ ++ wait_event(sbi->si_plink_wq, !sbi->si_plink_maint_pid); ++ ++ if (au_ftest_lock(flags, FLUSH)) ++ au_nwt_flush(&sbi->si_nowait); ++ si_noflush_read_lock(sb); ++ } ++ } else if (au_ftest_lock(flags, NOPLM)) { ++ AuDbg("ppid %d, pid %d\n", ppid, pid); ++ err = -EAGAIN; ++ } ++ ++out: ++ return err; ++} ++ ++void au_plink_maint_leave(struct au_sbinfo *sbinfo) ++{ ++ spin_lock(&sbinfo->si_plink_maint_lock); ++ sbinfo->si_plink_maint_pid = 0; ++ spin_unlock(&sbinfo->si_plink_maint_lock); ++ wake_up_all(&sbinfo->si_plink_wq); ++} ++ ++int au_plink_maint_enter(struct super_block *sb) ++{ ++ int err; ++ struct au_sbinfo *sbinfo; ++ ++ err = 0; ++ sbinfo = au_sbi(sb); ++ /* make sure i am the only one in this fs */ ++ si_write_lock(sb, AuLock_FLUSH); ++ if (au_opt_test(au_mntflags(sb), PLINK)) { ++ spin_lock(&sbinfo->si_plink_maint_lock); ++ if (!sbinfo->si_plink_maint_pid) ++ sbinfo->si_plink_maint_pid = current->pid; ++ else ++ err = -EBUSY; ++ spin_unlock(&sbinfo->si_plink_maint_lock); ++ } ++ si_write_unlock(sb); ++ ++ return err; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++#ifdef CONFIG_AUFS_DEBUG ++void au_plink_list(struct super_block *sb) ++{ ++ int i; ++ struct au_sbinfo *sbinfo; ++ struct hlist_head *plink_hlist; ++ struct au_icntnr *icntnr; ++ ++ SiMustAnyLock(sb); ++ ++ sbinfo = au_sbi(sb); ++ AuDebugOn(!au_opt_test(au_mntflags(sb), PLINK)); ++ AuDebugOn(au_plink_maint(sb, AuLock_NOPLM)); ++ ++ for (i = 0; i < AuPlink_NHASH; i++) { ++ plink_hlist = &sbinfo->si_plink[i].head; ++ rcu_read_lock(); ++ hlist_for_each_entry_rcu(icntnr, plink_hlist, plink) ++ AuDbg("%lu\n", icntnr->vfs_inode.i_ino); ++ rcu_read_unlock(); ++ } ++} ++#endif ++ ++/* is the inode pseudo-linked? */ ++int au_plink_test(struct inode *inode) ++{ ++ int found, i; ++ struct au_sbinfo *sbinfo; ++ struct hlist_head *plink_hlist; ++ struct au_icntnr *icntnr; ++ ++ sbinfo = au_sbi(inode->i_sb); ++ AuRwMustAnyLock(&sbinfo->si_rwsem); ++ AuDebugOn(!au_opt_test(au_mntflags(inode->i_sb), PLINK)); ++ AuDebugOn(au_plink_maint(inode->i_sb, AuLock_NOPLM)); ++ ++ found = 0; ++ i = au_plink_hash(inode->i_ino); ++ plink_hlist = &sbinfo->si_plink[i].head; ++ rcu_read_lock(); ++ hlist_for_each_entry_rcu(icntnr, plink_hlist, plink) ++ if (&icntnr->vfs_inode == inode) { ++ found = 1; ++ break; ++ } ++ rcu_read_unlock(); ++ return found; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++/* ++ * generate a name for plink. ++ * the file will be stored under AUFS_WH_PLINKDIR. ++ */ ++/* 20 is max digits length of ulong 64 */ ++#define PLINK_NAME_LEN ((20 + 1) * 2) ++ ++static int plink_name(char *name, int len, struct inode *inode, ++ aufs_bindex_t bindex) ++{ ++ int rlen; ++ struct inode *h_inode; ++ ++ h_inode = au_h_iptr(inode, bindex); ++ rlen = snprintf(name, len, "%lu.%lu", inode->i_ino, h_inode->i_ino); ++ return rlen; ++} ++ ++struct au_do_plink_lkup_args { ++ struct dentry **errp; ++ struct qstr *tgtname; ++ struct dentry *h_parent; ++ struct au_branch *br; ++}; ++ ++static struct dentry *au_do_plink_lkup(struct qstr *tgtname, ++ struct dentry *h_parent, ++ struct au_branch *br) ++{ ++ struct dentry *h_dentry; ++ struct mutex *h_mtx; ++ ++ h_mtx = &h_parent->d_inode->i_mutex; ++ mutex_lock_nested(h_mtx, AuLsc_I_CHILD2); ++ h_dentry = vfsub_lkup_one(tgtname, h_parent); ++ mutex_unlock(h_mtx); ++ return h_dentry; ++} ++ ++static void au_call_do_plink_lkup(void *args) ++{ ++ struct au_do_plink_lkup_args *a = args; ++ *a->errp = au_do_plink_lkup(a->tgtname, a->h_parent, a->br); ++} ++ ++/* lookup the plink-ed @inode under the branch at @bindex */ ++struct dentry *au_plink_lkup(struct inode *inode, aufs_bindex_t bindex) ++{ ++ struct dentry *h_dentry, *h_parent; ++ struct au_branch *br; ++ struct inode *h_dir; ++ int wkq_err; ++ char a[PLINK_NAME_LEN]; ++ struct qstr tgtname = QSTR_INIT(a, 0); ++ ++ AuDebugOn(au_plink_maint(inode->i_sb, AuLock_NOPLM)); ++ ++ br = au_sbr(inode->i_sb, bindex); ++ h_parent = br->br_wbr->wbr_plink; ++ h_dir = h_parent->d_inode; ++ tgtname.len = plink_name(a, sizeof(a), inode, bindex); ++ ++ if (!uid_eq(current_fsuid(), GLOBAL_ROOT_UID)) { ++ struct au_do_plink_lkup_args args = { ++ .errp = &h_dentry, ++ .tgtname = &tgtname, ++ .h_parent = h_parent, ++ .br = br ++ }; ++ ++ wkq_err = au_wkq_wait(au_call_do_plink_lkup, &args); ++ if (unlikely(wkq_err)) ++ h_dentry = ERR_PTR(wkq_err); ++ } else ++ h_dentry = au_do_plink_lkup(&tgtname, h_parent, br); ++ ++ return h_dentry; ++} ++ ++/* create a pseudo-link */ ++static int do_whplink(struct qstr *tgt, struct dentry *h_parent, ++ struct dentry *h_dentry, struct au_branch *br) ++{ ++ int err; ++ struct path h_path = { ++ .mnt = au_br_mnt(br) ++ }; ++ struct inode *h_dir, *delegated; ++ ++ h_dir = h_parent->d_inode; ++ mutex_lock_nested(&h_dir->i_mutex, AuLsc_I_CHILD2); ++again: ++ h_path.dentry = vfsub_lkup_one(tgt, h_parent); ++ err = PTR_ERR(h_path.dentry); ++ if (IS_ERR(h_path.dentry)) ++ goto out; ++ ++ err = 0; ++ /* wh.plink dir is not monitored */ ++ /* todo: is it really safe? */ ++ if (h_path.dentry->d_inode ++ && h_path.dentry->d_inode != h_dentry->d_inode) { ++ delegated = NULL; ++ err = vfsub_unlink(h_dir, &h_path, &delegated, /*force*/0); ++ if (unlikely(err == -EWOULDBLOCK)) { ++ pr_warn("cannot retry for NFSv4 delegation" ++ " for an internal unlink\n"); ++ iput(delegated); ++ } ++ dput(h_path.dentry); ++ h_path.dentry = NULL; ++ if (!err) ++ goto again; ++ } ++ if (!err && !h_path.dentry->d_inode) { ++ delegated = NULL; ++ err = vfsub_link(h_dentry, h_dir, &h_path, &delegated); ++ if (unlikely(err == -EWOULDBLOCK)) { ++ pr_warn("cannot retry for NFSv4 delegation" ++ " for an internal link\n"); ++ iput(delegated); ++ } ++ } ++ dput(h_path.dentry); ++ ++out: ++ mutex_unlock(&h_dir->i_mutex); ++ return err; ++} ++ ++struct do_whplink_args { ++ int *errp; ++ struct qstr *tgt; ++ struct dentry *h_parent; ++ struct dentry *h_dentry; ++ struct au_branch *br; ++}; ++ ++static void call_do_whplink(void *args) ++{ ++ struct do_whplink_args *a = args; ++ *a->errp = do_whplink(a->tgt, a->h_parent, a->h_dentry, a->br); ++} ++ ++static int whplink(struct dentry *h_dentry, struct inode *inode, ++ aufs_bindex_t bindex, struct au_branch *br) ++{ ++ int err, wkq_err; ++ struct au_wbr *wbr; ++ struct dentry *h_parent; ++ struct inode *h_dir; ++ char a[PLINK_NAME_LEN]; ++ struct qstr tgtname = QSTR_INIT(a, 0); ++ ++ wbr = au_sbr(inode->i_sb, bindex)->br_wbr; ++ h_parent = wbr->wbr_plink; ++ h_dir = h_parent->d_inode; ++ tgtname.len = plink_name(a, sizeof(a), inode, bindex); ++ ++ /* always superio. */ ++ if (!uid_eq(current_fsuid(), GLOBAL_ROOT_UID)) { ++ struct do_whplink_args args = { ++ .errp = &err, ++ .tgt = &tgtname, ++ .h_parent = h_parent, ++ .h_dentry = h_dentry, ++ .br = br ++ }; ++ wkq_err = au_wkq_wait(call_do_whplink, &args); ++ if (unlikely(wkq_err)) ++ err = wkq_err; ++ } else ++ err = do_whplink(&tgtname, h_parent, h_dentry, br); ++ ++ return err; ++} ++ ++/* ++ * create a new pseudo-link for @h_dentry on @bindex. ++ * the linked inode is held in aufs @inode. ++ */ ++void au_plink_append(struct inode *inode, aufs_bindex_t bindex, ++ struct dentry *h_dentry) ++{ ++ struct super_block *sb; ++ struct au_sbinfo *sbinfo; ++ struct hlist_head *plink_hlist; ++ struct au_icntnr *icntnr; ++ struct au_sphlhead *sphl; ++ int found, err, cnt, i; ++ ++ sb = inode->i_sb; ++ sbinfo = au_sbi(sb); ++ AuDebugOn(!au_opt_test(au_mntflags(sb), PLINK)); ++ AuDebugOn(au_plink_maint(sb, AuLock_NOPLM)); ++ ++ found = au_plink_test(inode); ++ if (found) ++ return; ++ ++ i = au_plink_hash(inode->i_ino); ++ sphl = sbinfo->si_plink + i; ++ plink_hlist = &sphl->head; ++ au_igrab(inode); ++ ++ spin_lock(&sphl->spin); ++ hlist_for_each_entry(icntnr, plink_hlist, plink) { ++ if (&icntnr->vfs_inode == inode) { ++ found = 1; ++ break; ++ } ++ } ++ if (!found) { ++ icntnr = container_of(inode, struct au_icntnr, vfs_inode); ++ hlist_add_head_rcu(&icntnr->plink, plink_hlist); ++ } ++ spin_unlock(&sphl->spin); ++ if (!found) { ++ cnt = au_sphl_count(sphl); ++#define msg "unexpectedly unblanced or too many pseudo-links" ++ if (cnt > AUFS_PLINK_WARN) ++ AuWarn1(msg ", %d\n", cnt); ++#undef msg ++ err = whplink(h_dentry, inode, bindex, au_sbr(sb, bindex)); ++ if (unlikely(err)) { ++ pr_warn("err %d, damaged pseudo link.\n", err); ++ au_sphl_del_rcu(&icntnr->plink, sphl); ++ iput(&icntnr->vfs_inode); ++ } ++ } else ++ iput(&icntnr->vfs_inode); ++} ++ ++/* free all plinks */ ++void au_plink_put(struct super_block *sb, int verbose) ++{ ++ int i, warned; ++ struct au_sbinfo *sbinfo; ++ struct hlist_head *plink_hlist; ++ struct hlist_node *tmp; ++ struct au_icntnr *icntnr; ++ ++ SiMustWriteLock(sb); ++ ++ sbinfo = au_sbi(sb); ++ AuDebugOn(!au_opt_test(au_mntflags(sb), PLINK)); ++ AuDebugOn(au_plink_maint(sb, AuLock_NOPLM)); ++ ++ /* no spin_lock since sbinfo is write-locked */ ++ warned = 0; ++ for (i = 0; i < AuPlink_NHASH; i++) { ++ plink_hlist = &sbinfo->si_plink[i].head; ++ if (!warned && verbose && !hlist_empty(plink_hlist)) { ++ pr_warn("pseudo-link is not flushed"); ++ warned = 1; ++ } ++ hlist_for_each_entry_safe(icntnr, tmp, plink_hlist, plink) ++ iput(&icntnr->vfs_inode); ++ INIT_HLIST_HEAD(plink_hlist); ++ } ++} ++ ++void au_plink_clean(struct super_block *sb, int verbose) ++{ ++ struct dentry *root; ++ ++ root = sb->s_root; ++ aufs_write_lock(root); ++ if (au_opt_test(au_mntflags(sb), PLINK)) ++ au_plink_put(sb, verbose); ++ aufs_write_unlock(root); ++} ++ ++static int au_plink_do_half_refresh(struct inode *inode, aufs_bindex_t br_id) ++{ ++ int do_put; ++ aufs_bindex_t bstart, bend, bindex; ++ ++ do_put = 0; ++ bstart = au_ibstart(inode); ++ bend = au_ibend(inode); ++ if (bstart >= 0) { ++ for (bindex = bstart; bindex <= bend; bindex++) { ++ if (!au_h_iptr(inode, bindex) ++ || au_ii_br_id(inode, bindex) != br_id) ++ continue; ++ au_set_h_iptr(inode, bindex, NULL, 0); ++ do_put = 1; ++ break; ++ } ++ if (do_put) ++ for (bindex = bstart; bindex <= bend; bindex++) ++ if (au_h_iptr(inode, bindex)) { ++ do_put = 0; ++ break; ++ } ++ } else ++ do_put = 1; ++ ++ return do_put; ++} ++ ++/* free the plinks on a branch specified by @br_id */ ++void au_plink_half_refresh(struct super_block *sb, aufs_bindex_t br_id) ++{ ++ struct au_sbinfo *sbinfo; ++ struct hlist_head *plink_hlist; ++ struct hlist_node *tmp; ++ struct au_icntnr *icntnr; ++ struct inode *inode; ++ int i, do_put; ++ ++ SiMustWriteLock(sb); ++ ++ sbinfo = au_sbi(sb); ++ AuDebugOn(!au_opt_test(au_mntflags(sb), PLINK)); ++ AuDebugOn(au_plink_maint(sb, AuLock_NOPLM)); ++ ++ /* no spin_lock since sbinfo is write-locked */ ++ for (i = 0; i < AuPlink_NHASH; i++) { ++ plink_hlist = &sbinfo->si_plink[i].head; ++ hlist_for_each_entry_safe(icntnr, tmp, plink_hlist, plink) { ++ inode = au_igrab(&icntnr->vfs_inode); ++ ii_write_lock_child(inode); ++ do_put = au_plink_do_half_refresh(inode, br_id); ++ if (do_put) { ++ hlist_del(&icntnr->plink); ++ iput(inode); ++ } ++ ii_write_unlock(inode); ++ iput(inode); ++ } ++ } ++} +diff --git a/fs/aufs/poll.c b/fs/aufs/poll.c +new file mode 100644 +index 0000000..eea19e7 +--- /dev/null ++++ b/fs/aufs/poll.c +@@ -0,0 +1,52 @@ ++/* ++ * Copyright (C) 2005-2016 Junjiro R. Okajima ++ * ++ * This program, aufs is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . ++ */ ++ ++/* ++ * poll operation ++ * There is only one filesystem which implements ->poll operation, currently. ++ */ ++ ++#include "aufs.h" ++ ++unsigned int aufs_poll(struct file *file, poll_table *wait) ++{ ++ unsigned int mask; ++ int err; ++ struct file *h_file; ++ struct super_block *sb; ++ ++ /* We should pretend an error happened. */ ++ mask = POLLERR /* | POLLIN | POLLOUT */; ++ sb = file->f_dentry->d_sb; ++ si_read_lock(sb, AuLock_FLUSH | AuLock_NOPLMW); ++ ++ h_file = au_read_pre(file, /*keep_fi*/0); ++ err = PTR_ERR(h_file); ++ if (IS_ERR(h_file)) ++ goto out; ++ ++ /* it is not an error if h_file has no operation */ ++ mask = DEFAULT_POLLMASK; ++ if (h_file->f_op->poll) ++ mask = h_file->f_op->poll(h_file, wait); ++ fput(h_file); /* instead of au_read_post() */ ++ ++out: ++ si_read_unlock(sb); ++ AuTraceErr((int)mask); ++ return mask; ++} +diff --git a/fs/aufs/posix_acl.c b/fs/aufs/posix_acl.c +new file mode 100644 +index 0000000..89b4127 +--- /dev/null ++++ b/fs/aufs/posix_acl.c +@@ -0,0 +1,98 @@ ++/* ++ * Copyright (C) 2014-2016 Junjiro R. Okajima ++ * ++ * This program, aufs is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . ++ */ ++ ++/* ++ * posix acl operations ++ */ ++ ++#include ++#include "aufs.h" ++ ++struct posix_acl *aufs_get_acl(struct inode *inode, int type) ++{ ++ struct posix_acl *acl; ++ int err; ++ aufs_bindex_t bindex; ++ struct inode *h_inode; ++ struct super_block *sb; ++ ++ acl = NULL; ++ sb = inode->i_sb; ++ si_read_lock(sb, AuLock_FLUSH); ++ ii_read_lock_child(inode); ++ if (!(sb->s_flags & MS_POSIXACL)) ++ goto out; ++ ++ bindex = au_ibstart(inode); ++ h_inode = au_h_iptr(inode, bindex); ++ if (unlikely(!h_inode ++ || ((h_inode->i_mode & S_IFMT) ++ != (inode->i_mode & S_IFMT)))) { ++ err = au_busy_or_stale(); ++ acl = ERR_PTR(err); ++ goto out; ++ } ++ ++ /* always topmost only */ ++ acl = get_acl(h_inode, type); ++ ++out: ++ ii_read_unlock(inode); ++ si_read_unlock(sb); ++ ++ AuTraceErrPtr(acl); ++ return acl; ++} ++ ++int aufs_set_acl(struct inode *inode, struct posix_acl *acl, int type) ++{ ++ int err; ++ ssize_t ssz; ++ struct dentry *dentry; ++ struct au_srxattr arg = { ++ .type = AU_ACL_SET, ++ .u.acl_set = { ++ .acl = acl, ++ .type = type ++ }, ++ }; ++ ++ mutex_lock(&inode->i_mutex); ++ if (inode->i_ino == AUFS_ROOT_INO) ++ dentry = dget(inode->i_sb->s_root); ++ else { ++ dentry = d_find_alias(inode); ++ if (!dentry) ++ dentry = d_find_any_alias(inode); ++ if (!dentry) { ++ pr_warn("cannot handle this inode, " ++ "please report to aufs-users ML\n"); ++ err = -ENOENT; ++ goto out; ++ } ++ } ++ ++ ssz = au_srxattr(dentry, &arg); ++ dput(dentry); ++ err = ssz; ++ if (ssz >= 0) ++ err = 0; ++ ++out: ++ mutex_unlock(&inode->i_mutex); ++ return err; ++} +diff --git a/fs/aufs/procfs.c b/fs/aufs/procfs.c +new file mode 100644 +index 0000000..a334330 +--- /dev/null ++++ b/fs/aufs/procfs.c +@@ -0,0 +1,169 @@ ++/* ++ * Copyright (C) 2010-2016 Junjiro R. Okajima ++ * ++ * This program, aufs is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . ++ */ ++ ++/* ++ * procfs interfaces ++ */ ++ ++#include ++#include "aufs.h" ++ ++static int au_procfs_plm_release(struct inode *inode, struct file *file) ++{ ++ struct au_sbinfo *sbinfo; ++ ++ sbinfo = file->private_data; ++ if (sbinfo) { ++ au_plink_maint_leave(sbinfo); ++ kobject_put(&sbinfo->si_kobj); ++ } ++ ++ return 0; ++} ++ ++static void au_procfs_plm_write_clean(struct file *file) ++{ ++ struct au_sbinfo *sbinfo; ++ ++ sbinfo = file->private_data; ++ if (sbinfo) ++ au_plink_clean(sbinfo->si_sb, /*verbose*/0); ++} ++ ++static int au_procfs_plm_write_si(struct file *file, unsigned long id) ++{ ++ int err; ++ struct super_block *sb; ++ struct au_sbinfo *sbinfo; ++ ++ err = -EBUSY; ++ if (unlikely(file->private_data)) ++ goto out; ++ ++ sb = NULL; ++ /* don't use au_sbilist_lock() here */ ++ spin_lock(&au_sbilist.spin); ++ hlist_for_each_entry(sbinfo, &au_sbilist.head, si_list) ++ if (id == sysaufs_si_id(sbinfo)) { ++ kobject_get(&sbinfo->si_kobj); ++ sb = sbinfo->si_sb; ++ break; ++ } ++ spin_unlock(&au_sbilist.spin); ++ ++ err = -EINVAL; ++ if (unlikely(!sb)) ++ goto out; ++ ++ err = au_plink_maint_enter(sb); ++ if (!err) ++ /* keep kobject_get() */ ++ file->private_data = sbinfo; ++ else ++ kobject_put(&sbinfo->si_kobj); ++out: ++ return err; ++} ++ ++/* ++ * Accept a valid "si=xxxx" only. ++ * Once it is accepted successfully, accept "clean" too. ++ */ ++static ssize_t au_procfs_plm_write(struct file *file, const char __user *ubuf, ++ size_t count, loff_t *ppos) ++{ ++ ssize_t err; ++ unsigned long id; ++ /* last newline is allowed */ ++ char buf[3 + sizeof(unsigned long) * 2 + 1]; ++ ++ err = -EACCES; ++ if (unlikely(!capable(CAP_SYS_ADMIN))) ++ goto out; ++ ++ err = -EINVAL; ++ if (unlikely(count > sizeof(buf))) ++ goto out; ++ ++ err = copy_from_user(buf, ubuf, count); ++ if (unlikely(err)) { ++ err = -EFAULT; ++ goto out; ++ } ++ buf[count] = 0; ++ ++ err = -EINVAL; ++ if (!strcmp("clean", buf)) { ++ au_procfs_plm_write_clean(file); ++ goto out_success; ++ } else if (unlikely(strncmp("si=", buf, 3))) ++ goto out; ++ ++ err = kstrtoul(buf + 3, 16, &id); ++ if (unlikely(err)) ++ goto out; ++ ++ err = au_procfs_plm_write_si(file, id); ++ if (unlikely(err)) ++ goto out; ++ ++out_success: ++ err = count; /* success */ ++out: ++ return err; ++} ++ ++static const struct file_operations au_procfs_plm_fop = { ++ .write = au_procfs_plm_write, ++ .release = au_procfs_plm_release, ++ .owner = THIS_MODULE ++}; ++ ++/* ---------------------------------------------------------------------- */ ++ ++static struct proc_dir_entry *au_procfs_dir; ++ ++void au_procfs_fin(void) ++{ ++ remove_proc_entry(AUFS_PLINK_MAINT_NAME, au_procfs_dir); ++ remove_proc_entry(AUFS_PLINK_MAINT_DIR, NULL); ++} ++ ++int __init au_procfs_init(void) ++{ ++ int err; ++ struct proc_dir_entry *entry; ++ ++ err = -ENOMEM; ++ au_procfs_dir = proc_mkdir(AUFS_PLINK_MAINT_DIR, NULL); ++ if (unlikely(!au_procfs_dir)) ++ goto out; ++ ++ entry = proc_create(AUFS_PLINK_MAINT_NAME, S_IFREG | S_IWUSR, ++ au_procfs_dir, &au_procfs_plm_fop); ++ if (unlikely(!entry)) ++ goto out_dir; ++ ++ err = 0; ++ goto out; /* success */ ++ ++ ++out_dir: ++ remove_proc_entry(AUFS_PLINK_MAINT_DIR, NULL); ++out: ++ return err; ++} +diff --git a/fs/aufs/rdu.c b/fs/aufs/rdu.c +new file mode 100644 +index 0000000..d22b2f8 +--- /dev/null ++++ b/fs/aufs/rdu.c +@@ -0,0 +1,388 @@ ++/* ++ * Copyright (C) 2005-2016 Junjiro R. Okajima ++ * ++ * This program, aufs is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . ++ */ ++ ++/* ++ * readdir in userspace. ++ */ ++ ++#include ++#include ++#include ++#include "aufs.h" ++ ++/* bits for struct aufs_rdu.flags */ ++#define AuRdu_CALLED 1 ++#define AuRdu_CONT (1 << 1) ++#define AuRdu_FULL (1 << 2) ++#define au_ftest_rdu(flags, name) ((flags) & AuRdu_##name) ++#define au_fset_rdu(flags, name) \ ++ do { (flags) |= AuRdu_##name; } while (0) ++#define au_fclr_rdu(flags, name) \ ++ do { (flags) &= ~AuRdu_##name; } while (0) ++ ++struct au_rdu_arg { ++ struct dir_context ctx; ++ struct aufs_rdu *rdu; ++ union au_rdu_ent_ul ent; ++ unsigned long end; ++ ++ struct super_block *sb; ++ int err; ++}; ++ ++static int au_rdu_fill(struct dir_context *ctx, const char *name, int nlen, ++ loff_t offset, u64 h_ino, unsigned int d_type) ++{ ++ int err, len; ++ struct au_rdu_arg *arg = container_of(ctx, struct au_rdu_arg, ctx); ++ struct aufs_rdu *rdu = arg->rdu; ++ struct au_rdu_ent ent; ++ ++ err = 0; ++ arg->err = 0; ++ au_fset_rdu(rdu->cookie.flags, CALLED); ++ len = au_rdu_len(nlen); ++ if (arg->ent.ul + len < arg->end) { ++ ent.ino = h_ino; ++ ent.bindex = rdu->cookie.bindex; ++ ent.type = d_type; ++ ent.nlen = nlen; ++ if (unlikely(nlen > AUFS_MAX_NAMELEN)) ++ ent.type = DT_UNKNOWN; ++ ++ /* unnecessary to support mmap_sem since this is a dir */ ++ err = -EFAULT; ++ if (copy_to_user(arg->ent.e, &ent, sizeof(ent))) ++ goto out; ++ if (copy_to_user(arg->ent.e->name, name, nlen)) ++ goto out; ++ /* the terminating NULL */ ++ if (__put_user(0, arg->ent.e->name + nlen)) ++ goto out; ++ err = 0; ++ /* AuDbg("%p, %.*s\n", arg->ent.p, nlen, name); */ ++ arg->ent.ul += len; ++ rdu->rent++; ++ } else { ++ err = -EFAULT; ++ au_fset_rdu(rdu->cookie.flags, FULL); ++ rdu->full = 1; ++ rdu->tail = arg->ent; ++ } ++ ++out: ++ /* AuTraceErr(err); */ ++ return err; ++} ++ ++static int au_rdu_do(struct file *h_file, struct au_rdu_arg *arg) ++{ ++ int err; ++ loff_t offset; ++ struct au_rdu_cookie *cookie = &arg->rdu->cookie; ++ ++ /* we don't have to care (FMODE_32BITHASH | FMODE_64BITHASH) for ext4 */ ++ offset = vfsub_llseek(h_file, cookie->h_pos, SEEK_SET); ++ err = offset; ++ if (unlikely(offset != cookie->h_pos)) ++ goto out; ++ ++ err = 0; ++ do { ++ arg->err = 0; ++ au_fclr_rdu(cookie->flags, CALLED); ++ /* smp_mb(); */ ++ err = vfsub_iterate_dir(h_file, &arg->ctx); ++ if (err >= 0) ++ err = arg->err; ++ } while (!err ++ && au_ftest_rdu(cookie->flags, CALLED) ++ && !au_ftest_rdu(cookie->flags, FULL)); ++ cookie->h_pos = h_file->f_pos; ++ ++out: ++ AuTraceErr(err); ++ return err; ++} ++ ++static int au_rdu(struct file *file, struct aufs_rdu *rdu) ++{ ++ int err; ++ aufs_bindex_t bend; ++ struct au_rdu_arg arg = { ++ .ctx = { ++ .actor = au_diractor(au_rdu_fill) ++ } ++ }; ++ struct dentry *dentry; ++ struct inode *inode; ++ struct file *h_file; ++ struct au_rdu_cookie *cookie = &rdu->cookie; ++ ++ err = !access_ok(VERIFY_WRITE, rdu->ent.e, rdu->sz); ++ if (unlikely(err)) { ++ err = -EFAULT; ++ AuTraceErr(err); ++ goto out; ++ } ++ rdu->rent = 0; ++ rdu->tail = rdu->ent; ++ rdu->full = 0; ++ arg.rdu = rdu; ++ arg.ent = rdu->ent; ++ arg.end = arg.ent.ul; ++ arg.end += rdu->sz; ++ ++ err = -ENOTDIR; ++ if (unlikely(!file->f_op->iterate)) ++ goto out; ++ ++ err = security_file_permission(file, MAY_READ); ++ AuTraceErr(err); ++ if (unlikely(err)) ++ goto out; ++ ++ dentry = file->f_dentry; ++ inode = dentry->d_inode; ++#if 1 ++ mutex_lock(&inode->i_mutex); ++#else ++ err = mutex_lock_killable(&inode->i_mutex); ++ AuTraceErr(err); ++ if (unlikely(err)) ++ goto out; ++#endif ++ ++ arg.sb = inode->i_sb; ++ err = si_read_lock(arg.sb, AuLock_FLUSH | AuLock_NOPLM); ++ if (unlikely(err)) ++ goto out_mtx; ++ err = au_alive_dir(dentry); ++ if (unlikely(err)) ++ goto out_si; ++ /* todo: reval? */ ++ fi_read_lock(file); ++ ++ err = -EAGAIN; ++ if (unlikely(au_ftest_rdu(cookie->flags, CONT) ++ && cookie->generation != au_figen(file))) ++ goto out_unlock; ++ ++ err = 0; ++ if (!rdu->blk) { ++ rdu->blk = au_sbi(arg.sb)->si_rdblk; ++ if (!rdu->blk) ++ rdu->blk = au_dir_size(file, /*dentry*/NULL); ++ } ++ bend = au_fbstart(file); ++ if (cookie->bindex < bend) ++ cookie->bindex = bend; ++ bend = au_fbend_dir(file); ++ /* AuDbg("b%d, b%d\n", cookie->bindex, bend); */ ++ for (; !err && cookie->bindex <= bend; ++ cookie->bindex++, cookie->h_pos = 0) { ++ h_file = au_hf_dir(file, cookie->bindex); ++ if (!h_file) ++ continue; ++ ++ au_fclr_rdu(cookie->flags, FULL); ++ err = au_rdu_do(h_file, &arg); ++ AuTraceErr(err); ++ if (unlikely(au_ftest_rdu(cookie->flags, FULL) || err)) ++ break; ++ } ++ AuDbg("rent %llu\n", rdu->rent); ++ ++ if (!err && !au_ftest_rdu(cookie->flags, CONT)) { ++ rdu->shwh = !!au_opt_test(au_sbi(arg.sb)->si_mntflags, SHWH); ++ au_fset_rdu(cookie->flags, CONT); ++ cookie->generation = au_figen(file); ++ } ++ ++ ii_read_lock_child(inode); ++ fsstack_copy_attr_atime(inode, au_h_iptr(inode, au_ibstart(inode))); ++ ii_read_unlock(inode); ++ ++out_unlock: ++ fi_read_unlock(file); ++out_si: ++ si_read_unlock(arg.sb); ++out_mtx: ++ mutex_unlock(&inode->i_mutex); ++out: ++ AuTraceErr(err); ++ return err; ++} ++ ++static int au_rdu_ino(struct file *file, struct aufs_rdu *rdu) ++{ ++ int err; ++ ino_t ino; ++ unsigned long long nent; ++ union au_rdu_ent_ul *u; ++ struct au_rdu_ent ent; ++ struct super_block *sb; ++ ++ err = 0; ++ nent = rdu->nent; ++ u = &rdu->ent; ++ sb = file->f_dentry->d_sb; ++ si_read_lock(sb, AuLock_FLUSH); ++ while (nent-- > 0) { ++ /* unnecessary to support mmap_sem since this is a dir */ ++ err = copy_from_user(&ent, u->e, sizeof(ent)); ++ if (!err) ++ err = !access_ok(VERIFY_WRITE, &u->e->ino, sizeof(ino)); ++ if (unlikely(err)) { ++ err = -EFAULT; ++ AuTraceErr(err); ++ break; ++ } ++ ++ /* AuDbg("b%d, i%llu\n", ent.bindex, ent.ino); */ ++ if (!ent.wh) ++ err = au_ino(sb, ent.bindex, ent.ino, ent.type, &ino); ++ else ++ err = au_wh_ino(sb, ent.bindex, ent.ino, ent.type, ++ &ino); ++ if (unlikely(err)) { ++ AuTraceErr(err); ++ break; ++ } ++ ++ err = __put_user(ino, &u->e->ino); ++ if (unlikely(err)) { ++ err = -EFAULT; ++ AuTraceErr(err); ++ break; ++ } ++ u->ul += au_rdu_len(ent.nlen); ++ } ++ si_read_unlock(sb); ++ ++ return err; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++static int au_rdu_verify(struct aufs_rdu *rdu) ++{ ++ AuDbg("rdu{%llu, %p, %u | %u | %llu, %u, %u | " ++ "%llu, b%d, 0x%x, g%u}\n", ++ rdu->sz, rdu->ent.e, rdu->verify[AufsCtlRduV_SZ], ++ rdu->blk, ++ rdu->rent, rdu->shwh, rdu->full, ++ rdu->cookie.h_pos, rdu->cookie.bindex, rdu->cookie.flags, ++ rdu->cookie.generation); ++ ++ if (rdu->verify[AufsCtlRduV_SZ] == sizeof(*rdu)) ++ return 0; ++ ++ AuDbg("%u:%u\n", ++ rdu->verify[AufsCtlRduV_SZ], (unsigned int)sizeof(*rdu)); ++ return -EINVAL; ++} ++ ++long au_rdu_ioctl(struct file *file, unsigned int cmd, unsigned long arg) ++{ ++ long err, e; ++ struct aufs_rdu rdu; ++ void __user *p = (void __user *)arg; ++ ++ err = copy_from_user(&rdu, p, sizeof(rdu)); ++ if (unlikely(err)) { ++ err = -EFAULT; ++ AuTraceErr(err); ++ goto out; ++ } ++ err = au_rdu_verify(&rdu); ++ if (unlikely(err)) ++ goto out; ++ ++ switch (cmd) { ++ case AUFS_CTL_RDU: ++ err = au_rdu(file, &rdu); ++ if (unlikely(err)) ++ break; ++ ++ e = copy_to_user(p, &rdu, sizeof(rdu)); ++ if (unlikely(e)) { ++ err = -EFAULT; ++ AuTraceErr(err); ++ } ++ break; ++ case AUFS_CTL_RDU_INO: ++ err = au_rdu_ino(file, &rdu); ++ break; ++ ++ default: ++ /* err = -ENOTTY; */ ++ err = -EINVAL; ++ } ++ ++out: ++ AuTraceErr(err); ++ return err; ++} ++ ++#ifdef CONFIG_COMPAT ++long au_rdu_compat_ioctl(struct file *file, unsigned int cmd, unsigned long arg) ++{ ++ long err, e; ++ struct aufs_rdu rdu; ++ void __user *p = compat_ptr(arg); ++ ++ /* todo: get_user()? */ ++ err = copy_from_user(&rdu, p, sizeof(rdu)); ++ if (unlikely(err)) { ++ err = -EFAULT; ++ AuTraceErr(err); ++ goto out; ++ } ++ rdu.ent.e = compat_ptr(rdu.ent.ul); ++ err = au_rdu_verify(&rdu); ++ if (unlikely(err)) ++ goto out; ++ ++ switch (cmd) { ++ case AUFS_CTL_RDU: ++ err = au_rdu(file, &rdu); ++ if (unlikely(err)) ++ break; ++ ++ rdu.ent.ul = ptr_to_compat(rdu.ent.e); ++ rdu.tail.ul = ptr_to_compat(rdu.tail.e); ++ e = copy_to_user(p, &rdu, sizeof(rdu)); ++ if (unlikely(e)) { ++ err = -EFAULT; ++ AuTraceErr(err); ++ } ++ break; ++ case AUFS_CTL_RDU_INO: ++ err = au_rdu_ino(file, &rdu); ++ break; ++ ++ default: ++ /* err = -ENOTTY; */ ++ err = -EINVAL; ++ } ++ ++out: ++ AuTraceErr(err); ++ return err; ++} ++#endif +diff --git a/fs/aufs/rwsem.h b/fs/aufs/rwsem.h +new file mode 100644 +index 0000000..09ed5a0 +--- /dev/null ++++ b/fs/aufs/rwsem.h +@@ -0,0 +1,191 @@ ++/* ++ * Copyright (C) 2005-2016 Junjiro R. Okajima ++ * ++ * This program, aufs is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . ++ */ ++ ++/* ++ * simple read-write semaphore wrappers ++ */ ++ ++#ifndef __AUFS_RWSEM_H__ ++#define __AUFS_RWSEM_H__ ++ ++#ifdef __KERNEL__ ++ ++#include "debug.h" ++ ++struct au_rwsem { ++ struct rw_semaphore rwsem; ++#ifdef CONFIG_AUFS_DEBUG ++ /* just for debugging, not almighty counter */ ++ atomic_t rcnt, wcnt; ++#endif ++}; ++ ++#ifdef CONFIG_AUFS_DEBUG ++#define AuDbgCntInit(rw) do { \ ++ atomic_set(&(rw)->rcnt, 0); \ ++ atomic_set(&(rw)->wcnt, 0); \ ++ smp_mb(); /* atomic set */ \ ++} while (0) ++ ++#define AuDbgRcntInc(rw) atomic_inc(&(rw)->rcnt) ++#define AuDbgRcntDec(rw) WARN_ON(atomic_dec_return(&(rw)->rcnt) < 0) ++#define AuDbgWcntInc(rw) atomic_inc(&(rw)->wcnt) ++#define AuDbgWcntDec(rw) WARN_ON(atomic_dec_return(&(rw)->wcnt) < 0) ++#else ++#define AuDbgCntInit(rw) do {} while (0) ++#define AuDbgRcntInc(rw) do {} while (0) ++#define AuDbgRcntDec(rw) do {} while (0) ++#define AuDbgWcntInc(rw) do {} while (0) ++#define AuDbgWcntDec(rw) do {} while (0) ++#endif /* CONFIG_AUFS_DEBUG */ ++ ++/* to debug easier, do not make them inlined functions */ ++#define AuRwMustNoWaiters(rw) AuDebugOn(!list_empty(&(rw)->rwsem.wait_list)) ++/* rwsem_is_locked() is unusable */ ++#define AuRwMustReadLock(rw) AuDebugOn(atomic_read(&(rw)->rcnt) <= 0) ++#define AuRwMustWriteLock(rw) AuDebugOn(atomic_read(&(rw)->wcnt) <= 0) ++#define AuRwMustAnyLock(rw) AuDebugOn(atomic_read(&(rw)->rcnt) <= 0 \ ++ && atomic_read(&(rw)->wcnt) <= 0) ++#define AuRwDestroy(rw) AuDebugOn(atomic_read(&(rw)->rcnt) \ ++ || atomic_read(&(rw)->wcnt)) ++ ++#define au_rw_class(rw, key) lockdep_set_class(&(rw)->rwsem, key) ++ ++static inline void au_rw_init(struct au_rwsem *rw) ++{ ++ AuDbgCntInit(rw); ++ init_rwsem(&rw->rwsem); ++} ++ ++static inline void au_rw_init_wlock(struct au_rwsem *rw) ++{ ++ au_rw_init(rw); ++ down_write(&rw->rwsem); ++ AuDbgWcntInc(rw); ++} ++ ++static inline void au_rw_init_wlock_nested(struct au_rwsem *rw, ++ unsigned int lsc) ++{ ++ au_rw_init(rw); ++ down_write_nested(&rw->rwsem, lsc); ++ AuDbgWcntInc(rw); ++} ++ ++static inline void au_rw_read_lock(struct au_rwsem *rw) ++{ ++ down_read(&rw->rwsem); ++ AuDbgRcntInc(rw); ++} ++ ++static inline void au_rw_read_lock_nested(struct au_rwsem *rw, unsigned int lsc) ++{ ++ down_read_nested(&rw->rwsem, lsc); ++ AuDbgRcntInc(rw); ++} ++ ++static inline void au_rw_read_unlock(struct au_rwsem *rw) ++{ ++ AuRwMustReadLock(rw); ++ AuDbgRcntDec(rw); ++ up_read(&rw->rwsem); ++} ++ ++static inline void au_rw_dgrade_lock(struct au_rwsem *rw) ++{ ++ AuRwMustWriteLock(rw); ++ AuDbgRcntInc(rw); ++ AuDbgWcntDec(rw); ++ downgrade_write(&rw->rwsem); ++} ++ ++static inline void au_rw_write_lock(struct au_rwsem *rw) ++{ ++ down_write(&rw->rwsem); ++ AuDbgWcntInc(rw); ++} ++ ++static inline void au_rw_write_lock_nested(struct au_rwsem *rw, ++ unsigned int lsc) ++{ ++ down_write_nested(&rw->rwsem, lsc); ++ AuDbgWcntInc(rw); ++} ++ ++static inline void au_rw_write_unlock(struct au_rwsem *rw) ++{ ++ AuRwMustWriteLock(rw); ++ AuDbgWcntDec(rw); ++ up_write(&rw->rwsem); ++} ++ ++/* why is not _nested version defined */ ++static inline int au_rw_read_trylock(struct au_rwsem *rw) ++{ ++ int ret; ++ ++ ret = down_read_trylock(&rw->rwsem); ++ if (ret) ++ AuDbgRcntInc(rw); ++ return ret; ++} ++ ++static inline int au_rw_write_trylock(struct au_rwsem *rw) ++{ ++ int ret; ++ ++ ret = down_write_trylock(&rw->rwsem); ++ if (ret) ++ AuDbgWcntInc(rw); ++ return ret; ++} ++ ++#undef AuDbgCntInit ++#undef AuDbgRcntInc ++#undef AuDbgRcntDec ++#undef AuDbgWcntInc ++#undef AuDbgWcntDec ++ ++#define AuSimpleLockRwsemFuncs(prefix, param, rwsem) \ ++static inline void prefix##_read_lock(param) \ ++{ au_rw_read_lock(rwsem); } \ ++static inline void prefix##_write_lock(param) \ ++{ au_rw_write_lock(rwsem); } \ ++static inline int prefix##_read_trylock(param) \ ++{ return au_rw_read_trylock(rwsem); } \ ++static inline int prefix##_write_trylock(param) \ ++{ return au_rw_write_trylock(rwsem); } ++/* why is not _nested version defined */ ++/* static inline void prefix##_read_trylock_nested(param, lsc) ++{ au_rw_read_trylock_nested(rwsem, lsc)); } ++static inline void prefix##_write_trylock_nestd(param, lsc) ++{ au_rw_write_trylock_nested(rwsem, lsc); } */ ++ ++#define AuSimpleUnlockRwsemFuncs(prefix, param, rwsem) \ ++static inline void prefix##_read_unlock(param) \ ++{ au_rw_read_unlock(rwsem); } \ ++static inline void prefix##_write_unlock(param) \ ++{ au_rw_write_unlock(rwsem); } \ ++static inline void prefix##_downgrade_lock(param) \ ++{ au_rw_dgrade_lock(rwsem); } ++ ++#define AuSimpleRwsemFuncs(prefix, param, rwsem) \ ++ AuSimpleLockRwsemFuncs(prefix, param, rwsem) \ ++ AuSimpleUnlockRwsemFuncs(prefix, param, rwsem) ++ ++#endif /* __KERNEL__ */ ++#endif /* __AUFS_RWSEM_H__ */ +diff --git a/fs/aufs/sbinfo.c b/fs/aufs/sbinfo.c +new file mode 100644 +index 0000000..ff13c9f +--- /dev/null ++++ b/fs/aufs/sbinfo.c +@@ -0,0 +1,348 @@ ++/* ++ * Copyright (C) 2005-2016 Junjiro R. Okajima ++ * ++ * This program, aufs is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . ++ */ ++ ++/* ++ * superblock private data ++ */ ++ ++#include "aufs.h" ++ ++/* ++ * they are necessary regardless sysfs is disabled. ++ */ ++void au_si_free(struct kobject *kobj) ++{ ++ int i; ++ struct au_sbinfo *sbinfo; ++ char *locked __maybe_unused; /* debug only */ ++ ++ sbinfo = container_of(kobj, struct au_sbinfo, si_kobj); ++ for (i = 0; i < AuPlink_NHASH; i++) ++ AuDebugOn(!hlist_empty(&sbinfo->si_plink[i].head)); ++ AuDebugOn(atomic_read(&sbinfo->si_nowait.nw_len)); ++ ++ au_rw_write_lock(&sbinfo->si_rwsem); ++ au_br_free(sbinfo); ++ au_rw_write_unlock(&sbinfo->si_rwsem); ++ ++ kfree(sbinfo->si_branch); ++ for (i = 0; i < AU_NPIDMAP; i++) ++ kfree(sbinfo->au_si_pid.pid_bitmap[i]); ++ mutex_destroy(&sbinfo->au_si_pid.pid_mtx); ++ mutex_destroy(&sbinfo->si_xib_mtx); ++ AuRwDestroy(&sbinfo->si_rwsem); ++ ++ kfree(sbinfo); ++} ++ ++int au_si_alloc(struct super_block *sb) ++{ ++ int err, i; ++ struct au_sbinfo *sbinfo; ++ static struct lock_class_key aufs_si; ++ ++ err = -ENOMEM; ++ sbinfo = kzalloc(sizeof(*sbinfo), GFP_NOFS); ++ if (unlikely(!sbinfo)) ++ goto out; ++ ++ /* will be reallocated separately */ ++ sbinfo->si_branch = kzalloc(sizeof(*sbinfo->si_branch), GFP_NOFS); ++ if (unlikely(!sbinfo->si_branch)) ++ goto out_sbinfo; ++ ++ err = sysaufs_si_init(sbinfo); ++ if (unlikely(err)) ++ goto out_br; ++ ++ au_nwt_init(&sbinfo->si_nowait); ++ au_rw_init_wlock(&sbinfo->si_rwsem); ++ au_rw_class(&sbinfo->si_rwsem, &aufs_si); ++ mutex_init(&sbinfo->au_si_pid.pid_mtx); ++ ++ atomic_long_set(&sbinfo->si_ninodes, 0); ++ atomic_long_set(&sbinfo->si_nfiles, 0); ++ ++ sbinfo->si_bend = -1; ++ sbinfo->si_last_br_id = AUFS_BRANCH_MAX / 2; ++ ++ sbinfo->si_wbr_copyup = AuWbrCopyup_Def; ++ sbinfo->si_wbr_create = AuWbrCreate_Def; ++ sbinfo->si_wbr_copyup_ops = au_wbr_copyup_ops + sbinfo->si_wbr_copyup; ++ sbinfo->si_wbr_create_ops = au_wbr_create_ops + sbinfo->si_wbr_create; ++ ++ au_fhsm_init(sbinfo); ++ ++ sbinfo->si_mntflags = au_opts_plink(AuOpt_Def); ++ ++ sbinfo->si_xino_jiffy = jiffies; ++ sbinfo->si_xino_expire ++ = msecs_to_jiffies(AUFS_XINO_DEF_SEC * MSEC_PER_SEC); ++ mutex_init(&sbinfo->si_xib_mtx); ++ sbinfo->si_xino_brid = -1; ++ /* leave si_xib_last_pindex and si_xib_next_bit */ ++ ++ au_sphl_init(&sbinfo->si_aopen); ++ ++ sbinfo->si_rdcache = msecs_to_jiffies(AUFS_RDCACHE_DEF * MSEC_PER_SEC); ++ sbinfo->si_rdblk = AUFS_RDBLK_DEF; ++ sbinfo->si_rdhash = AUFS_RDHASH_DEF; ++ sbinfo->si_dirwh = AUFS_DIRWH_DEF; ++ ++ for (i = 0; i < AuPlink_NHASH; i++) ++ au_sphl_init(sbinfo->si_plink + i); ++ init_waitqueue_head(&sbinfo->si_plink_wq); ++ spin_lock_init(&sbinfo->si_plink_maint_lock); ++ ++ au_sphl_init(&sbinfo->si_files); ++ ++ /* with getattr by default */ ++ sbinfo->si_iop_array = aufs_iop; ++ ++ /* leave other members for sysaufs and si_mnt. */ ++ sbinfo->si_sb = sb; ++ sb->s_fs_info = sbinfo; ++ si_pid_set(sb); ++ return 0; /* success */ ++ ++out_br: ++ kfree(sbinfo->si_branch); ++out_sbinfo: ++ kfree(sbinfo); ++out: ++ return err; ++} ++ ++int au_sbr_realloc(struct au_sbinfo *sbinfo, int nbr) ++{ ++ int err, sz; ++ struct au_branch **brp; ++ ++ AuRwMustWriteLock(&sbinfo->si_rwsem); ++ ++ err = -ENOMEM; ++ sz = sizeof(*brp) * (sbinfo->si_bend + 1); ++ if (unlikely(!sz)) ++ sz = sizeof(*brp); ++ brp = au_kzrealloc(sbinfo->si_branch, sz, sizeof(*brp) * nbr, GFP_NOFS); ++ if (brp) { ++ sbinfo->si_branch = brp; ++ err = 0; ++ } ++ ++ return err; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++unsigned int au_sigen_inc(struct super_block *sb) ++{ ++ unsigned int gen; ++ ++ SiMustWriteLock(sb); ++ ++ gen = ++au_sbi(sb)->si_generation; ++ au_update_digen(sb->s_root); ++ au_update_iigen(sb->s_root->d_inode, /*half*/0); ++ sb->s_root->d_inode->i_version++; ++ return gen; ++} ++ ++aufs_bindex_t au_new_br_id(struct super_block *sb) ++{ ++ aufs_bindex_t br_id; ++ int i; ++ struct au_sbinfo *sbinfo; ++ ++ SiMustWriteLock(sb); ++ ++ sbinfo = au_sbi(sb); ++ for (i = 0; i <= AUFS_BRANCH_MAX; i++) { ++ br_id = ++sbinfo->si_last_br_id; ++ AuDebugOn(br_id < 0); ++ if (br_id && au_br_index(sb, br_id) < 0) ++ return br_id; ++ } ++ ++ return -1; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++/* it is ok that new 'nwt' tasks are appended while we are sleeping */ ++int si_read_lock(struct super_block *sb, int flags) ++{ ++ int err; ++ ++ err = 0; ++ if (au_ftest_lock(flags, FLUSH)) ++ au_nwt_flush(&au_sbi(sb)->si_nowait); ++ ++ si_noflush_read_lock(sb); ++ err = au_plink_maint(sb, flags); ++ if (unlikely(err)) ++ si_read_unlock(sb); ++ ++ return err; ++} ++ ++int si_write_lock(struct super_block *sb, int flags) ++{ ++ int err; ++ ++ if (au_ftest_lock(flags, FLUSH)) ++ au_nwt_flush(&au_sbi(sb)->si_nowait); ++ ++ si_noflush_write_lock(sb); ++ err = au_plink_maint(sb, flags); ++ if (unlikely(err)) ++ si_write_unlock(sb); ++ ++ return err; ++} ++ ++/* dentry and super_block lock. call at entry point */ ++int aufs_read_lock(struct dentry *dentry, int flags) ++{ ++ int err; ++ struct super_block *sb; ++ ++ sb = dentry->d_sb; ++ err = si_read_lock(sb, flags); ++ if (unlikely(err)) ++ goto out; ++ ++ if (au_ftest_lock(flags, DW)) ++ di_write_lock_child(dentry); ++ else ++ di_read_lock_child(dentry, flags); ++ ++ if (au_ftest_lock(flags, GEN)) { ++ err = au_digen_test(dentry, au_sigen(sb)); ++ if (!au_opt_test(au_mntflags(sb), UDBA_NONE)) ++ AuDebugOn(!err && au_dbrange_test(dentry)); ++ else if (!err) ++ err = au_dbrange_test(dentry); ++ if (unlikely(err)) ++ aufs_read_unlock(dentry, flags); ++ } ++ ++out: ++ return err; ++} ++ ++void aufs_read_unlock(struct dentry *dentry, int flags) ++{ ++ if (au_ftest_lock(flags, DW)) ++ di_write_unlock(dentry); ++ else ++ di_read_unlock(dentry, flags); ++ si_read_unlock(dentry->d_sb); ++} ++ ++void aufs_write_lock(struct dentry *dentry) ++{ ++ si_write_lock(dentry->d_sb, AuLock_FLUSH | AuLock_NOPLMW); ++ di_write_lock_child(dentry); ++} ++ ++void aufs_write_unlock(struct dentry *dentry) ++{ ++ di_write_unlock(dentry); ++ si_write_unlock(dentry->d_sb); ++} ++ ++int aufs_read_and_write_lock2(struct dentry *d1, struct dentry *d2, int flags) ++{ ++ int err; ++ unsigned int sigen; ++ struct super_block *sb; ++ ++ sb = d1->d_sb; ++ err = si_read_lock(sb, flags); ++ if (unlikely(err)) ++ goto out; ++ ++ di_write_lock2_child(d1, d2, au_ftest_lock(flags, DIRS)); ++ ++ if (au_ftest_lock(flags, GEN)) { ++ sigen = au_sigen(sb); ++ err = au_digen_test(d1, sigen); ++ AuDebugOn(!err && au_dbrange_test(d1)); ++ if (!err) { ++ err = au_digen_test(d2, sigen); ++ AuDebugOn(!err && au_dbrange_test(d2)); ++ } ++ if (unlikely(err)) ++ aufs_read_and_write_unlock2(d1, d2); ++ } ++ ++out: ++ return err; ++} ++ ++void aufs_read_and_write_unlock2(struct dentry *d1, struct dentry *d2) ++{ ++ di_write_unlock2(d1, d2); ++ si_read_unlock(d1->d_sb); ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++static void si_pid_alloc(struct au_si_pid *au_si_pid, int idx) ++{ ++ unsigned long *p; ++ ++ BUILD_BUG_ON(sizeof(unsigned long) != ++ sizeof(*au_si_pid->pid_bitmap)); ++ ++ mutex_lock(&au_si_pid->pid_mtx); ++ p = au_si_pid->pid_bitmap[idx]; ++ while (!p) { ++ /* ++ * bad approach. ++ * but keeping 'si_pid_set()' void is more important. ++ */ ++ p = kcalloc(BITS_TO_LONGS(AU_PIDSTEP), ++ sizeof(*au_si_pid->pid_bitmap), ++ GFP_NOFS); ++ if (p) ++ break; ++ cond_resched(); ++ } ++ au_si_pid->pid_bitmap[idx] = p; ++ mutex_unlock(&au_si_pid->pid_mtx); ++} ++ ++void si_pid_set(struct super_block *sb) ++{ ++ pid_t bit; ++ int idx; ++ unsigned long *bitmap; ++ struct au_si_pid *au_si_pid; ++ ++ si_pid_idx_bit(&idx, &bit); ++ au_si_pid = &au_sbi(sb)->au_si_pid; ++ bitmap = au_si_pid->pid_bitmap[idx]; ++ if (!bitmap) { ++ si_pid_alloc(au_si_pid, idx); ++ bitmap = au_si_pid->pid_bitmap[idx]; ++ } ++ AuDebugOn(test_bit(bit, bitmap)); ++ set_bit(bit, bitmap); ++ /* smp_mb(); */ ++} +diff --git a/fs/aufs/spl.h b/fs/aufs/spl.h +new file mode 100644 +index 0000000..945343a +--- /dev/null ++++ b/fs/aufs/spl.h +@@ -0,0 +1,111 @@ ++/* ++ * Copyright (C) 2005-2016 Junjiro R. Okajima ++ * ++ * This program, aufs is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . ++ */ ++ ++/* ++ * simple list protected by a spinlock ++ */ ++ ++#ifndef __AUFS_SPL_H__ ++#define __AUFS_SPL_H__ ++ ++#ifdef __KERNEL__ ++ ++struct au_splhead { ++ spinlock_t spin; ++ struct list_head head; ++}; ++ ++static inline void au_spl_init(struct au_splhead *spl) ++{ ++ spin_lock_init(&spl->spin); ++ INIT_LIST_HEAD(&spl->head); ++} ++ ++static inline void au_spl_add(struct list_head *list, struct au_splhead *spl) ++{ ++ spin_lock(&spl->spin); ++ list_add(list, &spl->head); ++ spin_unlock(&spl->spin); ++} ++ ++static inline void au_spl_del(struct list_head *list, struct au_splhead *spl) ++{ ++ spin_lock(&spl->spin); ++ list_del(list); ++ spin_unlock(&spl->spin); ++} ++ ++static inline void au_spl_del_rcu(struct list_head *list, ++ struct au_splhead *spl) ++{ ++ spin_lock(&spl->spin); ++ list_del_rcu(list); ++ spin_unlock(&spl->spin); ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++struct au_sphlhead { ++ spinlock_t spin; ++ struct hlist_head head; ++}; ++ ++static inline void au_sphl_init(struct au_sphlhead *sphl) ++{ ++ spin_lock_init(&sphl->spin); ++ INIT_HLIST_HEAD(&sphl->head); ++} ++ ++static inline void au_sphl_add(struct hlist_node *hlist, ++ struct au_sphlhead *sphl) ++{ ++ spin_lock(&sphl->spin); ++ hlist_add_head(hlist, &sphl->head); ++ spin_unlock(&sphl->spin); ++} ++ ++static inline void au_sphl_del(struct hlist_node *hlist, ++ struct au_sphlhead *sphl) ++{ ++ spin_lock(&sphl->spin); ++ hlist_del(hlist); ++ spin_unlock(&sphl->spin); ++} ++ ++static inline void au_sphl_del_rcu(struct hlist_node *hlist, ++ struct au_sphlhead *sphl) ++{ ++ spin_lock(&sphl->spin); ++ hlist_del_rcu(hlist); ++ spin_unlock(&sphl->spin); ++} ++ ++static inline unsigned long au_sphl_count(struct au_sphlhead *sphl) ++{ ++ unsigned long cnt; ++ struct hlist_node *pos; ++ ++ cnt = 0; ++ spin_lock(&sphl->spin); ++ hlist_for_each(pos, &sphl->head) ++ cnt++; ++ spin_unlock(&sphl->spin); ++ return cnt; ++} ++ ++#endif /* __KERNEL__ */ ++#endif /* __AUFS_SPL_H__ */ +diff --git a/fs/aufs/super.c b/fs/aufs/super.c +new file mode 100644 +index 0000000..64a6bb4 +--- /dev/null ++++ b/fs/aufs/super.c +@@ -0,0 +1,1041 @@ ++/* ++ * Copyright (C) 2005-2016 Junjiro R. Okajima ++ * ++ * This program, aufs is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . ++ */ ++ ++/* ++ * mount and super_block operations ++ */ ++ ++#include ++#include ++#include ++#include ++#include "aufs.h" ++ ++/* ++ * super_operations ++ */ ++static struct inode *aufs_alloc_inode(struct super_block *sb __maybe_unused) ++{ ++ struct au_icntnr *c; ++ ++ c = au_cache_alloc_icntnr(); ++ if (c) { ++ au_icntnr_init(c); ++ c->vfs_inode.i_version = 1; /* sigen(sb); */ ++ c->iinfo.ii_hinode = NULL; ++ return &c->vfs_inode; ++ } ++ return NULL; ++} ++ ++static void aufs_destroy_inode_cb(struct rcu_head *head) ++{ ++ struct inode *inode = container_of(head, struct inode, i_rcu); ++ ++ INIT_HLIST_HEAD(&inode->i_dentry); ++ au_cache_free_icntnr(container_of(inode, struct au_icntnr, vfs_inode)); ++} ++ ++static void aufs_destroy_inode(struct inode *inode) ++{ ++ au_iinfo_fin(inode); ++ call_rcu(&inode->i_rcu, aufs_destroy_inode_cb); ++} ++ ++struct inode *au_iget_locked(struct super_block *sb, ino_t ino) ++{ ++ struct inode *inode; ++ int err; ++ ++ inode = iget_locked(sb, ino); ++ if (unlikely(!inode)) { ++ inode = ERR_PTR(-ENOMEM); ++ goto out; ++ } ++ if (!(inode->i_state & I_NEW)) ++ goto out; ++ ++ err = au_xigen_new(inode); ++ if (!err) ++ err = au_iinfo_init(inode); ++ if (!err) ++ inode->i_version++; ++ else { ++ iget_failed(inode); ++ inode = ERR_PTR(err); ++ } ++ ++out: ++ /* never return NULL */ ++ AuDebugOn(!inode); ++ AuTraceErrPtr(inode); ++ return inode; ++} ++ ++/* lock free root dinfo */ ++static int au_show_brs(struct seq_file *seq, struct super_block *sb) ++{ ++ int err; ++ aufs_bindex_t bindex, bend; ++ struct path path; ++ struct au_hdentry *hdp; ++ struct au_branch *br; ++ au_br_perm_str_t perm; ++ ++ err = 0; ++ bend = au_sbend(sb); ++ hdp = au_di(sb->s_root)->di_hdentry; ++ for (bindex = 0; !err && bindex <= bend; bindex++) { ++ br = au_sbr(sb, bindex); ++ path.mnt = au_br_mnt(br); ++ path.dentry = hdp[bindex].hd_dentry; ++ err = au_seq_path(seq, &path); ++ if (!err) { ++ au_optstr_br_perm(&perm, br->br_perm); ++ err = seq_printf(seq, "=%s", perm.a); ++ if (err == -1) ++ err = -E2BIG; ++ } ++ if (!err && bindex != bend) ++ err = seq_putc(seq, ':'); ++ } ++ ++ return err; ++} ++ ++static void au_show_wbr_create(struct seq_file *m, int v, ++ struct au_sbinfo *sbinfo) ++{ ++ const char *pat; ++ ++ AuRwMustAnyLock(&sbinfo->si_rwsem); ++ ++ seq_puts(m, ",create="); ++ pat = au_optstr_wbr_create(v); ++ switch (v) { ++ case AuWbrCreate_TDP: ++ case AuWbrCreate_RR: ++ case AuWbrCreate_MFS: ++ case AuWbrCreate_PMFS: ++ seq_puts(m, pat); ++ break; ++ case AuWbrCreate_MFSV: ++ seq_printf(m, /*pat*/"mfs:%lu", ++ jiffies_to_msecs(sbinfo->si_wbr_mfs.mfs_expire) ++ / MSEC_PER_SEC); ++ break; ++ case AuWbrCreate_PMFSV: ++ seq_printf(m, /*pat*/"pmfs:%lu", ++ jiffies_to_msecs(sbinfo->si_wbr_mfs.mfs_expire) ++ / MSEC_PER_SEC); ++ break; ++ case AuWbrCreate_MFSRR: ++ seq_printf(m, /*pat*/"mfsrr:%llu", ++ sbinfo->si_wbr_mfs.mfsrr_watermark); ++ break; ++ case AuWbrCreate_MFSRRV: ++ seq_printf(m, /*pat*/"mfsrr:%llu:%lu", ++ sbinfo->si_wbr_mfs.mfsrr_watermark, ++ jiffies_to_msecs(sbinfo->si_wbr_mfs.mfs_expire) ++ / MSEC_PER_SEC); ++ break; ++ case AuWbrCreate_PMFSRR: ++ seq_printf(m, /*pat*/"pmfsrr:%llu", ++ sbinfo->si_wbr_mfs.mfsrr_watermark); ++ break; ++ case AuWbrCreate_PMFSRRV: ++ seq_printf(m, /*pat*/"pmfsrr:%llu:%lu", ++ sbinfo->si_wbr_mfs.mfsrr_watermark, ++ jiffies_to_msecs(sbinfo->si_wbr_mfs.mfs_expire) ++ / MSEC_PER_SEC); ++ break; ++ } ++} ++ ++static int au_show_xino(struct seq_file *seq, struct super_block *sb) ++{ ++#ifdef CONFIG_SYSFS ++ return 0; ++#else ++ int err; ++ const int len = sizeof(AUFS_XINO_FNAME) - 1; ++ aufs_bindex_t bindex, brid; ++ struct qstr *name; ++ struct file *f; ++ struct dentry *d, *h_root; ++ struct au_hdentry *hdp; ++ ++ AuRwMustAnyLock(&sbinfo->si_rwsem); ++ ++ err = 0; ++ f = au_sbi(sb)->si_xib; ++ if (!f) ++ goto out; ++ ++ /* stop printing the default xino path on the first writable branch */ ++ h_root = NULL; ++ brid = au_xino_brid(sb); ++ if (brid >= 0) { ++ bindex = au_br_index(sb, brid); ++ hdp = au_di(sb->s_root)->di_hdentry; ++ h_root = hdp[0 + bindex].hd_dentry; ++ } ++ d = f->f_dentry; ++ name = &d->d_name; ++ /* safe ->d_parent because the file is unlinked */ ++ if (d->d_parent == h_root ++ && name->len == len ++ && !memcmp(name->name, AUFS_XINO_FNAME, len)) ++ goto out; ++ ++ seq_puts(seq, ",xino="); ++ err = au_xino_path(seq, f); ++ ++out: ++ return err; ++#endif ++} ++ ++/* seq_file will re-call me in case of too long string */ ++static int aufs_show_options(struct seq_file *m, struct dentry *dentry) ++{ ++ int err; ++ unsigned int mnt_flags, v; ++ struct super_block *sb; ++ struct au_sbinfo *sbinfo; ++ ++#define AuBool(name, str) do { \ ++ v = au_opt_test(mnt_flags, name); \ ++ if (v != au_opt_test(AuOpt_Def, name)) \ ++ seq_printf(m, ",%s" #str, v ? "" : "no"); \ ++} while (0) ++ ++#define AuStr(name, str) do { \ ++ v = mnt_flags & AuOptMask_##name; \ ++ if (v != (AuOpt_Def & AuOptMask_##name)) \ ++ seq_printf(m, "," #str "=%s", au_optstr_##str(v)); \ ++} while (0) ++ ++#define AuUInt(name, str, val) do { \ ++ if (val != AUFS_##name##_DEF) \ ++ seq_printf(m, "," #str "=%u", val); \ ++} while (0) ++ ++ sb = dentry->d_sb; ++ if (sb->s_flags & MS_POSIXACL) ++ seq_puts(m, ",acl"); ++ ++ /* lock free root dinfo */ ++ si_noflush_read_lock(sb); ++ sbinfo = au_sbi(sb); ++ seq_printf(m, ",si=%lx", sysaufs_si_id(sbinfo)); ++ ++ mnt_flags = au_mntflags(sb); ++ if (au_opt_test(mnt_flags, XINO)) { ++ err = au_show_xino(m, sb); ++ if (unlikely(err)) ++ goto out; ++ } else ++ seq_puts(m, ",noxino"); ++ ++ AuBool(TRUNC_XINO, trunc_xino); ++ AuStr(UDBA, udba); ++ AuBool(SHWH, shwh); ++ AuBool(PLINK, plink); ++ AuBool(DIO, dio); ++ AuBool(DIRPERM1, dirperm1); ++ /* AuBool(REFROF, refrof); */ ++ ++ v = sbinfo->si_wbr_create; ++ if (v != AuWbrCreate_Def) ++ au_show_wbr_create(m, v, sbinfo); ++ ++ v = sbinfo->si_wbr_copyup; ++ if (v != AuWbrCopyup_Def) ++ seq_printf(m, ",cpup=%s", au_optstr_wbr_copyup(v)); ++ ++ v = au_opt_test(mnt_flags, ALWAYS_DIROPQ); ++ if (v != au_opt_test(AuOpt_Def, ALWAYS_DIROPQ)) ++ seq_printf(m, ",diropq=%c", v ? 'a' : 'w'); ++ ++ AuUInt(DIRWH, dirwh, sbinfo->si_dirwh); ++ ++ v = jiffies_to_msecs(sbinfo->si_rdcache) / MSEC_PER_SEC; ++ AuUInt(RDCACHE, rdcache, v); ++ ++ AuUInt(RDBLK, rdblk, sbinfo->si_rdblk); ++ AuUInt(RDHASH, rdhash, sbinfo->si_rdhash); ++ ++ au_fhsm_show(m, sbinfo); ++ ++ AuBool(SUM, sum); ++ /* AuBool(SUM_W, wsum); */ ++ AuBool(WARN_PERM, warn_perm); ++ AuBool(VERBOSE, verbose); ++ ++out: ++ /* be sure to print "br:" last */ ++ if (!sysaufs_brs) { ++ seq_puts(m, ",br:"); ++ au_show_brs(m, sb); ++ } ++ si_read_unlock(sb); ++ return 0; ++ ++#undef AuBool ++#undef AuStr ++#undef AuUInt ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++/* sum mode which returns the summation for statfs(2) */ ++ ++static u64 au_add_till_max(u64 a, u64 b) ++{ ++ u64 old; ++ ++ old = a; ++ a += b; ++ if (old <= a) ++ return a; ++ return ULLONG_MAX; ++} ++ ++static u64 au_mul_till_max(u64 a, long mul) ++{ ++ u64 old; ++ ++ old = a; ++ a *= mul; ++ if (old <= a) ++ return a; ++ return ULLONG_MAX; ++} ++ ++static int au_statfs_sum(struct super_block *sb, struct kstatfs *buf) ++{ ++ int err; ++ long bsize, factor; ++ u64 blocks, bfree, bavail, files, ffree; ++ aufs_bindex_t bend, bindex, i; ++ unsigned char shared; ++ struct path h_path; ++ struct super_block *h_sb; ++ ++ err = 0; ++ bsize = LONG_MAX; ++ files = 0; ++ ffree = 0; ++ blocks = 0; ++ bfree = 0; ++ bavail = 0; ++ bend = au_sbend(sb); ++ for (bindex = 0; bindex <= bend; bindex++) { ++ h_path.mnt = au_sbr_mnt(sb, bindex); ++ h_sb = h_path.mnt->mnt_sb; ++ shared = 0; ++ for (i = 0; !shared && i < bindex; i++) ++ shared = (au_sbr_sb(sb, i) == h_sb); ++ if (shared) ++ continue; ++ ++ /* sb->s_root for NFS is unreliable */ ++ h_path.dentry = h_path.mnt->mnt_root; ++ err = vfs_statfs(&h_path, buf); ++ if (unlikely(err)) ++ goto out; ++ ++ if (bsize > buf->f_bsize) { ++ /* ++ * we will reduce bsize, so we have to expand blocks ++ * etc. to match them again ++ */ ++ factor = (bsize / buf->f_bsize); ++ blocks = au_mul_till_max(blocks, factor); ++ bfree = au_mul_till_max(bfree, factor); ++ bavail = au_mul_till_max(bavail, factor); ++ bsize = buf->f_bsize; ++ } ++ ++ factor = (buf->f_bsize / bsize); ++ blocks = au_add_till_max(blocks, ++ au_mul_till_max(buf->f_blocks, factor)); ++ bfree = au_add_till_max(bfree, ++ au_mul_till_max(buf->f_bfree, factor)); ++ bavail = au_add_till_max(bavail, ++ au_mul_till_max(buf->f_bavail, factor)); ++ files = au_add_till_max(files, buf->f_files); ++ ffree = au_add_till_max(ffree, buf->f_ffree); ++ } ++ ++ buf->f_bsize = bsize; ++ buf->f_blocks = blocks; ++ buf->f_bfree = bfree; ++ buf->f_bavail = bavail; ++ buf->f_files = files; ++ buf->f_ffree = ffree; ++ buf->f_frsize = 0; ++ ++out: ++ return err; ++} ++ ++static int aufs_statfs(struct dentry *dentry, struct kstatfs *buf) ++{ ++ int err; ++ struct path h_path; ++ struct super_block *sb; ++ ++ /* lock free root dinfo */ ++ sb = dentry->d_sb; ++ si_noflush_read_lock(sb); ++ if (!au_opt_test(au_mntflags(sb), SUM)) { ++ /* sb->s_root for NFS is unreliable */ ++ h_path.mnt = au_sbr_mnt(sb, 0); ++ h_path.dentry = h_path.mnt->mnt_root; ++ err = vfs_statfs(&h_path, buf); ++ } else ++ err = au_statfs_sum(sb, buf); ++ si_read_unlock(sb); ++ ++ if (!err) { ++ buf->f_type = AUFS_SUPER_MAGIC; ++ buf->f_namelen = AUFS_MAX_NAMELEN; ++ memset(&buf->f_fsid, 0, sizeof(buf->f_fsid)); ++ } ++ /* buf->f_bsize = buf->f_blocks = buf->f_bfree = buf->f_bavail = -1; */ ++ ++ return err; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++static int aufs_sync_fs(struct super_block *sb, int wait) ++{ ++ int err, e; ++ aufs_bindex_t bend, bindex; ++ struct au_branch *br; ++ struct super_block *h_sb; ++ ++ err = 0; ++ si_noflush_read_lock(sb); ++ bend = au_sbend(sb); ++ for (bindex = 0; bindex <= bend; bindex++) { ++ br = au_sbr(sb, bindex); ++ if (!au_br_writable(br->br_perm)) ++ continue; ++ ++ h_sb = au_sbr_sb(sb, bindex); ++ if (h_sb->s_op->sync_fs) { ++ e = h_sb->s_op->sync_fs(h_sb, wait); ++ if (unlikely(e && !err)) ++ err = e; ++ /* go on even if an error happens */ ++ } ++ } ++ si_read_unlock(sb); ++ ++ return err; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++/* final actions when unmounting a file system */ ++static void aufs_put_super(struct super_block *sb) ++{ ++ struct au_sbinfo *sbinfo; ++ ++ sbinfo = au_sbi(sb); ++ if (!sbinfo) ++ return; ++ ++ dbgaufs_si_fin(sbinfo); ++ kobject_put(&sbinfo->si_kobj); ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++void *au_array_alloc(unsigned long long *hint, au_arraycb_t cb, void *arg) ++{ ++ void *array; ++ unsigned long long n, sz; ++ ++ array = NULL; ++ n = 0; ++ if (!*hint) ++ goto out; ++ ++ if (*hint > ULLONG_MAX / sizeof(array)) { ++ array = ERR_PTR(-EMFILE); ++ pr_err("hint %llu\n", *hint); ++ goto out; ++ } ++ ++ sz = sizeof(array) * *hint; ++ array = kzalloc(sz, GFP_NOFS); ++ if (unlikely(!array)) ++ array = vzalloc(sz); ++ if (unlikely(!array)) { ++ array = ERR_PTR(-ENOMEM); ++ goto out; ++ } ++ ++ n = cb(array, *hint, arg); ++ AuDebugOn(n > *hint); ++ ++out: ++ *hint = n; ++ return array; ++} ++ ++static unsigned long long au_iarray_cb(void *a, ++ unsigned long long max __maybe_unused, ++ void *arg) ++{ ++ unsigned long long n; ++ struct inode **p, *inode; ++ struct list_head *head; ++ ++ n = 0; ++ p = a; ++ head = arg; ++ spin_lock(&inode_sb_list_lock); ++ list_for_each_entry(inode, head, i_sb_list) { ++ if (!is_bad_inode(inode) ++ && au_ii(inode)->ii_bstart >= 0) { ++ spin_lock(&inode->i_lock); ++ if (atomic_read(&inode->i_count)) { ++ au_igrab(inode); ++ *p++ = inode; ++ n++; ++ AuDebugOn(n > max); ++ } ++ spin_unlock(&inode->i_lock); ++ } ++ } ++ spin_unlock(&inode_sb_list_lock); ++ ++ return n; ++} ++ ++struct inode **au_iarray_alloc(struct super_block *sb, unsigned long long *max) ++{ ++ *max = atomic_long_read(&au_sbi(sb)->si_ninodes); ++ return au_array_alloc(max, au_iarray_cb, &sb->s_inodes); ++} ++ ++void au_iarray_free(struct inode **a, unsigned long long max) ++{ ++ unsigned long long ull; ++ ++ for (ull = 0; ull < max; ull++) ++ iput(a[ull]); ++ kvfree(a); ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++/* ++ * refresh dentry and inode at remount time. ++ */ ++/* todo: consolidate with simple_reval_dpath() and au_reval_for_attr() */ ++static int au_do_refresh(struct dentry *dentry, unsigned int dir_flags, ++ struct dentry *parent) ++{ ++ int err; ++ ++ di_write_lock_child(dentry); ++ di_read_lock_parent(parent, AuLock_IR); ++ err = au_refresh_dentry(dentry, parent); ++ if (!err && dir_flags) ++ au_hn_reset(dentry->d_inode, dir_flags); ++ di_read_unlock(parent, AuLock_IR); ++ di_write_unlock(dentry); ++ ++ return err; ++} ++ ++static int au_do_refresh_d(struct dentry *dentry, unsigned int sigen, ++ struct au_sbinfo *sbinfo, ++ const unsigned int dir_flags, unsigned int do_idop) ++{ ++ int err; ++ struct dentry *parent; ++ struct inode *inode; ++ ++ err = 0; ++ parent = dget_parent(dentry); ++ if (!au_digen_test(parent, sigen) && au_digen_test(dentry, sigen)) { ++ inode = dentry->d_inode; ++ if (inode) { ++ if (!S_ISDIR(inode->i_mode)) ++ err = au_do_refresh(dentry, /*dir_flags*/0, ++ parent); ++ else { ++ err = au_do_refresh(dentry, dir_flags, parent); ++ if (unlikely(err)) ++ au_fset_si(sbinfo, FAILED_REFRESH_DIR); ++ } ++ } else ++ err = au_do_refresh(dentry, /*dir_flags*/0, parent); ++ AuDbgDentry(dentry); ++ } ++ dput(parent); ++ ++ if (!err) { ++ if (do_idop) ++ au_refresh_dop(dentry, /*force_reval*/0); ++ } else ++ au_refresh_dop(dentry, /*force_reval*/1); ++ ++ AuTraceErr(err); ++ return err; ++} ++ ++static int au_refresh_d(struct super_block *sb, unsigned int do_idop) ++{ ++ int err, i, j, ndentry, e; ++ unsigned int sigen; ++ struct au_dcsub_pages dpages; ++ struct au_dpage *dpage; ++ struct dentry **dentries, *d; ++ struct au_sbinfo *sbinfo; ++ struct dentry *root = sb->s_root; ++ const unsigned int dir_flags = au_hi_flags(root->d_inode, /*isdir*/1); ++ ++ if (do_idop) ++ au_refresh_dop(root, /*force_reval*/0); ++ ++ err = au_dpages_init(&dpages, GFP_NOFS); ++ if (unlikely(err)) ++ goto out; ++ err = au_dcsub_pages(&dpages, root, NULL, NULL); ++ if (unlikely(err)) ++ goto out_dpages; ++ ++ sigen = au_sigen(sb); ++ sbinfo = au_sbi(sb); ++ for (i = 0; i < dpages.ndpage; i++) { ++ dpage = dpages.dpages + i; ++ dentries = dpage->dentries; ++ ndentry = dpage->ndentry; ++ for (j = 0; j < ndentry; j++) { ++ d = dentries[j]; ++ e = au_do_refresh_d(d, sigen, sbinfo, dir_flags, ++ do_idop); ++ if (unlikely(e && !err)) ++ err = e; ++ /* go on even err */ ++ } ++ } ++ ++out_dpages: ++ au_dpages_free(&dpages); ++out: ++ return err; ++} ++ ++static int au_refresh_i(struct super_block *sb, unsigned int do_idop) ++{ ++ int err, e; ++ unsigned int sigen; ++ unsigned long long max, ull; ++ struct inode *inode, **array; ++ ++ array = au_iarray_alloc(sb, &max); ++ err = PTR_ERR(array); ++ if (IS_ERR(array)) ++ goto out; ++ ++ err = 0; ++ sigen = au_sigen(sb); ++ for (ull = 0; ull < max; ull++) { ++ inode = array[ull]; ++ if (unlikely(!inode)) ++ break; ++ ++ e = 0; ++ ii_write_lock_child(inode); ++ if (au_iigen(inode, NULL) != sigen) { ++ e = au_refresh_hinode_self(inode); ++ if (unlikely(e)) { ++ au_refresh_iop(inode, /*force_getattr*/1); ++ pr_err("error %d, i%lu\n", e, inode->i_ino); ++ if (!err) ++ err = e; ++ /* go on even if err */ ++ } ++ } ++ if (!e && do_idop) ++ au_refresh_iop(inode, /*force_getattr*/0); ++ ii_write_unlock(inode); ++ } ++ ++ au_iarray_free(array, max); ++ ++out: ++ return err; ++} ++ ++static void au_remount_refresh(struct super_block *sb, unsigned int do_idop) ++{ ++ int err, e; ++ unsigned int udba; ++ aufs_bindex_t bindex, bend; ++ struct dentry *root; ++ struct inode *inode; ++ struct au_branch *br; ++ struct au_sbinfo *sbi; ++ ++ au_sigen_inc(sb); ++ sbi = au_sbi(sb); ++ au_fclr_si(sbi, FAILED_REFRESH_DIR); ++ ++ root = sb->s_root; ++ DiMustNoWaiters(root); ++ inode = root->d_inode; ++ IiMustNoWaiters(inode); ++ ++ udba = au_opt_udba(sb); ++ bend = au_sbend(sb); ++ for (bindex = 0; bindex <= bend; bindex++) { ++ br = au_sbr(sb, bindex); ++ err = au_hnotify_reset_br(udba, br, br->br_perm); ++ if (unlikely(err)) ++ AuIOErr("hnotify failed on br %d, %d, ignored\n", ++ bindex, err); ++ /* go on even if err */ ++ } ++ au_hn_reset(inode, au_hi_flags(inode, /*isdir*/1)); ++ ++ if (do_idop) { ++ if (au_ftest_si(sbi, NO_DREVAL)) { ++ AuDebugOn(sb->s_d_op == &aufs_dop_noreval); ++ sb->s_d_op = &aufs_dop_noreval; ++ AuDebugOn(sbi->si_iop_array == aufs_iop_nogetattr); ++ sbi->si_iop_array = aufs_iop_nogetattr; ++ } else { ++ AuDebugOn(sb->s_d_op == &aufs_dop); ++ sb->s_d_op = &aufs_dop; ++ AuDebugOn(sbi->si_iop_array == aufs_iop); ++ sbi->si_iop_array = aufs_iop; ++ } ++ pr_info("reset to %pf and %pf\n", ++ sb->s_d_op, sbi->si_iop_array); ++ } ++ ++ di_write_unlock(root); ++ err = au_refresh_d(sb, do_idop); ++ e = au_refresh_i(sb, do_idop); ++ if (unlikely(e && !err)) ++ err = e; ++ /* aufs_write_lock() calls ..._child() */ ++ di_write_lock_child(root); ++ ++ au_cpup_attr_all(inode, /*force*/1); ++ ++ if (unlikely(err)) ++ AuIOErr("refresh failed, ignored, %d\n", err); ++} ++ ++/* stop extra interpretation of errno in mount(8), and strange error messages */ ++static int cvt_err(int err) ++{ ++ AuTraceErr(err); ++ ++ switch (err) { ++ case -ENOENT: ++ case -ENOTDIR: ++ case -EEXIST: ++ case -EIO: ++ err = -EINVAL; ++ } ++ return err; ++} ++ ++static int aufs_remount_fs(struct super_block *sb, int *flags, char *data) ++{ ++ int err, do_dx; ++ unsigned int mntflags; ++ struct au_opts opts = { ++ .opt = NULL ++ }; ++ struct dentry *root; ++ struct inode *inode; ++ struct au_sbinfo *sbinfo; ++ ++ err = 0; ++ root = sb->s_root; ++ if (!data || !*data) { ++ err = si_write_lock(sb, AuLock_FLUSH | AuLock_NOPLM); ++ if (!err) { ++ di_write_lock_child(root); ++ err = au_opts_verify(sb, *flags, /*pending*/0); ++ aufs_write_unlock(root); ++ } ++ goto out; ++ } ++ ++ err = -ENOMEM; ++ opts.opt = (void *)__get_free_page(GFP_NOFS); ++ if (unlikely(!opts.opt)) ++ goto out; ++ opts.max_opt = PAGE_SIZE / sizeof(*opts.opt); ++ opts.flags = AuOpts_REMOUNT; ++ opts.sb_flags = *flags; ++ ++ /* parse it before aufs lock */ ++ err = au_opts_parse(sb, data, &opts); ++ if (unlikely(err)) ++ goto out_opts; ++ ++ sbinfo = au_sbi(sb); ++ inode = root->d_inode; ++ mutex_lock(&inode->i_mutex); ++ err = si_write_lock(sb, AuLock_FLUSH | AuLock_NOPLM); ++ if (unlikely(err)) ++ goto out_mtx; ++ di_write_lock_child(root); ++ ++ /* au_opts_remount() may return an error */ ++ err = au_opts_remount(sb, &opts); ++ au_opts_free(&opts); ++ ++ if (au_ftest_opts(opts.flags, REFRESH)) ++ au_remount_refresh(sb, au_ftest_opts(opts.flags, REFRESH_IDOP)); ++ ++ if (au_ftest_opts(opts.flags, REFRESH_DYAOP)) { ++ mntflags = au_mntflags(sb); ++ do_dx = !!au_opt_test(mntflags, DIO); ++ au_dy_arefresh(do_dx); ++ } ++ ++ au_fhsm_wrote_all(sb, /*force*/1); /* ?? */ ++ aufs_write_unlock(root); ++ ++out_mtx: ++ mutex_unlock(&inode->i_mutex); ++out_opts: ++ free_page((unsigned long)opts.opt); ++out: ++ err = cvt_err(err); ++ AuTraceErr(err); ++ return err; ++} ++ ++static const struct super_operations aufs_sop = { ++ .alloc_inode = aufs_alloc_inode, ++ .destroy_inode = aufs_destroy_inode, ++ /* always deleting, no clearing */ ++ .drop_inode = generic_delete_inode, ++ .show_options = aufs_show_options, ++ .statfs = aufs_statfs, ++ .put_super = aufs_put_super, ++ .sync_fs = aufs_sync_fs, ++ .remount_fs = aufs_remount_fs ++}; ++ ++/* ---------------------------------------------------------------------- */ ++ ++static int alloc_root(struct super_block *sb) ++{ ++ int err; ++ struct inode *inode; ++ struct dentry *root; ++ ++ err = -ENOMEM; ++ inode = au_iget_locked(sb, AUFS_ROOT_INO); ++ err = PTR_ERR(inode); ++ if (IS_ERR(inode)) ++ goto out; ++ ++ inode->i_op = aufs_iop + AuIop_DIR; /* with getattr by default */ ++ inode->i_fop = &aufs_dir_fop; ++ inode->i_mode = S_IFDIR; ++ set_nlink(inode, 2); ++ unlock_new_inode(inode); ++ ++ root = d_make_root(inode); ++ if (unlikely(!root)) ++ goto out; ++ err = PTR_ERR(root); ++ if (IS_ERR(root)) ++ goto out; ++ ++ err = au_di_init(root); ++ if (!err) { ++ sb->s_root = root; ++ return 0; /* success */ ++ } ++ dput(root); ++ ++out: ++ return err; ++} ++ ++static int aufs_fill_super(struct super_block *sb, void *raw_data, ++ int silent __maybe_unused) ++{ ++ int err; ++ struct au_opts opts = { ++ .opt = NULL ++ }; ++ struct au_sbinfo *sbinfo; ++ struct dentry *root; ++ struct inode *inode; ++ char *arg = raw_data; ++ ++ if (unlikely(!arg || !*arg)) { ++ err = -EINVAL; ++ pr_err("no arg\n"); ++ goto out; ++ } ++ ++ err = -ENOMEM; ++ opts.opt = (void *)__get_free_page(GFP_NOFS); ++ if (unlikely(!opts.opt)) ++ goto out; ++ opts.max_opt = PAGE_SIZE / sizeof(*opts.opt); ++ opts.sb_flags = sb->s_flags; ++ ++ err = au_si_alloc(sb); ++ if (unlikely(err)) ++ goto out_opts; ++ sbinfo = au_sbi(sb); ++ ++ /* all timestamps always follow the ones on the branch */ ++ sb->s_flags |= MS_NOATIME | MS_NODIRATIME; ++ sb->s_op = &aufs_sop; ++ sb->s_d_op = &aufs_dop; ++ sb->s_magic = AUFS_SUPER_MAGIC; ++ sb->s_maxbytes = 0; ++ sb->s_stack_depth = 1; ++ au_export_init(sb); ++ /* au_xattr_init(sb); */ ++ ++ err = alloc_root(sb); ++ if (unlikely(err)) { ++ si_write_unlock(sb); ++ goto out_info; ++ } ++ root = sb->s_root; ++ inode = root->d_inode; ++ ++ /* ++ * actually we can parse options regardless aufs lock here. ++ * but at remount time, parsing must be done before aufs lock. ++ * so we follow the same rule. ++ */ ++ ii_write_lock_parent(inode); ++ aufs_write_unlock(root); ++ err = au_opts_parse(sb, arg, &opts); ++ if (unlikely(err)) ++ goto out_root; ++ ++ /* lock vfs_inode first, then aufs. */ ++ mutex_lock(&inode->i_mutex); ++ aufs_write_lock(root); ++ err = au_opts_mount(sb, &opts); ++ au_opts_free(&opts); ++ if (!err && au_ftest_si(sbinfo, NO_DREVAL)) { ++ sb->s_d_op = &aufs_dop_noreval; ++ pr_info("%pf\n", sb->s_d_op); ++ au_refresh_dop(root, /*force_reval*/0); ++ sbinfo->si_iop_array = aufs_iop_nogetattr; ++ au_refresh_iop(inode, /*force_getattr*/0); ++ } ++ aufs_write_unlock(root); ++ mutex_unlock(&inode->i_mutex); ++ if (!err) ++ goto out_opts; /* success */ ++ ++out_root: ++ dput(root); ++ sb->s_root = NULL; ++out_info: ++ dbgaufs_si_fin(sbinfo); ++ kobject_put(&sbinfo->si_kobj); ++ sb->s_fs_info = NULL; ++out_opts: ++ free_page((unsigned long)opts.opt); ++out: ++ AuTraceErr(err); ++ err = cvt_err(err); ++ AuTraceErr(err); ++ return err; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++static struct dentry *aufs_mount(struct file_system_type *fs_type, int flags, ++ const char *dev_name __maybe_unused, ++ void *raw_data) ++{ ++ struct dentry *root; ++ struct super_block *sb; ++ ++ /* all timestamps always follow the ones on the branch */ ++ /* mnt->mnt_flags |= MNT_NOATIME | MNT_NODIRATIME; */ ++ root = mount_nodev(fs_type, flags, raw_data, aufs_fill_super); ++ if (IS_ERR(root)) ++ goto out; ++ ++ sb = root->d_sb; ++ si_write_lock(sb, !AuLock_FLUSH); ++ sysaufs_brs_add(sb, 0); ++ si_write_unlock(sb); ++ au_sbilist_add(sb); ++ ++out: ++ return root; ++} ++ ++static void aufs_kill_sb(struct super_block *sb) ++{ ++ struct au_sbinfo *sbinfo; ++ ++ sbinfo = au_sbi(sb); ++ if (sbinfo) { ++ au_sbilist_del(sb); ++ aufs_write_lock(sb->s_root); ++ au_fhsm_fin(sb); ++ if (sbinfo->si_wbr_create_ops->fin) ++ sbinfo->si_wbr_create_ops->fin(sb); ++ if (au_opt_test(sbinfo->si_mntflags, UDBA_HNOTIFY)) { ++ au_opt_set_udba(sbinfo->si_mntflags, UDBA_NONE); ++ au_remount_refresh(sb, /*do_idop*/0); ++ } ++ if (au_opt_test(sbinfo->si_mntflags, PLINK)) ++ au_plink_put(sb, /*verbose*/1); ++ au_xino_clr(sb); ++ sbinfo->si_sb = NULL; ++ aufs_write_unlock(sb->s_root); ++ au_nwt_flush(&sbinfo->si_nowait); ++ } ++ kill_anon_super(sb); ++} ++ ++struct file_system_type aufs_fs_type = { ++ .name = AUFS_FSTYPE, ++ /* a race between rename and others */ ++ .fs_flags = FS_RENAME_DOES_D_MOVE, ++ .mount = aufs_mount, ++ .kill_sb = aufs_kill_sb, ++ /* no need to __module_get() and module_put(). */ ++ .owner = THIS_MODULE, ++}; +diff --git a/fs/aufs/super.h b/fs/aufs/super.h +new file mode 100644 +index 0000000..ecd364b +--- /dev/null ++++ b/fs/aufs/super.h +@@ -0,0 +1,626 @@ ++/* ++ * Copyright (C) 2005-2016 Junjiro R. Okajima ++ * ++ * This program, aufs is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . ++ */ ++ ++/* ++ * super_block operations ++ */ ++ ++#ifndef __AUFS_SUPER_H__ ++#define __AUFS_SUPER_H__ ++ ++#ifdef __KERNEL__ ++ ++#include ++#include "rwsem.h" ++#include "spl.h" ++#include "wkq.h" ++ ++typedef ssize_t (*au_readf_t)(struct file *, char __user *, size_t, loff_t *); ++typedef ssize_t (*au_writef_t)(struct file *, const char __user *, size_t, ++ loff_t *); ++ ++/* policies to select one among multiple writable branches */ ++struct au_wbr_copyup_operations { ++ int (*copyup)(struct dentry *dentry); ++}; ++ ++#define AuWbr_DIR 1 /* target is a dir */ ++#define AuWbr_PARENT (1 << 1) /* always require a parent */ ++ ++#define au_ftest_wbr(flags, name) ((flags) & AuWbr_##name) ++#define au_fset_wbr(flags, name) { (flags) |= AuWbr_##name; } ++#define au_fclr_wbr(flags, name) { (flags) &= ~AuWbr_##name; } ++ ++struct au_wbr_create_operations { ++ int (*create)(struct dentry *dentry, unsigned int flags); ++ int (*init)(struct super_block *sb); ++ int (*fin)(struct super_block *sb); ++}; ++ ++struct au_wbr_mfs { ++ struct mutex mfs_lock; /* protect this structure */ ++ unsigned long mfs_jiffy; ++ unsigned long mfs_expire; ++ aufs_bindex_t mfs_bindex; ++ ++ unsigned long long mfsrr_bytes; ++ unsigned long long mfsrr_watermark; ++}; ++ ++#define AuPlink_NHASH 100 ++static inline int au_plink_hash(ino_t ino) ++{ ++ return ino % AuPlink_NHASH; ++} ++ ++/* File-based Hierarchical Storage Management */ ++struct au_fhsm { ++#ifdef CONFIG_AUFS_FHSM ++ /* allow only one process who can receive the notification */ ++ spinlock_t fhsm_spin; ++ pid_t fhsm_pid; ++ wait_queue_head_t fhsm_wqh; ++ atomic_t fhsm_readable; ++ ++ /* these are protected by si_rwsem */ ++ unsigned long fhsm_expire; ++ aufs_bindex_t fhsm_bottom; ++#endif ++}; ++ ++#define AU_PIDSTEP (int)(BITS_TO_LONGS(PID_MAX_DEFAULT) * BITS_PER_LONG) ++#define AU_NPIDMAP (int)DIV_ROUND_UP(PID_MAX_LIMIT, AU_PIDSTEP) ++struct au_si_pid { ++ unsigned long *pid_bitmap[AU_NPIDMAP]; ++ struct mutex pid_mtx; ++}; ++ ++struct au_branch; ++struct au_sbinfo { ++ /* nowait tasks in the system-wide workqueue */ ++ struct au_nowait_tasks si_nowait; ++ ++ /* ++ * tried sb->s_umount, but failed due to the dependecy between i_mutex. ++ * rwsem for au_sbinfo is necessary. ++ */ ++ struct au_rwsem si_rwsem; ++ ++ /* prevent recursive locking in deleting inode */ ++ struct au_si_pid au_si_pid; ++ ++ /* ++ * dirty approach to protect sb->sb_inodes and ->s_files (gone) from ++ * remount. ++ */ ++ atomic_long_t si_ninodes, si_nfiles; ++ ++ /* branch management */ ++ unsigned int si_generation; ++ ++ /* see AuSi_ flags */ ++ unsigned char au_si_status; ++ ++ aufs_bindex_t si_bend; ++ ++ /* dirty trick to keep br_id plus */ ++ unsigned int si_last_br_id : ++ sizeof(aufs_bindex_t) * BITS_PER_BYTE - 1; ++ struct au_branch **si_branch; ++ ++ /* policy to select a writable branch */ ++ unsigned char si_wbr_copyup; ++ unsigned char si_wbr_create; ++ struct au_wbr_copyup_operations *si_wbr_copyup_ops; ++ struct au_wbr_create_operations *si_wbr_create_ops; ++ ++ /* round robin */ ++ atomic_t si_wbr_rr_next; ++ ++ /* most free space */ ++ struct au_wbr_mfs si_wbr_mfs; ++ ++ /* File-based Hierarchical Storage Management */ ++ struct au_fhsm si_fhsm; ++ ++ /* mount flags */ ++ /* include/asm-ia64/siginfo.h defines a macro named si_flags */ ++ unsigned int si_mntflags; ++ ++ /* external inode number (bitmap and translation table) */ ++ au_readf_t si_xread; ++ au_writef_t si_xwrite; ++ struct file *si_xib; ++ struct mutex si_xib_mtx; /* protect xib members */ ++ unsigned long *si_xib_buf; ++ unsigned long si_xib_last_pindex; ++ int si_xib_next_bit; ++ aufs_bindex_t si_xino_brid; ++ unsigned long si_xino_jiffy; ++ unsigned long si_xino_expire; ++ /* reserved for future use */ ++ /* unsigned long long si_xib_limit; */ /* Max xib file size */ ++ ++#ifdef CONFIG_AUFS_EXPORT ++ /* i_generation */ ++ struct file *si_xigen; ++ atomic_t si_xigen_next; ++#endif ++ ++ /* dirty trick to suppoer atomic_open */ ++ struct au_sphlhead si_aopen; ++ ++ /* vdir parameters */ ++ unsigned long si_rdcache; /* max cache time in jiffies */ ++ unsigned int si_rdblk; /* deblk size */ ++ unsigned int si_rdhash; /* hash size */ ++ ++ /* ++ * If the number of whiteouts are larger than si_dirwh, leave all of ++ * them after au_whtmp_ren to reduce the cost of rmdir(2). ++ * future fsck.aufs or kernel thread will remove them later. ++ * Otherwise, remove all whiteouts and the dir in rmdir(2). ++ */ ++ unsigned int si_dirwh; ++ ++ /* pseudo_link list */ ++ struct au_sphlhead si_plink[AuPlink_NHASH]; ++ wait_queue_head_t si_plink_wq; ++ spinlock_t si_plink_maint_lock; ++ pid_t si_plink_maint_pid; ++ ++ /* file list */ ++ struct au_sphlhead si_files; ++ ++ /* with/without getattr, brother of sb->s_d_op */ ++ struct inode_operations *si_iop_array; ++ ++ /* ++ * sysfs and lifetime management. ++ * this is not a small structure and it may be a waste of memory in case ++ * of sysfs is disabled, particulary when many aufs-es are mounted. ++ * but using sysfs is majority. ++ */ ++ struct kobject si_kobj; ++#ifdef CONFIG_DEBUG_FS ++ struct dentry *si_dbgaufs; ++ struct dentry *si_dbgaufs_plink; ++ struct dentry *si_dbgaufs_xib; ++#ifdef CONFIG_AUFS_EXPORT ++ struct dentry *si_dbgaufs_xigen; ++#endif ++#endif ++ ++#ifdef CONFIG_AUFS_SBILIST ++ struct hlist_node si_list; ++#endif ++ ++ /* dirty, necessary for unmounting, sysfs and sysrq */ ++ struct super_block *si_sb; ++}; ++ ++/* sbinfo status flags */ ++/* ++ * set true when refresh_dirs() failed at remount time. ++ * then try refreshing dirs at access time again. ++ * if it is false, refreshing dirs at access time is unnecesary ++ */ ++#define AuSi_FAILED_REFRESH_DIR 1 ++#define AuSi_FHSM (1 << 1) /* fhsm is active now */ ++#define AuSi_NO_DREVAL (1 << 2) /* disable all d_revalidate */ ++ ++#ifndef CONFIG_AUFS_FHSM ++#undef AuSi_FHSM ++#define AuSi_FHSM 0 ++#endif ++ ++static inline unsigned char au_do_ftest_si(struct au_sbinfo *sbi, ++ unsigned int flag) ++{ ++ AuRwMustAnyLock(&sbi->si_rwsem); ++ return sbi->au_si_status & flag; ++} ++#define au_ftest_si(sbinfo, name) au_do_ftest_si(sbinfo, AuSi_##name) ++#define au_fset_si(sbinfo, name) do { \ ++ AuRwMustWriteLock(&(sbinfo)->si_rwsem); \ ++ (sbinfo)->au_si_status |= AuSi_##name; \ ++} while (0) ++#define au_fclr_si(sbinfo, name) do { \ ++ AuRwMustWriteLock(&(sbinfo)->si_rwsem); \ ++ (sbinfo)->au_si_status &= ~AuSi_##name; \ ++} while (0) ++ ++/* ---------------------------------------------------------------------- */ ++ ++/* policy to select one among writable branches */ ++#define AuWbrCopyup(sbinfo, ...) \ ++ ((sbinfo)->si_wbr_copyup_ops->copyup(__VA_ARGS__)) ++#define AuWbrCreate(sbinfo, ...) \ ++ ((sbinfo)->si_wbr_create_ops->create(__VA_ARGS__)) ++ ++/* flags for si_read_lock()/aufs_read_lock()/di_read_lock() */ ++#define AuLock_DW 1 /* write-lock dentry */ ++#define AuLock_IR (1 << 1) /* read-lock inode */ ++#define AuLock_IW (1 << 2) /* write-lock inode */ ++#define AuLock_FLUSH (1 << 3) /* wait for 'nowait' tasks */ ++#define AuLock_DIRS (1 << 4) /* target is a pair of dirs */ ++#define AuLock_NOPLM (1 << 5) /* return err in plm mode */ ++#define AuLock_NOPLMW (1 << 6) /* wait for plm mode ends */ ++#define AuLock_GEN (1 << 7) /* test digen/iigen */ ++#define au_ftest_lock(flags, name) ((flags) & AuLock_##name) ++#define au_fset_lock(flags, name) \ ++ do { (flags) |= AuLock_##name; } while (0) ++#define au_fclr_lock(flags, name) \ ++ do { (flags) &= ~AuLock_##name; } while (0) ++ ++/* ---------------------------------------------------------------------- */ ++ ++/* super.c */ ++extern struct file_system_type aufs_fs_type; ++struct inode *au_iget_locked(struct super_block *sb, ino_t ino); ++typedef unsigned long long (*au_arraycb_t)(void *array, unsigned long long max, ++ void *arg); ++void *au_array_alloc(unsigned long long *hint, au_arraycb_t cb, void *arg); ++struct inode **au_iarray_alloc(struct super_block *sb, unsigned long long *max); ++void au_iarray_free(struct inode **a, unsigned long long max); ++ ++/* sbinfo.c */ ++void au_si_free(struct kobject *kobj); ++int au_si_alloc(struct super_block *sb); ++int au_sbr_realloc(struct au_sbinfo *sbinfo, int nbr); ++ ++unsigned int au_sigen_inc(struct super_block *sb); ++aufs_bindex_t au_new_br_id(struct super_block *sb); ++ ++int si_read_lock(struct super_block *sb, int flags); ++int si_write_lock(struct super_block *sb, int flags); ++int aufs_read_lock(struct dentry *dentry, int flags); ++void aufs_read_unlock(struct dentry *dentry, int flags); ++void aufs_write_lock(struct dentry *dentry); ++void aufs_write_unlock(struct dentry *dentry); ++int aufs_read_and_write_lock2(struct dentry *d1, struct dentry *d2, int flags); ++void aufs_read_and_write_unlock2(struct dentry *d1, struct dentry *d2); ++ ++/* wbr_policy.c */ ++extern struct au_wbr_copyup_operations au_wbr_copyup_ops[]; ++extern struct au_wbr_create_operations au_wbr_create_ops[]; ++int au_cpdown_dirs(struct dentry *dentry, aufs_bindex_t bdst); ++int au_wbr_nonopq(struct dentry *dentry, aufs_bindex_t bindex); ++int au_wbr_do_copyup_bu(struct dentry *dentry, aufs_bindex_t bstart); ++ ++/* mvdown.c */ ++int au_mvdown(struct dentry *dentry, struct aufs_mvdown __user *arg); ++ ++#ifdef CONFIG_AUFS_FHSM ++/* fhsm.c */ ++ ++static inline pid_t au_fhsm_pid(struct au_fhsm *fhsm) ++{ ++ pid_t pid; ++ ++ spin_lock(&fhsm->fhsm_spin); ++ pid = fhsm->fhsm_pid; ++ spin_unlock(&fhsm->fhsm_spin); ++ ++ return pid; ++} ++ ++void au_fhsm_wrote(struct super_block *sb, aufs_bindex_t bindex, int force); ++void au_fhsm_wrote_all(struct super_block *sb, int force); ++int au_fhsm_fd(struct super_block *sb, int oflags); ++int au_fhsm_br_alloc(struct au_branch *br); ++void au_fhsm_set_bottom(struct super_block *sb, aufs_bindex_t bindex); ++void au_fhsm_fin(struct super_block *sb); ++void au_fhsm_init(struct au_sbinfo *sbinfo); ++void au_fhsm_set(struct au_sbinfo *sbinfo, unsigned int sec); ++void au_fhsm_show(struct seq_file *seq, struct au_sbinfo *sbinfo); ++#else ++AuStubVoid(au_fhsm_wrote, struct super_block *sb, aufs_bindex_t bindex, ++ int force) ++AuStubVoid(au_fhsm_wrote_all, struct super_block *sb, int force) ++AuStub(int, au_fhsm_fd, return -EOPNOTSUPP, struct super_block *sb, int oflags) ++AuStub(pid_t, au_fhsm_pid, return 0, struct au_fhsm *fhsm) ++AuStubInt0(au_fhsm_br_alloc, struct au_branch *br) ++AuStubVoid(au_fhsm_set_bottom, struct super_block *sb, aufs_bindex_t bindex) ++AuStubVoid(au_fhsm_fin, struct super_block *sb) ++AuStubVoid(au_fhsm_init, struct au_sbinfo *sbinfo) ++AuStubVoid(au_fhsm_set, struct au_sbinfo *sbinfo, unsigned int sec) ++AuStubVoid(au_fhsm_show, struct seq_file *seq, struct au_sbinfo *sbinfo) ++#endif ++ ++/* ---------------------------------------------------------------------- */ ++ ++static inline struct au_sbinfo *au_sbi(struct super_block *sb) ++{ ++ return sb->s_fs_info; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++#ifdef CONFIG_AUFS_EXPORT ++int au_test_nfsd(void); ++void au_export_init(struct super_block *sb); ++void au_xigen_inc(struct inode *inode); ++int au_xigen_new(struct inode *inode); ++int au_xigen_set(struct super_block *sb, struct file *base); ++void au_xigen_clr(struct super_block *sb); ++ ++static inline int au_busy_or_stale(void) ++{ ++ if (!au_test_nfsd()) ++ return -EBUSY; ++ return -ESTALE; ++} ++#else ++AuStubInt0(au_test_nfsd, void) ++AuStubVoid(au_export_init, struct super_block *sb) ++AuStubVoid(au_xigen_inc, struct inode *inode) ++AuStubInt0(au_xigen_new, struct inode *inode) ++AuStubInt0(au_xigen_set, struct super_block *sb, struct file *base) ++AuStubVoid(au_xigen_clr, struct super_block *sb) ++AuStub(int, au_busy_or_stale, return -EBUSY, void) ++#endif /* CONFIG_AUFS_EXPORT */ ++ ++/* ---------------------------------------------------------------------- */ ++ ++#ifdef CONFIG_AUFS_SBILIST ++/* module.c */ ++extern struct au_sphlhead au_sbilist; ++ ++static inline void au_sbilist_init(void) ++{ ++ au_sphl_init(&au_sbilist); ++} ++ ++static inline void au_sbilist_add(struct super_block *sb) ++{ ++ au_sphl_add(&au_sbi(sb)->si_list, &au_sbilist); ++} ++ ++static inline void au_sbilist_del(struct super_block *sb) ++{ ++ au_sphl_del(&au_sbi(sb)->si_list, &au_sbilist); ++} ++ ++#ifdef CONFIG_AUFS_MAGIC_SYSRQ ++static inline void au_sbilist_lock(void) ++{ ++ spin_lock(&au_sbilist.spin); ++} ++ ++static inline void au_sbilist_unlock(void) ++{ ++ spin_unlock(&au_sbilist.spin); ++} ++#define AuGFP_SBILIST GFP_ATOMIC ++#else ++AuStubVoid(au_sbilist_lock, void) ++AuStubVoid(au_sbilist_unlock, void) ++#define AuGFP_SBILIST GFP_NOFS ++#endif /* CONFIG_AUFS_MAGIC_SYSRQ */ ++#else ++AuStubVoid(au_sbilist_init, void) ++AuStubVoid(au_sbilist_add, struct super_block *sb) ++AuStubVoid(au_sbilist_del, struct super_block *sb) ++AuStubVoid(au_sbilist_lock, void) ++AuStubVoid(au_sbilist_unlock, void) ++#define AuGFP_SBILIST GFP_NOFS ++#endif ++ ++/* ---------------------------------------------------------------------- */ ++ ++static inline void dbgaufs_si_null(struct au_sbinfo *sbinfo) ++{ ++ /* ++ * This function is a dynamic '__init' function actually, ++ * so the tiny check for si_rwsem is unnecessary. ++ */ ++ /* AuRwMustWriteLock(&sbinfo->si_rwsem); */ ++#ifdef CONFIG_DEBUG_FS ++ sbinfo->si_dbgaufs = NULL; ++ sbinfo->si_dbgaufs_plink = NULL; ++ sbinfo->si_dbgaufs_xib = NULL; ++#ifdef CONFIG_AUFS_EXPORT ++ sbinfo->si_dbgaufs_xigen = NULL; ++#endif ++#endif ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++static inline void si_pid_idx_bit(int *idx, pid_t *bit) ++{ ++ /* the origin of pid is 1, but the bitmap's is 0 */ ++ *bit = current->pid - 1; ++ *idx = *bit / AU_PIDSTEP; ++ *bit %= AU_PIDSTEP; ++} ++ ++static inline int si_pid_test(struct super_block *sb) ++{ ++ pid_t bit; ++ int idx; ++ unsigned long *bitmap; ++ ++ si_pid_idx_bit(&idx, &bit); ++ bitmap = au_sbi(sb)->au_si_pid.pid_bitmap[idx]; ++ if (bitmap) ++ return test_bit(bit, bitmap); ++ return 0; ++} ++ ++static inline void si_pid_clr(struct super_block *sb) ++{ ++ pid_t bit; ++ int idx; ++ unsigned long *bitmap; ++ ++ si_pid_idx_bit(&idx, &bit); ++ bitmap = au_sbi(sb)->au_si_pid.pid_bitmap[idx]; ++ BUG_ON(!bitmap); ++ AuDebugOn(!test_bit(bit, bitmap)); ++ clear_bit(bit, bitmap); ++ /* smp_mb(); */ ++} ++ ++void si_pid_set(struct super_block *sb); ++ ++/* ---------------------------------------------------------------------- */ ++ ++/* lock superblock. mainly for entry point functions */ ++/* ++ * __si_read_lock, __si_write_lock, ++ * __si_read_unlock, __si_write_unlock, __si_downgrade_lock ++ */ ++AuSimpleRwsemFuncs(__si, struct super_block *sb, &au_sbi(sb)->si_rwsem); ++ ++#define SiMustNoWaiters(sb) AuRwMustNoWaiters(&au_sbi(sb)->si_rwsem) ++#define SiMustAnyLock(sb) AuRwMustAnyLock(&au_sbi(sb)->si_rwsem) ++#define SiMustWriteLock(sb) AuRwMustWriteLock(&au_sbi(sb)->si_rwsem) ++ ++static inline void si_noflush_read_lock(struct super_block *sb) ++{ ++ __si_read_lock(sb); ++ si_pid_set(sb); ++} ++ ++static inline int si_noflush_read_trylock(struct super_block *sb) ++{ ++ int locked; ++ ++ locked = __si_read_trylock(sb); ++ if (locked) ++ si_pid_set(sb); ++ return locked; ++} ++ ++static inline void si_noflush_write_lock(struct super_block *sb) ++{ ++ __si_write_lock(sb); ++ si_pid_set(sb); ++} ++ ++static inline int si_noflush_write_trylock(struct super_block *sb) ++{ ++ int locked; ++ ++ locked = __si_write_trylock(sb); ++ if (locked) ++ si_pid_set(sb); ++ return locked; ++} ++ ++#if 0 /* reserved */ ++static inline int si_read_trylock(struct super_block *sb, int flags) ++{ ++ if (au_ftest_lock(flags, FLUSH)) ++ au_nwt_flush(&au_sbi(sb)->si_nowait); ++ return si_noflush_read_trylock(sb); ++} ++#endif ++ ++static inline void si_read_unlock(struct super_block *sb) ++{ ++ si_pid_clr(sb); ++ __si_read_unlock(sb); ++} ++ ++#if 0 /* reserved */ ++static inline int si_write_trylock(struct super_block *sb, int flags) ++{ ++ if (au_ftest_lock(flags, FLUSH)) ++ au_nwt_flush(&au_sbi(sb)->si_nowait); ++ return si_noflush_write_trylock(sb); ++} ++#endif ++ ++static inline void si_write_unlock(struct super_block *sb) ++{ ++ si_pid_clr(sb); ++ __si_write_unlock(sb); ++} ++ ++#if 0 /* reserved */ ++static inline void si_downgrade_lock(struct super_block *sb) ++{ ++ __si_downgrade_lock(sb); ++} ++#endif ++ ++/* ---------------------------------------------------------------------- */ ++ ++static inline aufs_bindex_t au_sbend(struct super_block *sb) ++{ ++ SiMustAnyLock(sb); ++ return au_sbi(sb)->si_bend; ++} ++ ++static inline unsigned int au_mntflags(struct super_block *sb) ++{ ++ SiMustAnyLock(sb); ++ return au_sbi(sb)->si_mntflags; ++} ++ ++static inline unsigned int au_sigen(struct super_block *sb) ++{ ++ SiMustAnyLock(sb); ++ return au_sbi(sb)->si_generation; ++} ++ ++static inline void au_ninodes_inc(struct super_block *sb) ++{ ++ atomic_long_inc(&au_sbi(sb)->si_ninodes); ++} ++ ++static inline void au_ninodes_dec(struct super_block *sb) ++{ ++ AuDebugOn(!atomic_long_read(&au_sbi(sb)->si_ninodes)); ++ atomic_long_dec(&au_sbi(sb)->si_ninodes); ++} ++ ++static inline void au_nfiles_inc(struct super_block *sb) ++{ ++ atomic_long_inc(&au_sbi(sb)->si_nfiles); ++} ++ ++static inline void au_nfiles_dec(struct super_block *sb) ++{ ++ AuDebugOn(!atomic_long_read(&au_sbi(sb)->si_nfiles)); ++ atomic_long_dec(&au_sbi(sb)->si_nfiles); ++} ++ ++static inline struct au_branch *au_sbr(struct super_block *sb, ++ aufs_bindex_t bindex) ++{ ++ SiMustAnyLock(sb); ++ return au_sbi(sb)->si_branch[0 + bindex]; ++} ++ ++static inline void au_xino_brid_set(struct super_block *sb, aufs_bindex_t brid) ++{ ++ SiMustWriteLock(sb); ++ au_sbi(sb)->si_xino_brid = brid; ++} ++ ++static inline aufs_bindex_t au_xino_brid(struct super_block *sb) ++{ ++ SiMustAnyLock(sb); ++ return au_sbi(sb)->si_xino_brid; ++} ++ ++#endif /* __KERNEL__ */ ++#endif /* __AUFS_SUPER_H__ */ +diff --git a/fs/aufs/sysaufs.c b/fs/aufs/sysaufs.c +new file mode 100644 +index 0000000..75c9c24 +--- /dev/null ++++ b/fs/aufs/sysaufs.c +@@ -0,0 +1,104 @@ ++/* ++ * Copyright (C) 2005-2016 Junjiro R. Okajima ++ * ++ * This program, aufs is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . ++ */ ++ ++/* ++ * sysfs interface and lifetime management ++ * they are necessary regardless sysfs is disabled. ++ */ ++ ++#include ++#include "aufs.h" ++ ++unsigned long sysaufs_si_mask; ++struct kset *sysaufs_kset; ++ ++#define AuSiAttr(_name) { \ ++ .attr = { .name = __stringify(_name), .mode = 0444 }, \ ++ .show = sysaufs_si_##_name, \ ++} ++ ++static struct sysaufs_si_attr sysaufs_si_attr_xi_path = AuSiAttr(xi_path); ++struct attribute *sysaufs_si_attrs[] = { ++ &sysaufs_si_attr_xi_path.attr, ++ NULL, ++}; ++ ++static const struct sysfs_ops au_sbi_ops = { ++ .show = sysaufs_si_show ++}; ++ ++static struct kobj_type au_sbi_ktype = { ++ .release = au_si_free, ++ .sysfs_ops = &au_sbi_ops, ++ .default_attrs = sysaufs_si_attrs ++}; ++ ++/* ---------------------------------------------------------------------- */ ++ ++int sysaufs_si_init(struct au_sbinfo *sbinfo) ++{ ++ int err; ++ ++ sbinfo->si_kobj.kset = sysaufs_kset; ++ /* cf. sysaufs_name() */ ++ err = kobject_init_and_add ++ (&sbinfo->si_kobj, &au_sbi_ktype, /*&sysaufs_kset->kobj*/NULL, ++ SysaufsSiNamePrefix "%lx", sysaufs_si_id(sbinfo)); ++ ++ dbgaufs_si_null(sbinfo); ++ if (!err) { ++ err = dbgaufs_si_init(sbinfo); ++ if (unlikely(err)) ++ kobject_put(&sbinfo->si_kobj); ++ } ++ return err; ++} ++ ++void sysaufs_fin(void) ++{ ++ dbgaufs_fin(); ++ sysfs_remove_group(&sysaufs_kset->kobj, sysaufs_attr_group); ++ kset_unregister(sysaufs_kset); ++} ++ ++int __init sysaufs_init(void) ++{ ++ int err; ++ ++ do { ++ get_random_bytes(&sysaufs_si_mask, sizeof(sysaufs_si_mask)); ++ } while (!sysaufs_si_mask); ++ ++ err = -EINVAL; ++ sysaufs_kset = kset_create_and_add(AUFS_NAME, NULL, fs_kobj); ++ if (unlikely(!sysaufs_kset)) ++ goto out; ++ err = PTR_ERR(sysaufs_kset); ++ if (IS_ERR(sysaufs_kset)) ++ goto out; ++ err = sysfs_create_group(&sysaufs_kset->kobj, sysaufs_attr_group); ++ if (unlikely(err)) { ++ kset_unregister(sysaufs_kset); ++ goto out; ++ } ++ ++ err = dbgaufs_init(); ++ if (unlikely(err)) ++ sysaufs_fin(); ++out: ++ return err; ++} +diff --git a/fs/aufs/sysaufs.h b/fs/aufs/sysaufs.h +new file mode 100644 +index 0000000..14975c9 +--- /dev/null ++++ b/fs/aufs/sysaufs.h +@@ -0,0 +1,101 @@ ++/* ++ * Copyright (C) 2005-2016 Junjiro R. Okajima ++ * ++ * This program, aufs is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . ++ */ ++ ++/* ++ * sysfs interface and mount lifetime management ++ */ ++ ++#ifndef __SYSAUFS_H__ ++#define __SYSAUFS_H__ ++ ++#ifdef __KERNEL__ ++ ++#include ++#include "module.h" ++ ++struct super_block; ++struct au_sbinfo; ++ ++struct sysaufs_si_attr { ++ struct attribute attr; ++ int (*show)(struct seq_file *seq, struct super_block *sb); ++}; ++ ++/* ---------------------------------------------------------------------- */ ++ ++/* sysaufs.c */ ++extern unsigned long sysaufs_si_mask; ++extern struct kset *sysaufs_kset; ++extern struct attribute *sysaufs_si_attrs[]; ++int sysaufs_si_init(struct au_sbinfo *sbinfo); ++int __init sysaufs_init(void); ++void sysaufs_fin(void); ++ ++/* ---------------------------------------------------------------------- */ ++ ++/* some people doesn't like to show a pointer in kernel */ ++static inline unsigned long sysaufs_si_id(struct au_sbinfo *sbinfo) ++{ ++ return sysaufs_si_mask ^ (unsigned long)sbinfo; ++} ++ ++#define SysaufsSiNamePrefix "si_" ++#define SysaufsSiNameLen (sizeof(SysaufsSiNamePrefix) + 16) ++static inline void sysaufs_name(struct au_sbinfo *sbinfo, char *name) ++{ ++ snprintf(name, SysaufsSiNameLen, SysaufsSiNamePrefix "%lx", ++ sysaufs_si_id(sbinfo)); ++} ++ ++struct au_branch; ++#ifdef CONFIG_SYSFS ++/* sysfs.c */ ++extern struct attribute_group *sysaufs_attr_group; ++ ++int sysaufs_si_xi_path(struct seq_file *seq, struct super_block *sb); ++ssize_t sysaufs_si_show(struct kobject *kobj, struct attribute *attr, ++ char *buf); ++long au_brinfo_ioctl(struct file *file, unsigned long arg); ++#ifdef CONFIG_COMPAT ++long au_brinfo_compat_ioctl(struct file *file, unsigned long arg); ++#endif ++ ++void sysaufs_br_init(struct au_branch *br); ++void sysaufs_brs_add(struct super_block *sb, aufs_bindex_t bindex); ++void sysaufs_brs_del(struct super_block *sb, aufs_bindex_t bindex); ++ ++#define sysaufs_brs_init() do {} while (0) ++ ++#else ++#define sysaufs_attr_group NULL ++ ++AuStubInt0(sysaufs_si_xi_path, struct seq_file *seq, struct super_block *sb) ++AuStub(ssize_t, sysaufs_si_show, return 0, struct kobject *kobj, ++ struct attribute *attr, char *buf) ++AuStubVoid(sysaufs_br_init, struct au_branch *br) ++AuStubVoid(sysaufs_brs_add, struct super_block *sb, aufs_bindex_t bindex) ++AuStubVoid(sysaufs_brs_del, struct super_block *sb, aufs_bindex_t bindex) ++ ++static inline void sysaufs_brs_init(void) ++{ ++ sysaufs_brs = 0; ++} ++ ++#endif /* CONFIG_SYSFS */ ++ ++#endif /* __KERNEL__ */ ++#endif /* __SYSAUFS_H__ */ +diff --git a/fs/aufs/sysfs.c b/fs/aufs/sysfs.c +new file mode 100644 +index 0000000..b2d1888 +--- /dev/null ++++ b/fs/aufs/sysfs.c +@@ -0,0 +1,376 @@ ++/* ++ * Copyright (C) 2005-2016 Junjiro R. Okajima ++ * ++ * This program, aufs is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . ++ */ ++ ++/* ++ * sysfs interface ++ */ ++ ++#include ++#include ++#include "aufs.h" ++ ++#ifdef CONFIG_AUFS_FS_MODULE ++/* this entry violates the "one line per file" policy of sysfs */ ++static ssize_t config_show(struct kobject *kobj, struct kobj_attribute *attr, ++ char *buf) ++{ ++ ssize_t err; ++ static char *conf = ++/* this file is generated at compiling */ ++#include "conf.str" ++ ; ++ ++ err = snprintf(buf, PAGE_SIZE, conf); ++ if (unlikely(err >= PAGE_SIZE)) ++ err = -EFBIG; ++ return err; ++} ++ ++static struct kobj_attribute au_config_attr = __ATTR_RO(config); ++#endif ++ ++static struct attribute *au_attr[] = { ++#ifdef CONFIG_AUFS_FS_MODULE ++ &au_config_attr.attr, ++#endif ++ NULL, /* need to NULL terminate the list of attributes */ ++}; ++ ++static struct attribute_group sysaufs_attr_group_body = { ++ .attrs = au_attr ++}; ++ ++struct attribute_group *sysaufs_attr_group = &sysaufs_attr_group_body; ++ ++/* ---------------------------------------------------------------------- */ ++ ++int sysaufs_si_xi_path(struct seq_file *seq, struct super_block *sb) ++{ ++ int err; ++ ++ SiMustAnyLock(sb); ++ ++ err = 0; ++ if (au_opt_test(au_mntflags(sb), XINO)) { ++ err = au_xino_path(seq, au_sbi(sb)->si_xib); ++ seq_putc(seq, '\n'); ++ } ++ return err; ++} ++ ++/* ++ * the lifetime of branch is independent from the entry under sysfs. ++ * sysfs handles the lifetime of the entry, and never call ->show() after it is ++ * unlinked. ++ */ ++static int sysaufs_si_br(struct seq_file *seq, struct super_block *sb, ++ aufs_bindex_t bindex, int idx) ++{ ++ int err; ++ struct path path; ++ struct dentry *root; ++ struct au_branch *br; ++ au_br_perm_str_t perm; ++ ++ AuDbg("b%d\n", bindex); ++ ++ err = 0; ++ root = sb->s_root; ++ di_read_lock_parent(root, !AuLock_IR); ++ br = au_sbr(sb, bindex); ++ ++ switch (idx) { ++ case AuBrSysfs_BR: ++ path.mnt = au_br_mnt(br); ++ path.dentry = au_h_dptr(root, bindex); ++ err = au_seq_path(seq, &path); ++ if (!err) { ++ au_optstr_br_perm(&perm, br->br_perm); ++ err = seq_printf(seq, "=%s\n", perm.a); ++ } ++ break; ++ case AuBrSysfs_BRID: ++ err = seq_printf(seq, "%d\n", br->br_id); ++ break; ++ } ++ di_read_unlock(root, !AuLock_IR); ++ if (err == -1) ++ err = -E2BIG; ++ ++ return err; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++static struct seq_file *au_seq(char *p, ssize_t len) ++{ ++ struct seq_file *seq; ++ ++ seq = kzalloc(sizeof(*seq), GFP_NOFS); ++ if (seq) { ++ /* mutex_init(&seq.lock); */ ++ seq->buf = p; ++ seq->size = len; ++ return seq; /* success */ ++ } ++ ++ seq = ERR_PTR(-ENOMEM); ++ return seq; ++} ++ ++#define SysaufsBr_PREFIX "br" ++#define SysaufsBrid_PREFIX "brid" ++ ++/* todo: file size may exceed PAGE_SIZE */ ++ssize_t sysaufs_si_show(struct kobject *kobj, struct attribute *attr, ++ char *buf) ++{ ++ ssize_t err; ++ int idx; ++ long l; ++ aufs_bindex_t bend; ++ struct au_sbinfo *sbinfo; ++ struct super_block *sb; ++ struct seq_file *seq; ++ char *name; ++ struct attribute **cattr; ++ ++ sbinfo = container_of(kobj, struct au_sbinfo, si_kobj); ++ sb = sbinfo->si_sb; ++ ++ /* ++ * prevent a race condition between sysfs and aufs. ++ * for instance, sysfs_file_read() calls sysfs_get_active_two() which ++ * prohibits maintaining the sysfs entries. ++ * hew we acquire read lock after sysfs_get_active_two(). ++ * on the other hand, the remount process may maintain the sysfs/aufs ++ * entries after acquiring write lock. ++ * it can cause a deadlock. ++ * simply we gave up processing read here. ++ */ ++ err = -EBUSY; ++ if (unlikely(!si_noflush_read_trylock(sb))) ++ goto out; ++ ++ seq = au_seq(buf, PAGE_SIZE); ++ err = PTR_ERR(seq); ++ if (IS_ERR(seq)) ++ goto out_unlock; ++ ++ name = (void *)attr->name; ++ cattr = sysaufs_si_attrs; ++ while (*cattr) { ++ if (!strcmp(name, (*cattr)->name)) { ++ err = container_of(*cattr, struct sysaufs_si_attr, attr) ++ ->show(seq, sb); ++ goto out_seq; ++ } ++ cattr++; ++ } ++ ++ if (!strncmp(name, SysaufsBrid_PREFIX, ++ sizeof(SysaufsBrid_PREFIX) - 1)) { ++ idx = AuBrSysfs_BRID; ++ name += sizeof(SysaufsBrid_PREFIX) - 1; ++ } else if (!strncmp(name, SysaufsBr_PREFIX, ++ sizeof(SysaufsBr_PREFIX) - 1)) { ++ idx = AuBrSysfs_BR; ++ name += sizeof(SysaufsBr_PREFIX) - 1; ++ } else ++ BUG(); ++ ++ err = kstrtol(name, 10, &l); ++ if (!err) { ++ bend = au_sbend(sb); ++ if (l <= bend) ++ err = sysaufs_si_br(seq, sb, (aufs_bindex_t)l, idx); ++ else ++ err = -ENOENT; ++ } ++ ++out_seq: ++ if (!err) { ++ err = seq->count; ++ /* sysfs limit */ ++ if (unlikely(err == PAGE_SIZE)) ++ err = -EFBIG; ++ } ++ kfree(seq); ++out_unlock: ++ si_read_unlock(sb); ++out: ++ return err; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++static int au_brinfo(struct super_block *sb, union aufs_brinfo __user *arg) ++{ ++ int err; ++ int16_t brid; ++ aufs_bindex_t bindex, bend; ++ size_t sz; ++ char *buf; ++ struct seq_file *seq; ++ struct au_branch *br; ++ ++ si_read_lock(sb, AuLock_FLUSH); ++ bend = au_sbend(sb); ++ err = bend + 1; ++ if (!arg) ++ goto out; ++ ++ err = -ENOMEM; ++ buf = (void *)__get_free_page(GFP_NOFS); ++ if (unlikely(!buf)) ++ goto out; ++ ++ seq = au_seq(buf, PAGE_SIZE); ++ err = PTR_ERR(seq); ++ if (IS_ERR(seq)) ++ goto out_buf; ++ ++ sz = sizeof(*arg) - offsetof(union aufs_brinfo, path); ++ for (bindex = 0; bindex <= bend; bindex++, arg++) { ++ err = !access_ok(VERIFY_WRITE, arg, sizeof(*arg)); ++ if (unlikely(err)) ++ break; ++ ++ br = au_sbr(sb, bindex); ++ brid = br->br_id; ++ BUILD_BUG_ON(sizeof(brid) != sizeof(arg->id)); ++ err = __put_user(brid, &arg->id); ++ if (unlikely(err)) ++ break; ++ ++ BUILD_BUG_ON(sizeof(br->br_perm) != sizeof(arg->perm)); ++ err = __put_user(br->br_perm, &arg->perm); ++ if (unlikely(err)) ++ break; ++ ++ err = au_seq_path(seq, &br->br_path); ++ if (unlikely(err)) ++ break; ++ err = seq_putc(seq, '\0'); ++ if (!err && seq->count <= sz) { ++ err = copy_to_user(arg->path, seq->buf, seq->count); ++ seq->count = 0; ++ if (unlikely(err)) ++ break; ++ } else { ++ err = -E2BIG; ++ goto out_seq; ++ } ++ } ++ if (unlikely(err)) ++ err = -EFAULT; ++ ++out_seq: ++ kfree(seq); ++out_buf: ++ free_page((unsigned long)buf); ++out: ++ si_read_unlock(sb); ++ return err; ++} ++ ++long au_brinfo_ioctl(struct file *file, unsigned long arg) ++{ ++ return au_brinfo(file->f_dentry->d_sb, (void __user *)arg); ++} ++ ++#ifdef CONFIG_COMPAT ++long au_brinfo_compat_ioctl(struct file *file, unsigned long arg) ++{ ++ return au_brinfo(file->f_dentry->d_sb, compat_ptr(arg)); ++} ++#endif ++ ++/* ---------------------------------------------------------------------- */ ++ ++void sysaufs_br_init(struct au_branch *br) ++{ ++ int i; ++ struct au_brsysfs *br_sysfs; ++ struct attribute *attr; ++ ++ br_sysfs = br->br_sysfs; ++ for (i = 0; i < ARRAY_SIZE(br->br_sysfs); i++) { ++ attr = &br_sysfs->attr; ++ sysfs_attr_init(attr); ++ attr->name = br_sysfs->name; ++ attr->mode = S_IRUGO; ++ br_sysfs++; ++ } ++} ++ ++void sysaufs_brs_del(struct super_block *sb, aufs_bindex_t bindex) ++{ ++ struct au_branch *br; ++ struct kobject *kobj; ++ struct au_brsysfs *br_sysfs; ++ int i; ++ aufs_bindex_t bend; ++ ++ dbgaufs_brs_del(sb, bindex); ++ ++ if (!sysaufs_brs) ++ return; ++ ++ kobj = &au_sbi(sb)->si_kobj; ++ bend = au_sbend(sb); ++ for (; bindex <= bend; bindex++) { ++ br = au_sbr(sb, bindex); ++ br_sysfs = br->br_sysfs; ++ for (i = 0; i < ARRAY_SIZE(br->br_sysfs); i++) { ++ sysfs_remove_file(kobj, &br_sysfs->attr); ++ br_sysfs++; ++ } ++ } ++} ++ ++void sysaufs_brs_add(struct super_block *sb, aufs_bindex_t bindex) ++{ ++ int err, i; ++ aufs_bindex_t bend; ++ struct kobject *kobj; ++ struct au_branch *br; ++ struct au_brsysfs *br_sysfs; ++ ++ dbgaufs_brs_add(sb, bindex); ++ ++ if (!sysaufs_brs) ++ return; ++ ++ kobj = &au_sbi(sb)->si_kobj; ++ bend = au_sbend(sb); ++ for (; bindex <= bend; bindex++) { ++ br = au_sbr(sb, bindex); ++ br_sysfs = br->br_sysfs; ++ snprintf(br_sysfs[AuBrSysfs_BR].name, sizeof(br_sysfs->name), ++ SysaufsBr_PREFIX "%d", bindex); ++ snprintf(br_sysfs[AuBrSysfs_BRID].name, sizeof(br_sysfs->name), ++ SysaufsBrid_PREFIX "%d", bindex); ++ for (i = 0; i < ARRAY_SIZE(br->br_sysfs); i++) { ++ err = sysfs_create_file(kobj, &br_sysfs->attr); ++ if (unlikely(err)) ++ pr_warn("failed %s under sysfs(%d)\n", ++ br_sysfs->name, err); ++ br_sysfs++; ++ } ++ } ++} +diff --git a/fs/aufs/sysrq.c b/fs/aufs/sysrq.c +new file mode 100644 +index 0000000..057c23e +--- /dev/null ++++ b/fs/aufs/sysrq.c +@@ -0,0 +1,157 @@ ++/* ++ * Copyright (C) 2005-2016 Junjiro R. Okajima ++ * ++ * This program, aufs is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . ++ */ ++ ++/* ++ * magic sysrq hanlder ++ */ ++ ++/* #include */ ++#include ++#include "aufs.h" ++ ++/* ---------------------------------------------------------------------- */ ++ ++static void sysrq_sb(struct super_block *sb) ++{ ++ char *plevel; ++ struct au_sbinfo *sbinfo; ++ struct file *file; ++ struct au_sphlhead *files; ++ struct au_finfo *finfo; ++ ++ plevel = au_plevel; ++ au_plevel = KERN_WARNING; ++ ++ /* since we define pr_fmt, call printk directly */ ++#define pr(str) printk(KERN_WARNING AUFS_NAME ": " str) ++ ++ sbinfo = au_sbi(sb); ++ printk(KERN_WARNING "si=%lx\n", sysaufs_si_id(sbinfo)); ++ pr("superblock\n"); ++ au_dpri_sb(sb); ++ ++#if 0 ++ pr("root dentry\n"); ++ au_dpri_dentry(sb->s_root); ++ pr("root inode\n"); ++ au_dpri_inode(sb->s_root->d_inode); ++#endif ++ ++#if 0 ++ do { ++ int err, i, j, ndentry; ++ struct au_dcsub_pages dpages; ++ struct au_dpage *dpage; ++ ++ err = au_dpages_init(&dpages, GFP_ATOMIC); ++ if (unlikely(err)) ++ break; ++ err = au_dcsub_pages(&dpages, sb->s_root, NULL, NULL); ++ if (!err) ++ for (i = 0; i < dpages.ndpage; i++) { ++ dpage = dpages.dpages + i; ++ ndentry = dpage->ndentry; ++ for (j = 0; j < ndentry; j++) ++ au_dpri_dentry(dpage->dentries[j]); ++ } ++ au_dpages_free(&dpages); ++ } while (0); ++#endif ++ ++#if 1 ++ { ++ struct inode *i; ++ ++ pr("isolated inode\n"); ++ spin_lock(&inode_sb_list_lock); ++ list_for_each_entry(i, &sb->s_inodes, i_sb_list) { ++ spin_lock(&i->i_lock); ++ if (1 || hlist_empty(&i->i_dentry)) ++ au_dpri_inode(i); ++ spin_unlock(&i->i_lock); ++ } ++ spin_unlock(&inode_sb_list_lock); ++ } ++#endif ++ pr("files\n"); ++ files = &au_sbi(sb)->si_files; ++ spin_lock(&files->spin); ++ hlist_for_each_entry(finfo, &files->head, fi_hlist) { ++ umode_t mode; ++ ++ file = finfo->fi_file; ++ mode = file_inode(file)->i_mode; ++ if (!special_file(mode)) ++ au_dpri_file(file); ++ } ++ spin_unlock(&files->spin); ++ pr("done\n"); ++ ++#undef pr ++ au_plevel = plevel; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++/* module parameter */ ++static char *aufs_sysrq_key = "a"; ++module_param_named(sysrq, aufs_sysrq_key, charp, S_IRUGO); ++MODULE_PARM_DESC(sysrq, "MagicSysRq key for " AUFS_NAME); ++ ++static void au_sysrq(int key __maybe_unused) ++{ ++ struct au_sbinfo *sbinfo; ++ ++ lockdep_off(); ++ au_sbilist_lock(); ++ hlist_for_each_entry(sbinfo, &au_sbilist.head, si_list) ++ sysrq_sb(sbinfo->si_sb); ++ au_sbilist_unlock(); ++ lockdep_on(); ++} ++ ++static struct sysrq_key_op au_sysrq_op = { ++ .handler = au_sysrq, ++ .help_msg = "Aufs", ++ .action_msg = "Aufs", ++ .enable_mask = SYSRQ_ENABLE_DUMP ++}; ++ ++/* ---------------------------------------------------------------------- */ ++ ++int __init au_sysrq_init(void) ++{ ++ int err; ++ char key; ++ ++ err = -1; ++ key = *aufs_sysrq_key; ++ if ('a' <= key && key <= 'z') ++ err = register_sysrq_key(key, &au_sysrq_op); ++ if (unlikely(err)) ++ pr_err("err %d, sysrq=%c\n", err, key); ++ return err; ++} ++ ++void au_sysrq_fin(void) ++{ ++ int err; ++ ++ err = unregister_sysrq_key(*aufs_sysrq_key, &au_sysrq_op); ++ if (unlikely(err)) ++ pr_err("err %d (ignored)\n", err); ++} +diff --git a/fs/aufs/vdir.c b/fs/aufs/vdir.c +new file mode 100644 +index 0000000..f942d16 +--- /dev/null ++++ b/fs/aufs/vdir.c +@@ -0,0 +1,888 @@ ++/* ++ * Copyright (C) 2005-2016 Junjiro R. Okajima ++ * ++ * This program, aufs is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . ++ */ ++ ++/* ++ * virtual or vertical directory ++ */ ++ ++#include "aufs.h" ++ ++static unsigned int calc_size(int nlen) ++{ ++ return ALIGN(sizeof(struct au_vdir_de) + nlen, sizeof(ino_t)); ++} ++ ++static int set_deblk_end(union au_vdir_deblk_p *p, ++ union au_vdir_deblk_p *deblk_end) ++{ ++ if (calc_size(0) <= deblk_end->deblk - p->deblk) { ++ p->de->de_str.len = 0; ++ /* smp_mb(); */ ++ return 0; ++ } ++ return -1; /* error */ ++} ++ ++/* returns true or false */ ++static int is_deblk_end(union au_vdir_deblk_p *p, ++ union au_vdir_deblk_p *deblk_end) ++{ ++ if (calc_size(0) <= deblk_end->deblk - p->deblk) ++ return !p->de->de_str.len; ++ return 1; ++} ++ ++static unsigned char *last_deblk(struct au_vdir *vdir) ++{ ++ return vdir->vd_deblk[vdir->vd_nblk - 1]; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++/* estimate the appropriate size for name hash table */ ++unsigned int au_rdhash_est(loff_t sz) ++{ ++ unsigned int n; ++ ++ n = UINT_MAX; ++ sz >>= 10; ++ if (sz < n) ++ n = sz; ++ if (sz < AUFS_RDHASH_DEF) ++ n = AUFS_RDHASH_DEF; ++ /* pr_info("n %u\n", n); */ ++ return n; ++} ++ ++/* ++ * the allocated memory has to be freed by ++ * au_nhash_wh_free() or au_nhash_de_free(). ++ */ ++int au_nhash_alloc(struct au_nhash *nhash, unsigned int num_hash, gfp_t gfp) ++{ ++ struct hlist_head *head; ++ unsigned int u; ++ size_t sz; ++ ++ sz = sizeof(*nhash->nh_head) * num_hash; ++ head = kmalloc(sz, gfp); ++ if (head) { ++ nhash->nh_num = num_hash; ++ nhash->nh_head = head; ++ for (u = 0; u < num_hash; u++) ++ INIT_HLIST_HEAD(head++); ++ return 0; /* success */ ++ } ++ ++ return -ENOMEM; ++} ++ ++static void nhash_count(struct hlist_head *head) ++{ ++#if 0 ++ unsigned long n; ++ struct hlist_node *pos; ++ ++ n = 0; ++ hlist_for_each(pos, head) ++ n++; ++ pr_info("%lu\n", n); ++#endif ++} ++ ++static void au_nhash_wh_do_free(struct hlist_head *head) ++{ ++ struct au_vdir_wh *pos; ++ struct hlist_node *node; ++ ++ hlist_for_each_entry_safe(pos, node, head, wh_hash) ++ kfree(pos); ++} ++ ++static void au_nhash_de_do_free(struct hlist_head *head) ++{ ++ struct au_vdir_dehstr *pos; ++ struct hlist_node *node; ++ ++ hlist_for_each_entry_safe(pos, node, head, hash) ++ au_cache_free_vdir_dehstr(pos); ++} ++ ++static void au_nhash_do_free(struct au_nhash *nhash, ++ void (*free)(struct hlist_head *head)) ++{ ++ unsigned int n; ++ struct hlist_head *head; ++ ++ n = nhash->nh_num; ++ if (!n) ++ return; ++ ++ head = nhash->nh_head; ++ while (n-- > 0) { ++ nhash_count(head); ++ free(head++); ++ } ++ kfree(nhash->nh_head); ++} ++ ++void au_nhash_wh_free(struct au_nhash *whlist) ++{ ++ au_nhash_do_free(whlist, au_nhash_wh_do_free); ++} ++ ++static void au_nhash_de_free(struct au_nhash *delist) ++{ ++ au_nhash_do_free(delist, au_nhash_de_do_free); ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++int au_nhash_test_longer_wh(struct au_nhash *whlist, aufs_bindex_t btgt, ++ int limit) ++{ ++ int num; ++ unsigned int u, n; ++ struct hlist_head *head; ++ struct au_vdir_wh *pos; ++ ++ num = 0; ++ n = whlist->nh_num; ++ head = whlist->nh_head; ++ for (u = 0; u < n; u++, head++) ++ hlist_for_each_entry(pos, head, wh_hash) ++ if (pos->wh_bindex == btgt && ++num > limit) ++ return 1; ++ return 0; ++} ++ ++static struct hlist_head *au_name_hash(struct au_nhash *nhash, ++ unsigned char *name, ++ unsigned int len) ++{ ++ unsigned int v; ++ /* const unsigned int magic_bit = 12; */ ++ ++ AuDebugOn(!nhash->nh_num || !nhash->nh_head); ++ ++ v = 0; ++ while (len--) ++ v += *name++; ++ /* v = hash_long(v, magic_bit); */ ++ v %= nhash->nh_num; ++ return nhash->nh_head + v; ++} ++ ++static int au_nhash_test_name(struct au_vdir_destr *str, const char *name, ++ int nlen) ++{ ++ return str->len == nlen && !memcmp(str->name, name, nlen); ++} ++ ++/* returns found or not */ ++int au_nhash_test_known_wh(struct au_nhash *whlist, char *name, int nlen) ++{ ++ struct hlist_head *head; ++ struct au_vdir_wh *pos; ++ struct au_vdir_destr *str; ++ ++ head = au_name_hash(whlist, name, nlen); ++ hlist_for_each_entry(pos, head, wh_hash) { ++ str = &pos->wh_str; ++ AuDbg("%.*s\n", str->len, str->name); ++ if (au_nhash_test_name(str, name, nlen)) ++ return 1; ++ } ++ return 0; ++} ++ ++/* returns found(true) or not */ ++static int test_known(struct au_nhash *delist, char *name, int nlen) ++{ ++ struct hlist_head *head; ++ struct au_vdir_dehstr *pos; ++ struct au_vdir_destr *str; ++ ++ head = au_name_hash(delist, name, nlen); ++ hlist_for_each_entry(pos, head, hash) { ++ str = pos->str; ++ AuDbg("%.*s\n", str->len, str->name); ++ if (au_nhash_test_name(str, name, nlen)) ++ return 1; ++ } ++ return 0; ++} ++ ++static void au_shwh_init_wh(struct au_vdir_wh *wh, ino_t ino, ++ unsigned char d_type) ++{ ++#ifdef CONFIG_AUFS_SHWH ++ wh->wh_ino = ino; ++ wh->wh_type = d_type; ++#endif ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++int au_nhash_append_wh(struct au_nhash *whlist, char *name, int nlen, ino_t ino, ++ unsigned int d_type, aufs_bindex_t bindex, ++ unsigned char shwh) ++{ ++ int err; ++ struct au_vdir_destr *str; ++ struct au_vdir_wh *wh; ++ ++ AuDbg("%.*s\n", nlen, name); ++ AuDebugOn(!whlist->nh_num || !whlist->nh_head); ++ ++ err = -ENOMEM; ++ wh = kmalloc(sizeof(*wh) + nlen, GFP_NOFS); ++ if (unlikely(!wh)) ++ goto out; ++ ++ err = 0; ++ wh->wh_bindex = bindex; ++ if (shwh) ++ au_shwh_init_wh(wh, ino, d_type); ++ str = &wh->wh_str; ++ str->len = nlen; ++ memcpy(str->name, name, nlen); ++ hlist_add_head(&wh->wh_hash, au_name_hash(whlist, name, nlen)); ++ /* smp_mb(); */ ++ ++out: ++ return err; ++} ++ ++static int append_deblk(struct au_vdir *vdir) ++{ ++ int err; ++ unsigned long ul; ++ const unsigned int deblk_sz = vdir->vd_deblk_sz; ++ union au_vdir_deblk_p p, deblk_end; ++ unsigned char **o; ++ ++ err = -ENOMEM; ++ o = krealloc(vdir->vd_deblk, sizeof(*o) * (vdir->vd_nblk + 1), ++ GFP_NOFS); ++ if (unlikely(!o)) ++ goto out; ++ ++ vdir->vd_deblk = o; ++ p.deblk = kmalloc(deblk_sz, GFP_NOFS); ++ if (p.deblk) { ++ ul = vdir->vd_nblk++; ++ vdir->vd_deblk[ul] = p.deblk; ++ vdir->vd_last.ul = ul; ++ vdir->vd_last.p.deblk = p.deblk; ++ deblk_end.deblk = p.deblk + deblk_sz; ++ err = set_deblk_end(&p, &deblk_end); ++ } ++ ++out: ++ return err; ++} ++ ++static int append_de(struct au_vdir *vdir, char *name, int nlen, ino_t ino, ++ unsigned int d_type, struct au_nhash *delist) ++{ ++ int err; ++ unsigned int sz; ++ const unsigned int deblk_sz = vdir->vd_deblk_sz; ++ union au_vdir_deblk_p p, *room, deblk_end; ++ struct au_vdir_dehstr *dehstr; ++ ++ p.deblk = last_deblk(vdir); ++ deblk_end.deblk = p.deblk + deblk_sz; ++ room = &vdir->vd_last.p; ++ AuDebugOn(room->deblk < p.deblk || deblk_end.deblk <= room->deblk ++ || !is_deblk_end(room, &deblk_end)); ++ ++ sz = calc_size(nlen); ++ if (unlikely(sz > deblk_end.deblk - room->deblk)) { ++ err = append_deblk(vdir); ++ if (unlikely(err)) ++ goto out; ++ ++ p.deblk = last_deblk(vdir); ++ deblk_end.deblk = p.deblk + deblk_sz; ++ /* smp_mb(); */ ++ AuDebugOn(room->deblk != p.deblk); ++ } ++ ++ err = -ENOMEM; ++ dehstr = au_cache_alloc_vdir_dehstr(); ++ if (unlikely(!dehstr)) ++ goto out; ++ ++ dehstr->str = &room->de->de_str; ++ hlist_add_head(&dehstr->hash, au_name_hash(delist, name, nlen)); ++ room->de->de_ino = ino; ++ room->de->de_type = d_type; ++ room->de->de_str.len = nlen; ++ memcpy(room->de->de_str.name, name, nlen); ++ ++ err = 0; ++ room->deblk += sz; ++ if (unlikely(set_deblk_end(room, &deblk_end))) ++ err = append_deblk(vdir); ++ /* smp_mb(); */ ++ ++out: ++ return err; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++void au_vdir_free(struct au_vdir *vdir) ++{ ++ unsigned char **deblk; ++ ++ deblk = vdir->vd_deblk; ++ while (vdir->vd_nblk--) ++ kfree(*deblk++); ++ kfree(vdir->vd_deblk); ++ au_cache_free_vdir(vdir); ++} ++ ++static struct au_vdir *alloc_vdir(struct file *file) ++{ ++ struct au_vdir *vdir; ++ struct super_block *sb; ++ int err; ++ ++ sb = file->f_dentry->d_sb; ++ SiMustAnyLock(sb); ++ ++ err = -ENOMEM; ++ vdir = au_cache_alloc_vdir(); ++ if (unlikely(!vdir)) ++ goto out; ++ ++ vdir->vd_deblk = kzalloc(sizeof(*vdir->vd_deblk), GFP_NOFS); ++ if (unlikely(!vdir->vd_deblk)) ++ goto out_free; ++ ++ vdir->vd_deblk_sz = au_sbi(sb)->si_rdblk; ++ if (!vdir->vd_deblk_sz) { ++ /* estimate the appropriate size for deblk */ ++ vdir->vd_deblk_sz = au_dir_size(file, /*dentry*/NULL); ++ /* pr_info("vd_deblk_sz %u\n", vdir->vd_deblk_sz); */ ++ } ++ vdir->vd_nblk = 0; ++ vdir->vd_version = 0; ++ vdir->vd_jiffy = 0; ++ err = append_deblk(vdir); ++ if (!err) ++ return vdir; /* success */ ++ ++ kfree(vdir->vd_deblk); ++ ++out_free: ++ au_cache_free_vdir(vdir); ++out: ++ vdir = ERR_PTR(err); ++ return vdir; ++} ++ ++static int reinit_vdir(struct au_vdir *vdir) ++{ ++ int err; ++ union au_vdir_deblk_p p, deblk_end; ++ ++ while (vdir->vd_nblk > 1) { ++ kfree(vdir->vd_deblk[vdir->vd_nblk - 1]); ++ /* vdir->vd_deblk[vdir->vd_nblk - 1] = NULL; */ ++ vdir->vd_nblk--; ++ } ++ p.deblk = vdir->vd_deblk[0]; ++ deblk_end.deblk = p.deblk + vdir->vd_deblk_sz; ++ err = set_deblk_end(&p, &deblk_end); ++ /* keep vd_dblk_sz */ ++ vdir->vd_last.ul = 0; ++ vdir->vd_last.p.deblk = vdir->vd_deblk[0]; ++ vdir->vd_version = 0; ++ vdir->vd_jiffy = 0; ++ /* smp_mb(); */ ++ return err; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++#define AuFillVdir_CALLED 1 ++#define AuFillVdir_WHABLE (1 << 1) ++#define AuFillVdir_SHWH (1 << 2) ++#define au_ftest_fillvdir(flags, name) ((flags) & AuFillVdir_##name) ++#define au_fset_fillvdir(flags, name) \ ++ do { (flags) |= AuFillVdir_##name; } while (0) ++#define au_fclr_fillvdir(flags, name) \ ++ do { (flags) &= ~AuFillVdir_##name; } while (0) ++ ++#ifndef CONFIG_AUFS_SHWH ++#undef AuFillVdir_SHWH ++#define AuFillVdir_SHWH 0 ++#endif ++ ++struct fillvdir_arg { ++ struct dir_context ctx; ++ struct file *file; ++ struct au_vdir *vdir; ++ struct au_nhash delist; ++ struct au_nhash whlist; ++ aufs_bindex_t bindex; ++ unsigned int flags; ++ int err; ++}; ++ ++static int fillvdir(struct dir_context *ctx, const char *__name, int nlen, ++ loff_t offset __maybe_unused, u64 h_ino, ++ unsigned int d_type) ++{ ++ struct fillvdir_arg *arg = container_of(ctx, struct fillvdir_arg, ctx); ++ char *name = (void *)__name; ++ struct super_block *sb; ++ ino_t ino; ++ const unsigned char shwh = !!au_ftest_fillvdir(arg->flags, SHWH); ++ ++ arg->err = 0; ++ sb = arg->file->f_dentry->d_sb; ++ au_fset_fillvdir(arg->flags, CALLED); ++ /* smp_mb(); */ ++ if (nlen <= AUFS_WH_PFX_LEN ++ || memcmp(name, AUFS_WH_PFX, AUFS_WH_PFX_LEN)) { ++ if (test_known(&arg->delist, name, nlen) ++ || au_nhash_test_known_wh(&arg->whlist, name, nlen)) ++ goto out; /* already exists or whiteouted */ ++ ++ arg->err = au_ino(sb, arg->bindex, h_ino, d_type, &ino); ++ if (!arg->err) { ++ if (unlikely(nlen > AUFS_MAX_NAMELEN)) ++ d_type = DT_UNKNOWN; ++ arg->err = append_de(arg->vdir, name, nlen, ino, ++ d_type, &arg->delist); ++ } ++ } else if (au_ftest_fillvdir(arg->flags, WHABLE)) { ++ name += AUFS_WH_PFX_LEN; ++ nlen -= AUFS_WH_PFX_LEN; ++ if (au_nhash_test_known_wh(&arg->whlist, name, nlen)) ++ goto out; /* already whiteouted */ ++ ++ if (shwh) ++ arg->err = au_wh_ino(sb, arg->bindex, h_ino, d_type, ++ &ino); ++ if (!arg->err) { ++ if (nlen <= AUFS_MAX_NAMELEN + AUFS_WH_PFX_LEN) ++ d_type = DT_UNKNOWN; ++ arg->err = au_nhash_append_wh ++ (&arg->whlist, name, nlen, ino, d_type, ++ arg->bindex, shwh); ++ } ++ } ++ ++out: ++ if (!arg->err) ++ arg->vdir->vd_jiffy = jiffies; ++ /* smp_mb(); */ ++ AuTraceErr(arg->err); ++ return arg->err; ++} ++ ++static int au_handle_shwh(struct super_block *sb, struct au_vdir *vdir, ++ struct au_nhash *whlist, struct au_nhash *delist) ++{ ++#ifdef CONFIG_AUFS_SHWH ++ int err; ++ unsigned int nh, u; ++ struct hlist_head *head; ++ struct au_vdir_wh *pos; ++ struct hlist_node *n; ++ char *p, *o; ++ struct au_vdir_destr *destr; ++ ++ AuDebugOn(!au_opt_test(au_mntflags(sb), SHWH)); ++ ++ err = -ENOMEM; ++ o = p = (void *)__get_free_page(GFP_NOFS); ++ if (unlikely(!p)) ++ goto out; ++ ++ err = 0; ++ nh = whlist->nh_num; ++ memcpy(p, AUFS_WH_PFX, AUFS_WH_PFX_LEN); ++ p += AUFS_WH_PFX_LEN; ++ for (u = 0; u < nh; u++) { ++ head = whlist->nh_head + u; ++ hlist_for_each_entry_safe(pos, n, head, wh_hash) { ++ destr = &pos->wh_str; ++ memcpy(p, destr->name, destr->len); ++ err = append_de(vdir, o, destr->len + AUFS_WH_PFX_LEN, ++ pos->wh_ino, pos->wh_type, delist); ++ if (unlikely(err)) ++ break; ++ } ++ } ++ ++ free_page((unsigned long)o); ++ ++out: ++ AuTraceErr(err); ++ return err; ++#else ++ return 0; ++#endif ++} ++ ++static int au_do_read_vdir(struct fillvdir_arg *arg) ++{ ++ int err; ++ unsigned int rdhash; ++ loff_t offset; ++ aufs_bindex_t bend, bindex, bstart; ++ unsigned char shwh; ++ struct file *hf, *file; ++ struct super_block *sb; ++ ++ file = arg->file; ++ sb = file->f_dentry->d_sb; ++ SiMustAnyLock(sb); ++ ++ rdhash = au_sbi(sb)->si_rdhash; ++ if (!rdhash) ++ rdhash = au_rdhash_est(au_dir_size(file, /*dentry*/NULL)); ++ err = au_nhash_alloc(&arg->delist, rdhash, GFP_NOFS); ++ if (unlikely(err)) ++ goto out; ++ err = au_nhash_alloc(&arg->whlist, rdhash, GFP_NOFS); ++ if (unlikely(err)) ++ goto out_delist; ++ ++ err = 0; ++ arg->flags = 0; ++ shwh = 0; ++ if (au_opt_test(au_mntflags(sb), SHWH)) { ++ shwh = 1; ++ au_fset_fillvdir(arg->flags, SHWH); ++ } ++ bstart = au_fbstart(file); ++ bend = au_fbend_dir(file); ++ for (bindex = bstart; !err && bindex <= bend; bindex++) { ++ hf = au_hf_dir(file, bindex); ++ if (!hf) ++ continue; ++ ++ offset = vfsub_llseek(hf, 0, SEEK_SET); ++ err = offset; ++ if (unlikely(offset)) ++ break; ++ ++ arg->bindex = bindex; ++ au_fclr_fillvdir(arg->flags, WHABLE); ++ if (shwh ++ || (bindex != bend ++ && au_br_whable(au_sbr_perm(sb, bindex)))) ++ au_fset_fillvdir(arg->flags, WHABLE); ++ do { ++ arg->err = 0; ++ au_fclr_fillvdir(arg->flags, CALLED); ++ /* smp_mb(); */ ++ err = vfsub_iterate_dir(hf, &arg->ctx); ++ if (err >= 0) ++ err = arg->err; ++ } while (!err && au_ftest_fillvdir(arg->flags, CALLED)); ++ ++ /* ++ * dir_relax() may be good for concurrency, but aufs should not ++ * use it since it will cause a lockdep problem. ++ */ ++ } ++ ++ if (!err && shwh) ++ err = au_handle_shwh(sb, arg->vdir, &arg->whlist, &arg->delist); ++ ++ au_nhash_wh_free(&arg->whlist); ++ ++out_delist: ++ au_nhash_de_free(&arg->delist); ++out: ++ return err; ++} ++ ++static int read_vdir(struct file *file, int may_read) ++{ ++ int err; ++ unsigned long expire; ++ unsigned char do_read; ++ struct fillvdir_arg arg = { ++ .ctx = { ++ .actor = au_diractor(fillvdir) ++ } ++ }; ++ struct inode *inode; ++ struct au_vdir *vdir, *allocated; ++ ++ err = 0; ++ inode = file_inode(file); ++ IMustLock(inode); ++ SiMustAnyLock(inode->i_sb); ++ ++ allocated = NULL; ++ do_read = 0; ++ expire = au_sbi(inode->i_sb)->si_rdcache; ++ vdir = au_ivdir(inode); ++ if (!vdir) { ++ do_read = 1; ++ vdir = alloc_vdir(file); ++ err = PTR_ERR(vdir); ++ if (IS_ERR(vdir)) ++ goto out; ++ err = 0; ++ allocated = vdir; ++ } else if (may_read ++ && (inode->i_version != vdir->vd_version ++ || time_after(jiffies, vdir->vd_jiffy + expire))) { ++ do_read = 1; ++ err = reinit_vdir(vdir); ++ if (unlikely(err)) ++ goto out; ++ } ++ ++ if (!do_read) ++ return 0; /* success */ ++ ++ arg.file = file; ++ arg.vdir = vdir; ++ err = au_do_read_vdir(&arg); ++ if (!err) { ++ /* file->f_pos = 0; */ /* todo: ctx->pos? */ ++ vdir->vd_version = inode->i_version; ++ vdir->vd_last.ul = 0; ++ vdir->vd_last.p.deblk = vdir->vd_deblk[0]; ++ if (allocated) ++ au_set_ivdir(inode, allocated); ++ } else if (allocated) ++ au_vdir_free(allocated); ++ ++out: ++ return err; ++} ++ ++static int copy_vdir(struct au_vdir *tgt, struct au_vdir *src) ++{ ++ int err, rerr; ++ unsigned long ul, n; ++ const unsigned int deblk_sz = src->vd_deblk_sz; ++ ++ AuDebugOn(tgt->vd_nblk != 1); ++ ++ err = -ENOMEM; ++ if (tgt->vd_nblk < src->vd_nblk) { ++ unsigned char **p; ++ ++ p = krealloc(tgt->vd_deblk, sizeof(*p) * src->vd_nblk, ++ GFP_NOFS); ++ if (unlikely(!p)) ++ goto out; ++ tgt->vd_deblk = p; ++ } ++ ++ if (tgt->vd_deblk_sz != deblk_sz) { ++ unsigned char *p; ++ ++ tgt->vd_deblk_sz = deblk_sz; ++ p = krealloc(tgt->vd_deblk[0], deblk_sz, GFP_NOFS); ++ if (unlikely(!p)) ++ goto out; ++ tgt->vd_deblk[0] = p; ++ } ++ memcpy(tgt->vd_deblk[0], src->vd_deblk[0], deblk_sz); ++ tgt->vd_version = src->vd_version; ++ tgt->vd_jiffy = src->vd_jiffy; ++ ++ n = src->vd_nblk; ++ for (ul = 1; ul < n; ul++) { ++ tgt->vd_deblk[ul] = kmemdup(src->vd_deblk[ul], deblk_sz, ++ GFP_NOFS); ++ if (unlikely(!tgt->vd_deblk[ul])) ++ goto out; ++ tgt->vd_nblk++; ++ } ++ tgt->vd_nblk = n; ++ tgt->vd_last.ul = tgt->vd_last.ul; ++ tgt->vd_last.p.deblk = tgt->vd_deblk[tgt->vd_last.ul]; ++ tgt->vd_last.p.deblk += src->vd_last.p.deblk ++ - src->vd_deblk[src->vd_last.ul]; ++ /* smp_mb(); */ ++ return 0; /* success */ ++ ++out: ++ rerr = reinit_vdir(tgt); ++ BUG_ON(rerr); ++ return err; ++} ++ ++int au_vdir_init(struct file *file) ++{ ++ int err; ++ struct inode *inode; ++ struct au_vdir *vdir_cache, *allocated; ++ ++ /* test file->f_pos here instead of ctx->pos */ ++ err = read_vdir(file, !file->f_pos); ++ if (unlikely(err)) ++ goto out; ++ ++ allocated = NULL; ++ vdir_cache = au_fvdir_cache(file); ++ if (!vdir_cache) { ++ vdir_cache = alloc_vdir(file); ++ err = PTR_ERR(vdir_cache); ++ if (IS_ERR(vdir_cache)) ++ goto out; ++ allocated = vdir_cache; ++ } else if (!file->f_pos && vdir_cache->vd_version != file->f_version) { ++ /* test file->f_pos here instead of ctx->pos */ ++ err = reinit_vdir(vdir_cache); ++ if (unlikely(err)) ++ goto out; ++ } else ++ return 0; /* success */ ++ ++ inode = file_inode(file); ++ err = copy_vdir(vdir_cache, au_ivdir(inode)); ++ if (!err) { ++ file->f_version = inode->i_version; ++ if (allocated) ++ au_set_fvdir_cache(file, allocated); ++ } else if (allocated) ++ au_vdir_free(allocated); ++ ++out: ++ return err; ++} ++ ++static loff_t calc_offset(struct au_vdir *vdir) ++{ ++ loff_t offset; ++ union au_vdir_deblk_p p; ++ ++ p.deblk = vdir->vd_deblk[vdir->vd_last.ul]; ++ offset = vdir->vd_last.p.deblk - p.deblk; ++ offset += vdir->vd_deblk_sz * vdir->vd_last.ul; ++ return offset; ++} ++ ++/* returns true or false */ ++static int seek_vdir(struct file *file, struct dir_context *ctx) ++{ ++ int valid; ++ unsigned int deblk_sz; ++ unsigned long ul, n; ++ loff_t offset; ++ union au_vdir_deblk_p p, deblk_end; ++ struct au_vdir *vdir_cache; ++ ++ valid = 1; ++ vdir_cache = au_fvdir_cache(file); ++ offset = calc_offset(vdir_cache); ++ AuDbg("offset %lld\n", offset); ++ if (ctx->pos == offset) ++ goto out; ++ ++ vdir_cache->vd_last.ul = 0; ++ vdir_cache->vd_last.p.deblk = vdir_cache->vd_deblk[0]; ++ if (!ctx->pos) ++ goto out; ++ ++ valid = 0; ++ deblk_sz = vdir_cache->vd_deblk_sz; ++ ul = div64_u64(ctx->pos, deblk_sz); ++ AuDbg("ul %lu\n", ul); ++ if (ul >= vdir_cache->vd_nblk) ++ goto out; ++ ++ n = vdir_cache->vd_nblk; ++ for (; ul < n; ul++) { ++ p.deblk = vdir_cache->vd_deblk[ul]; ++ deblk_end.deblk = p.deblk + deblk_sz; ++ offset = ul; ++ offset *= deblk_sz; ++ while (!is_deblk_end(&p, &deblk_end) && offset < ctx->pos) { ++ unsigned int l; ++ ++ l = calc_size(p.de->de_str.len); ++ offset += l; ++ p.deblk += l; ++ } ++ if (!is_deblk_end(&p, &deblk_end)) { ++ valid = 1; ++ vdir_cache->vd_last.ul = ul; ++ vdir_cache->vd_last.p = p; ++ break; ++ } ++ } ++ ++out: ++ /* smp_mb(); */ ++ AuTraceErr(!valid); ++ return valid; ++} ++ ++int au_vdir_fill_de(struct file *file, struct dir_context *ctx) ++{ ++ unsigned int l, deblk_sz; ++ union au_vdir_deblk_p deblk_end; ++ struct au_vdir *vdir_cache; ++ struct au_vdir_de *de; ++ ++ vdir_cache = au_fvdir_cache(file); ++ if (!seek_vdir(file, ctx)) ++ return 0; ++ ++ deblk_sz = vdir_cache->vd_deblk_sz; ++ while (1) { ++ deblk_end.deblk = vdir_cache->vd_deblk[vdir_cache->vd_last.ul]; ++ deblk_end.deblk += deblk_sz; ++ while (!is_deblk_end(&vdir_cache->vd_last.p, &deblk_end)) { ++ de = vdir_cache->vd_last.p.de; ++ AuDbg("%.*s, off%lld, i%lu, dt%d\n", ++ de->de_str.len, de->de_str.name, ctx->pos, ++ (unsigned long)de->de_ino, de->de_type); ++ if (unlikely(!dir_emit(ctx, de->de_str.name, ++ de->de_str.len, de->de_ino, ++ de->de_type))) { ++ /* todo: ignore the error caused by udba? */ ++ /* return err; */ ++ return 0; ++ } ++ ++ l = calc_size(de->de_str.len); ++ vdir_cache->vd_last.p.deblk += l; ++ ctx->pos += l; ++ } ++ if (vdir_cache->vd_last.ul < vdir_cache->vd_nblk - 1) { ++ vdir_cache->vd_last.ul++; ++ vdir_cache->vd_last.p.deblk ++ = vdir_cache->vd_deblk[vdir_cache->vd_last.ul]; ++ ctx->pos = deblk_sz * vdir_cache->vd_last.ul; ++ continue; ++ } ++ break; ++ } ++ ++ /* smp_mb(); */ ++ return 0; ++} +diff --git a/fs/aufs/vfsub.c b/fs/aufs/vfsub.c +new file mode 100644 +index 0000000..5fd008c +--- /dev/null ++++ b/fs/aufs/vfsub.c +@@ -0,0 +1,864 @@ ++/* ++ * Copyright (C) 2005-2016 Junjiro R. Okajima ++ * ++ * This program, aufs is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . ++ */ ++ ++/* ++ * sub-routines for VFS ++ */ ++ ++#include ++#include ++#include ++#include ++#include "../fs/mount.h" ++#include "aufs.h" ++ ++#ifdef CONFIG_AUFS_BR_FUSE ++int vfsub_test_mntns(struct vfsmount *mnt, struct super_block *h_sb) ++{ ++ struct nsproxy *ns; ++ ++ if (!au_test_fuse(h_sb) || !au_userns) ++ return 0; ++ ++ ns = current->nsproxy; ++ /* no {get,put}_nsproxy(ns) */ ++ return real_mount(mnt)->mnt_ns == ns->mnt_ns ? 0 : -EACCES; ++} ++#endif ++ ++/* ---------------------------------------------------------------------- */ ++ ++int vfsub_update_h_iattr(struct path *h_path, int *did) ++{ ++ int err; ++ struct kstat st; ++ struct super_block *h_sb; ++ ++ /* for remote fs, leave work for its getattr or d_revalidate */ ++ /* for bad i_attr fs, handle them in aufs_getattr() */ ++ /* still some fs may acquire i_mutex. we need to skip them */ ++ err = 0; ++ if (!did) ++ did = &err; ++ h_sb = h_path->dentry->d_sb; ++ *did = (!au_test_fs_remote(h_sb) && au_test_fs_refresh_iattr(h_sb)); ++ if (*did) ++ err = vfs_getattr(h_path, &st); ++ ++ return err; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++struct file *vfsub_dentry_open(struct path *path, int flags) ++{ ++ struct file *file; ++ ++ file = dentry_open(path, flags /* | __FMODE_NONOTIFY */, ++ current_cred()); ++ if (!IS_ERR_OR_NULL(file) ++ && (file->f_mode & (FMODE_READ | FMODE_WRITE)) == FMODE_READ) ++ i_readcount_inc(path->dentry->d_inode); ++ ++ return file; ++} ++ ++struct file *vfsub_filp_open(const char *path, int oflags, int mode) ++{ ++ struct file *file; ++ ++ lockdep_off(); ++ file = filp_open(path, ++ oflags /* | __FMODE_NONOTIFY */, ++ mode); ++ lockdep_on(); ++ if (IS_ERR(file)) ++ goto out; ++ vfsub_update_h_iattr(&file->f_path, /*did*/NULL); /*ignore*/ ++ ++out: ++ return file; ++} ++ ++/* ++ * Ideally this function should call VFS:do_last() in order to keep all its ++ * checkings. But it is very hard for aufs to regenerate several VFS internal ++ * structure such as nameidata. This is a second (or third) best approach. ++ * cf. linux/fs/namei.c:do_last(), lookup_open() and atomic_open(). ++ */ ++int vfsub_atomic_open(struct inode *dir, struct dentry *dentry, ++ struct vfsub_aopen_args *args, struct au_branch *br) ++{ ++ int err; ++ struct file *file = args->file; ++ /* copied from linux/fs/namei.c:atomic_open() */ ++ struct dentry *const DENTRY_NOT_SET = (void *)-1UL; ++ ++ IMustLock(dir); ++ AuDebugOn(!dir->i_op->atomic_open); ++ ++ err = au_br_test_oflag(args->open_flag, br); ++ if (unlikely(err)) ++ goto out; ++ ++ args->file->f_path.dentry = DENTRY_NOT_SET; ++ args->file->f_path.mnt = au_br_mnt(br); ++ err = dir->i_op->atomic_open(dir, dentry, file, args->open_flag, ++ args->create_mode, args->opened); ++ if (err >= 0) { ++ /* some filesystems don't set FILE_CREATED while succeeded? */ ++ if (*args->opened & FILE_CREATED) ++ fsnotify_create(dir, dentry); ++ } else ++ goto out; ++ ++ ++ if (!err) { ++ /* todo: call VFS:may_open() here */ ++ err = open_check_o_direct(file); ++ /* todo: ima_file_check() too? */ ++ if (!err && (args->open_flag & __FMODE_EXEC)) ++ err = deny_write_access(file); ++ if (unlikely(err)) ++ /* note that the file is created and still opened */ ++ goto out; ++ } ++ ++ atomic_inc(&br->br_count); ++ fsnotify_open(file); ++ ++out: ++ return err; ++} ++ ++int vfsub_kern_path(const char *name, unsigned int flags, struct path *path) ++{ ++ int err; ++ ++ err = kern_path(name, flags, path); ++ if (!err && path->dentry->d_inode) ++ vfsub_update_h_iattr(path, /*did*/NULL); /*ignore*/ ++ return err; ++} ++ ++struct dentry *vfsub_lookup_one_len(const char *name, struct dentry *parent, ++ int len) ++{ ++ struct path path = { ++ .mnt = NULL ++ }; ++ ++ /* VFS checks it too, but by WARN_ON_ONCE() */ ++ IMustLock(parent->d_inode); ++ ++ path.dentry = lookup_one_len(name, parent, len); ++ if (IS_ERR(path.dentry)) ++ goto out; ++ if (path.dentry->d_inode) ++ vfsub_update_h_iattr(&path, /*did*/NULL); /*ignore*/ ++ ++out: ++ AuTraceErrPtr(path.dentry); ++ return path.dentry; ++} ++ ++void vfsub_call_lkup_one(void *args) ++{ ++ struct vfsub_lkup_one_args *a = args; ++ *a->errp = vfsub_lkup_one(a->name, a->parent); ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++struct dentry *vfsub_lock_rename(struct dentry *d1, struct au_hinode *hdir1, ++ struct dentry *d2, struct au_hinode *hdir2) ++{ ++ struct dentry *d; ++ ++ lockdep_off(); ++ d = lock_rename(d1, d2); ++ lockdep_on(); ++ au_hn_suspend(hdir1); ++ if (hdir1 != hdir2) ++ au_hn_suspend(hdir2); ++ ++ return d; ++} ++ ++void vfsub_unlock_rename(struct dentry *d1, struct au_hinode *hdir1, ++ struct dentry *d2, struct au_hinode *hdir2) ++{ ++ au_hn_resume(hdir1); ++ if (hdir1 != hdir2) ++ au_hn_resume(hdir2); ++ lockdep_off(); ++ unlock_rename(d1, d2); ++ lockdep_on(); ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++int vfsub_create(struct inode *dir, struct path *path, int mode, bool want_excl) ++{ ++ int err; ++ struct dentry *d; ++ ++ IMustLock(dir); ++ ++ d = path->dentry; ++ path->dentry = d->d_parent; ++ err = security_path_mknod(path, d, mode, 0); ++ path->dentry = d; ++ if (unlikely(err)) ++ goto out; ++ ++ lockdep_off(); ++ err = vfs_create(dir, path->dentry, mode, want_excl); ++ lockdep_on(); ++ if (!err) { ++ struct path tmp = *path; ++ int did; ++ ++ vfsub_update_h_iattr(&tmp, &did); ++ if (did) { ++ tmp.dentry = path->dentry->d_parent; ++ vfsub_update_h_iattr(&tmp, /*did*/NULL); ++ } ++ /*ignore*/ ++ } ++ ++out: ++ return err; ++} ++ ++int vfsub_symlink(struct inode *dir, struct path *path, const char *symname) ++{ ++ int err; ++ struct dentry *d; ++ ++ IMustLock(dir); ++ ++ d = path->dentry; ++ path->dentry = d->d_parent; ++ err = security_path_symlink(path, d, symname); ++ path->dentry = d; ++ if (unlikely(err)) ++ goto out; ++ ++ lockdep_off(); ++ err = vfs_symlink(dir, path->dentry, symname); ++ lockdep_on(); ++ if (!err) { ++ struct path tmp = *path; ++ int did; ++ ++ vfsub_update_h_iattr(&tmp, &did); ++ if (did) { ++ tmp.dentry = path->dentry->d_parent; ++ vfsub_update_h_iattr(&tmp, /*did*/NULL); ++ } ++ /*ignore*/ ++ } ++ ++out: ++ return err; ++} ++ ++int vfsub_mknod(struct inode *dir, struct path *path, int mode, dev_t dev) ++{ ++ int err; ++ struct dentry *d; ++ ++ IMustLock(dir); ++ ++ d = path->dentry; ++ path->dentry = d->d_parent; ++ err = security_path_mknod(path, d, mode, new_encode_dev(dev)); ++ path->dentry = d; ++ if (unlikely(err)) ++ goto out; ++ ++ lockdep_off(); ++ err = vfs_mknod(dir, path->dentry, mode, dev); ++ lockdep_on(); ++ if (!err) { ++ struct path tmp = *path; ++ int did; ++ ++ vfsub_update_h_iattr(&tmp, &did); ++ if (did) { ++ tmp.dentry = path->dentry->d_parent; ++ vfsub_update_h_iattr(&tmp, /*did*/NULL); ++ } ++ /*ignore*/ ++ } ++ ++out: ++ return err; ++} ++ ++static int au_test_nlink(struct inode *inode) ++{ ++ const unsigned int link_max = UINT_MAX >> 1; /* rough margin */ ++ ++ if (!au_test_fs_no_limit_nlink(inode->i_sb) ++ || inode->i_nlink < link_max) ++ return 0; ++ return -EMLINK; ++} ++ ++int vfsub_link(struct dentry *src_dentry, struct inode *dir, struct path *path, ++ struct inode **delegated_inode) ++{ ++ int err; ++ struct dentry *d; ++ ++ IMustLock(dir); ++ ++ err = au_test_nlink(src_dentry->d_inode); ++ if (unlikely(err)) ++ return err; ++ ++ /* we don't call may_linkat() */ ++ d = path->dentry; ++ path->dentry = d->d_parent; ++ err = security_path_link(src_dentry, path, d); ++ path->dentry = d; ++ if (unlikely(err)) ++ goto out; ++ ++ lockdep_off(); ++ err = vfs_link(src_dentry, dir, path->dentry, delegated_inode); ++ lockdep_on(); ++ if (!err) { ++ struct path tmp = *path; ++ int did; ++ ++ /* fuse has different memory inode for the same inumber */ ++ vfsub_update_h_iattr(&tmp, &did); ++ if (did) { ++ tmp.dentry = path->dentry->d_parent; ++ vfsub_update_h_iattr(&tmp, /*did*/NULL); ++ tmp.dentry = src_dentry; ++ vfsub_update_h_iattr(&tmp, /*did*/NULL); ++ } ++ /*ignore*/ ++ } ++ ++out: ++ return err; ++} ++ ++int vfsub_rename(struct inode *src_dir, struct dentry *src_dentry, ++ struct inode *dir, struct path *path, ++ struct inode **delegated_inode) ++{ ++ int err; ++ struct path tmp = { ++ .mnt = path->mnt ++ }; ++ struct dentry *d; ++ ++ IMustLock(dir); ++ IMustLock(src_dir); ++ ++ d = path->dentry; ++ path->dentry = d->d_parent; ++ tmp.dentry = src_dentry->d_parent; ++ err = security_path_rename(&tmp, src_dentry, path, d, /*flags*/0); ++ path->dentry = d; ++ if (unlikely(err)) ++ goto out; ++ ++ lockdep_off(); ++ err = vfs_rename(src_dir, src_dentry, dir, path->dentry, ++ delegated_inode, /*flags*/0); ++ lockdep_on(); ++ if (!err) { ++ int did; ++ ++ tmp.dentry = d->d_parent; ++ vfsub_update_h_iattr(&tmp, &did); ++ if (did) { ++ tmp.dentry = src_dentry; ++ vfsub_update_h_iattr(&tmp, /*did*/NULL); ++ tmp.dentry = src_dentry->d_parent; ++ vfsub_update_h_iattr(&tmp, /*did*/NULL); ++ } ++ /*ignore*/ ++ } ++ ++out: ++ return err; ++} ++ ++int vfsub_mkdir(struct inode *dir, struct path *path, int mode) ++{ ++ int err; ++ struct dentry *d; ++ ++ IMustLock(dir); ++ ++ d = path->dentry; ++ path->dentry = d->d_parent; ++ err = security_path_mkdir(path, d, mode); ++ path->dentry = d; ++ if (unlikely(err)) ++ goto out; ++ ++ lockdep_off(); ++ err = vfs_mkdir(dir, path->dentry, mode); ++ lockdep_on(); ++ if (!err) { ++ struct path tmp = *path; ++ int did; ++ ++ vfsub_update_h_iattr(&tmp, &did); ++ if (did) { ++ tmp.dentry = path->dentry->d_parent; ++ vfsub_update_h_iattr(&tmp, /*did*/NULL); ++ } ++ /*ignore*/ ++ } ++ ++out: ++ return err; ++} ++ ++int vfsub_rmdir(struct inode *dir, struct path *path) ++{ ++ int err; ++ struct dentry *d; ++ ++ IMustLock(dir); ++ ++ d = path->dentry; ++ path->dentry = d->d_parent; ++ err = security_path_rmdir(path, d); ++ path->dentry = d; ++ if (unlikely(err)) ++ goto out; ++ ++ lockdep_off(); ++ err = vfs_rmdir(dir, path->dentry); ++ lockdep_on(); ++ if (!err) { ++ struct path tmp = { ++ .dentry = path->dentry->d_parent, ++ .mnt = path->mnt ++ }; ++ ++ vfsub_update_h_iattr(&tmp, /*did*/NULL); /*ignore*/ ++ } ++ ++out: ++ return err; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++/* todo: support mmap_sem? */ ++ssize_t vfsub_read_u(struct file *file, char __user *ubuf, size_t count, ++ loff_t *ppos) ++{ ++ ssize_t err; ++ ++ lockdep_off(); ++ err = vfs_read(file, ubuf, count, ppos); ++ lockdep_on(); ++ if (err >= 0) ++ vfsub_update_h_iattr(&file->f_path, /*did*/NULL); /*ignore*/ ++ return err; ++} ++ ++/* todo: kernel_read()? */ ++ssize_t vfsub_read_k(struct file *file, void *kbuf, size_t count, ++ loff_t *ppos) ++{ ++ ssize_t err; ++ mm_segment_t oldfs; ++ union { ++ void *k; ++ char __user *u; ++ } buf; ++ ++ buf.k = kbuf; ++ oldfs = get_fs(); ++ set_fs(KERNEL_DS); ++ err = vfsub_read_u(file, buf.u, count, ppos); ++ set_fs(oldfs); ++ return err; ++} ++ ++ssize_t vfsub_write_u(struct file *file, const char __user *ubuf, size_t count, ++ loff_t *ppos) ++{ ++ ssize_t err; ++ ++ lockdep_off(); ++ err = vfs_write(file, ubuf, count, ppos); ++ lockdep_on(); ++ if (err >= 0) ++ vfsub_update_h_iattr(&file->f_path, /*did*/NULL); /*ignore*/ ++ return err; ++} ++ ++ssize_t vfsub_write_k(struct file *file, void *kbuf, size_t count, loff_t *ppos) ++{ ++ ssize_t err; ++ mm_segment_t oldfs; ++ union { ++ void *k; ++ const char __user *u; ++ } buf; ++ ++ buf.k = kbuf; ++ oldfs = get_fs(); ++ set_fs(KERNEL_DS); ++ err = vfsub_write_u(file, buf.u, count, ppos); ++ set_fs(oldfs); ++ return err; ++} ++ ++int vfsub_flush(struct file *file, fl_owner_t id) ++{ ++ int err; ++ ++ err = 0; ++ if (file->f_op->flush) { ++ if (!au_test_nfs(file->f_dentry->d_sb)) ++ err = file->f_op->flush(file, id); ++ else { ++ lockdep_off(); ++ err = file->f_op->flush(file, id); ++ lockdep_on(); ++ } ++ if (!err) ++ vfsub_update_h_iattr(&file->f_path, /*did*/NULL); ++ /*ignore*/ ++ } ++ return err; ++} ++ ++int vfsub_iterate_dir(struct file *file, struct dir_context *ctx) ++{ ++ int err; ++ ++ AuDbg("%pD, ctx{%pf, %llu}\n", file, ctx->actor, ctx->pos); ++ ++ lockdep_off(); ++ err = iterate_dir(file, ctx); ++ lockdep_on(); ++ if (err >= 0) ++ vfsub_update_h_iattr(&file->f_path, /*did*/NULL); /*ignore*/ ++ return err; ++} ++ ++long vfsub_splice_to(struct file *in, loff_t *ppos, ++ struct pipe_inode_info *pipe, size_t len, ++ unsigned int flags) ++{ ++ long err; ++ ++ lockdep_off(); ++ err = do_splice_to(in, ppos, pipe, len, flags); ++ lockdep_on(); ++ file_accessed(in); ++ if (err >= 0) ++ vfsub_update_h_iattr(&in->f_path, /*did*/NULL); /*ignore*/ ++ return err; ++} ++ ++long vfsub_splice_from(struct pipe_inode_info *pipe, struct file *out, ++ loff_t *ppos, size_t len, unsigned int flags) ++{ ++ long err; ++ ++ lockdep_off(); ++ err = do_splice_from(pipe, out, ppos, len, flags); ++ lockdep_on(); ++ if (err >= 0) ++ vfsub_update_h_iattr(&out->f_path, /*did*/NULL); /*ignore*/ ++ return err; ++} ++ ++int vfsub_fsync(struct file *file, struct path *path, int datasync) ++{ ++ int err; ++ ++ /* file can be NULL */ ++ lockdep_off(); ++ err = vfs_fsync(file, datasync); ++ lockdep_on(); ++ if (!err) { ++ if (!path) { ++ AuDebugOn(!file); ++ path = &file->f_path; ++ } ++ vfsub_update_h_iattr(path, /*did*/NULL); /*ignore*/ ++ } ++ return err; ++} ++ ++/* cf. open.c:do_sys_truncate() and do_sys_ftruncate() */ ++int vfsub_trunc(struct path *h_path, loff_t length, unsigned int attr, ++ struct file *h_file) ++{ ++ int err; ++ struct inode *h_inode; ++ struct super_block *h_sb; ++ ++ if (!h_file) { ++ err = vfsub_truncate(h_path, length); ++ goto out; ++ } ++ ++ h_inode = h_path->dentry->d_inode; ++ h_sb = h_inode->i_sb; ++ lockdep_off(); ++ sb_start_write(h_sb); ++ lockdep_on(); ++ err = locks_verify_truncate(h_inode, h_file, length); ++ if (!err) ++ err = security_path_truncate(h_path); ++ if (!err) { ++ lockdep_off(); ++ err = do_truncate(h_path->dentry, length, attr, h_file); ++ lockdep_on(); ++ } ++ lockdep_off(); ++ sb_end_write(h_sb); ++ lockdep_on(); ++ ++out: ++ return err; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++struct au_vfsub_mkdir_args { ++ int *errp; ++ struct inode *dir; ++ struct path *path; ++ int mode; ++}; ++ ++static void au_call_vfsub_mkdir(void *args) ++{ ++ struct au_vfsub_mkdir_args *a = args; ++ *a->errp = vfsub_mkdir(a->dir, a->path, a->mode); ++} ++ ++int vfsub_sio_mkdir(struct inode *dir, struct path *path, int mode) ++{ ++ int err, do_sio, wkq_err; ++ ++ do_sio = au_test_h_perm_sio(dir, MAY_EXEC | MAY_WRITE); ++ if (!do_sio) { ++ lockdep_off(); ++ err = vfsub_mkdir(dir, path, mode); ++ lockdep_on(); ++ } else { ++ struct au_vfsub_mkdir_args args = { ++ .errp = &err, ++ .dir = dir, ++ .path = path, ++ .mode = mode ++ }; ++ wkq_err = au_wkq_wait(au_call_vfsub_mkdir, &args); ++ if (unlikely(wkq_err)) ++ err = wkq_err; ++ } ++ ++ return err; ++} ++ ++struct au_vfsub_rmdir_args { ++ int *errp; ++ struct inode *dir; ++ struct path *path; ++}; ++ ++static void au_call_vfsub_rmdir(void *args) ++{ ++ struct au_vfsub_rmdir_args *a = args; ++ *a->errp = vfsub_rmdir(a->dir, a->path); ++} ++ ++int vfsub_sio_rmdir(struct inode *dir, struct path *path) ++{ ++ int err, do_sio, wkq_err; ++ ++ do_sio = au_test_h_perm_sio(dir, MAY_EXEC | MAY_WRITE); ++ if (!do_sio) { ++ lockdep_off(); ++ err = vfsub_rmdir(dir, path); ++ lockdep_on(); ++ } else { ++ struct au_vfsub_rmdir_args args = { ++ .errp = &err, ++ .dir = dir, ++ .path = path ++ }; ++ wkq_err = au_wkq_wait(au_call_vfsub_rmdir, &args); ++ if (unlikely(wkq_err)) ++ err = wkq_err; ++ } ++ ++ return err; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++struct notify_change_args { ++ int *errp; ++ struct path *path; ++ struct iattr *ia; ++ struct inode **delegated_inode; ++}; ++ ++static void call_notify_change(void *args) ++{ ++ struct notify_change_args *a = args; ++ struct inode *h_inode; ++ ++ h_inode = a->path->dentry->d_inode; ++ IMustLock(h_inode); ++ ++ *a->errp = -EPERM; ++ if (!IS_IMMUTABLE(h_inode) && !IS_APPEND(h_inode)) { ++ lockdep_off(); ++ *a->errp = notify_change(a->path->dentry, a->ia, ++ a->delegated_inode); ++ lockdep_on(); ++ if (!*a->errp) ++ vfsub_update_h_iattr(a->path, /*did*/NULL); /*ignore*/ ++ } ++ AuTraceErr(*a->errp); ++} ++ ++int vfsub_notify_change(struct path *path, struct iattr *ia, ++ struct inode **delegated_inode) ++{ ++ int err; ++ struct notify_change_args args = { ++ .errp = &err, ++ .path = path, ++ .ia = ia, ++ .delegated_inode = delegated_inode ++ }; ++ ++ call_notify_change(&args); ++ ++ return err; ++} ++ ++int vfsub_sio_notify_change(struct path *path, struct iattr *ia, ++ struct inode **delegated_inode) ++{ ++ int err, wkq_err; ++ struct notify_change_args args = { ++ .errp = &err, ++ .path = path, ++ .ia = ia, ++ .delegated_inode = delegated_inode ++ }; ++ ++ wkq_err = au_wkq_wait(call_notify_change, &args); ++ if (unlikely(wkq_err)) ++ err = wkq_err; ++ ++ return err; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++struct unlink_args { ++ int *errp; ++ struct inode *dir; ++ struct path *path; ++ struct inode **delegated_inode; ++}; ++ ++static void call_unlink(void *args) ++{ ++ struct unlink_args *a = args; ++ struct dentry *d = a->path->dentry; ++ struct inode *h_inode; ++ const int stop_sillyrename = (au_test_nfs(d->d_sb) ++ && au_dcount(d) == 1); ++ ++ IMustLock(a->dir); ++ ++ a->path->dentry = d->d_parent; ++ *a->errp = security_path_unlink(a->path, d); ++ a->path->dentry = d; ++ if (unlikely(*a->errp)) ++ return; ++ ++ if (!stop_sillyrename) ++ dget(d); ++ h_inode = d->d_inode; ++ if (h_inode) ++ ihold(h_inode); ++ ++ lockdep_off(); ++ *a->errp = vfs_unlink(a->dir, d, a->delegated_inode); ++ lockdep_on(); ++ if (!*a->errp) { ++ struct path tmp = { ++ .dentry = d->d_parent, ++ .mnt = a->path->mnt ++ }; ++ vfsub_update_h_iattr(&tmp, /*did*/NULL); /*ignore*/ ++ } ++ ++ if (!stop_sillyrename) ++ dput(d); ++ if (h_inode) ++ iput(h_inode); ++ ++ AuTraceErr(*a->errp); ++} ++ ++/* ++ * @dir: must be locked. ++ * @dentry: target dentry. ++ */ ++int vfsub_unlink(struct inode *dir, struct path *path, ++ struct inode **delegated_inode, int force) ++{ ++ int err; ++ struct unlink_args args = { ++ .errp = &err, ++ .dir = dir, ++ .path = path, ++ .delegated_inode = delegated_inode ++ }; ++ ++ if (!force) ++ call_unlink(&args); ++ else { ++ int wkq_err; ++ ++ wkq_err = au_wkq_wait(call_unlink, &args); ++ if (unlikely(wkq_err)) ++ err = wkq_err; ++ } ++ ++ return err; ++} +diff --git a/fs/aufs/vfsub.h b/fs/aufs/vfsub.h +new file mode 100644 +index 0000000..2c33298 +--- /dev/null ++++ b/fs/aufs/vfsub.h +@@ -0,0 +1,315 @@ ++/* ++ * Copyright (C) 2005-2016 Junjiro R. Okajima ++ * ++ * This program, aufs is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . ++ */ ++ ++/* ++ * sub-routines for VFS ++ */ ++ ++#ifndef __AUFS_VFSUB_H__ ++#define __AUFS_VFSUB_H__ ++ ++#ifdef __KERNEL__ ++ ++#include ++#include ++#include ++#include ++#include "debug.h" ++ ++/* copied from linux/fs/internal.h */ ++/* todo: BAD approach!! */ ++extern void __mnt_drop_write(struct vfsmount *); ++extern spinlock_t inode_sb_list_lock; ++extern int open_check_o_direct(struct file *f); ++ ++/* ---------------------------------------------------------------------- */ ++ ++/* lock subclass for lower inode */ ++/* default MAX_LOCKDEP_SUBCLASSES(8) is not enough */ ++/* reduce? gave up. */ ++enum { ++ AuLsc_I_Begin = I_MUTEX_PARENT2, /* 5 */ ++ AuLsc_I_PARENT, /* lower inode, parent first */ ++ AuLsc_I_PARENT2, /* copyup dirs */ ++ AuLsc_I_PARENT3, /* copyup wh */ ++ AuLsc_I_CHILD, ++ AuLsc_I_CHILD2, ++ AuLsc_I_End ++}; ++ ++/* to debug easier, do not make them inlined functions */ ++#define MtxMustLock(mtx) AuDebugOn(!mutex_is_locked(mtx)) ++#define IMustLock(i) MtxMustLock(&(i)->i_mutex) ++ ++/* ---------------------------------------------------------------------- */ ++ ++static inline void vfsub_drop_nlink(struct inode *inode) ++{ ++ AuDebugOn(!inode->i_nlink); ++ drop_nlink(inode); ++} ++ ++static inline void vfsub_dead_dir(struct inode *inode) ++{ ++ AuDebugOn(!S_ISDIR(inode->i_mode)); ++ inode->i_flags |= S_DEAD; ++ clear_nlink(inode); ++} ++ ++static inline int vfsub_native_ro(struct inode *inode) ++{ ++ return (inode->i_sb->s_flags & MS_RDONLY) ++ || IS_RDONLY(inode) ++ /* || IS_APPEND(inode) */ ++ || IS_IMMUTABLE(inode); ++} ++ ++#ifdef CONFIG_AUFS_BR_FUSE ++int vfsub_test_mntns(struct vfsmount *mnt, struct super_block *h_sb); ++#else ++AuStubInt0(vfsub_test_mntns, struct vfsmount *mnt, struct super_block *h_sb); ++#endif ++ ++/* ---------------------------------------------------------------------- */ ++ ++int vfsub_update_h_iattr(struct path *h_path, int *did); ++struct file *vfsub_dentry_open(struct path *path, int flags); ++struct file *vfsub_filp_open(const char *path, int oflags, int mode); ++struct vfsub_aopen_args { ++ struct file *file; ++ unsigned int open_flag; ++ umode_t create_mode; ++ int *opened; ++}; ++struct au_branch; ++int vfsub_atomic_open(struct inode *dir, struct dentry *dentry, ++ struct vfsub_aopen_args *args, struct au_branch *br); ++int vfsub_kern_path(const char *name, unsigned int flags, struct path *path); ++ ++struct dentry *vfsub_lookup_one_len(const char *name, struct dentry *parent, ++ int len); ++ ++struct vfsub_lkup_one_args { ++ struct dentry **errp; ++ struct qstr *name; ++ struct dentry *parent; ++}; ++ ++static inline struct dentry *vfsub_lkup_one(struct qstr *name, ++ struct dentry *parent) ++{ ++ return vfsub_lookup_one_len(name->name, parent, name->len); ++} ++ ++void vfsub_call_lkup_one(void *args); ++ ++/* ---------------------------------------------------------------------- */ ++ ++static inline int vfsub_mnt_want_write(struct vfsmount *mnt) ++{ ++ int err; ++ ++ lockdep_off(); ++ err = mnt_want_write(mnt); ++ lockdep_on(); ++ return err; ++} ++ ++static inline void vfsub_mnt_drop_write(struct vfsmount *mnt) ++{ ++ lockdep_off(); ++ mnt_drop_write(mnt); ++ lockdep_on(); ++} ++ ++#if 0 /* reserved */ ++static inline void vfsub_mnt_drop_write_file(struct file *file) ++{ ++ lockdep_off(); ++ mnt_drop_write_file(file); ++ lockdep_on(); ++} ++#endif ++ ++/* ---------------------------------------------------------------------- */ ++ ++struct au_hinode; ++struct dentry *vfsub_lock_rename(struct dentry *d1, struct au_hinode *hdir1, ++ struct dentry *d2, struct au_hinode *hdir2); ++void vfsub_unlock_rename(struct dentry *d1, struct au_hinode *hdir1, ++ struct dentry *d2, struct au_hinode *hdir2); ++ ++int vfsub_create(struct inode *dir, struct path *path, int mode, ++ bool want_excl); ++int vfsub_symlink(struct inode *dir, struct path *path, ++ const char *symname); ++int vfsub_mknod(struct inode *dir, struct path *path, int mode, dev_t dev); ++int vfsub_link(struct dentry *src_dentry, struct inode *dir, ++ struct path *path, struct inode **delegated_inode); ++int vfsub_rename(struct inode *src_hdir, struct dentry *src_dentry, ++ struct inode *hdir, struct path *path, ++ struct inode **delegated_inode); ++int vfsub_mkdir(struct inode *dir, struct path *path, int mode); ++int vfsub_rmdir(struct inode *dir, struct path *path); ++ ++/* ---------------------------------------------------------------------- */ ++ ++ssize_t vfsub_read_u(struct file *file, char __user *ubuf, size_t count, ++ loff_t *ppos); ++ssize_t vfsub_read_k(struct file *file, void *kbuf, size_t count, ++ loff_t *ppos); ++ssize_t vfsub_write_u(struct file *file, const char __user *ubuf, size_t count, ++ loff_t *ppos); ++ssize_t vfsub_write_k(struct file *file, void *kbuf, size_t count, ++ loff_t *ppos); ++int vfsub_flush(struct file *file, fl_owner_t id); ++int vfsub_iterate_dir(struct file *file, struct dir_context *ctx); ++ ++/* just for type-check */ ++static inline filldir_t au_diractor(int (*func)(struct dir_context *, ++ const char *, int, loff_t, u64, ++ unsigned)) ++{ ++ return (filldir_t)func; ++} ++ ++static inline loff_t vfsub_f_size_read(struct file *file) ++{ ++ return i_size_read(file_inode(file)); ++} ++ ++static inline unsigned int vfsub_file_flags(struct file *file) ++{ ++ unsigned int flags; ++ ++ spin_lock(&file->f_lock); ++ flags = file->f_flags; ++ spin_unlock(&file->f_lock); ++ ++ return flags; ++} ++ ++#if 0 /* reserved */ ++static inline void vfsub_file_accessed(struct file *h_file) ++{ ++ file_accessed(h_file); ++ vfsub_update_h_iattr(&h_file->f_path, /*did*/NULL); /*ignore*/ ++} ++#endif ++ ++static inline void vfsub_touch_atime(struct vfsmount *h_mnt, ++ struct dentry *h_dentry) ++{ ++ struct path h_path = { ++ .dentry = h_dentry, ++ .mnt = h_mnt ++ }; ++ touch_atime(&h_path); ++ vfsub_update_h_iattr(&h_path, /*did*/NULL); /*ignore*/ ++} ++ ++static inline int vfsub_update_time(struct inode *h_inode, struct timespec *ts, ++ int flags) ++{ ++ return update_time(h_inode, ts, flags); ++ /* no vfsub_update_h_iattr() since we don't have struct path */ ++} ++ ++#ifdef CONFIG_FS_POSIX_ACL ++static inline int vfsub_acl_chmod(struct inode *h_inode, umode_t h_mode) ++{ ++ int err; ++ ++ err = posix_acl_chmod(h_inode, h_mode); ++ if (err == -EOPNOTSUPP) ++ err = 0; ++ return err; ++} ++#else ++AuStubInt0(vfsub_acl_chmod, struct inode *h_inode, umode_t h_mode); ++#endif ++ ++long vfsub_splice_to(struct file *in, loff_t *ppos, ++ struct pipe_inode_info *pipe, size_t len, ++ unsigned int flags); ++long vfsub_splice_from(struct pipe_inode_info *pipe, struct file *out, ++ loff_t *ppos, size_t len, unsigned int flags); ++ ++static inline long vfsub_truncate(struct path *path, loff_t length) ++{ ++ long err; ++ ++ lockdep_off(); ++ err = vfs_truncate(path, length); ++ lockdep_on(); ++ return err; ++} ++ ++int vfsub_trunc(struct path *h_path, loff_t length, unsigned int attr, ++ struct file *h_file); ++int vfsub_fsync(struct file *file, struct path *path, int datasync); ++ ++/* ---------------------------------------------------------------------- */ ++ ++static inline loff_t vfsub_llseek(struct file *file, loff_t offset, int origin) ++{ ++ loff_t err; ++ ++ lockdep_off(); ++ err = vfs_llseek(file, offset, origin); ++ lockdep_on(); ++ return err; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++int vfsub_sio_mkdir(struct inode *dir, struct path *path, int mode); ++int vfsub_sio_rmdir(struct inode *dir, struct path *path); ++int vfsub_sio_notify_change(struct path *path, struct iattr *ia, ++ struct inode **delegated_inode); ++int vfsub_notify_change(struct path *path, struct iattr *ia, ++ struct inode **delegated_inode); ++int vfsub_unlink(struct inode *dir, struct path *path, ++ struct inode **delegated_inode, int force); ++ ++/* ---------------------------------------------------------------------- */ ++ ++static inline int vfsub_setxattr(struct dentry *dentry, const char *name, ++ const void *value, size_t size, int flags) ++{ ++ int err; ++ ++ lockdep_off(); ++ err = vfs_setxattr(dentry, name, value, size, flags); ++ lockdep_on(); ++ ++ return err; ++} ++ ++static inline int vfsub_removexattr(struct dentry *dentry, const char *name) ++{ ++ int err; ++ ++ lockdep_off(); ++ err = vfs_removexattr(dentry, name); ++ lockdep_on(); ++ ++ return err; ++} ++ ++#endif /* __KERNEL__ */ ++#endif /* __AUFS_VFSUB_H__ */ +diff --git a/fs/aufs/wbr_policy.c b/fs/aufs/wbr_policy.c +new file mode 100644 +index 0000000..64cd9fe +--- /dev/null ++++ b/fs/aufs/wbr_policy.c +@@ -0,0 +1,765 @@ ++/* ++ * Copyright (C) 2005-2016 Junjiro R. Okajima ++ * ++ * This program, aufs is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . ++ */ ++ ++/* ++ * policies for selecting one among multiple writable branches ++ */ ++ ++#include ++#include "aufs.h" ++ ++/* subset of cpup_attr() */ ++static noinline_for_stack ++int au_cpdown_attr(struct path *h_path, struct dentry *h_src) ++{ ++ int err, sbits; ++ struct iattr ia; ++ struct inode *h_isrc; ++ ++ h_isrc = h_src->d_inode; ++ ia.ia_valid = ATTR_FORCE | ATTR_MODE | ATTR_UID | ATTR_GID; ++ ia.ia_mode = h_isrc->i_mode; ++ ia.ia_uid = h_isrc->i_uid; ++ ia.ia_gid = h_isrc->i_gid; ++ sbits = !!(ia.ia_mode & (S_ISUID | S_ISGID)); ++ au_cpup_attr_flags(h_path->dentry->d_inode, h_isrc->i_flags); ++ /* no delegation since it is just created */ ++ err = vfsub_sio_notify_change(h_path, &ia, /*delegated*/NULL); ++ ++ /* is this nfs only? */ ++ if (!err && sbits && au_test_nfs(h_path->dentry->d_sb)) { ++ ia.ia_valid = ATTR_FORCE | ATTR_MODE; ++ ia.ia_mode = h_isrc->i_mode; ++ err = vfsub_sio_notify_change(h_path, &ia, /*delegated*/NULL); ++ } ++ ++ return err; ++} ++ ++#define AuCpdown_PARENT_OPQ 1 ++#define AuCpdown_WHED (1 << 1) ++#define AuCpdown_MADE_DIR (1 << 2) ++#define AuCpdown_DIROPQ (1 << 3) ++#define au_ftest_cpdown(flags, name) ((flags) & AuCpdown_##name) ++#define au_fset_cpdown(flags, name) \ ++ do { (flags) |= AuCpdown_##name; } while (0) ++#define au_fclr_cpdown(flags, name) \ ++ do { (flags) &= ~AuCpdown_##name; } while (0) ++ ++static int au_cpdown_dir_opq(struct dentry *dentry, aufs_bindex_t bdst, ++ unsigned int *flags) ++{ ++ int err; ++ struct dentry *opq_dentry; ++ ++ opq_dentry = au_diropq_create(dentry, bdst); ++ err = PTR_ERR(opq_dentry); ++ if (IS_ERR(opq_dentry)) ++ goto out; ++ dput(opq_dentry); ++ au_fset_cpdown(*flags, DIROPQ); ++ ++out: ++ return err; ++} ++ ++static int au_cpdown_dir_wh(struct dentry *dentry, struct dentry *h_parent, ++ struct inode *dir, aufs_bindex_t bdst) ++{ ++ int err; ++ struct path h_path; ++ struct au_branch *br; ++ ++ br = au_sbr(dentry->d_sb, bdst); ++ h_path.dentry = au_wh_lkup(h_parent, &dentry->d_name, br); ++ err = PTR_ERR(h_path.dentry); ++ if (IS_ERR(h_path.dentry)) ++ goto out; ++ ++ err = 0; ++ if (h_path.dentry->d_inode) { ++ h_path.mnt = au_br_mnt(br); ++ err = au_wh_unlink_dentry(au_h_iptr(dir, bdst), &h_path, ++ dentry); ++ } ++ dput(h_path.dentry); ++ ++out: ++ return err; ++} ++ ++static int au_cpdown_dir(struct dentry *dentry, aufs_bindex_t bdst, ++ struct au_pin *pin, ++ struct dentry *h_parent, void *arg) ++{ ++ int err, rerr; ++ aufs_bindex_t bopq, bstart; ++ struct path h_path; ++ struct dentry *parent; ++ struct inode *h_dir, *h_inode, *inode, *dir; ++ unsigned int *flags = arg; ++ ++ bstart = au_dbstart(dentry); ++ /* dentry is di-locked */ ++ parent = dget_parent(dentry); ++ dir = parent->d_inode; ++ h_dir = h_parent->d_inode; ++ AuDebugOn(h_dir != au_h_iptr(dir, bdst)); ++ IMustLock(h_dir); ++ ++ err = au_lkup_neg(dentry, bdst, /*wh*/0); ++ if (unlikely(err < 0)) ++ goto out; ++ h_path.dentry = au_h_dptr(dentry, bdst); ++ h_path.mnt = au_sbr_mnt(dentry->d_sb, bdst); ++ err = vfsub_sio_mkdir(au_h_iptr(dir, bdst), &h_path, ++ S_IRWXU | S_IRUGO | S_IXUGO); ++ if (unlikely(err)) ++ goto out_put; ++ au_fset_cpdown(*flags, MADE_DIR); ++ ++ bopq = au_dbdiropq(dentry); ++ au_fclr_cpdown(*flags, WHED); ++ au_fclr_cpdown(*flags, DIROPQ); ++ if (au_dbwh(dentry) == bdst) ++ au_fset_cpdown(*flags, WHED); ++ if (!au_ftest_cpdown(*flags, PARENT_OPQ) && bopq <= bdst) ++ au_fset_cpdown(*flags, PARENT_OPQ); ++ h_inode = h_path.dentry->d_inode; ++ mutex_lock_nested(&h_inode->i_mutex, AuLsc_I_CHILD); ++ if (au_ftest_cpdown(*flags, WHED)) { ++ err = au_cpdown_dir_opq(dentry, bdst, flags); ++ if (unlikely(err)) { ++ mutex_unlock(&h_inode->i_mutex); ++ goto out_dir; ++ } ++ } ++ ++ err = au_cpdown_attr(&h_path, au_h_dptr(dentry, bstart)); ++ mutex_unlock(&h_inode->i_mutex); ++ if (unlikely(err)) ++ goto out_opq; ++ ++ if (au_ftest_cpdown(*flags, WHED)) { ++ err = au_cpdown_dir_wh(dentry, h_parent, dir, bdst); ++ if (unlikely(err)) ++ goto out_opq; ++ } ++ ++ inode = dentry->d_inode; ++ if (au_ibend(inode) < bdst) ++ au_set_ibend(inode, bdst); ++ au_set_h_iptr(inode, bdst, au_igrab(h_inode), ++ au_hi_flags(inode, /*isdir*/1)); ++ au_fhsm_wrote(dentry->d_sb, bdst, /*force*/0); ++ goto out; /* success */ ++ ++ /* revert */ ++out_opq: ++ if (au_ftest_cpdown(*flags, DIROPQ)) { ++ mutex_lock_nested(&h_inode->i_mutex, AuLsc_I_CHILD); ++ rerr = au_diropq_remove(dentry, bdst); ++ mutex_unlock(&h_inode->i_mutex); ++ if (unlikely(rerr)) { ++ AuIOErr("failed removing diropq for %pd b%d (%d)\n", ++ dentry, bdst, rerr); ++ err = -EIO; ++ goto out; ++ } ++ } ++out_dir: ++ if (au_ftest_cpdown(*flags, MADE_DIR)) { ++ rerr = vfsub_sio_rmdir(au_h_iptr(dir, bdst), &h_path); ++ if (unlikely(rerr)) { ++ AuIOErr("failed removing %pd b%d (%d)\n", ++ dentry, bdst, rerr); ++ err = -EIO; ++ } ++ } ++out_put: ++ au_set_h_dptr(dentry, bdst, NULL); ++ if (au_dbend(dentry) == bdst) ++ au_update_dbend(dentry); ++out: ++ dput(parent); ++ return err; ++} ++ ++int au_cpdown_dirs(struct dentry *dentry, aufs_bindex_t bdst) ++{ ++ int err; ++ unsigned int flags; ++ ++ flags = 0; ++ err = au_cp_dirs(dentry, bdst, au_cpdown_dir, &flags); ++ ++ return err; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++/* policies for create */ ++ ++int au_wbr_nonopq(struct dentry *dentry, aufs_bindex_t bindex) ++{ ++ int err, i, j, ndentry; ++ aufs_bindex_t bopq; ++ struct au_dcsub_pages dpages; ++ struct au_dpage *dpage; ++ struct dentry **dentries, *parent, *d; ++ ++ err = au_dpages_init(&dpages, GFP_NOFS); ++ if (unlikely(err)) ++ goto out; ++ parent = dget_parent(dentry); ++ err = au_dcsub_pages_rev_aufs(&dpages, parent, /*do_include*/0); ++ if (unlikely(err)) ++ goto out_free; ++ ++ err = bindex; ++ for (i = 0; i < dpages.ndpage; i++) { ++ dpage = dpages.dpages + i; ++ dentries = dpage->dentries; ++ ndentry = dpage->ndentry; ++ for (j = 0; j < ndentry; j++) { ++ d = dentries[j]; ++ di_read_lock_parent2(d, !AuLock_IR); ++ bopq = au_dbdiropq(d); ++ di_read_unlock(d, !AuLock_IR); ++ if (bopq >= 0 && bopq < err) ++ err = bopq; ++ } ++ } ++ ++out_free: ++ dput(parent); ++ au_dpages_free(&dpages); ++out: ++ return err; ++} ++ ++static int au_wbr_bu(struct super_block *sb, aufs_bindex_t bindex) ++{ ++ for (; bindex >= 0; bindex--) ++ if (!au_br_rdonly(au_sbr(sb, bindex))) ++ return bindex; ++ return -EROFS; ++} ++ ++/* top down parent */ ++static int au_wbr_create_tdp(struct dentry *dentry, ++ unsigned int flags __maybe_unused) ++{ ++ int err; ++ aufs_bindex_t bstart, bindex; ++ struct super_block *sb; ++ struct dentry *parent, *h_parent; ++ ++ sb = dentry->d_sb; ++ bstart = au_dbstart(dentry); ++ err = bstart; ++ if (!au_br_rdonly(au_sbr(sb, bstart))) ++ goto out; ++ ++ err = -EROFS; ++ parent = dget_parent(dentry); ++ for (bindex = au_dbstart(parent); bindex < bstart; bindex++) { ++ h_parent = au_h_dptr(parent, bindex); ++ if (!h_parent || !h_parent->d_inode) ++ continue; ++ ++ if (!au_br_rdonly(au_sbr(sb, bindex))) { ++ err = bindex; ++ break; ++ } ++ } ++ dput(parent); ++ ++ /* bottom up here */ ++ if (unlikely(err < 0)) { ++ err = au_wbr_bu(sb, bstart - 1); ++ if (err >= 0) ++ err = au_wbr_nonopq(dentry, err); ++ } ++ ++out: ++ AuDbg("b%d\n", err); ++ return err; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++/* an exception for the policy other than tdp */ ++static int au_wbr_create_exp(struct dentry *dentry) ++{ ++ int err; ++ aufs_bindex_t bwh, bdiropq; ++ struct dentry *parent; ++ ++ err = -1; ++ bwh = au_dbwh(dentry); ++ parent = dget_parent(dentry); ++ bdiropq = au_dbdiropq(parent); ++ if (bwh >= 0) { ++ if (bdiropq >= 0) ++ err = min(bdiropq, bwh); ++ else ++ err = bwh; ++ AuDbg("%d\n", err); ++ } else if (bdiropq >= 0) { ++ err = bdiropq; ++ AuDbg("%d\n", err); ++ } ++ dput(parent); ++ ++ if (err >= 0) ++ err = au_wbr_nonopq(dentry, err); ++ ++ if (err >= 0 && au_br_rdonly(au_sbr(dentry->d_sb, err))) ++ err = -1; ++ ++ AuDbg("%d\n", err); ++ return err; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++/* round robin */ ++static int au_wbr_create_init_rr(struct super_block *sb) ++{ ++ int err; ++ ++ err = au_wbr_bu(sb, au_sbend(sb)); ++ atomic_set(&au_sbi(sb)->si_wbr_rr_next, -err); /* less important */ ++ /* smp_mb(); */ ++ ++ AuDbg("b%d\n", err); ++ return err; ++} ++ ++static int au_wbr_create_rr(struct dentry *dentry, unsigned int flags) ++{ ++ int err, nbr; ++ unsigned int u; ++ aufs_bindex_t bindex, bend; ++ struct super_block *sb; ++ atomic_t *next; ++ ++ err = au_wbr_create_exp(dentry); ++ if (err >= 0) ++ goto out; ++ ++ sb = dentry->d_sb; ++ next = &au_sbi(sb)->si_wbr_rr_next; ++ bend = au_sbend(sb); ++ nbr = bend + 1; ++ for (bindex = 0; bindex <= bend; bindex++) { ++ if (!au_ftest_wbr(flags, DIR)) { ++ err = atomic_dec_return(next) + 1; ++ /* modulo for 0 is meaningless */ ++ if (unlikely(!err)) ++ err = atomic_dec_return(next) + 1; ++ } else ++ err = atomic_read(next); ++ AuDbg("%d\n", err); ++ u = err; ++ err = u % nbr; ++ AuDbg("%d\n", err); ++ if (!au_br_rdonly(au_sbr(sb, err))) ++ break; ++ err = -EROFS; ++ } ++ ++ if (err >= 0) ++ err = au_wbr_nonopq(dentry, err); ++ ++out: ++ AuDbg("%d\n", err); ++ return err; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++/* most free space */ ++static void au_mfs(struct dentry *dentry, struct dentry *parent) ++{ ++ struct super_block *sb; ++ struct au_branch *br; ++ struct au_wbr_mfs *mfs; ++ struct dentry *h_parent; ++ aufs_bindex_t bindex, bend; ++ int err; ++ unsigned long long b, bavail; ++ struct path h_path; ++ /* reduce the stack usage */ ++ struct kstatfs *st; ++ ++ st = kmalloc(sizeof(*st), GFP_NOFS); ++ if (unlikely(!st)) { ++ AuWarn1("failed updating mfs(%d), ignored\n", -ENOMEM); ++ return; ++ } ++ ++ bavail = 0; ++ sb = dentry->d_sb; ++ mfs = &au_sbi(sb)->si_wbr_mfs; ++ MtxMustLock(&mfs->mfs_lock); ++ mfs->mfs_bindex = -EROFS; ++ mfs->mfsrr_bytes = 0; ++ if (!parent) { ++ bindex = 0; ++ bend = au_sbend(sb); ++ } else { ++ bindex = au_dbstart(parent); ++ bend = au_dbtaildir(parent); ++ } ++ ++ for (; bindex <= bend; bindex++) { ++ if (parent) { ++ h_parent = au_h_dptr(parent, bindex); ++ if (!h_parent || !h_parent->d_inode) ++ continue; ++ } ++ br = au_sbr(sb, bindex); ++ if (au_br_rdonly(br)) ++ continue; ++ ++ /* sb->s_root for NFS is unreliable */ ++ h_path.mnt = au_br_mnt(br); ++ h_path.dentry = h_path.mnt->mnt_root; ++ err = vfs_statfs(&h_path, st); ++ if (unlikely(err)) { ++ AuWarn1("failed statfs, b%d, %d\n", bindex, err); ++ continue; ++ } ++ ++ /* when the available size is equal, select the lower one */ ++ BUILD_BUG_ON(sizeof(b) < sizeof(st->f_bavail) ++ || sizeof(b) < sizeof(st->f_bsize)); ++ b = st->f_bavail * st->f_bsize; ++ br->br_wbr->wbr_bytes = b; ++ if (b >= bavail) { ++ bavail = b; ++ mfs->mfs_bindex = bindex; ++ mfs->mfs_jiffy = jiffies; ++ } ++ } ++ ++ mfs->mfsrr_bytes = bavail; ++ AuDbg("b%d\n", mfs->mfs_bindex); ++ kfree(st); ++} ++ ++static int au_wbr_create_mfs(struct dentry *dentry, unsigned int flags) ++{ ++ int err; ++ struct dentry *parent; ++ struct super_block *sb; ++ struct au_wbr_mfs *mfs; ++ ++ err = au_wbr_create_exp(dentry); ++ if (err >= 0) ++ goto out; ++ ++ sb = dentry->d_sb; ++ parent = NULL; ++ if (au_ftest_wbr(flags, PARENT)) ++ parent = dget_parent(dentry); ++ mfs = &au_sbi(sb)->si_wbr_mfs; ++ mutex_lock(&mfs->mfs_lock); ++ if (time_after(jiffies, mfs->mfs_jiffy + mfs->mfs_expire) ++ || mfs->mfs_bindex < 0 ++ || au_br_rdonly(au_sbr(sb, mfs->mfs_bindex))) ++ au_mfs(dentry, parent); ++ mutex_unlock(&mfs->mfs_lock); ++ err = mfs->mfs_bindex; ++ dput(parent); ++ ++ if (err >= 0) ++ err = au_wbr_nonopq(dentry, err); ++ ++out: ++ AuDbg("b%d\n", err); ++ return err; ++} ++ ++static int au_wbr_create_init_mfs(struct super_block *sb) ++{ ++ struct au_wbr_mfs *mfs; ++ ++ mfs = &au_sbi(sb)->si_wbr_mfs; ++ mutex_init(&mfs->mfs_lock); ++ mfs->mfs_jiffy = 0; ++ mfs->mfs_bindex = -EROFS; ++ ++ return 0; ++} ++ ++static int au_wbr_create_fin_mfs(struct super_block *sb __maybe_unused) ++{ ++ mutex_destroy(&au_sbi(sb)->si_wbr_mfs.mfs_lock); ++ return 0; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++/* most free space and then round robin */ ++static int au_wbr_create_mfsrr(struct dentry *dentry, unsigned int flags) ++{ ++ int err; ++ struct au_wbr_mfs *mfs; ++ ++ err = au_wbr_create_mfs(dentry, flags); ++ if (err >= 0) { ++ mfs = &au_sbi(dentry->d_sb)->si_wbr_mfs; ++ mutex_lock(&mfs->mfs_lock); ++ if (mfs->mfsrr_bytes < mfs->mfsrr_watermark) ++ err = au_wbr_create_rr(dentry, flags); ++ mutex_unlock(&mfs->mfs_lock); ++ } ++ ++ AuDbg("b%d\n", err); ++ return err; ++} ++ ++static int au_wbr_create_init_mfsrr(struct super_block *sb) ++{ ++ int err; ++ ++ au_wbr_create_init_mfs(sb); /* ignore */ ++ err = au_wbr_create_init_rr(sb); ++ ++ return err; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++/* top down parent and most free space */ ++static int au_wbr_create_pmfs(struct dentry *dentry, unsigned int flags) ++{ ++ int err, e2; ++ unsigned long long b; ++ aufs_bindex_t bindex, bstart, bend; ++ struct super_block *sb; ++ struct dentry *parent, *h_parent; ++ struct au_branch *br; ++ ++ err = au_wbr_create_tdp(dentry, flags); ++ if (unlikely(err < 0)) ++ goto out; ++ parent = dget_parent(dentry); ++ bstart = au_dbstart(parent); ++ bend = au_dbtaildir(parent); ++ if (bstart == bend) ++ goto out_parent; /* success */ ++ ++ e2 = au_wbr_create_mfs(dentry, flags); ++ if (e2 < 0) ++ goto out_parent; /* success */ ++ ++ /* when the available size is equal, select upper one */ ++ sb = dentry->d_sb; ++ br = au_sbr(sb, err); ++ b = br->br_wbr->wbr_bytes; ++ AuDbg("b%d, %llu\n", err, b); ++ ++ for (bindex = bstart; bindex <= bend; bindex++) { ++ h_parent = au_h_dptr(parent, bindex); ++ if (!h_parent || !h_parent->d_inode) ++ continue; ++ ++ br = au_sbr(sb, bindex); ++ if (!au_br_rdonly(br) && br->br_wbr->wbr_bytes > b) { ++ b = br->br_wbr->wbr_bytes; ++ err = bindex; ++ AuDbg("b%d, %llu\n", err, b); ++ } ++ } ++ ++ if (err >= 0) ++ err = au_wbr_nonopq(dentry, err); ++ ++out_parent: ++ dput(parent); ++out: ++ AuDbg("b%d\n", err); ++ return err; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++/* ++ * - top down parent ++ * - most free space with parent ++ * - most free space round-robin regardless parent ++ */ ++static int au_wbr_create_pmfsrr(struct dentry *dentry, unsigned int flags) ++{ ++ int err; ++ unsigned long long watermark; ++ struct super_block *sb; ++ struct au_branch *br; ++ struct au_wbr_mfs *mfs; ++ ++ err = au_wbr_create_pmfs(dentry, flags | AuWbr_PARENT); ++ if (unlikely(err < 0)) ++ goto out; ++ ++ sb = dentry->d_sb; ++ br = au_sbr(sb, err); ++ mfs = &au_sbi(sb)->si_wbr_mfs; ++ mutex_lock(&mfs->mfs_lock); ++ watermark = mfs->mfsrr_watermark; ++ mutex_unlock(&mfs->mfs_lock); ++ if (br->br_wbr->wbr_bytes < watermark) ++ /* regardless the parent dir */ ++ err = au_wbr_create_mfsrr(dentry, flags); ++ ++out: ++ AuDbg("b%d\n", err); ++ return err; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++/* policies for copyup */ ++ ++/* top down parent */ ++static int au_wbr_copyup_tdp(struct dentry *dentry) ++{ ++ return au_wbr_create_tdp(dentry, /*flags, anything is ok*/0); ++} ++ ++/* bottom up parent */ ++static int au_wbr_copyup_bup(struct dentry *dentry) ++{ ++ int err; ++ aufs_bindex_t bindex, bstart; ++ struct dentry *parent, *h_parent; ++ struct super_block *sb; ++ ++ err = -EROFS; ++ sb = dentry->d_sb; ++ parent = dget_parent(dentry); ++ bstart = au_dbstart(parent); ++ for (bindex = au_dbstart(dentry); bindex >= bstart; bindex--) { ++ h_parent = au_h_dptr(parent, bindex); ++ if (!h_parent || !h_parent->d_inode) ++ continue; ++ ++ if (!au_br_rdonly(au_sbr(sb, bindex))) { ++ err = bindex; ++ break; ++ } ++ } ++ dput(parent); ++ ++ /* bottom up here */ ++ if (unlikely(err < 0)) ++ err = au_wbr_bu(sb, bstart - 1); ++ ++ AuDbg("b%d\n", err); ++ return err; ++} ++ ++/* bottom up */ ++int au_wbr_do_copyup_bu(struct dentry *dentry, aufs_bindex_t bstart) ++{ ++ int err; ++ ++ err = au_wbr_bu(dentry->d_sb, bstart); ++ AuDbg("b%d\n", err); ++ if (err > bstart) ++ err = au_wbr_nonopq(dentry, err); ++ ++ AuDbg("b%d\n", err); ++ return err; ++} ++ ++static int au_wbr_copyup_bu(struct dentry *dentry) ++{ ++ int err; ++ aufs_bindex_t bstart; ++ ++ bstart = au_dbstart(dentry); ++ err = au_wbr_do_copyup_bu(dentry, bstart); ++ return err; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++struct au_wbr_copyup_operations au_wbr_copyup_ops[] = { ++ [AuWbrCopyup_TDP] = { ++ .copyup = au_wbr_copyup_tdp ++ }, ++ [AuWbrCopyup_BUP] = { ++ .copyup = au_wbr_copyup_bup ++ }, ++ [AuWbrCopyup_BU] = { ++ .copyup = au_wbr_copyup_bu ++ } ++}; ++ ++struct au_wbr_create_operations au_wbr_create_ops[] = { ++ [AuWbrCreate_TDP] = { ++ .create = au_wbr_create_tdp ++ }, ++ [AuWbrCreate_RR] = { ++ .create = au_wbr_create_rr, ++ .init = au_wbr_create_init_rr ++ }, ++ [AuWbrCreate_MFS] = { ++ .create = au_wbr_create_mfs, ++ .init = au_wbr_create_init_mfs, ++ .fin = au_wbr_create_fin_mfs ++ }, ++ [AuWbrCreate_MFSV] = { ++ .create = au_wbr_create_mfs, ++ .init = au_wbr_create_init_mfs, ++ .fin = au_wbr_create_fin_mfs ++ }, ++ [AuWbrCreate_MFSRR] = { ++ .create = au_wbr_create_mfsrr, ++ .init = au_wbr_create_init_mfsrr, ++ .fin = au_wbr_create_fin_mfs ++ }, ++ [AuWbrCreate_MFSRRV] = { ++ .create = au_wbr_create_mfsrr, ++ .init = au_wbr_create_init_mfsrr, ++ .fin = au_wbr_create_fin_mfs ++ }, ++ [AuWbrCreate_PMFS] = { ++ .create = au_wbr_create_pmfs, ++ .init = au_wbr_create_init_mfs, ++ .fin = au_wbr_create_fin_mfs ++ }, ++ [AuWbrCreate_PMFSV] = { ++ .create = au_wbr_create_pmfs, ++ .init = au_wbr_create_init_mfs, ++ .fin = au_wbr_create_fin_mfs ++ }, ++ [AuWbrCreate_PMFSRR] = { ++ .create = au_wbr_create_pmfsrr, ++ .init = au_wbr_create_init_mfsrr, ++ .fin = au_wbr_create_fin_mfs ++ }, ++ [AuWbrCreate_PMFSRRV] = { ++ .create = au_wbr_create_pmfsrr, ++ .init = au_wbr_create_init_mfsrr, ++ .fin = au_wbr_create_fin_mfs ++ } ++}; +diff --git a/fs/aufs/whout.c b/fs/aufs/whout.c +new file mode 100644 +index 0000000..fb667ee +--- /dev/null ++++ b/fs/aufs/whout.c +@@ -0,0 +1,1061 @@ ++/* ++ * Copyright (C) 2005-2016 Junjiro R. Okajima ++ * ++ * This program, aufs is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . ++ */ ++ ++/* ++ * whiteout for logical deletion and opaque directory ++ */ ++ ++#include "aufs.h" ++ ++#define WH_MASK S_IRUGO ++ ++/* ++ * If a directory contains this file, then it is opaque. We start with the ++ * .wh. flag so that it is blocked by lookup. ++ */ ++static struct qstr diropq_name = QSTR_INIT(AUFS_WH_DIROPQ, ++ sizeof(AUFS_WH_DIROPQ) - 1); ++ ++/* ++ * generate whiteout name, which is NOT terminated by NULL. ++ * @name: original d_name.name ++ * @len: original d_name.len ++ * @wh: whiteout qstr ++ * returns zero when succeeds, otherwise error. ++ * succeeded value as wh->name should be freed by kfree(). ++ */ ++int au_wh_name_alloc(struct qstr *wh, const struct qstr *name) ++{ ++ char *p; ++ ++ if (unlikely(name->len > PATH_MAX - AUFS_WH_PFX_LEN)) ++ return -ENAMETOOLONG; ++ ++ wh->len = name->len + AUFS_WH_PFX_LEN; ++ p = kmalloc(wh->len, GFP_NOFS); ++ wh->name = p; ++ if (p) { ++ memcpy(p, AUFS_WH_PFX, AUFS_WH_PFX_LEN); ++ memcpy(p + AUFS_WH_PFX_LEN, name->name, name->len); ++ /* smp_mb(); */ ++ return 0; ++ } ++ return -ENOMEM; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++/* ++ * test if the @wh_name exists under @h_parent. ++ * @try_sio specifies the necessary of super-io. ++ */ ++int au_wh_test(struct dentry *h_parent, struct qstr *wh_name, int try_sio) ++{ ++ int err; ++ struct dentry *wh_dentry; ++ ++ if (!try_sio) ++ wh_dentry = vfsub_lkup_one(wh_name, h_parent); ++ else ++ wh_dentry = au_sio_lkup_one(wh_name, h_parent); ++ err = PTR_ERR(wh_dentry); ++ if (IS_ERR(wh_dentry)) { ++ if (err == -ENAMETOOLONG) ++ err = 0; ++ goto out; ++ } ++ ++ err = 0; ++ if (!wh_dentry->d_inode) ++ goto out_wh; /* success */ ++ ++ err = 1; ++ if (S_ISREG(wh_dentry->d_inode->i_mode)) ++ goto out_wh; /* success */ ++ ++ err = -EIO; ++ AuIOErr("%pd Invalid whiteout entry type 0%o.\n", ++ wh_dentry, wh_dentry->d_inode->i_mode); ++ ++out_wh: ++ dput(wh_dentry); ++out: ++ return err; ++} ++ ++/* ++ * test if the @h_dentry sets opaque or not. ++ */ ++int au_diropq_test(struct dentry *h_dentry) ++{ ++ int err; ++ struct inode *h_dir; ++ ++ h_dir = h_dentry->d_inode; ++ err = au_wh_test(h_dentry, &diropq_name, ++ au_test_h_perm_sio(h_dir, MAY_EXEC)); ++ return err; ++} ++ ++/* ++ * returns a negative dentry whose name is unique and temporary. ++ */ ++struct dentry *au_whtmp_lkup(struct dentry *h_parent, struct au_branch *br, ++ struct qstr *prefix) ++{ ++ struct dentry *dentry; ++ int i; ++ char defname[NAME_MAX - AUFS_MAX_NAMELEN + DNAME_INLINE_LEN + 1], ++ *name, *p; ++ /* strict atomic_t is unnecessary here */ ++ static unsigned short cnt; ++ struct qstr qs; ++ ++ BUILD_BUG_ON(sizeof(cnt) * 2 > AUFS_WH_TMP_LEN); ++ ++ name = defname; ++ qs.len = sizeof(defname) - DNAME_INLINE_LEN + prefix->len - 1; ++ if (unlikely(prefix->len > DNAME_INLINE_LEN)) { ++ dentry = ERR_PTR(-ENAMETOOLONG); ++ if (unlikely(qs.len > NAME_MAX)) ++ goto out; ++ dentry = ERR_PTR(-ENOMEM); ++ name = kmalloc(qs.len + 1, GFP_NOFS); ++ if (unlikely(!name)) ++ goto out; ++ } ++ ++ /* doubly whiteout-ed */ ++ memcpy(name, AUFS_WH_PFX AUFS_WH_PFX, AUFS_WH_PFX_LEN * 2); ++ p = name + AUFS_WH_PFX_LEN * 2; ++ memcpy(p, prefix->name, prefix->len); ++ p += prefix->len; ++ *p++ = '.'; ++ AuDebugOn(name + qs.len + 1 - p <= AUFS_WH_TMP_LEN); ++ ++ qs.name = name; ++ for (i = 0; i < 3; i++) { ++ sprintf(p, "%.*x", AUFS_WH_TMP_LEN, cnt++); ++ dentry = au_sio_lkup_one(&qs, h_parent); ++ if (IS_ERR(dentry) || !dentry->d_inode) ++ goto out_name; ++ dput(dentry); ++ } ++ /* pr_warn("could not get random name\n"); */ ++ dentry = ERR_PTR(-EEXIST); ++ AuDbg("%.*s\n", AuLNPair(&qs)); ++ BUG(); ++ ++out_name: ++ if (name != defname) ++ kfree(name); ++out: ++ AuTraceErrPtr(dentry); ++ return dentry; ++} ++ ++/* ++ * rename the @h_dentry on @br to the whiteouted temporary name. ++ */ ++int au_whtmp_ren(struct dentry *h_dentry, struct au_branch *br) ++{ ++ int err; ++ struct path h_path = { ++ .mnt = au_br_mnt(br) ++ }; ++ struct inode *h_dir, *delegated; ++ struct dentry *h_parent; ++ ++ h_parent = h_dentry->d_parent; /* dir inode is locked */ ++ h_dir = h_parent->d_inode; ++ IMustLock(h_dir); ++ ++ h_path.dentry = au_whtmp_lkup(h_parent, br, &h_dentry->d_name); ++ err = PTR_ERR(h_path.dentry); ++ if (IS_ERR(h_path.dentry)) ++ goto out; ++ ++ /* under the same dir, no need to lock_rename() */ ++ delegated = NULL; ++ err = vfsub_rename(h_dir, h_dentry, h_dir, &h_path, &delegated); ++ AuTraceErr(err); ++ if (unlikely(err == -EWOULDBLOCK)) { ++ pr_warn("cannot retry for NFSv4 delegation" ++ " for an internal rename\n"); ++ iput(delegated); ++ } ++ dput(h_path.dentry); ++ ++out: ++ AuTraceErr(err); ++ return err; ++} ++ ++/* ---------------------------------------------------------------------- */ ++/* ++ * functions for removing a whiteout ++ */ ++ ++static int do_unlink_wh(struct inode *h_dir, struct path *h_path) ++{ ++ int err, force; ++ struct inode *delegated; ++ ++ /* ++ * forces superio when the dir has a sticky bit. ++ * this may be a violation of unix fs semantics. ++ */ ++ force = (h_dir->i_mode & S_ISVTX) ++ && !uid_eq(current_fsuid(), h_path->dentry->d_inode->i_uid); ++ delegated = NULL; ++ err = vfsub_unlink(h_dir, h_path, &delegated, force); ++ if (unlikely(err == -EWOULDBLOCK)) { ++ pr_warn("cannot retry for NFSv4 delegation" ++ " for an internal unlink\n"); ++ iput(delegated); ++ } ++ return err; ++} ++ ++int au_wh_unlink_dentry(struct inode *h_dir, struct path *h_path, ++ struct dentry *dentry) ++{ ++ int err; ++ ++ err = do_unlink_wh(h_dir, h_path); ++ if (!err && dentry) ++ au_set_dbwh(dentry, -1); ++ ++ return err; ++} ++ ++static int unlink_wh_name(struct dentry *h_parent, struct qstr *wh, ++ struct au_branch *br) ++{ ++ int err; ++ struct path h_path = { ++ .mnt = au_br_mnt(br) ++ }; ++ ++ err = 0; ++ h_path.dentry = vfsub_lkup_one(wh, h_parent); ++ if (IS_ERR(h_path.dentry)) ++ err = PTR_ERR(h_path.dentry); ++ else { ++ if (h_path.dentry->d_inode ++ && S_ISREG(h_path.dentry->d_inode->i_mode)) ++ err = do_unlink_wh(h_parent->d_inode, &h_path); ++ dput(h_path.dentry); ++ } ++ ++ return err; ++} ++ ++/* ---------------------------------------------------------------------- */ ++/* ++ * initialize/clean whiteout for a branch ++ */ ++ ++static void au_wh_clean(struct inode *h_dir, struct path *whpath, ++ const int isdir) ++{ ++ int err; ++ struct inode *delegated; ++ ++ if (!whpath->dentry->d_inode) ++ return; ++ ++ if (isdir) ++ err = vfsub_rmdir(h_dir, whpath); ++ else { ++ delegated = NULL; ++ err = vfsub_unlink(h_dir, whpath, &delegated, /*force*/0); ++ if (unlikely(err == -EWOULDBLOCK)) { ++ pr_warn("cannot retry for NFSv4 delegation" ++ " for an internal unlink\n"); ++ iput(delegated); ++ } ++ } ++ if (unlikely(err)) ++ pr_warn("failed removing %pd (%d), ignored.\n", ++ whpath->dentry, err); ++} ++ ++static int test_linkable(struct dentry *h_root) ++{ ++ struct inode *h_dir = h_root->d_inode; ++ ++ if (h_dir->i_op->link) ++ return 0; ++ ++ pr_err("%pd (%s) doesn't support link(2), use noplink and rw+nolwh\n", ++ h_root, au_sbtype(h_root->d_sb)); ++ return -ENOSYS; ++} ++ ++/* todo: should this mkdir be done in /sbin/mount.aufs helper? */ ++static int au_whdir(struct inode *h_dir, struct path *path) ++{ ++ int err; ++ ++ err = -EEXIST; ++ if (!path->dentry->d_inode) { ++ int mode = S_IRWXU; ++ ++ if (au_test_nfs(path->dentry->d_sb)) ++ mode |= S_IXUGO; ++ err = vfsub_mkdir(h_dir, path, mode); ++ } else if (d_is_dir(path->dentry)) ++ err = 0; ++ else ++ pr_err("unknown %pd exists\n", path->dentry); ++ ++ return err; ++} ++ ++struct au_wh_base { ++ const struct qstr *name; ++ struct dentry *dentry; ++}; ++ ++static void au_wh_init_ro(struct inode *h_dir, struct au_wh_base base[], ++ struct path *h_path) ++{ ++ h_path->dentry = base[AuBrWh_BASE].dentry; ++ au_wh_clean(h_dir, h_path, /*isdir*/0); ++ h_path->dentry = base[AuBrWh_PLINK].dentry; ++ au_wh_clean(h_dir, h_path, /*isdir*/1); ++ h_path->dentry = base[AuBrWh_ORPH].dentry; ++ au_wh_clean(h_dir, h_path, /*isdir*/1); ++} ++ ++/* ++ * returns tri-state, ++ * minus: error, caller should print the message ++ * zero: succuess ++ * plus: error, caller should NOT print the message ++ */ ++static int au_wh_init_rw_nolink(struct dentry *h_root, struct au_wbr *wbr, ++ int do_plink, struct au_wh_base base[], ++ struct path *h_path) ++{ ++ int err; ++ struct inode *h_dir; ++ ++ h_dir = h_root->d_inode; ++ h_path->dentry = base[AuBrWh_BASE].dentry; ++ au_wh_clean(h_dir, h_path, /*isdir*/0); ++ h_path->dentry = base[AuBrWh_PLINK].dentry; ++ if (do_plink) { ++ err = test_linkable(h_root); ++ if (unlikely(err)) { ++ err = 1; ++ goto out; ++ } ++ ++ err = au_whdir(h_dir, h_path); ++ if (unlikely(err)) ++ goto out; ++ wbr->wbr_plink = dget(base[AuBrWh_PLINK].dentry); ++ } else ++ au_wh_clean(h_dir, h_path, /*isdir*/1); ++ h_path->dentry = base[AuBrWh_ORPH].dentry; ++ err = au_whdir(h_dir, h_path); ++ if (unlikely(err)) ++ goto out; ++ wbr->wbr_orph = dget(base[AuBrWh_ORPH].dentry); ++ ++out: ++ return err; ++} ++ ++/* ++ * for the moment, aufs supports the branch filesystem which does not support ++ * link(2). testing on FAT which does not support i_op->setattr() fully either, ++ * copyup failed. finally, such filesystem will not be used as the writable ++ * branch. ++ * ++ * returns tri-state, see above. ++ */ ++static int au_wh_init_rw(struct dentry *h_root, struct au_wbr *wbr, ++ int do_plink, struct au_wh_base base[], ++ struct path *h_path) ++{ ++ int err; ++ struct inode *h_dir; ++ ++ WbrWhMustWriteLock(wbr); ++ ++ err = test_linkable(h_root); ++ if (unlikely(err)) { ++ err = 1; ++ goto out; ++ } ++ ++ /* ++ * todo: should this create be done in /sbin/mount.aufs helper? ++ */ ++ err = -EEXIST; ++ h_dir = h_root->d_inode; ++ if (!base[AuBrWh_BASE].dentry->d_inode) { ++ h_path->dentry = base[AuBrWh_BASE].dentry; ++ err = vfsub_create(h_dir, h_path, WH_MASK, /*want_excl*/true); ++ } else if (S_ISREG(base[AuBrWh_BASE].dentry->d_inode->i_mode)) ++ err = 0; ++ else ++ pr_err("unknown %pd2 exists\n", base[AuBrWh_BASE].dentry); ++ if (unlikely(err)) ++ goto out; ++ ++ h_path->dentry = base[AuBrWh_PLINK].dentry; ++ if (do_plink) { ++ err = au_whdir(h_dir, h_path); ++ if (unlikely(err)) ++ goto out; ++ wbr->wbr_plink = dget(base[AuBrWh_PLINK].dentry); ++ } else ++ au_wh_clean(h_dir, h_path, /*isdir*/1); ++ wbr->wbr_whbase = dget(base[AuBrWh_BASE].dentry); ++ ++ h_path->dentry = base[AuBrWh_ORPH].dentry; ++ err = au_whdir(h_dir, h_path); ++ if (unlikely(err)) ++ goto out; ++ wbr->wbr_orph = dget(base[AuBrWh_ORPH].dentry); ++ ++out: ++ return err; ++} ++ ++/* ++ * initialize the whiteout base file/dir for @br. ++ */ ++int au_wh_init(struct au_branch *br, struct super_block *sb) ++{ ++ int err, i; ++ const unsigned char do_plink ++ = !!au_opt_test(au_mntflags(sb), PLINK); ++ struct inode *h_dir; ++ struct path path = br->br_path; ++ struct dentry *h_root = path.dentry; ++ struct au_wbr *wbr = br->br_wbr; ++ static const struct qstr base_name[] = { ++ [AuBrWh_BASE] = QSTR_INIT(AUFS_BASE_NAME, ++ sizeof(AUFS_BASE_NAME) - 1), ++ [AuBrWh_PLINK] = QSTR_INIT(AUFS_PLINKDIR_NAME, ++ sizeof(AUFS_PLINKDIR_NAME) - 1), ++ [AuBrWh_ORPH] = QSTR_INIT(AUFS_ORPHDIR_NAME, ++ sizeof(AUFS_ORPHDIR_NAME) - 1) ++ }; ++ struct au_wh_base base[] = { ++ [AuBrWh_BASE] = { ++ .name = base_name + AuBrWh_BASE, ++ .dentry = NULL ++ }, ++ [AuBrWh_PLINK] = { ++ .name = base_name + AuBrWh_PLINK, ++ .dentry = NULL ++ }, ++ [AuBrWh_ORPH] = { ++ .name = base_name + AuBrWh_ORPH, ++ .dentry = NULL ++ } ++ }; ++ ++ if (wbr) ++ WbrWhMustWriteLock(wbr); ++ ++ for (i = 0; i < AuBrWh_Last; i++) { ++ /* doubly whiteouted */ ++ struct dentry *d; ++ ++ d = au_wh_lkup(h_root, (void *)base[i].name, br); ++ err = PTR_ERR(d); ++ if (IS_ERR(d)) ++ goto out; ++ ++ base[i].dentry = d; ++ AuDebugOn(wbr ++ && wbr->wbr_wh[i] ++ && wbr->wbr_wh[i] != base[i].dentry); ++ } ++ ++ if (wbr) ++ for (i = 0; i < AuBrWh_Last; i++) { ++ dput(wbr->wbr_wh[i]); ++ wbr->wbr_wh[i] = NULL; ++ } ++ ++ err = 0; ++ if (!au_br_writable(br->br_perm)) { ++ h_dir = h_root->d_inode; ++ au_wh_init_ro(h_dir, base, &path); ++ } else if (!au_br_wh_linkable(br->br_perm)) { ++ err = au_wh_init_rw_nolink(h_root, wbr, do_plink, base, &path); ++ if (err > 0) ++ goto out; ++ else if (err) ++ goto out_err; ++ } else { ++ err = au_wh_init_rw(h_root, wbr, do_plink, base, &path); ++ if (err > 0) ++ goto out; ++ else if (err) ++ goto out_err; ++ } ++ goto out; /* success */ ++ ++out_err: ++ pr_err("an error(%d) on the writable branch %pd(%s)\n", ++ err, h_root, au_sbtype(h_root->d_sb)); ++out: ++ for (i = 0; i < AuBrWh_Last; i++) ++ dput(base[i].dentry); ++ return err; ++} ++ ++/* ---------------------------------------------------------------------- */ ++/* ++ * whiteouts are all hard-linked usually. ++ * when its link count reaches a ceiling, we create a new whiteout base ++ * asynchronously. ++ */ ++ ++struct reinit_br_wh { ++ struct super_block *sb; ++ struct au_branch *br; ++}; ++ ++static void reinit_br_wh(void *arg) ++{ ++ int err; ++ aufs_bindex_t bindex; ++ struct path h_path; ++ struct reinit_br_wh *a = arg; ++ struct au_wbr *wbr; ++ struct inode *dir, *delegated; ++ struct dentry *h_root; ++ struct au_hinode *hdir; ++ ++ err = 0; ++ wbr = a->br->br_wbr; ++ /* big aufs lock */ ++ si_noflush_write_lock(a->sb); ++ if (!au_br_writable(a->br->br_perm)) ++ goto out; ++ bindex = au_br_index(a->sb, a->br->br_id); ++ if (unlikely(bindex < 0)) ++ goto out; ++ ++ di_read_lock_parent(a->sb->s_root, AuLock_IR); ++ dir = a->sb->s_root->d_inode; ++ hdir = au_hi(dir, bindex); ++ h_root = au_h_dptr(a->sb->s_root, bindex); ++ AuDebugOn(h_root != au_br_dentry(a->br)); ++ ++ au_hn_imtx_lock_nested(hdir, AuLsc_I_PARENT); ++ wbr_wh_write_lock(wbr); ++ err = au_h_verify(wbr->wbr_whbase, au_opt_udba(a->sb), hdir->hi_inode, ++ h_root, a->br); ++ if (!err) { ++ h_path.dentry = wbr->wbr_whbase; ++ h_path.mnt = au_br_mnt(a->br); ++ delegated = NULL; ++ err = vfsub_unlink(hdir->hi_inode, &h_path, &delegated, ++ /*force*/0); ++ if (unlikely(err == -EWOULDBLOCK)) { ++ pr_warn("cannot retry for NFSv4 delegation" ++ " for an internal unlink\n"); ++ iput(delegated); ++ } ++ } else { ++ pr_warn("%pd is moved, ignored\n", wbr->wbr_whbase); ++ err = 0; ++ } ++ dput(wbr->wbr_whbase); ++ wbr->wbr_whbase = NULL; ++ if (!err) ++ err = au_wh_init(a->br, a->sb); ++ wbr_wh_write_unlock(wbr); ++ au_hn_imtx_unlock(hdir); ++ di_read_unlock(a->sb->s_root, AuLock_IR); ++ if (!err) ++ au_fhsm_wrote(a->sb, bindex, /*force*/0); ++ ++out: ++ if (wbr) ++ atomic_dec(&wbr->wbr_wh_running); ++ atomic_dec(&a->br->br_count); ++ si_write_unlock(a->sb); ++ au_nwt_done(&au_sbi(a->sb)->si_nowait); ++ kfree(arg); ++ if (unlikely(err)) ++ AuIOErr("err %d\n", err); ++} ++ ++static void kick_reinit_br_wh(struct super_block *sb, struct au_branch *br) ++{ ++ int do_dec, wkq_err; ++ struct reinit_br_wh *arg; ++ ++ do_dec = 1; ++ if (atomic_inc_return(&br->br_wbr->wbr_wh_running) != 1) ++ goto out; ++ ++ /* ignore ENOMEM */ ++ arg = kmalloc(sizeof(*arg), GFP_NOFS); ++ if (arg) { ++ /* ++ * dec(wh_running), kfree(arg) and dec(br_count) ++ * in reinit function ++ */ ++ arg->sb = sb; ++ arg->br = br; ++ atomic_inc(&br->br_count); ++ wkq_err = au_wkq_nowait(reinit_br_wh, arg, sb, /*flags*/0); ++ if (unlikely(wkq_err)) { ++ atomic_dec(&br->br_wbr->wbr_wh_running); ++ atomic_dec(&br->br_count); ++ kfree(arg); ++ } ++ do_dec = 0; ++ } ++ ++out: ++ if (do_dec) ++ atomic_dec(&br->br_wbr->wbr_wh_running); ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++/* ++ * create the whiteout @wh. ++ */ ++static int link_or_create_wh(struct super_block *sb, aufs_bindex_t bindex, ++ struct dentry *wh) ++{ ++ int err; ++ struct path h_path = { ++ .dentry = wh ++ }; ++ struct au_branch *br; ++ struct au_wbr *wbr; ++ struct dentry *h_parent; ++ struct inode *h_dir, *delegated; ++ ++ h_parent = wh->d_parent; /* dir inode is locked */ ++ h_dir = h_parent->d_inode; ++ IMustLock(h_dir); ++ ++ br = au_sbr(sb, bindex); ++ h_path.mnt = au_br_mnt(br); ++ wbr = br->br_wbr; ++ wbr_wh_read_lock(wbr); ++ if (wbr->wbr_whbase) { ++ delegated = NULL; ++ err = vfsub_link(wbr->wbr_whbase, h_dir, &h_path, &delegated); ++ if (unlikely(err == -EWOULDBLOCK)) { ++ pr_warn("cannot retry for NFSv4 delegation" ++ " for an internal link\n"); ++ iput(delegated); ++ } ++ if (!err || err != -EMLINK) ++ goto out; ++ ++ /* link count full. re-initialize br_whbase. */ ++ kick_reinit_br_wh(sb, br); ++ } ++ ++ /* return this error in this context */ ++ err = vfsub_create(h_dir, &h_path, WH_MASK, /*want_excl*/true); ++ if (!err) ++ au_fhsm_wrote(sb, bindex, /*force*/0); ++ ++out: ++ wbr_wh_read_unlock(wbr); ++ return err; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++/* ++ * create or remove the diropq. ++ */ ++static struct dentry *do_diropq(struct dentry *dentry, aufs_bindex_t bindex, ++ unsigned int flags) ++{ ++ struct dentry *opq_dentry, *h_dentry; ++ struct super_block *sb; ++ struct au_branch *br; ++ int err; ++ ++ sb = dentry->d_sb; ++ br = au_sbr(sb, bindex); ++ h_dentry = au_h_dptr(dentry, bindex); ++ opq_dentry = vfsub_lkup_one(&diropq_name, h_dentry); ++ if (IS_ERR(opq_dentry)) ++ goto out; ++ ++ if (au_ftest_diropq(flags, CREATE)) { ++ err = link_or_create_wh(sb, bindex, opq_dentry); ++ if (!err) { ++ au_set_dbdiropq(dentry, bindex); ++ goto out; /* success */ ++ } ++ } else { ++ struct path tmp = { ++ .dentry = opq_dentry, ++ .mnt = au_br_mnt(br) ++ }; ++ err = do_unlink_wh(au_h_iptr(dentry->d_inode, bindex), &tmp); ++ if (!err) ++ au_set_dbdiropq(dentry, -1); ++ } ++ dput(opq_dentry); ++ opq_dentry = ERR_PTR(err); ++ ++out: ++ return opq_dentry; ++} ++ ++struct do_diropq_args { ++ struct dentry **errp; ++ struct dentry *dentry; ++ aufs_bindex_t bindex; ++ unsigned int flags; ++}; ++ ++static void call_do_diropq(void *args) ++{ ++ struct do_diropq_args *a = args; ++ *a->errp = do_diropq(a->dentry, a->bindex, a->flags); ++} ++ ++struct dentry *au_diropq_sio(struct dentry *dentry, aufs_bindex_t bindex, ++ unsigned int flags) ++{ ++ struct dentry *diropq, *h_dentry; ++ ++ h_dentry = au_h_dptr(dentry, bindex); ++ if (!au_test_h_perm_sio(h_dentry->d_inode, MAY_EXEC | MAY_WRITE)) ++ diropq = do_diropq(dentry, bindex, flags); ++ else { ++ int wkq_err; ++ struct do_diropq_args args = { ++ .errp = &diropq, ++ .dentry = dentry, ++ .bindex = bindex, ++ .flags = flags ++ }; ++ ++ wkq_err = au_wkq_wait(call_do_diropq, &args); ++ if (unlikely(wkq_err)) ++ diropq = ERR_PTR(wkq_err); ++ } ++ ++ return diropq; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++/* ++ * lookup whiteout dentry. ++ * @h_parent: lower parent dentry which must exist and be locked ++ * @base_name: name of dentry which will be whiteouted ++ * returns dentry for whiteout. ++ */ ++struct dentry *au_wh_lkup(struct dentry *h_parent, struct qstr *base_name, ++ struct au_branch *br) ++{ ++ int err; ++ struct qstr wh_name; ++ struct dentry *wh_dentry; ++ ++ err = au_wh_name_alloc(&wh_name, base_name); ++ wh_dentry = ERR_PTR(err); ++ if (!err) { ++ wh_dentry = vfsub_lkup_one(&wh_name, h_parent); ++ kfree(wh_name.name); ++ } ++ return wh_dentry; ++} ++ ++/* ++ * link/create a whiteout for @dentry on @bindex. ++ */ ++struct dentry *au_wh_create(struct dentry *dentry, aufs_bindex_t bindex, ++ struct dentry *h_parent) ++{ ++ struct dentry *wh_dentry; ++ struct super_block *sb; ++ int err; ++ ++ sb = dentry->d_sb; ++ wh_dentry = au_wh_lkup(h_parent, &dentry->d_name, au_sbr(sb, bindex)); ++ if (!IS_ERR(wh_dentry) && !wh_dentry->d_inode) { ++ err = link_or_create_wh(sb, bindex, wh_dentry); ++ if (!err) { ++ au_set_dbwh(dentry, bindex); ++ au_fhsm_wrote(sb, bindex, /*force*/0); ++ } else { ++ dput(wh_dentry); ++ wh_dentry = ERR_PTR(err); ++ } ++ } ++ ++ return wh_dentry; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++/* Delete all whiteouts in this directory on branch bindex. */ ++static int del_wh_children(struct dentry *h_dentry, struct au_nhash *whlist, ++ aufs_bindex_t bindex, struct au_branch *br) ++{ ++ int err; ++ unsigned long ul, n; ++ struct qstr wh_name; ++ char *p; ++ struct hlist_head *head; ++ struct au_vdir_wh *pos; ++ struct au_vdir_destr *str; ++ ++ err = -ENOMEM; ++ p = (void *)__get_free_page(GFP_NOFS); ++ wh_name.name = p; ++ if (unlikely(!wh_name.name)) ++ goto out; ++ ++ err = 0; ++ memcpy(p, AUFS_WH_PFX, AUFS_WH_PFX_LEN); ++ p += AUFS_WH_PFX_LEN; ++ n = whlist->nh_num; ++ head = whlist->nh_head; ++ for (ul = 0; !err && ul < n; ul++, head++) { ++ hlist_for_each_entry(pos, head, wh_hash) { ++ if (pos->wh_bindex != bindex) ++ continue; ++ ++ str = &pos->wh_str; ++ if (str->len + AUFS_WH_PFX_LEN <= PATH_MAX) { ++ memcpy(p, str->name, str->len); ++ wh_name.len = AUFS_WH_PFX_LEN + str->len; ++ err = unlink_wh_name(h_dentry, &wh_name, br); ++ if (!err) ++ continue; ++ break; ++ } ++ AuIOErr("whiteout name too long %.*s\n", ++ str->len, str->name); ++ err = -EIO; ++ break; ++ } ++ } ++ free_page((unsigned long)wh_name.name); ++ ++out: ++ return err; ++} ++ ++struct del_wh_children_args { ++ int *errp; ++ struct dentry *h_dentry; ++ struct au_nhash *whlist; ++ aufs_bindex_t bindex; ++ struct au_branch *br; ++}; ++ ++static void call_del_wh_children(void *args) ++{ ++ struct del_wh_children_args *a = args; ++ *a->errp = del_wh_children(a->h_dentry, a->whlist, a->bindex, a->br); ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++struct au_whtmp_rmdir *au_whtmp_rmdir_alloc(struct super_block *sb, gfp_t gfp) ++{ ++ struct au_whtmp_rmdir *whtmp; ++ int err; ++ unsigned int rdhash; ++ ++ SiMustAnyLock(sb); ++ ++ whtmp = kzalloc(sizeof(*whtmp), gfp); ++ if (unlikely(!whtmp)) { ++ whtmp = ERR_PTR(-ENOMEM); ++ goto out; ++ } ++ ++ /* no estimation for dir size */ ++ rdhash = au_sbi(sb)->si_rdhash; ++ if (!rdhash) ++ rdhash = AUFS_RDHASH_DEF; ++ err = au_nhash_alloc(&whtmp->whlist, rdhash, gfp); ++ if (unlikely(err)) { ++ kfree(whtmp); ++ whtmp = ERR_PTR(err); ++ } ++ ++out: ++ return whtmp; ++} ++ ++void au_whtmp_rmdir_free(struct au_whtmp_rmdir *whtmp) ++{ ++ if (whtmp->br) ++ atomic_dec(&whtmp->br->br_count); ++ dput(whtmp->wh_dentry); ++ iput(whtmp->dir); ++ au_nhash_wh_free(&whtmp->whlist); ++ kfree(whtmp); ++} ++ ++/* ++ * rmdir the whiteouted temporary named dir @h_dentry. ++ * @whlist: whiteouted children. ++ */ ++int au_whtmp_rmdir(struct inode *dir, aufs_bindex_t bindex, ++ struct dentry *wh_dentry, struct au_nhash *whlist) ++{ ++ int err; ++ unsigned int h_nlink; ++ struct path h_tmp; ++ struct inode *wh_inode, *h_dir; ++ struct au_branch *br; ++ ++ h_dir = wh_dentry->d_parent->d_inode; /* dir inode is locked */ ++ IMustLock(h_dir); ++ ++ br = au_sbr(dir->i_sb, bindex); ++ wh_inode = wh_dentry->d_inode; ++ mutex_lock_nested(&wh_inode->i_mutex, AuLsc_I_CHILD); ++ ++ /* ++ * someone else might change some whiteouts while we were sleeping. ++ * it means this whlist may have an obsoleted entry. ++ */ ++ if (!au_test_h_perm_sio(wh_inode, MAY_EXEC | MAY_WRITE)) ++ err = del_wh_children(wh_dentry, whlist, bindex, br); ++ else { ++ int wkq_err; ++ struct del_wh_children_args args = { ++ .errp = &err, ++ .h_dentry = wh_dentry, ++ .whlist = whlist, ++ .bindex = bindex, ++ .br = br ++ }; ++ ++ wkq_err = au_wkq_wait(call_del_wh_children, &args); ++ if (unlikely(wkq_err)) ++ err = wkq_err; ++ } ++ mutex_unlock(&wh_inode->i_mutex); ++ ++ if (!err) { ++ h_tmp.dentry = wh_dentry; ++ h_tmp.mnt = au_br_mnt(br); ++ h_nlink = h_dir->i_nlink; ++ err = vfsub_rmdir(h_dir, &h_tmp); ++ /* some fs doesn't change the parent nlink in some cases */ ++ h_nlink -= h_dir->i_nlink; ++ } ++ ++ if (!err) { ++ if (au_ibstart(dir) == bindex) { ++ /* todo: dir->i_mutex is necessary */ ++ au_cpup_attr_timesizes(dir); ++ if (h_nlink) ++ vfsub_drop_nlink(dir); ++ } ++ return 0; /* success */ ++ } ++ ++ pr_warn("failed removing %pd(%d), ignored\n", wh_dentry, err); ++ return err; ++} ++ ++static void call_rmdir_whtmp(void *args) ++{ ++ int err; ++ aufs_bindex_t bindex; ++ struct au_whtmp_rmdir *a = args; ++ struct super_block *sb; ++ struct dentry *h_parent; ++ struct inode *h_dir; ++ struct au_hinode *hdir; ++ ++ /* rmdir by nfsd may cause deadlock with this i_mutex */ ++ /* mutex_lock(&a->dir->i_mutex); */ ++ err = -EROFS; ++ sb = a->dir->i_sb; ++ si_read_lock(sb, !AuLock_FLUSH); ++ if (!au_br_writable(a->br->br_perm)) ++ goto out; ++ bindex = au_br_index(sb, a->br->br_id); ++ if (unlikely(bindex < 0)) ++ goto out; ++ ++ err = -EIO; ++ ii_write_lock_parent(a->dir); ++ h_parent = dget_parent(a->wh_dentry); ++ h_dir = h_parent->d_inode; ++ hdir = au_hi(a->dir, bindex); ++ err = vfsub_mnt_want_write(au_br_mnt(a->br)); ++ if (unlikely(err)) ++ goto out_mnt; ++ au_hn_imtx_lock_nested(hdir, AuLsc_I_PARENT); ++ err = au_h_verify(a->wh_dentry, au_opt_udba(sb), h_dir, h_parent, ++ a->br); ++ if (!err) ++ err = au_whtmp_rmdir(a->dir, bindex, a->wh_dentry, &a->whlist); ++ au_hn_imtx_unlock(hdir); ++ vfsub_mnt_drop_write(au_br_mnt(a->br)); ++ ++out_mnt: ++ dput(h_parent); ++ ii_write_unlock(a->dir); ++out: ++ /* mutex_unlock(&a->dir->i_mutex); */ ++ au_whtmp_rmdir_free(a); ++ si_read_unlock(sb); ++ au_nwt_done(&au_sbi(sb)->si_nowait); ++ if (unlikely(err)) ++ AuIOErr("err %d\n", err); ++} ++ ++void au_whtmp_kick_rmdir(struct inode *dir, aufs_bindex_t bindex, ++ struct dentry *wh_dentry, struct au_whtmp_rmdir *args) ++{ ++ int wkq_err; ++ struct super_block *sb; ++ ++ IMustLock(dir); ++ ++ /* all post-process will be done in do_rmdir_whtmp(). */ ++ sb = dir->i_sb; ++ args->dir = au_igrab(dir); ++ args->br = au_sbr(sb, bindex); ++ atomic_inc(&args->br->br_count); ++ args->wh_dentry = dget(wh_dentry); ++ wkq_err = au_wkq_nowait(call_rmdir_whtmp, args, sb, /*flags*/0); ++ if (unlikely(wkq_err)) { ++ pr_warn("rmdir error %pd (%d), ignored\n", wh_dentry, wkq_err); ++ au_whtmp_rmdir_free(args); ++ } ++} +diff --git a/fs/aufs/whout.h b/fs/aufs/whout.h +new file mode 100644 +index 0000000..5a5c378 +--- /dev/null ++++ b/fs/aufs/whout.h +@@ -0,0 +1,85 @@ ++/* ++ * Copyright (C) 2005-2016 Junjiro R. Okajima ++ * ++ * This program, aufs is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . ++ */ ++ ++/* ++ * whiteout for logical deletion and opaque directory ++ */ ++ ++#ifndef __AUFS_WHOUT_H__ ++#define __AUFS_WHOUT_H__ ++ ++#ifdef __KERNEL__ ++ ++#include "dir.h" ++ ++/* whout.c */ ++int au_wh_name_alloc(struct qstr *wh, const struct qstr *name); ++int au_wh_test(struct dentry *h_parent, struct qstr *wh_name, int try_sio); ++int au_diropq_test(struct dentry *h_dentry); ++struct au_branch; ++struct dentry *au_whtmp_lkup(struct dentry *h_parent, struct au_branch *br, ++ struct qstr *prefix); ++int au_whtmp_ren(struct dentry *h_dentry, struct au_branch *br); ++int au_wh_unlink_dentry(struct inode *h_dir, struct path *h_path, ++ struct dentry *dentry); ++int au_wh_init(struct au_branch *br, struct super_block *sb); ++ ++/* diropq flags */ ++#define AuDiropq_CREATE 1 ++#define au_ftest_diropq(flags, name) ((flags) & AuDiropq_##name) ++#define au_fset_diropq(flags, name) \ ++ do { (flags) |= AuDiropq_##name; } while (0) ++#define au_fclr_diropq(flags, name) \ ++ do { (flags) &= ~AuDiropq_##name; } while (0) ++ ++struct dentry *au_diropq_sio(struct dentry *dentry, aufs_bindex_t bindex, ++ unsigned int flags); ++struct dentry *au_wh_lkup(struct dentry *h_parent, struct qstr *base_name, ++ struct au_branch *br); ++struct dentry *au_wh_create(struct dentry *dentry, aufs_bindex_t bindex, ++ struct dentry *h_parent); ++ ++/* real rmdir for the whiteout-ed dir */ ++struct au_whtmp_rmdir { ++ struct inode *dir; ++ struct au_branch *br; ++ struct dentry *wh_dentry; ++ struct au_nhash whlist; ++}; ++ ++struct au_whtmp_rmdir *au_whtmp_rmdir_alloc(struct super_block *sb, gfp_t gfp); ++void au_whtmp_rmdir_free(struct au_whtmp_rmdir *whtmp); ++int au_whtmp_rmdir(struct inode *dir, aufs_bindex_t bindex, ++ struct dentry *wh_dentry, struct au_nhash *whlist); ++void au_whtmp_kick_rmdir(struct inode *dir, aufs_bindex_t bindex, ++ struct dentry *wh_dentry, struct au_whtmp_rmdir *args); ++ ++/* ---------------------------------------------------------------------- */ ++ ++static inline struct dentry *au_diropq_create(struct dentry *dentry, ++ aufs_bindex_t bindex) ++{ ++ return au_diropq_sio(dentry, bindex, AuDiropq_CREATE); ++} ++ ++static inline int au_diropq_remove(struct dentry *dentry, aufs_bindex_t bindex) ++{ ++ return PTR_ERR(au_diropq_sio(dentry, bindex, !AuDiropq_CREATE)); ++} ++ ++#endif /* __KERNEL__ */ ++#endif /* __AUFS_WHOUT_H__ */ +diff --git a/fs/aufs/wkq.c b/fs/aufs/wkq.c +new file mode 100644 +index 0000000..a4e1b92 +--- /dev/null ++++ b/fs/aufs/wkq.c +@@ -0,0 +1,213 @@ ++/* ++ * Copyright (C) 2005-2016 Junjiro R. Okajima ++ * ++ * This program, aufs is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . ++ */ ++ ++/* ++ * workqueue for asynchronous/super-io operations ++ * todo: try new dredential scheme ++ */ ++ ++#include ++#include "aufs.h" ++ ++/* internal workqueue named AUFS_WKQ_NAME */ ++ ++static struct workqueue_struct *au_wkq; ++ ++struct au_wkinfo { ++ struct work_struct wk; ++ struct kobject *kobj; ++ ++ unsigned int flags; /* see wkq.h */ ++ ++ au_wkq_func_t func; ++ void *args; ++ ++ struct completion *comp; ++}; ++ ++/* ---------------------------------------------------------------------- */ ++ ++static void wkq_func(struct work_struct *wk) ++{ ++ struct au_wkinfo *wkinfo = container_of(wk, struct au_wkinfo, wk); ++ ++ AuDebugOn(!uid_eq(current_fsuid(), GLOBAL_ROOT_UID)); ++ AuDebugOn(rlimit(RLIMIT_FSIZE) != RLIM_INFINITY); ++ ++ wkinfo->func(wkinfo->args); ++ if (au_ftest_wkq(wkinfo->flags, WAIT)) ++ complete(wkinfo->comp); ++ else { ++ kobject_put(wkinfo->kobj); ++ module_put(THIS_MODULE); /* todo: ?? */ ++ kfree(wkinfo); ++ } ++} ++ ++/* ++ * Since struct completion is large, try allocating it dynamically. ++ */ ++#if 1 /* defined(CONFIG_4KSTACKS) || defined(AuTest4KSTACKS) */ ++#define AuWkqCompDeclare(name) struct completion *comp = NULL ++ ++static int au_wkq_comp_alloc(struct au_wkinfo *wkinfo, struct completion **comp) ++{ ++ *comp = kmalloc(sizeof(**comp), GFP_NOFS); ++ if (*comp) { ++ init_completion(*comp); ++ wkinfo->comp = *comp; ++ return 0; ++ } ++ return -ENOMEM; ++} ++ ++static void au_wkq_comp_free(struct completion *comp) ++{ ++ kfree(comp); ++} ++ ++#else ++ ++/* no braces */ ++#define AuWkqCompDeclare(name) \ ++ DECLARE_COMPLETION_ONSTACK(_ ## name); \ ++ struct completion *comp = &_ ## name ++ ++static int au_wkq_comp_alloc(struct au_wkinfo *wkinfo, struct completion **comp) ++{ ++ wkinfo->comp = *comp; ++ return 0; ++} ++ ++static void au_wkq_comp_free(struct completion *comp __maybe_unused) ++{ ++ /* empty */ ++} ++#endif /* 4KSTACKS */ ++ ++static void au_wkq_run(struct au_wkinfo *wkinfo) ++{ ++ if (au_ftest_wkq(wkinfo->flags, NEST)) { ++ if (au_wkq_test()) { ++ AuWarn1("wkq from wkq, unless silly-rename on NFS," ++ " due to a dead dir by UDBA?\n"); ++ AuDebugOn(au_ftest_wkq(wkinfo->flags, WAIT)); ++ } ++ } else ++ au_dbg_verify_kthread(); ++ ++ if (au_ftest_wkq(wkinfo->flags, WAIT)) { ++ INIT_WORK_ONSTACK(&wkinfo->wk, wkq_func); ++ queue_work(au_wkq, &wkinfo->wk); ++ } else { ++ INIT_WORK(&wkinfo->wk, wkq_func); ++ schedule_work(&wkinfo->wk); ++ } ++} ++ ++/* ++ * Be careful. It is easy to make deadlock happen. ++ * processA: lock, wkq and wait ++ * processB: wkq and wait, lock in wkq ++ * --> deadlock ++ */ ++int au_wkq_do_wait(unsigned int flags, au_wkq_func_t func, void *args) ++{ ++ int err; ++ AuWkqCompDeclare(comp); ++ struct au_wkinfo wkinfo = { ++ .flags = flags, ++ .func = func, ++ .args = args ++ }; ++ ++ err = au_wkq_comp_alloc(&wkinfo, &comp); ++ if (!err) { ++ au_wkq_run(&wkinfo); ++ /* no timeout, no interrupt */ ++ wait_for_completion(wkinfo.comp); ++ au_wkq_comp_free(comp); ++ destroy_work_on_stack(&wkinfo.wk); ++ } ++ ++ return err; ++ ++} ++ ++/* ++ * Note: dget/dput() in func for aufs dentries are not supported. It will be a ++ * problem in a concurrent umounting. ++ */ ++int au_wkq_nowait(au_wkq_func_t func, void *args, struct super_block *sb, ++ unsigned int flags) ++{ ++ int err; ++ struct au_wkinfo *wkinfo; ++ ++ atomic_inc(&au_sbi(sb)->si_nowait.nw_len); ++ ++ /* ++ * wkq_func() must free this wkinfo. ++ * it highly depends upon the implementation of workqueue. ++ */ ++ err = 0; ++ wkinfo = kmalloc(sizeof(*wkinfo), GFP_NOFS); ++ if (wkinfo) { ++ wkinfo->kobj = &au_sbi(sb)->si_kobj; ++ wkinfo->flags = flags & ~AuWkq_WAIT; ++ wkinfo->func = func; ++ wkinfo->args = args; ++ wkinfo->comp = NULL; ++ kobject_get(wkinfo->kobj); ++ __module_get(THIS_MODULE); /* todo: ?? */ ++ ++ au_wkq_run(wkinfo); ++ } else { ++ err = -ENOMEM; ++ au_nwt_done(&au_sbi(sb)->si_nowait); ++ } ++ ++ return err; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++void au_nwt_init(struct au_nowait_tasks *nwt) ++{ ++ atomic_set(&nwt->nw_len, 0); ++ /* smp_mb(); */ /* atomic_set */ ++ init_waitqueue_head(&nwt->nw_wq); ++} ++ ++void au_wkq_fin(void) ++{ ++ destroy_workqueue(au_wkq); ++} ++ ++int __init au_wkq_init(void) ++{ ++ int err; ++ ++ err = 0; ++ au_wkq = alloc_workqueue(AUFS_WKQ_NAME, 0, WQ_DFL_ACTIVE); ++ if (IS_ERR(au_wkq)) ++ err = PTR_ERR(au_wkq); ++ else if (!au_wkq) ++ err = -ENOMEM; ++ ++ return err; ++} +diff --git a/fs/aufs/wkq.h b/fs/aufs/wkq.h +new file mode 100644 +index 0000000..830123c +--- /dev/null ++++ b/fs/aufs/wkq.h +@@ -0,0 +1,91 @@ ++/* ++ * Copyright (C) 2005-2016 Junjiro R. Okajima ++ * ++ * This program, aufs is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . ++ */ ++ ++/* ++ * workqueue for asynchronous/super-io operations ++ * todo: try new credentials management scheme ++ */ ++ ++#ifndef __AUFS_WKQ_H__ ++#define __AUFS_WKQ_H__ ++ ++#ifdef __KERNEL__ ++ ++struct super_block; ++ ++/* ---------------------------------------------------------------------- */ ++ ++/* ++ * in the next operation, wait for the 'nowait' tasks in system-wide workqueue ++ */ ++struct au_nowait_tasks { ++ atomic_t nw_len; ++ wait_queue_head_t nw_wq; ++}; ++ ++/* ---------------------------------------------------------------------- */ ++ ++typedef void (*au_wkq_func_t)(void *args); ++ ++/* wkq flags */ ++#define AuWkq_WAIT 1 ++#define AuWkq_NEST (1 << 1) ++#define au_ftest_wkq(flags, name) ((flags) & AuWkq_##name) ++#define au_fset_wkq(flags, name) \ ++ do { (flags) |= AuWkq_##name; } while (0) ++#define au_fclr_wkq(flags, name) \ ++ do { (flags) &= ~AuWkq_##name; } while (0) ++ ++#ifndef CONFIG_AUFS_HNOTIFY ++#undef AuWkq_NEST ++#define AuWkq_NEST 0 ++#endif ++ ++/* wkq.c */ ++int au_wkq_do_wait(unsigned int flags, au_wkq_func_t func, void *args); ++int au_wkq_nowait(au_wkq_func_t func, void *args, struct super_block *sb, ++ unsigned int flags); ++void au_nwt_init(struct au_nowait_tasks *nwt); ++int __init au_wkq_init(void); ++void au_wkq_fin(void); ++ ++/* ---------------------------------------------------------------------- */ ++ ++static inline int au_wkq_test(void) ++{ ++ return current->flags & PF_WQ_WORKER; ++} ++ ++static inline int au_wkq_wait(au_wkq_func_t func, void *args) ++{ ++ return au_wkq_do_wait(AuWkq_WAIT, func, args); ++} ++ ++static inline void au_nwt_done(struct au_nowait_tasks *nwt) ++{ ++ if (atomic_dec_and_test(&nwt->nw_len)) ++ wake_up_all(&nwt->nw_wq); ++} ++ ++static inline int au_nwt_flush(struct au_nowait_tasks *nwt) ++{ ++ wait_event(nwt->nw_wq, !atomic_read(&nwt->nw_len)); ++ return 0; ++} ++ ++#endif /* __KERNEL__ */ ++#endif /* __AUFS_WKQ_H__ */ +diff --git a/fs/aufs/xattr.c b/fs/aufs/xattr.c +new file mode 100644 +index 0000000..e16beea +--- /dev/null ++++ b/fs/aufs/xattr.c +@@ -0,0 +1,344 @@ ++/* ++ * Copyright (C) 2014-2016 Junjiro R. Okajima ++ * ++ * This program, aufs is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . ++ */ ++ ++/* ++ * handling xattr functions ++ */ ++ ++#include ++#include "aufs.h" ++ ++static int au_xattr_ignore(int err, char *name, unsigned int ignore_flags) ++{ ++ if (!ignore_flags) ++ goto out; ++ switch (err) { ++ case -ENOMEM: ++ case -EDQUOT: ++ goto out; ++ } ++ ++ if ((ignore_flags & AuBrAttr_ICEX) == AuBrAttr_ICEX) { ++ err = 0; ++ goto out; ++ } ++ ++#define cmp(brattr, prefix) do { \ ++ if (!strncmp(name, XATTR_##prefix##_PREFIX, \ ++ XATTR_##prefix##_PREFIX_LEN)) { \ ++ if (ignore_flags & AuBrAttr_ICEX_##brattr) \ ++ err = 0; \ ++ goto out; \ ++ } \ ++ } while (0) ++ ++ cmp(SEC, SECURITY); ++ cmp(SYS, SYSTEM); ++ cmp(TR, TRUSTED); ++ cmp(USR, USER); ++#undef cmp ++ ++ if (ignore_flags & AuBrAttr_ICEX_OTH) ++ err = 0; ++ ++out: ++ return err; ++} ++ ++static const int au_xattr_out_of_list = AuBrAttr_ICEX_OTH << 1; ++ ++static int au_do_cpup_xattr(struct dentry *h_dst, struct dentry *h_src, ++ char *name, char **buf, unsigned int ignore_flags, ++ unsigned int verbose) ++{ ++ int err; ++ ssize_t ssz; ++ struct inode *h_idst; ++ ++ ssz = vfs_getxattr_alloc(h_src, name, buf, 0, GFP_NOFS); ++ err = ssz; ++ if (unlikely(err <= 0)) { ++ if (err == -ENODATA ++ || (err == -EOPNOTSUPP ++ && ((ignore_flags & au_xattr_out_of_list) ++ || (au_test_nfs_noacl(h_src->d_inode) ++ && (!strcmp(name, XATTR_NAME_POSIX_ACL_ACCESS) ++ || !strcmp(name, ++ XATTR_NAME_POSIX_ACL_DEFAULT)))) ++ )) ++ err = 0; ++ if (err && (verbose || au_debug_test())) ++ pr_err("%s, err %d\n", name, err); ++ goto out; ++ } ++ ++ /* unlock it temporary */ ++ h_idst = h_dst->d_inode; ++ mutex_unlock(&h_idst->i_mutex); ++ err = vfsub_setxattr(h_dst, name, *buf, ssz, /*flags*/0); ++ mutex_lock_nested(&h_idst->i_mutex, AuLsc_I_CHILD2); ++ if (unlikely(err)) { ++ if (verbose || au_debug_test()) ++ pr_err("%s, err %d\n", name, err); ++ err = au_xattr_ignore(err, name, ignore_flags); ++ } ++ ++out: ++ return err; ++} ++ ++int au_cpup_xattr(struct dentry *h_dst, struct dentry *h_src, int ignore_flags, ++ unsigned int verbose) ++{ ++ int err, unlocked, acl_access, acl_default; ++ ssize_t ssz; ++ struct inode *h_isrc, *h_idst; ++ char *value, *p, *o, *e; ++ ++ /* try stopping to update the source inode while we are referencing */ ++ /* there should not be the parent-child relationship between them */ ++ h_isrc = h_src->d_inode; ++ h_idst = h_dst->d_inode; ++ mutex_unlock(&h_idst->i_mutex); ++ mutex_lock_nested(&h_isrc->i_mutex, AuLsc_I_CHILD); ++ mutex_lock_nested(&h_idst->i_mutex, AuLsc_I_CHILD2); ++ unlocked = 0; ++ ++ /* some filesystems don't list POSIX ACL, for example tmpfs */ ++ ssz = vfs_listxattr(h_src, NULL, 0); ++ err = ssz; ++ if (unlikely(err < 0)) { ++ AuTraceErr(err); ++ if (err == -ENODATA ++ || err == -EOPNOTSUPP) ++ err = 0; /* ignore */ ++ goto out; ++ } ++ ++ err = 0; ++ p = NULL; ++ o = NULL; ++ if (ssz) { ++ err = -ENOMEM; ++ p = kmalloc(ssz, GFP_NOFS); ++ o = p; ++ if (unlikely(!p)) ++ goto out; ++ err = vfs_listxattr(h_src, p, ssz); ++ } ++ mutex_unlock(&h_isrc->i_mutex); ++ unlocked = 1; ++ AuDbg("err %d, ssz %zd\n", err, ssz); ++ if (unlikely(err < 0)) ++ goto out_free; ++ ++ err = 0; ++ e = p + ssz; ++ value = NULL; ++ acl_access = 0; ++ acl_default = 0; ++ while (!err && p < e) { ++ acl_access |= !strncmp(p, XATTR_NAME_POSIX_ACL_ACCESS, ++ sizeof(XATTR_NAME_POSIX_ACL_ACCESS) - 1); ++ acl_default |= !strncmp(p, XATTR_NAME_POSIX_ACL_DEFAULT, ++ sizeof(XATTR_NAME_POSIX_ACL_DEFAULT) ++ - 1); ++ err = au_do_cpup_xattr(h_dst, h_src, p, &value, ignore_flags, ++ verbose); ++ p += strlen(p) + 1; ++ } ++ AuTraceErr(err); ++ ignore_flags |= au_xattr_out_of_list; ++ if (!err && !acl_access) { ++ err = au_do_cpup_xattr(h_dst, h_src, ++ XATTR_NAME_POSIX_ACL_ACCESS, &value, ++ ignore_flags, verbose); ++ AuTraceErr(err); ++ } ++ if (!err && !acl_default) { ++ err = au_do_cpup_xattr(h_dst, h_src, ++ XATTR_NAME_POSIX_ACL_DEFAULT, &value, ++ ignore_flags, verbose); ++ AuTraceErr(err); ++ } ++ ++ kfree(value); ++ ++out_free: ++ kfree(o); ++out: ++ if (!unlocked) ++ mutex_unlock(&h_isrc->i_mutex); ++ AuTraceErr(err); ++ return err; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++enum { ++ AU_XATTR_LIST, ++ AU_XATTR_GET ++}; ++ ++struct au_lgxattr { ++ int type; ++ union { ++ struct { ++ char *list; ++ size_t size; ++ } list; ++ struct { ++ const char *name; ++ void *value; ++ size_t size; ++ } get; ++ } u; ++}; ++ ++static ssize_t au_lgxattr(struct dentry *dentry, struct au_lgxattr *arg) ++{ ++ ssize_t err; ++ struct path h_path; ++ struct super_block *sb; ++ ++ sb = dentry->d_sb; ++ err = si_read_lock(sb, AuLock_FLUSH | AuLock_NOPLM); ++ if (unlikely(err)) ++ goto out; ++ err = au_h_path_getattr(dentry, /*force*/1, &h_path); ++ if (unlikely(err)) ++ goto out_si; ++ if (unlikely(!h_path.dentry)) ++ /* illegally overlapped or something */ ++ goto out_di; /* pretending success */ ++ ++ /* always topmost entry only */ ++ switch (arg->type) { ++ case AU_XATTR_LIST: ++ err = vfs_listxattr(h_path.dentry, ++ arg->u.list.list, arg->u.list.size); ++ break; ++ case AU_XATTR_GET: ++ err = vfs_getxattr(h_path.dentry, ++ arg->u.get.name, arg->u.get.value, ++ arg->u.get.size); ++ break; ++ } ++ ++out_di: ++ di_read_unlock(dentry, AuLock_IR); ++out_si: ++ si_read_unlock(sb); ++out: ++ AuTraceErr(err); ++ return err; ++} ++ ++ssize_t aufs_listxattr(struct dentry *dentry, char *list, size_t size) ++{ ++ struct au_lgxattr arg = { ++ .type = AU_XATTR_LIST, ++ .u.list = { ++ .list = list, ++ .size = size ++ }, ++ }; ++ ++ return au_lgxattr(dentry, &arg); ++} ++ ++ssize_t aufs_getxattr(struct dentry *dentry, const char *name, void *value, ++ size_t size) ++{ ++ struct au_lgxattr arg = { ++ .type = AU_XATTR_GET, ++ .u.get = { ++ .name = name, ++ .value = value, ++ .size = size ++ }, ++ }; ++ ++ return au_lgxattr(dentry, &arg); ++} ++ ++int aufs_setxattr(struct dentry *dentry, const char *name, const void *value, ++ size_t size, int flags) ++{ ++ struct au_srxattr arg = { ++ .type = AU_XATTR_SET, ++ .u.set = { ++ .name = name, ++ .value = value, ++ .size = size, ++ .flags = flags ++ }, ++ }; ++ ++ return au_srxattr(dentry, &arg); ++} ++ ++int aufs_removexattr(struct dentry *dentry, const char *name) ++{ ++ struct au_srxattr arg = { ++ .type = AU_XATTR_REMOVE, ++ .u.remove = { ++ .name = name ++ }, ++ }; ++ ++ return au_srxattr(dentry, &arg); ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++#if 0 ++static size_t au_xattr_list(struct dentry *dentry, char *list, size_t list_size, ++ const char *name, size_t name_len, int type) ++{ ++ return aufs_listxattr(dentry, list, list_size); ++} ++ ++static int au_xattr_get(struct dentry *dentry, const char *name, void *buffer, ++ size_t size, int type) ++{ ++ return aufs_getxattr(dentry, name, buffer, size); ++} ++ ++static int au_xattr_set(struct dentry *dentry, const char *name, ++ const void *value, size_t size, int flags, int type) ++{ ++ return aufs_setxattr(dentry, name, value, size, flags); ++} ++ ++static const struct xattr_handler au_xattr_handler = { ++ /* no prefix, no flags */ ++ .list = au_xattr_list, ++ .get = au_xattr_get, ++ .set = au_xattr_set ++ /* why no remove? */ ++}; ++ ++static const struct xattr_handler *au_xattr_handlers[] = { ++ &au_xattr_handler ++}; ++ ++void au_xattr_init(struct super_block *sb) ++{ ++ /* sb->s_xattr = au_xattr_handlers; */ ++} ++#endif +diff --git a/fs/aufs/xino.c b/fs/aufs/xino.c +new file mode 100644 +index 0000000..50ab4ca +--- /dev/null ++++ b/fs/aufs/xino.c +@@ -0,0 +1,1343 @@ ++/* ++ * Copyright (C) 2005-2016 Junjiro R. Okajima ++ * ++ * This program, aufs is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . ++ */ ++ ++/* ++ * external inode number translation table and bitmap ++ */ ++ ++#include ++#include ++#include "aufs.h" ++ ++/* todo: unnecessary to support mmap_sem since kernel-space? */ ++ssize_t xino_fread(au_readf_t func, struct file *file, void *kbuf, size_t size, ++ loff_t *pos) ++{ ++ ssize_t err; ++ mm_segment_t oldfs; ++ union { ++ void *k; ++ char __user *u; ++ } buf; ++ ++ buf.k = kbuf; ++ oldfs = get_fs(); ++ set_fs(KERNEL_DS); ++ do { ++ /* todo: signal_pending? */ ++ err = func(file, buf.u, size, pos); ++ } while (err == -EAGAIN || err == -EINTR); ++ set_fs(oldfs); ++ ++#if 0 /* reserved for future use */ ++ if (err > 0) ++ fsnotify_access(file->f_dentry); ++#endif ++ ++ return err; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++static ssize_t xino_fwrite_wkq(au_writef_t func, struct file *file, void *buf, ++ size_t size, loff_t *pos); ++ ++static ssize_t do_xino_fwrite(au_writef_t func, struct file *file, void *kbuf, ++ size_t size, loff_t *pos) ++{ ++ ssize_t err; ++ mm_segment_t oldfs; ++ union { ++ void *k; ++ const char __user *u; ++ } buf; ++ int i; ++ const int prevent_endless = 10; ++ ++ i = 0; ++ buf.k = kbuf; ++ oldfs = get_fs(); ++ set_fs(KERNEL_DS); ++ do { ++ err = func(file, buf.u, size, pos); ++ if (err == -EINTR ++ && !au_wkq_test() ++ && fatal_signal_pending(current)) { ++ set_fs(oldfs); ++ err = xino_fwrite_wkq(func, file, kbuf, size, pos); ++ BUG_ON(err == -EINTR); ++ oldfs = get_fs(); ++ set_fs(KERNEL_DS); ++ } ++ } while (i++ < prevent_endless ++ && (err == -EAGAIN || err == -EINTR)); ++ set_fs(oldfs); ++ ++#if 0 /* reserved for future use */ ++ if (err > 0) ++ fsnotify_modify(file->f_dentry); ++#endif ++ ++ return err; ++} ++ ++struct do_xino_fwrite_args { ++ ssize_t *errp; ++ au_writef_t func; ++ struct file *file; ++ void *buf; ++ size_t size; ++ loff_t *pos; ++}; ++ ++static void call_do_xino_fwrite(void *args) ++{ ++ struct do_xino_fwrite_args *a = args; ++ *a->errp = do_xino_fwrite(a->func, a->file, a->buf, a->size, a->pos); ++} ++ ++static ssize_t xino_fwrite_wkq(au_writef_t func, struct file *file, void *buf, ++ size_t size, loff_t *pos) ++{ ++ ssize_t err; ++ int wkq_err; ++ struct do_xino_fwrite_args args = { ++ .errp = &err, ++ .func = func, ++ .file = file, ++ .buf = buf, ++ .size = size, ++ .pos = pos ++ }; ++ ++ /* ++ * it breaks RLIMIT_FSIZE and normal user's limit, ++ * users should care about quota and real 'filesystem full.' ++ */ ++ wkq_err = au_wkq_wait(call_do_xino_fwrite, &args); ++ if (unlikely(wkq_err)) ++ err = wkq_err; ++ ++ return err; ++} ++ ++ssize_t xino_fwrite(au_writef_t func, struct file *file, void *buf, size_t size, ++ loff_t *pos) ++{ ++ ssize_t err; ++ ++ if (rlimit(RLIMIT_FSIZE) == RLIM_INFINITY) { ++ lockdep_off(); ++ err = do_xino_fwrite(func, file, buf, size, pos); ++ lockdep_on(); ++ } else ++ err = xino_fwrite_wkq(func, file, buf, size, pos); ++ ++ return err; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++/* ++ * create a new xinofile at the same place/path as @base_file. ++ */ ++struct file *au_xino_create2(struct file *base_file, struct file *copy_src) ++{ ++ struct file *file; ++ struct dentry *base, *parent; ++ struct inode *dir, *delegated; ++ struct qstr *name; ++ struct path path; ++ int err; ++ ++ base = base_file->f_dentry; ++ parent = base->d_parent; /* dir inode is locked */ ++ dir = parent->d_inode; ++ IMustLock(dir); ++ ++ file = ERR_PTR(-EINVAL); ++ name = &base->d_name; ++ path.dentry = vfsub_lookup_one_len(name->name, parent, name->len); ++ if (IS_ERR(path.dentry)) { ++ file = (void *)path.dentry; ++ pr_err("%pd lookup err %ld\n", ++ base, PTR_ERR(path.dentry)); ++ goto out; ++ } ++ ++ /* no need to mnt_want_write() since we call dentry_open() later */ ++ err = vfs_create(dir, path.dentry, S_IRUGO | S_IWUGO, NULL); ++ if (unlikely(err)) { ++ file = ERR_PTR(err); ++ pr_err("%pd create err %d\n", base, err); ++ goto out_dput; ++ } ++ ++ path.mnt = base_file->f_path.mnt; ++ file = vfsub_dentry_open(&path, ++ O_RDWR | O_CREAT | O_EXCL | O_LARGEFILE ++ /* | __FMODE_NONOTIFY */); ++ if (IS_ERR(file)) { ++ pr_err("%pd open err %ld\n", base, PTR_ERR(file)); ++ goto out_dput; ++ } ++ ++ delegated = NULL; ++ err = vfsub_unlink(dir, &file->f_path, &delegated, /*force*/0); ++ if (unlikely(err == -EWOULDBLOCK)) { ++ pr_warn("cannot retry for NFSv4 delegation" ++ " for an internal unlink\n"); ++ iput(delegated); ++ } ++ if (unlikely(err)) { ++ pr_err("%pd unlink err %d\n", base, err); ++ goto out_fput; ++ } ++ ++ if (copy_src) { ++ /* no one can touch copy_src xino */ ++ err = au_copy_file(file, copy_src, vfsub_f_size_read(copy_src)); ++ if (unlikely(err)) { ++ pr_err("%pd copy err %d\n", base, err); ++ goto out_fput; ++ } ++ } ++ goto out_dput; /* success */ ++ ++out_fput: ++ fput(file); ++ file = ERR_PTR(err); ++out_dput: ++ dput(path.dentry); ++out: ++ return file; ++} ++ ++struct au_xino_lock_dir { ++ struct au_hinode *hdir; ++ struct dentry *parent; ++ struct mutex *mtx; ++}; ++ ++static void au_xino_lock_dir(struct super_block *sb, struct file *xino, ++ struct au_xino_lock_dir *ldir) ++{ ++ aufs_bindex_t brid, bindex; ++ ++ ldir->hdir = NULL; ++ bindex = -1; ++ brid = au_xino_brid(sb); ++ if (brid >= 0) ++ bindex = au_br_index(sb, brid); ++ if (bindex >= 0) { ++ ldir->hdir = au_hi(sb->s_root->d_inode, bindex); ++ au_hn_imtx_lock_nested(ldir->hdir, AuLsc_I_PARENT); ++ } else { ++ ldir->parent = dget_parent(xino->f_dentry); ++ ldir->mtx = &ldir->parent->d_inode->i_mutex; ++ mutex_lock_nested(ldir->mtx, AuLsc_I_PARENT); ++ } ++} ++ ++static void au_xino_unlock_dir(struct au_xino_lock_dir *ldir) ++{ ++ if (ldir->hdir) ++ au_hn_imtx_unlock(ldir->hdir); ++ else { ++ mutex_unlock(ldir->mtx); ++ dput(ldir->parent); ++ } ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++/* trucate xino files asynchronously */ ++ ++int au_xino_trunc(struct super_block *sb, aufs_bindex_t bindex) ++{ ++ int err; ++ unsigned long jiffy; ++ blkcnt_t blocks; ++ aufs_bindex_t bi, bend; ++ struct kstatfs *st; ++ struct au_branch *br; ++ struct file *new_xino, *file; ++ struct super_block *h_sb; ++ struct au_xino_lock_dir ldir; ++ ++ err = -ENOMEM; ++ st = kmalloc(sizeof(*st), GFP_NOFS); ++ if (unlikely(!st)) ++ goto out; ++ ++ err = -EINVAL; ++ bend = au_sbend(sb); ++ if (unlikely(bindex < 0 || bend < bindex)) ++ goto out_st; ++ br = au_sbr(sb, bindex); ++ file = br->br_xino.xi_file; ++ if (!file) ++ goto out_st; ++ ++ err = vfs_statfs(&file->f_path, st); ++ if (unlikely(err)) ++ AuErr1("statfs err %d, ignored\n", err); ++ jiffy = jiffies; ++ blocks = file_inode(file)->i_blocks; ++ pr_info("begin truncating xino(b%d), ib%llu, %llu/%llu free blks\n", ++ bindex, (u64)blocks, st->f_bfree, st->f_blocks); ++ ++ au_xino_lock_dir(sb, file, &ldir); ++ /* mnt_want_write() is unnecessary here */ ++ new_xino = au_xino_create2(file, file); ++ au_xino_unlock_dir(&ldir); ++ err = PTR_ERR(new_xino); ++ if (IS_ERR(new_xino)) { ++ pr_err("err %d, ignored\n", err); ++ goto out_st; ++ } ++ err = 0; ++ fput(file); ++ br->br_xino.xi_file = new_xino; ++ ++ h_sb = au_br_sb(br); ++ for (bi = 0; bi <= bend; bi++) { ++ if (unlikely(bi == bindex)) ++ continue; ++ br = au_sbr(sb, bi); ++ if (au_br_sb(br) != h_sb) ++ continue; ++ ++ fput(br->br_xino.xi_file); ++ br->br_xino.xi_file = new_xino; ++ get_file(new_xino); ++ } ++ ++ err = vfs_statfs(&new_xino->f_path, st); ++ if (!err) { ++ pr_info("end truncating xino(b%d), ib%llu, %llu/%llu free blks\n", ++ bindex, (u64)file_inode(new_xino)->i_blocks, ++ st->f_bfree, st->f_blocks); ++ if (file_inode(new_xino)->i_blocks < blocks) ++ au_sbi(sb)->si_xino_jiffy = jiffy; ++ } else ++ AuErr1("statfs err %d, ignored\n", err); ++ ++out_st: ++ kfree(st); ++out: ++ return err; ++} ++ ++struct xino_do_trunc_args { ++ struct super_block *sb; ++ struct au_branch *br; ++}; ++ ++static void xino_do_trunc(void *_args) ++{ ++ struct xino_do_trunc_args *args = _args; ++ struct super_block *sb; ++ struct au_branch *br; ++ struct inode *dir; ++ int err; ++ aufs_bindex_t bindex; ++ ++ err = 0; ++ sb = args->sb; ++ dir = sb->s_root->d_inode; ++ br = args->br; ++ ++ si_noflush_write_lock(sb); ++ ii_read_lock_parent(dir); ++ bindex = au_br_index(sb, br->br_id); ++ err = au_xino_trunc(sb, bindex); ++ ii_read_unlock(dir); ++ if (unlikely(err)) ++ pr_warn("err b%d, (%d)\n", bindex, err); ++ atomic_dec(&br->br_xino_running); ++ atomic_dec(&br->br_count); ++ si_write_unlock(sb); ++ au_nwt_done(&au_sbi(sb)->si_nowait); ++ kfree(args); ++} ++ ++static int xino_trunc_test(struct super_block *sb, struct au_branch *br) ++{ ++ int err; ++ struct kstatfs st; ++ struct au_sbinfo *sbinfo; ++ ++ /* todo: si_xino_expire and the ratio should be customizable */ ++ sbinfo = au_sbi(sb); ++ if (time_before(jiffies, ++ sbinfo->si_xino_jiffy + sbinfo->si_xino_expire)) ++ return 0; ++ ++ /* truncation border */ ++ err = vfs_statfs(&br->br_xino.xi_file->f_path, &st); ++ if (unlikely(err)) { ++ AuErr1("statfs err %d, ignored\n", err); ++ return 0; ++ } ++ if (div64_u64(st.f_bfree * 100, st.f_blocks) >= AUFS_XINO_DEF_TRUNC) ++ return 0; ++ ++ return 1; ++} ++ ++static void xino_try_trunc(struct super_block *sb, struct au_branch *br) ++{ ++ struct xino_do_trunc_args *args; ++ int wkq_err; ++ ++ if (!xino_trunc_test(sb, br)) ++ return; ++ ++ if (atomic_inc_return(&br->br_xino_running) > 1) ++ goto out; ++ ++ /* lock and kfree() will be called in trunc_xino() */ ++ args = kmalloc(sizeof(*args), GFP_NOFS); ++ if (unlikely(!args)) { ++ AuErr1("no memory\n"); ++ goto out_args; ++ } ++ ++ atomic_inc(&br->br_count); ++ args->sb = sb; ++ args->br = br; ++ wkq_err = au_wkq_nowait(xino_do_trunc, args, sb, /*flags*/0); ++ if (!wkq_err) ++ return; /* success */ ++ ++ pr_err("wkq %d\n", wkq_err); ++ atomic_dec(&br->br_count); ++ ++out_args: ++ kfree(args); ++out: ++ atomic_dec(&br->br_xino_running); ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++static int au_xino_do_write(au_writef_t write, struct file *file, ++ ino_t h_ino, ino_t ino) ++{ ++ loff_t pos; ++ ssize_t sz; ++ ++ pos = h_ino; ++ if (unlikely(au_loff_max / sizeof(ino) - 1 < pos)) { ++ AuIOErr1("too large hi%lu\n", (unsigned long)h_ino); ++ return -EFBIG; ++ } ++ pos *= sizeof(ino); ++ sz = xino_fwrite(write, file, &ino, sizeof(ino), &pos); ++ if (sz == sizeof(ino)) ++ return 0; /* success */ ++ ++ AuIOErr("write failed (%zd)\n", sz); ++ return -EIO; ++} ++ ++/* ++ * write @ino to the xinofile for the specified branch{@sb, @bindex} ++ * at the position of @h_ino. ++ * even if @ino is zero, it is written to the xinofile and means no entry. ++ * if the size of the xino file on a specific filesystem exceeds the watermark, ++ * try truncating it. ++ */ ++int au_xino_write(struct super_block *sb, aufs_bindex_t bindex, ino_t h_ino, ++ ino_t ino) ++{ ++ int err; ++ unsigned int mnt_flags; ++ struct au_branch *br; ++ ++ BUILD_BUG_ON(sizeof(long long) != sizeof(au_loff_max) ++ || ((loff_t)-1) > 0); ++ SiMustAnyLock(sb); ++ ++ mnt_flags = au_mntflags(sb); ++ if (!au_opt_test(mnt_flags, XINO)) ++ return 0; ++ ++ br = au_sbr(sb, bindex); ++ err = au_xino_do_write(au_sbi(sb)->si_xwrite, br->br_xino.xi_file, ++ h_ino, ino); ++ if (!err) { ++ if (au_opt_test(mnt_flags, TRUNC_XINO) ++ && au_test_fs_trunc_xino(au_br_sb(br))) ++ xino_try_trunc(sb, br); ++ return 0; /* success */ ++ } ++ ++ AuIOErr("write failed (%d)\n", err); ++ return -EIO; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++/* aufs inode number bitmap */ ++ ++static const int page_bits = (int)PAGE_SIZE * BITS_PER_BYTE; ++static ino_t xib_calc_ino(unsigned long pindex, int bit) ++{ ++ ino_t ino; ++ ++ AuDebugOn(bit < 0 || page_bits <= bit); ++ ino = AUFS_FIRST_INO + pindex * page_bits + bit; ++ return ino; ++} ++ ++static void xib_calc_bit(ino_t ino, unsigned long *pindex, int *bit) ++{ ++ AuDebugOn(ino < AUFS_FIRST_INO); ++ ino -= AUFS_FIRST_INO; ++ *pindex = ino / page_bits; ++ *bit = ino % page_bits; ++} ++ ++static int xib_pindex(struct super_block *sb, unsigned long pindex) ++{ ++ int err; ++ loff_t pos; ++ ssize_t sz; ++ struct au_sbinfo *sbinfo; ++ struct file *xib; ++ unsigned long *p; ++ ++ sbinfo = au_sbi(sb); ++ MtxMustLock(&sbinfo->si_xib_mtx); ++ AuDebugOn(pindex > ULONG_MAX / PAGE_SIZE ++ || !au_opt_test(sbinfo->si_mntflags, XINO)); ++ ++ if (pindex == sbinfo->si_xib_last_pindex) ++ return 0; ++ ++ xib = sbinfo->si_xib; ++ p = sbinfo->si_xib_buf; ++ pos = sbinfo->si_xib_last_pindex; ++ pos *= PAGE_SIZE; ++ sz = xino_fwrite(sbinfo->si_xwrite, xib, p, PAGE_SIZE, &pos); ++ if (unlikely(sz != PAGE_SIZE)) ++ goto out; ++ ++ pos = pindex; ++ pos *= PAGE_SIZE; ++ if (vfsub_f_size_read(xib) >= pos + PAGE_SIZE) ++ sz = xino_fread(sbinfo->si_xread, xib, p, PAGE_SIZE, &pos); ++ else { ++ memset(p, 0, PAGE_SIZE); ++ sz = xino_fwrite(sbinfo->si_xwrite, xib, p, PAGE_SIZE, &pos); ++ } ++ if (sz == PAGE_SIZE) { ++ sbinfo->si_xib_last_pindex = pindex; ++ return 0; /* success */ ++ } ++ ++out: ++ AuIOErr1("write failed (%zd)\n", sz); ++ err = sz; ++ if (sz >= 0) ++ err = -EIO; ++ return err; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++static void au_xib_clear_bit(struct inode *inode) ++{ ++ int err, bit; ++ unsigned long pindex; ++ struct super_block *sb; ++ struct au_sbinfo *sbinfo; ++ ++ AuDebugOn(inode->i_nlink); ++ ++ sb = inode->i_sb; ++ xib_calc_bit(inode->i_ino, &pindex, &bit); ++ AuDebugOn(page_bits <= bit); ++ sbinfo = au_sbi(sb); ++ mutex_lock(&sbinfo->si_xib_mtx); ++ err = xib_pindex(sb, pindex); ++ if (!err) { ++ clear_bit(bit, sbinfo->si_xib_buf); ++ sbinfo->si_xib_next_bit = bit; ++ } ++ mutex_unlock(&sbinfo->si_xib_mtx); ++} ++ ++/* for s_op->delete_inode() */ ++void au_xino_delete_inode(struct inode *inode, const int unlinked) ++{ ++ int err; ++ unsigned int mnt_flags; ++ aufs_bindex_t bindex, bend, bi; ++ unsigned char try_trunc; ++ struct au_iinfo *iinfo; ++ struct super_block *sb; ++ struct au_hinode *hi; ++ struct inode *h_inode; ++ struct au_branch *br; ++ au_writef_t xwrite; ++ ++ sb = inode->i_sb; ++ mnt_flags = au_mntflags(sb); ++ if (!au_opt_test(mnt_flags, XINO) ++ || inode->i_ino == AUFS_ROOT_INO) ++ return; ++ ++ if (unlinked) { ++ au_xigen_inc(inode); ++ au_xib_clear_bit(inode); ++ } ++ ++ iinfo = au_ii(inode); ++ if (!iinfo) ++ return; ++ ++ bindex = iinfo->ii_bstart; ++ if (bindex < 0) ++ return; ++ ++ xwrite = au_sbi(sb)->si_xwrite; ++ try_trunc = !!au_opt_test(mnt_flags, TRUNC_XINO); ++ hi = iinfo->ii_hinode + bindex; ++ bend = iinfo->ii_bend; ++ for (; bindex <= bend; bindex++, hi++) { ++ h_inode = hi->hi_inode; ++ if (!h_inode ++ || (!unlinked && h_inode->i_nlink)) ++ continue; ++ ++ /* inode may not be revalidated */ ++ bi = au_br_index(sb, hi->hi_id); ++ if (bi < 0) ++ continue; ++ ++ br = au_sbr(sb, bi); ++ err = au_xino_do_write(xwrite, br->br_xino.xi_file, ++ h_inode->i_ino, /*ino*/0); ++ if (!err && try_trunc ++ && au_test_fs_trunc_xino(au_br_sb(br))) ++ xino_try_trunc(sb, br); ++ } ++} ++ ++/* get an unused inode number from bitmap */ ++ino_t au_xino_new_ino(struct super_block *sb) ++{ ++ ino_t ino; ++ unsigned long *p, pindex, ul, pend; ++ struct au_sbinfo *sbinfo; ++ struct file *file; ++ int free_bit, err; ++ ++ if (!au_opt_test(au_mntflags(sb), XINO)) ++ return iunique(sb, AUFS_FIRST_INO); ++ ++ sbinfo = au_sbi(sb); ++ mutex_lock(&sbinfo->si_xib_mtx); ++ p = sbinfo->si_xib_buf; ++ free_bit = sbinfo->si_xib_next_bit; ++ if (free_bit < page_bits && !test_bit(free_bit, p)) ++ goto out; /* success */ ++ free_bit = find_first_zero_bit(p, page_bits); ++ if (free_bit < page_bits) ++ goto out; /* success */ ++ ++ pindex = sbinfo->si_xib_last_pindex; ++ for (ul = pindex - 1; ul < ULONG_MAX; ul--) { ++ err = xib_pindex(sb, ul); ++ if (unlikely(err)) ++ goto out_err; ++ free_bit = find_first_zero_bit(p, page_bits); ++ if (free_bit < page_bits) ++ goto out; /* success */ ++ } ++ ++ file = sbinfo->si_xib; ++ pend = vfsub_f_size_read(file) / PAGE_SIZE; ++ for (ul = pindex + 1; ul <= pend; ul++) { ++ err = xib_pindex(sb, ul); ++ if (unlikely(err)) ++ goto out_err; ++ free_bit = find_first_zero_bit(p, page_bits); ++ if (free_bit < page_bits) ++ goto out; /* success */ ++ } ++ BUG(); ++ ++out: ++ set_bit(free_bit, p); ++ sbinfo->si_xib_next_bit = free_bit + 1; ++ pindex = sbinfo->si_xib_last_pindex; ++ mutex_unlock(&sbinfo->si_xib_mtx); ++ ino = xib_calc_ino(pindex, free_bit); ++ AuDbg("i%lu\n", (unsigned long)ino); ++ return ino; ++out_err: ++ mutex_unlock(&sbinfo->si_xib_mtx); ++ AuDbg("i0\n"); ++ return 0; ++} ++ ++/* ++ * read @ino from xinofile for the specified branch{@sb, @bindex} ++ * at the position of @h_ino. ++ * if @ino does not exist and @do_new is true, get new one. ++ */ ++int au_xino_read(struct super_block *sb, aufs_bindex_t bindex, ino_t h_ino, ++ ino_t *ino) ++{ ++ int err; ++ ssize_t sz; ++ loff_t pos; ++ struct file *file; ++ struct au_sbinfo *sbinfo; ++ ++ *ino = 0; ++ if (!au_opt_test(au_mntflags(sb), XINO)) ++ return 0; /* no xino */ ++ ++ err = 0; ++ sbinfo = au_sbi(sb); ++ pos = h_ino; ++ if (unlikely(au_loff_max / sizeof(*ino) - 1 < pos)) { ++ AuIOErr1("too large hi%lu\n", (unsigned long)h_ino); ++ return -EFBIG; ++ } ++ pos *= sizeof(*ino); ++ ++ file = au_sbr(sb, bindex)->br_xino.xi_file; ++ if (vfsub_f_size_read(file) < pos + sizeof(*ino)) ++ return 0; /* no ino */ ++ ++ sz = xino_fread(sbinfo->si_xread, file, ino, sizeof(*ino), &pos); ++ if (sz == sizeof(*ino)) ++ return 0; /* success */ ++ ++ err = sz; ++ if (unlikely(sz >= 0)) { ++ err = -EIO; ++ AuIOErr("xino read error (%zd)\n", sz); ++ } ++ ++ return err; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++/* create and set a new xino file */ ++ ++struct file *au_xino_create(struct super_block *sb, char *fname, int silent) ++{ ++ struct file *file; ++ struct dentry *h_parent, *d; ++ struct inode *h_dir, *inode; ++ int err; ++ ++ /* ++ * at mount-time, and the xino file is the default path, ++ * hnotify is disabled so we have no notify events to ignore. ++ * when a user specified the xino, we cannot get au_hdir to be ignored. ++ */ ++ file = vfsub_filp_open(fname, O_RDWR | O_CREAT | O_EXCL | O_LARGEFILE ++ /* | __FMODE_NONOTIFY */, ++ S_IRUGO | S_IWUGO); ++ if (IS_ERR(file)) { ++ if (!silent) ++ pr_err("open %s(%ld)\n", fname, PTR_ERR(file)); ++ return file; ++ } ++ ++ /* keep file count */ ++ err = 0; ++ inode = file_inode(file); ++ h_parent = dget_parent(file->f_dentry); ++ h_dir = h_parent->d_inode; ++ mutex_lock_nested(&h_dir->i_mutex, AuLsc_I_PARENT); ++ /* mnt_want_write() is unnecessary here */ ++ /* no delegation since it is just created */ ++ if (inode->i_nlink) ++ err = vfsub_unlink(h_dir, &file->f_path, /*delegated*/NULL, ++ /*force*/0); ++ mutex_unlock(&h_dir->i_mutex); ++ dput(h_parent); ++ if (unlikely(err)) { ++ if (!silent) ++ pr_err("unlink %s(%d)\n", fname, err); ++ goto out; ++ } ++ ++ err = -EINVAL; ++ d = file->f_dentry; ++ if (unlikely(sb == d->d_sb)) { ++ if (!silent) ++ pr_err("%s must be outside\n", fname); ++ goto out; ++ } ++ if (unlikely(au_test_fs_bad_xino(d->d_sb))) { ++ if (!silent) ++ pr_err("xino doesn't support %s(%s)\n", ++ fname, au_sbtype(d->d_sb)); ++ goto out; ++ } ++ return file; /* success */ ++ ++out: ++ fput(file); ++ file = ERR_PTR(err); ++ return file; ++} ++ ++/* ++ * find another branch who is on the same filesystem of the specified ++ * branch{@btgt}. search until @bend. ++ */ ++static int is_sb_shared(struct super_block *sb, aufs_bindex_t btgt, ++ aufs_bindex_t bend) ++{ ++ aufs_bindex_t bindex; ++ struct super_block *tgt_sb = au_sbr_sb(sb, btgt); ++ ++ for (bindex = 0; bindex < btgt; bindex++) ++ if (unlikely(tgt_sb == au_sbr_sb(sb, bindex))) ++ return bindex; ++ for (bindex++; bindex <= bend; bindex++) ++ if (unlikely(tgt_sb == au_sbr_sb(sb, bindex))) ++ return bindex; ++ return -1; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++/* ++ * initialize the xinofile for the specified branch @br ++ * at the place/path where @base_file indicates. ++ * test whether another branch is on the same filesystem or not, ++ * if @do_test is true. ++ */ ++int au_xino_br(struct super_block *sb, struct au_branch *br, ino_t h_ino, ++ struct file *base_file, int do_test) ++{ ++ int err; ++ ino_t ino; ++ aufs_bindex_t bend, bindex; ++ struct au_branch *shared_br, *b; ++ struct file *file; ++ struct super_block *tgt_sb; ++ ++ shared_br = NULL; ++ bend = au_sbend(sb); ++ if (do_test) { ++ tgt_sb = au_br_sb(br); ++ for (bindex = 0; bindex <= bend; bindex++) { ++ b = au_sbr(sb, bindex); ++ if (tgt_sb == au_br_sb(b)) { ++ shared_br = b; ++ break; ++ } ++ } ++ } ++ ++ if (!shared_br || !shared_br->br_xino.xi_file) { ++ struct au_xino_lock_dir ldir; ++ ++ au_xino_lock_dir(sb, base_file, &ldir); ++ /* mnt_want_write() is unnecessary here */ ++ file = au_xino_create2(base_file, NULL); ++ au_xino_unlock_dir(&ldir); ++ err = PTR_ERR(file); ++ if (IS_ERR(file)) ++ goto out; ++ br->br_xino.xi_file = file; ++ } else { ++ br->br_xino.xi_file = shared_br->br_xino.xi_file; ++ get_file(br->br_xino.xi_file); ++ } ++ ++ ino = AUFS_ROOT_INO; ++ err = au_xino_do_write(au_sbi(sb)->si_xwrite, br->br_xino.xi_file, ++ h_ino, ino); ++ if (unlikely(err)) { ++ fput(br->br_xino.xi_file); ++ br->br_xino.xi_file = NULL; ++ } ++ ++out: ++ return err; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++/* trucate a xino bitmap file */ ++ ++/* todo: slow */ ++static int do_xib_restore(struct super_block *sb, struct file *file, void *page) ++{ ++ int err, bit; ++ ssize_t sz; ++ unsigned long pindex; ++ loff_t pos, pend; ++ struct au_sbinfo *sbinfo; ++ au_readf_t func; ++ ino_t *ino; ++ unsigned long *p; ++ ++ err = 0; ++ sbinfo = au_sbi(sb); ++ MtxMustLock(&sbinfo->si_xib_mtx); ++ p = sbinfo->si_xib_buf; ++ func = sbinfo->si_xread; ++ pend = vfsub_f_size_read(file); ++ pos = 0; ++ while (pos < pend) { ++ sz = xino_fread(func, file, page, PAGE_SIZE, &pos); ++ err = sz; ++ if (unlikely(sz <= 0)) ++ goto out; ++ ++ err = 0; ++ for (ino = page; sz > 0; ino++, sz -= sizeof(ino)) { ++ if (unlikely(*ino < AUFS_FIRST_INO)) ++ continue; ++ ++ xib_calc_bit(*ino, &pindex, &bit); ++ AuDebugOn(page_bits <= bit); ++ err = xib_pindex(sb, pindex); ++ if (!err) ++ set_bit(bit, p); ++ else ++ goto out; ++ } ++ } ++ ++out: ++ return err; ++} ++ ++static int xib_restore(struct super_block *sb) ++{ ++ int err; ++ aufs_bindex_t bindex, bend; ++ void *page; ++ ++ err = -ENOMEM; ++ page = (void *)__get_free_page(GFP_NOFS); ++ if (unlikely(!page)) ++ goto out; ++ ++ err = 0; ++ bend = au_sbend(sb); ++ for (bindex = 0; !err && bindex <= bend; bindex++) ++ if (!bindex || is_sb_shared(sb, bindex, bindex - 1) < 0) ++ err = do_xib_restore ++ (sb, au_sbr(sb, bindex)->br_xino.xi_file, page); ++ else ++ AuDbg("b%d\n", bindex); ++ free_page((unsigned long)page); ++ ++out: ++ return err; ++} ++ ++int au_xib_trunc(struct super_block *sb) ++{ ++ int err; ++ ssize_t sz; ++ loff_t pos; ++ struct au_xino_lock_dir ldir; ++ struct au_sbinfo *sbinfo; ++ unsigned long *p; ++ struct file *file; ++ ++ SiMustWriteLock(sb); ++ ++ err = 0; ++ sbinfo = au_sbi(sb); ++ if (!au_opt_test(sbinfo->si_mntflags, XINO)) ++ goto out; ++ ++ file = sbinfo->si_xib; ++ if (vfsub_f_size_read(file) <= PAGE_SIZE) ++ goto out; ++ ++ au_xino_lock_dir(sb, file, &ldir); ++ /* mnt_want_write() is unnecessary here */ ++ file = au_xino_create2(sbinfo->si_xib, NULL); ++ au_xino_unlock_dir(&ldir); ++ err = PTR_ERR(file); ++ if (IS_ERR(file)) ++ goto out; ++ fput(sbinfo->si_xib); ++ sbinfo->si_xib = file; ++ ++ p = sbinfo->si_xib_buf; ++ memset(p, 0, PAGE_SIZE); ++ pos = 0; ++ sz = xino_fwrite(sbinfo->si_xwrite, sbinfo->si_xib, p, PAGE_SIZE, &pos); ++ if (unlikely(sz != PAGE_SIZE)) { ++ err = sz; ++ AuIOErr("err %d\n", err); ++ if (sz >= 0) ++ err = -EIO; ++ goto out; ++ } ++ ++ mutex_lock(&sbinfo->si_xib_mtx); ++ /* mnt_want_write() is unnecessary here */ ++ err = xib_restore(sb); ++ mutex_unlock(&sbinfo->si_xib_mtx); ++ ++out: ++ return err; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++/* ++ * xino mount option handlers ++ */ ++static au_readf_t find_readf(struct file *h_file) ++{ ++ const struct file_operations *fop = h_file->f_op; ++ ++ if (fop->read) ++ return fop->read; ++ if (fop->aio_read) ++ return do_sync_read; ++ if (fop->read_iter) ++ return new_sync_read; ++ return ERR_PTR(-ENOSYS); ++} ++ ++static au_writef_t find_writef(struct file *h_file) ++{ ++ const struct file_operations *fop = h_file->f_op; ++ ++ if (fop->write) ++ return fop->write; ++ if (fop->aio_write) ++ return do_sync_write; ++ if (fop->write_iter) ++ return new_sync_write; ++ return ERR_PTR(-ENOSYS); ++} ++ ++/* xino bitmap */ ++static void xino_clear_xib(struct super_block *sb) ++{ ++ struct au_sbinfo *sbinfo; ++ ++ SiMustWriteLock(sb); ++ ++ sbinfo = au_sbi(sb); ++ sbinfo->si_xread = NULL; ++ sbinfo->si_xwrite = NULL; ++ if (sbinfo->si_xib) ++ fput(sbinfo->si_xib); ++ sbinfo->si_xib = NULL; ++ free_page((unsigned long)sbinfo->si_xib_buf); ++ sbinfo->si_xib_buf = NULL; ++} ++ ++static int au_xino_set_xib(struct super_block *sb, struct file *base) ++{ ++ int err; ++ loff_t pos; ++ struct au_sbinfo *sbinfo; ++ struct file *file; ++ ++ SiMustWriteLock(sb); ++ ++ sbinfo = au_sbi(sb); ++ file = au_xino_create2(base, sbinfo->si_xib); ++ err = PTR_ERR(file); ++ if (IS_ERR(file)) ++ goto out; ++ if (sbinfo->si_xib) ++ fput(sbinfo->si_xib); ++ sbinfo->si_xib = file; ++ sbinfo->si_xread = find_readf(file); ++ sbinfo->si_xwrite = find_writef(file); ++ ++ err = -ENOMEM; ++ if (!sbinfo->si_xib_buf) ++ sbinfo->si_xib_buf = (void *)get_zeroed_page(GFP_NOFS); ++ if (unlikely(!sbinfo->si_xib_buf)) ++ goto out_unset; ++ ++ sbinfo->si_xib_last_pindex = 0; ++ sbinfo->si_xib_next_bit = 0; ++ if (vfsub_f_size_read(file) < PAGE_SIZE) { ++ pos = 0; ++ err = xino_fwrite(sbinfo->si_xwrite, file, sbinfo->si_xib_buf, ++ PAGE_SIZE, &pos); ++ if (unlikely(err != PAGE_SIZE)) ++ goto out_free; ++ } ++ err = 0; ++ goto out; /* success */ ++ ++out_free: ++ free_page((unsigned long)sbinfo->si_xib_buf); ++ sbinfo->si_xib_buf = NULL; ++ if (err >= 0) ++ err = -EIO; ++out_unset: ++ fput(sbinfo->si_xib); ++ sbinfo->si_xib = NULL; ++ sbinfo->si_xread = NULL; ++ sbinfo->si_xwrite = NULL; ++out: ++ return err; ++} ++ ++/* xino for each branch */ ++static void xino_clear_br(struct super_block *sb) ++{ ++ aufs_bindex_t bindex, bend; ++ struct au_branch *br; ++ ++ bend = au_sbend(sb); ++ for (bindex = 0; bindex <= bend; bindex++) { ++ br = au_sbr(sb, bindex); ++ if (!br || !br->br_xino.xi_file) ++ continue; ++ ++ fput(br->br_xino.xi_file); ++ br->br_xino.xi_file = NULL; ++ } ++} ++ ++static int au_xino_set_br(struct super_block *sb, struct file *base) ++{ ++ int err; ++ ino_t ino; ++ aufs_bindex_t bindex, bend, bshared; ++ struct { ++ struct file *old, *new; ++ } *fpair, *p; ++ struct au_branch *br; ++ struct inode *inode; ++ au_writef_t writef; ++ ++ SiMustWriteLock(sb); ++ ++ err = -ENOMEM; ++ bend = au_sbend(sb); ++ fpair = kcalloc(bend + 1, sizeof(*fpair), GFP_NOFS); ++ if (unlikely(!fpair)) ++ goto out; ++ ++ inode = sb->s_root->d_inode; ++ ino = AUFS_ROOT_INO; ++ writef = au_sbi(sb)->si_xwrite; ++ for (bindex = 0, p = fpair; bindex <= bend; bindex++, p++) { ++ br = au_sbr(sb, bindex); ++ bshared = is_sb_shared(sb, bindex, bindex - 1); ++ if (bshared >= 0) { ++ /* shared xino */ ++ *p = fpair[bshared]; ++ get_file(p->new); ++ } ++ ++ if (!p->new) { ++ /* new xino */ ++ p->old = br->br_xino.xi_file; ++ p->new = au_xino_create2(base, br->br_xino.xi_file); ++ err = PTR_ERR(p->new); ++ if (IS_ERR(p->new)) { ++ p->new = NULL; ++ goto out_pair; ++ } ++ } ++ ++ err = au_xino_do_write(writef, p->new, ++ au_h_iptr(inode, bindex)->i_ino, ino); ++ if (unlikely(err)) ++ goto out_pair; ++ } ++ ++ for (bindex = 0, p = fpair; bindex <= bend; bindex++, p++) { ++ br = au_sbr(sb, bindex); ++ if (br->br_xino.xi_file) ++ fput(br->br_xino.xi_file); ++ get_file(p->new); ++ br->br_xino.xi_file = p->new; ++ } ++ ++out_pair: ++ for (bindex = 0, p = fpair; bindex <= bend; bindex++, p++) ++ if (p->new) ++ fput(p->new); ++ else ++ break; ++ kfree(fpair); ++out: ++ return err; ++} ++ ++void au_xino_clr(struct super_block *sb) ++{ ++ struct au_sbinfo *sbinfo; ++ ++ au_xigen_clr(sb); ++ xino_clear_xib(sb); ++ xino_clear_br(sb); ++ sbinfo = au_sbi(sb); ++ /* lvalue, do not call au_mntflags() */ ++ au_opt_clr(sbinfo->si_mntflags, XINO); ++} ++ ++int au_xino_set(struct super_block *sb, struct au_opt_xino *xino, int remount) ++{ ++ int err, skip; ++ struct dentry *parent, *cur_parent; ++ struct qstr *dname, *cur_name; ++ struct file *cur_xino; ++ struct inode *dir; ++ struct au_sbinfo *sbinfo; ++ ++ SiMustWriteLock(sb); ++ ++ err = 0; ++ sbinfo = au_sbi(sb); ++ parent = dget_parent(xino->file->f_dentry); ++ if (remount) { ++ skip = 0; ++ dname = &xino->file->f_dentry->d_name; ++ cur_xino = sbinfo->si_xib; ++ if (cur_xino) { ++ cur_parent = dget_parent(cur_xino->f_dentry); ++ cur_name = &cur_xino->f_dentry->d_name; ++ skip = (cur_parent == parent ++ && au_qstreq(dname, cur_name)); ++ dput(cur_parent); ++ } ++ if (skip) ++ goto out; ++ } ++ ++ au_opt_set(sbinfo->si_mntflags, XINO); ++ dir = parent->d_inode; ++ mutex_lock_nested(&dir->i_mutex, AuLsc_I_PARENT); ++ /* mnt_want_write() is unnecessary here */ ++ err = au_xino_set_xib(sb, xino->file); ++ if (!err) ++ err = au_xigen_set(sb, xino->file); ++ if (!err) ++ err = au_xino_set_br(sb, xino->file); ++ mutex_unlock(&dir->i_mutex); ++ if (!err) ++ goto out; /* success */ ++ ++ /* reset all */ ++ AuIOErr("failed creating xino(%d).\n", err); ++ au_xigen_clr(sb); ++ xino_clear_xib(sb); ++ ++out: ++ dput(parent); ++ return err; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++/* ++ * create a xinofile at the default place/path. ++ */ ++struct file *au_xino_def(struct super_block *sb) ++{ ++ struct file *file; ++ char *page, *p; ++ struct au_branch *br; ++ struct super_block *h_sb; ++ struct path path; ++ aufs_bindex_t bend, bindex, bwr; ++ ++ br = NULL; ++ bend = au_sbend(sb); ++ bwr = -1; ++ for (bindex = 0; bindex <= bend; bindex++) { ++ br = au_sbr(sb, bindex); ++ if (au_br_writable(br->br_perm) ++ && !au_test_fs_bad_xino(au_br_sb(br))) { ++ bwr = bindex; ++ break; ++ } ++ } ++ ++ if (bwr >= 0) { ++ file = ERR_PTR(-ENOMEM); ++ page = (void *)__get_free_page(GFP_NOFS); ++ if (unlikely(!page)) ++ goto out; ++ path.mnt = au_br_mnt(br); ++ path.dentry = au_h_dptr(sb->s_root, bwr); ++ p = d_path(&path, page, PATH_MAX - sizeof(AUFS_XINO_FNAME)); ++ file = (void *)p; ++ if (!IS_ERR(p)) { ++ strcat(p, "/" AUFS_XINO_FNAME); ++ AuDbg("%s\n", p); ++ file = au_xino_create(sb, p, /*silent*/0); ++ if (!IS_ERR(file)) ++ au_xino_brid_set(sb, br->br_id); ++ } ++ free_page((unsigned long)page); ++ } else { ++ file = au_xino_create(sb, AUFS_XINO_DEFPATH, /*silent*/0); ++ if (IS_ERR(file)) ++ goto out; ++ h_sb = file->f_dentry->d_sb; ++ if (unlikely(au_test_fs_bad_xino(h_sb))) { ++ pr_err("xino doesn't support %s(%s)\n", ++ AUFS_XINO_DEFPATH, au_sbtype(h_sb)); ++ fput(file); ++ file = ERR_PTR(-EINVAL); ++ } ++ if (!IS_ERR(file)) ++ au_xino_brid_set(sb, -1); ++ } ++ ++out: ++ return file; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++int au_xino_path(struct seq_file *seq, struct file *file) ++{ ++ int err; ++ ++ err = au_seq_path(seq, &file->f_path); ++ if (unlikely(err)) ++ goto out; ++ ++#define Deleted "\\040(deleted)" ++ seq->count -= sizeof(Deleted) - 1; ++ AuDebugOn(memcmp(seq->buf + seq->count, Deleted, ++ sizeof(Deleted) - 1)); ++#undef Deleted ++ ++out: ++ return err; ++} +diff --git a/fs/buffer.c b/fs/buffer.c +index 20805db..363569f 100644 +--- a/fs/buffer.c ++++ b/fs/buffer.c +@@ -2450,7 +2450,7 @@ int block_page_mkwrite(struct vm_area_struct *vma, struct vm_fault *vmf, + * Update file times before taking page lock. We may end up failing the + * fault so this update may be superfluous but who really cares... + */ +- file_update_time(vma->vm_file); ++ vma_file_update_time(vma); + + ret = __block_page_mkwrite(vma, vmf, get_block); + sb_end_pagefault(sb); +diff --git a/fs/dcache.c b/fs/dcache.c +index d25f8fd..857990a 100644 +--- a/fs/dcache.c ++++ b/fs/dcache.c +@@ -1022,7 +1022,7 @@ enum d_walk_ret { + * + * The @enter() and @finish() callbacks are called with d_lock held. + */ +-static void d_walk(struct dentry *parent, void *data, ++void d_walk(struct dentry *parent, void *data, + enum d_walk_ret (*enter)(void *, struct dentry *), + void (*finish)(void *)) + { +diff --git a/fs/fcntl.c b/fs/fcntl.c +index 99d440a..de1a407 100644 +--- a/fs/fcntl.c ++++ b/fs/fcntl.c +@@ -29,7 +29,7 @@ + + #define SETFL_MASK (O_APPEND | O_NONBLOCK | O_NDELAY | O_DIRECT | O_NOATIME) + +-static int setfl(int fd, struct file * filp, unsigned long arg) ++int setfl(int fd, struct file * filp, unsigned long arg) + { + struct inode * inode = file_inode(filp); + int error = 0; +@@ -59,6 +59,8 @@ static int setfl(int fd, struct file * filp, unsigned long arg) + + if (filp->f_op->check_flags) + error = filp->f_op->check_flags(arg); ++ if (!error && filp->f_op->setfl) ++ error = filp->f_op->setfl(filp, arg); + if (error) + return error; + +diff --git a/fs/inode.c b/fs/inode.c +index 56d1d2b..2998e86 100644 +--- a/fs/inode.c ++++ b/fs/inode.c +@@ -1497,7 +1497,7 @@ static int relatime_need_update(struct vfsmount *mnt, struct inode *inode, + * This does the actual work of updating an inodes time or version. Must have + * had called mnt_want_write() before calling this. + */ +-static int update_time(struct inode *inode, struct timespec *time, int flags) ++int update_time(struct inode *inode, struct timespec *time, int flags) + { + if (inode->i_op->update_time) + return inode->i_op->update_time(inode, time, flags); +diff --git a/fs/proc/base.c b/fs/proc/base.c +index 7dc3ea8..b368ad5 100644 +--- a/fs/proc/base.c ++++ b/fs/proc/base.c +@@ -1735,7 +1735,7 @@ static int proc_map_files_get_link(struct dentry *dentry, struct path *path) + down_read(&mm->mmap_sem); + vma = find_exact_vma(mm, vm_start, vm_end); + if (vma && vma->vm_file) { +- *path = vma->vm_file->f_path; ++ *path = vma_pr_or_file(vma)->f_path; + path_get(path); + rc = 0; + } +diff --git a/fs/proc/nommu.c b/fs/proc/nommu.c +index d4a3574..1397181 100644 +--- a/fs/proc/nommu.c ++++ b/fs/proc/nommu.c +@@ -45,7 +45,10 @@ static int nommu_region_show(struct seq_file *m, struct vm_region *region) + file = region->vm_file; + + if (file) { +- struct inode *inode = file_inode(region->vm_file); ++ struct inode *inode; ++ ++ file = vmr_pr_or_file(region); ++ inode = file_inode(file); + dev = inode->i_sb->s_dev; + ino = inode->i_ino; + } +diff --git a/fs/proc/task_mmu.c b/fs/proc/task_mmu.c +index 69aa378..426b962 100644 +--- a/fs/proc/task_mmu.c ++++ b/fs/proc/task_mmu.c +@@ -276,7 +276,10 @@ show_map_vma(struct seq_file *m, struct vm_area_struct *vma, int is_pid) + const char *name = NULL; + + if (file) { +- struct inode *inode = file_inode(vma->vm_file); ++ struct inode *inode; ++ ++ file = vma_pr_or_file(vma); ++ inode = file_inode(file); + dev = inode->i_sb->s_dev; + ino = inode->i_ino; + pgoff = ((loff_t)vma->vm_pgoff) << PAGE_SHIFT; +@@ -1447,7 +1450,7 @@ static int show_numa_map(struct seq_file *m, void *v, int is_pid) + struct proc_maps_private *proc_priv = &numa_priv->proc_maps; + struct vm_area_struct *vma = v; + struct numa_maps *md = &numa_priv->md; +- struct file *file = vma->vm_file; ++ struct file *file = vma_pr_or_file(vma); + struct mm_struct *mm = vma->vm_mm; + struct mm_walk walk = {}; + struct mempolicy *pol; +diff --git a/fs/proc/task_nommu.c b/fs/proc/task_nommu.c +index 599ec2e..1740207 100644 +--- a/fs/proc/task_nommu.c ++++ b/fs/proc/task_nommu.c +@@ -160,7 +160,10 @@ static int nommu_vma_show(struct seq_file *m, struct vm_area_struct *vma, + file = vma->vm_file; + + if (file) { +- struct inode *inode = file_inode(vma->vm_file); ++ struct inode *inode; ++ ++ file = vma_pr_or_file(vma); ++ inode = file_inode(file); + dev = inode->i_sb->s_dev; + ino = inode->i_ino; + pgoff = (loff_t)vma->vm_pgoff << PAGE_SHIFT; +diff --git a/fs/splice.c b/fs/splice.c +index 75c6058..619359a 100644 +--- a/fs/splice.c ++++ b/fs/splice.c +@@ -1114,8 +1114,8 @@ EXPORT_SYMBOL(generic_splice_sendpage); + /* + * Attempt to initiate a splice from pipe to file. + */ +-static long do_splice_from(struct pipe_inode_info *pipe, struct file *out, +- loff_t *ppos, size_t len, unsigned int flags) ++long do_splice_from(struct pipe_inode_info *pipe, struct file *out, ++ loff_t *ppos, size_t len, unsigned int flags) + { + ssize_t (*splice_write)(struct pipe_inode_info *, struct file *, + loff_t *, size_t, unsigned int); +@@ -1131,9 +1131,9 @@ static long do_splice_from(struct pipe_inode_info *pipe, struct file *out, + /* + * Attempt to initiate a splice from a file to a pipe. + */ +-static long do_splice_to(struct file *in, loff_t *ppos, +- struct pipe_inode_info *pipe, size_t len, +- unsigned int flags) ++long do_splice_to(struct file *in, loff_t *ppos, ++ struct pipe_inode_info *pipe, size_t len, ++ unsigned int flags) + { + ssize_t (*splice_read)(struct file *, loff_t *, + struct pipe_inode_info *, size_t, unsigned int); +diff --git a/include/linux/file.h b/include/linux/file.h +index 4d69123..62cffc0 100644 +--- a/include/linux/file.h ++++ b/include/linux/file.h +@@ -19,6 +19,7 @@ struct dentry; + struct path; + extern struct file *alloc_file(struct path *, fmode_t mode, + const struct file_operations *fop); ++extern struct file *get_empty_filp(void); + + static inline void fput_light(struct file *file, int fput_needed) + { +diff --git a/include/linux/fs.h b/include/linux/fs.h +index 6fd017e..c44d25d 100644 +--- a/include/linux/fs.h ++++ b/include/linux/fs.h +@@ -1149,6 +1149,7 @@ extern void fasync_free(struct fasync_struct *); + /* can be called from interrupts */ + extern void kill_fasync(struct fasync_struct **, int, int); + ++extern int setfl(int fd, struct file * filp, unsigned long arg); + extern void __f_setown(struct file *filp, struct pid *, enum pid_type, int force); + extern void f_setown(struct file *filp, unsigned long arg, int force); + extern void f_delown(struct file *filp); +@@ -1507,6 +1508,7 @@ struct file_operations { + ssize_t (*sendpage) (struct file *, struct page *, int, size_t, loff_t *, int); + unsigned long (*get_unmapped_area)(struct file *, unsigned long, unsigned long, unsigned long, unsigned long); + int (*check_flags)(int); ++ int (*setfl)(struct file *, unsigned long); + int (*flock) (struct file *, int, struct file_lock *); + ssize_t (*splice_write)(struct pipe_inode_info *, struct file *, loff_t *, size_t, unsigned int); + ssize_t (*splice_read)(struct file *, loff_t *, struct pipe_inode_info *, size_t, unsigned int); +@@ -2662,6 +2664,7 @@ extern int inode_change_ok(const struct inode *, struct iattr *); + extern int inode_newsize_ok(const struct inode *, loff_t offset); + extern void setattr_copy(struct inode *inode, const struct iattr *attr); + ++extern int update_time(struct inode *, struct timespec *, int); + extern int file_update_time(struct file *file); + + extern int generic_show_options(struct seq_file *m, struct dentry *root); +diff --git a/include/linux/mm.h b/include/linux/mm.h +index 86a977b..a2d0dbb 100644 +--- a/include/linux/mm.h ++++ b/include/linux/mm.h +@@ -1208,6 +1208,28 @@ static inline int fixup_user_fault(struct task_struct *tsk, + } + #endif + ++extern void vma_do_file_update_time(struct vm_area_struct *, const char[], int); ++extern struct file *vma_do_pr_or_file(struct vm_area_struct *, const char[], ++ int); ++extern void vma_do_get_file(struct vm_area_struct *, const char[], int); ++extern void vma_do_fput(struct vm_area_struct *, const char[], int); ++ ++#define vma_file_update_time(vma) vma_do_file_update_time(vma, __func__, \ ++ __LINE__) ++#define vma_pr_or_file(vma) vma_do_pr_or_file(vma, __func__, \ ++ __LINE__) ++#define vma_get_file(vma) vma_do_get_file(vma, __func__, __LINE__) ++#define vma_fput(vma) vma_do_fput(vma, __func__, __LINE__) ++ ++#ifndef CONFIG_MMU ++extern struct file *vmr_do_pr_or_file(struct vm_region *, const char[], int); ++extern void vmr_do_fput(struct vm_region *, const char[], int); ++ ++#define vmr_pr_or_file(region) vmr_do_pr_or_file(region, __func__, \ ++ __LINE__) ++#define vmr_fput(region) vmr_do_fput(region, __func__, __LINE__) ++#endif /* !CONFIG_MMU */ ++ + extern int access_process_vm(struct task_struct *tsk, unsigned long addr, void *buf, int len, int write); + extern int access_remote_vm(struct mm_struct *mm, unsigned long addr, + void *buf, int len, int write); +diff --git a/include/linux/mm_types.h b/include/linux/mm_types.h +index 6e0b286..8f374ed 100644 +--- a/include/linux/mm_types.h ++++ b/include/linux/mm_types.h +@@ -232,6 +232,7 @@ struct vm_region { + unsigned long vm_top; /* region allocated to here */ + unsigned long vm_pgoff; /* the offset in vm_file corresponding to vm_start */ + struct file *vm_file; /* the backing file or NULL */ ++ struct file *vm_prfile; /* the virtual backing file or NULL */ + + int vm_usage; /* region usage count (access under nommu_region_sem) */ + bool vm_icache_flushed : 1; /* true if the icache has been flushed for +@@ -300,6 +301,7 @@ struct vm_area_struct { + unsigned long vm_pgoff; /* Offset (within vm_file) in PAGE_SIZE + units, *not* PAGE_CACHE_SIZE */ + struct file * vm_file; /* File we map to (can be NULL). */ ++ struct file *vm_prfile; /* shadow of vm_file */ + void * vm_private_data; /* was vm_pte (shared mem) */ + + #ifndef CONFIG_MMU +diff --git a/include/linux/splice.h b/include/linux/splice.h +index da2751d..2e0fca6 100644 +--- a/include/linux/splice.h ++++ b/include/linux/splice.h +@@ -83,4 +83,10 @@ extern void splice_shrink_spd(struct splice_pipe_desc *); + extern void spd_release_page(struct splice_pipe_desc *, unsigned int); + + extern const struct pipe_buf_operations page_cache_pipe_buf_ops; ++ ++extern long do_splice_from(struct pipe_inode_info *pipe, struct file *out, ++ loff_t *ppos, size_t len, unsigned int flags); ++extern long do_splice_to(struct file *in, loff_t *ppos, ++ struct pipe_inode_info *pipe, size_t len, ++ unsigned int flags); + #endif +diff --git a/include/uapi/linux/Kbuild b/include/uapi/linux/Kbuild +index 8523f9b..11f8f74 100644 +--- a/include/uapi/linux/Kbuild ++++ b/include/uapi/linux/Kbuild +@@ -56,6 +56,7 @@ header-y += atmppp.h + header-y += atmsap.h + header-y += atmsvc.h + header-y += audit.h ++header-y += aufs_type.h + header-y += auto_fs.h + header-y += auto_fs4.h + header-y += auxvec.h +diff --git a/include/uapi/linux/aufs_type.h b/include/uapi/linux/aufs_type.h +new file mode 100644 +index 0000000..75915f8 +--- /dev/null ++++ b/include/uapi/linux/aufs_type.h +@@ -0,0 +1,419 @@ ++/* ++ * Copyright (C) 2005-2016 Junjiro R. Okajima ++ * ++ * This program, aufs is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . ++ */ ++ ++#ifndef __AUFS_TYPE_H__ ++#define __AUFS_TYPE_H__ ++ ++#define AUFS_NAME "aufs" ++ ++#ifdef __KERNEL__ ++/* ++ * define it before including all other headers. ++ * sched.h may use pr_* macros before defining "current", so define the ++ * no-current version first, and re-define later. ++ */ ++#define pr_fmt(fmt) AUFS_NAME " %s:%d: " fmt, __func__, __LINE__ ++#include ++#undef pr_fmt ++#define pr_fmt(fmt) \ ++ AUFS_NAME " %s:%d:%.*s[%d]: " fmt, __func__, __LINE__, \ ++ (int)sizeof(current->comm), current->comm, current->pid ++#else ++#include ++#include ++#endif /* __KERNEL__ */ ++ ++#include ++ ++#define AUFS_VERSION "3.18.25+-20160509" ++ ++/* todo? move this to linux-2.6.19/include/magic.h */ ++#define AUFS_SUPER_MAGIC ('a' << 24 | 'u' << 16 | 'f' << 8 | 's') ++ ++/* ---------------------------------------------------------------------- */ ++ ++#ifdef CONFIG_AUFS_BRANCH_MAX_127 ++typedef int8_t aufs_bindex_t; ++#define AUFS_BRANCH_MAX 127 ++#else ++typedef int16_t aufs_bindex_t; ++#ifdef CONFIG_AUFS_BRANCH_MAX_511 ++#define AUFS_BRANCH_MAX 511 ++#elif defined(CONFIG_AUFS_BRANCH_MAX_1023) ++#define AUFS_BRANCH_MAX 1023 ++#elif defined(CONFIG_AUFS_BRANCH_MAX_32767) ++#define AUFS_BRANCH_MAX 32767 ++#endif ++#endif ++ ++#ifdef __KERNEL__ ++#ifndef AUFS_BRANCH_MAX ++#error unknown CONFIG_AUFS_BRANCH_MAX value ++#endif ++#endif /* __KERNEL__ */ ++ ++/* ---------------------------------------------------------------------- */ ++ ++#define AUFS_FSTYPE AUFS_NAME ++ ++#define AUFS_ROOT_INO 2 ++#define AUFS_FIRST_INO 11 ++ ++#define AUFS_WH_PFX ".wh." ++#define AUFS_WH_PFX_LEN ((int)sizeof(AUFS_WH_PFX) - 1) ++#define AUFS_WH_TMP_LEN 4 ++/* a limit for rmdir/rename a dir and copyup */ ++#define AUFS_MAX_NAMELEN (NAME_MAX \ ++ - AUFS_WH_PFX_LEN * 2 /* doubly whiteouted */\ ++ - 1 /* dot */\ ++ - AUFS_WH_TMP_LEN) /* hex */ ++#define AUFS_XINO_FNAME "." AUFS_NAME ".xino" ++#define AUFS_XINO_DEFPATH "/tmp/" AUFS_XINO_FNAME ++#define AUFS_XINO_DEF_SEC 30 /* seconds */ ++#define AUFS_XINO_DEF_TRUNC 45 /* percentage */ ++#define AUFS_DIRWH_DEF 3 ++#define AUFS_RDCACHE_DEF 10 /* seconds */ ++#define AUFS_RDCACHE_MAX 3600 /* seconds */ ++#define AUFS_RDBLK_DEF 512 /* bytes */ ++#define AUFS_RDHASH_DEF 32 ++#define AUFS_WKQ_NAME AUFS_NAME "d" ++#define AUFS_MFS_DEF_SEC 30 /* seconds */ ++#define AUFS_MFS_MAX_SEC 3600 /* seconds */ ++#define AUFS_FHSM_CACHE_DEF_SEC 30 /* seconds */ ++#define AUFS_PLINK_WARN 50 /* number of plinks in a single bucket */ ++ ++/* pseudo-link maintenace under /proc */ ++#define AUFS_PLINK_MAINT_NAME "plink_maint" ++#define AUFS_PLINK_MAINT_DIR "fs/" AUFS_NAME ++#define AUFS_PLINK_MAINT_PATH AUFS_PLINK_MAINT_DIR "/" AUFS_PLINK_MAINT_NAME ++ ++#define AUFS_DIROPQ_NAME AUFS_WH_PFX ".opq" /* whiteouted doubly */ ++#define AUFS_WH_DIROPQ AUFS_WH_PFX AUFS_DIROPQ_NAME ++ ++#define AUFS_BASE_NAME AUFS_WH_PFX AUFS_NAME ++#define AUFS_PLINKDIR_NAME AUFS_WH_PFX "plnk" ++#define AUFS_ORPHDIR_NAME AUFS_WH_PFX "orph" ++ ++/* doubly whiteouted */ ++#define AUFS_WH_BASE AUFS_WH_PFX AUFS_BASE_NAME ++#define AUFS_WH_PLINKDIR AUFS_WH_PFX AUFS_PLINKDIR_NAME ++#define AUFS_WH_ORPHDIR AUFS_WH_PFX AUFS_ORPHDIR_NAME ++ ++/* branch permissions and attributes */ ++#define AUFS_BRPERM_RW "rw" ++#define AUFS_BRPERM_RO "ro" ++#define AUFS_BRPERM_RR "rr" ++#define AUFS_BRATTR_COO_REG "coo_reg" ++#define AUFS_BRATTR_COO_ALL "coo_all" ++#define AUFS_BRATTR_FHSM "fhsm" ++#define AUFS_BRATTR_UNPIN "unpin" ++#define AUFS_BRATTR_ICEX "icex" ++#define AUFS_BRATTR_ICEX_SEC "icexsec" ++#define AUFS_BRATTR_ICEX_SYS "icexsys" ++#define AUFS_BRATTR_ICEX_TR "icextr" ++#define AUFS_BRATTR_ICEX_USR "icexusr" ++#define AUFS_BRATTR_ICEX_OTH "icexoth" ++#define AUFS_BRRATTR_WH "wh" ++#define AUFS_BRWATTR_NLWH "nolwh" ++#define AUFS_BRWATTR_MOO "moo" ++ ++#define AuBrPerm_RW 1 /* writable, hardlinkable wh */ ++#define AuBrPerm_RO (1 << 1) /* readonly */ ++#define AuBrPerm_RR (1 << 2) /* natively readonly */ ++#define AuBrPerm_Mask (AuBrPerm_RW | AuBrPerm_RO | AuBrPerm_RR) ++ ++#define AuBrAttr_COO_REG (1 << 3) /* copy-up on open */ ++#define AuBrAttr_COO_ALL (1 << 4) ++#define AuBrAttr_COO_Mask (AuBrAttr_COO_REG | AuBrAttr_COO_ALL) ++ ++#define AuBrAttr_FHSM (1 << 5) /* file-based hsm */ ++#define AuBrAttr_UNPIN (1 << 6) /* rename-able top dir of ++ branch. meaningless since ++ linux-3.18-rc1 */ ++ ++/* ignore error in copying XATTR */ ++#define AuBrAttr_ICEX_SEC (1 << 7) ++#define AuBrAttr_ICEX_SYS (1 << 8) ++#define AuBrAttr_ICEX_TR (1 << 9) ++#define AuBrAttr_ICEX_USR (1 << 10) ++#define AuBrAttr_ICEX_OTH (1 << 11) ++#define AuBrAttr_ICEX (AuBrAttr_ICEX_SEC \ ++ | AuBrAttr_ICEX_SYS \ ++ | AuBrAttr_ICEX_TR \ ++ | AuBrAttr_ICEX_USR \ ++ | AuBrAttr_ICEX_OTH) ++ ++#define AuBrRAttr_WH (1 << 12) /* whiteout-able */ ++#define AuBrRAttr_Mask AuBrRAttr_WH ++ ++#define AuBrWAttr_NoLinkWH (1 << 13) /* un-hardlinkable whiteouts */ ++#define AuBrWAttr_MOO (1 << 14) /* move-up on open */ ++#define AuBrWAttr_Mask (AuBrWAttr_NoLinkWH | AuBrWAttr_MOO) ++ ++#define AuBrAttr_CMOO_Mask (AuBrAttr_COO_Mask | AuBrWAttr_MOO) ++ ++/* #warning test userspace */ ++#ifdef __KERNEL__ ++#ifndef CONFIG_AUFS_FHSM ++#undef AuBrAttr_FHSM ++#define AuBrAttr_FHSM 0 ++#endif ++#ifndef CONFIG_AUFS_XATTR ++#undef AuBrAttr_ICEX ++#define AuBrAttr_ICEX 0 ++#undef AuBrAttr_ICEX_SEC ++#define AuBrAttr_ICEX_SEC 0 ++#undef AuBrAttr_ICEX_SYS ++#define AuBrAttr_ICEX_SYS 0 ++#undef AuBrAttr_ICEX_TR ++#define AuBrAttr_ICEX_TR 0 ++#undef AuBrAttr_ICEX_USR ++#define AuBrAttr_ICEX_USR 0 ++#undef AuBrAttr_ICEX_OTH ++#define AuBrAttr_ICEX_OTH 0 ++#endif ++#endif ++ ++/* the longest combination */ ++/* AUFS_BRATTR_ICEX and AUFS_BRATTR_ICEX_TR don't affect here */ ++#define AuBrPermStrSz sizeof(AUFS_BRPERM_RW \ ++ "+" AUFS_BRATTR_COO_REG \ ++ "+" AUFS_BRATTR_FHSM \ ++ "+" AUFS_BRATTR_UNPIN \ ++ "+" AUFS_BRATTR_ICEX_SEC \ ++ "+" AUFS_BRATTR_ICEX_SYS \ ++ "+" AUFS_BRATTR_ICEX_USR \ ++ "+" AUFS_BRATTR_ICEX_OTH \ ++ "+" AUFS_BRWATTR_NLWH) ++ ++typedef struct { ++ char a[AuBrPermStrSz]; ++} au_br_perm_str_t; ++ ++static inline int au_br_writable(int brperm) ++{ ++ return brperm & AuBrPerm_RW; ++} ++ ++static inline int au_br_whable(int brperm) ++{ ++ return brperm & (AuBrPerm_RW | AuBrRAttr_WH); ++} ++ ++static inline int au_br_wh_linkable(int brperm) ++{ ++ return !(brperm & AuBrWAttr_NoLinkWH); ++} ++ ++static inline int au_br_cmoo(int brperm) ++{ ++ return brperm & AuBrAttr_CMOO_Mask; ++} ++ ++static inline int au_br_fhsm(int brperm) ++{ ++ return brperm & AuBrAttr_FHSM; ++} ++ ++/* ---------------------------------------------------------------------- */ ++ ++/* ioctl */ ++enum { ++ /* readdir in userspace */ ++ AuCtl_RDU, ++ AuCtl_RDU_INO, ++ ++ AuCtl_WBR_FD, /* pathconf wrapper */ ++ AuCtl_IBUSY, /* busy inode */ ++ AuCtl_MVDOWN, /* move-down */ ++ AuCtl_BR, /* info about branches */ ++ AuCtl_FHSM_FD /* connection for fhsm */ ++}; ++ ++/* borrowed from linux/include/linux/kernel.h */ ++#ifndef ALIGN ++#define ALIGN(x, a) __ALIGN_MASK(x, (typeof(x))(a)-1) ++#define __ALIGN_MASK(x, mask) (((x)+(mask))&~(mask)) ++#endif ++ ++/* borrowed from linux/include/linux/compiler-gcc3.h */ ++#ifndef __aligned ++#define __aligned(x) __attribute__((aligned(x))) ++#endif ++ ++#ifdef __KERNEL__ ++#ifndef __packed ++#define __packed __attribute__((packed)) ++#endif ++#endif ++ ++struct au_rdu_cookie { ++ uint64_t h_pos; ++ int16_t bindex; ++ uint8_t flags; ++ uint8_t pad; ++ uint32_t generation; ++} __aligned(8); ++ ++struct au_rdu_ent { ++ uint64_t ino; ++ int16_t bindex; ++ uint8_t type; ++ uint8_t nlen; ++ uint8_t wh; ++ char name[0]; ++} __aligned(8); ++ ++static inline int au_rdu_len(int nlen) ++{ ++ /* include the terminating NULL */ ++ return ALIGN(sizeof(struct au_rdu_ent) + nlen + 1, ++ sizeof(uint64_t)); ++} ++ ++union au_rdu_ent_ul { ++ struct au_rdu_ent __user *e; ++ uint64_t ul; ++}; ++ ++enum { ++ AufsCtlRduV_SZ, ++ AufsCtlRduV_End ++}; ++ ++struct aufs_rdu { ++ /* input */ ++ union { ++ uint64_t sz; /* AuCtl_RDU */ ++ uint64_t nent; /* AuCtl_RDU_INO */ ++ }; ++ union au_rdu_ent_ul ent; ++ uint16_t verify[AufsCtlRduV_End]; ++ ++ /* input/output */ ++ uint32_t blk; ++ ++ /* output */ ++ union au_rdu_ent_ul tail; ++ /* number of entries which were added in a single call */ ++ uint64_t rent; ++ uint8_t full; ++ uint8_t shwh; ++ ++ struct au_rdu_cookie cookie; ++} __aligned(8); ++ ++/* ---------------------------------------------------------------------- */ ++ ++struct aufs_wbr_fd { ++ uint32_t oflags; ++ int16_t brid; ++} __aligned(8); ++ ++/* ---------------------------------------------------------------------- */ ++ ++struct aufs_ibusy { ++ uint64_t ino, h_ino; ++ int16_t bindex; ++} __aligned(8); ++ ++/* ---------------------------------------------------------------------- */ ++ ++/* error code for move-down */ ++/* the actual message strings are implemented in aufs-util.git */ ++enum { ++ EAU_MVDOWN_OPAQUE = 1, ++ EAU_MVDOWN_WHITEOUT, ++ EAU_MVDOWN_UPPER, ++ EAU_MVDOWN_BOTTOM, ++ EAU_MVDOWN_NOUPPER, ++ EAU_MVDOWN_NOLOWERBR, ++ EAU_Last ++}; ++ ++/* flags for move-down */ ++#define AUFS_MVDOWN_DMSG 1 ++#define AUFS_MVDOWN_OWLOWER (1 << 1) /* overwrite lower */ ++#define AUFS_MVDOWN_KUPPER (1 << 2) /* keep upper */ ++#define AUFS_MVDOWN_ROLOWER (1 << 3) /* do even if lower is RO */ ++#define AUFS_MVDOWN_ROLOWER_R (1 << 4) /* did on lower RO */ ++#define AUFS_MVDOWN_ROUPPER (1 << 5) /* do even if upper is RO */ ++#define AUFS_MVDOWN_ROUPPER_R (1 << 6) /* did on upper RO */ ++#define AUFS_MVDOWN_BRID_UPPER (1 << 7) /* upper brid */ ++#define AUFS_MVDOWN_BRID_LOWER (1 << 8) /* lower brid */ ++#define AUFS_MVDOWN_FHSM_LOWER (1 << 9) /* find fhsm attr for lower */ ++#define AUFS_MVDOWN_STFS (1 << 10) /* req. stfs */ ++#define AUFS_MVDOWN_STFS_FAILED (1 << 11) /* output: stfs is unusable */ ++#define AUFS_MVDOWN_BOTTOM (1 << 12) /* output: no more lowers */ ++ ++/* index for move-down */ ++enum { ++ AUFS_MVDOWN_UPPER, ++ AUFS_MVDOWN_LOWER, ++ AUFS_MVDOWN_NARRAY ++}; ++ ++/* ++ * additional info of move-down ++ * number of free blocks and inodes. ++ * subset of struct kstatfs, but smaller and always 64bit. ++ */ ++struct aufs_stfs { ++ uint64_t f_blocks; ++ uint64_t f_bavail; ++ uint64_t f_files; ++ uint64_t f_ffree; ++}; ++ ++struct aufs_stbr { ++ int16_t brid; /* optional input */ ++ int16_t bindex; /* output */ ++ struct aufs_stfs stfs; /* output when AUFS_MVDOWN_STFS set */ ++} __aligned(8); ++ ++struct aufs_mvdown { ++ uint32_t flags; /* input/output */ ++ struct aufs_stbr stbr[AUFS_MVDOWN_NARRAY]; /* input/output */ ++ int8_t au_errno; /* output */ ++} __aligned(8); ++ ++/* ---------------------------------------------------------------------- */ ++ ++union aufs_brinfo { ++ /* PATH_MAX may differ between kernel-space and user-space */ ++ char _spacer[4096]; ++ struct { ++ int16_t id; ++ int perm; ++ char path[0]; ++ }; ++} __aligned(8); ++ ++/* ---------------------------------------------------------------------- */ ++ ++#define AuCtlType 'A' ++#define AUFS_CTL_RDU _IOWR(AuCtlType, AuCtl_RDU, struct aufs_rdu) ++#define AUFS_CTL_RDU_INO _IOWR(AuCtlType, AuCtl_RDU_INO, struct aufs_rdu) ++#define AUFS_CTL_WBR_FD _IOW(AuCtlType, AuCtl_WBR_FD, \ ++ struct aufs_wbr_fd) ++#define AUFS_CTL_IBUSY _IOWR(AuCtlType, AuCtl_IBUSY, struct aufs_ibusy) ++#define AUFS_CTL_MVDOWN _IOWR(AuCtlType, AuCtl_MVDOWN, \ ++ struct aufs_mvdown) ++#define AUFS_CTL_BRINFO _IOW(AuCtlType, AuCtl_BR, union aufs_brinfo) ++#define AUFS_CTL_FHSM_FD _IOW(AuCtlType, AuCtl_FHSM_FD, int) ++ ++#endif /* __AUFS_TYPE_H__ */ +diff --git a/kernel/fork.c b/kernel/fork.c +index 0a4f601..67ecb91 100644 +--- a/kernel/fork.c ++++ b/kernel/fork.c +@@ -430,7 +430,7 @@ static int dup_mmap(struct mm_struct *mm, struct mm_struct *oldmm) + struct inode *inode = file_inode(file); + struct address_space *mapping = file->f_mapping; + +- get_file(file); ++ vma_get_file(tmp); + if (tmp->vm_flags & VM_DENYWRITE) + atomic_dec(&inode->i_writecount); + mutex_lock(&mapping->i_mmap_mutex); +diff --git a/mm/Makefile b/mm/Makefile +index 8405eb0..e0bda2d 100644 +--- a/mm/Makefile ++++ b/mm/Makefile +@@ -18,7 +18,7 @@ obj-y := filemap.o mempool.o oom_kill.o \ + mm_init.o mmu_context.o percpu.o slab_common.o \ + compaction.o vmacache.o \ + interval_tree.o list_lru.o workingset.o \ +- iov_iter.o debug.o $(mmu-y) ++ iov_iter.o prfile.o debug.o $(mmu-y) + + obj-y += init-mm.o + +diff --git a/mm/filemap.c b/mm/filemap.c +index 7e6ab98..2fe1e57 100644 +--- a/mm/filemap.c ++++ b/mm/filemap.c +@@ -2063,7 +2063,7 @@ int filemap_page_mkwrite(struct vm_area_struct *vma, struct vm_fault *vmf) + int ret = VM_FAULT_LOCKED; + + sb_start_pagefault(inode->i_sb); +- file_update_time(vma->vm_file); ++ vma_file_update_time(vma); + lock_page(page); + if (page->mapping != inode->i_mapping) { + unlock_page(page); +diff --git a/mm/fremap.c b/mm/fremap.c +index 72b8fa3..a00bbf0 100644 +--- a/mm/fremap.c ++++ b/mm/fremap.c +@@ -224,16 +224,28 @@ get_write_lock: + */ + if (mapping_cap_account_dirty(mapping)) { + unsigned long addr; +- struct file *file = get_file(vma->vm_file); ++ struct file *file = vma->vm_file, ++ *prfile = vma->vm_prfile; ++ + /* mmap_region may free vma; grab the info now */ + vm_flags = vma->vm_flags; + ++ vma_get_file(vma); + addr = mmap_region(file, start, size, vm_flags, pgoff); +- fput(file); ++ vma_fput(vma); + if (IS_ERR_VALUE(addr)) { + err = addr; + } else { + BUG_ON(addr != start); ++ if (prfile) { ++ struct vm_area_struct *new_vma; ++ ++ new_vma = find_vma(mm, addr); ++ if (!new_vma->vm_prfile) ++ new_vma->vm_prfile = prfile; ++ if (new_vma != vma) ++ get_file(prfile); ++ } + err = 0; + } + goto out_freed; +diff --git a/mm/memory.c b/mm/memory.c +index 90fb265..844df2e 100644 +--- a/mm/memory.c ++++ b/mm/memory.c +@@ -2156,7 +2156,7 @@ reuse: + + /* file_update_time outside page_lock */ + if (vma->vm_file) +- file_update_time(vma->vm_file); ++ vma_file_update_time(vma); + } + put_page(dirty_page); + if (page_mkwrite) { +diff --git a/mm/mmap.c b/mm/mmap.c +index f88b4f9..9994987 100644 +--- a/mm/mmap.c ++++ b/mm/mmap.c +@@ -277,7 +277,7 @@ static struct vm_area_struct *remove_vma(struct vm_area_struct *vma) + if (vma->vm_ops && vma->vm_ops->close) + vma->vm_ops->close(vma); + if (vma->vm_file) +- fput(vma->vm_file); ++ vma_fput(vma); + mpol_put(vma_policy(vma)); + kmem_cache_free(vm_area_cachep, vma); + return next; +@@ -895,7 +895,7 @@ again: remove_next = 1 + (end > next->vm_end); + if (remove_next) { + if (file) { + uprobe_munmap(next, next->vm_start, next->vm_end); +- fput(file); ++ vma_fput(vma); + } + if (next->anon_vma) + anon_vma_merge(vma, next); +@@ -1680,8 +1680,8 @@ out: + return addr; + + unmap_and_free_vma: ++ vma_fput(vma); + vma->vm_file = NULL; +- fput(file); + + /* Undo any partial mapping done by a device driver. */ + unmap_region(mm, vma, prev, vma->vm_start, vma->vm_end); +@@ -2480,7 +2480,7 @@ static int __split_vma(struct mm_struct *mm, struct vm_area_struct *vma, + goto out_free_mpol; + + if (new->vm_file) +- get_file(new->vm_file); ++ vma_get_file(new); + + if (new->vm_ops && new->vm_ops->open) + new->vm_ops->open(new); +@@ -2499,7 +2499,7 @@ static int __split_vma(struct mm_struct *mm, struct vm_area_struct *vma, + if (new->vm_ops && new->vm_ops->close) + new->vm_ops->close(new); + if (new->vm_file) +- fput(new->vm_file); ++ vma_fput(new); + unlink_anon_vmas(new); + out_free_mpol: + mpol_put(vma_policy(new)); +@@ -2889,7 +2889,7 @@ struct vm_area_struct *copy_vma(struct vm_area_struct **vmap, + if (anon_vma_clone(new_vma, vma)) + goto out_free_mempol; + if (new_vma->vm_file) +- get_file(new_vma->vm_file); ++ vma_get_file(new_vma); + if (new_vma->vm_ops && new_vma->vm_ops->open) + new_vma->vm_ops->open(new_vma); + vma_link(mm, new_vma, prev, rb_link, rb_parent); +diff --git a/mm/nommu.c b/mm/nommu.c +index b5ba5bc..a7662fc 100644 +--- a/mm/nommu.c ++++ b/mm/nommu.c +@@ -658,7 +658,7 @@ static void __put_nommu_region(struct vm_region *region) + up_write(&nommu_region_sem); + + if (region->vm_file) +- fput(region->vm_file); ++ vmr_fput(region); + + /* IO memory and memory shared directly out of the pagecache + * from ramfs/tmpfs mustn't be released here */ +@@ -823,7 +823,7 @@ static void delete_vma(struct mm_struct *mm, struct vm_area_struct *vma) + if (vma->vm_ops && vma->vm_ops->close) + vma->vm_ops->close(vma); + if (vma->vm_file) +- fput(vma->vm_file); ++ vma_fput(vma); + put_nommu_region(vma->vm_region); + kmem_cache_free(vm_area_cachep, vma); + } +@@ -1385,7 +1385,7 @@ unsigned long do_mmap_pgoff(struct file *file, + goto error_just_free; + } + } +- fput(region->vm_file); ++ vmr_fput(region); + kmem_cache_free(vm_region_jar, region); + region = pregion; + result = start; +@@ -1461,10 +1461,10 @@ error_just_free: + up_write(&nommu_region_sem); + error: + if (region->vm_file) +- fput(region->vm_file); ++ vmr_fput(region); + kmem_cache_free(vm_region_jar, region); + if (vma->vm_file) +- fput(vma->vm_file); ++ vma_fput(vma); + kmem_cache_free(vm_area_cachep, vma); + kleave(" = %d", ret); + return ret; +diff --git a/mm/prfile.c b/mm/prfile.c +new file mode 100644 +index 0000000..532e518 +--- /dev/null ++++ b/mm/prfile.c +@@ -0,0 +1,86 @@ ++/* ++ * Mainly for aufs which mmap(2) diffrent file and wants to print different path ++ * in /proc/PID/maps. ++ * Call these functions via macros defined in linux/mm.h. ++ * ++ * See Documentation/filesystems/aufs/design/06mmap.txt ++ * ++ * Copyright (c) 2014 Junjro R. Okajima ++ * Copyright (c) 2014 Ian Campbell ++ */ ++ ++#include ++#include ++#include ++ ++/* #define PRFILE_TRACE */ ++static inline void prfile_trace(struct file *f, struct file *pr, ++ const char func[], int line, const char func2[]) ++{ ++#ifdef PRFILE_TRACE ++ if (pr) ++ pr_info("%s:%d: %s, %s\n", func, line, func2, ++ f ? (char *)f->f_dentry->d_name.name : "(null)"); ++#endif ++} ++ ++void vma_do_file_update_time(struct vm_area_struct *vma, const char func[], ++ int line) ++{ ++ struct file *f = vma->vm_file, *pr = vma->vm_prfile; ++ ++ prfile_trace(f, pr, func, line, __func__); ++ file_update_time(f); ++ if (f && pr) ++ file_update_time(pr); ++} ++ ++struct file *vma_do_pr_or_file(struct vm_area_struct *vma, const char func[], ++ int line) ++{ ++ struct file *f = vma->vm_file, *pr = vma->vm_prfile; ++ ++ prfile_trace(f, pr, func, line, __func__); ++ return (f && pr) ? pr : f; ++} ++ ++void vma_do_get_file(struct vm_area_struct *vma, const char func[], int line) ++{ ++ struct file *f = vma->vm_file, *pr = vma->vm_prfile; ++ ++ prfile_trace(f, pr, func, line, __func__); ++ get_file(f); ++ if (f && pr) ++ get_file(pr); ++} ++ ++void vma_do_fput(struct vm_area_struct *vma, const char func[], int line) ++{ ++ struct file *f = vma->vm_file, *pr = vma->vm_prfile; ++ ++ prfile_trace(f, pr, func, line, __func__); ++ fput(f); ++ if (f && pr) ++ fput(pr); ++} ++ ++#ifndef CONFIG_MMU ++struct file *vmr_do_pr_or_file(struct vm_region *region, const char func[], ++ int line) ++{ ++ struct file *f = region->vm_file, *pr = region->vm_prfile; ++ ++ prfile_trace(f, pr, func, line, __func__); ++ return (f && pr) ? pr : f; ++} ++ ++void vmr_do_fput(struct vm_region *region, const char func[], int line) ++{ ++ struct file *f = region->vm_file, *pr = region->vm_prfile; ++ ++ prfile_trace(f, pr, func, line, __func__); ++ fput(f); ++ if (f && pr) ++ fput(pr); ++} ++#endif /* !CONFIG_MMU */ +-- +2.1.4 + diff --git a/packages/base/any/kernels/3.18.25/patches/series b/packages/base/any/kernels/3.18.25/patches/series new file mode 100644 index 00000000..f6b71ff1 --- /dev/null +++ b/packages/base/any/kernels/3.18.25/patches/series @@ -0,0 +1 @@ +aufs.patch From 082789b01222a1bcd89cb5ec6d8470955779c48b Mon Sep 17 00:00:00 2001 From: "Carl D. Roth" Date: Fri, 13 May 2016 10:20:46 -0700 Subject: [PATCH 57/62] Back out onlyaml rewrite to another branch --- .../all/vendor-config-onl/src/python/onl/YamlUtils.py | 10 ++-------- 1 file changed, 2 insertions(+), 8 deletions(-) diff --git a/packages/base/all/vendor-config-onl/src/python/onl/YamlUtils.py b/packages/base/all/vendor-config-onl/src/python/onl/YamlUtils.py index 44822148..4381f799 100644 --- a/packages/base/all/vendor-config-onl/src/python/onl/YamlUtils.py +++ b/packages/base/all/vendor-config-onl/src/python/onl/YamlUtils.py @@ -3,12 +3,6 @@ """ import yaml -try: - import onlyaml - def load(stream): - return yaml.load(stream, Loader=onlyaml.Loader) -except ImportError: - load = yaml.load def merge(p1, p2): """Merge two YAML files. @@ -34,7 +28,7 @@ def merge(p1, p2): buf2 = fd.read() # read p1 as-is, make sure it looks like a 'default' YAML - c1 = load(buf1) + c1 = yaml.load(buf1) k1 = list(c1.keys()) if k1 != ['default']: raise ValueError("%s: invalid top-level keys for default mapping: %s" @@ -44,7 +38,7 @@ def merge(p1, p2): lines = buf2.splitlines(False) lines = [x for x in lines if x != '---'] buf3 = buf1 + "\n" + "\n".join(lines) - c2 = load(buf3) + c2 = yaml.load(buf3) c2.pop('default', None) k2 = list(c2.keys()) From 1d19e6fd662bd42abfe9b766af48b4d9b3140711 Mon Sep 17 00:00:00 2001 From: "Carl D. Roth" Date: Fri, 13 May 2016 11:32:49 -0700 Subject: [PATCH 58/62] Fixed conditional for arch test --- builds/any/installer/new-hotness/installer.sh.in | 2 -- 1 file changed, 2 deletions(-) diff --git a/builds/any/installer/new-hotness/installer.sh.in b/builds/any/installer/new-hotness/installer.sh.in index 050290bc..a2cab8a0 100644 --- a/builds/any/installer/new-hotness/installer.sh.in +++ b/builds/any/installer/new-hotness/installer.sh.in @@ -25,8 +25,6 @@ IARCH="@ARCH@" ARCH=`uname -m` if test "$ARCH" != "$IARCH"; then - : -else # identify mappings between kernel arch and debian arch case "$IARCH:$ARCH" in armel:arm7l) ;; From e11a5bd0cd5fa1683cea40a332528e62449ae71f Mon Sep 17 00:00:00 2001 From: "Carl D. Roth" Date: Fri, 13 May 2016 11:53:57 -0700 Subject: [PATCH 59/62] Propagate the '--force' flag properly --- .../all/vendor-config-onl/src/python/onl/install/BaseInstall.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/packages/base/all/vendor-config-onl/src/python/onl/install/BaseInstall.py b/packages/base/all/vendor-config-onl/src/python/onl/install/BaseInstall.py index da4c62ab..08e41e76 100644 --- a/packages/base/all/vendor-config-onl/src/python/onl/install/BaseInstall.py +++ b/packages/base/all/vendor-config-onl/src/python/onl/install/BaseInstall.py @@ -55,7 +55,7 @@ class Base: ubootEnv = ubootEnv) self.log = log or logging.getLogger(self.__class__.__name__) - self.force = False + self.force = force # unmount filesystems as needed self.device = None From 0e6f10c92a16a8f7e3e6def18c89309794218188 Mon Sep 17 00:00:00 2001 From: "Carl D. Roth" Date: Fri, 13 May 2016 11:54:29 -0700 Subject: [PATCH 60/62] Minor installer fixes - handle powerpc architecture renames - pass --force flag for GPT installs --- builds/any/installer/new-hotness/installer.sh.in | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/builds/any/installer/new-hotness/installer.sh.in b/builds/any/installer/new-hotness/installer.sh.in index a2cab8a0..9a44660e 100644 --- a/builds/any/installer/new-hotness/installer.sh.in +++ b/builds/any/installer/new-hotness/installer.sh.in @@ -28,6 +28,7 @@ if test "$ARCH" != "$IARCH"; then # identify mappings between kernel arch and debian arch case "$IARCH:$ARCH" in armel:arm7l) ;; + powerpc:ppc) ;; *) echo echo "------------------------------------" @@ -462,7 +463,7 @@ echo "installer_postinst=\"/mnt/installer/$b\"" >> "${rootdir}/etc/onl/installer # anyway installer_say "Launching ONL installer" -installer_shell=${installer_shell-"/usr/bin/onl-install"} +installer_shell=${installer_shell-"/usr/bin/onl-install --force"} chroot "${rootdir}" $installer_shell if test -f "$postinst"; then From d67d6d97b7a7b0f3407a62904bcefcac469e9041 Mon Sep 17 00:00:00 2001 From: "Carl D. Roth" Date: Mon, 16 May 2016 11:44:21 -0700 Subject: [PATCH 61/62] installer fixes for amd64 - unmount filesystems before the chroot --- .../any/installer/new-hotness/installer.sh.in | 26 ++++++++++++++++++- 1 file changed, 25 insertions(+), 1 deletion(-) diff --git a/builds/any/installer/new-hotness/installer.sh.in b/builds/any/installer/new-hotness/installer.sh.in index 9a44660e..4c7fdfd2 100644 --- a/builds/any/installer/new-hotness/installer.sh.in +++ b/builds/any/installer/new-hotness/installer.sh.in @@ -463,7 +463,31 @@ echo "installer_postinst=\"/mnt/installer/$b\"" >> "${rootdir}/etc/onl/installer # anyway installer_say "Launching ONL installer" -installer_shell=${installer_shell-"/usr/bin/onl-install --force"} + +installer_shell_dfl="/usr/bin/onl-install --force" +installer_shell=${installer_shell-"$installer_shell_dfl"} +# default, unmount flash filesystems and run the installer script + +# Ugh, unmount /mnt filesystems here, +# they are not accessible from within the chroot +installer_force_umount() { + local dev mpt + dev=$1; shift + mpt=$1; shift + case "$mpt" in + /mnt/*) + installer_say "Unmounting $mpt (--force)" + umount "$mpt" + ;; + esac +} +if test "$installer_shell" = "$installer_shell_dfl"; then + visit_proc_mounts installer_force_umount +else + installer_say "*** using non-default installer command: $installer_shell" + installer_say "*** watch out for lingering mount-points" +fi + chroot "${rootdir}" $installer_shell if test -f "$postinst"; then From b7c148efcdc2328b9fb4c27923c265e8bce41942 Mon Sep 17 00:00:00 2001 From: "Carl D. Roth" Date: Mon, 16 May 2016 11:51:04 -0700 Subject: [PATCH 62/62] installer fixes for arm - Fixed arch typo --- builds/any/installer/new-hotness/installer.sh.in | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/builds/any/installer/new-hotness/installer.sh.in b/builds/any/installer/new-hotness/installer.sh.in index 4c7fdfd2..7982c5a1 100644 --- a/builds/any/installer/new-hotness/installer.sh.in +++ b/builds/any/installer/new-hotness/installer.sh.in @@ -27,7 +27,7 @@ ARCH=`uname -m` if test "$ARCH" != "$IARCH"; then # identify mappings between kernel arch and debian arch case "$IARCH:$ARCH" in - armel:arm7l) ;; + armel:armv7l) ;; powerpc:ppc) ;; *) echo