diff --git a/builds/any/rootfs/jessie/common/amd64-base-packages.yml b/builds/any/rootfs/jessie/common/amd64-base-packages.yml index d72ff6e5..a07863f3 100644 --- a/builds/any/rootfs/jessie/common/amd64-base-packages.yml +++ b/builds/any/rootfs/jessie/common/amd64-base-packages.yml @@ -11,4 +11,3 @@ - hw-management - sx-kernel - onl-kernel-3.16-lts-x86-64-all-modules -- onl-kernel-3.2-deb7-x86-64-all-modules diff --git a/make/config.mk b/make/config.mk index 2e1a69aa..c5e02fc4 100644 --- a/make/config.mk +++ b/make/config.mk @@ -28,9 +28,20 @@ export BUILD_DIR_BASE=BUILD/$(ONL_DEBIAN_SUITE) # Use the new module database tool to resolve dependencies dynamically. +ifndef BUILDER_MODULE_DATABASE export BUILDER_MODULE_DATABASE := $(ONL)/make/modules/modules.json +endif + # Regenerate the module manifest if necessary. -export MODULEMANIFEST := $(shell $(BUILDER)/tools/modtool.py --db $(BUILDER_MODULE_DATABASE) --dbroot $(ONL) --make-manifest $(ONL)/make/modules/modules.mk) +ifndef BUILDER_MODULE_DATABASE_ROOT +BUILDER_MODULE_DATABASE_ROOT := $(ONL) +endif + +ifndef BUILDER_MODULE_MANIFEST +BUILDER_MODULE_MANIFEST := $(ONL)/make/modules/modules.mk +endif + +export MODULEMANIFEST := $(shell $(BUILDER)/tools/modtool.py --db $(BUILDER_MODULE_DATABASE) --dbroot $(BUILDER_MODULE_DATABASE_ROOT) --make-manifest $(BUILDER_MODULE_MANIFEST)) # Generate versions if necessary. $(shell $(ONL)/tools/make-versions.py --import-file=$(ONL)/tools/onlvi --class-name=OnlVersionImplementation --output-dir $(ONL)/make/versions) @@ -74,5 +85,3 @@ ONL_MAKE := $(MAKE) $(ONL_MAKE_FLAGS) # export SUBMODULE_INFRA := $(ONL)/sm/infra export SUBMODULE_BIGCODE := $(ONL)/sm/bigcode - - diff --git a/make/kbuild.mk b/make/kbuild.mk index eb28a1b1..eaaf2152 100644 --- a/make/kbuild.mk +++ b/make/kbuild.mk @@ -164,7 +164,7 @@ endif endif -MODSYNCLIST_DEFAULT := .config Module.symvers Makefile include scripts arch/x86/include arch/x86/Makefile arch/powerpc/include arch/powerpc/Makefile arch/powerpc/lib arch/arm/include arch/arm/Makefile arch/arm/lib +MODSYNCLIST_DEFAULT := .config Module.symvers Makefile include scripts arch/x86/include arch/x86/Makefile arch/powerpc/include arch/powerpc/Makefile arch/powerpc/lib arch/arm/include arch/arm/Makefile arch/arm/lib drivers MODSYNCLIST := $(MODSYNCLIST_DEFAULT) $(MODSYNCLIST_EXTRA) @@ -172,6 +172,8 @@ mbuild: build rm -rf $(K_MBUILD_DIR) mkdir -p $(K_MBUILD_DIR) $(foreach f,$(MODSYNCLIST),$(ONL)/tools/scripts/tree-copy.sh $(K_SOURCE_DIR) $(f) $(K_MBUILD_DIR);) + find $(K_MBUILD_DIR) -name "*.o*" -delete + find $(K_MBUILD_DIR) -name "*.c" -delete dtbs: mbuild ifdef DTS_LIST diff --git a/make/kmodule.mk b/make/kmodule.mk index 2347925c..aa84a07c 100644 --- a/make/kmodule.mk +++ b/make/kmodule.mk @@ -6,14 +6,24 @@ ifndef KMODULES $(error $$KMODULES must be set) endif -ifndef PLATFORM -$(error $$PLATFORM must be set) -endif - ifndef ARCH $(error $$ARCH must be set) endif +ifndef SUBDIR + +ifndef VENDOR +$(error $$VENDOR must be set.) +endif + +ifndef BASENAME +$(error $$BASENAME must be set.) +endif + +SUBDIR := "onl/$(VENDOR)/$(BASENAME)" + +endif modules: - ARCH=$(ARCH) $(ONL)/tools/scripts/kmodbuild.sh "$(KERNELS)" "$(KMODULES)" $(PLATFORM) + rm -rf lib + ARCH=$(ARCH) $(ONL)/tools/scripts/kmodbuild.sh "$(KERNELS)" "$(KMODULES)" "$(SUBDIR)" diff --git a/packages/base/all/vendor-config-onl/src/python/onl/bootconfig/__init__.py b/packages/base/all/vendor-config-onl/src/python/onl/bootconfig/__init__.py index db49a4bc..2f0e3518 100755 --- a/packages/base/all/vendor-config-onl/src/python/onl/bootconfig/__init__.py +++ b/packages/base/all/vendor-config-onl/src/python/onl/bootconfig/__init__.py @@ -113,18 +113,30 @@ class OnlBootConfigNet(OnlBootConfig): self.delete('NETGW') self.set('NETAUTO', 'dhcp') + def netauto_get(self): + return self.keys.get('NETAUTO', None) + def netip_set(self, addr): self.delete('NETAUTO') self.keys['NETIP'] = addr + def netip_get(self): + return self.keys.get('NETIP', None) + def netmask_set(self, mask): self.delete('NETAUTO') self.keys['NETMASK'] = mask + def netmask_get(self): + return self.keys.get('NETMASK', None) + def netgw_set(self, gw): self.delete('NETAUTO') self.keys['NETGW'] = gw + def netgw_get(self): + return self.keys.get('NETGW', None) + def __validate(self): if 'NETAUTO' not in self.keys: @@ -221,4 +233,3 @@ class OnlBootConfigNet(OnlBootConfig): if __name__ == '__main__': bc = OnlBootConfigNet() bc.main("onl-boot-config") - diff --git a/packages/base/all/vendor-config-onl/src/python/onl/platform/base.py b/packages/base/all/vendor-config-onl/src/python/onl/platform/base.py index ae309002..ff7f0249 100644 --- a/packages/base/all/vendor-config-onl/src/python/onl/platform/base.py +++ b/packages/base/all/vendor-config-onl/src/python/onl/platform/base.py @@ -190,26 +190,49 @@ class OnlPlatformBase(object): def baseconfig(self): return True - def insmod(self, module, required=True): - kv = os.uname()[2] - searched = [] + def insmod(self, module, required=True, params={}): + # + # Search for modules in this order: + # + # 1. Fully qualified platform name + # /lib/modules//onl// + # 2. Basename + # /lib/modules//onl// + # 3. Vendor common + # /lib/modules//onl//common + # 4. ONL common + # /lib/modules//onl/onl/common + # 5. ONL Top-Level + # /lib/modules//onl + # 5. Kernel Top-level + # /lib/modules/ + # - # Search paths in this order: - locations = [ self.PLATFORM, - '-'.join(self.PLATFORM.split('-')[:-1]), - 'onl', - ".", - ] - for l in locations: + kdir = "/lib/modules/%s" % os.uname()[2] + basename = "-".join(self.PLATFORM.split('-')[:-1]) + odir = "%s/onl" % kdir + vdir = "%s/%s" % (odir, self.MANUFACTURER.lower()) + bdir = "%s/%s" % (vdir, basename) + pdir = "%s/%s" % (vdir, self.PLATFORM) + + searchdirs = [ os.path.join(vdir, self.PLATFORM), + os.path.join(vdir, basename), + os.path.join(vdir, "common"), + os.path.join(odir, "onl", "common"), + odir, + kdir, + ] + + for d in searchdirs: for e in [ ".ko", "" ]: - path = "/lib/modules/%s/%s/%s%s" % (kv, l, module, e) - searched.append(path) + path = os.path.join(d, "%s%s" % (module, e)) if os.path.exists(path): - subprocess.check_call("insmod %s" % path, shell=True) + cmd = "insmod %s %s" % (path, " ".join([ "%s=%s" % (k,v) for (k,v) in params.iteritems() ])) + subprocess.check_call(cmd, shell=True); return True if required: - raise RuntimeError("kernel module %s could not be found. Searched: %s" % (module, searched)) + raise RuntimeError("kernel module %s could not be found." % (module)) else: return False @@ -220,7 +243,9 @@ class OnlPlatformBase(object): '-'.join(self.PLATFORM.split('-')[:-1]) ] for subdir in directories: - d = "/lib/modules/%s/%s" % (kv, subdir) + d = "/lib/modules/%s/onl/%s/%s" % (kv, + self.MANUFACTURER.lower(), + subdir) if os.path.isdir(d): for f in os.listdir(d): if f.endswith(".ko"): diff --git a/packages/base/all/vendor-config-onl/src/python/onl/upgrade/ubase.py b/packages/base/all/vendor-config-onl/src/python/onl/upgrade/ubase.py index 90831700..6e73e43e 100644 --- a/packages/base/all/vendor-config-onl/src/python/onl/upgrade/ubase.py +++ b/packages/base/all/vendor-config-onl/src/python/onl/upgrade/ubase.py @@ -393,6 +393,7 @@ class BaseOnieUpgrade(BaseUpgrade): def onie_fwpkg_add(self, pkg): import onl.grub + onl.grub.onie_fwpkg("-f purge") onl.grub.onie_fwpkg("add %s" % pkg) onl.grub.onie_fwpkg("show") diff --git a/packages/base/amd64/kernels/kernel-3.16-lts-x86-64-all/builds/Makefile b/packages/base/amd64/kernels/kernel-3.16-lts-x86-64-all/builds/Makefile index e4df12e2..832ae83c 100644 --- a/packages/base/amd64/kernels/kernel-3.16-lts-x86-64-all/builds/Makefile +++ b/packages/base/amd64/kernels/kernel-3.16-lts-x86-64-all/builds/Makefile @@ -14,7 +14,8 @@ include $(ONL)/make/config.mk kernel: $(MAKE) -C $(ONL)/packages/base/any/kernels/3.16-lts/configs/x86_64-all K_TARGET_DIR=$(THIS_DIR) $(ONL_MAKE_PARALLEL) - ARCH=x86_64 $(ONL)/tools/scripts/kmodbuild.sh linux-3.16.39-mbuild "$(wildcard $(ONL)/packages/base/any/kernels/modules/*)" onl + rm -rf lib + ARCH=x86_64 $(ONL)/tools/scripts/kmodbuild.sh linux-3.16.39-mbuild "$(wildcard $(ONL)/packages/base/any/kernels/modules/*)" onl/onl/common clean: rm -rf linux-3.16* kernel-3.16* diff --git a/packages/base/amd64/kernels/kernel-3.18-x68-64-all/PKG.yml.disabled b/packages/base/amd64/kernels/kernel-3.18-x68-64-all/PKG.yml.disabled new file mode 100644 index 00000000..2fd92d08 --- /dev/null +++ b/packages/base/amd64/kernels/kernel-3.18-x68-64-all/PKG.yml.disabled @@ -0,0 +1 @@ +This package is no longer in use. It will be fully removed. \ No newline at end of file diff --git a/packages/base/amd64/kernels/kernel-3.2-deb7-x86-64-all/PKG.yml.disabled b/packages/base/amd64/kernels/kernel-3.2-deb7-x86-64-all/PKG.yml.disabled new file mode 100644 index 00000000..2fd92d08 --- /dev/null +++ b/packages/base/amd64/kernels/kernel-3.2-deb7-x86-64-all/PKG.yml.disabled @@ -0,0 +1 @@ +This package is no longer in use. It will be fully removed. \ No newline at end of file diff --git a/packages/base/amd64/kernels/legacy/kernel-3.9.6-x86-64-all/PKG.yml.disabled b/packages/base/amd64/kernels/legacy/kernel-3.9.6-x86-64-all/PKG.yml.disabled new file mode 100644 index 00000000..2fd92d08 --- /dev/null +++ b/packages/base/amd64/kernels/legacy/kernel-3.9.6-x86-64-all/PKG.yml.disabled @@ -0,0 +1 @@ +This package is no longer in use. It will be fully removed. \ No newline at end of file diff --git a/packages/base/amd64/upgrade/PKG.yml b/packages/base/amd64/upgrade/PKG.yml index a905fbb7..9577feb2 100644 --- a/packages/base/amd64/upgrade/PKG.yml +++ b/packages/base/amd64/upgrade/PKG.yml @@ -1,8 +1,5 @@ prerequisites: packages: - - onl-kernel-3.9.6-x86-64-all:amd64 - - onl-kernel-3.2-deb7-x86-64-all:amd64 - - onl-kernel-3.18-x86-64-all:amd64 - onl-kernel-3.16-lts-x86-64-all:amd64 - onl-loader-initrd:amd64 diff --git a/packages/base/amd64/upgrade/builds/Makefile b/packages/base/amd64/upgrade/builds/Makefile index f735b07f..2ed56210 100644 --- a/packages/base/amd64/upgrade/builds/Makefile +++ b/packages/base/amd64/upgrade/builds/Makefile @@ -1,10 +1,7 @@ include $(ONL)/make/config.amd64.mk # All amd64 kernels -KERNELS := $(shell $(ONLPM) --find-file onl-kernel-3.9.6-x86-64-all:amd64 kernel-3.9.6-x86-64-all) \ - $(shell $(ONLPM) --find-file onl-kernel-3.2-deb7-x86-64-all:amd64 kernel-3.2-deb7-x86_64-all) \ - $(shell $(ONLPM) --find-file onl-kernel-3.18-x86-64-all:amd64 kernel-3.18-x86_64-all) \ - $(shell $(ONLPM) --find-file onl-kernel-3.16-lts-x86-64-all:amd64 kernel-3.16-lts-x86_64-all) \ +KERNELS := $(shell $(ONLPM) --find-file onl-kernel-3.16-lts-x86-64-all:amd64 kernel-3.16-lts-x86_64-all) # Loader initrd diff --git a/packages/base/any/kernels/3.16-lts/configs/x86_64-all/x86_64-all.config b/packages/base/any/kernels/3.16-lts/configs/x86_64-all/x86_64-all.config index 6a33acd7..9a35dacb 100644 --- a/packages/base/any/kernels/3.16-lts/configs/x86_64-all/x86_64-all.config +++ b/packages/base/any/kernels/3.16-lts/configs/x86_64-all/x86_64-all.config @@ -1187,6 +1187,9 @@ CONFIG_TI_DAC7512=y # CONFIG_BMP085_I2C is not set # CONFIG_BMP085_SPI is not set # CONFIG_USB_SWITCH_FSA9480 is not set +CONFIG_EARLY_DMA_ALLOC=y +CONFIG_EDA_DEF_SIZE=0x04000000 +CONFIG_EDA_DEF_ALIGN=0x00100000 # CONFIG_LATTICE_ECP3_CONFIG is not set # CONFIG_SRAM is not set # CONFIG_C2PORT is not set @@ -1506,7 +1509,7 @@ CONFIG_NETDEVICES=y CONFIG_MII=y CONFIG_NET_CORE=y # CONFIG_BONDING is not set -CONFIG_DUMMY=y +# CONFIG_DUMMY is not set # CONFIG_EQUALIZER is not set # CONFIG_NET_FC is not set # CONFIG_NET_TEAM is not set @@ -1857,6 +1860,7 @@ CONFIG_I2C_MUX=y CONFIG_I2C_MUX_GPIO=y CONFIG_I2C_MUX_PCA9541=y CONFIG_I2C_MUX_PCA954x=y +CONFIG_I2C_MUX_PCA954X_DESELECT_ON_EXIT=y CONFIG_I2C_HELPER_AUTO=y CONFIG_I2C_ALGOBIT=y CONFIG_I2C_ALGOPCA=y @@ -1876,7 +1880,7 @@ CONFIG_I2C_ALGOPCA=y CONFIG_I2C_I801=y CONFIG_I2C_ISCH=y CONFIG_I2C_ISMT=y -# CONFIG_I2C_PIIX4 is not set +CONFIG_I2C_PIIX4=y # CONFIG_I2C_NFORCE2 is not set # CONFIG_I2C_SIS5595 is not set # CONFIG_I2C_SIS630 is not set @@ -1970,6 +1974,7 @@ CONFIG_PTP_1588_CLOCK=y # Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks. # CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y +CONFIG_ARCH_NR_GPIOS=512 CONFIG_GPIOLIB=y CONFIG_GPIO_DEVRES=y CONFIG_GPIO_ACPI=y @@ -2835,7 +2840,6 @@ CONFIG_X86_PLATFORM_DEVICES=y # CONFIG_INTEL_RST is not set # CONFIG_INTEL_SMARTCONNECT is not set # CONFIG_PVPANIC is not set -CONFIG_DELL_S6000_S1220=y # CONFIG_CHROME_PLATFORMS is not set # diff --git a/packages/base/any/kernels/3.16-lts/patches/driver-early-dma-allocator.patch b/packages/base/any/kernels/3.16-lts/patches/driver-early-dma-allocator.patch new file mode 100644 index 00000000..19152bd9 --- /dev/null +++ b/packages/base/any/kernels/3.16-lts/patches/driver-early-dma-allocator.patch @@ -0,0 +1,335 @@ +diff -urpN a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c +--- a/arch/x86/kernel/setup.c 2016-11-20 01:17:41.000000000 +0000 ++++ b/arch/x86/kernel/setup.c 2017-01-04 23:10:26.473086206 +0000 +@@ -49,6 +49,7 @@ + #include + #include + #include ++#include + #include + + #include +@@ -1243,6 +1244,10 @@ void __init setup_arch(char **cmdline_p) + + arch_init_ideal_nops(); + ++#ifdef CONFIG_EARLY_DMA_ALLOC ++ eda_init(); ++#endif ++ + register_refined_jiffies(CLOCK_TICK_RATE); + + #ifdef CONFIG_EFI +diff -urpN a/drivers/misc/Kconfig b/drivers/misc/Kconfig +--- a/drivers/misc/Kconfig 2016-11-20 01:17:41.000000000 +0000 ++++ b/drivers/misc/Kconfig 2017-01-04 23:11:14.305087244 +0000 +@@ -496,6 +496,34 @@ config USB_SWITCH_FSA9480 + stereo and mono audio, video, microphone and UART data to use + a common connector port. + ++config EARLY_DMA_ALLOC ++ bool "Early DMA Memory Allocator" ++ depends on HAS_DMA ++ ++ ---help--- ++ This driver locks down a region of DMA accessible memory ++ early in the boot process. This memory can be used by other ++ drivers that might rmmod/insmod, insuring the memory region ++ does not become fragmented. ++ ++config EDA_DEF_SIZE ++ hex "EDA Default Region Size" ++ depends on EARLY_DMA_ALLOC ++ default 0x04000000 ++ help ++ Default size of the reserved memory pool, if not altered by the ++ open firmware interface or kernel boot parameter. This memory ++ will not be accessable to the rest of the system. Default is ++ 64MB. ++ ++config EDA_DEF_ALIGN ++ hex "EDA Default Alignment" ++ depends on EARLY_DMA_ALLOC ++ default 0x00100000 ++ help ++ Default alignment of the memory region. Default is 1MB. ++ ++ + config LATTICE_ECP3_CONFIG + tristate "Lattice ECP3 FPGA bitstream configuration via SPI" + depends on SPI && SYSFS +diff -urpN a/drivers/misc/Makefile b/drivers/misc/Makefile +--- a/drivers/misc/Makefile 2016-11-20 01:17:41.000000000 +0000 ++++ b/drivers/misc/Makefile 2017-01-04 23:12:15.781088578 +0000 +@@ -56,3 +56,4 @@ obj-y += mic/ + obj-$(CONFIG_GENWQE) += genwqe/ + obj-$(CONFIG_ECHO) += echo/ + obj-$(CONFIG_VEXPRESS_SYSCFG) += vexpress-syscfg.o ++obj-$(CONFIG_EARLY_DMA_ALLOC) += early_dma_alloc.o +diff -urpN a/drivers/misc/early_dma_alloc.c b/drivers/misc/early_dma_alloc.c +--- a/drivers/misc/early_dma_alloc.c 1970-01-01 00:00:00.000000000 +0000 ++++ b/drivers/misc/early_dma_alloc.c 2017-01-04 23:13:09.209089737 +0000 +@@ -0,0 +1,223 @@ ++/* ++ * Early DMA Memory Allocator ++ * ++ * Copyright © 2013,2014 Cumulus Networks, Inc. ++ * ++ * Author: Curt Brune ++ * Modified: Jonathan Toppins ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ++ * ++ */ ++ ++/* ++ * This driver allocates a region of DMA accessible memory, making it ++ * available to one other device driver. ++ * ++ * The client device driver may be unloaded and reloaded over time. ++ * This driver keeps the DMA region from becoming fragmented across ++ * module reloads. ++ * ++ * Memory Region Restrictions ++ * -------------------------- ++ * The memory region allocated by EDA MUST exist below a 4GB limit. This ++ * is because EDA's primary (only at time of writing) user is the ++ * Broadcom BDE driver wich assumes a 32-bit physical address space and ++ * assumes paddr is no more than 32-bits wide. Furthermore, before porting ++ * the BDE driver to use EDA the BDE driver specifically checked if the ++ * memory region provided by highmem was less than 4GB. We assume Broadcom ++ * knew what they were doing and there is a specific reason why this 4GB ++ * limit is needed, so we enforce this limit by checking the physical address ++ * after allocation. ++ * ++ * Memory Region Size and Alignment ++ * -------------------------------- ++ * This driver allows three ways for the user to define the DMA memory ++ * that will be created, listed in order of preference. ++ * 1. The user may specify on the kernel command line in the boot loader ++ * the "eda_mem" option, this option has the format "size@alignment", ++ * example: eda_mem=0x04000000@0x00100000 ++ * 2. This driver looks for a device tree node compatible with ++ * "early-dma-alloc". The "region_size" property of the node contains ++ * the size, in bytes, of the desired DMA memory region. The ++ * "alignment" property contains the desired memory alignment of the ++ * region. ++ * 3. Finally if neither of the above are provided the Kbuild changable, ++ * compiled in default size and alignment will be used. ++ * ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#if (!defined CONFIG_EDA_DEF_SIZE) || \ ++ (!defined CONFIG_EDA_DEF_ALIGN) ++#error incorrect kernel config - fix it ++#endif ++ ++// #define DEBUG ++#if (defined DEBUG) ++#define eda_debug(fmt, ... ) \ ++ printk(KERN_ERR "eda-debug:%s(): " fmt "\n", __func__ , \ ++ ##__VA_ARGS__) ++#else ++#define eda_debug(fmt, ... ) ++#endif ++ ++#define eda_info(fmt, ... ) \ ++ printk(KERN_INFO "eda: " fmt "\n", ##__VA_ARGS__) ++ ++static uint32_t dma_size; ++static void *dma_vaddr; ++static u32 dma_align __initdata; ++static bool eda_cmdline __initdata; ++ ++static int __init setup_eda_mem(char *str) ++{ ++ char *endp; ++ ++ dma_size = memparse(str, &endp) & PAGE_MASK; ++ if (*endp == '@') ++ dma_align = memparse(endp + 1, NULL) & PAGE_MASK; ++ eda_cmdline = true; ++ return 0; ++} ++early_param("eda_mem", setup_eda_mem); ++ ++static int __init of_eda_init(uint32_t *size, u32 *align) ++#ifdef CONFIG_OF_FLATTREE ++{ ++ int rc = -ENODEV; ++ struct device_node *np = NULL; ++ const u32 *region_sz_p = NULL; ++ const u32 *align_p = NULL; ++ u32 prop_sz = 0; ++ ++ eda_debug("entry"); ++ ++ /* is a programming error make it really painful so it gets fixed */ ++ BUG_ON(NULL == size || NULL == align); ++ ++ np = of_find_compatible_node(NULL, NULL, "early-dma-alloc"); ++ if (!np) { ++ printk(KERN_WARNING "WARN: Can not find `early-dma-alloc'" ++ " device tree node.\n"); ++ goto cleanup; ++ } ++ ++ region_sz_p = of_get_property(np, "region_size", &prop_sz); ++ if (!region_sz_p || (prop_sz != sizeof(*region_sz_p))) { ++ printk(KERN_ERR "ERROR: Can not find `region_size' property" ++ " in early-dma-alloc device tree node.\n"); ++ goto cleanup; ++ } ++ *size = *region_sz_p; ++ ++ align_p = of_get_property(np, "alignment", &prop_sz); ++ if (!align_p || (prop_sz != sizeof(*align_p))) { ++ printk(KERN_ERR "ERROR: Can not find `alignment' property in" ++ "early-dma-alloc device tree node.\n"); ++ goto cleanup; ++ } ++ *align = *align_p; ++ rc = 0; ++ ++ eda_debug("cleanup"); ++ ++cleanup: ++ of_node_put(np); ++ return rc; ++ ++} ++#else ++{ ++ return -ENODEV; ++} ++#endif ++ ++int eda_dma_info_get(void **vaddr, uint32_t *paddr, uint32_t *size) ++{ ++ eda_debug("entry"); ++ ++ if (!dma_vaddr) ++ return -ENOMEM; ++ ++ if (!vaddr || !paddr || !size) ++ return -EINVAL; ++ ++ *vaddr = dma_vaddr; ++ *paddr = (uint32_t) virt_to_phys(dma_vaddr); ++ *size = dma_size; ++ ++ eda_debug("returning -- dma_vaddr: 0x%pK, dma_paddr: 0x%08x," ++ " size: 0x%08x", *vaddr, *paddr, *size); ++ ++ return 0; ++} ++EXPORT_SYMBOL(eda_dma_info_get); ++ ++int __init eda_init(void) ++{ ++ int rc = 0; ++ ++ if (eda_cmdline) { ++ if (!dma_align) ++ dma_align = CONFIG_EDA_DEF_ALIGN; ++ if (!dma_size) ++ dma_size = CONFIG_EDA_DEF_SIZE; ++ eda_debug("size & alignment came from: kernel cmdline"); ++ } else if (!of_eda_init(&dma_size, &dma_align)) { ++ eda_debug("size & alignment came from: open firmware entry"); ++ } else { ++ dma_align = CONFIG_EDA_DEF_ALIGN; ++ dma_size = CONFIG_EDA_DEF_SIZE; ++ eda_debug("size & alignment came from: compiled in defaults"); ++ } ++ ++ dma_vaddr = __alloc_bootmem_low(dma_size, dma_align, 0); ++ /* ++ * enforce EDA's requirement to allocate the memory region below a ++ * 32-bit limit. ++ */ ++ if (virt_to_phys(dma_vaddr) > 0xFFFFFFFFULL) { ++ rc = -ENOMEM; ++ printk(KERN_ERR "ERROR: DMA memory beyond 32-bit address" ++ " space not supported.\n"); ++ goto cleanup; ++ } ++ ++ eda_info("dma_vaddr: 0x%pK, dma_paddr: 0x%016llx, size: 0x%08x," ++ " alignment: 0x%08x", ++ dma_vaddr, (unsigned long long) virt_to_phys(dma_vaddr), ++ dma_size, dma_align); ++cleanup: ++ if (rc && dma_vaddr) { ++ free_bootmem(dma_vaddr, dma_size); ++ } ++ if (rc) { ++ dma_vaddr = NULL; ++ dma_size = 0; ++ } ++ return rc; ++} ++EXPORT_SYMBOL(eda_init); +diff -urpN a/include/linux/early_dma_alloc.h b/include/linux/early_dma_alloc.h +--- a/include/linux/early_dma_alloc.h 1970-01-01 00:00:00.000000000 +0000 ++++ b/include/linux/early_dma_alloc.h 2017-01-04 23:13:59.405090826 +0000 +@@ -0,0 +1,36 @@ ++/* ++ * Early DMA Memory Allocator ++ * ++ * Copyright © 2013 Cumulus Networks, Inc. ++ * ++ * Author: Curt Brune ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ++ * ++ */ ++ ++#ifndef EARLY_DMA_ALLOC_H__ ++#define EARLY_DMA_ALLOC_H__ ++ ++#ifdef __KERNEL__ ++ ++#include ++ ++extern int eda_init(void); ++extern int eda_dma_info_get(void** vaddr, uint32_t* paddr, uint32_t* size); ++ ++#endif /* __KERNEL__ */ ++ ++#endif /* EARLY_DMA_ALLOC_H__ */ diff --git a/packages/base/any/kernels/3.16-lts/patches/driver-esdhc-p2020-broken-timeout.patch b/packages/base/any/kernels/3.16-lts/patches/driver-esdhc-p2020-broken-timeout.patch new file mode 100644 index 00000000..328bca92 --- /dev/null +++ b/packages/base/any/kernels/3.16-lts/patches/driver-esdhc-p2020-broken-timeout.patch @@ -0,0 +1,12 @@ +diff -urpN a/drivers/mmc/host/sdhci-of-esdhc.c b/drivers/mmc/host/sdhci-of-esdhc.c +--- a/drivers/mmc/host/sdhci-of-esdhc.c 2016-11-20 01:17:41.000000000 +0000 ++++ b/drivers/mmc/host/sdhci-of-esdhc.c 2017-01-05 17:29:20.798516943 +0000 +@@ -343,7 +343,7 @@ static const struct sdhci_pltfm_data sdh + * eSDHC cannot support End Attribute in NOP ADMA descriptor + */ + .quirks = ESDHC_DEFAULT_QUIRKS | SDHCI_QUIRK_BROKEN_CARD_DETECTION +- | SDHCI_QUIRK_NO_CARD_NO_RESET ++ | SDHCI_QUIRK_NO_CARD_NO_RESET | SDHCI_QUIRK_BROKEN_TIMEOUT_VAL + | SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC, + .ops = &sdhci_esdhc_ops, + }; diff --git a/packages/base/any/kernels/3.16-lts/patches/driver-hwmon-emerson-update-pmbus-core.patch b/packages/base/any/kernels/3.16-lts/patches/driver-hwmon-emerson-update-pmbus-core.patch new file mode 100644 index 00000000..ee7f587b --- /dev/null +++ b/packages/base/any/kernels/3.16-lts/patches/driver-hwmon-emerson-update-pmbus-core.patch @@ -0,0 +1,46 @@ +diff -urpN a/drivers/hwmon/pmbus/pmbus_core.c b/drivers/hwmon/pmbus/pmbus_core.c +--- a/drivers/hwmon/pmbus/pmbus_core.c 2017-01-07 00:56:44.908974275 +0000 ++++ b/drivers/hwmon/pmbus/pmbus_core.c 2017-01-07 01:02:17.176981485 +0000 +@@ -1680,6 +1680,21 @@ static int pmbus_identify_common(struct + return 0; + } + ++static int pmbus_emer_detect(struct i2c_client *client) ++{ ++ struct device *dev = &client->dev; ++ u8 value[4]; ++ ++ if(i2c_smbus_read_block_data(client, PMBUS_MFR_ID, value) > 0 ++ && memcmp(value, "EMER", 4) == 0) { ++ dev_info(dev, "EMER detected\n"); ++ return 0; ++ } ++ ++ return -ENODEV; ++} ++ ++ + static int pmbus_init_common(struct i2c_client *client, struct pmbus_data *data, + struct pmbus_driver_info *info) + { +@@ -1697,8 +1712,18 @@ static int pmbus_init_common(struct i2c_ + data->status_register = PMBUS_STATUS_WORD; + ret = i2c_smbus_read_word_data(client, PMBUS_STATUS_WORD); + if (ret < 0 || ret == 0xffff) { +- dev_err(dev, "PMBus status register not found\n"); +- return -ENODEV; ++ if(pmbus_emer_detect(client) == 0) { ++ data->status_register = PMBUS_STATUS_MFR_SPECIFIC; ++ ret = i2c_smbus_read_byte_data(client, PMBUS_STATUS_MFR_SPECIFIC); ++ if (ret < 0 || ret == 0xff) { ++ dev_err(dev, "PMBus status register not found\n"); ++ return -ENODEV; ++ } ++ } ++ else { ++ dev_err(dev, "PMBus status register not found\n"); ++ return -ENODEV; ++ } + } + } + diff --git a/packages/base/any/kernels/3.16-lts/patches/drivers-gpio-config-arch-nr-gpios.patch b/packages/base/any/kernels/3.16-lts/patches/drivers-gpio-config-arch-nr-gpios.patch new file mode 100644 index 00000000..3a906a35 --- /dev/null +++ b/packages/base/any/kernels/3.16-lts/patches/drivers-gpio-config-arch-nr-gpios.patch @@ -0,0 +1,41 @@ +diff -urpN a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig +--- a/drivers/gpio/Kconfig 2016-11-20 01:17:41.000000000 +0000 ++++ b/drivers/gpio/Kconfig 2017-01-06 18:06:11.520439745 +0000 +@@ -30,6 +30,23 @@ config ARCH_REQUIRE_GPIOLIB + Selecting this from the architecture code will cause the gpiolib + code to always get built in. + ++config ARCH_NR_GPIOS ++ int "Max number gpios" ++ default 256 ++ range 256 2048 ++ help ++ Platforms may implement their GPIO interface with library code, ++ at a small performance cost for non-inlined operations and some ++ extra memory (for code and for per-GPIO table entries). ++ ++ While the GPIO programming interface defines valid GPIO numbers ++ to be in the range 0..MAX_INT, this library restricts them to the ++ smaller range 0..ARCH_NR_GPIOS-1. ++ ++ ARCH_NR_GPIOS is somewhat arbitrary; it usually reflects the sum of ++ builtin/SoC GPIOs plus a number of GPIOs on expanders; the latter is ++ actually an estimate of a board-specific value. ++ + + menuconfig GPIOLIB + bool "GPIO Support" +diff -urpN a/include/asm-generic/gpio.h b/include/asm-generic/gpio.h +--- a/include/asm-generic/gpio.h 2016-11-20 01:17:41.000000000 +0000 ++++ b/include/asm-generic/gpio.h 2017-01-06 18:02:56.124435505 +0000 +@@ -26,6 +26,10 @@ + * actually an estimate of a board-specific value. + */ + ++#ifdef CONFIG_ARCH_NR_GPIOS ++#define ARCH_NR_GPIOS CONFIG_ARCH_NR_GPIOS ++#endif ++ + #ifndef ARCH_NR_GPIOS + #define ARCH_NR_GPIOS 256 + #endif diff --git a/packages/base/any/kernels/3.16-lts/patches/drivers-i2c-muxes-pca954x-deselect-on-exit.patch b/packages/base/any/kernels/3.16-lts/patches/drivers-i2c-muxes-pca954x-deselect-on-exit.patch new file mode 100644 index 00000000..6c78a34b --- /dev/null +++ b/packages/base/any/kernels/3.16-lts/patches/drivers-i2c-muxes-pca954x-deselect-on-exit.patch @@ -0,0 +1,58 @@ +diff -urpN a/drivers/i2c/muxes/Kconfig b/drivers/i2c/muxes/Kconfig +--- a/drivers/i2c/muxes/Kconfig 2016-11-20 01:17:41.000000000 +0000 ++++ b/drivers/i2c/muxes/Kconfig 2017-01-04 19:39:46.292811921 +0000 +@@ -48,6 +48,13 @@ config I2C_MUX_PCA954x + This driver can also be built as a module. If so, the module + will be called i2c-mux-pca954x. + ++config I2C_MUX_PCA954X_DESELECT_ON_EXIT ++ bool "Enable deselect-on-exit feature for PCA954X devices." ++ depends on I2C_MUX_PCA954x ++ help ++ If you say yes here you enable the deselect-on-exit feature in ++ the pca954x i2c driver. ++ + config I2C_MUX_PINCTRL + tristate "pinctrl-based I2C multiplexer" + depends on PINCTRL +diff -urpN a/drivers/i2c/muxes/i2c-mux-pca954x.c b/drivers/i2c/muxes/i2c-mux-pca954x.c +--- a/drivers/i2c/muxes/i2c-mux-pca954x.c 2016-11-20 01:17:41.000000000 +0000 ++++ b/drivers/i2c/muxes/i2c-mux-pca954x.c 2017-01-04 19:41:03.832813604 +0000 +@@ -189,6 +189,7 @@ static int pca954x_probe(struct i2c_clie + int num, force, class; + struct pca954x *data; + int ret; ++ int deselect_on_exit = 0; + + if (!i2c_check_functionality(adap, I2C_FUNC_SMBUS_BYTE)) + return -ENODEV; +@@ -213,6 +214,20 @@ static int pca954x_probe(struct i2c_clie + return -ENODEV; + } + ++ /* ++ * Check whether we want to deselect the mux after the ++ * transaction. This can be specified in one of two ways: ++ * ++ * 1. using platform data: pdata->modes[num].deselect_on_exit ++ * 2. using the device tree property deselect_on_exit ++ */ ++ if (of_find_property(client->dev.of_node, "deselect-on-exit", NULL)) { ++ deselect_on_exit = 1; ++ } ++ ++#ifdef CONFIG_I2C_MUX_PCA954X_DESELECT_ON_EXIT ++ deselect_on_exit = 1; ++#endif + data->type = id->driver_data; + data->last_chan = 0; /* force the first selection */ + +@@ -233,7 +248,7 @@ static int pca954x_probe(struct i2c_clie + data->virt_adaps[num] = + i2c_add_mux_adapter(adap, &client->dev, client, + force, num, class, pca954x_select_chan, +- (pdata && pdata->modes[num].deselect_on_exit) ++ (pdata && pdata->modes[num].deselect_on_exit) || deselect_on_exit + ? pca954x_deselect_mux : NULL); + + if (data->virt_adaps[num] == NULL) { diff --git a/packages/base/any/kernels/3.16-lts/patches/drivers-net-ethernet-broadcom-tg3-preamble-reset.patch b/packages/base/any/kernels/3.16-lts/patches/drivers-net-ethernet-broadcom-tg3-preamble-reset.patch new file mode 100644 index 00000000..ffae736d --- /dev/null +++ b/packages/base/any/kernels/3.16-lts/patches/drivers-net-ethernet-broadcom-tg3-preamble-reset.patch @@ -0,0 +1,44 @@ +diff -urpN a/drivers/net/ethernet/broadcom/tg3.c b/drivers/net/ethernet/broadcom/tg3.c +--- a/drivers/net/ethernet/broadcom/tg3.c 2016-11-20 01:17:41.000000000 +0000 ++++ b/drivers/net/ethernet/broadcom/tg3.c 2017-01-12 20:49:40.051901568 +0000 +@@ -234,6 +234,14 @@ static int tg3_debug = -1; /* -1 == use + module_param(tg3_debug, int, 0); + MODULE_PARM_DESC(tg3_debug, "Tigon3 bitmapped debugging message enable value"); + ++static int short_preamble = 0; ++module_param(short_preamble, int, 0); ++MODULE_PARM_DESC(short_preamble, "Enable short preamble."); ++ ++static int bcm5718s_reset = 0; ++module_param(bcm5718s_reset, int, 0); ++MODULE_PARM_DESC(bcm5718s_reset, "Enable BCM5718S reset support."); ++ + #define TG3_DRV_DATA_FLAG_10_100_ONLY 0x0001 + #define TG3_DRV_DATA_FLAG_5705_10_100 0x0002 + +@@ -1485,6 +1493,12 @@ static void tg3_mdio_config_5785(struct + static void tg3_mdio_start(struct tg3 *tp) + { + tp->mi_mode &= ~MAC_MI_MODE_AUTO_POLL; ++ ++ if(short_preamble) { ++ netdev_info(tp->dev, "Setting short preamble..."); ++ tp->mi_mode |= MAC_MI_MODE_SHORT_PREAMBLE; ++ } ++ + tw32_f(MAC_MI_MODE, tp->mi_mode); + udelay(80); + +@@ -2689,6 +2703,12 @@ static int tg3_phy_reset(struct tg3 *tp) + } + } + ++ if (bcm5718s_reset && tp->phy_id == TG3_PHY_ID_BCM5718S) { ++ netdev_info(tp->dev, "BCM5718S reset..."); ++ __tg3_writephy(tp, 0x8, 0x10, 0x1d0); /* set internal phy 0x8 to make linkup */ ++ __tg3_writephy(tp, 0x1f, 0x4, 0x5e1); /* enable 10/100 cability of external phy */ ++ } ++ + if (tg3_flag(tp, 5717_PLUS) && + (tp->phy_flags & TG3_PHYFLG_MII_SERDES)) + return 0; diff --git a/packages/base/any/kernels/3.16-lts/patches/series b/packages/base/any/kernels/3.16-lts/patches/series index f0408a45..436aa4ed 100644 --- a/packages/base/any/kernels/3.16-lts/patches/series +++ b/packages/base/any/kernels/3.16-lts/patches/series @@ -15,3 +15,9 @@ driver-igb-version-5.3.54.patch driver-support-intel-igb-bcm5461X-phy.patch driver-i2c-bus-intel-ismt-enable-param.patch drivers-i2c-busses-i2c-isch-probe-param.patch +drivers-i2c-muxes-pca954x-deselect-on-exit.patch +driver-early-dma-allocator.patch +driver-esdhc-p2020-broken-timeout.patch +drivers-gpio-config-arch-nr-gpios.patch +driver-hwmon-emerson-update-pmbus-core.patch +drivers-net-ethernet-broadcom-tg3-preamble-reset.patch diff --git a/packages/base/any/kernels/3.2.71-1+deb7/patches/platform-accton-as4610-device-drivers.patch b/packages/base/any/kernels/3.2.71-1+deb7/patches/platform-accton-as4610-device-drivers.patch index 027d3693..55ef6dee 100644 --- a/packages/base/any/kernels/3.2.71-1+deb7/patches/platform-accton-as4610-device-drivers.patch +++ b/packages/base/any/kernels/3.2.71-1+deb7/patches/platform-accton-as4610-device-drivers.patch @@ -277,8 +277,8 @@ index 0000000..3934bcd + */ +static const u8 fan_reg[] = { + 0x2B, /* fan PWM(for all fan) */ -+ 0x2C, /* fan 1 speed(rpm) */ -+ 0x2D, /* fan 2 speed(rpm) */ ++ 0x2D, /* fan 1 speed(rpm) */ ++ 0x2C, /* fan 2 speed(rpm) */ + 0x11, /* fan1-2 operating status */ +}; + @@ -382,7 +382,7 @@ index 0000000..3934bcd + +static u8 is_fan_fault(struct as4610_fan_data *data, enum fan_id id) +{ -+ u8 mask = (id == FAN1_ID) ? 0x10 : 0x20; ++ u8 mask = (id == FAN1_ID) ? 0x20 : 0x10; + + return !(data->reg_val[FAN_FAULT] & mask); +} @@ -1862,10 +1862,10 @@ index e4f6bf5..db2dab8 100644 obj-$(CONFIG_LEDS_DAC124S085) += leds-dac124s085.o diff --git a/drivers/leds/leds-accton_as4610.c b/drivers/leds/leds-accton_as4610.c new file mode 100644 -index 0000000..6f20735 +index 0000000..0c4b535 --- /dev/null +++ b/drivers/leds/leds-accton_as4610.c -@@ -0,0 +1,719 @@ +@@ -0,0 +1,678 @@ +/* + * A LED driver for the accton_as4610_led + * @@ -1896,6 +1896,7 @@ index 0000000..6f20735 +#include +#include +#include ++#include +#include + +extern int accton_i2c_cpld_read (unsigned short cpld_addr, u8 reg); @@ -1903,8 +1904,6 @@ index 0000000..6f20735 + +extern void led_classdev_unregister(struct led_classdev *led_cdev); +extern int led_classdev_register(struct device *parent, struct led_classdev *led_cdev); -+extern void led_classdev_resume(struct led_classdev *led_cdev); -+extern void led_classdev_suspend(struct led_classdev *led_cdev); + +#define DRVNAME "as4610_led" + @@ -1913,12 +1912,12 @@ index 0000000..6f20735 + struct mutex update_lock; + char valid; /* != 0 if registers are valid */ + unsigned long last_updated; /* In jiffies */ -+ u8 num_of_led; ++ int led_map; + u8 reg_val[5]; /* Register value, 0 = (0x1A) Blinking function + 1 = (0x30) 7-seg 2 + 2 = (0x31) 7-seg 1 + 3 = (0x32) SYS/PRI/PSU1-2 LED -+ 4 = (0x33) STK1-2/Fan/PoE LED */ ++ 4 = (0x33) STK1-2/Fan/PoE/Alarm LED */ +}; + +static struct as4610_led_data *ledctl = NULL; @@ -1934,50 +1933,35 @@ index 0000000..6f20735 +#define LED_NORMAL_OFF_VALUE 0x00 + +#define LED_TYPE_SYS_REG_MASK 0xC0 -+#define LED_MODE_SYS_GREEN_MASK 0x80 -+#define LED_MODE_SYS_AMBER_MASK 0x40 -+#define LED_MODE_SYS_OFF_MASK 0x00 -+#define LED_MODE_SYS_BLINK_MASK 0x80 ++#define LED_MODE_SYS_BLINK_MASK 0x80 + -+#define LED_TYPE_PRI_REG_MASK 0x30 -+#define LED_MODE_PRI_GREEN_MASK 0x20 -+#define LED_MODE_PRI_AMBER_MASK 0x10 -+#define LED_MODE_PRI_OFF_MASK 0x00 -+#define LED_MODE_PRI_BLINK_MASK 0x40 ++#define LED_TYPE_PRI_REG_MASK 0x30 ++#define LED_MODE_PRI_BLINK_MASK 0x40 + -+#define LED_TYPE_PSU1_REG_MASK 0x0C ++#define LED_TYPE_PSU1_REG_MASK 0x0C +#define LED_MODE_PSU1_BLINK_MASK 0x20 + -+#define LED_TYPE_PSU2_REG_MASK 0x03 ++#define LED_TYPE_PSU2_REG_MASK 0x03 +#define LED_MODE_PSU2_BLINK_MASK 0x10 + -+#define LED_TYPE_STK1_REG_MASK 0xC0 -+#define LED_MODE_STK1_GREEN_MASK 0x80 -+#define LED_MODE_STK1_AMBER_MASK 0x40 -+#define LED_MODE_STK1_OFF_MASK 0x00 ++#define LED_TYPE_STK1_REG_MASK 0xC0 +#define LED_MODE_STK1_BLINK_MASK 0x08 + -+#define LED_TYPE_STK2_REG_MASK 0x30 -+#define LED_MODE_STK2_GREEN_MASK 0x20 -+#define LED_MODE_STK2_AMBER_MASK 0x10 -+#define LED_MODE_STK2_OFF_MASK 0x00 ++#define LED_TYPE_STK2_REG_MASK 0x30 +#define LED_MODE_STK2_BLINK_MASK 0x04 + -+#define LED_TYPE_FAN_REG_MASK 0x0C -+#define LED_MODE_FAN_BLINK_MASK 0x02 ++#define LED_TYPE_FAN_REG_MASK 0x0C ++#define LED_MODE_FAN_BLINK_MASK 0x02 + -+#define LED_TYPE_POE_REG_MASK 0x03 -+#define LED_MODE_POE_GREEN_MASK 0x02 -+#define LED_MODE_POE_AMBER_MASK 0x01 -+#define LED_MODE_POE_OFF_MASK 0x00 -+#define LED_MODE_POE_BLINK_MASK 0x01 ++#define LED_TYPE_POE_ALARM_REG_MASK 0x03 ++#define LED_MODE_POE_ALARM_BLINK_MASK 0x01 + +static const u8 led_reg[] = { + 0x1A, /* Blinking function */ + 0x30, /* 7-seg 1 */ + 0x31, /* 7-seg 2 */ + 0x32, /* SYS/PRI/PSU1-2 LED */ -+ 0x33, /* STK1-2/Fan/PoE LED */ ++ 0x33, /* STK1-2/Fan/PoE/Alarm LED */ +}; + +enum led_type { @@ -1992,7 +1976,26 @@ index 0000000..6f20735 + LED_TYPE_7SEG_DIGITS, + LED_TYPE_7SEG_DIGITS_POINT, + LED_TYPE_FAN, -+ LED_TYPE_POE ++ LED_TYPE_POE, ++ LED_TYPE_ALARM, ++ NUM_OF_LED ++}; ++ ++#define AS4610_COMMON_LED_MAP (BIT(LED_TYPE_SYS) | BIT(LED_TYPE_PRI) | BIT(LED_TYPE_PSU1) | \ ++ BIT(LED_TYPE_PSU2)| BIT(LED_TYPE_STK1)| BIT(LED_TYPE_STK2)) ++#define AS4610_NPOE_LED_MAP (AS4610_COMMON_LED_MAP | BIT(LED_TYPE_7SEG_TENS) | \ ++ BIT(LED_TYPE_7SEG_TENS_POINT) | BIT(LED_TYPE_7SEG_DIGITS) | \ ++ BIT(LED_TYPE_7SEG_DIGITS_POINT)) ++#define AS4610_POE_LED_MAP (AS4610_NPOE_LED_MAP | BIT(LED_TYPE_FAN) | BIT(LED_TYPE_POE)) ++#define AS4610_54T_B_LED_MAP (AS4610_COMMON_LED_MAP | BIT(LED_TYPE_FAN) | BIT(LED_TYPE_ALARM)) ++ ++static int as4610_ledmaps[] = { ++ [PID_AS4610_30T] = AS4610_NPOE_LED_MAP, ++ [PID_AS4610_30P] = AS4610_POE_LED_MAP, ++ [PID_AS4610_54T] = AS4610_NPOE_LED_MAP, ++ [PID_AS4610_54P] = AS4610_POE_LED_MAP, ++ [PID_AS4610_54T_B] = AS4610_54T_B_LED_MAP, ++ [PID_RESERVED] = 0, +}; + +enum led_light_mode { @@ -2059,12 +2062,6 @@ index 0000000..6f20735 +{ + as4610_led_update(); + return (ledctl->reg_val[reg_id] & LED_7SEG_REG_MASK); -+#if 0 -+ as4610_led_update(); -+ -+ return (ledctl->reg_val[2] & LED_7SEG_REG_MASK) * 10 + -+ (ledctl->reg_val[1] & LED_7SEG_REG_MASK); -+#endif +} + +static void seven_segment_set(struct led_classdev *cdev, enum led_brightness mode, u8 reg_id) @@ -2076,23 +2073,6 @@ index 0000000..6f20735 + ledctl->reg_val[reg_id] &= 0xF0; + ledctl->reg_val[reg_id] |= mode; + as4610_led_write_value(led_reg[reg_id], ledctl->reg_val[reg_id]); -+ -+#if 0 -+ u8 digits, tens; -+ -+ if (mode > LED_MODE_SEVEN_SEGMENT_MAX) { -+ return; -+ } -+ -+ digits = mode % 10; -+ tens = mode / 10; -+ ledctl->reg_val[1] &= 0xF0; -+ ledctl->reg_val[1] |= digits; -+ ledctl->reg_val[2] &= 0xF0; -+ ledctl->reg_val[2] |= tens; -+ as4610_led_write_value(led_reg[1], ledctl->reg_val[1]); -+ as4610_led_write_value(led_reg[2], ledctl->reg_val[2]); -+#endif +} + +static enum led_brightness seven_segment_digits_get(struct led_classdev *cdev) @@ -2322,16 +2302,16 @@ index 0000000..6f20735 + return as4610_led_normal_get(3, LED_MODE_PRI_BLINK_MASK, 4); +} + -+static void as4610_led_poe_set(struct led_classdev *cdev, ++static void as4610_led_poe_alarm_set(struct led_classdev *cdev, + enum led_brightness mode) +{ -+ as4610_led_normal_set(cdev, mode, LED_MODE_POE_BLINK_MASK, -+ 4, LED_TYPE_POE_REG_MASK, 0); ++ as4610_led_normal_set(cdev, mode, LED_MODE_POE_ALARM_BLINK_MASK, ++ 4, LED_TYPE_POE_ALARM_REG_MASK, 0); +} + -+static enum led_brightness as4610_led_poe_get(struct led_classdev *cdev) ++static enum led_brightness as4610_led_poe_alarm_get(struct led_classdev *cdev) +{ -+ return as4610_led_normal_get(4, LED_MODE_POE_BLINK_MASK, 0); ++ return as4610_led_normal_get(4, LED_MODE_POE_ALARM_BLINK_MASK, 0); +} + +static void as4610_led_stk1_set(struct led_classdev *cdev, @@ -2364,7 +2344,6 @@ index 0000000..6f20735 + .default_trigger = "unused", + .brightness_set = as4610_led_sys_set, + .brightness_get = as4610_led_sys_get, -+ .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_AMBER_BLINK, + }, + [LED_TYPE_PRI] = { @@ -2372,7 +2351,6 @@ index 0000000..6f20735 + .default_trigger = "unused", + .brightness_set = as4610_led_pri_set, + .brightness_get = as4610_led_pri_get, -+ .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_AMBER_BLINK, + }, + [LED_TYPE_PSU1] = { @@ -2380,7 +2358,6 @@ index 0000000..6f20735 + .default_trigger = "unused", + .brightness_set = as4610_led_psu1_set, + .brightness_get = as4610_led_psu1_get, -+ .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_AUTO_BLINKING, + }, + [LED_TYPE_PSU2] = { @@ -2388,7 +2365,6 @@ index 0000000..6f20735 + .default_trigger = "unused", + .brightness_set = as4610_led_psu2_set, + .brightness_get = as4610_led_psu2_get, -+ .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_AUTO_BLINKING, + }, + [LED_TYPE_STK1] = { @@ -2396,7 +2372,6 @@ index 0000000..6f20735 + .default_trigger = "unused", + .brightness_set = as4610_led_stk1_set, + .brightness_get = as4610_led_stk1_get, -+ .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_AMBER_BLINK, + }, + [LED_TYPE_STK2] = { @@ -2404,7 +2379,6 @@ index 0000000..6f20735 + .default_trigger = "unused", + .brightness_set = as4610_led_stk2_set, + .brightness_get = as4610_led_stk2_get, -+ .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_AMBER_BLINK, + }, + [LED_TYPE_7SEG_TENS] = { @@ -2412,7 +2386,6 @@ index 0000000..6f20735 + .default_trigger = "unused", + .brightness_set = seven_segment_tens_set, + .brightness_get = seven_segment_tens_get, -+ .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_SEVEN_SEGMENT_MAX, + }, + [LED_TYPE_7SEG_TENS_POINT] = { @@ -2420,7 +2393,6 @@ index 0000000..6f20735 + .default_trigger = "unused", + .brightness_set = seven_segment_tens_point_set, + .brightness_get = seven_segment_tens_point_get, -+ .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_GREEN, + }, + [LED_TYPE_7SEG_DIGITS] = { @@ -2428,7 +2400,6 @@ index 0000000..6f20735 + .default_trigger = "unused", + .brightness_set = seven_segment_digits_set, + .brightness_get = seven_segment_digits_get, -+ .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_SEVEN_SEGMENT_MAX, + }, + [LED_TYPE_7SEG_DIGITS_POINT] = { @@ -2436,7 +2407,6 @@ index 0000000..6f20735 + .default_trigger = "unused", + .brightness_set = seven_segment_digits_point_set, + .brightness_get = seven_segment_digits_point_get, -+ .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_GREEN, + }, + [LED_TYPE_FAN] = { @@ -2444,61 +2414,49 @@ index 0000000..6f20735 + .default_trigger = "unused", + .brightness_set = as4610_led_fan_set, + .brightness_get = as4610_led_fan_get, -+ .flags = LED_CORE_SUSPENDRESUME, + .max_brightness = LED_MODE_AUTO_BLINKING, + }, + [LED_TYPE_POE] = { + .name = "as4610::poe", + .default_trigger = "unused", -+ .brightness_set = as4610_led_poe_set, -+ .brightness_get = as4610_led_poe_get, -+ .flags = LED_CORE_SUSPENDRESUME, ++ .brightness_set = as4610_led_poe_alarm_set, ++ .brightness_get = as4610_led_poe_alarm_get, ++ .max_brightness = LED_MODE_AMBER_BLINK, ++ }, ++ [LED_TYPE_ALARM] = { ++ .name = "as4610::alarm", ++ .default_trigger = "unused", ++ .brightness_set = as4610_led_poe_alarm_set, ++ .brightness_get = as4610_led_poe_alarm_get, + .max_brightness = LED_MODE_AMBER_BLINK, + }, +}; + -+static int as4610_led_suspend(struct platform_device *dev, -+ pm_message_t state) -+{ -+ int i = 0; -+ -+ for (i = 0; i < ledctl->num_of_led; i++) { -+ led_classdev_suspend(&as4610_leds[i]); -+ } -+ -+ return 0; -+} -+ -+static int as4610_led_resume(struct platform_device *dev) -+{ -+ int i = 0; -+ -+ for (i = 0; i < ledctl->num_of_led; i++) { -+ led_classdev_resume(&as4610_leds[i]); -+ } -+ -+ return 0; -+} -+ +static int as4610_led_probe(struct platform_device *pdev) +{ + int ret = 0, i; + -+ for (i = 0; i < ledctl->num_of_led; i++) { ++ for (i = 0; i < NUM_OF_LED; i++) { ++ if (!(ledctl->led_map & BIT(i))) { ++ continue; ++ } ++ + ret = led_classdev_register(&pdev->dev, &as4610_leds[i]); -+ -+ if (ret < 0) -+ break; ++ if (ret < 0) { ++ goto error; ++ } + } + -+ /* Check if all LEDs were successfully registered */ -+ if (i != ledctl->num_of_led){ -+ int j; ++ return 0; + ++error: ++ for (i = i-1; i >= 0; i--) { + /* only unregister the LEDs that were successfully registered */ -+ for (j = 0; j < i; j++) { -+ led_classdev_unregister(&as4610_leds[i]); ++ if (!(ledctl->led_map & BIT(i))) { ++ continue; + } ++ ++ led_classdev_unregister(&as4610_leds[i]); + } + + return ret; @@ -2508,7 +2466,11 @@ index 0000000..6f20735 +{ + int i; + -+ for (i = 0; i < ledctl->num_of_led; i++) { ++ for (i = 0; i < NUM_OF_LED; i++) { ++ if (!(ledctl->led_map & BIT(i))) { ++ continue; ++ } ++ + led_classdev_unregister(&as4610_leds[i]); + } + @@ -2518,8 +2480,6 @@ index 0000000..6f20735 +static struct platform_driver as4610_led_driver = { + .probe = as4610_led_probe, + .remove = as4610_led_remove, -+ .suspend = as4610_led_suspend, -+ .resume = as4610_led_resume, + .driver = { + .name = DRVNAME, + .owner = THIS_MODULE, @@ -2528,7 +2488,7 @@ index 0000000..6f20735 + +static int __init as4610_led_init(void) +{ -+ int ret; ++ int ret, pid; + + if (as4610_product_id() == PID_UNKNOWN) { + return -ENODEV; @@ -2546,13 +2506,12 @@ index 0000000..6f20735 + goto exit; + } + -+ if (as4610_is_poe_system()) { -+ ledctl->num_of_led = LED_TYPE_POE - LED_TYPE_SYS + 1; -+ } -+ else { -+ ledctl->num_of_led = LED_TYPE_7SEG_DIGITS_POINT - LED_TYPE_SYS + 1; ++ pid = as4610_product_id(); ++ if (pid == PID_UNKNOWN) { ++ return -ENODEV; + } + ++ ledctl->led_map = as4610_ledmaps[pid]; + mutex_init(&ledctl->update_lock); + + ledctl->pdev = platform_device_register_simple(DRVNAME, -1, NULL, 0); @@ -2615,10 +2574,10 @@ index 9edd559..12f7cae 100644 +obj-$(CONFIG_EEPROM_ACCTON_AS4610_SFP) += accton_as4610_sfp.o diff --git a/drivers/misc/eeprom/accton_as4610_sfp.c b/drivers/misc/eeprom/accton_as4610_sfp.c new file mode 100644 -index 0000000..51488b4 +index 0000000..39c17ec --- /dev/null +++ b/drivers/misc/eeprom/accton_as4610_sfp.c -@@ -0,0 +1,1265 @@ +@@ -0,0 +1,1269 @@ +/* + * SFP driver for accton as4610 sfp + * @@ -2941,7 +2900,7 @@ index 0000000..51488b4 + DEBUG_PRINT("Present status = 0x%lx", data->present); +exit: + mutex_unlock(&data->update_lock); -+ return data; ++ return (status < 0) ? ERR_PTR(status) : data; +} + +static struct sfp_port_data *sfp_update_tx_rx_status(struct device *dev) @@ -3168,7 +3127,6 @@ index 0000000..51488b4 + for (i = 0; i < ARRAY_SIZE(reg); i++) { + status = sfp_eeprom_read(client, reg[i], &buf, sizeof(buf)); + if (unlikely(status < 0)) { -+ data = ERR_PTR(status); + goto exit; + } + } @@ -3178,7 +3136,6 @@ index 0000000..51488b4 + for (i = 0; i < ARRAY_SIZE(reg); i++) { + status = sfp_eeprom_read(client, reg[i], &buf, sizeof(buf)); + if (unlikely(status < 0)) { -+ data = ERR_PTR(status); + goto exit; + } + @@ -3191,7 +3148,7 @@ index 0000000..51488b4 + +exit: + mutex_unlock(&data->update_lock); -+ return data; ++ return (status < 0) ? ERR_PTR(status) : data; +} + +static ssize_t qsfp_show_tx_rx_status(struct device *dev, struct device_attribute *da, @@ -3210,7 +3167,7 @@ index 0000000..51488b4 + + if (present == 0) { + /* port is not present */ -+ return -ENODEV; ++ return -ENXIO; + } + + data = qsfp_update_tx_rx_status(dev); @@ -3220,31 +3177,31 @@ index 0000000..51488b4 + + switch (attr->index) { + case TX_FAULT: -+ val = (data->qsfp->status[2] & 0xF) ? 1 : 0; ++ val = !!(data->qsfp->status[2] & 0xF); + break; + case TX_FAULT1: + case TX_FAULT2: + case TX_FAULT3: + case TX_FAULT4: -+ val = (data->qsfp->status[2] & BIT_INDEX(attr->index - TX_FAULT1)) ? 1 : 0; ++ val = !!(data->qsfp->status[2] & BIT_INDEX(attr->index - TX_FAULT1)); + break; + case TX_DISABLE: -+ val = (data->qsfp->status[1] & 0xF) ? 1 : 0; ++ val = data->qsfp->status[1] & 0xF; + break; + case TX_DISABLE1: + case TX_DISABLE2: + case TX_DISABLE3: + case TX_DISABLE4: -+ val = (data->qsfp->status[1] & BIT_INDEX(attr->index - TX_DISABLE1)) ? 1 : 0; ++ val = !!(data->qsfp->status[1] & BIT_INDEX(attr->index - TX_DISABLE1)); + break; + case RX_LOS: -+ val = (data->qsfp->status[0] & 0xF) ? 1 : 0; ++ val = !!(data->qsfp->status[0] & 0xF); + break; + case RX_LOS1: + case RX_LOS2: + case RX_LOS3: + case RX_LOS4: -+ val = (data->qsfp->status[0] & BIT_INDEX(attr->index - RX_LOS1)) ? 1 : 0; ++ val = !!(data->qsfp->status[0] & BIT_INDEX(attr->index - RX_LOS1)); + break; + default: + break; @@ -3259,7 +3216,18 @@ index 0000000..51488b4 + long disable; + int status; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); -+ struct sfp_port_data *data = NULL; ++ struct i2c_client *client = to_i2c_client(dev); ++ struct sfp_port_data *data = i2c_get_clientdata(client); ++ ++ status = sfp_is_port_present(client, data->port); ++ if (IS_ERR_VALUE(status)) { ++ return status; ++ } ++ ++ if (!status) { ++ /* port is not present */ ++ return -ENXIO; ++ } + + status = kstrtol(buf, 10, &disable); + if (status) { @@ -3274,12 +3242,7 @@ index 0000000..51488b4 + mutex_lock(&data->update_lock); + + if (attr->index == TX_DISABLE) { -+ if (disable) { -+ data->qsfp->status[1] |= 0xF; -+ } -+ else { -+ data->qsfp->status[1] &= ~0xF; -+ } ++ data->qsfp->status[1] = disable & 0xF; + } + else {/* TX_DISABLE1 ~ TX_DISABLE4*/ + if (disable) { @@ -3323,7 +3286,7 @@ index 0000000..51488b4 + return status; + } + -+ return sprintf(buf, "%d\n", (ddm & SFF8472_DIAG_MON_TYPE_DDM_MASK) ? 1 : 0); ++ return sprintf(buf, "%d\n", !!(ddm & SFF8472_DIAG_MON_TYPE_DDM_MASK)); +} + +/* Platform dependent +++ */ @@ -3855,7 +3818,7 @@ index 0000000..51488b4 + +/* Addresses scanned + */ -+static const unsigned short normal_i2c[] = { SFP_EEPROM_A0_I2C_ADDR, SFP_EEPROM_A2_I2C_ADDR, I2C_CLIENT_END }; ++static const unsigned short normal_i2c[] = { I2C_CLIENT_END }; + +static struct i2c_driver sfp_driver = { + .driver = { @@ -3881,15 +3844,15 @@ index 0000000..51488b4 +MODULE_DESCRIPTION("accton as4610_sfp driver"); +MODULE_LICENSE("GPL"); + -+module_init(sfp_init); ++late_initcall(sfp_init); +module_exit(sfp_exit); + diff --git a/include/linux/accton_i2c_cpld.h b/include/linux/accton_i2c_cpld.h new file mode 100644 -index 0000000..3f13209 +index 0000000..9b75abd --- /dev/null +++ b/include/linux/accton_i2c_cpld.h -@@ -0,0 +1,53 @@ +@@ -0,0 +1,76 @@ +/* + * A hwmon driver for the accton_i2c_cpld + * @@ -3922,6 +3885,8 @@ index 0000000..3f13209 + PID_AS4610_30P, + PID_AS4610_54T, + PID_AS4610_54P, ++ PID_RESERVED, ++ PID_AS4610_54T_B, + PID_UNKNOWN +}; + @@ -3929,7 +3894,12 @@ index 0000000..3f13209 +{ + int pid = accton_i2c_cpld_read(AS4610_CPLD_SLAVE_ADDR, AS4610_CPLD_PID_OFFSET); + pid &= 0xF; -+ return (pid < PID_AS4610_30T || pid > PID_AS4610_54P) ? PID_UNKNOWN : pid; ++ ++ if (pid < PID_AS4610_30T || pid > PID_AS4610_54T_B || pid == PID_RESERVED) { ++ return PID_UNKNOWN; ++ } ++ ++ return pid; +} + +static inline int as4610_is_poe_system(void) @@ -3940,7 +3910,23 @@ index 0000000..3f13209 + +static inline int as4610_number_of_system_fan(void) +{ -+ return as4610_is_poe_system() ? 1 : 0; ++ int nFan = 0; ++ int pid = as4610_product_id(); ++ ++ switch (pid) { ++ case PID_AS4610_30P: ++ case PID_AS4610_54P: ++ nFan = 1; ++ break; ++ case PID_AS4610_54T_B: ++ nFan = 2; ++ break; ++ default: ++ nFan = 0; ++ break; ++ } ++ ++ return nFan; +} + diff --git a/packages/base/any/kernels/modules/emerson700.c b/packages/base/any/kernels/modules/emerson700.c new file mode 100644 index 00000000..351a8e4b --- /dev/null +++ b/packages/base/any/kernels/modules/emerson700.c @@ -0,0 +1,233 @@ +/* + * Hardware monitoring driver for PMBus devices + * + * Copyright (c) 2010, 2011 Ericsson AB. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +/* + * Find sensor groups and status registers on each page. + */ +static void pmbus_find_sensor_groups(struct i2c_client *client, + struct pmbus_driver_info *info) +{ + int page; + + /* Sensors detected on page 0 only */ + if (pmbus_check_word_register(client, 0, PMBUS_READ_VIN)) + info->func[0] |= PMBUS_HAVE_VIN; + if (pmbus_check_word_register(client, 0, PMBUS_READ_VCAP)) + info->func[0] |= PMBUS_HAVE_VCAP; + if (pmbus_check_word_register(client, 0, PMBUS_READ_IIN)) + info->func[0] |= PMBUS_HAVE_IIN; + if (pmbus_check_word_register(client, 0, PMBUS_READ_PIN)) + info->func[0] |= PMBUS_HAVE_PIN; + if (info->func[0] + && pmbus_check_byte_register(client, 0, PMBUS_STATUS_INPUT)) + info->func[0] |= PMBUS_HAVE_STATUS_INPUT; + if (pmbus_check_byte_register(client, 0, PMBUS_FAN_CONFIG_12) && + pmbus_check_word_register(client, 0, PMBUS_READ_FAN_SPEED_1)) { + info->func[0] |= PMBUS_HAVE_FAN12; + if (pmbus_check_byte_register(client, 0, PMBUS_STATUS_FAN_12)) + info->func[0] |= PMBUS_HAVE_STATUS_FAN12; + } + if (pmbus_check_byte_register(client, 0, PMBUS_FAN_CONFIG_34) && + pmbus_check_word_register(client, 0, PMBUS_READ_FAN_SPEED_3)) { + info->func[0] |= PMBUS_HAVE_FAN34; + if (pmbus_check_byte_register(client, 0, PMBUS_STATUS_FAN_34)) + info->func[0] |= PMBUS_HAVE_STATUS_FAN34; + } + if (pmbus_check_word_register(client, 0, PMBUS_READ_TEMPERATURE_1)) + info->func[0] |= PMBUS_HAVE_TEMP; + if (pmbus_check_word_register(client, 0, PMBUS_READ_TEMPERATURE_2)) + info->func[0] |= PMBUS_HAVE_TEMP2; + if (pmbus_check_word_register(client, 0, PMBUS_READ_TEMPERATURE_3)) + info->func[0] |= PMBUS_HAVE_TEMP3; + if (info->func[0] & (PMBUS_HAVE_TEMP | PMBUS_HAVE_TEMP2 + | PMBUS_HAVE_TEMP3) + && pmbus_check_byte_register(client, 0, + PMBUS_STATUS_TEMPERATURE)) + info->func[0] |= PMBUS_HAVE_STATUS_TEMP; + + /* Sensors detected on all pages */ + for (page = 0; page < info->pages; page++) { + if (pmbus_check_word_register(client, page, PMBUS_READ_VOUT)) { + info->func[page] |= PMBUS_HAVE_VOUT; + if (pmbus_check_byte_register(client, page, + PMBUS_STATUS_VOUT)) + info->func[page] |= PMBUS_HAVE_STATUS_VOUT; + } + if (pmbus_check_word_register(client, page, PMBUS_READ_IOUT)) { + info->func[page] |= PMBUS_HAVE_IOUT; + if (pmbus_check_byte_register(client, 0, + PMBUS_STATUS_IOUT)) + info->func[page] |= PMBUS_HAVE_STATUS_IOUT; + } + if (pmbus_check_word_register(client, page, PMBUS_READ_POUT)) + info->func[page] |= PMBUS_HAVE_POUT; + } +} + +/* + * Identify chip parameters. + */ +static int pmbus_identify(struct i2c_client *client, + struct pmbus_driver_info *info) +{ + int ret = 0; + + if (!info->pages) { + /* + * Check if the PAGE command is supported. If it is, + * keep setting the page number until it fails or until the + * maximum number of pages has been reached. Assume that + * this is the number of pages supported by the chip. + */ + if (pmbus_check_byte_register(client, 0, PMBUS_PAGE)) { + int page; + + for (page = 1; page < PMBUS_PAGES; page++) { + if (pmbus_set_page(client, page) < 0) + break; + } + pmbus_set_page(client, 0); + info->pages = page; + } else { + info->pages = 1; + } + } + + if (pmbus_check_byte_register(client, 0, PMBUS_VOUT_MODE)) { + int vout_mode; + + vout_mode = pmbus_read_byte_data(client, 0, PMBUS_VOUT_MODE); + if (vout_mode >= 0 && vout_mode != 0xff) { + switch (vout_mode >> 5) { + case 0: + break; + case 1: + info->format[PSC_VOLTAGE_OUT] = vid; + break; + case 2: + info->format[PSC_VOLTAGE_OUT] = direct; + break; + default: + ret = -ENODEV; + goto abort; + } + } + } + + /* + * We should check if the COEFFICIENTS register is supported. + * If it is, and the chip is configured for direct mode, we can read + * the coefficients from the chip, one set per group of sensor + * registers. + * + * To do this, we will need access to a chip which actually supports the + * COEFFICIENTS command, since the command is too complex to implement + * without testing it. Until then, abort if a chip configured for direct + * mode was detected. + */ + if (info->format[PSC_VOLTAGE_OUT] == direct) { + ret = -ENODEV; + goto abort; + } + + /* Try to find sensor groups */ + pmbus_find_sensor_groups(client, info); +abort: + return ret; +} + +static int pmbus_read_byte_data_emerson700(struct i2c_client *client, int page, int reg) +{ + int rv, value; + + if (page >= 0) { + rv = pmbus_set_page(client, page); + if (rv < 0) + return rv; + } + + value = i2c_smbus_read_byte_data(client, reg); + return (value == 0xff) ? (-EIO) : value; +} + +static int pmbus_read_word_data_emerson700(struct i2c_client *client, int page, int reg) +{ + int rv, value; + + rv = pmbus_set_page(client, page); + if (rv < 0) + return rv; + + value = i2c_smbus_read_word_data(client, reg); + return (value == 0xffff) ? (-EIO) : value; +} + +static int emerson700_pmbus_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct pmbus_driver_info *info; + + info = devm_kzalloc(&client->dev, sizeof(struct pmbus_driver_info), + GFP_KERNEL); + if (!info) + return -ENOMEM; + + info->pages = id->driver_data; + info->identify = pmbus_identify; + info->read_byte_data = pmbus_read_byte_data_emerson700; + info->read_word_data = pmbus_read_word_data_emerson700; + + return pmbus_do_probe(client, id, info); +} + +/* + * Use driver_data to set the number of pages supported by the chip. + */ +static const struct i2c_device_id emerson700_pmbus_id[] = { + {"emerson700", 0}, + {} +}; + +MODULE_DEVICE_TABLE(i2c, emerson700_pmbus_id); + +/* This is the driver that will be inserted */ +static struct i2c_driver emerson700_pmbus_driver = { + .driver = { + .name = "emerson700", + }, + .probe = emerson700_pmbus_probe, + .remove = pmbus_do_remove, + .id_table = emerson700_pmbus_id, +}; + +module_i2c_driver(emerson700_pmbus_driver); + +MODULE_AUTHOR("Audi Hsu "); +MODULE_DESCRIPTION("Emerson 700 PMBus driver"); +MODULE_LICENSE("GPL"); diff --git a/packages/base/any/onlp-snmpd/builds/src/onlp_snmp/module/src/onlp_snmp_platform.c b/packages/base/any/onlp-snmpd/builds/src/onlp_snmp/module/src/onlp_snmp_platform.c index 88a5ef52..7657bbb0 100644 --- a/packages/base/any/onlp-snmpd/builds/src/onlp_snmp/module/src/onlp_snmp_platform.c +++ b/packages/base/any/onlp-snmpd/builds/src/onlp_snmp/module/src/onlp_snmp_platform.c @@ -83,7 +83,7 @@ resource_int_register(int index, const char* desc, netsnmp_create_handler_registration(desc, handler, tree, OID_LENGTH(tree), HANDLER_CAN_RONLY); - if (netsnmp_register_scalar(reg) != MIB_REGISTERED_OK) { + if (netsnmp_register_instance(reg) != MIB_REGISTERED_OK) { AIM_LOG_ERROR("registering handler for %s failed", desc); } } diff --git a/packages/base/any/onlp/src/sff/module/auto/sff.yml b/packages/base/any/onlp/src/sff/module/auto/sff.yml index 3ccd142c..71843f4e 100644 --- a/packages/base/any/onlp/src/sff/module/auto/sff.yml +++ b/packages/base/any/onlp/src/sff/module/auto/sff.yml @@ -67,6 +67,10 @@ sff_module_types: &sff_module_types desc: "40GBASE-CR" - 40G_BASE_SR2: desc: "40GBASE-SR2" +- 40G_BASE_SM4: + desc: "40GBASE-SM4" +- 25G_BASE_CR: + desc: "25GBASE-CR" - 10G_BASE_SR: desc: "10GBASE-SR" - 10G_BASE_LR: @@ -102,8 +106,9 @@ sff_module_caps: &sff_module_caps - F_100 : 0x1 - F_1G : 0x2 - F_10G : 0x4 -- F_40G : 0x8 -- F_100G : 0x10 +- F_25G : 0x8 +- F_40G : 0x10 +- F_100G : 0x20 sff_sfp_types: &sff_sfp_types - SFP: diff --git a/packages/base/any/onlp/src/sff/module/inc/sff/8436.h b/packages/base/any/onlp/src/sff/module/inc/sff/8436.h index d2c0e35f..cf389351 100644 --- a/packages/base/any/onlp/src/sff/module/inc/sff/8436.h +++ b/packages/base/any/onlp/src/sff/module/inc/sff/8436.h @@ -270,6 +270,23 @@ _sff8436_qsfp_40g_lm4(const uint8_t* idprom) return SFF8436_MEDIA_NONE(idprom); } +static inline int +_sff8436_qsfp_40g_sm4(const uint8_t* idprom) +{ + if(!SFF8436_MODULE_QSFP_PLUS_V2(idprom)) { + return 0; + } + + if (!SFF8436_MEDIA_NONE(idprom)) return 0; + /* 850nm tx technology */ + if (idprom[147] & 0xF0) return 0; + /* length is 200m(OM3) or 250m(OM4) */ + if ((idprom[143] != 100) && (idprom[146] != 125)) { + return 0; + } + return 1; +} + static inline int _sff8436_bitrate(const uint8_t *idprom) { diff --git a/packages/base/any/onlp/src/sff/module/inc/sff/8472.h b/packages/base/any/onlp/src/sff/module/inc/sff/8472.h index dbafbbe6..fa7b1ddc 100644 --- a/packages/base/any/onlp/src/sff/module/inc/sff/8472.h +++ b/packages/base/any/onlp/src/sff/module/inc/sff/8472.h @@ -72,6 +72,7 @@ #define SFF8472_CONN_HSSDC_II 0x20 #define SFF8472_CONN_CU_PIGTAIL 0x21 #define SFF8472_CONN_RJ45 0x22 +#define SFF8472_CONN_NOSEP 0x23 /* module compliance codes (SFP type) */ @@ -943,7 +944,7 @@ _sff8472_sfp_10g_aoc(const uint8_t *idprom) static inline int _sff8472_sfp_10g_aoc_length(const uint8_t *idprom) { - /* module should be qsfp */ + /* module should be sfp */ if (!SFF8472_MODULE_SFP(idprom)) return -1; /* does not report a fiber length, but does report a cable length */ @@ -957,4 +958,19 @@ _sff8472_sfp_10g_aoc_length(const uint8_t *idprom) return -1; } +/* + * SFP28 + */ +static inline int +_sff8472_media_sfp28_cr(const uint8_t* idprom) +{ + /* module should be sfp */ + if (!SFF8472_MODULE_SFP(idprom)) return 0; + + if (idprom[2] != SFF8472_CONN_NOSEP) return 0; + if ((idprom[3] & SFF8472_CC3_INF_1X_CU_PASSIVE) == 0) return 0; + if (idprom[12] == 0xFF) return 1; + + return 0; +} #endif diff --git a/packages/base/any/onlp/src/sff/module/inc/sff/sff.h b/packages/base/any/onlp/src/sff/module/inc/sff/sff.h index 20e3b3f4..3f0461c3 100644 --- a/packages/base/any/onlp/src/sff/module/inc/sff/sff.h +++ b/packages/base/any/onlp/src/sff/module/inc/sff/sff.h @@ -68,8 +68,9 @@ typedef enum sff_module_caps_e { SFF_MODULE_CAPS_F_100 = 1, SFF_MODULE_CAPS_F_1G = 2, SFF_MODULE_CAPS_F_10G = 4, - SFF_MODULE_CAPS_F_40G = 8, - SFF_MODULE_CAPS_F_100G = 16, + SFF_MODULE_CAPS_F_25G = 8, + SFF_MODULE_CAPS_F_40G = 16, + SFF_MODULE_CAPS_F_100G = 32, } sff_module_caps_t; /** Enum names. */ @@ -107,6 +108,8 @@ typedef enum sff_module_type_e { SFF_MODULE_TYPE_40G_BASE_ACTIVE, SFF_MODULE_TYPE_40G_BASE_CR, SFF_MODULE_TYPE_40G_BASE_SR2, + SFF_MODULE_TYPE_40G_BASE_SM4, + SFF_MODULE_TYPE_25G_BASE_CR, SFF_MODULE_TYPE_10G_BASE_SR, SFF_MODULE_TYPE_10G_BASE_LR, SFF_MODULE_TYPE_10G_BASE_LRM, @@ -142,6 +145,8 @@ typedef enum sff_module_type_e { "40G_BASE_ACTIVE", \ "40G_BASE_CR", \ "40G_BASE_SR2", \ + "40G_BASE_SM4", \ + "25G_BASE_CR", \ "10G_BASE_SR", \ "10G_BASE_LR", \ "10G_BASE_LRM", \ diff --git a/packages/base/any/onlp/src/sff/module/src/sff.c b/packages/base/any/onlp/src/sff/module/src/sff.c index 74cad3e5..52c08a21 100644 --- a/packages/base/any/onlp/src/sff/module/src/sff.c +++ b/packages/base/any/onlp/src/sff/module/src/sff.c @@ -125,6 +125,11 @@ sff_module_type_get(const uint8_t* eeprom) return SFF_MODULE_TYPE_40G_BASE_LM4; } + if (SFF8436_MODULE_QSFP_PLUS_V2(eeprom) + && _sff8436_qsfp_40g_sm4(eeprom)) { + return SFF_MODULE_TYPE_40G_BASE_SM4; + } + if (SFF8472_MODULE_SFP(eeprom) && SFF8472_MEDIA_XGE_SR(eeprom) && !_sff8472_media_gbe_sx_fc_hack(eeprom)) @@ -165,6 +170,11 @@ sff_module_type_get(const uint8_t* eeprom) return SFF_MODULE_TYPE_10G_BASE_CR; } + if (SFF8472_MODULE_SFP(eeprom) + && _sff8472_media_sfp28_cr(eeprom)) { + return SFF_MODULE_TYPE_25G_BASE_CR; + } + if (SFF8472_MODULE_SFP(eeprom) && SFF8472_MEDIA_GBE_SX(eeprom)) return SFF_MODULE_TYPE_1G_BASE_SX; @@ -214,6 +224,7 @@ sff_media_type_get(sff_module_type_t mt) case SFF_MODULE_TYPE_100G_BASE_CR4: case SFF_MODULE_TYPE_40G_BASE_CR4: case SFF_MODULE_TYPE_40G_BASE_CR: + case SFF_MODULE_TYPE_25G_BASE_CR: case SFF_MODULE_TYPE_10G_BASE_CR: case SFF_MODULE_TYPE_1G_BASE_CX: case SFF_MODULE_TYPE_1G_BASE_T: @@ -228,6 +239,7 @@ sff_media_type_get(sff_module_type_t mt) case SFF_MODULE_TYPE_40G_BASE_LM4: case SFF_MODULE_TYPE_40G_BASE_ACTIVE: case SFF_MODULE_TYPE_40G_BASE_SR2: + case SFF_MODULE_TYPE_40G_BASE_SM4: case SFF_MODULE_TYPE_10G_BASE_SR: case SFF_MODULE_TYPE_10G_BASE_LR: case SFF_MODULE_TYPE_10G_BASE_LRM: @@ -275,9 +287,14 @@ sff_module_caps_get(sff_module_type_t mt, uint32_t *caps) case SFF_MODULE_TYPE_40G_BASE_ACTIVE: case SFF_MODULE_TYPE_40G_BASE_CR: case SFF_MODULE_TYPE_40G_BASE_SR2: + case SFF_MODULE_TYPE_40G_BASE_SM4: *caps |= SFF_MODULE_CAPS_F_40G; return 0; + case SFF_MODULE_TYPE_25G_BASE_CR: + *caps |= SFF_MODULE_CAPS_F_25G; + return 0; + case SFF_MODULE_TYPE_10G_BASE_SR: case SFF_MODULE_TYPE_10G_BASE_LR: case SFF_MODULE_TYPE_10G_BASE_LRM: diff --git a/packages/base/any/onlp/src/sff/module/src/sff_enums.c b/packages/base/any/onlp/src/sff/module/src/sff_enums.c index d748d162..c3a0d880 100644 --- a/packages/base/any/onlp/src/sff/module/src/sff_enums.c +++ b/packages/base/any/onlp/src/sff/module/src/sff_enums.c @@ -66,6 +66,7 @@ aim_map_si_t sff_module_caps_map[] = { "F_100", SFF_MODULE_CAPS_F_100 }, { "F_1G", SFF_MODULE_CAPS_F_1G }, { "F_10G", SFF_MODULE_CAPS_F_10G }, + { "F_25G", SFF_MODULE_CAPS_F_25G }, { "F_40G", SFF_MODULE_CAPS_F_40G }, { "F_100G", SFF_MODULE_CAPS_F_100G }, { NULL, 0 } @@ -76,6 +77,7 @@ aim_map_si_t sff_module_caps_desc_map[] = { "None", SFF_MODULE_CAPS_F_100 }, { "None", SFF_MODULE_CAPS_F_1G }, { "None", SFF_MODULE_CAPS_F_10G }, + { "None", SFF_MODULE_CAPS_F_25G }, { "None", SFF_MODULE_CAPS_F_40G }, { "None", SFF_MODULE_CAPS_F_100G }, { NULL, 0 } @@ -141,6 +143,8 @@ aim_map_si_t sff_module_type_map[] = { "40G_BASE_ACTIVE", SFF_MODULE_TYPE_40G_BASE_ACTIVE }, { "40G_BASE_CR", SFF_MODULE_TYPE_40G_BASE_CR }, { "40G_BASE_SR2", SFF_MODULE_TYPE_40G_BASE_SR2 }, + { "40G_BASE_SM4", SFF_MODULE_TYPE_40G_BASE_SM4 }, + { "25G_BASE_CR", SFF_MODULE_TYPE_25G_BASE_CR }, { "10G_BASE_SR", SFF_MODULE_TYPE_10G_BASE_SR }, { "10G_BASE_LR", SFF_MODULE_TYPE_10G_BASE_LR }, { "10G_BASE_LRM", SFF_MODULE_TYPE_10G_BASE_LRM }, @@ -173,6 +177,8 @@ aim_map_si_t sff_module_type_desc_map[] = { "40GBASE-ACTIVE", SFF_MODULE_TYPE_40G_BASE_ACTIVE }, { "40GBASE-CR", SFF_MODULE_TYPE_40G_BASE_CR }, { "40GBASE-SR2", SFF_MODULE_TYPE_40G_BASE_SR2 }, + { "40GBASE-SM4", SFF_MODULE_TYPE_40G_BASE_SM4 }, + { "25GBASE-CR", SFF_MODULE_TYPE_25G_BASE_CR }, { "10GBASE-SR", SFF_MODULE_TYPE_10G_BASE_SR }, { "10GBASE-LR", SFF_MODULE_TYPE_10G_BASE_LR }, { "10GBASE-LRM", SFF_MODULE_TYPE_10G_BASE_LRM }, diff --git a/packages/base/any/onlp/src/sff/sff.mk b/packages/base/any/onlp/src/sff/sff.mk index cfe22be5..ae469813 100644 --- a/packages/base/any/onlp/src/sff/sff.mk +++ b/packages/base/any/onlp/src/sff/sff.mk @@ -3,12 +3,12 @@ # # Inclusive Makefile for the sff module. # -# Autogenerated 2016-05-17 17:43:05.843123 +# Autogenerated 2017-01-31 00:32:39.650740 # ############################################################################### sff_BASEDIR := $(dir $(abspath $(lastword $(MAKEFILE_LIST)))) include $(sff_BASEDIR)module/make.mk -include $(sff_BASEDIR)module/auto/make.mk include $(sff_BASEDIR)module/src/make.mk +include $(sff_BASEDIR)module/auto/make.mk include $(sff_BASEDIR)utest/_make.mk diff --git a/packages/base/any/templates/platform-config-with-modules.yml b/packages/base/any/templates/arch-vendor-modules.yml similarity index 50% rename from packages/base/any/templates/platform-config-with-modules.yml rename to packages/base/any/templates/arch-vendor-modules.yml index 0040aecc..7dfddb91 100644 --- a/packages/base/any/templates/platform-config-with-modules.yml +++ b/packages/base/any/templates/arch-vendor-modules.yml @@ -1,23 +1,21 @@ ############################################################ # -# PKG template for all platform-config packages. +# PKG template for a vendor's common modules # ############################################################ prerequisites: - packages: [ "onl-vendor-config-${VENDOR}:all", "$MODULES" ] + packages: [ $KERNELS ] packages: - - name: onl-platform-config-${PLATFORM} - depends: onl-vendor-config-${VENDOR},$MODULES + - name: onl-vendor-${VENDOR}-modules version: 1.0.0 arch: $ARCH copyright: Copyright 2013, 2014, 2015 Big Switch Networks maintainer: support@bigswitch.com support: opennetworklinux@googlegroups.com - summary: ONL Platform Configuration Package for the ${PLATFORM} + summary: ONL Vendor Modules Package for ${vendor} files: - src/lib: /lib/platform-config/${PLATFORM}/onl - src/python : ${PY_INSTALL}/onl/platform/ + builds/lib: /lib changelog: Changes diff --git a/packages/base/any/templates/no-arch-vendor-modules.yml b/packages/base/any/templates/no-arch-vendor-modules.yml new file mode 100644 index 00000000..8df96d2a --- /dev/null +++ b/packages/base/any/templates/no-arch-vendor-modules.yml @@ -0,0 +1,15 @@ +############################################################ +# +# PKG template for a vendor's common modules +# +############################################################ +packages: + - name: onl-vendor-${VENDOR}-modules + version: 1.0.0 + arch: $ARCH + copyright: Copyright 2013, 2014, 2015 Big Switch Networks + maintainer: support@bigswitch.com + support: opennetworklinux@googlegroups.com + summary: ONL Vendor Modules Package for ${vendor} + + changelog: Changes diff --git a/packages/base/any/templates/no-platform-modules.yml b/packages/base/any/templates/no-platform-modules.yml new file mode 100644 index 00000000..6dcbc00a --- /dev/null +++ b/packages/base/any/templates/no-platform-modules.yml @@ -0,0 +1,20 @@ +############################################################ +# +# PKG template for all platform module packages +# +############################################################ +prerequisites: + packages: + - onl-vendor-${VENDOR}-modules:$ARCH + +packages: + - name: onl-platform-modules-$BASENAME + version: 1.0.0 + arch: $ARCH + copyright: Copyright 2013, 2014, 2015 Big Switch Networks + maintainer: support@bigswitch.com + support: opennetworklinux@googlegroups.com + summary: ONL Platform Modules Package for the $BASENAME + depends: onl-vendor-${VENDOR}-modules + + changelog: Changes diff --git a/packages/base/any/templates/platform-config-platform.yml b/packages/base/any/templates/platform-config-platform.yml index 0eb1edc0..c709fa10 100644 --- a/packages/base/any/templates/platform-config-platform.yml +++ b/packages/base/any/templates/platform-config-platform.yml @@ -3,21 +3,26 @@ # PKG template for all platform-config packages. # ############################################################ +variables: + PLATFORM : $BASENAME-$REVISION + prerequisites: - packages: [ "onl-vendor-config-${VENDOR}:all" ] + packages: + - "onl-vendor-config-$VENDOR:all" + - "onl-platform-modules-$BASENAME:$ARCH" packages: - - name: onl-platform-config-${PLATFORM} - depends: onl-vendor-config-${VENDOR} + - name: onl-platform-config-$PLATFORM + depends: onl-vendor-config-$VENDOR,onl-platform-modules-$BASENAME version: 1.0.0 arch: $ARCH copyright: Copyright 2013, 2014, 2015 Big Switch Networks maintainer: support@bigswitch.com support: opennetworklinux@googlegroups.com - summary: ONL Platform Configuration Package for the ${PLATFORM} + summary: ONL Platform Configuration Package for the $PLATFORM files: - src/lib: /lib/platform-config/${PLATFORM}/onl + src/lib: /lib/platform-config/$PLATFORM/onl src/python : ${PY_INSTALL}/onl/platform/ changelog: Changes diff --git a/packages/base/any/templates/platform-modules.yml b/packages/base/any/templates/platform-modules.yml index a0587d5e..f3173352 100644 --- a/packages/base/any/templates/platform-modules.yml +++ b/packages/base/any/templates/platform-modules.yml @@ -4,16 +4,19 @@ # ############################################################ prerequisites: - packages: [ $KERNELS ] + packages: + - $KERNELS + - onl-vendor-${VENDOR}-modules:$ARCH packages: - - name: onl-platform-modules-${PLATFORM} + - name: onl-platform-modules-${BASENAME} version: 1.0.0 arch: $ARCH copyright: Copyright 2013, 2014, 2015 Big Switch Networks maintainer: support@bigswitch.com support: opennetworklinux@googlegroups.com - summary: ONL Platform Modules Package for the ${PLATFORM} + summary: ONL Platform Modules Package for the ${BASENAME} + depends: onl-vendor-${VENDOR}-modules files: builds/lib: /lib diff --git a/packages/base/powerpc/kernels/kernel-3.2-deb7-powerpc-e500v-all/PKG.yml.disabled b/packages/base/powerpc/kernels/kernel-3.2-deb7-powerpc-e500v-all/PKG.yml.disabled new file mode 100644 index 00000000..2fd92d08 --- /dev/null +++ b/packages/base/powerpc/kernels/kernel-3.2-deb7-powerpc-e500v-all/PKG.yml.disabled @@ -0,0 +1 @@ +This package is no longer in use. It will be fully removed. \ No newline at end of file diff --git a/packages/platforms-closed b/packages/platforms-closed index 0c85b120..b9260861 160000 --- a/packages/platforms-closed +++ b/packages/platforms-closed @@ -1 +1 @@ -Subproject commit 0c85b1202684cdaca8e9362dfc50f20c01dc8089 +Subproject commit b926086155628aad2f2a4df10c19011da51c1770 diff --git a/packages/platforms/alphanetworks/x86-64-alphanetworks-snx60a0-486f/Makefile b/packages/platforms/accton/armel/arm-accton-as4610/Makefile similarity index 100% rename from packages/platforms/alphanetworks/x86-64-alphanetworks-snx60a0-486f/Makefile rename to packages/platforms/accton/armel/arm-accton-as4610/Makefile diff --git a/packages/platforms/alphanetworks/x86-64-alphanetworks-snx60a0-486f/onlp/Makefile b/packages/platforms/accton/armel/arm-accton-as4610/arm-accton-as4610-30/modules/Makefile similarity index 100% rename from packages/platforms/alphanetworks/x86-64-alphanetworks-snx60a0-486f/onlp/Makefile rename to packages/platforms/accton/armel/arm-accton-as4610/arm-accton-as4610-30/modules/Makefile diff --git a/packages/platforms/accton/armel/arm-accton-as4610/arm-accton-as4610-30/modules/PKG.yml b/packages/platforms/accton/armel/arm-accton-as4610/arm-accton-as4610-30/modules/PKG.yml new file mode 100644 index 00000000..c2f59267 --- /dev/null +++ b/packages/platforms/accton/armel/arm-accton-as4610/arm-accton-as4610-30/modules/PKG.yml @@ -0,0 +1 @@ +!include $ONL_TEMPLATES/no-platform-modules.yml ARCH=armel VENDOR=accton BASENAME=arm-accton-as4610-30 diff --git a/packages/platforms/accton/armel/arm-accton-as4610/arm-accton-as4610-30/platform-config/r0/PKG.yml b/packages/platforms/accton/armel/arm-accton-as4610/arm-accton-as4610-30/platform-config/r0/PKG.yml index e1444152..52a697b4 100644 --- a/packages/platforms/accton/armel/arm-accton-as4610/arm-accton-as4610-30/platform-config/r0/PKG.yml +++ b/packages/platforms/accton/armel/arm-accton-as4610/arm-accton-as4610-30/platform-config/r0/PKG.yml @@ -1 +1 @@ -!include $ONL_TEMPLATES/platform-config-platform.yml ARCH=armel VENDOR=accton PLATFORM=arm-accton-as4610-30-r0 +!include $ONL_TEMPLATES/platform-config-platform.yml ARCH=armel VENDOR=accton BASENAME=arm-accton-as4610-30 REVISION=r0 diff --git a/packages/platforms/alphanetworks/x86-64-alphanetworks-snx60a0-486f/platform-config/Makefile b/packages/platforms/accton/armel/arm-accton-as4610/arm-accton-as4610-54/modules/Makefile similarity index 100% rename from packages/platforms/alphanetworks/x86-64-alphanetworks-snx60a0-486f/platform-config/Makefile rename to packages/platforms/accton/armel/arm-accton-as4610/arm-accton-as4610-54/modules/Makefile diff --git a/packages/platforms/accton/armel/arm-accton-as4610/arm-accton-as4610-54/modules/PKG.yml b/packages/platforms/accton/armel/arm-accton-as4610/arm-accton-as4610-54/modules/PKG.yml new file mode 100644 index 00000000..0ddb1ebe --- /dev/null +++ b/packages/platforms/accton/armel/arm-accton-as4610/arm-accton-as4610-54/modules/PKG.yml @@ -0,0 +1 @@ +!include $ONL_TEMPLATES/no-platform-modules.yml ARCH=armel VENDOR=accton BASENAME=arm-accton-as4610-54 diff --git a/packages/platforms/accton/armel/arm-accton-as4610/arm-accton-as4610-54/platform-config/r0/PKG.yml b/packages/platforms/accton/armel/arm-accton-as4610/arm-accton-as4610-54/platform-config/r0/PKG.yml index 1ca37460..e3a76af8 100644 --- a/packages/platforms/accton/armel/arm-accton-as4610/arm-accton-as4610-54/platform-config/r0/PKG.yml +++ b/packages/platforms/accton/armel/arm-accton-as4610/arm-accton-as4610-54/platform-config/r0/PKG.yml @@ -1 +1 @@ -!include $ONL_TEMPLATES/platform-config-platform.yml ARCH=armel VENDOR=accton PLATFORM=arm-accton-as4610-54-r0 +!include $ONL_TEMPLATES/platform-config-platform.yml ARCH=armel VENDOR=accton BASENAME=arm-accton-as4610-54 REVISION=r0 diff --git a/packages/platforms/accton/armel/arm-accton-as4610/src/arm_accton_as4610/module/src/fani.c b/packages/platforms/accton/armel/arm-accton-as4610/src/arm_accton_as4610/module/src/fani.c index e6b63b14..06772562 100644 --- a/packages/platforms/accton/armel/arm-accton-as4610/src/arm_accton_as4610/module/src/fani.c +++ b/packages/platforms/accton/armel/arm-accton-as4610/src/arm_accton_as4610/module/src/fani.c @@ -41,6 +41,7 @@ enum onlp_fan_id { FAN_RESERVED = 0, FAN_1_ON_MAIN_BOARD, + FAN_2_ON_MAIN_BOARD, FAN_1_ON_PSU1, FAN_1_ON_PSU2 }; @@ -64,6 +65,7 @@ typedef struct fan_path_S static fan_path_T fan_path[] = /* must map with onlp_fan_id */ { { }, /* Not used */ + MAKE_FAN_PATH_ON_MAIN_BOARD(1), MAKE_FAN_PATH_ON_MAIN_BOARD(2), MAKE_FAN_PATH_ON_PSU(8-0058), MAKE_FAN_PATH_ON_PSU(8-0059) @@ -93,6 +95,7 @@ static fan_path_T fan_path[] = /* must map with onlp_fan_id */ onlp_fan_info_t linfo[] = { { }, /* Not used */ MAKE_FAN_INFO_NODE_ON_MAIN_BOARD(1), + MAKE_FAN_INFO_NODE_ON_MAIN_BOARD(2), MAKE_FAN_INFO_NODE_ON_PSU(1,1), MAKE_FAN_INFO_NODE_ON_PSU(2,1), }; @@ -222,6 +225,7 @@ onlp_fani_info_get(onlp_oid_t id, onlp_fan_info_t* info) rc = _onlp_fani_info_get_fan_on_psu(local_id, info); break; case FAN_1_ON_MAIN_BOARD: + case FAN_2_ON_MAIN_BOARD: rc =_onlp_fani_info_get_fan(local_id, info); break; default: @@ -282,6 +286,7 @@ onlp_fani_percentage_set(onlp_oid_t id, int p) sprintf(fullpath, "%s%s", PREFIX_PATH_ON_PSU, fan_path[local_id].ctrl_speed); break; case FAN_1_ON_MAIN_BOARD: + case FAN_2_ON_MAIN_BOARD: sprintf(fullpath, "%s%s", PREFIX_PATH_ON_MAIN_BOARD, fan_path[local_id].ctrl_speed); break; default: diff --git a/packages/platforms/accton/armel/arm-accton-as4610/src/arm_accton_as4610/module/src/ledi.c b/packages/platforms/accton/armel/arm-accton-as4610/src/arm_accton_as4610/module/src/ledi.c index b63722c2..d165e960 100644 --- a/packages/platforms/accton/armel/arm-accton-as4610/src/arm_accton_as4610/module/src/ledi.c +++ b/packages/platforms/accton/armel/arm-accton-as4610/src/arm_accton_as4610/module/src/ledi.c @@ -76,10 +76,11 @@ typedef enum onlp_led_id LED_STK1, LED_STK2, LED_FAN, - LED_POE + LED_POE, + LED_ALARM } onlp_led_id_t; -static char onlp_led_node_subname[][20] = /* must map with onlp_led_id */ +static char* onlp_led_node_subname[] = /* must map with onlp_led_id */ { "reserved", "7seg_tens", @@ -93,7 +94,8 @@ static char onlp_led_node_subname[][20] = /* must map with onlp_led_id */ "stk1", "stk2", "fan", - "poe" + "poe", + "alarm" }; /* @@ -162,6 +164,12 @@ static onlp_led_info_t linfo[] = ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_GREEN_BLINKING | ONLP_LED_CAPS_GREEN | ONLP_LED_CAPS_ORANGE | ONLP_LED_CAPS_ORANGE_BLINKING, }, + { + { ONLP_LED_ID_CREATE(LED_ALARM), "alarm", 0 }, + ONLP_LED_STATUS_PRESENT, + ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_GREEN_BLINKING | + ONLP_LED_CAPS_GREEN | ONLP_LED_CAPS_ORANGE | ONLP_LED_CAPS_ORANGE_BLINKING, + }, }; static int conver_led_light_mode_to_onl(uint32_t id, int led_ligth_mode) @@ -172,6 +180,7 @@ static int conver_led_light_mode_to_onl(uint32_t id, int led_ligth_mode) case LED_STK1: case LED_STK2: case LED_POE: + case LED_ALARM: case LED_7SEG_DP1: case LED_7SEG_DP2: switch (led_ligth_mode) { @@ -203,6 +212,7 @@ static int conver_onlp_led_light_mode_to_driver(uint32_t id, int led_ligth_mode) case LED_STK1: case LED_STK2: case LED_POE: + case LED_ALARM: case LED_7SEG_DP1: case LED_7SEG_DP2: switch (led_ligth_mode) { @@ -304,24 +314,48 @@ int onlp_ledi_char_get(onlp_oid_t id, char* c) return ONLP_STATUS_OK; } +static int +onlp_ledi_oid_to_internal_id(onlp_oid_t id) +{ + enum as4610_product_id pid = get_product_id(); + int lid = ONLP_OID_ID_GET(id); + + if (pid != PID_AS4610T_B) { + return lid; + } + + switch (lid) { + case 1: return LED_SYS; + case 2: return LED_PRI; + case 3: return LED_PSU1; + case 4: return LED_PSU2; + case 5: return LED_STK1; + case 6: return LED_STK2; + case 7: return LED_FAN; + case 8: return LED_ALARM; + } + + return lid; +} + int onlp_ledi_info_get(onlp_oid_t id, onlp_led_info_t* info) { int fd, len, nbytes=1; char data[2] = {0}; char fullpath[50] = {0}; - int lid = ONLP_OID_ID_GET(id); + int lid = onlp_ledi_oid_to_internal_id(id); VALIDATE(id); /* Set the onlp_oid_hdr_t and capabilities */ - *info = linfo[ONLP_OID_ID_GET(id)]; + *info = linfo[lid]; if (linfo[lid].caps & ONLP_LED_CAPS_CHAR) { return onlp_ledi_char_get(id, &info->character); } else { - sprintf(fullpath, "%s%s/%s", led_prefix_path, onlp_led_node_subname[ONLP_OID_ID_GET(id)], led_filename); + sprintf(fullpath, "%s%s/%s", led_prefix_path, onlp_led_node_subname[lid], led_filename); /* Set current mode */ if ((fd = open(fullpath, O_RDONLY)) == -1) { @@ -338,7 +372,7 @@ onlp_ledi_info_get(onlp_oid_t id, onlp_led_info_t* info) return ONLP_STATUS_E_INTERNAL; } - info->mode = conver_led_light_mode_to_onl(ONLP_OID_ID_GET(id),atoi(data)); + info->mode = conver_led_light_mode_to_onl(lid, atoi(data)); /* Set the on/off status */ if (info->mode != ONLP_LED_MODE_OFF) { @@ -382,7 +416,7 @@ onlp_ledi_mode_set(onlp_oid_t id, onlp_led_mode_t mode) int fd, len, driver_mode, nbytes=1; char data[2] = {0}; char fullpath[50] = {0}; - int lid = ONLP_OID_ID_GET(id); + int lid = onlp_ledi_oid_to_internal_id(id); VALIDATE(id); @@ -390,9 +424,9 @@ onlp_ledi_mode_set(onlp_oid_t id, onlp_led_mode_t mode) return ONLP_STATUS_E_UNSUPPORTED; } - sprintf(fullpath, "%s%s/%s", led_prefix_path, onlp_led_node_subname[ONLP_OID_ID_GET(id)], led_filename); + sprintf(fullpath, "%s%s/%s", led_prefix_path, onlp_led_node_subname[lid], led_filename); - driver_mode = conver_onlp_led_light_mode_to_driver(ONLP_OID_ID_GET(id),mode); + driver_mode = conver_onlp_led_light_mode_to_driver(lid, mode); sprintf(data, "%d", driver_mode); /* Create output file descriptor */ diff --git a/packages/platforms/accton/armel/arm-accton-as4610/src/arm_accton_as4610/module/src/platform_lib.c b/packages/platforms/accton/armel/arm-accton-as4610/src/arm_accton_as4610/module/src/platform_lib.c index 5d0909bb..8746297e 100644 --- a/packages/platforms/accton/armel/arm-accton-as4610/src/arm_accton_as4610/module/src/platform_lib.c +++ b/packages/platforms/accton/armel/arm-accton-as4610/src/arm_accton_as4610/module/src/platform_lib.c @@ -150,7 +150,7 @@ enum as4610_product_id get_product_id(void) } pid = atoi(buf); - if (pid >= PID_UNKNOWN || pid < PID_AS4610_30T) { + if (pid >= PID_UNKNOWN || pid < PID_AS4610_30T || pid == PID_RESERVED) { return PID_UNKNOWN; } @@ -160,11 +160,21 @@ enum as4610_product_id get_product_id(void) int chassis_fan_count(void) { enum as4610_product_id pid = get_product_id(); + + if (pid == PID_AS4610T_B) { + return 2; + } + return (pid == PID_AS4610_30P || pid == PID_AS4610P) ? 1 : 0; } int chassis_led_count(void) { enum as4610_product_id pid = get_product_id(); + + if (pid == PID_AS4610T_B) { + return 8; + } + return (pid == PID_AS4610_30P || pid == PID_AS4610P) ? 12 : 10; } diff --git a/packages/platforms/accton/armel/arm-accton-as4610/src/arm_accton_as4610/module/src/platform_lib.h b/packages/platforms/accton/armel/arm-accton-as4610/src/arm_accton_as4610/module/src/platform_lib.h index 0beab750..873e74ad 100644 --- a/packages/platforms/accton/armel/arm-accton-as4610/src/arm_accton_as4610/module/src/platform_lib.h +++ b/packages/platforms/accton/armel/arm-accton-as4610/src/arm_accton_as4610/module/src/platform_lib.h @@ -79,6 +79,8 @@ enum as4610_product_id { PID_AS4610_30P, PID_AS4610T, PID_AS4610P, + PID_RESERVED, + PID_AS4610T_B, PID_UNKNOWN }; diff --git a/packages/platforms/alphanetworks/x86-64-alphanetworks-snx60a0-486f/platform-config/r0/Makefile b/packages/platforms/accton/armel/modules/Makefile similarity index 100% rename from packages/platforms/alphanetworks/x86-64-alphanetworks-snx60a0-486f/platform-config/r0/Makefile rename to packages/platforms/accton/armel/modules/Makefile diff --git a/packages/platforms/accton/armel/modules/PKG.yml b/packages/platforms/accton/armel/modules/PKG.yml new file mode 100644 index 00000000..ec88c479 --- /dev/null +++ b/packages/platforms/accton/armel/modules/PKG.yml @@ -0,0 +1 @@ +!include $ONL_TEMPLATES/no-arch-vendor-modules.yml ARCH=armel VENDOR=accton diff --git a/packages/platforms/nxp/arm64/arm64-nxp-ls2080ardb/platform-config/r1/Makefile b/packages/platforms/accton/powerpc/modules/Makefile similarity index 100% rename from packages/platforms/nxp/arm64/arm64-nxp-ls2080ardb/platform-config/r1/Makefile rename to packages/platforms/accton/powerpc/modules/Makefile diff --git a/packages/platforms/accton/powerpc/modules/PKG.yml b/packages/platforms/accton/powerpc/modules/PKG.yml new file mode 100644 index 00000000..cd036673 --- /dev/null +++ b/packages/platforms/accton/powerpc/modules/PKG.yml @@ -0,0 +1 @@ +!include $ONL_TEMPLATES/no-arch-vendor-modules.yml ARCH=powerpc VENDOR=accton diff --git a/packages/platforms/accton/powerpc/powerpc-accton-as4600-54t/modules/Makefile b/packages/platforms/accton/powerpc/powerpc-accton-as4600-54t/modules/Makefile new file mode 100644 index 00000000..003238cf --- /dev/null +++ b/packages/platforms/accton/powerpc/powerpc-accton-as4600-54t/modules/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/packages/platforms/accton/powerpc/powerpc-accton-as4600-54t/modules/PKG.yml b/packages/platforms/accton/powerpc/powerpc-accton-as4600-54t/modules/PKG.yml new file mode 100644 index 00000000..fe367505 --- /dev/null +++ b/packages/platforms/accton/powerpc/powerpc-accton-as4600-54t/modules/PKG.yml @@ -0,0 +1 @@ +!include $ONL_TEMPLATES/no-platform-modules.yml ARCH=powerpc VENDOR=accton BASENAME=powerpc-accton-as4600-54t diff --git a/packages/platforms/accton/powerpc/powerpc-accton-as4600-54t/platform-config/r0/PKG.yml b/packages/platforms/accton/powerpc/powerpc-accton-as4600-54t/platform-config/r0/PKG.yml index b7d6c707..120e85e0 100644 --- a/packages/platforms/accton/powerpc/powerpc-accton-as4600-54t/platform-config/r0/PKG.yml +++ b/packages/platforms/accton/powerpc/powerpc-accton-as4600-54t/platform-config/r0/PKG.yml @@ -1 +1 @@ -!include $ONL_TEMPLATES/platform-config-platform.yml ARCH=powerpc VENDOR=accton PLATFORM=powerpc-accton-as4600-54t-r0 +!include $ONL_TEMPLATES/platform-config-platform.yml ARCH=powerpc VENDOR=accton BASENAME=powerpc-accton-as4600-54t REVISION=r0 diff --git a/packages/platforms/accton/powerpc/powerpc-accton-as5610-52x/modules/Makefile b/packages/platforms/accton/powerpc/powerpc-accton-as5610-52x/modules/Makefile new file mode 100644 index 00000000..003238cf --- /dev/null +++ b/packages/platforms/accton/powerpc/powerpc-accton-as5610-52x/modules/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/packages/platforms/accton/powerpc/powerpc-accton-as5610-52x/modules/PKG.yml b/packages/platforms/accton/powerpc/powerpc-accton-as5610-52x/modules/PKG.yml new file mode 100644 index 00000000..6214c590 --- /dev/null +++ b/packages/platforms/accton/powerpc/powerpc-accton-as5610-52x/modules/PKG.yml @@ -0,0 +1 @@ +!include $ONL_TEMPLATES/no-platform-modules.yml ARCH=powerpc VENDOR=accton BASENAME=powerpc-accton-as5610-52x diff --git a/packages/platforms/accton/powerpc/powerpc-accton-as5610-52x/platform-config/r0/PKG.yml b/packages/platforms/accton/powerpc/powerpc-accton-as5610-52x/platform-config/r0/PKG.yml index f2c57796..c7e6db4e 100644 --- a/packages/platforms/accton/powerpc/powerpc-accton-as5610-52x/platform-config/r0/PKG.yml +++ b/packages/platforms/accton/powerpc/powerpc-accton-as5610-52x/platform-config/r0/PKG.yml @@ -1 +1 @@ -!include $ONL_TEMPLATES/platform-config-platform.yml ARCH=powerpc VENDOR=accton PLATFORM=powerpc-accton-as5610-52x-r0 +!include $ONL_TEMPLATES/platform-config-platform.yml ARCH=powerpc VENDOR=accton BASENAME=powerpc-accton-as5610-52x REVISION=r0 diff --git a/packages/platforms/accton/powerpc/powerpc-accton-as5710-54x/modules/Makefile b/packages/platforms/accton/powerpc/powerpc-accton-as5710-54x/modules/Makefile new file mode 100644 index 00000000..003238cf --- /dev/null +++ b/packages/platforms/accton/powerpc/powerpc-accton-as5710-54x/modules/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/packages/platforms/accton/powerpc/powerpc-accton-as5710-54x/modules/PKG.yml b/packages/platforms/accton/powerpc/powerpc-accton-as5710-54x/modules/PKG.yml new file mode 100644 index 00000000..9d49cc12 --- /dev/null +++ b/packages/platforms/accton/powerpc/powerpc-accton-as5710-54x/modules/PKG.yml @@ -0,0 +1 @@ +!include $ONL_TEMPLATES/no-platform-modules.yml ARCH=powerpc VENDOR=accton BASENAME=powerpc-accton-as5710-54x diff --git a/packages/platforms/accton/powerpc/powerpc-accton-as5710-54x/platform-config/r0/PKG.yml b/packages/platforms/accton/powerpc/powerpc-accton-as5710-54x/platform-config/r0/PKG.yml index c49f5030..e25f2d96 100644 --- a/packages/platforms/accton/powerpc/powerpc-accton-as5710-54x/platform-config/r0/PKG.yml +++ b/packages/platforms/accton/powerpc/powerpc-accton-as5710-54x/platform-config/r0/PKG.yml @@ -1 +1 @@ -!include $ONL_TEMPLATES/platform-config-platform.yml ARCH=powerpc VENDOR=accton PLATFORM=powerpc-accton-as5710-54x-r0 +!include $ONL_TEMPLATES/platform-config-platform.yml ARCH=powerpc VENDOR=accton BASENAME=powerpc-accton-as5710-54x REVISION=r0 diff --git a/packages/platforms/accton/powerpc/powerpc-accton-as5710-54x/platform-config/r0b/PKG.yml b/packages/platforms/accton/powerpc/powerpc-accton-as5710-54x/platform-config/r0b/PKG.yml index f74c34c8..22c59bd6 100644 --- a/packages/platforms/accton/powerpc/powerpc-accton-as5710-54x/platform-config/r0b/PKG.yml +++ b/packages/platforms/accton/powerpc/powerpc-accton-as5710-54x/platform-config/r0b/PKG.yml @@ -1 +1 @@ -!include $ONL/packages/base/any/templates/platform-config-platform.yml ARCH=powerpc VENDOR=accton PLATFORM=powerpc-accton-as5710-54x-r0b +!include $ONL/packages/base/any/templates/platform-config-platform.yml ARCH=powerpc VENDOR=accton BASENAME=powerpc-accton-as5710-54x REVISION=r0b diff --git a/packages/platforms/accton/powerpc/powerpc-accton-as6700-32x/modules/Makefile b/packages/platforms/accton/powerpc/powerpc-accton-as6700-32x/modules/Makefile new file mode 100644 index 00000000..003238cf --- /dev/null +++ b/packages/platforms/accton/powerpc/powerpc-accton-as6700-32x/modules/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/packages/platforms/accton/powerpc/powerpc-accton-as6700-32x/modules/PKG.yml b/packages/platforms/accton/powerpc/powerpc-accton-as6700-32x/modules/PKG.yml new file mode 100644 index 00000000..719b202d --- /dev/null +++ b/packages/platforms/accton/powerpc/powerpc-accton-as6700-32x/modules/PKG.yml @@ -0,0 +1 @@ +!include $ONL_TEMPLATES/no-platform-modules.yml ARCH=powerpc VENDOR=accton BASENAME=powerpc-accton-as6700-32x diff --git a/packages/platforms/accton/powerpc/powerpc-accton-as6700-32x/platform-config/r0/PKG.yml b/packages/platforms/accton/powerpc/powerpc-accton-as6700-32x/platform-config/r0/PKG.yml index 373917d0..d4854b64 100644 --- a/packages/platforms/accton/powerpc/powerpc-accton-as6700-32x/platform-config/r0/PKG.yml +++ b/packages/platforms/accton/powerpc/powerpc-accton-as6700-32x/platform-config/r0/PKG.yml @@ -1 +1 @@ -!include $ONL_TEMPLATES/platform-config-platform.yml ARCH=powerpc VENDOR=accton PLATFORM=powerpc-accton-as6700-32x-r0 +!include $ONL_TEMPLATES/platform-config-platform.yml ARCH=powerpc VENDOR=accton BASENAME=powerpc-accton-as6700-32x REVISION=r0 diff --git a/packages/platforms/accton/powerpc/powerpc-accton-as6700-32x/platform-config/r1/PKG.yml b/packages/platforms/accton/powerpc/powerpc-accton-as6700-32x/platform-config/r1/PKG.yml index 36da0cab..73b159cc 100644 --- a/packages/platforms/accton/powerpc/powerpc-accton-as6700-32x/platform-config/r1/PKG.yml +++ b/packages/platforms/accton/powerpc/powerpc-accton-as6700-32x/platform-config/r1/PKG.yml @@ -1 +1 @@ -!include $ONL_TEMPLATES/platform-config-platform.yml ARCH=powerpc VENDOR=accton PLATFORM=powerpc-accton-as6700-32x-r1 +!include $ONL_TEMPLATES/platform-config-platform.yml ARCH=powerpc VENDOR=accton BASENAME=powerpc-accton-as6700-32x REVISION=r1 diff --git a/packages/platforms/accton/x86-64/modules/Makefile b/packages/platforms/accton/x86-64/modules/Makefile new file mode 100644 index 00000000..003238cf --- /dev/null +++ b/packages/platforms/accton/x86-64/modules/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/packages/platforms/accton/x86-64/modules/PKG.yml b/packages/platforms/accton/x86-64/modules/PKG.yml new file mode 100644 index 00000000..ae7072c7 --- /dev/null +++ b/packages/platforms/accton/x86-64/modules/PKG.yml @@ -0,0 +1 @@ +!include $ONL_TEMPLATES/arch-vendor-modules.yml ARCH=amd64 VENDOR=accton KERNELS="onl-kernel-3.16-lts-x86-64-all:amd64" diff --git a/packages/platforms/accton/x86-64/modules/builds/.gitignore b/packages/platforms/accton/x86-64/modules/builds/.gitignore new file mode 100644 index 00000000..a65b4177 --- /dev/null +++ b/packages/platforms/accton/x86-64/modules/builds/.gitignore @@ -0,0 +1 @@ +lib diff --git a/packages/platforms/accton/x86-64/modules/builds/Makefile b/packages/platforms/accton/x86-64/modules/builds/Makefile new file mode 100644 index 00000000..ee6748d1 --- /dev/null +++ b/packages/platforms/accton/x86-64/modules/builds/Makefile @@ -0,0 +1,6 @@ +KERNELS := onl-kernel-3.16-lts-x86-64-all:amd64 +KMODULES := $(wildcard *.c) +VENDOR := accton +BASENAME := common +ARCH := x86_64 +include $(ONL)/make/kmodule.mk diff --git a/packages/base/any/kernels/modules/accton_i2c_cpld.c b/packages/platforms/accton/x86-64/modules/builds/accton_i2c_cpld.c similarity index 100% rename from packages/base/any/kernels/modules/accton_i2c_cpld.c rename to packages/platforms/accton/x86-64/modules/builds/accton_i2c_cpld.c diff --git a/packages/platforms/accton/x86-64/x86-64-accton-as5512-54x/modules/PKG.yml b/packages/platforms/accton/x86-64/x86-64-accton-as5512-54x/modules/PKG.yml index 5f84b1ad..b9e45cfc 100644 --- a/packages/platforms/accton/x86-64/x86-64-accton-as5512-54x/modules/PKG.yml +++ b/packages/platforms/accton/x86-64/x86-64-accton-as5512-54x/modules/PKG.yml @@ -1 +1 @@ -!include $ONL_TEMPLATES/platform-modules.yml PLATFORM=x86-64-accton-as5512-54x ARCH=amd64 KERNELS="onl-kernel-3.16-lts-x86-64-all:amd64" +!include $ONL_TEMPLATES/platform-modules.yml VENDOR=accton BASENAME=x86-64-accton-as5512-54x ARCH=amd64 KERNELS="onl-kernel-3.16-lts-x86-64-all:amd64" diff --git a/packages/platforms/accton/x86-64/x86-64-accton-as5512-54x/modules/builds/Makefile b/packages/platforms/accton/x86-64/x86-64-accton-as5512-54x/modules/builds/Makefile index fd78b4d0..ab98e348 100644 --- a/packages/platforms/accton/x86-64/x86-64-accton-as5512-54x/modules/builds/Makefile +++ b/packages/platforms/accton/x86-64/x86-64-accton-as5512-54x/modules/builds/Makefile @@ -1,5 +1,6 @@ -KERNELS := onl-kernel-3.16-lts-x86-64-all:amd64 onl-kernel-3.2-deb7-x86-64-all:amd64 +KERNELS := onl-kernel-3.16-lts-x86-64-all:amd64 KMODULES := $(wildcard *.c) -PLATFORM := x86-64-accton-as5512-54x +VENDOR := accton +BASENAME := x86-64-accton-as5512-54x ARCH := x86_64 include $(ONL)/make/kmodule.mk diff --git a/packages/platforms/accton/x86-64/x86-64-accton-as5512-54x/onlp/builds/src/module/src/thermali.c b/packages/platforms/accton/x86-64/x86-64-accton-as5512-54x/onlp/builds/src/module/src/thermali.c index 63345a7b..59f78cb8 100644 --- a/packages/platforms/accton/x86-64/x86-64-accton-as5512-54x/onlp/builds/src/module/src/thermali.c +++ b/packages/platforms/accton/x86-64/x86-64-accton-as5512-54x/onlp/builds/src/module/src/thermali.c @@ -29,10 +29,6 @@ #include #include -#define prefix_path "/sys/bus/i2c/devices/" -#define filename "temp1_input" -#define LOCAL_DEBUG 0 - #define VALIDATE(_id) \ do { \ if(!ONLP_OID_IS_THERMAL(_id)) { \ @@ -41,20 +37,6 @@ } while(0) -#define OPEN_READ_FILE(fd,fullpath,data,nbytes,len) \ - if (LOCAL_DEBUG) \ - printf("[Debug][%s][%d][openfile: %s]\n", __FUNCTION__, __LINE__, fullpath); \ - if ((fd = open(fullpath, O_RDONLY)) == -1) \ - return ONLP_STATUS_E_INTERNAL; \ - if ((len = read(fd, r_data, nbytes)) <= 0){ \ - close(fd); \ - return ONLP_STATUS_E_INTERNAL;} \ - if (LOCAL_DEBUG) \ - printf("[Debug][%s][%d][read data: %s]\n", __FUNCTION__, __LINE__, r_data); \ - if (close(fd) == -1) \ - return ONLP_STATUS_E_INTERNAL - - enum onlp_thermal_id { THERMAL_RESERVED = 0, @@ -66,23 +48,23 @@ enum onlp_thermal_id THERMAL_1_ON_PSU2, }; -static char* last_path[] = /* must map with onlp_thermal_id */ +static char* devfiles__[] = /* must map with onlp_thermal_id */ { "reserved", NULL, /* CPU_CORE files */ - "63-0048/", - "64-0049/", - "65-004a/", - "59-003c/psu_", - "60-003f/psu_", + "/sys/bus/i2c/devices/63-0048*temp1_input", + "/sys/bus/i2c/devices/64-0049*temp1_input", + "/sys/bus/i2c/devices/65-004a*temp1_input", + "/sys/bus/i2c/devices/59-003c*psu_temp1_input", + "/sys/bus/i2c/devices/60-003f*psu_temp1_input", }; static char* cpu_coretemp_files[] = { - "/sys/devices/platform/coretemp.0/temp2_input", - "/sys/devices/platform/coretemp.0/temp3_input", - "/sys/devices/platform/coretemp.0/temp4_input", - "/sys/devices/platform/coretemp.0/temp5_input", + "/sys/devices/platform/coretemp.0*temp2_input", + "/sys/devices/platform/coretemp.0*temp3_input", + "/sys/devices/platform/coretemp.0*temp4_input", + "/sys/devices/platform/coretemp.0*temp5_input", NULL, }; @@ -141,16 +123,11 @@ onlp_thermali_init(void) int onlp_thermali_info_get(onlp_oid_t id, onlp_thermal_info_t* info) { - int fd, len, nbytes = 10, temp_base=1, local_id; - char r_data[10] = {0}; - char fullpath[50] = {0}; + int local_id; VALIDATE(id); local_id = ONLP_OID_ID_GET(id); - if (LOCAL_DEBUG) - printf("\n[Debug][%s][%d][local_id: %d]", __FUNCTION__, __LINE__, local_id); - /* Set the onlp_oid_hdr_t and capabilities */ *info = linfo[local_id]; @@ -158,18 +135,5 @@ onlp_thermali_info_get(onlp_oid_t id, onlp_thermal_info_t* info) int rv = onlp_file_read_int_max(&info->mcelsius, cpu_coretemp_files); return rv; } - - /* get fullpath */ - sprintf(fullpath, "%s%s%s", prefix_path, last_path[local_id], filename); - - OPEN_READ_FILE(fd,fullpath,r_data,nbytes,len); - - info->mcelsius = atoi(r_data)/temp_base; - - if (LOCAL_DEBUG) - printf("\n[Debug][%s][%d][save data: %d]\n", __FUNCTION__, __LINE__, info->mcelsius); - - return ONLP_STATUS_OK; + return onlp_file_read_int(&info->mcelsius, devfiles__[local_id]); } - - diff --git a/packages/platforms/accton/x86-64/x86-64-accton-as5512-54x/platform-config/r0/PKG.yml b/packages/platforms/accton/x86-64/x86-64-accton-as5512-54x/platform-config/r0/PKG.yml index 699ce795..865a2787 100644 --- a/packages/platforms/accton/x86-64/x86-64-accton-as5512-54x/platform-config/r0/PKG.yml +++ b/packages/platforms/accton/x86-64/x86-64-accton-as5512-54x/platform-config/r0/PKG.yml @@ -1 +1 @@ -!include $ONL_TEMPLATES/platform-config-with-modules.yml ARCH=amd64 VENDOR=accton PLATFORM=x86-64-accton-as5512-54x-r0 MODULES=onl-platform-modules-x86-64-accton-as5512-54x:amd64 +!include $ONL_TEMPLATES/platform-config-platform.yml ARCH=amd64 VENDOR=accton BASENAME=x86-64-accton-as5512-54x REVISION=r0 diff --git a/packages/platforms/accton/x86-64/x86-64-accton-as5512-54x/platform-config/r0/src/lib/x86-64-accton-as5512-54x-r0.yml b/packages/platforms/accton/x86-64/x86-64-accton-as5512-54x/platform-config/r0/src/lib/x86-64-accton-as5512-54x-r0.yml index d1eafdd2..fa460ed6 100644 --- a/packages/platforms/accton/x86-64/x86-64-accton-as5512-54x/platform-config/r0/src/lib/x86-64-accton-as5512-54x-r0.yml +++ b/packages/platforms/accton/x86-64/x86-64-accton-as5512-54x/platform-config/r0/src/lib/x86-64-accton-as5512-54x-r0.yml @@ -18,7 +18,7 @@ x86-64-accton-as5512-54x-r0: --stop=1 kernel: - <<: *kernel-3-2 + <<: *kernel-3-16 args: >- nopat diff --git a/packages/platforms/accton/x86-64/x86-64-accton-as5712-54x/modules/PKG.yml b/packages/platforms/accton/x86-64/x86-64-accton-as5712-54x/modules/PKG.yml index 50a0ba44..dbdb8aa2 100644 --- a/packages/platforms/accton/x86-64/x86-64-accton-as5712-54x/modules/PKG.yml +++ b/packages/platforms/accton/x86-64/x86-64-accton-as5712-54x/modules/PKG.yml @@ -1 +1 @@ -!include $ONL_TEMPLATES/platform-modules.yml PLATFORM=x86-64-accton-as5712-54x ARCH=amd64 KERNELS="onl-kernel-3.16-lts-x86-64-all:amd64" +!include $ONL_TEMPLATES/platform-modules.yml VENDOR=accton BASENAME=x86-64-accton-as5712-54x ARCH=amd64 KERNELS="onl-kernel-3.16-lts-x86-64-all:amd64" diff --git a/packages/platforms/accton/x86-64/x86-64-accton-as5712-54x/modules/builds/Makefile b/packages/platforms/accton/x86-64/x86-64-accton-as5712-54x/modules/builds/Makefile index 20ef0708..9121235f 100644 --- a/packages/platforms/accton/x86-64/x86-64-accton-as5712-54x/modules/builds/Makefile +++ b/packages/platforms/accton/x86-64/x86-64-accton-as5712-54x/modules/builds/Makefile @@ -1,5 +1,6 @@ -KERNELS := onl-kernel-3.16-lts-x86-64-all:amd64 onl-kernel-3.2-deb7-x86-64-all:amd64 +KERNELS := onl-kernel-3.16-lts-x86-64-all:amd64 KMODULES := $(wildcard *.c) -PLATFORM := x86-64-accton-as5712-54x +VENDOR := accton +BASENAME := x86-64-accton-as5712-54x ARCH := x86_64 include $(ONL)/make/kmodule.mk diff --git a/packages/platforms/accton/x86-64/x86-64-accton-as5712-54x/platform-config/r0/PKG.yml b/packages/platforms/accton/x86-64/x86-64-accton-as5712-54x/platform-config/r0/PKG.yml index f618c7cc..56a76299 100644 --- a/packages/platforms/accton/x86-64/x86-64-accton-as5712-54x/platform-config/r0/PKG.yml +++ b/packages/platforms/accton/x86-64/x86-64-accton-as5712-54x/platform-config/r0/PKG.yml @@ -1 +1 @@ -!include $ONL_TEMPLATES/platform-config-with-modules.yml ARCH=amd64 VENDOR=accton PLATFORM=x86-64-accton-as5712-54x-r0 MODULES=onl-platform-modules-x86-64-accton-as5712-54x:amd64 +!include $ONL_TEMPLATES/platform-config-platform.yml ARCH=amd64 VENDOR=accton BASENAME=x86-64-accton-as5712-54x REVISION=r0 diff --git a/packages/platforms/accton/x86-64/x86-64-accton-as5712-54x/platform-config/r0/src/lib/x86-64-accton-as5712-54x-r0.yml b/packages/platforms/accton/x86-64/x86-64-accton-as5712-54x/platform-config/r0/src/lib/x86-64-accton-as5712-54x-r0.yml index fa4eea34..e03fe786 100644 --- a/packages/platforms/accton/x86-64/x86-64-accton-as5712-54x/platform-config/r0/src/lib/x86-64-accton-as5712-54x-r0.yml +++ b/packages/platforms/accton/x86-64/x86-64-accton-as5712-54x/platform-config/r0/src/lib/x86-64-accton-as5712-54x-r0.yml @@ -18,7 +18,7 @@ x86-64-accton-as5712-54x-r0: --stop=1 kernel: - <<: *kernel-3-2 + <<: *kernel-3-16 args: >- nopat diff --git a/packages/platforms/accton/x86-64/x86-64-accton-as5812-54t/modules/PKG.yml b/packages/platforms/accton/x86-64/x86-64-accton-as5812-54t/modules/PKG.yml index 7701094b..20610434 100644 --- a/packages/platforms/accton/x86-64/x86-64-accton-as5812-54t/modules/PKG.yml +++ b/packages/platforms/accton/x86-64/x86-64-accton-as5812-54t/modules/PKG.yml @@ -1 +1 @@ -!include $ONL_TEMPLATES/platform-modules.yml PLATFORM=x86-64-accton-as5812-54t ARCH=amd64 KERNELS="onl-kernel-3.16-lts-x86-64-all:amd64" +!include $ONL_TEMPLATES/platform-modules.yml VENDOR=accton BASENAME=x86-64-accton-as5812-54t ARCH=amd64 KERNELS="onl-kernel-3.16-lts-x86-64-all:amd64" diff --git a/packages/platforms/accton/x86-64/x86-64-accton-as5812-54t/modules/builds/Makefile b/packages/platforms/accton/x86-64/x86-64-accton-as5812-54t/modules/builds/Makefile index 5385dc37..69f822bb 100644 --- a/packages/platforms/accton/x86-64/x86-64-accton-as5812-54t/modules/builds/Makefile +++ b/packages/platforms/accton/x86-64/x86-64-accton-as5812-54t/modules/builds/Makefile @@ -1,5 +1,6 @@ -KERNELS := onl-kernel-3.16-lts-x86-64-all:amd64 onl-kernel-3.2-deb7-x86-64-all:amd64 +KERNELS := onl-kernel-3.16-lts-x86-64-all:amd64 KMODULES := $(wildcard *.c) -PLATFORM := x86-64-accton-as5812-54t +VENDOR := accton +BASENAME := x86-64-accton-as5812-54t ARCH := x86_64 include $(ONL)/make/kmodule.mk diff --git a/packages/platforms/accton/x86-64/x86-64-accton-as5812-54t/platform-config/r0/PKG.yml b/packages/platforms/accton/x86-64/x86-64-accton-as5812-54t/platform-config/r0/PKG.yml index 9af5bae9..7a26dae9 100644 --- a/packages/platforms/accton/x86-64/x86-64-accton-as5812-54t/platform-config/r0/PKG.yml +++ b/packages/platforms/accton/x86-64/x86-64-accton-as5812-54t/platform-config/r0/PKG.yml @@ -1 +1 @@ -!include $ONL_TEMPLATES/platform-config-with-modules.yml ARCH=amd64 VENDOR=accton PLATFORM=x86-64-accton-as5812-54t-r0 MODULES=onl-platform-modules-x86-64-accton-as5812-54t:amd64 +!include $ONL_TEMPLATES/platform-config-platform.yml ARCH=amd64 VENDOR=accton BASENAME=x86-64-accton-as5812-54t REVISION=r0 diff --git a/packages/platforms/accton/x86-64/x86-64-accton-as5812-54t/platform-config/r0/src/lib/x86-64-accton-as5812-54t-r0.yml b/packages/platforms/accton/x86-64/x86-64-accton-as5812-54t/platform-config/r0/src/lib/x86-64-accton-as5812-54t-r0.yml index 0741e829..62190b5a 100644 --- a/packages/platforms/accton/x86-64/x86-64-accton-as5812-54t/platform-config/r0/src/lib/x86-64-accton-as5812-54t-r0.yml +++ b/packages/platforms/accton/x86-64/x86-64-accton-as5812-54t/platform-config/r0/src/lib/x86-64-accton-as5812-54t-r0.yml @@ -18,7 +18,7 @@ x86-64-accton-as5812-54t-r0: --stop=1 kernel: - <<: *kernel-3-2 + <<: *kernel-3-16 args: >- nopat diff --git a/packages/platforms/accton/x86-64/x86-64-accton-as5812-54x/modules/PKG.yml b/packages/platforms/accton/x86-64/x86-64-accton-as5812-54x/modules/PKG.yml index dbd3f513..58309864 100644 --- a/packages/platforms/accton/x86-64/x86-64-accton-as5812-54x/modules/PKG.yml +++ b/packages/platforms/accton/x86-64/x86-64-accton-as5812-54x/modules/PKG.yml @@ -1 +1 @@ -!include $ONL_TEMPLATES/platform-modules.yml PLATFORM=x86-64-accton-as5812-54x ARCH=amd64 KERNELS="onl-kernel-3.16-lts-x86-64-all:amd64" +!include $ONL_TEMPLATES/platform-modules.yml VENDOR=accton BASENAME=x86-64-accton-as5812-54x ARCH=amd64 KERNELS="onl-kernel-3.16-lts-x86-64-all:amd64" diff --git a/packages/platforms/accton/x86-64/x86-64-accton-as5812-54x/modules/builds/Makefile b/packages/platforms/accton/x86-64/x86-64-accton-as5812-54x/modules/builds/Makefile index af7d8095..2eeb1b64 100644 --- a/packages/platforms/accton/x86-64/x86-64-accton-as5812-54x/modules/builds/Makefile +++ b/packages/platforms/accton/x86-64/x86-64-accton-as5812-54x/modules/builds/Makefile @@ -1,5 +1,6 @@ -KERNELS := onl-kernel-3.16-lts-x86-64-all:amd64 onl-kernel-3.2-deb7-x86-64-all:amd64 +KERNELS := onl-kernel-3.16-lts-x86-64-all:amd64 KMODULES := $(wildcard *.c) -PLATFORM := x86-64-accton-as5812-54x +VENDOR := accton +BASENAME := x86-64-accton-as5812-54x ARCH := x86_64 include $(ONL)/make/kmodule.mk diff --git a/packages/platforms/accton/x86-64/x86-64-accton-as5812-54x/platform-config/r0/PKG.yml b/packages/platforms/accton/x86-64/x86-64-accton-as5812-54x/platform-config/r0/PKG.yml index 6af12173..bdadbf77 100644 --- a/packages/platforms/accton/x86-64/x86-64-accton-as5812-54x/platform-config/r0/PKG.yml +++ b/packages/platforms/accton/x86-64/x86-64-accton-as5812-54x/platform-config/r0/PKG.yml @@ -1 +1 @@ -!include $ONL_TEMPLATES/platform-config-with-modules.yml ARCH=amd64 VENDOR=accton PLATFORM=x86-64-accton-as5812-54x-r0 MODULES=onl-platform-modules-x86-64-accton-as5812-54x:amd64 +!include $ONL_TEMPLATES/platform-config-platform.yml ARCH=amd64 VENDOR=accton BASENAME=x86-64-accton-as5812-54x REVISION=r0 diff --git a/packages/platforms/accton/x86-64/x86-64-accton-as5812-54x/platform-config/r0/src/lib/x86-64-accton-as5812-54x-r0.yml b/packages/platforms/accton/x86-64/x86-64-accton-as5812-54x/platform-config/r0/src/lib/x86-64-accton-as5812-54x-r0.yml index d0f26744..014340dc 100644 --- a/packages/platforms/accton/x86-64/x86-64-accton-as5812-54x/platform-config/r0/src/lib/x86-64-accton-as5812-54x-r0.yml +++ b/packages/platforms/accton/x86-64/x86-64-accton-as5812-54x/platform-config/r0/src/lib/x86-64-accton-as5812-54x-r0.yml @@ -18,7 +18,7 @@ x86-64-accton-as5812-54x-r0: --stop=1 kernel: - <<: *kernel-3-2 + <<: *kernel-3-16 args: >- nopat diff --git a/packages/platforms/accton/x86-64/x86-64-accton-as6712-32x/modules/PKG.yml b/packages/platforms/accton/x86-64/x86-64-accton-as6712-32x/modules/PKG.yml index 7b9a60c4..c63b5ecc 100644 --- a/packages/platforms/accton/x86-64/x86-64-accton-as6712-32x/modules/PKG.yml +++ b/packages/platforms/accton/x86-64/x86-64-accton-as6712-32x/modules/PKG.yml @@ -1 +1 @@ -!include $ONL_TEMPLATES/platform-modules.yml PLATFORM=x86-64-accton-as6712-32x ARCH=amd64 KERNELS="onl-kernel-3.16-lts-x86-64-all:amd64" +!include $ONL_TEMPLATES/platform-modules.yml VENDOR=accton BASENAME=x86-64-accton-as6712-32x ARCH=amd64 KERNELS="onl-kernel-3.16-lts-x86-64-all:amd64" diff --git a/packages/platforms/accton/x86-64/x86-64-accton-as6712-32x/modules/builds/Makefile b/packages/platforms/accton/x86-64/x86-64-accton-as6712-32x/modules/builds/Makefile index b1af96e3..4e11c5c1 100644 --- a/packages/platforms/accton/x86-64/x86-64-accton-as6712-32x/modules/builds/Makefile +++ b/packages/platforms/accton/x86-64/x86-64-accton-as6712-32x/modules/builds/Makefile @@ -1,5 +1,6 @@ -KERNELS := onl-kernel-3.16-lts-x86-64-all:amd64 onl-kernel-3.2-deb7-x86-64-all:amd64 +KERNELS := onl-kernel-3.16-lts-x86-64-all:amd64 KMODULES := $(wildcard *.c) -PLATFORM := x86-64-accton-as6712-32x +VENDOR := accton +BASENAME := x86-64-accton-as6712-32x ARCH := x86_64 include $(ONL)/make/kmodule.mk diff --git a/packages/platforms/accton/x86-64/x86-64-accton-as6712-32x/platform-config/r0/PKG.yml b/packages/platforms/accton/x86-64/x86-64-accton-as6712-32x/platform-config/r0/PKG.yml index cfd24152..e19c41ae 100644 --- a/packages/platforms/accton/x86-64/x86-64-accton-as6712-32x/platform-config/r0/PKG.yml +++ b/packages/platforms/accton/x86-64/x86-64-accton-as6712-32x/platform-config/r0/PKG.yml @@ -1 +1 @@ -!include $ONL_TEMPLATES/platform-config-with-modules.yml ARCH=amd64 VENDOR=accton PLATFORM=x86-64-accton-as6712-32x-r0 MODULES=onl-platform-modules-x86-64-accton-as6712-32x:amd64 +!include $ONL_TEMPLATES/platform-config-platform.yml ARCH=amd64 VENDOR=accton BASENAME=x86-64-accton-as6712-32x REVISION=r0 diff --git a/packages/platforms/accton/x86-64/x86-64-accton-as6712-32x/platform-config/r0/src/lib/x86-64-accton-as6712-32x-r0.yml b/packages/platforms/accton/x86-64/x86-64-accton-as6712-32x/platform-config/r0/src/lib/x86-64-accton-as6712-32x-r0.yml index beb9db4c..f685f030 100644 --- a/packages/platforms/accton/x86-64/x86-64-accton-as6712-32x/platform-config/r0/src/lib/x86-64-accton-as6712-32x-r0.yml +++ b/packages/platforms/accton/x86-64/x86-64-accton-as6712-32x/platform-config/r0/src/lib/x86-64-accton-as6712-32x-r0.yml @@ -18,7 +18,7 @@ x86-64-accton-as6712-32x-r0: --stop=1 kernel: - <<: *kernel-3-2 + <<: *kernel-3-16 args: >- nopat diff --git a/packages/platforms/accton/x86-64/x86-64-accton-as6812-32x/modules/PKG.yml b/packages/platforms/accton/x86-64/x86-64-accton-as6812-32x/modules/PKG.yml index 44e45136..a8b89955 100644 --- a/packages/platforms/accton/x86-64/x86-64-accton-as6812-32x/modules/PKG.yml +++ b/packages/platforms/accton/x86-64/x86-64-accton-as6812-32x/modules/PKG.yml @@ -1 +1 @@ -!include $ONL_TEMPLATES/platform-modules.yml PLATFORM=x86-64-accton-as6812-32x ARCH=amd64 KERNELS="onl-kernel-3.16-lts-x86-64-all:amd64" +!include $ONL_TEMPLATES/platform-modules.yml VENDOR=accton BASENAME=x86-64-accton-as6812-32x ARCH=amd64 KERNELS="onl-kernel-3.16-lts-x86-64-all:amd64" diff --git a/packages/platforms/accton/x86-64/x86-64-accton-as6812-32x/modules/builds/Makefile b/packages/platforms/accton/x86-64/x86-64-accton-as6812-32x/modules/builds/Makefile index 0ee5e509..b568f72b 100644 --- a/packages/platforms/accton/x86-64/x86-64-accton-as6812-32x/modules/builds/Makefile +++ b/packages/platforms/accton/x86-64/x86-64-accton-as6812-32x/modules/builds/Makefile @@ -1,5 +1,6 @@ -KERNELS := onl-kernel-3.16-lts-x86-64-all:amd64 onl-kernel-3.2-deb7-x86-64-all:amd64 +KERNELS := onl-kernel-3.16-lts-x86-64-all:amd64 KMODULES := $(wildcard *.c) -PLATFORM := x86-64-accton-as6812-32x +VENDOR := accton +BASENAME := x86-64-accton-as6812-32x ARCH := x86_64 include $(ONL)/make/kmodule.mk diff --git a/packages/platforms/accton/x86-64/x86-64-accton-as6812-32x/platform-config/r0/PKG.yml b/packages/platforms/accton/x86-64/x86-64-accton-as6812-32x/platform-config/r0/PKG.yml index 05ced785..aa12daca 100644 --- a/packages/platforms/accton/x86-64/x86-64-accton-as6812-32x/platform-config/r0/PKG.yml +++ b/packages/platforms/accton/x86-64/x86-64-accton-as6812-32x/platform-config/r0/PKG.yml @@ -1 +1 @@ -!include $ONL_TEMPLATES/platform-config-with-modules.yml ARCH=amd64 VENDOR=accton PLATFORM=x86-64-accton-as6812-32x-r0 MODULES=onl-platform-modules-x86-64-accton-as6812-32x:amd64 +!include $ONL_TEMPLATES/platform-config-platform.yml ARCH=amd64 VENDOR=accton BASENAME=x86-64-accton-as6812-32x REVISION=r0 diff --git a/packages/platforms/accton/x86-64/x86-64-accton-as6812-32x/platform-config/r0/src/lib/x86-64-accton-as6812-32x-r0.yml b/packages/platforms/accton/x86-64/x86-64-accton-as6812-32x/platform-config/r0/src/lib/x86-64-accton-as6812-32x-r0.yml index 97f6b35a..18dda3ba 100644 --- a/packages/platforms/accton/x86-64/x86-64-accton-as6812-32x/platform-config/r0/src/lib/x86-64-accton-as6812-32x-r0.yml +++ b/packages/platforms/accton/x86-64/x86-64-accton-as6812-32x/platform-config/r0/src/lib/x86-64-accton-as6812-32x-r0.yml @@ -18,7 +18,7 @@ x86-64-accton-as6812-32x-r0: --stop=1 kernel: - <<: *kernel-3-2 + <<: *kernel-3-16 args: >- nopat diff --git a/packages/platforms/accton/x86-64/x86-64-accton-as7512-32x/modules/PKG.yml b/packages/platforms/accton/x86-64/x86-64-accton-as7512-32x/modules/PKG.yml index 31a58650..e4c5e4ba 100644 --- a/packages/platforms/accton/x86-64/x86-64-accton-as7512-32x/modules/PKG.yml +++ b/packages/platforms/accton/x86-64/x86-64-accton-as7512-32x/modules/PKG.yml @@ -1 +1 @@ -!include $ONL_TEMPLATES/platform-modules.yml PLATFORM=x86-64-accton-as7512-32x ARCH=amd64 KERNELS="onl-kernel-3.16-lts-x86-64-all:amd64" +!include $ONL_TEMPLATES/platform-modules.yml VENDOR=accton BASENAME=x86-64-accton-as7512-32x ARCH=amd64 KERNELS="onl-kernel-3.16-lts-x86-64-all:amd64" diff --git a/packages/platforms/accton/x86-64/x86-64-accton-as7512-32x/modules/builds/Makefile b/packages/platforms/accton/x86-64/x86-64-accton-as7512-32x/modules/builds/Makefile index 81a91d58..f9eb9e0d 100644 --- a/packages/platforms/accton/x86-64/x86-64-accton-as7512-32x/modules/builds/Makefile +++ b/packages/platforms/accton/x86-64/x86-64-accton-as7512-32x/modules/builds/Makefile @@ -1,5 +1,6 @@ -KERNELS := onl-kernel-3.16-lts-x86-64-all:amd64 onl-kernel-3.2-deb7-x86-64-all:amd64 +KERNELS := onl-kernel-3.16-lts-x86-64-all:amd64 KMODULES := $(wildcard *.c) -PLATFORM := x86-64-accton-as7512-32x +VENDOR := accton +BASENAME := x86-64-accton-as7512-32x ARCH := x86_64 include $(ONL)/make/kmodule.mk diff --git a/packages/platforms/accton/x86-64/x86-64-accton-as7512-32x/platform-config/r0/PKG.yml b/packages/platforms/accton/x86-64/x86-64-accton-as7512-32x/platform-config/r0/PKG.yml index 300b6bcf..22a9954f 100644 --- a/packages/platforms/accton/x86-64/x86-64-accton-as7512-32x/platform-config/r0/PKG.yml +++ b/packages/platforms/accton/x86-64/x86-64-accton-as7512-32x/platform-config/r0/PKG.yml @@ -1 +1 @@ -!include $ONL_TEMPLATES/platform-config-with-modules.yml ARCH=amd64 VENDOR=accton PLATFORM=x86-64-accton-as7512-32x-r0 MODULES=onl-platform-modules-x86-64-accton-as7512-32x:amd64 +!include $ONL_TEMPLATES/platform-config-platform.yml ARCH=amd64 VENDOR=accton BASENAME=x86-64-accton-as7512-32x REVISION=r0 diff --git a/packages/platforms/accton/x86-64/x86-64-accton-as7512-32x/platform-config/r0/src/lib/x86-64-accton-as7512-32x-r0.yml b/packages/platforms/accton/x86-64/x86-64-accton-as7512-32x/platform-config/r0/src/lib/x86-64-accton-as7512-32x-r0.yml index 77b890a5..3709c572 100644 --- a/packages/platforms/accton/x86-64/x86-64-accton-as7512-32x/platform-config/r0/src/lib/x86-64-accton-as7512-32x-r0.yml +++ b/packages/platforms/accton/x86-64/x86-64-accton-as7512-32x/platform-config/r0/src/lib/x86-64-accton-as7512-32x-r0.yml @@ -18,7 +18,7 @@ x86-64-accton-as7512-32x-r0: --stop=1 kernel: - <<: *kernel-3-2 + <<: *kernel-3-16 args: >- nopat diff --git a/packages/platforms/accton/x86-64/x86-64-accton-as7712-32x/modules/PKG.yml b/packages/platforms/accton/x86-64/x86-64-accton-as7712-32x/modules/PKG.yml index 787399c5..7eee842f 100644 --- a/packages/platforms/accton/x86-64/x86-64-accton-as7712-32x/modules/PKG.yml +++ b/packages/platforms/accton/x86-64/x86-64-accton-as7712-32x/modules/PKG.yml @@ -1 +1 @@ -!include $ONL_TEMPLATES/platform-modules.yml PLATFORM=x86-64-accton-as7712-32x ARCH=amd64 KERNELS="onl-kernel-3.16-lts-x86-64-all:amd64" +!include $ONL_TEMPLATES/platform-modules.yml VENDOR=accton BASENAME=x86-64-accton-as7712-32x ARCH=amd64 KERNELS="onl-kernel-3.16-lts-x86-64-all:amd64" diff --git a/packages/platforms/accton/x86-64/x86-64-accton-as7712-32x/modules/builds/Makefile b/packages/platforms/accton/x86-64/x86-64-accton-as7712-32x/modules/builds/Makefile index 35af35dc..ed91aba4 100644 --- a/packages/platforms/accton/x86-64/x86-64-accton-as7712-32x/modules/builds/Makefile +++ b/packages/platforms/accton/x86-64/x86-64-accton-as7712-32x/modules/builds/Makefile @@ -1,5 +1,6 @@ -KERNELS := onl-kernel-3.16-lts-x86-64-all:amd64 onl-kernel-3.2-deb7-x86-64-all:amd64 +KERNELS := onl-kernel-3.16-lts-x86-64-all:amd64 KMODULES := $(wildcard *.c) -PLATFORM := x86-64-accton-as7712-32x +VENDOR := accton +BASENAME := x86-64-accton-as7712-32x ARCH := x86_64 include $(ONL)/make/kmodule.mk diff --git a/packages/platforms/accton/x86-64/x86-64-accton-as7712-32x/platform-config/r0/PKG.yml b/packages/platforms/accton/x86-64/x86-64-accton-as7712-32x/platform-config/r0/PKG.yml index 34ebf81e..411c0d6d 100644 --- a/packages/platforms/accton/x86-64/x86-64-accton-as7712-32x/platform-config/r0/PKG.yml +++ b/packages/platforms/accton/x86-64/x86-64-accton-as7712-32x/platform-config/r0/PKG.yml @@ -1 +1 @@ -!include $ONL_TEMPLATES/platform-config-with-modules.yml ARCH=amd64 VENDOR=accton PLATFORM=x86-64-accton-as7712-32x-r0 MODULES=onl-platform-modules-x86-64-accton-as7712-32x:amd64 +!include $ONL_TEMPLATES/platform-config-platform.yml ARCH=amd64 VENDOR=accton BASENAME=x86-64-accton-as7712-32x REVISION=r0 diff --git a/packages/platforms/accton/x86-64/x86-64-accton-as7712-32x/platform-config/r0/src/lib/x86-64-accton-as7712-32x-r0.yml b/packages/platforms/accton/x86-64/x86-64-accton-as7712-32x/platform-config/r0/src/lib/x86-64-accton-as7712-32x-r0.yml index 2352f103..1aef0594 100644 --- a/packages/platforms/accton/x86-64/x86-64-accton-as7712-32x/platform-config/r0/src/lib/x86-64-accton-as7712-32x-r0.yml +++ b/packages/platforms/accton/x86-64/x86-64-accton-as7712-32x/platform-config/r0/src/lib/x86-64-accton-as7712-32x-r0.yml @@ -18,7 +18,7 @@ x86-64-accton-as7712-32x-r0: --stop=1 kernel: - <<: *kernel-3-2 + <<: *kernel-3-16 args: >- nopat diff --git a/packages/platforms/accton/x86-64/x86-64-accton-as7716-32x/modules/PKG.yml b/packages/platforms/accton/x86-64/x86-64-accton-as7716-32x/modules/PKG.yml index b28c8b94..01313655 100644 --- a/packages/platforms/accton/x86-64/x86-64-accton-as7716-32x/modules/PKG.yml +++ b/packages/platforms/accton/x86-64/x86-64-accton-as7716-32x/modules/PKG.yml @@ -1 +1 @@ -!include $ONL_TEMPLATES/platform-modules.yml PLATFORM=x86-64-accton-as7716-32x ARCH=amd64 KERNELS="onl-kernel-3.16-lts-x86-64-all:amd64" +!include $ONL_TEMPLATES/platform-modules.yml VENDOR=accton BASENAME=x86-64-accton-as7716-32x ARCH=amd64 KERNELS="onl-kernel-3.16-lts-x86-64-all:amd64" diff --git a/packages/platforms/accton/x86-64/x86-64-accton-as7716-32x/modules/builds/Makefile b/packages/platforms/accton/x86-64/x86-64-accton-as7716-32x/modules/builds/Makefile index c618e942..ef4b3f5c 100644 --- a/packages/platforms/accton/x86-64/x86-64-accton-as7716-32x/modules/builds/Makefile +++ b/packages/platforms/accton/x86-64/x86-64-accton-as7716-32x/modules/builds/Makefile @@ -1,5 +1,6 @@ -KERNELS := onl-kernel-3.16-lts-x86-64-all:amd64 onl-kernel-3.2-deb7-x86-64-all:amd64 +KERNELS := onl-kernel-3.16-lts-x86-64-all:amd64 KMODULES := $(wildcard *.c) -PLATFORM := x86-64-accton-as7716-32x +VENDOR := accton +BASENAME := x86-64-accton-as7716-32x ARCH := x86_64 include $(ONL)/make/kmodule.mk diff --git a/packages/platforms/accton/x86-64/x86-64-accton-as7716-32x/onlp/builds/src/module/src/thermali.c b/packages/platforms/accton/x86-64/x86-64-accton-as7716-32x/onlp/builds/src/module/src/thermali.c index c3daba65..479c5722 100644 --- a/packages/platforms/accton/x86-64/x86-64-accton-as7716-32x/onlp/builds/src/module/src/thermali.c +++ b/packages/platforms/accton/x86-64/x86-64-accton-as7716-32x/onlp/builds/src/module/src/thermali.c @@ -28,8 +28,8 @@ #include #include #include "platform_lib.h" +#include -#define prefix_path "/sys/bus/i2c/devices/" #define VALIDATE(_id) \ do { \ @@ -38,17 +38,6 @@ } \ } while(0) -#define OPEN_READ_FILE(fd,fullpath,data,nbytes,len) \ - DEBUG_PRINT("[Debug][%s][%d][openfile: %s]\n", __FUNCTION__, __LINE__, fullpath); \ - if ((fd = open(fullpath, O_RDONLY)) == -1) \ - return ONLP_STATUS_E_INTERNAL; \ - if ((len = read(fd, r_data, nbytes)) <= 0){ \ - close(fd); \ - return ONLP_STATUS_E_INTERNAL;} \ - DEBUG_PRINT("[Debug][%s][%d][read data: %s]\n", __FUNCTION__, __LINE__, r_data); \ - if (close(fd) == -1) \ - return ONLP_STATUS_E_INTERNAL - enum onlp_thermal_id { THERMAL_RESERVED = 0, @@ -59,14 +48,14 @@ enum onlp_thermal_id THERMAL_1_ON_PSU2, }; -static char last_path[][30] = /* must map with onlp_thermal_id */ +static char* devfiles__[] = /* must map with onlp_thermal_id */ { "reserved", - "10-0048/temp1_input", - "10-0049/temp1_input", - "10-004a/temp1_input", - "18-005b/psu_temp1_input", - "17-0058/psu_temp1_input", + "/sys/bus/i2c/devices/10-0048*temp1_input", + "/sys/bus/i2c/devices/10-0049*temp1_input", + "/sys/bus/i2c/devices/10-004a*temp1_input", + "/sys/bus/i2c/devices/18-005b*psu_temp1_input", + "/sys/bus/i2c/devices/17-0058*psu_temp1_input", }; /* Static values */ @@ -116,24 +105,10 @@ onlp_thermali_init(void) int onlp_thermali_info_get(onlp_oid_t id, onlp_thermal_info_t* info) { - int fd, len, nbytes = 10, temp_base=1, local_id; - char r_data[10] = {0}; - char fullpath[50] = {0}; + int local_id; VALIDATE(id); - local_id = ONLP_OID_ID_GET(id); - DEBUG_PRINT("\n[Debug][%s][%d][local_id: %d]", __FUNCTION__, __LINE__, local_id); - - /* get fullpath */ - sprintf(fullpath, "%s%s", prefix_path, last_path[local_id]); - /* Set the onlp_oid_hdr_t and capabilities */ *info = linfo[local_id]; - - OPEN_READ_FILE(fd, fullpath, r_data, nbytes, len); - info->mcelsius = atoi(r_data) / temp_base; - DEBUG_PRINT("\n[Debug][%s][%d][save data: %d]\n", __FUNCTION__, __LINE__, info->mcelsius); - - return ONLP_STATUS_OK; + return onlp_file_read_int(&info->mcelsius, devfiles__[local_id]); } - diff --git a/packages/platforms/accton/x86-64/x86-64-accton-as7716-32x/platform-config/r0/PKG.yml b/packages/platforms/accton/x86-64/x86-64-accton-as7716-32x/platform-config/r0/PKG.yml index 5273bfdd..0b3e23e1 100644 --- a/packages/platforms/accton/x86-64/x86-64-accton-as7716-32x/platform-config/r0/PKG.yml +++ b/packages/platforms/accton/x86-64/x86-64-accton-as7716-32x/platform-config/r0/PKG.yml @@ -1 +1 @@ -!include $ONL_TEMPLATES/platform-config-with-modules.yml ARCH=amd64 VENDOR=accton PLATFORM=x86-64-accton-as7716-32x-r0 MODULES=onl-platform-modules-x86-64-accton-as7716-32x:amd64 +!include $ONL_TEMPLATES/platform-config-platform.yml ARCH=amd64 VENDOR=accton BASENAME=x86-64-accton-as7716-32x REVISION=r0 diff --git a/packages/platforms/accton/x86-64/x86-64-accton-as7716-32x/platform-config/r0/src/lib/x86-64-accton-as7716-32x-r0.yml b/packages/platforms/accton/x86-64/x86-64-accton-as7716-32x/platform-config/r0/src/lib/x86-64-accton-as7716-32x-r0.yml index 691b33b1..d24eeb9d 100644 --- a/packages/platforms/accton/x86-64/x86-64-accton-as7716-32x/platform-config/r0/src/lib/x86-64-accton-as7716-32x-r0.yml +++ b/packages/platforms/accton/x86-64/x86-64-accton-as7716-32x/platform-config/r0/src/lib/x86-64-accton-as7716-32x-r0.yml @@ -18,7 +18,7 @@ x86-64-accton-as7716-32x-r0: --stop=1 kernel: - <<: *kernel-3-2 + <<: *kernel-3-16 args: >- nopat diff --git a/packages/platforms/accton/x86-64/x86-64-accton-wedge-16x/modules/Makefile b/packages/platforms/accton/x86-64/x86-64-accton-wedge-16x/modules/Makefile new file mode 100644 index 00000000..003238cf --- /dev/null +++ b/packages/platforms/accton/x86-64/x86-64-accton-wedge-16x/modules/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/packages/platforms/accton/x86-64/x86-64-accton-wedge-16x/modules/PKG.yml b/packages/platforms/accton/x86-64/x86-64-accton-wedge-16x/modules/PKG.yml new file mode 100644 index 00000000..2a52ad70 --- /dev/null +++ b/packages/platforms/accton/x86-64/x86-64-accton-wedge-16x/modules/PKG.yml @@ -0,0 +1 @@ +!include $ONL_TEMPLATES/no-platform-modules.yml ARCH=amd64 VENDOR=accton BASENAME=x86-64-accton-wedge-16x diff --git a/packages/platforms/accton/x86-64/x86-64-accton-wedge-16x/platform-config/r0/PKG.yml b/packages/platforms/accton/x86-64/x86-64-accton-wedge-16x/platform-config/r0/PKG.yml index 92e3414c..12e8d58e 100644 --- a/packages/platforms/accton/x86-64/x86-64-accton-wedge-16x/platform-config/r0/PKG.yml +++ b/packages/platforms/accton/x86-64/x86-64-accton-wedge-16x/platform-config/r0/PKG.yml @@ -1 +1 @@ -!include $ONL_TEMPLATES/platform-config-platform.yml ARCH=amd64 VENDOR=accton PLATFORM=x86-64-accton-wedge-16x-r0 +!include $ONL_TEMPLATES/platform-config-platform.yml ARCH=amd64 VENDOR=accton BASENAME=x86-64-accton-wedge-16x REVISION=r0 diff --git a/packages/platforms/accton/x86-64/x86-64-facebook-wedge100/modules/Makefile b/packages/platforms/accton/x86-64/x86-64-facebook-wedge100/modules/Makefile new file mode 100644 index 00000000..003238cf --- /dev/null +++ b/packages/platforms/accton/x86-64/x86-64-facebook-wedge100/modules/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/packages/platforms/accton/x86-64/x86-64-facebook-wedge100/modules/PKG.yml b/packages/platforms/accton/x86-64/x86-64-facebook-wedge100/modules/PKG.yml new file mode 100644 index 00000000..23d06a48 --- /dev/null +++ b/packages/platforms/accton/x86-64/x86-64-facebook-wedge100/modules/PKG.yml @@ -0,0 +1 @@ +!include $ONL_TEMPLATES/no-platform-modules.yml ARCH=amd64 VENDOR=accton BASENAME=x86-64-facebook-wedge100 diff --git a/packages/platforms/accton/x86-64/x86-64-facebook-wedge100/platform-config/r0/PKG.yml b/packages/platforms/accton/x86-64/x86-64-facebook-wedge100/platform-config/r0/PKG.yml index 41ac0a89..390974cc 100644 --- a/packages/platforms/accton/x86-64/x86-64-facebook-wedge100/platform-config/r0/PKG.yml +++ b/packages/platforms/accton/x86-64/x86-64-facebook-wedge100/platform-config/r0/PKG.yml @@ -1 +1 @@ -!include $ONL_TEMPLATES/platform-config-platform.yml ARCH=amd64 VENDOR=accton PLATFORM=x86-64-facebook-wedge100-r0 +!include $ONL_TEMPLATES/platform-config-platform.yml ARCH=amd64 VENDOR=accton BASENAME=x86-64-facebook-wedge100 REVISION=r0 diff --git a/packages/platforms/agema/x86-64/modules/Makefile b/packages/platforms/agema/x86-64/modules/Makefile new file mode 100644 index 00000000..003238cf --- /dev/null +++ b/packages/platforms/agema/x86-64/modules/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/packages/platforms/agema/x86-64/modules/PKG.yml b/packages/platforms/agema/x86-64/modules/PKG.yml new file mode 100644 index 00000000..ad26ac70 --- /dev/null +++ b/packages/platforms/agema/x86-64/modules/PKG.yml @@ -0,0 +1 @@ +!include $ONL_TEMPLATES/no-arch-vendor-modules.yml ARCH=amd64 VENDOR=agema diff --git a/packages/platforms/agema/x86-64/x86-64-agema-agc7648/modules/Makefile b/packages/platforms/agema/x86-64/x86-64-agema-agc7648/modules/Makefile new file mode 100644 index 00000000..003238cf --- /dev/null +++ b/packages/platforms/agema/x86-64/x86-64-agema-agc7648/modules/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/packages/platforms/agema/x86-64/x86-64-agema-agc7648/modules/PKG.yml b/packages/platforms/agema/x86-64/x86-64-agema-agc7648/modules/PKG.yml new file mode 100644 index 00000000..d7c44326 --- /dev/null +++ b/packages/platforms/agema/x86-64/x86-64-agema-agc7648/modules/PKG.yml @@ -0,0 +1 @@ +!include $ONL_TEMPLATES/no-platform-modules.yml ARCH=amd64 VENDOR=agema BASENAME=x86-64-agema-agc7648 diff --git a/packages/platforms/agema/x86-64/x86-64-agema-agc7648/onlp/PKG.yml b/packages/platforms/agema/x86-64/x86-64-agema-agc7648/onlp/PKG.yml index 0d5a8293..f830023e 100644 --- a/packages/platforms/agema/x86-64/x86-64-agema-agc7648/onlp/PKG.yml +++ b/packages/platforms/agema/x86-64/x86-64-agema-agc7648/onlp/PKG.yml @@ -1,5 +1,5 @@ variables: - platform: x86-64-agc7648-r0 + platform: x86-64-agema-agc7648-r0 install: /lib/platform-config/${platform}/onl common: diff --git a/packages/platforms/agema/x86-64/x86-64-agema-agc7648/platform-config/r0/PKG.yml b/packages/platforms/agema/x86-64/x86-64-agema-agc7648/platform-config/r0/PKG.yml index e1d73496..d19daa73 100644 --- a/packages/platforms/agema/x86-64/x86-64-agema-agc7648/platform-config/r0/PKG.yml +++ b/packages/platforms/agema/x86-64/x86-64-agema-agc7648/platform-config/r0/PKG.yml @@ -1 +1 @@ -!include $ONL_TEMPLATES/platform-config-platform.yml ARCH=amd64 VENDOR=agema PLATFORM=x86-64-agc7648-r0 +!include $ONL_TEMPLATES/platform-config-platform.yml ARCH=amd64 VENDOR=agema BASENAME=x86-64-agema-agc7648 REVISION=r0 diff --git a/packages/platforms/agema/x86-64/x86-64-agema-agc7648/platform-config/r0/src/lib/x86-64-agc7648-r0.yml b/packages/platforms/agema/x86-64/x86-64-agema-agc7648/platform-config/r0/src/lib/x86-64-agema-agc7648-r0.yml similarity index 81% rename from packages/platforms/agema/x86-64/x86-64-agema-agc7648/platform-config/r0/src/lib/x86-64-agc7648-r0.yml rename to packages/platforms/agema/x86-64/x86-64-agema-agc7648/platform-config/r0/src/lib/x86-64-agema-agc7648-r0.yml index 79300f3f..eb89136e 100644 --- a/packages/platforms/agema/x86-64/x86-64-agema-agc7648/platform-config/r0/src/lib/x86-64-agc7648-r0.yml +++ b/packages/platforms/agema/x86-64/x86-64-agema-agc7648/platform-config/r0/src/lib/x86-64-agema-agc7648-r0.yml @@ -2,12 +2,12 @@ ###################################################################### # -# platform-config for x86_64-agc7648-r0 +# platform-config for x86_64-agema-agc7648-r0 # # ###################################################################### -x86-64-agc7648-r0: +x86-64-agema-agc7648-r0: grub: @@ -18,8 +18,8 @@ x86-64-agc7648-r0: --parity=0 --stop=1 - kernel: - <<: *kernel-3-18 + kernel: + <<: *kernel-3-16 args: >- nopat diff --git a/packages/platforms/agema/x86-64/x86-64-agema-agc7648/platform-config/r0/src/python/x86_64_agc7648_r0/__init__.py b/packages/platforms/agema/x86-64/x86-64-agema-agc7648/platform-config/r0/src/python/x86_64_agema_agc7648_r0/__init__.py similarity index 59% rename from packages/platforms/agema/x86-64/x86-64-agema-agc7648/platform-config/r0/src/python/x86_64_agc7648_r0/__init__.py rename to packages/platforms/agema/x86-64/x86-64-agema-agc7648/platform-config/r0/src/python/x86_64_agema_agc7648_r0/__init__.py index 15e7d82b..a89e69d4 100644 --- a/packages/platforms/agema/x86-64/x86-64-agema-agc7648/platform-config/r0/src/python/x86_64_agc7648_r0/__init__.py +++ b/packages/platforms/agema/x86-64/x86-64-agema-agc7648/platform-config/r0/src/python/x86_64_agema_agc7648_r0/__init__.py @@ -2,7 +2,7 @@ from onl.platform.base import * from onl.platform.accton import * class OnlPlatform_x86_64_agc7648_r0(OnlPlatformAgema, - OnlPlatformPortConfig_48x10_6x40): + OnlPlatformPortConfig_48x10_6x40): MODEL="agc7648" - PLATFORM="x86-64-agc7648-r0" + PLATFORM="x86-64-agema-agc7648-r0" SYS_OBJECT_ID=".7648.1" diff --git a/packages/platforms/alphanetworks/Makefile b/packages/platforms/alphanetworks/Makefile new file mode 100644 index 00000000..003238cf --- /dev/null +++ b/packages/platforms/alphanetworks/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/packages/platforms/alphanetworks/x86-64-alphanetworks-snx60a0-486f/platform-config/r0/PKG.yml b/packages/platforms/alphanetworks/x86-64-alphanetworks-snx60a0-486f/platform-config/r0/PKG.yml deleted file mode 100644 index d3edd871..00000000 --- a/packages/platforms/alphanetworks/x86-64-alphanetworks-snx60a0-486f/platform-config/r0/PKG.yml +++ /dev/null @@ -1,3 +0,0 @@ -!include $ONL_TEMPLATES/platform-config-platform.yml ARCH=amd64 VENDOR=alphanetworks PLATFORM=x86-64-alphanetworks-snx60a0-486f-r0 - - diff --git a/packages/platforms/alphanetworks/x86-64/Makefile b/packages/platforms/alphanetworks/x86-64/Makefile new file mode 100644 index 00000000..003238cf --- /dev/null +++ b/packages/platforms/alphanetworks/x86-64/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/packages/platforms/alphanetworks/x86-64/modules/Makefile b/packages/platforms/alphanetworks/x86-64/modules/Makefile new file mode 100644 index 00000000..003238cf --- /dev/null +++ b/packages/platforms/alphanetworks/x86-64/modules/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/packages/platforms/alphanetworks/x86-64/modules/PKG.yml b/packages/platforms/alphanetworks/x86-64/modules/PKG.yml new file mode 100644 index 00000000..59847687 --- /dev/null +++ b/packages/platforms/alphanetworks/x86-64/modules/PKG.yml @@ -0,0 +1 @@ +!include $ONL_TEMPLATES/no-arch-vendor-modules.yml ARCH=amd64 VENDOR=alphanetworks diff --git a/packages/platforms/alphanetworks/x86-64-alphanetworks-snx60a0-486f/.gitignore b/packages/platforms/alphanetworks/x86-64/x86-64-alphanetworks-snx60a0-486f/.gitignore similarity index 100% rename from packages/platforms/alphanetworks/x86-64-alphanetworks-snx60a0-486f/.gitignore rename to packages/platforms/alphanetworks/x86-64/x86-64-alphanetworks-snx60a0-486f/.gitignore diff --git a/packages/platforms/alphanetworks/x86-64/x86-64-alphanetworks-snx60a0-486f/Makefile b/packages/platforms/alphanetworks/x86-64/x86-64-alphanetworks-snx60a0-486f/Makefile new file mode 100644 index 00000000..003238cf --- /dev/null +++ b/packages/platforms/alphanetworks/x86-64/x86-64-alphanetworks-snx60a0-486f/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/packages/platforms/alphanetworks/x86-64/x86-64-alphanetworks-snx60a0-486f/modules/Makefile b/packages/platforms/alphanetworks/x86-64/x86-64-alphanetworks-snx60a0-486f/modules/Makefile new file mode 100644 index 00000000..003238cf --- /dev/null +++ b/packages/platforms/alphanetworks/x86-64/x86-64-alphanetworks-snx60a0-486f/modules/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/packages/platforms/alphanetworks/x86-64/x86-64-alphanetworks-snx60a0-486f/modules/PKG.yml b/packages/platforms/alphanetworks/x86-64/x86-64-alphanetworks-snx60a0-486f/modules/PKG.yml new file mode 100644 index 00000000..8ca7da9c --- /dev/null +++ b/packages/platforms/alphanetworks/x86-64/x86-64-alphanetworks-snx60a0-486f/modules/PKG.yml @@ -0,0 +1 @@ +!include $ONL_TEMPLATES/no-platform-modules.yml ARCH=amd64 VENDOR=alphanetworks BASENAME=x86-64-alphanetworks-snx60a0-486f diff --git a/packages/platforms/alphanetworks/x86-64/x86-64-alphanetworks-snx60a0-486f/onlp/Makefile b/packages/platforms/alphanetworks/x86-64/x86-64-alphanetworks-snx60a0-486f/onlp/Makefile new file mode 100644 index 00000000..003238cf --- /dev/null +++ b/packages/platforms/alphanetworks/x86-64/x86-64-alphanetworks-snx60a0-486f/onlp/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/packages/platforms/alphanetworks/x86-64-alphanetworks-snx60a0-486f/onlp/PKG.yml b/packages/platforms/alphanetworks/x86-64/x86-64-alphanetworks-snx60a0-486f/onlp/PKG.yml similarity index 100% rename from packages/platforms/alphanetworks/x86-64-alphanetworks-snx60a0-486f/onlp/PKG.yml rename to packages/platforms/alphanetworks/x86-64/x86-64-alphanetworks-snx60a0-486f/onlp/PKG.yml diff --git a/packages/platforms/alphanetworks/x86-64-alphanetworks-snx60a0-486f/onlp/builds/Makefile b/packages/platforms/alphanetworks/x86-64/x86-64-alphanetworks-snx60a0-486f/onlp/builds/Makefile similarity index 100% rename from packages/platforms/alphanetworks/x86-64-alphanetworks-snx60a0-486f/onlp/builds/Makefile rename to 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b/packages/platforms/alphanetworks/x86-64/x86-64-alphanetworks-snx60a0-486f/onlp/builds/src/x86_64_alphanetworks_snx60a0_486f/module/src/make.mk similarity index 100% rename from packages/platforms/alphanetworks/x86-64-alphanetworks-snx60a0-486f/onlp/builds/src/x86_64_alphanetworks_snx60a0_486f/module/src/make.mk rename to packages/platforms/alphanetworks/x86-64/x86-64-alphanetworks-snx60a0-486f/onlp/builds/src/x86_64_alphanetworks_snx60a0_486f/module/src/make.mk diff --git a/packages/platforms/alphanetworks/x86-64-alphanetworks-snx60a0-486f/onlp/builds/src/x86_64_alphanetworks_snx60a0_486f/module/src/x86_64_alphanetworks_snx60a0_486f_config.c b/packages/platforms/alphanetworks/x86-64/x86-64-alphanetworks-snx60a0-486f/onlp/builds/src/x86_64_alphanetworks_snx60a0_486f/module/src/x86_64_alphanetworks_snx60a0_486f_config.c similarity index 100% rename from packages/platforms/alphanetworks/x86-64-alphanetworks-snx60a0-486f/onlp/builds/src/x86_64_alphanetworks_snx60a0_486f/module/src/x86_64_alphanetworks_snx60a0_486f_config.c rename to packages/platforms/alphanetworks/x86-64/x86-64-alphanetworks-snx60a0-486f/onlp/builds/src/x86_64_alphanetworks_snx60a0_486f/module/src/x86_64_alphanetworks_snx60a0_486f_config.c diff --git a/packages/platforms/alphanetworks/x86-64-alphanetworks-snx60a0-486f/onlp/builds/src/x86_64_alphanetworks_snx60a0_486f/module/src/x86_64_alphanetworks_snx60a0_486f_enums.c b/packages/platforms/alphanetworks/x86-64/x86-64-alphanetworks-snx60a0-486f/onlp/builds/src/x86_64_alphanetworks_snx60a0_486f/module/src/x86_64_alphanetworks_snx60a0_486f_enums.c similarity index 100% rename from packages/platforms/alphanetworks/x86-64-alphanetworks-snx60a0-486f/onlp/builds/src/x86_64_alphanetworks_snx60a0_486f/module/src/x86_64_alphanetworks_snx60a0_486f_enums.c rename to packages/platforms/alphanetworks/x86-64/x86-64-alphanetworks-snx60a0-486f/onlp/builds/src/x86_64_alphanetworks_snx60a0_486f/module/src/x86_64_alphanetworks_snx60a0_486f_enums.c diff --git a/packages/platforms/alphanetworks/x86-64-alphanetworks-snx60a0-486f/onlp/builds/src/x86_64_alphanetworks_snx60a0_486f/module/src/x86_64_alphanetworks_snx60a0_486f_int.h b/packages/platforms/alphanetworks/x86-64/x86-64-alphanetworks-snx60a0-486f/onlp/builds/src/x86_64_alphanetworks_snx60a0_486f/module/src/x86_64_alphanetworks_snx60a0_486f_int.h similarity index 100% rename from packages/platforms/alphanetworks/x86-64-alphanetworks-snx60a0-486f/onlp/builds/src/x86_64_alphanetworks_snx60a0_486f/module/src/x86_64_alphanetworks_snx60a0_486f_int.h rename to packages/platforms/alphanetworks/x86-64/x86-64-alphanetworks-snx60a0-486f/onlp/builds/src/x86_64_alphanetworks_snx60a0_486f/module/src/x86_64_alphanetworks_snx60a0_486f_int.h diff --git a/packages/platforms/alphanetworks/x86-64-alphanetworks-snx60a0-486f/onlp/builds/src/x86_64_alphanetworks_snx60a0_486f/module/src/x86_64_alphanetworks_snx60a0_486f_log.c b/packages/platforms/alphanetworks/x86-64/x86-64-alphanetworks-snx60a0-486f/onlp/builds/src/x86_64_alphanetworks_snx60a0_486f/module/src/x86_64_alphanetworks_snx60a0_486f_log.c similarity index 100% rename from packages/platforms/alphanetworks/x86-64-alphanetworks-snx60a0-486f/onlp/builds/src/x86_64_alphanetworks_snx60a0_486f/module/src/x86_64_alphanetworks_snx60a0_486f_log.c rename to packages/platforms/alphanetworks/x86-64/x86-64-alphanetworks-snx60a0-486f/onlp/builds/src/x86_64_alphanetworks_snx60a0_486f/module/src/x86_64_alphanetworks_snx60a0_486f_log.c diff --git a/packages/platforms/alphanetworks/x86-64-alphanetworks-snx60a0-486f/onlp/builds/src/x86_64_alphanetworks_snx60a0_486f/module/src/x86_64_alphanetworks_snx60a0_486f_log.h b/packages/platforms/alphanetworks/x86-64/x86-64-alphanetworks-snx60a0-486f/onlp/builds/src/x86_64_alphanetworks_snx60a0_486f/module/src/x86_64_alphanetworks_snx60a0_486f_log.h similarity index 100% rename from packages/platforms/alphanetworks/x86-64-alphanetworks-snx60a0-486f/onlp/builds/src/x86_64_alphanetworks_snx60a0_486f/module/src/x86_64_alphanetworks_snx60a0_486f_log.h rename to packages/platforms/alphanetworks/x86-64/x86-64-alphanetworks-snx60a0-486f/onlp/builds/src/x86_64_alphanetworks_snx60a0_486f/module/src/x86_64_alphanetworks_snx60a0_486f_log.h diff --git a/packages/platforms/alphanetworks/x86-64-alphanetworks-snx60a0-486f/onlp/builds/src/x86_64_alphanetworks_snx60a0_486f/module/src/x86_64_alphanetworks_snx60a0_486f_module.c b/packages/platforms/alphanetworks/x86-64/x86-64-alphanetworks-snx60a0-486f/onlp/builds/src/x86_64_alphanetworks_snx60a0_486f/module/src/x86_64_alphanetworks_snx60a0_486f_module.c similarity index 100% rename from packages/platforms/alphanetworks/x86-64-alphanetworks-snx60a0-486f/onlp/builds/src/x86_64_alphanetworks_snx60a0_486f/module/src/x86_64_alphanetworks_snx60a0_486f_module.c rename to packages/platforms/alphanetworks/x86-64/x86-64-alphanetworks-snx60a0-486f/onlp/builds/src/x86_64_alphanetworks_snx60a0_486f/module/src/x86_64_alphanetworks_snx60a0_486f_module.c diff --git a/packages/platforms/alphanetworks/x86-64-alphanetworks-snx60a0-486f/onlp/builds/src/x86_64_alphanetworks_snx60a0_486f/module/src/x86_64_alphanetworks_snx60a0_486f_ucli.c b/packages/platforms/alphanetworks/x86-64/x86-64-alphanetworks-snx60a0-486f/onlp/builds/src/x86_64_alphanetworks_snx60a0_486f/module/src/x86_64_alphanetworks_snx60a0_486f_ucli.c similarity index 100% rename from packages/platforms/alphanetworks/x86-64-alphanetworks-snx60a0-486f/onlp/builds/src/x86_64_alphanetworks_snx60a0_486f/module/src/x86_64_alphanetworks_snx60a0_486f_ucli.c rename to packages/platforms/alphanetworks/x86-64/x86-64-alphanetworks-snx60a0-486f/onlp/builds/src/x86_64_alphanetworks_snx60a0_486f/module/src/x86_64_alphanetworks_snx60a0_486f_ucli.c diff --git a/packages/platforms/alphanetworks/x86-64-alphanetworks-snx60a0-486f/onlp/builds/src/x86_64_alphanetworks_snx60a0_486f/utest/_make.mk b/packages/platforms/alphanetworks/x86-64/x86-64-alphanetworks-snx60a0-486f/onlp/builds/src/x86_64_alphanetworks_snx60a0_486f/utest/_make.mk similarity index 100% rename from packages/platforms/alphanetworks/x86-64-alphanetworks-snx60a0-486f/onlp/builds/src/x86_64_alphanetworks_snx60a0_486f/utest/_make.mk rename to packages/platforms/alphanetworks/x86-64/x86-64-alphanetworks-snx60a0-486f/onlp/builds/src/x86_64_alphanetworks_snx60a0_486f/utest/_make.mk diff --git a/packages/platforms/alphanetworks/x86-64-alphanetworks-snx60a0-486f/onlp/builds/src/x86_64_alphanetworks_snx60a0_486f/utest/main.c b/packages/platforms/alphanetworks/x86-64/x86-64-alphanetworks-snx60a0-486f/onlp/builds/src/x86_64_alphanetworks_snx60a0_486f/utest/main.c similarity index 100% rename from packages/platforms/alphanetworks/x86-64-alphanetworks-snx60a0-486f/onlp/builds/src/x86_64_alphanetworks_snx60a0_486f/utest/main.c rename to packages/platforms/alphanetworks/x86-64/x86-64-alphanetworks-snx60a0-486f/onlp/builds/src/x86_64_alphanetworks_snx60a0_486f/utest/main.c diff --git a/packages/platforms/alphanetworks/x86-64-alphanetworks-snx60a0-486f/onlp/builds/src/x86_64_alphanetworks_snx60a0_486f/x86_64_alphanetworks_snx60a0_486f.doxy b/packages/platforms/alphanetworks/x86-64/x86-64-alphanetworks-snx60a0-486f/onlp/builds/src/x86_64_alphanetworks_snx60a0_486f/x86_64_alphanetworks_snx60a0_486f.doxy similarity index 100% rename from packages/platforms/alphanetworks/x86-64-alphanetworks-snx60a0-486f/onlp/builds/src/x86_64_alphanetworks_snx60a0_486f/x86_64_alphanetworks_snx60a0_486f.doxy rename to packages/platforms/alphanetworks/x86-64/x86-64-alphanetworks-snx60a0-486f/onlp/builds/src/x86_64_alphanetworks_snx60a0_486f/x86_64_alphanetworks_snx60a0_486f.doxy diff --git a/packages/platforms/alphanetworks/x86-64-alphanetworks-snx60a0-486f/onlp/builds/src/x86_64_alphanetworks_snx60a0_486f/x86_64_alphanetworks_snx60a0_486f.mk b/packages/platforms/alphanetworks/x86-64/x86-64-alphanetworks-snx60a0-486f/onlp/builds/src/x86_64_alphanetworks_snx60a0_486f/x86_64_alphanetworks_snx60a0_486f.mk similarity index 100% rename from packages/platforms/alphanetworks/x86-64-alphanetworks-snx60a0-486f/onlp/builds/src/x86_64_alphanetworks_snx60a0_486f/x86_64_alphanetworks_snx60a0_486f.mk rename to packages/platforms/alphanetworks/x86-64/x86-64-alphanetworks-snx60a0-486f/onlp/builds/src/x86_64_alphanetworks_snx60a0_486f/x86_64_alphanetworks_snx60a0_486f.mk diff --git a/packages/platforms/alphanetworks/x86-64/x86-64-alphanetworks-snx60a0-486f/platform-config/Makefile b/packages/platforms/alphanetworks/x86-64/x86-64-alphanetworks-snx60a0-486f/platform-config/Makefile new file mode 100644 index 00000000..003238cf --- /dev/null +++ b/packages/platforms/alphanetworks/x86-64/x86-64-alphanetworks-snx60a0-486f/platform-config/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/packages/platforms/alphanetworks/x86-64/x86-64-alphanetworks-snx60a0-486f/platform-config/r0/Makefile b/packages/platforms/alphanetworks/x86-64/x86-64-alphanetworks-snx60a0-486f/platform-config/r0/Makefile new file mode 100644 index 00000000..003238cf --- /dev/null +++ b/packages/platforms/alphanetworks/x86-64/x86-64-alphanetworks-snx60a0-486f/platform-config/r0/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/packages/platforms/alphanetworks/x86-64/x86-64-alphanetworks-snx60a0-486f/platform-config/r0/PKG.yml b/packages/platforms/alphanetworks/x86-64/x86-64-alphanetworks-snx60a0-486f/platform-config/r0/PKG.yml new file mode 100644 index 00000000..2edd0acb --- /dev/null +++ b/packages/platforms/alphanetworks/x86-64/x86-64-alphanetworks-snx60a0-486f/platform-config/r0/PKG.yml @@ -0,0 +1 @@ +!include $ONL_TEMPLATES/platform-config-platform.yml ARCH=amd64 VENDOR=alphanetworks BASENAME=x86-64-alphanetworks-snx60a0-486f REVISION=r0 diff --git a/packages/platforms/alphanetworks/x86-64-alphanetworks-snx60a0-486f/platform-config/r0/src/lib/x86-64-alphanetworks-snx60a0-486f-r0.yml b/packages/platforms/alphanetworks/x86-64/x86-64-alphanetworks-snx60a0-486f/platform-config/r0/src/lib/x86-64-alphanetworks-snx60a0-486f-r0.yml similarity index 94% rename from packages/platforms/alphanetworks/x86-64-alphanetworks-snx60a0-486f/platform-config/r0/src/lib/x86-64-alphanetworks-snx60a0-486f-r0.yml rename to packages/platforms/alphanetworks/x86-64/x86-64-alphanetworks-snx60a0-486f/platform-config/r0/src/lib/x86-64-alphanetworks-snx60a0-486f-r0.yml index abd98158..26adb76b 100644 --- a/packages/platforms/alphanetworks/x86-64-alphanetworks-snx60a0-486f/platform-config/r0/src/lib/x86-64-alphanetworks-snx60a0-486f-r0.yml +++ b/packages/platforms/alphanetworks/x86-64/x86-64-alphanetworks-snx60a0-486f/platform-config/r0/src/lib/x86-64-alphanetworks-snx60a0-486f-r0.yml @@ -17,7 +17,7 @@ x86-64-alphanetworks-snx60a0-486f-r0: --stop=1 kernel: - <<: *kernel-3-2 + <<: *kernel-3-16 args: >- nopat diff --git a/packages/platforms/alphanetworks/x86-64-alphanetworks-snx60a0-486f/platform-config/r0/src/python/x86_64_alphanetworks_snx60a0_486f_r0/__init__.py b/packages/platforms/alphanetworks/x86-64/x86-64-alphanetworks-snx60a0-486f/platform-config/r0/src/python/x86_64_alphanetworks_snx60a0_486f_r0/__init__.py similarity index 100% rename from packages/platforms/alphanetworks/x86-64-alphanetworks-snx60a0-486f/platform-config/r0/src/python/x86_64_alphanetworks_snx60a0_486f_r0/__init__.py rename to packages/platforms/alphanetworks/x86-64/x86-64-alphanetworks-snx60a0-486f/platform-config/r0/src/python/x86_64_alphanetworks_snx60a0_486f_r0/__init__.py diff --git a/packages/platforms/celestica/x86-64/modules/Makefile b/packages/platforms/celestica/x86-64/modules/Makefile new file mode 100644 index 00000000..003238cf --- /dev/null +++ b/packages/platforms/celestica/x86-64/modules/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/packages/platforms/celestica/x86-64/modules/PKG.yml b/packages/platforms/celestica/x86-64/modules/PKG.yml new file mode 100644 index 00000000..a337be1b --- /dev/null +++ b/packages/platforms/celestica/x86-64/modules/PKG.yml @@ -0,0 +1 @@ +!include $ONL_TEMPLATES/no-arch-vendor-modules.yml ARCH=amd64 VENDOR=celestica diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/modules/Makefile b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/modules/Makefile new file mode 100644 index 00000000..003238cf --- /dev/null +++ b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/modules/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/modules/PKG.yml b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/modules/PKG.yml new file mode 100644 index 00000000..debdbdd4 --- /dev/null +++ b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/modules/PKG.yml @@ -0,0 +1 @@ +!include $ONL_TEMPLATES/no-platform-modules.yml ARCH=amd64 VENDOR=celestica BASENAME=x86-64-cel-redstone-xp diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/.module b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/.module similarity index 100% rename from packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/.module rename to packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/.module diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/Makefile b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/Makefile similarity index 100% rename from packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/Makefile rename to packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/Makefile diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/module/auto/make.mk b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/auto/make.mk similarity index 100% rename from packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/module/auto/make.mk rename to packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/auto/make.mk diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/auto/x86_64_cel_redstone_xp.yml b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/auto/x86_64_cel_redstone_xp.yml new file mode 100644 index 00000000..22d6adf9 --- /dev/null +++ b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/auto/x86_64_cel_redstone_xp.yml @@ -0,0 +1,287 @@ +############################################################################### +# +# x86_64_cel_redstone_xp Autogeneration Definitions. +# +############################################################################### + +cdefs: &cdefs +- X86_64_CEL_REDSTONE_XP_CONFIG_INCLUDE_LOGGING: + doc: "Include or exclude logging." + default: 1 +- X86_64_CEL_REDSTONE_XP_CONFIG_LOG_OPTIONS_DEFAULT: + doc: "Default enabled log options." + default: AIM_LOG_OPTIONS_DEFAULT +- X86_64_CEL_REDSTONE_XP_CONFIG_LOG_BITS_DEFAULT: + doc: "Default enabled log bits." + default: AIM_LOG_BITS_DEFAULT +- X86_64_CEL_REDSTONE_XP_CONFIG_LOG_CUSTOM_BITS_DEFAULT: + doc: "Default enabled custom log bits." + default: 0 +- X86_64_CEL_REDSTONE_XP_CONFIG_PORTING_STDLIB: + doc: "Default all porting macros to use the C standard libraries." + default: 1 +- X86_64_CEL_REDSTONE_XP_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS: + doc: "Include standard library headers for stdlib porting macros." + default: X86_64_CEL_REDSTONE_XP_CONFIG_PORTING_STDLIB +- X86_64_CEL_REDSTONE_XP_CONFIG_INCLUDE_UCLI: + doc: "Include generic uCli support." + default: 0 + + +definitions: + cdefs: + X86_64_CEL_REDSTONE_XP_CONFIG_HEADER: + defs: *cdefs + basename: x86_64_cel_redstone_xp_config + + portingmacro: + X86_64_CEL_REDSTONE_XP: + macros: + - malloc + - free + - memset + - memcpy + - strncpy + - vsnprintf + - snprintf + - strlen + + + enum: &enums + cpld1_reg: + members: + - VERSION: 0x100 + - SCRATCH: 0x101 + - RESET_CONTROL: 0x102 + - RESET_SOURCE: 0x103 + - BOARD_TYPE: 0x104 + - INT_PORT_STATUS: 0x110 + - INT0_SOURCE_STATUS: 0x111 + - INT0_SOURCE_INT: 0x112 + - INT0_SOURCE_MASK: 0x113 + - POWER_SUPPLY_STATUS: 0x120 + - POWER_GOOD_STATUS: 0x121 + - BPP_CONTROL: 0x122 + - WRITE_PROTECT_CONTROL: 0x123 + - MISC_STATUS_CONTROL: 0x124 + - INFO_RAM_ADDR_HIGH: 0x130 + - INFO_RAM_ADDR_LOW: 0x131 + - INFO_RAM_READ_DATA: 0x132 + - INFO_RAM_WRITE_DATA: 0x133 + + cpld2_reg: + members: + - VERSION: 0x200 + - SCRATCH: 0x201 + - I2C_PORT_ID: 0x210 + - I2C_OP_CODE: 0x211 + - I2C_DEV_ADDR: 0x212 + - I2C_CMD_BYTE0: 0x213 + - I2C_CMD_BYTE1: 0x214 + - I2C_CMD_BYTE2: 0x215 + - I2C_STATUS_RESET: 0x216 + + - I2C_WRITE_DATA_BYTE0: 0x220 + - I2C_WRITE_DATA_BYTE1: 0x221 + - I2C_WRITE_DATA_BYTE2: 0x222 + - I2C_WRITE_DATA_BYTE3: 0x223 + - I2C_WRITE_DATA_BYTE4: 0x224 + - I2C_WRITE_DATA_BYTE5: 0x225 + - I2C_WRITE_DATA_BYTE6: 0x226 + - I2C_WRITE_DATA_BYTE7: 0x227 + + - I2C_READ_DATA_BYTE0: 0x230 + - I2C_READ_DATA_BYTE1: 0x231 + - I2C_READ_DATA_BYTE2: 0x232 + - I2C_READ_DATA_BYTE3: 0x233 + - I2C_READ_DATA_BYTE4: 0x234 + - I2C_READ_DATA_BYTE5: 0x235 + - I2C_READ_DATA_BYTE6: 0x236 + - I2C_READ_DATA_BYTE7: 0x237 + + - SFP_1_8_RX_LOS: 0x240 + - SFP_9_16_RX_LOS: 0x241 + - SFP_17_18_RX_LOS: 0x242 + + - SFP_1_8_RX_LOS_INT: 0x243 + - SFP_9_16_RX_LOS_INT: 0x244 + - SFP_17_18_RX_LOS_INT: 0x245 + + - SFP_1_8_RX_LOS_MASK: 0x246 + - SFP_9_16_RX_LOS_MASK: 0x247 + - SFP_17_18_RX_LOS_MASK: 0x248 + + - SFP_1_8_TX_DISABLE: 0x250 + - SFP_9_16_TX_DISABLE: 0x251 + - SFP_17_18_TX_DISABLE: 0x252 + + - SFP_1_8_RS_CONTROL: 0x253 + - SFP_9_16_RS_CONTROL: 0x254 + - SFP_17_18_RS_CONTROL: 0x255 + + - SFP_1_8_TX_FAULT: 0x256 + - SFP_9_16_TX_FAULT: 0x257 + - SFP_17_18_TX_FAULT: 0x258 + + - SFP_1_8_ABS_STATUS: 0x259 + - SFP_9_16_ABS_STATUS: 0x25A + - SFP_17_18_ABS_STATUS: 0x25B + + cpld3_reg: + members: + - VERSION: 0x280 + - SCRATCH: 0x281 + - I2C_PORT_ID: 0x290 + - I2C_OP_CODE: 0x291 + - I2C_DEV_ADDR: 0x292 + - I2C_CMD_BYTE0: 0x293 + - I2C_CMD_BYTE1: 0x294 + - I2C_CMD_BYTE2: 0x295 + - I2C_STATUS_RESET: 0x296 + + - I2C_WRITE_DATA_BYTE0: 0x2A0 + - I2C_WRITE_DATA_BYTE1: 0x2A1 + - I2C_WRITE_DATA_BYTE2: 0x2A2 + - I2C_WRITE_DATA_BYTE3: 0x2A3 + - I2C_WRITE_DATA_BYTE4: 0x2A4 + - I2C_WRITE_DATA_BYTE5: 0x2A5 + - I2C_WRITE_DATA_BYTE6: 0x2A6 + - I2C_WRITE_DATA_BYTE7: 0x2A7 + + - I2C_READ_DATA_BYTE0: 0x2B0 + - I2C_READ_DATA_BYTE1: 0x2B1 + - I2C_READ_DATA_BYTE2: 0x2B2 + - I2C_READ_DATA_BYTE3: 0x2B3 + - I2C_READ_DATA_BYTE4: 0x2B4 + - I2C_READ_DATA_BYTE5: 0x2B5 + - I2C_READ_DATA_BYTE6: 0x2B6 + - I2C_READ_DATA_BYTE7: 0x2B7 + + - SFP_19_26_RX_LOS: 0x2C0 + - SFP_27_34_RX_LOS: 0x2C1 + - SFP_35_36_RX_LOS: 0x2C2 + + - SFP_19_26_RX_LOS_INT: 0x2C3 + - SFP_27_34_RX_LOS_INT: 0x2C4 + - SFP_35_36_RX_LOS_INT: 0x2C5 + + - SFP_19_26_RX_LOS_MASK: 0x2C6 + - SFP_27_34_RX_LOS_MASK: 0x2C7 + - SFP_35_36_RX_LOS_MASK: 0x2C8 + + - SFP_19_26_TX_DISABLE: 0x2D0 + - SFP_27_34_TX_DISABLE: 0x2D1 + - SFP_35_36_TX_DISABLE: 0x2D2 + + - SFP_19_26_RS_CONTROL: 0x2D3 + - SFP_27_34_RS_CONTROL: 0x2D4 + - SFP_35_36_RS_CONTROL: 0x2D5 + + - SFP_19_26_TX_FAULT: 0x2D6 + - SFP_27_34_TX_FAULT: 0x2D7 + - SFP_35_36_TX_FAULT: 0x2D8 + + - SFP_19_26_ABS_STATUS: 0x2D9 + - SFP_27_34_ABS_STATUS: 0x2DA + - SFP_35_36_ABS_STATUS: 0x2DB + + + cpld4_reg: + members: + - VERSION: 0x300 + - SCRATCH: 0x301 + - RESET_CONTROL: 0x302 + - LED_CONTROL: 0x303 + - MISC_STATUS_CONTROL: 0x304 + - INT_PORT_STATUS: 0x305 + - INT0_SOURCE_STATUS: 0x306 + - INT1_SOURCE_STATUS: 0x307 + - INT2_SOURCE_STATUS: 0x308 + - INT0_SOURCE_INT: 0x309 + - INT1_SOURCE_INT: 0x30A + - INT2_SOURCE_INT: 0x30B + - INT0_SOURCE_MASK: 0x30C + - INT1_SOURCE_MASK: 0x30D + - INT2_SOURCE_MASK: 0x30E + - I2C_PORT_ID: 0x310 + - I2C_OP_CODE: 0x311 + - I2C_DEV_ADDR: 0x312 + - I2C_COMMAND_BYTE0: 0x313 + - I2C_COMMAND_BYTE1: 0x314 + - I2C_COMMAND_BYTE2: 0x315 + - I2C_STATUS_RESET: 0x316 + + - I2C_WRITE_DATA_BYTE0: 0x320 + - I2C_WRITE_DATA_BYTE1: 0x321 + - I2C_WRITE_DATA_BYTE2: 0x322 + - I2C_WRITE_DATA_BYTE3: 0x323 + - I2C_WRITE_DATA_BYTE4: 0x324 + - I2C_WRITE_DATA_BYTE5: 0x325 + - I2C_WRITE_DATA_BYTE6: 0x326 + - I2C_WRITE_DATA_BYTE7: 0x327 + + - I2C_READ_DATA_BYTE0: 0x330 + - I2C_READ_DATA_BYTE1: 0x331 + - I2C_READ_DATA_BYTE2: 0x332 + - I2C_READ_DATA_BYTE3: 0x333 + - I2C_READ_DATA_BYTE4: 0x334 + - I2C_READ_DATA_BYTE5: 0x335 + - I2C_READ_DATA_BYTE6: 0x336 + - I2C_READ_DATA_BYTE7: 0x337 + + - QSFP_RESET_CONTROL: 0x360 + - QSFP_LPMOD_CONTROL: 0x361 + - QSFP_ABS_STATUS: 0x362 + - QSFP_INT_STATUS: 0x363 + - QSFP_I2C_READY: 0x364 + + cpld5_reg: + members: + - VERSION: 0x380 + - SCRATCH: 0x381 + - I2C_PORT_ID: 0x390 + - I2C_OP_CODE: 0x391 + - I2C_DEV_ADDR: 0x392 + - I2C_CMD_BYTE0: 0x393 + - I2C_CMD_BYTE1: 0x394 + - I2C_CMD_BYTE2: 0x395 + - I2C_STATUS_RESET: 0x396 + + - I2C_WRITE_DATA_BYTE0: 0x3A0 + - I2C_WRITE_DATA_BYTE1: 0x3A1 + - I2C_WRITE_DATA_BYTE2: 0x3A2 + - I2C_WRITE_DATA_BYTE3: 0x3A3 + - I2C_WRITE_DATA_BYTE4: 0x3A4 + - I2C_WRITE_DATA_BYTE5: 0x3A5 + - I2C_WRITE_DATA_BYTE6: 0x3A6 + - I2C_WRITE_DATA_BYTE7: 0x3A7 + + - I2C_READ_DATA_BYTE0: 0x3B0 + - I2C_READ_DATA_BYTE1: 0x3B1 + - I2C_READ_DATA_BYTE2: 0x3B2 + - I2C_READ_DATA_BYTE3: 0x3B3 + - I2C_READ_DATA_BYTE4: 0x3B4 + - I2C_READ_DATA_BYTE5: 0x3B5 + - I2C_READ_DATA_BYTE6: 0x3B6 + - I2C_READ_DATA_BYTE7: 0x3B7 + + - SFP_37_44_RX_LOS: 0x3C0 + - SFP_45_48_RX_LOS: 0x3C1 + + - SFP_37_44_RX_LOS_INT: 0x3C2 + - SFP_45_48_RX_LOS_INT: 0x3C3 + + - SFP_37_44_RX_LOS_MASK: 0x3C4 + - SFP_45_48_RX_LOS_MASK: 0x3C5 + + - SFP_37_44_TX_DISABLE: 0x3D0 + - SFP_45_48_TX_DISABLE: 0x3D1 + + - SFP_37_44_RS_CONTROL: 0x3D2 + - SFP_45_48_RS_CONTROL: 0x3D3 + + - SFP_37_44_TX_FAULT: 0x3D4 + - SFP_45_48_TX_FAULT: 0x3D5 + + - SFP_37_44_ABS_STATUS: 0x3D6 + - SFP_45_48_ABS_STATUS: 0x3D7 diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/module/inc/x86_64_cel_redstone_xp/x86_64_cel_redstone_xp.x b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/inc/x86_64_cel_redstone_xp/x86_64_cel_redstone_xp.x similarity index 100% rename from packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/module/inc/x86_64_cel_redstone_xp/x86_64_cel_redstone_xp.x rename to packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/inc/x86_64_cel_redstone_xp/x86_64_cel_redstone_xp.x diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/module/inc/x86_64_cel_redstone_xp/x86_64_cel_redstone_xp_config.h b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/inc/x86_64_cel_redstone_xp/x86_64_cel_redstone_xp_config.h similarity index 100% rename from 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packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/module/make.mk rename to packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/make.mk diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/module/src/Makefile b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/Makefile similarity index 100% rename from packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/module/src/Makefile rename to packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/Makefile diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/fani.c b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/fani.c new file mode 100644 index 00000000..2e626534 --- /dev/null +++ b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/fani.c @@ -0,0 +1,111 @@ +#include + +#include "i2c_chips.h" +#include "platform.h" + +onlp_fan_info_t f_info[FAN_COUNT + 1] = { + { + { ONLP_FAN_ID_CREATE(1), "Chassis Fan 1", 0 }, + 0x0, + }, + { + { ONLP_FAN_ID_CREATE(2), "Chassis Fan 2", 0 }, + 0x0, + }, + { + { ONLP_FAN_ID_CREATE(3), "Chassis Fan 3", 0 }, + 0x0, + }, + { + { ONLP_FAN_ID_CREATE(4), "Chassis Fan 4", 0 }, + 0x0, + }, + { + { ONLP_FAN_ID_CREATE(5), "Chassis Fan 5", 0 }, + 0x0, + }, + { + { ONLP_FAN_ID_CREATE(6), "Chassis Fan 6", 0 }, + 0x0, + }, + { + { ONLP_FAN_ID_CREATE(7), "Chassis Fan 7", 0 }, + 0x0, + }, + { + { ONLP_FAN_ID_CREATE(8), "Chassis Fan 8", 0 }, + 0x0, + }, + { + { ONLP_FAN_ID_CREATE(8), "PSU Fan 1", 0 }, + 0x0, + }, + { + { ONLP_FAN_ID_CREATE(8), "PSU Fan 2", 0 }, + 0x0, + }, +}; + + +int +onlp_fani_init(void) +{ + fanInit(); + return ONLP_STATUS_OK; +} + +int +onlp_fani_rpm_set(onlp_oid_t id, int rpm) +{ + int fan_id; + unsigned short p; + + /* Max speed 12000 RPM. 1 % is 120 RPM */ + p = (unsigned short) (rpm/120); + if ( p > 100) + p = 100; + + fan_id = ONLP_OID_ID_GET(id) - 1; + + fanSpeedSet(fan_id, p); + return ONLP_STATUS_OK; +} + +int +onlp_fani_percentage_set(onlp_oid_t id, int p) +{ + int fan_id; + + fan_id = ONLP_OID_ID_GET(id) - 1; + + fanSpeedSet(fan_id, (unsigned short)p); + return ONLP_STATUS_OK; +} + +int +onlp_fani_info_get(onlp_oid_t id, onlp_fan_info_t* info) +{ + int fan_id; + + fan_id = ONLP_OID_ID_GET(id) - 1; + + if (fan_id > FAN_COUNT) + return ONLP_STATUS_E_INTERNAL; + + *info = f_info[fan_id]; + + if (!getFanPresent(fan_id)) + info->status |= ONLP_FAN_STATUS_PRESENT; + else + return ONLP_STATUS_E_MISSING; + + if (getFanAirflow(fan_id)) + info->status |= ONLP_FAN_STATUS_F2B; + else + info->status |= ONLP_FAN_STATUS_B2F; + + fanSpeedGet(fan_id, &(info->rpm)); + fanPwmGet(fan_id, &(info->percentage)); + + return ONLP_STATUS_OK; +} diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/i2c_chips.c b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/i2c_chips.c new file mode 100644 index 00000000..84b1cfc6 --- /dev/null +++ b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/i2c_chips.c @@ -0,0 +1,1956 @@ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + + +#include "i2c_dev.h" +#include "i2c_chips.h" +#include "redstone_cpld.h" + +#define PSOC_CTRL_SMBUS 0x01 + +static struct ts_info ts[] = { + {0x48, 0x0, 0x3}, + {0x4E, 0x0, 0x3}, + {0x49, 0x0, 0x3}, + {0x4A, 0x0, 0x3}, +}; + +static const struct dev_info i2c_dev[NUM_CHIPS] = { + {1,0x73, 4, "lm75_cpu"}, + {2,0x73, 5, "lm75_out"}, + {3,0x71, 4, "lm75_in"}, + {4,0x71, 5, "lm75_sw"}, + {5, 0x73, 2, "syseeprom"}, + {6, 0x71, 2, "gbeeeprom"}, + {9, 0x73, 7, "pca9506"}, +}; + +#define FANGROUP_NUM 4 +static const struct fan_config fan[FAN_NUM] = { + {0x4D, 0x4E, 0x40}, //Fan 1 Front + {0x2E, 0x4E, 0x40}, //Fan 1 Rear + {0x4D, 0x6E, 0x60}, //Fan 2 F + {0x2e, 0x3E, 0x30}, //Fan 2 R + {0x4D, 0x5E, 0x50}, //Fan 3 F + {0x2E, 0x7E, 0x70}, //Fan 3 R + {0x4D, 0x3E, 0x30}, //Fan 4 F + {0x2E, 0x5E, 0x50}, //Fan 4 R +}; + +static struct led_gpio ledGpio[] = { + {32, 31}, //4_0,3_7, gpio(x_y) = x*8+y + {30, 29}, //3_6,3_5 + {38, 37}, //4_6,4_5 + {34, 33}, //4_2,4_1 +}; +static unsigned char airFlowGpio[] = { + 16, //IO2_0 gpio = 2*8+0, gpio(x_y) = x*8+y + 15, //IO1_7 + 19, //IO2_3 + 17, //IO2_1 +}; +static unsigned char presentGpio[] = { + 11, //IO1_3 gpio = 2*8+0, gpio(x_y) = x*8+y + 10, //IO1_2 + 14, //IO1_6 + 12, //IO1_4 +}; + +static int has_been_read = 0; +static unsigned char cpu_id = 0x00; + +unsigned long in_sus_val = 0x00000000; +unsigned long in_core_val = 0x00000000; + +int openChannel(unsigned char dev_id) +{ + unsigned char data; + int ret = -1; + int i; + for(i=0; i< NUM_CHIPS; i++) + { + if(dev_id == i2c_dev[i].dev_id) + { + data = 0x0 | (0x1 << i2c_dev[i].channel) ; + ret = chips_write_byte(i2c_dev[i].sw_addr, 0x0, data); + if(ret < 0) + return ret; + } + } + return ret; +} + +int closeChannel(unsigned char dev_id) +{ + int ret = -1; + int i; + for(i=0; i< NUM_CHIPS; i++) + { + if(dev_id == i2c_dev[i].dev_id) + { + ret = chips_write_byte(i2c_dev[i].sw_addr, 0x0, 0x0); + if(ret < 0) + return ret; + } + } + return ret; +} + + +/* GPIO INPUT: return zero or nonzero */ +void gpio_sus_init(unsigned int gpio) +{ + outl_p((inl_p(0x580) | (1 << gpio)), 0x580);//100 0000 0001 0011 0000 +} + +unsigned char gpio_sus_get_value(unsigned int gpio) +{ + unsigned char ucRet = 0; + + if ( inl_p( 0x588 ) & (1 << gpio) ) { + ucRet = 0x01; + } + else { + ucRet = 0x00; + } + + return ( ucRet ); + +} +void gpio_sus_set_value(unsigned int gpio, unsigned char val) +{ + if(val) + in_sus_val |= (1 << gpio); + else + in_sus_val &= ~(1 << gpio); + + outl_p( in_sus_val, 0x588 ); +} + + +/**************************************************************** + * gpio_set_dir + ****************************************************************/ +void gpio_sus_set_dir(unsigned int gpio, unsigned int out_flag) +{ + + if (out_flag) + outl_p((inl_p(0x584) & (~(1 << gpio))), 0x584);//output set 0 + else + outl_p((inl_p(0x584) | (1 << gpio)), 0x584);//input set 1 +} + +void gpio_core_init(unsigned int gpio) +{ + outl_p((inl_p(0x500) | (1 << gpio)), 0x500);//100 0000 0001 0011 0000 +} + +unsigned char gpio_core_get_value(unsigned int gpio) +{ + unsigned char ucRet = 0; + + if ( inl_p( 0x508 ) & (1 << gpio) ) { + ucRet = 0x01; + } + else { + ucRet = 0x00; + } + + return ( ucRet ); + +} +void gpio_core_set_value(unsigned int gpio, unsigned char val) +{ + + inl_p(0x508); + if(val) + in_core_val |= (1 << gpio); + else + in_core_val &= ~(1 << gpio); + + outl_p( in_core_val, 0x508 ); +} + + +/**************************************************************** + * gpio_set_dir + ****************************************************************/ +void gpio_core_set_dir(unsigned int gpio, unsigned int out_flag) +{ + + if (out_flag) + outl_p((inl_p(0x504) & (~(1 << gpio))), 0x504);//output set 0 + else + outl_p((inl_p(0x504) | (1 << gpio)), 0x504);//input set 1 +} + + +#define setbit(x,y) x|=(1<> 8); + return data; +} + +/*added by Gerald*/ +#define CPLD_RAM_ADDR_HIGH_BYTE_REG (0x130) +#define CPLD_RAM_ADDR_LOW_BYTE_REG (0x131) +#define CPLD_RAM_READ_REG (0x132) + +#define FAN1_RAM_SPEED_LOW (20) +#define FAN_PRES_STATUS (15) +#define FRONT_FAN_STATUS (FAN_PRES_STATUS + 1) +#define REAR_FAN_STATUS (FAN_PRES_STATUS + 2) + +#define PSU_PRES_STATUS (50) + +int read_ram_from_cpld(const unsigned short ram_offset, unsigned char *value) +{ + int ret; + unsigned char ram_hbyte, ram_lbyte; + unsigned char data; + + /* set RAM offset high byte first as described in spec */ + ram_hbyte = (ram_offset & 0xff00) >> 8 ; + ret = write_cpld(CPLD_RAM_ADDR_HIGH_BYTE_REG, ram_hbyte); + if (ret < 0) + { + printf("write ram offset high byte error\n"); + return ret; + } + + /* set RAM offset low byte */ + ram_lbyte = ram_offset & 0xff; + ret = write_cpld(CPLD_RAM_ADDR_LOW_BYTE_REG, ram_lbyte); + if (ret < 0) + { + printf("write ram offset low byte error\n"); + return ret; + } + + ret = read_cpld(CPLD_RAM_READ_REG, &data); + if(ret >= 0) + *value = data; + return ret; +} + +int read_ram_short_from_cpld(const unsigned short ram_offset, unsigned short *value) +{ + int ret = 0; + unsigned char data; + + ret = read_ram_from_cpld(ram_offset + 1, &data); + if(ret < 0) + return ret; + + *value = data << 8; + + ret = read_ram_from_cpld(ram_offset, &data); + *value |= data ; + return ret; +} + +#define PSOC_WATCHDOG_STATE (2) +#define PSOC_RXP_SXP_FLAG (4) +#define PSOC_PWM_RAM_REG (18) +#define PSOC_9506PORT_RAM_BASE (40) +#define PSU_STATE_RAM (50) + +int getWdFromCpldRam(unsigned char *val) +{ + int ret = 0; + unsigned char data; + + if(getCpuId() == PSOC_CTRL_SMBUS) { + ret = read_ram_from_cpld(PSOC_WATCHDOG_STATE, &data); + //printf("getWdFromCpldRam: ret=%d, data=%u\n", ret, data); + if(ret >= 0) + *val = data; + } + return ret; +} + +int getPwmFromCpldRam(unsigned char *val) +{ + int ret = 0; + unsigned char data; + + if(getCpuId() == PSOC_CTRL_SMBUS) { + ret = read_ram_from_cpld(PSOC_PWM_RAM_REG, &data); + //printf("getWdFromCpldRam: ret=%d, data=%u\n", ret, data); + if(ret >= 0) + *val = data; + } + return ret; +} + +#if 0 +int getAirFlowFromCpldRam(unsigned char *val, int index) +{ + int ret = 0; + unsigned char data; + + if(index > 5 || index < -1) + return -1; + + if(getCpuId() == PSOC_CTRL_SMBUS) { + ret = read_ram_from_cpld(PSOC_9506PORT_RAM_BASE + (index - 1), &data); + //printf("getWdFromCpldRam: ret=%d, data=%u\n", ret, data); + if(ret >= 0) { + *val = data; + } + } + return ret; +} +#endif + +int getRxpSxpFlag(unsigned char *val) +{ + int ret = 0; + unsigned char data; + + if(getCpuId() == PSOC_CTRL_SMBUS) { + ret = read_ram_from_cpld(PSOC_RXP_SXP_FLAG, &data); + //printf("getRxpSxpFlag: ret=%d, data=%u\n", ret, data); + if(ret >= 0) + *val = data; + } + + return ret; +} + +/*end of Gerald*/ +static int LM75_TEMP_FROM_REG(short data) +{ + return (swap(data&0xFFFF) /128)/2; +} + +#define ROA_TEMP_REM_REG (6) +#define BCM_TEMP_REM_REG (ROA_TEMP_REM_REG + 1) +#define CPU_TEMP_REM_REG (ROA_TEMP_REM_REG + 2) +#define FOA_TEMP_REM_REG (ROA_TEMP_REM_REG + 3) +#define TEMP_STATUS_RAM_REG (ROA_TEMP_REM_REG + 4) +#define PSOC_VER_BIT1 (ROA_TEMP_REM_REG + 5) +#define PSOC_VER_BIT2 (ROA_TEMP_REM_REG + 6) + +int getPSoCVersion(unsigned char *val) +{ + int ret = 0; + unsigned char data; + + if(getCpuId() == PSOC_CTRL_SMBUS) { + ret = read_ram_from_cpld(PSOC_VER_BIT1, &data); + if(ret >= 0) + *val = data; + if(ret < 0) + return ret; + + ret = read_ram_from_cpld(PSOC_VER_BIT2, &data); + if(ret >= 0) + *(val+1) = data; + if(ret < 0) + return ret; + } + return ret; +} + +int getTempStatus(unsigned char *val) +{ + int ret = 0; + unsigned char data; + + if(getCpuId() == PSOC_CTRL_SMBUS) { + ret = read_ram_from_cpld(TEMP_STATUS_RAM_REG, &data); + //printf("getRxpSxpFlag: ret=%d, data=%u\n", ret, data); + if(ret >= 0) + *val = data; + + return ret; + } + return ret; +} +int tsTempGet(int id, short *temp) +{ + int ret; + unsigned char data; + + if(getCpuId() == PSOC_CTRL_SMBUS) + { + ret = read_ram_from_cpld(ROA_TEMP_REM_REG + id, &data); + //printf("getPsuStatus: data=%u\n", data); + if(ret >= 0) + *temp = (short)data; + return ret; + } + else + { + unsigned short bufTmp = 0; + if((ret = getCtrlOfBus()) < 0) + return ret; + if((ret = enableChip(ts[id].ts_addr)) < 0) + return ret; + + ret = chips_read_word(ts[id].ts_addr, ts[id].temp_reg, &bufTmp); + if(ret >= 0) + *temp = LM75_TEMP_FROM_REG((short)bufTmp); + + disableChip(ts[id].ts_addr); + } + return ret; +} + +int tsOsGet(int id, unsigned short *temp) +{ + int ret; + unsigned char data; + + if(getCpuId() == PSOC_CTRL_SMBUS) + { + ret = read_ram_from_cpld(ROA_TEMP_REM_REG + id, &data); + //printf("getPsuStatus: data=%u\n", data); + if(ret >= 0) + *temp = (short)data; + return ret; + } + else + { + unsigned short bufTmp = 0; + if((ret = getCtrlOfBus()) < 0) + return ret; + + if((ret = enableChip(ts[id].ts_addr)) < 0) + return ret; + + ret = chips_read_word(ts[id].ts_addr, ts[id].os_reg, &bufTmp); + if(ret >= 0) + *temp = LM75_TEMP_FROM_REG((short)bufTmp); + + disableChip(ts[id].ts_addr); + } + return ret; +} + +int getTsShutdown(int id) +{ + int ret; + unsigned char data; + + if(getCpuId() == PSOC_CTRL_SMBUS) + { + ret = read_ram_from_cpld(ROA_TEMP_REM_REG + id, &data); + //printf("getPsuStatus: data=%u\n", data); + if(ret >= 0) + ret = (short)data; + return ret; + } + else + { + if((ret = getCtrlOfBus()) < 0) + return ret; + if((ret = enableChip(ts[id].ts_addr)) < 0) + return ret; + + ret = chips_read_byte(ts[id].ts_addr, 0x1, &data); + if(ret >= 0) + ret = data & 0x1; + + disableChip(ts[id].ts_addr); + + } + return ret; +} + +int setTsShutdown(int id, int shutdown) +{ + unsigned char data; + int ret; + + if((ret = getCtrlOfBus()) < 0) + return ret; + + if((ret = enableChip(ts[id].ts_addr)) < 0) + return ret; + + ret = chips_read_byte(ts[id].ts_addr, 0x1, &data); + + if(ret >= 0) { + if(shutdown == 1) { + data |= 0x1; + ret = chips_write_byte(ts[id].ts_addr, 0x1, data); + } else { + data &= 0xFE; + ret = chips_write_byte(ts[id].ts_addr, 0x1, data); + } + } + disableChip(ts[id].ts_addr); + return ret; +} + +static short convert_short(char *s, int len) +{ + short i; + short res = 0; + + for(i = 1; i < len; i++) { + res = res * 2 + (s[i] - '0'); + } + if(s[0] == '1') + return -res; + + return res; +} + +static long convert_linear(char *data) +{ + unsigned char low, high; + short N, Y; + long ret; + int temp = 1; + char s[11]; + int i; + + low = data[0]; + high = data[1]; + + if((high & 0x80) > 0) + high = ~high + 0x88; + for(i = 0; i < 5; i++) { + s[i] = (high & (0x80 >> i)) > 0 ? '1' : '0'; + } + + N = convert_short(s, 5); + high = data[1]; + if((high & 0x04) > 0) { + high = ~high + 0x40; + if((low != 0xff) && (low != 0x0)) + low = ~low + 0x1; + else { + low = 0x00; + high += 0x1; + } + + } + for(i = 5; i < 8; i++) + s[i-5] = (high & (0x80 >> i)) > 0 ? '1' : '0'; + for(i = 0; i < 8; i++) + s[i + 3] = (low & (0x80 >> i)) > 0 ? '1' : '0'; + + Y = convert_short(s, 11); + + if(N > 0) { + while(N > 0) { + temp = temp * 2; + N--; + } + + ret = Y * temp * 100; + } + else { + N = 0 - N; + while(N > 0) { + temp = temp * 2; + N--; + } + ret = (Y * 100) / temp; + } + + return ret; +} +int convert_vol(char *data) +{ + char low, high; + short temp; + short ret; + int i; + char s[16]; + + low = data[0]; + high = data[1]; + //printf("low = %x, high = %x\n", low, high); + if((high & 0x80) > 0) + { + high = ~high + 0x80; + if(low != 0xff) + low += ~low + 0x1; + else + { + low = 0x0; + high += 0x1; + } + } + for(i = 0; i < 8; i++) + s[i] = (high & (0x80 >> i)) > 0 ? '1' : '0'; + for(i = 0; i < 8; i++) + s[i + 8] = (low & (0x80 >> i)) > 0 ? '1' : '0'; + //printf("s = %s\n", s); + temp = convert_short(s, 16); + //printf("temp = %x\n", temp); + ret = (temp * 100) / 0x200; + + return ret; +} +#define PSU_RAM_VIN_LOW(i) (90 - i * 20) +#define PSU_RAM_IIN_LOW(i) (PSU_RAM_VIN_LOW(i) + 4) +#define PSU_RAM_VOUT_LOW(i) (PSU_RAM_VIN_LOW(i) + 2) +#define PSU_RAM_IOUT_LOW(i) (PSU_RAM_VIN_LOW(i) + 6) +#define PSU_RAM_POUT_LOW(i) (PSU_RAM_VIN_LOW(i) + 10) +#define PSU_RAM_PIN_LOW(i) (PSU_RAM_VIN_LOW(i) + 8) +#define PSU_RAM_TEMP1_LOW(i) (56 - (i) * 2) +#define PSU_RAM_FAN_SPEED_LOW(i) (62 - (i)*2) +#define PSU_RAM_STATUS (50) + +int getPsuInfo(int id, struct psuInfo * info) +{ + int status; + int ret; +// char cpld_psu_reg; +// char cpld_psu_reg_tmp; + unsigned short vin; + unsigned short iin; + unsigned short vout; + unsigned short iout; + unsigned short pout; + unsigned short pin; + unsigned short temp; + char psu_addr[] = { + 0x58, + 0x59, + }; + + if(getCpuId() == PSOC_CTRL_SMBUS) { + status = getPsuPresent(id); + if(status == 1) + return -1; + + if(status == 0) {//PSU-L present + if ((ret = read_ram_short_from_cpld(PSU_RAM_VIN_LOW(id), &vin)) < 0) + return -1; + if ((ret = read_ram_short_from_cpld(PSU_RAM_IIN_LOW(id), &iin)) < 0) + return -1; + if ((ret = read_ram_short_from_cpld(PSU_RAM_VOUT_LOW(id), &vout)) < 0) + return -1; + if ((ret = read_ram_short_from_cpld(PSU_RAM_IOUT_LOW(id), &iout)) < 0) + return -1; + if ((ret = read_ram_short_from_cpld(PSU_RAM_POUT_LOW(id), &pout)) < 0) + return -1; + if ((ret = read_ram_short_from_cpld(PSU_RAM_PIN_LOW(id), &pin)) < 0) + return -1; + if ((ret = read_ram_short_from_cpld(PSU_RAM_TEMP1_LOW(id), &temp)) < 0) + return -1; + + info->vin = convert_linear((char *)&vin) * 10; + info->iin = convert_linear((char *)&iin) * 10; + info->vout = convert_vol((char *)&vout) * 10; + info->iout = convert_linear((char *)&iout) * 10; + info->pout = convert_linear((char *)&pout) * 10; + info->pin = convert_linear((char *)&pin) * 10; + info->temp = convert_linear((char *)&temp)/100; + return 0; + } + + } else { + status = getPsuPresent(id); + if (status == 0) + { + if((ret = getCtrlOfBus()) < 0) + return ret; + if((ret = enableChip(psu_addr[id])) < 0) + return ret; + + if((ret = chips_read_word(psu_addr[id], PSU_READ_VIN, &vin)) < 0) + goto error; + if((ret = chips_read_word(psu_addr[id], PSU_READ_IIN, &iin)) < 0) + goto error; + if((ret = chips_read_word(psu_addr[id], PSU_READ_VOUT, &vout)) < 0) + goto error; + if((ret = chips_read_word(psu_addr[id], PSU_READ_IOUT, &iout)) < 0) + goto error; + if((ret = chips_read_word(psu_addr[id], PSU_READ_POUT, &pout)) < 0) + goto error; + if((ret = chips_read_word(psu_addr[id], PSU_READ_PIN, &pin)) < 0) + goto error; + if((ret = chips_read_word(psu_addr[id], PSU_READ_TEMP_1, &temp)) < 0) + goto error; + info->vin = convert_linear((char *)&vin) * 10; + info->iin = convert_linear((char *)&iin) * 10; + info->vout = convert_vol((char *)&vout) * 10; + info->iout = convert_linear((char *)&iout) * 10; + info->pout = convert_linear((char *)&pout) * 10; + info->pin = convert_linear((char *)&pin) * 10; + info->temp = convert_linear((char *)&temp)/100; + if((ret = disableChip(psu_addr[id])) < 0) + return ret; + return 0; + } + } + +error: + ret = disableChip(psu_addr[id]); + return -1; + +} +//return value 0:present, 1,absent +int getPsuPresent(int id) +{ + + unsigned char data; + int ret = -1; + + if(getCpuId() == PSOC_CTRL_SMBUS) + { + ret = read_ram_from_cpld(PSU_STATE_RAM, &data); + if(ret >= 0) { + ret = (data >> (1-id)) & 0x1; + ret = (ret == 0) ? 1 : 0; + } + } + else + { + int gpio; + switch(id) + { + case 0: + gpio = 27;//IO3_3 + break; + case 1: + gpio = 28;//IO3_4 + break; + default: + ret = -1; + return ret; + } + ret = pca9506_init_pin(gpio,gpio_in); + if(ret < 0) + return ret; + ret = pca9506_read_pin(gpio); + } + + + return ret; +} + +int read_psu(unsigned char addr, unsigned char reg, unsigned short *value) +{ + int status; + int ret = -1; + unsigned short data; + int id = 0; + if(addr == 0x58) + id = 8; + else if(addr == 0x59) + id = 9; + status = getFanPresent(id); + + if (status == 0) + { + if((ret = getCtrlOfBus()) < 0) + return ret; + if((ret = enableChip(addr)) < 0) + return ret; + + if((ret = chips_read_word(addr, reg, &data)) < 0) + goto error; + *value = data; + if((ret = disableChip(addr)) < 0) + return ret; + return 0; + } + else + { + goto error; + } + +error: + ret = disableChip(addr); + return -1; + +} + +int write_psu(unsigned char addr, unsigned char reg, unsigned short value) +{ +#if 0 + int status; + int ret = -1; + int id; + unsigned char data[5]; + unsigned char crc = 0; + unsigned char errStatus = 0; + unsigned char blockData[3]; + + unsigned char *wrData = (unsigned char *)&value; + + data[0] = (addr << 1) | 0;//0 i2c write + data[1] = reg; + data[2] = wrData[0]; + data[3] = wrData[1]; + crc = i2c_smbus_pec(crc, data, 4); + + blockData[0] = data[2]; + blockData[1] = data[3]; + blockData[2] = crc; + + if(addr == 0x58) + id = 8; + else if(addr == 0x59) + id = 9; + status = getFanPresent(id); + + if (status == 0) + { + if((ret = getCtrlOfBus()) < 0) + return ret; + if((ret = enableChip(addr)) < 0) + return ret; + + if((ret = chips_write_block(addr, reg, 3, blockData)) < 0) + goto error; + + if((ret = disableChip(addr)) < 0) + return ret; + return 0; + } + else + { + goto error; + } + +error: + ret = disableChip(addr); + return -1; +#endif + int status; + int ret = -1; + //unsigned short data; + int id = 0; + + if(addr == 0x58) + id = 8; + else if(addr == 0x59) + id = 9; + status = getFanPresent(id); + + if (status == 0) + { + if((ret = getCtrlOfBus()) < 0) + return ret; + if((ret = enableChip(addr)) < 0) + return ret; + + if((ret = chips_write_word_pec(addr, reg, value, 1)) < 0) + goto error; + if((ret = disableChip(addr)) < 0) + return ret; + return 0; + } + else + { + goto error; + } + +error: + ret = disableChip(addr); + return -1; + +} + +/*dev_id 5: system eeprom, dev_id 6: switch eeprom*/ +int +eeprom_enable(unsigned char dev_id) +{ + int ret =0; + unsigned char buf = 0x00; + int regNum = 0x123; + + ret = read_cpld(regNum, &buf); + buf &= ~(BIT0); + ret = write_cpld(regNum, buf); + + if(getCpuId() != PSOC_CTRL_SMBUS) { + getCtrlOfBus(); + ret = openChannel(dev_id); + } + return ret; + +} + + + +int +eeprom_disable(unsigned char dev_id) +{ + int ret =0; + unsigned char buf = 0x00; + int regNum = 0x123;; + + + if(getCpuId() != PSOC_CTRL_SMBUS) { + closeChannel(dev_id); + read_cpld(regNum, &buf); + buf |= BIT0; + ret = write_cpld(regNum, buf); + } + return ret; +} + +/* +close bios flash protect +[3] RW 0b0 Control The Status of SPD2_WP. +[2] RW 0b0 Control The Status of SPD1_WP. +*/ +int biosflash_enable() +{ + int ret =0; + unsigned char buf = 0x00; + int regNum = 0x123;; + + ret = read_cpld(regNum, &buf); + buf &= ~(BIT2 | BIT3); + ret = write_cpld(regNum, buf); + + return ret; + +} +/* +open bios flash protect +*/ +int biosflash_disable() +{ + int ret =0; + unsigned char buf = 0x00; + int regNum = 0x123;; + + ret = read_cpld(regNum, &buf); + buf |= (BIT2 | BIT3); + ret = write_cpld(regNum, buf); + + return ret; +} + +static inline int pca9506_read_byte_data(unsigned char reg,unsigned char *value) +{ + int ret; + + if(getCpuId() == PSOC_CTRL_SMBUS) { + unsigned char buf; + ret = read_cpld((int)0x198, &buf); + if(ret >= 0) + *value = (short)buf; + } else { + unsigned char data; + if((ret = getCtrlOfBus()) < 0) + return ret; + + if((ret = openChannel(9)) < 0) + { + return ret; + } + + + ret = chips_read_byte(PCA9506_ADDR, reg, &data); + if(ret >= 0) + *value = data; + + closeChannel(9); + } + return ret; +} + +static inline int pca9506_write_byte_data(unsigned char reg, unsigned char val) +{ + int ret = -1; + + if(getCpuId() == PSOC_CTRL_SMBUS) + { + unsigned char buf; + return read_cpld((int)0x198, &buf); + } else { + //unsigned char data; + if((ret = getCtrlOfBus()) < 0) + return ret; + + if((ret = openChannel(9)) < 0) + return ret; + + + ret = chips_write_byte(PCA9506_ADDR, reg, val); + closeChannel(9); + } + return ret; +} + +int pca9506_init_pin(unsigned char port, gpio_dir val) +{ + int ret = -1; + unsigned char bank = 0; + unsigned char bit = 0; + + unsigned char cfg_reg = 0; + //unsigned char input_reg = 0; + unsigned char output_reg = 0; + + unsigned char cfg_val = 0; + //unsigned char input_val = 0; + unsigned char output_val = 0; + + bank = port/8; + bit = port%8; + + cfg_reg = PCA9506_IOC0_REG + bank; + output_reg = PCA9506_OP0_REG + bank; + + // set output direction + ret = pca9506_read_byte_data(cfg_reg,&cfg_val); + + bit &= 0xf; + if(val == gpio_out) + cfg_val &= ~(0x01 << bit); + else + cfg_val |= (PCA9506_IO_INPUT << bit); + + ret = pca9506_write_byte_data(cfg_reg, cfg_val); + + if(val == gpio_out) + { + // set value + ret = pca9506_read_byte_data(output_reg, &output_val); + + val &= 0x01; + output_val &= ~(0x01 << bit); + output_val |= (val << bit); + ret = pca9506_write_byte_data(output_reg, output_val); + } + return ret; +} + +int pca9506_read_pin(unsigned char port) +{ + unsigned char bank = 0; + unsigned char bit = 0; + + //unsigned char cfg_reg = 0; + unsigned char input_reg = 0; + + //unsigned char cfg_val = 0; + unsigned char input_val = 0; + + bank = port/8; + bit = port%8; + + input_reg = PCA9506_IP0_REG + bank; + + // get value + pca9506_read_byte_data(input_reg, &input_val); + + return (input_val >> bit) & 0x01; +} + + +int pca9506_write_pin(unsigned char port, unsigned char val) +{ + int ret = -1; + unsigned char bank = 0; + unsigned char bit = 0; + + //unsigned char cfg_reg = 0; + unsigned char input_reg = 0; + unsigned char output_reg = 0; + + //unsigned char cfg_val = 0; + unsigned char input_val = 0; + //unsigned char output_val = 0; + + bank = port/8; + bit = port%8; + + input_reg = PCA9506_IP0_REG + bank; + output_reg = PCA9506_OP0_REG + bank; + + // get value + ret = pca9506_read_byte_data(input_reg,&input_val); + + val &= 0x01; + input_val &= ~(0x01 << bit); + input_val |= (val << bit); + ret = pca9506_write_byte_data(output_reg, input_val); + + return ret; +} + +/* +* param: id is fan id, from 0 to FAN_NUM + 1 +* return: 0 means present, 1 means absent +*/ +int getFanPresent(int id) +{ + + unsigned char data; + int ret = -1; + + if(getCpuId() == PSOC_CTRL_SMBUS) + { + int off; + if(id >= (FAN_NUM + 2) || id < 0) + return -1; + + if(id < FAN_NUM) + off = id / 2; + else + off = id - FAN_NUM; + + if(id <= (FAN_NUM - 1)) + ret = read_ram_from_cpld(FAN_PRES_STATUS, &data); + else + ret = read_ram_from_cpld(PSU_PRES_STATUS, &data); + + if(id <= (FAN_NUM - 1)) + ret = (data >> off) & 0x1; + else { + //ret = (data >> (1 - off)) & 0x1; + ret = (data & (1 << (1 - off))) ? 1 : 0; + } + + ret ^= 1; + } else { + int gpio = 0; + + if(id < FAN_NUM) + gpio = presentGpio[id>>1]; + else if(id == FAN_NUM) + gpio = 27;//IO3_3; + else if(id == (FAN_NUM + 1)) + gpio = 28;//IO3_4 + ret = pca9506_init_pin(gpio,gpio_in); + if(ret < 0) + return ret; + ret = pca9506_read_pin(gpio); + + } + + + return ret; +} + +//ret 1 failed, 0 OK +int getFanStatus(int id) +{ + unsigned char data; + //unsigned short value; + int ret = -1; + + if(id <0 || id >= FAN_NUM) + return ret; + + if(getCpuId() == PSOC_CTRL_SMBUS) + { + if(id % 2) {//front + ret = read_ram_from_cpld(FRONT_FAN_STATUS, &data); + //printf("getFanStatus, front: id=%d, data=%u, ret=%d\n", id, data, ret); + if(ret < 0) + return ret; + else + ret = (data >> (id / 2)) & 0x1; + }else { //rear + ret = read_ram_from_cpld(REAR_FAN_STATUS, &data); + if(ret < 0) + return ret; + else + ret = (data >> (id / 2)) & 0x1; + } + + } + else + { + if(id < FAN_NUM) //emc2305 fan controller + { + if((ret = getCtrlOfBus()) < 0) + return ret; + if((ret = enableChip(fan[id].emc_addr)) < 0) + return ret; + //ret = getFanPresent(id); + //if(ret < 0) + // return ret; + ret = chips_read_byte(fan[id].emc_addr, 0x25, &data); + if(ret < 0) + { + disableChip(fan[id].emc_addr); + return ret; + } + + if (((data >> (0x1 << id)) & 0x01) == 0x01) { + ret = 1; + } + disableChip(fan[id].emc_addr); + } + else + { + if((id == FAN_NUM)||(ret == (FAN_NUM + 1))) + { + ret = 0; + } + } + } + return ret; + +} + + +// 1 is F2B, 0 is B2F +int getFanAirflow(int id) +{ + + unsigned char data_io1, data_io2; + int ret = -1; + + if(getCpuId() == 0x01) + { + int off; + switch(id) + { + case 0: + case 1: + off = 0; + break; + case 2: + case 3: + off = 1; + break; + case 4: + case 5: + off = 2; + break; + case 6: + case 7: + off = 3; + break; + default: + ret = -1; + return ret; + } + + ret = read_ram_from_cpld(PSOC_9506PORT_RAM_BASE + 1, &data_io1); + if(ret < 0) + return -1; + + ret = read_ram_from_cpld(PSOC_9506PORT_RAM_BASE + 2, &data_io2); + if(ret < 0) + return -1; + + //printf("getFanAirflow: ret=%d, data_io1=%u, data_io2=%u\n", ret, data_io1, data_io2); + + if(off == 0) + ret = (data_io2 & 1) ? 1 : 0; + else if(off == 1) + ret = (data_io1 & (1 << 7)) ? 1 : 0; + else if(off == 2) + ret = (data_io2 & (1 << 3)) ? 1 : 0; + else if(off == 3) + ret = (data_io2 & (1 << 1)) ? 1 : 0; + else + ret = -1; + +#if 0 + if(id <= 7) + ret = read_cpld(CPLD_FAN_PRESENT, &data); + else + ret = read_cpld(CPLD_PSU_STATUS, &data); + + if(ret >= 0) + ret = (data >> off) & 0x1; +#endif + } + else + { + int gpio; + + if(id < FAN_NUM) + gpio = airFlowGpio[id>>1]; + else + return ret; + ret = pca9506_init_pin(gpio,gpio_in); + if(ret < 0) + return ret; + ret = pca9506_read_pin(gpio); + + } + + + return ret; +} + +//on_off 0 set let red/green led on, 1 off. color 0 green 1 red, 2 yellow +static int setFanLed(int id, unsigned char color, unsigned char on_off) +{ + + unsigned char data; + int ret = -1; + + if(getCpuId() == 0x01) + { + int off; + switch(id) + { + case 0: + case 1: + off = 0; + break; + case 2: + case 3: + off = 1; + break; + case 4: + case 5: + off = 2; + break; + case 6: + case 7: + off = 3; + break; + case 8: + off = 4; + break; + case 9: + off = 5; + break; + default: + ret = -1; + return ret; + } + if(id <= 7) + ret = read_cpld(CPLD_FAN_PRESENT, &data); + else + ret = read_cpld(CPLD_PSU_STATUS, &data); + if(ret >= 0) + ret = (data >> off) & 0x1; + } + else + { + int gpio; + gpio = (color == 0)?ledGpio[id>>1].green_gpio:ledGpio[id>>1].red_gpio; + ret = pca9506_init_pin(gpio,gpio_out); + if(ret < 0) + return ret; + ret = pca9506_write_pin(gpio,on_off); + + } + + + return ret; +} +int setFanLedGreen(int id) +{ + int ret = -1; + ret = setFanLed(id,red,1); + ret = setFanLed(id,green,0); + return ret; +} +int setFanLedRed(int id) +{ + int ret = -1; + ret = setFanLed(id,green,1); + ret = setFanLed(id,red,0); + return ret; +} +int setFanLedYellow(int id) +{ + int ret = -1; + ret = setFanLed(id,red,0); + ret = setFanLed(id,green,0); + return ret; +} +int setFanLedOff(int id) +{ + int ret = -1; + ret = setFanLed(id,red,1); + ret = setFanLed(id,green,1); + return ret; +} + +int setPsuLedOn(int id) +{ + int ret = -1; + unsigned char buf = 0x00; + ret = read_cpld(CPLD_FP_LED, &buf); + buf &= ~(1 << (2 + id)); + ret = write_cpld(CPLD_FP_LED, buf); + return ret; +} +int setPsuLedOff(int id) +{ + int ret = -1; + unsigned char buf = 0x00; + + ret = read_cpld(CPLD_FP_LED, &buf); + + buf |= 1 << (2 + id); + ret = write_cpld(CPLD_FP_LED, buf); + if (ret < 0) + { + printf("write error\n"); + return ret; + } + + return ret; + +} +int setSysLedOn() +{ + int ret = -1; + unsigned char buf = 0x00; + ret = read_cpld(CPLD_FP_LED, &buf); + buf &= ~(BIT0); + buf &= ~(BIT1);; + ret = write_cpld(CPLD_FP_LED, buf); + if (ret < 0) + { + printf("setSysLedOn error\n"); + return ret; + } + + return ret; + +} + +int +setSysLedOff() +{ + int ret = -1; + unsigned char buf = 0x00; + + ret = read_cpld(CPLD_FP_LED, &buf); + buf |= 0x11; + ret = write_cpld(CPLD_FP_LED, buf); + if (ret < 0) + { + printf("setSysLedOff error\n"); + return ret; + } + + return ret; + +} + + +static int FAN_PERIOD_TO_RPM(int x) +{ + if (x > (0xf5c2 >> 3)) /*<1000rpm, fan fail*/ + return 0; + + return 3932160 * 2 / x; +} + +int fanPwmGet(int id, int *pwm) +{ + unsigned char data; + unsigned short value; + int ret = -1; + + + if(getCpuId() == 0x01) + { + ret = read_ram_from_cpld(PSOC_PWM_RAM_REG, &data); + //printf("getWdFromCpldRam: ret=%d, data=%u\n", ret, data); + if(ret >= 0) + *pwm = (data * 100)/255; + //*speed = FAN_PERIOD_TO_RPM((*speed & 0x0FFFF)>> 3); + //*speed = FAN_PERIOD_TO_RPM(*speed >> 3); + } + else + { + if(id < FAN_NUM) //emc2305 fan controller + { + if((ret = getCtrlOfBus()) < 0) + return ret; + if((ret = enableChip(fan[id].emc_addr)) < 0) + return ret; + //ret = getFanPresent(id); + //if(ret < 0) + // return ret; + ret = chips_read_byte(fan[id].emc_addr, fan[id].driver_reg, &data);//pwm = speed*255/100 + if(ret < 0) + { + disableChip(fan[id].emc_addr); + return ret; + } + *pwm = (data * 100)/255; + disableChip(fan[id].emc_addr); + } + else + { + if(id == FAN_NUM)//psu fan + { + //unsigned short temp; + + ret = read_psu(0x58, PSU_PWM_REG, &value); + + + //ret = read_psu(0x58, PSU_PWM_REG, &temp); + if(ret < 0) + return ret; + *pwm = value; + } + else if(id == (FAN_NUM + 1)) + { + ret = read_psu(0x59, PSU_PWM_REG, &value); + if(ret < 0) + return ret; + *pwm = value; + } + + } + } + return ret; +} + +int fanSpeedGet(int id, int *speed) +{ + unsigned char data; + unsigned short value; + int ret = -1; + + if(getCpuId() == PSOC_CTRL_SMBUS) + { + if(id <= FAN_NUM - 1) { + ret = read_ram_from_cpld(FAN1_RAM_SPEED_LOW + id * 2 + 1, &data); + if(ret < 0) { + return ret; + } + + *speed = data << 8; + + ret = read_ram_from_cpld(FAN1_RAM_SPEED_LOW + id * 2, &data); + if(ret >= 0) { + *speed |= data ; + } else { + } + } else { + if ((ret = read_ram_short_from_cpld(PSU_RAM_FAN_SPEED_LOW(id-8), &value)) < 0) + return -1; + //*speed = value; + *speed = convert_linear((char *)&value)/100; + } + //*speed = FAN_PERIOD_TO_RPM((*speed & 0x0FFFF)>> 3); + //*speed = FAN_PERIOD_TO_RPM(*speed >> 3); + } + else + { + if(id < FAN_NUM) //emc2305 fan controller + { + if((ret = getCtrlOfBus()) < 0) + return ret; + if((ret = enableChip(fan[id].emc_addr)) < 0) + return ret; + //ret = getFanPresent(id); + //if(ret < 0) + // return ret; + ret = chips_read_byte(fan[id].emc_addr, fan[id].speed_reg, &data); + if(ret < 0) { + disableChip(fan[id].emc_addr); + return ret; + } + *speed = data << 8; + usleep(50000); + ret = chips_read_byte(fan[id].emc_addr, (fan[id].speed_reg+1), &data); + if(ret >= 0) + { + *speed |= data ; + } + //*speed = FAN_PERIOD_TO_RPM((*speed & 0x0FFFF)>> 3); + *speed = FAN_PERIOD_TO_RPM(*speed >> 3); + disableChip(fan[id].emc_addr); + } + else + { + if(id == FAN_NUM) + { + ret = read_psu(0x58, PSU_SPEED_REG, &value); + if(ret < 0) + return ret; + *speed = convert_linear((char *)&value)/100; + } + else if(id == (FAN_NUM + 1)) + { + ret = read_psu(0x59, PSU_SPEED_REG, &value); + if(ret < 0) + return ret; + *speed = convert_linear((char *)&value)/100; + } + } + } + return ret; +} +#define EMC2305_REG_FAN_DRIVE(n) (0x30 + 0x10 * n) +#define EMC2305_REG_FAN_MIN_DRIVE(n) (0x38 + 0x10 * n) +#define EMC2305_REG_FAN_TACH(n) (0x3E + 0x10 * n) + + +int fanInit() +{ + int ret = -1; + int id = 0; + unsigned char sys_fan_speed = 0x66; + + if(getCpuId() == PSOC_CTRL_SMBUS) + { + + //*speed = FAN_PERIOD_TO_RPM((*speed & 0x0FFFF)>> 3); + //*speed = FAN_PERIOD_TO_RPM(*speed >> 3); + } + else + { + for (id = 0; id < FAN_NUM; id++) { + if((ret = getCtrlOfBus()) < 0) + return ret; + if((ret = enableChip(fan[id].emc_addr)) < 0) + return ret; + + /* set minimum drive to 20% */ + ret = chips_write_byte(fan[id].emc_addr, (fan[id].driver_reg-0x30)/0x10+0x38, 0x33); + ret = chips_write_byte(fan[id].emc_addr, fan[id].driver_reg, sys_fan_speed); + if(ret < 0) + { + disableChip(fan[id].emc_addr); + return ret; + } + + disableChip(fan[id].emc_addr); + } + } + return ret; +} +//id 0-based +int fanSpeedSet(int id, unsigned short speed) +{ + int ret = -1; + + if(getCpuId() == PSOC_CTRL_SMBUS) + { + + //*speed = FAN_PERIOD_TO_RPM((*speed & 0x0FFFF)>> 3); + //*speed = FAN_PERIOD_TO_RPM(*speed >> 3); + } + else + { + if(id < FAN_NUM) //emc2305 fan controller + { + if((ret = getCtrlOfBus()) < 0) + return ret; + if((ret = enableChip(fan[id].emc_addr)) < 0) + return ret; + + ret = chips_write_byte(fan[id].emc_addr, fan[id].driver_reg, speed*255/100);//current_pwm_value*255/100 + if(ret < 0) + { + disableChip(fan[id].emc_addr); + return ret; + } + + disableChip(fan[id].emc_addr); + } + else + { + if(id == FAN_NUM)//psu fan + { + //unsigned short temp; + + ret = write_psu(0x58, PSU_PWM_REG, speed); + + //ret = read_psu(0x58, PSU_PWM_REG, &temp); + if(ret < 0) + return ret; + } + else if(id == (FAN_NUM + 1)) + { + ret = write_psu(0x59, PSU_PWM_REG, speed); + if(ret < 0) + return ret; + } + } + } + return ret; +} + + diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/i2c_chips.h b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/i2c_chips.h new file mode 100644 index 00000000..23bdc8ee --- /dev/null +++ b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/i2c_chips.h @@ -0,0 +1,225 @@ +#ifndef I2C_CHIPS_HH +#define I2C_CHIPS_HH + +/* PSU registers */ +#define PSU_STATUS_VOUT 0x7a +#define PSU_STATUS_IOUT 0x7b +#define PSU_STATUS_TEMP 0x7d + +#define PSU_READ_VIN 0x88 +#define PSU_READ_IIN 0x89 +#define PSU_READ_VOUT 0x8b +#define PSU_READ_IOUT 0x8c +#define PSU_READ_TEMP_1 0x8d +#define PSU_READ_POUT 0x96 +#define PSU_READ_PIN 0x97 +#define PSU_PWM_REG 0x3b +#define PSU_SPEED_REG 0x90 + +#define PSU_MFR_ID 0x99 // 7 byte +#define PSU_MFR_MODEL 0x9a // 14 byte +#define PSU_MFR_REVISION 0x9b // 5 byte +#define PSU_MFR_LOCATION 0x9c +#define PSU_MFR_DATE 0x9d +#define PSU_MFR_SERIAL 0x9e +#define PCA9506_IP0_REG 0x00 +#define PCA9506_IP1_REG 0x01 +#define PCA9506_IP2_REG 0x02 +#define PCA9506_IP3_REG 0x03 +#define PCA9506_IP4_REG 0x04 + +#define PCA9506_OP0_REG 0x08 +#define PCA9506_OP1_REG 0x09 +#define PCA9506_OP2_REG 0x0A +#define PCA9506_OP3_REG 0x0B +#define PCA9506_OP4_REG 0x0C + +#define PCA9506_PI0_REG 0x10 +#define PCA9506_PI1_REG 0x11 +#define PCA9506_PI2_REG 0x12 +#define PCA9506_PI3_REG 0x13 +#define PCA9506_PI4_REG 0x14 + +#define PCA9506_IOC0_REG 0x18 +#define PCA9506_IOC1_REG 0x19 +#define PCA9506_IOC2_REG 0x1A +#define PCA9506_IOC3_REG 0x1B +#define PCA9506_IOC4_REG 0x1C + +#define PCA9506_MSK0_REG 0x20 +#define PCA9506_MSK1_REG 0x21 +#define PCA9506_MSK2_REG 0x22 +#define PCA9506_MSK3_REG 0x23 +#define PCA9506_MSK4_REG 0x24 + +#define PCA9506_IO_INPUT 1 +#define PCA9506_IO_OUTPUT 0 + +#define PCA9506_IO_LOW 0 +#define PCA9506_IO_HIGH 1 +#define PCA9506_ADDR 0x20 + + + +struct psuInfo +{ + unsigned int vin; + unsigned int iin; + unsigned int vout; + unsigned int iout; + unsigned int pout; + unsigned int pin; + unsigned int temp; +}; + +struct chips_info +{ + char addr; + char sw_addr; + int channel; + char *name; +}; + +struct dev_info +{ + unsigned char dev_id; + char sw_addr; + int channel; + char *name; +}; + +struct fan_config +{ + char emc_addr; + char speed_reg; + char driver_reg; +}; +struct fan_cpld_reg +{ + unsigned short hight_byte_reg; + unsigned short low_byte_reg; +}; + + +struct ts_info +{ + char ts_addr; + char temp_reg; + char os_reg; +}; + +typedef enum +{ + gpio_in = 0, + gpio_out = 1 +} gpio_dir; + +typedef enum +{ + F2B= 0, + B2F = 1 +} fan_airflow; +typedef enum +{ + green = 0, + red = 1, + yellow = 1 +} gpio_color; +struct led_gpio +{ + int green_gpio; + int red_gpio; +}; + + +int getCtrlOfBus(void); +int enableChip(char addr); +int disableChip(char addr); + +int fanSpeedGet(int id, int *speed); +int fanSpeedSet(int id, unsigned short speed); +int fanPwmGet(int id, int *pwm); + +int tsTempGet(int id, short *temp); +int tsOsGet(int id, unsigned short *temp); +int getTsShutdown(int id); +int setTsShutdown(int id, int shutdown); +int getPsuInfo(int id, struct psuInfo * info); +int getWdFromCpldRam(unsigned char *val); +int getRxpSxpFlag(unsigned char *val); +//int getPsuPresStatus(int id); +int getPSoCVersion(unsigned char *val); +int getTempStatus(unsigned char *val); +unsigned char getCpuId(); +int openChannel(unsigned char dev_id); +int closeChannel(unsigned char dev_id); +int eeprom_enable(unsigned char dev_id); +int eeprom_disable(unsigned char dev_id); +int pca9506_init_pin(unsigned char port, gpio_dir val); +int pca9506_write_pin(unsigned char port, unsigned char val); +int pca9506_read_pin(unsigned char port); + +int fanInit(); +int getFanPresent(int id); +int getFanAirflow(int id); +int getFanStatus(int id); + +int setFanLedGreen(int id); +int setFanLedRed(int id); +int setFanLedYellow(int id); +int setFanLedOff(int id); +int setPsuLedOn(int id); +int setPsuLedOff(int id); +int setSysLedOn(); +int setSysLedOff(); + + +void watchdog_disable(); +/* watchdog timer must less than 1.2s */ +void watchdog_enable(); +void watchdog_service(); + + + +int read_psu(unsigned char addr, unsigned char reg, unsigned short *value); +int write_psu(unsigned char addr, unsigned char reg, unsigned short value); +int setPsuLedOff(int id); +int setPsuLedOn(int id); +int getPsuPresent(int id); + +int biosflash_enable(); +int biosflash_disable(); + + + +struct i2cMutex { + int init_flag; + pthread_mutex_t mutex; + pthread_cond_t lock_free; + volatile int is_locking; +}; + +#define NUM_CHIPS 10 +static const struct chips_info i2c_chips[NUM_CHIPS] = { + {0x50, 0x73, 2, "eeprom"}, + {0x4D, 0x73, 3, "emc2305_1"}, + {0x2E, 0x73, 3, "emc2305_2"}, + {0x58, 0x73, 0, "PSU_L"}, + {0x59, 0x73, 1, "PSU_R"}, + {0x48, 0x73, 4, "lm75_cpu"}, + {0x4E, 0x73, 5, "lm75_out"}, + {0x49, 0x71, 4, "lm75_in"}, + {0x4A, 0x71, 5, "lm75_sw"}, + {0x20, 0x73, 7, "pca9506"}, +}; + + +#ifdef L7_MAX_FANS_PER_UNIT +#define FAN_NUM L7_MAX_FANS_PER_UNIT +#else +#define FAN_NUM 8 +#endif + +#define FANGROUP_NUM 4 + +#endif diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/i2c_dev.c b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/i2c_dev.c new file mode 100644 index 00000000..cff2ef32 --- /dev/null +++ b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/i2c_dev.c @@ -0,0 +1,483 @@ +#include +#include +#include +#include +#include +#include +#include + +#include "i2c_dev.h" + +static int +i2c_write_2b(char addr, __u8 buf[2]) +{ + + int busNum = 1; + dataType type = LEN_BYTE; + int ret = -1; + unsigned char reg; + unsigned char data; + + reg = buf[0]; + data = buf[1]; + + ret = i2c_smbus_write(busNum, addr, reg, type, 1, &data); + return ret; +} + +static int +i2c_write_3b(char addr, __u8 buf[3]) +{ + int busNum = 1; + dataType type = LEN_WORD; + int ret = -1; + char data[2]; + + data[0] = buf[1]; + data[1] = buf[2]; + + ret = i2c_smbus_write(busNum, addr, buf[0], type, 1, (unsigned char *)&data); + + return ret; +} + +static inline int +i2c_smbus_access(int file, char read_write, __u8 command, + int size, union i2c_smbus_data *data) +{ + struct i2c_smbus_ioctl_data args; + int ret; + + args.read_write = read_write; + args.command = command; + args.size = size; + args.data = data; + + ret = ioctl(file, I2C_SMBUS, &args); + + return ret; +} + +static int +i2c_smbus_write_word_data(int file, __u8 command, + __u16 value) +{ + union i2c_smbus_data data; + data.word = value; + return i2c_smbus_access(file, I2C_SMBUS_WRITE, command, + I2C_SMBUS_WORD_DATA, &data); +} + +static int +i2c_smbus_write_byte_data(int file, __u8 command, + __u8 value) +{ + union i2c_smbus_data data; + data.byte = value; + return i2c_smbus_access(file, I2C_SMBUS_WRITE, command, + I2C_SMBUS_BYTE_DATA, &data); +} + +static int +i2c_smbus_read_byte(int file,__u8 *buf) +{ + union i2c_smbus_data data; + if (i2c_smbus_access(file,I2C_SMBUS_READ,0,I2C_SMBUS_BYTE,&data)) { + return -1; + } else { + *buf = 0x0FF & data.byte; + return 0; + } +} +static int +i2_smbus_read_only(int busNum, short addr, dataType type, + int size,__u8 *buf) +{ + int i; + int fd; + int ret = -1; + char fname[20]; + + sprintf(fname, "/dev/i2c-%d", busNum); + fd = open(fname, O_RDWR); + + if(fd < 0) + return ret; + + ret = ioctl(fd, I2C_SLAVE, addr); + + if(LEN_BYTE == type) { + for(i=0; i> 8) & 0x0FF; + buf[2*i] = val & 0x0FF; + } + } + close(fd); + return ret; +} + + + +int i2c_smbus_write_pec(int busNum, short addr, __u8 reg, dataType type, + int pec_flag, __u8 *buf) +{ + int fd; + int ret = -1; + short val; + char fname[20]; + + sprintf(fname, "/dev/i2c-%d", busNum); + fd = open(fname, O_RDWR); + + if(fd < 0) + return ret; + + ret = ioctl(fd, I2C_SLAVE, addr); + ret = ioctl(fd, I2C_PEC, pec_flag); + if(LEN_BYTE == type) { + ret = i2c_smbus_write_byte_data(fd, reg, buf[0]); + } else { + val = (((unsigned short)(buf[1])) << 8) | buf[0]; + //val = (((unsigned short)(buf[2*i])) << 8) | buf[2*i+1]; + ret = i2c_smbus_write_word_data(fd, reg, val); + } + close(fd); + return ret; +} + +int i2c_smbus_write_block_data(int busNum, short addr, __u8 command, + __u8 length, const __u8 *values) +{ + union i2c_smbus_data data; + int i; + int fd; + int ret = -1; + char fname[20]; + + if (length > 32) + length = 32; + for (i = 1; i <= length; i++) + data.block[i] = values[i-1]; + data.block[0] = length; + + + sprintf(fname, "/dev/i2c-%d", busNum); + fd = open(fname, O_RDWR); + + if(fd < 0) + return ret; + + ret = ioctl(fd, I2C_SLAVE, addr); + ret = ioctl(fd, I2C_PEC, 1); + + ret = i2c_smbus_access(fd,I2C_SMBUS_WRITE,command, + I2C_SMBUS_BLOCK_DATA, &data); + close(fd); + return ret; +} + +int i2c_smbus_read_16reg(int busNum, short addr, short reg, + int size, __u8 *buf) +{ + int i; + int fd; + int ret = -1; + char regNum[2]; + char fname[20]; + struct i2c_rdwr_ioctl_data ioctl_data; + struct i2c_msg msgs[2]; + + sprintf(fname, "/dev/i2c-%d", busNum); + fd = open(fname, O_RDWR); + if(fd < 0) + return ret; + + ret = ioctl(fd, I2C_SLAVE, addr); + + for(i=0; i> 8) & 0x0FF; + msgs[0].addr= addr; + msgs[0].len= 2; + msgs[0].buf= regNum; + msgs[1].addr= addr; + msgs[1].flags |= I2C_M_RD; + msgs[1].len= 1; + msgs[1].buf= (char *)&buf[i]; + ioctl_data.nmsgs= 2; + ioctl_data.msgs= msgs; + ret = ioctl(fd, I2C_RDWR, &ioctl_data); + if(ret) + break; + } + close(fd); + return ret; +} +//obsoleted +int i2c_smbus_write_16reg(int busNum, short addr, short reg, + int size, const __u8 *buf) +{ + int i; + int fd; + int ret = -1; + char wBuf[3]; + char fname[20]; + struct i2c_rdwr_ioctl_data ioctl_data; + struct i2c_msg msg; + + sprintf(fname, "/dev/i2c-%d", busNum); + fd = open(fname, O_RDWR); + + if(fd < 0) + return ret; + ret = ioctl(fd, I2C_SLAVE, addr); + + for(i=0; i> 8) & 0x0FF; + wBuf[2] = buf[i]; + msg.addr= addr; + msg.flags = 0; + msg.len= 3; + msg.buf= wBuf; + ioctl_data.nmsgs= 1; + ioctl_data.msgs= &msg; + ret = ioctl(fd, I2C_RDWR, &ioctl_data); + if(ret) + break; + } + close(fd); + return ret; +} + +int i2c_smbus_write_16reg_8byte(int busNum, short addr, short reg, + int size, const __u8 *buf) +{ + int i; + int fd; + int ret = -1; + char wBuf[10]; + char fname[20]; + struct i2c_rdwr_ioctl_data ioctl_data; + struct i2c_msg msg; + + sprintf(fname, "/dev/i2c-%d", busNum); + fd = open(fname, O_RDWR); + + if(fd < 0) + return ret; + + for(i=0; i> 8) & 0x0FF; + memcpy(&wBuf[2],&buf[i], 8); + msg.addr= addr; + msg.flags = 0; + msg.len= 10+1; + msg.buf= wBuf; + ioctl_data.nmsgs= 1; + ioctl_data.msgs= &msg; + ret = ioctl(fd, I2C_RDWR, &ioctl_data); + if(ret) + break; + } + close(fd); + return ret; +} + +int chips_read_byte(char addr, __u8 reg, __u8 *data) +{ + char busNum = 1; + dataType type = LEN_BYTE; + int ret = -1; + ret = i2_smbus_read(busNum, addr, reg, type, 1, data); + return ret; +} + +int chips_read_word(char addr, __u8 reg, unsigned short *data) +{ + int busNum = 1; + unsigned char buf[2]; + dataType type = LEN_WORD; + int ret = -1; + ret = i2_smbus_read(busNum, addr, reg, type, 1, buf); + if(ret >= 0) + { + *data = ((unsigned short)buf[1] << 8) | buf[0]; + } + return ret; +} + +int +chips_write_word(char addr, __u8 reg, unsigned short data) +{ + int busNum = 1; + dataType type = LEN_WORD; + int ret = -1; + unsigned char buf[2] = + { (data >> 8) & 0x00ff, data & 0x00ff}; + ret = i2c_smbus_write(busNum, addr, reg, type, 1, (unsigned char *)&buf); + //ret = i2c_smbus_write(busNum, addr, reg, type, 1, (char *)&data); + return ret; +} + +int +chips_write_word_pec(char addr, __u8 reg, unsigned short data, int pec_flag) +{ + int busNum = 1; + dataType type = LEN_WORD; + int ret = -1; + ret = i2c_smbus_write_pec(busNum, addr, reg, type, pec_flag, (unsigned char *)&data); + return ret; +} + +int +chips_write_block(char addr, __u8 reg, int byteCnt, unsigned char* wrData) +{ + int busNum = 1; + int ret = -1; + + ret = i2c_smbus_write_block_data(busNum, addr, reg, byteCnt, wrData); + return ret; +} + +int +chips_write_byte(char addr, __u8 reg, const __u8 data) +{ + int busNum = 1; + dataType type = LEN_BYTE; + int ret = -1; + ret = i2c_smbus_write(busNum, addr, reg, type, 1, (unsigned char *)&data); + return ret; +} + +int +i2c_smbus_write(int busNum, short addr, __u8 reg, dataType type, + int size, __u8 *buf) +{ + int i; + int fd; + int ret = -1; + short val; + char fname[20]; + + sprintf(fname, "/dev/i2c-%d", busNum); + fd = open(fname, O_RDWR); + if(fd < 0) + return ret; + + ret = ioctl(fd, I2C_SLAVE, addr); + if(LEN_BYTE == type) + { + for(i=0; i> 8) & 0x0ff, mem_addr & 0x0ff }; + ret = i2c_write_2b(addr, buf); + + if (ret < 0) + return ret; + ret = i2_smbus_read_only(busNum, addr, type, 1, data); + return ret; +} + +int +eeprom_write_byte(char addr, __u16 mem_addr, __u8 data) +{ + __u8 buf[3] = + { (mem_addr >> 8) & 0x00ff, mem_addr & 0x00ff, data }; + return i2c_write_3b(addr, buf); +} + diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/i2c_dev.h b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/i2c_dev.h new file mode 100644 index 00000000..0262e6e5 --- /dev/null +++ b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/i2c_dev.h @@ -0,0 +1,158 @@ +#ifndef I2C_DEV_HH +#define I2C_DEV_HH + +#include +#include + +typedef enum data_len +{ + LEN_BYTE, + LEN_WORD, +}dataType; + +/* ----- commands for the ioctl like i2c_command call: + * note that additional calls are defined in the algorithm and hw + * dependent layers - these can be listed here, or see the + * corresponding header files. + */ + /* -> bit-adapter specific ioctls */ +#define I2C_RETRIES 0x0701 /* number of times a device address */ + /* should be polled when not */ + /* acknowledging */ +#define I2C_TIMEOUT 0x0702 /* set timeout - call with int */ + + +/* this is for i2c-dev.c */ +#define I2C_SLAVE 0x0703 /* Change slave address */ + /* Attn.: Slave address is 7 or 10 bits */ +#define I2C_SLAVE_FORCE 0x0706 /* Change slave address */ + /* Attn.: Slave address is 7 or 10 bits */ + /* This changes the address, even if it */ + /* is already taken! */ +#define I2C_TENBIT 0x0704 /* 0 for 7 bit addrs, != 0 for 10 bit */ + +#define I2C_FUNCS 0x0705 /* Get the adapter functionality */ +#define I2C_RDWR 0x0707 /* Combined R/W transfer (one stop only)*/ +#define I2C_PEC 0x0708 /* != 0 for SMBus PEC */ + +#define I2C_SMBUS 0x0720 /* SMBus-level access */ + +/* smbus_access read or write markers */ +#define I2C_SMBUS_READ 1 +#define I2C_SMBUS_WRITE 0 + +/* + * I2C Message - used for pure i2c transaction, also from /dev interface + */ +struct i2c_msg { + __u16 addr; /* slave address */ + unsigned short flags; +#define I2C_M_TEN 0x10 /* we have a ten bit chip address */ +#define I2C_M_RD 0x01 +#define I2C_M_NOSTART 0x4000 +#define I2C_M_REV_DIR_ADDR 0x2000 +#define I2C_M_IGNORE_NAK 0x1000 +#define I2C_M_NO_RD_ACK 0x0800 + short len; /* msg length */ + char *buf; /* pointer to msg data */ +}; + +/* To determine what functionality is present */ + +#define I2C_FUNC_I2C 0x00000001 +#define I2C_FUNC_10BIT_ADDR 0x00000002 +#define I2C_FUNC_PROTOCOL_MANGLING 0x00000004 /* I2C_M_{REV_DIR_ADDR,NOSTART,..} */ +#define I2C_FUNC_SMBUS_PEC 0x00000008 +#define I2C_FUNC_SMBUS_BLOCK_PROC_CALL 0x00008000 /* SMBus 2.0 */ +#define I2C_FUNC_SMBUS_QUICK 0x00010000 +#define I2C_FUNC_SMBUS_READ_BYTE 0x00020000 +#define I2C_FUNC_SMBUS_WRITE_BYTE 0x00040000 +#define I2C_FUNC_SMBUS_READ_BYTE_DATA 0x00080000 +#define I2C_FUNC_SMBUS_WRITE_BYTE_DATA 0x00100000 +#define I2C_FUNC_SMBUS_READ_WORD_DATA 0x00200000 +#define I2C_FUNC_SMBUS_WRITE_WORD_DATA 0x00400000 +#define I2C_FUNC_SMBUS_PROC_CALL 0x00800000 +#define I2C_FUNC_SMBUS_READ_BLOCK_DATA 0x01000000 +#define I2C_FUNC_SMBUS_WRITE_BLOCK_DATA 0x02000000 +#define I2C_FUNC_SMBUS_READ_I2C_BLOCK 0x04000000 /* I2C-like block xfer */ +#define I2C_FUNC_SMBUS_WRITE_I2C_BLOCK 0x08000000 /* w/ 1-byte reg. addr. */ + +#define I2C_FUNC_SMBUS_BYTE (I2C_FUNC_SMBUS_READ_BYTE | \ + I2C_FUNC_SMBUS_WRITE_BYTE) +#define I2C_FUNC_SMBUS_BYTE_DATA (I2C_FUNC_SMBUS_READ_BYTE_DATA | \ + I2C_FUNC_SMBUS_WRITE_BYTE_DATA) +#define I2C_FUNC_SMBUS_WORD_DATA (I2C_FUNC_SMBUS_READ_WORD_DATA | \ + I2C_FUNC_SMBUS_WRITE_WORD_DATA) +#define I2C_FUNC_SMBUS_BLOCK_DATA (I2C_FUNC_SMBUS_READ_BLOCK_DATA | \ + I2C_FUNC_SMBUS_WRITE_BLOCK_DATA) +#define I2C_FUNC_SMBUS_I2C_BLOCK (I2C_FUNC_SMBUS_READ_I2C_BLOCK | \ + I2C_FUNC_SMBUS_WRITE_I2C_BLOCK) + +/* Old name, for compatibility */ +#define I2C_FUNC_SMBUS_HWPEC_CALC I2C_FUNC_SMBUS_PEC + +/* + * Data for SMBus Messages + */ +#define I2C_SMBUS_BLOCK_MAX 32 /* As specified in SMBus standard */ +#define I2C_SMBUS_I2C_BLOCK_MAX 32 /* Not specified but we use same structure */ + +union i2c_smbus_data { + __u8 byte; + __u16 word; + __u8 block[I2C_SMBUS_BLOCK_MAX + 2]; /* block[0] is used for length */ + /* and one more for PEC */ +}; + +/* SMBus transaction types (size parameter in the above functions) + Note: these no longer correspond to the (arbitrary) PIIX4 internal codes! */ +#define I2C_SMBUS_QUICK 0 +#define I2C_SMBUS_BYTE 1 +#define I2C_SMBUS_BYTE_DATA 2 +#define I2C_SMBUS_WORD_DATA 3 +#define I2C_SMBUS_PROC_CALL 4 +#define I2C_SMBUS_BLOCK_DATA 5 +#define I2C_SMBUS_I2C_BLOCK_BROKEN 6 +#define I2C_SMBUS_BLOCK_PROC_CALL 7 /* SMBus 2.0 */ +#define I2C_SMBUS_I2C_BLOCK_DATA 8 + + +/* This is the structure as used in the I2C_SMBUS ioctl call */ +struct i2c_smbus_ioctl_data { + __u8 read_write; + __u8 command; + __u32 size; + union i2c_smbus_data *data; +}; + +/* This is the structure as used in the I2C_RDWR ioctl call */ +struct i2c_rdwr_ioctl_data { + struct i2c_msg *msgs; /* pointers to i2c_msgs */ + __u32 nmsgs; /* number of i2c_msgs */ +}; + +int i2_smbus_read(int busNum, short addr, __u8 reg, dataType type, + int size, __u8 *buf); +int i2c_smbus_write(int busNum, short addr, __u8 reg, dataType type, + int size, __u8 *buf); +int i2c_smbus_write_pec(int busNum, short addr, __u8 reg, dataType type, + int pec_flag, __u8 *buf); +int chips_write_block(char addr, __u8 reg, int byteCnt, unsigned char* wrData); + +int i2c_smbus_read_16reg(int busNum, short addr, short reg, + int size, __u8 *buf); +int i2c_smbus_write_16reg(int busNum, short addr, short reg, + int size, const __u8 *buf); +int i2c_smbus_write_16reg_8byte(int busNum, short addr, short reg, + int size, const __u8 *buf); +int chips_read_byte(char addr, __u8 reg, __u8 *data); +int chips_write_byte(char addr, __u8 reg, const __u8 data); +int chips_read_word(char addr, __u8 reg, unsigned short *data); +int chips_write_word(char addr, __u8 reg, unsigned short data); +int chips_write_word_pec(char addr, __u8 reg, unsigned short data, int pec_flag); + + +int eeprom_read_byte(char addr, __u16 mem_addr, __u8 *data); +int eeprom_write_byte(char addr, __u16 mem_addr, __u8 data); + +#endif diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/ledi.c b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/ledi.c new file mode 100644 index 00000000..63a05210 --- /dev/null +++ b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/ledi.c @@ -0,0 +1,141 @@ +#include +#include +#include +#include +#include + +#include "i2c_chips.h" +#include "platform.h" + +/* + * Get the information for the given LED OID. + */ +static onlp_led_info_t led_info[] = +{ + { + { ONLP_LED_ID_CREATE(LED_SYSTEM), "Chassis System LED(DIAG LED)", 0 }, + ONLP_LED_STATUS_PRESENT, + ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_ORANGE | ONLP_LED_CAPS_GREEN, + }, + { + { ONLP_LED_ID_CREATE(LED_FAN_1), "Chassis FAN(1) LED", 0 }, + ONLP_LED_STATUS_PRESENT, + ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_ORANGE | ONLP_LED_CAPS_GREEN | ONLP_LED_CAPS_AUTO, + }, + { + { ONLP_LED_ID_CREATE(LED_FAN_2), "Chassis FAN(2) LED", 0 }, + ONLP_LED_STATUS_PRESENT, + ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_ORANGE | ONLP_LED_CAPS_GREEN | ONLP_LED_CAPS_AUTO, + }, + { + { ONLP_LED_ID_CREATE(LED_FAN_3), "Chassis FAN(3) LED", 0 }, + ONLP_LED_STATUS_PRESENT, + ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_ORANGE | ONLP_LED_CAPS_GREEN | ONLP_LED_CAPS_AUTO, + }, + { + { ONLP_LED_ID_CREATE(LED_FAN_4), "Chassis FAN(4) LED", 0 }, + ONLP_LED_STATUS_PRESENT, + ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_ORANGE | ONLP_LED_CAPS_GREEN | ONLP_LED_CAPS_AUTO, + }, + { + { ONLP_LED_ID_CREATE(LED_FAN_5), "Chassis FAN(5) LED", 0 }, + ONLP_LED_STATUS_PRESENT, + ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_ORANGE | ONLP_LED_CAPS_GREEN | ONLP_LED_CAPS_AUTO, + }, + { + { ONLP_LED_ID_CREATE(LED_FAN_6), "Chassis FAN(6) LED", 0 }, + ONLP_LED_STATUS_PRESENT, + ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_ORANGE | ONLP_LED_CAPS_GREEN | ONLP_LED_CAPS_AUTO, + }, + { + { ONLP_LED_ID_CREATE(LED_FAN_7), "Chassis FAN(7) LED", 0 }, + ONLP_LED_STATUS_PRESENT, + ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_ORANGE | ONLP_LED_CAPS_GREEN | ONLP_LED_CAPS_AUTO, + }, + { + { ONLP_LED_ID_CREATE(LED_FAN_8), "Chassis FAN(8) LED", 0 }, + ONLP_LED_STATUS_PRESENT, + ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_ORANGE | ONLP_LED_CAPS_GREEN | ONLP_LED_CAPS_AUTO, + }, + { + { ONLP_LED_ID_CREATE(LED_PSU_1), "Chassis PSU(1) LED", 0 }, + ONLP_LED_STATUS_PRESENT, + ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_ORANGE | ONLP_LED_CAPS_GREEN | ONLP_LED_CAPS_AUTO, + }, + { + { ONLP_LED_ID_CREATE(LED_PSU_2), "Chassis PSU(2) LED", 0 }, + ONLP_LED_STATUS_PRESENT, + ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_ORANGE | ONLP_LED_CAPS_GREEN | ONLP_LED_CAPS_AUTO, + } +}; + +int +onlp_ledi_init(void) +{ + return ONLP_STATUS_OK; +} + +int +onlp_ledi_info_get(onlp_oid_t id, onlp_led_info_t* info) +{ + + int led_id; + + led_id = ONLP_OID_ID_GET(id) - 1; + + *info = led_info[led_id]; + info->status |= ONLP_LED_STATUS_ON; + info->mode |= ONLP_LED_MODE_ON; + + return ONLP_STATUS_OK; +} + +int +onlp_ledi_set(onlp_oid_t id, int on_or_off) +{ + if (!on_or_off) + return onlp_ledi_mode_set(id, ONLP_LED_MODE_OFF); + else + return onlp_ledi_mode_set(id, ONLP_LED_MODE_ON); +} + +int +onlp_ledi_mode_set(onlp_oid_t id, onlp_led_mode_t mode) +{ + int led_id, psu; + + led_id = ONLP_OID_ID_GET(id) - 1; + switch (led_id) { + case LED_SYSTEM: + if (mode == ONLP_LED_MODE_OFF) + setSysLedOff(); + else + setSysLedOn(); + break; + case LED_FAN_1: + case LED_FAN_2: + case LED_FAN_3: + case LED_FAN_4: + case LED_FAN_5: + case LED_FAN_6: + case LED_FAN_7: + case LED_FAN_8: + if (mode == ONLP_LED_MODE_OFF) + setFanLedOff(led_id); + else + setFanLedGreen(led_id); + break; + case LED_PSU_1: + case LED_PSU_2: + psu = led_id - LED_PSU_1; + if (mode == ONLP_LED_MODE_OFF) + setPsuLedOn(psu); + else + setPsuLedOff(psu); + break; + default: + return ONLP_STATUS_E_INTERNAL; + break; + } + return ONLP_STATUS_OK; +} diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/module/src/make.mk b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/make.mk similarity index 98% rename from packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/module/src/make.mk rename to packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/make.mk index 403fc11c..d7345b17 100644 --- a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/module/src/make.mk +++ b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/make.mk @@ -1,6 +1,6 @@ ############################################################################### # -# +# # ############################################################################### diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/platform.h b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/platform.h new file mode 100644 index 00000000..8753f424 --- /dev/null +++ b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/platform.h @@ -0,0 +1,28 @@ +#ifndef _PLATFORM_REDSTONE_H_ +#define _PLATFORM_REDSTONE_H_ + +#define FAN_COUNT 10 +#define PSU_FAN 8 +#define THERMAL_COUNT 6 +#define LED_COUNT 11 + +#define THERMAL_MAIN_BOARD_REAR 0 +#define THERMAL_BCM 1 +#define THERMAL_CPU 2 +#define THERMAL_MAIN_BOARD_FRONT 3 +#define THERMAL_PSU1 4 +#define THERMAL_PSU2 5 + +#define LED_SYSTEM 0 +#define LED_FAN_1 1 +#define LED_FAN_2 2 +#define LED_FAN_3 3 +#define LED_FAN_4 4 +#define LED_FAN_5 5 +#define LED_FAN_6 6 +#define LED_FAN_7 7 +#define LED_FAN_8 8 +#define LED_PSU_1 9 +#define LED_PSU_2 10 + +#endif /* _PLATFORM_REDSTONE_H_ */ diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/psui.c b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/psui.c new file mode 100644 index 00000000..a3f426cc --- /dev/null +++ b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/psui.c @@ -0,0 +1,50 @@ +#include + +#include "i2c_chips.h" +#include "platform.h" + +static +onlp_psu_info_t psu_info[] = +{ + { + { ONLP_PSU_ID_CREATE(1), "PSU-1", 0 }, + }, + { + { ONLP_PSU_ID_CREATE(2), "PSU-2", 0 }, + } +}; + +int +onlp_psui_init(void) +{ + return ONLP_STATUS_OK; +} + +int +onlp_psui_info_get(onlp_oid_t id, onlp_psu_info_t* info) +{ + int psu_id; + struct psuInfo psu; + + psu_id = ONLP_OID_ID_GET(id) - 1; + *info = psu_info[psu_id]; + + if (!getPsuPresent(psu_id)) + info->status |= ONLP_PSU_STATUS_PRESENT; + else + return ONLP_STATUS_E_MISSING; + + getPsuInfo(psu_id, &psu); + + info->mvin = psu.vin; + info->mvout = psu.vout; + info->miin = psu.iin; + info->miout = psu.iout; + info->mpin = psu.pin; + info->mpout = psu.pout; + + if (!(info->mpin)) + info->status |= ONLP_PSU_STATUS_UNPLUGGED; + + return ONLP_STATUS_OK; +} diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/redstone_cpld.c b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/redstone_cpld.c new file mode 100644 index 00000000..f70b3178 --- /dev/null +++ b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/redstone_cpld.c @@ -0,0 +1,322 @@ +#include +#include +#include + +#include +#include "x86_64_cel_redstone_xp_log.h" +#include "x86_64_cel_redstone_xp_int.h" +#include "redstone_cpld.h" + +int +cpld_io_init(void) +{ + /* Initialize LPC access ports */ + if(ioperm(0x100, 0x2FF, 1) == -1) { + AIM_LOG_ERROR("ioperm() failed: %{errno}", errno); + return -1; + } + return 0; +} + +int +cpld_read(int addr) +{ + return inb(addr); +} + +void +cpld_write(int addr, uint8_t value) +{ + outb(value, addr); +} + +int read_cpld(int reg, unsigned char *value) +{ + *value = inb(reg); + return 0; +} +int write_cpld(int reg, unsigned char value) +{ + outb(value, reg); + return 0; +} + +void +cpld_modify(int addr, uint8_t andmask, uint8_t ormask) +{ + int v; + read_cpld(addr, (unsigned char *)&v); + v &= andmask; + v |= ormask; + cpld_write(addr, v); +} + +int +cpld_dump(aim_pvs_t* pvs, int cpldid) +{ + int data; + + aim_map_si_t* si; + aim_map_si_t* maps[] = { + cpld1_reg_map, + cpld2_reg_map, + cpld3_reg_map, + cpld4_reg_map, + cpld5_reg_map, + }; + if(cpldid < 1 || cpldid > 5) { + aim_printf(pvs, "Invalid CPLDID %d\n", cpldid); + return -1; + } + else { + for(si = maps[cpldid-1]; si->s; si++) { + read_cpld(si->i, (unsigned char *)&data); + aim_printf(pvs, " %32.32s [0x%.2x] = 0x%.2x %{8bits}\n", si->s, si->i, data, data); + } + } + return 0; +} + + +#define PORT_BANK1_START 1 +#define PORT_BANK1_END 18 +#define PORT_BANK2_START 19 +#define PORT_BANK2_END 36 +#define PORT_BANK3_START 37 +#define PORT_BANK3_END 48 +#define PORT_BANK4_START 49 +#define PORT_BANK4_END 54 +int +read_sfp(int portID, char devAddr, char reg, char *data, int len) +{ + int count; + char byte; + short temp; + short portid, opcode, devaddr, cmdbyte0, ssrr, writedata = 0, readdata; + int ioBase = 0; + + cpld_io_init(); + + if ((reg + len) > 256) + return -1; + + if ((portID >= PORT_BANK1_START) && (portID <= PORT_BANK1_END)) { + portid = 0x210; + opcode = 0x211; + devaddr = 0x212; + cmdbyte0 = 0x213; + ssrr = 0x216; + writedata = 0x220; + readdata = 0x230; + + while ((inb(ioBase + ssrr) & 0x40)); + + if ((inb(ioBase + ssrr) & 0x80) == 0x80) { + outb(0x00, ioBase + ssrr); + usleep(3000); + outb(0x01, ioBase + ssrr); + return -1; + } + } else if ((portID >= PORT_BANK2_START) && (portID <= PORT_BANK2_END)) { + portid = 0x290; + opcode = 0x291; + devaddr = 0x292; + cmdbyte0 = 0x293; + ssrr = 0x296; + writedata = 0x2A0; + readdata = 0x2B0; + + while ((inb(ioBase + ssrr) & 0x40)); + + if ((inb(ioBase + ssrr) & 0x80) == 0x80) { + outb(0x00, ioBase + ssrr); + usleep(3000); + outb(0x01, ioBase + ssrr); + return -1; + } + } else if ((portID >= PORT_BANK3_START) && (portID <= PORT_BANK3_END)) { + portid = 0x390; + opcode = 0x391; + devaddr = 0x392; + cmdbyte0 = 0x393; + ssrr = 0x396; + writedata = 0x3A0; + readdata = 0x3B0; + + while ((inb(ioBase + ssrr) & 0x40)); + + if ((inb(ioBase + ssrr) & 0x80) == 0x80) { + outb(0x00, ioBase + ssrr); + usleep(3000); + outb(0x01, ioBase + ssrr); + return -1; + } + } else if ((portID >= PORT_BANK4_START) && (portID <= PORT_BANK4_END)) { + portid = 0x310; + opcode = 0x311; + devaddr = 0x312; + cmdbyte0 = 0x313; + ssrr = 0x316; + writedata = 0x320; + readdata = 0x330; + + while ((inb(ioBase + ssrr) & 0x40)); + + if ((inb(ioBase + ssrr) & 0x80) == 0x80) { + outb(0x00, ioBase + ssrr); + usleep(3000); + outb(0x01, ioBase + ssrr); + return -1; + } + } else { + return -1; + } + + byte = 0x40 + portID; + outb(byte, ioBase + portid); + outb(reg,ioBase + cmdbyte0); + + while (len > 0) { + count = (len >= 8) ? 8 : len; + len -= count; + byte = count * 16 + 1; + outb(byte, ioBase + opcode); + devAddr |= 0x01; + outb(devAddr, ioBase + devaddr); + + while ((inb(ioBase + ssrr) & 0x40)) + usleep(100); + + if ((inb(ioBase + ssrr) & 0x80) == 0x80) { + outb(0x00, ioBase + ssrr); + usleep(3000); + outb(0x01, ioBase + ssrr); + return -1; + } + + temp = ioBase + readdata; + + while (count-- > 0) { + char read_byte; + read_byte = inb(temp); + *(data++) = read_byte; + temp++; + } + + if (len > 0) { + reg += 0x08; + outb(reg, ioBase + cmdbyte0); + } + } + return writedata * 0; +} + +int +write_sfp(int portID, char devAddr, char reg, char *data, int len) +{ + int count; + char byte; + short temp; + short portid, opcode, devaddr, cmdbyte0, ssrr, writedata, readdata; + int ioBase = 0; + + if ((reg + len) > 256) + return -1; + + if ((portID >= PORT_BANK1_START) && (portID <= PORT_BANK1_END)) { + portid = 0x210; + opcode = 0x211; + devaddr = 0x212; + cmdbyte0 = 0x213; + ssrr = 0x216; + writedata = 0x220; + readdata = 0x230; + while ((inb(ioBase + ssrr) & 0x40)); + if ((inb(ioBase + ssrr) & 0x80) == 0x80) { + outb(0x00, ioBase + ssrr); + usleep(3000); + outb(0x01, ioBase + ssrr); + return -1; + } + } else if ((portID >= PORT_BANK2_START) && (portID <= PORT_BANK2_END)) { + portid = 0x290; + opcode = 0x291; + devaddr = 0x292; + cmdbyte0 = 0x293; + ssrr = 0x296; + writedata = 0x2A0; + readdata = 0x2B0; + while ((inb(ioBase + ssrr) & 0x40)); + if ((inb(ioBase + ssrr) & 0x80) == 0x80) { + outb(0x00, ioBase + ssrr); + usleep(3000); + outb(0x01, ioBase + ssrr); + return -1; + } + } else if ((portID >= PORT_BANK3_START) && (portID <= PORT_BANK3_END)) { + portid = 0x390; + opcode = 0x391; + devaddr = 0x392; + cmdbyte0 = 0x393; + ssrr = 0x396; + writedata = 0x3A0; + readdata = 0x3B0; + while ((inb(ioBase + ssrr) & 0x40)); + if ((inb(ioBase + ssrr) & 0x80) == 0x80) { + outb(0x00, ioBase + ssrr); + usleep(3000); + outb(0x01, ioBase + ssrr); + return -1; + } + } else if ((portID >= PORT_BANK4_START) && (portID <= PORT_BANK4_END)) { + portid = 0x310; + opcode = 0x311; + devaddr = 0x312; + cmdbyte0 = 0x313; + ssrr = 0x316; + writedata = 0x320; + readdata = 0x330; + while ((inb(ioBase + ssrr) & 0x40)); + if ((inb(ioBase + ssrr) & 0x80) == 0x80) { + outb(0x00, ioBase + ssrr); + usleep(3000); + outb(0x01, ioBase + ssrr); + return -1; + } + } else { + return -1; + } + + byte = 0x40 + portID; + outb(byte, ioBase + portid); + outb(reg, ioBase + cmdbyte0); + while (len > 0) { + count = (len >= 8) ? 8 : len; + len -= count; + byte = (count << 4) + 1; + outb(byte, ioBase + opcode); + temp = ioBase + writedata; + while (count-- > 0) { + outb(*(data++), temp); + temp += 0x01; + } + devAddr &= 0xfe; + outb(devAddr, ioBase + devaddr); + while ((inb(ioBase + ssrr) & 0x40)) + { + usleep(100); + } + if ((inb(ioBase + ssrr) & 0x80) == 0x80) { + outb(0x00, ioBase + ssrr); + usleep(3000); + outb(0x01, ioBase + ssrr); + return -1; + } + if (len > 0) { + reg += 0x08; + outb(ioBase + cmdbyte0, reg); + } + } + return writedata * readdata * 0; +} + diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/redstone_cpld.h b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/redstone_cpld.h new file mode 100644 index 00000000..2dffc7b2 --- /dev/null +++ b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/redstone_cpld.h @@ -0,0 +1,69 @@ +#ifndef _REDSTONE_CPLD_H_ +#define _REDSTONE_CPLD_H_ + +#include +#include +#include + +#define BIT0 0x1 +#define BIT1 0x1 << 1 +#define BIT2 0x1 << 2 +#define BIT3 0x1 << 3 +#define BIT4 0x1 << 4 +#define BIT5 0x1 << 5 +#define BIT6 0x1 << 6 +#define BIT7 0x1 << 7 + +typedef struct RegData +{ + unsigned short regId; /*register number*/ + char val; /*register value*/ + unsigned char rw; /*0:read 1:write*/ +}RegData_t; + +typedef struct SfpData +{ + char regId; + int portId; + char devAddr; + char val[256]; + unsigned char rw; + unsigned char len; +}SfpData_t; + +#define CPLD_TYPE ( 0x89 ) +#define IOCTL_READ_REG _IOR(CPLD_TYPE,0x05,RegData_t) +#define IOCTL_WRITE_REG _IOW(CPLD_TYPE,0x08,RegData_t) +#define IOCTL_SFP_READ _IOR(CPLD_TYPE,0x0F,RegData_t) +#define IOCTL_SFP_WRITE _IOW(CPLD_TYPE,0x10,RegData_t) + +#define CPLD1_REVISION 0x100 +#define CPLD_RESET_CONTROL 0x102 + +#define CPLD2_REVISION 0x200 +#define CPLD3_REVISION 0x280 +#define CPLD4_REVISION 0x300 +#define CPLD5_REVISION 0x380 +#define CPLD_FAN_PRESENT 0x194 +#define CPLD_FAN_STATUS_1 0x195 +#define CPLD_FAN_STATUS_2 0x195 +#define CPLD_PSU_STATUS 0x197 +#define CPLD_FP_LED 0x303 + + +int cpldRegRead(int regId, unsigned char *data, int size); +int cpldRegWrite(int regId, unsigned char *data, int size); +int cpldVersionGet(int cpld); + +int read_cpld(int reg, unsigned char *value); +int write_cpld(int reg, unsigned char value); +int read_sfp(int portID, char devAddr, char reg, char *data, int len); +int write_sfp(int portID, char devAddr, char reg, char *data, int len); + +int cpld_io_init(void); +int cpld_read(int addr); +void cpld_write(int addr, uint8_t value); +void cpld_modify(int addr, uint8_t andmask, uint8_t ormask); +int cpld_dump(aim_pvs_t* pvs, int cpldid); + +#endif /* _REDSTONE_CPLD_H_ */ diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/sfp_xfp.h b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/sfp_xfp.h new file mode 100644 index 00000000..2d51782c --- /dev/null +++ b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/sfp_xfp.h @@ -0,0 +1,294 @@ +#ifndef INCLUDE_SFP_XFP +#define INCLUDE_SFP_XFP + +/* SFP I2C parameters start here */ +/* 0xA0 */ +#define SFP_REVISION_ADDR 56 +#define SFP_REVISION_SIZE 1 +#define SFP_DIAGMODE_ADDR 92 +#define SFP_DIAGMODE_SIZE 1 +#define SFP_COMPLIANCE_ADDR 94 +#define SFP_COMPLIANCE_SIZE 1 +#define SFP_COMPLIANCE_NONE 0 +#define SFP_OPTIONS_ADDR 65 +#define SFP_OPTIONS_SIZE 1 +#define SFP_DIAGMODE_EXTERNAL_CALIBRATION_MASK 0x10 /* bit 4 */ +#define SFP_TX_FAULT_SUPPORT_MASK (1<<3) /* Table 3.7, Options, byte 65, bit 3 */ +#define SFP_TX_FAULT_MASK (1<<2) /* Table 3.17, A/D Values and Status Bits, byte 110, bit 2 */ +#define SFP_LOS_MASK (1<<1) /* Table 3.17, A/D Values and Status Bits, byte 110, bit 1 */ +#define SFP_RX_POWER_PHANTOM_READ 0 + +/* 0xA2 */ +/* Calibration constants */ +#define SFP_RX_PWR4_ADDR 56 +#define SFP_RX_PWR4_SIZE 4 +#define SFP_RX_PWR3_ADDR 60 +#define SFP_RX_PWR3_SIZE 4 +#define SFP_RX_PWR2_ADDR 64 +#define SFP_RX_PWR2_SIZE 4 +#define SFP_RX_PWR1_ADDR 68 +#define SFP_RX_PWR1_SIZE 4 +#define SFP_RX_PWR0_ADDR 72 +#define SFP_RX_PWR0_SIZE 4 +#define SFP_TX_CURRENT_SLOPE_ADDR 76 +#define SFP_TX_CURRENT_SLOPE_SIZE 2 +#define SFP_TX_CURRENT_OFFSET_ADDR 78 +#define SFP_TX_CURRENT_OFFSET_SIZE 2 +#define SFP_TX_POWER_SLOPE_ADDR 80 +#define SFP_TX_POWER_SLOPE_SIZE 2 +#define SFP_TX_POWER_OFFSET_ADDR 82 +#define SFP_TX_POWER_OFFSET_SIZE 2 +#define SFP_T_SLOPE_ADDR 84 +#define SFP_T_SLOPE_SIZE 2 +#define SFP_T_OFFSET_ADDR 86 +#define SFP_T_OFFSET_SIZE 2 +#define SFP_V_SLOPE_ADDR 88 +#define SFP_V_SLOPE_SIZE 2 +#define SFP_V_OFFSET_ADDR 90 +#define SFP_V_OFFSET_SIZE 2 + +/* 0xAC */ +/* Registers (0-31) */ +#define SFP_COPPER_PHY_CNTRL 0 /* Control Register */ +#define SFP_COPPER_PHY_STATUS 1 /* Status Register */ +#define SFP_COPPER_PHY_ID0 2 /* PHY Identifier */ +#define SFP_COPPER_PHY_ID1 3 /* PHY Identifier */ +#define SFP_COPPER_PHY_SPEC_STATUS 17 /* PHY Specific Status Register */ +#define SFP_COPPER_PHY_EXT_ADDR 22 /* Extended Address for Cable Diagnostic Reg */ +#define SFP_COPPER_PHY_CABLE_DIAG 28 /* GE interface Cable Diagnostic Registers */ +#define SFP_COPPER_PHY_REG29 29 /* Reg. 29 */ +#define SFP_COPPER_PHY_REG30 30 /* Reg. 30 */ +#define SFP_COPPER_PHY_REG31 31 /* Reg. 31 */ + +#define SFP_COPPER_PHY_OUI 0x0141 +#define SFP_COPPER_PHY_MODEL_MASK 0x03F0 + +#define SFP_IF_ERROR_RETURN(op) do { int __rc__; if ((__rc__ = (op)) < 0) return(L7_FAILURE); } while(0) + +/********************************************************************* +* In addition to the hardware specs, please see Application Note AN-2030 +* available from FINISAR. +*********************************************************************/ +#define SFP_XFP_FINISAR_OUI 0x009065 +#define SFP_XFP_TYPE_ADDR 0 +#define SFP_XFP_TYPE_SFP 0x03 +#define SFP_XFP_TYPE_SFP_PLUS 0x03 +#define SFP_XFP_TYPE_XFP 0x06 +#define SFP_XFP_TEMPERATURE_ADDR 96 +#define SFP_XFP_TEMPERATURE_SIZE 2 +#define SFP_XFP_VOLTAGE_ADDR 98 +#define SFP_XFP_VOLTAGE_SIZE 2 +#define SFP_XFP_CURRENT_ADDR 100 +#define SFP_XFP_CURRENT_SIZE 2 +#define SFP_XFP_TX_POWER_ADDR 102 +#define SFP_XFP_TX_POWER_SIZE 2 +#define SFP_XFP_RX_POWER_ADDR 104 +#define SFP_XFP_RX_POWER_SIZE 2 +#define SFP_XFP_LOS_ADDR 110 +#define SFP_XFP_LOS_SIZE 1 + +#define SFP_VENDOR_NAME_ADDR 20 +#define SFP_VENDOR_OUI_ADDR 37 +#define SFP_VENDOR_OUI_SIZE 3 +#define SFP_VENDOR_PN_ADDR 40 +#define SFP_VENDOR_REV_ADDR 56 +#define SFP_VENDOR_SN_ADDR 68 +#define SFP_VENDOR_DATE_ADDR 84 +#define SFP_VENDOR_DATE_SIZE 8 +#define SFP_NOMINAL_SIG_RATE_ADDR 12 +#define SFP_NOMINAL_SIG_RATE_SIZE 1 +#define SFP_LINK_LENGTH_50UM_ADDR 16 +#define SFP_LINK_LENGTH_50UM_SIZE 1 +#define SFP_LINK_LENGTH_62_5UM_ADDR 17 +#define SFP_LINK_LENGTH_62_5UM_SIZE 1 +#define SFP_WAVELENGTH_ADDR 60 +#define SFP_WAVELENGTH_SIZE 2 +#define SFP_DAC_LENGTH_ADDR 18 +#define SFP_DAC_LENGTH_SIZE 1 + + +#define QSFP_ADDRESS_DELTA 128 +#define QSFP_TEMPERATURE_ADDR 22 +#define QSFP_VOLTAGE_ADDR 26 +#define QSFP_TX_FAULT_ADDR 4 +#define QSFP_LOS_ADDR 3 +#define QSFP_RX_POWER_ADDR 34 +#define QSFP_TX_POWER_ADDR 42 +#define QSFP_VENDOR_NAME_ADDR 148 +#define QSFP_VENDOR_NAME_SIZE 16 +#define QSFP_VENDOR_PN_ADDR 168 +#define QSFP_VENDOR_PN_SIZE 16 +#define QSFP_VENDOR_SN_ADDR 196 +#define QSFP_VENDOR_SN_SIZE 16 +#define QSFP_VENDOR_REV_ADDR 184 +#define QSFP_VENDOR_REV_SIZE 2 +#define QSFP_NOMINAL_SIG_RATE_ADDR 140 +#define QSFP_NOMINAL_SIG_RATE_SIZE 1 +#define QSFP_LINK_LENGTH_50UM_ADDR 144 +#define QSFP_LINK_LENGTH_50UM_SIZE 1 +#define QSFP_LINK_LENGTH_62_5UM_ADDR 145 +#define QSFP_LINK_LENGTH_62_5UM_SIZE 1 +#define QSFP_WAVELENGTH_ADDR 186 +#define QSFP_WAVELENGTH_SIZE 2 +#define QSFP_DAC_LENGTH_ADDR 146 +#define QSFP_DAC_LENGTH_SIZE 1 +#define QSFP_ETHERNET_COMPLIANCE_ADDR 131 +#define QSFP_ETHERNET_COMPLIANCE_SIZE 1 + +/* + * SFF Committee + * SFF-8436 Specification + * QSFP+ 10 Gbs 4X PLUGGABLE TRANSCEIVER + * Rev 4.5 January 7, 2013 + * + * Table 33, Address 131 Bits + */ +#define QSFP_ETHERNET_COMPLIANCE_RESERVED (1 << 7) +#define QSFP_ETHERNET_COMPLIANCE_10GBASE_LRM (1 << 6) +#define QSFP_ETHERNET_COMPLIANCE_10GBASE_LR (1 << 5) +#define QSFP_ETHERNET_COMPLIANCE_10GBASE_SR (1 << 4) +#define QSFP_ETHERNET_COMPLIANCE_40GBASE_CR4 (1 << 3) +#define QSFP_ETHERNET_COMPLIANCE_40GBASE_SR4 (1 << 2) +#define QSFP_ETHERNET_COMPLIANCE_40GBASE_LR4 (1 << 1) +#define QSFP_ETHERNET_COMPLIANCE_40GACTIVE (1 << 0) +/* +SFF Committee +INF-8077i +10 Gigabit Small Form Factor Pluggable Module +Revision 4.5 August 31, 2005 +*/ + +#define XFP_AUX1_ADDR 106 +#define XFP_AUX2_ADDR 108 +#define XFP_AUX_CONFIG 222 +#define XFP_AUX_SIZE 2 +#define XFP_PAGE_SELECT 127 +/* from table 59 of INF-8077i */ +#define XFP_AUX_INPUT_NONE 0 +#define XFP_AUX_INPUT_BIAS_VOLTAGE 1 +#define XFP_AUX_INPUT_TEC_CURRENT 3 +#define XFP_AUX_INPUT_LASER_TEMP 4 +#define XFP_AUX_INPUT_LASER_WAVE 5 +#define XFP_AUX_INPUT_5_VOLTAGE 6 +#define XFP_AUX_INPUT_3_3_VOLTAGE 7 +#define XFP_AUX_INPUT_1_8_VOLTAGE 8 +#define XFP_AUX_INPUT_MASK 0xF +#define XFP_FAULT_ADDR 111 +#define XFP_FAULT_SIZE 1 +#define XFP_TX_FAULT_MASK (1<<6) /* Table 42 General Control/Status Bits, byte 111, bit 6 */ + +#define XFP_VENDOR_NAME_ADDR 148 +#define XFP_VENDOR_NAME_SIZE 15 +#define XFP_VENDOR_PN_ADDR 168 +#define XFP_VENDOR_PN_SIZE 16 +#define XFP_VENDOR_SN_ADDR 196 +#define XFP_VENDOR_SN_SIZE 16 +#define XFP_VENDOR_DATE_ADDR 212 +#define XFP_VENDOR_DATE_SIZE 8 +#define XFP_VENDOR_OUI_ADDR 165 +#define XFP_VENDOR_OUI_SIZE 3 +#define XFP_VENDOR_REV_ADDR 184 +#define XFP_VENDOR_REV_SIZE 2 + +/* Validation of the modules in the hpcIsValidXxx() routine */ +/* Controls wheter the hpcIsValidXxx() actually tries to read the */ +/* xFP signature from the pluggable module. */ +#define SFP_VALIDATE_MODULE 0 +#define XFP_VALIDATE_MODULE 1 +#define SFP_SFPPLUS_VALIDATE_MODULE 1 + + +#define SFF8472_ID_ADDR 0 +#define SFF8472_EXT_ID_ADDR 1 +#define SFF8472_10G_COMPLIANCE_ADDR 3 +#define SFF8472_ETHERNET_COMPLIANCE_ADDR 6 +#define SFF8472_SFPPLUS_CABLE_TECH_ADDR 8 +#define SFF8472_BIT_RATE_ADDR 12 + + +#define SFF8472_DIAG_MON_TYPE_ADDR 92 +#define SFF8472_DIAG_MON_TYPE_SIZE 1 +#define SFF8472_COMPLIANCE_ADDR 94 +#define SFF8472_COMPLIANCE_SIZE 1 + +#define SFF8436_COMPLIANCE_ADDR 131 +#define SFF8436_COMPLIANCE_SIZE 1 + +#define SFF8436_40G_ACTIVE (1 << 0) +#define SFF8436_40G_BASE_LR4 (1 << 1) +#define SFF8436_40G_BASE_SR4 (1 << 2) +#define SFF8436_40G_BASE_CR4 (1 << 3) +#define SFF8436_10G_BASE_SR (1 << 4) +#define SFF8436_10G_BASE_LR (1 << 5) +#define SFF8436_10G_BASE_LRM (1 << 6) + + +#define SFF8472_COMPLIANCE_NONE (0x0) +#define SFF8472_DIGITAL_DIAG_IMPLEMENTED (0x1 << 6) + +#define SFF8472_SFP_ID (0x03) +#define SFF8472_SFP_EXT_ID (0x04) +#define SFF8472_XFP_ID (0x06) +#define SFF8436_QSFP_PLUS_ID (0x0d) + +#define SFF8472_10G_BASE_ER (1<<7) +#define SFF8472_10G_BASE_LRM (1<<6) +#define SFF8472_10G_BASE_LR (1<<5) +#define SFF8472_10G_BASE_SR (1<<4) + +#define SFF8472_10G_BASE (SFF8472_10G_BASE_ER | \ + SFF8472_10G_BASE_LRM | \ + SFF8472_10G_BASE_LR | \ + SFF8472_10G_BASE_SR ) + +#define SFF8472_10G_SPEED (0x64) + +#define SFF8472_100M_BASE_FX (1 << 5) +#define SFF8472_100M_BASE_LX (1 << 4) +#define SFF8472_1G_BASE_T (1<<3) +#define SFF8472_1G_BASE_CX (1<<2) +#define SFF8472_1G_BASE_LX (1<<1) +#define SFF8472_1G_BASE_SX (1) + +#define SFF8472_1G_BASE (SFF8472_1G_BASE_T | \ + SFF8472_1G_BASE_CX | \ + SFF8472_1G_BASE_LX | \ + SFF8472_1G_BASE_SX ) + +#define SFF8472_100M_BASE (SFF8472_100M_BASE_FX | SFF8472_100M_BASE_LX) + +#define SFF8431_COMPLIANCE (1<<0) +#define SFF8431_LIMITED_COMPLIANCE (1<<2) +#define SFF8431_APPENDIX_E_COMPLIANCE (1<<0) + +#define SFPPLUS_ACTIVE_CABLE (1<<3) +#define SFPPLUS_PASSIVE_CABLE (1<<2) + +#define SFPPLUS_CABLE_TECH (SFPPLUS_ACTIVE_CABLE | \ + SFPPLUS_PASSIVE_CABLE ) + + +#define TRANSCEIVER_NOT_PRESENT (0) +#define TRANSCEIVER_TYPE_100M (1) +#define TRANSCEIVER_TYPE_1G (2) +#define TRANSCEIVER_TYPE_10G (3) +#define TRANSCEIVER_TYPE_QSFP (4) +#define TRANSCEIVER_TYPE_XFP (5) +#define TRANSCEIVER_TYPE_INVALID (6) + +#if L7_FEAT_SFP_QUALIFICATION +extern L7_RC_t hpcSfpOpticQualify(L7_uint32 slot, L7_uint32 port); +#define HPC_SFP_OPTICS_QUALIFY(slot,port) hpcSfpOpticQualify(slot,port) +#else +#define HPC_SFP_OPTICS_QUALIFY(slot,port) L7_NOT_SUPPORTED +#endif + +#define HPC_SFP_CUST_WAVELENGTH_READ(slot, port, wavelength) L7_NOT_SUPPORTED +#define HPC_SFP_CUST_DATARATE_READ(slot, port, dataRate) L7_NOT_SUPPORTED +#define HPC_SFP_CUST_OPTIC_MEDIA_TYPE_GET(slot, port, opticType) L7_NOT_SUPPORTED + +#ifdef INCLUDE_SFP_XFP_OVERRIDES +#include "sfp_xfp_overrides.h" +#endif + +#endif /* INCLUDE_SFP_XFP */ diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/sfpi.c b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/sfpi.c new file mode 100644 index 00000000..f4764ed5 --- /dev/null +++ b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/sfpi.c @@ -0,0 +1,294 @@ +#include + +#include +#include +#include +#include +#include + +#include "redstone_cpld.h" +#include "x86_64_cel_redstone_xp_int.h" +#include "sfp_xfp.h" + + +static int +_get_sfp_state(int sfp) +{ + unsigned char val = 0; + int reg; + int ret = -1; + + if (!sfp) + return sfp; + + if(sfp < 9) { + reg = 0x259; + ret = read_cpld(reg, &val); + if(ret < 0) + return ret; + val &= 0x1 << (sfp - 1); + } else if((sfp > 8) && (sfp < 17)) { + reg = 0x25A; + ret = read_cpld(reg, &val); + if(ret < 0) + return ret; + val &= 0x1 << ((sfp - 1) % 8); + } else if((sfp > 16) && (sfp < 19)) { + reg = 0x25B; + ret = read_cpld(reg, &val); + if(ret < 0) + return ret; + val &= 0x1 << ((sfp - 1) % 8); + } else if((sfp > 18) && (sfp < 29)) { + reg = 0x2D9; + ret = read_cpld(reg, &val); + if(ret < 0) + return ret; + val &= 0x1 << ((sfp - 3) % 8); + } else if((sfp > 28) && (sfp < 35)) { + reg = 0x2DA; + ret = read_cpld(reg, &val); + if(ret < 0) + return ret; + val &= 0x1 << ((sfp - 3) % 8); + } else if((sfp > 34) && (sfp < 37)) { + reg = 0x2DB; + ret = read_cpld(reg, &val); + if(ret < 0) + return ret; + val &= 0x1 << ((sfp - 3) % 8); + } else if((sfp > 36) && (sfp < 45)) { + reg = 0x3D6; + ret = read_cpld(reg, &val); + if(ret < 0) + return ret; + val &= 0x1 << ((sfp - 5) % 8); + } else if((sfp > 44) && (sfp < 49)) { + reg = 0x3D7; + ret = read_cpld(reg, &val); + if(ret < 0) + return ret; + val &= 0x1 << ((sfp - 5) % 8); + } else if((sfp > 48) && (sfp <= CEL_REDSTONE_MAX_PORT)) { + reg = 0x3D7; + ret = read_cpld(reg, &val); + if(ret < 0) + return ret; + val &= 0x1 << ((sfp - 1) % 8); + } + return (ret = (val ? 0 : 1)); +} + +/*@ _read_sfp + * return + * 0 on success + * *data_p with result + */ +static int +_read_sfp(int port, uint8_t *data_p, uint32_t addr, uint32_t offset, uint32_t size) +{ + char byte = 0; + + read_sfp(port, 0xA0, 0x7F, &byte, 1); + + if (byte) { + byte = 0; + write_sfp(port, 0xA0, 0x7F, &byte, 1); + usleep(40000); + } + return (read_sfp(port, (addr<<1), offset, (char *)data_p, size)); +} + +/* @_spf_rx_los + * return + * 1 if rx_loss + * else 0 + * Arg + * port + */ +static int +_sfp_rx_los(int port) +{ + unsigned char byte = 0; + + if (!_get_sfp_state(port)) + return 1; + //return ONLP_STATUS_E_MISSING; + + if (port <= 48) { + _read_sfp(port, &byte, ALL_SFP_DIAG_I2C_ADDRESS, SFP_XFP_LOS_ADDR, SFP_XFP_LOS_SIZE); + } else if (port <= 54) { + _read_sfp(port, &byte, ALL_SFP_DIAG_I2C_ADDRESS, QSFP_LOS_ADDR, SFP_XFP_LOS_SIZE); + } + + if (SFP_LOS_MASK == (byte & SFP_LOS_MASK)) + return 1; + + return 0; +} + +/* @_spf_tx_fault + * return + * if tx fault + * else 0 + * Arg + * port + */ +static int +_sfp_tx_fault(int port) +{ + unsigned int option = 0; + + if (!_get_sfp_state(port)) + return -1; + + if (port <= 48) { + _read_sfp(port, (uint8_t *)&option, ALL_SFP_DIAG_I2C_ADDRESS, SFP_OPTIONS_ADDR, SFP_OPTIONS_SIZE); + } else if (port <= 54) { + _read_sfp(port, (uint8_t *)&option, ALL_SFP_DIAG_I2C_ADDRESS, QSFP_TX_FAULT_ADDR, SFP_OPTIONS_SIZE); + } + + if (SFP_TX_FAULT_MASK & option) + return 1; + + return 0; +} + + +int +onlp_sfpi_bitmap_get(onlp_sfp_bitmap_t* bmap) +{ + int p; + + for(p = 1; p <= CEL_REDSTONE_MAX_PORT; p++) + AIM_BITMAP_SET(bmap, p); + return ONLP_STATUS_OK; +} + +int +onlp_sfpi_init(void) +{ + return ONLP_STATUS_OK; +} + +/* +* @onlp_sfpi_is_present +* Return +* 1 if present. +* 0 if not present. +* < 0 if error. +*/ +int +onlp_sfpi_is_present(int port) +{ + return (_get_sfp_state(port)); +} + +int +onlp_sfpi_denit(void) +{ + return ONLP_STATUS_OK; +} + +int +onlp_sfpi_control_get(int port, onlp_sfp_control_t control, int* value) +{ + int rt; + switch(control) + { + case ONLP_SFP_CONTROL_RX_LOS: + rt = _sfp_rx_los(port); + if (rt < 0) + return ONLP_STATUS_E_INTERNAL; + + *value = rt; + return ONLP_STATUS_OK; + + case ONLP_SFP_CONTROL_TX_FAULT: + rt = _sfp_tx_fault(port); + if (rt < 0) + return ONLP_STATUS_E_INTERNAL; + + *value = rt; + return ONLP_STATUS_OK; + + default: + return ONLP_STATUS_E_UNSUPPORTED; + + } +} + +int +onlp_sfpi_control_set(int port, onlp_sfp_control_t control, int value) +{ + switch(control) { + case ONLP_SFP_CONTROL_TX_DISABLE: + //return _tx_enable_set__(port, !value); + return ONLP_STATUS_E_UNSUPPORTED; + default: + return ONLP_STATUS_E_UNSUPPORTED; + } +} + +int +onlp_sfpi_port_map(int port, int* rport) +{ + /* rport need to be port+1 as the face plate starts at 1 */ + + *rport = port; + return ONLP_STATUS_OK; +} + +int +onlp_sfpi_eeprom_read(int port, uint8_t data[256]) +{ + if (port > CEL_REDSTONE_MAX_PORT) { + return ONLP_STATUS_E_MISSING; + } + + if (!_get_sfp_state(port)) + return ONLP_STATUS_E_MISSING; + + memset(data, 0, 256); + if (_read_sfp(port, data, ALL_SFP_I2C_ADDRESS, 0, 256) == -1) + return ONLP_STATUS_OK; + + return ONLP_STATUS_OK; +} + +int +onlp_sfpi_presence_bitmap_get(onlp_sfp_bitmap_t* dst) +{ + uint32_t i; + int rt; + + AIM_BITMAP_CLR_ALL(dst); + + for(i=0; i< CEL_REDSTONE_MAX_PORT; i++) { + rt = _get_sfp_state(i); + if (rt < 0 ) { + return ONLP_STATUS_E_INTERNAL; + } else if (rt) { + AIM_BITMAP_SET(dst, i); + } + } + return ONLP_STATUS_OK; +} + +int +onlp_sfpi_rx_los_bitmap_get(onlp_sfp_bitmap_t* dst) +{ + uint32_t i; + int rt; + + AIM_BITMAP_CLR_ALL(dst); + for(i=1; i<= CEL_REDSTONE_MAX_PORT; i++) { + rt = _sfp_rx_los(i); + if (rt < 0 ) { + return ONLP_STATUS_E_INTERNAL; + } else if (rt) { + AIM_BITMAP_SET(dst, i); + } + } + return ONLP_STATUS_OK; +} diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/sys_eeprom.c b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/sys_eeprom.c new file mode 100644 index 00000000..488937cd --- /dev/null +++ b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/sys_eeprom.c @@ -0,0 +1,66 @@ +#include +#include +#include +#include +#include +#include + +#include "sys_eeprom.h" +#include "i2c_chips.h" +#include "i2c_dev.h" +#include "redstone_cpld.h" + +static inline u_int8_t is_valid_tlvinfo_header(tlvinfo_header_t *hdr) +{ + int max_size = TLV_TOTAL_LEN_MAX; + + return((strcmp(hdr->signature, TLV_INFO_ID_STRING) == 0) && + (hdr->version == TLV_INFO_VERSION) && + (be16_to_cpu(hdr->totallen) <= max_size)); +} + +int +read_sys_eeprom(void *eeprom_data, int offset, int len) +{ + int ret = 0; + int i = 0; + u_int8_t *c; + + int addr = SYS_EEPROM_OFFSET + offset; + unsigned char dev_id = 5; + + c = eeprom_data; + if (eeprom_enable(dev_id) < 0) { + printf("ERROR: Cannot open I2C device\n"); + return -1; + } + + for (i = 0; i < len; i++) { + unsigned char buf; + ret = eeprom_read_byte(CONFIG_SYS_I2C_EEPROM_ADDR, addr, &buf); + *c = buf; + c++; + addr++; + } + + eeprom_disable(dev_id); + return ret; +} + +int +read_eeprom(u_int8_t *eeprom, int *size) +{ + int ret; + tlvinfo_header_t *eeprom_hdr = (tlvinfo_header_t *) eeprom; + u_int8_t *buf = eeprom + sizeof(tlvinfo_header_t); + + /* Read the header */ + ret = read_sys_eeprom((void *)eeprom_hdr, 0, sizeof(tlvinfo_header_t)); + + /* If the header was successfully read, read the TLVs */ + if ((ret == 0) && is_valid_tlvinfo_header(eeprom_hdr)) + ret = read_sys_eeprom((void *)buf, sizeof(tlvinfo_header_t), + be16_to_cpu(eeprom_hdr->totallen)); + + return ret; +} diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/sys_eeprom.h b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/sys_eeprom.h new file mode 100644 index 00000000..be31e28e --- /dev/null +++ b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/sys_eeprom.h @@ -0,0 +1,186 @@ +#ifndef SYS_EEPROM_HH +#define SYS_EEPROM_HH + +#include +#ifdef __cplusplus +extern "C" { +#endif + +#define be16_to_cpu(x) __be16_to_cpu(x) +#define cpu_to_be16(x) __cpu_to_be16(x) + +#define FALSE 0 +#define TRUE (!FALSE) + +/* + * Tlvinf header: Layout of the header for the TlvInfo format + * + * See the end of this file for details of this eeprom format + */ +struct __attribute__ ((__packed__)) tlvinfo_header_s { + char signature[8]; /* 0x00 - 0x07 EEPROM Tag "TlvInfo" */ + u_int8_t version; /* 0x08 Structure version */ + u_int16_t totallen; /* 0x09 - 0x0A Length of all data which follows */ +}; +typedef struct tlvinfo_header_s tlvinfo_header_t; + +// Header Field Constants +#define TLV_INFO_ID_STRING "TlvInfo" +#define TLV_INFO_VERSION 0x01 +#define TLV_TOTAL_LEN_MAX (SYS_EEPROM_SIZE - sizeof(tlvinfo_header_t)) + +/* + * TlvInfo TLV: Layout of a TLV field + */ +struct __attribute__ ((__packed__)) tlvinfo_tlv_s { + u_int8_t type; + u_int8_t length; + u_int8_t value[0]; +}; +typedef struct tlvinfo_tlv_s tlvinfo_tlv_t; + +/* Maximum length of a TLV value in bytes */ +#define TLV_VALUE_MAX_LEN 255 + +/** + * The TLV Types. + * + * Keep these in sync with tlv_code_list in cmd_sys_eeprom.c + */ +#define TLV_CODE_PRODUCT_NAME 0x21 +#define TLV_CODE_PART_NUMBER 0x22 +#define TLV_CODE_SERIAL_NUMBER 0x23 +#define TLV_CODE_MAC_BASE 0x24 +#define TLV_CODE_MANUF_DATE 0x25 +#define TLV_CODE_DEVICE_VERSION 0x26 +#define TLV_CODE_LABEL_REVISION 0x27 +#define TLV_CODE_PLATFORM_NAME 0x28 +#define TLV_CODE_ONIE_VERSION 0x29 +#define TLV_CODE_MAC_SIZE 0x2A +#define TLV_CODE_MANUF_NAME 0x2B +#define TLV_CODE_MANUF_COUNTRY 0x2C +#define TLV_CODE_VENDOR_NAME 0x2D +#define TLV_CODE_DIAG_VERSION 0x2E +#define TLV_CODE_SERVICE_TAG 0x2F +#define TLV_CODE_VENDOR_EXT 0xFD +#define TLV_CODE_CRC_32 0xFE + +/* + * Struct for displaying the TLV codes and names. + */ +struct tlv_code_desc { + u_int8_t m_code; + char* m_name; +}; + +/* + * List of TLV codes and names. + */ +static const struct tlv_code_desc tlv_code_list[] = { + { TLV_CODE_PRODUCT_NAME , "Product Name"}, + { TLV_CODE_PART_NUMBER , "Part Number"}, + { TLV_CODE_SERIAL_NUMBER , "Serial Number"}, + { TLV_CODE_MAC_BASE , "Base MAC Address"}, + { TLV_CODE_MANUF_DATE , "Manufacture Date"}, + { TLV_CODE_DEVICE_VERSION , "Device Version"}, + { TLV_CODE_LABEL_REVISION , "Label Revision"}, + { TLV_CODE_PLATFORM_NAME , "Platform Name"}, + { TLV_CODE_ONIE_VERSION , "Loader Version"}, + { TLV_CODE_MAC_SIZE , "MAC Addresses"}, + { TLV_CODE_MANUF_NAME , "Manufacturer"}, + { TLV_CODE_MANUF_COUNTRY , "Country Code"}, + { TLV_CODE_VENDOR_NAME , "Vendor Name"}, + { TLV_CODE_DIAG_VERSION , "Diag Version"}, + { TLV_CODE_SERVICE_TAG , "Service Tag"}, + { TLV_CODE_VENDOR_EXT , "Vendor Extension"}, + { TLV_CODE_CRC_32 , "CRC-32"}, +}; + +static inline const char* tlv_type2name(u_int8_t type) +{ + char* name = "Unknown"; + int i; + + for (i = 0; i < sizeof(tlv_code_list)/sizeof(tlv_code_list[0]); i++) { + if (tlv_code_list[i].m_code == type) { + name = tlv_code_list[i].m_name; + break; + } + } + return name; +} + +/* + * The max decode value is currently for the 'raw' type or the 'vendor + * extension' type, both of which have the same decode format. The + * max decode string size is computed as follows: + * + * strlen(" 0xFF") * TLV_VALUE_MAX_LEN + 1 + * + */ +#define TLV_DECODE_VALUE_MAX_LEN ((5 * TLV_VALUE_MAX_LEN) + 1) + + +/* + * Each platform must define the following platform-specific macros + * in sys_eeprom_platform.h: + * SYS_EEPROM_SIZE: size of usable eeprom + * SYS_EEPROM_I2C_DEVICE: i2c-bus + * SYS_EEPROM_I2C_ADDR: address on the bus + * The following may also be defined in sys_eeprom_platform.h, else + * the defaults with take over: + * SYS_EEPROM_MAX_SIZE: Total size of the eeprom + * SYS_EEPROM_OFFSET: offset from where the ONIE header starts + */ +//#include "sys_eeprom_platform.h" +#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 +#ifndef SYS_EEPROM_SIZE +#define SYS_EEPROM_SIZE 1024 +#endif + +#ifndef SYS_EEPROM_I2C_DEVICE +#define SYS_EEPROM_I2C_DEVICE 1 +#endif + +#ifndef SYS_EEPROM_I2C_ADDR +#define SYS_EEPROM_I2C_ADDR 0x50 +#endif +#ifndef SYS_EEPROM_MAX_SIZE +#define SYS_EEPROM_MAX_SIZE 2048 +#endif + +#ifndef SYS_EEPROM_OFFSET +#define SYS_EEPROM_OFFSET 0 +#endif + +#ifndef SYS_EEPROM_SIZE + #error SYS_EEPROM_SIZE not defined! +#endif + +#ifndef SYS_EEPROM_I2C_DEVICE + #error SYS_EEPROM_I2C_DEVICE not defined! +#endif + +#ifndef SYS_EEPROM_I2C_ADDR + #error SYS_EEPROM_I2C_ADDR not defined! +#endif + +#if (SYS_EEPROM_SIZE + SYS_EEPROM_OFFSET > SYS_EEPROM_MAX_SIZE) + #error SYS_EEPROM_SIZE + SYS_EEPROM_OFFSET is greater than SYS_EEPROM_MAX_SIZE +#endif + +// Access functions to onie_tlvinfo +int prog_eeprom(u_int8_t * eeprom); +void update_eeprom_header(u_int8_t *eeprom); +u_int8_t tlvinfo_find_tlv(u_int8_t *eeprom, u_int8_t tcode, int *eeprom_index); +u_int8_t tlvinfo_delete_tlv(u_int8_t * eeprom, u_int8_t code); +u_int8_t tlvinfo_add_tlv(u_int8_t * eeprom, int tcode, char * strval); +u_int8_t tlvinfo_decode_tlv(u_int8_t *eeprom, u_int8_t tcode, char* value); +void show_tlv_code_list(void); +void show_eeprom(void); +int read_eeprom(u_int8_t *, int *); + +#ifdef __cplusplus +} +#endif +#endif diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/sysi.c b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/sysi.c new file mode 100644 index 00000000..c3bf8bc1 --- /dev/null +++ b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/sysi.c @@ -0,0 +1,175 @@ +/* + * Copyright + */ +#include +#include +#include +#include + +#include "x86_64_cel_redstone_xp_log.h" +#include "platform.h" +#include "sys_eeprom.h" +#include "redstone_cpld.h" + +const char* +onlp_sysi_platform_get(void) +{ + return "x86-64-cel-redstone-xp-r0"; +} + +int +onlp_sysi_init(void) +{ + return cpld_io_init(); +} + + +int +onlp_sysi_debug(aim_pvs_t* pvs, int argc, char* argv[]) +{ + int c; + for(c = 1; c <= 5; c++) { + aim_printf(pvs, "CPLD%d:\n", c); + cpld_dump(pvs, c); + } + return 0; +} + +int +onlp_sysi_platform_set(const char* name) +{ + /* + * For the purposes of this example we + * accept all platforms. + */ + return ONLP_STATUS_OK; +} + +int +onlp_sysi_onie_data_phys_addr_get(void** pa) +{ + return ONLP_STATUS_E_UNSUPPORTED; +} + +int +onlp_sysi_onie_data_get(uint8_t** data, int* size) +{ + uint8_t* rdata = aim_zmalloc(512); + + read_eeprom(rdata, size); + if (size) { + *data = rdata; + return ONLP_STATUS_OK; + } + return ONLP_STATUS_E_INTERNAL; +} + +void +onlp_sysi_onie_data_free(uint8_t* data) +{ + /* + * We returned a static array in onlp_sysi_onie_data_get() + * so no free operation is required. + */ +} + +static int +_onlp_sysi_calc_speed(int atemp) +{ + int fan_speed = 0; + + if (atemp < 38 ) { + fan_speed = 50; + } else if ( atemp < 40) { + fan_speed = 60; + } else if ( atemp < 42) { + fan_speed = 70; + } else if ( atemp < 44) { + fan_speed = 80; + } else if ( atemp < 46) { + fan_speed = 90; + } else { + fan_speed = 100; + } + + return fan_speed; +} + +/* + * Thermal profile for Celestica Redstone XP + * + * Default Fan speed: 50% + * Normal operating temperature range: < 46C + * Fan Speed profile: + * 46C + : 100% Fan speed + * 44C : 80% Fan speed + * 42C : 70% Fan speed + * 40C : 60% Fan speed + * 38C - : 50% Fan speed + */ +int +onlp_sysi_platform_manage_fans(void) +{ + int i, atemp = 0, count = 0; + int fan_speed = 0; + static int o_speed = 0, o_psu_speed[2] = {0,0}; + onlp_thermal_info_t t_info; + + for (i = 1; i < PSU_FAN; i++) { + onlp_thermali_info_get(ONLP_THERMAL_ID_CREATE(i), &t_info); + if (t_info.mcelsius) { + count++; + atemp += t_info.mcelsius; + } + } + atemp = atemp/count; + + fan_speed = _onlp_sysi_calc_speed(atemp); + if (o_speed != fan_speed) { + for (i = 1; i < PSU_FAN; i++) + onlp_fani_percentage_set(ONLP_FAN_ID_CREATE(i), fan_speed); + o_speed = fan_speed; + } + + /* Control PSU FAN */ + for (i = 0; i < 2 ; i++) { + onlp_thermali_info_get(ONLP_THERMAL_ID_CREATE(i), &t_info); + if (t_info.mcelsius) { + atemp = t_info.mcelsius; + fan_speed = _onlp_sysi_calc_speed(atemp); + if (fan_speed != o_psu_speed[i]) { + onlp_fani_percentage_set(ONLP_FAN_ID_CREATE(PSU_FAN + i), fan_speed); + o_psu_speed[i] = fan_speed; + } + } + } + + return ONLP_STATUS_OK; +} + +int +onlp_sysi_oids_get(onlp_oid_t* table, int max) +{ + int i; + onlp_oid_t* e = table; + + memset(table, 0, max*sizeof(onlp_oid_t)); + + /* 2 PSUs */ + *e++ = ONLP_PSU_ID_CREATE(1); + *e++ = ONLP_PSU_ID_CREATE(2); + + /* LEDs Item */ + for (i=1; i<=LED_COUNT; i++) + *e++ = ONLP_LED_ID_CREATE(i); + + /* THERMALs Item */ + for (i=1; i<=THERMAL_COUNT; i++) + *e++ = ONLP_THERMAL_ID_CREATE(i); + + /* Fans Item */ + for (i=1; i<=FAN_COUNT; i++) + *e++ = ONLP_FAN_ID_CREATE(i); + + return ONLP_STATUS_OK; +} diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/thermali.c b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/thermali.c new file mode 100644 index 00000000..a5f4c23b --- /dev/null +++ b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/thermali.c @@ -0,0 +1,73 @@ +#include +#include +#include +#include +#include + +#include "i2c_chips.h" +#include "platform.h" + +static onlp_thermal_info_t thermal_info[] = { + { { ONLP_THERMAL_ID_CREATE(THERMAL_MAIN_BOARD_REAR), "Chassis Thermal (Rear)", 0}, + ONLP_THERMAL_STATUS_PRESENT, + ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS + }, + { { ONLP_THERMAL_ID_CREATE(THERMAL_BCM), "BCM SOC Thermal sensor", 0}, + ONLP_THERMAL_STATUS_PRESENT, + ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS + }, + { { ONLP_THERMAL_ID_CREATE(THERMAL_CPU), "CPU Core", 0}, + ONLP_THERMAL_STATUS_PRESENT, + ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS + }, + { { ONLP_THERMAL_ID_CREATE(THERMAL_MAIN_BOARD_FRONT), "Chassis Thermal Sensor (Front)", 0}, + ONLP_THERMAL_STATUS_PRESENT, + ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS + }, + { { ONLP_THERMAL_ID_CREATE(THERMAL_PSU1), "PSU-1 Thermal Sensor", ONLP_PSU_ID_CREATE(1)}, + ONLP_THERMAL_STATUS_PRESENT, + ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS + }, + { { ONLP_THERMAL_ID_CREATE(THERMAL_PSU2), "PSU-2 Thermal Sensor", ONLP_PSU_ID_CREATE(2)}, + ONLP_THERMAL_STATUS_PRESENT, + ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS + } +}; + +int +onlp_thermali_init(void) +{ + return ONLP_STATUS_OK; +} + +int +onlp_thermali_info_get(onlp_oid_t id, onlp_thermal_info_t* info) +{ + int sensor_id; + struct psuInfo psu; + short temp; + + sensor_id = ONLP_OID_ID_GET(id) - 1; + + *info = thermal_info[sensor_id]; + + switch (sensor_id) { + case THERMAL_MAIN_BOARD_REAR: + case THERMAL_MAIN_BOARD_FRONT: + case THERMAL_BCM: + case THERMAL_CPU: + tsTempGet(sensor_id, &temp); + info->mcelsius = temp; + break; + case THERMAL_PSU1: + getPsuInfo(0, &psu); + info->mcelsius = psu.temp; + break; + case THERMAL_PSU2: + getPsuInfo(1, &psu); + info->mcelsius = psu.temp; + break; + } + return ONLP_STATUS_OK; +} + diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/module/src/x86_64_cel_redstone_xp_config.c b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/x86_64_cel_redstone_xp_config.c similarity index 100% rename from packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/module/src/x86_64_cel_redstone_xp_config.c rename to packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/x86_64_cel_redstone_xp_config.c diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/x86_64_cel_redstone_xp_enums.c b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/x86_64_cel_redstone_xp_enums.c new file mode 100644 index 00000000..426c91b7 --- /dev/null +++ b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/x86_64_cel_redstone_xp_enums.c @@ -0,0 +1,674 @@ +/**************************************************************************//** + * + * + * + *****************************************************************************/ +#include +#include "x86_64_cel_redstone_xp_int.h" + +/* */ +aim_map_si_t cpld1_reg_map[] = +{ + { "VERSION", CPLD1_REG_VERSION }, + { "SCRATCH", CPLD1_REG_SCRATCH }, + { "RESET_CONTROL", CPLD1_REG_RESET_CONTROL }, + { "RESET_SOURCE", CPLD1_REG_RESET_SOURCE }, + { "BOARD_TYPE", CPLD1_REG_BOARD_TYPE }, + { "INT_PORT_STATUS", CPLD1_REG_INT_PORT_STATUS }, + { "INT0_SOURCE_STATUS", CPLD1_REG_INT0_SOURCE_STATUS }, + { "INT0_SOURCE_INT", CPLD1_REG_INT0_SOURCE_INT }, + { "INT0_SOURCE_MASK", CPLD1_REG_INT0_SOURCE_MASK }, + { "POWER_SUPPLY_STATUS", CPLD1_REG_POWER_SUPPLY_STATUS }, + { "POWER_GOOD_STATUS", CPLD1_REG_POWER_GOOD_STATUS }, + { "BPP_CONTROL", CPLD1_REG_BPP_CONTROL }, + { "WRITE_PROTECT_CONTROL", CPLD1_REG_WRITE_PROTECT_CONTROL }, + { "MISC_STATUS_CONTROL", CPLD1_REG_MISC_STATUS_CONTROL }, + { "INFO_RAM_ADDR_HIGH", CPLD1_REG_INFO_RAM_ADDR_HIGH }, + { "INFO_RAM_ADDR_LOW", CPLD1_REG_INFO_RAM_ADDR_LOW }, + { "INFO_RAM_READ_DATA", CPLD1_REG_INFO_RAM_READ_DATA }, + { "INFO_RAM_WRITE_DATA", CPLD1_REG_INFO_RAM_WRITE_DATA }, + { NULL, 0 } +}; + +aim_map_si_t cpld1_reg_desc_map[] = +{ + { "None", CPLD1_REG_VERSION }, + { "None", CPLD1_REG_SCRATCH }, + { "None", CPLD1_REG_RESET_CONTROL }, + { "None", CPLD1_REG_RESET_SOURCE }, + { "None", CPLD1_REG_BOARD_TYPE }, + { "None", CPLD1_REG_INT_PORT_STATUS }, + { "None", CPLD1_REG_INT0_SOURCE_STATUS }, + { "None", CPLD1_REG_INT0_SOURCE_INT }, + { "None", CPLD1_REG_INT0_SOURCE_MASK }, + { "None", CPLD1_REG_POWER_SUPPLY_STATUS }, + { "None", CPLD1_REG_POWER_GOOD_STATUS }, + { "None", CPLD1_REG_BPP_CONTROL }, + { "None", CPLD1_REG_WRITE_PROTECT_CONTROL }, + { "None", CPLD1_REG_MISC_STATUS_CONTROL }, + { "None", CPLD1_REG_INFO_RAM_ADDR_HIGH }, + { "None", CPLD1_REG_INFO_RAM_ADDR_LOW }, + { "None", CPLD1_REG_INFO_RAM_READ_DATA }, + { "None", CPLD1_REG_INFO_RAM_WRITE_DATA }, + { NULL, 0 } +}; + +const char* +cpld1_reg_name(cpld1_reg_t e) +{ + const char* name; + if(aim_map_si_i(&name, e, cpld1_reg_map, 0)) { + return name; + } + else { + return "-invalid value for enum type 'cpld1_reg'"; + } +} + +int +cpld1_reg_value(const char* str, cpld1_reg_t* e, int substr) +{ + int i; + AIM_REFERENCE(substr); + if(aim_map_si_s(&i, str, cpld1_reg_map, 0)) { + /* Enum Found */ + *e = i; + return 0; + } + else { + return -1; + } +} + +const char* +cpld1_reg_desc(cpld1_reg_t e) +{ + const char* name; + if(aim_map_si_i(&name, e, cpld1_reg_desc_map, 0)) { + return name; + } + else { + return "-invalid value for enum type 'cpld1_reg'"; + } +} + +int +cpld1_reg_valid(cpld1_reg_t e) +{ + return aim_map_si_i(NULL, e, cpld1_reg_map, 0) ? 1 : 0; +} + + +aim_map_si_t cpld2_reg_map[] = +{ + { "VERSION", CPLD2_REG_VERSION }, + { "SCRATCH", CPLD2_REG_SCRATCH }, + { "I2C_PORT_ID", CPLD2_REG_I2C_PORT_ID }, + { "I2C_OP_CODE", CPLD2_REG_I2C_OP_CODE }, + { "I2C_DEV_ADDR", CPLD2_REG_I2C_DEV_ADDR }, + { "I2C_CMD_BYTE0", CPLD2_REG_I2C_CMD_BYTE0 }, + { "I2C_CMD_BYTE1", CPLD2_REG_I2C_CMD_BYTE1 }, + { "I2C_CMD_BYTE2", CPLD2_REG_I2C_CMD_BYTE2 }, + { "I2C_STATUS_RESET", CPLD2_REG_I2C_STATUS_RESET }, + { "I2C_WRITE_DATA_BYTE0", CPLD2_REG_I2C_WRITE_DATA_BYTE0 }, + { "I2C_WRITE_DATA_BYTE1", CPLD2_REG_I2C_WRITE_DATA_BYTE1 }, + { "I2C_WRITE_DATA_BYTE2", CPLD2_REG_I2C_WRITE_DATA_BYTE2 }, + { "I2C_WRITE_DATA_BYTE3", CPLD2_REG_I2C_WRITE_DATA_BYTE3 }, + { "I2C_WRITE_DATA_BYTE4", CPLD2_REG_I2C_WRITE_DATA_BYTE4 }, + { "I2C_WRITE_DATA_BYTE5", CPLD2_REG_I2C_WRITE_DATA_BYTE5 }, + { "I2C_WRITE_DATA_BYTE6", CPLD2_REG_I2C_WRITE_DATA_BYTE6 }, + { "I2C_WRITE_DATA_BYTE7", CPLD2_REG_I2C_WRITE_DATA_BYTE7 }, + { "I2C_READ_DATA_BYTE0", CPLD2_REG_I2C_READ_DATA_BYTE0 }, + { "I2C_READ_DATA_BYTE1", CPLD2_REG_I2C_READ_DATA_BYTE1 }, + { "I2C_READ_DATA_BYTE2", CPLD2_REG_I2C_READ_DATA_BYTE2 }, + { "I2C_READ_DATA_BYTE3", CPLD2_REG_I2C_READ_DATA_BYTE3 }, + { "I2C_READ_DATA_BYTE4", CPLD2_REG_I2C_READ_DATA_BYTE4 }, + { "I2C_READ_DATA_BYTE5", CPLD2_REG_I2C_READ_DATA_BYTE5 }, + { "I2C_READ_DATA_BYTE6", CPLD2_REG_I2C_READ_DATA_BYTE6 }, + { "I2C_READ_DATA_BYTE7", CPLD2_REG_I2C_READ_DATA_BYTE7 }, + { "SFP_1_8_RX_LOS", CPLD2_REG_SFP_1_8_RX_LOS }, + { "SFP_9_16_RX_LOS", CPLD2_REG_SFP_9_16_RX_LOS }, + { "SFP_17_18_RX_LOS", CPLD2_REG_SFP_17_18_RX_LOS }, + { "SFP_1_8_RX_LOS_INT", CPLD2_REG_SFP_1_8_RX_LOS_INT }, + { "SFP_9_16_RX_LOS_INT", CPLD2_REG_SFP_9_16_RX_LOS_INT }, + { "SFP_17_18_RX_LOS_INT", CPLD2_REG_SFP_17_18_RX_LOS_INT }, + { "SFP_1_8_RX_LOS_MASK", CPLD2_REG_SFP_1_8_RX_LOS_MASK }, + { "SFP_9_16_RX_LOS_MASK", CPLD2_REG_SFP_9_16_RX_LOS_MASK }, + { "SFP_17_18_RX_LOS_MASK", CPLD2_REG_SFP_17_18_RX_LOS_MASK }, + { "SFP_1_8_TX_DISABLE", CPLD2_REG_SFP_1_8_TX_DISABLE }, + { "SFP_9_16_TX_DISABLE", CPLD2_REG_SFP_9_16_TX_DISABLE }, + { "SFP_17_18_TX_DISABLE", CPLD2_REG_SFP_17_18_TX_DISABLE }, + { "SFP_1_8_RS_CONTROL", CPLD2_REG_SFP_1_8_RS_CONTROL }, + { "SFP_9_16_RS_CONTROL", CPLD2_REG_SFP_9_16_RS_CONTROL }, + { "SFP_17_18_RS_CONTROL", CPLD2_REG_SFP_17_18_RS_CONTROL }, + { "SFP_1_8_TX_FAULT", CPLD2_REG_SFP_1_8_TX_FAULT }, + { "SFP_9_16_TX_FAULT", CPLD2_REG_SFP_9_16_TX_FAULT }, + { "SFP_17_18_TX_FAULT", CPLD2_REG_SFP_17_18_TX_FAULT }, + { "SFP_1_8_ABS_STATUS", CPLD2_REG_SFP_1_8_ABS_STATUS }, + { "SFP_9_16_ABS_STATUS", CPLD2_REG_SFP_9_16_ABS_STATUS }, + { "SFP_17_18_ABS_STATUS", CPLD2_REG_SFP_17_18_ABS_STATUS }, + { NULL, 0 } +}; + +aim_map_si_t cpld2_reg_desc_map[] = +{ + { "None", CPLD2_REG_VERSION }, + { "None", CPLD2_REG_SCRATCH }, + { "None", CPLD2_REG_I2C_PORT_ID }, + { "None", CPLD2_REG_I2C_OP_CODE }, + { "None", CPLD2_REG_I2C_DEV_ADDR }, + { "None", CPLD2_REG_I2C_CMD_BYTE0 }, + { "None", CPLD2_REG_I2C_CMD_BYTE1 }, + { "None", CPLD2_REG_I2C_CMD_BYTE2 }, + { "None", CPLD2_REG_I2C_STATUS_RESET }, + { "None", CPLD2_REG_I2C_WRITE_DATA_BYTE0 }, + { "None", CPLD2_REG_I2C_WRITE_DATA_BYTE1 }, + { "None", CPLD2_REG_I2C_WRITE_DATA_BYTE2 }, + { "None", CPLD2_REG_I2C_WRITE_DATA_BYTE3 }, + { "None", CPLD2_REG_I2C_WRITE_DATA_BYTE4 }, + { "None", CPLD2_REG_I2C_WRITE_DATA_BYTE5 }, + { "None", CPLD2_REG_I2C_WRITE_DATA_BYTE6 }, + { "None", CPLD2_REG_I2C_WRITE_DATA_BYTE7 }, + { "None", CPLD2_REG_I2C_READ_DATA_BYTE0 }, + { "None", CPLD2_REG_I2C_READ_DATA_BYTE1 }, + { "None", CPLD2_REG_I2C_READ_DATA_BYTE2 }, + { "None", CPLD2_REG_I2C_READ_DATA_BYTE3 }, + { "None", CPLD2_REG_I2C_READ_DATA_BYTE4 }, + { "None", CPLD2_REG_I2C_READ_DATA_BYTE5 }, + { "None", CPLD2_REG_I2C_READ_DATA_BYTE6 }, + { "None", CPLD2_REG_I2C_READ_DATA_BYTE7 }, + { "None", CPLD2_REG_SFP_1_8_RX_LOS }, + { "None", CPLD2_REG_SFP_9_16_RX_LOS }, + { "None", CPLD2_REG_SFP_17_18_RX_LOS }, + { "None", CPLD2_REG_SFP_1_8_RX_LOS_INT }, + { "None", CPLD2_REG_SFP_9_16_RX_LOS_INT }, + { "None", CPLD2_REG_SFP_17_18_RX_LOS_INT }, + { "None", CPLD2_REG_SFP_1_8_RX_LOS_MASK }, + { "None", CPLD2_REG_SFP_9_16_RX_LOS_MASK }, + { "None", CPLD2_REG_SFP_17_18_RX_LOS_MASK }, + { "None", CPLD2_REG_SFP_1_8_TX_DISABLE }, + { "None", CPLD2_REG_SFP_9_16_TX_DISABLE }, + { "None", CPLD2_REG_SFP_17_18_TX_DISABLE }, + { "None", CPLD2_REG_SFP_1_8_RS_CONTROL }, + { "None", CPLD2_REG_SFP_9_16_RS_CONTROL }, + { "None", CPLD2_REG_SFP_17_18_RS_CONTROL }, + { "None", CPLD2_REG_SFP_1_8_TX_FAULT }, + { "None", CPLD2_REG_SFP_9_16_TX_FAULT }, + { "None", CPLD2_REG_SFP_17_18_TX_FAULT }, + { "None", CPLD2_REG_SFP_1_8_ABS_STATUS }, + { "None", CPLD2_REG_SFP_9_16_ABS_STATUS }, + { "None", CPLD2_REG_SFP_17_18_ABS_STATUS }, + { NULL, 0 } +}; + +const char* +cpld2_reg_name(cpld2_reg_t e) +{ + const char* name; + if(aim_map_si_i(&name, e, cpld2_reg_map, 0)) { + return name; + } + else { + return "-invalid value for enum type 'cpld2_reg'"; + } +} + +int +cpld2_reg_value(const char* str, cpld2_reg_t* e, int substr) +{ + int i; + AIM_REFERENCE(substr); + if(aim_map_si_s(&i, str, cpld2_reg_map, 0)) { + /* Enum Found */ + *e = i; + return 0; + } + else { + return -1; + } +} + +const char* +cpld2_reg_desc(cpld2_reg_t e) +{ + const char* name; + if(aim_map_si_i(&name, e, cpld2_reg_desc_map, 0)) { + return name; + } + else { + return "-invalid value for enum type 'cpld2_reg'"; + } +} + +int +cpld2_reg_valid(cpld2_reg_t e) +{ + return aim_map_si_i(NULL, e, cpld2_reg_map, 0) ? 1 : 0; +} + + +aim_map_si_t cpld3_reg_map[] = +{ + { "VERSION", CPLD3_REG_VERSION }, + { "SCRATCH", CPLD3_REG_SCRATCH }, + { "I2C_PORT_ID", CPLD3_REG_I2C_PORT_ID }, + { "I2C_OP_CODE", CPLD3_REG_I2C_OP_CODE }, + { "I2C_DEV_ADDR", CPLD3_REG_I2C_DEV_ADDR }, + { "I2C_CMD_BYTE0", CPLD3_REG_I2C_CMD_BYTE0 }, + { "I2C_CMD_BYTE1", CPLD3_REG_I2C_CMD_BYTE1 }, + { "I2C_CMD_BYTE2", CPLD3_REG_I2C_CMD_BYTE2 }, + { "I2C_STATUS_RESET", CPLD3_REG_I2C_STATUS_RESET }, + { "I2C_WRITE_DATA_BYTE0", CPLD3_REG_I2C_WRITE_DATA_BYTE0 }, + { "I2C_WRITE_DATA_BYTE1", CPLD3_REG_I2C_WRITE_DATA_BYTE1 }, + { "I2C_WRITE_DATA_BYTE2", CPLD3_REG_I2C_WRITE_DATA_BYTE2 }, + { "I2C_WRITE_DATA_BYTE3", CPLD3_REG_I2C_WRITE_DATA_BYTE3 }, + { "I2C_WRITE_DATA_BYTE4", CPLD3_REG_I2C_WRITE_DATA_BYTE4 }, + { "I2C_WRITE_DATA_BYTE5", CPLD3_REG_I2C_WRITE_DATA_BYTE5 }, + { "I2C_WRITE_DATA_BYTE6", CPLD3_REG_I2C_WRITE_DATA_BYTE6 }, + { "I2C_WRITE_DATA_BYTE7", CPLD3_REG_I2C_WRITE_DATA_BYTE7 }, + { "I2C_READ_DATA_BYTE0", CPLD3_REG_I2C_READ_DATA_BYTE0 }, + { "I2C_READ_DATA_BYTE1", CPLD3_REG_I2C_READ_DATA_BYTE1 }, + { "I2C_READ_DATA_BYTE2", CPLD3_REG_I2C_READ_DATA_BYTE2 }, + { "I2C_READ_DATA_BYTE3", CPLD3_REG_I2C_READ_DATA_BYTE3 }, + { "I2C_READ_DATA_BYTE4", CPLD3_REG_I2C_READ_DATA_BYTE4 }, + { "I2C_READ_DATA_BYTE5", CPLD3_REG_I2C_READ_DATA_BYTE5 }, + { "I2C_READ_DATA_BYTE6", CPLD3_REG_I2C_READ_DATA_BYTE6 }, + { "I2C_READ_DATA_BYTE7", CPLD3_REG_I2C_READ_DATA_BYTE7 }, + { "SFP_19_26_RX_LOS", CPLD3_REG_SFP_19_26_RX_LOS }, + { "SFP_27_34_RX_LOS", CPLD3_REG_SFP_27_34_RX_LOS }, + { "SFP_35_36_RX_LOS", CPLD3_REG_SFP_35_36_RX_LOS }, + { "SFP_19_26_RX_LOS_INT", CPLD3_REG_SFP_19_26_RX_LOS_INT }, + { "SFP_27_34_RX_LOS_INT", CPLD3_REG_SFP_27_34_RX_LOS_INT }, + { "SFP_35_36_RX_LOS_INT", CPLD3_REG_SFP_35_36_RX_LOS_INT }, + { "SFP_19_26_RX_LOS_MASK", CPLD3_REG_SFP_19_26_RX_LOS_MASK }, + { "SFP_27_34_RX_LOS_MASK", CPLD3_REG_SFP_27_34_RX_LOS_MASK }, + { "SFP_35_36_RX_LOS_MASK", CPLD3_REG_SFP_35_36_RX_LOS_MASK }, + { "SFP_19_26_TX_DISABLE", CPLD3_REG_SFP_19_26_TX_DISABLE }, + { "SFP_27_34_TX_DISABLE", CPLD3_REG_SFP_27_34_TX_DISABLE }, + { "SFP_35_36_TX_DISABLE", CPLD3_REG_SFP_35_36_TX_DISABLE }, + { "SFP_19_26_RS_CONTROL", CPLD3_REG_SFP_19_26_RS_CONTROL }, + { "SFP_27_34_RS_CONTROL", CPLD3_REG_SFP_27_34_RS_CONTROL }, + { "SFP_35_36_RS_CONTROL", CPLD3_REG_SFP_35_36_RS_CONTROL }, + { "SFP_19_26_TX_FAULT", CPLD3_REG_SFP_19_26_TX_FAULT }, + { "SFP_27_34_TX_FAULT", CPLD3_REG_SFP_27_34_TX_FAULT }, + { "SFP_35_36_TX_FAULT", CPLD3_REG_SFP_35_36_TX_FAULT }, + { "SFP_19_26_ABS_STATUS", CPLD3_REG_SFP_19_26_ABS_STATUS }, + { "SFP_27_34_ABS_STATUS", CPLD3_REG_SFP_27_34_ABS_STATUS }, + { "SFP_35_36_ABS_STATUS", CPLD3_REG_SFP_35_36_ABS_STATUS }, + { NULL, 0 } +}; + +aim_map_si_t cpld3_reg_desc_map[] = +{ + { "None", CPLD3_REG_VERSION }, + { "None", CPLD3_REG_SCRATCH }, + { "None", CPLD3_REG_I2C_PORT_ID }, + { "None", CPLD3_REG_I2C_OP_CODE }, + { "None", CPLD3_REG_I2C_DEV_ADDR }, + { "None", CPLD3_REG_I2C_CMD_BYTE0 }, + { "None", CPLD3_REG_I2C_CMD_BYTE1 }, + { "None", CPLD3_REG_I2C_CMD_BYTE2 }, + { "None", CPLD3_REG_I2C_STATUS_RESET }, + { "None", CPLD3_REG_I2C_WRITE_DATA_BYTE0 }, + { "None", CPLD3_REG_I2C_WRITE_DATA_BYTE1 }, + { "None", CPLD3_REG_I2C_WRITE_DATA_BYTE2 }, + { "None", CPLD3_REG_I2C_WRITE_DATA_BYTE3 }, + { "None", CPLD3_REG_I2C_WRITE_DATA_BYTE4 }, + { "None", CPLD3_REG_I2C_WRITE_DATA_BYTE5 }, + { "None", CPLD3_REG_I2C_WRITE_DATA_BYTE6 }, + { "None", CPLD3_REG_I2C_WRITE_DATA_BYTE7 }, + { "None", CPLD3_REG_I2C_READ_DATA_BYTE0 }, + { "None", CPLD3_REG_I2C_READ_DATA_BYTE1 }, + { "None", CPLD3_REG_I2C_READ_DATA_BYTE2 }, + { "None", CPLD3_REG_I2C_READ_DATA_BYTE3 }, + { "None", CPLD3_REG_I2C_READ_DATA_BYTE4 }, + { "None", CPLD3_REG_I2C_READ_DATA_BYTE5 }, + { "None", CPLD3_REG_I2C_READ_DATA_BYTE6 }, + { "None", CPLD3_REG_I2C_READ_DATA_BYTE7 }, + { "None", CPLD3_REG_SFP_19_26_RX_LOS }, + { "None", CPLD3_REG_SFP_27_34_RX_LOS }, + { "None", CPLD3_REG_SFP_35_36_RX_LOS }, + { "None", CPLD3_REG_SFP_19_26_RX_LOS_INT }, + { "None", CPLD3_REG_SFP_27_34_RX_LOS_INT }, + { "None", CPLD3_REG_SFP_35_36_RX_LOS_INT }, + { "None", CPLD3_REG_SFP_19_26_RX_LOS_MASK }, + { "None", CPLD3_REG_SFP_27_34_RX_LOS_MASK }, + { "None", CPLD3_REG_SFP_35_36_RX_LOS_MASK }, + { "None", CPLD3_REG_SFP_19_26_TX_DISABLE }, + { "None", CPLD3_REG_SFP_27_34_TX_DISABLE }, + { "None", CPLD3_REG_SFP_35_36_TX_DISABLE }, + { "None", CPLD3_REG_SFP_19_26_RS_CONTROL }, + { "None", CPLD3_REG_SFP_27_34_RS_CONTROL }, + { "None", CPLD3_REG_SFP_35_36_RS_CONTROL }, + { "None", CPLD3_REG_SFP_19_26_TX_FAULT }, + { "None", CPLD3_REG_SFP_27_34_TX_FAULT }, + { "None", CPLD3_REG_SFP_35_36_TX_FAULT }, + { "None", CPLD3_REG_SFP_19_26_ABS_STATUS }, + { "None", CPLD3_REG_SFP_27_34_ABS_STATUS }, + { "None", CPLD3_REG_SFP_35_36_ABS_STATUS }, + { NULL, 0 } +}; + +const char* +cpld3_reg_name(cpld3_reg_t e) +{ + const char* name; + if(aim_map_si_i(&name, e, cpld3_reg_map, 0)) { + return name; + } + else { + return "-invalid value for enum type 'cpld3_reg'"; + } +} + +int +cpld3_reg_value(const char* str, cpld3_reg_t* e, int substr) +{ + int i; + AIM_REFERENCE(substr); + if(aim_map_si_s(&i, str, cpld3_reg_map, 0)) { + /* Enum Found */ + *e = i; + return 0; + } + else { + return -1; + } +} + +const char* +cpld3_reg_desc(cpld3_reg_t e) +{ + const char* name; + if(aim_map_si_i(&name, e, cpld3_reg_desc_map, 0)) { + return name; + } + else { + return "-invalid value for enum type 'cpld3_reg'"; + } +} + +int +cpld3_reg_valid(cpld3_reg_t e) +{ + return aim_map_si_i(NULL, e, cpld3_reg_map, 0) ? 1 : 0; +} + + +aim_map_si_t cpld4_reg_map[] = +{ + { "VERSION", CPLD4_REG_VERSION }, + { "SCRATCH", CPLD4_REG_SCRATCH }, + { "RESET_CONTROL", CPLD4_REG_RESET_CONTROL }, + { "LED_CONTROL", CPLD4_REG_LED_CONTROL }, + { "MISC_STATUS_CONTROL", CPLD4_REG_MISC_STATUS_CONTROL }, + { "INT_PORT_STATUS", CPLD4_REG_INT_PORT_STATUS }, + { "INT0_SOURCE_STATUS", CPLD4_REG_INT0_SOURCE_STATUS }, + { "INT1_SOURCE_STATUS", CPLD4_REG_INT1_SOURCE_STATUS }, + { "INT2_SOURCE_STATUS", CPLD4_REG_INT2_SOURCE_STATUS }, + { "INT0_SOURCE_INT", CPLD4_REG_INT0_SOURCE_INT }, + { "INT1_SOURCE_INT", CPLD4_REG_INT1_SOURCE_INT }, + { "INT2_SOURCE_INT", CPLD4_REG_INT2_SOURCE_INT }, + { "INT0_SOURCE_MASK", CPLD4_REG_INT0_SOURCE_MASK }, + { "INT1_SOURCE_MASK", CPLD4_REG_INT1_SOURCE_MASK }, + { "INT2_SOURCE_MASK", CPLD4_REG_INT2_SOURCE_MASK }, + { "I2C_PORT_ID", CPLD4_REG_I2C_PORT_ID }, + { "I2C_OP_CODE", CPLD4_REG_I2C_OP_CODE }, + { "I2C_DEV_ADDR", CPLD4_REG_I2C_DEV_ADDR }, + { "I2C_COMMAND_BYTE0", CPLD4_REG_I2C_COMMAND_BYTE0 }, + { "I2C_COMMAND_BYTE1", CPLD4_REG_I2C_COMMAND_BYTE1 }, + { "I2C_COMMAND_BYTE2", CPLD4_REG_I2C_COMMAND_BYTE2 }, + { "I2C_STATUS_RESET", CPLD4_REG_I2C_STATUS_RESET }, + { "I2C_WRITE_DATA_BYTE0", CPLD4_REG_I2C_WRITE_DATA_BYTE0 }, + { "I2C_WRITE_DATA_BYTE1", CPLD4_REG_I2C_WRITE_DATA_BYTE1 }, + { "I2C_WRITE_DATA_BYTE2", CPLD4_REG_I2C_WRITE_DATA_BYTE2 }, + { "I2C_WRITE_DATA_BYTE3", CPLD4_REG_I2C_WRITE_DATA_BYTE3 }, + { "I2C_WRITE_DATA_BYTE4", CPLD4_REG_I2C_WRITE_DATA_BYTE4 }, + { "I2C_WRITE_DATA_BYTE5", CPLD4_REG_I2C_WRITE_DATA_BYTE5 }, + { "I2C_WRITE_DATA_BYTE6", CPLD4_REG_I2C_WRITE_DATA_BYTE6 }, + { "I2C_WRITE_DATA_BYTE7", CPLD4_REG_I2C_WRITE_DATA_BYTE7 }, + { "I2C_READ_DATA_BYTE0", CPLD4_REG_I2C_READ_DATA_BYTE0 }, + { "I2C_READ_DATA_BYTE1", CPLD4_REG_I2C_READ_DATA_BYTE1 }, + { "I2C_READ_DATA_BYTE2", CPLD4_REG_I2C_READ_DATA_BYTE2 }, + { "I2C_READ_DATA_BYTE3", CPLD4_REG_I2C_READ_DATA_BYTE3 }, + { "I2C_READ_DATA_BYTE4", CPLD4_REG_I2C_READ_DATA_BYTE4 }, + { "I2C_READ_DATA_BYTE5", CPLD4_REG_I2C_READ_DATA_BYTE5 }, + { "I2C_READ_DATA_BYTE6", CPLD4_REG_I2C_READ_DATA_BYTE6 }, + { "I2C_READ_DATA_BYTE7", CPLD4_REG_I2C_READ_DATA_BYTE7 }, + { "QSFP_RESET_CONTROL", CPLD4_REG_QSFP_RESET_CONTROL }, + { "QSFP_LPMOD_CONTROL", CPLD4_REG_QSFP_LPMOD_CONTROL }, + { "QSFP_ABS_STATUS", CPLD4_REG_QSFP_ABS_STATUS }, + { "QSFP_INT_STATUS", CPLD4_REG_QSFP_INT_STATUS }, + { "QSFP_I2C_READY", CPLD4_REG_QSFP_I2C_READY }, + { NULL, 0 } +}; + +aim_map_si_t cpld4_reg_desc_map[] = +{ + { "None", CPLD4_REG_VERSION }, + { "None", CPLD4_REG_SCRATCH }, + { "None", CPLD4_REG_RESET_CONTROL }, + { "None", CPLD4_REG_LED_CONTROL }, + { "None", CPLD4_REG_MISC_STATUS_CONTROL }, + { "None", CPLD4_REG_INT_PORT_STATUS }, + { "None", CPLD4_REG_INT0_SOURCE_STATUS }, + { "None", CPLD4_REG_INT1_SOURCE_STATUS }, + { "None", CPLD4_REG_INT2_SOURCE_STATUS }, + { "None", CPLD4_REG_INT0_SOURCE_INT }, + { "None", CPLD4_REG_INT1_SOURCE_INT }, + { "None", CPLD4_REG_INT2_SOURCE_INT }, + { "None", CPLD4_REG_INT0_SOURCE_MASK }, + { "None", CPLD4_REG_INT1_SOURCE_MASK }, + { "None", CPLD4_REG_INT2_SOURCE_MASK }, + { "None", CPLD4_REG_I2C_PORT_ID }, + { "None", CPLD4_REG_I2C_OP_CODE }, + { "None", CPLD4_REG_I2C_DEV_ADDR }, + { "None", CPLD4_REG_I2C_COMMAND_BYTE0 }, + { "None", CPLD4_REG_I2C_COMMAND_BYTE1 }, + { "None", CPLD4_REG_I2C_COMMAND_BYTE2 }, + { "None", CPLD4_REG_I2C_STATUS_RESET }, + { "None", CPLD4_REG_I2C_WRITE_DATA_BYTE0 }, + { "None", CPLD4_REG_I2C_WRITE_DATA_BYTE1 }, + { "None", CPLD4_REG_I2C_WRITE_DATA_BYTE2 }, + { "None", CPLD4_REG_I2C_WRITE_DATA_BYTE3 }, + { "None", CPLD4_REG_I2C_WRITE_DATA_BYTE4 }, + { "None", CPLD4_REG_I2C_WRITE_DATA_BYTE5 }, + { "None", CPLD4_REG_I2C_WRITE_DATA_BYTE6 }, + { "None", CPLD4_REG_I2C_WRITE_DATA_BYTE7 }, + { "None", CPLD4_REG_I2C_READ_DATA_BYTE0 }, + { "None", CPLD4_REG_I2C_READ_DATA_BYTE1 }, + { "None", CPLD4_REG_I2C_READ_DATA_BYTE2 }, + { "None", CPLD4_REG_I2C_READ_DATA_BYTE3 }, + { "None", CPLD4_REG_I2C_READ_DATA_BYTE4 }, + { "None", CPLD4_REG_I2C_READ_DATA_BYTE5 }, + { "None", CPLD4_REG_I2C_READ_DATA_BYTE6 }, + { "None", CPLD4_REG_I2C_READ_DATA_BYTE7 }, + { "None", CPLD4_REG_QSFP_RESET_CONTROL }, + { "None", CPLD4_REG_QSFP_LPMOD_CONTROL }, + { "None", CPLD4_REG_QSFP_ABS_STATUS }, + { "None", CPLD4_REG_QSFP_INT_STATUS }, + { "None", CPLD4_REG_QSFP_I2C_READY }, + { NULL, 0 } +}; + +const char* +cpld4_reg_name(cpld4_reg_t e) +{ + const char* name; + if(aim_map_si_i(&name, e, cpld4_reg_map, 0)) { + return name; + } + else { + return "-invalid value for enum type 'cpld4_reg'"; + } +} + +int +cpld4_reg_value(const char* str, cpld4_reg_t* e, int substr) +{ + int i; + AIM_REFERENCE(substr); + if(aim_map_si_s(&i, str, cpld4_reg_map, 0)) { + /* Enum Found */ + *e = i; + return 0; + } + else { + return -1; + } +} + +const char* +cpld4_reg_desc(cpld4_reg_t e) +{ + const char* name; + if(aim_map_si_i(&name, e, cpld4_reg_desc_map, 0)) { + return name; + } + else { + return "-invalid value for enum type 'cpld4_reg'"; + } +} + +int +cpld4_reg_valid(cpld4_reg_t e) +{ + return aim_map_si_i(NULL, e, cpld4_reg_map, 0) ? 1 : 0; +} + + +aim_map_si_t cpld5_reg_map[] = +{ + { "VERSION", CPLD5_REG_VERSION }, + { "SCRATCH", CPLD5_REG_SCRATCH }, + { "I2C_PORT_ID", CPLD5_REG_I2C_PORT_ID }, + { "I2C_OP_CODE", CPLD5_REG_I2C_OP_CODE }, + { "I2C_DEV_ADDR", CPLD5_REG_I2C_DEV_ADDR }, + { "I2C_CMD_BYTE0", CPLD5_REG_I2C_CMD_BYTE0 }, + { "I2C_CMD_BYTE1", CPLD5_REG_I2C_CMD_BYTE1 }, + { "I2C_CMD_BYTE2", CPLD5_REG_I2C_CMD_BYTE2 }, + { "I2C_STATUS_RESET", CPLD5_REG_I2C_STATUS_RESET }, + { "I2C_WRITE_DATA_BYTE0", CPLD5_REG_I2C_WRITE_DATA_BYTE0 }, + { "I2C_WRITE_DATA_BYTE1", CPLD5_REG_I2C_WRITE_DATA_BYTE1 }, + { "I2C_WRITE_DATA_BYTE2", CPLD5_REG_I2C_WRITE_DATA_BYTE2 }, + { "I2C_WRITE_DATA_BYTE3", CPLD5_REG_I2C_WRITE_DATA_BYTE3 }, + { "I2C_WRITE_DATA_BYTE4", CPLD5_REG_I2C_WRITE_DATA_BYTE4 }, + { "I2C_WRITE_DATA_BYTE5", CPLD5_REG_I2C_WRITE_DATA_BYTE5 }, + { "I2C_WRITE_DATA_BYTE6", CPLD5_REG_I2C_WRITE_DATA_BYTE6 }, + { "I2C_WRITE_DATA_BYTE7", CPLD5_REG_I2C_WRITE_DATA_BYTE7 }, + { "I2C_READ_DATA_BYTE0", CPLD5_REG_I2C_READ_DATA_BYTE0 }, + { "I2C_READ_DATA_BYTE1", CPLD5_REG_I2C_READ_DATA_BYTE1 }, + { "I2C_READ_DATA_BYTE2", CPLD5_REG_I2C_READ_DATA_BYTE2 }, + { "I2C_READ_DATA_BYTE3", CPLD5_REG_I2C_READ_DATA_BYTE3 }, + { "I2C_READ_DATA_BYTE4", CPLD5_REG_I2C_READ_DATA_BYTE4 }, + { "I2C_READ_DATA_BYTE5", CPLD5_REG_I2C_READ_DATA_BYTE5 }, + { "I2C_READ_DATA_BYTE6", CPLD5_REG_I2C_READ_DATA_BYTE6 }, + { "I2C_READ_DATA_BYTE7", CPLD5_REG_I2C_READ_DATA_BYTE7 }, + { "SFP_37_44_RX_LOS", CPLD5_REG_SFP_37_44_RX_LOS }, + { "SFP_45_48_RX_LOS", CPLD5_REG_SFP_45_48_RX_LOS }, + { "SFP_37_44_RX_LOS_INT", CPLD5_REG_SFP_37_44_RX_LOS_INT }, + { "SFP_45_48_RX_LOS_INT", CPLD5_REG_SFP_45_48_RX_LOS_INT }, + { "SFP_37_44_RX_LOS_MASK", CPLD5_REG_SFP_37_44_RX_LOS_MASK }, + { "SFP_45_48_RX_LOS_MASK", CPLD5_REG_SFP_45_48_RX_LOS_MASK }, + { "SFP_37_44_TX_DISABLE", CPLD5_REG_SFP_37_44_TX_DISABLE }, + { "SFP_45_48_TX_DISABLE", CPLD5_REG_SFP_45_48_TX_DISABLE }, + { "SFP_37_44_RS_CONTROL", CPLD5_REG_SFP_37_44_RS_CONTROL }, + { "SFP_45_48_RS_CONTROL", CPLD5_REG_SFP_45_48_RS_CONTROL }, + { "SFP_37_44_TX_FAULT", CPLD5_REG_SFP_37_44_TX_FAULT }, + { "SFP_45_48_TX_FAULT", CPLD5_REG_SFP_45_48_TX_FAULT }, + { "SFP_37_44_ABS_STATUS", CPLD5_REG_SFP_37_44_ABS_STATUS }, + { "SFP_45_48_ABS_STATUS", CPLD5_REG_SFP_45_48_ABS_STATUS }, + { NULL, 0 } +}; + +aim_map_si_t cpld5_reg_desc_map[] = +{ + { "None", CPLD5_REG_VERSION }, + { "None", CPLD5_REG_SCRATCH }, + { "None", CPLD5_REG_I2C_PORT_ID }, + { "None", CPLD5_REG_I2C_OP_CODE }, + { "None", CPLD5_REG_I2C_DEV_ADDR }, + { "None", CPLD5_REG_I2C_CMD_BYTE0 }, + { "None", CPLD5_REG_I2C_CMD_BYTE1 }, + { "None", CPLD5_REG_I2C_CMD_BYTE2 }, + { "None", CPLD5_REG_I2C_STATUS_RESET }, + { "None", CPLD5_REG_I2C_WRITE_DATA_BYTE0 }, + { "None", CPLD5_REG_I2C_WRITE_DATA_BYTE1 }, + { "None", CPLD5_REG_I2C_WRITE_DATA_BYTE2 }, + { "None", CPLD5_REG_I2C_WRITE_DATA_BYTE3 }, + { "None", CPLD5_REG_I2C_WRITE_DATA_BYTE4 }, + { "None", CPLD5_REG_I2C_WRITE_DATA_BYTE5 }, + { "None", CPLD5_REG_I2C_WRITE_DATA_BYTE6 }, + { "None", CPLD5_REG_I2C_WRITE_DATA_BYTE7 }, + { "None", CPLD5_REG_I2C_READ_DATA_BYTE0 }, + { "None", CPLD5_REG_I2C_READ_DATA_BYTE1 }, + { "None", CPLD5_REG_I2C_READ_DATA_BYTE2 }, + { "None", CPLD5_REG_I2C_READ_DATA_BYTE3 }, + { "None", CPLD5_REG_I2C_READ_DATA_BYTE4 }, + { "None", CPLD5_REG_I2C_READ_DATA_BYTE5 }, + { "None", CPLD5_REG_I2C_READ_DATA_BYTE6 }, + { "None", CPLD5_REG_I2C_READ_DATA_BYTE7 }, + { "None", CPLD5_REG_SFP_37_44_RX_LOS }, + { "None", CPLD5_REG_SFP_45_48_RX_LOS }, + { "None", CPLD5_REG_SFP_37_44_RX_LOS_INT }, + { "None", CPLD5_REG_SFP_45_48_RX_LOS_INT }, + { "None", CPLD5_REG_SFP_37_44_RX_LOS_MASK }, + { "None", CPLD5_REG_SFP_45_48_RX_LOS_MASK }, + { "None", CPLD5_REG_SFP_37_44_TX_DISABLE }, + { "None", CPLD5_REG_SFP_45_48_TX_DISABLE }, + { "None", CPLD5_REG_SFP_37_44_RS_CONTROL }, + { "None", CPLD5_REG_SFP_45_48_RS_CONTROL }, + { "None", CPLD5_REG_SFP_37_44_TX_FAULT }, + { "None", CPLD5_REG_SFP_45_48_TX_FAULT }, + { "None", CPLD5_REG_SFP_37_44_ABS_STATUS }, + { "None", CPLD5_REG_SFP_45_48_ABS_STATUS }, + { NULL, 0 } +}; + +const char* +cpld5_reg_name(cpld5_reg_t e) +{ + const char* name; + if(aim_map_si_i(&name, e, cpld5_reg_map, 0)) { + return name; + } + else { + return "-invalid value for enum type 'cpld5_reg'"; + } +} + +int +cpld5_reg_value(const char* str, cpld5_reg_t* e, int substr) +{ + int i; + AIM_REFERENCE(substr); + if(aim_map_si_s(&i, str, cpld5_reg_map, 0)) { + /* Enum Found */ + *e = i; + return 0; + } + else { + return -1; + } +} + +const char* +cpld5_reg_desc(cpld5_reg_t e) +{ + const char* name; + if(aim_map_si_i(&name, e, cpld5_reg_desc_map, 0)) { + return name; + } + else { + return "-invalid value for enum type 'cpld5_reg'"; + } +} + +int +cpld5_reg_valid(cpld5_reg_t e) +{ + return aim_map_si_i(NULL, e, cpld5_reg_map, 0) ? 1 : 0; +} + +/* */ + diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/x86_64_cel_redstone_xp_int.h b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/x86_64_cel_redstone_xp_int.h new file mode 100644 index 00000000..27f57467 --- /dev/null +++ b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/x86_64_cel_redstone_xp_int.h @@ -0,0 +1,337 @@ +/**************************************************************************//** + * + * x86_64_cel_redstone_xp Internal Header + * + *****************************************************************************/ +#ifndef __X86_64_CEL_REDSTONE_XP_INT_H__ +#define __X86_64_CEL_REDSTONE_XP_INT_H__ + +#include + +/* */ +/** cpld1_reg */ +typedef enum cpld1_reg_e { + CPLD1_REG_VERSION = 256, + CPLD1_REG_SCRATCH = 257, + CPLD1_REG_RESET_CONTROL = 258, + CPLD1_REG_RESET_SOURCE = 259, + CPLD1_REG_BOARD_TYPE = 260, + CPLD1_REG_INT_PORT_STATUS = 272, + CPLD1_REG_INT0_SOURCE_STATUS = 273, + CPLD1_REG_INT0_SOURCE_INT = 274, + CPLD1_REG_INT0_SOURCE_MASK = 275, + CPLD1_REG_POWER_SUPPLY_STATUS = 288, + CPLD1_REG_POWER_GOOD_STATUS = 289, + CPLD1_REG_BPP_CONTROL = 290, + CPLD1_REG_WRITE_PROTECT_CONTROL = 291, + CPLD1_REG_MISC_STATUS_CONTROL = 292, + CPLD1_REG_INFO_RAM_ADDR_HIGH = 304, + CPLD1_REG_INFO_RAM_ADDR_LOW = 305, + CPLD1_REG_INFO_RAM_READ_DATA = 306, + CPLD1_REG_INFO_RAM_WRITE_DATA = 307, +} cpld1_reg_t; + +/** Enum names. */ +const char* cpld1_reg_name(cpld1_reg_t e); + +/** Enum values. */ +int cpld1_reg_value(const char* str, cpld1_reg_t* e, int substr); + +/** Enum descriptions. */ +const char* cpld1_reg_desc(cpld1_reg_t e); + +/** Enum validator. */ +int cpld1_reg_valid(cpld1_reg_t e); + +/** validator */ +#define CPLD1_REG_VALID(_e) \ + (cpld1_reg_valid((_e))) + +/** cpld1_reg_map table. */ +extern aim_map_si_t cpld1_reg_map[]; +/** cpld1_reg_desc_map table. */ +extern aim_map_si_t cpld1_reg_desc_map[]; + +/** cpld2_reg */ +typedef enum cpld2_reg_e { + CPLD2_REG_VERSION = 512, + CPLD2_REG_SCRATCH = 513, + CPLD2_REG_I2C_PORT_ID = 528, + CPLD2_REG_I2C_OP_CODE = 529, + CPLD2_REG_I2C_DEV_ADDR = 530, + CPLD2_REG_I2C_CMD_BYTE0 = 531, + CPLD2_REG_I2C_CMD_BYTE1 = 532, + CPLD2_REG_I2C_CMD_BYTE2 = 533, + CPLD2_REG_I2C_STATUS_RESET = 534, + CPLD2_REG_I2C_WRITE_DATA_BYTE0 = 544, + CPLD2_REG_I2C_WRITE_DATA_BYTE1 = 545, + CPLD2_REG_I2C_WRITE_DATA_BYTE2 = 546, + CPLD2_REG_I2C_WRITE_DATA_BYTE3 = 547, + CPLD2_REG_I2C_WRITE_DATA_BYTE4 = 548, + CPLD2_REG_I2C_WRITE_DATA_BYTE5 = 549, + CPLD2_REG_I2C_WRITE_DATA_BYTE6 = 550, + CPLD2_REG_I2C_WRITE_DATA_BYTE7 = 551, + CPLD2_REG_I2C_READ_DATA_BYTE0 = 560, + CPLD2_REG_I2C_READ_DATA_BYTE1 = 561, + CPLD2_REG_I2C_READ_DATA_BYTE2 = 562, + CPLD2_REG_I2C_READ_DATA_BYTE3 = 563, + CPLD2_REG_I2C_READ_DATA_BYTE4 = 564, + CPLD2_REG_I2C_READ_DATA_BYTE5 = 565, + CPLD2_REG_I2C_READ_DATA_BYTE6 = 566, + CPLD2_REG_I2C_READ_DATA_BYTE7 = 567, + CPLD2_REG_SFP_1_8_RX_LOS = 576, + CPLD2_REG_SFP_9_16_RX_LOS = 577, + CPLD2_REG_SFP_17_18_RX_LOS = 578, + CPLD2_REG_SFP_1_8_RX_LOS_INT = 579, + CPLD2_REG_SFP_9_16_RX_LOS_INT = 580, + CPLD2_REG_SFP_17_18_RX_LOS_INT = 581, + CPLD2_REG_SFP_1_8_RX_LOS_MASK = 582, + CPLD2_REG_SFP_9_16_RX_LOS_MASK = 583, + CPLD2_REG_SFP_17_18_RX_LOS_MASK = 584, + CPLD2_REG_SFP_1_8_TX_DISABLE = 592, + CPLD2_REG_SFP_9_16_TX_DISABLE = 593, + CPLD2_REG_SFP_17_18_TX_DISABLE = 594, + CPLD2_REG_SFP_1_8_RS_CONTROL = 595, + CPLD2_REG_SFP_9_16_RS_CONTROL = 596, + CPLD2_REG_SFP_17_18_RS_CONTROL = 597, + CPLD2_REG_SFP_1_8_TX_FAULT = 598, + CPLD2_REG_SFP_9_16_TX_FAULT = 599, + CPLD2_REG_SFP_17_18_TX_FAULT = 600, + CPLD2_REG_SFP_1_8_ABS_STATUS = 601, + CPLD2_REG_SFP_9_16_ABS_STATUS = 602, + CPLD2_REG_SFP_17_18_ABS_STATUS = 603, +} cpld2_reg_t; + +/** Enum names. */ +const char* cpld2_reg_name(cpld2_reg_t e); + +/** Enum values. */ +int cpld2_reg_value(const char* str, cpld2_reg_t* e, int substr); + +/** Enum descriptions. */ +const char* cpld2_reg_desc(cpld2_reg_t e); + +/** Enum validator. */ +int cpld2_reg_valid(cpld2_reg_t e); + +/** validator */ +#define CPLD2_REG_VALID(_e) \ + (cpld2_reg_valid((_e))) + +/** cpld2_reg_map table. */ +extern aim_map_si_t cpld2_reg_map[]; +/** cpld2_reg_desc_map table. */ +extern aim_map_si_t cpld2_reg_desc_map[]; + +/** cpld3_reg */ +typedef enum cpld3_reg_e { + CPLD3_REG_VERSION = 640, + CPLD3_REG_SCRATCH = 641, + CPLD3_REG_I2C_PORT_ID = 656, + CPLD3_REG_I2C_OP_CODE = 657, + CPLD3_REG_I2C_DEV_ADDR = 658, + CPLD3_REG_I2C_CMD_BYTE0 = 659, + CPLD3_REG_I2C_CMD_BYTE1 = 660, + CPLD3_REG_I2C_CMD_BYTE2 = 661, + CPLD3_REG_I2C_STATUS_RESET = 662, + CPLD3_REG_I2C_WRITE_DATA_BYTE0 = 672, + CPLD3_REG_I2C_WRITE_DATA_BYTE1 = 673, + CPLD3_REG_I2C_WRITE_DATA_BYTE2 = 674, + CPLD3_REG_I2C_WRITE_DATA_BYTE3 = 675, + CPLD3_REG_I2C_WRITE_DATA_BYTE4 = 676, + CPLD3_REG_I2C_WRITE_DATA_BYTE5 = 677, + CPLD3_REG_I2C_WRITE_DATA_BYTE6 = 678, + CPLD3_REG_I2C_WRITE_DATA_BYTE7 = 679, + CPLD3_REG_I2C_READ_DATA_BYTE0 = 688, + CPLD3_REG_I2C_READ_DATA_BYTE1 = 689, + CPLD3_REG_I2C_READ_DATA_BYTE2 = 690, + CPLD3_REG_I2C_READ_DATA_BYTE3 = 691, + CPLD3_REG_I2C_READ_DATA_BYTE4 = 692, + CPLD3_REG_I2C_READ_DATA_BYTE5 = 693, + CPLD3_REG_I2C_READ_DATA_BYTE6 = 694, + CPLD3_REG_I2C_READ_DATA_BYTE7 = 695, + CPLD3_REG_SFP_19_26_RX_LOS = 704, + CPLD3_REG_SFP_27_34_RX_LOS = 705, + CPLD3_REG_SFP_35_36_RX_LOS = 706, + CPLD3_REG_SFP_19_26_RX_LOS_INT = 707, + CPLD3_REG_SFP_27_34_RX_LOS_INT = 708, + CPLD3_REG_SFP_35_36_RX_LOS_INT = 709, + CPLD3_REG_SFP_19_26_RX_LOS_MASK = 710, + CPLD3_REG_SFP_27_34_RX_LOS_MASK = 711, + CPLD3_REG_SFP_35_36_RX_LOS_MASK = 712, + CPLD3_REG_SFP_19_26_TX_DISABLE = 720, + CPLD3_REG_SFP_27_34_TX_DISABLE = 721, + CPLD3_REG_SFP_35_36_TX_DISABLE = 722, + CPLD3_REG_SFP_19_26_RS_CONTROL = 723, + CPLD3_REG_SFP_27_34_RS_CONTROL = 724, + CPLD3_REG_SFP_35_36_RS_CONTROL = 725, + CPLD3_REG_SFP_19_26_TX_FAULT = 726, + CPLD3_REG_SFP_27_34_TX_FAULT = 727, + CPLD3_REG_SFP_35_36_TX_FAULT = 728, + CPLD3_REG_SFP_19_26_ABS_STATUS = 729, + CPLD3_REG_SFP_27_34_ABS_STATUS = 730, + CPLD3_REG_SFP_35_36_ABS_STATUS = 731, +} cpld3_reg_t; + +/** Enum names. */ +const char* cpld3_reg_name(cpld3_reg_t e); + +/** Enum values. */ +int cpld3_reg_value(const char* str, cpld3_reg_t* e, int substr); + +/** Enum descriptions. */ +const char* cpld3_reg_desc(cpld3_reg_t e); + +/** Enum validator. */ +int cpld3_reg_valid(cpld3_reg_t e); + +/** validator */ +#define CPLD3_REG_VALID(_e) \ + (cpld3_reg_valid((_e))) + +/** cpld3_reg_map table. */ +extern aim_map_si_t cpld3_reg_map[]; +/** cpld3_reg_desc_map table. */ +extern aim_map_si_t cpld3_reg_desc_map[]; + +/** cpld4_reg */ +typedef enum cpld4_reg_e { + CPLD4_REG_VERSION = 768, + CPLD4_REG_SCRATCH = 769, + CPLD4_REG_RESET_CONTROL = 770, + CPLD4_REG_LED_CONTROL = 771, + CPLD4_REG_MISC_STATUS_CONTROL = 772, + CPLD4_REG_INT_PORT_STATUS = 773, + CPLD4_REG_INT0_SOURCE_STATUS = 774, + CPLD4_REG_INT1_SOURCE_STATUS = 775, + CPLD4_REG_INT2_SOURCE_STATUS = 776, + CPLD4_REG_INT0_SOURCE_INT = 777, + CPLD4_REG_INT1_SOURCE_INT = 778, + CPLD4_REG_INT2_SOURCE_INT = 779, + CPLD4_REG_INT0_SOURCE_MASK = 780, + CPLD4_REG_INT1_SOURCE_MASK = 781, + CPLD4_REG_INT2_SOURCE_MASK = 782, + CPLD4_REG_I2C_PORT_ID = 784, + CPLD4_REG_I2C_OP_CODE = 785, + CPLD4_REG_I2C_DEV_ADDR = 786, + CPLD4_REG_I2C_COMMAND_BYTE0 = 787, + CPLD4_REG_I2C_COMMAND_BYTE1 = 788, + CPLD4_REG_I2C_COMMAND_BYTE2 = 789, + CPLD4_REG_I2C_STATUS_RESET = 790, + CPLD4_REG_I2C_WRITE_DATA_BYTE0 = 800, + CPLD4_REG_I2C_WRITE_DATA_BYTE1 = 801, + CPLD4_REG_I2C_WRITE_DATA_BYTE2 = 802, + CPLD4_REG_I2C_WRITE_DATA_BYTE3 = 803, + CPLD4_REG_I2C_WRITE_DATA_BYTE4 = 804, + CPLD4_REG_I2C_WRITE_DATA_BYTE5 = 805, + CPLD4_REG_I2C_WRITE_DATA_BYTE6 = 806, + CPLD4_REG_I2C_WRITE_DATA_BYTE7 = 807, + CPLD4_REG_I2C_READ_DATA_BYTE0 = 816, + CPLD4_REG_I2C_READ_DATA_BYTE1 = 817, + CPLD4_REG_I2C_READ_DATA_BYTE2 = 818, + CPLD4_REG_I2C_READ_DATA_BYTE3 = 819, + CPLD4_REG_I2C_READ_DATA_BYTE4 = 820, + CPLD4_REG_I2C_READ_DATA_BYTE5 = 821, + CPLD4_REG_I2C_READ_DATA_BYTE6 = 822, + CPLD4_REG_I2C_READ_DATA_BYTE7 = 823, + CPLD4_REG_QSFP_RESET_CONTROL = 864, + CPLD4_REG_QSFP_LPMOD_CONTROL = 865, + CPLD4_REG_QSFP_ABS_STATUS = 866, + CPLD4_REG_QSFP_INT_STATUS = 867, + CPLD4_REG_QSFP_I2C_READY = 868, +} cpld4_reg_t; + +/** Enum names. */ +const char* cpld4_reg_name(cpld4_reg_t e); + +/** Enum values. */ +int cpld4_reg_value(const char* str, cpld4_reg_t* e, int substr); + +/** Enum descriptions. */ +const char* cpld4_reg_desc(cpld4_reg_t e); + +/** Enum validator. */ +int cpld4_reg_valid(cpld4_reg_t e); + +/** validator */ +#define CPLD4_REG_VALID(_e) \ + (cpld4_reg_valid((_e))) + +/** cpld4_reg_map table. */ +extern aim_map_si_t cpld4_reg_map[]; +/** cpld4_reg_desc_map table. */ +extern aim_map_si_t cpld4_reg_desc_map[]; + +/** cpld5_reg */ +typedef enum cpld5_reg_e { + CPLD5_REG_VERSION = 896, + CPLD5_REG_SCRATCH = 897, + CPLD5_REG_I2C_PORT_ID = 912, + CPLD5_REG_I2C_OP_CODE = 913, + CPLD5_REG_I2C_DEV_ADDR = 914, + CPLD5_REG_I2C_CMD_BYTE0 = 915, + CPLD5_REG_I2C_CMD_BYTE1 = 916, + CPLD5_REG_I2C_CMD_BYTE2 = 917, + CPLD5_REG_I2C_STATUS_RESET = 918, + CPLD5_REG_I2C_WRITE_DATA_BYTE0 = 928, + CPLD5_REG_I2C_WRITE_DATA_BYTE1 = 929, + CPLD5_REG_I2C_WRITE_DATA_BYTE2 = 930, + CPLD5_REG_I2C_WRITE_DATA_BYTE3 = 931, + CPLD5_REG_I2C_WRITE_DATA_BYTE4 = 932, + CPLD5_REG_I2C_WRITE_DATA_BYTE5 = 933, + CPLD5_REG_I2C_WRITE_DATA_BYTE6 = 934, + CPLD5_REG_I2C_WRITE_DATA_BYTE7 = 935, + CPLD5_REG_I2C_READ_DATA_BYTE0 = 944, + CPLD5_REG_I2C_READ_DATA_BYTE1 = 945, + CPLD5_REG_I2C_READ_DATA_BYTE2 = 946, + CPLD5_REG_I2C_READ_DATA_BYTE3 = 947, + CPLD5_REG_I2C_READ_DATA_BYTE4 = 948, + CPLD5_REG_I2C_READ_DATA_BYTE5 = 949, + CPLD5_REG_I2C_READ_DATA_BYTE6 = 950, + CPLD5_REG_I2C_READ_DATA_BYTE7 = 951, + CPLD5_REG_SFP_37_44_RX_LOS = 960, + CPLD5_REG_SFP_45_48_RX_LOS = 961, + CPLD5_REG_SFP_37_44_RX_LOS_INT = 962, + CPLD5_REG_SFP_45_48_RX_LOS_INT = 963, + CPLD5_REG_SFP_37_44_RX_LOS_MASK = 964, + CPLD5_REG_SFP_45_48_RX_LOS_MASK = 965, + CPLD5_REG_SFP_37_44_TX_DISABLE = 976, + CPLD5_REG_SFP_45_48_TX_DISABLE = 977, + CPLD5_REG_SFP_37_44_RS_CONTROL = 978, + CPLD5_REG_SFP_45_48_RS_CONTROL = 979, + CPLD5_REG_SFP_37_44_TX_FAULT = 980, + CPLD5_REG_SFP_45_48_TX_FAULT = 981, + CPLD5_REG_SFP_37_44_ABS_STATUS = 982, + CPLD5_REG_SFP_45_48_ABS_STATUS = 983, +} cpld5_reg_t; + +/** Enum names. */ +const char* cpld5_reg_name(cpld5_reg_t e); + +/** Enum values. */ +int cpld5_reg_value(const char* str, cpld5_reg_t* e, int substr); + +/** Enum descriptions. */ +const char* cpld5_reg_desc(cpld5_reg_t e); + +/** Enum validator. */ +int cpld5_reg_valid(cpld5_reg_t e); + +/** validator */ +#define CPLD5_REG_VALID(_e) \ + (cpld5_reg_valid((_e))) + +/** cpld5_reg_map table. */ +extern aim_map_si_t cpld5_reg_map[]; +/** cpld5_reg_desc_map table. */ +extern aim_map_si_t cpld5_reg_desc_map[]; +/* */ + +#define CEL_REDSTONE_MAX_PORT 54 +#define ALL_SFP_I2C_ADDRESS (0xA0 >> 1) +#define ALL_SFP_DIAG_I2C_ADDRESS (0xA2 >> 1) +#define SFP_XFP_LOS_ADDR 110 +#define SFP_XFP_LOS_SIZE 1 +#define QSFP_LOS_ADDR 3 + +#endif /* __X86_64_CEL_REDSTONE_XP_INT_H__ */ diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/module/src/x86_64_cel_redstone_xp_log.c b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/x86_64_cel_redstone_xp_log.c similarity index 100% rename from packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/module/src/x86_64_cel_redstone_xp_log.c rename to packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/x86_64_cel_redstone_xp_log.c diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/module/src/x86_64_cel_redstone_xp_log.h b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/x86_64_cel_redstone_xp_log.h similarity index 100% rename from packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/module/src/x86_64_cel_redstone_xp_log.h rename to packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/x86_64_cel_redstone_xp_log.h diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/module/src/x86_64_cel_redstone_xp_module.c b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/x86_64_cel_redstone_xp_module.c similarity index 100% rename from packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/module/src/x86_64_cel_redstone_xp_module.c rename to packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/x86_64_cel_redstone_xp_module.c diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/module/src/x86_64_cel_redstone_xp_ucli.c b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/x86_64_cel_redstone_xp_ucli.c similarity index 100% rename from packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/module/src/x86_64_cel_redstone_xp_ucli.c rename to packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/x86_64_cel_redstone_xp_ucli.c diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/module/auto/x86_64_cel_redstone_xp.yml b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/module/auto/x86_64_cel_redstone_xp.yml deleted file mode 100644 index 030c8174..00000000 --- a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/module/auto/x86_64_cel_redstone_xp.yml +++ /dev/null @@ -1,47 +0,0 @@ -############################################################################### -# -# x86_64_cel_redstone_xp Autogeneration Definitions. -# -############################################################################### - -cdefs: &cdefs -- X86_64_CEL_REDSTONE_XP_CONFIG_INCLUDE_LOGGING: - doc: "Include or exclude logging." - default: 1 -- X86_64_CEL_REDSTONE_XP_CONFIG_LOG_OPTIONS_DEFAULT: - doc: "Default enabled log options." - default: AIM_LOG_OPTIONS_DEFAULT -- X86_64_CEL_REDSTONE_XP_CONFIG_LOG_BITS_DEFAULT: - doc: "Default enabled log bits." - default: AIM_LOG_BITS_DEFAULT -- X86_64_CEL_REDSTONE_XP_CONFIG_LOG_CUSTOM_BITS_DEFAULT: - doc: "Default enabled custom log bits." - default: 0 -- X86_64_CEL_REDSTONE_XP_CONFIG_PORTING_STDLIB: - doc: "Default all porting macros to use the C standard libraries." - default: 1 -- X86_64_CEL_REDSTONE_XP_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS: - doc: "Include standard library headers for stdlib porting macros." - default: X86_64_CEL_REDSTONE_XP_CONFIG_PORTING_STDLIB -- X86_64_CEL_REDSTONE_XP_CONFIG_INCLUDE_UCLI: - doc: "Include generic uCli support." - default: 0 - - -definitions: - cdefs: - X86_64_CEL_REDSTONE_XP_CONFIG_HEADER: - defs: *cdefs - basename: x86_64_cel_redstone_xp_config - - portingmacro: - X86_64_CEL_REDSTONE_XP: - macros: - - malloc - - free - - memset - - memcpy - - strncpy - - vsnprintf - - snprintf - - strlen diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/module/src/x86_64_cel_redstone_xp_int.h b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/module/src/x86_64_cel_redstone_xp_int.h deleted file mode 100644 index 42f8cb73..00000000 --- a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/module/src/x86_64_cel_redstone_xp_int.h +++ /dev/null @@ -1,12 +0,0 @@ -/**************************************************************************//** - * - * x86_64_cel_redstone_xp Internal Header - * - *****************************************************************************/ -#ifndef __X86_64_CEL_REDSTONE_XP_INT_H__ -#define __X86_64_CEL_REDSTONE_XP_INT_H__ - -#include - - -#endif /* __X86_64_CEL_REDSTONE_XP_INT_H__ */ diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/platform-config/r0/PKG.yml b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/platform-config/r0/PKG.yml index c7520af4..7ff2ca36 100644 --- a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/platform-config/r0/PKG.yml +++ b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/platform-config/r0/PKG.yml @@ -1,2 +1 @@ -!include $ONL_TEMPLATES/platform-config-platform.yml ARCH=amd64 VENDOR=celestica PLATFORM=x86-64-cel-redstone-xp-r0 - +!include $ONL_TEMPLATES/platform-config-platform.yml ARCH=amd64 VENDOR=celestica BASENAME=x86-64-cel-redstone-xp REVISION=r0 diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/platform-config/r0/src/lib/x86-64-cel-redstone-xp-r0.yml b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/platform-config/r0/src/lib/x86-64-cel-redstone-xp-r0.yml index 76c1455d..3c37e6b5 100644 --- a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/platform-config/r0/src/lib/x86-64-cel-redstone-xp-r0.yml +++ b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/platform-config/r0/src/lib/x86-64-cel-redstone-xp-r0.yml @@ -17,8 +17,8 @@ x86-64-cel-redstone-xp-r0: --parity=no --stop=1 - kernel: - <<: *kernel-3-2 + kernel: + <<: *kernel-3-16 args: >- nopat diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/platform-config/r0/src/python/x86_64_cel_redstone_xp_r0/__init__.py b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/platform-config/r0/src/python/x86_64_cel_redstone_xp_r0/__init__.py index f3d6c214..0a683e2f 100644 --- a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/platform-config/r0/src/python/x86_64_cel_redstone_xp_r0/__init__.py +++ b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/platform-config/r0/src/python/x86_64_cel_redstone_xp_r0/__init__.py @@ -6,4 +6,3 @@ class OnlPlatform_x86_64_cel_redstone_xp_r0(OnlPlatformCelestica, PLATFORM='x86-64-cel-redstone-xp-r0' MODEL="Redstone XP" SYS_OBJECT_ID=".2060.1" - diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-seastone/Makefile b/packages/platforms/celestica/x86-64/x86-64-cel-seastone/Makefile new file mode 100644 index 00000000..dc1e7b86 --- /dev/null +++ b/packages/platforms/celestica/x86-64/x86-64-cel-seastone/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-seastone/modules/Makefile b/packages/platforms/celestica/x86-64/x86-64-cel-seastone/modules/Makefile new file mode 100644 index 00000000..003238cf --- /dev/null +++ b/packages/platforms/celestica/x86-64/x86-64-cel-seastone/modules/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-seastone/modules/PKG.yml b/packages/platforms/celestica/x86-64/x86-64-cel-seastone/modules/PKG.yml new file mode 100644 index 00000000..d76f692a --- /dev/null +++ b/packages/platforms/celestica/x86-64/x86-64-cel-seastone/modules/PKG.yml @@ -0,0 +1 @@ +!include $ONL_TEMPLATES/no-platform-modules.yml ARCH=amd64 VENDOR=celestica BASENAME=x86-64-cel-seastone diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-seastone/onlp/Makefile b/packages/platforms/celestica/x86-64/x86-64-cel-seastone/onlp/Makefile new file mode 100644 index 00000000..dc1e7b86 --- /dev/null +++ b/packages/platforms/celestica/x86-64/x86-64-cel-seastone/onlp/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-seastone/onlp/PKG.yml b/packages/platforms/celestica/x86-64/x86-64-cel-seastone/onlp/PKG.yml new file mode 100644 index 00000000..e45f8811 --- /dev/null +++ b/packages/platforms/celestica/x86-64/x86-64-cel-seastone/onlp/PKG.yml @@ -0,0 +1,15 @@ +variables: + platform: x86-64-cel-seastone-r0 + install: /lib/platform-config/${platform}/onl + +common: + version: 1.0.0 + arch: amd64 + copyright: Copyright 2013, 2014, 2015 Big Switch Networks + maintainer: support@bigswitch.com + comment: dummy package for ONLP on Celestica Seastone +packages: + - name: onlp-${platform} + summary: ONLP Package for the ${platform} platform. + + changelog: initial version diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-seastone/platform-config/Makefile b/packages/platforms/celestica/x86-64/x86-64-cel-seastone/platform-config/Makefile new file mode 100644 index 00000000..dc1e7b86 --- /dev/null +++ b/packages/platforms/celestica/x86-64/x86-64-cel-seastone/platform-config/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-seastone/platform-config/r0/Makefile b/packages/platforms/celestica/x86-64/x86-64-cel-seastone/platform-config/r0/Makefile new file mode 100644 index 00000000..dc1e7b86 --- /dev/null +++ b/packages/platforms/celestica/x86-64/x86-64-cel-seastone/platform-config/r0/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-seastone/platform-config/r0/PKG.yml b/packages/platforms/celestica/x86-64/x86-64-cel-seastone/platform-config/r0/PKG.yml new file mode 100644 index 00000000..8db41dc9 --- /dev/null +++ b/packages/platforms/celestica/x86-64/x86-64-cel-seastone/platform-config/r0/PKG.yml @@ -0,0 +1 @@ +!include $ONL_TEMPLATES/platform-config-platform.yml ARCH=amd64 VENDOR=celestica BASENAME=x86-64-cel-seastone REVISION=r0 diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-seastone/platform-config/r0/src/lib/x86-64-cel-seastone-r0.yml b/packages/platforms/celestica/x86-64/x86-64-cel-seastone/platform-config/r0/src/lib/x86-64-cel-seastone-r0.yml new file mode 100644 index 00000000..c8255d1f --- /dev/null +++ b/packages/platforms/celestica/x86-64/x86-64-cel-seastone/platform-config/r0/src/lib/x86-64-cel-seastone-r0.yml @@ -0,0 +1,32 @@ +--- + +###################################################################### +# +# platform-config for Celestica Seastone +# +# +###################################################################### + +x86-64-cel-seastone-r0: + + grub: + + serial: >- + --port=0x3f8 + --speed=115200 + --word=8 + --parity=0 + --stop=1 + + kernel: + <<: *kernel-3-16 + + args: >- + nopat + console=ttyS0,115200n8 + + ##network + ## interfaces: + ## ma1: + ## name: ~ + ## syspath: pci0000:00/0000:00:14.0 diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-seastone/platform-config/r0/src/python/x86_64_cel_seastone_r0/__init__.py b/packages/platforms/celestica/x86-64/x86-64-cel-seastone/platform-config/r0/src/python/x86_64_cel_seastone_r0/__init__.py new file mode 100644 index 00000000..d0953da1 --- /dev/null +++ b/packages/platforms/celestica/x86-64/x86-64-cel-seastone/platform-config/r0/src/python/x86_64_cel_seastone_r0/__init__.py @@ -0,0 +1,8 @@ +from onl.platform.base import * +from onl.platform.celestica import * + +class OnlPlatform_x86_64_cel_seastone_r0(OnlPlatformCelestica, + OnlPlatformPortConfig_48x10_6x40): + PLATFORM='x86-64-cel-seastone-r0' + MODEL="Seastone" + SYS_OBJECT_ID=".2060.1" diff --git a/packages/platforms/kvm/x86-64/modules/Makefile b/packages/platforms/kvm/x86-64/modules/Makefile new file mode 100644 index 00000000..003238cf --- /dev/null +++ b/packages/platforms/kvm/x86-64/modules/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/packages/platforms/kvm/x86-64/modules/PKG.yml b/packages/platforms/kvm/x86-64/modules/PKG.yml new file mode 100644 index 00000000..e1ad3bf5 --- /dev/null +++ b/packages/platforms/kvm/x86-64/modules/PKG.yml @@ -0,0 +1 @@ +!include $ONL_TEMPLATES/no-arch-vendor-modules.yml ARCH=amd64 VENDOR=kvm diff --git a/packages/platforms/kvm/x86-64/x86-64-kvm-x86-64/modules/Makefile b/packages/platforms/kvm/x86-64/x86-64-kvm-x86-64/modules/Makefile new file mode 100644 index 00000000..003238cf --- /dev/null +++ b/packages/platforms/kvm/x86-64/x86-64-kvm-x86-64/modules/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/packages/platforms/kvm/x86-64/x86-64-kvm-x86-64/modules/PKG.yml b/packages/platforms/kvm/x86-64/x86-64-kvm-x86-64/modules/PKG.yml new file mode 100644 index 00000000..7bf18671 --- /dev/null +++ b/packages/platforms/kvm/x86-64/x86-64-kvm-x86-64/modules/PKG.yml @@ -0,0 +1 @@ +!include $ONL_TEMPLATES/no-platform-modules.yml ARCH=amd64 VENDOR=kvm BASENAME=x86-64-kvm-x86-64 diff --git a/packages/platforms/kvm/x86-64/x86-64-kvm-x86-64/platform-config/r0/PKG.yml b/packages/platforms/kvm/x86-64/x86-64-kvm-x86-64/platform-config/r0/PKG.yml index c9d5b0bb..890d61fc 100644 --- a/packages/platforms/kvm/x86-64/x86-64-kvm-x86-64/platform-config/r0/PKG.yml +++ b/packages/platforms/kvm/x86-64/x86-64-kvm-x86-64/platform-config/r0/PKG.yml @@ -1,2 +1 @@ -!include $ONL_TEMPLATES/platform-config-platform.yml ARCH=amd64 VENDOR=kvm PLATFORM=x86-64-kvm-x86-64-r0 - +!include $ONL_TEMPLATES/platform-config-platform.yml ARCH=amd64 VENDOR=kvm BASENAME=x86-64-kvm-x86-64 REVISION=r0 diff --git a/packages/platforms/mellanox/x86-64/modules/Makefile b/packages/platforms/mellanox/x86-64/modules/Makefile new file mode 100644 index 00000000..003238cf --- /dev/null +++ b/packages/platforms/mellanox/x86-64/modules/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/packages/platforms/mellanox/x86-64/modules/PKG.yml b/packages/platforms/mellanox/x86-64/modules/PKG.yml new file mode 100644 index 00000000..dded41d6 --- /dev/null +++ b/packages/platforms/mellanox/x86-64/modules/PKG.yml @@ -0,0 +1 @@ +!include $ONL_TEMPLATES/no-arch-vendor-modules.yml ARCH=amd64 VENDOR=mellanox diff --git a/packages/platforms/mellanox/x86-64/x86-64-mlnx-msn2100/modules/Makefile b/packages/platforms/mellanox/x86-64/x86-64-mlnx-msn2100/modules/Makefile new file mode 100644 index 00000000..003238cf --- /dev/null +++ b/packages/platforms/mellanox/x86-64/x86-64-mlnx-msn2100/modules/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/packages/platforms/mellanox/x86-64/x86-64-mlnx-msn2100/modules/PKG.yml b/packages/platforms/mellanox/x86-64/x86-64-mlnx-msn2100/modules/PKG.yml new file mode 100644 index 00000000..a5e2e30b --- /dev/null +++ b/packages/platforms/mellanox/x86-64/x86-64-mlnx-msn2100/modules/PKG.yml @@ -0,0 +1 @@ +!include $ONL_TEMPLATES/no-platform-modules.yml ARCH=amd64 VENDOR=mellanox BASENAME=x86-64-mlnx-msn2100 diff --git a/packages/platforms/mellanox/x86-64/x86-64-mlnx-msn2100/platform-config/r0/PKG.yml b/packages/platforms/mellanox/x86-64/x86-64-mlnx-msn2100/platform-config/r0/PKG.yml index eb6c9456..498a4ddc 100644 --- a/packages/platforms/mellanox/x86-64/x86-64-mlnx-msn2100/platform-config/r0/PKG.yml +++ b/packages/platforms/mellanox/x86-64/x86-64-mlnx-msn2100/platform-config/r0/PKG.yml @@ -1 +1 @@ -!include $ONL_TEMPLATES/platform-config-platform.yml ARCH=amd64 VENDOR=mellanox PLATFORM=x86-64-mlnx-msn2100-r0 +!include $ONL_TEMPLATES/platform-config-platform.yml ARCH=amd64 VENDOR=mellanox BASENAME=x86-64-mlnx-msn2100 REVISION=r0 diff --git a/packages/platforms/mellanox/x86-64/x86-64-mlnx-msn2410/modules/Makefile b/packages/platforms/mellanox/x86-64/x86-64-mlnx-msn2410/modules/Makefile new file mode 100644 index 00000000..003238cf --- /dev/null +++ b/packages/platforms/mellanox/x86-64/x86-64-mlnx-msn2410/modules/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/packages/platforms/mellanox/x86-64/x86-64-mlnx-msn2410/modules/PKG.yml b/packages/platforms/mellanox/x86-64/x86-64-mlnx-msn2410/modules/PKG.yml new file mode 100644 index 00000000..d5e5131f --- /dev/null +++ b/packages/platforms/mellanox/x86-64/x86-64-mlnx-msn2410/modules/PKG.yml @@ -0,0 +1 @@ +!include $ONL_TEMPLATES/no-platform-modules.yml ARCH=amd64 VENDOR=mellanox BASENAME=x86-64-mlnx-msn2410 diff --git a/packages/platforms/mellanox/x86-64/x86-64-mlnx-msn2410/platform-config/r0/PKG.yml b/packages/platforms/mellanox/x86-64/x86-64-mlnx-msn2410/platform-config/r0/PKG.yml index 49e15204..3dac0e41 100644 --- a/packages/platforms/mellanox/x86-64/x86-64-mlnx-msn2410/platform-config/r0/PKG.yml +++ b/packages/platforms/mellanox/x86-64/x86-64-mlnx-msn2410/platform-config/r0/PKG.yml @@ -1 +1 @@ -!include $ONL_TEMPLATES/platform-config-platform.yml ARCH=amd64 VENDOR=mellanox PLATFORM=x86-64-mlnx-msn2410-r0 +!include $ONL_TEMPLATES/platform-config-platform.yml ARCH=amd64 VENDOR=mellanox BASENAME=x86-64-mlnx-msn2410 REVISION=r0 diff --git a/packages/platforms/mellanox/x86-64/x86-64-mlnx-msn2700/modules/Makefile b/packages/platforms/mellanox/x86-64/x86-64-mlnx-msn2700/modules/Makefile new file mode 100644 index 00000000..003238cf --- /dev/null +++ b/packages/platforms/mellanox/x86-64/x86-64-mlnx-msn2700/modules/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/packages/platforms/mellanox/x86-64/x86-64-mlnx-msn2700/modules/PKG.yml b/packages/platforms/mellanox/x86-64/x86-64-mlnx-msn2700/modules/PKG.yml new file mode 100644 index 00000000..3d8540f8 --- /dev/null +++ b/packages/platforms/mellanox/x86-64/x86-64-mlnx-msn2700/modules/PKG.yml @@ -0,0 +1 @@ +!include $ONL_TEMPLATES/no-platform-modules.yml ARCH=amd64 VENDOR=mellanox BASENAME=x86-64-mlnx-msn2700 diff --git a/packages/platforms/mellanox/x86-64/x86-64-mlnx-msn2700/platform-config/r0/PKG.yml b/packages/platforms/mellanox/x86-64/x86-64-mlnx-msn2700/platform-config/r0/PKG.yml index 463fc056..377738c1 100644 --- a/packages/platforms/mellanox/x86-64/x86-64-mlnx-msn2700/platform-config/r0/PKG.yml +++ b/packages/platforms/mellanox/x86-64/x86-64-mlnx-msn2700/platform-config/r0/PKG.yml @@ -1 +1 @@ -!include $ONL_TEMPLATES/platform-config-platform.yml ARCH=amd64 VENDOR=mellanox PLATFORM=x86-64-mlnx-msn2700-r0 +!include $ONL_TEMPLATES/platform-config-platform.yml ARCH=amd64 VENDOR=mellanox BASENAME=x86-64-mlnx-msn2700 REVISION=r0 diff --git a/packages/platforms/nxp/arm64/arm64-nxp-ls2080ardb/modules/Makefile b/packages/platforms/nxp/arm64/arm64-nxp-ls2080ardb/modules/Makefile new file mode 100644 index 00000000..003238cf --- /dev/null +++ b/packages/platforms/nxp/arm64/arm64-nxp-ls2080ardb/modules/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/packages/platforms/nxp/arm64/arm64-nxp-ls2080ardb/modules/PKG.yml b/packages/platforms/nxp/arm64/arm64-nxp-ls2080ardb/modules/PKG.yml new file mode 100644 index 00000000..dfb16da9 --- /dev/null +++ b/packages/platforms/nxp/arm64/arm64-nxp-ls2080ardb/modules/PKG.yml @@ -0,0 +1 @@ +!include $ONL_TEMPLATES/no-platform-modules.yml ARCH=arm64 VENDOR=nxp BASENAME=arm64-nxp-ls2080ardb diff --git a/packages/platforms/nxp/arm64/arm64-nxp-ls2080ardb/platform-config/r0/PKG.yml b/packages/platforms/nxp/arm64/arm64-nxp-ls2080ardb/platform-config/r0/PKG.yml index e009fc27..e819bcc5 100644 --- a/packages/platforms/nxp/arm64/arm64-nxp-ls2080ardb/platform-config/r0/PKG.yml +++ b/packages/platforms/nxp/arm64/arm64-nxp-ls2080ardb/platform-config/r0/PKG.yml @@ -1 +1 @@ -!include $ONL_TEMPLATES/platform-config-platform.yml ARCH=arm64 VENDOR=nxp PLATFORM=arm64-nxp-ls2080ardb-r0 +!include $ONL_TEMPLATES/platform-config-platform.yml ARCH=arm64 VENDOR=nxp BASENAME=arm64-nxp-ls2080ardb REVISION=r0 diff --git a/packages/platforms/nxp/arm64/arm64-nxp-ls2088ardb/.gitignore b/packages/platforms/nxp/arm64/arm64-nxp-ls2088ardb/.gitignore new file mode 100644 index 00000000..10f69609 --- /dev/null +++ b/packages/platforms/nxp/arm64/arm64-nxp-ls2088ardb/.gitignore @@ -0,0 +1,2 @@ +*arm64*nxp*ls2080ardb*.mk +onlpdump.mk diff --git a/packages/platforms/nxp/arm64/arm64-nxp-ls2088ardb/Makefile b/packages/platforms/nxp/arm64/arm64-nxp-ls2088ardb/Makefile new file mode 100644 index 00000000..003238cf --- /dev/null +++ b/packages/platforms/nxp/arm64/arm64-nxp-ls2088ardb/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/packages/platforms/nxp/arm64/arm64-nxp-ls2088ardb/modules/Makefile b/packages/platforms/nxp/arm64/arm64-nxp-ls2088ardb/modules/Makefile new file mode 100644 index 00000000..003238cf --- /dev/null +++ b/packages/platforms/nxp/arm64/arm64-nxp-ls2088ardb/modules/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/packages/platforms/nxp/arm64/arm64-nxp-ls2088ardb/modules/PKG.yml b/packages/platforms/nxp/arm64/arm64-nxp-ls2088ardb/modules/PKG.yml new file mode 100644 index 00000000..80f09b76 --- /dev/null +++ b/packages/platforms/nxp/arm64/arm64-nxp-ls2088ardb/modules/PKG.yml @@ -0,0 +1 @@ +!include $ONL_TEMPLATES/no-platform-modules.yml ARCH=arm64 VENDOR=nxp BASENAME=arm64-nxp-ls2088ardb diff --git a/packages/platforms/nxp/arm64/arm64-nxp-ls2088ardb/onlp/Makefile b/packages/platforms/nxp/arm64/arm64-nxp-ls2088ardb/onlp/Makefile new file mode 100644 index 00000000..003238cf --- /dev/null +++ b/packages/platforms/nxp/arm64/arm64-nxp-ls2088ardb/onlp/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/packages/platforms/nxp/arm64/arm64-nxp-ls2088ardb/onlp/PKG.yml b/packages/platforms/nxp/arm64/arm64-nxp-ls2088ardb/onlp/PKG.yml new file mode 100644 index 00000000..02107aee --- /dev/null +++ b/packages/platforms/nxp/arm64/arm64-nxp-ls2088ardb/onlp/PKG.yml @@ -0,0 +1,27 @@ +variables: + platformbase: arm64-nxp-ls2080ardb + r0_install: /lib/platform-config/arm64-nxp-ls2080ardb-r0/onl + r1_install: /lib/platform-config/arm64-nxp-ls2088ardb-r1/onl + +common: + version: 1.0.0 + arch: arm64 + copyright: Copyright 2016 NXP Semiconductor, Inc. + maintainer: support@bigswitch.com + changelog: Change changes changes., + + +packages: + - name: onlp-arm64-nxp-ls2080ardb-r0 + summary: ONLP Package for the arm64-nxp-ls2080ardb-r0 platform. + + files: + builds/lib/$BUILD_DIR/aarch64-linux-gnu/bin/libonlp-${platformbase}.so : ${r0_install}/lib/libonlp-${platformbase}.so + builds/onlpdump/$BUILD_DIR/aarch64-linux-gnu/bin/onlpdump : ${r0_install}/bin/ + + - name: onlp-arm64-nxp-ls2088ardb-r1 + summary: ONLP Package for the arm64-nxp-ls2088ardb-r1 platform. + + files: + builds/lib/$BUILD_DIR/aarch64-linux-gnu/bin/libonlp-${platformbase}.so : ${r1_install}/lib/libonlp-${platformbase}.so + builds/onlpdump/$BUILD_DIR/aarch64-linux-gnu/bin/onlpdump : ${r1_install}/bin/ diff --git a/packages/platforms/nxp/arm64/arm64-nxp-ls2088ardb/onlp/builds/Makefile b/packages/platforms/nxp/arm64/arm64-nxp-ls2088ardb/onlp/builds/Makefile new file mode 100644 index 00000000..e7437cb2 --- /dev/null +++ b/packages/platforms/nxp/arm64/arm64-nxp-ls2088ardb/onlp/builds/Makefile @@ -0,0 +1,2 @@ +FILTER=src +include $(ONL)/make/subdirs.mk diff --git a/packages/platforms/nxp/arm64/arm64-nxp-ls2088ardb/onlp/builds/lib/Makefile b/packages/platforms/nxp/arm64/arm64-nxp-ls2088ardb/onlp/builds/lib/Makefile new file mode 100644 index 00000000..12348c12 --- /dev/null +++ b/packages/platforms/nxp/arm64/arm64-nxp-ls2088ardb/onlp/builds/lib/Makefile @@ -0,0 +1,44 @@ +############################################################ +# +# +# Copyright 2016 NXP Semiconductor, Inc. +# +# Licensed under the Eclipse Public License, Version 1.0 (the +# "License"); you may not use this file except in compliance +# with the License. You may obtain a copy of the License at +# +# http://www.eclipse.org/legal/epl-v10.html +# +# Unless required by applicable law or agreed to in writing, +# software distributed under the License is distributed on an +# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, +# either express or implied. See the License for the specific +# language governing permissions and limitations under the +# License. +# +# +############################################################ +# +# +############################################################ +include $(ONL)/make/config.arm64.mk + +MODULE := libonlp-arm64-nxp-ls2080ardb +include $(BUILDER)/standardinit.mk + +DEPENDMODULES := AIM IOF arm64_nxp_ls2080ardb onlplib +DEPENDMODULE_HEADERS := sff + +include $(BUILDER)/dependmodules.mk + +SHAREDLIB := libonlp-arm64-nxp-ls2080ardb.so +$(SHAREDLIB)_TARGETS := $(ALL_TARGETS) +include $(BUILDER)/so.mk +.DEFAULT_GOAL := $(SHAREDLIB) + +GLOBAL_CFLAGS += -I$(onlp_BASEDIR)/module/inc +GLOBAL_CFLAGS += -DAIM_CONFIG_INCLUDE_MODULES_INIT=1 +GLOBAL_CFLAGS += -fPIC +GLOBAL_LINK_LIBS += -lpthread + +include $(BUILDER)/targets.mk diff --git a/packages/platforms/nxp/arm64/arm64-nxp-ls2088ardb/onlp/builds/onlpdump/Makefile b/packages/platforms/nxp/arm64/arm64-nxp-ls2088ardb/onlp/builds/onlpdump/Makefile new file mode 100644 index 00000000..1af1118a --- /dev/null +++ b/packages/platforms/nxp/arm64/arm64-nxp-ls2088ardb/onlp/builds/onlpdump/Makefile @@ -0,0 +1,45 @@ +############################################################ +# +# +# Copyright 2016 NXP Semiconductor, Inc. +# +# Licensed under the Eclipse Public License, Version 1.0 (the +# "License"); you may not use this file except in compliance +# with the License. You may obtain a copy of the License at +# +# http://www.eclipse.org/legal/epl-v10.html +# +# Unless required by applicable law or agreed to in writing, +# software distributed under the License is distributed on an +# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, +# either express or implied. See the License for the specific +# language governing permissions and limitations under the +# License. +# +# +############################################################ +# +# +# +############################################################ +include $(ONL)/make/config.arm64.mk + +.DEFAULT_GOAL := onlpdump + +MODULE := onlpdump +include $(BUILDER)/standardinit.mk + +DEPENDMODULES := AIM IOF onlp arm64_nxp_ls2080ardb onlplib onlp_platform_defaults sff cjson cjson_util timer_wheel OS + +include $(BUILDER)/dependmodules.mk + +BINARY := onlpdump +$(BINARY)_LIBRARIES := $(LIBRARY_TARGETS) +include $(BUILDER)/bin.mk + +GLOBAL_CFLAGS += -DAIM_CONFIG_AIM_MAIN_FUNCTION=onlpdump_main +GLOBAL_CFLAGS += -DAIM_CONFIG_INCLUDE_MODULES_INIT=1 +GLOBAL_CFLAGS += -DAIM_CONFIG_INCLUDE_MAIN=1 +GLOBAL_LINK_LIBS += -lpthread -lm + +include $(BUILDER)/targets.mk diff --git a/packages/platforms/nxp/arm64/arm64-nxp-ls2088ardb/platform-config/Makefile b/packages/platforms/nxp/arm64/arm64-nxp-ls2088ardb/platform-config/Makefile new file mode 100644 index 00000000..003238cf --- /dev/null +++ b/packages/platforms/nxp/arm64/arm64-nxp-ls2088ardb/platform-config/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/packages/platforms/nxp/arm64/arm64-nxp-ls2088ardb/platform-config/r0/Makefile b/packages/platforms/nxp/arm64/arm64-nxp-ls2088ardb/platform-config/r0/Makefile new file mode 100644 index 00000000..003238cf --- /dev/null +++ b/packages/platforms/nxp/arm64/arm64-nxp-ls2088ardb/platform-config/r0/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/packages/platforms/nxp/arm64/arm64-nxp-ls2080ardb/platform-config/r1/PKG.yml b/packages/platforms/nxp/arm64/arm64-nxp-ls2088ardb/platform-config/r0/PKG.yml similarity index 54% rename from packages/platforms/nxp/arm64/arm64-nxp-ls2080ardb/platform-config/r1/PKG.yml rename to packages/platforms/nxp/arm64/arm64-nxp-ls2088ardb/platform-config/r0/PKG.yml index fae4a10c..e819bcc5 100644 --- a/packages/platforms/nxp/arm64/arm64-nxp-ls2080ardb/platform-config/r1/PKG.yml +++ b/packages/platforms/nxp/arm64/arm64-nxp-ls2088ardb/platform-config/r0/PKG.yml @@ -1 +1 @@ -!include $ONL_TEMPLATES/platform-config-platform.yml ARCH=arm64 VENDOR=nxp PLATFORM=arm64-nxp-ls2088ardb-r1 +!include $ONL_TEMPLATES/platform-config-platform.yml ARCH=arm64 VENDOR=nxp BASENAME=arm64-nxp-ls2080ardb REVISION=r0 diff --git a/packages/platforms/nxp/arm64/arm64-nxp-ls2088ardb/platform-config/r0/src/lib/arm64-nxp-ls2080ardb-r0.yml b/packages/platforms/nxp/arm64/arm64-nxp-ls2088ardb/platform-config/r0/src/lib/arm64-nxp-ls2080ardb-r0.yml new file mode 100644 index 00000000..631c369e --- /dev/null +++ b/packages/platforms/nxp/arm64/arm64-nxp-ls2088ardb/platform-config/r0/src/lib/arm64-nxp-ls2080ardb-r0.yml @@ -0,0 +1,44 @@ +--- + +###################################################################### +# +# platform-config for LS2080ARDB +# +###################################################################### + +arm64-nxp-ls2080ardb-r0: + flat_image_tree: + kernel: + <<: *arm64-kernel + dtb: + =: arm64-nxp-ls2080ardb-r0.dtb + <<: *arm64-kernel-package + itb: + <<: *arm64-itb + + loader: + device: /dev/sda + ##partition: /dev/sda1 + loadaddr: 0xa0000000 + nos_bootcmds: *usb_bootcmds + + environment: + - device: /dev/mtd2 + env_offset: 0x00000000 + env_size: 0x0002000 + sector_size: 0x00020000 + + installer: + - ONL-BOOT: + =: 128MiB + format: ext2 + ##format: raw + - ONL-CONFIG: + =: 128MiB + format: ext4 + - ONL-IMAGES: + =: 1GiB + format: ext4 + - ONL-DATA: + =: 100% + format: ext4 diff --git a/packages/platforms/nxp/arm64/arm64-nxp-ls2088ardb/platform-config/r0/src/python/arm64_nxp_ls2080ardb_r0/__init__.py b/packages/platforms/nxp/arm64/arm64-nxp-ls2088ardb/platform-config/r0/src/python/arm64_nxp_ls2080ardb_r0/__init__.py new file mode 100644 index 00000000..9baaa889 --- /dev/null +++ b/packages/platforms/nxp/arm64/arm64-nxp-ls2088ardb/platform-config/r0/src/python/arm64_nxp_ls2080ardb_r0/__init__.py @@ -0,0 +1,8 @@ +from onl.platform.base import * +from onl.platform.nxp import * + +class OnlPlatform_arm64_nxp_ls2080ardb_r0(OnlPlatformNxp, + OnlPlatformPortConfig_8x1_8x10): + PLATFORM='arm64-nxp-ls2080ardb-r0' + MODEL="LS2080ARDB" + SYS_OBJECT_ID=".2080" diff --git a/packages/platforms/nxp/arm64/arm64-nxp-ls2088ardb/platform-config/r1/Makefile b/packages/platforms/nxp/arm64/arm64-nxp-ls2088ardb/platform-config/r1/Makefile new file mode 100644 index 00000000..003238cf --- /dev/null +++ b/packages/platforms/nxp/arm64/arm64-nxp-ls2088ardb/platform-config/r1/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/packages/platforms/nxp/arm64/arm64-nxp-ls2088ardb/platform-config/r1/PKG.yml b/packages/platforms/nxp/arm64/arm64-nxp-ls2088ardb/platform-config/r1/PKG.yml new file mode 100644 index 00000000..14f06fb2 --- /dev/null +++ b/packages/platforms/nxp/arm64/arm64-nxp-ls2088ardb/platform-config/r1/PKG.yml @@ -0,0 +1 @@ +!include $ONL_TEMPLATES/platform-config-platform.yml ARCH=arm64 VENDOR=nxp BASENAME=arm64-nxp-ls2088ardb REVISION=r1 diff --git a/packages/platforms/nxp/arm64/arm64-nxp-ls2080ardb/platform-config/r1/src/lib/arm64-nxp-ls2088ardb-r1.yml b/packages/platforms/nxp/arm64/arm64-nxp-ls2088ardb/platform-config/r1/src/lib/arm64-nxp-ls2088ardb-r1.yml similarity index 100% rename from packages/platforms/nxp/arm64/arm64-nxp-ls2080ardb/platform-config/r1/src/lib/arm64-nxp-ls2088ardb-r1.yml rename to packages/platforms/nxp/arm64/arm64-nxp-ls2088ardb/platform-config/r1/src/lib/arm64-nxp-ls2088ardb-r1.yml diff --git a/packages/platforms/nxp/arm64/arm64-nxp-ls2080ardb/platform-config/r1/src/python/arm64_nxp_ls2088ardb_r1/__init__.py b/packages/platforms/nxp/arm64/arm64-nxp-ls2088ardb/platform-config/r1/src/python/arm64_nxp_ls2088ardb_r1/__init__.py similarity index 100% rename from packages/platforms/nxp/arm64/arm64-nxp-ls2080ardb/platform-config/r1/src/python/arm64_nxp_ls2088ardb_r1/__init__.py rename to packages/platforms/nxp/arm64/arm64-nxp-ls2088ardb/platform-config/r1/src/python/arm64_nxp_ls2088ardb_r1/__init__.py diff --git a/packages/platforms/nxp/arm64/modules/Makefile b/packages/platforms/nxp/arm64/modules/Makefile new file mode 100644 index 00000000..003238cf --- /dev/null +++ b/packages/platforms/nxp/arm64/modules/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/packages/platforms/nxp/arm64/modules/PKG.yml b/packages/platforms/nxp/arm64/modules/PKG.yml new file mode 100644 index 00000000..12771e9d --- /dev/null +++ b/packages/platforms/nxp/arm64/modules/PKG.yml @@ -0,0 +1 @@ +!include $ONL_TEMPLATES/no-arch-vendor-modules.yml ARCH=arm64 VENDOR=nxp diff --git a/packages/platforms/qemu/arm/arm-qemu-armv7a/modules/Makefile b/packages/platforms/qemu/arm/arm-qemu-armv7a/modules/Makefile new file mode 100644 index 00000000..003238cf --- /dev/null +++ b/packages/platforms/qemu/arm/arm-qemu-armv7a/modules/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/packages/platforms/qemu/arm/arm-qemu-armv7a/modules/PKG.yml b/packages/platforms/qemu/arm/arm-qemu-armv7a/modules/PKG.yml new file mode 100644 index 00000000..02169b9a --- /dev/null +++ b/packages/platforms/qemu/arm/arm-qemu-armv7a/modules/PKG.yml @@ -0,0 +1 @@ +!include $ONL_TEMPLATES/no-platform-modules.yml ARCH=armel VENDOR=qemu BASENAME=arm-qemu-armv7a diff --git a/packages/platforms/qemu/arm/arm-qemu-armv7a/platform-config/r0/PKG.yml b/packages/platforms/qemu/arm/arm-qemu-armv7a/platform-config/r0/PKG.yml index c7d73da2..d6ef2795 100644 --- a/packages/platforms/qemu/arm/arm-qemu-armv7a/platform-config/r0/PKG.yml +++ b/packages/platforms/qemu/arm/arm-qemu-armv7a/platform-config/r0/PKG.yml @@ -1 +1 @@ -!include $ONL_TEMPLATES/platform-config-platform.yml ARCH=armel VENDOR=qemu PLATFORM=arm-qemu-armv7a-r0 +!include $ONL_TEMPLATES/platform-config-platform.yml ARCH=armel VENDOR=qemu BASENAME=arm-qemu-armv7a REVISION=r0 diff --git a/packages/platforms/qemu/arm/modules/Makefile b/packages/platforms/qemu/arm/modules/Makefile new file mode 100644 index 00000000..003238cf --- /dev/null +++ b/packages/platforms/qemu/arm/modules/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/packages/platforms/qemu/arm/modules/PKG.yml b/packages/platforms/qemu/arm/modules/PKG.yml new file mode 100644 index 00000000..2e037923 --- /dev/null +++ b/packages/platforms/qemu/arm/modules/PKG.yml @@ -0,0 +1 @@ +!include $ONL_TEMPLATES/no-arch-vendor-modules.yml ARCH=armel VENDOR=qemu diff --git a/packages/platforms/quanta/powerpc/modules/Makefile b/packages/platforms/quanta/powerpc/modules/Makefile new file mode 100644 index 00000000..003238cf --- /dev/null +++ b/packages/platforms/quanta/powerpc/modules/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/packages/platforms/quanta/powerpc/modules/PKG.yml b/packages/platforms/quanta/powerpc/modules/PKG.yml new file mode 100644 index 00000000..8dfdb1a2 --- /dev/null +++ b/packages/platforms/quanta/powerpc/modules/PKG.yml @@ -0,0 +1 @@ +!include $ONL_TEMPLATES/no-arch-vendor-modules.yml ARCH=powerpc VENDOR=quanta diff --git a/packages/platforms/quanta/powerpc/powerpc-quanta-lb9/modules/Makefile b/packages/platforms/quanta/powerpc/powerpc-quanta-lb9/modules/Makefile new file mode 100644 index 00000000..003238cf --- /dev/null +++ b/packages/platforms/quanta/powerpc/powerpc-quanta-lb9/modules/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/packages/platforms/quanta/powerpc/powerpc-quanta-lb9/modules/PKG.yml b/packages/platforms/quanta/powerpc/powerpc-quanta-lb9/modules/PKG.yml new file mode 100644 index 00000000..5547795d --- /dev/null +++ b/packages/platforms/quanta/powerpc/powerpc-quanta-lb9/modules/PKG.yml @@ -0,0 +1 @@ +!include $ONL_TEMPLATES/no-platform-modules.yml ARCH=powerpc VENDOR=quanta BASENAME=powerpc-quanta-lb9 diff --git a/packages/platforms/quanta/powerpc/powerpc-quanta-lb9/onlp/builds/src/module/auto/powerpc_quanta_lb9.yml b/packages/platforms/quanta/powerpc/powerpc-quanta-lb9/onlp/builds/src/module/auto/powerpc_quanta_lb9.yml index 66b7a600..b1e17af0 100644 --- a/packages/platforms/quanta/powerpc/powerpc-quanta-lb9/onlp/builds/src/module/auto/powerpc_quanta_lb9.yml +++ b/packages/platforms/quanta/powerpc/powerpc-quanta-lb9/onlp/builds/src/module/auto/powerpc_quanta_lb9.yml @@ -31,7 +31,7 @@ cdefs: &cdefs default: 100 - POWERPC_QUANTA_LB9_R0_CONFIG_SYSFAN_RPM_F2B_MAX: doc: "Maximum system fan speed in front-to-back mode." - default: 14500 + default: 16000 - POWERPC_QUANTA_LB9_R0_CONFIG_SYSFAN_RPM_B2F_MAX: doc: "Maximum system fan speed in back-to-front mode." default: 24000 diff --git a/packages/platforms/quanta/powerpc/powerpc-quanta-lb9/onlp/builds/src/module/inc/powerpc_quanta_lb9/powerpc_quanta_lb9_config.h b/packages/platforms/quanta/powerpc/powerpc-quanta-lb9/onlp/builds/src/module/inc/powerpc_quanta_lb9/powerpc_quanta_lb9_config.h index cfa89474..3ad26bf1 100644 --- a/packages/platforms/quanta/powerpc/powerpc-quanta-lb9/onlp/builds/src/module/inc/powerpc_quanta_lb9/powerpc_quanta_lb9_config.h +++ b/packages/platforms/quanta/powerpc/powerpc-quanta-lb9/onlp/builds/src/module/inc/powerpc_quanta_lb9/powerpc_quanta_lb9_config.h @@ -106,7 +106,7 @@ #ifndef POWERPC_QUANTA_LB9_R0_CONFIG_SYSFAN_RPM_F2B_MAX -#define POWERPC_QUANTA_LB9_R0_CONFIG_SYSFAN_RPM_F2B_MAX 14500 +#define POWERPC_QUANTA_LB9_R0_CONFIG_SYSFAN_RPM_F2B_MAX 16000 #endif /** diff --git a/packages/platforms/quanta/powerpc/powerpc-quanta-lb9/onlp/builds/src/module/src/powerpc_quanta_lb9_int.h b/packages/platforms/quanta/powerpc/powerpc-quanta-lb9/onlp/builds/src/module/src/powerpc_quanta_lb9_int.h index fbca0aa6..53961dcc 100644 --- a/packages/platforms/quanta/powerpc/powerpc-quanta-lb9/onlp/builds/src/module/src/powerpc_quanta_lb9_int.h +++ b/packages/platforms/quanta/powerpc/powerpc-quanta-lb9/onlp/builds/src/module/src/powerpc_quanta_lb9_int.h @@ -11,41 +11,94 @@ /* */ -/** thermal_oid */ -typedef enum thermal_oid_e { - THERMAL_OID_THERMAL1 = ONLP_THERMAL_ID_CREATE(1), - THERMAL_OID_THERMAL2 = ONLP_THERMAL_ID_CREATE(2), - THERMAL_OID_THERMAL3 = ONLP_THERMAL_ID_CREATE(3), - THERMAL_OID_THERMAL4 = ONLP_THERMAL_ID_CREATE(4), - THERMAL_OID_THERMAL5 = ONLP_THERMAL_ID_CREATE(5), - THERMAL_OID_THERMAL6 = ONLP_THERMAL_ID_CREATE(6), - THERMAL_OID_THERMAL7 = ONLP_THERMAL_ID_CREATE(7), - THERMAL_OID_THERMAL8 = ONLP_THERMAL_ID_CREATE(8), - THERMAL_OID_THERMAL9 = ONLP_THERMAL_ID_CREATE(9), - THERMAL_OID_THERMAL10 = ONLP_THERMAL_ID_CREATE(10), - THERMAL_OID_THERMAL11 = ONLP_THERMAL_ID_CREATE(11), -} thermal_oid_t; +/** fan_id */ +typedef enum fan_id_e { + FAN_ID_FAN1 = 1, + FAN_ID_FAN2 = 2, + FAN_ID_FAN3 = 3, + FAN_ID_FAN4 = 4, + FAN_ID_FAN5 = 5, + FAN_ID_FAN6 = 6, +} fan_id_t; /** Enum names. */ -const char* thermal_oid_name(thermal_oid_t e); +const char* fan_id_name(fan_id_t e); /** Enum values. */ -int thermal_oid_value(const char* str, thermal_oid_t* e, int substr); +int fan_id_value(const char* str, fan_id_t* e, int substr); /** Enum descriptions. */ -const char* thermal_oid_desc(thermal_oid_t e); +const char* fan_id_desc(fan_id_t e); /** Enum validator. */ -int thermal_oid_valid(thermal_oid_t e); +int fan_id_valid(fan_id_t e); /** validator */ -#define THERMAL_OID_VALID(_e) \ - (thermal_oid_valid((_e))) +#define FAN_ID_VALID(_e) \ + (fan_id_valid((_e))) -/** thermal_oid_map table. */ -extern aim_map_si_t thermal_oid_map[]; -/** thermal_oid_desc_map table. */ -extern aim_map_si_t thermal_oid_desc_map[]; +/** fan_id_map table. */ +extern aim_map_si_t fan_id_map[]; +/** fan_id_desc_map table. */ +extern aim_map_si_t fan_id_desc_map[]; + +/** fan_oid */ +typedef enum fan_oid_e { + FAN_OID_FAN1 = ONLP_FAN_ID_CREATE(1), + FAN_OID_FAN2 = ONLP_FAN_ID_CREATE(2), + FAN_OID_FAN3 = ONLP_FAN_ID_CREATE(3), + FAN_OID_FAN4 = ONLP_FAN_ID_CREATE(4), + FAN_OID_FAN5 = ONLP_FAN_ID_CREATE(5), + FAN_OID_FAN6 = ONLP_FAN_ID_CREATE(6), +} fan_oid_t; + +/** Enum names. */ +const char* fan_oid_name(fan_oid_t e); + +/** Enum values. */ +int fan_oid_value(const char* str, fan_oid_t* e, int substr); + +/** Enum descriptions. */ +const char* fan_oid_desc(fan_oid_t e); + +/** Enum validator. */ +int fan_oid_valid(fan_oid_t e); + +/** validator */ +#define FAN_OID_VALID(_e) \ + (fan_oid_valid((_e))) + +/** fan_oid_map table. */ +extern aim_map_si_t fan_oid_map[]; +/** fan_oid_desc_map table. */ +extern aim_map_si_t fan_oid_desc_map[]; + +/** psu_id */ +typedef enum psu_id_e { + PSU_ID_PSU1 = 1, + PSU_ID_PSU2 = 2, +} psu_id_t; + +/** Enum names. */ +const char* psu_id_name(psu_id_t e); + +/** Enum values. */ +int psu_id_value(const char* str, psu_id_t* e, int substr); + +/** Enum descriptions. */ +const char* psu_id_desc(psu_id_t e); + +/** Enum validator. */ +int psu_id_valid(psu_id_t e); + +/** validator */ +#define PSU_ID_VALID(_e) \ + (psu_id_valid((_e))) + +/** psu_id_map table. */ +extern aim_map_si_t psu_id_map[]; +/** psu_id_desc_map table. */ +extern aim_map_si_t psu_id_desc_map[]; /** psu_oid */ typedef enum psu_oid_e { @@ -110,94 +163,41 @@ extern aim_map_si_t thermal_id_map[]; /** thermal_id_desc_map table. */ extern aim_map_si_t thermal_id_desc_map[]; -/** fan_id */ -typedef enum fan_id_e { - FAN_ID_FAN1 = 1, - FAN_ID_FAN2 = 2, - FAN_ID_FAN3 = 3, - FAN_ID_FAN4 = 4, - FAN_ID_FAN5 = 5, - FAN_ID_FAN6 = 6, -} fan_id_t; +/** thermal_oid */ +typedef enum thermal_oid_e { + THERMAL_OID_THERMAL1 = ONLP_THERMAL_ID_CREATE(1), + THERMAL_OID_THERMAL2 = ONLP_THERMAL_ID_CREATE(2), + THERMAL_OID_THERMAL3 = ONLP_THERMAL_ID_CREATE(3), + THERMAL_OID_THERMAL4 = ONLP_THERMAL_ID_CREATE(4), + THERMAL_OID_THERMAL5 = ONLP_THERMAL_ID_CREATE(5), + THERMAL_OID_THERMAL6 = ONLP_THERMAL_ID_CREATE(6), + THERMAL_OID_THERMAL7 = ONLP_THERMAL_ID_CREATE(7), + THERMAL_OID_THERMAL8 = ONLP_THERMAL_ID_CREATE(8), + THERMAL_OID_THERMAL9 = ONLP_THERMAL_ID_CREATE(9), + THERMAL_OID_THERMAL10 = ONLP_THERMAL_ID_CREATE(10), + THERMAL_OID_THERMAL11 = ONLP_THERMAL_ID_CREATE(11), +} thermal_oid_t; /** Enum names. */ -const char* fan_id_name(fan_id_t e); +const char* thermal_oid_name(thermal_oid_t e); /** Enum values. */ -int fan_id_value(const char* str, fan_id_t* e, int substr); +int thermal_oid_value(const char* str, thermal_oid_t* e, int substr); /** Enum descriptions. */ -const char* fan_id_desc(fan_id_t e); +const char* thermal_oid_desc(thermal_oid_t e); /** Enum validator. */ -int fan_id_valid(fan_id_t e); +int thermal_oid_valid(thermal_oid_t e); /** validator */ -#define FAN_ID_VALID(_e) \ - (fan_id_valid((_e))) +#define THERMAL_OID_VALID(_e) \ + (thermal_oid_valid((_e))) -/** fan_id_map table. */ -extern aim_map_si_t fan_id_map[]; -/** fan_id_desc_map table. */ -extern aim_map_si_t fan_id_desc_map[]; - -/** psu_id */ -typedef enum psu_id_e { - PSU_ID_PSU1 = 1, - PSU_ID_PSU2 = 2, -} psu_id_t; - -/** Enum names. */ -const char* psu_id_name(psu_id_t e); - -/** Enum values. */ -int psu_id_value(const char* str, psu_id_t* e, int substr); - -/** Enum descriptions. */ -const char* psu_id_desc(psu_id_t e); - -/** Enum validator. */ -int psu_id_valid(psu_id_t e); - -/** validator */ -#define PSU_ID_VALID(_e) \ - (psu_id_valid((_e))) - -/** psu_id_map table. */ -extern aim_map_si_t psu_id_map[]; -/** psu_id_desc_map table. */ -extern aim_map_si_t psu_id_desc_map[]; - -/** fan_oid */ -typedef enum fan_oid_e { - FAN_OID_FAN1 = ONLP_FAN_ID_CREATE(1), - FAN_OID_FAN2 = ONLP_FAN_ID_CREATE(2), - FAN_OID_FAN3 = ONLP_FAN_ID_CREATE(3), - FAN_OID_FAN4 = ONLP_FAN_ID_CREATE(4), - FAN_OID_FAN5 = ONLP_FAN_ID_CREATE(5), - FAN_OID_FAN6 = ONLP_FAN_ID_CREATE(6), -} fan_oid_t; - -/** Enum names. */ -const char* fan_oid_name(fan_oid_t e); - -/** Enum values. */ -int fan_oid_value(const char* str, fan_oid_t* e, int substr); - -/** Enum descriptions. */ -const char* fan_oid_desc(fan_oid_t e); - -/** Enum validator. */ -int fan_oid_valid(fan_oid_t e); - -/** validator */ -#define FAN_OID_VALID(_e) \ - (fan_oid_valid((_e))) - -/** fan_oid_map table. */ -extern aim_map_si_t fan_oid_map[]; -/** fan_oid_desc_map table. */ -extern aim_map_si_t fan_oid_desc_map[]; +/** thermal_oid_map table. */ +extern aim_map_si_t thermal_oid_map[]; +/** thermal_oid_desc_map table. */ +extern aim_map_si_t thermal_oid_desc_map[]; /* */ diff --git a/packages/platforms/quanta/powerpc/powerpc-quanta-lb9/platform-config/r0/PKG.yml b/packages/platforms/quanta/powerpc/powerpc-quanta-lb9/platform-config/r0/PKG.yml index 938d67ab..58d59505 100644 --- a/packages/platforms/quanta/powerpc/powerpc-quanta-lb9/platform-config/r0/PKG.yml +++ b/packages/platforms/quanta/powerpc/powerpc-quanta-lb9/platform-config/r0/PKG.yml @@ -1 +1 @@ -!include $ONL_TEMPLATES/platform-config-platform.yml ARCH=powerpc VENDOR=quanta PLATFORM=powerpc-quanta-lb9-r0 +!include $ONL_TEMPLATES/platform-config-platform.yml ARCH=powerpc VENDOR=quanta BASENAME=powerpc-quanta-lb9 REVISION=r0 diff --git a/packages/platforms/quanta/powerpc/powerpc-quanta-ly2/modules/Makefile b/packages/platforms/quanta/powerpc/powerpc-quanta-ly2/modules/Makefile new file mode 100644 index 00000000..003238cf --- /dev/null +++ b/packages/platforms/quanta/powerpc/powerpc-quanta-ly2/modules/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/packages/platforms/quanta/powerpc/powerpc-quanta-ly2/modules/PKG.yml b/packages/platforms/quanta/powerpc/powerpc-quanta-ly2/modules/PKG.yml new file mode 100644 index 00000000..33fe0277 --- /dev/null +++ b/packages/platforms/quanta/powerpc/powerpc-quanta-ly2/modules/PKG.yml @@ -0,0 +1 @@ +!include $ONL_TEMPLATES/no-platform-modules.yml ARCH=powerpc VENDOR=quanta BASENAME=powerpc-quanta-ly2 diff --git a/packages/platforms/quanta/powerpc/powerpc-quanta-ly2/platform-config/r0/PKG.yml b/packages/platforms/quanta/powerpc/powerpc-quanta-ly2/platform-config/r0/PKG.yml index ae6045cb..db9c928a 100644 --- a/packages/platforms/quanta/powerpc/powerpc-quanta-ly2/platform-config/r0/PKG.yml +++ b/packages/platforms/quanta/powerpc/powerpc-quanta-ly2/platform-config/r0/PKG.yml @@ -1 +1 @@ -!include $ONL_TEMPLATES/platform-config-platform.yml ARCH=powerpc VENDOR=quanta PLATFORM=powerpc-quanta-ly2-r0 +!include $ONL_TEMPLATES/platform-config-platform.yml ARCH=powerpc VENDOR=quanta BASENAME=powerpc-quanta-ly2 REVISION=r0 diff --git a/packages/platforms/quanta/x86-64/modules/Makefile b/packages/platforms/quanta/x86-64/modules/Makefile new file mode 100644 index 00000000..003238cf --- /dev/null +++ b/packages/platforms/quanta/x86-64/modules/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/packages/platforms/quanta/x86-64/modules/PKG.yml b/packages/platforms/quanta/x86-64/modules/PKG.yml new file mode 100644 index 00000000..fcb0bda9 --- /dev/null +++ b/packages/platforms/quanta/x86-64/modules/PKG.yml @@ -0,0 +1 @@ +!include $ONL_TEMPLATES/arch-vendor-modules.yml ARCH=amd64 VENDOR=quanta KERNELS="onl-kernel-3.16-lts-x86-64-all:amd64" diff --git a/packages/platforms/quanta/x86-64/modules/builds/.gitignore b/packages/platforms/quanta/x86-64/modules/builds/.gitignore new file mode 100644 index 00000000..a65b4177 --- /dev/null +++ b/packages/platforms/quanta/x86-64/modules/builds/.gitignore @@ -0,0 +1 @@ +lib diff --git a/packages/platforms/quanta/x86-64/modules/builds/Makefile b/packages/platforms/quanta/x86-64/modules/builds/Makefile new file mode 100644 index 00000000..979fc3fe --- /dev/null +++ b/packages/platforms/quanta/x86-64/modules/builds/Makefile @@ -0,0 +1,6 @@ +KERNELS := onl-kernel-3.16-lts-x86-64-all:amd64 +KMODULES := $(wildcard *.c) +VENDOR := quanta +BASENAME := common +ARCH := x86_64 +include $(ONL)/make/kmodule.mk diff --git a/packages/platforms/quanta/x86-64/modules/builds/qci_cpld.c b/packages/platforms/quanta/x86-64/modules/builds/qci_cpld.c new file mode 100755 index 00000000..678b1dc1 --- /dev/null +++ b/packages/platforms/quanta/x86-64/modules/builds/qci_cpld.c @@ -0,0 +1,603 @@ +/* + * A CPLD driver for monitor QSFP28 module I/O + * + * The CPLD is customize by Quanta for controlling QSFP28 module signals, + * they are RESET , INTERREPT , Module_Present, LPMODE + * Each CPLD control 16 modules, each module use 4 bits in register. + * + * Copyright (C) 2015 Quanta Inc. + * + * Author: Luffy Cheng + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +static DEFINE_IDA(cpld_ida); + +enum platform_type { + SFP = 0, + QSFP, + QSFP28, + NONE +}; + +static struct class *cpld_class = NULL; + +struct sfp_data { + struct i2c_client *cpld_client; + char name[8]; + char type[8]; + u8 port_id; + u8 cpld_port; +}; + +struct cpld_data { + struct mutex lock; + struct device *port_dev[16]; + struct sfp_data *port_data[16]; +}; + +static int cpld_probe(struct i2c_client *client, + const struct i2c_device_id *id); +static int cpld_remove(struct i2c_client *client); + +static const struct i2c_device_id cpld_id[] = { + { "CPLD-SFP", SFP }, + { "CPLD-QSFP", QSFP }, + { "CPLD-QSFP28", QSFP28 }, + { } +}; +MODULE_DEVICE_TABLE(i2c, cpld_id); + +static struct i2c_driver cpld_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "qci_cpld", + }, + .probe = cpld_probe, + .remove = cpld_remove, + .id_table = cpld_id, +// .address_list = normal_i2c, +}; + +#define CPLD_ID_PREFIX "port-" +#define CPLD_ID_FORMAT CPLD_ID_PREFIX "%d" + +#define RESET_MASK 0x08 +#define INTERRUPT_MASK 0x04 +#define MODULE_PRESENT_MASK 0x02 +#define LPMODE_MASK 0x01 +//#define I2C_MONITOR_MASK 0x01 + +static inline u8 get_group_cmd(u8 group) +{ + //FIXME: if group cmd change + return (group + 1); +} + +static inline u8 port_remapping(u8 phy_port) +{ + /* FIXME: implement by hardware design */ + /* The CPLD register port mapping is weird : + * MSB -------- LSB (word data) + * P3 P4 P1 P2 (per port 4 bits) + * For easy coding bit shift, we treat it as hw port swap + */ + return (phy_port % 2) ? (phy_port - 1) : (phy_port + 1); +} + +static ssize_t get_reset(struct device *dev, + struct device_attribute *devattr, + char *buf) +{ + struct sfp_data *data = dev_get_drvdata(dev); + struct i2c_client *client = data->cpld_client; + u8 group = (u8)(data->cpld_port / 4); + u8 group_port = data->cpld_port % 4; + s32 value; + + dev_dbg(&client->dev, "port_id %d => cpld_port %d, group %d(%d)\n", data->port_id, + data->cpld_port + 1, group + 1, group_port + 1); + + value = i2c_smbus_read_word_data(client, get_group_cmd(group)); + if (value < 0) + return -ENODEV; + + dev_dbg(&client->dev, "read group%d value= %x\n", group + 1, value); + + value >>= (group_port * 4); + value &= RESET_MASK; + + return sprintf(buf, "%d\n", value ? 1 : 0); +} + +static ssize_t get_interrupt(struct device *dev, + struct device_attribute *devattr, + char *buf) +{ + struct sfp_data *data = dev_get_drvdata(dev); + struct i2c_client *client = data->cpld_client; + u8 group = (u8)(data->cpld_port / 4); + u8 group_port = data->cpld_port % 4; + s32 value; + + dev_dbg(&client->dev, "port_id %d => cpld_port %d, group %d(%d)\n", data->port_id, + data->cpld_port + 1, group + 1, group_port + 1); + + value = i2c_smbus_read_word_data(client, get_group_cmd(group)); + if (value < 0) + return -ENODEV; + + dev_dbg(&client->dev, "read group%d value= %x\n", group + 1, value); + + value >>= (group_port * 4); + value &= INTERRUPT_MASK; + + return sprintf(buf, "%d\n", value ? 1 : 0); +} + +static ssize_t get_module_present(struct device *dev, + struct device_attribute *devattr, + char *buf) +{ + struct sfp_data *data = dev_get_drvdata(dev); + struct i2c_client *client = data->cpld_client; + u8 group = (u8)(data->cpld_port / 4); + u8 group_port = data->cpld_port % 4; + s32 value; + + dev_dbg(&client->dev, "port_id %d => cpld_port %d, group %d(%d)\n", data->port_id, + data->cpld_port + 1, group + 1, group_port + 1); + + value = i2c_smbus_read_word_data(client, get_group_cmd(group)); + if (value < 0) + return -ENODEV; + + dev_dbg(&client->dev, "read group%d value= %x\n", group + 1, value); + + value >>= (group_port * 4); + value &= MODULE_PRESENT_MASK; + + //FIXME: if present is not low active + return sprintf(buf, "%d\n", value ? 0 : 1); +} + +static ssize_t get_lpmode(struct device *dev, + struct device_attribute *devattr, + char *buf) +{ + struct sfp_data *data = dev_get_drvdata(dev); + struct i2c_client *client = data->cpld_client; + u8 group = (u8)(data->cpld_port / 4); + u8 group_port = data->cpld_port % 4; + s32 value; + + dev_dbg(&client->dev, "port_id %d => cpld_port %d, group %d(%d)\n", data->port_id, + data->cpld_port + 1, group + 1, group_port + 1); + + value = i2c_smbus_read_word_data(client, get_group_cmd(group)); + if (value < 0) + return -ENODEV; + + dev_dbg(&client->dev, "read group%d value= %x\n", group + 1, value); + + value >>= (group_port * 4); + value &= LPMODE_MASK; + + return sprintf(buf, "%d\n", value ? 1 : 0); +} + +static ssize_t set_reset(struct device *dev, + struct device_attribute *devattr, + const char *buf, + size_t count) +{ + struct sfp_data *data = dev_get_drvdata(dev); + struct i2c_client *client = data->cpld_client; + u8 group = (u8)(data->cpld_port / 4); + u8 group_port = data->cpld_port % 4; + s32 value; + long disable; + + dev_dbg(&client->dev, "port_id %d => cpld_port %d, group %d(%d)\n", data->port_id, + data->cpld_port + 1, group + 1, group_port + 1); + + if (kstrtol(buf, 0, &disable)) + return -EINVAL; + + if ((disable != 1) && (disable != 0)) + return -EINVAL; + +// mutex_lock(&data->lock); + value = i2c_smbus_read_word_data(client, get_group_cmd(group)); + if (value < 0) + return -ENODEV; + + dev_dbg(&client->dev, "read group%d value= %x\n", group + 1, value); + + value &= ~(RESET_MASK << (group_port * 4)); + if (disable) + value |= (RESET_MASK << (group_port * 4)); + + dev_dbg(&client->dev, "write group%d value= %x\n", group + 1, value); + + i2c_smbus_write_word_data(client, get_group_cmd(group), (u16)value); +// mutex_unlock(&data->lock); + + return count; +} + +static ssize_t set_lpmode(struct device *dev, + struct device_attribute *devattr, + const char *buf, + size_t count) +{ + struct sfp_data *data = dev_get_drvdata(dev); + struct i2c_client *client = data->cpld_client; + u8 group = (u8)(data->cpld_port / 4); + u8 group_port = data->cpld_port % 4; + s32 value; + long disable; + + dev_dbg(&client->dev, "port_id %d => cpld_port %d, group %d(%d)\n", data->port_id, + data->cpld_port + 1, group + 1, group_port + 1); + + if (kstrtol(buf, 0, &disable)) + return -EINVAL; + + if ((disable != 1) && (disable != 0)) + return -EINVAL; + +// mutex_lock(&data->lock); + value = i2c_smbus_read_word_data(client, get_group_cmd(group)); + if (value < 0) + return -ENODEV; + + dev_dbg(&client->dev, "read group%d value= %x\n", group + 1, value); + + value &= ~(LPMODE_MASK << (group_port * 4)); + if (disable) + value |= (LPMODE_MASK << (group_port * 4)); + + dev_dbg(&client->dev, "write group%d value= %x\n", group + 1, value); + + i2c_smbus_write_word_data(client, get_group_cmd(group), (u16)value); +// mutex_unlock(&data->lock); + + return count; +} + +#if 0 +static ssize_t get_led_enable(struct device *dev, + struct device_attribute *devattr, + char *buf) +{ + struct sfp_data *data = dev_get_drvdata(dev); + struct i2c_client *client = data->cpld_client; + u8 group = 3; + u8 group_port = data->cpld_port; + s32 value; + + dev_dbg(&client->dev, "get_led_enable port_id %d => cpld_port %d, group %d(%d)\n", data->port_id, + data->cpld_port + 1, group, group_port + 1); + + value = i2c_smbus_read_word_data(client, group); + if (value < 0) + return -ENODEV; + + dev_dbg(&client->dev, "read group%d value= %x\n", group, value); + + value >>= (group_port); + value &= LED_ENABLE_MASK; + + return sprintf(buf, "%d\n", value ? 1 : 0); +} + +static ssize_t set_led_enable(struct device *dev, + struct device_attribute *devattr, + const char *buf, + size_t count) +{ + struct sfp_data *data = dev_get_drvdata(dev); + struct i2c_client *client = data->cpld_client; + u8 group = 3; + u8 group_port = data->cpld_port; + s32 value; + long disable; + + dev_dbg(&client->dev, "set_led_enable port_id %d => cpld_port %d, group %d(%d)\n", data->port_id, + data->cpld_port + 1, group, group_port + 1); + + if (kstrtol(buf, 0, &disable)) + return -EINVAL; + + if ((disable != 1) && (disable != 0)) + return -EINVAL; + +// mutex_lock(&data->lock); + value = i2c_smbus_read_word_data(client, group); + if (value < 0) + return -ENODEV; + + dev_dbg(&client->dev, "read group%d value= %x\n", group, value); + + value &= ~(LED_ENABLE_MASK << group_port); + if (disable) + value |= (LED_ENABLE_MASK << group_port); + + dev_dbg(&client->dev, "write group%d value= %x\n", group, value); + + i2c_smbus_write_word_data(client, group, (u16)value); +// mutex_unlock(&data->lock); + + return count; +} +#endif + +#if 0 +static ssize_t get_monitor_enable(struct device *dev, + struct device_attribute *devattr, + char *buf) +{ + struct i2c_monitor_data *data = dev_get_drvdata(dev); + struct i2c_client *client = data->cpld_client; + u8 group = 4; + s32 value; + + value = i2c_smbus_read_word_data(client, group); + if (value < 0) + return -ENODEV; + + dev_dbg(&client->dev, "read group%d value= %x\n", group, value); + + value &= I2C_MONITOR_MASK; + + return sprintf(buf, "%d\n", value ? 1 : 0); +} + +static ssize_t set_monitor_enable(struct device *dev, + struct device_attribute *devattr, + const char *buf, + size_t count) +{ + struct i2c_monitor_data *data = dev_get_drvdata(dev); + struct i2c_client *client = data->cpld_client; + u8 group = 4; + s32 value; + long disable; + + if (kstrtol(buf, 0, &disable)) + return -EINVAL; + + if ((disable != 1) && (disable != 0)) + return -EINVAL; + +// mutex_lock(&data->lock); + value = i2c_smbus_read_word_data(client, group); + if (value < 0) + return -ENODEV; + + dev_dbg(&client->dev, "read group%d value= %x\n", group, value); + + value &= ~(I2C_MONITOR_MASK); + if (disable) + value |= (I2C_MONITOR_MASK); + + dev_dbg(&client->dev, "write group%d value= %x\n", group, value); + + i2c_smbus_write_word_data(client, group, (u16)value); +// mutex_unlock(&data->lock); + + return count; +} +#endif + +static DEVICE_ATTR(reset, S_IWUSR | S_IRUGO, get_reset, set_reset); +static DEVICE_ATTR(lpmode, S_IWUSR | S_IRUGO, get_lpmode, set_lpmode); +static DEVICE_ATTR(module_present, S_IRUGO, get_module_present, NULL); +static DEVICE_ATTR(interrupt, S_IRUGO, get_interrupt, NULL); +//static DEVICE_ATTR(led_enable, S_IWUSR | S_IRUGO, get_led_enable, set_led_enable); +//static DEVICE_ATTR(monitor_enable, S_IWUSR | S_IRUGO, get_monitor_enable, set_monitor_enable); + +static const struct attribute *sfp_attrs[] = { + &dev_attr_reset.attr, + &dev_attr_lpmode.attr, + &dev_attr_module_present.attr, + &dev_attr_interrupt.attr, +// &dev_attr_led_enable.attr, + NULL, +}; + +static const struct attribute_group sfp_attr_group = { + .attrs = (struct attribute **) sfp_attrs, +}; + +#if 0 +static const struct attribute *i2c_monitor_attrs[] = { + &dev_attr_monitor_enable.attr, + NULL, +}; + +static const struct attribute_group i2c_monitor_attr_group = { + .attrs = (struct attribute **) i2c_monitor_attrs, +}; +#endif + +static int cpld_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct cpld_data *data; + struct sfp_data *port_data; +// struct i2c_monitor_data *monitor_data; + struct device *port_dev; +// struct device *i2c_dev; + int port_nr, i=0, err, max_port_num; + char name[I2C_NAME_SIZE], type[I2C_NAME_SIZE]; + + printk("cpld cpld_probe\n"); + + while(id->name[i]) + { + name[i]=tolower(id->name[i]); + i++; + } + name[i]='\0'; + strncpy(type,name+5,strlen(name)-5); + type[strlen(name)-5]='\0'; + + if (!cpld_class) + { + cpld_class = class_create(THIS_MODULE, name); + if (IS_ERR(cpld_class)) { + pr_err("couldn't create sysfs class\n"); + return PTR_ERR(cpld_class); + } + } + + data = devm_kzalloc(&client->dev, sizeof(struct cpld_data), + GFP_KERNEL); + if (!data) + return -ENOMEM; + + if(!strcmp(client->name, "CPLD-QSFP28")){ + max_port_num = 16; + } + else{ + max_port_num = 4; + } + + /* register sfp port data to sysfs */ + for (i = 0; i < max_port_num; i++) + { + port_nr = ida_simple_get(&cpld_ida, 1, 99, GFP_KERNEL); + if (port_nr < 0) + return ERR_PTR(port_nr); + + port_data = kzalloc(sizeof(struct sfp_data), GFP_KERNEL); + + port_dev = device_create(cpld_class, &client->dev, MKDEV(0,0), port_data, CPLD_ID_FORMAT, port_nr); + if (IS_ERR(port_dev)) { + err = PTR_ERR(port_dev); + printk("err_status\n"); + } + + data->port_dev[i] = port_dev; + data->port_data[i] = port_data; + + strcpy(port_data->type, type); + + dev_info(&client->dev, "Register %s port-%d\n", port_data->type , port_nr); + + /* FIXME: implement Logical/Physical port remapping */ + //port_data->cpld_port = i; + port_data->cpld_port = port_remapping(i); + sprintf(port_data->name, "port-%d", port_nr); + port_data->port_id = port_nr; + dev_set_drvdata(port_dev, port_data); + port_dev->init_name = port_data->name; + port_data->cpld_client = client; + + err = sysfs_create_group(&port_dev->kobj, &sfp_attr_group); + // if (status) printk("err status\n"); + } +#if 0 + /* register i2c monitor to sysfs */ + monitor_data = kzalloc(sizeof(struct i2c_monitor_data), GFP_KERNEL); + + i2c_dev = device_create(cpld_class, &client->dev, MKDEV(0, 0), monitor_data, "i2c_monitor"); + if (IS_ERR(i2c_dev)) { + err = PTR_ERR(i2c_dev); + printk("i2c_dev err_status\n"); + } + + monitor_data->cpld_client = client; + err = sysfs_create_group(&i2c_dev->kobj, &i2c_monitor_attr_group); + if (err) + printk("err sysfs\n"); +#endif + i2c_set_clientdata(client, data); + mutex_init(&data->lock); + + dev_info(&client->dev, "%s device found\n", client->name); + + + return 0; + +//FIXME: implement error check +//exit_remove: +// sysfs_remove_group(&client->dev.kobj, &data->attrs); + return err; +} + +/* FIXME: for older kernel doesn't with idr_is_empty function, implement here */ +#if 1 +static int idr_has_entry(int id, void *p, void *data) +{ + return 1; +} + +static bool cpld_idr_is_empty(struct idr *idp) +{ + return !idr_for_each(idp, idr_has_entry, NULL); +} +#endif + +static int cpld_remove(struct i2c_client *client) +{ + struct cpld_data *data = i2c_get_clientdata(client); + int i, max_port_num; +// int id; + + if(!strcmp(client->name, "CPLD-QSFP28")){ + max_port_num = 16; + } + else{ + max_port_num = 4; + } + + for (i = (max_port_num - 1); i >= 0; i--) + { + dev_info(data->port_dev[i], "Remove %s port-%d\n", data->port_data[i]->type , data->port_data[i]->port_id); + device_unregister(data->port_dev[i]); + ida_simple_remove(&cpld_ida, data->port_data[i]->port_id); + kfree(data->port_data[i]); + } + + if (cpld_idr_is_empty(&cpld_ida.idr)) + class_destroy(cpld_class); + + return 0; +} + +module_i2c_driver(cpld_driver); + +MODULE_AUTHOR("Luffy Cheng "); +MODULE_DESCRIPTION("Quanta Switch QSFP28 CPLD driver"); +MODULE_LICENSE("GPL"); diff --git a/packages/platforms/quanta/x86-64/modules/builds/quanta_hwmon.c b/packages/platforms/quanta/x86-64/modules/builds/quanta_hwmon.c new file mode 100644 index 00000000..244d9a9e --- /dev/null +++ b/packages/platforms/quanta/x86-64/modules/builds/quanta_hwmon.c @@ -0,0 +1,250 @@ +/* + * + * + * Copyright 2013, 2014 BigSwitch Networks, Inc. + * + * This program is free software; you can redistribute it + * and/or modify it under the terms ofthe GNU General Public License as + * published by the Free Software Foundation; either version 2 of the License, + * or (at your option) any later version. + * + * + * + * + * A hwmon driver for the Quanta LY6 + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +static const unsigned short normal_i2c[] = { 0x4E, I2C_CLIENT_END }; + +#define QUANTA_HWMON_REG_TEMP_INPUT_BASE 0x20 +#define QUANTA_HWMON_REG_FAN_MODE 0x33 +#define QUANTA_HWMON_REG_FAN_DIR 0x56 +#define QUANTA_HWMON_REG_FAN_PWM_BASE 0x3C +#define QUANTA_HWMON_REG_FAN_INPUT_BASE 0x40 + +#define QUANTA_HWMON_FAN_MANUAL_MODE 1 +#define QUANTA_HWMON_FAN_SMART_MODE 3 + +#define QUANTA_HWMON_NUM_FANS 6 + +struct quanta_hwmon_data { + struct device *hwmon_dev; + struct attribute_group attrs; + struct mutex lock; +}; + +enum quanta_hwmon_s { + quanta_ly6_hwmon, + quanta_ly6f_hwmon, + quanta_ly8_hwmon, + quanta_ly9_hwmon, +}; + +static int quanta_hwmon_probe(struct i2c_client *client, + const struct i2c_device_id *id); +static int quanta_hwmon_remove(struct i2c_client *client); + +static const struct i2c_device_id quanta_hwmon_id[] = { + { "quanta_ly6_hwmon", quanta_ly6_hwmon }, + { "quanta_ly6f_hwmon", quanta_ly6f_hwmon }, + { "quanta_ly8_hwmon", quanta_ly8_hwmon }, + { "quanta_ly9_hwmon", quanta_ly9_hwmon }, + { } +}; +MODULE_DEVICE_TABLE(i2c, quanta_hwmon_id); + +static struct i2c_driver quanta_hwmon_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "quanta_hwmon", + }, + .probe = quanta_hwmon_probe, + .remove = quanta_hwmon_remove, + .id_table = quanta_hwmon_id, + .address_list = normal_i2c, +}; + +static ssize_t show_temp(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct i2c_client *client = to_i2c_client(dev); + struct quanta_hwmon_data *data = i2c_get_clientdata(client); + int temp; + + mutex_lock(&data->lock); + temp = i2c_smbus_read_byte_data(client, + QUANTA_HWMON_REG_TEMP_INPUT_BASE + + attr->index); + mutex_unlock(&data->lock); + return sprintf(buf, "%d\n", 1000 * temp); +} + +static ssize_t show_fan(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct i2c_client *client = to_i2c_client(dev); + struct quanta_hwmon_data *data = i2c_get_clientdata(client); + int fan; + + mutex_lock(&data->lock); + fan = i2c_smbus_read_word_swapped(client, + QUANTA_HWMON_REG_FAN_INPUT_BASE + + 2 * attr->index); + mutex_unlock(&data->lock); + return sprintf(buf, "%d\n", fan); +} + +static ssize_t show_pwm(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct i2c_client *client = to_i2c_client(dev); + struct quanta_hwmon_data *data = i2c_get_clientdata(client); + int pwm; + + mutex_lock(&data->lock); + pwm = i2c_smbus_read_word_swapped(client, + QUANTA_HWMON_REG_FAN_PWM_BASE + + 2 * attr->index); + mutex_unlock(&data->lock); + return sprintf(buf, "%d\n", pwm * 255 / 10000); +} + +static ssize_t set_pwm(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct i2c_client *client = to_i2c_client(dev); + struct quanta_hwmon_data *data = i2c_get_clientdata(client); + long val; + int ret; + + ret = kstrtol(buf, 10, &val); + if (ret) + return ret; + mutex_lock(&data->lock); + i2c_smbus_write_word_swapped(client, + QUANTA_HWMON_REG_FAN_PWM_BASE + + 2 * attr->index, val * 10000 / 255); + mutex_unlock(&data->lock); + return count; +} + +static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, show_temp, NULL, 0); +static SENSOR_DEVICE_ATTR(temp2_input, S_IRUGO, show_temp, NULL, 1); +static SENSOR_DEVICE_ATTR(temp3_input, S_IRUGO, show_temp, NULL, 2); +static SENSOR_DEVICE_ATTR(temp4_input, S_IRUGO, show_temp, NULL, 3);//For LY9 +static SENSOR_DEVICE_ATTR(temp5_input, S_IRUGO, show_temp, NULL, 4); +static SENSOR_DEVICE_ATTR(temp6_input, S_IRUGO, show_temp, NULL, 5); +static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0); +static SENSOR_DEVICE_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1); +static SENSOR_DEVICE_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2); +static SENSOR_DEVICE_ATTR(fan5_input, S_IRUGO, show_fan, NULL, 4); +static SENSOR_DEVICE_ATTR(fan6_input, S_IRUGO, show_fan, NULL, 5); +static SENSOR_DEVICE_ATTR(fan7_input, S_IRUGO, show_fan, NULL, 6); +static SENSOR_DEVICE_ATTR(pwm1, S_IWUSR | S_IRUGO, show_pwm, set_pwm, 0); + +static struct attribute *quanta_hwmon_attr[] = { + &sensor_dev_attr_temp1_input.dev_attr.attr, + &sensor_dev_attr_temp2_input.dev_attr.attr, + &sensor_dev_attr_temp3_input.dev_attr.attr, + &sensor_dev_attr_temp5_input.dev_attr.attr, + &sensor_dev_attr_temp6_input.dev_attr.attr, + &sensor_dev_attr_fan1_input.dev_attr.attr, + &sensor_dev_attr_fan2_input.dev_attr.attr, + &sensor_dev_attr_fan3_input.dev_attr.attr, + &sensor_dev_attr_fan5_input.dev_attr.attr, + &sensor_dev_attr_fan6_input.dev_attr.attr, + &sensor_dev_attr_fan7_input.dev_attr.attr, + &sensor_dev_attr_pwm1.dev_attr.attr, + NULL +}; + +static struct attribute *quanta_hwmon_attr_6temps_3fans[] = { + &sensor_dev_attr_temp1_input.dev_attr.attr, + &sensor_dev_attr_temp2_input.dev_attr.attr, + &sensor_dev_attr_temp3_input.dev_attr.attr, + &sensor_dev_attr_temp4_input.dev_attr.attr, + &sensor_dev_attr_temp5_input.dev_attr.attr, + &sensor_dev_attr_temp6_input.dev_attr.attr, + &sensor_dev_attr_fan1_input.dev_attr.attr, + &sensor_dev_attr_fan2_input.dev_attr.attr, + &sensor_dev_attr_fan3_input.dev_attr.attr, + &sensor_dev_attr_fan5_input.dev_attr.attr, + &sensor_dev_attr_fan6_input.dev_attr.attr, + &sensor_dev_attr_fan7_input.dev_attr.attr, + &sensor_dev_attr_pwm1.dev_attr.attr, + NULL +}; + +static int quanta_hwmon_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct quanta_hwmon_data *data; + int err; + + data = devm_kzalloc(&client->dev, sizeof(struct quanta_hwmon_data), + GFP_KERNEL); + if (!data) + return -ENOMEM; + + i2c_set_clientdata(client, data); + mutex_init(&data->lock); + + dev_info(&client->dev, "%s chip found\n", client->name); + + if(!strcmp(client->name, "quanta_ly9_hwmon")){ + data->attrs.attrs = quanta_hwmon_attr_6temps_3fans; + } + else{ + data->attrs.attrs = quanta_hwmon_attr; + } + err = sysfs_create_group(&client->dev.kobj, &data->attrs); + if (err) + return err; + + data->hwmon_dev = hwmon_device_register(&client->dev); + if (IS_ERR(data->hwmon_dev)) { + err = PTR_ERR(data->hwmon_dev); + goto exit_remove; + } + + i2c_smbus_write_byte_data(client, + QUANTA_HWMON_REG_FAN_MODE, + QUANTA_HWMON_FAN_SMART_MODE); + + return 0; + +exit_remove: + sysfs_remove_group(&client->dev.kobj, &data->attrs); + return err; +} + +static int quanta_hwmon_remove(struct i2c_client *client) +{ + struct quanta_hwmon_data *data = i2c_get_clientdata(client); + + hwmon_device_unregister(data->hwmon_dev); + sysfs_remove_group(&client->dev.kobj, &data->attrs); + return 0; +} + +module_i2c_driver(quanta_hwmon_driver); + +MODULE_AUTHOR("QCT Technical "); +MODULE_DESCRIPTION("Quanta LY6 hardware monitor driver"); +MODULE_LICENSE("GPL"); diff --git a/packages/platforms/quanta/x86-64/modules/builds/quanta_switch.c b/packages/platforms/quanta/x86-64/modules/builds/quanta_switch.c new file mode 100644 index 00000000..979b32af --- /dev/null +++ b/packages/platforms/quanta/x86-64/modules/builds/quanta_switch.c @@ -0,0 +1,499 @@ +/* + * Quanta Switch platform driver + * + * + * Copyright (C) 2014 Quanta Computer inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + */ + +#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt + +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#define DRIVER_NAME "quanta-switch" +#define VENDOR_NAME "Quanta" +#define PRODUCT_NAME_LY6 "Quanta LY6" +#define PRODUCT_NAME_LY8 "Quanta LY8" +#define PRODUCT_NAME_LY9 "Quanta LY9" + +#define MAX_I2C_CLIENTS 512 +#define I2C_GPIO_BASE 0x80 +#define XSTR(x) STR(X) +#define STR(x) #x + +enum i2c_types { + i2c_type_spd, + i2c_type_rtc, + i2c_type_pca9546, + i2c_type_pca9548, + i2c_type_pca9554, + i2c_type_pca9555, + i2c_type_pca9698, + i2c_type_quanta_ly6_i2c_mux, + i2c_type_qci_cpld_4_ports, + i2c_type_24c02, + i2c_type_pmbus, + i2c_type_emerson700, + i2c_type_quanta_ly6_hwmon, + i2c_type_quanta_ly8_hwmon, + i2c_type_quanta_ly9_hwmon, +}; + +char *i2c_type_names[] = { + "spd", + "ds1339", + "pca9546", + "pca9548", + "pca9554", + "pca9555", + "pca9698", + "quanta_ly6_i2c_mux", + "CPLD-QSFP", + "24c02", + "pmbus", + "emerson700", + "quanta_ly6_hwmon", + "quanta_ly8_hwmon", + "quanta_ly9_hwmon", +}; + +struct i2c_init_data { + int parent_bus; + int type; + int addr; + int busno; + int gpio_base; + char name[I2C_NAME_SIZE]; +}; + +static struct i2c_init_data quanta_ly6_i2c_init_data[] = { + { .parent_bus = (0x00 + 0), .type = i2c_type_pca9546, .addr = 0x71, .busno = 0x02, .name = "PCA9546(CPU)\0" }, + { .parent_bus = (0x02 + 0), .type = i2c_type_pca9555, .addr = 0x20, .gpio_base = 0x40, .name = "PCA9555_1(CPU)\0" }, + + { .parent_bus = (0x00 + 0), .type = i2c_type_quanta_ly6_hwmon, .addr = 0x4e, .name = "PSoc\0" }, + { .parent_bus = (0x00 + 0), .type = i2c_type_spd, .addr = 0x52, .name = "SPD\0" }, + { .parent_bus = (0x00 + 0), .type = i2c_type_rtc, .addr = 0x68, .name = "RTC\0" }, + { .parent_bus = (0x00 + 0), .type = i2c_type_pca9548, .addr = 0x77, .busno = 0x10, .name = "PCA9548_1\0" }, + + { .parent_bus = (0x10 + 0), .type = i2c_type_pca9548, .addr = 0x73, .busno = 0x20, .name = "PCA9548(SFP_1-8)\0" }, + { .parent_bus = (0x10 + 1), .type = i2c_type_pca9548, .addr = 0x74, .busno = 0x28, .name = "PCA9548(SFP_9-16)\0" }, + { .parent_bus = (0x10 + 2), .type = i2c_type_pca9548, .addr = 0x75, .busno = 0x30, .name = "PCA9548(SFP_17-24)\0" }, + { .parent_bus = (0x10 + 3), .type = i2c_type_pca9548, .addr = 0x76, .busno = 0x38, .name = "PCA9548(SFP_25-32)\0" }, + { .parent_bus = (0x10 + 4), .type = i2c_type_quanta_ly6_i2c_mux, .addr = 0x3a, .name = "quanta_ly6_i2c_mux1\0" }, + { .parent_bus = (0x10 + 5), .type = i2c_type_quanta_ly6_i2c_mux, .addr = 0x3b, .name = "quanta_ly6_i2c_mux2\0" }, + { .parent_bus = (0x10 + 6), .type = i2c_type_pca9555, .addr = 0x24, .name = "PCA9555_3(FAN)\0" }, + { .parent_bus = (0x10 + 7), .type = i2c_type_pca9555, .addr = 0x23, .name = "PCA9555_4(QSFP_EN)\0" }, + { .parent_bus = (0x20 + 0), .type = i2c_type_24c02, .addr = 0x50, .name = "QSFP_1_EEPROM\0" }, + { .parent_bus = (0x20 + 1), .type = i2c_type_24c02, .addr = 0x50, .name = "QSFP_2_EEPROM\0" }, + { .parent_bus = (0x20 + 2), .type = i2c_type_24c02, .addr = 0x50, .name = "QSFP_3_EEPROM\0" }, + { .parent_bus = (0x20 + 3), .type = i2c_type_24c02, .addr = 0x50, .name = "QSFP_4_EEPROM\0" }, + { .parent_bus = (0x20 + 4), .type = i2c_type_24c02, .addr = 0x50, .name = "QSFP_5_EEPROM\0" }, + { .parent_bus = (0x20 + 5), .type = i2c_type_24c02, .addr = 0x50, .name = "QSFP_6_EEPROM\0" }, + { .parent_bus = (0x20 + 6), .type = i2c_type_24c02, .addr = 0x50, .name = "QSFP_7_EEPROM\0" }, + { .parent_bus = (0x20 + 7), .type = i2c_type_24c02, .addr = 0x50, .name = "QSFP_8_EEPROM\0" }, + { .parent_bus = (0x28 + 0), .type = i2c_type_24c02, .addr = 0x50, .name = "QSFP_9_EEPROM\0" }, + { .parent_bus = (0x28 + 1), .type = i2c_type_24c02, .addr = 0x50, .name = "QSFP_10_EEPROM\0" }, + { .parent_bus = (0x28 + 2), .type = i2c_type_24c02, .addr = 0x50, .name = "QSFP_11_EEPROM\0" }, + { .parent_bus = (0x28 + 3), .type = i2c_type_24c02, .addr = 0x50, .name = "QSFP_12_EEPROM\0" }, + { .parent_bus = (0x28 + 4), .type = i2c_type_24c02, .addr = 0x50, .name = "QSFP_13_EEPROM\0" }, + { .parent_bus = (0x28 + 5), .type = i2c_type_24c02, .addr = 0x50, .name = "QSFP_14_EEPROM\0" }, + { .parent_bus = (0x28 + 6), .type = i2c_type_24c02, .addr = 0x50, .name = "QSFP_15_EEPROM\0" }, + { .parent_bus = (0x28 + 7), .type = i2c_type_24c02, .addr = 0x50, .name = "QSFP_16_EEPROM\0" }, + { .parent_bus = (0x30 + 0), .type = i2c_type_24c02, .addr = 0x50, .name = "QSFP_17_EEPROM\0" }, + { .parent_bus = (0x30 + 1), .type = i2c_type_24c02, .addr = 0x50, .name = "QSFP_18_EEPROM\0" }, + { .parent_bus = (0x30 + 2), .type = i2c_type_24c02, .addr = 0x50, .name = "QSFP_19_EEPROM\0" }, + { .parent_bus = (0x30 + 3), .type = i2c_type_24c02, .addr = 0x50, .name = "QSFP_20_EEPROM\0" }, + { .parent_bus = (0x30 + 4), .type = i2c_type_24c02, .addr = 0x50, .name = "QSFP_21_EEPROM\0" }, + { .parent_bus = (0x30 + 5), .type = i2c_type_24c02, .addr = 0x50, .name = "QSFP_22_EEPROM\0" }, + { .parent_bus = (0x30 + 6), .type = i2c_type_24c02, .addr = 0x50, .name = "QSFP_23_EEPROM\0" }, + { .parent_bus = (0x30 + 7), .type = i2c_type_24c02, .addr = 0x50, .name = "QSFP_24_EEPROM\0" }, + { .parent_bus = (0x38 + 0), .type = i2c_type_24c02, .addr = 0x50, .name = "QSFP_25_EEPROM\0" }, + { .parent_bus = (0x38 + 1), .type = i2c_type_24c02, .addr = 0x50, .name = "QSFP_26_EEPROM\0" }, + { .parent_bus = (0x38 + 2), .type = i2c_type_24c02, .addr = 0x50, .name = "QSFP_27_EEPROM\0" }, + { .parent_bus = (0x38 + 3), .type = i2c_type_24c02, .addr = 0x50, .name = "QSFP_28_EEPROM\0" }, + { .parent_bus = (0x38 + 4), .type = i2c_type_24c02, .addr = 0x50, .name = "QSFP_29_EEPROM\0" }, + { .parent_bus = (0x38 + 5), .type = i2c_type_24c02, .addr = 0x50, .name = "QSFP_30_EEPROM\0" }, + { .parent_bus = (0x38 + 6), .type = i2c_type_24c02, .addr = 0x50, .name = "QSFP_31_EEPROM\0" }, + { .parent_bus = (0x38 + 7), .type = i2c_type_24c02, .addr = 0x50, .name = "QSFP_32_EEPROM\0" }, + + { .parent_bus = (0x00 + 0), .type = i2c_type_pca9546, .addr = 0x72, .busno = 0x18, .name = "PCA9546\0" }, + { .parent_bus = (0x18 + 0), .type = i2c_type_pmbus, .addr = 0x58, .name = "PSU_1\0" }, /* RPSU 1 */ + { .parent_bus = (0x18 + 1), .type = i2c_type_pmbus, .addr = 0x59, .name = "PSU_2\0" }, /* RPSU 2 */ + { .parent_bus = (0x18 + 2), .type = i2c_type_pca9555, .addr = 0x26, .name = "PCA9555_PSU\0" }, + { .parent_bus = (0x18 + 3), .type = i2c_type_24c02, .addr = 0x54, .name = "Board_EEPROM\0" }, +}; + +static struct i2c_init_data quanta_ly8_i2c_init_data[] = { + { .parent_bus = (0x00 + 0), .type = i2c_type_pca9546, .addr = 0x71, .busno = 0x02, .name = "PCA9546(CPU)\0" }, + { .parent_bus = (0x02 + 0), .type = i2c_type_pca9555, .addr = 0x20, .gpio_base = 0x40, .name = "PCA9555_1(CPU)\0" }, + + { .parent_bus = (0x00 + 0), .type = i2c_type_quanta_ly8_hwmon, .addr = 0x4e, .name = "PSoc\0" }, + { .parent_bus = (0x00 + 0), .type = i2c_type_spd, .addr = 0x52, .name = "SPD\0" }, + { .parent_bus = (0x00 + 0), .type = i2c_type_rtc, .addr = 0x68, .name = "RTC\0" }, + { .parent_bus = (0x00 + 0), .type = i2c_type_pca9548, .addr = 0x77, .busno = 0x10, .name = "PCA9548_1\0" }, + + { .parent_bus = (0x10 + 1), .type = i2c_type_pca9548, .addr = 0x73, .busno = 0x20, .name = "PCA9548(SFP_1-8)\0" }, + { .parent_bus = (0x10 + 1), .type = i2c_type_pca9548, .addr = 0x74, .busno = 0x28, .name = "PCA9548(SFP_9-16)\0" }, + { .parent_bus = (0x10 + 1), .type = i2c_type_pca9548, .addr = 0x76, .busno = 0x30, .name = "PCA9548(SFP_17-24)\0" }, + { .parent_bus = (0x10 + 2), .type = i2c_type_pca9548, .addr = 0x73, .busno = 0x38, .name = "PCA9548(SFP_25-32)\0" }, + { .parent_bus = (0x10 + 2), .type = i2c_type_pca9548, .addr = 0x74, .busno = 0x40, .name = "PCA9548(SFP_33-40)\0" }, + { .parent_bus = (0x10 + 2), .type = i2c_type_pca9548, .addr = 0x75, .busno = 0x48, .name = "PCA9548(SFP_41-48)\0" }, + { .parent_bus = (0x10 + 0), .type = i2c_type_pca9554, .addr = 0x25, .name = "PCA9554(PCA9698INT)\0" }, + { .parent_bus = (0x10 + 0), .type = i2c_type_pca9555, .addr = 0x24, .name = "PCA9555_3(FAN)\0" }, + { .parent_bus = (0x10 + 0), .type = i2c_type_pca9555, .addr = 0x23, .name = "PCA9555_4(QSFP_EN)\0" }, + { .parent_bus = (0x20 + 0), .type = i2c_type_24c02, .addr = 0x50, .name = "SFP_1_EEPROM\0" }, + { .parent_bus = (0x20 + 1), .type = i2c_type_24c02, .addr = 0x50, .name = "SFP_2_EEPROM\0" }, + { .parent_bus = (0x20 + 2), .type = i2c_type_24c02, .addr = 0x50, .name = "SFP_3_EEPROM\0" }, + { .parent_bus = (0x20 + 3), .type = i2c_type_24c02, .addr = 0x50, .name = "SFP_4_EEPROM\0" }, + { .parent_bus = (0x20 + 4), .type = i2c_type_24c02, .addr = 0x50, .name = "SFP_5_EEPROM\0" }, + { .parent_bus = (0x20 + 5), .type = i2c_type_24c02, .addr = 0x50, .name = "SFP_6_EEPROM\0" }, + { .parent_bus = (0x20 + 6), .type = i2c_type_24c02, .addr = 0x50, .name = "SFP_7_EEPROM\0" }, + { .parent_bus = (0x20 + 7), .type = i2c_type_24c02, .addr = 0x50, .name = "SFP_8_EEPROM\0" }, + { .parent_bus = (0x28 + 0), .type = i2c_type_24c02, .addr = 0x50, .name = "SFP_9_EEPROM\0" }, + { .parent_bus = (0x28 + 1), .type = i2c_type_24c02, .addr = 0x50, .name = "SFP_10_EEPROM\0" }, + { .parent_bus = (0x28 + 2), .type = i2c_type_24c02, .addr = 0x50, .name = "SFP_11_EEPROM\0" }, + { .parent_bus = (0x28 + 3), .type = i2c_type_24c02, .addr = 0x50, .name = "SFP_12_EEPROM\0" }, + { .parent_bus = (0x28 + 4), .type = i2c_type_24c02, .addr = 0x50, .name = "SFP_13_EEPROM\0" }, + { .parent_bus = (0x28 + 5), .type = i2c_type_24c02, .addr = 0x50, .name = "SFP_14_EEPROM\0" }, + { .parent_bus = (0x28 + 6), .type = i2c_type_24c02, .addr = 0x50, .name = "SFP_15_EEPROM\0" }, + { .parent_bus = (0x28 + 7), .type = i2c_type_24c02, .addr = 0x50, .name = "SFP_16_EEPROM\0" }, + { .parent_bus = (0x30 + 0), .type = i2c_type_24c02, .addr = 0x50, .name = "SFP_17_EEPROM\0" }, + { .parent_bus = (0x30 + 1), .type = i2c_type_24c02, .addr = 0x50, .name = "SFP_18_EEPROM\0" }, + { .parent_bus = (0x30 + 2), .type = i2c_type_24c02, .addr = 0x50, .name = "SFP_19_EEPROM\0" }, + { .parent_bus = (0x30 + 3), .type = i2c_type_24c02, .addr = 0x50, .name = "SFP_20_EEPROM\0" }, + { .parent_bus = (0x30 + 4), .type = i2c_type_24c02, .addr = 0x50, .name = "SFP_21_EEPROM\0" }, + { .parent_bus = (0x30 + 5), .type = i2c_type_24c02, .addr = 0x50, .name = "SFP_22_EEPROM\0" }, + { .parent_bus = (0x30 + 6), .type = i2c_type_24c02, .addr = 0x50, .name = "SFP_23_EEPROM\0" }, + { .parent_bus = (0x30 + 7), .type = i2c_type_24c02, .addr = 0x50, .name = "SFP_24_EEPROM\0" }, + { .parent_bus = (0x38 + 0), .type = i2c_type_24c02, .addr = 0x50, .name = "SFP_25_EEPROM\0" }, + { .parent_bus = (0x38 + 1), .type = i2c_type_24c02, .addr = 0x50, .name = "SFP_26_EEPROM\0" }, + { .parent_bus = (0x38 + 2), .type = i2c_type_24c02, .addr = 0x50, .name = "SFP_27_EEPROM\0" }, + { .parent_bus = (0x38 + 3), .type = i2c_type_24c02, .addr = 0x50, .name = "SFP_28_EEPROM\0" }, + { .parent_bus = (0x38 + 4), .type = i2c_type_24c02, .addr = 0x50, .name = "SFP_29_EEPROM\0" }, + { .parent_bus = (0x38 + 5), .type = i2c_type_24c02, .addr = 0x50, .name = "SFP_30_EEPROM\0" }, + { .parent_bus = (0x38 + 6), .type = i2c_type_24c02, .addr = 0x50, .name = "SFP_31_EEPROM\0" }, + { .parent_bus = (0x38 + 7), .type = i2c_type_24c02, .addr = 0x50, .name = "SFP_32_EEPROM\0" }, + { .parent_bus = (0x40 + 0), .type = i2c_type_24c02, .addr = 0x50, .name = "SFP_33_EEPROM\0" }, + { .parent_bus = (0x40 + 1), .type = i2c_type_24c02, .addr = 0x50, .name = "SFP_34_EEPROM\0" }, + { .parent_bus = (0x40 + 2), .type = i2c_type_24c02, .addr = 0x50, .name = "SFP_35_EEPROM\0" }, + { .parent_bus = (0x40 + 3), .type = i2c_type_24c02, .addr = 0x50, .name = "SFP_36_EEPROM\0" }, + { .parent_bus = (0x40 + 4), .type = i2c_type_24c02, .addr = 0x50, .name = "SFP_37_EEPROM\0" }, + { .parent_bus = (0x40 + 5), .type = i2c_type_24c02, .addr = 0x50, .name = "SFP_38_EEPROM\0" }, + { .parent_bus = (0x40 + 6), .type = i2c_type_24c02, .addr = 0x50, .name = "SFP_39_EEPROM\0" }, + { .parent_bus = (0x40 + 7), .type = i2c_type_24c02, .addr = 0x50, .name = "SFP_40_EEPROM\0" }, + { .parent_bus = (0x48 + 0), .type = i2c_type_24c02, .addr = 0x50, .name = "SFP_41_EEPROM\0" }, + { .parent_bus = (0x48 + 1), .type = i2c_type_24c02, .addr = 0x50, .name = "SFP_42_EEPROM\0" }, + { .parent_bus = (0x48 + 2), .type = i2c_type_24c02, .addr = 0x50, .name = "SFP_43_EEPROM\0" }, + { .parent_bus = (0x48 + 3), .type = i2c_type_24c02, .addr = 0x50, .name = "SFP_44_EEPROM\0" }, + { .parent_bus = (0x48 + 4), .type = i2c_type_24c02, .addr = 0x50, .name = "SFP_45_EEPROM\0" }, + { .parent_bus = (0x48 + 5), .type = i2c_type_24c02, .addr = 0x50, .name = "SFP_46_EEPROM\0" }, + { .parent_bus = (0x48 + 6), .type = i2c_type_24c02, .addr = 0x50, .name = "SFP_47_EEPROM\0" }, + { .parent_bus = (0x48 + 7), .type = i2c_type_24c02, .addr = 0x50, .name = "SFP_48_EEPROM\0" }, + + { .parent_bus = (0x10 + 3), .type = i2c_type_pca9698, .addr = 0x23, .name = "PCA9698(SFP_1-8)\0" }, + { .parent_bus = (0x10 + 3), .type = i2c_type_pca9698, .addr = 0x21, .name = "PCA9698(SFP_9-16)\0" }, + { .parent_bus = (0x10 + 3), .type = i2c_type_pca9698, .addr = 0x22, .name = "PCA9698(SFP_17-24)\0" }, + { .parent_bus = (0x10 + 4), .type = i2c_type_pca9698, .addr = 0x23, .name = "PCA9698(SFP_25-32)\0" }, + { .parent_bus = (0x10 + 4), .type = i2c_type_pca9698, .addr = 0x24, .name = "PCA9698(SFP_33-40)\0" }, + { .parent_bus = (0x10 + 4), .type = i2c_type_pca9698, .addr = 0x25, .name = "PCA9698(SFP_41-48)\0" }, + + { .parent_bus = (0x10 + 5), .type = i2c_type_pca9548, .addr = 0x76, .busno = 0x50, .name = "PCA9548_8\0" }, + { .parent_bus = (0x50 + 0), .type = i2c_type_24c02, .addr = 0x50, .name = "QSFP_1_EEPROM\0" }, + { .parent_bus = (0x50 + 1), .type = i2c_type_24c02, .addr = 0x50, .name = "QSFP_2_EEPROM\0" }, + { .parent_bus = (0x50 + 2), .type = i2c_type_24c02, .addr = 0x50, .name = "QSFP_3_EEPROM\0" }, + { .parent_bus = (0x50 + 3), .type = i2c_type_24c02, .addr = 0x50, .name = "QSFP_4_EEPROM\0" }, + + { .parent_bus = (0x10 + 5), .type = i2c_type_pca9555, .addr = 0x24, .name = "PCA9555_1(LED)\0" }, + { .parent_bus = (0x10 + 6), .type = i2c_type_pca9555, .addr = 0x23, .name = "PCA9555_2(QSFP)\0" }, + + /* QSFP+ DB */ + { .parent_bus = (0x10 + 7), .type = i2c_type_pca9555, .addr = 0x23, .name = "PCA9555(QDB)\0" }, + { .parent_bus = (0x10 + 7), .type = i2c_type_pca9546, .addr = 0x76, .busno = 0x58, .name = "PCA9546(QDB)\0" }, + { .parent_bus = (0x58 + 0), .type = i2c_type_24c02, .addr = 0x50, .name = "QDB_QSFP_1_EEPROM\0" }, + { .parent_bus = (0x58 + 1), .type = i2c_type_24c02, .addr = 0x50, .name = "QDB_QSFP_2_EEPROM\0" }, + + { .parent_bus = (0x00 + 0), .type = i2c_type_pca9546, .addr = 0x72, .busno = 0x18, .name = "PCA9546\0" }, + { .parent_bus = (0x18 + 0), .type = i2c_type_emerson700, .addr = 0x6f, .name = "PSU_1\0" }, /* RPSU 1 */ + { .parent_bus = (0x18 + 1), .type = i2c_type_emerson700, .addr = 0x69, .name = "PSU_2\0" }, /* RPSU 2 */ + { .parent_bus = (0x18 + 2), .type = i2c_type_pca9555, .addr = 0x26, .name = "PCA9555_5(PSU)\0" }, + { .parent_bus = (0x18 + 3), .type = i2c_type_24c02, .addr = 0x54, .name = "Board_EEPROM\0" }, +}; + +static struct i2c_init_data quanta_ly9_i2c_init_data[] = { + { .parent_bus = (0x00 + 0), .type = i2c_type_pca9546, .addr = 0x71, .busno = 0x02, .name = "PCA9546(CPU)\0" }, + { .parent_bus = (0x02 + 0), .type = i2c_type_pca9555, .addr = 0x20, .gpio_base = 0x40, .name = "PCA9555_1(CPU)\0" }, + + { .parent_bus = (0x00 + 0), .type = i2c_type_quanta_ly9_hwmon, .addr = 0x4e, .name = "PSoc\0" }, + { .parent_bus = (0x00 + 0), .type = i2c_type_spd, .addr = 0x52, .name = "SPD\0" }, + { .parent_bus = (0x00 + 0), .type = i2c_type_rtc, .addr = 0x68, .name = "RTC\0" }, + { .parent_bus = (0x00 + 0), .type = i2c_type_pca9548, .addr = 0x77, .busno = 0x10, .name = "PCA9548APW1\0" }, + + { .parent_bus = (0x10 + 5), .type = i2c_type_pca9548, .addr = 0x76, .busno = 0x20, .name = "PCA9548APW2\0" }, + { .parent_bus = (0x00 + 0), .type = i2c_type_qci_cpld_4_ports, .addr = 0x3a, .name = "quanta_ly9_cpld\0" }, + { .parent_bus = (0x10 + 0), .type = i2c_type_pca9555, .addr = 0x24, .name = "PCA9555_3(FAN)\0" }, + { .parent_bus = (0x10 + 0), .type = i2c_type_pca9555, .addr = 0x23, .name = "PCA9555_4(QSFP_EN)\0" }, + { .parent_bus = (0x20 + 0), .type = i2c_type_24c02, .addr = 0x50, .name = "QSFP_49_EEPROM\0" }, + { .parent_bus = (0x20 + 1), .type = i2c_type_24c02, .addr = 0x50, .name = "QSFP_50_EEPROM\0" }, + { .parent_bus = (0x20 + 2), .type = i2c_type_24c02, .addr = 0x50, .name = "QSFP_51_EEPROM\0" }, + { .parent_bus = (0x20 + 3), .type = i2c_type_24c02, .addr = 0x50, .name = "QSFP_52_EEPROM\0" }, + + /* QSFP+ DB */ + { .parent_bus = (0x10 + 7), .type = i2c_type_pca9555, .addr = 0x23, .name = "PCA9555(QDB)\0" }, + { .parent_bus = (0x10 + 7), .type = i2c_type_pca9546, .addr = 0x76, .busno = 0x30, .name = "PCA9546(QDB)\0" }, + { .parent_bus = (0x30 + 0), .type = i2c_type_24c02, .addr = 0x50, .name = "QSFP_53_EEPROM\0" }, + { .parent_bus = (0x30 + 1), .type = i2c_type_24c02, .addr = 0x50, .name = "QSFP_54_EEPROM\0" }, + + { .parent_bus = (0x00 + 0), .type = i2c_type_pca9546, .addr = 0x72, .busno = 0x18, .name = "PCA9546\0" }, + { .parent_bus = (0x18 + 0), .type = i2c_type_emerson700, .addr = 0x6f, .name = "PSU_1\0" }, /* RPSU 1 */ + { .parent_bus = (0x18 + 1), .type = i2c_type_emerson700, .addr = 0x69, .name = "PSU_2\0" }, /* RPSU 2 */ + { .parent_bus = (0x18 + 2), .type = i2c_type_pca9555, .addr = 0x26, .name = "PCA9555_1(PSU)\0" }, + { .parent_bus = (0x18 + 3), .type = i2c_type_24c02, .addr = 0x54, .name = "Board_EEPROM\0" }, +}; +static inline struct pca954x_platform_data *pca954x_platform_data_get(int type, int busno) { + static struct pca954x_platform_mode platform_modes[8]; + static struct pca954x_platform_data platform_data; + int num_modes, i; + + switch(type) { + case i2c_type_pca9546: + num_modes = 4; + break; + + case i2c_type_pca9548: + num_modes = 8; + break; + + default: + return (struct pca954x_platform_data *) NULL; + break; + } + + for(i=0;i + * + * Copyright 2013, 2014 BigSwitch Networks, Inc. + * + * This program is free software; you can redistribute it + * and/or modify it under the terms ofthe GNU General Public License as + * published by the Free Software Foundation; either version 2 of the License, + * or (at your option) any later version. + * + * + * + * + * An I2C multiplexer driver for the Quanta LY6 + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* + * Disable QSFP module reset (n=1..16) + * RST_N_Px1 INTL_Px1 MOD_ASB_Px1 LPMODE_Px1 RST_N_Px2 INTL_Px2 MOD_ASB_Px2 LPMODE_Px2 + * 7 6 5 4 3 2 1 0 + * port 2(n-1)+1 2(n-1)+1 2(n-1)+1 2(n-1)+1 2(n-1) 2(n-1) 2(n-1) 2(n-1) + */ +#define QUANTA_LY6_I2C_MUX_NUM_READ_GPIOS 32 +#define QUANTA_LY6_I2C_MUX_NUM_WRITE_GPIOS 32 +#define QUANTA_LY6_I2C_MUX_NUM_GPIO_GROUPS 4 +#define QUANTA_LY6_I2C_MUX_NUM_GPIOS (QUANTA_LY6_I2C_MUX_NUM_READ_GPIOS + QUANTA_LY6_I2C_MUX_NUM_WRITE_GPIOS) +#define QUANTA_LY6_I2C_MUX_NUM_GPIO_PINS_PER_GROUP (QUANTA_LY6_I2C_MUX_NUM_GPIOS / QUANTA_LY6_I2C_MUX_NUM_GPIO_GROUPS) + +struct quanta_ly6_i2c_mux { + struct i2c_client *client; + struct gpio_chip gpio_chip; + u16 gpio_write_val; +}; + +static const struct i2c_device_id quanta_ly6_i2c_mux_id[] = { + {"quanta_ly6_i2c_mux", 0xf600}, + {} +}; + +MODULE_DEVICE_TABLE(i2c, quanta_ly6_i2c_mux_id); + +/* + * Read 2 bytes once per command, and command should be group 1~4 + */ +static int quanta_ly6_i2c_mux_reg_read(struct i2c_adapter *adap, + struct i2c_client *client, + u8 command, u16 *val) +{ + int ret = -ENODEV; + + if (adap->algo->master_xfer) { + struct i2c_msg msg[2]; + char buf[4]; + + msg[0].addr = client->addr; + msg[0].flags = 0; + msg[0].len = 1; + buf[0] = command; + msg[0].buf = &buf[0]; + + /* always receive 3 bytes, else the PLD freaks out */ + msg[1].addr = client->addr; + msg[1].flags = I2C_M_RD; + msg[1].len = 3; + msg[1].buf = &buf[1]; + + ret = adap->algo->master_xfer(adap, msg, 2); + if (val != NULL && ret > -1) + *val = ((buf[2] << 8) | buf[1]); + } else { + union i2c_smbus_data data; + data.block[0] = 3; /* block transfer length */ + ret = adap->algo->smbus_xfer(adap, client->addr, + client->flags, + I2C_SMBUS_READ, + command, + I2C_SMBUS_I2C_BLOCK_DATA, &data); + if (val != NULL) + *val = ((data.block[2] << 8) | data.block[1]); + } + + return ret; +} + +/* + * Write 3 bytes once per command, and command should be group 1~4 + */ +static int quanta_ly6_i2c_mux_reg_write(struct i2c_adapter *adap, + struct i2c_client *client, + u8 command, u16 val) +{ + int ret = -ENODEV; + + if (adap->algo->master_xfer) { + struct i2c_msg msg; + char buf[4]; + + msg.addr = client->addr; + msg.flags = 0; + msg.len = 3; + buf[0] = command; + buf[1] = (val & 0xff); + buf[2] = ((val >> 8) & 0xff); + buf[3] = 0; + msg.buf = buf; + ret = adap->algo->master_xfer(adap, &msg, 1); + } else { + union i2c_smbus_data data; + + data.block[0] = 3; + data.block[1] = (val & 0xff); + data.block[2] = ((val >> 8) & 0xff); + data.block[3] = 0; + + ret = adap->algo->smbus_xfer(adap, client->addr, + client->flags, + I2C_SMBUS_WRITE, + command, + I2C_SMBUS_I2C_BLOCK_DATA, &data); + } + + return ret; +} + +static void quanta_ly6_i2c_mux_gpio_set(struct gpio_chip *gc, unsigned offset, + int val) +{ + struct quanta_ly6_i2c_mux *data = container_of( + gc, struct quanta_ly6_i2c_mux, gpio_chip); + int ret; + u32 group; + + /* ignore write attempts to input GPIOs */ + if ((offset % 4) == 1 || (offset % 4) == 2) { + dev_warn(&data->client->dev, + "ignoring GPIO write for input for pin %d\n", + offset); + return; + } + + group = (offset / QUANTA_LY6_I2C_MUX_NUM_GPIO_PINS_PER_GROUP) + 1; + ret = quanta_ly6_i2c_mux_reg_read(data->client->adapter, + data->client, + group, + &data->gpio_write_val); + + if (ret < 0) { + dev_err(&data->client->dev, + "quanta_ly6_i2c_mux_reg_read failed\n"); + return; + } + + if (val) + data->gpio_write_val |= (1 << (offset % QUANTA_LY6_I2C_MUX_NUM_GPIO_PINS_PER_GROUP)); + else + data->gpio_write_val &= ~(1 << (offset % QUANTA_LY6_I2C_MUX_NUM_GPIO_PINS_PER_GROUP)); + + quanta_ly6_i2c_mux_reg_write( + data->client->adapter, data->client, + group, + data->gpio_write_val); +} + +static int quanta_ly6_i2c_mux_gpio_get(struct gpio_chip *gc, unsigned offset) +{ + int ret; + u16 buf; + u32 group; + struct quanta_ly6_i2c_mux *data = container_of( + gc, struct quanta_ly6_i2c_mux, gpio_chip); + + if (offset >= (QUANTA_LY6_I2C_MUX_NUM_GPIOS)) { + offset -= (QUANTA_LY6_I2C_MUX_NUM_GPIOS); + } + + group = (offset / QUANTA_LY6_I2C_MUX_NUM_GPIO_PINS_PER_GROUP) + 1; + buf = 0; + ret = quanta_ly6_i2c_mux_reg_read(data->client->adapter, + data->client, + group, + &buf); + + if (ret < 0) { + dev_err(&data->client->dev, + "quanta_ly6_i2c_mux_reg_read failed\n"); + return 0; + } + return (buf & (1 << (offset % QUANTA_LY6_I2C_MUX_NUM_GPIO_PINS_PER_GROUP))) ? 1 : 0; +} + +static struct gpio_chip quanta_ly6_i2c_mux_gpio_chip = { + .label = "quanta_ly6_i2c_mux_gpio_chip", + .owner = THIS_MODULE, + .ngpio = QUANTA_LY6_I2C_MUX_NUM_READ_GPIOS + QUANTA_LY6_I2C_MUX_NUM_WRITE_GPIOS, + .base = -1, + .set = quanta_ly6_i2c_mux_gpio_set, + .get = quanta_ly6_i2c_mux_gpio_get, +}; + +static int quanta_ly6_i2c_mux_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct i2c_adapter *adap = client->adapter; + struct pca953x_platform_data *pdata; + struct quanta_ly6_i2c_mux *data; + int ret = -ENODEV, gpio_base = -1; + + if (!i2c_check_functionality(adap, I2C_FUNC_SMBUS_BYTE_DATA)) + goto err; + + data = kzalloc(sizeof(struct quanta_ly6_i2c_mux), GFP_KERNEL); + if (!data) { + ret = -ENOMEM; + goto err; + } + + i2c_set_clientdata(client, data); + data->client = client; + + if (i2c_smbus_write_byte(client, 0) < 0) { + dev_warn(&client->dev, "probe failed\n"); + goto exit_free; + } + + data->gpio_chip = quanta_ly6_i2c_mux_gpio_chip; + data->gpio_chip.dev = &client->dev; + data->gpio_write_val = 0xff; + + pdata = client->dev.platform_data; + if(pdata) { + gpio_base = (int) pdata->gpio_base; + } + data->gpio_chip.base = gpio_base; + + ret = gpiochip_add(&data->gpio_chip); + if (ret) { + dev_err(&client->dev, "failed to register GPIOs\n"); + goto exit_free; + } + + dev_info(&client->dev, + "registered GPIOs for I2C mux %s (%d read, %d write)\n", + client->name, + QUANTA_LY6_I2C_MUX_NUM_READ_GPIOS, + QUANTA_LY6_I2C_MUX_NUM_WRITE_GPIOS); + + return 0; + +exit_free: + kfree(data); +err: + return ret; +} + +static int quanta_ly6_i2c_mux_remove(struct i2c_client *client) +{ + struct quanta_ly6_i2c_mux *data = i2c_get_clientdata(client); + int ret; + + ret = gpiochip_remove(&data->gpio_chip); + if (ret) + return ret; + + kfree(data); + return 0; +} + +static struct i2c_driver quanta_ly6_i2c_mux_driver = { + .driver = { + .name = "quanta_ly6_i2c_mux", + .owner = THIS_MODULE, + }, + .probe = quanta_ly6_i2c_mux_probe, + .remove = quanta_ly6_i2c_mux_remove, + .id_table = quanta_ly6_i2c_mux_id, +}; + +module_i2c_driver(quanta_ly6_i2c_mux_driver); + +MODULE_AUTHOR("QCT Technical "); +MODULE_DESCRIPTION("Quanta LY6 I2C multiplexer driver"); +MODULE_LICENSE("GPL"); diff --git a/packages/platforms/quanta/x86-64/x86-64-quanta-ly6-rangeley/onlp/builds/src/x86_64_quanta_ly6_rangeley/module/src/fani.c b/packages/platforms/quanta/x86-64/x86-64-quanta-ly6-rangeley/onlp/builds/src/x86_64_quanta_ly6_rangeley/module/src/fani.c index 0c185b8d..5b1c286a 100644 --- a/packages/platforms/quanta/x86-64/x86-64-quanta-ly6-rangeley/onlp/builds/src/x86_64_quanta_ly6_rangeley/module/src/fani.c +++ b/packages/platforms/quanta/x86-64/x86-64-quanta-ly6-rangeley/onlp/builds/src/x86_64_quanta_ly6_rangeley/module/src/fani.c @@ -114,7 +114,7 @@ psu_fan_info_get__(onlp_fan_info_t* info, int id) extern struct psu_info_s psu_info[]; char* dir = psu_info[id].path; - return onlp_file_read_int(&info->rpm, "%s/fan1_input", dir); + return onlp_file_read_int(&info->rpm, "%s*fan1_input", dir); } @@ -166,5 +166,3 @@ onlp_fani_info_get(onlp_oid_t id, onlp_fan_info_t* rv) return ONLP_STATUS_E_INVALID; } - - diff --git a/packages/platforms/quanta/x86-64/x86-64-quanta-ly6-rangeley/onlp/builds/src/x86_64_quanta_ly6_rangeley/module/src/psui.c b/packages/platforms/quanta/x86-64/x86-64-quanta-ly6-rangeley/onlp/builds/src/x86_64_quanta_ly6_rangeley/module/src/psui.c index b0b511e3..930e9df7 100644 --- a/packages/platforms/quanta/x86-64/x86-64-quanta-ly6-rangeley/onlp/builds/src/x86_64_quanta_ly6_rangeley/module/src/psui.c +++ b/packages/platforms/quanta/x86-64/x86-64-quanta-ly6-rangeley/onlp/builds/src/x86_64_quanta_ly6_rangeley/module/src/psui.c @@ -55,7 +55,7 @@ static onlp_psu_info_t psus__[] = { #define PMBUS_MFR_MODEL 0x9A #define PMBUS_MFR_SERIAL 0x9E #define PMBUS_MFR_MODEL_LEN 20 -#define PMBUS_MFR_SERIAL_LEN 7 +#define PMBUS_MFR_SERIAL_LEN 19 int onlp_psui_info_get(onlp_oid_t id, onlp_psu_info_t* info) @@ -86,14 +86,14 @@ onlp_psui_info_get(onlp_oid_t id, onlp_psu_info_t* info) memset(buffer, 0, sizeof(buffer)); rv = i2c_block_read(psu_info[pid].busno, psu_info[pid].addr, PMBUS_MFR_MODEL, PMBUS_MFR_MODEL_LEN, buffer, ONLP_I2C_F_FORCE); if(rv >= 0) - strncpy(info->model, (char *) (buffer+1), buffer[0]); + strncpy(info->model, (char *) (buffer+1), (buffer[0] + 1)); else strcpy(info->model, "Missing"); memset(buffer, 0, sizeof(buffer)); rv = i2c_block_read(psu_info[pid].busno, psu_info[pid].addr, PMBUS_MFR_SERIAL, PMBUS_MFR_SERIAL_LEN, buffer, ONLP_I2C_F_FORCE); if(rv >= 0) - strncpy(info->serial, (char *) (buffer+1), buffer[0]); + strncpy(info->serial, (char *) (buffer+1), (buffer[0] + 1)); else strcpy(info->serial, "Missing"); diff --git a/packages/platforms/quanta/x86-64/x86-64-quanta-ly6-rangeley/platform-config/r0/PKG.yml b/packages/platforms/quanta/x86-64/x86-64-quanta-ly6-rangeley/platform-config/r0/PKG.yml index dcd526f2..06fe4ae9 100644 --- a/packages/platforms/quanta/x86-64/x86-64-quanta-ly6-rangeley/platform-config/r0/PKG.yml +++ b/packages/platforms/quanta/x86-64/x86-64-quanta-ly6-rangeley/platform-config/r0/PKG.yml @@ -1,2 +1 @@ -!include $ONL_TEMPLATES/platform-config-platform.yml ARCH=amd64 VENDOR=quanta PLATFORM=x86-64-quanta-ly6-rangeley-r0 - +!include $ONL_TEMPLATES/platform-config-platform.yml ARCH=amd64 VENDOR=quanta BASENAME=x86-64-quanta-ly6-rangeley REVISION=r0 diff --git a/packages/platforms/quanta/x86-64/x86-64-quanta-ly6-rangeley/platform-config/r0/src/lib/x86-64-quanta-ly6-rangeley-r0.yml b/packages/platforms/quanta/x86-64/x86-64-quanta-ly6-rangeley/platform-config/r0/src/lib/x86-64-quanta-ly6-rangeley-r0.yml index 0d6cc8f9..74c28389 100644 --- a/packages/platforms/quanta/x86-64/x86-64-quanta-ly6-rangeley/platform-config/r0/src/lib/x86-64-quanta-ly6-rangeley-r0.yml +++ b/packages/platforms/quanta/x86-64/x86-64-quanta-ly6-rangeley/platform-config/r0/src/lib/x86-64-quanta-ly6-rangeley-r0.yml @@ -18,10 +18,11 @@ x86-64-quanta-ly6-rangeley-r0: --stop=1 kernel: - <<: *kernel-3-9-6 + <<: *kernel-3-16 args: >- console=ttyS1,115200n8 + reboot=c,p ##network: ## interfaces: diff --git a/packages/platforms/quanta/x86-64/x86-64-quanta-ly6-rangeley/platform-config/r0/src/python/x86_64_quanta_ly6_rangeley_r0/__init__.py b/packages/platforms/quanta/x86-64/x86-64-quanta-ly6-rangeley/platform-config/r0/src/python/x86_64_quanta_ly6_rangeley_r0/__init__.py index 66694cb1..f2cbc919 100644 --- a/packages/platforms/quanta/x86-64/x86-64-quanta-ly6-rangeley/platform-config/r0/src/python/x86_64_quanta_ly6_rangeley_r0/__init__.py +++ b/packages/platforms/quanta/x86-64/x86-64-quanta-ly6-rangeley/platform-config/r0/src/python/x86_64_quanta_ly6_rangeley_r0/__init__.py @@ -8,25 +8,13 @@ class OnlPlatform_x86_64_quanta_ly6_rangeley_r0(OnlPlatformQuanta, SYS_OBJECT_ID='.6.1' def baseconfig(self): - # fixme - try: - files = os.listdir("%s/etc/init.d" % self.basedir_onl()) - for file in files: - src = "%s/etc/init.d/%s" % (self.basedir_onl(), file) - dst = "/etc/init.d/%s" % file - os.system("cp -f %s %s" % (src, dst)) - os.system("/usr/sbin/update-rc.d %s defaults" % file) - except: - pass + self.insmod("emerson700") + self.insmod("quanta_hwmon") + self.insmod("quanta-ly6-i2c-mux") + self.insmod("quanta_switch", params=dict(platform="x86-64-quanta-ly6-rangeley")) # make ds1339 as default rtc os.system("ln -snf /dev/rtc1 /dev/rtc") os.system("hwclock --hctosys") - # fixme - # set system led to green - sled = self.basedir_onl('sbin', 'systemled') - if os.path.exists(sled): - os.system(sled) - return True diff --git a/packages/platforms/quanta/x86-64/x86-64-quanta-ly8-rangeley/modules/Makefile b/packages/platforms/quanta/x86-64/x86-64-quanta-ly8-rangeley/modules/Makefile new file mode 100644 index 00000000..003238cf --- /dev/null +++ b/packages/platforms/quanta/x86-64/x86-64-quanta-ly8-rangeley/modules/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/packages/platforms/quanta/x86-64/x86-64-quanta-ly8-rangeley/modules/PKG.yml b/packages/platforms/quanta/x86-64/x86-64-quanta-ly8-rangeley/modules/PKG.yml new file mode 100644 index 00000000..360d50a4 --- /dev/null +++ b/packages/platforms/quanta/x86-64/x86-64-quanta-ly8-rangeley/modules/PKG.yml @@ -0,0 +1 @@ +!include $ONL_TEMPLATES/no-platform-modules.yml ARCH=amd64 VENDOR=quanta BASENAME=x86-64-quanta-ly8-rangeley diff --git a/packages/platforms/quanta/x86-64/x86-64-quanta-ly8-rangeley/onlp/builds/src/x86_64_quanta_ly8_rangeley/module/src/fani.c b/packages/platforms/quanta/x86-64/x86-64-quanta-ly8-rangeley/onlp/builds/src/x86_64_quanta_ly8_rangeley/module/src/fani.c index aff45fcf..739b2cc9 100644 --- a/packages/platforms/quanta/x86-64/x86-64-quanta-ly8-rangeley/onlp/builds/src/x86_64_quanta_ly8_rangeley/module/src/fani.c +++ b/packages/platforms/quanta/x86-64/x86-64-quanta-ly8-rangeley/onlp/builds/src/x86_64_quanta_ly8_rangeley/module/src/fani.c @@ -114,7 +114,7 @@ psu_fan_info_get__(onlp_fan_info_t* info, int id) extern struct psu_info_s psu_info[]; char* dir = psu_info[id].path; - return onlp_file_read_int(&info->rpm, "%s/fan1_input", dir); + return onlp_file_read_int(&info->rpm, "%s*fan1_input", dir); } @@ -166,5 +166,3 @@ onlp_fani_info_get(onlp_oid_t id, onlp_fan_info_t* rv) return ONLP_STATUS_E_INVALID; } - - diff --git a/packages/platforms/quanta/x86-64/x86-64-quanta-ly8-rangeley/onlp/builds/src/x86_64_quanta_ly8_rangeley/module/src/psui.c b/packages/platforms/quanta/x86-64/x86-64-quanta-ly8-rangeley/onlp/builds/src/x86_64_quanta_ly8_rangeley/module/src/psui.c index 4040e921..26971817 100644 --- a/packages/platforms/quanta/x86-64/x86-64-quanta-ly8-rangeley/onlp/builds/src/x86_64_quanta_ly8_rangeley/module/src/psui.c +++ b/packages/platforms/quanta/x86-64/x86-64-quanta-ly8-rangeley/onlp/builds/src/x86_64_quanta_ly8_rangeley/module/src/psui.c @@ -15,6 +15,7 @@ #include #include "x86_64_quanta_ly8_rangeley_int.h" #include "x86_64_quanta_ly8_rangeley_log.h" +#include struct psu_info_s psu_info[] = { {}, /* Not used */ @@ -55,7 +56,7 @@ static onlp_psu_info_t psus__[] = { #define PMBUS_MFR_MODEL 0x9A #define PMBUS_MFR_SERIAL 0x9E #define PMBUS_MFR_MODEL_LEN 20 -#define PMBUS_MFR_SERIAL_LEN 7 +#define PMBUS_MFR_SERIAL_LEN 19 int onlp_psui_info_get(onlp_oid_t id, onlp_psu_info_t* info) @@ -76,7 +77,7 @@ onlp_psui_info_get(onlp_oid_t id, onlp_psu_info_t* info) return 0; } - if(onlp_file_read_int(&info->mvin, "%s/in1_input", dir) == 0 && info->mvin >= 0) { + if(onlp_file_read_int(&info->mvin, "%s*in1_input", dir) == 0 && info->mvin >= 0) { info->caps |= ONLP_PSU_CAPS_VIN; } @@ -85,37 +86,41 @@ onlp_psui_info_get(onlp_oid_t id, onlp_psu_info_t* info) memset(buffer, 0, sizeof(buffer)); rv = i2c_block_read(psu_info[pid].busno, psu_info[pid].addr, PMBUS_MFR_MODEL, PMBUS_MFR_MODEL_LEN, buffer, ONLP_I2C_F_FORCE); - if(rv >= 0) - strncpy(info->model, (char *) (buffer+1), buffer[0]); - else + if(rv >= 0) { + aim_strlcpy(info->model, (char *) (buffer+1), (buffer[0]+1)); + } + else { strcpy(info->model, "Missing"); + } memset(buffer, 0, sizeof(buffer)); rv = i2c_block_read(psu_info[pid].busno, psu_info[pid].addr, PMBUS_MFR_SERIAL, PMBUS_MFR_SERIAL_LEN, buffer, ONLP_I2C_F_FORCE); - if(rv >= 0) - strncpy(info->serial, (char *) (buffer+1), buffer[0]); - else + if(rv >= 0) { + aim_strlcpy(info->serial, (char *) (buffer+1), (buffer[0] + 1)); + } else { strcpy(info->serial, "Missing"); + } + info->caps |= ONLP_PSU_CAPS_AC; - if(onlp_file_read_int(&info->miin, "%s/curr1_input", dir) == 0 && info->miin >= 0) { + if(onlp_file_read_int(&info->miin, "%s*curr1_input", dir) == 0 && info->miin >= 0) { info->caps |= ONLP_PSU_CAPS_IIN; } - if(onlp_file_read_int(&info->miout, "%s/curr2_input", dir) == 0 && info->miout >= 0) { + if(onlp_file_read_int(&info->miout, "%s*curr2_input", dir) == 0 && info->miout >= 0) { info->caps |= ONLP_PSU_CAPS_IOUT; } - if(onlp_file_read_int(&info->mvout, "%s/in2_input", dir) == 0 && info->mvout >= 0) { + if(onlp_file_read_int(&info->mvout, "%s*in2_input", dir) == 0 && info->mvout >= 0) { info->caps |= ONLP_PSU_CAPS_VOUT; /* Empirical */ info->mvout /= 500; } - if(onlp_file_read_int(&info->mpin, "%s/power1_input", dir) == 0 && info->mpin >= 0) { + if(onlp_file_read_int(&info->mpin, "%s*power1_input", dir) == 0 && info->mpin >= 0) { info->caps |= ONLP_PSU_CAPS_PIN; /* The pmbus driver reports power in micro-units */ info->mpin /= 1000; } - if(onlp_file_read_int(&info->mpout, "%s/power2_input", dir) == 0 && info->mpout >= 0) { + if(onlp_file_read_int(&info->mpout, "%s*power2_input", dir) == 0 && info->mpout >= 0) { info->caps |= ONLP_PSU_CAPS_POUT; /* the pmbus driver reports power in micro-units */ info->mpout /= 1000; diff --git a/packages/platforms/quanta/x86-64/x86-64-quanta-ly8-rangeley/platform-config/r0/PKG.yml b/packages/platforms/quanta/x86-64/x86-64-quanta-ly8-rangeley/platform-config/r0/PKG.yml index 0d8d6f00..8c40081d 100644 --- a/packages/platforms/quanta/x86-64/x86-64-quanta-ly8-rangeley/platform-config/r0/PKG.yml +++ b/packages/platforms/quanta/x86-64/x86-64-quanta-ly8-rangeley/platform-config/r0/PKG.yml @@ -1 +1 @@ -!include $ONL_TEMPLATES/platform-config-platform.yml ARCH=amd64 VENDOR=quanta PLATFORM=x86-64-quanta-ly8-rangeley-r0 +!include $ONL_TEMPLATES/platform-config-platform.yml ARCH=amd64 VENDOR=quanta BASENAME=x86-64-quanta-ly8-rangeley REVISION=r0 diff --git a/packages/platforms/quanta/x86-64/x86-64-quanta-ly8-rangeley/platform-config/r0/src/lib/x86-64-quanta-ly8-rangeley-r0.yml b/packages/platforms/quanta/x86-64/x86-64-quanta-ly8-rangeley/platform-config/r0/src/lib/x86-64-quanta-ly8-rangeley-r0.yml index d6d78f2a..b8a38c37 100644 --- a/packages/platforms/quanta/x86-64/x86-64-quanta-ly8-rangeley/platform-config/r0/src/lib/x86-64-quanta-ly8-rangeley-r0.yml +++ b/packages/platforms/quanta/x86-64/x86-64-quanta-ly8-rangeley/platform-config/r0/src/lib/x86-64-quanta-ly8-rangeley-r0.yml @@ -18,10 +18,11 @@ x86-64-quanta-ly8-rangeley-r0: --stop=1 kernel: - <<: *kernel-3-9-6 + <<: *kernel-3-16 args: >- console=ttyS1,115200n8 + reboot=c,p ##network: ## interfaces: diff --git a/packages/platforms/quanta/x86-64/x86-64-quanta-ly8-rangeley/platform-config/r0/src/python/x86_64_quanta_ly8_rangeley_r0/__init__.py b/packages/platforms/quanta/x86-64/x86-64-quanta-ly8-rangeley/platform-config/r0/src/python/x86_64_quanta_ly8_rangeley_r0/__init__.py index 899e821c..2ea6ad6d 100644 --- a/packages/platforms/quanta/x86-64/x86-64-quanta-ly8-rangeley/platform-config/r0/src/python/x86_64_quanta_ly8_rangeley_r0/__init__.py +++ b/packages/platforms/quanta/x86-64/x86-64-quanta-ly8-rangeley/platform-config/r0/src/python/x86_64_quanta_ly8_rangeley_r0/__init__.py @@ -8,25 +8,12 @@ class OnlPlatform_x86_64_quanta_ly8_rangeley_r0(OnlPlatformQuanta, SYS_OBJECT_ID=".8.1" def baseconfig(self): - # fixme - try: - files = os.listdir("%s/etc/init.d" % self.basedir_onl()) - for file in files: - src = "%s/etc/init.d/%s" % (self.basedir_onl(), file) - dst = "/etc/init.d/%s" % file - os.system("cp -f %s %s" % (src, dst)) - os.system("/usr/sbin/update-rc.d %s defaults" % file) - except: - pass + self.insmod("emerson700") + self.insmod("quanta_hwmon") + self.insmod("quanta_switch", params=dict(platform="x86-64-quanta-ly8-rangeley")) # make ds1339 as default rtc os.system("ln -snf /dev/rtc1 /dev/rtc") os.system("hwclock --hctosys") - # fixme - # set system led to green - sled = self.basedir_onl('sbin', 'systemled') - if os.path.exists(sled): - os.system(sled) - return True diff --git a/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/.gitignore b/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/.gitignore new file mode 100755 index 00000000..f4ffb13d --- /dev/null +++ b/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/.gitignore @@ -0,0 +1,2 @@ +*x86*64*quanta*ly9*rangeley*.mk +onlpdump.mk diff --git a/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/Makefile b/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/Makefile new file mode 100755 index 00000000..003238cf --- /dev/null +++ b/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/modules/Makefile b/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/modules/Makefile new file mode 100644 index 00000000..003238cf --- /dev/null +++ b/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/modules/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/modules/PKG.yml b/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/modules/PKG.yml new file mode 100644 index 00000000..0eb96961 --- /dev/null +++ b/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/modules/PKG.yml @@ -0,0 +1 @@ +!include $ONL_TEMPLATES/no-platform-modules.yml ARCH=amd64 VENDOR=quanta BASENAME=x86-64-quanta-ly9-rangeley diff --git a/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/Makefile b/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/Makefile new file mode 100755 index 00000000..003238cf --- /dev/null +++ b/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/PKG.yml b/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/PKG.yml new file mode 100755 index 00000000..2707a43a --- /dev/null +++ b/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/PKG.yml @@ -0,0 +1 @@ +!include $ONL_TEMPLATES/onlp-platform-any.yml PLATFORM=x86-64-quanta-ly9-rangeley ARCH=amd64 TOOLCHAIN=x86_64-linux-gnu diff --git a/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/builds/Makefile b/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/builds/Makefile new file mode 100755 index 00000000..e7437cb2 --- /dev/null +++ b/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/builds/Makefile @@ -0,0 +1,2 @@ +FILTER=src +include $(ONL)/make/subdirs.mk diff --git a/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/builds/lib/Makefile b/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/builds/lib/Makefile new file mode 100755 index 00000000..3803f023 --- /dev/null +++ b/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/builds/lib/Makefile @@ -0,0 +1,45 @@ +############################################################ +# +# +# Copyright 2014 BigSwitch Networks, Inc. +# +# Licensed under the Eclipse Public License, Version 1.0 (the +# "License"); you may not use this file except in compliance +# with the License. You may obtain a copy of the License at +# +# http://www.eclipse.org/legal/epl-v10.html +# +# Unless required by applicable law or agreed to in writing, +# software distributed under the License is distributed on an +# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, +# either express or implied. See the License for the specific +# language governing permissions and limitations under the +# License. +# +# +############################################################ +# +# +############################################################ +include $(ONL)/make/config.amd64.mk + +MODULE := libonlp-x86-64-quanta-ly9-rangeley +include $(BUILDER)/standardinit.mk + +DEPENDMODULES := AIM IOF x86_64_quanta_ly9_rangeley quanta_sys_eeprom onlplib +DEPENDMODULE_HEADERS := sff + +include $(BUILDER)/dependmodules.mk + +SHAREDLIB := libonlp-x86-64-quanta-ly9-rangeley.so +$(SHAREDLIB)_TARGETS := $(ALL_TARGETS) +include $(BUILDER)/so.mk +.DEFAULT_GOAL := $(SHAREDLIB) + +GLOBAL_CFLAGS += -I$(onlp_BASEDIR)/module/inc +GLOBAL_CFLAGS += -DAIM_CONFIG_INCLUDE_MODULES_INIT=1 +GLOBAL_CFLAGS += -fPIC +GLOBAL_LINK_LIBS += -lpthread + +include $(BUILDER)/targets.mk + diff --git a/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/builds/onlpdump/Makefile b/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/builds/onlpdump/Makefile new file mode 100755 index 00000000..8f47038b --- /dev/null +++ b/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/builds/onlpdump/Makefile @@ -0,0 +1,45 @@ +############################################################ +# +# +# Copyright 2014 BigSwitch Networks, Inc. +# +# Licensed under the Eclipse Public License, Version 1.0 (the +# "License"); you may not use this file except in compliance +# with the License. You may obtain a copy of the License at +# +# http://www.eclipse.org/legal/epl-v10.html +# +# Unless required by applicable law or agreed to in writing, +# software distributed under the License is distributed on an +# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, +# either express or implied. See the License for the specific +# language governing permissions and limitations under the +# License. +# +# +############################################################ +# +# +# +############################################################ +include $(ONL)/make/config.amd64.mk + +.DEFAULT_GOAL := onlpdump + +MODULE := onlpdump +include $(BUILDER)/standardinit.mk + +DEPENDMODULES := AIM IOF onlp x86_64_quanta_ly9_rangeley quanta_sys_eeprom onlplib onlp_platform_defaults sff cjson cjson_util timer_wheel OS + +include $(BUILDER)/dependmodules.mk + +BINARY := onlpdump +$(BINARY)_LIBRARIES := $(LIBRARY_TARGETS) +include $(BUILDER)/bin.mk + +GLOBAL_CFLAGS += -DAIM_CONFIG_AIM_MAIN_FUNCTION=onlpdump_main +GLOBAL_CFLAGS += -DAIM_CONFIG_INCLUDE_MODULES_INIT=1 +GLOBAL_CFLAGS += -DAIM_CONFIG_INCLUDE_MAIN=1 +GLOBAL_LINK_LIBS += -lpthread -lm + +include $(BUILDER)/targets.mk diff --git a/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/builds/src/x86_64_quanta_ly9_rangeley/.module b/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/builds/src/x86_64_quanta_ly9_rangeley/.module new file mode 100755 index 00000000..30adb0e3 --- /dev/null +++ b/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/builds/src/x86_64_quanta_ly9_rangeley/.module @@ -0,0 +1 @@ +name: x86_64_quanta_ly9_rangeley diff --git a/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/builds/src/x86_64_quanta_ly9_rangeley/Makefile b/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/builds/src/x86_64_quanta_ly9_rangeley/Makefile new file mode 100755 index 00000000..437dc031 --- /dev/null +++ b/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/builds/src/x86_64_quanta_ly9_rangeley/Makefile @@ -0,0 +1,9 @@ +############################################################################### +# +# +# +############################################################################### +include $(ONL)/make/config.mk +MODULE := x86_64_quanta_ly9_rangeley +AUTOMODULE := x86_64_quanta_ly9_rangeley +include $(BUILDER)/definemodule.mk diff --git a/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/builds/src/x86_64_quanta_ly9_rangeley/module/auto/make.mk b/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/builds/src/x86_64_quanta_ly9_rangeley/module/auto/make.mk new file mode 100755 index 00000000..1b148f83 --- /dev/null +++ b/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/builds/src/x86_64_quanta_ly9_rangeley/module/auto/make.mk @@ -0,0 +1,9 @@ +############################################################################### +# +# x86_64_quanta_ly9_rangeley Autogeneration +# +############################################################################### +x86_64_quanta_ly9_rangeley_AUTO_DEFS := module/auto/x86_64_quanta_ly9_rangeley.yml +x86_64_quanta_ly9_rangeley_AUTO_DIRS := module/inc/x86_64_quanta_ly9_rangeley module/src +include $(BUILDER)/auto.mk + diff --git a/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/builds/src/x86_64_quanta_ly9_rangeley/module/auto/x86_64_quanta_ly9_rangeley.yml b/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/builds/src/x86_64_quanta_ly9_rangeley/module/auto/x86_64_quanta_ly9_rangeley.yml new file mode 100755 index 00000000..c72474ea --- /dev/null +++ b/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/builds/src/x86_64_quanta_ly9_rangeley/module/auto/x86_64_quanta_ly9_rangeley.yml @@ -0,0 +1,134 @@ +############################################################################### +# +# x86_64_quanta_ly9_rangeley Autogeneration Definitions. +# +############################################################################### + +cdefs: &cdefs +- X86_64_QUANTA_LY9_RANGELEY_CONFIG_INCLUDE_LOGGING: + doc: "Include or exclude logging." + default: 1 +- X86_64_QUANTA_LY9_RANGELEY_CONFIG_LOG_OPTIONS_DEFAULT: + doc: "Default enabled log options." + default: AIM_LOG_OPTIONS_DEFAULT +- X86_64_QUANTA_LY9_RANGELEY_CONFIG_LOG_BITS_DEFAULT: + doc: "Default enabled log bits." + default: AIM_LOG_BITS_DEFAULT +- X86_64_QUANTA_LY9_RANGELEY_CONFIG_LOG_CUSTOM_BITS_DEFAULT: + doc: "Default enabled custom log bits." + default: 0 +- X86_64_QUANTA_LY9_RANGELEY_CONFIG_PORTING_STDLIB: + doc: "Default all porting macros to use the C standard libraries." + default: 1 +- X86_64_QUANTA_LY9_RANGELEY_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS: + doc: "Include standard library headers for stdlib porting macros." + default: X86_64_QUANTA_LY9_RANGELEY_CONFIG_PORTING_STDLIB +- X86_64_QUANTA_LY9_RANGELEY_CONFIG_INCLUDE_UCLI: + doc: "Include generic uCli support." + default: 0 +- X86_64_QUANTA_LY9_RANGELEY_CONFIG_SYSFAN_RPM_FAILURE_THRESHOLD: + doc: "RPM Threshold at which the fan is considered to have failed." + default: 3000 +- X86_64_QUANTA_LY9_RANGELEY_CONFIG_SYSFAN_F2B_RPM_MAX: + doc: "Maximum system front-to-back fan speed." + default: 18000 +- X86_64_QUANTA_LY9_RANGELEY_CONFIG_SYSFAN_B2F_RPM_MAX: + doc: "Maximum system back-to-front fan speed." + default: 18000 +- X86_64_QUANTA_LY9_RANGELEY_CONFIG_PHY_RESET_DELAY_MS: + doc: "Time to hold Phy GPIO in reset, in ms" + default: 100 + +definitions: + cdefs: + X86_64_QUANTA_LY9_RANGELEY_CONFIG_HEADER: + defs: *cdefs + basename: x86_64_quanta_ly9_rangeley_config + + enum: &enums + + fan_id: + members: + - FAN1 : 1 + - FAN2 : 2 + - FAN3 : 3 + - FAN4 : 4 + - FAN5 : 5 + - FAN6 : 6 + - FAN7 : 7 + - FAN8 : 8 + - FAN9 : 9 + - FAN10 : 10 + + fan_oid: + members: + - FAN1 : ONLP_FAN_ID_CREATE(1) + - FAN2 : ONLP_FAN_ID_CREATE(2) + - FAN3 : ONLP_FAN_ID_CREATE(3) + - FAN4 : ONLP_FAN_ID_CREATE(4) + - FAN5 : ONLP_FAN_ID_CREATE(5) + - FAN6 : ONLP_FAN_ID_CREATE(6) + - FAN7 : ONLP_FAN_ID_CREATE(7) + - FAN8 : ONLP_FAN_ID_CREATE(8) + - FAN9 : ONLP_FAN_ID_CREATE(9) + - FAN10 : ONLP_FAN_ID_CREATE(10) + + psu_id: + members: + - PSU1 : 1 + - PSU2 : 2 + + psu_oid: + members: + - PSU1 : ONLP_PSU_ID_CREATE(1) + - PSU2 : ONLP_PSU_ID_CREATE(2) + + thermal_id: + members: + - THERMAL1 : 1 + - THERMAL2 : 2 + - THERMAL3 : 3 + - THERMAL4 : 4 + - THERMAL5 : 5 + - THERMAL6 : 6 + - THERMAL7 : 7 + - THERMAL8 : 8 + - THERMAL9 : 9 + - THERMAL10 : 10 + - THERMAL11 : 11 + - THERMAL12 : 12 + - THERMAL13 : 13 + - THERMAL14 : 14 + - THERMAL15 : 15 + - THERMAL16 : 16 + + + thermal_oid: + members: + - THERMAL1 : ONLP_THERMAL_ID_CREATE(1) + - THERMAL2 : ONLP_THERMAL_ID_CREATE(2) + - THERMAL3 : ONLP_THERMAL_ID_CREATE(3) + - THERMAL4 : ONLP_THERMAL_ID_CREATE(4) + - THERMAL5 : ONLP_THERMAL_ID_CREATE(5) + - THERMAL6 : ONLP_THERMAL_ID_CREATE(6) + - THERMAL7 : ONLP_THERMAL_ID_CREATE(7) + - THERMAL8 : ONLP_THERMAL_ID_CREATE(8) + - THERMAL9 : ONLP_THERMAL_ID_CREATE(9) + - THERMAL10 : ONLP_THERMAL_ID_CREATE(10) + - THERMAL11 : ONLP_THERMAL_ID_CREATE(11) + - THERMAL12 : ONLP_THERMAL_ID_CREATE(12) + - THERMAL13 : ONLP_THERMAL_ID_CREATE(13) + - THERMAL14 : ONLP_THERMAL_ID_CREATE(14) + - THERMAL15 : ONLP_THERMAL_ID_CREATE(15) + - THERMAL16 : ONLP_THERMAL_ID_CREATE(16) + + + portingmacro: + X86_64_QUANTA_LY9_RANGELEY: + macros: + - memset + - memcpy + - strncpy + - vsnprintf + - snprintf + - strlen diff --git a/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/builds/src/x86_64_quanta_ly9_rangeley/module/inc/quanta_lib/gpio.h b/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/builds/src/x86_64_quanta_ly9_rangeley/module/inc/quanta_lib/gpio.h new file mode 100755 index 00000000..f2882476 --- /dev/null +++ b/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/builds/src/x86_64_quanta_ly9_rangeley/module/inc/quanta_lib/gpio.h @@ -0,0 +1,19 @@ +#ifndef __QUANTA_LIB_GPIO_H__ +#define __QUANTA_LIB_GPIO_H__ + +#define GPIO_LOW 0 +#define GPIO_HIGH 1 + +#define GPIO_IN 0 +#define GPIO_OUT 1 + +#define GPIO_PATH "/sys/class/gpio" +#define GPIO_EXPORT GPIO_PATH "/export" +#define GPIO_UNEXPORT GPIO_PATH "/unexport" +#define GPIO_PREF GPIO_PATH "/gpio" + +int pca953x_gpio_value_get(int gpio, int *value); +int pca953x_gpio_direction_set(int gpio, int direction); +int pca953x_gpio_value_set(int gpio, int value); + +#endif /* __QUANTA_LIB_GPIO_H__ */ diff --git a/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/builds/src/x86_64_quanta_ly9_rangeley/module/inc/quanta_lib/i2c.h b/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/builds/src/x86_64_quanta_ly9_rangeley/module/inc/quanta_lib/i2c.h new file mode 100755 index 00000000..d93595fa --- /dev/null +++ b/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/builds/src/x86_64_quanta_ly9_rangeley/module/inc/quanta_lib/i2c.h @@ -0,0 +1,7 @@ +#ifndef __QUANTA_LIB_I2C_H__ +#define __QUANTA_LIB_I2C_H__ + +int i2c_block_read(int bus, uint8_t addr, uint8_t offset, int size, + unsigned char *rdata, uint32_t flags); + +#endif /* __QUANTA_LIB_I2C_H__ */ diff --git a/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/builds/src/x86_64_quanta_ly9_rangeley/module/inc/x86_64_quanta_ly9_rangeley/x86_64_quanta_ly9_rangeley.x b/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/builds/src/x86_64_quanta_ly9_rangeley/module/inc/x86_64_quanta_ly9_rangeley/x86_64_quanta_ly9_rangeley.x new file mode 100755 index 00000000..b1750162 --- /dev/null +++ b/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/builds/src/x86_64_quanta_ly9_rangeley/module/inc/x86_64_quanta_ly9_rangeley/x86_64_quanta_ly9_rangeley.x @@ -0,0 +1,14 @@ +/**************************************************************************//** + * + * + * + *****************************************************************************/ +#include + +/* <--auto.start.xmacro(ALL).define> */ +/* */ + +/* <--auto.start.xenum(ALL).define> */ +/* */ + + diff --git a/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/builds/src/x86_64_quanta_ly9_rangeley/module/inc/x86_64_quanta_ly9_rangeley/x86_64_quanta_ly9_rangeley_config.h b/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/builds/src/x86_64_quanta_ly9_rangeley/module/inc/x86_64_quanta_ly9_rangeley/x86_64_quanta_ly9_rangeley_config.h new file mode 100755 index 00000000..658f7e65 --- /dev/null +++ b/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/builds/src/x86_64_quanta_ly9_rangeley/module/inc/x86_64_quanta_ly9_rangeley/x86_64_quanta_ly9_rangeley_config.h @@ -0,0 +1,167 @@ +/**************************************************************************//** + * + * @file + * @brief x86_64_quanta_ly9_rangeley Configuration Header + * + * @addtogroup x86_64_quanta_ly9_rangeley-config + * @{ + * + *****************************************************************************/ +#ifndef __X86_64_QUANTA_LY9_RANGELEY_CONFIG_H__ +#define __X86_64_QUANTA_LY9_RANGELEY_CONFIG_H__ + +#ifdef GLOBAL_INCLUDE_CUSTOM_CONFIG +#include +#endif +#ifdef X86_64_QUANTA_LY9_RANGELEY_INCLUDE_CUSTOM_CONFIG +#include +#endif + +/* */ +#include +/** + * X86_64_QUANTA_LY9_RANGELEY_CONFIG_INCLUDE_LOGGING + * + * Include or exclude logging. */ + + +#ifndef X86_64_QUANTA_LY9_RANGELEY_CONFIG_INCLUDE_LOGGING +#define X86_64_QUANTA_LY9_RANGELEY_CONFIG_INCLUDE_LOGGING 1 +#endif + +/** + * X86_64_QUANTA_LY9_RANGELEY_CONFIG_LOG_OPTIONS_DEFAULT + * + * Default enabled log options. */ + + +#ifndef X86_64_QUANTA_LY9_RANGELEY_CONFIG_LOG_OPTIONS_DEFAULT +#define X86_64_QUANTA_LY9_RANGELEY_CONFIG_LOG_OPTIONS_DEFAULT AIM_LOG_OPTIONS_DEFAULT +#endif + +/** + * X86_64_QUANTA_LY9_RANGELEY_CONFIG_LOG_BITS_DEFAULT + * + * Default enabled log bits. */ + + +#ifndef X86_64_QUANTA_LY9_RANGELEY_CONFIG_LOG_BITS_DEFAULT +#define X86_64_QUANTA_LY9_RANGELEY_CONFIG_LOG_BITS_DEFAULT AIM_LOG_BITS_DEFAULT +#endif + +/** + * X86_64_QUANTA_LY9_RANGELEY_CONFIG_LOG_CUSTOM_BITS_DEFAULT + * + * Default enabled custom log bits. */ + + +#ifndef X86_64_QUANTA_LY9_RANGELEY_CONFIG_LOG_CUSTOM_BITS_DEFAULT +#define X86_64_QUANTA_LY9_RANGELEY_CONFIG_LOG_CUSTOM_BITS_DEFAULT 0 +#endif + +/** + * X86_64_QUANTA_LY9_RANGELEY_CONFIG_PORTING_STDLIB + * + * Default all porting macros to use the C standard libraries. */ + + +#ifndef X86_64_QUANTA_LY9_RANGELEY_CONFIG_PORTING_STDLIB +#define X86_64_QUANTA_LY9_RANGELEY_CONFIG_PORTING_STDLIB 1 +#endif + +/** + * X86_64_QUANTA_LY9_RANGELEY_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS + * + * Include standard library headers for stdlib porting macros. */ + + +#ifndef X86_64_QUANTA_LY9_RANGELEY_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS +#define X86_64_QUANTA_LY9_RANGELEY_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS X86_64_QUANTA_LY9_RANGELEY_CONFIG_PORTING_STDLIB +#endif + +/** + * X86_64_QUANTA_LY9_RANGELEY_CONFIG_INCLUDE_UCLI + * + * Include generic uCli support. */ + + +#ifndef X86_64_QUANTA_LY9_RANGELEY_CONFIG_INCLUDE_UCLI +#define X86_64_QUANTA_LY9_RANGELEY_CONFIG_INCLUDE_UCLI 0 +#endif + +/** + * X86_64_QUANTA_LY9_RANGELEY_CONFIG_SYSFAN_RPM_FAILURE_THRESHOLD + * + * RPM Threshold at which the fan is considered to have failed. */ + + +#ifndef X86_64_QUANTA_LY9_RANGELEY_CONFIG_SYSFAN_RPM_FAILURE_THRESHOLD +#define X86_64_QUANTA_LY9_RANGELEY_CONFIG_SYSFAN_RPM_FAILURE_THRESHOLD 3000 +#endif + +/** + * X86_64_QUANTA_LY9_RANGELEY_CONFIG_SYSFAN_F2B_RPM_MAX + * + * Maximum system front-to-back fan speed. */ + + +#ifndef X86_64_QUANTA_LY9_RANGELEY_CONFIG_SYSFAN_F2B_RPM_MAX +#define X86_64_QUANTA_LY9_RANGELEY_CONFIG_SYSFAN_F2B_RPM_MAX 18000 +#endif + +/** + * X86_64_QUANTA_LY9_RANGELEY_CONFIG_SYSFAN_B2F_RPM_MAX + * + * Maximum system back-to-front fan speed. */ + + +#ifndef X86_64_QUANTA_LY9_RANGELEY_CONFIG_SYSFAN_B2F_RPM_MAX +#define X86_64_QUANTA_LY9_RANGELEY_CONFIG_SYSFAN_B2F_RPM_MAX 18000 +#endif + +/** + * X86_64_QUANTA_LY9_RANGELEY_CONFIG_PHY_RESET_DELAY_MS + * + * Time to hold Phy GPIO in reset, in ms */ + + +#ifndef X86_64_QUANTA_LY9_RANGELEY_CONFIG_PHY_RESET_DELAY_MS +#define X86_64_QUANTA_LY9_RANGELEY_CONFIG_PHY_RESET_DELAY_MS 100 +#endif + + + +/** + * All compile time options can be queried or displayed + */ + +/** Configuration settings structure. */ +typedef struct x86_64_quanta_ly9_rangeley_config_settings_s { + /** name */ + const char* name; + /** value */ + const char* value; +} x86_64_quanta_ly9_rangeley_config_settings_t; + +/** Configuration settings table. */ +/** x86_64_quanta_ly9_rangeley_config_settings table. */ +extern x86_64_quanta_ly9_rangeley_config_settings_t x86_64_quanta_ly9_rangeley_config_settings[]; + +/** + * @brief Lookup a configuration setting. + * @param setting The name of the configuration option to lookup. + */ +const char* x86_64_quanta_ly9_rangeley_config_lookup(const char* setting); + +/** + * @brief Show the compile-time configuration. + * @param pvs The output stream. + */ +int x86_64_quanta_ly9_rangeley_config_show(struct aim_pvs_s* pvs); + +/* */ + +#include "x86_64_quanta_ly9_rangeley_porting.h" + +#endif /* __X86_64_QUANTA_LY9_RANGELEY_CONFIG_H__ */ +/* @} */ diff --git a/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/builds/src/x86_64_quanta_ly9_rangeley/module/inc/x86_64_quanta_ly9_rangeley/x86_64_quanta_ly9_rangeley_dox.h b/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/builds/src/x86_64_quanta_ly9_rangeley/module/inc/x86_64_quanta_ly9_rangeley/x86_64_quanta_ly9_rangeley_dox.h new file mode 100755 index 00000000..8d232db7 --- /dev/null +++ b/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/builds/src/x86_64_quanta_ly9_rangeley/module/inc/x86_64_quanta_ly9_rangeley/x86_64_quanta_ly9_rangeley_dox.h @@ -0,0 +1,26 @@ +/**************************************************************************//** + * + * x86_64_quanta_ly9_rangeley Doxygen Header + * + *****************************************************************************/ +#ifndef __X86_64_QUANTA_LY9_RANGELEY_DOX_H__ +#define __X86_64_QUANTA_LY9_RANGELEY_DOX_H__ + +/** + * @defgroup x86_64_quanta_ly9_rangeley x86_64_quanta_ly9_rangeley - x86_64_quanta_ly9_rangeley Description + * + +The documentation overview for this module should go here. + + * + * @{ + * + * @defgroup x86_64_quanta_ly9_rangeley-x86_64_quanta_ly9_rangeley Public Interface + * @defgroup x86_64_quanta_ly9_rangeley-config Compile Time Configuration + * @defgroup x86_64_quanta_ly9_rangeley-porting Porting Macros + * + * @} + * + */ + +#endif /* __X86_64_QUANTA_LY9_RANGELEY_DOX_H__ */ diff --git a/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/builds/src/x86_64_quanta_ly9_rangeley/module/inc/x86_64_quanta_ly9_rangeley/x86_64_quanta_ly9_rangeley_gpio_table.h b/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/builds/src/x86_64_quanta_ly9_rangeley/module/inc/x86_64_quanta_ly9_rangeley/x86_64_quanta_ly9_rangeley_gpio_table.h new file mode 100755 index 00000000..486e2682 --- /dev/null +++ b/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/builds/src/x86_64_quanta_ly9_rangeley/module/inc/x86_64_quanta_ly9_rangeley/x86_64_quanta_ly9_rangeley_gpio_table.h @@ -0,0 +1,53 @@ +#ifndef __X86_64_QUANTA_LY9_RANGELEY_GPIO_TABLE_H__ +#define __X86_64_QUANTA_LY9_RANGELEY_GPIO_TABLE_H__ + +/* + * defined within platform/quanta_switch.c + * Quanta Switch Platform driver + */ +#define PCA953x_GPIO(P1, P2) (P1*8+P2) + +#define PCA9555_GPIO_SIZE 0x10 + +#define I2C_GPIO_BASE 0x80 + +#define FAN_GPIO_BASE (I2C_GPIO_BASE) +#define FAN_GPIO_SIZE PCA9555_GPIO_SIZE +#define FAN_PRSNT_N_1 (FAN_GPIO_BASE + PCA953x_GPIO(0,4)) +#define FAN_PRSNT_N_2 (FAN_GPIO_BASE + PCA953x_GPIO(0,5)) +#define FAN_PRSNT_N_3 (FAN_GPIO_BASE + PCA953x_GPIO(0,6)) +#define FAN_BF_DET1 (FAN_GPIO_BASE + PCA953x_GPIO(1,0)) +#define FAN_BF_DET2 (FAN_GPIO_BASE + PCA953x_GPIO(1,1)) +#define FAN_BF_DET3 (FAN_GPIO_BASE + PCA953x_GPIO(1,2)) +#define FAN_FAIL_LED_1 (FAN_GPIO_BASE + PCA953x_GPIO(1,4)) +#define FAN_FAIL_LED_2 (FAN_GPIO_BASE + PCA953x_GPIO(1,5)) +#define FAN_FAIL_LED_3 (FAN_GPIO_BASE + PCA953x_GPIO(1,6)) + +#define QSFP_EN_GPIO_BASE (FAN_GPIO_BASE + FAN_GPIO_SIZE) +#define QSFP_EN_GPIO_SIZE PCA9555_GPIO_SIZE +#define QSFP_EN_GPIO_P3V3_PW_GD (QSFP_EN_GPIO_BASE + PCA953x_GPIO(0,4)) +#define QSFP_EN_GPIO_P3V3_PW_EN (QSFP_EN_GPIO_BASE + PCA953x_GPIO(0,5)) +#define QSFP_EN_GPIO_QDB_PRSNT (QSFP_EN_GPIO_BASE + PCA953x_GPIO(0,6)) + +#define QSFP_QDB_GPIO_BASE (QSFP_EN_GPIO_BASE + QSFP_EN_GPIO_SIZE) +#define QSFP_QDB_GPIO_SIZE PCA9555_GPIO_SIZE +#define QSFP_QDB_GPIO_PRSNT_53_N (QSFP_QDB_GPIO_BASE + PCA953x_GPIO(0,2)) +#define QSFP_QDB_GPIO_PRSNT_54_N (QSFP_QDB_GPIO_BASE + PCA953x_GPIO(0,6)) +#define QSFP_QDB_GPIO_MOD_EN_N (QSFP_QDB_GPIO_BASE + PCA953x_GPIO(1,0)) + +#define PSU_GPIO_BASE (QSFP_QDB_GPIO_BASE + QSFP_QDB_GPIO_SIZE) +#define PSU_GPIO_SIZE PCA9555_GPIO_SIZE +#define PSU_GPIO_PSU1_PRSNT_N (PSU_GPIO_BASE + PCA953x_GPIO(0,0)) +#define PSU_GPIO_PSU1_PWRGD (PSU_GPIO_BASE + PCA953x_GPIO(0,1)) +#define PSU_GPIO_PSU2_PRSNT_N (PSU_GPIO_BASE + PCA953x_GPIO(0,3)) +#define PSU_GPIO_PSU2_PWRGD (PSU_GPIO_BASE + PCA953x_GPIO(0,4)) +#define PSU_GPIO_PSU1_AC_OK (PSU_GPIO_BASE + PCA953x_GPIO(0,6)) +#define PSU_GPIO_PSU2_AC_OK (PSU_GPIO_BASE + PCA953x_GPIO(0,7)) +#define PSU_GPIO_PSU1_GREEN_R (PSU_GPIO_BASE + PCA953x_GPIO(1,2)) +#define PSU_GPIO_PSU1_RED_R (PSU_GPIO_BASE + PCA953x_GPIO(1,3)) +#define PSU_GPIO_PSU2_GREEN_R (PSU_GPIO_BASE + PCA953x_GPIO(1,4)) +#define PSU_GPIO_PSU2_RED_R (PSU_GPIO_BASE + PCA953x_GPIO(1,5)) +#define PSU_GPIO_FAN_GREEN_R (PSU_GPIO_BASE + PCA953x_GPIO(1,6)) +#define PSU_GPIO_FAN_RED_R (PSU_GPIO_BASE + PCA953x_GPIO(1,7)) + +#endif /* __X86_64_QUANTA_LY9_RANGELEY_GPIO_TABLE_H__ */ diff --git a/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/builds/src/x86_64_quanta_ly9_rangeley/module/inc/x86_64_quanta_ly9_rangeley/x86_64_quanta_ly9_rangeley_porting.h b/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/builds/src/x86_64_quanta_ly9_rangeley/module/inc/x86_64_quanta_ly9_rangeley/x86_64_quanta_ly9_rangeley_porting.h new file mode 100755 index 00000000..7a08b3cb --- /dev/null +++ b/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/builds/src/x86_64_quanta_ly9_rangeley/module/inc/x86_64_quanta_ly9_rangeley/x86_64_quanta_ly9_rangeley_porting.h @@ -0,0 +1,87 @@ +/**************************************************************************//** + * + * @file + * @brief x86_64_quanta_ly9_rangeley Porting Macros. + * + * @addtogroup x86_64_quanta_ly9_rangeley-porting + * @{ + * + *****************************************************************************/ +#ifndef __X86_64_QUANTA_LY9_RANGELEY_PORTING_H__ +#define __X86_64_QUANTA_LY9_RANGELEY_PORTING_H__ + + +/* */ +#if X86_64_QUANTA_LY9_RANGELEY_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS == 1 +#include +#include +#include +#include +#include +#endif + +#ifndef X86_64_QUANTA_LY9_RANGELEY_MEMSET + #if defined(GLOBAL_MEMSET) + #define X86_64_QUANTA_LY9_RANGELEY_MEMSET GLOBAL_MEMSET + #elif X86_64_QUANTA_LY9_RANGELEY_CONFIG_PORTING_STDLIB == 1 + #define X86_64_QUANTA_LY9_RANGELEY_MEMSET memset + #else + #error The macro X86_64_QUANTA_LY9_RANGELEY_MEMSET is required but cannot be defined. + #endif +#endif + +#ifndef X86_64_QUANTA_LY9_RANGELEY_MEMCPY + #if defined(GLOBAL_MEMCPY) + #define X86_64_QUANTA_LY9_RANGELEY_MEMCPY GLOBAL_MEMCPY + #elif X86_64_QUANTA_LY9_RANGELEY_CONFIG_PORTING_STDLIB == 1 + #define X86_64_QUANTA_LY9_RANGELEY_MEMCPY memcpy + #else + #error The macro X86_64_QUANTA_LY9_RANGELEY_MEMCPY is required but cannot be defined. + #endif +#endif + +#ifndef X86_64_QUANTA_LY9_RANGELEY_STRNCPY + #if defined(GLOBAL_STRNCPY) + #define X86_64_QUANTA_LY9_RANGELEY_STRNCPY GLOBAL_STRNCPY + #elif X86_64_QUANTA_LY9_RANGELEY_CONFIG_PORTING_STDLIB == 1 + #define X86_64_QUANTA_LY9_RANGELEY_STRNCPY strncpy + #else + #error The macro X86_64_QUANTA_LY9_RANGELEY_STRNCPY is required but cannot be defined. + #endif +#endif + +#ifndef X86_64_QUANTA_LY9_RANGELEY_VSNPRINTF + #if defined(GLOBAL_VSNPRINTF) + #define X86_64_QUANTA_LY9_RANGELEY_VSNPRINTF GLOBAL_VSNPRINTF + #elif X86_64_QUANTA_LY9_RANGELEY_CONFIG_PORTING_STDLIB == 1 + #define X86_64_QUANTA_LY9_RANGELEY_VSNPRINTF vsnprintf + #else + #error The macro X86_64_QUANTA_LY9_RANGELEY_VSNPRINTF is required but cannot be defined. + #endif +#endif + +#ifndef X86_64_QUANTA_LY9_RANGELEY_SNPRINTF + #if defined(GLOBAL_SNPRINTF) + #define X86_64_QUANTA_LY9_RANGELEY_SNPRINTF GLOBAL_SNPRINTF + #elif X86_64_QUANTA_LY9_RANGELEY_CONFIG_PORTING_STDLIB == 1 + #define X86_64_QUANTA_LY9_RANGELEY_SNPRINTF snprintf + #else + #error The macro X86_64_QUANTA_LY9_RANGELEY_SNPRINTF is required but cannot be defined. + #endif +#endif + +#ifndef X86_64_QUANTA_LY9_RANGELEY_STRLEN + #if defined(GLOBAL_STRLEN) + #define X86_64_QUANTA_LY9_RANGELEY_STRLEN GLOBAL_STRLEN + #elif X86_64_QUANTA_LY9_RANGELEY_CONFIG_PORTING_STDLIB == 1 + #define X86_64_QUANTA_LY9_RANGELEY_STRLEN strlen + #else + #error The macro X86_64_QUANTA_LY9_RANGELEY_STRLEN is required but cannot be defined. + #endif +#endif + +/* */ + + +#endif /* __X86_64_QUANTA_LY9_RANGELEY_PORTING_H__ */ +/* @} */ diff --git a/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/builds/src/x86_64_quanta_ly9_rangeley/module/make.mk b/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/builds/src/x86_64_quanta_ly9_rangeley/module/make.mk new file mode 100755 index 00000000..74b4b50f --- /dev/null +++ b/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/builds/src/x86_64_quanta_ly9_rangeley/module/make.mk @@ -0,0 +1,10 @@ +############################################################################### +# +# +# +############################################################################### +THIS_DIR := $(dir $(lastword $(MAKEFILE_LIST))) +x86_64_quanta_ly9_rangeley_INCLUDES := -I $(THIS_DIR)inc +x86_64_quanta_ly9_rangeley_INTERNAL_INCLUDES := -I $(THIS_DIR)src +x86_64_quanta_ly9_rangeley_DEPENDMODULE_ENTRIES := init:x86_64_quanta_ly9_rangeley ucli:x86_64_quanta_ly9_rangeley + diff --git a/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/builds/src/x86_64_quanta_ly9_rangeley/module/src/Makefile b/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/builds/src/x86_64_quanta_ly9_rangeley/module/src/Makefile new file mode 100755 index 00000000..d82e9e30 --- /dev/null +++ b/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/builds/src/x86_64_quanta_ly9_rangeley/module/src/Makefile @@ -0,0 +1,9 @@ +############################################################################### +# +# Local source generation targets. +# +############################################################################### + +ucli: + @../../../../tools/uclihandlers.py x86_64_quanta_ly9_rangeley_ucli.c + diff --git a/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/builds/src/x86_64_quanta_ly9_rangeley/module/src/fani.c b/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/builds/src/x86_64_quanta_ly9_rangeley/module/src/fani.c new file mode 100755 index 00000000..474d5a6c --- /dev/null +++ b/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/builds/src/x86_64_quanta_ly9_rangeley/module/src/fani.c @@ -0,0 +1,168 @@ +/************************************************************ + * + * + * Copyright 2014 Big Switch Networks, Inc. + * + * Licensed under the Eclipse Public License, Version 1.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.eclipse.org/legal/epl-v10.html + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, + * either express or implied. See the License for the specific + * language governing permissions and limitations under the + * License. + * + * + ************************************************************ + * + * + * + ***********************************************************/ +#include +#include +#include + +#include "x86_64_quanta_ly9_rangeley_int.h" +#include "x86_64_quanta_ly9_rangeley_log.h" + +#include +#include + +int +onlp_fani_init(void) +{ + return ONLP_STATUS_OK; +} + +struct fan_gpio_s { + int present; + int fan_dir_detect; +}; + +static struct fan_gpio_s fan_gpio[] = { + {}, /* Not used */ + { .present = FAN_PRSNT_N_1, .fan_dir_detect = FAN_BF_DET1 }, + { .present = FAN_PRSNT_N_2, .fan_dir_detect = FAN_BF_DET2 }, + { .present = FAN_PRSNT_N_3, .fan_dir_detect = FAN_BF_DET3 }, + {}, /* Not used */ + { .present = FAN_PRSNT_N_1, .fan_dir_detect = FAN_BF_DET1 }, + { .present = FAN_PRSNT_N_2, .fan_dir_detect = FAN_BF_DET2 }, + { .present = FAN_PRSNT_N_3, .fan_dir_detect = FAN_BF_DET3 }, + {}, /* Not used */ +}; + +static int +sys_fan_info_get__(onlp_fan_info_t* info, int id) +{ + int value = 0; + int rv; + + if(pca953x_gpio_value_get(fan_gpio[id].present, &value) == ONLP_STATUS_OK + && value == GPIO_LOW) { + info->status = ONLP_FAN_STATUS_PRESENT; + if(pca953x_gpio_value_get(fan_gpio[id].fan_dir_detect, &value) == ONLP_STATUS_OK + && value == GPIO_LOW) { + info->status |= ONLP_FAN_STATUS_F2B; + info->caps |= ONLP_FAN_CAPS_F2B; + } + else { + info->status |= ONLP_FAN_STATUS_B2F; + info->caps |= ONLP_FAN_CAPS_B2F; + } + } + else { + info->status = ONLP_FAN_STATUS_FAILED; + } + + rv = onlp_file_read_int(&info->rpm, + SYS_HWMON_PREFIX "/fan%d_input", id); + + if(rv == ONLP_STATUS_E_INTERNAL) { + return rv; + } + + if(rv == ONLP_STATUS_E_MISSING) { + info->status &= ~1; + return 0; + } + + if(info->rpm <= X86_64_QUANTA_LY9_RANGELEY_CONFIG_SYSFAN_RPM_FAILURE_THRESHOLD) { + info->status |= ONLP_FAN_STATUS_FAILED; + } + + /* + * Calculate percentage based on current speed and the maximum. + */ + info->caps |= ONLP_FAN_CAPS_GET_PERCENTAGE; + if(info->status & ONLP_FAN_STATUS_F2B) { + info->percentage = (int) ((double) info->rpm * (double)100 / (double)X86_64_QUANTA_LY9_RANGELEY_CONFIG_SYSFAN_F2B_RPM_MAX); + } + if(info->status & ONLP_FAN_STATUS_B2F) { + info->percentage = (int) ((double) info->rpm * (double)100 / (double)X86_64_QUANTA_LY9_RANGELEY_CONFIG_SYSFAN_B2F_RPM_MAX); + } + + return 0; +} + +static int +psu_fan_info_get__(onlp_fan_info_t* info, int id) +{ + extern struct psu_info_s psu_info[]; + char* dir = psu_info[id].path; + + return onlp_file_read_int(&info->rpm, "%s*fan1_input", dir); +} + + +/* Onboard Fans */ +static onlp_fan_info_t fans__[] = { + { }, /* Not used */ + { { FAN_OID_FAN1, "Left (Module/Fan 1/1)", 0}, ONLP_FAN_STATUS_PRESENT }, + { { FAN_OID_FAN2, "Center(Module/Fan 2/1)", 0}, ONLP_FAN_STATUS_PRESENT }, + { { FAN_OID_FAN3, "Right (Module/Fan 3/1)", 0}, ONLP_FAN_STATUS_PRESENT }, + { { FAN_OID_FAN4, "Reserved (Module/Fan 4/1)", 0}, ONLP_FAN_STATUS_PRESENT }, + { { FAN_OID_FAN5, "Left (Module/Fan 1/2)", 0}, ONLP_FAN_STATUS_PRESENT }, + { { FAN_OID_FAN6, "Center(Module/Fan 2/2)", 0}, ONLP_FAN_STATUS_PRESENT }, + { { FAN_OID_FAN7, "Right (Module/Fan 3/2)", 0}, ONLP_FAN_STATUS_PRESENT }, + { { FAN_OID_FAN8, "Reserved (Module/Fan 4/2)", 0}, ONLP_FAN_STATUS_PRESENT }, + { { FAN_OID_FAN9, "PSU-1 Fan", 0 }, ONLP_FAN_STATUS_PRESENT }, + { { FAN_OID_FAN10, "PSU-2 Fan", 0 }, ONLP_FAN_STATUS_PRESENT }, + +}; + +int +onlp_fani_info_get(onlp_oid_t id, onlp_fan_info_t* rv) +{ + int fid = ONLP_OID_ID_GET(id); + + *rv = fans__[ONLP_OID_ID_GET(id)]; + rv->caps |= ONLP_FAN_CAPS_GET_RPM; + + switch(fid) { + case FAN_ID_FAN1: + case FAN_ID_FAN2: + case FAN_ID_FAN3: + case FAN_ID_FAN4: + case FAN_ID_FAN5: + case FAN_ID_FAN6: + case FAN_ID_FAN7: + case FAN_ID_FAN8: + return sys_fan_info_get__(rv, fid); + break; + + case FAN_ID_FAN9: + case FAN_ID_FAN10: + return psu_fan_info_get__(rv, fid - FAN_ID_FAN9 + 1); + break; + + default: + return ONLP_STATUS_E_INVALID; + break; + } + + return ONLP_STATUS_E_INVALID; +} diff --git a/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/builds/src/x86_64_quanta_ly9_rangeley/module/src/gpio.c b/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/builds/src/x86_64_quanta_ly9_rangeley/module/src/gpio.c new file mode 100755 index 00000000..cfbc1b83 --- /dev/null +++ b/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/builds/src/x86_64_quanta_ly9_rangeley/module/src/gpio.c @@ -0,0 +1,82 @@ +#include +#include +#include +#include +#include + +static int file_exists(char *filename) { + struct stat st; + return (stat(filename, &st) == 0); +} + +static int try_export_gpio(int gpio) { + char filename[PATH_MAX]; + + memset(filename, 0, sizeof(filename)); + sprintf(filename, "%s%d/value", GPIO_PREF, gpio); + + if(!file_exists(filename)) { + onlp_file_write_int(gpio, GPIO_EXPORT); + } + + return ONLP_STATUS_OK; +} + +static int try_unexport_gpio(int gpio) { + char filename[PATH_MAX]; + + memset(filename, 0, sizeof(filename)); + sprintf(filename, "%s%d/value", GPIO_PREF, gpio); + + if(file_exists(filename)) { + onlp_file_write_int(gpio, GPIO_UNEXPORT); + } + + return ONLP_STATUS_OK; +} + +int pca953x_gpio_value_get(int gpio, int *value) { + int ret; + + try_export_gpio(gpio); + ret = onlp_file_read_int(value, "%s%d/value", GPIO_PREF, gpio); + try_unexport_gpio(gpio); + + return ret; + } + +int pca953x_gpio_direction_set(int gpio, int direction) { + int ret; + + try_export_gpio(gpio); + + switch(direction) { + case GPIO_IN: + ret = onlp_file_write_str("in", "%s%d/direction", GPIO_PREF, gpio); + break; + + case GPIO_OUT: + ret = onlp_file_write_str("out", "%s%d/direction", GPIO_PREF, gpio); + break; + + default: + ret = ONLP_STATUS_E_UNSUPPORTED; + break; + } + + try_unexport_gpio(gpio); + + return ret; +} + +int pca953x_gpio_value_set(int gpio, int value) { + int ret; + + pca953x_gpio_direction_set(gpio, GPIO_OUT); + + try_export_gpio(gpio); + ret = onlp_file_write_int(value, "%s%d/value", GPIO_PREF, gpio); + try_unexport_gpio(gpio); + + return ret; +} diff --git a/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/builds/src/x86_64_quanta_ly9_rangeley/module/src/i2c.c b/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/builds/src/x86_64_quanta_ly9_rangeley/module/src/i2c.c new file mode 100755 index 00000000..8f72df0c --- /dev/null +++ b/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/builds/src/x86_64_quanta_ly9_rangeley/module/src/i2c.c @@ -0,0 +1,97 @@ +#include +#include +#include +#include +#include +#include +#if ONLPLIB_CONFIG_I2C_USE_CUSTOM_HEADER == 1 +#include +#else +#include +#endif +#include +#include +#include "x86_64_quanta_ly9_rangeley_log.h" +#include +#include + +int i2c_dev_smbus_access(int file, char read_write, __u8 command, + int size, union i2c_smbus_data *data) +{ + struct i2c_smbus_ioctl_data args; + + args.read_write = read_write; + args.command = command; + args.size = size; + args.data = data; + return ioctl(file, I2C_SMBUS, &args); +} + +int i2c_dev_read_block(int file, uint8_t command, unsigned char *buffer, int length) +{ + union i2c_smbus_data data; + int i; + + if (length > 32) + length = 32; + data.block[0] = length; + if (i2c_dev_smbus_access(file, I2C_SMBUS_READ, command, + length == 32 ? I2C_SMBUS_I2C_BLOCK_BROKEN : + I2C_SMBUS_I2C_BLOCK_DATA, &data)) + return -1; + else{ + for (i = 1; i <= data.block[0]; i++) + buffer[i - 1] = data.block[i]; + } + return 0; +} + +/* first byte of rdata is length of result */ +int +i2c_block_read(int bus, uint8_t addr, uint8_t offset, int size, + unsigned char *rdata, uint32_t flags) +{ + int fd; + int force = I2C_SLAVE, rv; + + fd = onlp_i2c_open(bus, addr, flags); + + if(fd < 0) { + return fd; + } + + fd = onlp_file_open(O_RDWR, 1, "/dev/i2c-%d", bus); + if(fd < 0) { + AIM_LOG_MSG("/dev/i2c-%d open Error!", bus); + return fd; + } + + /* Set SLAVE or SLAVE_FORCE address */ + rv = ioctl(fd, + force ? I2C_SLAVE_FORCE : I2C_SLAVE, + addr); + + if(rv == -1) { + AIM_LOG_ERROR("i2c-%d: %s slave address 0x%x failed: %{errno}", + bus, + (flags & ONLP_I2C_F_FORCE) ? "forcing" : "setting", + addr, + errno); + goto error; + } + + if ((i2c_dev_read_block(fd, offset, rdata, size)) < 0) + { + printf("/dev/i2c-%d read Error!\n", bus); + close (fd); + return -1; + } + + close(fd); + return 0; + + error: + close(fd); + return -1; +} + diff --git a/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/builds/src/x86_64_quanta_ly9_rangeley/module/src/make.mk b/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/builds/src/x86_64_quanta_ly9_rangeley/module/src/make.mk new file mode 100755 index 00000000..28db51d4 --- /dev/null +++ b/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/builds/src/x86_64_quanta_ly9_rangeley/module/src/make.mk @@ -0,0 +1,9 @@ +############################################################################### +# +# +# +############################################################################### + +LIBRARY := x86_64_quanta_ly9_rangeley +$(LIBRARY)_SUBDIR := $(dir $(lastword $(MAKEFILE_LIST))) +include $(BUILDER)/lib.mk diff --git a/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/builds/src/x86_64_quanta_ly9_rangeley/module/src/psui.c b/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/builds/src/x86_64_quanta_ly9_rangeley/module/src/psui.c new file mode 100755 index 00000000..a1402396 --- /dev/null +++ b/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/builds/src/x86_64_quanta_ly9_rangeley/module/src/psui.c @@ -0,0 +1,126 @@ +/************************************************************ + * + * + ************************************************************ + * + * + * + ***********************************************************/ +#include +#include +#include +#include +#include +#include +#include +#include "x86_64_quanta_ly9_rangeley_int.h" +#include "x86_64_quanta_ly9_rangeley_log.h" + +struct psu_info_s psu_info[] = { + {}, /* Not used */ + { .path = "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-24/24-006f", .present = PSU_GPIO_PSU1_PRSNT_N, .busno = 24, .addr = 0x6f}, + { .path = "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-25/25-0069", .present = PSU_GPIO_PSU2_PRSNT_N, .busno = 25, .addr = 0x69}, +}; + +int +onlp_psui_init(void) +{ + return 0; +} + +static onlp_psu_info_t psus__[] = { + { }, /* Not used */ + { + { + PSU_OID_PSU1, + "Quanta LY9 RPSU-1", + 0, + { + FAN_OID_FAN9, + }, + } + }, + { + { + PSU_OID_PSU2, + "Quanta LY9 RPSU-2", + 0, + { + FAN_OID_FAN10, + }, + } + }, +}; + +#define PMBUS_MFR_MODEL 0x9A +#define PMBUS_MFR_SERIAL 0x9E +#define PMBUS_MFR_MODEL_LEN 20 +#define PMBUS_MFR_SERIAL_LEN 19 + +int +onlp_psui_info_get(onlp_oid_t id, onlp_psu_info_t* info) +{ + int rv; + int pid = ONLP_OID_ID_GET(id); + *info = psus__[pid]; + const char* dir = psu_info[pid].path; + uint8_t buffer[ONLP_CONFIG_INFO_STR_MAX]; + int value = -1; + + rv = pca953x_gpio_value_get(psu_info[pid].present, &value); + if(rv < 0) { + return rv; + } + else if(value == GPIO_HIGH) { + info->status &= ~1; + return 0; + } + + if(onlp_file_read_int(&info->mvin, "%s/in1_input", dir) == 0 && info->mvin >= 0) { + info->caps |= ONLP_PSU_CAPS_VIN; + } + + /* PSU is present and powered. */ + info->status |= 1; + + memset(buffer, 0, sizeof(buffer)); + rv = i2c_block_read(psu_info[pid].busno, psu_info[pid].addr, PMBUS_MFR_MODEL, PMBUS_MFR_MODEL_LEN, buffer, ONLP_I2C_F_FORCE); + buffer[buffer[0] + 1] = 0x00; + if(rv >= 0) + strncpy(info->model, (char *) (buffer+1), (buffer[0] + 1)); + else + strcpy(info->model, "Missing"); + + memset(buffer, 0, sizeof(buffer)); + rv = i2c_block_read(psu_info[pid].busno, psu_info[pid].addr, PMBUS_MFR_SERIAL, PMBUS_MFR_SERIAL_LEN, buffer, ONLP_I2C_F_FORCE); + buffer[buffer[0] + 1] = 0x00; + if(rv >= 0) + strncpy(info->serial, (char *) (buffer+1), (buffer[0] + 1)); + else + strcpy(info->serial, "Missing"); + + info->caps |= ONLP_PSU_CAPS_AC; + + if(onlp_file_read_int(&info->miin, "%s/curr1_input", dir) == 0 && info->miin >= 0) { + info->caps |= ONLP_PSU_CAPS_IIN; + } + if(onlp_file_read_int(&info->miout, "%s/curr2_input", dir) == 0 && info->miout >= 0) { + info->caps |= ONLP_PSU_CAPS_IOUT; + } + if(onlp_file_read_int(&info->mvout, "%s/in2_input", dir) == 0 && info->mvout >= 0) { + info->caps |= ONLP_PSU_CAPS_VOUT; + /* Empirical */ + info->mvout /= 500; + } + if(onlp_file_read_int(&info->mpin, "%s/power1_input", dir) == 0 && info->mpin >= 0) { + info->caps |= ONLP_PSU_CAPS_PIN; + /* The pmbus driver reports power in micro-units */ + info->mpin /= 1000; + } + if(onlp_file_read_int(&info->mpout, "%s/power2_input", dir) == 0 && info->mpout >= 0) { + info->caps |= ONLP_PSU_CAPS_POUT; + /* the pmbus driver reports power in micro-units */ + info->mpout /= 1000; + } + return ONLP_STATUS_OK; +} diff --git a/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/builds/src/x86_64_quanta_ly9_rangeley/module/src/sfpi.c b/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/builds/src/x86_64_quanta_ly9_rangeley/module/src/sfpi.c new file mode 100755 index 00000000..2e667c1d --- /dev/null +++ b/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/builds/src/x86_64_quanta_ly9_rangeley/module/src/sfpi.c @@ -0,0 +1,178 @@ +/************************************************************ + * + * + * Copyright 2014 Big Switch Networks, Inc. + * + * Licensed under the Eclipse Public License, Version 1.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.eclipse.org/legal/epl-v10.html + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, + * either express or implied. See the License for the specific + * language governing permissions and limitations under the + * License. + * + * + ************************************************************ + * + * SFPI Interface for the Quanta LY9 + * + ***********************************************************/ +#include +#include +#include +#include +#include "x86_64_quanta_ly9_rangeley_log.h" + +#include +#include + +#include + +/** + * This table maps the presence gpio, reset gpio, and eeprom file + * for each SFP port. + */ +typedef struct sfpmap_s { + int port; + const char* present_cpld; + const char* reset_gpio; + const char* eeprom; + const char* dom; +} sfpmap_t; + +static sfpmap_t sfpmap__[] = + { + { 49, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/0-003a/cpld-qsfp/port-1/module_present", NULL, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-21/i2c-32/32-0050/eeprom", NULL }, + { 50, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/0-003a/cpld-qsfp/port-2/module_present", NULL, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-21/i2c-33/33-0050/eeprom", NULL }, + { 51, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/0-003a/cpld-qsfp/port-3/module_present", NULL, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-21/i2c-34/34-0050/eeprom", NULL }, + { 52, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/0-003a/cpld-qsfp/port-4/module_present", NULL, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-21/i2c-35/35-0050/eeprom", NULL }, + }; + +typedef struct qsfpmap_s { + int port; + int present_gpio; + const char* reset_gpio; + const char* eeprom; + const char* dom; +} qsfpmap_t; + +static qsfpmap_t qsfpmap__[] = + { + { 53, QSFP_QDB_GPIO_PRSNT_53_N, NULL, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-23/i2c-48/48-0050/eeprom", NULL }, + { 54, QSFP_QDB_GPIO_PRSNT_54_N, NULL, "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-23/i2c-49/49-0050/eeprom", NULL }, + }; + +int +onlp_sfpi_init(void) +{ + int value = -1, ret; + ret = pca953x_gpio_value_get(QSFP_EN_GPIO_P3V3_PW_EN, &value); + if(ret == ONLP_STATUS_OK && value != GPIO_LOW) { + ret = pca953x_gpio_value_set(QSFP_EN_GPIO_P3V3_PW_EN, GPIO_LOW); + } + if(ret == ONLP_STATUS_OK) { + ret = pca953x_gpio_value_get(QSFP_QDB_GPIO_MOD_EN_N, &value); + if(ret == ONLP_STATUS_OK && value != GPIO_LOW) { + ret = pca953x_gpio_value_set(QSFP_QDB_GPIO_MOD_EN_N, GPIO_LOW); + } + } + + + return ret; +} + +int +onlp_sfpi_bitmap_get(onlp_sfp_bitmap_t* bmap) +{ + int p; + + for(p = 49; p < 55; p++) { + AIM_BITMAP_SET(bmap, p); + } + + return ONLP_STATUS_OK; +} + +#define SFP_GET(_port) (sfpmap__ + _port - 49) +#define QSFP_GET(_port) (qsfpmap__ + _port - 53) + +int +onlp_sfpi_is_present(int port) +{ + + if(port > 52){ + int value = 0; + qsfpmap_t* qsfp = QSFP_GET(port); + + if(qsfp->present_gpio > 0) { + if(pca953x_gpio_value_get(qsfp->present_gpio, &value) == ONLP_STATUS_OK) + return (value == GPIO_LOW); + else + return ONLP_STATUS_E_MISSING; + } + else { + /** + * If we can open and read a byte from the EEPROM file + * then we consider it present. + */ + int fd = open(qsfp->eeprom, O_RDONLY); + if (fd < 0) { + /* Not Present */ + return 0; + } + int rv; + uint8_t byte; + + if(read(fd, &byte, 1) == 1) { + /* Present */ + rv = 1; + } + else { + /* No Present */ + rv = 0; + } + close(fd); + return rv; + } + } + else{ + sfpmap_t* sfp = SFP_GET(port); + + return onlplib_sfp_is_present_file(sfp->present_cpld, /* Present */ "1\n", /* Absent */ "0\n"); + } +} + +int +onlp_sfpi_eeprom_read(int port, uint8_t data[256]) +{ + + if(port > 52){ + qsfpmap_t* qsfp = QSFP_GET(port); + + return onlplib_sfp_eeprom_read_file(qsfp->eeprom, data); + } + else{ + sfpmap_t* sfp = SFP_GET(port); + + return onlplib_sfp_eeprom_read_file(sfp->eeprom, data); + } +} + +int +onlp_sfpi_dom_read(int port, uint8_t data[256]) +{ + if(port > 52){ + qsfpmap_t* qsfp = QSFP_GET(port); + return onlplib_sfp_eeprom_read_file(qsfp->dom, data); + } + else{ + sfpmap_t* sfp = SFP_GET(port); + return onlplib_sfp_eeprom_read_file(sfp->dom, data); + } +} + diff --git a/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/builds/src/x86_64_quanta_ly9_rangeley/module/src/sysi.c b/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/builds/src/x86_64_quanta_ly9_rangeley/module/src/sysi.c new file mode 100755 index 00000000..2c648422 --- /dev/null +++ b/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/builds/src/x86_64_quanta_ly9_rangeley/module/src/sysi.c @@ -0,0 +1,79 @@ +/************************************************************ + * + * + ************************************************************ + * + * + * + ***********************************************************/ +#include +#include "x86_64_quanta_ly9_rangeley_int.h" +#include "x86_64_quanta_ly9_rangeley_log.h" +#include + +const char* +onlp_sysi_platform_get(void) +{ + return "x86-64-quanta-ly9-rangeley-r0"; +} + +int +onlp_sysi_init(void) +{ + return ONLP_STATUS_OK; +} + +#define QUANTA_SYS_EEPROM_PATH \ +"/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/i2c-27/27-0054/eeprom" + +int +onlp_sysi_onie_info_get(onlp_onie_info_t* onie) +{ + int rv; + + rv = onlp_onie_decode_file(onie, QUANTA_SYS_EEPROM_PATH); + if(rv >= 0) { + onie->platform_name = aim_strdup("x86-64-quanta-ly9-rangeley-r0"); + rv = quanta_onie_sys_eeprom_custom_format(onie); + } + return rv; +} + +int +onlp_sysi_oids_get(onlp_oid_t* table, int max) +{ + onlp_oid_t* e = table; + memset(table, 0, max*sizeof(onlp_oid_t)); + + + /* + * 6 Chassis Thermal Sensors + */ + *e++ = THERMAL_OID_THERMAL1; + *e++ = THERMAL_OID_THERMAL2; + *e++ = THERMAL_OID_THERMAL3; + *e++ = THERMAL_OID_THERMAL4; + *e++ = THERMAL_OID_THERMAL5; + *e++ = THERMAL_OID_THERMAL6; + + /* + * 6 Fans + */ + *e++ = FAN_OID_FAN1; + *e++ = FAN_OID_FAN2; + *e++ = FAN_OID_FAN3; + *e++ = FAN_OID_FAN5; + *e++ = FAN_OID_FAN6; + *e++ = FAN_OID_FAN7; + + /* + * 2 PSUs + */ + *e++ = PSU_OID_PSU1; + *e++ = PSU_OID_PSU2; + + /* + * Todo - LEDs + */ + return 0; +} diff --git a/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/builds/src/x86_64_quanta_ly9_rangeley/module/src/thermali.c b/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/builds/src/x86_64_quanta_ly9_rangeley/module/src/thermali.c new file mode 100755 index 00000000..3a701296 --- /dev/null +++ b/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/builds/src/x86_64_quanta_ly9_rangeley/module/src/thermali.c @@ -0,0 +1,145 @@ +/************************************************************ + * + * + * Copyright 2014 Big Switch Networks, Inc. + * + * Licensed under the Eclipse Public License, Version 1.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.eclipse.org/legal/epl-v10.html + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, + * either express or implied. See the License for the specific + * language governing permissions and limitations under the + * License. + * + * + ************************************************************ + * + * + * + ***********************************************************/ +#include +#include +#include "x86_64_quanta_ly9_rangeley_int.h" +#include "x86_64_quanta_ly9_rangeley_log.h" + +int +onlp_thermali_init(void) +{ + return ONLP_STATUS_OK; +} + +static int +sys_thermal_info_get__(onlp_thermal_info_t* info, int id) +{ + int rv; + + rv = onlp_file_read_int(&info->mcelsius, + SYS_HWMON_PREFIX "/temp%d_input", id); + + if(rv == ONLP_STATUS_E_INTERNAL) { + return rv; + } + + if(rv == ONLP_STATUS_E_MISSING) { + info->status &= ~1; + return 0; + } + + return ONLP_STATUS_OK; +} + +static int +psu_thermal_info_get__(onlp_thermal_info_t* info, int pid, int id) +{ + /* THERMAL6 -> PSU1 */ + /* THERMAL7 -> PSU2 */ + extern struct psu_info_s psu_info[]; + char* dir = psu_info[pid].path; + info->status |= 1; + return onlp_file_read_int(&info->mcelsius, "%s/temp%d_input", dir, id); +} + +int +onlp_thermali_info_get(onlp_oid_t id, onlp_thermal_info_t* rv) +{ + int tid = ONLP_OID_ID_GET(id); + + static onlp_thermal_info_t info[] = { + { }, /* Not used */ + { { ONLP_THERMAL_ID_CREATE(1), "Chassis Thermal 1", 0}, ONLP_THERMAL_STATUS_PRESENT, + ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS + }, + { { ONLP_THERMAL_ID_CREATE(2), "Chassis Thermal 2", 0}, ONLP_THERMAL_STATUS_PRESENT, + ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS + }, + { { ONLP_THERMAL_ID_CREATE(3), "Chassis Thermal 3", 0}, ONLP_THERMAL_STATUS_PRESENT, + ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS + }, + { { ONLP_THERMAL_ID_CREATE(4), "Chassis Thermal 4", 0}, ONLP_THERMAL_STATUS_PRESENT, + ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS + }, + { { ONLP_THERMAL_ID_CREATE(5), "Chassis Thermal 5", 0}, ONLP_THERMAL_STATUS_PRESENT, + ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS + }, + { { ONLP_THERMAL_ID_CREATE(6), "Chassis Thermal 6", 0}, ONLP_THERMAL_STATUS_PRESENT, + ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS + }, + { { ONLP_THERMAL_ID_CREATE(7), "Chassis Thermal 7", 0}, ONLP_THERMAL_STATUS_PRESENT, + ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS + }, + { { ONLP_THERMAL_ID_CREATE(8), "Chassis Thermal 8", 0}, ONLP_THERMAL_STATUS_PRESENT, + ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS + }, + { { ONLP_THERMAL_ID_CREATE(9), "Chassis Thermal 9", 0}, ONLP_THERMAL_STATUS_PRESENT, + ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS + }, + { { ONLP_THERMAL_ID_CREATE(10), "Chassis Thermal 10", 0}, ONLP_THERMAL_STATUS_PRESENT, + ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS + }, + + { { ONLP_THERMAL_ID_CREATE(11), "PSU-1 Thermal 1", 0 } }, + { { ONLP_THERMAL_ID_CREATE(12), "PSU-1 Thermal 2", 0 } }, + { { ONLP_THERMAL_ID_CREATE(13), "PSU-1 Thermal 3", 0 } }, + + { { ONLP_THERMAL_ID_CREATE(14), "PSU-2 Thermal 1", 0 } }, + { { ONLP_THERMAL_ID_CREATE(15), "PSU-2 Thermal 2", 0 } }, + { { ONLP_THERMAL_ID_CREATE(16), "PSU-2 Thermal 3", 0 } }, + }; + + *rv = info[tid]; + rv->caps |= ONLP_THERMAL_CAPS_GET_TEMPERATURE; + + switch(tid) + { + case THERMAL_ID_THERMAL1: + case THERMAL_ID_THERMAL2: + case THERMAL_ID_THERMAL3: + case THERMAL_ID_THERMAL4: + case THERMAL_ID_THERMAL5: + case THERMAL_ID_THERMAL6: + case THERMAL_ID_THERMAL7: + case THERMAL_ID_THERMAL8: + case THERMAL_ID_THERMAL9: + case THERMAL_ID_THERMAL10: + return sys_thermal_info_get__(rv, tid); + + case THERMAL_ID_THERMAL11: + case THERMAL_ID_THERMAL12: + case THERMAL_ID_THERMAL13: + return psu_thermal_info_get__(rv, 1, tid - THERMAL_ID_THERMAL11 + 1); + + + case THERMAL_ID_THERMAL14: + case THERMAL_ID_THERMAL15: + case THERMAL_ID_THERMAL16: + return psu_thermal_info_get__(rv, 2, tid - THERMAL_ID_THERMAL14 + 1); + + } + + return ONLP_STATUS_E_INVALID; +} diff --git a/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/builds/src/x86_64_quanta_ly9_rangeley/module/src/x86_64_quanta_ly9_rangeley_config.c b/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/builds/src/x86_64_quanta_ly9_rangeley/module/src/x86_64_quanta_ly9_rangeley_config.c new file mode 100755 index 00000000..246a95a2 --- /dev/null +++ b/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/builds/src/x86_64_quanta_ly9_rangeley/module/src/x86_64_quanta_ly9_rangeley_config.c @@ -0,0 +1,95 @@ +/**************************************************************************//** + * + * + * + *****************************************************************************/ +#include + +/* */ +#define __x86_64_quanta_ly9_rangeley_config_STRINGIFY_NAME(_x) #_x +#define __x86_64_quanta_ly9_rangeley_config_STRINGIFY_VALUE(_x) __x86_64_quanta_ly9_rangeley_config_STRINGIFY_NAME(_x) +x86_64_quanta_ly9_rangeley_config_settings_t x86_64_quanta_ly9_rangeley_config_settings[] = +{ +#ifdef X86_64_QUANTA_LY9_RANGELEY_CONFIG_INCLUDE_LOGGING + { __x86_64_quanta_ly9_rangeley_config_STRINGIFY_NAME(X86_64_QUANTA_LY9_RANGELEY_CONFIG_INCLUDE_LOGGING), __x86_64_quanta_ly9_rangeley_config_STRINGIFY_VALUE(X86_64_QUANTA_LY9_RANGELEY_CONFIG_INCLUDE_LOGGING) }, +#else +{ X86_64_QUANTA_LY9_RANGELEY_CONFIG_INCLUDE_LOGGING(__x86_64_quanta_ly9_rangeley_config_STRINGIFY_NAME), "__undefined__" }, +#endif +#ifdef X86_64_QUANTA_LY9_RANGELEY_CONFIG_LOG_OPTIONS_DEFAULT + { __x86_64_quanta_ly9_rangeley_config_STRINGIFY_NAME(X86_64_QUANTA_LY9_RANGELEY_CONFIG_LOG_OPTIONS_DEFAULT), __x86_64_quanta_ly9_rangeley_config_STRINGIFY_VALUE(X86_64_QUANTA_LY9_RANGELEY_CONFIG_LOG_OPTIONS_DEFAULT) }, +#else +{ X86_64_QUANTA_LY9_RANGELEY_CONFIG_LOG_OPTIONS_DEFAULT(__x86_64_quanta_ly9_rangeley_config_STRINGIFY_NAME), "__undefined__" }, +#endif +#ifdef X86_64_QUANTA_LY9_RANGELEY_CONFIG_LOG_BITS_DEFAULT + { __x86_64_quanta_ly9_rangeley_config_STRINGIFY_NAME(X86_64_QUANTA_LY9_RANGELEY_CONFIG_LOG_BITS_DEFAULT), __x86_64_quanta_ly9_rangeley_config_STRINGIFY_VALUE(X86_64_QUANTA_LY9_RANGELEY_CONFIG_LOG_BITS_DEFAULT) }, +#else +{ X86_64_QUANTA_LY9_RANGELEY_CONFIG_LOG_BITS_DEFAULT(__x86_64_quanta_ly9_rangeley_config_STRINGIFY_NAME), "__undefined__" }, +#endif +#ifdef X86_64_QUANTA_LY9_RANGELEY_CONFIG_LOG_CUSTOM_BITS_DEFAULT + { __x86_64_quanta_ly9_rangeley_config_STRINGIFY_NAME(X86_64_QUANTA_LY9_RANGELEY_CONFIG_LOG_CUSTOM_BITS_DEFAULT), __x86_64_quanta_ly9_rangeley_config_STRINGIFY_VALUE(X86_64_QUANTA_LY9_RANGELEY_CONFIG_LOG_CUSTOM_BITS_DEFAULT) }, +#else +{ X86_64_QUANTA_LY9_RANGELEY_CONFIG_LOG_CUSTOM_BITS_DEFAULT(__x86_64_quanta_ly9_rangeley_config_STRINGIFY_NAME), "__undefined__" }, +#endif +#ifdef X86_64_QUANTA_LY9_RANGELEY_CONFIG_PORTING_STDLIB + { __x86_64_quanta_ly9_rangeley_config_STRINGIFY_NAME(X86_64_QUANTA_LY9_RANGELEY_CONFIG_PORTING_STDLIB), __x86_64_quanta_ly9_rangeley_config_STRINGIFY_VALUE(X86_64_QUANTA_LY9_RANGELEY_CONFIG_PORTING_STDLIB) }, +#else +{ X86_64_QUANTA_LY9_RANGELEY_CONFIG_PORTING_STDLIB(__x86_64_quanta_ly9_rangeley_config_STRINGIFY_NAME), "__undefined__" }, +#endif +#ifdef X86_64_QUANTA_LY9_RANGELEY_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS + { __x86_64_quanta_ly9_rangeley_config_STRINGIFY_NAME(X86_64_QUANTA_LY9_RANGELEY_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS), __x86_64_quanta_ly9_rangeley_config_STRINGIFY_VALUE(X86_64_QUANTA_LY9_RANGELEY_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS) }, +#else +{ X86_64_QUANTA_LY9_RANGELEY_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS(__x86_64_quanta_ly9_rangeley_config_STRINGIFY_NAME), "__undefined__" }, +#endif +#ifdef X86_64_QUANTA_LY9_RANGELEY_CONFIG_INCLUDE_UCLI + { __x86_64_quanta_ly9_rangeley_config_STRINGIFY_NAME(X86_64_QUANTA_LY9_RANGELEY_CONFIG_INCLUDE_UCLI), __x86_64_quanta_ly9_rangeley_config_STRINGIFY_VALUE(X86_64_QUANTA_LY9_RANGELEY_CONFIG_INCLUDE_UCLI) }, +#else +{ X86_64_QUANTA_LY9_RANGELEY_CONFIG_INCLUDE_UCLI(__x86_64_quanta_ly9_rangeley_config_STRINGIFY_NAME), "__undefined__" }, +#endif +#ifdef X86_64_QUANTA_LY9_RANGELEY_CONFIG_SYSFAN_RPM_FAILURE_THRESHOLD + { __x86_64_quanta_ly9_rangeley_config_STRINGIFY_NAME(X86_64_QUANTA_LY9_RANGELEY_CONFIG_SYSFAN_RPM_FAILURE_THRESHOLD), __x86_64_quanta_ly9_rangeley_config_STRINGIFY_VALUE(X86_64_QUANTA_LY9_RANGELEY_CONFIG_SYSFAN_RPM_FAILURE_THRESHOLD) }, +#else +{ X86_64_QUANTA_LY9_RANGELEY_CONFIG_SYSFAN_RPM_FAILURE_THRESHOLD(__x86_64_quanta_ly9_rangeley_config_STRINGIFY_NAME), "__undefined__" }, +#endif +#ifdef X86_64_QUANTA_LY9_RANGELEY_CONFIG_SYSFAN_F2B_RPM_MAX + { __x86_64_quanta_ly9_rangeley_config_STRINGIFY_NAME(X86_64_QUANTA_LY9_RANGELEY_CONFIG_SYSFAN_F2B_RPM_MAX), __x86_64_quanta_ly9_rangeley_config_STRINGIFY_VALUE(X86_64_QUANTA_LY9_RANGELEY_CONFIG_SYSFAN_F2B_RPM_MAX) }, +#else +{ X86_64_QUANTA_LY9_RANGELEY_CONFIG_SYSFAN_F2B_RPM_MAX(__x86_64_quanta_ly9_rangeley_config_STRINGIFY_NAME), "__undefined__" }, +#endif +#ifdef X86_64_QUANTA_LY9_RANGELEY_CONFIG_SYSFAN_B2F_RPM_MAX + { __x86_64_quanta_ly9_rangeley_config_STRINGIFY_NAME(X86_64_QUANTA_LY9_RANGELEY_CONFIG_SYSFAN_B2F_RPM_MAX), __x86_64_quanta_ly9_rangeley_config_STRINGIFY_VALUE(X86_64_QUANTA_LY9_RANGELEY_CONFIG_SYSFAN_B2F_RPM_MAX) }, +#else +{ X86_64_QUANTA_LY9_RANGELEY_CONFIG_SYSFAN_B2F_RPM_MAX(__x86_64_quanta_ly9_rangeley_config_STRINGIFY_NAME), "__undefined__" }, +#endif +#ifdef X86_64_QUANTA_LY9_RANGELEY_CONFIG_PHY_RESET_DELAY_MS + { __x86_64_quanta_ly9_rangeley_config_STRINGIFY_NAME(X86_64_QUANTA_LY9_RANGELEY_CONFIG_PHY_RESET_DELAY_MS), __x86_64_quanta_ly9_rangeley_config_STRINGIFY_VALUE(X86_64_QUANTA_LY9_RANGELEY_CONFIG_PHY_RESET_DELAY_MS) }, +#else +{ X86_64_QUANTA_LY9_RANGELEY_CONFIG_PHY_RESET_DELAY_MS(__x86_64_quanta_ly9_rangeley_config_STRINGIFY_NAME), "__undefined__" }, +#endif + { NULL, NULL } +}; +#undef __x86_64_quanta_ly9_rangeley_config_STRINGIFY_VALUE +#undef __x86_64_quanta_ly9_rangeley_config_STRINGIFY_NAME + +const char* +x86_64_quanta_ly9_rangeley_config_lookup(const char* setting) +{ + int i; + for(i = 0; x86_64_quanta_ly9_rangeley_config_settings[i].name; i++) { + if(strcmp(x86_64_quanta_ly9_rangeley_config_settings[i].name, setting)) { + return x86_64_quanta_ly9_rangeley_config_settings[i].value; + } + } + return NULL; +} + +int +x86_64_quanta_ly9_rangeley_config_show(struct aim_pvs_s* pvs) +{ + int i; + for(i = 0; x86_64_quanta_ly9_rangeley_config_settings[i].name; i++) { + aim_printf(pvs, "%s = %s\n", x86_64_quanta_ly9_rangeley_config_settings[i].name, x86_64_quanta_ly9_rangeley_config_settings[i].value); + } + return i; +} + +/* */ diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/module/src/x86_64_cel_redstone_xp_enums.c b/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/builds/src/x86_64_quanta_ly9_rangeley/module/src/x86_64_quanta_ly9_rangeley_enums.c old mode 100644 new mode 100755 similarity index 76% rename from packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/module/src/x86_64_cel_redstone_xp_enums.c rename to packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/builds/src/x86_64_quanta_ly9_rangeley/module/src/x86_64_quanta_ly9_rangeley_enums.c index 9562b328..a9eaec50 --- a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/module/src/x86_64_cel_redstone_xp_enums.c +++ b/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/builds/src/x86_64_quanta_ly9_rangeley/module/src/x86_64_quanta_ly9_rangeley_enums.c @@ -3,7 +3,7 @@ * * *****************************************************************************/ -#include +#include /* <--auto.start.enum(ALL).source> */ /* */ diff --git a/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/builds/src/x86_64_quanta_ly9_rangeley/module/src/x86_64_quanta_ly9_rangeley_int.h b/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/builds/src/x86_64_quanta_ly9_rangeley/module/src/x86_64_quanta_ly9_rangeley_int.h new file mode 100755 index 00000000..163367e8 --- /dev/null +++ b/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/builds/src/x86_64_quanta_ly9_rangeley/module/src/x86_64_quanta_ly9_rangeley_int.h @@ -0,0 +1,231 @@ +/**************************************************************************//** + * + * x86_64_quanta_ly9_rangeley Internal Header + * + *****************************************************************************/ +#ifndef __X86_64_QUANTA_LY9_RANGELEY_INT_H__ +#define __X86_64_QUANTA_LY9_RANGELEY_INT_H__ + +#include +#include + +/* */ +/** thermal_oid */ +typedef enum thermal_oid_e { + THERMAL_OID_THERMAL1 = ONLP_THERMAL_ID_CREATE(1), + THERMAL_OID_THERMAL2 = ONLP_THERMAL_ID_CREATE(2), + THERMAL_OID_THERMAL3 = ONLP_THERMAL_ID_CREATE(3), + THERMAL_OID_THERMAL4 = ONLP_THERMAL_ID_CREATE(4), + THERMAL_OID_THERMAL5 = ONLP_THERMAL_ID_CREATE(5), + THERMAL_OID_THERMAL6 = ONLP_THERMAL_ID_CREATE(6), + THERMAL_OID_THERMAL7 = ONLP_THERMAL_ID_CREATE(7), + THERMAL_OID_THERMAL8 = ONLP_THERMAL_ID_CREATE(8), + THERMAL_OID_THERMAL9 = ONLP_THERMAL_ID_CREATE(9), + THERMAL_OID_THERMAL10 = ONLP_THERMAL_ID_CREATE(10), + THERMAL_OID_THERMAL11 = ONLP_THERMAL_ID_CREATE(11), + THERMAL_OID_THERMAL12 = ONLP_THERMAL_ID_CREATE(12), + THERMAL_OID_THERMAL13 = ONLP_THERMAL_ID_CREATE(13), + THERMAL_OID_THERMAL14 = ONLP_THERMAL_ID_CREATE(14), + THERMAL_OID_THERMAL15 = ONLP_THERMAL_ID_CREATE(15), + THERMAL_OID_THERMAL16 = ONLP_THERMAL_ID_CREATE(16), +} thermal_oid_t; + +/** Enum names. */ +const char* thermal_oid_name(thermal_oid_t e); + +/** Enum values. */ +int thermal_oid_value(const char* str, thermal_oid_t* e, int substr); + +/** Enum descriptions. */ +const char* thermal_oid_desc(thermal_oid_t e); + +/** Enum validator. */ +int thermal_oid_valid(thermal_oid_t e); + +/** validator */ +#define THERMAL_OID_VALID(_e) \ + (thermal_oid_valid((_e))) + +/** thermal_oid_map table. */ +extern aim_map_si_t thermal_oid_map[]; +/** thermal_oid_desc_map table. */ +extern aim_map_si_t thermal_oid_desc_map[]; + +/** psu_oid */ +typedef enum psu_oid_e { + PSU_OID_PSU1 = ONLP_PSU_ID_CREATE(1), + PSU_OID_PSU2 = ONLP_PSU_ID_CREATE(2), +} psu_oid_t; + +/** Enum names. */ +const char* psu_oid_name(psu_oid_t e); + +/** Enum values. */ +int psu_oid_value(const char* str, psu_oid_t* e, int substr); + +/** Enum descriptions. */ +const char* psu_oid_desc(psu_oid_t e); + +/** Enum validator. */ +int psu_oid_valid(psu_oid_t e); + +/** validator */ +#define PSU_OID_VALID(_e) \ + (psu_oid_valid((_e))) + +/** psu_oid_map table. */ +extern aim_map_si_t psu_oid_map[]; +/** psu_oid_desc_map table. */ +extern aim_map_si_t psu_oid_desc_map[]; + +/** thermal_id */ +typedef enum thermal_id_e { + THERMAL_ID_THERMAL1 = 1, + THERMAL_ID_THERMAL2 = 2, + THERMAL_ID_THERMAL3 = 3, + THERMAL_ID_THERMAL4 = 4, + THERMAL_ID_THERMAL5 = 5, + THERMAL_ID_THERMAL6 = 6, + THERMAL_ID_THERMAL7 = 7, + THERMAL_ID_THERMAL8 = 8, + THERMAL_ID_THERMAL9 = 9, + THERMAL_ID_THERMAL10 = 10, + THERMAL_ID_THERMAL11 = 11, + THERMAL_ID_THERMAL12 = 12, + THERMAL_ID_THERMAL13 = 13, + THERMAL_ID_THERMAL14 = 14, + THERMAL_ID_THERMAL15 = 15, + THERMAL_ID_THERMAL16 = 16, +} thermal_id_t; + +/** Enum names. */ +const char* thermal_id_name(thermal_id_t e); + +/** Enum values. */ +int thermal_id_value(const char* str, thermal_id_t* e, int substr); + +/** Enum descriptions. */ +const char* thermal_id_desc(thermal_id_t e); + +/** Enum validator. */ +int thermal_id_valid(thermal_id_t e); + +/** validator */ +#define THERMAL_ID_VALID(_e) \ + (thermal_id_valid((_e))) + +/** thermal_id_map table. */ +extern aim_map_si_t thermal_id_map[]; +/** thermal_id_desc_map table. */ +extern aim_map_si_t thermal_id_desc_map[]; + +/** fan_id */ +typedef enum fan_id_e { + FAN_ID_FAN1 = 1, + FAN_ID_FAN2 = 2, + FAN_ID_FAN3 = 3, + FAN_ID_FAN4 = 4, + FAN_ID_FAN5 = 5, + FAN_ID_FAN6 = 6, + FAN_ID_FAN7 = 7, + FAN_ID_FAN8 = 8, + FAN_ID_FAN9 = 9, + FAN_ID_FAN10 = 10, +} fan_id_t; + +/** Enum names. */ +const char* fan_id_name(fan_id_t e); + +/** Enum values. */ +int fan_id_value(const char* str, fan_id_t* e, int substr); + +/** Enum descriptions. */ +const char* fan_id_desc(fan_id_t e); + +/** Enum validator. */ +int fan_id_valid(fan_id_t e); + +/** validator */ +#define FAN_ID_VALID(_e) \ + (fan_id_valid((_e))) + +/** fan_id_map table. */ +extern aim_map_si_t fan_id_map[]; +/** fan_id_desc_map table. */ +extern aim_map_si_t fan_id_desc_map[]; + +/** psu_id */ +typedef enum psu_id_e { + PSU_ID_PSU1 = 1, + PSU_ID_PSU2 = 2, +} psu_id_t; + +/** Enum names. */ +const char* psu_id_name(psu_id_t e); + +/** Enum values. */ +int psu_id_value(const char* str, psu_id_t* e, int substr); + +/** Enum descriptions. */ +const char* psu_id_desc(psu_id_t e); + +/** Enum validator. */ +int psu_id_valid(psu_id_t e); + +/** validator */ +#define PSU_ID_VALID(_e) \ + (psu_id_valid((_e))) + +/** psu_id_map table. */ +extern aim_map_si_t psu_id_map[]; +/** psu_id_desc_map table. */ +extern aim_map_si_t psu_id_desc_map[]; + +/** fan_oid */ +typedef enum fan_oid_e { + FAN_OID_FAN1 = ONLP_FAN_ID_CREATE(1), + FAN_OID_FAN2 = ONLP_FAN_ID_CREATE(2), + FAN_OID_FAN3 = ONLP_FAN_ID_CREATE(3), + FAN_OID_FAN4 = ONLP_FAN_ID_CREATE(4), + FAN_OID_FAN5 = ONLP_FAN_ID_CREATE(5), + FAN_OID_FAN6 = ONLP_FAN_ID_CREATE(6), + FAN_OID_FAN7 = ONLP_FAN_ID_CREATE(7), + FAN_OID_FAN8 = ONLP_FAN_ID_CREATE(8), + FAN_OID_FAN9 = ONLP_FAN_ID_CREATE(9), + FAN_OID_FAN10 = ONLP_FAN_ID_CREATE(10), +} fan_oid_t; + +/** Enum names. */ +const char* fan_oid_name(fan_oid_t e); + +/** Enum values. */ +int fan_oid_value(const char* str, fan_oid_t* e, int substr); + +/** Enum descriptions. */ +const char* fan_oid_desc(fan_oid_t e); + +/** Enum validator. */ +int fan_oid_valid(fan_oid_t e); + +/** validator */ +#define FAN_OID_VALID(_e) \ + (fan_oid_valid((_e))) + +/** fan_oid_map table. */ +extern aim_map_si_t fan_oid_map[]; +/** fan_oid_desc_map table. */ +extern aim_map_si_t fan_oid_desc_map[]; +/* */ + +/* psu info table */ +struct psu_info_s { + char path[PATH_MAX]; + int present; + int busno; + int addr; +}; + + +#define SYS_HWMON_PREFIX "/sys/devices/pci0000:00/0000:00:1f.3/i2c-0/0-004e" + +#endif /* __X86_64_QUANTA_LY9_RANGELEY_INT_H__ */ diff --git a/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/builds/src/x86_64_quanta_ly9_rangeley/module/src/x86_64_quanta_ly9_rangeley_log.c b/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/builds/src/x86_64_quanta_ly9_rangeley/module/src/x86_64_quanta_ly9_rangeley_log.c new file mode 100755 index 00000000..e1dcf3d3 --- /dev/null +++ b/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/builds/src/x86_64_quanta_ly9_rangeley/module/src/x86_64_quanta_ly9_rangeley_log.c @@ -0,0 +1,18 @@ +/**************************************************************************//** + * + * + * + *****************************************************************************/ +#include + +#include "x86_64_quanta_ly9_rangeley_log.h" +/* + * x86_64_quanta_ly9_rangeley log struct. + */ +AIM_LOG_STRUCT_DEFINE( + X86_64_QUANTA_LY9_RANGELEY_CONFIG_LOG_OPTIONS_DEFAULT, + X86_64_QUANTA_LY9_RANGELEY_CONFIG_LOG_BITS_DEFAULT, + NULL, /* Custom log map */ + X86_64_QUANTA_LY9_RANGELEY_CONFIG_LOG_CUSTOM_BITS_DEFAULT + ); + diff --git a/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/builds/src/x86_64_quanta_ly9_rangeley/module/src/x86_64_quanta_ly9_rangeley_log.h b/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/builds/src/x86_64_quanta_ly9_rangeley/module/src/x86_64_quanta_ly9_rangeley_log.h new file mode 100755 index 00000000..8fbe5684 --- /dev/null +++ b/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/builds/src/x86_64_quanta_ly9_rangeley/module/src/x86_64_quanta_ly9_rangeley_log.h @@ -0,0 +1,12 @@ +/**************************************************************************//** + * + * + * + *****************************************************************************/ +#ifndef __X86_64_QUANTA_LY9_RANGELEY_LOG_H__ +#define __X86_64_QUANTA_LY9_RANGELEY_LOG_H__ + +#define AIM_LOG_MODULE_NAME x86_64_quanta_ly9_rangeley +#include + +#endif /* __X86_64_QUANTA_LY9_RANGELEY_LOG_H__ */ diff --git a/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/builds/src/x86_64_quanta_ly9_rangeley/module/src/x86_64_quanta_ly9_rangeley_module.c b/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/builds/src/x86_64_quanta_ly9_rangeley/module/src/x86_64_quanta_ly9_rangeley_module.c new file mode 100755 index 00000000..39839f4e --- /dev/null +++ b/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/builds/src/x86_64_quanta_ly9_rangeley/module/src/x86_64_quanta_ly9_rangeley_module.c @@ -0,0 +1,24 @@ +/**************************************************************************//** + * + * + * + *****************************************************************************/ +#include + +#include "x86_64_quanta_ly9_rangeley_log.h" + +static int +datatypes_init__(void) +{ +#define X86_64_QUANTA_LY9_RANGELEY_ENUMERATION_ENTRY(_enum_name, _desc) AIM_DATATYPE_MAP_REGISTER(_enum_name, _enum_name##_map, _desc, AIM_LOG_INTERNAL); +#include + return 0; +} + +void __x86_64_quanta_ly9_rangeley_module_init__(void) +{ + AIM_LOG_STRUCT_REGISTER(); + datatypes_init__(); +} + +int __onlp_platform_version__ = 1; diff --git a/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/builds/src/x86_64_quanta_ly9_rangeley/module/src/x86_64_quanta_ly9_rangeley_ucli.c b/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/builds/src/x86_64_quanta_ly9_rangeley/module/src/x86_64_quanta_ly9_rangeley_ucli.c new file mode 100755 index 00000000..c308a055 --- /dev/null +++ b/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/onlp/builds/src/x86_64_quanta_ly9_rangeley/module/src/x86_64_quanta_ly9_rangeley_ucli.c @@ -0,0 +1,50 @@ +/**************************************************************************//** + * + * + * + *****************************************************************************/ +#include + +#if X86_64_QUANTA_LY9_RANGELEY_CONFIG_INCLUDE_UCLI == 1 + +#include +#include +#include + +static ucli_status_t +x86_64_quanta_ly9_rangeley_ucli_ucli__config__(ucli_context_t* uc) +{ + UCLI_HANDLER_MACRO_MODULE_CONFIG(x86_64_quanta_ly9_rangeley) +} + +/* */ +/* */ + +static ucli_module_t +x86_64_quanta_ly9_rangeley_ucli_module__ = + { + "x86_64_quanta_ly9_rangeley_ucli", + NULL, + x86_64_quanta_ly9_rangeley_ucli_ucli_handlers__, + NULL, + NULL, + }; + +ucli_node_t* +x86_64_quanta_ly9_rangeley_ucli_node_create(void) +{ + ucli_node_t* n; + ucli_module_init(&x86_64_quanta_ly9_rangeley_ucli_module__); + n = ucli_node_create("x86_64_quanta_ly9_rangeley", NULL, &x86_64_quanta_ly9_rangeley_ucli_module__); + ucli_node_subnode_add(n, ucli_module_log_node_create("x86_64_quanta_ly9_rangeley")); + return n; +} + +#else +void* +x86_64_quanta_ly9_rangeley_ucli_node_create(void) +{ + return NULL; +} +#endif + diff --git a/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/platform-config/Makefile b/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/platform-config/Makefile new file mode 100755 index 00000000..003238cf --- /dev/null +++ b/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/platform-config/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/platform-config/r0/Makefile b/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/platform-config/r0/Makefile new file mode 100755 index 00000000..003238cf --- /dev/null +++ b/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/platform-config/r0/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/platform-config/r0/PKG.yml b/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/platform-config/r0/PKG.yml new file mode 100755 index 00000000..c546783f --- /dev/null +++ b/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/platform-config/r0/PKG.yml @@ -0,0 +1 @@ +!include $ONL_TEMPLATES/platform-config-platform.yml ARCH=amd64 VENDOR=quanta BASENAME=x86-64-quanta-ly9-rangeley REVISION=r0 diff --git a/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/platform-config/r0/src/lib/x86-64-quanta-ly9-rangeley-r0.yml b/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/platform-config/r0/src/lib/x86-64-quanta-ly9-rangeley-r0.yml new file mode 100755 index 00000000..91e301f4 --- /dev/null +++ b/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/platform-config/r0/src/lib/x86-64-quanta-ly9-rangeley-r0.yml @@ -0,0 +1,31 @@ +--- + +###################################################################### +# +# platform-config for LY9 +# +###################################################################### + +x86-64-quanta-ly9-rangeley-r0: + + grub: + + serial: >- + --port=0x2f8 + --speed=115200 + --word=8 + --parity=no + --stop=1 + + kernel: + <<: *kernel-3-16 + + args: >- + console=ttyS1,115200n8 + reboot=c,p + + ##network: + ## interfaces: + ## ma1: + ## name: ~ + ## syspath: pci0000:00/0000:00:14.0 diff --git a/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/platform-config/r0/src/python/x86_64_quanta_ly9_rangeley_r0/__init__.py b/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/platform-config/r0/src/python/x86_64_quanta_ly9_rangeley_r0/__init__.py new file mode 100755 index 00000000..3ce02dfb --- /dev/null +++ b/packages/platforms/quanta/x86-64/x86-64-quanta-ly9-rangeley/platform-config/r0/src/python/x86_64_quanta_ly9_rangeley_r0/__init__.py @@ -0,0 +1,20 @@ +from onl.platform.base import * +from onl.platform.quanta import * + +class OnlPlatform_x86_64_quanta_ly9_rangeley_r0(OnlPlatformQuanta, + OnlPlatformPortConfig_48x10_6x40): + PLATFORM='x86-64-quanta-ly9-rangeley-r0' + MODEL="LY9" + SYS_OBJECT_ID=".9.1" + + def baseconfig(self): + self.insmod("emerson700") + self.insmod("quanta_hwmon") + self.insmod("qci_cpld") + self.insmod("quanta_switch", params=dict(platform="x86-64-quanta-ly9-rangeley")) + + # make ds1339 as default rtc + os.system("ln -snf /dev/rtc1 /dev/rtc") + os.system("hwclock --hctosys") + + return True diff --git a/sm/bigcode b/sm/bigcode index 0b10e643..9a1f1526 160000 --- a/sm/bigcode +++ b/sm/bigcode @@ -1 +1 @@ -Subproject commit 0b10e643e80deb76b9ecb05a707c96818fd376be +Subproject commit 9a1f1526c213fd194d44d1085fdd9a978a65af27 diff --git a/tools/scripts/kmodbuild.sh b/tools/scripts/kmodbuild.sh index 0e5890ec..94f258d8 100755 --- a/tools/scripts/kmodbuild.sh +++ b/tools/scripts/kmodbuild.sh @@ -6,7 +6,7 @@ set -e # # -# build +# build # function build {