From b4158e5ebf84383f72d4bb78e471b4939a2c6441 Mon Sep 17 00:00:00 2001 From: "sam.cc.chang" Date: Fri, 25 Aug 2017 00:32:20 -0700 Subject: [PATCH] Support ingrasys platform --- packages/platforms/ingrasys/Makefile | 1 + .../platforms/ingrasys/vendor-config/Makefile | 1 + .../platforms/ingrasys/vendor-config/PKG.yml | 1 + .../src/python/ingrasys/__init__.py | 7 + packages/platforms/ingrasys/x86-64/Makefile | 1 + .../ingrasys/x86-64/modules/Makefile | 1 + .../platforms/ingrasys/x86-64/modules/PKG.yml | 1 + .../ingrasys/x86-64/modules/builds/Makefile | 6 + .../x86-64/modules/builds/eeprom_mb.c | 212 ++ .../x86-64/x86-64-ingrasys-s9100/.gitignore | 1 + .../x86-64/x86-64-ingrasys-s9100/Makefile | 1 + .../x86-64-ingrasys-s9100/modules/Makefile | 1 + .../x86-64-ingrasys-s9100/modules/PKG.yml | 1 + .../modules/builds/Makefile | 6 + .../modules/builds/eeprom.c | 237 ++ .../modules/builds/w83795.c | 2287 +++++++++++++++++ .../x86-64-ingrasys-s9100/onlp/Makefile | 1 + .../x86-64/x86-64-ingrasys-s9100/onlp/PKG.yml | 1 + .../onlp/builds/Makefile | 2 + .../onlp/builds/lib/Makefile | 45 + .../onlp/builds/onlpdump/Makefile | 45 + .../src/x86_64_ingrasys_s9100/.gitignore | 2 + .../builds/src/x86_64_ingrasys_s9100/.module | 1 + .../builds/src/x86_64_ingrasys_s9100/Makefile | 10 + .../x86_64_ingrasys_s9100/module/auto/make.mk | 7 + .../module/auto/x86-64-ingrasys-s9100.yml | 47 + .../x86_64_ingrasys_s9100.x | 34 + .../x86_64_ingrasys_s9100_config.h | 162 ++ .../x86_64_ingrasys_s9100_dox.h | 26 + .../x86_64_ingrasys_s9100_porting.h | 106 + .../src/x86_64_ingrasys_s9100/module/make.mk | 29 + .../x86_64_ingrasys_s9100/module/src/Makefile | 30 + .../x86_64_ingrasys_s9100/module/src/fani.c | 283 ++ .../x86_64_ingrasys_s9100/module/src/ledi.c | 143 ++ .../x86_64_ingrasys_s9100/module/src/make.mk | 29 + .../module/src/platform_lib.c | 528 ++++ .../module/src/platform_lib.h | 248 ++ .../x86_64_ingrasys_s9100/module/src/psui.c | 150 ++ .../x86_64_ingrasys_s9100/module/src/sfpi.c | 159 ++ .../x86_64_ingrasys_s9100/module/src/sysi.c | 292 +++ .../module/src/thermali.c | 181 ++ .../module/src/x86_64_ingrasys_s9100_config.c | 101 + .../module/src/x86_64_ingrasys_s9100_enums.c | 30 + .../module/src/x86_64_ingrasys_s9100_int.h | 29 + .../module/src/x86_64_ingrasys_s9100_log.c | 38 + .../module/src/x86_64_ingrasys_s9100_log.h | 32 + .../module/src/x86_64_ingrasys_s9100_module.c | 44 + .../module/src/x86_64_ingrasys_s9100_ucli.c | 82 + .../platform-config/Makefile | 1 + .../platform-config/r0/Makefile | 1 + .../platform-config/r0/PKG.yml | 1 + .../r0/src/lib/x86-64-ingrasys-s9100-r0.yml | 30 + .../x86_64_ingrasys_s9100_r0/__init__.py | 496 ++++ 53 files changed, 6211 insertions(+) create mode 100755 packages/platforms/ingrasys/Makefile create mode 100755 packages/platforms/ingrasys/vendor-config/Makefile create mode 100755 packages/platforms/ingrasys/vendor-config/PKG.yml create mode 100755 packages/platforms/ingrasys/vendor-config/src/python/ingrasys/__init__.py create mode 100755 packages/platforms/ingrasys/x86-64/Makefile create mode 100755 packages/platforms/ingrasys/x86-64/modules/Makefile create mode 100755 packages/platforms/ingrasys/x86-64/modules/PKG.yml create mode 100755 packages/platforms/ingrasys/x86-64/modules/builds/Makefile create mode 100755 packages/platforms/ingrasys/x86-64/modules/builds/eeprom_mb.c create mode 100755 packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/.gitignore create mode 100755 packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/Makefile create mode 100755 packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/modules/Makefile create mode 100755 packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/modules/PKG.yml create mode 100755 packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/modules/builds/Makefile create mode 100755 packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/modules/builds/eeprom.c create mode 100755 packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/modules/builds/w83795.c create mode 100755 packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/Makefile create mode 100755 packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/PKG.yml create mode 100755 packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/Makefile create mode 100755 packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/lib/Makefile create mode 100755 packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/onlpdump/Makefile create mode 100755 packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/.gitignore create mode 100755 packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/.module create mode 100755 packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/Makefile create mode 100755 packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/module/auto/make.mk create mode 100755 packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/module/auto/x86-64-ingrasys-s9100.yml create mode 100755 packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/module/inc/x86_64_ingrasys_s9100/x86_64_ingrasys_s9100.x create mode 100755 packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/module/inc/x86_64_ingrasys_s9100/x86_64_ingrasys_s9100_config.h create mode 100755 packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/module/inc/x86_64_ingrasys_s9100/x86_64_ingrasys_s9100_dox.h create mode 100755 packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/module/inc/x86_64_ingrasys_s9100/x86_64_ingrasys_s9100_porting.h create mode 100755 packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/module/make.mk create mode 100755 packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/module/src/Makefile create mode 100755 packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/module/src/fani.c create mode 100755 packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/module/src/ledi.c create mode 100755 packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/module/src/make.mk create mode 100755 packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/module/src/platform_lib.c create mode 100755 packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/module/src/platform_lib.h create mode 100755 packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/module/src/psui.c create mode 100755 packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/module/src/sfpi.c create mode 100755 packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/module/src/sysi.c create mode 100755 packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/module/src/thermali.c create mode 100755 packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/module/src/x86_64_ingrasys_s9100_config.c create mode 100755 packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/module/src/x86_64_ingrasys_s9100_enums.c create mode 100755 packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/module/src/x86_64_ingrasys_s9100_int.h create mode 100755 packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/module/src/x86_64_ingrasys_s9100_log.c create mode 100755 packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/module/src/x86_64_ingrasys_s9100_log.h create mode 100755 packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/module/src/x86_64_ingrasys_s9100_module.c create mode 100755 packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/module/src/x86_64_ingrasys_s9100_ucli.c create mode 100755 packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/platform-config/Makefile create mode 100755 packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/platform-config/r0/Makefile create mode 100755 packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/platform-config/r0/PKG.yml create mode 100755 packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/platform-config/r0/src/lib/x86-64-ingrasys-s9100-r0.yml create mode 100755 packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/platform-config/r0/src/python/x86_64_ingrasys_s9100_r0/__init__.py diff --git a/packages/platforms/ingrasys/Makefile b/packages/platforms/ingrasys/Makefile new file mode 100755 index 00000000..003238cf --- /dev/null +++ b/packages/platforms/ingrasys/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/packages/platforms/ingrasys/vendor-config/Makefile b/packages/platforms/ingrasys/vendor-config/Makefile new file mode 100755 index 00000000..003238cf --- /dev/null +++ b/packages/platforms/ingrasys/vendor-config/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/packages/platforms/ingrasys/vendor-config/PKG.yml b/packages/platforms/ingrasys/vendor-config/PKG.yml new file mode 100755 index 00000000..e7d9d9e1 --- /dev/null +++ b/packages/platforms/ingrasys/vendor-config/PKG.yml @@ -0,0 +1 @@ +!include $ONL_TEMPLATES/platform-config-vendor.yml VENDOR=ingrasys Vendor=ingrasys diff --git a/packages/platforms/ingrasys/vendor-config/src/python/ingrasys/__init__.py b/packages/platforms/ingrasys/vendor-config/src/python/ingrasys/__init__.py new file mode 100755 index 00000000..36f39285 --- /dev/null +++ b/packages/platforms/ingrasys/vendor-config/src/python/ingrasys/__init__.py @@ -0,0 +1,7 @@ +#!/usr/bin/python + +from onl.platform.base import * + +class OnlPlatformingrasys(OnlPlatformBase): + MANUFACTURER='Ingrasys' + PRIVATE_ENTERPRISE_NUMBER=2468 diff --git a/packages/platforms/ingrasys/x86-64/Makefile b/packages/platforms/ingrasys/x86-64/Makefile new file mode 100755 index 00000000..003238cf --- /dev/null +++ b/packages/platforms/ingrasys/x86-64/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/packages/platforms/ingrasys/x86-64/modules/Makefile b/packages/platforms/ingrasys/x86-64/modules/Makefile new file mode 100755 index 00000000..003238cf --- /dev/null +++ b/packages/platforms/ingrasys/x86-64/modules/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/packages/platforms/ingrasys/x86-64/modules/PKG.yml b/packages/platforms/ingrasys/x86-64/modules/PKG.yml new file mode 100755 index 00000000..74f7e1b1 --- /dev/null +++ b/packages/platforms/ingrasys/x86-64/modules/PKG.yml @@ -0,0 +1 @@ +!include $ONL_TEMPLATES/arch-vendor-modules.yml ARCH=amd64 VENDOR=ingrasys KERNELS="onl-kernel-3.16-lts-x86-64-all:amd64" \ No newline at end of file diff --git a/packages/platforms/ingrasys/x86-64/modules/builds/Makefile b/packages/platforms/ingrasys/x86-64/modules/builds/Makefile new file mode 100755 index 00000000..f08898aa --- /dev/null +++ b/packages/platforms/ingrasys/x86-64/modules/builds/Makefile @@ -0,0 +1,6 @@ +KERNELS := onl-kernel-3.16-lts-x86-64-all:amd64 +KMODULES := $(wildcard *.c) +VENDOR := ingrasys +BASENAME := common +ARCH := x86_64 +include $(ONL)/make/kmodule.mk diff --git a/packages/platforms/ingrasys/x86-64/modules/builds/eeprom_mb.c b/packages/platforms/ingrasys/x86-64/modules/builds/eeprom_mb.c new file mode 100755 index 00000000..ec4fe3d6 --- /dev/null +++ b/packages/platforms/ingrasys/x86-64/modules/builds/eeprom_mb.c @@ -0,0 +1,212 @@ +/* + * Copyright (C) 1998, 1999 Frodo Looijaard and + * Philip Edelbrock + * Copyright (C) 2003 Greg Kroah-Hartman + * Copyright (C) 2003 IBM Corp. + * Copyright (C) 2004 Jean Delvare + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include +#include + +/* Addresses to scan */ +static const unsigned short normal_i2c[] = { /* 0x50, 0x51, 0x52, 0x53, 0x54, + 0x55, 0x56, 0x57, */ I2C_CLIENT_END }; + + +/* Size of EEPROM in bytes */ +#define EEPROM_SIZE 256 + +#define SLICE_BITS (6) +#define SLICE_SIZE (1 << SLICE_BITS) +#define SLICE_NUM (EEPROM_SIZE/SLICE_SIZE) + +/* Each client has this additional data */ +struct eeprom_data { + struct mutex update_lock; + u8 valid; /* bitfield, bit!=0 if slice is valid */ + unsigned long last_updated[SLICE_NUM]; /* In jiffies, 8 slices */ + u8 data[EEPROM_SIZE]; /* Register values */ +}; + + +static void mb_eeprom_update_client(struct i2c_client *client, u8 slice) +{ + struct eeprom_data *data = i2c_get_clientdata(client); + int i, j; + int ret; + int addr; + + mutex_lock(&data->update_lock); + + if (!(data->valid & (1 << slice)) || + time_after(jiffies, data->last_updated[slice] + 300 * HZ)) { + dev_dbg(&client->dev, "Starting eeprom update, slice %u\n", slice); + + addr = slice << SLICE_BITS; + + ret = i2c_smbus_write_byte_data(client, ((u8)addr >> 8) & 0xFF, (u8)addr & 0xFF); + /* select the eeprom address */ + if (ret < 0) { + dev_err(&client->dev, "address set failed\n"); + goto exit; + } + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_READ_BYTE)) { + goto exit; + } + + for (i = slice << SLICE_BITS; i < (slice + 1) << SLICE_BITS; i+= SLICE_SIZE) { + for (j = i; j < (i+SLICE_SIZE); j++) { + int res; + + res = i2c_smbus_read_byte(client); + if (res < 0) { + goto exit; + } + + data->data[j] = res & 0xFF; + } + } + + data->last_updated[slice] = jiffies; + data->valid |= (1 << slice); + } +exit: + mutex_unlock(&data->update_lock); +} + +static ssize_t mb_eeprom_read(struct file *filp, struct kobject *kobj, + struct bin_attribute *bin_attr, + char *buf, loff_t off, size_t count) +{ + struct i2c_client *client = to_i2c_client(container_of(kobj, struct device, kobj)); + struct eeprom_data *data = i2c_get_clientdata(client); + u8 slice; + + if (off > EEPROM_SIZE) { + return 0; + } + if (off + count > EEPROM_SIZE) { + count = EEPROM_SIZE - off; + } + if (count == 0) { + return 0; + } + + /* Only refresh slices which contain requested bytes */ + for (slice = off >> SLICE_BITS; slice <= (off + count - 1) >> SLICE_BITS; slice++) { + mb_eeprom_update_client(client, slice); + } + + memcpy(buf, &data->data[off], count); + + return count; +} + +static struct bin_attribute mb_eeprom_attr = { + .attr = { + .name = "eeprom", + .mode = S_IRUGO, + }, + .size = EEPROM_SIZE, + .read = mb_eeprom_read, +}; + +/* Return 0 if detection is successful, -ENODEV otherwise */ +static int mb_eeprom_detect(struct i2c_client *client, struct i2c_board_info *info) +{ + struct i2c_adapter *adapter = client->adapter; + + /* EDID EEPROMs are often 24C00 EEPROMs, which answer to all + addresses 0x50-0x57, but we only care about 0x50. So decline + attaching to addresses >= 0x51 on DDC buses */ + if (!(adapter->class & I2C_CLASS_SPD) && client->addr >= 0x51) { + return -ENODEV; + } + + if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_READ_BYTE) + && !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WRITE_BYTE_DATA)) { + return -ENODEV; + } + + strlcpy(info->type, "eeprom", I2C_NAME_SIZE); + + return 0; +} + +static int mb_eeprom_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct eeprom_data *data; + int err; + + if (!(data = kzalloc(sizeof(struct eeprom_data), GFP_KERNEL))) { + err = -ENOMEM; + goto exit; + } + + memset(data->data, 0xff, EEPROM_SIZE); + i2c_set_clientdata(client, data); + mutex_init(&data->update_lock); + + /* create the sysfs eeprom file */ + err = sysfs_create_bin_file(&client->dev.kobj, &mb_eeprom_attr); + if (err) { + goto exit_kfree; + } + + return 0; + +exit_kfree: + kfree(data); +exit: + return err; +} + +static int mb_eeprom_remove(struct i2c_client *client) +{ + sysfs_remove_bin_file(&client->dev.kobj, &mb_eeprom_attr); + kfree(i2c_get_clientdata(client)); + + return 0; +} + +static const struct i2c_device_id mb_eeprom_id[] = { + { "mb_eeprom", 0 }, + { } +}; + +static struct i2c_driver mb_eeprom_driver = { + .driver = { + .name = "mb_eeprom", + }, + .probe = mb_eeprom_probe, + .remove = mb_eeprom_remove, + .id_table = mb_eeprom_id, + + .class = I2C_CLASS_DDC | I2C_CLASS_SPD, + .detect = mb_eeprom_detect, + .address_list = normal_i2c, +}; + +module_i2c_driver(mb_eeprom_driver); + +MODULE_AUTHOR("Wade "); +MODULE_DESCRIPTION("Ingrasys S9100 Mother Borad EEPROM driver"); +MODULE_LICENSE("GPL"); diff --git a/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/.gitignore b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/.gitignore new file mode 100755 index 00000000..9f7b1342 --- /dev/null +++ b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/.gitignore @@ -0,0 +1 @@ +onlpdump.mk diff --git a/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/Makefile b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/Makefile new file mode 100755 index 00000000..003238cf --- /dev/null +++ b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/modules/Makefile b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/modules/Makefile new file mode 100755 index 00000000..003238cf --- /dev/null +++ b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/modules/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/modules/PKG.yml b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/modules/PKG.yml new file mode 100755 index 00000000..c99bf793 --- /dev/null +++ b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/modules/PKG.yml @@ -0,0 +1 @@ +!include $ONL_TEMPLATES/platform-modules.yml ARCH=amd64 VENDOR=ingrasys BASENAME=x86-64-ingrasys-s9100 KERNELS="onl-kernel-3.16-lts-x86-64-all:amd64" diff --git a/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/modules/builds/Makefile b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/modules/builds/Makefile new file mode 100755 index 00000000..f5d7b12f --- /dev/null +++ b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/modules/builds/Makefile @@ -0,0 +1,6 @@ +KERNELS := onl-kernel-3.16-lts-x86-64-all:amd64 +KMODULES := $(wildcard *.c) +VENDOR := ingrasys +BASENAME := x86-64-ingrasys-s9100 +ARCH := x86_64 +include $(ONL)/make/kmodule.mk diff --git a/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/modules/builds/eeprom.c b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/modules/builds/eeprom.c new file mode 100755 index 00000000..33f8673d --- /dev/null +++ b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/modules/builds/eeprom.c @@ -0,0 +1,237 @@ +/* + * Copyright (C) 1998, 1999 Frodo Looijaard and + * Philip Edelbrock + * Copyright (C) 2003 Greg Kroah-Hartman + * Copyright (C) 2003 IBM Corp. + * Copyright (C) 2004 Jean Delvare + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include + +/* Addresses to scan */ +static const unsigned short normal_i2c[] = { 0x50, 0x51, 0x52, 0x53, 0x54, + 0x55, 0x56, 0x57, I2C_CLIENT_END }; + + +/* Size of EEPROM in bytes */ +#define EEPROM_SIZE 256 + +/* possible types of eeprom devices */ +enum eeprom_nature { + UNKNOWN, + VAIO, +}; + +/* Each client has this additional data */ +struct eeprom_data { + struct mutex update_lock; + u8 valid; /* bitfield, bit!=0 if slice is valid */ + unsigned long last_updated[8]; /* In jiffies, 8 slices */ + u8 data[EEPROM_SIZE]; /* Register values */ + enum eeprom_nature nature; +}; + + +static void eeprom_update_client(struct i2c_client *client, u8 slice) +{ + struct eeprom_data *data = i2c_get_clientdata(client); + int i; + + mutex_lock(&data->update_lock); + + if (!(data->valid & (1 << slice)) || + time_after(jiffies, data->last_updated[slice] + 300 * HZ)) { + dev_dbg(&client->dev, "Starting eeprom update, slice %u\n", slice); + + if (i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_READ_I2C_BLOCK)) { + for (i = slice << 5; i < (slice + 1) << 5; i += 32) + if (i2c_smbus_read_i2c_block_data(client, i, + 32, data->data + i) + != 32) + goto exit; + } else { + for (i = slice << 5; i < (slice + 1) << 5; i += 2) { + int word = i2c_smbus_read_word_data(client, i); + if (word < 0) + goto exit; + data->data[i] = word & 0xff; + data->data[i + 1] = word >> 8; + } + } + data->last_updated[slice] = jiffies; + data->valid |= (1 << slice); + } +exit: + mutex_unlock(&data->update_lock); +} + +static ssize_t eeprom_read(struct file *filp, struct kobject *kobj, + struct bin_attribute *bin_attr, + char *buf, loff_t off, size_t count) +{ + struct i2c_client *client = to_i2c_client(container_of(kobj, struct device, kobj)); + struct eeprom_data *data = i2c_get_clientdata(client); + u8 slice; + + if (off > EEPROM_SIZE) + return 0; + if (off + count > EEPROM_SIZE) + count = EEPROM_SIZE - off; + + /* Only refresh slices which contain requested bytes */ + for (slice = off >> 5; slice <= (off + count - 1) >> 5; slice++) + eeprom_update_client(client, slice); + + /* Hide Vaio private settings to regular users: + - BIOS passwords: bytes 0x00 to 0x0f + - UUID: bytes 0x10 to 0x1f + - Serial number: 0xc0 to 0xdf */ + if (data->nature == VAIO && !capable(CAP_SYS_ADMIN)) { + int i; + + for (i = 0; i < count; i++) { + if ((off + i <= 0x1f) || + (off + i >= 0xc0 && off + i <= 0xdf)) + buf[i] = 0; + else + buf[i] = data->data[off + i]; + } + } else { + memcpy(buf, &data->data[off], count); + } + + return count; +} + +static struct bin_attribute eeprom_attr = { + .attr = { + .name = "eeprom", + .mode = S_IRUGO, + }, + .size = EEPROM_SIZE, + .read = eeprom_read, +}; + +/* Return 0 if detection is successful, -ENODEV otherwise */ +static int eeprom_detect(struct i2c_client *client, struct i2c_board_info *info) +{ + struct i2c_adapter *adapter = client->adapter; + + /* EDID EEPROMs are often 24C00 EEPROMs, which answer to all + addresses 0x50-0x57, but we only care about 0x50. So decline + attaching to addresses >= 0x51 on DDC buses */ + if (!(adapter->class & I2C_CLASS_SPD) && client->addr >= 0x51) + return -ENODEV; + + /* There are four ways we can read the EEPROM data: + (1) I2C block reads (faster, but unsupported by most adapters) + (2) Word reads (128% overhead) + (3) Consecutive byte reads (88% overhead, unsafe) + (4) Regular byte data reads (265% overhead) + The third and fourth methods are not implemented by this driver + because all known adapters support one of the first two. */ + if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_READ_WORD_DATA) + && !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_READ_I2C_BLOCK)) + return -ENODEV; + + strlcpy(info->type, "eeprom", I2C_NAME_SIZE); + + return 0; +} + +static int eeprom_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct i2c_adapter *adapter = client->adapter; + struct eeprom_data *data; + int err; + + if (!(data = kzalloc(sizeof(struct eeprom_data), GFP_KERNEL))) { + err = -ENOMEM; + goto exit; + } + + memset(data->data, 0xff, EEPROM_SIZE); + i2c_set_clientdata(client, data); + mutex_init(&data->update_lock); + data->nature = UNKNOWN; + + /* Detect the Vaio nature of EEPROMs. + We use the "PCG-" or "VGN-" prefix as the signature. */ + if (client->addr == 0x57 + && i2c_check_functionality(adapter, I2C_FUNC_SMBUS_READ_BYTE_DATA)) { + char name[4]; + + name[0] = i2c_smbus_read_byte_data(client, 0x80); + name[1] = i2c_smbus_read_byte_data(client, 0x81); + name[2] = i2c_smbus_read_byte_data(client, 0x82); + name[3] = i2c_smbus_read_byte_data(client, 0x83); + + if (!memcmp(name, "PCG-", 4) || !memcmp(name, "VGN-", 4)) { + dev_info(&client->dev, "Vaio EEPROM detected, " + "enabling privacy protection\n"); + data->nature = VAIO; + } + } + + /* create the sysfs eeprom file */ + err = sysfs_create_bin_file(&client->dev.kobj, &eeprom_attr); + if (err) + goto exit_kfree; + + return 0; + +exit_kfree: + kfree(data); +exit: + return err; +} + +static int eeprom_remove(struct i2c_client *client) +{ + sysfs_remove_bin_file(&client->dev.kobj, &eeprom_attr); + kfree(i2c_get_clientdata(client)); + + return 0; +} + +static const struct i2c_device_id eeprom_id[] = { + { "eeprom", 0 }, + { } +}; + +static struct i2c_driver eeprom_driver = { + .driver = { + .name = "eeprom", + }, + .probe = eeprom_probe, + .remove = eeprom_remove, + .id_table = eeprom_id, + + .class = I2C_CLASS_DDC | I2C_CLASS_SPD, + .detect = eeprom_detect, + .address_list = normal_i2c, +}; + +module_i2c_driver(eeprom_driver); + +MODULE_AUTHOR("Frodo Looijaard and " + "Philip Edelbrock and " + "Greg Kroah-Hartman "); +MODULE_DESCRIPTION("I2C EEPROM driver"); +MODULE_LICENSE("GPL"); diff --git a/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/modules/builds/w83795.c b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/modules/builds/w83795.c new file mode 100755 index 00000000..21894131 --- /dev/null +++ b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/modules/builds/w83795.c @@ -0,0 +1,2287 @@ +/* + * w83795.c - Linux kernel driver for hardware monitoring + * Copyright (C) 2008 Nuvoton Technology Corp. + * Wei Song + * Copyright (C) 2010 Jean Delvare + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation - version 2. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA + * 02110-1301 USA. + * + * Supports following chips: + * + * Chip #vin #fanin #pwm #temp #dts wchipid vendid i2c ISA + * w83795g 21 14 8 6 8 0x79 0x5ca3 yes no + * w83795adg 18 14 2 6 8 0x79 0x5ca3 yes no + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* Addresses to scan */ +static const unsigned short normal_i2c[] = { + 0x2c, 0x2d, 0x2e, 0x2f, I2C_CLIENT_END +}; + + +static bool reset; +module_param(reset, bool, 0); +MODULE_PARM_DESC(reset, "Set to 1 to reset chip, not recommended"); + + +#define W83795_REG_BANKSEL 0x00 +#define W83795_REG_VENDORID 0xfd +#define W83795_REG_CHIPID 0xfe +#define W83795_REG_DEVICEID 0xfb +#define W83795_REG_DEVICEID_A 0xff + +#define W83795_REG_I2C_ADDR 0xfc +#define W83795_REG_CONFIG 0x01 +#define W83795_REG_CONFIG_CONFIG48 0x04 +#define W83795_REG_CONFIG_START 0x01 + +/* Multi-Function Pin Ctrl Registers */ +#define W83795_REG_VOLT_CTRL1 0x02 +#define W83795_REG_VOLT_CTRL2 0x03 +#define W83795_REG_TEMP_CTRL1 0x04 +#define W83795_REG_TEMP_CTRL2 0x05 +#define W83795_REG_FANIN_CTRL1 0x06 +#define W83795_REG_FANIN_CTRL2 0x07 +#define W83795_REG_VMIGB_CTRL 0x08 + +#define TEMP_READ 0 +#define TEMP_CRIT 1 +#define TEMP_CRIT_HYST 2 +#define TEMP_WARN 3 +#define TEMP_WARN_HYST 4 +/* + * only crit and crit_hyst affect real-time alarm status + * current crit crit_hyst warn warn_hyst + */ +static const u16 W83795_REG_TEMP[][5] = { + {0x21, 0x96, 0x97, 0x98, 0x99}, /* TD1/TR1 */ + {0x22, 0x9a, 0x9b, 0x9c, 0x9d}, /* TD2/TR2 */ + {0x23, 0x9e, 0x9f, 0xa0, 0xa1}, /* TD3/TR3 */ + {0x24, 0xa2, 0xa3, 0xa4, 0xa5}, /* TD4/TR4 */ + {0x1f, 0xa6, 0xa7, 0xa8, 0xa9}, /* TR5 */ + {0x20, 0xaa, 0xab, 0xac, 0xad}, /* TR6 */ +}; + +#define IN_READ 0 +#define IN_MAX 1 +#define IN_LOW 2 +static const u16 W83795_REG_IN[][3] = { + /* Current, HL, LL */ + {0x10, 0x70, 0x71}, /* VSEN1 */ + {0x11, 0x72, 0x73}, /* VSEN2 */ + {0x12, 0x74, 0x75}, /* VSEN3 */ + {0x13, 0x76, 0x77}, /* VSEN4 */ + {0x14, 0x78, 0x79}, /* VSEN5 */ + {0x15, 0x7a, 0x7b}, /* VSEN6 */ + {0x16, 0x7c, 0x7d}, /* VSEN7 */ + {0x17, 0x7e, 0x7f}, /* VSEN8 */ + {0x18, 0x80, 0x81}, /* VSEN9 */ + {0x19, 0x82, 0x83}, /* VSEN10 */ + {0x1A, 0x84, 0x85}, /* VSEN11 */ + {0x1B, 0x86, 0x87}, /* VTT */ + {0x1C, 0x88, 0x89}, /* 3VDD */ + {0x1D, 0x8a, 0x8b}, /* 3VSB */ + {0x1E, 0x8c, 0x8d}, /* VBAT */ + {0x1F, 0xa6, 0xa7}, /* VSEN12 */ + {0x20, 0xaa, 0xab}, /* VSEN13 */ + {0x21, 0x96, 0x97}, /* VSEN14 */ + {0x22, 0x9a, 0x9b}, /* VSEN15 */ + {0x23, 0x9e, 0x9f}, /* VSEN16 */ + {0x24, 0xa2, 0xa3}, /* VSEN17 */ +}; +#define W83795_REG_VRLSB 0x3C + +static const u8 W83795_REG_IN_HL_LSB[] = { + 0x8e, /* VSEN1-4 */ + 0x90, /* VSEN5-8 */ + 0x92, /* VSEN9-11 */ + 0x94, /* VTT, 3VDD, 3VSB, 3VBAT */ + 0xa8, /* VSEN12 */ + 0xac, /* VSEN13 */ + 0x98, /* VSEN14 */ + 0x9c, /* VSEN15 */ + 0xa0, /* VSEN16 */ + 0xa4, /* VSEN17 */ +}; + +#define IN_LSB_REG(index, type) \ + (((type) == 1) ? W83795_REG_IN_HL_LSB[(index)] \ + : (W83795_REG_IN_HL_LSB[(index)] + 1)) + +#define IN_LSB_SHIFT 0 +#define IN_LSB_IDX 1 +static const u8 IN_LSB_SHIFT_IDX[][2] = { + /* High/Low LSB shift, LSB No. */ + {0x00, 0x00}, /* VSEN1 */ + {0x02, 0x00}, /* VSEN2 */ + {0x04, 0x00}, /* VSEN3 */ + {0x06, 0x00}, /* VSEN4 */ + {0x00, 0x01}, /* VSEN5 */ + {0x02, 0x01}, /* VSEN6 */ + {0x04, 0x01}, /* VSEN7 */ + {0x06, 0x01}, /* VSEN8 */ + {0x00, 0x02}, /* VSEN9 */ + {0x02, 0x02}, /* VSEN10 */ + {0x04, 0x02}, /* VSEN11 */ + {0x00, 0x03}, /* VTT */ + {0x02, 0x03}, /* 3VDD */ + {0x04, 0x03}, /* 3VSB */ + {0x06, 0x03}, /* VBAT */ + {0x06, 0x04}, /* VSEN12 */ + {0x06, 0x05}, /* VSEN13 */ + {0x06, 0x06}, /* VSEN14 */ + {0x06, 0x07}, /* VSEN15 */ + {0x06, 0x08}, /* VSEN16 */ + {0x06, 0x09}, /* VSEN17 */ +}; + + +#define W83795_REG_FAN(index) (0x2E + (index)) +#define W83795_REG_FAN_MIN_HL(index) (0xB6 + (index)) +#define W83795_REG_FAN_MIN_LSB(index) (0xC4 + (index) / 2) +#define W83795_REG_FAN_MIN_LSB_SHIFT(index) \ + (((index) & 1) ? 4 : 0) + +#define W83795_REG_VID_CTRL 0x6A + +#define W83795_REG_ALARM_CTRL 0x40 +#define ALARM_CTRL_RTSACS (1 << 7) +#define W83795_REG_ALARM(index) (0x41 + (index)) +#define W83795_REG_CLR_CHASSIS 0x4D +#define W83795_REG_BEEP(index) (0x50 + (index)) + +#define W83795_REG_OVT_CFG 0x58 +#define OVT_CFG_SEL (1 << 7) + + +#define W83795_REG_FCMS1 0x201 +#define W83795_REG_FCMS2 0x208 +#define W83795_REG_TFMR(index) (0x202 + (index)) +#define W83795_REG_FOMC 0x20F + +#define W83795_REG_TSS(index) (0x209 + (index)) + +#define TSS_MAP_RESERVED 0xff +static const u8 tss_map[4][6] = { + { 0, 1, 2, 3, 4, 5}, + { 6, 7, 8, 9, 0, 1}, + {10, 11, 12, 13, 2, 3}, + { 4, 5, 4, 5, TSS_MAP_RESERVED, TSS_MAP_RESERVED}, +}; + +#define PWM_OUTPUT 0 +#define PWM_FREQ 1 +#define PWM_START 2 +#define PWM_NONSTOP 3 +#define PWM_STOP_TIME 4 +#define W83795_REG_PWM(index, nr) (0x210 + (nr) * 8 + (index)) + +#define W83795_REG_FTSH(index) (0x240 + (index) * 2) +#define W83795_REG_FTSL(index) (0x241 + (index) * 2) +#define W83795_REG_TFTS 0x250 + +#define TEMP_PWM_TTTI 0 +#define TEMP_PWM_CTFS 1 +#define TEMP_PWM_HCT 2 +#define TEMP_PWM_HOT 3 +#define W83795_REG_TTTI(index) (0x260 + (index)) +#define W83795_REG_CTFS(index) (0x268 + (index)) +#define W83795_REG_HT(index) (0x270 + (index)) + +#define SF4_TEMP 0 +#define SF4_PWM 1 +#define W83795_REG_SF4_TEMP(temp_num, index) \ + (0x280 + 0x10 * (temp_num) + (index)) +#define W83795_REG_SF4_PWM(temp_num, index) \ + (0x288 + 0x10 * (temp_num) + (index)) + +#define W83795_REG_DTSC 0x301 +#define W83795_REG_DTSE 0x302 +#define W83795_REG_DTS(index) (0x26 + (index)) +#define W83795_REG_PECI_TBASE(index) (0x320 + (index)) + +#define DTS_CRIT 0 +#define DTS_CRIT_HYST 1 +#define DTS_WARN 2 +#define DTS_WARN_HYST 3 +#define W83795_REG_DTS_EXT(index) (0xB2 + (index)) + +#define SETUP_PWM_DEFAULT 0 +#define SETUP_PWM_UPTIME 1 +#define SETUP_PWM_DOWNTIME 2 +#define W83795_REG_SETUP_PWM(index) (0x20C + (index)) + +static inline u16 in_from_reg(u8 index, u16 val) +{ + /* 3VDD, 3VSB and VBAT: 6 mV/bit; other inputs: 2 mV/bit */ + if (index >= 12 && index <= 14) + return val * 6; + else + return val * 2; +} + +static inline u16 in_to_reg(u8 index, u16 val) +{ + if (index >= 12 && index <= 14) + return val / 6; + else + return val / 2; +} + +static inline unsigned long fan_from_reg(u16 val) +{ + if ((val == 0xfff) || (val == 0)) + return 0; + return 1350000UL / val; +} + +static inline u16 fan_to_reg(long rpm) +{ + if (rpm <= 0) + return 0x0fff; + return clamp_val((1350000 + (rpm >> 1)) / rpm, 1, 0xffe); +} + +static inline unsigned long time_from_reg(u8 reg) +{ + return reg * 100; +} + +static inline u8 time_to_reg(unsigned long val) +{ + return clamp_val((val + 50) / 100, 0, 0xff); +} + +static inline long temp_from_reg(s8 reg) +{ + return reg * 1000; +} + +static inline s8 temp_to_reg(long val, s8 min, s8 max) +{ + return clamp_val(val / 1000, min, max); +} + +static const u16 pwm_freq_cksel0[16] = { + 1024, 512, 341, 256, 205, 171, 146, 128, + 85, 64, 32, 16, 8, 4, 2, 1 +}; + +static unsigned int pwm_freq_from_reg(u8 reg, u16 clkin) +{ + unsigned long base_clock; + + if (reg & 0x80) { + base_clock = clkin * 1000 / ((clkin == 48000) ? 384 : 256); + return base_clock / ((reg & 0x7f) + 1); + } else + return pwm_freq_cksel0[reg & 0x0f]; +} + +static u8 pwm_freq_to_reg(unsigned long val, u16 clkin) +{ + unsigned long base_clock; + u8 reg0, reg1; + unsigned long best0, best1; + + /* Best fit for cksel = 0 */ + for (reg0 = 0; reg0 < ARRAY_SIZE(pwm_freq_cksel0) - 1; reg0++) { + if (val > (pwm_freq_cksel0[reg0] + + pwm_freq_cksel0[reg0 + 1]) / 2) + break; + } + if (val < 375) /* cksel = 1 can't beat this */ + return reg0; + best0 = pwm_freq_cksel0[reg0]; + + /* Best fit for cksel = 1 */ + base_clock = clkin * 1000 / ((clkin == 48000) ? 384 : 256); + reg1 = clamp_val(DIV_ROUND_CLOSEST(base_clock, val), 1, 128); + best1 = base_clock / reg1; + reg1 = 0x80 | (reg1 - 1); + + /* Choose the closest one */ + if (abs(val - best0) > abs(val - best1)) + return reg1; + else + return reg0; +} + +enum chip_types {w83795g, w83795adg}; + +struct w83795_data { + struct device *hwmon_dev; + struct mutex update_lock; + unsigned long last_updated; /* In jiffies */ + enum chip_types chip_type; + + u8 bank; + + u32 has_in; /* Enable monitor VIN or not */ + u8 has_dyn_in; /* Only in2-0 can have this */ + u16 in[21][3]; /* Register value, read/high/low */ + u8 in_lsb[10][3]; /* LSB Register value, high/low */ + u8 has_gain; /* has gain: in17-20 * 8 */ + + u16 has_fan; /* Enable fan14-1 or not */ + u16 fan[14]; /* Register value combine */ + u16 fan_min[14]; /* Register value combine */ + + u8 has_temp; /* Enable monitor temp6-1 or not */ + s8 temp[6][5]; /* current, crit, crit_hyst, warn, warn_hyst */ + u8 temp_read_vrlsb[6]; + u8 temp_mode; /* Bit vector, 0 = TR, 1 = TD */ + u8 temp_src[3]; /* Register value */ + + u8 enable_dts; /* + * Enable PECI and SB-TSI, + * bit 0: =1 enable, =0 disable, + * bit 1: =1 AMD SB-TSI, =0 Intel PECI + */ + u8 has_dts; /* Enable monitor DTS temp */ + s8 dts[8]; /* Register value */ + u8 dts_read_vrlsb[8]; /* Register value */ + s8 dts_ext[4]; /* Register value */ + + u8 has_pwm; /* + * 795g supports 8 pwm, 795adg only supports 2, + * no config register, only affected by chip + * type + */ + u8 pwm[8][5]; /* + * Register value, output, freq, start, + * non stop, stop time + */ + u16 clkin; /* CLKIN frequency in kHz */ + u8 pwm_fcms[2]; /* Register value */ + u8 pwm_tfmr[6]; /* Register value */ + u8 pwm_fomc; /* Register value */ + + u16 target_speed[8]; /* + * Register value, target speed for speed + * cruise + */ + u8 tol_speed; /* tolerance of target speed */ + u8 pwm_temp[6][4]; /* TTTI, CTFS, HCT, HOT */ + u8 sf4_reg[6][2][7]; /* 6 temp, temp/dcpwm, 7 registers */ + + u8 setup_pwm[3]; /* Register value */ + + u8 alarms[6]; /* Register value */ + u8 enable_beep; + u8 beeps[6]; /* Register value */ + + char valid; + char valid_limits; + char valid_pwm_config; +}; + +/* + * Hardware access + * We assume that nobdody can change the bank outside the driver. + */ + +/* Must be called with data->update_lock held, except during initialization */ +static int w83795_set_bank(struct i2c_client *client, u8 bank) +{ + struct w83795_data *data = i2c_get_clientdata(client); + int err; + + /* If the same bank is already set, nothing to do */ + if ((data->bank & 0x07) == bank) + return 0; + + /* Change to new bank, preserve all other bits */ + bank |= data->bank & ~0x07; + err = i2c_smbus_write_byte_data(client, W83795_REG_BANKSEL, bank); + if (err < 0) { + dev_err(&client->dev, + "Failed to set bank to %d, err %d\n", + (int)bank, err); + return err; + } + data->bank = bank; + + return 0; +} + +/* Must be called with data->update_lock held, except during initialization */ +static u8 w83795_read(struct i2c_client *client, u16 reg) +{ + int err; + + err = w83795_set_bank(client, reg >> 8); + if (err < 0) + return 0x00; /* Arbitrary */ + + err = i2c_smbus_read_byte_data(client, reg & 0xff); + if (err < 0) { + dev_err(&client->dev, + "Failed to read from register 0x%03x, err %d\n", + (int)reg, err); + return 0x00; /* Arbitrary */ + } + return err; +} + +/* Must be called with data->update_lock held, except during initialization */ +static int w83795_write(struct i2c_client *client, u16 reg, u8 value) +{ + int err; + + err = w83795_set_bank(client, reg >> 8); + if (err < 0) + return err; + + err = i2c_smbus_write_byte_data(client, reg & 0xff, value); + if (err < 0) + dev_err(&client->dev, + "Failed to write to register 0x%03x, err %d\n", + (int)reg, err); + return err; +} + +static void w83795_update_limits(struct i2c_client *client) +{ + struct w83795_data *data = i2c_get_clientdata(client); + int i, limit; + u8 lsb; + + /* Read the voltage limits */ + for (i = 0; i < ARRAY_SIZE(data->in); i++) { + if (!(data->has_in & (1 << i))) + continue; + data->in[i][IN_MAX] = + w83795_read(client, W83795_REG_IN[i][IN_MAX]); + data->in[i][IN_LOW] = + w83795_read(client, W83795_REG_IN[i][IN_LOW]); + } + for (i = 0; i < ARRAY_SIZE(data->in_lsb); i++) { + if ((i == 2 && data->chip_type == w83795adg) || + (i >= 4 && !(data->has_in & (1 << (i + 11))))) + continue; + data->in_lsb[i][IN_MAX] = + w83795_read(client, IN_LSB_REG(i, IN_MAX)); + data->in_lsb[i][IN_LOW] = + w83795_read(client, IN_LSB_REG(i, IN_LOW)); + } + + /* Read the fan limits */ + lsb = 0; /* Silent false gcc warning */ + for (i = 0; i < ARRAY_SIZE(data->fan); i++) { + /* + * Each register contains LSB for 2 fans, but we want to + * read it only once to save time + */ + if ((i & 1) == 0 && (data->has_fan & (3 << i))) + lsb = w83795_read(client, W83795_REG_FAN_MIN_LSB(i)); + + if (!(data->has_fan & (1 << i))) + continue; + data->fan_min[i] = + w83795_read(client, W83795_REG_FAN_MIN_HL(i)) << 4; + data->fan_min[i] |= + (lsb >> W83795_REG_FAN_MIN_LSB_SHIFT(i)) & 0x0F; + } + + /* Read the temperature limits */ + for (i = 0; i < ARRAY_SIZE(data->temp); i++) { + if (!(data->has_temp & (1 << i))) + continue; + for (limit = TEMP_CRIT; limit <= TEMP_WARN_HYST; limit++) + data->temp[i][limit] = + w83795_read(client, W83795_REG_TEMP[i][limit]); + } + + /* Read the DTS limits */ + if (data->enable_dts) { + for (limit = DTS_CRIT; limit <= DTS_WARN_HYST; limit++) + data->dts_ext[limit] = + w83795_read(client, W83795_REG_DTS_EXT(limit)); + } + + /* Read beep settings */ + if (data->enable_beep) { + for (i = 0; i < ARRAY_SIZE(data->beeps); i++) + data->beeps[i] = + w83795_read(client, W83795_REG_BEEP(i)); + } + + data->valid_limits = 1; +} + +static struct w83795_data *w83795_update_pwm_config(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct w83795_data *data = i2c_get_clientdata(client); + int i, tmp; + + mutex_lock(&data->update_lock); + + if (data->valid_pwm_config) + goto END; + + /* Read temperature source selection */ + for (i = 0; i < ARRAY_SIZE(data->temp_src); i++) + data->temp_src[i] = w83795_read(client, W83795_REG_TSS(i)); + + /* Read automatic fan speed control settings */ + data->pwm_fcms[0] = w83795_read(client, W83795_REG_FCMS1); + data->pwm_fcms[1] = w83795_read(client, W83795_REG_FCMS2); + for (i = 0; i < ARRAY_SIZE(data->pwm_tfmr); i++) + data->pwm_tfmr[i] = w83795_read(client, W83795_REG_TFMR(i)); + data->pwm_fomc = w83795_read(client, W83795_REG_FOMC); + for (i = 0; i < data->has_pwm; i++) { + for (tmp = PWM_FREQ; tmp <= PWM_STOP_TIME; tmp++) + data->pwm[i][tmp] = + w83795_read(client, W83795_REG_PWM(i, tmp)); + } + for (i = 0; i < ARRAY_SIZE(data->target_speed); i++) { + data->target_speed[i] = + w83795_read(client, W83795_REG_FTSH(i)) << 4; + data->target_speed[i] |= + w83795_read(client, W83795_REG_FTSL(i)) >> 4; + } + data->tol_speed = w83795_read(client, W83795_REG_TFTS) & 0x3f; + + for (i = 0; i < ARRAY_SIZE(data->pwm_temp); i++) { + data->pwm_temp[i][TEMP_PWM_TTTI] = + w83795_read(client, W83795_REG_TTTI(i)) & 0x7f; + data->pwm_temp[i][TEMP_PWM_CTFS] = + w83795_read(client, W83795_REG_CTFS(i)); + tmp = w83795_read(client, W83795_REG_HT(i)); + data->pwm_temp[i][TEMP_PWM_HCT] = tmp >> 4; + data->pwm_temp[i][TEMP_PWM_HOT] = tmp & 0x0f; + } + + /* Read SmartFanIV trip points */ + for (i = 0; i < ARRAY_SIZE(data->sf4_reg); i++) { + for (tmp = 0; tmp < 7; tmp++) { + data->sf4_reg[i][SF4_TEMP][tmp] = + w83795_read(client, + W83795_REG_SF4_TEMP(i, tmp)); + data->sf4_reg[i][SF4_PWM][tmp] = + w83795_read(client, W83795_REG_SF4_PWM(i, tmp)); + } + } + + /* Read setup PWM */ + for (i = 0; i < ARRAY_SIZE(data->setup_pwm); i++) + data->setup_pwm[i] = + w83795_read(client, W83795_REG_SETUP_PWM(i)); + + data->valid_pwm_config = 1; + +END: + mutex_unlock(&data->update_lock); + return data; +} + +static struct w83795_data *w83795_update_device(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct w83795_data *data = i2c_get_clientdata(client); + u16 tmp; + u8 intrusion; + int i; + + mutex_lock(&data->update_lock); + + if (!data->valid_limits) + w83795_update_limits(client); + + if (!(time_after(jiffies, data->last_updated + HZ * 2) + || !data->valid)) + goto END; + + /* Update the voltages value */ + for (i = 0; i < ARRAY_SIZE(data->in); i++) { + if (!(data->has_in & (1 << i))) + continue; + tmp = w83795_read(client, W83795_REG_IN[i][IN_READ]) << 2; + tmp |= w83795_read(client, W83795_REG_VRLSB) >> 6; + data->in[i][IN_READ] = tmp; + } + + /* in0-2 can have dynamic limits (W83795G only) */ + if (data->has_dyn_in) { + u8 lsb_max = w83795_read(client, IN_LSB_REG(0, IN_MAX)); + u8 lsb_low = w83795_read(client, IN_LSB_REG(0, IN_LOW)); + + for (i = 0; i < 3; i++) { + if (!(data->has_dyn_in & (1 << i))) + continue; + data->in[i][IN_MAX] = + w83795_read(client, W83795_REG_IN[i][IN_MAX]); + data->in[i][IN_LOW] = + w83795_read(client, W83795_REG_IN[i][IN_LOW]); + data->in_lsb[i][IN_MAX] = (lsb_max >> (2 * i)) & 0x03; + data->in_lsb[i][IN_LOW] = (lsb_low >> (2 * i)) & 0x03; + } + } + + /* Update fan */ + for (i = 0; i < ARRAY_SIZE(data->fan); i++) { + if (!(data->has_fan & (1 << i))) + continue; + data->fan[i] = w83795_read(client, W83795_REG_FAN(i)) << 4; + data->fan[i] |= w83795_read(client, W83795_REG_VRLSB) >> 4; + } + + /* Update temperature */ + for (i = 0; i < ARRAY_SIZE(data->temp); i++) { + data->temp[i][TEMP_READ] = + w83795_read(client, W83795_REG_TEMP[i][TEMP_READ]); + data->temp_read_vrlsb[i] = + w83795_read(client, W83795_REG_VRLSB); + } + + /* Update dts temperature */ + if (data->enable_dts) { + for (i = 0; i < ARRAY_SIZE(data->dts); i++) { + if (!(data->has_dts & (1 << i))) + continue; + data->dts[i] = + w83795_read(client, W83795_REG_DTS(i)); + data->dts_read_vrlsb[i] = + w83795_read(client, W83795_REG_VRLSB); + } + } + + /* Update pwm output */ + for (i = 0; i < data->has_pwm; i++) { + data->pwm[i][PWM_OUTPUT] = + w83795_read(client, W83795_REG_PWM(i, PWM_OUTPUT)); + } + + /* + * Update intrusion and alarms + * It is important to read intrusion first, because reading from + * register SMI STS6 clears the interrupt status temporarily. + */ + tmp = w83795_read(client, W83795_REG_ALARM_CTRL); + /* Switch to interrupt status for intrusion if needed */ + if (tmp & ALARM_CTRL_RTSACS) + w83795_write(client, W83795_REG_ALARM_CTRL, + tmp & ~ALARM_CTRL_RTSACS); + intrusion = w83795_read(client, W83795_REG_ALARM(5)) & (1 << 6); + /* Switch to real-time alarms */ + w83795_write(client, W83795_REG_ALARM_CTRL, tmp | ALARM_CTRL_RTSACS); + for (i = 0; i < ARRAY_SIZE(data->alarms); i++) + data->alarms[i] = w83795_read(client, W83795_REG_ALARM(i)); + data->alarms[5] |= intrusion; + /* Restore original configuration if needed */ + if (!(tmp & ALARM_CTRL_RTSACS)) + w83795_write(client, W83795_REG_ALARM_CTRL, + tmp & ~ALARM_CTRL_RTSACS); + + data->last_updated = jiffies; + data->valid = 1; + +END: + mutex_unlock(&data->update_lock); + return data; +} + +/* + * Sysfs attributes + */ + +#define ALARM_STATUS 0 +#define BEEP_ENABLE 1 +static ssize_t +show_alarm_beep(struct device *dev, struct device_attribute *attr, char *buf) +{ + struct w83795_data *data = w83795_update_device(dev); + struct sensor_device_attribute_2 *sensor_attr = + to_sensor_dev_attr_2(attr); + int nr = sensor_attr->nr; + int index = sensor_attr->index >> 3; + int bit = sensor_attr->index & 0x07; + u8 val; + + if (nr == ALARM_STATUS) + val = (data->alarms[index] >> bit) & 1; + else /* BEEP_ENABLE */ + val = (data->beeps[index] >> bit) & 1; + + return sprintf(buf, "%u\n", val); +} + +static ssize_t +store_beep(struct device *dev, struct device_attribute *attr, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + struct w83795_data *data = i2c_get_clientdata(client); + struct sensor_device_attribute_2 *sensor_attr = + to_sensor_dev_attr_2(attr); + int index = sensor_attr->index >> 3; + int shift = sensor_attr->index & 0x07; + u8 beep_bit = 1 << shift; + unsigned long val; + + if (kstrtoul(buf, 10, &val) < 0) + return -EINVAL; + if (val != 0 && val != 1) + return -EINVAL; + + mutex_lock(&data->update_lock); + data->beeps[index] = w83795_read(client, W83795_REG_BEEP(index)); + data->beeps[index] &= ~beep_bit; + data->beeps[index] |= val << shift; + w83795_write(client, W83795_REG_BEEP(index), data->beeps[index]); + mutex_unlock(&data->update_lock); + + return count; +} + +/* Write 0 to clear chassis alarm */ +static ssize_t +store_chassis_clear(struct device *dev, + struct device_attribute *attr, const char *buf, + size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + struct w83795_data *data = i2c_get_clientdata(client); + unsigned long val; + + if (kstrtoul(buf, 10, &val) < 0 || val != 0) + return -EINVAL; + + mutex_lock(&data->update_lock); + val = w83795_read(client, W83795_REG_CLR_CHASSIS); + val |= 0x80; + w83795_write(client, W83795_REG_CLR_CHASSIS, val); + + /* Clear status and force cache refresh */ + w83795_read(client, W83795_REG_ALARM(5)); + data->valid = 0; + mutex_unlock(&data->update_lock); + return count; +} + +#define FAN_INPUT 0 +#define FAN_MIN 1 +static ssize_t +show_fan(struct device *dev, struct device_attribute *attr, char *buf) +{ + struct sensor_device_attribute_2 *sensor_attr = + to_sensor_dev_attr_2(attr); + int nr = sensor_attr->nr; + int index = sensor_attr->index; + struct w83795_data *data = w83795_update_device(dev); + u16 val; + + if (nr == FAN_INPUT) + val = data->fan[index] & 0x0fff; + else + val = data->fan_min[index] & 0x0fff; + + return sprintf(buf, "%lu\n", fan_from_reg(val)); +} + +static ssize_t +store_fan_min(struct device *dev, struct device_attribute *attr, + const char *buf, size_t count) +{ + struct sensor_device_attribute_2 *sensor_attr = + to_sensor_dev_attr_2(attr); + int index = sensor_attr->index; + struct i2c_client *client = to_i2c_client(dev); + struct w83795_data *data = i2c_get_clientdata(client); + unsigned long val; + + if (kstrtoul(buf, 10, &val)) + return -EINVAL; + val = fan_to_reg(val); + + mutex_lock(&data->update_lock); + data->fan_min[index] = val; + w83795_write(client, W83795_REG_FAN_MIN_HL(index), (val >> 4) & 0xff); + val &= 0x0f; + if (index & 1) { + val <<= 4; + val |= w83795_read(client, W83795_REG_FAN_MIN_LSB(index)) + & 0x0f; + } else { + val |= w83795_read(client, W83795_REG_FAN_MIN_LSB(index)) + & 0xf0; + } + w83795_write(client, W83795_REG_FAN_MIN_LSB(index), val & 0xff); + mutex_unlock(&data->update_lock); + + return count; +} + +static ssize_t +show_pwm(struct device *dev, struct device_attribute *attr, char *buf) +{ + struct w83795_data *data; + struct sensor_device_attribute_2 *sensor_attr = + to_sensor_dev_attr_2(attr); + int nr = sensor_attr->nr; + int index = sensor_attr->index; + unsigned int val; + + data = nr == PWM_OUTPUT ? w83795_update_device(dev) + : w83795_update_pwm_config(dev); + + switch (nr) { + case PWM_STOP_TIME: + val = time_from_reg(data->pwm[index][nr]); + break; + case PWM_FREQ: + val = pwm_freq_from_reg(data->pwm[index][nr], data->clkin); + break; + default: + val = data->pwm[index][nr]; + break; + } + + return sprintf(buf, "%u\n", val); +} + +static ssize_t +store_pwm(struct device *dev, struct device_attribute *attr, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + struct w83795_data *data = i2c_get_clientdata(client); + struct sensor_device_attribute_2 *sensor_attr = + to_sensor_dev_attr_2(attr); + int nr = sensor_attr->nr; + int index = sensor_attr->index; + unsigned long val; + + if (kstrtoul(buf, 10, &val) < 0) + return -EINVAL; + + mutex_lock(&data->update_lock); + switch (nr) { + case PWM_STOP_TIME: + val = time_to_reg(val); + break; + case PWM_FREQ: + val = pwm_freq_to_reg(val, data->clkin); + break; + default: + val = clamp_val(val, 0, 0xff); + break; + } + w83795_write(client, W83795_REG_PWM(index, nr), val); + data->pwm[index][nr] = val; + mutex_unlock(&data->update_lock); + return count; +} + +static ssize_t +show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf) +{ + struct sensor_device_attribute_2 *sensor_attr = + to_sensor_dev_attr_2(attr); + struct w83795_data *data = w83795_update_pwm_config(dev); + int index = sensor_attr->index; + u8 tmp; + + /* Speed cruise mode */ + if (data->pwm_fcms[0] & (1 << index)) { + tmp = 2; + goto out; + } + /* Thermal cruise or SmartFan IV mode */ + for (tmp = 0; tmp < 6; tmp++) { + if (data->pwm_tfmr[tmp] & (1 << index)) { + tmp = 3; + goto out; + } + } + /* Manual mode */ + tmp = 1; + +out: + return sprintf(buf, "%u\n", tmp); +} + +static ssize_t +store_pwm_enable(struct device *dev, struct device_attribute *attr, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + struct w83795_data *data = w83795_update_pwm_config(dev); + struct sensor_device_attribute_2 *sensor_attr = + to_sensor_dev_attr_2(attr); + int index = sensor_attr->index; + unsigned long val; + int i; + + if (kstrtoul(buf, 10, &val) < 0) + return -EINVAL; + if (val < 1 || val > 2) + return -EINVAL; + +#ifndef CONFIG_SENSORS_W83795_FANCTRL + if (val > 1) { + dev_warn(dev, "Automatic fan speed control support disabled\n"); + dev_warn(dev, "Build with CONFIG_SENSORS_W83795_FANCTRL=y if you want it\n"); + return -EOPNOTSUPP; + } +#endif + + mutex_lock(&data->update_lock); + switch (val) { + case 1: + /* Clear speed cruise mode bits */ + data->pwm_fcms[0] &= ~(1 << index); + w83795_write(client, W83795_REG_FCMS1, data->pwm_fcms[0]); + /* Clear thermal cruise mode bits */ + for (i = 0; i < 6; i++) { + data->pwm_tfmr[i] &= ~(1 << index); + w83795_write(client, W83795_REG_TFMR(i), + data->pwm_tfmr[i]); + } + break; + case 2: + data->pwm_fcms[0] |= (1 << index); + w83795_write(client, W83795_REG_FCMS1, data->pwm_fcms[0]); + break; + } + mutex_unlock(&data->update_lock); + return count; +} + +static ssize_t +show_pwm_mode(struct device *dev, struct device_attribute *attr, char *buf) +{ + struct w83795_data *data = w83795_update_pwm_config(dev); + int index = to_sensor_dev_attr_2(attr)->index; + unsigned int mode; + + if (data->pwm_fomc & (1 << index)) + mode = 0; /* DC */ + else + mode = 1; /* PWM */ + + return sprintf(buf, "%u\n", mode); +} + +/* + * Check whether a given temperature source can ever be useful. + * Returns the number of selectable temperature channels which are + * enabled. + */ +static int w83795_tss_useful(const struct w83795_data *data, int tsrc) +{ + int useful = 0, i; + + for (i = 0; i < 4; i++) { + if (tss_map[i][tsrc] == TSS_MAP_RESERVED) + continue; + if (tss_map[i][tsrc] < 6) /* Analog */ + useful += (data->has_temp >> tss_map[i][tsrc]) & 1; + else /* Digital */ + useful += (data->has_dts >> (tss_map[i][tsrc] - 6)) & 1; + } + + return useful; +} + +static ssize_t +show_temp_src(struct device *dev, struct device_attribute *attr, char *buf) +{ + struct sensor_device_attribute_2 *sensor_attr = + to_sensor_dev_attr_2(attr); + struct w83795_data *data = w83795_update_pwm_config(dev); + int index = sensor_attr->index; + u8 tmp = data->temp_src[index / 2]; + + if (index & 1) + tmp >>= 4; /* Pick high nibble */ + else + tmp &= 0x0f; /* Pick low nibble */ + + /* Look-up the actual temperature channel number */ + if (tmp >= 4 || tss_map[tmp][index] == TSS_MAP_RESERVED) + return -EINVAL; /* Shouldn't happen */ + + return sprintf(buf, "%u\n", (unsigned int)tss_map[tmp][index] + 1); +} + +static ssize_t +store_temp_src(struct device *dev, struct device_attribute *attr, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + struct w83795_data *data = w83795_update_pwm_config(dev); + struct sensor_device_attribute_2 *sensor_attr = + to_sensor_dev_attr_2(attr); + int index = sensor_attr->index; + int tmp; + unsigned long channel; + u8 val = index / 2; + + if (kstrtoul(buf, 10, &channel) < 0 || + channel < 1 || channel > 14) + return -EINVAL; + + /* Check if request can be fulfilled */ + for (tmp = 0; tmp < 4; tmp++) { + if (tss_map[tmp][index] == channel - 1) + break; + } + if (tmp == 4) /* No match */ + return -EINVAL; + + mutex_lock(&data->update_lock); + if (index & 1) { + tmp <<= 4; + data->temp_src[val] &= 0x0f; + } else { + data->temp_src[val] &= 0xf0; + } + data->temp_src[val] |= tmp; + w83795_write(client, W83795_REG_TSS(val), data->temp_src[val]); + mutex_unlock(&data->update_lock); + + return count; +} + +#define TEMP_PWM_ENABLE 0 +#define TEMP_PWM_FAN_MAP 1 +static ssize_t +show_temp_pwm_enable(struct device *dev, struct device_attribute *attr, + char *buf) +{ + struct w83795_data *data = w83795_update_pwm_config(dev); + struct sensor_device_attribute_2 *sensor_attr = + to_sensor_dev_attr_2(attr); + int nr = sensor_attr->nr; + int index = sensor_attr->index; + u8 tmp = 0xff; + + switch (nr) { + case TEMP_PWM_ENABLE: + tmp = (data->pwm_fcms[1] >> index) & 1; + if (tmp) + tmp = 4; + else + tmp = 3; + break; + case TEMP_PWM_FAN_MAP: + tmp = data->pwm_tfmr[index]; + break; + } + + return sprintf(buf, "%u\n", tmp); +} + +static ssize_t +store_temp_pwm_enable(struct device *dev, struct device_attribute *attr, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + struct w83795_data *data = w83795_update_pwm_config(dev); + struct sensor_device_attribute_2 *sensor_attr = + to_sensor_dev_attr_2(attr); + int nr = sensor_attr->nr; + int index = sensor_attr->index; + unsigned long tmp; + + if (kstrtoul(buf, 10, &tmp) < 0) + return -EINVAL; + + switch (nr) { + case TEMP_PWM_ENABLE: + if (tmp != 3 && tmp != 4) + return -EINVAL; + tmp -= 3; + mutex_lock(&data->update_lock); + data->pwm_fcms[1] &= ~(1 << index); + data->pwm_fcms[1] |= tmp << index; + w83795_write(client, W83795_REG_FCMS2, data->pwm_fcms[1]); + mutex_unlock(&data->update_lock); + break; + case TEMP_PWM_FAN_MAP: + mutex_lock(&data->update_lock); + tmp = clamp_val(tmp, 0, 0xff); + w83795_write(client, W83795_REG_TFMR(index), tmp); + data->pwm_tfmr[index] = tmp; + mutex_unlock(&data->update_lock); + break; + } + return count; +} + +#define FANIN_TARGET 0 +#define FANIN_TOL 1 +static ssize_t +show_fanin(struct device *dev, struct device_attribute *attr, char *buf) +{ + struct w83795_data *data = w83795_update_pwm_config(dev); + struct sensor_device_attribute_2 *sensor_attr = + to_sensor_dev_attr_2(attr); + int nr = sensor_attr->nr; + int index = sensor_attr->index; + u16 tmp = 0; + + switch (nr) { + case FANIN_TARGET: + tmp = fan_from_reg(data->target_speed[index]); + break; + case FANIN_TOL: + tmp = data->tol_speed; + break; + } + + return sprintf(buf, "%u\n", tmp); +} + +static ssize_t +store_fanin(struct device *dev, struct device_attribute *attr, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + struct w83795_data *data = i2c_get_clientdata(client); + struct sensor_device_attribute_2 *sensor_attr = + to_sensor_dev_attr_2(attr); + int nr = sensor_attr->nr; + int index = sensor_attr->index; + unsigned long val; + + if (kstrtoul(buf, 10, &val) < 0) + return -EINVAL; + + mutex_lock(&data->update_lock); + switch (nr) { + case FANIN_TARGET: + val = fan_to_reg(clamp_val(val, 0, 0xfff)); + w83795_write(client, W83795_REG_FTSH(index), val >> 4); + w83795_write(client, W83795_REG_FTSL(index), (val << 4) & 0xf0); + data->target_speed[index] = val; + break; + case FANIN_TOL: + val = clamp_val(val, 0, 0x3f); + w83795_write(client, W83795_REG_TFTS, val); + data->tol_speed = val; + break; + } + mutex_unlock(&data->update_lock); + + return count; +} + + +static ssize_t +show_temp_pwm(struct device *dev, struct device_attribute *attr, char *buf) +{ + struct w83795_data *data = w83795_update_pwm_config(dev); + struct sensor_device_attribute_2 *sensor_attr = + to_sensor_dev_attr_2(attr); + int nr = sensor_attr->nr; + int index = sensor_attr->index; + long tmp = temp_from_reg(data->pwm_temp[index][nr]); + + return sprintf(buf, "%ld\n", tmp); +} + +static ssize_t +store_temp_pwm(struct device *dev, struct device_attribute *attr, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + struct w83795_data *data = i2c_get_clientdata(client); + struct sensor_device_attribute_2 *sensor_attr = + to_sensor_dev_attr_2(attr); + int nr = sensor_attr->nr; + int index = sensor_attr->index; + unsigned long val; + u8 tmp; + + if (kstrtoul(buf, 10, &val) < 0) + return -EINVAL; + val /= 1000; + + mutex_lock(&data->update_lock); + switch (nr) { + case TEMP_PWM_TTTI: + val = clamp_val(val, 0, 0x7f); + w83795_write(client, W83795_REG_TTTI(index), val); + break; + case TEMP_PWM_CTFS: + val = clamp_val(val, 0, 0x7f); + w83795_write(client, W83795_REG_CTFS(index), val); + break; + case TEMP_PWM_HCT: + val = clamp_val(val, 0, 0x0f); + tmp = w83795_read(client, W83795_REG_HT(index)); + tmp &= 0x0f; + tmp |= (val << 4) & 0xf0; + w83795_write(client, W83795_REG_HT(index), tmp); + break; + case TEMP_PWM_HOT: + val = clamp_val(val, 0, 0x0f); + tmp = w83795_read(client, W83795_REG_HT(index)); + tmp &= 0xf0; + tmp |= val & 0x0f; + w83795_write(client, W83795_REG_HT(index), tmp); + break; + } + data->pwm_temp[index][nr] = val; + mutex_unlock(&data->update_lock); + + return count; +} + +static ssize_t +show_sf4_pwm(struct device *dev, struct device_attribute *attr, char *buf) +{ + struct w83795_data *data = w83795_update_pwm_config(dev); + struct sensor_device_attribute_2 *sensor_attr = + to_sensor_dev_attr_2(attr); + int nr = sensor_attr->nr; + int index = sensor_attr->index; + + return sprintf(buf, "%u\n", data->sf4_reg[index][SF4_PWM][nr]); +} + +static ssize_t +store_sf4_pwm(struct device *dev, struct device_attribute *attr, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + struct w83795_data *data = i2c_get_clientdata(client); + struct sensor_device_attribute_2 *sensor_attr = + to_sensor_dev_attr_2(attr); + int nr = sensor_attr->nr; + int index = sensor_attr->index; + unsigned long val; + + if (kstrtoul(buf, 10, &val) < 0) + return -EINVAL; + + mutex_lock(&data->update_lock); + w83795_write(client, W83795_REG_SF4_PWM(index, nr), val); + data->sf4_reg[index][SF4_PWM][nr] = val; + mutex_unlock(&data->update_lock); + + return count; +} + +static ssize_t +show_sf4_temp(struct device *dev, struct device_attribute *attr, char *buf) +{ + struct w83795_data *data = w83795_update_pwm_config(dev); + struct sensor_device_attribute_2 *sensor_attr = + to_sensor_dev_attr_2(attr); + int nr = sensor_attr->nr; + int index = sensor_attr->index; + + return sprintf(buf, "%u\n", + (data->sf4_reg[index][SF4_TEMP][nr]) * 1000); +} + +static ssize_t +store_sf4_temp(struct device *dev, struct device_attribute *attr, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + struct w83795_data *data = i2c_get_clientdata(client); + struct sensor_device_attribute_2 *sensor_attr = + to_sensor_dev_attr_2(attr); + int nr = sensor_attr->nr; + int index = sensor_attr->index; + unsigned long val; + + if (kstrtoul(buf, 10, &val) < 0) + return -EINVAL; + val /= 1000; + + mutex_lock(&data->update_lock); + w83795_write(client, W83795_REG_SF4_TEMP(index, nr), val); + data->sf4_reg[index][SF4_TEMP][nr] = val; + mutex_unlock(&data->update_lock); + + return count; +} + + +static ssize_t +show_temp(struct device *dev, struct device_attribute *attr, char *buf) +{ + struct sensor_device_attribute_2 *sensor_attr = + to_sensor_dev_attr_2(attr); + int nr = sensor_attr->nr; + int index = sensor_attr->index; + struct w83795_data *data = w83795_update_device(dev); + long temp = temp_from_reg(data->temp[index][nr]); + + if (nr == TEMP_READ) + temp += (data->temp_read_vrlsb[index] >> 6) * 250; + return sprintf(buf, "%ld\n", temp); +} + +static ssize_t +store_temp(struct device *dev, struct device_attribute *attr, + const char *buf, size_t count) +{ + struct sensor_device_attribute_2 *sensor_attr = + to_sensor_dev_attr_2(attr); + int nr = sensor_attr->nr; + int index = sensor_attr->index; + struct i2c_client *client = to_i2c_client(dev); + struct w83795_data *data = i2c_get_clientdata(client); + long tmp; + + if (kstrtol(buf, 10, &tmp) < 0) + return -EINVAL; + + mutex_lock(&data->update_lock); + data->temp[index][nr] = temp_to_reg(tmp, -128, 127); + w83795_write(client, W83795_REG_TEMP[index][nr], data->temp[index][nr]); + mutex_unlock(&data->update_lock); + return count; +} + + +static ssize_t +show_dts_mode(struct device *dev, struct device_attribute *attr, char *buf) +{ + struct w83795_data *data = dev_get_drvdata(dev); + int tmp; + + if (data->enable_dts & 2) + tmp = 5; + else + tmp = 6; + + return sprintf(buf, "%d\n", tmp); +} + +static ssize_t +show_dts(struct device *dev, struct device_attribute *attr, char *buf) +{ + struct sensor_device_attribute_2 *sensor_attr = + to_sensor_dev_attr_2(attr); + int index = sensor_attr->index; + struct w83795_data *data = w83795_update_device(dev); + long temp = temp_from_reg(data->dts[index]); + + temp += (data->dts_read_vrlsb[index] >> 6) * 250; + return sprintf(buf, "%ld\n", temp); +} + +static ssize_t +show_dts_ext(struct device *dev, struct device_attribute *attr, char *buf) +{ + struct sensor_device_attribute_2 *sensor_attr = + to_sensor_dev_attr_2(attr); + int nr = sensor_attr->nr; + struct w83795_data *data = dev_get_drvdata(dev); + long temp = temp_from_reg(data->dts_ext[nr]); + + return sprintf(buf, "%ld\n", temp); +} + +static ssize_t +store_dts_ext(struct device *dev, struct device_attribute *attr, + const char *buf, size_t count) +{ + struct sensor_device_attribute_2 *sensor_attr = + to_sensor_dev_attr_2(attr); + int nr = sensor_attr->nr; + struct i2c_client *client = to_i2c_client(dev); + struct w83795_data *data = i2c_get_clientdata(client); + long tmp; + + if (kstrtol(buf, 10, &tmp) < 0) + return -EINVAL; + + mutex_lock(&data->update_lock); + data->dts_ext[nr] = temp_to_reg(tmp, -128, 127); + w83795_write(client, W83795_REG_DTS_EXT(nr), data->dts_ext[nr]); + mutex_unlock(&data->update_lock); + return count; +} + + +static ssize_t +show_temp_mode(struct device *dev, struct device_attribute *attr, char *buf) +{ + struct w83795_data *data = dev_get_drvdata(dev); + struct sensor_device_attribute_2 *sensor_attr = + to_sensor_dev_attr_2(attr); + int index = sensor_attr->index; + int tmp; + + if (data->temp_mode & (1 << index)) + tmp = 3; /* Thermal diode */ + else + tmp = 4; /* Thermistor */ + + return sprintf(buf, "%d\n", tmp); +} + +/* Only for temp1-4 (temp5-6 can only be thermistor) */ +static ssize_t +store_temp_mode(struct device *dev, struct device_attribute *attr, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + struct w83795_data *data = i2c_get_clientdata(client); + struct sensor_device_attribute_2 *sensor_attr = + to_sensor_dev_attr_2(attr); + int index = sensor_attr->index; + int reg_shift; + unsigned long val; + u8 tmp; + + if (kstrtoul(buf, 10, &val) < 0) + return -EINVAL; + if ((val != 4) && (val != 3)) + return -EINVAL; + + mutex_lock(&data->update_lock); + if (val == 3) { + /* Thermal diode */ + val = 0x01; + data->temp_mode |= 1 << index; + } else if (val == 4) { + /* Thermistor */ + val = 0x03; + data->temp_mode &= ~(1 << index); + } + + reg_shift = 2 * index; + tmp = w83795_read(client, W83795_REG_TEMP_CTRL2); + tmp &= ~(0x03 << reg_shift); + tmp |= val << reg_shift; + w83795_write(client, W83795_REG_TEMP_CTRL2, tmp); + + mutex_unlock(&data->update_lock); + return count; +} + + +/* show/store VIN */ +static ssize_t +show_in(struct device *dev, struct device_attribute *attr, char *buf) +{ + struct sensor_device_attribute_2 *sensor_attr = + to_sensor_dev_attr_2(attr); + int nr = sensor_attr->nr; + int index = sensor_attr->index; + struct w83795_data *data = w83795_update_device(dev); + u16 val = data->in[index][nr]; + u8 lsb_idx; + + switch (nr) { + case IN_READ: + /* calculate this value again by sensors as sensors3.conf */ + if ((index >= 17) && + !((data->has_gain >> (index - 17)) & 1)) + val *= 8; + break; + case IN_MAX: + case IN_LOW: + lsb_idx = IN_LSB_SHIFT_IDX[index][IN_LSB_IDX]; + val <<= 2; + val |= (data->in_lsb[lsb_idx][nr] >> + IN_LSB_SHIFT_IDX[index][IN_LSB_SHIFT]) & 0x03; + if ((index >= 17) && + !((data->has_gain >> (index - 17)) & 1)) + val *= 8; + break; + } + val = in_from_reg(index, val); + + return sprintf(buf, "%d\n", val); +} + +static ssize_t +store_in(struct device *dev, struct device_attribute *attr, + const char *buf, size_t count) +{ + struct sensor_device_attribute_2 *sensor_attr = + to_sensor_dev_attr_2(attr); + int nr = sensor_attr->nr; + int index = sensor_attr->index; + struct i2c_client *client = to_i2c_client(dev); + struct w83795_data *data = i2c_get_clientdata(client); + unsigned long val; + u8 tmp; + u8 lsb_idx; + + if (kstrtoul(buf, 10, &val) < 0) + return -EINVAL; + val = in_to_reg(index, val); + + if ((index >= 17) && + !((data->has_gain >> (index - 17)) & 1)) + val /= 8; + val = clamp_val(val, 0, 0x3FF); + mutex_lock(&data->update_lock); + + lsb_idx = IN_LSB_SHIFT_IDX[index][IN_LSB_IDX]; + tmp = w83795_read(client, IN_LSB_REG(lsb_idx, nr)); + tmp &= ~(0x03 << IN_LSB_SHIFT_IDX[index][IN_LSB_SHIFT]); + tmp |= (val & 0x03) << IN_LSB_SHIFT_IDX[index][IN_LSB_SHIFT]; + w83795_write(client, IN_LSB_REG(lsb_idx, nr), tmp); + data->in_lsb[lsb_idx][nr] = tmp; + + tmp = (val >> 2) & 0xff; + w83795_write(client, W83795_REG_IN[index][nr], tmp); + data->in[index][nr] = tmp; + + mutex_unlock(&data->update_lock); + return count; +} + + +#ifdef CONFIG_SENSORS_W83795_FANCTRL +static ssize_t +show_sf_setup(struct device *dev, struct device_attribute *attr, char *buf) +{ + struct sensor_device_attribute_2 *sensor_attr = + to_sensor_dev_attr_2(attr); + int nr = sensor_attr->nr; + struct w83795_data *data = w83795_update_pwm_config(dev); + u16 val = data->setup_pwm[nr]; + + switch (nr) { + case SETUP_PWM_UPTIME: + case SETUP_PWM_DOWNTIME: + val = time_from_reg(val); + break; + } + + return sprintf(buf, "%d\n", val); +} + +static ssize_t +store_sf_setup(struct device *dev, struct device_attribute *attr, + const char *buf, size_t count) +{ + struct sensor_device_attribute_2 *sensor_attr = + to_sensor_dev_attr_2(attr); + int nr = sensor_attr->nr; + struct i2c_client *client = to_i2c_client(dev); + struct w83795_data *data = i2c_get_clientdata(client); + unsigned long val; + + if (kstrtoul(buf, 10, &val) < 0) + return -EINVAL; + + switch (nr) { + case SETUP_PWM_DEFAULT: + val = clamp_val(val, 0, 0xff); + break; + case SETUP_PWM_UPTIME: + case SETUP_PWM_DOWNTIME: + val = time_to_reg(val); + if (val == 0) + return -EINVAL; + break; + } + + mutex_lock(&data->update_lock); + data->setup_pwm[nr] = val; + w83795_write(client, W83795_REG_SETUP_PWM(nr), val); + mutex_unlock(&data->update_lock); + return count; +} +#endif + + +#define NOT_USED -1 + +/* + * Don't change the attribute order, _max, _min and _beep are accessed by index + * somewhere else in the code + */ +#define SENSOR_ATTR_IN(index) { \ + SENSOR_ATTR_2(in##index##_input, S_IRUGO, show_in, NULL, \ + IN_READ, index), \ + SENSOR_ATTR_2(in##index##_max, S_IRUGO | S_IWUSR, show_in, \ + store_in, IN_MAX, index), \ + SENSOR_ATTR_2(in##index##_min, S_IRUGO | S_IWUSR, show_in, \ + store_in, IN_LOW, index), \ + SENSOR_ATTR_2(in##index##_alarm, S_IRUGO, show_alarm_beep, \ + NULL, ALARM_STATUS, index + ((index > 14) ? 1 : 0)), \ + SENSOR_ATTR_2(in##index##_beep, S_IWUSR | S_IRUGO, \ + show_alarm_beep, store_beep, BEEP_ENABLE, \ + index + ((index > 14) ? 1 : 0)) } + +/* + * Don't change the attribute order, _beep is accessed by index + * somewhere else in the code + */ +#define SENSOR_ATTR_FAN(index) { \ + SENSOR_ATTR_2(fan##index##_input, S_IRUGO, show_fan, \ + NULL, FAN_INPUT, index - 1), \ + SENSOR_ATTR_2(fan##index##_min, S_IWUSR | S_IRUGO, \ + show_fan, store_fan_min, FAN_MIN, index - 1), \ + SENSOR_ATTR_2(fan##index##_alarm, S_IRUGO, show_alarm_beep, \ + NULL, ALARM_STATUS, index + 31), \ + SENSOR_ATTR_2(fan##index##_beep, S_IWUSR | S_IRUGO, \ + show_alarm_beep, store_beep, BEEP_ENABLE, index + 31) } + +#define SENSOR_ATTR_PWM(index) { \ + SENSOR_ATTR_2(pwm##index, S_IWUSR | S_IRUGO, show_pwm, \ + store_pwm, PWM_OUTPUT, index - 1), \ + SENSOR_ATTR_2(pwm##index##_enable, S_IWUSR | S_IRUGO, \ + show_pwm_enable, store_pwm_enable, NOT_USED, index - 1), \ + SENSOR_ATTR_2(pwm##index##_mode, S_IRUGO, \ + show_pwm_mode, NULL, NOT_USED, index - 1), \ + SENSOR_ATTR_2(pwm##index##_freq, S_IWUSR | S_IRUGO, \ + show_pwm, store_pwm, PWM_FREQ, index - 1), \ + SENSOR_ATTR_2(pwm##index##_nonstop, S_IWUSR | S_IRUGO, \ + show_pwm, store_pwm, PWM_NONSTOP, index - 1), \ + SENSOR_ATTR_2(pwm##index##_start, S_IWUSR | S_IRUGO, \ + show_pwm, store_pwm, PWM_START, index - 1), \ + SENSOR_ATTR_2(pwm##index##_stop_time, S_IWUSR | S_IRUGO, \ + show_pwm, store_pwm, PWM_STOP_TIME, index - 1), \ + SENSOR_ATTR_2(fan##index##_target, S_IWUSR | S_IRUGO, \ + show_fanin, store_fanin, FANIN_TARGET, index - 1) } + +/* + * Don't change the attribute order, _beep is accessed by index + * somewhere else in the code + */ +#define SENSOR_ATTR_DTS(index) { \ + SENSOR_ATTR_2(temp##index##_type, S_IRUGO , \ + show_dts_mode, NULL, NOT_USED, index - 7), \ + SENSOR_ATTR_2(temp##index##_input, S_IRUGO, show_dts, \ + NULL, NOT_USED, index - 7), \ + SENSOR_ATTR_2(temp##index##_crit, S_IRUGO | S_IWUSR, show_dts_ext, \ + store_dts_ext, DTS_CRIT, NOT_USED), \ + SENSOR_ATTR_2(temp##index##_crit_hyst, S_IRUGO | S_IWUSR, \ + show_dts_ext, store_dts_ext, DTS_CRIT_HYST, NOT_USED), \ + SENSOR_ATTR_2(temp##index##_max, S_IRUGO | S_IWUSR, show_dts_ext, \ + store_dts_ext, DTS_WARN, NOT_USED), \ + SENSOR_ATTR_2(temp##index##_max_hyst, S_IRUGO | S_IWUSR, \ + show_dts_ext, store_dts_ext, DTS_WARN_HYST, NOT_USED), \ + SENSOR_ATTR_2(temp##index##_alarm, S_IRUGO, \ + show_alarm_beep, NULL, ALARM_STATUS, index + 17), \ + SENSOR_ATTR_2(temp##index##_beep, S_IWUSR | S_IRUGO, \ + show_alarm_beep, store_beep, BEEP_ENABLE, index + 17) } + +/* + * Don't change the attribute order, _beep is accessed by index + * somewhere else in the code + */ +#define SENSOR_ATTR_TEMP(index) { \ + SENSOR_ATTR_2(temp##index##_type, S_IRUGO | (index < 4 ? S_IWUSR : 0), \ + show_temp_mode, store_temp_mode, NOT_USED, index - 1), \ + SENSOR_ATTR_2(temp##index##_input, S_IRUGO, show_temp, \ + NULL, TEMP_READ, index - 1), \ + SENSOR_ATTR_2(temp##index##_crit, S_IRUGO | S_IWUSR, show_temp, \ + store_temp, TEMP_CRIT, index - 1), \ + SENSOR_ATTR_2(temp##index##_crit_hyst, S_IRUGO | S_IWUSR, \ + show_temp, store_temp, TEMP_CRIT_HYST, index - 1), \ + SENSOR_ATTR_2(temp##index##_max, S_IRUGO | S_IWUSR, show_temp, \ + store_temp, TEMP_WARN, index - 1), \ + SENSOR_ATTR_2(temp##index##_max_hyst, S_IRUGO | S_IWUSR, \ + show_temp, store_temp, TEMP_WARN_HYST, index - 1), \ + SENSOR_ATTR_2(temp##index##_alarm, S_IRUGO, \ + show_alarm_beep, NULL, ALARM_STATUS, \ + index + (index > 4 ? 11 : 17)), \ + SENSOR_ATTR_2(temp##index##_beep, S_IWUSR | S_IRUGO, \ + show_alarm_beep, store_beep, BEEP_ENABLE, \ + index + (index > 4 ? 11 : 17)), \ + SENSOR_ATTR_2(temp##index##_pwm_enable, S_IWUSR | S_IRUGO, \ + show_temp_pwm_enable, store_temp_pwm_enable, \ + TEMP_PWM_ENABLE, index - 1), \ + SENSOR_ATTR_2(temp##index##_auto_channels_pwm, S_IWUSR | S_IRUGO, \ + show_temp_pwm_enable, store_temp_pwm_enable, \ + TEMP_PWM_FAN_MAP, index - 1), \ + SENSOR_ATTR_2(thermal_cruise##index, S_IWUSR | S_IRUGO, \ + show_temp_pwm, store_temp_pwm, TEMP_PWM_TTTI, index - 1), \ + SENSOR_ATTR_2(temp##index##_warn, S_IWUSR | S_IRUGO, \ + show_temp_pwm, store_temp_pwm, TEMP_PWM_CTFS, index - 1), \ + SENSOR_ATTR_2(temp##index##_warn_hyst, S_IWUSR | S_IRUGO, \ + show_temp_pwm, store_temp_pwm, TEMP_PWM_HCT, index - 1), \ + SENSOR_ATTR_2(temp##index##_operation_hyst, S_IWUSR | S_IRUGO, \ + show_temp_pwm, store_temp_pwm, TEMP_PWM_HOT, index - 1), \ + SENSOR_ATTR_2(temp##index##_auto_point1_pwm, S_IRUGO | S_IWUSR, \ + show_sf4_pwm, store_sf4_pwm, 0, index - 1), \ + SENSOR_ATTR_2(temp##index##_auto_point2_pwm, S_IRUGO | S_IWUSR, \ + show_sf4_pwm, store_sf4_pwm, 1, index - 1), \ + SENSOR_ATTR_2(temp##index##_auto_point3_pwm, S_IRUGO | S_IWUSR, \ + show_sf4_pwm, store_sf4_pwm, 2, index - 1), \ + SENSOR_ATTR_2(temp##index##_auto_point4_pwm, S_IRUGO | S_IWUSR, \ + show_sf4_pwm, store_sf4_pwm, 3, index - 1), \ + SENSOR_ATTR_2(temp##index##_auto_point5_pwm, S_IRUGO | S_IWUSR, \ + show_sf4_pwm, store_sf4_pwm, 4, index - 1), \ + SENSOR_ATTR_2(temp##index##_auto_point6_pwm, S_IRUGO | S_IWUSR, \ + show_sf4_pwm, store_sf4_pwm, 5, index - 1), \ + SENSOR_ATTR_2(temp##index##_auto_point7_pwm, S_IRUGO | S_IWUSR, \ + show_sf4_pwm, store_sf4_pwm, 6, index - 1), \ + SENSOR_ATTR_2(temp##index##_auto_point1_temp, S_IRUGO | S_IWUSR,\ + show_sf4_temp, store_sf4_temp, 0, index - 1), \ + SENSOR_ATTR_2(temp##index##_auto_point2_temp, S_IRUGO | S_IWUSR,\ + show_sf4_temp, store_sf4_temp, 1, index - 1), \ + SENSOR_ATTR_2(temp##index##_auto_point3_temp, S_IRUGO | S_IWUSR,\ + show_sf4_temp, store_sf4_temp, 2, index - 1), \ + SENSOR_ATTR_2(temp##index##_auto_point4_temp, S_IRUGO | S_IWUSR,\ + show_sf4_temp, store_sf4_temp, 3, index - 1), \ + SENSOR_ATTR_2(temp##index##_auto_point5_temp, S_IRUGO | S_IWUSR,\ + show_sf4_temp, store_sf4_temp, 4, index - 1), \ + SENSOR_ATTR_2(temp##index##_auto_point6_temp, S_IRUGO | S_IWUSR,\ + show_sf4_temp, store_sf4_temp, 5, index - 1), \ + SENSOR_ATTR_2(temp##index##_auto_point7_temp, S_IRUGO | S_IWUSR,\ + show_sf4_temp, store_sf4_temp, 6, index - 1) } + + +static struct sensor_device_attribute_2 w83795_in[][5] = { + SENSOR_ATTR_IN(0), + SENSOR_ATTR_IN(1), + SENSOR_ATTR_IN(2), + SENSOR_ATTR_IN(3), + SENSOR_ATTR_IN(4), + SENSOR_ATTR_IN(5), + SENSOR_ATTR_IN(6), + SENSOR_ATTR_IN(7), + SENSOR_ATTR_IN(8), + SENSOR_ATTR_IN(9), + SENSOR_ATTR_IN(10), + SENSOR_ATTR_IN(11), + SENSOR_ATTR_IN(12), + SENSOR_ATTR_IN(13), + SENSOR_ATTR_IN(14), + SENSOR_ATTR_IN(15), + SENSOR_ATTR_IN(16), + SENSOR_ATTR_IN(17), + SENSOR_ATTR_IN(18), + SENSOR_ATTR_IN(19), + SENSOR_ATTR_IN(20), +}; + +static const struct sensor_device_attribute_2 w83795_fan[][4] = { + SENSOR_ATTR_FAN(1), + SENSOR_ATTR_FAN(2), + SENSOR_ATTR_FAN(3), + SENSOR_ATTR_FAN(4), + SENSOR_ATTR_FAN(5), + SENSOR_ATTR_FAN(6), + SENSOR_ATTR_FAN(7), + SENSOR_ATTR_FAN(8), + SENSOR_ATTR_FAN(9), + SENSOR_ATTR_FAN(10), + SENSOR_ATTR_FAN(11), + SENSOR_ATTR_FAN(12), + SENSOR_ATTR_FAN(13), + SENSOR_ATTR_FAN(14), +}; + +static const struct sensor_device_attribute_2 w83795_temp[][28] = { + SENSOR_ATTR_TEMP(1), + SENSOR_ATTR_TEMP(2), + SENSOR_ATTR_TEMP(3), + SENSOR_ATTR_TEMP(4), + SENSOR_ATTR_TEMP(5), + SENSOR_ATTR_TEMP(6), +}; + +static const struct sensor_device_attribute_2 w83795_dts[][8] = { + SENSOR_ATTR_DTS(7), + SENSOR_ATTR_DTS(8), + SENSOR_ATTR_DTS(9), + SENSOR_ATTR_DTS(10), + SENSOR_ATTR_DTS(11), + SENSOR_ATTR_DTS(12), + SENSOR_ATTR_DTS(13), + SENSOR_ATTR_DTS(14), +}; + +static const struct sensor_device_attribute_2 w83795_pwm[][8] = { + SENSOR_ATTR_PWM(1), + SENSOR_ATTR_PWM(2), + SENSOR_ATTR_PWM(3), + SENSOR_ATTR_PWM(4), + SENSOR_ATTR_PWM(5), + SENSOR_ATTR_PWM(6), + SENSOR_ATTR_PWM(7), + SENSOR_ATTR_PWM(8), +}; + +static const struct sensor_device_attribute_2 w83795_tss[6] = { + SENSOR_ATTR_2(temp1_source_sel, S_IWUSR | S_IRUGO, + show_temp_src, store_temp_src, NOT_USED, 0), + SENSOR_ATTR_2(temp2_source_sel, S_IWUSR | S_IRUGO, + show_temp_src, store_temp_src, NOT_USED, 1), + SENSOR_ATTR_2(temp3_source_sel, S_IWUSR | S_IRUGO, + show_temp_src, store_temp_src, NOT_USED, 2), + SENSOR_ATTR_2(temp4_source_sel, S_IWUSR | S_IRUGO, + show_temp_src, store_temp_src, NOT_USED, 3), + SENSOR_ATTR_2(temp5_source_sel, S_IWUSR | S_IRUGO, + show_temp_src, store_temp_src, NOT_USED, 4), + SENSOR_ATTR_2(temp6_source_sel, S_IWUSR | S_IRUGO, + show_temp_src, store_temp_src, NOT_USED, 5), +}; + +static const struct sensor_device_attribute_2 sda_single_files[] = { + SENSOR_ATTR_2(intrusion0_alarm, S_IWUSR | S_IRUGO, show_alarm_beep, + store_chassis_clear, ALARM_STATUS, 46), +#ifdef CONFIG_SENSORS_W83795_FANCTRL + SENSOR_ATTR_2(speed_cruise_tolerance, S_IWUSR | S_IRUGO, show_fanin, + store_fanin, FANIN_TOL, NOT_USED), + SENSOR_ATTR_2(pwm_default, S_IWUSR | S_IRUGO, show_sf_setup, + store_sf_setup, SETUP_PWM_DEFAULT, NOT_USED), + SENSOR_ATTR_2(pwm_uptime, S_IWUSR | S_IRUGO, show_sf_setup, + store_sf_setup, SETUP_PWM_UPTIME, NOT_USED), + SENSOR_ATTR_2(pwm_downtime, S_IWUSR | S_IRUGO, show_sf_setup, + store_sf_setup, SETUP_PWM_DOWNTIME, NOT_USED), +#endif +}; + +static const struct sensor_device_attribute_2 sda_beep_files[] = { + SENSOR_ATTR_2(intrusion0_beep, S_IWUSR | S_IRUGO, show_alarm_beep, + store_beep, BEEP_ENABLE, 46), + SENSOR_ATTR_2(beep_enable, S_IWUSR | S_IRUGO, show_alarm_beep, + store_beep, BEEP_ENABLE, 47), +}; + +/* + * Driver interface + */ + +static void w83795_init_client(struct i2c_client *client) +{ + struct w83795_data *data = i2c_get_clientdata(client); + static const u16 clkin[4] = { /* in kHz */ + 14318, 24000, 33333, 48000 + }; + u8 config; + + if (reset) + w83795_write(client, W83795_REG_CONFIG, 0x80); + + /* Start monitoring if needed */ + config = w83795_read(client, W83795_REG_CONFIG); + if (!(config & W83795_REG_CONFIG_START)) { + dev_info(&client->dev, "Enabling monitoring operations\n"); + w83795_write(client, W83795_REG_CONFIG, + config | W83795_REG_CONFIG_START); + } + + data->clkin = clkin[(config >> 3) & 0x3]; + dev_dbg(&client->dev, "clkin = %u kHz\n", data->clkin); +} + +static int w83795_get_device_id(struct i2c_client *client) +{ + int device_id; + + device_id = i2c_smbus_read_byte_data(client, W83795_REG_DEVICEID); + + /* + * Special case for rev. A chips; can't be checked first because later + * revisions emulate this for compatibility + */ + if (device_id < 0 || (device_id & 0xf0) != 0x50) { + int alt_id; + + alt_id = i2c_smbus_read_byte_data(client, + W83795_REG_DEVICEID_A); + if (alt_id == 0x50) + device_id = alt_id; + } + + return device_id; +} + +/* Return 0 if detection is successful, -ENODEV otherwise */ +static int w83795_detect(struct i2c_client *client, + struct i2c_board_info *info) +{ + int bank, vendor_id, device_id, expected, i2c_addr, config; + struct i2c_adapter *adapter = client->adapter; + unsigned short address = client->addr; + const char *chip_name; + + if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) + return -ENODEV; + bank = i2c_smbus_read_byte_data(client, W83795_REG_BANKSEL); + if (bank < 0 || (bank & 0x7c)) { + dev_dbg(&adapter->dev, + "w83795: Detection failed at addr 0x%02hx, check %s\n", + address, "bank"); + return -ENODEV; + } + + /* Check Nuvoton vendor ID */ + vendor_id = i2c_smbus_read_byte_data(client, W83795_REG_VENDORID); + expected = bank & 0x80 ? 0x5c : 0xa3; + if (vendor_id != expected) { + dev_dbg(&adapter->dev, + "w83795: Detection failed at addr 0x%02hx, check %s\n", + address, "vendor id"); + return -ENODEV; + } + + /* Check device ID */ + device_id = w83795_get_device_id(client) | + (i2c_smbus_read_byte_data(client, W83795_REG_CHIPID) << 8); + if ((device_id >> 4) != 0x795) { + dev_dbg(&adapter->dev, + "w83795: Detection failed at addr 0x%02hx, check %s\n", + address, "device id\n"); + return -ENODEV; + } + + /* + * If Nuvoton chip, address of chip and W83795_REG_I2C_ADDR + * should match + */ + if ((bank & 0x07) == 0) { + i2c_addr = i2c_smbus_read_byte_data(client, + W83795_REG_I2C_ADDR); + if ((i2c_addr & 0x7f) != address) { + dev_dbg(&adapter->dev, + "w83795: Detection failed at addr 0x%02hx, " + "check %s\n", address, "i2c addr"); + return -ENODEV; + } + } + + /* + * Check 795 chip type: 795G or 795ADG + * Usually we don't write to chips during detection, but here we don't + * quite have the choice; hopefully it's OK, we are about to return + * success anyway + */ + if ((bank & 0x07) != 0) + i2c_smbus_write_byte_data(client, W83795_REG_BANKSEL, + bank & ~0x07); + config = i2c_smbus_read_byte_data(client, W83795_REG_CONFIG); + if (config & W83795_REG_CONFIG_CONFIG48) + chip_name = "w83795adg"; + else + chip_name = "w83795g"; + + strlcpy(info->type, chip_name, I2C_NAME_SIZE); + dev_info(&adapter->dev, "Found %s rev. %c at 0x%02hx\n", chip_name, + 'A' + (device_id & 0xf), address); + + return 0; +} + +#ifdef CONFIG_SENSORS_W83795_FANCTRL +#define NUM_PWM_ATTRIBUTES ARRAY_SIZE(w83795_pwm[0]) +#define NUM_TEMP_ATTRIBUTES ARRAY_SIZE(w83795_temp[0]) +#else +#define NUM_PWM_ATTRIBUTES 4 +#define NUM_TEMP_ATTRIBUTES 8 +#endif + +static int w83795_handle_files(struct device *dev, int (*fn)(struct device *, + const struct device_attribute *)) +{ + struct w83795_data *data = dev_get_drvdata(dev); + int err, i, j; + + for (i = 0; i < ARRAY_SIZE(w83795_in); i++) { + if (!(data->has_in & (1 << i))) + continue; + for (j = 0; j < ARRAY_SIZE(w83795_in[0]); j++) { + if (j == 4 && !data->enable_beep) + continue; + err = fn(dev, &w83795_in[i][j].dev_attr); + if (err) + return err; + } + } + + for (i = 0; i < ARRAY_SIZE(w83795_fan); i++) { + if (!(data->has_fan & (1 << i))) + continue; + for (j = 0; j < ARRAY_SIZE(w83795_fan[0]); j++) { + if (j == 3 && !data->enable_beep) + continue; + err = fn(dev, &w83795_fan[i][j].dev_attr); + if (err) + return err; + } + } + + for (i = 0; i < ARRAY_SIZE(w83795_tss); i++) { + j = w83795_tss_useful(data, i); + if (!j) + continue; + err = fn(dev, &w83795_tss[i].dev_attr); + if (err) + return err; + } + + for (i = 0; i < ARRAY_SIZE(sda_single_files); i++) { + err = fn(dev, &sda_single_files[i].dev_attr); + if (err) + return err; + } + + if (data->enable_beep) { + for (i = 0; i < ARRAY_SIZE(sda_beep_files); i++) { + err = fn(dev, &sda_beep_files[i].dev_attr); + if (err) + return err; + } + } + + for (i = 0; i < data->has_pwm; i++) { + for (j = 0; j < NUM_PWM_ATTRIBUTES; j++) { + err = fn(dev, &w83795_pwm[i][j].dev_attr); + if (err) + return err; + } + } + + for (i = 0; i < ARRAY_SIZE(w83795_temp); i++) { + if (!(data->has_temp & (1 << i))) + continue; + for (j = 0; j < NUM_TEMP_ATTRIBUTES; j++) { + if (j == 7 && !data->enable_beep) + continue; + err = fn(dev, &w83795_temp[i][j].dev_attr); + if (err) + return err; + } + } + + if (data->enable_dts) { + for (i = 0; i < ARRAY_SIZE(w83795_dts); i++) { + if (!(data->has_dts & (1 << i))) + continue; + for (j = 0; j < ARRAY_SIZE(w83795_dts[0]); j++) { + if (j == 7 && !data->enable_beep) + continue; + err = fn(dev, &w83795_dts[i][j].dev_attr); + if (err) + return err; + } + } + } + + return 0; +} + +/* We need a wrapper that fits in w83795_handle_files */ +static int device_remove_file_wrapper(struct device *dev, + const struct device_attribute *attr) +{ + device_remove_file(dev, attr); + return 0; +} + +static void w83795_check_dynamic_in_limits(struct i2c_client *client) +{ + struct w83795_data *data = i2c_get_clientdata(client); + u8 vid_ctl; + int i, err_max, err_min; + + vid_ctl = w83795_read(client, W83795_REG_VID_CTRL); + + /* Return immediately if VRM isn't configured */ + if ((vid_ctl & 0x07) == 0x00 || (vid_ctl & 0x07) == 0x07) + return; + + data->has_dyn_in = (vid_ctl >> 3) & 0x07; + for (i = 0; i < 2; i++) { + if (!(data->has_dyn_in & (1 << i))) + continue; + + /* Voltage limits in dynamic mode, switch to read-only */ + err_max = sysfs_chmod_file(&client->dev.kobj, + &w83795_in[i][2].dev_attr.attr, + S_IRUGO); + err_min = sysfs_chmod_file(&client->dev.kobj, + &w83795_in[i][3].dev_attr.attr, + S_IRUGO); + if (err_max || err_min) + dev_warn(&client->dev, + "Failed to set in%d limits read-only (%d, %d)\n", + i, err_max, err_min); + else + dev_info(&client->dev, + "in%d limits set dynamically from VID\n", i); + } +} + +/* Check pins that can be used for either temperature or voltage monitoring */ +static void w83795_apply_temp_config(struct w83795_data *data, u8 config, + int temp_chan, int in_chan) +{ + /* config is a 2-bit value */ + switch (config) { + case 0x2: /* Voltage monitoring */ + data->has_in |= 1 << in_chan; + break; + case 0x1: /* Thermal diode */ + if (temp_chan >= 4) + break; + data->temp_mode |= 1 << temp_chan; + /* fall through */ + case 0x3: /* Thermistor */ + data->has_temp |= 1 << temp_chan; + break; + } +} + +static int w83795_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + int i; + u8 tmp; + struct device *dev = &client->dev; + struct w83795_data *data; + int err; + + data = devm_kzalloc(dev, sizeof(struct w83795_data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + i2c_set_clientdata(client, data); + data->chip_type = id->driver_data; + data->bank = i2c_smbus_read_byte_data(client, W83795_REG_BANKSEL); + mutex_init(&data->update_lock); + + /* Initialize the chip */ + w83795_init_client(client); + + /* Check which voltages and fans are present */ + data->has_in = w83795_read(client, W83795_REG_VOLT_CTRL1) + | (w83795_read(client, W83795_REG_VOLT_CTRL2) << 8); + data->has_fan = w83795_read(client, W83795_REG_FANIN_CTRL1) + | (w83795_read(client, W83795_REG_FANIN_CTRL2) << 8); + + /* Check which analog temperatures and extra voltages are present */ + tmp = w83795_read(client, W83795_REG_TEMP_CTRL1); + if (tmp & 0x20) + data->enable_dts = 1; + w83795_apply_temp_config(data, (tmp >> 2) & 0x3, 5, 16); + w83795_apply_temp_config(data, tmp & 0x3, 4, 15); + tmp = w83795_read(client, W83795_REG_TEMP_CTRL2); + w83795_apply_temp_config(data, tmp >> 6, 3, 20); + w83795_apply_temp_config(data, (tmp >> 4) & 0x3, 2, 19); + w83795_apply_temp_config(data, (tmp >> 2) & 0x3, 1, 18); + w83795_apply_temp_config(data, tmp & 0x3, 0, 17); + + /* Check DTS enable status */ + if (data->enable_dts) { + if (1 & w83795_read(client, W83795_REG_DTSC)) + data->enable_dts |= 2; + data->has_dts = w83795_read(client, W83795_REG_DTSE); + } + + /* Report PECI Tbase values */ + if (data->enable_dts == 1) { + for (i = 0; i < 8; i++) { + if (!(data->has_dts & (1 << i))) + continue; + tmp = w83795_read(client, W83795_REG_PECI_TBASE(i)); + dev_info(&client->dev, + "PECI agent %d Tbase temperature: %u\n", + i + 1, (unsigned int)tmp & 0x7f); + } + } + + data->has_gain = w83795_read(client, W83795_REG_VMIGB_CTRL) & 0x0f; + + /* pwm and smart fan */ + if (data->chip_type == w83795g) + data->has_pwm = 8; + else + data->has_pwm = 2; + + /* Check if BEEP pin is available */ + if (data->chip_type == w83795g) { + /* The W83795G has a dedicated BEEP pin */ + data->enable_beep = 1; + } else { + /* + * The W83795ADG has a shared pin for OVT# and BEEP, so you + * can't have both + */ + tmp = w83795_read(client, W83795_REG_OVT_CFG); + if ((tmp & OVT_CFG_SEL) == 0) + data->enable_beep = 1; + } + + err = w83795_handle_files(dev, device_create_file); + if (err) + goto exit_remove; + + if (data->chip_type == w83795g) + w83795_check_dynamic_in_limits(client); + + data->hwmon_dev = hwmon_device_register(dev); + if (IS_ERR(data->hwmon_dev)) { + err = PTR_ERR(data->hwmon_dev); + goto exit_remove; + } + + return 0; + +exit_remove: + w83795_handle_files(dev, device_remove_file_wrapper); + return err; +} + +static int w83795_remove(struct i2c_client *client) +{ + struct w83795_data *data = i2c_get_clientdata(client); + + hwmon_device_unregister(data->hwmon_dev); + w83795_handle_files(&client->dev, device_remove_file_wrapper); + + return 0; +} + + +static const struct i2c_device_id w83795_id[] = { + { "w83795g", w83795g }, + { "w83795adg", w83795adg }, + { } +}; +MODULE_DEVICE_TABLE(i2c, w83795_id); + +static struct i2c_driver w83795_driver = { + .driver = { + .name = "w83795", + }, + .probe = w83795_probe, + .remove = w83795_remove, + .id_table = w83795_id, + + .class = I2C_CLASS_HWMON, + .detect = w83795_detect, + .address_list = normal_i2c, +}; + +module_i2c_driver(w83795_driver); + +MODULE_AUTHOR("Wei Song, Jean Delvare "); +MODULE_DESCRIPTION("W83795G/ADG hardware monitoring driver"); +MODULE_LICENSE("GPL"); diff --git a/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/Makefile b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/Makefile new file mode 100755 index 00000000..003238cf --- /dev/null +++ b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/PKG.yml b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/PKG.yml new file mode 100755 index 00000000..59158725 --- /dev/null +++ b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/PKG.yml @@ -0,0 +1 @@ +!include $ONL_TEMPLATES/onlp-platform-any.yml PLATFORM=x86-64-ingrasys-s9100 ARCH=amd64 TOOLCHAIN=x86_64-linux-gnu diff --git a/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/Makefile b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/Makefile new file mode 100755 index 00000000..e7437cb2 --- /dev/null +++ b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/Makefile @@ -0,0 +1,2 @@ +FILTER=src +include $(ONL)/make/subdirs.mk diff --git a/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/lib/Makefile b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/lib/Makefile new file mode 100755 index 00000000..644a9070 --- /dev/null +++ b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/lib/Makefile @@ -0,0 +1,45 @@ +############################################################ +# +# +# Copyright 2014 BigSwitch Networks, Inc. +# +# Licensed under the Eclipse Public License, Version 1.0 (the +# "License"); you may not use this file except in compliance +# with the License. You may obtain a copy of the License at +# +# http://www.eclipse.org/legal/epl-v10.html +# +# Unless required by applicable law or agreed to in writing, +# software distributed under the License is distributed on an +# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, +# either express or implied. See the License for the specific +# language governing permissions and limitations under the +# License. +# +# +############################################################ +# +# +############################################################ +include $(ONL)/make/config.amd64.mk + +MODULE := libonlp-x86-64-ingrasys-s9100 +include $(BUILDER)/standardinit.mk + +DEPENDMODULES := AIM IOF x86_64_ingrasys_s9100 onlplib +DEPENDMODULE_HEADERS := sff + +include $(BUILDER)/dependmodules.mk + +SHAREDLIB := libonlp-x86-64-ingrasys-s9100.so +$(SHAREDLIB)_TARGETS := $(ALL_TARGETS) +include $(BUILDER)/so.mk +.DEFAULT_GOAL := $(SHAREDLIB) + +GLOBAL_CFLAGS += -I$(onlp_BASEDIR)/module/inc +GLOBAL_CFLAGS += -DAIM_CONFIG_INCLUDE_MODULES_INIT=1 +GLOBAL_CFLAGS += -fPIC +GLOBAL_LINK_LIBS += -lpthread + +include $(BUILDER)/targets.mk + diff --git a/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/onlpdump/Makefile b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/onlpdump/Makefile new file mode 100755 index 00000000..da86108f --- /dev/null +++ b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/onlpdump/Makefile @@ -0,0 +1,45 @@ +############################################################ +# +# +# Copyright 2014 BigSwitch Networks, Inc. +# +# Licensed under the Eclipse Public License, Version 1.0 (the +# "License"); you may not use this file except in compliance +# with the License. You may obtain a copy of the License at +# +# http://www.eclipse.org/legal/epl-v10.html +# +# Unless required by applicable law or agreed to in writing, +# software distributed under the License is distributed on an +# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, +# either express or implied. See the License for the specific +# language governing permissions and limitations under the +# License. +# +# +############################################################ +# +# +# +############################################################ +include $(ONL)/make/config.amd64.mk + +.DEFAULT_GOAL := onlpdump + +MODULE := onlpdump +include $(BUILDER)/standardinit.mk + +DEPENDMODULES := AIM IOF onlp x86_64_ingrasys_s9100 onlplib onlp_platform_defaults sff cjson cjson_util timer_wheel OS + +include $(BUILDER)/dependmodules.mk + +BINARY := onlpdump +$(BINARY)_LIBRARIES := $(LIBRARY_TARGETS) +include $(BUILDER)/bin.mk + +GLOBAL_CFLAGS += -DAIM_CONFIG_AIM_MAIN_FUNCTION=onlpdump_main +GLOBAL_CFLAGS += -DAIM_CONFIG_INCLUDE_MODULES_INIT=1 +GLOBAL_CFLAGS += -DAIM_CONFIG_INCLUDE_MAIN=1 +GLOBAL_LINK_LIBS += -lpthread -lm + +include $(BUILDER)/targets.mk diff --git a/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/.gitignore b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/.gitignore new file mode 100755 index 00000000..d274ea3d --- /dev/null +++ b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/.gitignore @@ -0,0 +1,2 @@ +/x86_64_ingrasys_s9100.mk +/doc diff --git a/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/.module b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/.module new file mode 100755 index 00000000..8958f013 --- /dev/null +++ b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/.module @@ -0,0 +1 @@ +name: x86_64_ingrasys_s9100 diff --git a/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/Makefile b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/Makefile new file mode 100755 index 00000000..c9d9e890 --- /dev/null +++ b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/Makefile @@ -0,0 +1,10 @@ +############################################################ +# +# +# +############################################################ +include $(ONL)/make/config.mk + +MODULE := x86_64_ingrasys_s9100 +AUTOMODULE := x86_64_ingrasys_s9100 +include $(BUILDER)/definemodule.mk diff --git a/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/module/auto/make.mk b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/module/auto/make.mk new file mode 100755 index 00000000..f1a59d6e --- /dev/null +++ b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/module/auto/make.mk @@ -0,0 +1,7 @@ +# +# x86_64_ingrasys_s9100 Autogeneration +# +############################################################################### +x86-64-ingrasys-s9100_AUTO_DEFS := module/auto/x86-64-ingrasys-s9100.yml +x86-64-ingrasys-s9100_AUTO_DIRS := module/inc/x86-64-ingrasys-s9100 module/src +include $(BUILDER)/auto.mk diff --git a/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/module/auto/x86-64-ingrasys-s9100.yml b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/module/auto/x86-64-ingrasys-s9100.yml new file mode 100755 index 00000000..03724760 --- /dev/null +++ b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/module/auto/x86-64-ingrasys-s9100.yml @@ -0,0 +1,47 @@ +############################################################################### +# +# X86_64_INGRASYS_S9100 Autogeneration Definitions. +# +############################################################################### + +cdefs: &cdefs +- X86_64_INGRASYS_S9100_CONFIG_INCLUDE_LOGGING: + doc: "Include or exclude logging." + default: 1 +- X86_64_INGRASYS_S9100_CONFIG_LOG_OPTIONS_DEFAULT: + doc: "Default enabled log options." + default: AIM_LOG_OPTIONS_DEFAULT +- X86_64_INGRASYS_S9100_CONFIG_LOG_BITS_DEFAULT: + doc: "Default enabled log bits." + default: AIM_LOG_BITS_DEFAULT +- X86_64_INGRASYS_S9100_CONFIG_LOG_CUSTOM_BITS_DEFAULT: + doc: "Default enabled custom log bits." + default: 0 +- X86_64_INGRASYS_S9100_CONFIG_PORTING_STDLIB: + doc: "Default all porting macros to use the C standard libraries." + default: 1 +- X86_64_INGRASYS_S9100_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS: + doc: "Include standard library headers for stdlib porting macros." + default: X86_64_INGRASYS_S9100_CONFIG_PORTING_STDLIB +- X86_64_INGRASYS_S9100_CONFIG_INCLUDE_UCLI: + doc: "Include generic uCli support." + default: 0 + + +definitions: + cdefs: + X86_64_INGRASYS_S9100_CONFIG_HEADER: + defs: *cdefs + basename: x86_64_ingrasys_s9100_config + + portingmacro: + X86_64_INGRASYS_S9100: + macros: + - malloc + - free + - memset + - memcpy + - strncpy + - vsnprintf + - snprintf + - strlen diff --git a/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/module/inc/x86_64_ingrasys_s9100/x86_64_ingrasys_s9100.x b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/module/inc/x86_64_ingrasys_s9100/x86_64_ingrasys_s9100.x new file mode 100755 index 00000000..d8db28cf --- /dev/null +++ b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/module/inc/x86_64_ingrasys_s9100/x86_64_ingrasys_s9100.x @@ -0,0 +1,34 @@ +/************************************************************ + * + * + * Copyright 2014, 2015 Big Switch Networks, Inc. + * + * Licensed under the Eclipse Public License, Version 1.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.eclipse.org/legal/epl-v10.html + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, + * either express or implied. See the License for the specific + * language governing permissions and limitations under the + * License. + * + * + ************************************************************ + * + * + * + ***********************************************************/ + +#include + +/* <--auto.start.xmacro(ALL).define> */ +/* */ + +/* <--auto.start.xenum(ALL).define> */ +/* */ + + diff --git a/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/module/inc/x86_64_ingrasys_s9100/x86_64_ingrasys_s9100_config.h b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/module/inc/x86_64_ingrasys_s9100/x86_64_ingrasys_s9100_config.h new file mode 100755 index 00000000..1f3b3642 --- /dev/null +++ b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/module/inc/x86_64_ingrasys_s9100/x86_64_ingrasys_s9100_config.h @@ -0,0 +1,162 @@ +/************************************************************ + * + * + * Copyright 2014, 2015 Big Switch Networks, Inc. + * + * Licensed under the Eclipse Public License, Version 1.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.eclipse.org/legal/epl-v10.html + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, + * either express or implied. See the License for the specific + * language governing permissions and limitations under the + * License. + * + * + ************************************************************ + * + * + * + ***********************************************************/ + +/**************************************************************************//** + * + * @file + * @brief x86_64_ingrasys_s9100 Configuration Header + * + * @addtogroup x86_64_ingrasys_s9100-config + * @{ + * + *****************************************************************************/ +#ifndef __INGRAYSYS_S9100_CONFIG_H__ +#define __INGRAYSYS_S9100_CONFIG_H__ + +#ifdef GLOBAL_INCLUDE_CUSTOM_CONFIG +#include +#endif +#ifdef INGRAYSYS_S9100_INCLUDE_CUSTOM_CONFIG +#include +#endif + +/* */ +#include +/** + * INGRAYSYS_S9100_CONFIG_INCLUDE_LOGGING + * + * Include or exclude logging. */ + + +#ifndef INGRAYSYS_S9100_CONFIG_INCLUDE_LOGGING +#define INGRAYSYS_S9100_CONFIG_INCLUDE_LOGGING 1 +#endif + +/** + * INGRAYSYS_S9100_CONFIG_LOG_OPTIONS_DEFAULT + * + * Default enabled log options. */ + + +#ifndef INGRAYSYS_S9100_CONFIG_LOG_OPTIONS_DEFAULT +#define INGRAYSYS_S9100_CONFIG_LOG_OPTIONS_DEFAULT AIM_LOG_OPTIONS_DEFAULT +#endif + +/** + * INGRAYSYS_S9100_CONFIG_LOG_BITS_DEFAULT + * + * Default enabled log bits. */ + + +#ifndef INGRAYSYS_S9100_CONFIG_LOG_BITS_DEFAULT +#define INGRAYSYS_S9100_CONFIG_LOG_BITS_DEFAULT AIM_LOG_BITS_DEFAULT +#endif + +/** + * INGRAYSYS_S9100_CONFIG_LOG_CUSTOM_BITS_DEFAULT + * + * Default enabled custom log bits. */ + + +#ifndef INGRAYSYS_S9100_CONFIG_LOG_CUSTOM_BITS_DEFAULT +#define INGRAYSYS_S9100_CONFIG_LOG_CUSTOM_BITS_DEFAULT 0 +#endif + +/** + * INGRAYSYS_S9100_CONFIG_PORTING_STDLIB + * + * Default all porting macros to use the C standard libraries. */ + + +#ifndef INGRAYSYS_S9100_CONFIG_PORTING_STDLIB +#define INGRAYSYS_S9100_CONFIG_PORTING_STDLIB 1 +#endif + +/** + * INGRAYSYS_S9100_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS + * + * Include standard library headers for stdlib porting macros. */ + + +#ifndef INGRAYSYS_S9100_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS +#define INGRAYSYS_S9100_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS INGRAYSYS_S9100_CONFIG_PORTING_STDLIB +#endif + +/** + * INGRAYSYS_S9100_CONFIG_INCLUDE_UCLI + * + * Include generic uCli support. */ + + +#ifndef INGRAYSYS_S9100_CONFIG_INCLUDE_UCLI +#define INGRAYSYS_S9100_CONFIG_INCLUDE_UCLI 0 +#endif + +/** + * INGRAYSYS_S9100_CONFIG_SFP_COUNT + * + * SFP Count. */ + + +#ifndef INGRAYSYS_S9100_CONFIG_SFP_COUNT +#define INGRAYSYS_S9100_CONFIG_SFP_COUNT 0 +#endif + + + +/** + * All compile time options can be queried or displayed + */ + +/** Configuration settings structure. */ +typedef struct x86_64_ingrasys_s9100_config_settings_s { + /** name */ + const char* name; + /** value */ + const char* value; +} x86_64_ingrasys_s9100_config_settings_t; + +/** Configuration settings table. */ +/** x86_64_ingrasys_s9100_config_settings table. */ +extern x86_64_ingrasys_s9100_config_settings_t x86_64_ingrasys_s9100_config_settings[]; + +/** + * @brief Lookup a configuration setting. + * @param setting The name of the configuration option to lookup. + */ +const char* x86_64_ingrasys_s9100_config_lookup(const char* setting); + +/** + * @brief Show the compile-time configuration. + * @param pvs The output stream. + */ +int x86_64_ingrasys_s9100_config_show(struct aim_pvs_s* pvs); + +/* */ + +#include "x86_64_ingrasys_s9100_porting.h" + +#endif /* __INGRAYSYS_S9100_CONFIG_H__ */ +/* @} */ diff --git a/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/module/inc/x86_64_ingrasys_s9100/x86_64_ingrasys_s9100_dox.h b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/module/inc/x86_64_ingrasys_s9100/x86_64_ingrasys_s9100_dox.h new file mode 100755 index 00000000..c796e25b --- /dev/null +++ b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/module/inc/x86_64_ingrasys_s9100/x86_64_ingrasys_s9100_dox.h @@ -0,0 +1,26 @@ +/**************************************************************************//** + * + * x86_64_ingrasys_s9100 Doxygen Header + * + *****************************************************************************/ +#ifndef __x86_64_ingrasys_s9100_DOX_H__ +#define __x86_64_ingrasys_s9100_DOX_H__ + +/** + * @defgroup x86_64_ingrasys_s9100 x86_64_ingrasys_s9100 - x86_64_ingrasys_s9100 Description + * + +The documentation overview for this module should go here. + + * + * @{ + * + * @defgroup x86_64_ingrasys_s9100-x86_64_ingrasys_s9100 Public Interface + * @defgroup x86_64_ingrasys_s9100-config Compile Time Configuration + * @defgroup x86_64_ingrasys_s9100-porting Porting Macros + * + * @} + * + */ + +#endif /* __x86_64_ingrasys_s9100_DOX_H__ */ diff --git a/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/module/inc/x86_64_ingrasys_s9100/x86_64_ingrasys_s9100_porting.h b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/module/inc/x86_64_ingrasys_s9100/x86_64_ingrasys_s9100_porting.h new file mode 100755 index 00000000..58f68c04 --- /dev/null +++ b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/module/inc/x86_64_ingrasys_s9100/x86_64_ingrasys_s9100_porting.h @@ -0,0 +1,106 @@ +/********************************************************//** + * + * @file + * @brief x86_64_Ingrasys_s9100 Porting Macros. + * + * @addtogroup x86_64_Ingrasys_s9100-porting + * @{ + * + ***********************************************************/ +#ifndef __INGRAYSYS_S9100_PORTING_H__ +#define __INGRAYSYS_S9100_PORTING_H__ + +/* */ +#if INGRAYSYS_S9100_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS == 1 +#include +#include +#include +#include +#include +#endif + +#ifndef INGRAYSYS_S9100_MALLOC + #if defined(GLOBAL_MALLOC) + #define INGRAYSYS_S9100_MALLOC GLOBAL_MALLOC + #elif INGRAYSYS_S9100_CONFIG_PORTING_STDLIB == 1 + #define INGRAYSYS_S9100_MALLOC malloc + #else + #error The macro INGRAYSYS_S9100_MALLOC is required but cannot be defined. + #endif +#endif + +#ifndef INGRAYSYS_S9100_FREE + #if defined(GLOBAL_FREE) + #define INGRAYSYS_S9100_FREE GLOBAL_FREE + #elif INGRAYSYS_S9100_CONFIG_PORTING_STDLIB == 1 + #define INGRAYSYS_S9100_FREE free + #else + #error The macro INGRAYSYS_S9100_FREE is required but cannot be defined. + #endif +#endif + +#ifndef INGRAYSYS_S9100_MEMSET + #if defined(GLOBAL_MEMSET) + #define INGRAYSYS_S9100_MEMSET GLOBAL_MEMSET + #elif INGRAYSYS_S9100_CONFIG_PORTING_STDLIB == 1 + #define INGRAYSYS_S9100_MEMSET memset + #else + #error The macro INGRAYSYS_S9100_MEMSET is required but cannot be defined. + #endif +#endif + +#ifndef INGRAYSYS_S9100_MEMCPY + #if defined(GLOBAL_MEMCPY) + #define INGRAYSYS_S9100_MEMCPY GLOBAL_MEMCPY + #elif INGRAYSYS_S9100_CONFIG_PORTING_STDLIB == 1 + #define INGRAYSYS_S9100_MEMCPY memcpy + #else + #error The macro INGRAYSYS_S9100_MEMCPY is required but cannot be defined. + #endif +#endif + +#ifndef INGRAYSYS_S9100_STRNCPY + #if defined(GLOBAL_STRNCPY) + #define INGRAYSYS_S9100_STRNCPY GLOBAL_STRNCPY + #elif INGRAYSYS_S9100_CONFIG_PORTING_STDLIB == 1 + #define INGRAYSYS_S9100_STRNCPY strncpy + #else + #error The macro INGRAYSYS_S9100_STRNCPY is required but cannot be defined. + #endif +#endif + +#ifndef INGRAYSYS_S9100_VSNPRINTF + #if defined(GLOBAL_VSNPRINTF) + #define INGRAYSYS_S9100_VSNPRINTF GLOBAL_VSNPRINTF + #elif INGRAYSYS_S9100_CONFIG_PORTING_STDLIB == 1 + #define INGRAYSYS_S9100_VSNPRINTF vsnprintf + #else + #error The macro INGRAYSYS_S9100_VSNPRINTF is required but cannot be defined. + #endif +#endif + +#ifndef INGRAYSYS_S9100_SNPRINTF + #if defined(GLOBAL_SNPRINTF) + #define INGRAYSYS_S9100_SNPRINTF GLOBAL_SNPRINTF + #elif INGRAYSYS_S9100_CONFIG_PORTING_STDLIB == 1 + #define INGRAYSYS_S9100_SNPRINTF snprintf + #else + #error The macro INGRAYSYS_S9100_SNPRINTF is required but cannot be defined. + #endif +#endif + +#ifndef INGRAYSYS_S9100_STRLEN + #if defined(GLOBAL_STRLEN) + #define INGRAYSYS_S9100_STRLEN GLOBAL_STRLEN + #elif INGRAYSYS_S9100_CONFIG_PORTING_STDLIB == 1 + #define INGRAYSYS_S9100_STRLEN strlen + #else + #error The macro INGRAYSYS_S9100_STRLEN is required but cannot be defined. + #endif +#endif + +/* */ + + +#endif /* __INGRAYSYS_S9100_PORTING_H__ */ +/* @} */ diff --git a/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/module/make.mk b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/module/make.mk new file mode 100755 index 00000000..87e53be9 --- /dev/null +++ b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/module/make.mk @@ -0,0 +1,29 @@ +############################################################ +# +# +# Copyright 2014, 2015 Big Switch Networks, Inc. +# +# Licensed under the Eclipse Public License, Version 1.0 (the +# "License"); you may not use this file except in compliance +# with the License. You may obtain a copy of the License at +# +# http://www.eclipse.org/legal/epl-v10.html +# +# Unless required by applicable law or agreed to in writing, +# software distributed under the License is distributed on an +# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, +# either express or implied. See the License for the specific +# language governing permissions and limitations under the +# License. +# +# +############################################################ +# +# +# +############################################################ +THIS_DIR := $(dir $(lastword $(MAKEFILE_LIST))) +x86_64_ingrasys_s9100_INCLUDES := -I $(THIS_DIR)inc +x86_64_ingrasys_s9100_INTERNAL_INCLUDES := -I $(THIS_DIR)src +x86_64_ingrasys_s9100_DEPENDMODULE_ENTRIES := init:x86_64_ingrasys_s9100 ucli:x86_64_ingrasys_s9100 + diff --git a/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/module/src/Makefile b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/module/src/Makefile new file mode 100755 index 00000000..5ccb9ac7 --- /dev/null +++ b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/module/src/Makefile @@ -0,0 +1,30 @@ +############################################################ +# +# +# Copyright 2014, 2015 Big Switch Networks, Inc. +# +# Licensed under the Eclipse Public License, Version 1.0 (the +# "License"); you may not use this file except in compliance +# with the License. You may obtain a copy of the License at +# +# http://www.eclipse.org/legal/epl-v10.html +# +# Unless required by applicable law or agreed to in writing, +# software distributed under the License is distributed on an +# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, +# either express or implied. See the License for the specific +# language governing permissions and limitations under the +# License. +# +# +############################################################ +# +# Local source generation targets. +# +############################################################ + +include ../../../../init.mk + +ucli: + $(SUBMODULE_BIGCODE)/tools/uclihandlers.py x86_64_ingrasys_s9100_ucli.c + diff --git a/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/module/src/fani.c b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/module/src/fani.c new file mode 100755 index 00000000..921b3ffa --- /dev/null +++ b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/module/src/fani.c @@ -0,0 +1,283 @@ +/************************************************************ + * + * + * Copyright 2014, 2015 Big Switch Networks, Inc. + * + * Licensed under the Eclipse Public License, Version 1.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.eclipse.org/legal/epl-v10.html + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, + * either express or implied. See the License for the specific + * language governing permissions and limitations under the + * License. + * + * + ************************************************************ + * + * Fan Platform Implementation Defaults. + * + ***********************************************************/ +#include +#include "x86_64_ingrasys_s9100_int.h" +#include +#include "platform_lib.h" + +onlp_fan_info_t fan_info[] = { + { }, /* Not used */ + { + { FAN_OID_FAN1, "FANTRAY 1-A", 0 }, + ONLP_FAN_STATUS_PRESENT, + ONLP_FAN_CAPS_GET_RPM | ONLP_FAN_CAPS_GET_PERCENTAGE, + 0, + 0, + ONLP_FAN_MODE_INVALID, + }, + { + { FAN_OID_FAN2, "FANTRAY 1-B", 0 }, + ONLP_FAN_STATUS_PRESENT, + ONLP_FAN_CAPS_GET_RPM | ONLP_FAN_CAPS_GET_PERCENTAGE, + 0, + 0, + ONLP_FAN_MODE_INVALID, + }, + { + { FAN_OID_FAN3, "FANTRAY 2-A", 0 }, + ONLP_FAN_STATUS_PRESENT, + ONLP_FAN_CAPS_GET_RPM | ONLP_FAN_CAPS_GET_PERCENTAGE, + 0, + 0, + ONLP_FAN_MODE_INVALID, + }, + { + { FAN_OID_FAN4, "FANTRAY 2-B", 0 }, + ONLP_FAN_STATUS_PRESENT, + ONLP_FAN_CAPS_GET_RPM | ONLP_FAN_CAPS_GET_PERCENTAGE, + 0, + 0, + ONLP_FAN_MODE_INVALID, + }, + { + { FAN_OID_FAN5, "FANTRAY 3-A", 0 }, + ONLP_FAN_STATUS_PRESENT, + ONLP_FAN_CAPS_GET_RPM | ONLP_FAN_CAPS_GET_PERCENTAGE, + 0, + 0, + ONLP_FAN_MODE_INVALID, + }, + { + { FAN_OID_FAN6, "FANTRAY 3-B", 0 }, + ONLP_FAN_STATUS_PRESENT, + ONLP_FAN_CAPS_GET_RPM | ONLP_FAN_CAPS_GET_PERCENTAGE, + 0, + 0, + ONLP_FAN_MODE_INVALID, + }, + { + { FAN_OID_FAN7, "FANTRAY 4-A", 0 }, + ONLP_FAN_STATUS_PRESENT, + ONLP_FAN_CAPS_GET_RPM | ONLP_FAN_CAPS_GET_PERCENTAGE, + 0, + 0, + ONLP_FAN_MODE_INVALID, + }, + { + { FAN_OID_FAN8, "FANTRAY 4-B", 0 }, + ONLP_FAN_STATUS_PRESENT, + ONLP_FAN_CAPS_GET_RPM | ONLP_FAN_CAPS_GET_PERCENTAGE, + 0, + 0, + ONLP_FAN_MODE_INVALID, + }, + { + { FAN_OID_PSU_FAN1, "PSU-1 FAN", 0 }, + ONLP_FAN_STATUS_PRESENT, + }, + { + { FAN_OID_PSU_FAN2, "PSU-2 FAN", 0 }, + ONLP_FAN_STATUS_PRESENT, + } +}; +/* + * This function will be called prior to all of onlp_fani_* functions. + */ +int +onlp_fani_init(void) +{ + return ONLP_STATUS_OK; +} + +int +sys_fan_info_get(onlp_fan_info_t* info, int id) +{ + int rv, fan_status, fan_rpm, perc_val, percentage; + fan_status = 0; + fan_rpm = 0; + + rv = onlp_file_read_int(&fan_status, SYS_FAN_PREFIX "fan%d_alarm", id); + if (rv < 0) { + return ONLP_STATUS_E_INTERNAL; + } + + /* fan status > 1, means failure */ + if (fan_status > 0) { + info->status |= ONLP_FAN_STATUS_FAILED; + return ONLP_STATUS_OK; + } + + rv = onlp_file_read_int(&fan_rpm, SYS_FAN_PREFIX "fan%d_input", id); + if (rv < 0) { + return ONLP_STATUS_E_INTERNAL; + } + info->rpm = fan_rpm; + + /* get speed percentage*/ + switch (id) + { + case FAN_ID_FAN1: + case FAN_ID_FAN2: + case FAN_ID_FAN3: + case FAN_ID_FAN4: + rv = onlp_file_read_int(&perc_val, SYS_FAN_PREFIX "pwm%d", FAN_CTRL_SET1); + break; + case FAN_ID_FAN5: + case FAN_ID_FAN6: + case FAN_ID_FAN7: + case FAN_ID_FAN8: + rv = onlp_file_read_int(&perc_val, SYS_FAN_PREFIX "pwm%d", FAN_CTRL_SET2); + break; + default: + return ONLP_STATUS_E_INVALID; + } + if (rv < 0) { + return ONLP_STATUS_E_INTERNAL; + } + + /* + Get fan speed, converting driver value to percnet. + Value 128 is 50%. + Value 200 is 80%. + Value 255 is 100%. + */ + if (perc_val == 255) { + percentage = 100; + } else if (perc_val == 200) { + percentage = 80; + } else if (perc_val == 128) { + percentage = 50; + } else { + return ONLP_STATUS_E_INTERNAL; + } + info->percentage = percentage; + + return ONLP_STATUS_OK; +} + +int +sys_fan_rpm_percent_set(int perc) +{ + int rc; + rc = onlp_file_write_int(perc, SYS_FAN_PREFIX "pwm%d", FAN_CTRL_SET1); + + if (rc < 0) { + return ONLP_STATUS_E_INTERNAL; + } + + rc = onlp_file_write_int(perc, SYS_FAN_PREFIX "pwm%d", FAN_CTRL_SET2); + if (rc < 0) { + return ONLP_STATUS_E_INTERNAL; + } + + return ONLP_STATUS_OK; +} + +int +onlp_fani_rpm_set(onlp_oid_t id, int rpm) +{ + return ONLP_STATUS_E_UNSUPPORTED; +} + +/* + * This function sets the fan speed of the given OID as a percentage. + * + * This will only be called if the OID has the PERCENTAGE_SET + * capability. + * + * It is optional if you have no fans at all with this feature. + */ +int +onlp_fani_percentage_set(onlp_oid_t id, int percentage) +{ + int fid, perc_val, rc; + fid = ONLP_OID_ID_GET(id); + + /* Set fan speed + Driver accept value in range between 128 and 255. + Value 128 is 50%. + Value 200 is 80%. + Value 255 is 100%. + */ + if (percentage == 100) { + perc_val = 255; + } else if (percentage == 80) { + perc_val = 200; + } else if (percentage == 50) { + perc_val = 128; + } else { + return ONLP_STATUS_E_INVALID; + } + + switch (fid) + { + case FAN_ID_FAN1: + case FAN_ID_FAN2: + case FAN_ID_FAN3: + case FAN_ID_FAN4: + case FAN_ID_FAN5: + case FAN_ID_FAN6: + case FAN_ID_FAN7: + case FAN_ID_FAN8: + rc = sys_fan_rpm_percent_set(perc_val); + break; + default: + return ONLP_STATUS_E_INVALID; + } + return rc; +} + +int +onlp_fani_info_get(onlp_oid_t id, onlp_fan_info_t* rv) +{ + int fan_id ,rc; + + fan_id = ONLP_OID_ID_GET(id); + *rv = fan_info[fan_id]; + rv->caps |= ONLP_FAN_CAPS_GET_RPM; + + switch (fan_id) { + case FAN_ID_FAN1: + case FAN_ID_FAN2: + case FAN_ID_FAN3: + case FAN_ID_FAN4: + case FAN_ID_FAN5: + case FAN_ID_FAN6: + case FAN_ID_FAN7: + case FAN_ID_FAN8: + rc = sys_fan_info_get(rv, fan_id); + break; + case FAN_ID_PSU_FAN1: + case FAN_ID_PSU_FAN2: + rc = psu_fan_info_get(rv, fan_id); + break; + default: + return ONLP_STATUS_E_INTERNAL; + break; + } + + return rc; +} + \ No newline at end of file diff --git a/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/module/src/ledi.c b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/module/src/ledi.c new file mode 100755 index 00000000..99a64628 --- /dev/null +++ b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/module/src/ledi.c @@ -0,0 +1,143 @@ +/************************************************************ + * + * + * Copyright 2014, 2015 Big Switch Networks, Inc. + * + * Licensed under the Eclipse Public License, Version 1.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.eclipse.org/legal/epl-v10.html + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, + * either express or implied. See the License for the specific + * language governing permissions and limitations under the + * License. + * + * + ************************************************************ + * + * + ***********************************************************/ +#include +#include +#include +#include +#include +#include + +#include "platform_lib.h" + +/* + * Get the information for the given LED OID. + */ +static onlp_led_info_t led_info[] = +{ + { }, /* Not used */ + { + { LED_OID_SYSTEM, "Chassis LED 1 (SYS LED)", 0 }, + ONLP_LED_STATUS_PRESENT, + ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_GREEN, + }, + { + { LED_OID_FAN, "Chassis LED 2 (FAN LED)", 0 }, + ONLP_LED_STATUS_PRESENT, + ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_ORANGE | ONLP_LED_CAPS_GREEN | ONLP_LED_CAPS_AUTO, + }, + { + { LED_OID_PSU1, "Chassis LED 3 (PSU1 LED)", 0 }, + ONLP_LED_STATUS_PRESENT, + ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_ORANGE | ONLP_LED_CAPS_GREEN | ONLP_LED_CAPS_AUTO, + }, + { + { LED_OID_PSU2, "Chassis LED 4 (PSU2 LED)", 0 }, + ONLP_LED_STATUS_PRESENT, + ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_ORANGE | ONLP_LED_CAPS_GREEN | ONLP_LED_CAPS_AUTO, + } +}; + +/* + * This function will be called prior to any other onlp_ledi_* functions. + */ +int +onlp_ledi_init(void) +{ + return ONLP_STATUS_OK; +} + +int +onlp_ledi_info_get(onlp_oid_t id, onlp_led_info_t* info) +{ + int led_id; + + led_id = ONLP_OID_ID_GET(id); + + *info = led_info[led_id]; + info->status |= ONLP_LED_STATUS_ON; + info->mode |= ONLP_LED_MODE_ON; + + return ONLP_STATUS_OK; +} + +/* + * Turn an LED on or off. + * + * This function will only be called if the LED OID supports the ONOFF + * capability. + * + * What 'on' means in terms of colors or modes for multimode LEDs is + * up to the platform to decide. This is intended as baseline toggle mechanism. + */ +int +onlp_ledi_set(onlp_oid_t id, int on_or_off) +{ + if (!on_or_off) { + return onlp_ledi_mode_set(id, ONLP_LED_MODE_OFF); + } + + return ONLP_STATUS_E_UNSUPPORTED; +} + +/* + * This function puts the LED into the given mode. It is a more functional + * interface for multimode LEDs. + * + * Only modes reported in the LED's capabilities will be attempted. + */ +int +onlp_ledi_mode_set(onlp_oid_t id, onlp_led_mode_t mode) +{ + int led_id, rc; + + led_id = ONLP_OID_ID_GET(id); + switch (led_id) { + case LED_SYSTEM_LED: + rc = system_led_set(mode); + break; + case LED_FAN_LED: + rc = fan_led_set(mode); + break; + case LED_PSU1_LED: + rc = psu1_led_set(mode); + break; + case LED_PSU2_LED: + rc = psu2_led_set(mode); + break; + default: + return ONLP_STATUS_E_INTERNAL; + break; + } + + return rc; +} + +/* + * Generic LED ioctl interface. + */ +int +onlp_ledi_ioctl(onlp_oid_t id, va_list vargs) +{ + return ONLP_STATUS_OK; +} diff --git a/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/module/src/make.mk b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/module/src/make.mk new file mode 100755 index 00000000..d0885bbf --- /dev/null +++ b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/module/src/make.mk @@ -0,0 +1,29 @@ +############################################################ +# +# +# Copyright 2014, 2015 Big Switch Networks, Inc. +# +# Licensed under the Eclipse Public License, Version 1.0 (the +# "License"); you may not use this file except in compliance +# with the License. You may obtain a copy of the License at +# +# http://www.eclipse.org/legal/epl-v10.html +# +# Unless required by applicable law or agreed to in writing, +# software distributed under the License is distributed on an +# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, +# either express or implied. See the License for the specific +# language governing permissions and limitations under the +# License. +# +# +############################################################ +# +# +# +############################################################ + +LIBRARY := x86_64_ingrasys_s9100 +$(LIBRARY)_SUBDIR := $(dir $(lastword $(MAKEFILE_LIST))) +#$(LIBRARY)_LAST := 1 +include $(BUILDER)/lib.mk diff --git a/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/module/src/platform_lib.c b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/module/src/platform_lib.c new file mode 100755 index 00000000..172b7f13 --- /dev/null +++ b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/module/src/platform_lib.c @@ -0,0 +1,528 @@ +/************************************************************ + * + * + * Copyright 2014 Big Switch Networks, Inc. + * Copyright 2013 Accton Technology Corporation. + * + * Licensed under the Eclipse Public License, Version 1.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.eclipse.org/legal/epl-v10.html + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, + * either express or implied. See the License for the specific + * language governing permissions and limitations under the + * License. + * + * + ************************************************************ + * + * + * + ***********************************************************/ +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "platform_lib.h" + +int +psu_thermal_get(onlp_thermal_info_t* info, int thermal_id) +{ + int pw_exist, pw_good, offset, i2c_bus, rc; + int value, buf, psu_mask; + unsigned int y_value = 0; + unsigned char n_value = 0; + unsigned int temp = 0; + char result[32]; + + if (thermal_id == THERMAL_ID_PSU1_1) { + i2c_bus = I2C_BUS_8; + offset = PSU_THERMAL1_OFFSET; + psu_mask = PSU1_MUX_MASK; + } else if (thermal_id == THERMAL_ID_PSU1_2) { + i2c_bus = I2C_BUS_8; + offset = PSU_THERMAL2_OFFSET; + psu_mask = PSU1_MUX_MASK; + } else if (thermal_id == THERMAL_ID_PSU2_1) { + i2c_bus = I2C_BUS_9; + offset = PSU_THERMAL1_OFFSET; + psu_mask = PSU2_MUX_MASK; + } else if (thermal_id == THERMAL_ID_PSU2_2) { + i2c_bus = I2C_BUS_9; + offset = PSU_THERMAL2_OFFSET; + psu_mask = PSU2_MUX_MASK; + } + + /* check psu status */ + if ((rc = psu_present_get(&pw_exist, I2C_BUS_0, psu_mask)) != ONLP_STATUS_OK) { + return ONLP_STATUS_E_INTERNAL; + } + + if (pw_exist != PSU_STATUS_PRESENT) { + info->mcelsius = 0; + return ONLP_STATUS_OK; + } + + if ((rc = psu_pwgood_get(&pw_good, I2C_BUS_0, psu_mask)) != ONLP_STATUS_OK) { + return ONLP_STATUS_E_INTERNAL; + } + + if (pw_good != PSU_STATUS_POWER_GOOD) { + info->mcelsius = 0; + return ONLP_STATUS_OK; + } + + value = onlp_i2c_readw(i2c_bus, PSU_REG, offset, ONLP_I2C_F_FORCE); + + y_value = (value & 0x07FF); + if ((value & 0x8000)&&(y_value)) { + n_value = 0xF0 + (((value) >> 11) & 0x0F); + n_value = (~n_value) +1; + temp = (unsigned int)(1<> 11) & 0x0F); + snprintf(result, sizeof(result), "%d", (y_value*(1<mcelsius = (int)(buf * 1000); + + return ONLP_STATUS_OK; +} + + +int +psu_fan_info_get(onlp_fan_info_t* info, int id) +{ + int pw_exist, pw_good, i2c_bus, psu_mask, rc; + unsigned int tmp_fan_rpm, fan_rpm; + + if (id == FAN_ID_PSU_FAN1) { + i2c_bus = I2C_BUS_8; + psu_mask = PSU1_MUX_MASK; + } else if (id == FAN_ID_PSU_FAN2) { + i2c_bus = I2C_BUS_9; + psu_mask = PSU2_MUX_MASK; + } else { + return ONLP_STATUS_E_INTERNAL; + } + + /* check psu status */ + if ((rc = psu_present_get(&pw_exist, I2C_BUS_0, psu_mask)) != ONLP_STATUS_OK) { + return ONLP_STATUS_E_INTERNAL; + } + + if (pw_exist != PSU_STATUS_PRESENT) { + info->rpm = 0; + return ONLP_STATUS_OK; + } + + if ((rc = psu_pwgood_get(&pw_good, I2C_BUS_0, psu_mask)) != ONLP_STATUS_OK) { + return ONLP_STATUS_E_INTERNAL; + } + + if (pw_good != PSU_STATUS_POWER_GOOD) { + info->rpm = 0; + return ONLP_STATUS_OK; + } + + tmp_fan_rpm = onlp_i2c_readw(i2c_bus, PSU_REG, PSU_FAN_RPM_OFFSET, ONLP_I2C_F_FORCE); + + fan_rpm = (unsigned int)tmp_fan_rpm; + fan_rpm = (fan_rpm & 0x07FF) * (1 << ((fan_rpm >> 11) & 0x1F)); + info->rpm = (int)fan_rpm; + + return ONLP_STATUS_OK; +} + +int +psu_vout_get(onlp_psu_info_t* info, int i2c_bus) +{ + int v_value = 0; + int n_value = 0; + unsigned int temp = 0; + char result[32]; + double dvalue; + memset(result, 0, sizeof(result)); + + n_value = onlp_i2c_readb(i2c_bus, PSU_REG, PSU_VOUT_OFFSET1, ONLP_I2C_F_FORCE); + if (n_value < 0) { + return ONLP_STATUS_E_INTERNAL; + } + + v_value = onlp_i2c_readw(i2c_bus, PSU_REG, PSU_VOUT_OFFSET2, ONLP_I2C_F_FORCE); + if (v_value < 0) { + return ONLP_STATUS_E_INTERNAL; + } + + if (n_value & 0x10) { + n_value = 0xF0 + (n_value & 0x0F); + n_value = (~n_value) +1; + temp = (unsigned int)(1< 0.0) { + info->caps |= ONLP_PSU_CAPS_VOUT; + info->mvout = (int)(dvalue * 1000); + } + + return ONLP_STATUS_OK; +} + +int +psu_iout_get(onlp_psu_info_t* info, int i2c_bus) +{ + int value; + unsigned int y_value = 0; + unsigned char n_value = 0; + unsigned int temp = 0; + char result[32]; + memset(result, 0, sizeof(result)); + double dvalue; + + value = onlp_i2c_readw(i2c_bus, PSU_REG, PSU_IOUT_OFFSET, ONLP_I2C_F_FORCE); + if (value < 0) { + return ONLP_STATUS_E_INTERNAL; + } + + y_value = (value & 0x07FF); + if ((value & 0x8000)&&(y_value)) + { + n_value = 0xF0 + (((value) >> 11) & 0x0F); + n_value = (~n_value) +1; + temp = (unsigned int)(1<> 11) & 0x0F); + snprintf(result, sizeof(result), "%d", (y_value*(1< 0.0) { + info->caps |= ONLP_PSU_CAPS_IOUT; + info->miout = (int)(dvalue * 1000); + } + + return ONLP_STATUS_OK; +} + +int +psu_pout_get(onlp_psu_info_t* info, int i2c_bus) +{ + int value; + unsigned int y_value = 0; + unsigned char n_value = 0; + unsigned int temp = 0; + char result[32]; + memset(result, 0, sizeof(result)); + double dvalue; + + value = onlp_i2c_readw(i2c_bus, PSU_REG, PSU_POUT_OFFSET, ONLP_I2C_F_FORCE); + if (value < 0) { + return ONLP_STATUS_E_INTERNAL; + } + + y_value = (value & 0x07FF); + if ((value & 0x8000)&&(y_value)) + { + n_value = 0xF0 + (((value) >> 11) & 0x0F); + n_value = (~n_value) +1; + temp = (unsigned int)(1<> 11) & 0x0F); + snprintf(result, sizeof(result), "%d", (y_value*(1< 0.0) { + info->caps |= ONLP_PSU_CAPS_POUT; + info->mpout = (int)(dvalue * 1000); + } + + return ONLP_STATUS_OK; +} + +int +psu_pin_get(onlp_psu_info_t* info, int i2c_bus) +{ + int value; + unsigned int y_value = 0; + unsigned char n_value = 0; + unsigned int temp = 0; + char result[32]; + memset(result, 0, sizeof(result)); + double dvalue; + + value = onlp_i2c_readw(i2c_bus, PSU_REG, PSU_PIN_OFFSET, ONLP_I2C_F_FORCE); + if (value < 0) { + return ONLP_STATUS_E_INTERNAL; + } + + y_value = (value & 0x07FF); + if ((value & 0x8000)&&(y_value)) + { + n_value = 0xF0 + (((value) >> 11) & 0x0F); + n_value = (~n_value) +1; + temp = (unsigned int)(1<> 11) & 0x0F); + snprintf(result, sizeof(result), "%d", (y_value*(1< 0.0) { + info->caps |= ONLP_PSU_CAPS_PIN; + info->mpin = (int)(dvalue * 1000); + } + + return ONLP_STATUS_OK; +} + +int +psu_eeprom_get(onlp_psu_info_t* info, int id) +{ + uint8_t data[256]; + char eeprom_path[128]; + int data_len, i, rc; + memset(data, 0, sizeof(data)); + memset(eeprom_path, 0, sizeof(eeprom_path)); + + if (id == PSU_ID_PSU1) { + rc = onlp_file_read(data, sizeof(data), &data_len, PSU1_EEPROM_PATH); + } else { + rc = onlp_file_read(data, sizeof(data), &data_len, PSU2_EEPROM_PATH); + } + + if (rc == ONLP_STATUS_OK) + { + i = 11; + + /* Manufacturer Name */ + data_len = (data[i]&0x0f); + i++; + i += data_len; + + /* Product Name */ + data_len = (data[i]&0x0f); + i++; + memcpy(info->model, (char *) &(data[i]), data_len); + i += data_len; + + /* Product part,model number */ + data_len = (data[i]&0x0f); + i++; + i += data_len; + + /* Product Version */ + data_len = (data[i]&0x0f); + i++; + i += data_len; + + /* Product Serial Number */ + data_len = (data[i]&0x0f); + i++; + memcpy(info->serial, (char *) &(data[i]), data_len); + } else { + strcpy(info->model, "Missing"); + strcpy(info->serial, "Missing"); + } + + return ONLP_STATUS_OK; +} + + +int +psu_present_get(int *pw_exist, int i2c_bus, int psu_mask) +{ + int psu_pres; + + psu_pres = onlp_i2c_readb(i2c_bus, PSU_STATE_REG, PSU_PRESENT_OFFSET, ONLP_I2C_F_FORCE); + if (psu_pres < 0) { + return ONLP_STATUS_E_INTERNAL; + } + + *pw_exist = ((psu_pres & psu_mask) ? 0 : 1); + return ONLP_STATUS_OK; +} + +int +psu_pwgood_get(int *pw_good, int i2c_bus, int psu_mask) +{ + int psu_pwgood; + + psu_pwgood = onlp_i2c_readb(i2c_bus, PSU_STATE_REG, PSU_PWGOOD_OFFSET, ONLP_I2C_F_FORCE); + if (psu_pwgood < 0) { + return ONLP_STATUS_E_INTERNAL; + } + + *pw_good = (((psu_pwgood >> 3 ) & psu_mask) ? 1 : 0); + return ONLP_STATUS_OK; +} + +int +qsfp_present_get(int port, int *pres_val) +{ + int reg_addr, val, offset; + + if (port >= 1 && port <= 8) { + reg_addr = QSFP_PRES_REG1; + offset = QSFP_PRES_OFFSET1; + } else if (port >= 9 && port <= 16) { + reg_addr = QSFP_PRES_REG1; + offset = QSFP_PRES_OFFSET2; + } else if (port >= 17 && port <= 24) { + reg_addr = QSFP_PRES_REG2; + offset = QSFP_PRES_OFFSET1; + } else if (port >= 25 && port <= 32) { + reg_addr = QSFP_PRES_REG2; + offset = QSFP_PRES_OFFSET2; + } else { + return ONLP_STATUS_E_INTERNAL; + } + + val = onlp_i2c_readb(I2C_BUS_6, reg_addr, offset, ONLP_I2C_F_FORCE); + if (val < 0) { + return ONLP_STATUS_E_INTERNAL; + } + + *pres_val = val; + + return ONLP_STATUS_OK; +} + + +int +system_led_set(onlp_led_mode_t mode) +{ + int rc; + if(mode == ONLP_LED_MODE_GREEN) { + rc = onlp_i2c_modifyb(I2C_BUS_9, LED_REG, LED_OFFSET, LED_SYS_AND_MASK, + LED_SYS_GMASK, ONLP_I2C_F_FORCE); + } + else if(mode == ONLP_LED_MODE_ORANGE) { + rc = onlp_i2c_modifyb(I2C_BUS_9, LED_REG, LED_OFFSET, LED_SYS_AND_MASK, + LED_SYS_YMASK, ONLP_I2C_F_FORCE); + } else { + return ONLP_STATUS_E_INTERNAL; + } + + if (rc < 0) { + return ONLP_STATUS_E_INTERNAL; + } + + return ONLP_STATUS_OK; +} + +int +fan_led_set(onlp_led_mode_t mode) +{ + int rc; + if(mode == ONLP_LED_MODE_GREEN) { + rc = onlp_i2c_modifyb(I2C_BUS_9, LED_REG, LED_OFFSET, LED_FAN_AND_MASK, + LED_FAN_GMASK, ONLP_I2C_F_FORCE); + } + else if(mode == ONLP_LED_MODE_ORANGE) { + rc = onlp_i2c_modifyb(I2C_BUS_9, LED_REG, LED_OFFSET, LED_FAN_AND_MASK, + LED_FAN_YMASK, ONLP_I2C_F_FORCE); + } else { + return ONLP_STATUS_E_INTERNAL; + } + + if (rc < 0) { + return ONLP_STATUS_E_INTERNAL; + } + + return ONLP_STATUS_OK; +} + +int +psu1_led_set(onlp_led_mode_t mode) +{ + int rc; + if(mode == ONLP_LED_MODE_GREEN) { + rc = onlp_i2c_modifyb(I2C_BUS_9, LED_REG, LED_OFFSET, + LED_PSU1_AND_MASK, LED_PSU1_GMASK, + ONLP_I2C_F_FORCE); + } else if(mode == ONLP_LED_MODE_ORANGE) { + rc = onlp_i2c_modifyb(I2C_BUS_9, LED_REG, LED_OFFSET, + LED_PSU1_AND_MASK, LED_PSU1_YMASK, + ONLP_I2C_F_FORCE); + } else { + return ONLP_STATUS_E_INTERNAL; + } + + if (rc < 0) { + return ONLP_STATUS_E_INTERNAL; + } + + return ONLP_STATUS_OK; +} + +int +psu2_led_set(onlp_led_mode_t mode) +{ + int rc; + if(mode == ONLP_LED_MODE_GREEN) { + rc = onlp_i2c_modifyb(I2C_BUS_9, LED_REG, LED_OFFSET, + LED_PSU2_AND_MASK, LED_PSU2_GMASK, + ONLP_I2C_F_FORCE); + } else if(mode == ONLP_LED_MODE_ORANGE) { + rc = onlp_i2c_modifyb(I2C_BUS_9, LED_REG, LED_OFFSET, + LED_PSU2_AND_MASK, LED_PSU2_YMASK, + ONLP_I2C_F_FORCE); + } else { + return ONLP_STATUS_E_INTERNAL; + } + + + if (rc < 0) { + return ONLP_STATUS_E_INTERNAL; + } + + return ONLP_STATUS_OK; +} + +int +sysi_platform_info_get(onlp_platform_info_t* pi) +{ + int cpld_release, cpld_version, cpld_rev; + + cpld_rev = onlp_i2c_readb(I2C_BUS_0, CPLD_REG, CPLD_VER_OFFSET, ONLP_I2C_F_FORCE); + if (cpld_rev < 0) { + return ONLP_STATUS_E_INTERNAL; + } + + cpld_release = (((cpld_rev) >> 6 & 0x01)); + cpld_version = (((cpld_rev) & 0x3F)); + + pi->cpld_versions = aim_fstrdup( + "CPLD is %d version(0:RD 1:Release), Revision is 0x%02x\n", + cpld_release, cpld_version); + + return ONLP_STATUS_OK; +} diff --git a/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/module/src/platform_lib.h b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/module/src/platform_lib.h new file mode 100755 index 00000000..c06d2de9 --- /dev/null +++ b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/module/src/platform_lib.h @@ -0,0 +1,248 @@ +/************************************************************ + * + * + * Copyright 2014 Big Switch Networks, Inc. + * Copyright 2013 Accton Technology Corporation. + * + * Licensed under the Eclipse Public License, Version 1.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.eclipse.org/legal/epl-v10.html + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, + * either express or implied. See the License for the specific + * language governing permissions and limitations under the + * License. + * + * + ************************************************************ + * + * + * + ***********************************************************/ +#ifndef __PLATFORM_LIB_H__ +#define __PLATFORM_LIB_H__ + +#include +#include +#include +#include +#include +#include "x86_64_ingrasys_s9100_int.h" +#include "x86_64_ingrasys_s9100_log.h" + +#include +#define SYS_HWMON_TEMP_PREFIX "/sys/class/hwmon/hwmon1/device/" +#define SYS_CORE_TEMP_PREFIX "/sys/class/hwmon/hwmon0/device/hwmon/hwmon0/" +#define SYS_FAN_PREFIX "/sys/class/hwmon/hwmon1/device/" +#define SYS_EEPROM_PATH "/sys/bus/i2c/devices/9-0054/eeprom" +#define PSU1_EEPROM_PATH "/sys/bus/i2c/devices/8-0050/eeprom" +#define PSU2_EEPROM_PATH "/sys/bus/i2c/devices/9-0050/eeprom" +#define PSU_STATUS_PRESENT 1 +#define PSU_STATUS_POWER_GOOD 1 +#define FAN_PRESENT 0 +#define FAN_CTRL_SET1 1 +#define FAN_CTRL_SET2 2 +#define MAX_SYS_FAN_NUM 8 +#define BOARD_THERMAL_NUM 6 +#define SYS_FAN_NUM 8 +#define QSFP_NUM 32 + +#define THERMAL_NUM 10 +#define LED_NUM 4 +#define FAN_NUM 10 + + + +#define THERMAL_SHUTDOWN_DEFAULT 105000 + +#define THERMAL_ERROR_DEFAULT 95000 +#define THERMAL_ERROR_FAN_PERC 100 + +#define THERMAL_WARNING_DEFAULT 77000 +#define THERMAL_WARNING_FAN_PERC 80 + +#define THERMAL_NORMAL_DEFAULT 72000 +#define THERMAL_NORMAL_FAN_PERC 50 + + +/* I2C bus */ +#define I2C_BUS_0 0 +#define I2C_BUS_1 1 +#define I2C_BUS_2 2 +#define I2C_BUS_3 3 +#define I2C_BUS_4 4 +#define I2C_BUS_5 5 +#define I2C_BUS_6 6 +#define I2C_BUS_7 7 +#define I2C_BUS_8 8 +#define I2C_BUS_9 9 + +/* PSU */ +#define PSU1_MUX_MASK 0x01 +#define PSU2_MUX_MASK 0x02 +#define PSU_THERMAL1_OFFSET 0x8D +#define PSU_THERMAL2_OFFSET 0x8E +#define PSU_THERMAL_REG 0x58 +#define PSU_FAN_RPM_REG 0x58 +#define PSU_FAN_RPM_OFFSET 0x90 +#define PSU_REG 0x58 +#define PSU_VOUT_OFFSET1 0x20 +#define PSU_VOUT_OFFSET2 0x8B +#define PSU_IOUT_OFFSET 0x8C +#define PSU_POUT_OFFSET 0x96 +#define PSU_PIN_OFFSET 0x97 +#define PSU_STATE_REG 0x33 +#define PSU_PRESENT_OFFSET 0x03 +#define PSU_PWGOOD_OFFSET 0x02 + +/* LED */ +#define LED_REG 0x22 +#define LED_OFFSET 0x02 +#define LED_SYS_AND_MASK 0x3F +#define LED_SYS_GMASK 0x40 +#define LED_SYS_YMASK 0x80 +#define LED_FAN_AND_MASK 0xF3 +#define LED_FAN_GMASK 0x04 +#define LED_FAN_YMASK 0x08 +#define LED_PSU1_AND_MASK 0xFC +#define LED_PSU1_GMASK 0x01 +#define LED_PSU1_YMASK 0x02 +#define LED_PSU2_AND_MASK 0xCF +#define LED_PSU2_GMASK 0x10 +#define LED_PSU2_YMASK 0x20 + +/* SYS */ +#define CPLD_REG 0x33 +#define CPLD_VER_OFFSET 0x01 + +/* QSFP */ +#define QSFP_PRES_REG1 0x20 +#define QSFP_PRES_REG2 0x21 +#define QSFP_PRES_OFFSET1 0x00 +#define QSFP_PRES_OFFSET2 0x01 + +/** led_oid */ +typedef enum led_oid_e { + LED_OID_SYSTEM = ONLP_LED_ID_CREATE(1), + LED_OID_FAN = ONLP_LED_ID_CREATE(2), + LED_OID_PSU1 = ONLP_LED_ID_CREATE(3), + LED_OID_PSU2 = ONLP_LED_ID_CREATE(4), +} led_oid_t; + +/** led_id */ +typedef enum led_id_e { + LED_SYSTEM_LED = 1, + LED_FAN_LED = 2, + LED_PSU1_LED = 3, + LED_PSU2_LED = 4, +} led_id_t; + +/** Thermal_oid */ +typedef enum thermal_oid_e { + THERMAL_OID_FRONT_MAC = ONLP_THERMAL_ID_CREATE(1), + THERMAL_OID_REAR_MAC = ONLP_THERMAL_ID_CREATE(2), + THERMAL_OID_CPU1 = ONLP_THERMAL_ID_CREATE(3), + THERMAL_OID_CPU2 = ONLP_THERMAL_ID_CREATE(4), + THERMAL_OID_CPU3 = ONLP_THERMAL_ID_CREATE(5), + THERMAL_OID_CPU4 = ONLP_THERMAL_ID_CREATE(6), + THERMAL_OID_PSU1_1 = ONLP_THERMAL_ID_CREATE(7), + THERMAL_OID_PSU1_2 = ONLP_THERMAL_ID_CREATE(8), + THERMAL_OID_PSU2_1 = ONLP_THERMAL_ID_CREATE(9), + THERMAL_OID_PSU2_2 = ONLP_THERMAL_ID_CREATE(10) +} thermal_oid_t; + +/** thermal_id */ +typedef enum thermal_id_e { + THERMAL_ID_FRONT_MAC = 1, + THERMAL_ID_REAR_MAC = 2, + THERMAL_ID_CPU1 = 3, + THERMAL_ID_CPU2 = 4, + THERMAL_ID_CPU3 = 5, + THERMAL_ID_CPU4 = 6, + THERMAL_ID_PSU1_1 = 7, + THERMAL_ID_PSU1_2 = 8, + THERMAL_ID_PSU2_1 = 9, + THERMAL_ID_PSU2_2 = 10, +} thermal_id_t; + +/* Shortcut for CPU thermal threshold value. */ +#define THERMAL_THRESHOLD_INIT_DEFAULTS \ + { THERMAL_WARNING_DEFAULT, \ + THERMAL_ERROR_DEFAULT, \ + THERMAL_SHUTDOWN_DEFAULT } + +/** Fan_oid */ +typedef enum fan_oid_e { + FAN_OID_FAN1 = ONLP_FAN_ID_CREATE(1), + FAN_OID_FAN2 = ONLP_FAN_ID_CREATE(2), + FAN_OID_FAN3 = ONLP_FAN_ID_CREATE(3), + FAN_OID_FAN4 = ONLP_FAN_ID_CREATE(4), + FAN_OID_FAN5 = ONLP_FAN_ID_CREATE(5), + FAN_OID_FAN6 = ONLP_FAN_ID_CREATE(6), + FAN_OID_FAN7 = ONLP_FAN_ID_CREATE(7), + FAN_OID_FAN8 = ONLP_FAN_ID_CREATE(8), + FAN_OID_PSU_FAN1 = ONLP_FAN_ID_CREATE(9), + FAN_OID_PSU_FAN2 = ONLP_FAN_ID_CREATE(10) +} fan_oid_t; + +/** fan_id */ +typedef enum fan_id_e { + FAN_ID_FAN1 = 1, + FAN_ID_FAN2 = 2, + FAN_ID_FAN3 = 3, + FAN_ID_FAN4 = 4, + FAN_ID_FAN5 = 5, + FAN_ID_FAN6 = 6, + FAN_ID_FAN7 = 7, + FAN_ID_FAN8 = 8, + FAN_ID_PSU_FAN1 = 9, + FAN_ID_PSU_FAN2 = 10 +} fan_id_t; + +/** led_oid */ +typedef enum psu_oid_e { + PSU_OID_PSU1 = ONLP_PSU_ID_CREATE(1), + PSU_OID_PSU2 = ONLP_PSU_ID_CREATE(2) +} psu_oid_t; + +/** fan_id */ +typedef enum psu_id_e { + PSU_ID_PSU1 = 1, + PSU_ID_PSU2 = 2 +} psu_id_t; + +int psu_thermal_get(onlp_thermal_info_t* info, int id); + +int psu_fan_info_get(onlp_fan_info_t* info, int id); + +int psu_vout_get(onlp_psu_info_t* info, int i2c_bus); + +int psu_iout_get(onlp_psu_info_t* info, int i2c_bus); + +int psu_pout_get(onlp_psu_info_t* info, int i2c_bus); + +int psu_pin_get(onlp_psu_info_t* info, int i2c_bus); + +int psu_eeprom_get(onlp_psu_info_t* info, int id); + +int psu_present_get(int *pw_exist, int i2c_bus, int psu_mask); + +int psu_pwgood_get(int *pw_good, int i2c_bus, int psu_mask); + +int psu2_led_set(onlp_led_mode_t mode); + +int psu1_led_set(onlp_led_mode_t mode); + +int fan_led_set(onlp_led_mode_t mode); + +int system_led_set(onlp_led_mode_t mode); + +int sysi_platform_info_get(onlp_platform_info_t* pi); + +int qsfp_present_get(int port, int *pres_val); + +#endif /* __PLATFORM_LIB_H__ */ diff --git a/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/module/src/psui.c b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/module/src/psui.c new file mode 100755 index 00000000..496bc1ea --- /dev/null +++ b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/module/src/psui.c @@ -0,0 +1,150 @@ +/************************************************************ + * + * + * Copyright 2014, 2015 Big Switch Networks, Inc. + * + * Licensed under the Eclipse Public License, Version 1.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.eclipse.org/legal/epl-v10.html + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, + * either express or implied. See the License for the specific + * language governing permissions and limitations under the + * License. + * + * + ************************************************************ + * + * + * + ***********************************************************/ +#include +#include + +#include "platform_lib.h" + +static onlp_psu_info_t pinfo[] = +{ + { }, /* Not used */ + { + { + PSU_OID_PSU1, + "PSU-1", + 0, + { + FAN_OID_PSU_FAN1, + }, + } + }, + { + { + PSU_OID_PSU2, + "PSU-2", + 0, + { + FAN_OID_PSU_FAN2, + }, + } + } +}; + +int +onlp_psui_init(void) +{ + return ONLP_STATUS_OK; +} + +int +psu_status_info_get(int id, onlp_psu_info_t *info) +{ + int pw_exist, pw_good, rc, psu_mask, i2c_bus; + + if (id == PSU_ID_PSU1) { + i2c_bus = I2C_BUS_8; + psu_mask = PSU1_MUX_MASK; + } else if (id == PSU_ID_PSU2) { + i2c_bus = I2C_BUS_9; + psu_mask = PSU2_MUX_MASK; + } else { + return ONLP_STATUS_E_INTERNAL; + } + + /* Get power present status */ + if ((rc = psu_present_get(&pw_exist, 0, psu_mask)) != ONLP_STATUS_OK) { + return ONLP_STATUS_E_INTERNAL; + } + + if (pw_exist != PSU_STATUS_PRESENT) { + info->status &= ~ONLP_PSU_STATUS_PRESENT; + info->status |= ONLP_PSU_STATUS_FAILED; + return ONLP_STATUS_OK; + } + info->status |= ONLP_PSU_STATUS_PRESENT; + + /* Get power good status */ + if ((rc = psu_pwgood_get(&pw_good, 0, psu_mask)) != ONLP_STATUS_OK) { + return ONLP_STATUS_E_INTERNAL; + } + + if (pw_good != PSU_STATUS_POWER_GOOD) { + info->status |= ONLP_PSU_STATUS_UNPLUGGED; + return ONLP_STATUS_OK; + } + + /* Get power eeprom status */ + if ((rc = psu_eeprom_get(info, id)) != ONLP_STATUS_OK) { + return ONLP_STATUS_E_INTERNAL; + } + + /* Get power iout status */ + if ((rc = psu_iout_get(info, i2c_bus)) != ONLP_STATUS_OK) { + return ONLP_STATUS_E_INTERNAL; + } + + /* Get power pout status */ + if ((rc = psu_pout_get(info, i2c_bus)) != ONLP_STATUS_OK) { + return ONLP_STATUS_E_INTERNAL; + } + + /* Get power pin status */ + if ((rc = psu_pin_get(info, i2c_bus)) != ONLP_STATUS_OK) { + return ONLP_STATUS_E_INTERNAL; + } + + /* Get power vout status */ + if ((rc = psu_vout_get(info, i2c_bus)) != ONLP_STATUS_OK) { + return ONLP_STATUS_E_INTERNAL; + } + + return ONLP_STATUS_OK; +} + +int +onlp_psui_info_get(onlp_oid_t id, onlp_psu_info_t* info) +{ + int pid; + + pid = ONLP_OID_ID_GET(id); + memset(info, 0, sizeof(onlp_psu_info_t)); + + /* Set the onlp_oid_hdr_t */ + *info = pinfo[pid]; + + switch (pid) { + case PSU_ID_PSU1: + case PSU_ID_PSU2: + return psu_status_info_get(pid, info); + break; + default: + return ONLP_STATUS_E_UNSUPPORTED; + break; + } + + return ONLP_STATUS_OK; + + +} \ No newline at end of file diff --git a/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/module/src/sfpi.c b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/module/src/sfpi.c new file mode 100755 index 00000000..7a17a533 --- /dev/null +++ b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/module/src/sfpi.c @@ -0,0 +1,159 @@ +/************************************************************ + * + * + * Copyright 2014, 2015 Big Switch Networks, Inc. + * + * Licensed under the Eclipse Public License, Version 1.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.eclipse.org/legal/epl-v10.html + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, + * either express or implied. See the License for the specific + * language governing permissions and limitations under the + * License. + * + * + ************************************************************ + * + * + ***********************************************************/ +#include +#include +#include +#include +#include +#include +#include +#include "x86_64_ingrasys_s9100_log.h" +#include "platform_lib.h" + +int +onlp_sfpi_init(void) +{ + return ONLP_STATUS_OK; +} + +int +onlp_sfpi_bitmap_get(onlp_sfp_bitmap_t* bmap) +{ + int p; + for(p = 1; p <= QSFP_NUM; p++) { + AIM_BITMAP_SET(bmap, p); + } + return ONLP_STATUS_OK; +} + +int +onlp_sfpi_is_present(int port) +{ + int status, presentchan, rc, pres_val; + + if ((rc = qsfp_present_get(port, &pres_val)) != ONLP_STATUS_OK) { + return ONLP_STATUS_E_INTERNAL; + } + + presentchan = (( (port - 1) % 8 )); + presentchan = (( ((presentchan % 2)) == 1 ? presentchan - 1 : presentchan + 1 )); + + /* status: 0 -> Down, 1 -> Up */ + status=(( ((pres_val & ( 1 << presentchan))) != 0 ? 0 : 1 )); + + return status; +} + + +int +onlp_sfpi_presence_bitmap_get(onlp_sfp_bitmap_t* dst) +{ + int p = 1; + int rc = 0; + + for (p = 1; p <= QSFP_NUM; p++) { + rc = onlp_sfpi_is_present(p); + AIM_BITMAP_MOD(dst, p, (1 == rc) ? 1 : 0); + } + + return ONLP_STATUS_OK; +} + +/* + * This function reads the SFPs idrom and returns in + * in the data buffer provided. + */ +int +onlp_sfpi_eeprom_read(int port, uint8_t data[256]) +{ + int eeprombusidx, eeprombus, eeprombusbase; + char eeprom_path[512], eeprom_addr[32]; + memset(eeprom_path, 0, sizeof(eeprom_path)); + memset(eeprom_addr, 0, sizeof(eeprom_addr)); + strncpy(eeprom_addr, "0050", sizeof(eeprom_addr)); + + memset(data, 0, 256); + + if (port >= 1 && port <= 8) { + eeprombusbase=10; + } else if (port >= 9 && port <= 16) { + eeprombusbase=18; + } else if (port >= 17 && port <= 24) { + eeprombusbase=26; + } else if (port >= 25 && port <= 32) { + eeprombusbase=34; + } else { + return 0; + } + + eeprombusidx = port % 8; + switch (eeprombusidx) { + case 1: + eeprombus = eeprombusbase + 1; + break; + case 2: + eeprombus = eeprombusbase + 0; + break; + case 3: + eeprombus = eeprombusbase + 3; + break; + case 4: + eeprombus = eeprombusbase + 2; + break; + case 5: + eeprombus = eeprombusbase + 5; + break; + case 6: + eeprombus = eeprombusbase + 4; + break; + case 7: + eeprombus = eeprombusbase + 7; + break; + case 0: + eeprombus = eeprombusbase + 6; + break; + default: + return ONLP_STATUS_E_INTERNAL; + break; + } + + snprintf(eeprom_path, sizeof(eeprom_path), + "/sys/bus/i2c/devices/%d-%s/eeprom", eeprombus, eeprom_addr); + + if (onlplib_sfp_eeprom_read_file(eeprom_path, data) != 0) { + AIM_LOG_INFO("Unable to read eeprom from port(%d)\r\n", port); + return ONLP_STATUS_E_INTERNAL; + } + + return ONLP_STATUS_OK; +} + +/* + * De-initialize the SFPI subsystem. + */ +int +onlp_sfpi_denit(void) +{ + return ONLP_STATUS_OK; +} diff --git a/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/module/src/sysi.c b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/module/src/sysi.c new file mode 100755 index 00000000..20c65b24 --- /dev/null +++ b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/module/src/sysi.c @@ -0,0 +1,292 @@ +/************************************************************ + * + * + * Copyright 2014, 2015 Big Switch Networks, Inc. + * + * Licensed under the Eclipse Public License, Version 1.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.eclipse.org/legal/epl-v10.html + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, + * either express or implied. See the License for the specific + * language governing permissions and limitations under the + * License. + * + * + ************************************************************ + * + * + * + ***********************************************************/ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "platform_lib.h" + +const char* +onlp_sysi_platform_get(void) +{ + return "x86-64-ingrasys-s9100-r0"; +} + +int +onlp_sysi_init(void) +{ + return ONLP_STATUS_OK; +} + +int +onlp_sysi_onie_data_get(uint8_t** data, int* size) +{ + uint8_t* rdata = aim_zmalloc(256); + if(onlp_file_read(rdata, 256, size, SYS_EEPROM_PATH) == ONLP_STATUS_OK) { + if(*size == 256) { + AIM_LOG_INFO("read success\n"); + *data = rdata; + return ONLP_STATUS_OK; + } + } + + AIM_LOG_INFO("Unable to data get eeprom \n"); + aim_free(rdata); + *size = 0; + return ONLP_STATUS_E_INTERNAL; +} + +int +onlp_sysi_oids_get(onlp_oid_t* table, int max) +{ + onlp_oid_t* e = table; + memset(table, 0, max*sizeof(onlp_oid_t)); + int i; + + /* 2 PSUs */ + *e++ = ONLP_PSU_ID_CREATE(1); + *e++ = ONLP_PSU_ID_CREATE(2); + + /* LEDs Item */ + for (i=1; i<=LED_NUM; i++) { + *e++ = ONLP_LED_ID_CREATE(i); + } + + /* THERMALs Item */ + for (i=1; i<=THERMAL_NUM; i++) { + *e++ = ONLP_THERMAL_ID_CREATE(i); + } + + /* Fans Item */ + for (i=1; i<=FAN_NUM; i++) { + *e++ = ONLP_FAN_ID_CREATE(i); + } + + return ONLP_STATUS_OK; +} + +int +decide_fan_percentage(int is_up, int new_temp) +{ + int new_perc; + if (is_up) { + if (new_temp >= THERMAL_ERROR_DEFAULT) { + new_perc = THERMAL_ERROR_FAN_PERC; + } else if (new_temp >= THERMAL_WARNING_DEFAULT) { + new_perc = THERMAL_WARNING_FAN_PERC; + } else { + new_perc = THERMAL_NORMAL_FAN_PERC; + } + } else { + if (new_temp <= THERMAL_NORMAL_DEFAULT) { + new_perc = THERMAL_NORMAL_FAN_PERC; + } else if (new_temp <= THERMAL_WARNING_DEFAULT) { + new_perc = THERMAL_WARNING_FAN_PERC; + } else { + new_perc = THERMAL_ERROR_FAN_PERC; + } + } + + return new_perc; +} + +int +platform_thermal_temp_get(int *thermal_temp) +{ + int i, temp, max_temp, rc; + onlp_thermal_info_t thermal_info; + memset(&thermal_info, 0, sizeof(thermal_info)); + uint32_t thermal_arr[] = { THERMAL_OID_FRONT_MAC, + THERMAL_OID_REAR_MAC, + THERMAL_OID_CPU1, + THERMAL_OID_CPU2, + THERMAL_OID_CPU3, + THERMAL_OID_CPU4 }; + max_temp = 0; + + for (i=0; i max_temp) { + max_temp = temp; + } + } + *thermal_temp = max_temp; + + return ONLP_STATUS_OK; +} + +int +onlp_sysi_platform_manage_fans(void) +{ + int rc, is_up ,new_temp, thermal_temp, diff; + static int new_perc = 0, ori_perc = 0; + static int ori_temp = 0; + onlp_thermal_info_t thermal_info; + memset(&thermal_info, 0, sizeof(thermal_info)); + + /* get new temperature */ + if ((rc = platform_thermal_temp_get(&thermal_temp)) != ONLP_STATUS_OK) { + goto _EXIT; + } + + new_temp = thermal_temp; + diff = new_temp - ori_temp; + + if (diff == 0) { + goto _EXIT; + } else { + is_up = (diff > 0 ? 1 : 0); + } + + new_perc = decide_fan_percentage(is_up, new_temp); + + if (ori_perc == new_perc) { + goto _EXIT; + } + + + AIM_LOG_INFO("Front Fan Speeds Percent are now at %d%%", new_perc); + + if ((rc = onlp_fani_percentage_set(THERMAL_OID_FRONT_MAC, new_perc)) != ONLP_STATUS_OK) { + goto _EXIT; + } + + /* update */ + ori_perc = new_perc; + ori_temp = new_temp; + +_EXIT : + return rc; +} + +int +onlp_sysi_platform_manage_leds(void) +{ + int psu1_status, psu2_status, rc, i, tmp_fan_status; + static int pre_psu1_status = 0, pre_psu2_status = 0, pre_fan_status = 0; + + onlp_psu_info_t psu_info; + onlp_fan_info_t fan_info; + memset(&psu_info, 0, sizeof(onlp_psu_info_t)); + memset(&fan_info, 0, sizeof(onlp_fan_info_t)); + uint32_t fan_arr[] = { FAN_OID_FAN1, + FAN_OID_FAN2, + FAN_OID_FAN3, + FAN_OID_FAN4, + FAN_OID_FAN5, + FAN_OID_FAN6, + FAN_OID_FAN7, + FAN_OID_FAN8, }; + + /* PSU LED CTRL */ + if ((rc = onlp_psui_info_get(PSU_OID_PSU1, &psu_info)) != ONLP_STATUS_OK) { + goto _EXIT; + } + + psu1_status = psu_info.status; + if (psu1_status != pre_psu1_status) { + if(psu1_status != ONLP_PSU_STATUS_PRESENT) { + rc = onlp_ledi_mode_set(LED_OID_PSU1, ONLP_LED_MODE_ORANGE); + } else { + rc = onlp_ledi_mode_set(LED_OID_PSU1, ONLP_LED_MODE_GREEN); + } + + if (rc != ONLP_STATUS_OK) { + goto _EXIT; + } + pre_psu1_status = psu1_status; + } + + if ((rc = onlp_psui_info_get(PSU_OID_PSU2, &psu_info)) != ONLP_STATUS_OK) { + goto _EXIT; + } + + psu2_status = psu_info.status; + if( psu2_status != pre_psu2_status) { + if(psu2_status != ONLP_PSU_STATUS_PRESENT) { + rc = onlp_ledi_mode_set(LED_OID_PSU2, ONLP_LED_MODE_ORANGE); + } else { + rc = onlp_ledi_mode_set(LED_OID_PSU2, ONLP_LED_MODE_GREEN); + } + + if (rc != ONLP_STATUS_OK) { + goto _EXIT; + } + pre_psu2_status = psu2_status; + } + + /* FAN LED CTRL */ + tmp_fan_status = ONLP_LED_STATUS_PRESENT; + for (i=0; i + * + * Copyright 2014, 2015 Big Switch Networks, Inc. + * + * Licensed under the Eclipse Public License, Version 1.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.eclipse.org/legal/epl-v10.html + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, + * either express or implied. See the License for the specific + * language governing permissions and limitations under the + * License. + * + * + ************************************************************ + * + * Thermal Sensor Platform Implementation. + * + ***********************************************************/ +#include +#include +#include "x86_64_ingrasys_s9100_log.h" +#include "platform_lib.h" + +static onlp_thermal_info_t thermal_info[] = { + { }, /* Not used */ + { { THERMAL_OID_FRONT_MAC, "Chassis Thermal (Front)", 0}, + ONLP_THERMAL_STATUS_PRESENT, + ONLP_THERMAL_CAPS_ALL, 0, THERMAL_THRESHOLD_INIT_DEFAULTS + }, + { { THERMAL_OID_REAR_MAC, "Chassis Thermal (Rear)", 0}, + ONLP_THERMAL_STATUS_PRESENT, + ONLP_THERMAL_CAPS_ALL, 0, THERMAL_THRESHOLD_INIT_DEFAULTS + }, + { { THERMAL_OID_CPU1, "CPU Thermal 1", 0}, + ONLP_THERMAL_STATUS_PRESENT, + ONLP_THERMAL_CAPS_ALL, 0, THERMAL_THRESHOLD_INIT_DEFAULTS + }, + { { THERMAL_OID_CPU2, "CPU Thermal 2", 0}, + ONLP_THERMAL_STATUS_PRESENT, + ONLP_THERMAL_CAPS_ALL, 0, THERMAL_THRESHOLD_INIT_DEFAULTS + }, + { { THERMAL_OID_CPU3, "CPU Thermal 3", 0}, + ONLP_THERMAL_STATUS_PRESENT, + ONLP_THERMAL_CAPS_ALL, 0, THERMAL_THRESHOLD_INIT_DEFAULTS + }, + { { THERMAL_OID_CPU4, "CPU Thermal 4", 0}, + ONLP_THERMAL_STATUS_PRESENT, + ONLP_THERMAL_CAPS_ALL, 0, THERMAL_THRESHOLD_INIT_DEFAULTS + }, + { { THERMAL_OID_PSU1_1, "PSU-1 Thermal 1", PSU_OID_PSU1}, + ONLP_THERMAL_STATUS_PRESENT, + ONLP_THERMAL_CAPS_GET_TEMPERATURE, 0 + }, + { { THERMAL_OID_PSU1_2, "PSU-1 Thermal 2", PSU_OID_PSU1}, + ONLP_THERMAL_STATUS_PRESENT, + ONLP_THERMAL_CAPS_GET_TEMPERATURE, 0 + }, + { { THERMAL_OID_PSU2_1, "PSU-2 Thermal 1", PSU_OID_PSU2}, + ONLP_THERMAL_STATUS_PRESENT, + ONLP_THERMAL_CAPS_GET_TEMPERATURE, 0 + }, + { { THERMAL_OID_PSU2_2, "PSU-2 Thermal 2", PSU_OID_PSU2}, + ONLP_THERMAL_STATUS_PRESENT, + ONLP_THERMAL_CAPS_GET_TEMPERATURE, 0 + } +}; + +/* + * This will be called to intiialize the thermali subsystem. + */ +int +onlp_thermali_init(void) +{ + return ONLP_STATUS_OK; +} + +static int +sys_thermal_info_get(onlp_thermal_info_t* info, int id) +{ + int rv; + + rv = onlp_file_read_int(&info->mcelsius, + SYS_FAN_PREFIX "/temp%d_input", id); + + if(rv == ONLP_STATUS_E_INTERNAL) { + return rv; + } + + if(rv == ONLP_STATUS_E_MISSING) { + info->status &= ~1; + return 0; + } + + return ONLP_STATUS_OK; +} + +static int +cpu_thermal_info_get(onlp_thermal_info_t* info, int id) +{ + int rv; + int offset; + offset = 1; + id = id - offset; + rv = onlp_file_read_int(&info->mcelsius, + SYS_CORE_TEMP_PREFIX "/temp%d_input", id); + + if(rv == ONLP_STATUS_E_INTERNAL) { + return rv; + } + + if(rv == ONLP_STATUS_E_MISSING) { + info->status &= ~1; + return 0; + } + + return ONLP_STATUS_OK; +} + + +int +psu_thermal_info_get(onlp_thermal_info_t* info, int id) +{ + int rv; + + rv = psu_thermal_get(info, id); + if(rv == ONLP_STATUS_E_INTERNAL) { + return rv; + } + + return ONLP_STATUS_OK; +} + +/* + * Retrieve the information structure for the given thermal OID. + * + * If the OID is invalid, return ONLP_E_STATUS_INVALID. + * If an unexpected error occurs, return ONLP_E_STATUS_INTERNAL. + * Otherwise, return ONLP_STATUS_OK with the OID's information. + * + * Note -- it is expected that you fill out the information + * structure even if the sensor described by the OID is not present. + */ +int +onlp_thermali_info_get(onlp_oid_t id, onlp_thermal_info_t* info) +{ + int sensor_id, rc; + sensor_id = ONLP_OID_ID_GET(id); + + *info = thermal_info[sensor_id]; + info->caps |= ONLP_THERMAL_CAPS_GET_TEMPERATURE; + + switch (sensor_id) { + case THERMAL_ID_FRONT_MAC: + case THERMAL_ID_REAR_MAC: + rc = sys_thermal_info_get(info, sensor_id); + break; + case THERMAL_ID_CPU1: + case THERMAL_ID_CPU2: + case THERMAL_ID_CPU3: + case THERMAL_ID_CPU4: + rc = cpu_thermal_info_get(info, sensor_id); + break; + case THERMAL_ID_PSU1_1: + case THERMAL_ID_PSU1_2: + case THERMAL_ID_PSU2_1: + case THERMAL_ID_PSU2_2: + rc = psu_thermal_info_get(info, sensor_id); + break; + default: + return ONLP_STATUS_E_INTERNAL; + break; + } + + return rc; +} diff --git a/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/module/src/x86_64_ingrasys_s9100_config.c b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/module/src/x86_64_ingrasys_s9100_config.c new file mode 100755 index 00000000..4325b6f5 --- /dev/null +++ b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/module/src/x86_64_ingrasys_s9100_config.c @@ -0,0 +1,101 @@ +/************************************************************ + * + * + * Copyright 2014, 2015 Big Switch Networks, Inc. + * + * Licensed under the Eclipse Public License, Version 1.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.eclipse.org/legal/epl-v10.html + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, + * either express or implied. See the License for the specific + * language governing permissions and limitations under the + * License. + * + * + ************************************************************ + * + * + * + ***********************************************************/ + +#include + +/* */ +#define __x86_64_ingrasys_s9100_config_STRINGIFY_NAME(_x) #_x +#define __x86_64_ingrasys_s9100_config_STRINGIFY_VALUE(_x) __x86_64_ingrasys_s9100_config_STRINGIFY_NAME(_x) +x86_64_ingrasys_s9100_config_settings_t x86_64_ingrasys_s9100_config_settings[] = +{ +#ifdef INGRAYSYS_S9100_CONFIG_INCLUDE_LOGGING + { __x86_64_ingrasys_s9100_config_STRINGIFY_NAME(INGRAYSYS_S9100_CONFIG_INCLUDE_LOGGING), __x86_64_ingrasys_s9100_config_STRINGIFY_VALUE(INGRAYSYS_S9100_CONFIG_INCLUDE_LOGGING) }, +#else +{ INGRAYSYS_S9100_CONFIG_INCLUDE_LOGGING(__x86_64_ingrasys_s9100_config_STRINGIFY_NAME), "__undefined__" }, +#endif +#ifdef INGRAYSYS_S9100_CONFIG_LOG_OPTIONS_DEFAULT + { __x86_64_ingrasys_s9100_config_STRINGIFY_NAME(INGRAYSYS_S9100_CONFIG_LOG_OPTIONS_DEFAULT), __x86_64_ingrasys_s9100_config_STRINGIFY_VALUE(INGRAYSYS_S9100_CONFIG_LOG_OPTIONS_DEFAULT) }, +#else +{ INGRAYSYS_S9100_CONFIG_LOG_OPTIONS_DEFAULT(__x86_64_ingrasys_s9100_config_STRINGIFY_NAME), "__undefined__" }, +#endif +#ifdef INGRAYSYS_S9100_CONFIG_LOG_BITS_DEFAULT + { __x86_64_ingrasys_s9100_config_STRINGIFY_NAME(INGRAYSYS_S9100_CONFIG_LOG_BITS_DEFAULT), __x86_64_ingrasys_s9100_config_STRINGIFY_VALUE(INGRAYSYS_S9100_CONFIG_LOG_BITS_DEFAULT) }, +#else +{ INGRAYSYS_S9100_CONFIG_LOG_BITS_DEFAULT(__x86_64_ingrasys_s9100_config_STRINGIFY_NAME), "__undefined__" }, +#endif +#ifdef INGRAYSYS_S9100_CONFIG_LOG_CUSTOM_BITS_DEFAULT + { __x86_64_ingrasys_s9100_config_STRINGIFY_NAME(INGRAYSYS_S9100_CONFIG_LOG_CUSTOM_BITS_DEFAULT), __x86_64_ingrasys_s9100_config_STRINGIFY_VALUE(INGRAYSYS_S9100_CONFIG_LOG_CUSTOM_BITS_DEFAULT) }, +#else +{ INGRAYSYS_S9100_CONFIG_LOG_CUSTOM_BITS_DEFAULT(__x86_64_ingrasys_s9100_config_STRINGIFY_NAME), "__undefined__" }, +#endif +#ifdef INGRAYSYS_S9100_CONFIG_PORTING_STDLIB + { __x86_64_ingrasys_s9100_config_STRINGIFY_NAME(INGRAYSYS_S9100_CONFIG_PORTING_STDLIB), __x86_64_ingrasys_s9100_config_STRINGIFY_VALUE(INGRAYSYS_S9100_CONFIG_PORTING_STDLIB) }, +#else +{ INGRAYSYS_S9100_CONFIG_PORTING_STDLIB(__x86_64_ingrasys_s9100_config_STRINGIFY_NAME), "__undefined__" }, +#endif +#ifdef INGRAYSYS_S9100_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS + { __x86_64_ingrasys_s9100_config_STRINGIFY_NAME(INGRAYSYS_S9100_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS), __x86_64_ingrasys_s9100_config_STRINGIFY_VALUE(INGRAYSYS_S9100_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS) }, +#else +{ INGRAYSYS_S9100_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS(__x86_64_ingrasys_s9100_config_STRINGIFY_NAME), "__undefined__" }, +#endif +#ifdef INGRAYSYS_S9100_CONFIG_INCLUDE_UCLI + { __x86_64_ingrasys_s9100_config_STRINGIFY_NAME(INGRAYSYS_S9100_CONFIG_INCLUDE_UCLI), __x86_64_ingrasys_s9100_config_STRINGIFY_VALUE(INGRAYSYS_S9100_CONFIG_INCLUDE_UCLI) }, +#else +{ INGRAYSYS_S9100_CONFIG_INCLUDE_UCLI(__x86_64_ingrasys_s9100_config_STRINGIFY_NAME), "__undefined__" }, +#endif +#ifdef INGRAYSYS_S9100_CONFIG_SFP_COUNT + { __x86_64_ingrasys_s9100_config_STRINGIFY_NAME(INGRAYSYS_S9100_CONFIG_SFP_COUNT), __x86_64_ingrasys_s9100_config_STRINGIFY_VALUE(INGRAYSYS_S9100_CONFIG_SFP_COUNT) }, +#else +{ INGRAYSYS_S9100_CONFIG_SFP_COUNT(__x86_64_ingrasys_s9100_config_STRINGIFY_NAME), "__undefined__" }, +#endif + { NULL, NULL } +}; +#undef __x86_64_ingrasys_s9100_config_STRINGIFY_VALUE +#undef __x86_64_ingrasys_s9100_config_STRINGIFY_NAME + +const char* +x86_64_ingrasys_s9100_config_lookup(const char* setting) +{ + int i; + for(i = 0; x86_64_ingrasys_s9100_config_settings[i].name; i++) { + if(strcmp(x86_64_ingrasys_s9100_config_settings[i].name, setting)) { + return x86_64_ingrasys_s9100_config_settings[i].value; + } + } + return NULL; +} + +int +x86_64_ingrasys_s9100_config_show(struct aim_pvs_s* pvs) +{ + int i; + for(i = 0; x86_64_ingrasys_s9100_config_settings[i].name; i++) { + aim_printf(pvs, "%s = %s\n", x86_64_ingrasys_s9100_config_settings[i].name, x86_64_ingrasys_s9100_config_settings[i].value); + } + return i; +} + +/* */ + diff --git a/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/module/src/x86_64_ingrasys_s9100_enums.c b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/module/src/x86_64_ingrasys_s9100_enums.c new file mode 100755 index 00000000..6bbc233c --- /dev/null +++ b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/module/src/x86_64_ingrasys_s9100_enums.c @@ -0,0 +1,30 @@ +/************************************************************ + * + * + * Copyright 2014, 2015 Big Switch Networks, Inc. + * + * Licensed under the Eclipse Public License, Version 1.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.eclipse.org/legal/epl-v10.html + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, + * either express or implied. See the License for the specific + * language governing permissions and limitations under the + * License. + * + * + ************************************************************ + * + * + * + ***********************************************************/ + +#include + +/* <--auto.start.enum(ALL).source> */ +/* */ + diff --git a/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/module/src/x86_64_ingrasys_s9100_int.h b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/module/src/x86_64_ingrasys_s9100_int.h new file mode 100755 index 00000000..f1921224 --- /dev/null +++ b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/module/src/x86_64_ingrasys_s9100_int.h @@ -0,0 +1,29 @@ +/************************************************************ + * + * + * Copyright 2014, 2015 Big Switch Networks, Inc. + * + * Licensed under the Eclipse Public License, Version 1.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.eclipse.org/legal/epl-v10.html + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, + * either express or implied. See the License for the specific + * language governing permissions and limitations under the + * License. + * + * + ************************************************************ + * + * + * + ***********************************************************/ + +#ifndef __x86_64_ingrasys_s9100_INT_H__ +#define __x86_64_ingrasys_s9100_INT_H__ + +#endif /* __x86_64_ingrasys_s9100_INT_H__ */ diff --git a/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/module/src/x86_64_ingrasys_s9100_log.c b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/module/src/x86_64_ingrasys_s9100_log.c new file mode 100755 index 00000000..07f60540 --- /dev/null +++ b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/module/src/x86_64_ingrasys_s9100_log.c @@ -0,0 +1,38 @@ +/************************************************************ + * + * + * Copyright 2014, 2015 Big Switch Networks, Inc. + * + * Licensed under the Eclipse Public License, Version 1.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.eclipse.org/legal/epl-v10.html + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, + * either express or implied. See the License for the specific + * language governing permissions and limitations under the + * License. + * + * + ************************************************************ + * + * + * + ***********************************************************/ + +#include + +#include "x86_64_ingrasys_s9100_log.h" +/* + * x86_64_ingrasys_s9100 log struct. + */ +AIM_LOG_STRUCT_DEFINE( + INGRAYSYS_S9100_CONFIG_LOG_OPTIONS_DEFAULT, + INGRAYSYS_S9100_CONFIG_LOG_BITS_DEFAULT, + NULL, /* Custom log map */ + INGRAYSYS_S9100_CONFIG_LOG_CUSTOM_BITS_DEFAULT + ); + diff --git a/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/module/src/x86_64_ingrasys_s9100_log.h b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/module/src/x86_64_ingrasys_s9100_log.h new file mode 100755 index 00000000..2c234703 --- /dev/null +++ b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/module/src/x86_64_ingrasys_s9100_log.h @@ -0,0 +1,32 @@ +/************************************************************ + * + * + * Copyright 2014, 2015 Big Switch Networks, Inc. + * + * Licensed under the Eclipse Public License, Version 1.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.eclipse.org/legal/epl-v10.html + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, + * either express or implied. See the License for the specific + * language governing permissions and limitations under the + * License. + * + * + ************************************************************ + * + * + * + ***********************************************************/ + +#ifndef __x86_64_ingrasys_s9100_LOG_H__ +#define __x86_64_ingrasys_s9100_LOG_H__ + +#define AIM_LOG_MODULE_NAME x86_64_ingrasys_s9100 +#include + +#endif /* __x86_64_ingrasys_s9100_LOG_H__ */ diff --git a/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/module/src/x86_64_ingrasys_s9100_module.c b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/module/src/x86_64_ingrasys_s9100_module.c new file mode 100755 index 00000000..1a79380e --- /dev/null +++ b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/module/src/x86_64_ingrasys_s9100_module.c @@ -0,0 +1,44 @@ +/************************************************************ + * + * + * Copyright 2014, 2015 Big Switch Networks, Inc. + * + * Licensed under the Eclipse Public License, Version 1.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.eclipse.org/legal/epl-v10.html + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, + * either express or implied. See the License for the specific + * language governing permissions and limitations under the + * License. + * + * + ************************************************************ + * + * + * + ***********************************************************/ + +#include + +#include "x86_64_ingrasys_s9100_log.h" + +static int +datatypes_init__(void) +{ +#define INGRAYSYS_S9100_ENUMERATION_ENTRY(_enum_name, _desc) AIM_DATATYPE_MAP_REGISTER(_enum_name, _enum_name##_map, _desc, AIM_LOG_INTERNAL); +#include + return 0; +} + +void __x86_64_ingrasys_s9100_module_init__(void) +{ + AIM_LOG_STRUCT_REGISTER(); + datatypes_init__(); +} + +int __onlp_platform_version__ = 1; diff --git a/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/module/src/x86_64_ingrasys_s9100_ucli.c b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/module/src/x86_64_ingrasys_s9100_ucli.c new file mode 100755 index 00000000..b359a04c --- /dev/null +++ b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/onlp/builds/src/x86_64_ingrasys_s9100/module/src/x86_64_ingrasys_s9100_ucli.c @@ -0,0 +1,82 @@ +/************************************************************ + * + * + * Copyright 2014, 2015 Big Switch Networks, Inc. + * + * Licensed under the Eclipse Public License, Version 1.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.eclipse.org/legal/epl-v10.html + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, + * either express or implied. See the License for the specific + * language governing permissions and limitations under the + * License. + * + * + ************************************************************ + * + * + * + ***********************************************************/ + +#include + +#if ONLPSIM_CONFIG_INCLUDE_UCLI == 1 + +#include +#include +#include + +static ucli_status_t +x86_64_ingrasys_s9100_ucli_ucli__config__(ucli_context_t* uc) +{ + UCLI_HANDLER_MACRO_MODULE_CONFIG(x86_64_ingrasys_s9100) +} + +/* */ +/****************************************************************************** + * + * These handler table(s) were autogenerated from the symbols in this + * source file. + * + *****************************************************************************/ +static ucli_command_handler_f x86_64_ingrasys_s9100_ucli_ucli_handlers__[] = +{ + x86_64_ingrasys_s9100_ucli_ucli__config__, + NULL +}; +/******************************************************************************/ +/* */ + +static ucli_module_t +x86_64_ingrasys_s9100_ucli_module__ = + { + "x86_64_ingrasys_s9100_ucli", + NULL, + x86_64_ingrasys_s9100_ucli_ucli_handlers__, + NULL, + NULL, + }; + +ucli_node_t* +x86_64_ingrasys_s9100_ucli_node_create(void) +{ + ucli_node_t* n; + ucli_module_init(&x86_64_ingrasys_s9100_ucli_module__); + n = ucli_node_create("x86_64_ingrasys_s9100", NULL, &x86_64_ingrasys_s9100_ucli_module__); + ucli_node_subnode_add(n, ucli_module_log_node_create("x86_64_ingrasys_s9100")); + return n; +} + +#else +void* +x86_64_ingrasys_s9100_ucli_node_create(void) +{ + return NULL; +} +#endif + diff --git a/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/platform-config/Makefile b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/platform-config/Makefile new file mode 100755 index 00000000..003238cf --- /dev/null +++ b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/platform-config/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/platform-config/r0/Makefile b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/platform-config/r0/Makefile new file mode 100755 index 00000000..003238cf --- /dev/null +++ b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/platform-config/r0/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/platform-config/r0/PKG.yml b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/platform-config/r0/PKG.yml new file mode 100755 index 00000000..afedc8f3 --- /dev/null +++ b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/platform-config/r0/PKG.yml @@ -0,0 +1 @@ +!include $ONL_TEMPLATES/platform-config-platform.yml ARCH=amd64 VENDOR=ingrasys BASENAME=x86-64-ingrasys-s9100 REVISION=r0 diff --git a/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/platform-config/r0/src/lib/x86-64-ingrasys-s9100-r0.yml b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/platform-config/r0/src/lib/x86-64-ingrasys-s9100-r0.yml new file mode 100755 index 00000000..7d45ee0d --- /dev/null +++ b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/platform-config/r0/src/lib/x86-64-ingrasys-s9100-r0.yml @@ -0,0 +1,30 @@ +--- + +###################################################################### +# +# platform-config for x86-64-ingrasys-s9100 +# +###################################################################### + +x86-64-ingrasys-s9100-r0: + + grub: + + serial: >- + --port=0x2f8 + --speed=115200 + --word=8 + --parity=no + --stop=1 + + kernel: + <<: *kernel-3-16 + + args: >- + console=ttyS1,115200n8 + + ##network + ## interfaces: + ## ma1: + ## name: ~ + ## syspath: pci0000:00/0000:00:03.0 diff --git a/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/platform-config/r0/src/python/x86_64_ingrasys_s9100_r0/__init__.py b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/platform-config/r0/src/python/x86_64_ingrasys_s9100_r0/__init__.py new file mode 100755 index 00000000..86c4ba66 --- /dev/null +++ b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9100/platform-config/r0/src/python/x86_64_ingrasys_s9100_r0/__init__.py @@ -0,0 +1,496 @@ +from onl.platform.base import * +from onl.platform.ingrasys import * +import os + +class OnlPlatform_x86_64_ingrasys_s9100_r0(OnlPlatformingrasys): + PLATFORM='x86-64-ingrasys-s9100-r0' + MODEL="s9100" + SYS_OBJECT_ID=".8.1" + + def baseconfig(self): + + self.insmod("eeprom_mb") + self.insmod("w83795") + self.insmod("eeprom") + + ########### initialize I2C bus 1 ########### + self.new_i2c_device('pca9548', 0x70, 1) + + # initialize i2c + self.new_i2c_devices( + [ + ('pca9548', 0x71, 2), + ('pca9548', 0x72, 3), + ('pca9548', 0x73, 4), + ('pca9548', 0x74, 5), + ] + ) + + # initialize SMBUS0 IO Expander + os.system("i2cset -y 0 0x27 4 0x00") + os.system("i2cset -y 0 0x27 5 0x00") + os.system("i2cset -y 0 0x27 2 0x00") + os.system("i2cset -y 0 0x27 3 0x00") + os.system("i2cset -y 0 0x27 6 0xFF") + os.system("i2cset -y 0 0x27 7 0xFF") + + # initialize SMBUS1 ABS + os.system("i2cset -y 6 0x20 4 0x00") + os.system("i2cset -y 6 0x20 5 0x00") + os.system("i2cset -y 6 0x20 6 0xFF") + os.system("i2cset -y 6 0x20 7 0xFF") + + os.system("i2cset -y 6 0x21 4 0x00") + os.system("i2cset -y 6 0x21 5 0x00") + os.system("i2cset -y 6 0x21 6 0xFF") + os.system("i2cset -y 6 0x21 7 0xFF") + # initialize Transcevior INT + os.system("i2cset -y -r 6 0x22 4 0x00") + os.system("i2cset -y -r 6 0x22 5 0x00") + os.system("i2cset -y -r 6 0x22 6 0xFF") + os.system("i2cset -y -r 6 0x22 7 0xFF") + + os.system("i2cset -y -r 6 0x23 4 0x00") + os.system("i2cset -y -r 6 0x23 5 0x00") + os.system("i2cset -y -r 6 0x23 6 0xFF") + os.system("i2cset -y -r 6 0x23 7 0xFF") + + # initialize set ZQSFP LP_MODE = 0 + os.system("i2cset -y -r 7 0x20 4 0x00") + os.system("i2cset -y -r 7 0x20 5 0x00") + os.system("i2cset -y -r 7 0x20 2 0x00") + os.system("i2cset -y -r 7 0x20 3 0x00") + os.system("i2cset -y -r 7 0x20 6 0x00") + os.system("i2cset -y -r 7 0x20 7 0x00") + + os.system("i2cset -y -r 7 0x21 4 0x00") + os.system("i2cset -y -r 7 0x21 5 0x00") + os.system("i2cset -y -r 7 0x21 2 0x00") + os.system("i2cset -y -r 7 0x21 3 0x00") + os.system("i2cset -y -r 7 0x21 6 0x00") + os.system("i2cset -y -r 7 0x21 7 0x00") + + # initialize set ZQSFP RST = 1 + os.system("i2cset -y -r 7 0x22 4 0x00") + os.system("i2cset -y -r 7 0x22 5 0x00") + os.system("i2cset -y -r 7 0x22 2 0xFF") + os.system("i2cset -y -r 7 0x22 3 0xFF") + os.system("i2cset -y -r 7 0x22 6 0x00") + os.system("i2cset -y -r 7 0x22 7 0x00") + + os.system("i2cset -y -r 7 0x23 4 0x00") + os.system("i2cset -y -r 7 0x23 5 0x00") + os.system("i2cset -y -r 7 0x23 2 0xFF") + os.system("i2cset -y -r 7 0x23 3 0xFF") + os.system("i2cset -y -r 7 0x23 6 0x00") + os.system("i2cset -y -r 7 0x23 7 0x00") + + # initialize set ZQSFP mode + os.system("i2cset -y -r 7 0x24 4 0x00") + os.system("i2cset -y -r 7 0x24 5 0x00") + os.system("i2cset -y -r 7 0x24 2 0x00") + os.system("i2cset -y -r 7 0x24 3 0x00") + os.system("i2cset -y -r 7 0x24 6 0x00") + os.system("i2cset -y -r 7 0x24 7 0x00") + + os.system("i2cset -y -r 7 0x25 4 0x00") + os.system("i2cset -y -r 7 0x25 5 0x00") + os.system("i2cset -y -r 7 0x25 2 0x00") + os.system("i2cset -y -r 7 0x25 3 0x00") + os.system("i2cset -y -r 7 0x25 6 0x00") + os.system("i2cset -y -r 7 0x25 7 0x00") + + # initialize ZQSFP/SFP+/E-Card General + os.system("i2cset -y -r 8 0x20 4 0x00") + os.system("i2cset -y -r 8 0x20 5 0x00") + os.system("i2cset -y -r 8 0x20 6 0xFF") + os.system("i2cset -y -r 8 0x20 7 0xFF") + + # initialize LED board after PVT (S9100_IO_EXP_LED_ID) + os.system("i2cset -y -r 9 0x22 4 0x00") + os.system("i2cset -y -r 9 0x22 5 0x00") + os.system("i2cset -y -r 9 0x22 6 0x00") + os.system("i2cset -y -r 9 0x22 7 0x00") + + # initialize PSU I/O (S9100_IO_EXP_PSU_ID) + os.system("i2cset -y -r 8 0x23 4 0x00") + os.system("i2cset -y -r 8 0x23 5 0x00") + os.system("i2cset -y -r 8 0x23 2 0x00") + os.system("i2cset -y -r 8 0x23 3 0x00") + os.system("i2cset -y -r 8 0x23 6 0xBB") + os.system("i2cset -y -r 8 0x23 7 0xFF") + + # initialize ABS Port 0-15 + self.new_i2c_device('pca9535', 0x20, 6) + os.system("echo 496 > /sys/class/gpio/export") + os.system("echo 497 > /sys/class/gpio/export") + os.system("echo 498 > /sys/class/gpio/export") + os.system("echo 499 > /sys/class/gpio/export") + os.system("echo 500 > /sys/class/gpio/export") + os.system("echo 501 > /sys/class/gpio/export") + os.system("echo 502 > /sys/class/gpio/export") + os.system("echo 503 > /sys/class/gpio/export") + os.system("echo 504 > /sys/class/gpio/export") + os.system("echo 505 > /sys/class/gpio/export") + os.system("echo 506 > /sys/class/gpio/export") + os.system("echo 507 > /sys/class/gpio/export") + os.system("echo 508 > /sys/class/gpio/export") + os.system("echo 509 > /sys/class/gpio/export") + os.system("echo 510 > /sys/class/gpio/export") + os.system("echo 511 > /sys/class/gpio/export") + os.system("echo 1 > /sys/class/gpio/gpio496/active_low") + os.system("echo 1 > /sys/class/gpio/gpio497/active_low") + os.system("echo 1 > /sys/class/gpio/gpio498/active_low") + os.system("echo 1 > /sys/class/gpio/gpio499/active_low") + os.system("echo 1 > /sys/class/gpio/gpio500/active_low") + os.system("echo 1 > /sys/class/gpio/gpio501/active_low") + os.system("echo 1 > /sys/class/gpio/gpio502/active_low") + os.system("echo 1 > /sys/class/gpio/gpio503/active_low") + os.system("echo 1 > /sys/class/gpio/gpio504/active_low") + os.system("echo 1 > /sys/class/gpio/gpio505/active_low") + os.system("echo 1 > /sys/class/gpio/gpio506/active_low") + os.system("echo 1 > /sys/class/gpio/gpio507/active_low") + os.system("echo 1 > /sys/class/gpio/gpio508/active_low") + os.system("echo 1 > /sys/class/gpio/gpio509/active_low") + os.system("echo 1 > /sys/class/gpio/gpio510/active_low") + os.system("echo 1 > /sys/class/gpio/gpio511/active_low") + + # initialize ABS Port 16-31 + self.new_i2c_device('pca9535', 0x21, 6) + os.system("echo 480 > /sys/class/gpio/export") + os.system("echo 481 > /sys/class/gpio/export") + os.system("echo 482 > /sys/class/gpio/export") + os.system("echo 483 > /sys/class/gpio/export") + os.system("echo 484 > /sys/class/gpio/export") + os.system("echo 485 > /sys/class/gpio/export") + os.system("echo 486 > /sys/class/gpio/export") + os.system("echo 487 > /sys/class/gpio/export") + os.system("echo 488 > /sys/class/gpio/export") + os.system("echo 489 > /sys/class/gpio/export") + os.system("echo 490 > /sys/class/gpio/export") + os.system("echo 491 > /sys/class/gpio/export") + os.system("echo 492 > /sys/class/gpio/export") + os.system("echo 493 > /sys/class/gpio/export") + os.system("echo 494 > /sys/class/gpio/export") + os.system("echo 495 > /sys/class/gpio/export") + os.system("echo 1 > /sys/class/gpio/gpio480/active_low") + os.system("echo 1 > /sys/class/gpio/gpio481/active_low") + os.system("echo 1 > /sys/class/gpio/gpio482/active_low") + os.system("echo 1 > /sys/class/gpio/gpio483/active_low") + os.system("echo 1 > /sys/class/gpio/gpio484/active_low") + os.system("echo 1 > /sys/class/gpio/gpio485/active_low") + os.system("echo 1 > /sys/class/gpio/gpio486/active_low") + os.system("echo 1 > /sys/class/gpio/gpio487/active_low") + os.system("echo 1 > /sys/class/gpio/gpio488/active_low") + os.system("echo 1 > /sys/class/gpio/gpio489/active_low") + os.system("echo 1 > /sys/class/gpio/gpio490/active_low") + os.system("echo 1 > /sys/class/gpio/gpio491/active_low") + os.system("echo 1 > /sys/class/gpio/gpio492/active_low") + os.system("echo 1 > /sys/class/gpio/gpio493/active_low") + os.system("echo 1 > /sys/class/gpio/gpio494/active_low") + os.system("echo 1 > /sys/class/gpio/gpio495/active_low") + + # initialize INT Port 0-15 + self.new_i2c_device('pca9535', 0x22, 6) + os.system("echo 464 > /sys/class/gpio/export") + os.system("echo 465 > /sys/class/gpio/export") + os.system("echo 466 > /sys/class/gpio/export") + os.system("echo 467 > /sys/class/gpio/export") + os.system("echo 468 > /sys/class/gpio/export") + os.system("echo 469 > /sys/class/gpio/export") + os.system("echo 470 > /sys/class/gpio/export") + os.system("echo 471 > /sys/class/gpio/export") + os.system("echo 472 > /sys/class/gpio/export") + os.system("echo 473 > /sys/class/gpio/export") + os.system("echo 474 > /sys/class/gpio/export") + os.system("echo 475 > /sys/class/gpio/export") + os.system("echo 476 > /sys/class/gpio/export") + os.system("echo 477 > /sys/class/gpio/export") + os.system("echo 478 > /sys/class/gpio/export") + os.system("echo 479 > /sys/class/gpio/export") + os.system("echo 1 > /sys/class/gpio/gpio464/active_low") + os.system("echo 1 > /sys/class/gpio/gpio465/active_low") + os.system("echo 1 > /sys/class/gpio/gpio466/active_low") + os.system("echo 1 > /sys/class/gpio/gpio467/active_low") + os.system("echo 1 > /sys/class/gpio/gpio468/active_low") + os.system("echo 1 > /sys/class/gpio/gpio469/active_low") + os.system("echo 1 > /sys/class/gpio/gpio470/active_low") + os.system("echo 1 > /sys/class/gpio/gpio471/active_low") + os.system("echo 1 > /sys/class/gpio/gpio472/active_low") + os.system("echo 1 > /sys/class/gpio/gpio473/active_low") + os.system("echo 1 > /sys/class/gpio/gpio474/active_low") + os.system("echo 1 > /sys/class/gpio/gpio475/active_low") + os.system("echo 1 > /sys/class/gpio/gpio476/active_low") + os.system("echo 1 > /sys/class/gpio/gpio477/active_low") + os.system("echo 1 > /sys/class/gpio/gpio478/active_low") + os.system("echo 1 > /sys/class/gpio/gpio479/active_low") + + # initialize INT Port 16-31 + self.new_i2c_device('pca9535', 0x23, 6) + os.system("echo 448 > /sys/class/gpio/export") + os.system("echo 449 > /sys/class/gpio/export") + os.system("echo 450 > /sys/class/gpio/export") + os.system("echo 451 > /sys/class/gpio/export") + os.system("echo 452 > /sys/class/gpio/export") + os.system("echo 453 > /sys/class/gpio/export") + os.system("echo 454 > /sys/class/gpio/export") + os.system("echo 455 > /sys/class/gpio/export") + os.system("echo 456 > /sys/class/gpio/export") + os.system("echo 457 > /sys/class/gpio/export") + os.system("echo 458 > /sys/class/gpio/export") + os.system("echo 459 > /sys/class/gpio/export") + os.system("echo 460 > /sys/class/gpio/export") + os.system("echo 461 > /sys/class/gpio/export") + os.system("echo 462 > /sys/class/gpio/export") + os.system("echo 463 > /sys/class/gpio/export") + os.system("echo 1 > /sys/class/gpio/gpio448/active_low") + os.system("echo 1 > /sys/class/gpio/gpio449/active_low") + os.system("echo 1 > /sys/class/gpio/gpio450/active_low") + os.system("echo 1 > /sys/class/gpio/gpio451/active_low") + os.system("echo 1 > /sys/class/gpio/gpio452/active_low") + os.system("echo 1 > /sys/class/gpio/gpio453/active_low") + os.system("echo 1 > /sys/class/gpio/gpio454/active_low") + os.system("echo 1 > /sys/class/gpio/gpio455/active_low") + os.system("echo 1 > /sys/class/gpio/gpio456/active_low") + os.system("echo 1 > /sys/class/gpio/gpio457/active_low") + os.system("echo 1 > /sys/class/gpio/gpio458/active_low") + os.system("echo 1 > /sys/class/gpio/gpio459/active_low") + os.system("echo 1 > /sys/class/gpio/gpio460/active_low") + os.system("echo 1 > /sys/class/gpio/gpio461/active_low") + os.system("echo 1 > /sys/class/gpio/gpio462/active_low") + os.system("echo 1 > /sys/class/gpio/gpio463/active_low") + + # initialize LP Mode Port 0-15 + self.new_i2c_device('pca9535', 0x20, 7) + os.system("echo 432 > /sys/class/gpio/export") + os.system("echo 433 > /sys/class/gpio/export") + os.system("echo 434 > /sys/class/gpio/export") + os.system("echo 435 > /sys/class/gpio/export") + os.system("echo 436 > /sys/class/gpio/export") + os.system("echo 437 > /sys/class/gpio/export") + os.system("echo 438 > /sys/class/gpio/export") + os.system("echo 439 > /sys/class/gpio/export") + os.system("echo 440 > /sys/class/gpio/export") + os.system("echo 441 > /sys/class/gpio/export") + os.system("echo 442 > /sys/class/gpio/export") + os.system("echo 443 > /sys/class/gpio/export") + os.system("echo 444 > /sys/class/gpio/export") + os.system("echo 445 > /sys/class/gpio/export") + os.system("echo 446 > /sys/class/gpio/export") + os.system("echo 447 > /sys/class/gpio/export") + os.system("echo out > /sys/class/gpio/gpio432/direction") + os.system("echo out > /sys/class/gpio/gpio433/direction") + os.system("echo out > /sys/class/gpio/gpio434/direction") + os.system("echo out > /sys/class/gpio/gpio435/direction") + os.system("echo out > /sys/class/gpio/gpio436/direction") + os.system("echo out > /sys/class/gpio/gpio437/direction") + os.system("echo out > /sys/class/gpio/gpio438/direction") + os.system("echo out > /sys/class/gpio/gpio439/direction") + os.system("echo out > /sys/class/gpio/gpio440/direction") + os.system("echo out > /sys/class/gpio/gpio441/direction") + os.system("echo out > /sys/class/gpio/gpio442/direction") + os.system("echo out > /sys/class/gpio/gpio443/direction") + os.system("echo out > /sys/class/gpio/gpio444/direction") + os.system("echo out > /sys/class/gpio/gpio445/direction") + os.system("echo out > /sys/class/gpio/gpio446/direction") + os.system("echo out > /sys/class/gpio/gpio447/direction") + + # initialize LP Mode Port 16-31 + self.new_i2c_device('pca9535', 0x21, 7) + os.system("echo 416 > /sys/class/gpio/export") + os.system("echo 417 > /sys/class/gpio/export") + os.system("echo 418 > /sys/class/gpio/export") + os.system("echo 419 > /sys/class/gpio/export") + os.system("echo 420 > /sys/class/gpio/export") + os.system("echo 421 > /sys/class/gpio/export") + os.system("echo 422 > /sys/class/gpio/export") + os.system("echo 423 > /sys/class/gpio/export") + os.system("echo 424 > /sys/class/gpio/export") + os.system("echo 425 > /sys/class/gpio/export") + os.system("echo 426 > /sys/class/gpio/export") + os.system("echo 427 > /sys/class/gpio/export") + os.system("echo 428 > /sys/class/gpio/export") + os.system("echo 429 > /sys/class/gpio/export") + os.system("echo 430 > /sys/class/gpio/export") + os.system("echo 431 > /sys/class/gpio/export") + + os.system("echo out > /sys/class/gpio/gpio416/direction") + os.system("echo out > /sys/class/gpio/gpio417/direction") + os.system("echo out > /sys/class/gpio/gpio418/direction") + os.system("echo out > /sys/class/gpio/gpio419/direction") + os.system("echo out > /sys/class/gpio/gpio420/direction") + os.system("echo out > /sys/class/gpio/gpio421/direction") + os.system("echo out > /sys/class/gpio/gpio422/direction") + os.system("echo out > /sys/class/gpio/gpio423/direction") + os.system("echo out > /sys/class/gpio/gpio424/direction") + os.system("echo out > /sys/class/gpio/gpio425/direction") + os.system("echo out > /sys/class/gpio/gpio426/direction") + os.system("echo out > /sys/class/gpio/gpio427/direction") + os.system("echo out > /sys/class/gpio/gpio428/direction") + os.system("echo out > /sys/class/gpio/gpio429/direction") + os.system("echo out > /sys/class/gpio/gpio430/direction") + os.system("echo out > /sys/class/gpio/gpio431/direction") + + # initialize RST Port 0-15 + self.new_i2c_device('pca9535', 0x22, 7) + os.system("echo 400 > /sys/class/gpio/export") + os.system("echo 401 > /sys/class/gpio/export") + os.system("echo 402 > /sys/class/gpio/export") + os.system("echo 403 > /sys/class/gpio/export") + os.system("echo 404 > /sys/class/gpio/export") + os.system("echo 405 > /sys/class/gpio/export") + os.system("echo 406 > /sys/class/gpio/export") + os.system("echo 407 > /sys/class/gpio/export") + os.system("echo 408 > /sys/class/gpio/export") + os.system("echo 409 > /sys/class/gpio/export") + os.system("echo 410 > /sys/class/gpio/export") + os.system("echo 411 > /sys/class/gpio/export") + os.system("echo 412 > /sys/class/gpio/export") + os.system("echo 413 > /sys/class/gpio/export") + os.system("echo 414 > /sys/class/gpio/export") + os.system("echo 415 > /sys/class/gpio/export") + os.system("echo out > /sys/class/gpio/gpio400/direction") + os.system("echo out > /sys/class/gpio/gpio401/direction") + os.system("echo out > /sys/class/gpio/gpio402/direction") + os.system("echo out > /sys/class/gpio/gpio403/direction") + os.system("echo out > /sys/class/gpio/gpio404/direction") + os.system("echo out > /sys/class/gpio/gpio405/direction") + os.system("echo out > /sys/class/gpio/gpio406/direction") + os.system("echo out > /sys/class/gpio/gpio407/direction") + os.system("echo out > /sys/class/gpio/gpio408/direction") + os.system("echo out > /sys/class/gpio/gpio409/direction") + os.system("echo out > /sys/class/gpio/gpio410/direction") + os.system("echo out > /sys/class/gpio/gpio411/direction") + os.system("echo out > /sys/class/gpio/gpio412/direction") + os.system("echo out > /sys/class/gpio/gpio413/direction") + os.system("echo out > /sys/class/gpio/gpio414/direction") + os.system("echo out > /sys/class/gpio/gpio415/direction") + + # initialize RST Port 16-31 + self.new_i2c_device('pca9535', 0x23, 7) + os.system("echo 384 > /sys/class/gpio/export") + os.system("echo 385 > /sys/class/gpio/export") + os.system("echo 386 > /sys/class/gpio/export") + os.system("echo 387 > /sys/class/gpio/export") + os.system("echo 388 > /sys/class/gpio/export") + os.system("echo 389 > /sys/class/gpio/export") + os.system("echo 390 > /sys/class/gpio/export") + os.system("echo 391 > /sys/class/gpio/export") + os.system("echo 392 > /sys/class/gpio/export") + os.system("echo 393 > /sys/class/gpio/export") + os.system("echo 394 > /sys/class/gpio/export") + os.system("echo 395 > /sys/class/gpio/export") + os.system("echo 396 > /sys/class/gpio/export") + os.system("echo 397 > /sys/class/gpio/export") + os.system("echo 398 > /sys/class/gpio/export") + os.system("echo 399 > /sys/class/gpio/export") + os.system("echo out > /sys/class/gpio/gpio384/direction") + os.system("echo out > /sys/class/gpio/gpio385/direction") + os.system("echo out > /sys/class/gpio/gpio386/direction") + os.system("echo out > /sys/class/gpio/gpio387/direction") + os.system("echo out > /sys/class/gpio/gpio388/direction") + os.system("echo out > /sys/class/gpio/gpio389/direction") + os.system("echo out > /sys/class/gpio/gpio390/direction") + os.system("echo out > /sys/class/gpio/gpio391/direction") + os.system("echo out > /sys/class/gpio/gpio392/direction") + os.system("echo out > /sys/class/gpio/gpio393/direction") + os.system("echo out > /sys/class/gpio/gpio394/direction") + os.system("echo out > /sys/class/gpio/gpio395/direction") + os.system("echo out > /sys/class/gpio/gpio396/direction") + os.system("echo out > /sys/class/gpio/gpio397/direction") + os.system("echo out > /sys/class/gpio/gpio398/direction") + os.system("echo out > /sys/class/gpio/gpio399/direction") + + # initialize MODSEL Port 0-15 + self.new_i2c_device('pca9535', 0x24, 7) + os.system("echo 368 > /sys/class/gpio/export") + os.system("echo 369 > /sys/class/gpio/export") + os.system("echo 370 > /sys/class/gpio/export") + os.system("echo 371 > /sys/class/gpio/export") + os.system("echo 372 > /sys/class/gpio/export") + os.system("echo 373 > /sys/class/gpio/export") + os.system("echo 374 > /sys/class/gpio/export") + os.system("echo 375 > /sys/class/gpio/export") + os.system("echo 376 > /sys/class/gpio/export") + os.system("echo 377 > /sys/class/gpio/export") + os.system("echo 378 > /sys/class/gpio/export") + os.system("echo 379 > /sys/class/gpio/export") + os.system("echo 380 > /sys/class/gpio/export") + os.system("echo 381 > /sys/class/gpio/export") + os.system("echo 382 > /sys/class/gpio/export") + os.system("echo 383 > /sys/class/gpio/export") + os.system("echo out > /sys/class/gpio/gpio368/direction") + os.system("echo out > /sys/class/gpio/gpio369/direction") + os.system("echo out > /sys/class/gpio/gpio370/direction") + os.system("echo out > /sys/class/gpio/gpio371/direction") + os.system("echo out > /sys/class/gpio/gpio372/direction") + os.system("echo out > /sys/class/gpio/gpio373/direction") + os.system("echo out > /sys/class/gpio/gpio374/direction") + os.system("echo out > /sys/class/gpio/gpio375/direction") + os.system("echo out > /sys/class/gpio/gpio376/direction") + os.system("echo out > /sys/class/gpio/gpio377/direction") + os.system("echo out > /sys/class/gpio/gpio378/direction") + os.system("echo out > /sys/class/gpio/gpio379/direction") + os.system("echo out > /sys/class/gpio/gpio380/direction") + os.system("echo out > /sys/class/gpio/gpio381/direction") + os.system("echo out > /sys/class/gpio/gpio382/direction") + os.system("echo out > /sys/class/gpio/gpio383/direction") + + # initialize MODSEL Port 16-31 + self.new_i2c_device('pca9535', 0x25, 7) + os.system("echo 352 > /sys/class/gpio/export") + os.system("echo 353> /sys/class/gpio/export") + os.system("echo 354> /sys/class/gpio/export") + os.system("echo 355> /sys/class/gpio/export") + os.system("echo 356 > /sys/class/gpio/export") + os.system("echo 357 > /sys/class/gpio/export") + os.system("echo 358 > /sys/class/gpio/export") + os.system("echo 359 > /sys/class/gpio/export") + os.system("echo 360 > /sys/class/gpio/export") + os.system("echo 361 > /sys/class/gpio/export") + os.system("echo 362 > /sys/class/gpio/export") + os.system("echo 363 > /sys/class/gpio/export") + os.system("echo 364 > /sys/class/gpio/export") + os.system("echo 365 > /sys/class/gpio/export") + os.system("echo 366 > /sys/class/gpio/export") + os.system("echo 367 > /sys/class/gpio/export") + os.system("echo out > /sys/class/gpio/gpio352/direction") + os.system("echo out > /sys/class/gpio/gpio353/direction") + os.system("echo out > /sys/class/gpio/gpio354/direction") + os.system("echo out > /sys/class/gpio/gpio355/direction") + os.system("echo out > /sys/class/gpio/gpio356/direction") + os.system("echo out > /sys/class/gpio/gpio357/direction") + os.system("echo out > /sys/class/gpio/gpio358/direction") + os.system("echo out > /sys/class/gpio/gpio359/direction") + os.system("echo out > /sys/class/gpio/gpio360/direction") + os.system("echo out > /sys/class/gpio/gpio361/direction") + os.system("echo out > /sys/class/gpio/gpio362/direction") + os.system("echo out > /sys/class/gpio/gpio363/direction") + os.system("echo out > /sys/class/gpio/gpio364/direction") + os.system("echo out > /sys/class/gpio/gpio365/direction") + os.system("echo out > /sys/class/gpio/gpio366/direction") + os.system("echo out > /sys/class/gpio/gpio367/direction") + + # initialize qsfp eeprom + for port in range(1, 33): + self.new_i2c_device('sff8436', 0x50, port + 9) + + # initialize sys eeprom devices + self.new_i2c_device('mb_eeprom', 0x54, 9) + + # initialize temperature sensor + os.system("i2cset -y -r -f 0 0x2F 0x00 0x80") + os.system("i2cset -y -r -f 0 0x2F 0x05 0x7F") + os.system("i2cset -y -r -f 0 0x2F 0x04 0x0A") + + # initialize psu eeprom devices + self.new_i2c_device('eeprom', 0x50, 8) + self.new_i2c_device('eeprom', 0x50, 9) + + # initialize sys led + os.system("i2cset -m 0x40 -y -r 9 0x22 2 0xFF") + os.system("i2cset -m 0x80 -y -r 9 0x22 2 0x00") + + return True + +