From d7683a99093d4762c5885c513ea20ce60ce04243 Mon Sep 17 00:00:00 2001 From: Sridhar Pitchai Date: Tue, 25 Oct 2016 11:56:23 -0700 Subject: [PATCH 1/3] Platform x86-64-cel-redstone-xp ONLP porting. This patch has ONLP APIs for sysi, sfp, fan, psu, led and thermals. onlpdump log: root@localhost:~# onlpdump System Information: = { Product Name: Redstone-XP D2060 Part Number: R0854-F1004-01 Serial Number: D2060B2F105A14AP000001 MAC: 00:e0:ec:33:5c:dc MAC Range: 73 Manufacturer: CELESTICA Manufacture Date: 10/21/2015 12:19:06 Vendor: CELESTICA Platform Name: RANGELEY Device Version: 10 Label Revision: Redstone-XP Country Code: CHN Diag Version: 1.2.8 Service Tag: LB ONIE Version: 2014.08 } psu @ 1 = { Description: PSU-1 Model: NULL SN: NULL Status: 0x00000001 [ PRESENT ] Caps: 0x00000000 Vin: 117620 Vout: 11920 Iin: 760 Iout: 5810 Pin: 90120 Pout: 69250 } psu @ 2 = { Description: PSU-2 Model: NULL SN: NULL Status: 0x00000005 [ PRESENT,UNPLUGGED ] Caps: 0x00000000 Vin: 0 Vout: 0 Iin: 0 Iout: 0 Pin: 0 Pout: 0 } led @ 1 = { Description: Chassis System LED(DIAG LED) Status: 0x00000005 [ PRESENT,ON ] Caps: 0x00011001 [ ON_OFF,ORANGE,GREEN ] Mode: ON Char: } led @ 2 = { Description: Chassis FAN(1) LED Status: 0x00000005 [ PRESENT,ON ] Caps: 0x00411001 [ ON_OFF,ORANGE,GREEN,AUTO ] Mode: ON Char: } led @ 3 = { Description: Chassis FAN(2) LED Status: 0x00000005 [ PRESENT,ON ] Caps: 0x00411001 [ ON_OFF,ORANGE,GREEN,AUTO ] Mode: ON Char: } led @ 4 = { Description: Chassis FAN(3) LED Status: 0x00000005 [ PRESENT,ON ] Caps: 0x00411001 [ ON_OFF,ORANGE,GREEN,AUTO ] Mode: ON Char: } led @ 5 = { Description: Chassis FAN(4) LED Status: 0x00000005 [ PRESENT,ON ] Caps: 0x00411001 [ ON_OFF,ORANGE,GREEN,AUTO ] Mode: ON Char: } led @ 6 = { Description: Chassis FAN(5) LED Status: 0x00000005 [ PRESENT,ON ] Caps: 0x00411001 [ ON_OFF,ORANGE,GREEN,AUTO ] Mode: ON Char: } led @ 7 = { Description: Chassis FAN(6) LED Status: 0x00000005 [ PRESENT,ON ] Caps: 0x00411001 [ ON_OFF,ORANGE,GREEN,AUTO ] Mode: ON Char: } led @ 8 = { Description: Chassis FAN(7) LED Status: 0x00000005 [ PRESENT,ON ] Caps: 0x00411001 [ ON_OFF,ORANGE,GREEN,AUTO ] Mode: ON Char: } led @ 9 = { Description: Chassis FAN(8) LED Status: 0x00000005 [ PRESENT,ON ] Caps: 0x00411001 [ ON_OFF,ORANGE,GREEN,AUTO ] Mode: ON Char: } led @ 10 = { Description: Chassis PSU(1) LED Status: 0x00000005 [ PRESENT,ON ] Caps: 0x00411001 [ ON_OFF,ORANGE,GREEN,AUTO ] Mode: ON Char: } led @ 11 = { Description: Chassis PSU(2) LED Status: 0x00000005 [ PRESENT,ON ] Caps: 0x00411001 [ ON_OFF,ORANGE,GREEN,AUTO ] Mode: ON Char: } thermal @ 1 = { Description: Chassis Thermal (Rear) Status: 0x00000001 [ PRESENT ] Caps: 0x0000000f [ GET_TEMPERATURE,GET_WARNING_THRESHOLD,GET_ERROR_THRESHOLD,GET_SHUTDOWN_THRESHOLD ] Temperature: 36 thresholds = { Warning: 45000 Error: 55000 Shutdown: 60000 } } thermal @ 2 = { Description: BCM SOC Thermal sensor Status: 0x00000001 [ PRESENT ] Caps: 0x0000000f [ GET_TEMPERATURE,GET_WARNING_THRESHOLD,GET_ERROR_THRESHOLD,GET_SHUTDOWN_THRESHOLD ] Temperature: 35 thresholds = { Warning: 45000 Error: 55000 Shutdown: 60000 } } thermal @ 3 = { Description: CPU Core Status: 0x00000001 [ PRESENT ] Caps: 0x0000000f [ GET_TEMPERATURE,GET_WARNING_THRESHOLD,GET_ERROR_THRESHOLD,GET_SHUTDOWN_THRESHOLD ] Temperature: 37 thresholds = { Warning: 45000 Error: 55000 Shutdown: 60000 } } thermal @ 4 = { Description: Chassis Thermal Sensor (Front) Status: 0x00000001 [ PRESENT ] Caps: 0x0000000f [ GET_TEMPERATURE,GET_WARNING_THRESHOLD,GET_ERROR_THRESHOLD,GET_SHUTDOWN_THRESHOLD ] Temperature: 40 thresholds = { Warning: 45000 Error: 55000 Shutdown: 60000 } } thermal @ 5 = { Description: PSU-1 Thermal Sensor Status: 0x00000001 [ PRESENT ] Caps: 0x0000000f [ GET_TEMPERATURE,GET_WARNING_THRESHOLD,GET_ERROR_THRESHOLD,GET_SHUTDOWN_THRESHOLD ] Temperature: 37 thresholds = { Warning: 45000 Error: 55000 Shutdown: 60000 } } thermal @ 6 = { Description: PSU-2 Thermal Sensor Status: 0x00000001 [ PRESENT ] Caps: 0x0000000f [ GET_TEMPERATURE,GET_WARNING_THRESHOLD,GET_ERROR_THRESHOLD,GET_SHUTDOWN_THRESHOLD ] Temperature: 35 thresholds = { Warning: 45000 Error: 55000 Shutdown: 60000 } } fan @ 1 = { Description: Chassis Fan 1 Status: 0x00000005 [ PRESENT,B2F ] Caps: 0x00000000 RPM: 8998 Per: 40 Model: NULL SN: NULL } fan @ 2 = { Description: Chassis Fan 2 Status: 0x00000005 [ PRESENT,B2F ] Caps: 0x00000000 RPM: 7710 Per: 40 Model: NULL SN: NULL } fan @ 3 = { Description: Chassis Fan 3 Status: 0x00000005 [ PRESENT,B2F ] Caps: 0x00000000 RPM: 9340 Per: 40 Model: NULL SN: NULL } fan @ 4 = { Description: Chassis Fan 4 Status: 0x00000005 [ PRESENT,B2F ] Caps: 0x00000000 RPM: 8090 Per: 40 Model: NULL SN: NULL } fan @ 5 = { Description: Chassis Fan 5 Status: 0x00000005 [ PRESENT,B2F ] Caps: 0x00000000 RPM: 9429 Per: 40 Model: NULL SN: NULL } fan @ 6 = { Description: Chassis Fan 6 Status: 0x00000005 [ PRESENT,B2F ] Caps: 0x00000000 RPM: 7992 Per: 40 Model: NULL SN: NULL } fan @ 7 = { Description: Chassis Fan 7 Status: 0x00000005 [ PRESENT,B2F ] Caps: 0x00000000 RPM: 9102 Per: 40 Model: NULL SN: NULL } fan @ 8 = { Description: Chassis Fan 8 Status: 0x00000005 [ PRESENT,B2F ] Caps: 0x00000000 RPM: 7927 Per: 40 Model: NULL SN: NULL } fan @ 9 = { Description: PSU Fan 1 Status: 0x00000009 [ PRESENT,F2B ] Caps: 0x00000000 RPM: 8848 Per: 50 Model: NULL SN: NULL } fan @ 10 = { Description: PSU Fan 2 Status: 0x00000009 [ PRESENT,F2B ] Caps: 0x00000000 RPM: 4700 Per: 47 Model: NULL SN: NULL } SFPs: Presence Bitmap: 1 2 35 36 RX_LOS Bitmap: 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 Port 01: Present, Status = 0x00000000 eeprom: 0000: 03 04 22 00 00 00 08 00 00 00 00 01 0d 00 00 00 0010: 00 00 64 00 4f 45 4d 20 20 20 20 20 20 20 20 20 0020: 20 20 20 20 00 00 17 6a 47 4c 43 2d 54 2d 43 55 0030: 52 56 20 20 20 20 20 20 42 31 20 20 00 00 00 dc 0040: 00 1a 00 00 58 41 4e 58 30 42 44 37 35 58 30 30 0050: 33 32 30 20 31 34 31 30 30 32 20 20 00 00 00 50 0060: 00 00 11 d4 0e 0e 75 5f eb 3a c6 32 2d f7 e9 dc 0070: 20 57 b5 00 00 00 00 00 00 00 00 00 c7 d9 08 00 0080: 43 4e 53 38 54 55 54 41 41 42 33 30 2d 31 34 31 0090: 30 2d 30 33 56 30 33 20 49 fb 46 00 00 00 00 26 00a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 aa aa 00c0: 47 4c 43 2d 54 20 20 20 20 20 20 20 20 20 20 20 00d0: 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 97 00e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00f0: 00 00 00 00 00 00 00 00 00 40 00 40 00 00 00 00 Port 02: Present, Status = 0x00000004 [ RX_LOS ] eeprom: 0000: 03 04 22 00 00 00 08 00 00 00 00 01 0d 00 00 00 0010: 00 00 64 00 4f 45 4d 20 20 20 20 20 20 20 20 20 0020: 20 20 20 20 00 00 17 6a 47 4c 43 2d 54 2d 43 55 0030: 52 56 20 20 20 20 20 20 42 31 20 20 00 00 00 dc 0040: 00 1a 00 00 58 41 4e 54 58 32 32 38 37 32 20 20 0050: 20 20 20 20 31 34 30 38 31 39 20 20 00 00 00 e9 0060: 00 00 11 7e 47 e6 43 7e 15 ef 8b 4b b1 7f 88 ba 0070: 78 eb 0b 00 00 00 00 00 00 00 00 00 24 fb c9 00 0080: 43 4e 53 38 54 55 54 41 41 42 33 30 2d 31 34 31 0090: 30 2d 30 33 56 30 33 20 49 fb 46 00 00 00 00 26 00a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 aa aa 00c0: 47 4c 43 2d 54 20 20 20 20 20 20 20 20 20 20 20 00d0: 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 97 00e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00f0: 00 00 00 00 00 00 00 00 00 40 00 40 00 00 00 00 Port 03: Missing. Port 04: Missing. Port 05: Missing. Port 06: Missing. Port 07: Missing. Port 08: Missing. Port 09: Missing. Port 10: Missing. Port 11: Missing. Port 12: Missing. Port 13: Missing. Port 14: Missing. Port 15: Missing. Port 16: Missing. Port 17: Missing. Port 18: Missing. Port 19: Missing. Port 20: Missing. Port 21: Missing. Port 22: Missing. Port 23: Missing. Port 24: Missing. Port 25: Missing. Port 26: Missing. Port 27: Missing. Port 28: Missing. Port 29: Missing. Port 30: Missing. Port 31: Missing. Port 32: Missing. Port 33: Missing. Port 34: Missing. Port 35: Present, Status = 0x00000000 eeprom: 0000: 03 04 21 00 00 00 00 00 04 00 00 00 67 00 00 00 0010: 00 00 03 00 4f 45 4d 20 20 20 20 20 20 20 20 20 0020: 20 20 20 20 00 00 40 20 53 46 50 2d 48 31 30 47 0030: 42 2d 43 55 33 4d 20 20 30 33 20 20 01 00 00 e8 0040: 00 00 00 00 43 53 53 33 31 47 35 31 39 32 39 20 0050: 20 20 20 20 31 36 30 35 30 31 20 20 00 00 00 ab 0060: 81 00 11 be cd f7 59 20 a9 96 69 41 e7 88 cd da 0070: 20 41 3b 00 00 00 00 00 00 00 00 00 9c 16 a0 00 0080: 43 4f 50 51 41 41 36 4a 41 42 33 37 2d 30 39 36 0090: 31 2d 30 33 56 30 33 20 01 00 46 00 00 00 00 cf 00a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00c0: 53 46 50 2d 48 31 30 47 42 2d 43 55 33 4d 20 20 00d0: 20 20 20 20 30 39 00 00 00 00 00 00 00 00 00 b6 00e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 Port 36: Present, Status = 0x00000000 eeprom: 0000: 03 04 21 00 00 00 00 00 04 00 00 00 67 00 00 00 0010: 00 00 03 00 4f 45 4d 20 20 20 20 20 20 20 20 20 0020: 20 20 20 20 00 00 40 20 53 46 50 2d 48 31 30 47 0030: 42 2d 43 55 33 4d 20 20 30 33 20 20 01 00 00 e8 0040: 00 00 00 00 43 53 53 33 31 47 35 31 39 32 32 20 0050: 20 20 20 20 31 36 30 35 30 31 20 20 00 00 00 a4 0060: 81 00 11 41 4f f5 2c 81 28 2e 9a d8 43 78 e9 40 0070: 65 4e 77 00 00 00 00 00 00 00 00 00 ec dc bd 00 0080: 43 4f 50 51 41 41 36 4a 41 42 33 37 2d 30 39 36 0090: 31 2d 30 33 56 30 33 20 01 00 46 00 00 00 00 cf 00a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00c0: 53 46 50 2d 48 31 30 47 42 2d 43 55 33 4d 20 20 00d0: 20 20 20 20 30 39 00 00 00 00 00 00 00 00 00 b6 00e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 Port 37: Missing. Port 38: Missing. Port 39: Missing. Port 40: Missing. Port 41: Missing. Port 42: Missing. Port 43: Missing. Port 44: Missing. Port 45: Missing. Port 46: Missing. Port 47: Missing. Port 48: Missing. Port 49: Missing. Port 50: Missing. Port 51: Missing. Port 52: Missing. Port 53: Missing. Port 54: Missing. root@localhost:~# root@localhost:~# --- .../builds/src/x86_64_cel_redstone_xp/.module | 1 - .../src/x86_64_cel_redstone_xp/Makefile | 9 -- .../module/auto/make.mk | 9 -- .../module/auto/x86_64_cel_redstone_xp.yml | 47 ------- .../x86_64_cel_redstone_xp.x | 14 -- .../x86_64_cel_redstone_xp_config.h | 127 ------------------ .../x86_64_cel_redstone_xp_dox.h | 26 ---- .../x86_64_cel_redstone_xp_porting.h | 107 --------------- .../src/x86_64_cel_redstone_xp/module/make.mk | 10 -- .../module/src/Makefile | 9 -- .../x86_64_cel_redstone_xp/module/src/make.mk | 9 -- .../src/x86_64_cel_redstone_xp_config.c | 76 ----------- .../module/src/x86_64_cel_redstone_xp_enums.c | 10 -- .../module/src/x86_64_cel_redstone_xp_int.h | 12 -- .../module/src/x86_64_cel_redstone_xp_log.c | 18 --- .../module/src/x86_64_cel_redstone_xp_log.h | 12 -- .../src/x86_64_cel_redstone_xp_module.c | 24 ---- .../module/src/x86_64_cel_redstone_xp_ucli.c | 50 ------- .../x86_64_cel_redstone_xp_r0/__init__.py | 1 - 19 files changed, 571 deletions(-) delete mode 100644 packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/.module delete mode 100644 packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/Makefile delete mode 100644 packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/module/auto/make.mk delete mode 100644 packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/module/auto/x86_64_cel_redstone_xp.yml delete mode 100644 packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/module/inc/x86_64_cel_redstone_xp/x86_64_cel_redstone_xp.x delete mode 100644 packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/module/inc/x86_64_cel_redstone_xp/x86_64_cel_redstone_xp_config.h delete mode 100644 packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/module/inc/x86_64_cel_redstone_xp/x86_64_cel_redstone_xp_dox.h delete mode 100644 packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/module/inc/x86_64_cel_redstone_xp/x86_64_cel_redstone_xp_porting.h delete mode 100644 packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/module/make.mk delete mode 100644 packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/module/src/Makefile delete mode 100644 packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/module/src/make.mk delete mode 100644 packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/module/src/x86_64_cel_redstone_xp_config.c delete mode 100644 packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/module/src/x86_64_cel_redstone_xp_enums.c delete mode 100644 packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/module/src/x86_64_cel_redstone_xp_int.h delete mode 100644 packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/module/src/x86_64_cel_redstone_xp_log.c delete mode 100644 packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/module/src/x86_64_cel_redstone_xp_log.h delete mode 100644 packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/module/src/x86_64_cel_redstone_xp_module.c delete mode 100644 packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/module/src/x86_64_cel_redstone_xp_ucli.c diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/.module b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/.module deleted file mode 100644 index 2aa1d02a..00000000 --- a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/.module +++ /dev/null @@ -1 +0,0 @@ -name: x86_64_cel_redstone_xp diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/Makefile b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/Makefile deleted file mode 100644 index 551d44b7..00000000 --- a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/Makefile +++ /dev/null @@ -1,9 +0,0 @@ -############################################################################### -# -# -# -############################################################################### -include $(ONL)/make/config.mk -MODULE := x86_64_cel_redstone_xp -AUTOMODULE := x86_64_cel_redstone_xp -include $(BUILDER)/definemodule.mk diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/module/auto/make.mk b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/module/auto/make.mk deleted file mode 100644 index 49c7a8e1..00000000 --- a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/module/auto/make.mk +++ /dev/null @@ -1,9 +0,0 @@ -############################################################################### -# -# x86_64_cel_redstone_xp Autogeneration -# -############################################################################### -x86_64_cel_redstone_xp_AUTO_DEFS := module/auto/x86_64_cel_redstone_xp.yml -x86_64_cel_redstone_xp_AUTO_DIRS := module/inc/x86_64_cel_redstone_xp module/src -include $(BUILDER)/auto.mk - diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/module/auto/x86_64_cel_redstone_xp.yml b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/module/auto/x86_64_cel_redstone_xp.yml deleted file mode 100644 index 030c8174..00000000 --- a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/module/auto/x86_64_cel_redstone_xp.yml +++ /dev/null @@ -1,47 +0,0 @@ -############################################################################### -# -# x86_64_cel_redstone_xp Autogeneration Definitions. -# -############################################################################### - -cdefs: &cdefs -- X86_64_CEL_REDSTONE_XP_CONFIG_INCLUDE_LOGGING: - doc: "Include or exclude logging." - default: 1 -- X86_64_CEL_REDSTONE_XP_CONFIG_LOG_OPTIONS_DEFAULT: - doc: "Default enabled log options." - default: AIM_LOG_OPTIONS_DEFAULT -- X86_64_CEL_REDSTONE_XP_CONFIG_LOG_BITS_DEFAULT: - doc: "Default enabled log bits." - default: AIM_LOG_BITS_DEFAULT -- X86_64_CEL_REDSTONE_XP_CONFIG_LOG_CUSTOM_BITS_DEFAULT: - doc: "Default enabled custom log bits." - default: 0 -- X86_64_CEL_REDSTONE_XP_CONFIG_PORTING_STDLIB: - doc: "Default all porting macros to use the C standard libraries." - default: 1 -- X86_64_CEL_REDSTONE_XP_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS: - doc: "Include standard library headers for stdlib porting macros." - default: X86_64_CEL_REDSTONE_XP_CONFIG_PORTING_STDLIB -- X86_64_CEL_REDSTONE_XP_CONFIG_INCLUDE_UCLI: - doc: "Include generic uCli support." - default: 0 - - -definitions: - cdefs: - X86_64_CEL_REDSTONE_XP_CONFIG_HEADER: - defs: *cdefs - basename: x86_64_cel_redstone_xp_config - - portingmacro: - X86_64_CEL_REDSTONE_XP: - macros: - - malloc - - free - - memset - - memcpy - - strncpy - - vsnprintf - - snprintf - - strlen diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/module/inc/x86_64_cel_redstone_xp/x86_64_cel_redstone_xp.x b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/module/inc/x86_64_cel_redstone_xp/x86_64_cel_redstone_xp.x deleted file mode 100644 index db56c766..00000000 --- a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/module/inc/x86_64_cel_redstone_xp/x86_64_cel_redstone_xp.x +++ /dev/null @@ -1,14 +0,0 @@ -/**************************************************************************//** - * - * - * - *****************************************************************************/ -#include - -/* <--auto.start.xmacro(ALL).define> */ -/* */ - -/* <--auto.start.xenum(ALL).define> */ -/* */ - - diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/module/inc/x86_64_cel_redstone_xp/x86_64_cel_redstone_xp_config.h b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/module/inc/x86_64_cel_redstone_xp/x86_64_cel_redstone_xp_config.h deleted file mode 100644 index 1648a12f..00000000 --- a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/module/inc/x86_64_cel_redstone_xp/x86_64_cel_redstone_xp_config.h +++ /dev/null @@ -1,127 +0,0 @@ -/**************************************************************************//** - * - * @file - * @brief x86_64_cel_redstone_xp Configuration Header - * - * @addtogroup x86_64_cel_redstone_xp-config - * @{ - * - *****************************************************************************/ -#ifndef __X86_64_CEL_REDSTONE_XP_CONFIG_H__ -#define __X86_64_CEL_REDSTONE_XP_CONFIG_H__ - -#ifdef GLOBAL_INCLUDE_CUSTOM_CONFIG -#include -#endif -#ifdef X86_64_CEL_REDSTONE_XP_INCLUDE_CUSTOM_CONFIG -#include -#endif - -/* */ -#include -/** - * X86_64_CEL_REDSTONE_XP_CONFIG_INCLUDE_LOGGING - * - * Include or exclude logging. */ - - -#ifndef X86_64_CEL_REDSTONE_XP_CONFIG_INCLUDE_LOGGING -#define X86_64_CEL_REDSTONE_XP_CONFIG_INCLUDE_LOGGING 1 -#endif - -/** - * X86_64_CEL_REDSTONE_XP_CONFIG_LOG_OPTIONS_DEFAULT - * - * Default enabled log options. */ - - -#ifndef X86_64_CEL_REDSTONE_XP_CONFIG_LOG_OPTIONS_DEFAULT -#define X86_64_CEL_REDSTONE_XP_CONFIG_LOG_OPTIONS_DEFAULT AIM_LOG_OPTIONS_DEFAULT -#endif - -/** - * X86_64_CEL_REDSTONE_XP_CONFIG_LOG_BITS_DEFAULT - * - * Default enabled log bits. */ - - -#ifndef X86_64_CEL_REDSTONE_XP_CONFIG_LOG_BITS_DEFAULT -#define X86_64_CEL_REDSTONE_XP_CONFIG_LOG_BITS_DEFAULT AIM_LOG_BITS_DEFAULT -#endif - -/** - * X86_64_CEL_REDSTONE_XP_CONFIG_LOG_CUSTOM_BITS_DEFAULT - * - * Default enabled custom log bits. */ - - -#ifndef X86_64_CEL_REDSTONE_XP_CONFIG_LOG_CUSTOM_BITS_DEFAULT -#define X86_64_CEL_REDSTONE_XP_CONFIG_LOG_CUSTOM_BITS_DEFAULT 0 -#endif - -/** - * X86_64_CEL_REDSTONE_XP_CONFIG_PORTING_STDLIB - * - * Default all porting macros to use the C standard libraries. */ - - -#ifndef X86_64_CEL_REDSTONE_XP_CONFIG_PORTING_STDLIB -#define X86_64_CEL_REDSTONE_XP_CONFIG_PORTING_STDLIB 1 -#endif - -/** - * X86_64_CEL_REDSTONE_XP_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS - * - * Include standard library headers for stdlib porting macros. */ - - -#ifndef X86_64_CEL_REDSTONE_XP_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS -#define X86_64_CEL_REDSTONE_XP_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS X86_64_CEL_REDSTONE_XP_CONFIG_PORTING_STDLIB -#endif - -/** - * X86_64_CEL_REDSTONE_XP_CONFIG_INCLUDE_UCLI - * - * Include generic uCli support. */ - - -#ifndef X86_64_CEL_REDSTONE_XP_CONFIG_INCLUDE_UCLI -#define X86_64_CEL_REDSTONE_XP_CONFIG_INCLUDE_UCLI 0 -#endif - - - -/** - * All compile time options can be queried or displayed - */ - -/** Configuration settings structure. */ -typedef struct x86_64_cel_redstone_xp_config_settings_s { - /** name */ - const char* name; - /** value */ - const char* value; -} x86_64_cel_redstone_xp_config_settings_t; - -/** Configuration settings table. */ -/** x86_64_cel_redstone_xp_config_settings table. */ -extern x86_64_cel_redstone_xp_config_settings_t x86_64_cel_redstone_xp_config_settings[]; - -/** - * @brief Lookup a configuration setting. - * @param setting The name of the configuration option to lookup. - */ -const char* x86_64_cel_redstone_xp_config_lookup(const char* setting); - -/** - * @brief Show the compile-time configuration. - * @param pvs The output stream. - */ -int x86_64_cel_redstone_xp_config_show(struct aim_pvs_s* pvs); - -/* */ - -#include "x86_64_cel_redstone_xp_porting.h" - -#endif /* __X86_64_CEL_REDSTONE_XP_CONFIG_H__ */ -/* @} */ diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/module/inc/x86_64_cel_redstone_xp/x86_64_cel_redstone_xp_dox.h b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/module/inc/x86_64_cel_redstone_xp/x86_64_cel_redstone_xp_dox.h deleted file mode 100644 index 80e739cd..00000000 --- a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/module/inc/x86_64_cel_redstone_xp/x86_64_cel_redstone_xp_dox.h +++ /dev/null @@ -1,26 +0,0 @@ -/**************************************************************************//** - * - * x86_64_cel_redstone_xp Doxygen Header - * - *****************************************************************************/ -#ifndef __X86_64_CEL_REDSTONE_XP_DOX_H__ -#define __X86_64_CEL_REDSTONE_XP_DOX_H__ - -/** - * @defgroup x86_64_cel_redstone_xp x86_64_cel_redstone_xp - x86_64_cel_redstone_xp Description - * - -The documentation overview for this module should go here. - - * - * @{ - * - * @defgroup x86_64_cel_redstone_xp-x86_64_cel_redstone_xp Public Interface - * @defgroup x86_64_cel_redstone_xp-config Compile Time Configuration - * @defgroup x86_64_cel_redstone_xp-porting Porting Macros - * - * @} - * - */ - -#endif /* __X86_64_CEL_REDSTONE_XP_DOX_H__ */ diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/module/inc/x86_64_cel_redstone_xp/x86_64_cel_redstone_xp_porting.h b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/module/inc/x86_64_cel_redstone_xp/x86_64_cel_redstone_xp_porting.h deleted file mode 100644 index cf9ed33d..00000000 --- a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/module/inc/x86_64_cel_redstone_xp/x86_64_cel_redstone_xp_porting.h +++ /dev/null @@ -1,107 +0,0 @@ -/**************************************************************************//** - * - * @file - * @brief x86_64_cel_redstone_xp Porting Macros. - * - * @addtogroup x86_64_cel_redstone_xp-porting - * @{ - * - *****************************************************************************/ -#ifndef __X86_64_CEL_REDSTONE_XP_PORTING_H__ -#define __X86_64_CEL_REDSTONE_XP_PORTING_H__ - - -/* */ -#if X86_64_CEL_REDSTONE_XP_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS == 1 -#include -#include -#include -#include -#include -#endif - -#ifndef X86_64_CEL_REDSTONE_XP_MALLOC - #if defined(GLOBAL_MALLOC) - #define X86_64_CEL_REDSTONE_XP_MALLOC GLOBAL_MALLOC - #elif X86_64_CEL_REDSTONE_XP_CONFIG_PORTING_STDLIB == 1 - #define X86_64_CEL_REDSTONE_XP_MALLOC malloc - #else - #error The macro X86_64_CEL_REDSTONE_XP_MALLOC is required but cannot be defined. - #endif -#endif - -#ifndef X86_64_CEL_REDSTONE_XP_FREE - #if defined(GLOBAL_FREE) - #define X86_64_CEL_REDSTONE_XP_FREE GLOBAL_FREE - #elif X86_64_CEL_REDSTONE_XP_CONFIG_PORTING_STDLIB == 1 - #define X86_64_CEL_REDSTONE_XP_FREE free - #else - #error The macro X86_64_CEL_REDSTONE_XP_FREE is required but cannot be defined. - #endif -#endif - -#ifndef X86_64_CEL_REDSTONE_XP_MEMSET - #if defined(GLOBAL_MEMSET) - #define X86_64_CEL_REDSTONE_XP_MEMSET GLOBAL_MEMSET - #elif X86_64_CEL_REDSTONE_XP_CONFIG_PORTING_STDLIB == 1 - #define X86_64_CEL_REDSTONE_XP_MEMSET memset - #else - #error The macro X86_64_CEL_REDSTONE_XP_MEMSET is required but cannot be defined. - #endif -#endif - -#ifndef X86_64_CEL_REDSTONE_XP_MEMCPY - #if defined(GLOBAL_MEMCPY) - #define X86_64_CEL_REDSTONE_XP_MEMCPY GLOBAL_MEMCPY - #elif X86_64_CEL_REDSTONE_XP_CONFIG_PORTING_STDLIB == 1 - #define X86_64_CEL_REDSTONE_XP_MEMCPY memcpy - #else - #error The macro X86_64_CEL_REDSTONE_XP_MEMCPY is required but cannot be defined. - #endif -#endif - -#ifndef X86_64_CEL_REDSTONE_XP_STRNCPY - #if defined(GLOBAL_STRNCPY) - #define X86_64_CEL_REDSTONE_XP_STRNCPY GLOBAL_STRNCPY - #elif X86_64_CEL_REDSTONE_XP_CONFIG_PORTING_STDLIB == 1 - #define X86_64_CEL_REDSTONE_XP_STRNCPY strncpy - #else - #error The macro X86_64_CEL_REDSTONE_XP_STRNCPY is required but cannot be defined. - #endif -#endif - -#ifndef X86_64_CEL_REDSTONE_XP_VSNPRINTF - #if defined(GLOBAL_VSNPRINTF) - #define X86_64_CEL_REDSTONE_XP_VSNPRINTF GLOBAL_VSNPRINTF - #elif X86_64_CEL_REDSTONE_XP_CONFIG_PORTING_STDLIB == 1 - #define X86_64_CEL_REDSTONE_XP_VSNPRINTF vsnprintf - #else - #error The macro X86_64_CEL_REDSTONE_XP_VSNPRINTF is required but cannot be defined. - #endif -#endif - -#ifndef X86_64_CEL_REDSTONE_XP_SNPRINTF - #if defined(GLOBAL_SNPRINTF) - #define X86_64_CEL_REDSTONE_XP_SNPRINTF GLOBAL_SNPRINTF - #elif X86_64_CEL_REDSTONE_XP_CONFIG_PORTING_STDLIB == 1 - #define X86_64_CEL_REDSTONE_XP_SNPRINTF snprintf - #else - #error The macro X86_64_CEL_REDSTONE_XP_SNPRINTF is required but cannot be defined. - #endif -#endif - -#ifndef X86_64_CEL_REDSTONE_XP_STRLEN - #if defined(GLOBAL_STRLEN) - #define X86_64_CEL_REDSTONE_XP_STRLEN GLOBAL_STRLEN - #elif X86_64_CEL_REDSTONE_XP_CONFIG_PORTING_STDLIB == 1 - #define X86_64_CEL_REDSTONE_XP_STRLEN strlen - #else - #error The macro X86_64_CEL_REDSTONE_XP_STRLEN is required but cannot be defined. - #endif -#endif - -/* */ - - -#endif /* __X86_64_CEL_REDSTONE_XP_PORTING_H__ */ -/* @} */ diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/module/make.mk b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/module/make.mk deleted file mode 100644 index 5ee878c7..00000000 --- a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/module/make.mk +++ /dev/null @@ -1,10 +0,0 @@ -############################################################################### -# -# -# -############################################################################### -THIS_DIR := $(dir $(lastword $(MAKEFILE_LIST))) -x86_64_cel_redstone_xp_INCLUDES := -I $(THIS_DIR)inc -x86_64_cel_redstone_xp_INTERNAL_INCLUDES := -I $(THIS_DIR)src -x86_64_cel_redstone_xp_DEPENDMODULE_ENTRIES := init:x86_64_cel_redstone_xp ucli:x86_64_cel_redstone_xp - diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/module/src/Makefile b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/module/src/Makefile deleted file mode 100644 index 2d27ef62..00000000 --- a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/module/src/Makefile +++ /dev/null @@ -1,9 +0,0 @@ -############################################################################### -# -# Local source generation targets. -# -############################################################################### - -ucli: - @../../../../tools/uclihandlers.py x86_64_cel_redstone_xp_ucli.c - diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/module/src/make.mk b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/module/src/make.mk deleted file mode 100644 index 403fc11c..00000000 --- a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/module/src/make.mk +++ /dev/null @@ -1,9 +0,0 @@ -############################################################################### -# -# -# -############################################################################### - -LIBRARY := x86_64_cel_redstone_xp -$(LIBRARY)_SUBDIR := $(dir $(lastword $(MAKEFILE_LIST))) -include $(BUILDER)/lib.mk diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/module/src/x86_64_cel_redstone_xp_config.c b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/module/src/x86_64_cel_redstone_xp_config.c deleted file mode 100644 index a988fcde..00000000 --- a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/module/src/x86_64_cel_redstone_xp_config.c +++ /dev/null @@ -1,76 +0,0 @@ -/**************************************************************************//** - * - * - * - *****************************************************************************/ -#include - -/* */ -#define __x86_64_cel_redstone_xp_config_STRINGIFY_NAME(_x) #_x -#define __x86_64_cel_redstone_xp_config_STRINGIFY_VALUE(_x) __x86_64_cel_redstone_xp_config_STRINGIFY_NAME(_x) -x86_64_cel_redstone_xp_config_settings_t x86_64_cel_redstone_xp_config_settings[] = -{ -#ifdef X86_64_CEL_REDSTONE_XP_CONFIG_INCLUDE_LOGGING - { __x86_64_cel_redstone_xp_config_STRINGIFY_NAME(X86_64_CEL_REDSTONE_XP_CONFIG_INCLUDE_LOGGING), __x86_64_cel_redstone_xp_config_STRINGIFY_VALUE(X86_64_CEL_REDSTONE_XP_CONFIG_INCLUDE_LOGGING) }, -#else -{ X86_64_CEL_REDSTONE_XP_CONFIG_INCLUDE_LOGGING(__x86_64_cel_redstone_xp_config_STRINGIFY_NAME), "__undefined__" }, -#endif -#ifdef X86_64_CEL_REDSTONE_XP_CONFIG_LOG_OPTIONS_DEFAULT - { __x86_64_cel_redstone_xp_config_STRINGIFY_NAME(X86_64_CEL_REDSTONE_XP_CONFIG_LOG_OPTIONS_DEFAULT), __x86_64_cel_redstone_xp_config_STRINGIFY_VALUE(X86_64_CEL_REDSTONE_XP_CONFIG_LOG_OPTIONS_DEFAULT) }, -#else -{ X86_64_CEL_REDSTONE_XP_CONFIG_LOG_OPTIONS_DEFAULT(__x86_64_cel_redstone_xp_config_STRINGIFY_NAME), "__undefined__" }, -#endif -#ifdef X86_64_CEL_REDSTONE_XP_CONFIG_LOG_BITS_DEFAULT - { __x86_64_cel_redstone_xp_config_STRINGIFY_NAME(X86_64_CEL_REDSTONE_XP_CONFIG_LOG_BITS_DEFAULT), __x86_64_cel_redstone_xp_config_STRINGIFY_VALUE(X86_64_CEL_REDSTONE_XP_CONFIG_LOG_BITS_DEFAULT) }, -#else -{ X86_64_CEL_REDSTONE_XP_CONFIG_LOG_BITS_DEFAULT(__x86_64_cel_redstone_xp_config_STRINGIFY_NAME), "__undefined__" }, -#endif -#ifdef X86_64_CEL_REDSTONE_XP_CONFIG_LOG_CUSTOM_BITS_DEFAULT - { __x86_64_cel_redstone_xp_config_STRINGIFY_NAME(X86_64_CEL_REDSTONE_XP_CONFIG_LOG_CUSTOM_BITS_DEFAULT), __x86_64_cel_redstone_xp_config_STRINGIFY_VALUE(X86_64_CEL_REDSTONE_XP_CONFIG_LOG_CUSTOM_BITS_DEFAULT) }, -#else -{ X86_64_CEL_REDSTONE_XP_CONFIG_LOG_CUSTOM_BITS_DEFAULT(__x86_64_cel_redstone_xp_config_STRINGIFY_NAME), "__undefined__" }, -#endif -#ifdef X86_64_CEL_REDSTONE_XP_CONFIG_PORTING_STDLIB - { __x86_64_cel_redstone_xp_config_STRINGIFY_NAME(X86_64_CEL_REDSTONE_XP_CONFIG_PORTING_STDLIB), __x86_64_cel_redstone_xp_config_STRINGIFY_VALUE(X86_64_CEL_REDSTONE_XP_CONFIG_PORTING_STDLIB) }, -#else -{ X86_64_CEL_REDSTONE_XP_CONFIG_PORTING_STDLIB(__x86_64_cel_redstone_xp_config_STRINGIFY_NAME), "__undefined__" }, -#endif -#ifdef X86_64_CEL_REDSTONE_XP_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS - { __x86_64_cel_redstone_xp_config_STRINGIFY_NAME(X86_64_CEL_REDSTONE_XP_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS), __x86_64_cel_redstone_xp_config_STRINGIFY_VALUE(X86_64_CEL_REDSTONE_XP_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS) }, -#else -{ X86_64_CEL_REDSTONE_XP_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS(__x86_64_cel_redstone_xp_config_STRINGIFY_NAME), "__undefined__" }, -#endif -#ifdef X86_64_CEL_REDSTONE_XP_CONFIG_INCLUDE_UCLI - { __x86_64_cel_redstone_xp_config_STRINGIFY_NAME(X86_64_CEL_REDSTONE_XP_CONFIG_INCLUDE_UCLI), __x86_64_cel_redstone_xp_config_STRINGIFY_VALUE(X86_64_CEL_REDSTONE_XP_CONFIG_INCLUDE_UCLI) }, -#else -{ X86_64_CEL_REDSTONE_XP_CONFIG_INCLUDE_UCLI(__x86_64_cel_redstone_xp_config_STRINGIFY_NAME), "__undefined__" }, -#endif - { NULL, NULL } -}; -#undef __x86_64_cel_redstone_xp_config_STRINGIFY_VALUE -#undef __x86_64_cel_redstone_xp_config_STRINGIFY_NAME - -const char* -x86_64_cel_redstone_xp_config_lookup(const char* setting) -{ - int i; - for(i = 0; x86_64_cel_redstone_xp_config_settings[i].name; i++) { - if(strcmp(x86_64_cel_redstone_xp_config_settings[i].name, setting)) { - return x86_64_cel_redstone_xp_config_settings[i].value; - } - } - return NULL; -} - -int -x86_64_cel_redstone_xp_config_show(struct aim_pvs_s* pvs) -{ - int i; - for(i = 0; x86_64_cel_redstone_xp_config_settings[i].name; i++) { - aim_printf(pvs, "%s = %s\n", x86_64_cel_redstone_xp_config_settings[i].name, x86_64_cel_redstone_xp_config_settings[i].value); - } - return i; -} - -/* */ - diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/module/src/x86_64_cel_redstone_xp_enums.c b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/module/src/x86_64_cel_redstone_xp_enums.c deleted file mode 100644 index 9562b328..00000000 --- a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/module/src/x86_64_cel_redstone_xp_enums.c +++ /dev/null @@ -1,10 +0,0 @@ -/**************************************************************************//** - * - * - * - *****************************************************************************/ -#include - -/* <--auto.start.enum(ALL).source> */ -/* */ - diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/module/src/x86_64_cel_redstone_xp_int.h b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/module/src/x86_64_cel_redstone_xp_int.h deleted file mode 100644 index 42f8cb73..00000000 --- a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/module/src/x86_64_cel_redstone_xp_int.h +++ /dev/null @@ -1,12 +0,0 @@ -/**************************************************************************//** - * - * x86_64_cel_redstone_xp Internal Header - * - *****************************************************************************/ -#ifndef __X86_64_CEL_REDSTONE_XP_INT_H__ -#define __X86_64_CEL_REDSTONE_XP_INT_H__ - -#include - - -#endif /* __X86_64_CEL_REDSTONE_XP_INT_H__ */ diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/module/src/x86_64_cel_redstone_xp_log.c b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/module/src/x86_64_cel_redstone_xp_log.c deleted file mode 100644 index 363c1170..00000000 --- a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/module/src/x86_64_cel_redstone_xp_log.c +++ /dev/null @@ -1,18 +0,0 @@ -/**************************************************************************//** - * - * - * - *****************************************************************************/ -#include - -#include "x86_64_cel_redstone_xp_log.h" -/* - * x86_64_cel_redstone_xp log struct. - */ -AIM_LOG_STRUCT_DEFINE( - X86_64_CEL_REDSTONE_XP_CONFIG_LOG_OPTIONS_DEFAULT, - X86_64_CEL_REDSTONE_XP_CONFIG_LOG_BITS_DEFAULT, - NULL, /* Custom log map */ - X86_64_CEL_REDSTONE_XP_CONFIG_LOG_CUSTOM_BITS_DEFAULT - ); - diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/module/src/x86_64_cel_redstone_xp_log.h b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/module/src/x86_64_cel_redstone_xp_log.h deleted file mode 100644 index 03a5649b..00000000 --- a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/module/src/x86_64_cel_redstone_xp_log.h +++ /dev/null @@ -1,12 +0,0 @@ -/**************************************************************************//** - * - * - * - *****************************************************************************/ -#ifndef __X86_64_CEL_REDSTONE_XP_LOG_H__ -#define __X86_64_CEL_REDSTONE_XP_LOG_H__ - -#define AIM_LOG_MODULE_NAME x86_64_cel_redstone_xp -#include - -#endif /* __X86_64_CEL_REDSTONE_XP_LOG_H__ */ diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/module/src/x86_64_cel_redstone_xp_module.c b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/module/src/x86_64_cel_redstone_xp_module.c deleted file mode 100644 index 6c337ad5..00000000 --- a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/module/src/x86_64_cel_redstone_xp_module.c +++ /dev/null @@ -1,24 +0,0 @@ -/**************************************************************************//** - * - * - * - *****************************************************************************/ -#include - -#include "x86_64_cel_redstone_xp_log.h" - -static int -datatypes_init__(void) -{ -#define X86_64_CEL_REDSTONE_XP_ENUMERATION_ENTRY(_enum_name, _desc) AIM_DATATYPE_MAP_REGISTER(_enum_name, _enum_name##_map, _desc, AIM_LOG_INTERNAL); -#include - return 0; -} - -void __x86_64_cel_redstone_xp_module_init__(void) -{ - AIM_LOG_STRUCT_REGISTER(); - datatypes_init__(); -} - -int __onlp_platform_version__ = 1; diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/module/src/x86_64_cel_redstone_xp_ucli.c b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/module/src/x86_64_cel_redstone_xp_ucli.c deleted file mode 100644 index 97a4473c..00000000 --- a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/x86_64_cel_redstone_xp/module/src/x86_64_cel_redstone_xp_ucli.c +++ /dev/null @@ -1,50 +0,0 @@ -/**************************************************************************//** - * - * - * - *****************************************************************************/ -#include - -#if X86_64_CEL_REDSTONE_XP_CONFIG_INCLUDE_UCLI == 1 - -#include -#include -#include - -static ucli_status_t -x86_64_cel_redstone_xp_ucli_ucli__config__(ucli_context_t* uc) -{ - UCLI_HANDLER_MACRO_MODULE_CONFIG(x86_64_cel_redstone_xp) -} - -/* */ -/* */ - -static ucli_module_t -x86_64_cel_redstone_xp_ucli_module__ = - { - "x86_64_cel_redstone_xp_ucli", - NULL, - x86_64_cel_redstone_xp_ucli_ucli_handlers__, - NULL, - NULL, - }; - -ucli_node_t* -x86_64_cel_redstone_xp_ucli_node_create(void) -{ - ucli_node_t* n; - ucli_module_init(&x86_64_cel_redstone_xp_ucli_module__); - n = ucli_node_create("x86_64_cel_redstone_xp", NULL, &x86_64_cel_redstone_xp_ucli_module__); - ucli_node_subnode_add(n, ucli_module_log_node_create("x86_64_cel_redstone_xp")); - return n; -} - -#else -void* -x86_64_cel_redstone_xp_ucli_node_create(void) -{ - return NULL; -} -#endif - diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/platform-config/r0/src/python/x86_64_cel_redstone_xp_r0/__init__.py b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/platform-config/r0/src/python/x86_64_cel_redstone_xp_r0/__init__.py index f3d6c214..0a683e2f 100644 --- a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/platform-config/r0/src/python/x86_64_cel_redstone_xp_r0/__init__.py +++ b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/platform-config/r0/src/python/x86_64_cel_redstone_xp_r0/__init__.py @@ -6,4 +6,3 @@ class OnlPlatform_x86_64_cel_redstone_xp_r0(OnlPlatformCelestica, PLATFORM='x86-64-cel-redstone-xp-r0' MODEL="Redstone XP" SYS_OBJECT_ID=".2060.1" - From 1c4da7ce756a2ac82b0179018eb27bc78ba66aac Mon Sep 17 00:00:00 2001 From: Sridhar Pitchai Date: Tue, 25 Oct 2016 12:50:36 -0700 Subject: [PATCH 2/3] Platform x86-64-cel-redstone-xp ONLP porting. This patch has ONLP APIs for sysi, sfp, fan, psu, led and thermals. onlpdump log: root@localhost:~# onlpdump System Information: = { Product Name: Redstone-XP D2060 Part Number: R0854-F1004-01 Serial Number: D2060B2F105A14AP000001 MAC: 00:e0:ec:33:5c:dc MAC Range: 73 Manufacturer: CELESTICA Manufacture Date: 10/21/2015 12:19:06 Vendor: CELESTICA Platform Name: RANGELEY Device Version: 10 Label Revision: Redstone-XP Country Code: CHN Diag Version: 1.2.8 Service Tag: LB ONIE Version: 2014.08 } psu @ 1 = { Description: PSU-1 Model: NULL SN: NULL Status: 0x00000001 [ PRESENT ] Caps: 0x00000000 Vin: 117620 Vout: 11920 Iin: 760 Iout: 5810 Pin: 90120 Pout: 69250 } psu @ 2 = { Description: PSU-2 Model: NULL SN: NULL Status: 0x00000005 [ PRESENT,UNPLUGGED ] Caps: 0x00000000 Vin: 0 Vout: 0 Iin: 0 Iout: 0 Pin: 0 Pout: 0 } led @ 1 = { Description: Chassis System LED(DIAG LED) Status: 0x00000005 [ PRESENT,ON ] Caps: 0x00011001 [ ON_OFF,ORANGE,GREEN ] Mode: ON Char: } led @ 2 = { Description: Chassis FAN(1) LED Status: 0x00000005 [ PRESENT,ON ] Caps: 0x00411001 [ ON_OFF,ORANGE,GREEN,AUTO ] Mode: ON Char: } led @ 3 = { Description: Chassis FAN(2) LED Status: 0x00000005 [ PRESENT,ON ] Caps: 0x00411001 [ ON_OFF,ORANGE,GREEN,AUTO ] Mode: ON Char: } led @ 4 = { Description: Chassis FAN(3) LED Status: 0x00000005 [ PRESENT,ON ] Caps: 0x00411001 [ ON_OFF,ORANGE,GREEN,AUTO ] Mode: ON Char: } led @ 5 = { Description: Chassis FAN(4) LED Status: 0x00000005 [ PRESENT,ON ] Caps: 0x00411001 [ ON_OFF,ORANGE,GREEN,AUTO ] Mode: ON Char: } led @ 6 = { Description: Chassis FAN(5) LED Status: 0x00000005 [ PRESENT,ON ] Caps: 0x00411001 [ ON_OFF,ORANGE,GREEN,AUTO ] Mode: ON Char: } led @ 7 = { Description: Chassis FAN(6) LED Status: 0x00000005 [ PRESENT,ON ] Caps: 0x00411001 [ ON_OFF,ORANGE,GREEN,AUTO ] Mode: ON Char: } led @ 8 = { Description: Chassis FAN(7) LED Status: 0x00000005 [ PRESENT,ON ] Caps: 0x00411001 [ ON_OFF,ORANGE,GREEN,AUTO ] Mode: ON Char: } led @ 9 = { Description: Chassis FAN(8) LED Status: 0x00000005 [ PRESENT,ON ] Caps: 0x00411001 [ ON_OFF,ORANGE,GREEN,AUTO ] Mode: ON Char: } led @ 10 = { Description: Chassis PSU(1) LED Status: 0x00000005 [ PRESENT,ON ] Caps: 0x00411001 [ ON_OFF,ORANGE,GREEN,AUTO ] Mode: ON Char: } led @ 11 = { Description: Chassis PSU(2) LED Status: 0x00000005 [ PRESENT,ON ] Caps: 0x00411001 [ ON_OFF,ORANGE,GREEN,AUTO ] Mode: ON Char: } thermal @ 1 = { Description: Chassis Thermal (Rear) Status: 0x00000001 [ PRESENT ] Caps: 0x0000000f [ GET_TEMPERATURE,GET_WARNING_THRESHOLD,GET_ERROR_THRESHOLD,GET_SHUTDOWN_THRESHOLD ] Temperature: 36 thresholds = { Warning: 45000 Error: 55000 Shutdown: 60000 } } thermal @ 2 = { Description: BCM SOC Thermal sensor Status: 0x00000001 [ PRESENT ] Caps: 0x0000000f [ GET_TEMPERATURE,GET_WARNING_THRESHOLD,GET_ERROR_THRESHOLD,GET_SHUTDOWN_THRESHOLD ] Temperature: 35 thresholds = { Warning: 45000 Error: 55000 Shutdown: 60000 } } thermal @ 3 = { Description: CPU Core Status: 0x00000001 [ PRESENT ] Caps: 0x0000000f [ GET_TEMPERATURE,GET_WARNING_THRESHOLD,GET_ERROR_THRESHOLD,GET_SHUTDOWN_THRESHOLD ] Temperature: 37 thresholds = { Warning: 45000 Error: 55000 Shutdown: 60000 } } thermal @ 4 = { Description: Chassis Thermal Sensor (Front) Status: 0x00000001 [ PRESENT ] Caps: 0x0000000f [ GET_TEMPERATURE,GET_WARNING_THRESHOLD,GET_ERROR_THRESHOLD,GET_SHUTDOWN_THRESHOLD ] Temperature: 40 thresholds = { Warning: 45000 Error: 55000 Shutdown: 60000 } } thermal @ 5 = { Description: PSU-1 Thermal Sensor Status: 0x00000001 [ PRESENT ] Caps: 0x0000000f [ GET_TEMPERATURE,GET_WARNING_THRESHOLD,GET_ERROR_THRESHOLD,GET_SHUTDOWN_THRESHOLD ] Temperature: 37 thresholds = { Warning: 45000 Error: 55000 Shutdown: 60000 } } thermal @ 6 = { Description: PSU-2 Thermal Sensor Status: 0x00000001 [ PRESENT ] Caps: 0x0000000f [ GET_TEMPERATURE,GET_WARNING_THRESHOLD,GET_ERROR_THRESHOLD,GET_SHUTDOWN_THRESHOLD ] Temperature: 35 thresholds = { Warning: 45000 Error: 55000 Shutdown: 60000 } } fan @ 1 = { Description: Chassis Fan 1 Status: 0x00000005 [ PRESENT,B2F ] Caps: 0x00000000 RPM: 8998 Per: 40 Model: NULL SN: NULL } fan @ 2 = { Description: Chassis Fan 2 Status: 0x00000005 [ PRESENT,B2F ] Caps: 0x00000000 RPM: 7710 Per: 40 Model: NULL SN: NULL } fan @ 3 = { Description: Chassis Fan 3 Status: 0x00000005 [ PRESENT,B2F ] Caps: 0x00000000 RPM: 9340 Per: 40 Model: NULL SN: NULL } fan @ 4 = { Description: Chassis Fan 4 Status: 0x00000005 [ PRESENT,B2F ] Caps: 0x00000000 RPM: 8090 Per: 40 Model: NULL SN: NULL } fan @ 5 = { Description: Chassis Fan 5 Status: 0x00000005 [ PRESENT,B2F ] Caps: 0x00000000 RPM: 9429 Per: 40 Model: NULL SN: NULL } fan @ 6 = { Description: Chassis Fan 6 Status: 0x00000005 [ PRESENT,B2F ] Caps: 0x00000000 RPM: 7992 Per: 40 Model: NULL SN: NULL } fan @ 7 = { Description: Chassis Fan 7 Status: 0x00000005 [ PRESENT,B2F ] Caps: 0x00000000 RPM: 9102 Per: 40 Model: NULL SN: NULL } fan @ 8 = { Description: Chassis Fan 8 Status: 0x00000005 [ PRESENT,B2F ] Caps: 0x00000000 RPM: 7927 Per: 40 Model: NULL SN: NULL } fan @ 9 = { Description: PSU Fan 1 Status: 0x00000009 [ PRESENT,F2B ] Caps: 0x00000000 RPM: 8848 Per: 50 Model: NULL SN: NULL } fan @ 10 = { Description: PSU Fan 2 Status: 0x00000009 [ PRESENT,F2B ] Caps: 0x00000000 RPM: 4700 Per: 47 Model: NULL SN: NULL } SFPs: Presence Bitmap: 1 2 35 36 RX_LOS Bitmap: 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 Port 01: Present, Status = 0x00000000 eeprom: 0000: 03 04 22 00 00 00 08 00 00 00 00 01 0d 00 00 00 0010: 00 00 64 00 4f 45 4d 20 20 20 20 20 20 20 20 20 0020: 20 20 20 20 00 00 17 6a 47 4c 43 2d 54 2d 43 55 0030: 52 56 20 20 20 20 20 20 42 31 20 20 00 00 00 dc 0040: 00 1a 00 00 58 41 4e 58 30 42 44 37 35 58 30 30 0050: 33 32 30 20 31 34 31 30 30 32 20 20 00 00 00 50 0060: 00 00 11 d4 0e 0e 75 5f eb 3a c6 32 2d f7 e9 dc 0070: 20 57 b5 00 00 00 00 00 00 00 00 00 c7 d9 08 00 0080: 43 4e 53 38 54 55 54 41 41 42 33 30 2d 31 34 31 0090: 30 2d 30 33 56 30 33 20 49 fb 46 00 00 00 00 26 00a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 aa aa 00c0: 47 4c 43 2d 54 20 20 20 20 20 20 20 20 20 20 20 00d0: 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 97 00e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00f0: 00 00 00 00 00 00 00 00 00 40 00 40 00 00 00 00 Port 02: Present, Status = 0x00000004 [ RX_LOS ] eeprom: 0000: 03 04 22 00 00 00 08 00 00 00 00 01 0d 00 00 00 0010: 00 00 64 00 4f 45 4d 20 20 20 20 20 20 20 20 20 0020: 20 20 20 20 00 00 17 6a 47 4c 43 2d 54 2d 43 55 0030: 52 56 20 20 20 20 20 20 42 31 20 20 00 00 00 dc 0040: 00 1a 00 00 58 41 4e 54 58 32 32 38 37 32 20 20 0050: 20 20 20 20 31 34 30 38 31 39 20 20 00 00 00 e9 0060: 00 00 11 7e 47 e6 43 7e 15 ef 8b 4b b1 7f 88 ba 0070: 78 eb 0b 00 00 00 00 00 00 00 00 00 24 fb c9 00 0080: 43 4e 53 38 54 55 54 41 41 42 33 30 2d 31 34 31 0090: 30 2d 30 33 56 30 33 20 49 fb 46 00 00 00 00 26 00a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 aa aa 00c0: 47 4c 43 2d 54 20 20 20 20 20 20 20 20 20 20 20 00d0: 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 97 00e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00f0: 00 00 00 00 00 00 00 00 00 40 00 40 00 00 00 00 Port 03: Missing. Port 04: Missing. Port 05: Missing. Port 06: Missing. Port 07: Missing. Port 08: Missing. Port 09: Missing. Port 10: Missing. Port 11: Missing. Port 12: Missing. Port 13: Missing. Port 14: Missing. Port 15: Missing. Port 16: Missing. Port 17: Missing. Port 18: Missing. Port 19: Missing. Port 20: Missing. Port 21: Missing. Port 22: Missing. Port 23: Missing. Port 24: Missing. Port 25: Missing. Port 26: Missing. Port 27: Missing. Port 28: Missing. Port 29: Missing. Port 30: Missing. Port 31: Missing. Port 32: Missing. Port 33: Missing. Port 34: Missing. Port 35: Present, Status = 0x00000000 eeprom: 0000: 03 04 21 00 00 00 00 00 04 00 00 00 67 00 00 00 0010: 00 00 03 00 4f 45 4d 20 20 20 20 20 20 20 20 20 0020: 20 20 20 20 00 00 40 20 53 46 50 2d 48 31 30 47 0030: 42 2d 43 55 33 4d 20 20 30 33 20 20 01 00 00 e8 0040: 00 00 00 00 43 53 53 33 31 47 35 31 39 32 39 20 0050: 20 20 20 20 31 36 30 35 30 31 20 20 00 00 00 ab 0060: 81 00 11 be cd f7 59 20 a9 96 69 41 e7 88 cd da 0070: 20 41 3b 00 00 00 00 00 00 00 00 00 9c 16 a0 00 0080: 43 4f 50 51 41 41 36 4a 41 42 33 37 2d 30 39 36 0090: 31 2d 30 33 56 30 33 20 01 00 46 00 00 00 00 cf 00a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00c0: 53 46 50 2d 48 31 30 47 42 2d 43 55 33 4d 20 20 00d0: 20 20 20 20 30 39 00 00 00 00 00 00 00 00 00 b6 00e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 Port 36: Present, Status = 0x00000000 eeprom: 0000: 03 04 21 00 00 00 00 00 04 00 00 00 67 00 00 00 0010: 00 00 03 00 4f 45 4d 20 20 20 20 20 20 20 20 20 0020: 20 20 20 20 00 00 40 20 53 46 50 2d 48 31 30 47 0030: 42 2d 43 55 33 4d 20 20 30 33 20 20 01 00 00 e8 0040: 00 00 00 00 43 53 53 33 31 47 35 31 39 32 32 20 0050: 20 20 20 20 31 36 30 35 30 31 20 20 00 00 00 a4 0060: 81 00 11 41 4f f5 2c 81 28 2e 9a d8 43 78 e9 40 0070: 65 4e 77 00 00 00 00 00 00 00 00 00 ec dc bd 00 0080: 43 4f 50 51 41 41 36 4a 41 42 33 37 2d 30 39 36 0090: 31 2d 30 33 56 30 33 20 01 00 46 00 00 00 00 cf 00a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00c0: 53 46 50 2d 48 31 30 47 42 2d 43 55 33 4d 20 20 00d0: 20 20 20 20 30 39 00 00 00 00 00 00 00 00 00 b6 00e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 Port 37: Missing. Port 38: Missing. Port 39: Missing. Port 40: Missing. Port 41: Missing. Port 42: Missing. Port 43: Missing. Port 44: Missing. Port 45: Missing. Port 46: Missing. Port 47: Missing. Port 48: Missing. Port 49: Missing. Port 50: Missing. Port 51: Missing. Port 52: Missing. Port 53: Missing. Port 54: Missing. root@localhost:~# root@localhost:~# --- .../onlp/builds/src/.module | 1 + .../onlp/builds/src/Makefile | 9 + .../onlp/builds/src/module/auto/make.mk | 9 + .../module/auto/x86_64_cel_redstone_xp.yml | 287 +++ .../x86_64_cel_redstone_xp.x | 14 + .../x86_64_cel_redstone_xp_config.h | 127 ++ .../x86_64_cel_redstone_xp_dox.h | 26 + .../x86_64_cel_redstone_xp_porting.h | 107 + .../onlp/builds/src/module/make.mk | 10 + .../onlp/builds/src/module/src/Makefile | 9 + .../onlp/builds/src/module/src/cpld.h | 61 + .../onlp/builds/src/module/src/cplds.c | 327 +++ .../onlp/builds/src/module/src/cplds.h | 12 + .../onlp/builds/src/module/src/fani.c | 111 + .../onlp/builds/src/module/src/i2c_chips.c | 1960 +++++++++++++++++ .../onlp/builds/src/module/src/i2c_chips.h | 225 ++ .../onlp/builds/src/module/src/i2c_dev.c | 483 ++++ .../onlp/builds/src/module/src/i2c_dev.h | 158 ++ .../onlp/builds/src/module/src/ledi.c | 141 ++ .../onlp/builds/src/module/src/make.mk | 9 + .../onlp/builds/src/module/src/platform.h | 28 + .../onlp/builds/src/module/src/psui.c | 50 + .../onlp/builds/src/module/src/sfp_xfp.h | 294 +++ .../onlp/builds/src/module/src/sfpi.c | 294 +++ .../onlp/builds/src/module/src/sys_eeprom.c | 66 + .../onlp/builds/src/module/src/sys_eeprom.h | 186 ++ .../onlp/builds/src/module/src/sysi.c | 175 ++ .../onlp/builds/src/module/src/thermali.c | 73 + .../src/x86_64_cel_redstone_xp_config.c | 76 + .../module/src/x86_64_cel_redstone_xp_enums.c | 674 ++++++ .../module/src/x86_64_cel_redstone_xp_int.h | 337 +++ .../module/src/x86_64_cel_redstone_xp_log.c | 18 + .../module/src/x86_64_cel_redstone_xp_log.h | 12 + .../src/x86_64_cel_redstone_xp_module.c | 24 + .../module/src/x86_64_cel_redstone_xp_ucli.c | 50 + 35 files changed, 6443 insertions(+) create mode 100644 packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/.module create mode 100644 packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/Makefile create mode 100644 packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/auto/make.mk create mode 100644 packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/auto/x86_64_cel_redstone_xp.yml create mode 100644 packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/inc/x86_64_cel_redstone_xp/x86_64_cel_redstone_xp.x create mode 100644 packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/inc/x86_64_cel_redstone_xp/x86_64_cel_redstone_xp_config.h create mode 100644 packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/inc/x86_64_cel_redstone_xp/x86_64_cel_redstone_xp_dox.h create mode 100644 packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/inc/x86_64_cel_redstone_xp/x86_64_cel_redstone_xp_porting.h create mode 100644 packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/make.mk create mode 100644 packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/Makefile create mode 100644 packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/cpld.h create mode 100644 packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/cplds.c create mode 100644 packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/cplds.h create mode 100644 packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/fani.c create mode 100644 packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/i2c_chips.c create mode 100644 packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/i2c_chips.h create mode 100644 packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/i2c_dev.c create mode 100644 packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/i2c_dev.h create mode 100644 packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/ledi.c create mode 100644 packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/make.mk create mode 100644 packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/platform.h create mode 100644 packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/psui.c create mode 100644 packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/sfp_xfp.h create mode 100644 packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/sfpi.c create mode 100644 packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/sys_eeprom.c create mode 100644 packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/sys_eeprom.h create mode 100644 packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/sysi.c create mode 100644 packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/thermali.c create mode 100644 packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/x86_64_cel_redstone_xp_config.c create mode 100644 packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/x86_64_cel_redstone_xp_enums.c create mode 100644 packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/x86_64_cel_redstone_xp_int.h create mode 100644 packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/x86_64_cel_redstone_xp_log.c create mode 100644 packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/x86_64_cel_redstone_xp_log.h create mode 100644 packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/x86_64_cel_redstone_xp_module.c create mode 100644 packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/x86_64_cel_redstone_xp_ucli.c diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/.module b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/.module new file mode 100644 index 00000000..2aa1d02a --- /dev/null +++ b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/.module @@ -0,0 +1 @@ +name: x86_64_cel_redstone_xp diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/Makefile b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/Makefile new file mode 100644 index 00000000..551d44b7 --- /dev/null +++ b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/Makefile @@ -0,0 +1,9 @@ +############################################################################### +# +# +# +############################################################################### +include $(ONL)/make/config.mk +MODULE := x86_64_cel_redstone_xp +AUTOMODULE := x86_64_cel_redstone_xp +include $(BUILDER)/definemodule.mk diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/auto/make.mk b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/auto/make.mk new file mode 100644 index 00000000..49c7a8e1 --- /dev/null +++ b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/auto/make.mk @@ -0,0 +1,9 @@ +############################################################################### +# +# x86_64_cel_redstone_xp Autogeneration +# +############################################################################### +x86_64_cel_redstone_xp_AUTO_DEFS := module/auto/x86_64_cel_redstone_xp.yml +x86_64_cel_redstone_xp_AUTO_DIRS := module/inc/x86_64_cel_redstone_xp module/src +include $(BUILDER)/auto.mk + diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/auto/x86_64_cel_redstone_xp.yml b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/auto/x86_64_cel_redstone_xp.yml new file mode 100644 index 00000000..22d6adf9 --- /dev/null +++ b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/auto/x86_64_cel_redstone_xp.yml @@ -0,0 +1,287 @@ +############################################################################### +# +# x86_64_cel_redstone_xp Autogeneration Definitions. +# +############################################################################### + +cdefs: &cdefs +- X86_64_CEL_REDSTONE_XP_CONFIG_INCLUDE_LOGGING: + doc: "Include or exclude logging." + default: 1 +- X86_64_CEL_REDSTONE_XP_CONFIG_LOG_OPTIONS_DEFAULT: + doc: "Default enabled log options." + default: AIM_LOG_OPTIONS_DEFAULT +- X86_64_CEL_REDSTONE_XP_CONFIG_LOG_BITS_DEFAULT: + doc: "Default enabled log bits." + default: AIM_LOG_BITS_DEFAULT +- X86_64_CEL_REDSTONE_XP_CONFIG_LOG_CUSTOM_BITS_DEFAULT: + doc: "Default enabled custom log bits." + default: 0 +- X86_64_CEL_REDSTONE_XP_CONFIG_PORTING_STDLIB: + doc: "Default all porting macros to use the C standard libraries." + default: 1 +- X86_64_CEL_REDSTONE_XP_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS: + doc: "Include standard library headers for stdlib porting macros." + default: X86_64_CEL_REDSTONE_XP_CONFIG_PORTING_STDLIB +- X86_64_CEL_REDSTONE_XP_CONFIG_INCLUDE_UCLI: + doc: "Include generic uCli support." + default: 0 + + +definitions: + cdefs: + X86_64_CEL_REDSTONE_XP_CONFIG_HEADER: + defs: *cdefs + basename: x86_64_cel_redstone_xp_config + + portingmacro: + X86_64_CEL_REDSTONE_XP: + macros: + - malloc + - free + - memset + - memcpy + - strncpy + - vsnprintf + - snprintf + - strlen + + + enum: &enums + cpld1_reg: + members: + - VERSION: 0x100 + - SCRATCH: 0x101 + - RESET_CONTROL: 0x102 + - RESET_SOURCE: 0x103 + - BOARD_TYPE: 0x104 + - INT_PORT_STATUS: 0x110 + - INT0_SOURCE_STATUS: 0x111 + - INT0_SOURCE_INT: 0x112 + - INT0_SOURCE_MASK: 0x113 + - POWER_SUPPLY_STATUS: 0x120 + - POWER_GOOD_STATUS: 0x121 + - BPP_CONTROL: 0x122 + - WRITE_PROTECT_CONTROL: 0x123 + - MISC_STATUS_CONTROL: 0x124 + - INFO_RAM_ADDR_HIGH: 0x130 + - INFO_RAM_ADDR_LOW: 0x131 + - INFO_RAM_READ_DATA: 0x132 + - INFO_RAM_WRITE_DATA: 0x133 + + cpld2_reg: + members: + - VERSION: 0x200 + - SCRATCH: 0x201 + - I2C_PORT_ID: 0x210 + - I2C_OP_CODE: 0x211 + - I2C_DEV_ADDR: 0x212 + - I2C_CMD_BYTE0: 0x213 + - I2C_CMD_BYTE1: 0x214 + - I2C_CMD_BYTE2: 0x215 + - I2C_STATUS_RESET: 0x216 + + - I2C_WRITE_DATA_BYTE0: 0x220 + - I2C_WRITE_DATA_BYTE1: 0x221 + - I2C_WRITE_DATA_BYTE2: 0x222 + - I2C_WRITE_DATA_BYTE3: 0x223 + - I2C_WRITE_DATA_BYTE4: 0x224 + - I2C_WRITE_DATA_BYTE5: 0x225 + - I2C_WRITE_DATA_BYTE6: 0x226 + - I2C_WRITE_DATA_BYTE7: 0x227 + + - I2C_READ_DATA_BYTE0: 0x230 + - I2C_READ_DATA_BYTE1: 0x231 + - I2C_READ_DATA_BYTE2: 0x232 + - I2C_READ_DATA_BYTE3: 0x233 + - I2C_READ_DATA_BYTE4: 0x234 + - I2C_READ_DATA_BYTE5: 0x235 + - I2C_READ_DATA_BYTE6: 0x236 + - I2C_READ_DATA_BYTE7: 0x237 + + - SFP_1_8_RX_LOS: 0x240 + - SFP_9_16_RX_LOS: 0x241 + - SFP_17_18_RX_LOS: 0x242 + + - SFP_1_8_RX_LOS_INT: 0x243 + - SFP_9_16_RX_LOS_INT: 0x244 + - SFP_17_18_RX_LOS_INT: 0x245 + + - SFP_1_8_RX_LOS_MASK: 0x246 + - SFP_9_16_RX_LOS_MASK: 0x247 + - SFP_17_18_RX_LOS_MASK: 0x248 + + - SFP_1_8_TX_DISABLE: 0x250 + - SFP_9_16_TX_DISABLE: 0x251 + - SFP_17_18_TX_DISABLE: 0x252 + + - SFP_1_8_RS_CONTROL: 0x253 + - SFP_9_16_RS_CONTROL: 0x254 + - SFP_17_18_RS_CONTROL: 0x255 + + - SFP_1_8_TX_FAULT: 0x256 + - SFP_9_16_TX_FAULT: 0x257 + - SFP_17_18_TX_FAULT: 0x258 + + - SFP_1_8_ABS_STATUS: 0x259 + - SFP_9_16_ABS_STATUS: 0x25A + - SFP_17_18_ABS_STATUS: 0x25B + + cpld3_reg: + members: + - VERSION: 0x280 + - SCRATCH: 0x281 + - I2C_PORT_ID: 0x290 + - I2C_OP_CODE: 0x291 + - I2C_DEV_ADDR: 0x292 + - I2C_CMD_BYTE0: 0x293 + - I2C_CMD_BYTE1: 0x294 + - I2C_CMD_BYTE2: 0x295 + - I2C_STATUS_RESET: 0x296 + + - I2C_WRITE_DATA_BYTE0: 0x2A0 + - I2C_WRITE_DATA_BYTE1: 0x2A1 + - I2C_WRITE_DATA_BYTE2: 0x2A2 + - I2C_WRITE_DATA_BYTE3: 0x2A3 + - I2C_WRITE_DATA_BYTE4: 0x2A4 + - I2C_WRITE_DATA_BYTE5: 0x2A5 + - I2C_WRITE_DATA_BYTE6: 0x2A6 + - I2C_WRITE_DATA_BYTE7: 0x2A7 + + - I2C_READ_DATA_BYTE0: 0x2B0 + - I2C_READ_DATA_BYTE1: 0x2B1 + - I2C_READ_DATA_BYTE2: 0x2B2 + - I2C_READ_DATA_BYTE3: 0x2B3 + - I2C_READ_DATA_BYTE4: 0x2B4 + - I2C_READ_DATA_BYTE5: 0x2B5 + - I2C_READ_DATA_BYTE6: 0x2B6 + - I2C_READ_DATA_BYTE7: 0x2B7 + + - SFP_19_26_RX_LOS: 0x2C0 + - SFP_27_34_RX_LOS: 0x2C1 + - SFP_35_36_RX_LOS: 0x2C2 + + - SFP_19_26_RX_LOS_INT: 0x2C3 + - SFP_27_34_RX_LOS_INT: 0x2C4 + - SFP_35_36_RX_LOS_INT: 0x2C5 + + - SFP_19_26_RX_LOS_MASK: 0x2C6 + - SFP_27_34_RX_LOS_MASK: 0x2C7 + - SFP_35_36_RX_LOS_MASK: 0x2C8 + + - SFP_19_26_TX_DISABLE: 0x2D0 + - SFP_27_34_TX_DISABLE: 0x2D1 + - SFP_35_36_TX_DISABLE: 0x2D2 + + - SFP_19_26_RS_CONTROL: 0x2D3 + - SFP_27_34_RS_CONTROL: 0x2D4 + - SFP_35_36_RS_CONTROL: 0x2D5 + + - SFP_19_26_TX_FAULT: 0x2D6 + - SFP_27_34_TX_FAULT: 0x2D7 + - SFP_35_36_TX_FAULT: 0x2D8 + + - SFP_19_26_ABS_STATUS: 0x2D9 + - SFP_27_34_ABS_STATUS: 0x2DA + - SFP_35_36_ABS_STATUS: 0x2DB + + + cpld4_reg: + members: + - VERSION: 0x300 + - SCRATCH: 0x301 + - RESET_CONTROL: 0x302 + - LED_CONTROL: 0x303 + - MISC_STATUS_CONTROL: 0x304 + - INT_PORT_STATUS: 0x305 + - INT0_SOURCE_STATUS: 0x306 + - INT1_SOURCE_STATUS: 0x307 + - INT2_SOURCE_STATUS: 0x308 + - INT0_SOURCE_INT: 0x309 + - INT1_SOURCE_INT: 0x30A + - INT2_SOURCE_INT: 0x30B + - INT0_SOURCE_MASK: 0x30C + - INT1_SOURCE_MASK: 0x30D + - INT2_SOURCE_MASK: 0x30E + - I2C_PORT_ID: 0x310 + - I2C_OP_CODE: 0x311 + - I2C_DEV_ADDR: 0x312 + - I2C_COMMAND_BYTE0: 0x313 + - I2C_COMMAND_BYTE1: 0x314 + - I2C_COMMAND_BYTE2: 0x315 + - I2C_STATUS_RESET: 0x316 + + - I2C_WRITE_DATA_BYTE0: 0x320 + - I2C_WRITE_DATA_BYTE1: 0x321 + - I2C_WRITE_DATA_BYTE2: 0x322 + - I2C_WRITE_DATA_BYTE3: 0x323 + - I2C_WRITE_DATA_BYTE4: 0x324 + - I2C_WRITE_DATA_BYTE5: 0x325 + - I2C_WRITE_DATA_BYTE6: 0x326 + - I2C_WRITE_DATA_BYTE7: 0x327 + + - I2C_READ_DATA_BYTE0: 0x330 + - I2C_READ_DATA_BYTE1: 0x331 + - I2C_READ_DATA_BYTE2: 0x332 + - I2C_READ_DATA_BYTE3: 0x333 + - I2C_READ_DATA_BYTE4: 0x334 + - I2C_READ_DATA_BYTE5: 0x335 + - I2C_READ_DATA_BYTE6: 0x336 + - I2C_READ_DATA_BYTE7: 0x337 + + - QSFP_RESET_CONTROL: 0x360 + - QSFP_LPMOD_CONTROL: 0x361 + - QSFP_ABS_STATUS: 0x362 + - QSFP_INT_STATUS: 0x363 + - QSFP_I2C_READY: 0x364 + + cpld5_reg: + members: + - VERSION: 0x380 + - SCRATCH: 0x381 + - I2C_PORT_ID: 0x390 + - I2C_OP_CODE: 0x391 + - I2C_DEV_ADDR: 0x392 + - I2C_CMD_BYTE0: 0x393 + - I2C_CMD_BYTE1: 0x394 + - I2C_CMD_BYTE2: 0x395 + - I2C_STATUS_RESET: 0x396 + + - I2C_WRITE_DATA_BYTE0: 0x3A0 + - I2C_WRITE_DATA_BYTE1: 0x3A1 + - I2C_WRITE_DATA_BYTE2: 0x3A2 + - I2C_WRITE_DATA_BYTE3: 0x3A3 + - I2C_WRITE_DATA_BYTE4: 0x3A4 + - I2C_WRITE_DATA_BYTE5: 0x3A5 + - I2C_WRITE_DATA_BYTE6: 0x3A6 + - I2C_WRITE_DATA_BYTE7: 0x3A7 + + - I2C_READ_DATA_BYTE0: 0x3B0 + - I2C_READ_DATA_BYTE1: 0x3B1 + - I2C_READ_DATA_BYTE2: 0x3B2 + - I2C_READ_DATA_BYTE3: 0x3B3 + - I2C_READ_DATA_BYTE4: 0x3B4 + - I2C_READ_DATA_BYTE5: 0x3B5 + - I2C_READ_DATA_BYTE6: 0x3B6 + - I2C_READ_DATA_BYTE7: 0x3B7 + + - SFP_37_44_RX_LOS: 0x3C0 + - SFP_45_48_RX_LOS: 0x3C1 + + - SFP_37_44_RX_LOS_INT: 0x3C2 + - SFP_45_48_RX_LOS_INT: 0x3C3 + + - SFP_37_44_RX_LOS_MASK: 0x3C4 + - SFP_45_48_RX_LOS_MASK: 0x3C5 + + - SFP_37_44_TX_DISABLE: 0x3D0 + - SFP_45_48_TX_DISABLE: 0x3D1 + + - SFP_37_44_RS_CONTROL: 0x3D2 + - SFP_45_48_RS_CONTROL: 0x3D3 + + - SFP_37_44_TX_FAULT: 0x3D4 + - SFP_45_48_TX_FAULT: 0x3D5 + + - SFP_37_44_ABS_STATUS: 0x3D6 + - SFP_45_48_ABS_STATUS: 0x3D7 diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/inc/x86_64_cel_redstone_xp/x86_64_cel_redstone_xp.x b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/inc/x86_64_cel_redstone_xp/x86_64_cel_redstone_xp.x new file mode 100644 index 00000000..db56c766 --- /dev/null +++ b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/inc/x86_64_cel_redstone_xp/x86_64_cel_redstone_xp.x @@ -0,0 +1,14 @@ +/**************************************************************************//** + * + * + * + *****************************************************************************/ +#include + +/* <--auto.start.xmacro(ALL).define> */ +/* */ + +/* <--auto.start.xenum(ALL).define> */ +/* */ + + diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/inc/x86_64_cel_redstone_xp/x86_64_cel_redstone_xp_config.h b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/inc/x86_64_cel_redstone_xp/x86_64_cel_redstone_xp_config.h new file mode 100644 index 00000000..1648a12f --- /dev/null +++ b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/inc/x86_64_cel_redstone_xp/x86_64_cel_redstone_xp_config.h @@ -0,0 +1,127 @@ +/**************************************************************************//** + * + * @file + * @brief x86_64_cel_redstone_xp Configuration Header + * + * @addtogroup x86_64_cel_redstone_xp-config + * @{ + * + *****************************************************************************/ +#ifndef __X86_64_CEL_REDSTONE_XP_CONFIG_H__ +#define __X86_64_CEL_REDSTONE_XP_CONFIG_H__ + +#ifdef GLOBAL_INCLUDE_CUSTOM_CONFIG +#include +#endif +#ifdef X86_64_CEL_REDSTONE_XP_INCLUDE_CUSTOM_CONFIG +#include +#endif + +/* */ +#include +/** + * X86_64_CEL_REDSTONE_XP_CONFIG_INCLUDE_LOGGING + * + * Include or exclude logging. */ + + +#ifndef X86_64_CEL_REDSTONE_XP_CONFIG_INCLUDE_LOGGING +#define X86_64_CEL_REDSTONE_XP_CONFIG_INCLUDE_LOGGING 1 +#endif + +/** + * X86_64_CEL_REDSTONE_XP_CONFIG_LOG_OPTIONS_DEFAULT + * + * Default enabled log options. */ + + +#ifndef X86_64_CEL_REDSTONE_XP_CONFIG_LOG_OPTIONS_DEFAULT +#define X86_64_CEL_REDSTONE_XP_CONFIG_LOG_OPTIONS_DEFAULT AIM_LOG_OPTIONS_DEFAULT +#endif + +/** + * X86_64_CEL_REDSTONE_XP_CONFIG_LOG_BITS_DEFAULT + * + * Default enabled log bits. */ + + +#ifndef X86_64_CEL_REDSTONE_XP_CONFIG_LOG_BITS_DEFAULT +#define X86_64_CEL_REDSTONE_XP_CONFIG_LOG_BITS_DEFAULT AIM_LOG_BITS_DEFAULT +#endif + +/** + * X86_64_CEL_REDSTONE_XP_CONFIG_LOG_CUSTOM_BITS_DEFAULT + * + * Default enabled custom log bits. */ + + +#ifndef X86_64_CEL_REDSTONE_XP_CONFIG_LOG_CUSTOM_BITS_DEFAULT +#define X86_64_CEL_REDSTONE_XP_CONFIG_LOG_CUSTOM_BITS_DEFAULT 0 +#endif + +/** + * X86_64_CEL_REDSTONE_XP_CONFIG_PORTING_STDLIB + * + * Default all porting macros to use the C standard libraries. */ + + +#ifndef X86_64_CEL_REDSTONE_XP_CONFIG_PORTING_STDLIB +#define X86_64_CEL_REDSTONE_XP_CONFIG_PORTING_STDLIB 1 +#endif + +/** + * X86_64_CEL_REDSTONE_XP_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS + * + * Include standard library headers for stdlib porting macros. */ + + +#ifndef X86_64_CEL_REDSTONE_XP_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS +#define X86_64_CEL_REDSTONE_XP_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS X86_64_CEL_REDSTONE_XP_CONFIG_PORTING_STDLIB +#endif + +/** + * X86_64_CEL_REDSTONE_XP_CONFIG_INCLUDE_UCLI + * + * Include generic uCli support. */ + + +#ifndef X86_64_CEL_REDSTONE_XP_CONFIG_INCLUDE_UCLI +#define X86_64_CEL_REDSTONE_XP_CONFIG_INCLUDE_UCLI 0 +#endif + + + +/** + * All compile time options can be queried or displayed + */ + +/** Configuration settings structure. */ +typedef struct x86_64_cel_redstone_xp_config_settings_s { + /** name */ + const char* name; + /** value */ + const char* value; +} x86_64_cel_redstone_xp_config_settings_t; + +/** Configuration settings table. */ +/** x86_64_cel_redstone_xp_config_settings table. */ +extern x86_64_cel_redstone_xp_config_settings_t x86_64_cel_redstone_xp_config_settings[]; + +/** + * @brief Lookup a configuration setting. + * @param setting The name of the configuration option to lookup. + */ +const char* x86_64_cel_redstone_xp_config_lookup(const char* setting); + +/** + * @brief Show the compile-time configuration. + * @param pvs The output stream. + */ +int x86_64_cel_redstone_xp_config_show(struct aim_pvs_s* pvs); + +/* */ + +#include "x86_64_cel_redstone_xp_porting.h" + +#endif /* __X86_64_CEL_REDSTONE_XP_CONFIG_H__ */ +/* @} */ diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/inc/x86_64_cel_redstone_xp/x86_64_cel_redstone_xp_dox.h b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/inc/x86_64_cel_redstone_xp/x86_64_cel_redstone_xp_dox.h new file mode 100644 index 00000000..80e739cd --- /dev/null +++ b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/inc/x86_64_cel_redstone_xp/x86_64_cel_redstone_xp_dox.h @@ -0,0 +1,26 @@ +/**************************************************************************//** + * + * x86_64_cel_redstone_xp Doxygen Header + * + *****************************************************************************/ +#ifndef __X86_64_CEL_REDSTONE_XP_DOX_H__ +#define __X86_64_CEL_REDSTONE_XP_DOX_H__ + +/** + * @defgroup x86_64_cel_redstone_xp x86_64_cel_redstone_xp - x86_64_cel_redstone_xp Description + * + +The documentation overview for this module should go here. + + * + * @{ + * + * @defgroup x86_64_cel_redstone_xp-x86_64_cel_redstone_xp Public Interface + * @defgroup x86_64_cel_redstone_xp-config Compile Time Configuration + * @defgroup x86_64_cel_redstone_xp-porting Porting Macros + * + * @} + * + */ + +#endif /* __X86_64_CEL_REDSTONE_XP_DOX_H__ */ diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/inc/x86_64_cel_redstone_xp/x86_64_cel_redstone_xp_porting.h b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/inc/x86_64_cel_redstone_xp/x86_64_cel_redstone_xp_porting.h new file mode 100644 index 00000000..cf9ed33d --- /dev/null +++ b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/inc/x86_64_cel_redstone_xp/x86_64_cel_redstone_xp_porting.h @@ -0,0 +1,107 @@ +/**************************************************************************//** + * + * @file + * @brief x86_64_cel_redstone_xp Porting Macros. + * + * @addtogroup x86_64_cel_redstone_xp-porting + * @{ + * + *****************************************************************************/ +#ifndef __X86_64_CEL_REDSTONE_XP_PORTING_H__ +#define __X86_64_CEL_REDSTONE_XP_PORTING_H__ + + +/* */ +#if X86_64_CEL_REDSTONE_XP_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS == 1 +#include +#include +#include +#include +#include +#endif + +#ifndef X86_64_CEL_REDSTONE_XP_MALLOC + #if defined(GLOBAL_MALLOC) + #define X86_64_CEL_REDSTONE_XP_MALLOC GLOBAL_MALLOC + #elif X86_64_CEL_REDSTONE_XP_CONFIG_PORTING_STDLIB == 1 + #define X86_64_CEL_REDSTONE_XP_MALLOC malloc + #else + #error The macro X86_64_CEL_REDSTONE_XP_MALLOC is required but cannot be defined. + #endif +#endif + +#ifndef X86_64_CEL_REDSTONE_XP_FREE + #if defined(GLOBAL_FREE) + #define X86_64_CEL_REDSTONE_XP_FREE GLOBAL_FREE + #elif X86_64_CEL_REDSTONE_XP_CONFIG_PORTING_STDLIB == 1 + #define X86_64_CEL_REDSTONE_XP_FREE free + #else + #error The macro X86_64_CEL_REDSTONE_XP_FREE is required but cannot be defined. + #endif +#endif + +#ifndef X86_64_CEL_REDSTONE_XP_MEMSET + #if defined(GLOBAL_MEMSET) + #define X86_64_CEL_REDSTONE_XP_MEMSET GLOBAL_MEMSET + #elif X86_64_CEL_REDSTONE_XP_CONFIG_PORTING_STDLIB == 1 + #define X86_64_CEL_REDSTONE_XP_MEMSET memset + #else + #error The macro X86_64_CEL_REDSTONE_XP_MEMSET is required but cannot be defined. + #endif +#endif + +#ifndef X86_64_CEL_REDSTONE_XP_MEMCPY + #if defined(GLOBAL_MEMCPY) + #define X86_64_CEL_REDSTONE_XP_MEMCPY GLOBAL_MEMCPY + #elif X86_64_CEL_REDSTONE_XP_CONFIG_PORTING_STDLIB == 1 + #define X86_64_CEL_REDSTONE_XP_MEMCPY memcpy + #else + #error The macro X86_64_CEL_REDSTONE_XP_MEMCPY is required but cannot be defined. + #endif +#endif + +#ifndef X86_64_CEL_REDSTONE_XP_STRNCPY + #if defined(GLOBAL_STRNCPY) + #define X86_64_CEL_REDSTONE_XP_STRNCPY GLOBAL_STRNCPY + #elif X86_64_CEL_REDSTONE_XP_CONFIG_PORTING_STDLIB == 1 + #define X86_64_CEL_REDSTONE_XP_STRNCPY strncpy + #else + #error The macro X86_64_CEL_REDSTONE_XP_STRNCPY is required but cannot be defined. + #endif +#endif + +#ifndef X86_64_CEL_REDSTONE_XP_VSNPRINTF + #if defined(GLOBAL_VSNPRINTF) + #define X86_64_CEL_REDSTONE_XP_VSNPRINTF GLOBAL_VSNPRINTF + #elif X86_64_CEL_REDSTONE_XP_CONFIG_PORTING_STDLIB == 1 + #define X86_64_CEL_REDSTONE_XP_VSNPRINTF vsnprintf + #else + #error The macro X86_64_CEL_REDSTONE_XP_VSNPRINTF is required but cannot be defined. + #endif +#endif + +#ifndef X86_64_CEL_REDSTONE_XP_SNPRINTF + #if defined(GLOBAL_SNPRINTF) + #define X86_64_CEL_REDSTONE_XP_SNPRINTF GLOBAL_SNPRINTF + #elif X86_64_CEL_REDSTONE_XP_CONFIG_PORTING_STDLIB == 1 + #define X86_64_CEL_REDSTONE_XP_SNPRINTF snprintf + #else + #error The macro X86_64_CEL_REDSTONE_XP_SNPRINTF is required but cannot be defined. + #endif +#endif + +#ifndef X86_64_CEL_REDSTONE_XP_STRLEN + #if defined(GLOBAL_STRLEN) + #define X86_64_CEL_REDSTONE_XP_STRLEN GLOBAL_STRLEN + #elif X86_64_CEL_REDSTONE_XP_CONFIG_PORTING_STDLIB == 1 + #define X86_64_CEL_REDSTONE_XP_STRLEN strlen + #else + #error The macro X86_64_CEL_REDSTONE_XP_STRLEN is required but cannot be defined. + #endif +#endif + +/* */ + + +#endif /* __X86_64_CEL_REDSTONE_XP_PORTING_H__ */ +/* @} */ diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/make.mk b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/make.mk new file mode 100644 index 00000000..5ee878c7 --- /dev/null +++ b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/make.mk @@ -0,0 +1,10 @@ +############################################################################### +# +# +# +############################################################################### +THIS_DIR := $(dir $(lastword $(MAKEFILE_LIST))) +x86_64_cel_redstone_xp_INCLUDES := -I $(THIS_DIR)inc +x86_64_cel_redstone_xp_INTERNAL_INCLUDES := -I $(THIS_DIR)src +x86_64_cel_redstone_xp_DEPENDMODULE_ENTRIES := init:x86_64_cel_redstone_xp ucli:x86_64_cel_redstone_xp + diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/Makefile b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/Makefile new file mode 100644 index 00000000..2d27ef62 --- /dev/null +++ b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/Makefile @@ -0,0 +1,9 @@ +############################################################################### +# +# Local source generation targets. +# +############################################################################### + +ucli: + @../../../../tools/uclihandlers.py x86_64_cel_redstone_xp_ucli.c + diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/cpld.h b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/cpld.h new file mode 100644 index 00000000..3b73e3cd --- /dev/null +++ b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/cpld.h @@ -0,0 +1,61 @@ +#ifndef CPLD_H +#define CPLD_H + +#include + +#define BIT0 0x1 +#define BIT1 0x1 << 1 +#define BIT2 0x1 << 2 +#define BIT3 0x1 << 3 +#define BIT4 0x1 << 4 +#define BIT5 0x1 << 5 +#define BIT6 0x1 << 6 +#define BIT7 0x1 << 7 + +typedef struct RegData +{ + unsigned short regId; /*register number*/ + char val; /*register value*/ + unsigned char rw; /*0:read 1:write*/ +}RegData_t; + +typedef struct SfpData +{ + char regId; + int portId; + char devAddr; + char val[256]; + unsigned char rw; + unsigned char len; +}SfpData_t; + +#define CPLD_TYPE ( 0x89 ) +#define IOCTL_READ_REG _IOR(CPLD_TYPE,0x05,RegData_t) +#define IOCTL_WRITE_REG _IOW(CPLD_TYPE,0x08,RegData_t) +#define IOCTL_SFP_READ _IOR(CPLD_TYPE,0x0F,RegData_t) +#define IOCTL_SFP_WRITE _IOW(CPLD_TYPE,0x10,RegData_t) + +#define CPLD1_REVISION 0x100 +#define CPLD_RESET_CONTROL 0x102 + +#define CPLD2_REVISION 0x200 +#define CPLD3_REVISION 0x280 +#define CPLD4_REVISION 0x300 +#define CPLD5_REVISION 0x380 +#define CPLD_FAN_PRESENT 0x194 +#define CPLD_FAN_STATUS_1 0x195 +#define CPLD_FAN_STATUS_2 0x195 +#define CPLD_PSU_STATUS 0x197 +#define CPLD_FP_LED 0x303 + + +int cpldRegRead(int regId, unsigned char *data, int size); +int cpldRegWrite(int regId, unsigned char *data, int size); +int cpldVersionGet(int cpld); + +int read_cpld(int reg, unsigned char *value); +int write_cpld(int reg, unsigned char value); +int read_sfp(int portID, char devAddr, char reg, char *data, int len); +int write_sfp(int portID, char devAddr, char reg, char *data, int len); + +#endif diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/cplds.c b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/cplds.c new file mode 100644 index 00000000..d9c6e1ae --- /dev/null +++ b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/cplds.c @@ -0,0 +1,327 @@ +#include +#include +#include + +#include +#include "x86_64_cel_redstone_xp_log.h" +#include "x86_64_cel_redstone_xp_int.h" +#include "cplds.h" + +int +cpld_io_init(void) +{ + /* Initialize LPC access ports */ + if(ioperm(0x100, 0x2FF, 1) == -1) { + AIM_LOG_ERROR("ioperm() failed: %{errno}", errno); + return -1; + } + return 0; +} + +int +cpld_read(int addr) +{ + return inb(addr); +} + +void +cpld_write(int addr, uint8_t value) +{ + outb(value, addr); +} + +int read_cpld(int reg, unsigned char *value) +{ + *value = inb(reg); + return 0; +} +int write_cpld(int reg, unsigned char value) +{ + outb(value, reg); + return 0; +} + +void +cpld_modify(int addr, uint8_t andmask, uint8_t ormask) +{ + int v; + read_cpld(addr, (unsigned char *)&v); + v &= andmask; + v |= ormask; + cpld_write(addr, v); +} + +int +cpld_dump(aim_pvs_t* pvs, int cpldid) +{ + int data; + + aim_map_si_t* si; + aim_map_si_t* maps[] = { + cpld1_reg_map, + cpld2_reg_map, + cpld3_reg_map, + cpld4_reg_map, + cpld5_reg_map, + }; + if(cpldid < 1 || cpldid > 5) { + aim_printf(pvs, "Invalid CPLDID %d\n", cpldid); + return -1; + } + else { + for(si = maps[cpldid-1]; si->s; si++) { + read_cpld(si->i, (unsigned char *)&data); + aim_printf(pvs, " %32.32s [0x%.2x] = 0x%.2x %{8bits}\n", si->s, si->i, data, data); + } + } + return 0; +} + + +// EXPERIMENT +#define PORT_BANK1_START 1 +#define PORT_BANK1_END 18 +#define PORT_BANK2_START 19 +#define PORT_BANK2_END 36 +#define PORT_BANK3_START 37 +#define PORT_BANK3_END 48 +#define PORT_BANK4_START 49 +#define PORT_BANK4_END 54 +int +read_sfp(int portID, char devAddr, char reg, char *data, int len) +{ + int count; + char byte; + short temp; + short portid, opcode, devaddr, cmdbyte0, ssrr, writedata = 0, readdata; + int ioBase = 0; + + cpld_io_init(); + + if ((reg + len) > 256) + return -1; + + if ((portID >= PORT_BANK1_START) && (portID <= PORT_BANK1_END)) { + portid = 0x210; + opcode = 0x211; + devaddr = 0x212; + cmdbyte0 = 0x213; + ssrr = 0x216; + writedata = 0x220; + readdata = 0x230; + + while ((inb(ioBase + ssrr) & 0x40)); + + if ((inb(ioBase + ssrr) & 0x80) == 0x80) { + outb(0x00, ioBase + ssrr); + usleep(3000); + outb(0x01, ioBase + ssrr); + return -1; + } + } else if ((portID >= PORT_BANK2_START) && (portID <= PORT_BANK2_END)) { + portid = 0x290; + opcode = 0x291; + devaddr = 0x292; + cmdbyte0 = 0x293; + ssrr = 0x296; + writedata = 0x2A0; + readdata = 0x2B0; + + while ((inb(ioBase + ssrr) & 0x40)); + + if ((inb(ioBase + ssrr) & 0x80) == 0x80) { + outb(0x00, ioBase + ssrr); + usleep(3000); + outb(0x01, ioBase + ssrr); + return -1; + } + } else if ((portID >= PORT_BANK3_START) && (portID <= PORT_BANK3_END)) { + portid = 0x390; + opcode = 0x391; + devaddr = 0x392; + cmdbyte0 = 0x393; + ssrr = 0x396; + writedata = 0x3A0; + readdata = 0x3B0; + + while ((inb(ioBase + ssrr) & 0x40)); + + if ((inb(ioBase + ssrr) & 0x80) == 0x80) { + outb(0x00, ioBase + ssrr); + usleep(3000); + outb(0x01, ioBase + ssrr); + return -1; + } + } else if ((portID >= PORT_BANK4_START) && (portID <= PORT_BANK4_END)) { + portid = 0x310; + opcode = 0x311; + devaddr = 0x312; + cmdbyte0 = 0x313; + ssrr = 0x316; + writedata = 0x320; + readdata = 0x330; + + while ((inb(ioBase + ssrr) & 0x40)); + + if ((inb(ioBase + ssrr) & 0x80) == 0x80) { + outb(0x00, ioBase + ssrr); + usleep(3000); + outb(0x01, ioBase + ssrr); + return -1; + } + } else { + return -1; + } + + byte = 0x40 + portID; + outb(byte, ioBase + portid); + outb(reg,ioBase + cmdbyte0); + + while (len > 0) { + count = (len >= 8) ? 8 : len; + len -= count; + byte = count * 16 + 1; + outb(byte, ioBase + opcode); + devAddr |= 0x01; + outb(devAddr, ioBase + devaddr); + + while ((inb(ioBase + ssrr) & 0x40)) + usleep(100); + + if ((inb(ioBase + ssrr) & 0x80) == 0x80) { + outb(0x00, ioBase + ssrr); + usleep(3000); + outb(0x01, ioBase + ssrr); + return -1; + } + + temp = ioBase + readdata; + + while (count-- > 0) { + char read_byte; + read_byte = inb(temp); + *(data++) = read_byte; + temp++; + } + + if (len > 0) { + reg += 0x08; + outb(reg, ioBase + cmdbyte0); + } + } +// FIXME + return writedata * 0; +// return 0; +} + +int +write_sfp(int portID, char devAddr, char reg, char *data, int len) +{ + int count; + char byte; + short temp; + short portid, opcode, devaddr, cmdbyte0, ssrr, writedata, readdata; + int ioBase = 0; + + if ((reg + len) > 256) + return -1; + + if ((portID >= PORT_BANK1_START) && (portID <= PORT_BANK1_END)) { + portid = 0x210; + opcode = 0x211; + devaddr = 0x212; + cmdbyte0 = 0x213; + ssrr = 0x216; + writedata = 0x220; + readdata = 0x230; + while ((inb(ioBase + ssrr) & 0x40)); + if ((inb(ioBase + ssrr) & 0x80) == 0x80) { + outb(0x00, ioBase + ssrr); + usleep(3000); + outb(0x01, ioBase + ssrr); + return -1; + } + } else if ((portID >= PORT_BANK2_START) && (portID <= PORT_BANK2_END)) { + portid = 0x290; + opcode = 0x291; + devaddr = 0x292; + cmdbyte0 = 0x293; + ssrr = 0x296; + writedata = 0x2A0; + readdata = 0x2B0; + while ((inb(ioBase + ssrr) & 0x40)); + if ((inb(ioBase + ssrr) & 0x80) == 0x80) { + outb(0x00, ioBase + ssrr); + usleep(3000); + outb(0x01, ioBase + ssrr); + return -1; + } + } else if ((portID >= PORT_BANK3_START) && (portID <= PORT_BANK3_END)) { + portid = 0x390; + opcode = 0x391; + devaddr = 0x392; + cmdbyte0 = 0x393; + ssrr = 0x396; + writedata = 0x3A0; + readdata = 0x3B0; + while ((inb(ioBase + ssrr) & 0x40)); + if ((inb(ioBase + ssrr) & 0x80) == 0x80) { + outb(0x00, ioBase + ssrr); + usleep(3000); + outb(0x01, ioBase + ssrr); + return -1; + } + } else if ((portID >= PORT_BANK4_START) && (portID <= PORT_BANK4_END)) { + portid = 0x310; + opcode = 0x311; + devaddr = 0x312; + cmdbyte0 = 0x313; + ssrr = 0x316; + writedata = 0x320; + readdata = 0x330; + while ((inb(ioBase + ssrr) & 0x40)); + if ((inb(ioBase + ssrr) & 0x80) == 0x80) { + outb(0x00, ioBase + ssrr); + usleep(3000); + outb(0x01, ioBase + ssrr); + return -1; + } + } else { + return -1; + } + + byte = 0x40 + portID; + outb(byte, ioBase + portid); + outb(reg, ioBase + cmdbyte0); + while (len > 0) { + count = (len >= 8) ? 8 : len; + len -= count; + byte = (count << 4) + 1; + outb(byte, ioBase + opcode); + temp = ioBase + writedata; + while (count-- > 0) { + outb(*(data++), temp); + temp += 0x01; + } + devAddr &= 0xfe; + outb(devAddr, ioBase + devaddr); + while ((inb(ioBase + ssrr) & 0x40)) + { + usleep(100); + } + if ((inb(ioBase + ssrr) & 0x80) == 0x80) { + outb(0x00, ioBase + ssrr); + usleep(3000); + outb(0x01, ioBase + ssrr); + return -1; + } + if (len > 0) { + reg += 0x08; + outb(ioBase + cmdbyte0, reg); + } + } +// FIXME + return writedata * readdata * 0; +// return 0; +} + diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/cplds.h b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/cplds.h new file mode 100644 index 00000000..e0f7db06 --- /dev/null +++ b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/cplds.h @@ -0,0 +1,12 @@ +#ifndef __CPLDS_H__ +#define __CPLDS_H__ + +int cpld_io_init(void); +int cpld_read(int addr); +void cpld_write(int addr, uint8_t value); +void cpld_modify(int addr, uint8_t andmask, uint8_t ormask); +int cpld_dump(aim_pvs_t* pvs, int cpldid); + +#endif /* __CPLDS_H__ */ + + diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/fani.c b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/fani.c new file mode 100644 index 00000000..2e626534 --- /dev/null +++ b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/fani.c @@ -0,0 +1,111 @@ +#include + +#include "i2c_chips.h" +#include "platform.h" + +onlp_fan_info_t f_info[FAN_COUNT + 1] = { + { + { ONLP_FAN_ID_CREATE(1), "Chassis Fan 1", 0 }, + 0x0, + }, + { + { ONLP_FAN_ID_CREATE(2), "Chassis Fan 2", 0 }, + 0x0, + }, + { + { ONLP_FAN_ID_CREATE(3), "Chassis Fan 3", 0 }, + 0x0, + }, + { + { ONLP_FAN_ID_CREATE(4), "Chassis Fan 4", 0 }, + 0x0, + }, + { + { ONLP_FAN_ID_CREATE(5), "Chassis Fan 5", 0 }, + 0x0, + }, + { + { ONLP_FAN_ID_CREATE(6), "Chassis Fan 6", 0 }, + 0x0, + }, + { + { ONLP_FAN_ID_CREATE(7), "Chassis Fan 7", 0 }, + 0x0, + }, + { + { ONLP_FAN_ID_CREATE(8), "Chassis Fan 8", 0 }, + 0x0, + }, + { + { ONLP_FAN_ID_CREATE(8), "PSU Fan 1", 0 }, + 0x0, + }, + { + { ONLP_FAN_ID_CREATE(8), "PSU Fan 2", 0 }, + 0x0, + }, +}; + + +int +onlp_fani_init(void) +{ + fanInit(); + return ONLP_STATUS_OK; +} + +int +onlp_fani_rpm_set(onlp_oid_t id, int rpm) +{ + int fan_id; + unsigned short p; + + /* Max speed 12000 RPM. 1 % is 120 RPM */ + p = (unsigned short) (rpm/120); + if ( p > 100) + p = 100; + + fan_id = ONLP_OID_ID_GET(id) - 1; + + fanSpeedSet(fan_id, p); + return ONLP_STATUS_OK; +} + +int +onlp_fani_percentage_set(onlp_oid_t id, int p) +{ + int fan_id; + + fan_id = ONLP_OID_ID_GET(id) - 1; + + fanSpeedSet(fan_id, (unsigned short)p); + return ONLP_STATUS_OK; +} + +int +onlp_fani_info_get(onlp_oid_t id, onlp_fan_info_t* info) +{ + int fan_id; + + fan_id = ONLP_OID_ID_GET(id) - 1; + + if (fan_id > FAN_COUNT) + return ONLP_STATUS_E_INTERNAL; + + *info = f_info[fan_id]; + + if (!getFanPresent(fan_id)) + info->status |= ONLP_FAN_STATUS_PRESENT; + else + return ONLP_STATUS_E_MISSING; + + if (getFanAirflow(fan_id)) + info->status |= ONLP_FAN_STATUS_F2B; + else + info->status |= ONLP_FAN_STATUS_B2F; + + fanSpeedGet(fan_id, &(info->rpm)); + fanPwmGet(fan_id, &(info->percentage)); + + return ONLP_STATUS_OK; +} diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/i2c_chips.c b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/i2c_chips.c new file mode 100644 index 00000000..f2928b46 --- /dev/null +++ b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/i2c_chips.c @@ -0,0 +1,1960 @@ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + + +#include "cpld.h" +#include "i2c_dev.h" +#include "i2c_chips.h" + +//#define PSOC_TAKE_I2C +#define PSOC_CTRL_SMBUS 0x01 + +static struct ts_info ts[] = { + {0x48, 0x0, 0x3}, + {0x4E, 0x0, 0x3}, + {0x49, 0x0, 0x3}, + {0x4A, 0x0, 0x3}, +}; + +static const struct dev_info i2c_dev[NUM_CHIPS] = { + {1,0x73, 4, "lm75_cpu"}, + {2,0x73, 5, "lm75_out"}, + {3,0x71, 4, "lm75_in"}, + {4,0x71, 5, "lm75_sw"}, + {5, 0x73, 2, "syseeprom"}, + {6, 0x71, 2, "gbeeeprom"}, + {9, 0x73, 7, "pca9506"}, +}; + +#define FANGROUP_NUM 4 +static const struct fan_config fan[FAN_NUM] = { + {0x4D, 0x4E, 0x40},//Fan 1 Front + {0x2E, 0x4E, 0x40},//Fan 1 Rear + {0x4D, 0x6E, 0x60},//Fan 2 F + {0x2e, 0x3E, 0x30},//Fan 2 R + {0x4D, 0x5E, 0x50},//Fan 3 F + {0x2E, 0x7E, 0x70},//Fan 3 R + {0x4D, 0x3E, 0x30},//Fan 4 F + {0x2E, 0x5E, 0x50},//Fan 4 R +}; + +static struct led_gpio ledGpio[] = { + {32, 31},//4_0,3_7, gpio(x_y) = x*8+y + {30, 29},//3_6,3_5 + /*{36, 35},//4_4,4_3 For smallstone*/ + {38, 37},//4_6,4_5 + {34, 33},//4_2,4_1 +}; +static unsigned char airFlowGpio[] = { + 16,//IO2_0 gpio = 2*8+0, gpio(x_y) = x*8+y + 15,//IO1_7 + /*18,//IO2_2 //For smallstone */ + 19,//IO2_3 + 17,//IO2_1 +}; +static unsigned char presentGpio[] = { + 11,//IO1_3 gpio = 2*8+0, gpio(x_y) = x*8+y + 10,//IO1_2 + /* 13,//IO1_5 //For smallstone */ + 14,//IO1_6 + 12,//IO1_4 +}; + +static int has_been_read = 0; +static unsigned char cpu_id = 0x00; + +unsigned long in_sus_val = 0x00000000; +unsigned long in_core_val = 0x00000000; + +int openChannel(unsigned char dev_id) +{ + unsigned char data; + int ret = -1; + int i; + for(i=0; i< NUM_CHIPS; i++) + { + if(dev_id == i2c_dev[i].dev_id) + { + data = 0x0 | (0x1 << i2c_dev[i].channel) ; + ret = chips_write_byte(i2c_dev[i].sw_addr, 0x0, data); + if(ret < 0) + return ret; + } + } + return ret; +} + +int closeChannel(unsigned char dev_id) +{ + int ret = -1; + int i; + for(i=0; i< NUM_CHIPS; i++) + { + if(dev_id == i2c_dev[i].dev_id) + { + ret = chips_write_byte(i2c_dev[i].sw_addr, 0x0, 0x0); + if(ret < 0) + return ret; + } + } + return ret; +} + + +/* GPIO INPUT: return zero or nonzero */ +void gpio_sus_init(unsigned int gpio) +{ + outl_p((inl_p(0x580) | (1 << gpio)), 0x580);//100 0000 0001 0011 0000 +} + +unsigned char gpio_sus_get_value(unsigned int gpio) +{ + unsigned char ucRet = 0; + + if ( inl_p( 0x588 ) & (1 << gpio) ) { + ucRet = 0x01; + } + else { + ucRet = 0x00; + } + + return ( ucRet ); + +} +void gpio_sus_set_value(unsigned int gpio, unsigned char val) +{ + if(val) + in_sus_val |= (1 << gpio); + else + in_sus_val &= ~(1 << gpio); + + outl_p( in_sus_val, 0x588 ); +} + + +/**************************************************************** + * gpio_set_dir + ****************************************************************/ +void gpio_sus_set_dir(unsigned int gpio, unsigned int out_flag) +{ + + if (out_flag) + outl_p((inl_p(0x584) & (~(1 << gpio))), 0x584);//output set 0 + else + outl_p((inl_p(0x584) | (1 << gpio)), 0x584);//input set 1 +} + +void gpio_core_init(unsigned int gpio) +{ + outl_p((inl_p(0x500) | (1 << gpio)), 0x500);//100 0000 0001 0011 0000 +} + +unsigned char gpio_core_get_value(unsigned int gpio) +{ + unsigned char ucRet = 0; + + if ( inl_p( 0x508 ) & (1 << gpio) ) { + ucRet = 0x01; + } + else { + ucRet = 0x00; + } + + return ( ucRet ); + +} +void gpio_core_set_value(unsigned int gpio, unsigned char val) +{ + + inl_p(0x508); + if(val) + in_core_val |= (1 << gpio); + else + in_core_val &= ~(1 << gpio); + + outl_p( in_core_val, 0x508 ); +} + + +/**************************************************************** + * gpio_set_dir + ****************************************************************/ +void gpio_core_set_dir(unsigned int gpio, unsigned int out_flag) +{ + + if (out_flag) + outl_p((inl_p(0x504) & (~(1 << gpio))), 0x504);//output set 0 + else + outl_p((inl_p(0x504) | (1 << gpio)), 0x504);//input set 1 +} + + +#define setbit(x,y) x|=(1<> 8); + return data; +} + +/*added by Gerald*/ +#define CPLD_RAM_ADDR_HIGH_BYTE_REG (0x130) +#define CPLD_RAM_ADDR_LOW_BYTE_REG (0x131) +#define CPLD_RAM_READ_REG (0x132) + +#define FAN1_RAM_SPEED_LOW (20) +#define FAN_PRES_STATUS (15) +#define FRONT_FAN_STATUS (FAN_PRES_STATUS + 1) +#define REAR_FAN_STATUS (FAN_PRES_STATUS + 2) + +#define PSU_PRES_STATUS (50) + +int read_ram_from_cpld(const unsigned short ram_offset, unsigned char *value) +{ + int ret; + unsigned char ram_hbyte, ram_lbyte; + unsigned char data; + + /* set RAM offset high byte first as described in spec */ + ram_hbyte = (ram_offset & 0xff00) >> 8 ; + ret = write_cpld(CPLD_RAM_ADDR_HIGH_BYTE_REG, ram_hbyte); + if (ret < 0) + { + printf("write ram offset high byte error\n"); + return ret; + } + + /* set RAM offset low byte */ + ram_lbyte = ram_offset & 0xff; + ret = write_cpld(CPLD_RAM_ADDR_LOW_BYTE_REG, ram_lbyte); + if (ret < 0) + { + printf("write ram offset low byte error\n"); + return ret; + } + + ret = read_cpld(CPLD_RAM_READ_REG, &data); + if(ret >= 0) + *value = data; + return ret; +} + +int read_ram_short_from_cpld(const unsigned short ram_offset, unsigned short *value) +{ + int ret = 0; + unsigned char data; + + ret = read_ram_from_cpld(ram_offset + 1, &data); + if(ret < 0) + return ret; + + *value = data << 8; + + ret = read_ram_from_cpld(ram_offset, &data); + *value |= data ; + return ret; +} + +#define PSOC_WATCHDOG_STATE (2) +#define PSOC_RXP_SXP_FLAG (4) +#define PSOC_PWM_RAM_REG (18) +#define PSOC_9506PORT_RAM_BASE (40) +#define PSU_STATE_RAM (50) + +int getWdFromCpldRam(unsigned char *val) +{ + int ret = 0; + unsigned char data; + + if(getCpuId() == PSOC_CTRL_SMBUS) { + ret = read_ram_from_cpld(PSOC_WATCHDOG_STATE, &data); + //printf("getWdFromCpldRam: ret=%d, data=%u\n", ret, data); + if(ret >= 0) + *val = data; + } + return ret; +} + +int getPwmFromCpldRam(unsigned char *val) +{ + int ret = 0; + unsigned char data; + + if(getCpuId() == PSOC_CTRL_SMBUS) { + ret = read_ram_from_cpld(PSOC_PWM_RAM_REG, &data); + //printf("getWdFromCpldRam: ret=%d, data=%u\n", ret, data); + if(ret >= 0) + *val = data; + } + return ret; +} + +#if 0 +int getAirFlowFromCpldRam(unsigned char *val, int index) +{ + int ret = 0; + unsigned char data; + + if(index > 5 || index < -1) + return -1; + + if(getCpuId() == PSOC_CTRL_SMBUS) { + ret = read_ram_from_cpld(PSOC_9506PORT_RAM_BASE + (index - 1), &data); + //printf("getWdFromCpldRam: ret=%d, data=%u\n", ret, data); + if(ret >= 0) { + *val = data; + } + } + return ret; +} +#endif + +int getRxpSxpFlag(unsigned char *val) +{ + int ret = 0; + unsigned char data; + + if(getCpuId() == PSOC_CTRL_SMBUS) { + ret = read_ram_from_cpld(PSOC_RXP_SXP_FLAG, &data); + //printf("getRxpSxpFlag: ret=%d, data=%u\n", ret, data); + if(ret >= 0) + *val = data; + } + + return ret; +} + +/*end of Gerald*/ +static int LM75_TEMP_FROM_REG(short data) +{ + return (swap(data&0xFFFF) /128)/2; +} + +#define ROA_TEMP_REM_REG (6) +#define BCM_TEMP_REM_REG (ROA_TEMP_REM_REG + 1) +#define CPU_TEMP_REM_REG (ROA_TEMP_REM_REG + 2) +#define FOA_TEMP_REM_REG (ROA_TEMP_REM_REG + 3) +#define TEMP_STATUS_RAM_REG (ROA_TEMP_REM_REG + 4) +#define PSOC_VER_BIT1 (ROA_TEMP_REM_REG + 5) +#define PSOC_VER_BIT2 (ROA_TEMP_REM_REG + 6) + +int getPSoCVersion(unsigned char *val) +{ + int ret = 0; + unsigned char data; + + if(getCpuId() == PSOC_CTRL_SMBUS) { + ret = read_ram_from_cpld(PSOC_VER_BIT1, &data); + if(ret >= 0) + *val = data; + if(ret < 0) + return ret; + + ret = read_ram_from_cpld(PSOC_VER_BIT2, &data); + if(ret >= 0) + *(val+1) = data; + if(ret < 0) + return ret; + } + return ret; +} + +int getTempStatus(unsigned char *val) +{ + int ret = 0; + unsigned char data; + + if(getCpuId() == PSOC_CTRL_SMBUS) { + ret = read_ram_from_cpld(TEMP_STATUS_RAM_REG, &data); + //printf("getRxpSxpFlag: ret=%d, data=%u\n", ret, data); + if(ret >= 0) + *val = data; + + return ret; + } + return ret; +} +int tsTempGet(int id, short *temp) +{ + int ret; + unsigned char data; + + if(getCpuId() == PSOC_CTRL_SMBUS) + { + ret = read_ram_from_cpld(ROA_TEMP_REM_REG + id, &data); + //printf("getPsuStatus: data=%u\n", data); + if(ret >= 0) + *temp = (short)data; + return ret; + } + else + { + unsigned short bufTmp = 0; + if((ret = getCtrlOfBus()) < 0) + return ret; + if((ret = enableChip(ts[id].ts_addr)) < 0) + return ret; + + ret = chips_read_word(ts[id].ts_addr, ts[id].temp_reg, &bufTmp); + if(ret >= 0) + *temp = LM75_TEMP_FROM_REG((short)bufTmp); + + disableChip(ts[id].ts_addr); + } + return ret; +} + +int tsOsGet(int id, unsigned short *temp) +{ + int ret; + unsigned char data; + + if(getCpuId() == PSOC_CTRL_SMBUS) + { + ret = read_ram_from_cpld(ROA_TEMP_REM_REG + id, &data); + //printf("getPsuStatus: data=%u\n", data); + if(ret >= 0) + *temp = (short)data; + return ret; + } + else + { + unsigned short bufTmp = 0; + if((ret = getCtrlOfBus()) < 0) + return ret; + + if((ret = enableChip(ts[id].ts_addr)) < 0) + return ret; + + ret = chips_read_word(ts[id].ts_addr, ts[id].os_reg, &bufTmp); + if(ret >= 0) + *temp = LM75_TEMP_FROM_REG((short)bufTmp); + + disableChip(ts[id].ts_addr); + } + return ret; +} + +int getTsShutdown(int id) +{ + int ret; + unsigned char data; + + if(getCpuId() == PSOC_CTRL_SMBUS) + { + ret = read_ram_from_cpld(ROA_TEMP_REM_REG + id, &data); + //printf("getPsuStatus: data=%u\n", data); + if(ret >= 0) + ret = (short)data; + return ret; + } + else + { + if((ret = getCtrlOfBus()) < 0) + return ret; + if((ret = enableChip(ts[id].ts_addr)) < 0) + return ret; + + ret = chips_read_byte(ts[id].ts_addr, 0x1, &data); + if(ret >= 0) + ret = data & 0x1; + + disableChip(ts[id].ts_addr); + + } + return ret; +} + +int setTsShutdown(int id, int shutdown) +{ + unsigned char data; + int ret; + + if((ret = getCtrlOfBus()) < 0) + return ret; + + if((ret = enableChip(ts[id].ts_addr)) < 0) + return ret; + + ret = chips_read_byte(ts[id].ts_addr, 0x1, &data); + + if(ret >= 0) { + if(shutdown == 1) { + data |= 0x1; + ret = chips_write_byte(ts[id].ts_addr, 0x1, data); + } else { + data &= 0xFE; + ret = chips_write_byte(ts[id].ts_addr, 0x1, data); + } + } + disableChip(ts[id].ts_addr); + return ret; +} + +static short convert_short(char *s, int len) +{ + short i; + short res = 0; + + for(i = 1; i < len; i++) { + res = res * 2 + (s[i] - '0'); + } + if(s[0] == '1') + return -res; + + return res; +} + +static long convert_linear(char *data) +{ + unsigned char low, high; + short N, Y; + long ret; + int temp = 1; + char s[11]; + int i; + + low = data[0]; + high = data[1]; + + if((high & 0x80) > 0) + high = ~high + 0x88; + for(i = 0; i < 5; i++) { + s[i] = (high & (0x80 >> i)) > 0 ? '1' : '0'; + } + + N = convert_short(s, 5); + high = data[1]; + if((high & 0x04) > 0) { + high = ~high + 0x40; + if((low != 0xff) && (low != 0x0)) + low = ~low + 0x1; + else { + low = 0x00; + high += 0x1; + } + + } + for(i = 5; i < 8; i++) + s[i-5] = (high & (0x80 >> i)) > 0 ? '1' : '0'; + for(i = 0; i < 8; i++) + s[i + 3] = (low & (0x80 >> i)) > 0 ? '1' : '0'; + + Y = convert_short(s, 11); + + if(N > 0) { + while(N > 0) { + temp = temp * 2; + N--; + } + + ret = Y * temp * 100; + } + else { + N = 0 - N; + while(N > 0) { + temp = temp * 2; + N--; + } + ret = (Y * 100) / temp; + } + + return ret; +} +int convert_vol(char *data) +{ + char low, high; + short temp; + short ret; + int i; + char s[16]; + + low = data[0]; + high = data[1]; + //printf("low = %x, high = %x\n", low, high); + if((high & 0x80) > 0) + { + high = ~high + 0x80; + if(low != 0xff) + low += ~low + 0x1; + else + { + low = 0x0; + high += 0x1; + } + } + for(i = 0; i < 8; i++) + s[i] = (high & (0x80 >> i)) > 0 ? '1' : '0'; + for(i = 0; i < 8; i++) + s[i + 8] = (low & (0x80 >> i)) > 0 ? '1' : '0'; + //printf("s = %s\n", s); + temp = convert_short(s, 16); + //printf("temp = %x\n", temp); + ret = (temp * 100) / 0x200; + + return ret; +} +#define PSU_RAM_VIN_LOW(i) (90 - i * 20) +#define PSU_RAM_IIN_LOW(i) (PSU_RAM_VIN_LOW(i) + 4) +#define PSU_RAM_VOUT_LOW(i) (PSU_RAM_VIN_LOW(i) + 2) +#define PSU_RAM_IOUT_LOW(i) (PSU_RAM_VIN_LOW(i) + 6) +#define PSU_RAM_POUT_LOW(i) (PSU_RAM_VIN_LOW(i) + 10) +#define PSU_RAM_PIN_LOW(i) (PSU_RAM_VIN_LOW(i) + 8) +#define PSU_RAM_TEMP1_LOW(i) (56 - (i) * 2) +#define PSU_RAM_FAN_SPEED_LOW(i) (62 - (i)*2) +#define PSU_RAM_STATUS (50) + +int getPsuInfo(int id, struct psuInfo * info) +{ + int status; + int ret; +// char cpld_psu_reg; +// char cpld_psu_reg_tmp; + unsigned short vin; + unsigned short iin; + unsigned short vout; + unsigned short iout; + unsigned short pout; + unsigned short pin; + unsigned short temp; + char psu_addr[] = { + 0x58, + 0x59, + }; + + if(getCpuId() == PSOC_CTRL_SMBUS) { + status = getPsuPresent(id); + if(status == 1) + return -1; + + if(status == 0) {//PSU-L present + if ((ret = read_ram_short_from_cpld(PSU_RAM_VIN_LOW(id), &vin)) < 0) + return -1; + if ((ret = read_ram_short_from_cpld(PSU_RAM_IIN_LOW(id), &iin)) < 0) + return -1; + if ((ret = read_ram_short_from_cpld(PSU_RAM_VOUT_LOW(id), &vout)) < 0) + return -1; + if ((ret = read_ram_short_from_cpld(PSU_RAM_IOUT_LOW(id), &iout)) < 0) + return -1; + if ((ret = read_ram_short_from_cpld(PSU_RAM_POUT_LOW(id), &pout)) < 0) + return -1; + if ((ret = read_ram_short_from_cpld(PSU_RAM_PIN_LOW(id), &pin)) < 0) + return -1; + if ((ret = read_ram_short_from_cpld(PSU_RAM_TEMP1_LOW(id), &temp)) < 0) + return -1; + + info->vin = convert_linear((char *)&vin) * 10; + info->iin = convert_linear((char *)&iin) * 10; + info->vout = convert_vol((char *)&vout) * 10; + info->iout = convert_linear((char *)&iout) * 10; + info->pout = convert_linear((char *)&pout) * 10; + info->pin = convert_linear((char *)&pin) * 10; + info->temp = convert_linear((char *)&temp)/100; + return 0; + } + + } else { + status = getPsuPresent(id); + if (status == 0) + { + if((ret = getCtrlOfBus()) < 0) + return ret; + if((ret = enableChip(psu_addr[id])) < 0) + return ret; + + if((ret = chips_read_word(psu_addr[id], PSU_READ_VIN, &vin)) < 0) + goto error; + if((ret = chips_read_word(psu_addr[id], PSU_READ_IIN, &iin)) < 0) + goto error; + if((ret = chips_read_word(psu_addr[id], PSU_READ_VOUT, &vout)) < 0) + goto error; + if((ret = chips_read_word(psu_addr[id], PSU_READ_IOUT, &iout)) < 0) + goto error; + if((ret = chips_read_word(psu_addr[id], PSU_READ_POUT, &pout)) < 0) + goto error; + if((ret = chips_read_word(psu_addr[id], PSU_READ_PIN, &pin)) < 0) + goto error; + if((ret = chips_read_word(psu_addr[id], PSU_READ_TEMP_1, &temp)) < 0) + goto error; + info->vin = convert_linear((char *)&vin) * 10; + info->iin = convert_linear((char *)&iin) * 10; + info->vout = convert_vol((char *)&vout) * 10; + info->iout = convert_linear((char *)&iout) * 10; + info->pout = convert_linear((char *)&pout) * 10; + info->pin = convert_linear((char *)&pin) * 10; + info->temp = convert_linear((char *)&temp)/100; + if((ret = disableChip(psu_addr[id])) < 0) + return ret; + return 0; + } + } + +error: + ret = disableChip(psu_addr[id]); + return -1; + +} +//return value 0:present, 1,absent +int getPsuPresent(int id) +{ + + unsigned char data; + int ret = -1; + + if(getCpuId() == PSOC_CTRL_SMBUS) + { + ret = read_ram_from_cpld(PSU_STATE_RAM, &data); + if(ret >= 0) { + ret = (data >> (1-id)) & 0x1; + ret = (ret == 0) ? 1 : 0; + } + } + else + { + int gpio; + switch(id) + { + case 0: + gpio = 27;//IO3_3 + break; + case 1: + gpio = 28;//IO3_4 + break; + default: + ret = -1; + return ret; + } + ret = pca9506_init_pin(gpio,gpio_in); + if(ret < 0) + return ret; + ret = pca9506_read_pin(gpio); + } + + + return ret; +} + +int read_psu(unsigned char addr, unsigned char reg, unsigned short *value) +{ + int status; + int ret = -1; + unsigned short data; + int id = 0; + if(addr == 0x58) + id = 8; + else if(addr == 0x59) + id = 9; + status = getFanPresent(id); + + if (status == 0) + { + if((ret = getCtrlOfBus()) < 0) + return ret; + if((ret = enableChip(addr)) < 0) + return ret; + + if((ret = chips_read_word(addr, reg, &data)) < 0) + goto error; + *value = data; + if((ret = disableChip(addr)) < 0) + return ret; + return 0; + } + else + { + goto error; + } + +error: + ret = disableChip(addr); + return -1; + +} + +int write_psu(unsigned char addr, unsigned char reg, unsigned short value) +{ +#if 0 + int status; + int ret = -1; + int id; + unsigned char data[5]; + unsigned char crc = 0; + unsigned char errStatus = 0; + unsigned char blockData[3]; + + unsigned char *wrData = (unsigned char *)&value; + + data[0] = (addr << 1) | 0;//0 i2c write + data[1] = reg; + data[2] = wrData[0]; + data[3] = wrData[1]; + crc = i2c_smbus_pec(crc, data, 4); + + blockData[0] = data[2]; + blockData[1] = data[3]; + blockData[2] = crc; + + if(addr == 0x58) + id = 8; + else if(addr == 0x59) + id = 9; + status = getFanPresent(id); + + if (status == 0) + { + if((ret = getCtrlOfBus()) < 0) + return ret; + if((ret = enableChip(addr)) < 0) + return ret; + + if((ret = chips_write_block(addr, reg, 3, blockData)) < 0) + goto error; + + if((ret = disableChip(addr)) < 0) + return ret; + return 0; + } + else + { + goto error; + } + +error: + ret = disableChip(addr); + return -1; +#endif + int status; + int ret = -1; + //unsigned short data; + int id = 0; + + if(addr == 0x58) + id = 8; + else if(addr == 0x59) + id = 9; + status = getFanPresent(id); + + if (status == 0) + { + if((ret = getCtrlOfBus()) < 0) + return ret; + if((ret = enableChip(addr)) < 0) + return ret; + + if((ret = chips_write_word_pec(addr, reg, value, 1)) < 0) + goto error; + if((ret = disableChip(addr)) < 0) + return ret; + return 0; + } + else + { + goto error; + } + +error: + ret = disableChip(addr); + return -1; + +} + +/*dev_id 5: system eeprom, dev_id 6: switch eeprom*/ +int +eeprom_enable(unsigned char dev_id) +{ + int ret =0; + unsigned char buf = 0x00; + int regNum = 0x123; + + ret = read_cpld(regNum, &buf); + buf &= ~(BIT0); + ret = write_cpld(regNum, buf); + + if(getCpuId() != PSOC_CTRL_SMBUS) { + getCtrlOfBus(); + ret = openChannel(dev_id); + } + return ret; + +} + + + +int +eeprom_disable(unsigned char dev_id) +{ + int ret =0; + unsigned char buf = 0x00; + int regNum = 0x123;; + + + if(getCpuId() != PSOC_CTRL_SMBUS) { + closeChannel(dev_id); + read_cpld(regNum, &buf); + buf |= BIT0; + ret = write_cpld(regNum, buf); + } + return ret; +} + +/* +close bios flash protect +[3] RW 0b0 Control The Status of SPD2_WP. +[2] RW 0b0 Control The Status of SPD1_WP. +*/ +int biosflash_enable() +{ + int ret =0; + unsigned char buf = 0x00; + int regNum = 0x123;; + + ret = read_cpld(regNum, &buf); + buf &= ~(BIT2 | BIT3); + ret = write_cpld(regNum, buf); + + return ret; + +} +/* +open bios flash protect +*/ +int biosflash_disable() +{ + int ret =0; + unsigned char buf = 0x00; + int regNum = 0x123;; + + ret = read_cpld(regNum, &buf); + buf |= (BIT2 | BIT3); + ret = write_cpld(regNum, buf); + + return ret; +} + +static inline int pca9506_read_byte_data(unsigned char reg,unsigned char *value) +{ + int ret; + + if(getCpuId() == PSOC_CTRL_SMBUS) { + unsigned char buf; + ret = read_cpld((int)0x198, &buf); + if(ret >= 0) + *value = (short)buf; + } else { + unsigned char data; + if((ret = getCtrlOfBus()) < 0) + return ret; + + if((ret = openChannel(9)) < 0) + { + return ret; + } + + + ret = chips_read_byte(PCA9506_ADDR, reg, &data); + if(ret >= 0) + *value = data; + + closeChannel(9); + } + return ret; +} + +static inline int pca9506_write_byte_data(unsigned char reg, unsigned char val) +{ + int ret = -1; + + if(getCpuId() == PSOC_CTRL_SMBUS) + { + unsigned char buf; + return read_cpld((int)0x198, &buf); + } else { + //unsigned char data; + if((ret = getCtrlOfBus()) < 0) + return ret; + + if((ret = openChannel(9)) < 0) + return ret; + + + ret = chips_write_byte(PCA9506_ADDR, reg, val); + closeChannel(9); + } + return ret; +} + +int pca9506_init_pin(unsigned char port, gpio_dir val) +{ + int ret = -1; + unsigned char bank = 0; + unsigned char bit = 0; + + unsigned char cfg_reg = 0; + //unsigned char input_reg = 0; + unsigned char output_reg = 0; + + unsigned char cfg_val = 0; + //unsigned char input_val = 0; + unsigned char output_val = 0; + + bank = port/8; + bit = port%8; + + cfg_reg = PCA9506_IOC0_REG + bank; + output_reg = PCA9506_OP0_REG + bank; + + // set output direction + ret = pca9506_read_byte_data(cfg_reg,&cfg_val); + + bit &= 0xf; + if(val == gpio_out) + cfg_val &= ~(0x01 << bit); + else + cfg_val |= (PCA9506_IO_INPUT << bit); + + ret = pca9506_write_byte_data(cfg_reg, cfg_val); + + if(val == gpio_out) + { + // set value + ret = pca9506_read_byte_data(output_reg, &output_val); + + val &= 0x01; + output_val &= ~(0x01 << bit); + output_val |= (val << bit); + ret = pca9506_write_byte_data(output_reg, output_val); + } + return ret; +} + +int pca9506_read_pin(unsigned char port) +{ + unsigned char bank = 0; + unsigned char bit = 0; + + //unsigned char cfg_reg = 0; + unsigned char input_reg = 0; + + //unsigned char cfg_val = 0; + unsigned char input_val = 0; + + bank = port/8; + bit = port%8; + + input_reg = PCA9506_IP0_REG + bank; + + // get value + pca9506_read_byte_data(input_reg, &input_val); + + return (input_val >> bit) & 0x01; +} + + +int pca9506_write_pin(unsigned char port, unsigned char val) +{ + int ret = -1; + unsigned char bank = 0; + unsigned char bit = 0; + + //unsigned char cfg_reg = 0; + unsigned char input_reg = 0; + unsigned char output_reg = 0; + + //unsigned char cfg_val = 0; + unsigned char input_val = 0; + //unsigned char output_val = 0; + + bank = port/8; + bit = port%8; + + input_reg = PCA9506_IP0_REG + bank; + output_reg = PCA9506_OP0_REG + bank; + + // get value + ret = pca9506_read_byte_data(input_reg,&input_val); + + val &= 0x01; + input_val &= ~(0x01 << bit); + input_val |= (val << bit); + ret = pca9506_write_byte_data(output_reg, input_val); + + return ret; +} + +/* +* param: id is fan id, from 0 to FAN_NUM + 1 +* return: 0 means present, 1 means absent +*/ +int getFanPresent(int id) +{ + + unsigned char data; + int ret = -1; + + if(getCpuId() == PSOC_CTRL_SMBUS) + { + int off; + if(id >= (FAN_NUM + 2) || id < 0) + return -1; + + if(id < FAN_NUM) + off = id / 2; + else + off = id - FAN_NUM; + + if(id <= (FAN_NUM - 1)) + ret = read_ram_from_cpld(FAN_PRES_STATUS, &data); + else + ret = read_ram_from_cpld(PSU_PRES_STATUS, &data); + + if(id <= (FAN_NUM - 1)) + ret = (data >> off) & 0x1; + else { + //ret = (data >> (1 - off)) & 0x1; + ret = (data & (1 << (1 - off))) ? 1 : 0; + } + + ret ^= 1; + } else { + int gpio = 0; + + if(id < FAN_NUM) + gpio = presentGpio[id>>1]; + else if(id == FAN_NUM) + gpio = 27;//IO3_3; + else if(id == (FAN_NUM + 1)) + gpio = 28;//IO3_4 + ret = pca9506_init_pin(gpio,gpio_in); + if(ret < 0) + return ret; + ret = pca9506_read_pin(gpio); + + } + + + return ret; +} + +//ret 1 failed, 0 OK +int getFanStatus(int id) +{ + unsigned char data; + //unsigned short value; + int ret = -1; + + if(id <0 || id >= FAN_NUM) + return ret; + + if(getCpuId() == PSOC_CTRL_SMBUS) + { + if(id % 2) {//front + ret = read_ram_from_cpld(FRONT_FAN_STATUS, &data); + //printf("getFanStatus, front: id=%d, data=%u, ret=%d\n", id, data, ret); + if(ret < 0) + return ret; + else + ret = (data >> (id / 2)) & 0x1; + }else { //rear + ret = read_ram_from_cpld(REAR_FAN_STATUS, &data); + if(ret < 0) + return ret; + else + ret = (data >> (id / 2)) & 0x1; + } + + } + else + { + if(id < FAN_NUM) //emc2305 fan controller + { + if((ret = getCtrlOfBus()) < 0) + return ret; + if((ret = enableChip(fan[id].emc_addr)) < 0) + return ret; + //ret = getFanPresent(id); + //if(ret < 0) + // return ret; + ret = chips_read_byte(fan[id].emc_addr, 0x25, &data); + if(ret < 0) + { + disableChip(fan[id].emc_addr); + return ret; + } + + if (((data >> (0x1 << id)) & 0x01) == 0x01) { + ret = 1; + } + disableChip(fan[id].emc_addr); + } + else + { + if((id == FAN_NUM)||(ret == (FAN_NUM + 1))) + { + ret = 0; + } + } + } + return ret; + +} + + +// 1 is F2B, 0 is B2F +int getFanAirflow(int id) +{ + + unsigned char data_io1, data_io2; + int ret = -1; + + if(getCpuId() == 0x01) + { + int off; + switch(id) + { + case 0: + case 1: + off = 0; + break; + case 2: + case 3: + off = 1; + break; + case 4: + case 5: + off = 2; + break; + case 6: + case 7: + off = 3; + break; + default: + ret = -1; + return ret; + } + + ret = read_ram_from_cpld(PSOC_9506PORT_RAM_BASE + 1, &data_io1); + if(ret < 0) + return -1; + + ret = read_ram_from_cpld(PSOC_9506PORT_RAM_BASE + 2, &data_io2); + if(ret < 0) + return -1; + + //printf("getFanAirflow: ret=%d, data_io1=%u, data_io2=%u\n", ret, data_io1, data_io2); + + if(off == 0) + ret = (data_io2 & 1) ? 1 : 0; + else if(off == 1) + ret = (data_io1 & (1 << 7)) ? 1 : 0; + else if(off == 2) + ret = (data_io2 & (1 << 3)) ? 1 : 0; + else if(off == 3) + ret = (data_io2 & (1 << 1)) ? 1 : 0; + else + ret = -1; + +#if 0 + if(id <= 7) + ret = read_cpld(CPLD_FAN_PRESENT, &data); + else + ret = read_cpld(CPLD_PSU_STATUS, &data); + + if(ret >= 0) + ret = (data >> off) & 0x1; +#endif + } + else + { + int gpio; + + if(id < FAN_NUM) + gpio = airFlowGpio[id>>1]; + else + return ret; + ret = pca9506_init_pin(gpio,gpio_in); + if(ret < 0) + return ret; + ret = pca9506_read_pin(gpio); + + } + + + return ret; +} + +//on_off 0 set let red/green led on, 1 off. color 0 green 1 red, 2 yellow +static int setFanLed(int id, unsigned char color, unsigned char on_off) +{ + + unsigned char data; + int ret = -1; + + if(getCpuId() == 0x01) + { + int off; + switch(id) + { + case 0: + case 1: + off = 0; + break; + case 2: + case 3: + off = 1; + break; + case 4: + case 5: + off = 2; + break; + case 6: + case 7: + off = 3; + break; + case 8: + off = 4; + break; + case 9: + off = 5; + break; + default: + ret = -1; + return ret; + } + if(id <= 7) + ret = read_cpld(CPLD_FAN_PRESENT, &data); + else + ret = read_cpld(CPLD_PSU_STATUS, &data); + if(ret >= 0) + ret = (data >> off) & 0x1; + } + else + { + int gpio; + gpio = (color == 0)?ledGpio[id>>1].green_gpio:ledGpio[id>>1].red_gpio; + ret = pca9506_init_pin(gpio,gpio_out); + if(ret < 0) + return ret; + ret = pca9506_write_pin(gpio,on_off); + + } + + + return ret; +} +int setFanLedGreen(int id) +{ + int ret = -1; + ret = setFanLed(id,red,1); + ret = setFanLed(id,green,0); + return ret; +} +int setFanLedRed(int id) +{ + int ret = -1; + ret = setFanLed(id,green,1); + ret = setFanLed(id,red,0); + return ret; +} +int setFanLedYellow(int id) +{ + int ret = -1; + ret = setFanLed(id,red,0); + ret = setFanLed(id,green,0); + return ret; +} +int setFanLedOff(int id) +{ + int ret = -1; + ret = setFanLed(id,red,1); + ret = setFanLed(id,green,1); + return ret; +} + +int setPsuLedOn(int id) +{ + int ret = -1; + unsigned char buf = 0x00; + ret = read_cpld(CPLD_FP_LED, &buf); + buf &= ~(1 << (2 + id)); + ret = write_cpld(CPLD_FP_LED, buf); + return ret; +} +int setPsuLedOff(int id) +{ + int ret = -1; + unsigned char buf = 0x00; + + ret = read_cpld(CPLD_FP_LED, &buf); + + buf |= 1 << (2 + id); + ret = write_cpld(CPLD_FP_LED, buf); + if (ret < 0) + { + printf("write error\n"); + return ret; + } + + return ret; + +} +int setSysLedOn() +{ + int ret = -1; + unsigned char buf = 0x00; + ret = read_cpld(CPLD_FP_LED, &buf); + buf &= ~(BIT0); + buf &= ~(BIT1);; + ret = write_cpld(CPLD_FP_LED, buf); + if (ret < 0) + { + printf("setSysLedOn error\n"); + return ret; + } + + return ret; + +} + +int +setSysLedOff() +{ + int ret = -1; + unsigned char buf = 0x00; + + ret = read_cpld(CPLD_FP_LED, &buf); + buf |= 0x11; + ret = write_cpld(CPLD_FP_LED, buf); + if (ret < 0) + { + printf("setSysLedOff error\n"); + return ret; + } + + return ret; + +} + + +static int FAN_PERIOD_TO_RPM(int x) +{ + if (x > (0xf5c2 >> 3)) /*<1000rpm, fan fail*/ + return 0; + + return 3932160 * 2 / x; +} + +int fanPwmGet(int id, int *pwm) +{ + unsigned char data; + unsigned short value; + int ret = -1; + + + if(getCpuId() == 0x01) + { + ret = read_ram_from_cpld(PSOC_PWM_RAM_REG, &data); + //printf("getWdFromCpldRam: ret=%d, data=%u\n", ret, data); + if(ret >= 0) + *pwm = (data * 100)/255; + //*speed = FAN_PERIOD_TO_RPM((*speed & 0x0FFFF)>> 3); + //*speed = FAN_PERIOD_TO_RPM(*speed >> 3); + } + else + { + if(id < FAN_NUM) //emc2305 fan controller + { + if((ret = getCtrlOfBus()) < 0) + return ret; + if((ret = enableChip(fan[id].emc_addr)) < 0) + return ret; + //ret = getFanPresent(id); + //if(ret < 0) + // return ret; + ret = chips_read_byte(fan[id].emc_addr, fan[id].driver_reg, &data);//pwm = speed*255/100 + if(ret < 0) + { + disableChip(fan[id].emc_addr); + return ret; + } + *pwm = (data * 100)/255; + disableChip(fan[id].emc_addr); + } + else + { + if(id == FAN_NUM)//psu fan + { + //unsigned short temp; + + ret = read_psu(0x58, PSU_PWM_REG, &value); + + + //ret = read_psu(0x58, PSU_PWM_REG, &temp); + if(ret < 0) + return ret; + *pwm = value; + } + else if(id == (FAN_NUM + 1)) + { + ret = read_psu(0x59, PSU_PWM_REG, &value); + if(ret < 0) + return ret; + *pwm = value; + } + + } + } + return ret; +} + +int fanSpeedGet(int id, int *speed) +{ + unsigned char data; + unsigned short value; + int ret = -1; + + if(getCpuId() == PSOC_CTRL_SMBUS) + { + if(id <= FAN_NUM - 1) { + ret = read_ram_from_cpld(FAN1_RAM_SPEED_LOW + id * 2 + 1, &data); + if(ret < 0) { + return ret; + } + + *speed = data << 8; + + ret = read_ram_from_cpld(FAN1_RAM_SPEED_LOW + id * 2, &data); + if(ret >= 0) { + *speed |= data ; + } else { + } + } else { + if ((ret = read_ram_short_from_cpld(PSU_RAM_FAN_SPEED_LOW(id-8), &value)) < 0) + return -1; + //*speed = value; + *speed = convert_linear((char *)&value)/100; + } + //*speed = FAN_PERIOD_TO_RPM((*speed & 0x0FFFF)>> 3); + //*speed = FAN_PERIOD_TO_RPM(*speed >> 3); + } + else + { + if(id < FAN_NUM) //emc2305 fan controller + { + if((ret = getCtrlOfBus()) < 0) + return ret; + if((ret = enableChip(fan[id].emc_addr)) < 0) + return ret; + //ret = getFanPresent(id); + //if(ret < 0) + // return ret; + ret = chips_read_byte(fan[id].emc_addr, fan[id].speed_reg, &data); + if(ret < 0) { + disableChip(fan[id].emc_addr); + return ret; + } + *speed = data << 8; + usleep(50000); + ret = chips_read_byte(fan[id].emc_addr, (fan[id].speed_reg+1), &data); + if(ret >= 0) + { + *speed |= data ; + } + //*speed = FAN_PERIOD_TO_RPM((*speed & 0x0FFFF)>> 3); + *speed = FAN_PERIOD_TO_RPM(*speed >> 3); + disableChip(fan[id].emc_addr); + } + else + { + if(id == FAN_NUM) + { + ret = read_psu(0x58, PSU_SPEED_REG, &value); + if(ret < 0) + return ret; + *speed = convert_linear((char *)&value)/100; + } + else if(id == (FAN_NUM + 1)) + { + ret = read_psu(0x59, PSU_SPEED_REG, &value); + if(ret < 0) + return ret; + *speed = convert_linear((char *)&value)/100; + } + } + } + return ret; +} +#define EMC2305_REG_FAN_DRIVE(n) (0x30 + 0x10 * n) +#define EMC2305_REG_FAN_MIN_DRIVE(n) (0x38 + 0x10 * n) +#define EMC2305_REG_FAN_TACH(n) (0x3E + 0x10 * n) + + +int fanInit() +{ + int ret = -1; + int id = 0; + unsigned char sys_fan_speed = 0x66; + + if(getCpuId() == PSOC_CTRL_SMBUS) + { + + //*speed = FAN_PERIOD_TO_RPM((*speed & 0x0FFFF)>> 3); + //*speed = FAN_PERIOD_TO_RPM(*speed >> 3); + } + else + { + for (id = 0; id < FAN_NUM; id++) { + if((ret = getCtrlOfBus()) < 0) + return ret; + if((ret = enableChip(fan[id].emc_addr)) < 0) + return ret; + + /* set minimum drive to 20% */ + ret = chips_write_byte(fan[id].emc_addr, (fan[id].driver_reg-0x30)/0x10+0x38, 0x33); + ret = chips_write_byte(fan[id].emc_addr, fan[id].driver_reg, sys_fan_speed); + if(ret < 0) + { + disableChip(fan[id].emc_addr); + return ret; + } + + disableChip(fan[id].emc_addr); + } + } + return ret; +} +//id 0-based +int fanSpeedSet(int id, unsigned short speed) +{ + int ret = -1; + + if(getCpuId() == PSOC_CTRL_SMBUS) + { + + //*speed = FAN_PERIOD_TO_RPM((*speed & 0x0FFFF)>> 3); + //*speed = FAN_PERIOD_TO_RPM(*speed >> 3); + } + else + { + if(id < FAN_NUM) //emc2305 fan controller + { + if((ret = getCtrlOfBus()) < 0) + return ret; + if((ret = enableChip(fan[id].emc_addr)) < 0) + return ret; + + ret = chips_write_byte(fan[id].emc_addr, fan[id].driver_reg, speed*255/100);//current_pwm_value*255/100 + if(ret < 0) + { + disableChip(fan[id].emc_addr); + return ret; + } + + disableChip(fan[id].emc_addr); + } + else + { + if(id == FAN_NUM)//psu fan + { + //unsigned short temp; + + ret = write_psu(0x58, PSU_PWM_REG, speed); + + //ret = read_psu(0x58, PSU_PWM_REG, &temp); + if(ret < 0) + return ret; + } + else if(id == (FAN_NUM + 1)) + { + ret = write_psu(0x59, PSU_PWM_REG, speed); + if(ret < 0) + return ret; + } + } + } + return ret; +} + + diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/i2c_chips.h b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/i2c_chips.h new file mode 100644 index 00000000..23bdc8ee --- /dev/null +++ b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/i2c_chips.h @@ -0,0 +1,225 @@ +#ifndef I2C_CHIPS_HH +#define I2C_CHIPS_HH + +/* PSU registers */ +#define PSU_STATUS_VOUT 0x7a +#define PSU_STATUS_IOUT 0x7b +#define PSU_STATUS_TEMP 0x7d + +#define PSU_READ_VIN 0x88 +#define PSU_READ_IIN 0x89 +#define PSU_READ_VOUT 0x8b +#define PSU_READ_IOUT 0x8c +#define PSU_READ_TEMP_1 0x8d +#define PSU_READ_POUT 0x96 +#define PSU_READ_PIN 0x97 +#define PSU_PWM_REG 0x3b +#define PSU_SPEED_REG 0x90 + +#define PSU_MFR_ID 0x99 // 7 byte +#define PSU_MFR_MODEL 0x9a // 14 byte +#define PSU_MFR_REVISION 0x9b // 5 byte +#define PSU_MFR_LOCATION 0x9c +#define PSU_MFR_DATE 0x9d +#define PSU_MFR_SERIAL 0x9e +#define PCA9506_IP0_REG 0x00 +#define PCA9506_IP1_REG 0x01 +#define PCA9506_IP2_REG 0x02 +#define PCA9506_IP3_REG 0x03 +#define PCA9506_IP4_REG 0x04 + +#define PCA9506_OP0_REG 0x08 +#define PCA9506_OP1_REG 0x09 +#define PCA9506_OP2_REG 0x0A +#define PCA9506_OP3_REG 0x0B +#define PCA9506_OP4_REG 0x0C + +#define PCA9506_PI0_REG 0x10 +#define PCA9506_PI1_REG 0x11 +#define PCA9506_PI2_REG 0x12 +#define PCA9506_PI3_REG 0x13 +#define PCA9506_PI4_REG 0x14 + +#define PCA9506_IOC0_REG 0x18 +#define PCA9506_IOC1_REG 0x19 +#define PCA9506_IOC2_REG 0x1A +#define PCA9506_IOC3_REG 0x1B +#define PCA9506_IOC4_REG 0x1C + +#define PCA9506_MSK0_REG 0x20 +#define PCA9506_MSK1_REG 0x21 +#define PCA9506_MSK2_REG 0x22 +#define PCA9506_MSK3_REG 0x23 +#define PCA9506_MSK4_REG 0x24 + +#define PCA9506_IO_INPUT 1 +#define PCA9506_IO_OUTPUT 0 + +#define PCA9506_IO_LOW 0 +#define PCA9506_IO_HIGH 1 +#define PCA9506_ADDR 0x20 + + + +struct psuInfo +{ + unsigned int vin; + unsigned int iin; + unsigned int vout; + unsigned int iout; + unsigned int pout; + unsigned int pin; + unsigned int temp; +}; + +struct chips_info +{ + char addr; + char sw_addr; + int channel; + char *name; +}; + +struct dev_info +{ + unsigned char dev_id; + char sw_addr; + int channel; + char *name; +}; + +struct fan_config +{ + char emc_addr; + char speed_reg; + char driver_reg; +}; +struct fan_cpld_reg +{ + unsigned short hight_byte_reg; + unsigned short low_byte_reg; +}; + + +struct ts_info +{ + char ts_addr; + char temp_reg; + char os_reg; +}; + +typedef enum +{ + gpio_in = 0, + gpio_out = 1 +} gpio_dir; + +typedef enum +{ + F2B= 0, + B2F = 1 +} fan_airflow; +typedef enum +{ + green = 0, + red = 1, + yellow = 1 +} gpio_color; +struct led_gpio +{ + int green_gpio; + int red_gpio; +}; + + +int getCtrlOfBus(void); +int enableChip(char addr); +int disableChip(char addr); + +int fanSpeedGet(int id, int *speed); +int fanSpeedSet(int id, unsigned short speed); +int fanPwmGet(int id, int *pwm); + +int tsTempGet(int id, short *temp); +int tsOsGet(int id, unsigned short *temp); +int getTsShutdown(int id); +int setTsShutdown(int id, int shutdown); +int getPsuInfo(int id, struct psuInfo * info); +int getWdFromCpldRam(unsigned char *val); +int getRxpSxpFlag(unsigned char *val); +//int getPsuPresStatus(int id); +int getPSoCVersion(unsigned char *val); +int getTempStatus(unsigned char *val); +unsigned char getCpuId(); +int openChannel(unsigned char dev_id); +int closeChannel(unsigned char dev_id); +int eeprom_enable(unsigned char dev_id); +int eeprom_disable(unsigned char dev_id); +int pca9506_init_pin(unsigned char port, gpio_dir val); +int pca9506_write_pin(unsigned char port, unsigned char val); +int pca9506_read_pin(unsigned char port); + +int fanInit(); +int getFanPresent(int id); +int getFanAirflow(int id); +int getFanStatus(int id); + +int setFanLedGreen(int id); +int setFanLedRed(int id); +int setFanLedYellow(int id); +int setFanLedOff(int id); +int setPsuLedOn(int id); +int setPsuLedOff(int id); +int setSysLedOn(); +int setSysLedOff(); + + +void watchdog_disable(); +/* watchdog timer must less than 1.2s */ +void watchdog_enable(); +void watchdog_service(); + + + +int read_psu(unsigned char addr, unsigned char reg, unsigned short *value); +int write_psu(unsigned char addr, unsigned char reg, unsigned short value); +int setPsuLedOff(int id); +int setPsuLedOn(int id); +int getPsuPresent(int id); + +int biosflash_enable(); +int biosflash_disable(); + + + +struct i2cMutex { + int init_flag; + pthread_mutex_t mutex; + pthread_cond_t lock_free; + volatile int is_locking; +}; + +#define NUM_CHIPS 10 +static const struct chips_info i2c_chips[NUM_CHIPS] = { + {0x50, 0x73, 2, "eeprom"}, + {0x4D, 0x73, 3, "emc2305_1"}, + {0x2E, 0x73, 3, "emc2305_2"}, + {0x58, 0x73, 0, "PSU_L"}, + {0x59, 0x73, 1, "PSU_R"}, + {0x48, 0x73, 4, "lm75_cpu"}, + {0x4E, 0x73, 5, "lm75_out"}, + {0x49, 0x71, 4, "lm75_in"}, + {0x4A, 0x71, 5, "lm75_sw"}, + {0x20, 0x73, 7, "pca9506"}, +}; + + +#ifdef L7_MAX_FANS_PER_UNIT +#define FAN_NUM L7_MAX_FANS_PER_UNIT +#else +#define FAN_NUM 8 +#endif + +#define FANGROUP_NUM 4 + +#endif diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/i2c_dev.c b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/i2c_dev.c new file mode 100644 index 00000000..cff2ef32 --- /dev/null +++ b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/i2c_dev.c @@ -0,0 +1,483 @@ +#include +#include +#include +#include +#include +#include +#include + +#include "i2c_dev.h" + +static int +i2c_write_2b(char addr, __u8 buf[2]) +{ + + int busNum = 1; + dataType type = LEN_BYTE; + int ret = -1; + unsigned char reg; + unsigned char data; + + reg = buf[0]; + data = buf[1]; + + ret = i2c_smbus_write(busNum, addr, reg, type, 1, &data); + return ret; +} + +static int +i2c_write_3b(char addr, __u8 buf[3]) +{ + int busNum = 1; + dataType type = LEN_WORD; + int ret = -1; + char data[2]; + + data[0] = buf[1]; + data[1] = buf[2]; + + ret = i2c_smbus_write(busNum, addr, buf[0], type, 1, (unsigned char *)&data); + + return ret; +} + +static inline int +i2c_smbus_access(int file, char read_write, __u8 command, + int size, union i2c_smbus_data *data) +{ + struct i2c_smbus_ioctl_data args; + int ret; + + args.read_write = read_write; + args.command = command; + args.size = size; + args.data = data; + + ret = ioctl(file, I2C_SMBUS, &args); + + return ret; +} + +static int +i2c_smbus_write_word_data(int file, __u8 command, + __u16 value) +{ + union i2c_smbus_data data; + data.word = value; + return i2c_smbus_access(file, I2C_SMBUS_WRITE, command, + I2C_SMBUS_WORD_DATA, &data); +} + +static int +i2c_smbus_write_byte_data(int file, __u8 command, + __u8 value) +{ + union i2c_smbus_data data; + data.byte = value; + return i2c_smbus_access(file, I2C_SMBUS_WRITE, command, + I2C_SMBUS_BYTE_DATA, &data); +} + +static int +i2c_smbus_read_byte(int file,__u8 *buf) +{ + union i2c_smbus_data data; + if (i2c_smbus_access(file,I2C_SMBUS_READ,0,I2C_SMBUS_BYTE,&data)) { + return -1; + } else { + *buf = 0x0FF & data.byte; + return 0; + } +} +static int +i2_smbus_read_only(int busNum, short addr, dataType type, + int size,__u8 *buf) +{ + int i; + int fd; + int ret = -1; + char fname[20]; + + sprintf(fname, "/dev/i2c-%d", busNum); + fd = open(fname, O_RDWR); + + if(fd < 0) + return ret; + + ret = ioctl(fd, I2C_SLAVE, addr); + + if(LEN_BYTE == type) { + for(i=0; i> 8) & 0x0FF; + buf[2*i] = val & 0x0FF; + } + } + close(fd); + return ret; +} + + + +int i2c_smbus_write_pec(int busNum, short addr, __u8 reg, dataType type, + int pec_flag, __u8 *buf) +{ + int fd; + int ret = -1; + short val; + char fname[20]; + + sprintf(fname, "/dev/i2c-%d", busNum); + fd = open(fname, O_RDWR); + + if(fd < 0) + return ret; + + ret = ioctl(fd, I2C_SLAVE, addr); + ret = ioctl(fd, I2C_PEC, pec_flag); + if(LEN_BYTE == type) { + ret = i2c_smbus_write_byte_data(fd, reg, buf[0]); + } else { + val = (((unsigned short)(buf[1])) << 8) | buf[0]; + //val = (((unsigned short)(buf[2*i])) << 8) | buf[2*i+1]; + ret = i2c_smbus_write_word_data(fd, reg, val); + } + close(fd); + return ret; +} + +int i2c_smbus_write_block_data(int busNum, short addr, __u8 command, + __u8 length, const __u8 *values) +{ + union i2c_smbus_data data; + int i; + int fd; + int ret = -1; + char fname[20]; + + if (length > 32) + length = 32; + for (i = 1; i <= length; i++) + data.block[i] = values[i-1]; + data.block[0] = length; + + + sprintf(fname, "/dev/i2c-%d", busNum); + fd = open(fname, O_RDWR); + + if(fd < 0) + return ret; + + ret = ioctl(fd, I2C_SLAVE, addr); + ret = ioctl(fd, I2C_PEC, 1); + + ret = i2c_smbus_access(fd,I2C_SMBUS_WRITE,command, + I2C_SMBUS_BLOCK_DATA, &data); + close(fd); + return ret; +} + +int i2c_smbus_read_16reg(int busNum, short addr, short reg, + int size, __u8 *buf) +{ + int i; + int fd; + int ret = -1; + char regNum[2]; + char fname[20]; + struct i2c_rdwr_ioctl_data ioctl_data; + struct i2c_msg msgs[2]; + + sprintf(fname, "/dev/i2c-%d", busNum); + fd = open(fname, O_RDWR); + if(fd < 0) + return ret; + + ret = ioctl(fd, I2C_SLAVE, addr); + + for(i=0; i> 8) & 0x0FF; + msgs[0].addr= addr; + msgs[0].len= 2; + msgs[0].buf= regNum; + msgs[1].addr= addr; + msgs[1].flags |= I2C_M_RD; + msgs[1].len= 1; + msgs[1].buf= (char *)&buf[i]; + ioctl_data.nmsgs= 2; + ioctl_data.msgs= msgs; + ret = ioctl(fd, I2C_RDWR, &ioctl_data); + if(ret) + break; + } + close(fd); + return ret; +} +//obsoleted +int i2c_smbus_write_16reg(int busNum, short addr, short reg, + int size, const __u8 *buf) +{ + int i; + int fd; + int ret = -1; + char wBuf[3]; + char fname[20]; + struct i2c_rdwr_ioctl_data ioctl_data; + struct i2c_msg msg; + + sprintf(fname, "/dev/i2c-%d", busNum); + fd = open(fname, O_RDWR); + + if(fd < 0) + return ret; + ret = ioctl(fd, I2C_SLAVE, addr); + + for(i=0; i> 8) & 0x0FF; + wBuf[2] = buf[i]; + msg.addr= addr; + msg.flags = 0; + msg.len= 3; + msg.buf= wBuf; + ioctl_data.nmsgs= 1; + ioctl_data.msgs= &msg; + ret = ioctl(fd, I2C_RDWR, &ioctl_data); + if(ret) + break; + } + close(fd); + return ret; +} + +int i2c_smbus_write_16reg_8byte(int busNum, short addr, short reg, + int size, const __u8 *buf) +{ + int i; + int fd; + int ret = -1; + char wBuf[10]; + char fname[20]; + struct i2c_rdwr_ioctl_data ioctl_data; + struct i2c_msg msg; + + sprintf(fname, "/dev/i2c-%d", busNum); + fd = open(fname, O_RDWR); + + if(fd < 0) + return ret; + + for(i=0; i> 8) & 0x0FF; + memcpy(&wBuf[2],&buf[i], 8); + msg.addr= addr; + msg.flags = 0; + msg.len= 10+1; + msg.buf= wBuf; + ioctl_data.nmsgs= 1; + ioctl_data.msgs= &msg; + ret = ioctl(fd, I2C_RDWR, &ioctl_data); + if(ret) + break; + } + close(fd); + return ret; +} + +int chips_read_byte(char addr, __u8 reg, __u8 *data) +{ + char busNum = 1; + dataType type = LEN_BYTE; + int ret = -1; + ret = i2_smbus_read(busNum, addr, reg, type, 1, data); + return ret; +} + +int chips_read_word(char addr, __u8 reg, unsigned short *data) +{ + int busNum = 1; + unsigned char buf[2]; + dataType type = LEN_WORD; + int ret = -1; + ret = i2_smbus_read(busNum, addr, reg, type, 1, buf); + if(ret >= 0) + { + *data = ((unsigned short)buf[1] << 8) | buf[0]; + } + return ret; +} + +int +chips_write_word(char addr, __u8 reg, unsigned short data) +{ + int busNum = 1; + dataType type = LEN_WORD; + int ret = -1; + unsigned char buf[2] = + { (data >> 8) & 0x00ff, data & 0x00ff}; + ret = i2c_smbus_write(busNum, addr, reg, type, 1, (unsigned char *)&buf); + //ret = i2c_smbus_write(busNum, addr, reg, type, 1, (char *)&data); + return ret; +} + +int +chips_write_word_pec(char addr, __u8 reg, unsigned short data, int pec_flag) +{ + int busNum = 1; + dataType type = LEN_WORD; + int ret = -1; + ret = i2c_smbus_write_pec(busNum, addr, reg, type, pec_flag, (unsigned char *)&data); + return ret; +} + +int +chips_write_block(char addr, __u8 reg, int byteCnt, unsigned char* wrData) +{ + int busNum = 1; + int ret = -1; + + ret = i2c_smbus_write_block_data(busNum, addr, reg, byteCnt, wrData); + return ret; +} + +int +chips_write_byte(char addr, __u8 reg, const __u8 data) +{ + int busNum = 1; + dataType type = LEN_BYTE; + int ret = -1; + ret = i2c_smbus_write(busNum, addr, reg, type, 1, (unsigned char *)&data); + return ret; +} + +int +i2c_smbus_write(int busNum, short addr, __u8 reg, dataType type, + int size, __u8 *buf) +{ + int i; + int fd; + int ret = -1; + short val; + char fname[20]; + + sprintf(fname, "/dev/i2c-%d", busNum); + fd = open(fname, O_RDWR); + if(fd < 0) + return ret; + + ret = ioctl(fd, I2C_SLAVE, addr); + if(LEN_BYTE == type) + { + for(i=0; i> 8) & 0x0ff, mem_addr & 0x0ff }; + ret = i2c_write_2b(addr, buf); + + if (ret < 0) + return ret; + ret = i2_smbus_read_only(busNum, addr, type, 1, data); + return ret; +} + +int +eeprom_write_byte(char addr, __u16 mem_addr, __u8 data) +{ + __u8 buf[3] = + { (mem_addr >> 8) & 0x00ff, mem_addr & 0x00ff, data }; + return i2c_write_3b(addr, buf); +} + diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/i2c_dev.h b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/i2c_dev.h new file mode 100644 index 00000000..0262e6e5 --- /dev/null +++ b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/i2c_dev.h @@ -0,0 +1,158 @@ +#ifndef I2C_DEV_HH +#define I2C_DEV_HH + +#include +#include + +typedef enum data_len +{ + LEN_BYTE, + LEN_WORD, +}dataType; + +/* ----- commands for the ioctl like i2c_command call: + * note that additional calls are defined in the algorithm and hw + * dependent layers - these can be listed here, or see the + * corresponding header files. + */ + /* -> bit-adapter specific ioctls */ +#define I2C_RETRIES 0x0701 /* number of times a device address */ + /* should be polled when not */ + /* acknowledging */ +#define I2C_TIMEOUT 0x0702 /* set timeout - call with int */ + + +/* this is for i2c-dev.c */ +#define I2C_SLAVE 0x0703 /* Change slave address */ + /* Attn.: Slave address is 7 or 10 bits */ +#define I2C_SLAVE_FORCE 0x0706 /* Change slave address */ + /* Attn.: Slave address is 7 or 10 bits */ + /* This changes the address, even if it */ + /* is already taken! */ +#define I2C_TENBIT 0x0704 /* 0 for 7 bit addrs, != 0 for 10 bit */ + +#define I2C_FUNCS 0x0705 /* Get the adapter functionality */ +#define I2C_RDWR 0x0707 /* Combined R/W transfer (one stop only)*/ +#define I2C_PEC 0x0708 /* != 0 for SMBus PEC */ + +#define I2C_SMBUS 0x0720 /* SMBus-level access */ + +/* smbus_access read or write markers */ +#define I2C_SMBUS_READ 1 +#define I2C_SMBUS_WRITE 0 + +/* + * I2C Message - used for pure i2c transaction, also from /dev interface + */ +struct i2c_msg { + __u16 addr; /* slave address */ + unsigned short flags; +#define I2C_M_TEN 0x10 /* we have a ten bit chip address */ +#define I2C_M_RD 0x01 +#define I2C_M_NOSTART 0x4000 +#define I2C_M_REV_DIR_ADDR 0x2000 +#define I2C_M_IGNORE_NAK 0x1000 +#define I2C_M_NO_RD_ACK 0x0800 + short len; /* msg length */ + char *buf; /* pointer to msg data */ +}; + +/* To determine what functionality is present */ + +#define I2C_FUNC_I2C 0x00000001 +#define I2C_FUNC_10BIT_ADDR 0x00000002 +#define I2C_FUNC_PROTOCOL_MANGLING 0x00000004 /* I2C_M_{REV_DIR_ADDR,NOSTART,..} */ +#define I2C_FUNC_SMBUS_PEC 0x00000008 +#define I2C_FUNC_SMBUS_BLOCK_PROC_CALL 0x00008000 /* SMBus 2.0 */ +#define I2C_FUNC_SMBUS_QUICK 0x00010000 +#define I2C_FUNC_SMBUS_READ_BYTE 0x00020000 +#define I2C_FUNC_SMBUS_WRITE_BYTE 0x00040000 +#define I2C_FUNC_SMBUS_READ_BYTE_DATA 0x00080000 +#define I2C_FUNC_SMBUS_WRITE_BYTE_DATA 0x00100000 +#define I2C_FUNC_SMBUS_READ_WORD_DATA 0x00200000 +#define I2C_FUNC_SMBUS_WRITE_WORD_DATA 0x00400000 +#define I2C_FUNC_SMBUS_PROC_CALL 0x00800000 +#define I2C_FUNC_SMBUS_READ_BLOCK_DATA 0x01000000 +#define I2C_FUNC_SMBUS_WRITE_BLOCK_DATA 0x02000000 +#define I2C_FUNC_SMBUS_READ_I2C_BLOCK 0x04000000 /* I2C-like block xfer */ +#define I2C_FUNC_SMBUS_WRITE_I2C_BLOCK 0x08000000 /* w/ 1-byte reg. addr. */ + +#define I2C_FUNC_SMBUS_BYTE (I2C_FUNC_SMBUS_READ_BYTE | \ + I2C_FUNC_SMBUS_WRITE_BYTE) +#define I2C_FUNC_SMBUS_BYTE_DATA (I2C_FUNC_SMBUS_READ_BYTE_DATA | \ + I2C_FUNC_SMBUS_WRITE_BYTE_DATA) +#define I2C_FUNC_SMBUS_WORD_DATA (I2C_FUNC_SMBUS_READ_WORD_DATA | \ + I2C_FUNC_SMBUS_WRITE_WORD_DATA) +#define I2C_FUNC_SMBUS_BLOCK_DATA (I2C_FUNC_SMBUS_READ_BLOCK_DATA | \ + I2C_FUNC_SMBUS_WRITE_BLOCK_DATA) +#define I2C_FUNC_SMBUS_I2C_BLOCK (I2C_FUNC_SMBUS_READ_I2C_BLOCK | \ + I2C_FUNC_SMBUS_WRITE_I2C_BLOCK) + +/* Old name, for compatibility */ +#define I2C_FUNC_SMBUS_HWPEC_CALC I2C_FUNC_SMBUS_PEC + +/* + * Data for SMBus Messages + */ +#define I2C_SMBUS_BLOCK_MAX 32 /* As specified in SMBus standard */ +#define I2C_SMBUS_I2C_BLOCK_MAX 32 /* Not specified but we use same structure */ + +union i2c_smbus_data { + __u8 byte; + __u16 word; + __u8 block[I2C_SMBUS_BLOCK_MAX + 2]; /* block[0] is used for length */ + /* and one more for PEC */ +}; + +/* SMBus transaction types (size parameter in the above functions) + Note: these no longer correspond to the (arbitrary) PIIX4 internal codes! */ +#define I2C_SMBUS_QUICK 0 +#define I2C_SMBUS_BYTE 1 +#define I2C_SMBUS_BYTE_DATA 2 +#define I2C_SMBUS_WORD_DATA 3 +#define I2C_SMBUS_PROC_CALL 4 +#define I2C_SMBUS_BLOCK_DATA 5 +#define I2C_SMBUS_I2C_BLOCK_BROKEN 6 +#define I2C_SMBUS_BLOCK_PROC_CALL 7 /* SMBus 2.0 */ +#define I2C_SMBUS_I2C_BLOCK_DATA 8 + + +/* This is the structure as used in the I2C_SMBUS ioctl call */ +struct i2c_smbus_ioctl_data { + __u8 read_write; + __u8 command; + __u32 size; + union i2c_smbus_data *data; +}; + +/* This is the structure as used in the I2C_RDWR ioctl call */ +struct i2c_rdwr_ioctl_data { + struct i2c_msg *msgs; /* pointers to i2c_msgs */ + __u32 nmsgs; /* number of i2c_msgs */ +}; + +int i2_smbus_read(int busNum, short addr, __u8 reg, dataType type, + int size, __u8 *buf); +int i2c_smbus_write(int busNum, short addr, __u8 reg, dataType type, + int size, __u8 *buf); +int i2c_smbus_write_pec(int busNum, short addr, __u8 reg, dataType type, + int pec_flag, __u8 *buf); +int chips_write_block(char addr, __u8 reg, int byteCnt, unsigned char* wrData); + +int i2c_smbus_read_16reg(int busNum, short addr, short reg, + int size, __u8 *buf); +int i2c_smbus_write_16reg(int busNum, short addr, short reg, + int size, const __u8 *buf); +int i2c_smbus_write_16reg_8byte(int busNum, short addr, short reg, + int size, const __u8 *buf); +int chips_read_byte(char addr, __u8 reg, __u8 *data); +int chips_write_byte(char addr, __u8 reg, const __u8 data); +int chips_read_word(char addr, __u8 reg, unsigned short *data); +int chips_write_word(char addr, __u8 reg, unsigned short data); +int chips_write_word_pec(char addr, __u8 reg, unsigned short data, int pec_flag); + + +int eeprom_read_byte(char addr, __u16 mem_addr, __u8 *data); +int eeprom_write_byte(char addr, __u16 mem_addr, __u8 data); + +#endif diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/ledi.c b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/ledi.c new file mode 100644 index 00000000..63a05210 --- /dev/null +++ b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/ledi.c @@ -0,0 +1,141 @@ +#include +#include +#include +#include +#include + +#include "i2c_chips.h" +#include "platform.h" + +/* + * Get the information for the given LED OID. + */ +static onlp_led_info_t led_info[] = +{ + { + { ONLP_LED_ID_CREATE(LED_SYSTEM), "Chassis System LED(DIAG LED)", 0 }, + ONLP_LED_STATUS_PRESENT, + ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_ORANGE | ONLP_LED_CAPS_GREEN, + }, + { + { ONLP_LED_ID_CREATE(LED_FAN_1), "Chassis FAN(1) LED", 0 }, + ONLP_LED_STATUS_PRESENT, + ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_ORANGE | ONLP_LED_CAPS_GREEN | ONLP_LED_CAPS_AUTO, + }, + { + { ONLP_LED_ID_CREATE(LED_FAN_2), "Chassis FAN(2) LED", 0 }, + ONLP_LED_STATUS_PRESENT, + ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_ORANGE | ONLP_LED_CAPS_GREEN | ONLP_LED_CAPS_AUTO, + }, + { + { ONLP_LED_ID_CREATE(LED_FAN_3), "Chassis FAN(3) LED", 0 }, + ONLP_LED_STATUS_PRESENT, + ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_ORANGE | ONLP_LED_CAPS_GREEN | ONLP_LED_CAPS_AUTO, + }, + { + { ONLP_LED_ID_CREATE(LED_FAN_4), "Chassis FAN(4) LED", 0 }, + ONLP_LED_STATUS_PRESENT, + ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_ORANGE | ONLP_LED_CAPS_GREEN | ONLP_LED_CAPS_AUTO, + }, + { + { ONLP_LED_ID_CREATE(LED_FAN_5), "Chassis FAN(5) LED", 0 }, + ONLP_LED_STATUS_PRESENT, + ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_ORANGE | ONLP_LED_CAPS_GREEN | ONLP_LED_CAPS_AUTO, + }, + { + { ONLP_LED_ID_CREATE(LED_FAN_6), "Chassis FAN(6) LED", 0 }, + ONLP_LED_STATUS_PRESENT, + ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_ORANGE | ONLP_LED_CAPS_GREEN | ONLP_LED_CAPS_AUTO, + }, + { + { ONLP_LED_ID_CREATE(LED_FAN_7), "Chassis FAN(7) LED", 0 }, + ONLP_LED_STATUS_PRESENT, + ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_ORANGE | ONLP_LED_CAPS_GREEN | ONLP_LED_CAPS_AUTO, + }, + { + { ONLP_LED_ID_CREATE(LED_FAN_8), "Chassis FAN(8) LED", 0 }, + ONLP_LED_STATUS_PRESENT, + ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_ORANGE | ONLP_LED_CAPS_GREEN | ONLP_LED_CAPS_AUTO, + }, + { + { ONLP_LED_ID_CREATE(LED_PSU_1), "Chassis PSU(1) LED", 0 }, + ONLP_LED_STATUS_PRESENT, + ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_ORANGE | ONLP_LED_CAPS_GREEN | ONLP_LED_CAPS_AUTO, + }, + { + { ONLP_LED_ID_CREATE(LED_PSU_2), "Chassis PSU(2) LED", 0 }, + ONLP_LED_STATUS_PRESENT, + ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_ORANGE | ONLP_LED_CAPS_GREEN | ONLP_LED_CAPS_AUTO, + } +}; + +int +onlp_ledi_init(void) +{ + return ONLP_STATUS_OK; +} + +int +onlp_ledi_info_get(onlp_oid_t id, onlp_led_info_t* info) +{ + + int led_id; + + led_id = ONLP_OID_ID_GET(id) - 1; + + *info = led_info[led_id]; + info->status |= ONLP_LED_STATUS_ON; + info->mode |= ONLP_LED_MODE_ON; + + return ONLP_STATUS_OK; +} + +int +onlp_ledi_set(onlp_oid_t id, int on_or_off) +{ + if (!on_or_off) + return onlp_ledi_mode_set(id, ONLP_LED_MODE_OFF); + else + return onlp_ledi_mode_set(id, ONLP_LED_MODE_ON); +} + +int +onlp_ledi_mode_set(onlp_oid_t id, onlp_led_mode_t mode) +{ + int led_id, psu; + + led_id = ONLP_OID_ID_GET(id) - 1; + switch (led_id) { + case LED_SYSTEM: + if (mode == ONLP_LED_MODE_OFF) + setSysLedOff(); + else + setSysLedOn(); + break; + case LED_FAN_1: + case LED_FAN_2: + case LED_FAN_3: + case LED_FAN_4: + case LED_FAN_5: + case LED_FAN_6: + case LED_FAN_7: + case LED_FAN_8: + if (mode == ONLP_LED_MODE_OFF) + setFanLedOff(led_id); + else + setFanLedGreen(led_id); + break; + case LED_PSU_1: + case LED_PSU_2: + psu = led_id - LED_PSU_1; + if (mode == ONLP_LED_MODE_OFF) + setPsuLedOn(psu); + else + setPsuLedOff(psu); + break; + default: + return ONLP_STATUS_E_INTERNAL; + break; + } + return ONLP_STATUS_OK; +} diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/make.mk b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/make.mk new file mode 100644 index 00000000..d7345b17 --- /dev/null +++ b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/make.mk @@ -0,0 +1,9 @@ +############################################################################### +# +# +# +############################################################################### + +LIBRARY := x86_64_cel_redstone_xp +$(LIBRARY)_SUBDIR := $(dir $(lastword $(MAKEFILE_LIST))) +include $(BUILDER)/lib.mk diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/platform.h b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/platform.h new file mode 100644 index 00000000..d215ff20 --- /dev/null +++ b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/platform.h @@ -0,0 +1,28 @@ +#ifndef CPLD_H +#define CPLD_H + +#define FAN_COUNT 10 +#define PSU_FAN 8 +#define THERMAL_COUNT 6 +#define LED_COUNT 11 + +#define THERMAL_MAIN_BOARD_REAR 0 +#define THERMAL_BCM 1 +#define THERMAL_CPU 2 +#define THERMAL_MAIN_BOARD_FRONT 3 +#define THERMAL_PSU1 4 +#define THERMAL_PSU2 5 + +#define LED_SYSTEM 0 +#define LED_FAN_1 1 +#define LED_FAN_2 2 +#define LED_FAN_3 3 +#define LED_FAN_4 4 +#define LED_FAN_5 5 +#define LED_FAN_6 6 +#define LED_FAN_7 7 +#define LED_FAN_8 8 +#define LED_PSU_1 9 +#define LED_PSU_2 10 + +#endif diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/psui.c b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/psui.c new file mode 100644 index 00000000..a3f426cc --- /dev/null +++ b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/psui.c @@ -0,0 +1,50 @@ +#include + +#include "i2c_chips.h" +#include "platform.h" + +static +onlp_psu_info_t psu_info[] = +{ + { + { ONLP_PSU_ID_CREATE(1), "PSU-1", 0 }, + }, + { + { ONLP_PSU_ID_CREATE(2), "PSU-2", 0 }, + } +}; + +int +onlp_psui_init(void) +{ + return ONLP_STATUS_OK; +} + +int +onlp_psui_info_get(onlp_oid_t id, onlp_psu_info_t* info) +{ + int psu_id; + struct psuInfo psu; + + psu_id = ONLP_OID_ID_GET(id) - 1; + *info = psu_info[psu_id]; + + if (!getPsuPresent(psu_id)) + info->status |= ONLP_PSU_STATUS_PRESENT; + else + return ONLP_STATUS_E_MISSING; + + getPsuInfo(psu_id, &psu); + + info->mvin = psu.vin; + info->mvout = psu.vout; + info->miin = psu.iin; + info->miout = psu.iout; + info->mpin = psu.pin; + info->mpout = psu.pout; + + if (!(info->mpin)) + info->status |= ONLP_PSU_STATUS_UNPLUGGED; + + return ONLP_STATUS_OK; +} diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/sfp_xfp.h b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/sfp_xfp.h new file mode 100644 index 00000000..2d51782c --- /dev/null +++ b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/sfp_xfp.h @@ -0,0 +1,294 @@ +#ifndef INCLUDE_SFP_XFP +#define INCLUDE_SFP_XFP + +/* SFP I2C parameters start here */ +/* 0xA0 */ +#define SFP_REVISION_ADDR 56 +#define SFP_REVISION_SIZE 1 +#define SFP_DIAGMODE_ADDR 92 +#define SFP_DIAGMODE_SIZE 1 +#define SFP_COMPLIANCE_ADDR 94 +#define SFP_COMPLIANCE_SIZE 1 +#define SFP_COMPLIANCE_NONE 0 +#define SFP_OPTIONS_ADDR 65 +#define SFP_OPTIONS_SIZE 1 +#define SFP_DIAGMODE_EXTERNAL_CALIBRATION_MASK 0x10 /* bit 4 */ +#define SFP_TX_FAULT_SUPPORT_MASK (1<<3) /* Table 3.7, Options, byte 65, bit 3 */ +#define SFP_TX_FAULT_MASK (1<<2) /* Table 3.17, A/D Values and Status Bits, byte 110, bit 2 */ +#define SFP_LOS_MASK (1<<1) /* Table 3.17, A/D Values and Status Bits, byte 110, bit 1 */ +#define SFP_RX_POWER_PHANTOM_READ 0 + +/* 0xA2 */ +/* Calibration constants */ +#define SFP_RX_PWR4_ADDR 56 +#define SFP_RX_PWR4_SIZE 4 +#define SFP_RX_PWR3_ADDR 60 +#define SFP_RX_PWR3_SIZE 4 +#define SFP_RX_PWR2_ADDR 64 +#define SFP_RX_PWR2_SIZE 4 +#define SFP_RX_PWR1_ADDR 68 +#define SFP_RX_PWR1_SIZE 4 +#define SFP_RX_PWR0_ADDR 72 +#define SFP_RX_PWR0_SIZE 4 +#define SFP_TX_CURRENT_SLOPE_ADDR 76 +#define SFP_TX_CURRENT_SLOPE_SIZE 2 +#define SFP_TX_CURRENT_OFFSET_ADDR 78 +#define SFP_TX_CURRENT_OFFSET_SIZE 2 +#define SFP_TX_POWER_SLOPE_ADDR 80 +#define SFP_TX_POWER_SLOPE_SIZE 2 +#define SFP_TX_POWER_OFFSET_ADDR 82 +#define SFP_TX_POWER_OFFSET_SIZE 2 +#define SFP_T_SLOPE_ADDR 84 +#define SFP_T_SLOPE_SIZE 2 +#define SFP_T_OFFSET_ADDR 86 +#define SFP_T_OFFSET_SIZE 2 +#define SFP_V_SLOPE_ADDR 88 +#define SFP_V_SLOPE_SIZE 2 +#define SFP_V_OFFSET_ADDR 90 +#define SFP_V_OFFSET_SIZE 2 + +/* 0xAC */ +/* Registers (0-31) */ +#define SFP_COPPER_PHY_CNTRL 0 /* Control Register */ +#define SFP_COPPER_PHY_STATUS 1 /* Status Register */ +#define SFP_COPPER_PHY_ID0 2 /* PHY Identifier */ +#define SFP_COPPER_PHY_ID1 3 /* PHY Identifier */ +#define SFP_COPPER_PHY_SPEC_STATUS 17 /* PHY Specific Status Register */ +#define SFP_COPPER_PHY_EXT_ADDR 22 /* Extended Address for Cable Diagnostic Reg */ +#define SFP_COPPER_PHY_CABLE_DIAG 28 /* GE interface Cable Diagnostic Registers */ +#define SFP_COPPER_PHY_REG29 29 /* Reg. 29 */ +#define SFP_COPPER_PHY_REG30 30 /* Reg. 30 */ +#define SFP_COPPER_PHY_REG31 31 /* Reg. 31 */ + +#define SFP_COPPER_PHY_OUI 0x0141 +#define SFP_COPPER_PHY_MODEL_MASK 0x03F0 + +#define SFP_IF_ERROR_RETURN(op) do { int __rc__; if ((__rc__ = (op)) < 0) return(L7_FAILURE); } while(0) + +/********************************************************************* +* In addition to the hardware specs, please see Application Note AN-2030 +* available from FINISAR. +*********************************************************************/ +#define SFP_XFP_FINISAR_OUI 0x009065 +#define SFP_XFP_TYPE_ADDR 0 +#define SFP_XFP_TYPE_SFP 0x03 +#define SFP_XFP_TYPE_SFP_PLUS 0x03 +#define SFP_XFP_TYPE_XFP 0x06 +#define SFP_XFP_TEMPERATURE_ADDR 96 +#define SFP_XFP_TEMPERATURE_SIZE 2 +#define SFP_XFP_VOLTAGE_ADDR 98 +#define SFP_XFP_VOLTAGE_SIZE 2 +#define SFP_XFP_CURRENT_ADDR 100 +#define SFP_XFP_CURRENT_SIZE 2 +#define SFP_XFP_TX_POWER_ADDR 102 +#define SFP_XFP_TX_POWER_SIZE 2 +#define SFP_XFP_RX_POWER_ADDR 104 +#define SFP_XFP_RX_POWER_SIZE 2 +#define SFP_XFP_LOS_ADDR 110 +#define SFP_XFP_LOS_SIZE 1 + +#define SFP_VENDOR_NAME_ADDR 20 +#define SFP_VENDOR_OUI_ADDR 37 +#define SFP_VENDOR_OUI_SIZE 3 +#define SFP_VENDOR_PN_ADDR 40 +#define SFP_VENDOR_REV_ADDR 56 +#define SFP_VENDOR_SN_ADDR 68 +#define SFP_VENDOR_DATE_ADDR 84 +#define SFP_VENDOR_DATE_SIZE 8 +#define SFP_NOMINAL_SIG_RATE_ADDR 12 +#define SFP_NOMINAL_SIG_RATE_SIZE 1 +#define SFP_LINK_LENGTH_50UM_ADDR 16 +#define SFP_LINK_LENGTH_50UM_SIZE 1 +#define SFP_LINK_LENGTH_62_5UM_ADDR 17 +#define SFP_LINK_LENGTH_62_5UM_SIZE 1 +#define SFP_WAVELENGTH_ADDR 60 +#define SFP_WAVELENGTH_SIZE 2 +#define SFP_DAC_LENGTH_ADDR 18 +#define SFP_DAC_LENGTH_SIZE 1 + + +#define QSFP_ADDRESS_DELTA 128 +#define QSFP_TEMPERATURE_ADDR 22 +#define QSFP_VOLTAGE_ADDR 26 +#define QSFP_TX_FAULT_ADDR 4 +#define QSFP_LOS_ADDR 3 +#define QSFP_RX_POWER_ADDR 34 +#define QSFP_TX_POWER_ADDR 42 +#define QSFP_VENDOR_NAME_ADDR 148 +#define QSFP_VENDOR_NAME_SIZE 16 +#define QSFP_VENDOR_PN_ADDR 168 +#define QSFP_VENDOR_PN_SIZE 16 +#define QSFP_VENDOR_SN_ADDR 196 +#define QSFP_VENDOR_SN_SIZE 16 +#define QSFP_VENDOR_REV_ADDR 184 +#define QSFP_VENDOR_REV_SIZE 2 +#define QSFP_NOMINAL_SIG_RATE_ADDR 140 +#define QSFP_NOMINAL_SIG_RATE_SIZE 1 +#define QSFP_LINK_LENGTH_50UM_ADDR 144 +#define QSFP_LINK_LENGTH_50UM_SIZE 1 +#define QSFP_LINK_LENGTH_62_5UM_ADDR 145 +#define QSFP_LINK_LENGTH_62_5UM_SIZE 1 +#define QSFP_WAVELENGTH_ADDR 186 +#define QSFP_WAVELENGTH_SIZE 2 +#define QSFP_DAC_LENGTH_ADDR 146 +#define QSFP_DAC_LENGTH_SIZE 1 +#define QSFP_ETHERNET_COMPLIANCE_ADDR 131 +#define QSFP_ETHERNET_COMPLIANCE_SIZE 1 + +/* + * SFF Committee + * SFF-8436 Specification + * QSFP+ 10 Gbs 4X PLUGGABLE TRANSCEIVER + * Rev 4.5 January 7, 2013 + * + * Table 33, Address 131 Bits + */ +#define QSFP_ETHERNET_COMPLIANCE_RESERVED (1 << 7) +#define QSFP_ETHERNET_COMPLIANCE_10GBASE_LRM (1 << 6) +#define QSFP_ETHERNET_COMPLIANCE_10GBASE_LR (1 << 5) +#define QSFP_ETHERNET_COMPLIANCE_10GBASE_SR (1 << 4) +#define QSFP_ETHERNET_COMPLIANCE_40GBASE_CR4 (1 << 3) +#define QSFP_ETHERNET_COMPLIANCE_40GBASE_SR4 (1 << 2) +#define QSFP_ETHERNET_COMPLIANCE_40GBASE_LR4 (1 << 1) +#define QSFP_ETHERNET_COMPLIANCE_40GACTIVE (1 << 0) +/* +SFF Committee +INF-8077i +10 Gigabit Small Form Factor Pluggable Module +Revision 4.5 August 31, 2005 +*/ + +#define XFP_AUX1_ADDR 106 +#define XFP_AUX2_ADDR 108 +#define XFP_AUX_CONFIG 222 +#define XFP_AUX_SIZE 2 +#define XFP_PAGE_SELECT 127 +/* from table 59 of INF-8077i */ +#define XFP_AUX_INPUT_NONE 0 +#define XFP_AUX_INPUT_BIAS_VOLTAGE 1 +#define XFP_AUX_INPUT_TEC_CURRENT 3 +#define XFP_AUX_INPUT_LASER_TEMP 4 +#define XFP_AUX_INPUT_LASER_WAVE 5 +#define XFP_AUX_INPUT_5_VOLTAGE 6 +#define XFP_AUX_INPUT_3_3_VOLTAGE 7 +#define XFP_AUX_INPUT_1_8_VOLTAGE 8 +#define XFP_AUX_INPUT_MASK 0xF +#define XFP_FAULT_ADDR 111 +#define XFP_FAULT_SIZE 1 +#define XFP_TX_FAULT_MASK (1<<6) /* Table 42 General Control/Status Bits, byte 111, bit 6 */ + +#define XFP_VENDOR_NAME_ADDR 148 +#define XFP_VENDOR_NAME_SIZE 15 +#define XFP_VENDOR_PN_ADDR 168 +#define XFP_VENDOR_PN_SIZE 16 +#define XFP_VENDOR_SN_ADDR 196 +#define XFP_VENDOR_SN_SIZE 16 +#define XFP_VENDOR_DATE_ADDR 212 +#define XFP_VENDOR_DATE_SIZE 8 +#define XFP_VENDOR_OUI_ADDR 165 +#define XFP_VENDOR_OUI_SIZE 3 +#define XFP_VENDOR_REV_ADDR 184 +#define XFP_VENDOR_REV_SIZE 2 + +/* Validation of the modules in the hpcIsValidXxx() routine */ +/* Controls wheter the hpcIsValidXxx() actually tries to read the */ +/* xFP signature from the pluggable module. */ +#define SFP_VALIDATE_MODULE 0 +#define XFP_VALIDATE_MODULE 1 +#define SFP_SFPPLUS_VALIDATE_MODULE 1 + + +#define SFF8472_ID_ADDR 0 +#define SFF8472_EXT_ID_ADDR 1 +#define SFF8472_10G_COMPLIANCE_ADDR 3 +#define SFF8472_ETHERNET_COMPLIANCE_ADDR 6 +#define SFF8472_SFPPLUS_CABLE_TECH_ADDR 8 +#define SFF8472_BIT_RATE_ADDR 12 + + +#define SFF8472_DIAG_MON_TYPE_ADDR 92 +#define SFF8472_DIAG_MON_TYPE_SIZE 1 +#define SFF8472_COMPLIANCE_ADDR 94 +#define SFF8472_COMPLIANCE_SIZE 1 + +#define SFF8436_COMPLIANCE_ADDR 131 +#define SFF8436_COMPLIANCE_SIZE 1 + +#define SFF8436_40G_ACTIVE (1 << 0) +#define SFF8436_40G_BASE_LR4 (1 << 1) +#define SFF8436_40G_BASE_SR4 (1 << 2) +#define SFF8436_40G_BASE_CR4 (1 << 3) +#define SFF8436_10G_BASE_SR (1 << 4) +#define SFF8436_10G_BASE_LR (1 << 5) +#define SFF8436_10G_BASE_LRM (1 << 6) + + +#define SFF8472_COMPLIANCE_NONE (0x0) +#define SFF8472_DIGITAL_DIAG_IMPLEMENTED (0x1 << 6) + +#define SFF8472_SFP_ID (0x03) +#define SFF8472_SFP_EXT_ID (0x04) +#define SFF8472_XFP_ID (0x06) +#define SFF8436_QSFP_PLUS_ID (0x0d) + +#define SFF8472_10G_BASE_ER (1<<7) +#define SFF8472_10G_BASE_LRM (1<<6) +#define SFF8472_10G_BASE_LR (1<<5) +#define SFF8472_10G_BASE_SR (1<<4) + +#define SFF8472_10G_BASE (SFF8472_10G_BASE_ER | \ + SFF8472_10G_BASE_LRM | \ + SFF8472_10G_BASE_LR | \ + SFF8472_10G_BASE_SR ) + +#define SFF8472_10G_SPEED (0x64) + +#define SFF8472_100M_BASE_FX (1 << 5) +#define SFF8472_100M_BASE_LX (1 << 4) +#define SFF8472_1G_BASE_T (1<<3) +#define SFF8472_1G_BASE_CX (1<<2) +#define SFF8472_1G_BASE_LX (1<<1) +#define SFF8472_1G_BASE_SX (1) + +#define SFF8472_1G_BASE (SFF8472_1G_BASE_T | \ + SFF8472_1G_BASE_CX | \ + SFF8472_1G_BASE_LX | \ + SFF8472_1G_BASE_SX ) + +#define SFF8472_100M_BASE (SFF8472_100M_BASE_FX | SFF8472_100M_BASE_LX) + +#define SFF8431_COMPLIANCE (1<<0) +#define SFF8431_LIMITED_COMPLIANCE (1<<2) +#define SFF8431_APPENDIX_E_COMPLIANCE (1<<0) + +#define SFPPLUS_ACTIVE_CABLE (1<<3) +#define SFPPLUS_PASSIVE_CABLE (1<<2) + +#define SFPPLUS_CABLE_TECH (SFPPLUS_ACTIVE_CABLE | \ + SFPPLUS_PASSIVE_CABLE ) + + +#define TRANSCEIVER_NOT_PRESENT (0) +#define TRANSCEIVER_TYPE_100M (1) +#define TRANSCEIVER_TYPE_1G (2) +#define TRANSCEIVER_TYPE_10G (3) +#define TRANSCEIVER_TYPE_QSFP (4) +#define TRANSCEIVER_TYPE_XFP (5) +#define TRANSCEIVER_TYPE_INVALID (6) + +#if L7_FEAT_SFP_QUALIFICATION +extern L7_RC_t hpcSfpOpticQualify(L7_uint32 slot, L7_uint32 port); +#define HPC_SFP_OPTICS_QUALIFY(slot,port) hpcSfpOpticQualify(slot,port) +#else +#define HPC_SFP_OPTICS_QUALIFY(slot,port) L7_NOT_SUPPORTED +#endif + +#define HPC_SFP_CUST_WAVELENGTH_READ(slot, port, wavelength) L7_NOT_SUPPORTED +#define HPC_SFP_CUST_DATARATE_READ(slot, port, dataRate) L7_NOT_SUPPORTED +#define HPC_SFP_CUST_OPTIC_MEDIA_TYPE_GET(slot, port, opticType) L7_NOT_SUPPORTED + +#ifdef INCLUDE_SFP_XFP_OVERRIDES +#include "sfp_xfp_overrides.h" +#endif + +#endif /* INCLUDE_SFP_XFP */ diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/sfpi.c b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/sfpi.c new file mode 100644 index 00000000..5f0ed0d8 --- /dev/null +++ b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/sfpi.c @@ -0,0 +1,294 @@ +#include + +#include +#include +#include +#include +#include + +#include "cpld.h" +#include "x86_64_cel_redstone_xp_int.h" +#include "sfp_xfp.h" + + +static int +_get_sfp_state(int sfp) +{ + unsigned char val = 0; + int reg; + int ret = -1; + + if (!sfp) + return sfp; + + if(sfp < 9) { + reg = 0x259; + ret = read_cpld(reg, &val); + if(ret < 0) + return ret; + val &= 0x1 << (sfp - 1); + } else if((sfp > 8) && (sfp < 17)) { + reg = 0x25A; + ret = read_cpld(reg, &val); + if(ret < 0) + return ret; + val &= 0x1 << ((sfp - 1) % 8); + } else if((sfp > 16) && (sfp < 19)) { + reg = 0x25B; + ret = read_cpld(reg, &val); + if(ret < 0) + return ret; + val &= 0x1 << ((sfp - 1) % 8); + } else if((sfp > 18) && (sfp < 29)) { + reg = 0x2D9; + ret = read_cpld(reg, &val); + if(ret < 0) + return ret; + val &= 0x1 << ((sfp - 3) % 8); + } else if((sfp > 28) && (sfp < 35)) { + reg = 0x2DA; + ret = read_cpld(reg, &val); + if(ret < 0) + return ret; + val &= 0x1 << ((sfp - 3) % 8); + } else if((sfp > 34) && (sfp < 37)) { + reg = 0x2DB; + ret = read_cpld(reg, &val); + if(ret < 0) + return ret; + val &= 0x1 << ((sfp - 3) % 8); + } else if((sfp > 36) && (sfp < 45)) { + reg = 0x3D6; + ret = read_cpld(reg, &val); + if(ret < 0) + return ret; + val &= 0x1 << ((sfp - 5) % 8); + } else if((sfp > 44) && (sfp < 49)) { + reg = 0x3D7; + ret = read_cpld(reg, &val); + if(ret < 0) + return ret; + val &= 0x1 << ((sfp - 5) % 8); + } else if((sfp > 48) && (sfp <= CEL_REDSTONE_MAX_PORT)) { + reg = 0x3D7; + ret = read_cpld(reg, &val); + if(ret < 0) + return ret; + val &= 0x1 << ((sfp - 1) % 8); + } + return (ret = (val ? 0 : 1)); +} + +/*@ _read_sfp + * return + * 0 on success + * *data_p with result + */ +static int +_read_sfp(int port, uint8_t *data_p, uint32_t addr, uint32_t offset, uint32_t size) +{ + char byte = 0; + + read_sfp(port, 0xA0, 0x7F, &byte, 1); + + if (byte) { + byte = 0; + write_sfp(port, 0xA0, 0x7F, &byte, 1); + usleep(40000); + } + return (read_sfp(port, (addr<<1), offset, (char *)data_p, size)); +} + +/* @_spf_rx_los + * return + * 1 if rx_loss + * else 0 + * Arg + * port + */ +static int +_sfp_rx_los(int port) +{ + unsigned char byte = 0; + + if (!_get_sfp_state(port)) + return 1; + //return ONLP_STATUS_E_MISSING; + + if (port <= 48) { + _read_sfp(port, &byte, ALL_SFP_DIAG_I2C_ADDRESS, SFP_XFP_LOS_ADDR, SFP_XFP_LOS_SIZE); + } else if (port <= 54) { + _read_sfp(port, &byte, ALL_SFP_DIAG_I2C_ADDRESS, QSFP_LOS_ADDR, SFP_XFP_LOS_SIZE); + } + + if (SFP_LOS_MASK == (byte & SFP_LOS_MASK)) + return 1; + + return 0; +} + +/* @_spf_tx_fault + * return + * if tx fault + * else 0 + * Arg + * port + */ +static int +_sfp_tx_fault(int port) +{ + unsigned int option = 0; + + if (!_get_sfp_state(port)) + return -1; + + if (port <= 48) { + _read_sfp(port, (uint8_t *)&option, ALL_SFP_DIAG_I2C_ADDRESS, SFP_OPTIONS_ADDR, SFP_OPTIONS_SIZE); + } else if (port <= 54) { + _read_sfp(port, (uint8_t *)&option, ALL_SFP_DIAG_I2C_ADDRESS, QSFP_TX_FAULT_ADDR, SFP_OPTIONS_SIZE); + } + + if (SFP_TX_FAULT_MASK & option) + return 1; + + return 0; +} + + +int +onlp_sfpi_bitmap_get(onlp_sfp_bitmap_t* bmap) +{ + int p; + + for(p = 1; p <= CEL_REDSTONE_MAX_PORT; p++) + AIM_BITMAP_SET(bmap, p); + return ONLP_STATUS_OK; +} + +int +onlp_sfpi_init(void) +{ + return ONLP_STATUS_OK; +} + +/* +* @onlp_sfpi_is_present +* Return +* 1 if present. +* 0 if not present. +* < 0 if error. +*/ +int +onlp_sfpi_is_present(int port) +{ + return (_get_sfp_state(port)); +} + +int +onlp_sfpi_denit(void) +{ + return ONLP_STATUS_OK; +} + +int +onlp_sfpi_control_get(int port, onlp_sfp_control_t control, int* value) +{ + int rt; + switch(control) + { + case ONLP_SFP_CONTROL_RX_LOS: + rt = _sfp_rx_los(port); + if (rt < 0) + return ONLP_STATUS_E_INTERNAL; + + *value = rt; + return ONLP_STATUS_OK; + + case ONLP_SFP_CONTROL_TX_FAULT: + rt = _sfp_tx_fault(port); + if (rt < 0) + return ONLP_STATUS_E_INTERNAL; + + *value = rt; + return ONLP_STATUS_OK; + + default: + return ONLP_STATUS_E_UNSUPPORTED; + + } +} + +int +onlp_sfpi_control_set(int port, onlp_sfp_control_t control, int value) +{ + switch(control) { + case ONLP_SFP_CONTROL_TX_DISABLE: + //return _tx_enable_set__(port, !value); + return ONLP_STATUS_E_UNSUPPORTED; + default: + return ONLP_STATUS_E_UNSUPPORTED; + } +} + +int +onlp_sfpi_port_map(int port, int* rport) +{ + /* rport need to be port+1 as the face plate starts at 1 */ + + *rport = port; + return ONLP_STATUS_OK; +} + +int +onlp_sfpi_eeprom_read(int port, uint8_t data[256]) +{ + if (port > CEL_REDSTONE_MAX_PORT) { + return ONLP_STATUS_E_MISSING; + } + + if (!_get_sfp_state(port)) + return ONLP_STATUS_E_MISSING; + + memset(data, 0, 256); + if (_read_sfp(port, data, ALL_SFP_I2C_ADDRESS, 0, 256) == -1) + return ONLP_STATUS_OK; + + return ONLP_STATUS_OK; +} + +int +onlp_sfpi_presence_bitmap_get(onlp_sfp_bitmap_t* dst) +{ + uint32_t i; + int rt; + + AIM_BITMAP_CLR_ALL(dst); + + for(i=0; i< CEL_REDSTONE_MAX_PORT; i++) { + rt = _get_sfp_state(i); + if (rt < 0 ) { + return ONLP_STATUS_E_INTERNAL; + } else if (rt) { + AIM_BITMAP_SET(dst, i); + } + } + return ONLP_STATUS_OK; +} + +int +onlp_sfpi_rx_los_bitmap_get(onlp_sfp_bitmap_t* dst) +{ + uint32_t i; + int rt; + + AIM_BITMAP_CLR_ALL(dst); + for(i=1; i<= CEL_REDSTONE_MAX_PORT; i++) { + rt = _sfp_rx_los(i); + if (rt < 0 ) { + return ONLP_STATUS_E_INTERNAL; + } else if (rt) { + AIM_BITMAP_SET(dst, i); + } + } + return ONLP_STATUS_OK; +} diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/sys_eeprom.c b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/sys_eeprom.c new file mode 100644 index 00000000..bd07caa9 --- /dev/null +++ b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/sys_eeprom.c @@ -0,0 +1,66 @@ +#include +#include +#include +#include +#include +#include + +#include "sys_eeprom.h" +#include "cpld.h" +#include "i2c_chips.h" +#include "i2c_dev.h" + +static inline u_int8_t is_valid_tlvinfo_header(tlvinfo_header_t *hdr) +{ + int max_size = TLV_TOTAL_LEN_MAX; + + return((strcmp(hdr->signature, TLV_INFO_ID_STRING) == 0) && + (hdr->version == TLV_INFO_VERSION) && + (be16_to_cpu(hdr->totallen) <= max_size)); +} + +int +read_sys_eeprom(void *eeprom_data, int offset, int len) +{ + int ret = 0; + int i = 0; + u_int8_t *c; + + int addr = SYS_EEPROM_OFFSET + offset; + unsigned char dev_id = 5; + + c = eeprom_data; + if (eeprom_enable(dev_id) < 0) { + printf("ERROR: Cannot open I2C device\n"); + return -1; + } + + for (i = 0; i < len; i++) { + unsigned char buf; + ret = eeprom_read_byte(CONFIG_SYS_I2C_EEPROM_ADDR, addr, &buf); + *c = buf; + c++; + addr++; + } + + eeprom_disable(dev_id); + return ret; +} + +int +read_eeprom(u_int8_t *eeprom, int *size) +{ + int ret; + tlvinfo_header_t *eeprom_hdr = (tlvinfo_header_t *) eeprom; + u_int8_t *buf = eeprom + sizeof(tlvinfo_header_t); + + /* Read the header */ + ret = read_sys_eeprom((void *)eeprom_hdr, 0, sizeof(tlvinfo_header_t)); + + /* If the header was successfully read, read the TLVs */ + if ((ret == 0) && is_valid_tlvinfo_header(eeprom_hdr)) + ret = read_sys_eeprom((void *)buf, sizeof(tlvinfo_header_t), + be16_to_cpu(eeprom_hdr->totallen)); + + return ret; +} diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/sys_eeprom.h b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/sys_eeprom.h new file mode 100644 index 00000000..be31e28e --- /dev/null +++ b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/sys_eeprom.h @@ -0,0 +1,186 @@ +#ifndef SYS_EEPROM_HH +#define SYS_EEPROM_HH + +#include +#ifdef __cplusplus +extern "C" { +#endif + +#define be16_to_cpu(x) __be16_to_cpu(x) +#define cpu_to_be16(x) __cpu_to_be16(x) + +#define FALSE 0 +#define TRUE (!FALSE) + +/* + * Tlvinf header: Layout of the header for the TlvInfo format + * + * See the end of this file for details of this eeprom format + */ +struct __attribute__ ((__packed__)) tlvinfo_header_s { + char signature[8]; /* 0x00 - 0x07 EEPROM Tag "TlvInfo" */ + u_int8_t version; /* 0x08 Structure version */ + u_int16_t totallen; /* 0x09 - 0x0A Length of all data which follows */ +}; +typedef struct tlvinfo_header_s tlvinfo_header_t; + +// Header Field Constants +#define TLV_INFO_ID_STRING "TlvInfo" +#define TLV_INFO_VERSION 0x01 +#define TLV_TOTAL_LEN_MAX (SYS_EEPROM_SIZE - sizeof(tlvinfo_header_t)) + +/* + * TlvInfo TLV: Layout of a TLV field + */ +struct __attribute__ ((__packed__)) tlvinfo_tlv_s { + u_int8_t type; + u_int8_t length; + u_int8_t value[0]; +}; +typedef struct tlvinfo_tlv_s tlvinfo_tlv_t; + +/* Maximum length of a TLV value in bytes */ +#define TLV_VALUE_MAX_LEN 255 + +/** + * The TLV Types. + * + * Keep these in sync with tlv_code_list in cmd_sys_eeprom.c + */ +#define TLV_CODE_PRODUCT_NAME 0x21 +#define TLV_CODE_PART_NUMBER 0x22 +#define TLV_CODE_SERIAL_NUMBER 0x23 +#define TLV_CODE_MAC_BASE 0x24 +#define TLV_CODE_MANUF_DATE 0x25 +#define TLV_CODE_DEVICE_VERSION 0x26 +#define TLV_CODE_LABEL_REVISION 0x27 +#define TLV_CODE_PLATFORM_NAME 0x28 +#define TLV_CODE_ONIE_VERSION 0x29 +#define TLV_CODE_MAC_SIZE 0x2A +#define TLV_CODE_MANUF_NAME 0x2B +#define TLV_CODE_MANUF_COUNTRY 0x2C +#define TLV_CODE_VENDOR_NAME 0x2D +#define TLV_CODE_DIAG_VERSION 0x2E +#define TLV_CODE_SERVICE_TAG 0x2F +#define TLV_CODE_VENDOR_EXT 0xFD +#define TLV_CODE_CRC_32 0xFE + +/* + * Struct for displaying the TLV codes and names. + */ +struct tlv_code_desc { + u_int8_t m_code; + char* m_name; +}; + +/* + * List of TLV codes and names. + */ +static const struct tlv_code_desc tlv_code_list[] = { + { TLV_CODE_PRODUCT_NAME , "Product Name"}, + { TLV_CODE_PART_NUMBER , "Part Number"}, + { TLV_CODE_SERIAL_NUMBER , "Serial Number"}, + { TLV_CODE_MAC_BASE , "Base MAC Address"}, + { TLV_CODE_MANUF_DATE , "Manufacture Date"}, + { TLV_CODE_DEVICE_VERSION , "Device Version"}, + { TLV_CODE_LABEL_REVISION , "Label Revision"}, + { TLV_CODE_PLATFORM_NAME , "Platform Name"}, + { TLV_CODE_ONIE_VERSION , "Loader Version"}, + { TLV_CODE_MAC_SIZE , "MAC Addresses"}, + { TLV_CODE_MANUF_NAME , "Manufacturer"}, + { TLV_CODE_MANUF_COUNTRY , "Country Code"}, + { TLV_CODE_VENDOR_NAME , "Vendor Name"}, + { TLV_CODE_DIAG_VERSION , "Diag Version"}, + { TLV_CODE_SERVICE_TAG , "Service Tag"}, + { TLV_CODE_VENDOR_EXT , "Vendor Extension"}, + { TLV_CODE_CRC_32 , "CRC-32"}, +}; + +static inline const char* tlv_type2name(u_int8_t type) +{ + char* name = "Unknown"; + int i; + + for (i = 0; i < sizeof(tlv_code_list)/sizeof(tlv_code_list[0]); i++) { + if (tlv_code_list[i].m_code == type) { + name = tlv_code_list[i].m_name; + break; + } + } + return name; +} + +/* + * The max decode value is currently for the 'raw' type or the 'vendor + * extension' type, both of which have the same decode format. The + * max decode string size is computed as follows: + * + * strlen(" 0xFF") * TLV_VALUE_MAX_LEN + 1 + * + */ +#define TLV_DECODE_VALUE_MAX_LEN ((5 * TLV_VALUE_MAX_LEN) + 1) + + +/* + * Each platform must define the following platform-specific macros + * in sys_eeprom_platform.h: + * SYS_EEPROM_SIZE: size of usable eeprom + * SYS_EEPROM_I2C_DEVICE: i2c-bus + * SYS_EEPROM_I2C_ADDR: address on the bus + * The following may also be defined in sys_eeprom_platform.h, else + * the defaults with take over: + * SYS_EEPROM_MAX_SIZE: Total size of the eeprom + * SYS_EEPROM_OFFSET: offset from where the ONIE header starts + */ +//#include "sys_eeprom_platform.h" +#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 +#ifndef SYS_EEPROM_SIZE +#define SYS_EEPROM_SIZE 1024 +#endif + +#ifndef SYS_EEPROM_I2C_DEVICE +#define SYS_EEPROM_I2C_DEVICE 1 +#endif + +#ifndef SYS_EEPROM_I2C_ADDR +#define SYS_EEPROM_I2C_ADDR 0x50 +#endif +#ifndef SYS_EEPROM_MAX_SIZE +#define SYS_EEPROM_MAX_SIZE 2048 +#endif + +#ifndef SYS_EEPROM_OFFSET +#define SYS_EEPROM_OFFSET 0 +#endif + +#ifndef SYS_EEPROM_SIZE + #error SYS_EEPROM_SIZE not defined! +#endif + +#ifndef SYS_EEPROM_I2C_DEVICE + #error SYS_EEPROM_I2C_DEVICE not defined! +#endif + +#ifndef SYS_EEPROM_I2C_ADDR + #error SYS_EEPROM_I2C_ADDR not defined! +#endif + +#if (SYS_EEPROM_SIZE + SYS_EEPROM_OFFSET > SYS_EEPROM_MAX_SIZE) + #error SYS_EEPROM_SIZE + SYS_EEPROM_OFFSET is greater than SYS_EEPROM_MAX_SIZE +#endif + +// Access functions to onie_tlvinfo +int prog_eeprom(u_int8_t * eeprom); +void update_eeprom_header(u_int8_t *eeprom); +u_int8_t tlvinfo_find_tlv(u_int8_t *eeprom, u_int8_t tcode, int *eeprom_index); +u_int8_t tlvinfo_delete_tlv(u_int8_t * eeprom, u_int8_t code); +u_int8_t tlvinfo_add_tlv(u_int8_t * eeprom, int tcode, char * strval); +u_int8_t tlvinfo_decode_tlv(u_int8_t *eeprom, u_int8_t tcode, char* value); +void show_tlv_code_list(void); +void show_eeprom(void); +int read_eeprom(u_int8_t *, int *); + +#ifdef __cplusplus +} +#endif +#endif diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/sysi.c b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/sysi.c new file mode 100644 index 00000000..98fe0b73 --- /dev/null +++ b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/sysi.c @@ -0,0 +1,175 @@ +/* + * Copyright + */ +#include +#include +#include +#include + +#include "x86_64_cel_redstone_xp_log.h" +#include "platform.h" +#include "cplds.h" +#include "sys_eeprom.h" + +const char* +onlp_sysi_platform_get(void) +{ + return "x86-64-cel-redstone-xp-r0"; +} + +int +onlp_sysi_init(void) +{ + return cpld_io_init(); +} + + +int +onlp_sysi_debug(aim_pvs_t* pvs, int argc, char* argv[]) +{ + int c; + for(c = 1; c <= 5; c++) { + aim_printf(pvs, "CPLD%d:\n", c); + cpld_dump(pvs, c); + } + return 0; +} + +int +onlp_sysi_platform_set(const char* name) +{ + /* + * For the purposes of this example we + * accept all platforms. + */ + return ONLP_STATUS_OK; +} + +int +onlp_sysi_onie_data_phys_addr_get(void** pa) +{ + return ONLP_STATUS_E_UNSUPPORTED; +} + +int +onlp_sysi_onie_data_get(uint8_t** data, int* size) +{ + uint8_t* rdata = aim_zmalloc(512); + + read_eeprom(rdata, size); + if (size) { + *data = rdata; + return ONLP_STATUS_OK; + } + return ONLP_STATUS_E_INTERNAL; +} + +void +onlp_sysi_onie_data_free(uint8_t* data) +{ + /* + * We returned a static array in onlp_sysi_onie_data_get() + * so no free operation is required. + */ +} + +static int +_onlp_sysi_calc_speed(int atemp) +{ + int fan_speed = 0; + + if (atemp < 38 ) { + fan_speed = 50; + } else if ( atemp < 40) { + fan_speed = 60; + } else if ( atemp < 42) { + fan_speed = 70; + } else if ( atemp < 44) { + fan_speed = 80; + } else if ( atemp < 46) { + fan_speed = 90; + } else { + fan_speed = 100; + } + + return fan_speed; +} + +/* + * Thermal profile for Celestica Redstone XP + * + * Default Fan speed: 50% + * Normal operating temperature range: < 46C + * Fan Speed profile: + * 46C + : 100% Fan speed + * 44C : 80% Fan speed + * 42C : 70% Fan speed + * 40C : 60% Fan speed + * 38C - : 50% Fan speed + */ +int +onlp_sysi_platform_manage_fans(void) +{ + int i, atemp = 0, count = 0; + int fan_speed = 0; + static int o_speed = 0, o_psu_speed[2] = {0,0}; + onlp_thermal_info_t t_info; + + for (i = 1; i < PSU_FAN; i++) { + onlp_thermali_info_get(ONLP_THERMAL_ID_CREATE(i), &t_info); + if (t_info.mcelsius) { + count++; + atemp += t_info.mcelsius; + } + } + atemp = atemp/count; + + fan_speed = _onlp_sysi_calc_speed(atemp); + if (o_speed != fan_speed) { + for (i = 1; i < PSU_FAN; i++) + onlp_fani_percentage_set(ONLP_FAN_ID_CREATE(i), fan_speed); + o_speed = fan_speed; + } + + /* Control PSU FAN */ + for (i = 0; i < 2 ; i++) { + onlp_thermali_info_get(ONLP_THERMAL_ID_CREATE(i), &t_info); + if (t_info.mcelsius) { + atemp = t_info.mcelsius; + fan_speed = _onlp_sysi_calc_speed(atemp); + if (fan_speed != o_psu_speed[i]) { + onlp_fani_percentage_set(ONLP_FAN_ID_CREATE(PSU_FAN + i), fan_speed); + o_psu_speed[i] = fan_speed; + } + } + } + + return ONLP_STATUS_OK; +} + +int +onlp_sysi_oids_get(onlp_oid_t* table, int max) +{ + int i; + onlp_oid_t* e = table; + + memset(table, 0, max*sizeof(onlp_oid_t)); + + /* 2 PSUs */ + *e++ = ONLP_PSU_ID_CREATE(1); + *e++ = ONLP_PSU_ID_CREATE(2); + + /* LEDs Item */ + for (i=1; i<=LED_COUNT; i++) + *e++ = ONLP_LED_ID_CREATE(i); + + /* THERMALs Item */ + for (i=1; i<=THERMAL_COUNT; i++) + *e++ = ONLP_THERMAL_ID_CREATE(i); + + /* Fans Item */ + for (i=1; i<=FAN_COUNT; i++) + *e++ = ONLP_FAN_ID_CREATE(i); + + return ONLP_STATUS_OK; +} diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/thermali.c b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/thermali.c new file mode 100644 index 00000000..a5f4c23b --- /dev/null +++ b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/thermali.c @@ -0,0 +1,73 @@ +#include +#include +#include +#include +#include + +#include "i2c_chips.h" +#include "platform.h" + +static onlp_thermal_info_t thermal_info[] = { + { { ONLP_THERMAL_ID_CREATE(THERMAL_MAIN_BOARD_REAR), "Chassis Thermal (Rear)", 0}, + ONLP_THERMAL_STATUS_PRESENT, + ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS + }, + { { ONLP_THERMAL_ID_CREATE(THERMAL_BCM), "BCM SOC Thermal sensor", 0}, + ONLP_THERMAL_STATUS_PRESENT, + ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS + }, + { { ONLP_THERMAL_ID_CREATE(THERMAL_CPU), "CPU Core", 0}, + ONLP_THERMAL_STATUS_PRESENT, + ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS + }, + { { ONLP_THERMAL_ID_CREATE(THERMAL_MAIN_BOARD_FRONT), "Chassis Thermal Sensor (Front)", 0}, + ONLP_THERMAL_STATUS_PRESENT, + ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS + }, + { { ONLP_THERMAL_ID_CREATE(THERMAL_PSU1), "PSU-1 Thermal Sensor", ONLP_PSU_ID_CREATE(1)}, + ONLP_THERMAL_STATUS_PRESENT, + ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS + }, + { { ONLP_THERMAL_ID_CREATE(THERMAL_PSU2), "PSU-2 Thermal Sensor", ONLP_PSU_ID_CREATE(2)}, + ONLP_THERMAL_STATUS_PRESENT, + ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS + } +}; + +int +onlp_thermali_init(void) +{ + return ONLP_STATUS_OK; +} + +int +onlp_thermali_info_get(onlp_oid_t id, onlp_thermal_info_t* info) +{ + int sensor_id; + struct psuInfo psu; + short temp; + + sensor_id = ONLP_OID_ID_GET(id) - 1; + + *info = thermal_info[sensor_id]; + + switch (sensor_id) { + case THERMAL_MAIN_BOARD_REAR: + case THERMAL_MAIN_BOARD_FRONT: + case THERMAL_BCM: + case THERMAL_CPU: + tsTempGet(sensor_id, &temp); + info->mcelsius = temp; + break; + case THERMAL_PSU1: + getPsuInfo(0, &psu); + info->mcelsius = psu.temp; + break; + case THERMAL_PSU2: + getPsuInfo(1, &psu); + info->mcelsius = psu.temp; + break; + } + return ONLP_STATUS_OK; +} + diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/x86_64_cel_redstone_xp_config.c b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/x86_64_cel_redstone_xp_config.c new file mode 100644 index 00000000..a988fcde --- /dev/null +++ b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/x86_64_cel_redstone_xp_config.c @@ -0,0 +1,76 @@ +/**************************************************************************//** + * + * + * + *****************************************************************************/ +#include + +/* */ +#define __x86_64_cel_redstone_xp_config_STRINGIFY_NAME(_x) #_x +#define __x86_64_cel_redstone_xp_config_STRINGIFY_VALUE(_x) __x86_64_cel_redstone_xp_config_STRINGIFY_NAME(_x) +x86_64_cel_redstone_xp_config_settings_t x86_64_cel_redstone_xp_config_settings[] = +{ +#ifdef X86_64_CEL_REDSTONE_XP_CONFIG_INCLUDE_LOGGING + { __x86_64_cel_redstone_xp_config_STRINGIFY_NAME(X86_64_CEL_REDSTONE_XP_CONFIG_INCLUDE_LOGGING), __x86_64_cel_redstone_xp_config_STRINGIFY_VALUE(X86_64_CEL_REDSTONE_XP_CONFIG_INCLUDE_LOGGING) }, +#else +{ X86_64_CEL_REDSTONE_XP_CONFIG_INCLUDE_LOGGING(__x86_64_cel_redstone_xp_config_STRINGIFY_NAME), "__undefined__" }, +#endif +#ifdef X86_64_CEL_REDSTONE_XP_CONFIG_LOG_OPTIONS_DEFAULT + { __x86_64_cel_redstone_xp_config_STRINGIFY_NAME(X86_64_CEL_REDSTONE_XP_CONFIG_LOG_OPTIONS_DEFAULT), __x86_64_cel_redstone_xp_config_STRINGIFY_VALUE(X86_64_CEL_REDSTONE_XP_CONFIG_LOG_OPTIONS_DEFAULT) }, +#else +{ X86_64_CEL_REDSTONE_XP_CONFIG_LOG_OPTIONS_DEFAULT(__x86_64_cel_redstone_xp_config_STRINGIFY_NAME), "__undefined__" }, +#endif +#ifdef X86_64_CEL_REDSTONE_XP_CONFIG_LOG_BITS_DEFAULT + { __x86_64_cel_redstone_xp_config_STRINGIFY_NAME(X86_64_CEL_REDSTONE_XP_CONFIG_LOG_BITS_DEFAULT), __x86_64_cel_redstone_xp_config_STRINGIFY_VALUE(X86_64_CEL_REDSTONE_XP_CONFIG_LOG_BITS_DEFAULT) }, +#else +{ X86_64_CEL_REDSTONE_XP_CONFIG_LOG_BITS_DEFAULT(__x86_64_cel_redstone_xp_config_STRINGIFY_NAME), "__undefined__" }, +#endif +#ifdef X86_64_CEL_REDSTONE_XP_CONFIG_LOG_CUSTOM_BITS_DEFAULT + { __x86_64_cel_redstone_xp_config_STRINGIFY_NAME(X86_64_CEL_REDSTONE_XP_CONFIG_LOG_CUSTOM_BITS_DEFAULT), __x86_64_cel_redstone_xp_config_STRINGIFY_VALUE(X86_64_CEL_REDSTONE_XP_CONFIG_LOG_CUSTOM_BITS_DEFAULT) }, +#else +{ X86_64_CEL_REDSTONE_XP_CONFIG_LOG_CUSTOM_BITS_DEFAULT(__x86_64_cel_redstone_xp_config_STRINGIFY_NAME), "__undefined__" }, +#endif +#ifdef X86_64_CEL_REDSTONE_XP_CONFIG_PORTING_STDLIB + { __x86_64_cel_redstone_xp_config_STRINGIFY_NAME(X86_64_CEL_REDSTONE_XP_CONFIG_PORTING_STDLIB), __x86_64_cel_redstone_xp_config_STRINGIFY_VALUE(X86_64_CEL_REDSTONE_XP_CONFIG_PORTING_STDLIB) }, +#else +{ X86_64_CEL_REDSTONE_XP_CONFIG_PORTING_STDLIB(__x86_64_cel_redstone_xp_config_STRINGIFY_NAME), "__undefined__" }, +#endif +#ifdef X86_64_CEL_REDSTONE_XP_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS + { __x86_64_cel_redstone_xp_config_STRINGIFY_NAME(X86_64_CEL_REDSTONE_XP_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS), __x86_64_cel_redstone_xp_config_STRINGIFY_VALUE(X86_64_CEL_REDSTONE_XP_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS) }, +#else +{ X86_64_CEL_REDSTONE_XP_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS(__x86_64_cel_redstone_xp_config_STRINGIFY_NAME), "__undefined__" }, +#endif +#ifdef X86_64_CEL_REDSTONE_XP_CONFIG_INCLUDE_UCLI + { __x86_64_cel_redstone_xp_config_STRINGIFY_NAME(X86_64_CEL_REDSTONE_XP_CONFIG_INCLUDE_UCLI), __x86_64_cel_redstone_xp_config_STRINGIFY_VALUE(X86_64_CEL_REDSTONE_XP_CONFIG_INCLUDE_UCLI) }, +#else +{ X86_64_CEL_REDSTONE_XP_CONFIG_INCLUDE_UCLI(__x86_64_cel_redstone_xp_config_STRINGIFY_NAME), "__undefined__" }, +#endif + { NULL, NULL } +}; +#undef __x86_64_cel_redstone_xp_config_STRINGIFY_VALUE +#undef __x86_64_cel_redstone_xp_config_STRINGIFY_NAME + +const char* +x86_64_cel_redstone_xp_config_lookup(const char* setting) +{ + int i; + for(i = 0; x86_64_cel_redstone_xp_config_settings[i].name; i++) { + if(strcmp(x86_64_cel_redstone_xp_config_settings[i].name, setting)) { + return x86_64_cel_redstone_xp_config_settings[i].value; + } + } + return NULL; +} + +int +x86_64_cel_redstone_xp_config_show(struct aim_pvs_s* pvs) +{ + int i; + for(i = 0; x86_64_cel_redstone_xp_config_settings[i].name; i++) { + aim_printf(pvs, "%s = %s\n", x86_64_cel_redstone_xp_config_settings[i].name, x86_64_cel_redstone_xp_config_settings[i].value); + } + return i; +} + +/* */ + diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/x86_64_cel_redstone_xp_enums.c b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/x86_64_cel_redstone_xp_enums.c new file mode 100644 index 00000000..426c91b7 --- /dev/null +++ b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/x86_64_cel_redstone_xp_enums.c @@ -0,0 +1,674 @@ +/**************************************************************************//** + * + * + * + *****************************************************************************/ +#include +#include "x86_64_cel_redstone_xp_int.h" + +/* */ +aim_map_si_t cpld1_reg_map[] = +{ + { "VERSION", CPLD1_REG_VERSION }, + { "SCRATCH", CPLD1_REG_SCRATCH }, + { "RESET_CONTROL", CPLD1_REG_RESET_CONTROL }, + { "RESET_SOURCE", CPLD1_REG_RESET_SOURCE }, + { "BOARD_TYPE", CPLD1_REG_BOARD_TYPE }, + { "INT_PORT_STATUS", CPLD1_REG_INT_PORT_STATUS }, + { "INT0_SOURCE_STATUS", CPLD1_REG_INT0_SOURCE_STATUS }, + { "INT0_SOURCE_INT", CPLD1_REG_INT0_SOURCE_INT }, + { "INT0_SOURCE_MASK", CPLD1_REG_INT0_SOURCE_MASK }, + { "POWER_SUPPLY_STATUS", CPLD1_REG_POWER_SUPPLY_STATUS }, + { "POWER_GOOD_STATUS", CPLD1_REG_POWER_GOOD_STATUS }, + { "BPP_CONTROL", CPLD1_REG_BPP_CONTROL }, + { "WRITE_PROTECT_CONTROL", CPLD1_REG_WRITE_PROTECT_CONTROL }, + { "MISC_STATUS_CONTROL", CPLD1_REG_MISC_STATUS_CONTROL }, + { "INFO_RAM_ADDR_HIGH", CPLD1_REG_INFO_RAM_ADDR_HIGH }, + { "INFO_RAM_ADDR_LOW", CPLD1_REG_INFO_RAM_ADDR_LOW }, + { "INFO_RAM_READ_DATA", CPLD1_REG_INFO_RAM_READ_DATA }, + { "INFO_RAM_WRITE_DATA", CPLD1_REG_INFO_RAM_WRITE_DATA }, + { NULL, 0 } +}; + +aim_map_si_t cpld1_reg_desc_map[] = +{ + { "None", CPLD1_REG_VERSION }, + { "None", CPLD1_REG_SCRATCH }, + { "None", CPLD1_REG_RESET_CONTROL }, + { "None", CPLD1_REG_RESET_SOURCE }, + { "None", CPLD1_REG_BOARD_TYPE }, + { "None", CPLD1_REG_INT_PORT_STATUS }, + { "None", CPLD1_REG_INT0_SOURCE_STATUS }, + { "None", CPLD1_REG_INT0_SOURCE_INT }, + { "None", CPLD1_REG_INT0_SOURCE_MASK }, + { "None", CPLD1_REG_POWER_SUPPLY_STATUS }, + { "None", CPLD1_REG_POWER_GOOD_STATUS }, + { "None", CPLD1_REG_BPP_CONTROL }, + { "None", CPLD1_REG_WRITE_PROTECT_CONTROL }, + { "None", CPLD1_REG_MISC_STATUS_CONTROL }, + { "None", CPLD1_REG_INFO_RAM_ADDR_HIGH }, + { "None", CPLD1_REG_INFO_RAM_ADDR_LOW }, + { "None", CPLD1_REG_INFO_RAM_READ_DATA }, + { "None", CPLD1_REG_INFO_RAM_WRITE_DATA }, + { NULL, 0 } +}; + +const char* +cpld1_reg_name(cpld1_reg_t e) +{ + const char* name; + if(aim_map_si_i(&name, e, cpld1_reg_map, 0)) { + return name; + } + else { + return "-invalid value for enum type 'cpld1_reg'"; + } +} + +int +cpld1_reg_value(const char* str, cpld1_reg_t* e, int substr) +{ + int i; + AIM_REFERENCE(substr); + if(aim_map_si_s(&i, str, cpld1_reg_map, 0)) { + /* Enum Found */ + *e = i; + return 0; + } + else { + return -1; + } +} + +const char* +cpld1_reg_desc(cpld1_reg_t e) +{ + const char* name; + if(aim_map_si_i(&name, e, cpld1_reg_desc_map, 0)) { + return name; + } + else { + return "-invalid value for enum type 'cpld1_reg'"; + } +} + +int +cpld1_reg_valid(cpld1_reg_t e) +{ + return aim_map_si_i(NULL, e, cpld1_reg_map, 0) ? 1 : 0; +} + + +aim_map_si_t cpld2_reg_map[] = +{ + { "VERSION", CPLD2_REG_VERSION }, + { "SCRATCH", CPLD2_REG_SCRATCH }, + { "I2C_PORT_ID", CPLD2_REG_I2C_PORT_ID }, + { "I2C_OP_CODE", CPLD2_REG_I2C_OP_CODE }, + { "I2C_DEV_ADDR", CPLD2_REG_I2C_DEV_ADDR }, + { "I2C_CMD_BYTE0", CPLD2_REG_I2C_CMD_BYTE0 }, + { "I2C_CMD_BYTE1", CPLD2_REG_I2C_CMD_BYTE1 }, + { "I2C_CMD_BYTE2", CPLD2_REG_I2C_CMD_BYTE2 }, + { "I2C_STATUS_RESET", CPLD2_REG_I2C_STATUS_RESET }, + { "I2C_WRITE_DATA_BYTE0", CPLD2_REG_I2C_WRITE_DATA_BYTE0 }, + { "I2C_WRITE_DATA_BYTE1", CPLD2_REG_I2C_WRITE_DATA_BYTE1 }, + { "I2C_WRITE_DATA_BYTE2", CPLD2_REG_I2C_WRITE_DATA_BYTE2 }, + { "I2C_WRITE_DATA_BYTE3", CPLD2_REG_I2C_WRITE_DATA_BYTE3 }, + { "I2C_WRITE_DATA_BYTE4", CPLD2_REG_I2C_WRITE_DATA_BYTE4 }, + { "I2C_WRITE_DATA_BYTE5", CPLD2_REG_I2C_WRITE_DATA_BYTE5 }, + { "I2C_WRITE_DATA_BYTE6", CPLD2_REG_I2C_WRITE_DATA_BYTE6 }, + { "I2C_WRITE_DATA_BYTE7", CPLD2_REG_I2C_WRITE_DATA_BYTE7 }, + { "I2C_READ_DATA_BYTE0", CPLD2_REG_I2C_READ_DATA_BYTE0 }, + { "I2C_READ_DATA_BYTE1", CPLD2_REG_I2C_READ_DATA_BYTE1 }, + { "I2C_READ_DATA_BYTE2", CPLD2_REG_I2C_READ_DATA_BYTE2 }, + { "I2C_READ_DATA_BYTE3", CPLD2_REG_I2C_READ_DATA_BYTE3 }, + { "I2C_READ_DATA_BYTE4", CPLD2_REG_I2C_READ_DATA_BYTE4 }, + { "I2C_READ_DATA_BYTE5", CPLD2_REG_I2C_READ_DATA_BYTE5 }, + { "I2C_READ_DATA_BYTE6", CPLD2_REG_I2C_READ_DATA_BYTE6 }, + { "I2C_READ_DATA_BYTE7", CPLD2_REG_I2C_READ_DATA_BYTE7 }, + { "SFP_1_8_RX_LOS", CPLD2_REG_SFP_1_8_RX_LOS }, + { "SFP_9_16_RX_LOS", CPLD2_REG_SFP_9_16_RX_LOS }, + { "SFP_17_18_RX_LOS", CPLD2_REG_SFP_17_18_RX_LOS }, + { "SFP_1_8_RX_LOS_INT", CPLD2_REG_SFP_1_8_RX_LOS_INT }, + { "SFP_9_16_RX_LOS_INT", CPLD2_REG_SFP_9_16_RX_LOS_INT }, + { "SFP_17_18_RX_LOS_INT", CPLD2_REG_SFP_17_18_RX_LOS_INT }, + { "SFP_1_8_RX_LOS_MASK", CPLD2_REG_SFP_1_8_RX_LOS_MASK }, + { "SFP_9_16_RX_LOS_MASK", CPLD2_REG_SFP_9_16_RX_LOS_MASK }, + { "SFP_17_18_RX_LOS_MASK", CPLD2_REG_SFP_17_18_RX_LOS_MASK }, + { "SFP_1_8_TX_DISABLE", CPLD2_REG_SFP_1_8_TX_DISABLE }, + { "SFP_9_16_TX_DISABLE", CPLD2_REG_SFP_9_16_TX_DISABLE }, + { "SFP_17_18_TX_DISABLE", CPLD2_REG_SFP_17_18_TX_DISABLE }, + { "SFP_1_8_RS_CONTROL", CPLD2_REG_SFP_1_8_RS_CONTROL }, + { "SFP_9_16_RS_CONTROL", CPLD2_REG_SFP_9_16_RS_CONTROL }, + { "SFP_17_18_RS_CONTROL", CPLD2_REG_SFP_17_18_RS_CONTROL }, + { "SFP_1_8_TX_FAULT", CPLD2_REG_SFP_1_8_TX_FAULT }, + { "SFP_9_16_TX_FAULT", CPLD2_REG_SFP_9_16_TX_FAULT }, + { "SFP_17_18_TX_FAULT", CPLD2_REG_SFP_17_18_TX_FAULT }, + { "SFP_1_8_ABS_STATUS", CPLD2_REG_SFP_1_8_ABS_STATUS }, + { "SFP_9_16_ABS_STATUS", CPLD2_REG_SFP_9_16_ABS_STATUS }, + { "SFP_17_18_ABS_STATUS", CPLD2_REG_SFP_17_18_ABS_STATUS }, + { NULL, 0 } +}; + +aim_map_si_t cpld2_reg_desc_map[] = +{ + { "None", CPLD2_REG_VERSION }, + { "None", CPLD2_REG_SCRATCH }, + { "None", CPLD2_REG_I2C_PORT_ID }, + { "None", CPLD2_REG_I2C_OP_CODE }, + { "None", CPLD2_REG_I2C_DEV_ADDR }, + { "None", CPLD2_REG_I2C_CMD_BYTE0 }, + { "None", CPLD2_REG_I2C_CMD_BYTE1 }, + { "None", CPLD2_REG_I2C_CMD_BYTE2 }, + { "None", CPLD2_REG_I2C_STATUS_RESET }, + { "None", CPLD2_REG_I2C_WRITE_DATA_BYTE0 }, + { "None", CPLD2_REG_I2C_WRITE_DATA_BYTE1 }, + { "None", CPLD2_REG_I2C_WRITE_DATA_BYTE2 }, + { "None", CPLD2_REG_I2C_WRITE_DATA_BYTE3 }, + { "None", CPLD2_REG_I2C_WRITE_DATA_BYTE4 }, + { "None", CPLD2_REG_I2C_WRITE_DATA_BYTE5 }, + { "None", CPLD2_REG_I2C_WRITE_DATA_BYTE6 }, + { "None", CPLD2_REG_I2C_WRITE_DATA_BYTE7 }, + { "None", CPLD2_REG_I2C_READ_DATA_BYTE0 }, + { "None", CPLD2_REG_I2C_READ_DATA_BYTE1 }, + { "None", CPLD2_REG_I2C_READ_DATA_BYTE2 }, + { "None", CPLD2_REG_I2C_READ_DATA_BYTE3 }, + { "None", CPLD2_REG_I2C_READ_DATA_BYTE4 }, + { "None", CPLD2_REG_I2C_READ_DATA_BYTE5 }, + { "None", CPLD2_REG_I2C_READ_DATA_BYTE6 }, + { "None", CPLD2_REG_I2C_READ_DATA_BYTE7 }, + { "None", CPLD2_REG_SFP_1_8_RX_LOS }, + { "None", CPLD2_REG_SFP_9_16_RX_LOS }, + { "None", CPLD2_REG_SFP_17_18_RX_LOS }, + { "None", CPLD2_REG_SFP_1_8_RX_LOS_INT }, + { "None", CPLD2_REG_SFP_9_16_RX_LOS_INT }, + { "None", CPLD2_REG_SFP_17_18_RX_LOS_INT }, + { "None", CPLD2_REG_SFP_1_8_RX_LOS_MASK }, + { "None", CPLD2_REG_SFP_9_16_RX_LOS_MASK }, + { "None", CPLD2_REG_SFP_17_18_RX_LOS_MASK }, + { "None", CPLD2_REG_SFP_1_8_TX_DISABLE }, + { "None", CPLD2_REG_SFP_9_16_TX_DISABLE }, + { "None", CPLD2_REG_SFP_17_18_TX_DISABLE }, + { "None", CPLD2_REG_SFP_1_8_RS_CONTROL }, + { "None", CPLD2_REG_SFP_9_16_RS_CONTROL }, + { "None", CPLD2_REG_SFP_17_18_RS_CONTROL }, + { "None", CPLD2_REG_SFP_1_8_TX_FAULT }, + { "None", CPLD2_REG_SFP_9_16_TX_FAULT }, + { "None", CPLD2_REG_SFP_17_18_TX_FAULT }, + { "None", CPLD2_REG_SFP_1_8_ABS_STATUS }, + { "None", CPLD2_REG_SFP_9_16_ABS_STATUS }, + { "None", CPLD2_REG_SFP_17_18_ABS_STATUS }, + { NULL, 0 } +}; + +const char* +cpld2_reg_name(cpld2_reg_t e) +{ + const char* name; + if(aim_map_si_i(&name, e, cpld2_reg_map, 0)) { + return name; + } + else { + return "-invalid value for enum type 'cpld2_reg'"; + } +} + +int +cpld2_reg_value(const char* str, cpld2_reg_t* e, int substr) +{ + int i; + AIM_REFERENCE(substr); + if(aim_map_si_s(&i, str, cpld2_reg_map, 0)) { + /* Enum Found */ + *e = i; + return 0; + } + else { + return -1; + } +} + +const char* +cpld2_reg_desc(cpld2_reg_t e) +{ + const char* name; + if(aim_map_si_i(&name, e, cpld2_reg_desc_map, 0)) { + return name; + } + else { + return "-invalid value for enum type 'cpld2_reg'"; + } +} + +int +cpld2_reg_valid(cpld2_reg_t e) +{ + return aim_map_si_i(NULL, e, cpld2_reg_map, 0) ? 1 : 0; +} + + +aim_map_si_t cpld3_reg_map[] = +{ + { "VERSION", CPLD3_REG_VERSION }, + { "SCRATCH", CPLD3_REG_SCRATCH }, + { "I2C_PORT_ID", CPLD3_REG_I2C_PORT_ID }, + { "I2C_OP_CODE", CPLD3_REG_I2C_OP_CODE }, + { "I2C_DEV_ADDR", CPLD3_REG_I2C_DEV_ADDR }, + { "I2C_CMD_BYTE0", CPLD3_REG_I2C_CMD_BYTE0 }, + { "I2C_CMD_BYTE1", CPLD3_REG_I2C_CMD_BYTE1 }, + { "I2C_CMD_BYTE2", CPLD3_REG_I2C_CMD_BYTE2 }, + { "I2C_STATUS_RESET", CPLD3_REG_I2C_STATUS_RESET }, + { "I2C_WRITE_DATA_BYTE0", CPLD3_REG_I2C_WRITE_DATA_BYTE0 }, + { "I2C_WRITE_DATA_BYTE1", CPLD3_REG_I2C_WRITE_DATA_BYTE1 }, + { "I2C_WRITE_DATA_BYTE2", CPLD3_REG_I2C_WRITE_DATA_BYTE2 }, + { "I2C_WRITE_DATA_BYTE3", CPLD3_REG_I2C_WRITE_DATA_BYTE3 }, + { "I2C_WRITE_DATA_BYTE4", CPLD3_REG_I2C_WRITE_DATA_BYTE4 }, + { "I2C_WRITE_DATA_BYTE5", CPLD3_REG_I2C_WRITE_DATA_BYTE5 }, + { "I2C_WRITE_DATA_BYTE6", CPLD3_REG_I2C_WRITE_DATA_BYTE6 }, + { "I2C_WRITE_DATA_BYTE7", CPLD3_REG_I2C_WRITE_DATA_BYTE7 }, + { "I2C_READ_DATA_BYTE0", CPLD3_REG_I2C_READ_DATA_BYTE0 }, + { "I2C_READ_DATA_BYTE1", CPLD3_REG_I2C_READ_DATA_BYTE1 }, + { "I2C_READ_DATA_BYTE2", CPLD3_REG_I2C_READ_DATA_BYTE2 }, + { "I2C_READ_DATA_BYTE3", CPLD3_REG_I2C_READ_DATA_BYTE3 }, + { "I2C_READ_DATA_BYTE4", CPLD3_REG_I2C_READ_DATA_BYTE4 }, + { "I2C_READ_DATA_BYTE5", CPLD3_REG_I2C_READ_DATA_BYTE5 }, + { "I2C_READ_DATA_BYTE6", CPLD3_REG_I2C_READ_DATA_BYTE6 }, + { "I2C_READ_DATA_BYTE7", CPLD3_REG_I2C_READ_DATA_BYTE7 }, + { "SFP_19_26_RX_LOS", CPLD3_REG_SFP_19_26_RX_LOS }, + { "SFP_27_34_RX_LOS", CPLD3_REG_SFP_27_34_RX_LOS }, + { "SFP_35_36_RX_LOS", CPLD3_REG_SFP_35_36_RX_LOS }, + { "SFP_19_26_RX_LOS_INT", CPLD3_REG_SFP_19_26_RX_LOS_INT }, + { "SFP_27_34_RX_LOS_INT", CPLD3_REG_SFP_27_34_RX_LOS_INT }, + { "SFP_35_36_RX_LOS_INT", CPLD3_REG_SFP_35_36_RX_LOS_INT }, + { "SFP_19_26_RX_LOS_MASK", CPLD3_REG_SFP_19_26_RX_LOS_MASK }, + { "SFP_27_34_RX_LOS_MASK", CPLD3_REG_SFP_27_34_RX_LOS_MASK }, + { "SFP_35_36_RX_LOS_MASK", CPLD3_REG_SFP_35_36_RX_LOS_MASK }, + { "SFP_19_26_TX_DISABLE", CPLD3_REG_SFP_19_26_TX_DISABLE }, + { "SFP_27_34_TX_DISABLE", CPLD3_REG_SFP_27_34_TX_DISABLE }, + { "SFP_35_36_TX_DISABLE", CPLD3_REG_SFP_35_36_TX_DISABLE }, + { "SFP_19_26_RS_CONTROL", CPLD3_REG_SFP_19_26_RS_CONTROL }, + { "SFP_27_34_RS_CONTROL", CPLD3_REG_SFP_27_34_RS_CONTROL }, + { "SFP_35_36_RS_CONTROL", CPLD3_REG_SFP_35_36_RS_CONTROL }, + { "SFP_19_26_TX_FAULT", CPLD3_REG_SFP_19_26_TX_FAULT }, + { "SFP_27_34_TX_FAULT", CPLD3_REG_SFP_27_34_TX_FAULT }, + { "SFP_35_36_TX_FAULT", CPLD3_REG_SFP_35_36_TX_FAULT }, + { "SFP_19_26_ABS_STATUS", CPLD3_REG_SFP_19_26_ABS_STATUS }, + { "SFP_27_34_ABS_STATUS", CPLD3_REG_SFP_27_34_ABS_STATUS }, + { "SFP_35_36_ABS_STATUS", CPLD3_REG_SFP_35_36_ABS_STATUS }, + { NULL, 0 } +}; + +aim_map_si_t cpld3_reg_desc_map[] = +{ + { "None", CPLD3_REG_VERSION }, + { "None", CPLD3_REG_SCRATCH }, + { "None", CPLD3_REG_I2C_PORT_ID }, + { "None", CPLD3_REG_I2C_OP_CODE }, + { "None", CPLD3_REG_I2C_DEV_ADDR }, + { "None", CPLD3_REG_I2C_CMD_BYTE0 }, + { "None", CPLD3_REG_I2C_CMD_BYTE1 }, + { "None", CPLD3_REG_I2C_CMD_BYTE2 }, + { "None", CPLD3_REG_I2C_STATUS_RESET }, + { "None", CPLD3_REG_I2C_WRITE_DATA_BYTE0 }, + { "None", CPLD3_REG_I2C_WRITE_DATA_BYTE1 }, + { "None", CPLD3_REG_I2C_WRITE_DATA_BYTE2 }, + { "None", CPLD3_REG_I2C_WRITE_DATA_BYTE3 }, + { "None", CPLD3_REG_I2C_WRITE_DATA_BYTE4 }, + { "None", CPLD3_REG_I2C_WRITE_DATA_BYTE5 }, + { "None", CPLD3_REG_I2C_WRITE_DATA_BYTE6 }, + { "None", CPLD3_REG_I2C_WRITE_DATA_BYTE7 }, + { "None", CPLD3_REG_I2C_READ_DATA_BYTE0 }, + { "None", CPLD3_REG_I2C_READ_DATA_BYTE1 }, + { "None", CPLD3_REG_I2C_READ_DATA_BYTE2 }, + { "None", CPLD3_REG_I2C_READ_DATA_BYTE3 }, + { "None", CPLD3_REG_I2C_READ_DATA_BYTE4 }, + { "None", CPLD3_REG_I2C_READ_DATA_BYTE5 }, + { "None", CPLD3_REG_I2C_READ_DATA_BYTE6 }, + { "None", CPLD3_REG_I2C_READ_DATA_BYTE7 }, + { "None", CPLD3_REG_SFP_19_26_RX_LOS }, + { "None", CPLD3_REG_SFP_27_34_RX_LOS }, + { "None", CPLD3_REG_SFP_35_36_RX_LOS }, + { "None", CPLD3_REG_SFP_19_26_RX_LOS_INT }, + { "None", CPLD3_REG_SFP_27_34_RX_LOS_INT }, + { "None", CPLD3_REG_SFP_35_36_RX_LOS_INT }, + { "None", CPLD3_REG_SFP_19_26_RX_LOS_MASK }, + { "None", CPLD3_REG_SFP_27_34_RX_LOS_MASK }, + { "None", CPLD3_REG_SFP_35_36_RX_LOS_MASK }, + { "None", CPLD3_REG_SFP_19_26_TX_DISABLE }, + { "None", CPLD3_REG_SFP_27_34_TX_DISABLE }, + { "None", CPLD3_REG_SFP_35_36_TX_DISABLE }, + { "None", CPLD3_REG_SFP_19_26_RS_CONTROL }, + { "None", CPLD3_REG_SFP_27_34_RS_CONTROL }, + { "None", CPLD3_REG_SFP_35_36_RS_CONTROL }, + { "None", CPLD3_REG_SFP_19_26_TX_FAULT }, + { "None", CPLD3_REG_SFP_27_34_TX_FAULT }, + { "None", CPLD3_REG_SFP_35_36_TX_FAULT }, + { "None", CPLD3_REG_SFP_19_26_ABS_STATUS }, + { "None", CPLD3_REG_SFP_27_34_ABS_STATUS }, + { "None", CPLD3_REG_SFP_35_36_ABS_STATUS }, + { NULL, 0 } +}; + +const char* +cpld3_reg_name(cpld3_reg_t e) +{ + const char* name; + if(aim_map_si_i(&name, e, cpld3_reg_map, 0)) { + return name; + } + else { + return "-invalid value for enum type 'cpld3_reg'"; + } +} + +int +cpld3_reg_value(const char* str, cpld3_reg_t* e, int substr) +{ + int i; + AIM_REFERENCE(substr); + if(aim_map_si_s(&i, str, cpld3_reg_map, 0)) { + /* Enum Found */ + *e = i; + return 0; + } + else { + return -1; + } +} + +const char* +cpld3_reg_desc(cpld3_reg_t e) +{ + const char* name; + if(aim_map_si_i(&name, e, cpld3_reg_desc_map, 0)) { + return name; + } + else { + return "-invalid value for enum type 'cpld3_reg'"; + } +} + +int +cpld3_reg_valid(cpld3_reg_t e) +{ + return aim_map_si_i(NULL, e, cpld3_reg_map, 0) ? 1 : 0; +} + + +aim_map_si_t cpld4_reg_map[] = +{ + { "VERSION", CPLD4_REG_VERSION }, + { "SCRATCH", CPLD4_REG_SCRATCH }, + { "RESET_CONTROL", CPLD4_REG_RESET_CONTROL }, + { "LED_CONTROL", CPLD4_REG_LED_CONTROL }, + { "MISC_STATUS_CONTROL", CPLD4_REG_MISC_STATUS_CONTROL }, + { "INT_PORT_STATUS", CPLD4_REG_INT_PORT_STATUS }, + { "INT0_SOURCE_STATUS", CPLD4_REG_INT0_SOURCE_STATUS }, + { "INT1_SOURCE_STATUS", CPLD4_REG_INT1_SOURCE_STATUS }, + { "INT2_SOURCE_STATUS", CPLD4_REG_INT2_SOURCE_STATUS }, + { "INT0_SOURCE_INT", CPLD4_REG_INT0_SOURCE_INT }, + { "INT1_SOURCE_INT", CPLD4_REG_INT1_SOURCE_INT }, + { "INT2_SOURCE_INT", CPLD4_REG_INT2_SOURCE_INT }, + { "INT0_SOURCE_MASK", CPLD4_REG_INT0_SOURCE_MASK }, + { "INT1_SOURCE_MASK", CPLD4_REG_INT1_SOURCE_MASK }, + { "INT2_SOURCE_MASK", CPLD4_REG_INT2_SOURCE_MASK }, + { "I2C_PORT_ID", CPLD4_REG_I2C_PORT_ID }, + { "I2C_OP_CODE", CPLD4_REG_I2C_OP_CODE }, + { "I2C_DEV_ADDR", CPLD4_REG_I2C_DEV_ADDR }, + { "I2C_COMMAND_BYTE0", CPLD4_REG_I2C_COMMAND_BYTE0 }, + { "I2C_COMMAND_BYTE1", CPLD4_REG_I2C_COMMAND_BYTE1 }, + { "I2C_COMMAND_BYTE2", CPLD4_REG_I2C_COMMAND_BYTE2 }, + { "I2C_STATUS_RESET", CPLD4_REG_I2C_STATUS_RESET }, + { "I2C_WRITE_DATA_BYTE0", CPLD4_REG_I2C_WRITE_DATA_BYTE0 }, + { "I2C_WRITE_DATA_BYTE1", CPLD4_REG_I2C_WRITE_DATA_BYTE1 }, + { "I2C_WRITE_DATA_BYTE2", CPLD4_REG_I2C_WRITE_DATA_BYTE2 }, + { "I2C_WRITE_DATA_BYTE3", CPLD4_REG_I2C_WRITE_DATA_BYTE3 }, + { "I2C_WRITE_DATA_BYTE4", CPLD4_REG_I2C_WRITE_DATA_BYTE4 }, + { "I2C_WRITE_DATA_BYTE5", CPLD4_REG_I2C_WRITE_DATA_BYTE5 }, + { "I2C_WRITE_DATA_BYTE6", CPLD4_REG_I2C_WRITE_DATA_BYTE6 }, + { "I2C_WRITE_DATA_BYTE7", CPLD4_REG_I2C_WRITE_DATA_BYTE7 }, + { "I2C_READ_DATA_BYTE0", CPLD4_REG_I2C_READ_DATA_BYTE0 }, + { "I2C_READ_DATA_BYTE1", CPLD4_REG_I2C_READ_DATA_BYTE1 }, + { "I2C_READ_DATA_BYTE2", CPLD4_REG_I2C_READ_DATA_BYTE2 }, + { "I2C_READ_DATA_BYTE3", CPLD4_REG_I2C_READ_DATA_BYTE3 }, + { "I2C_READ_DATA_BYTE4", CPLD4_REG_I2C_READ_DATA_BYTE4 }, + { "I2C_READ_DATA_BYTE5", CPLD4_REG_I2C_READ_DATA_BYTE5 }, + { "I2C_READ_DATA_BYTE6", CPLD4_REG_I2C_READ_DATA_BYTE6 }, + { "I2C_READ_DATA_BYTE7", CPLD4_REG_I2C_READ_DATA_BYTE7 }, + { "QSFP_RESET_CONTROL", CPLD4_REG_QSFP_RESET_CONTROL }, + { "QSFP_LPMOD_CONTROL", CPLD4_REG_QSFP_LPMOD_CONTROL }, + { "QSFP_ABS_STATUS", CPLD4_REG_QSFP_ABS_STATUS }, + { "QSFP_INT_STATUS", CPLD4_REG_QSFP_INT_STATUS }, + { "QSFP_I2C_READY", CPLD4_REG_QSFP_I2C_READY }, + { NULL, 0 } +}; + +aim_map_si_t cpld4_reg_desc_map[] = +{ + { "None", CPLD4_REG_VERSION }, + { "None", CPLD4_REG_SCRATCH }, + { "None", CPLD4_REG_RESET_CONTROL }, + { "None", CPLD4_REG_LED_CONTROL }, + { "None", CPLD4_REG_MISC_STATUS_CONTROL }, + { "None", CPLD4_REG_INT_PORT_STATUS }, + { "None", CPLD4_REG_INT0_SOURCE_STATUS }, + { "None", CPLD4_REG_INT1_SOURCE_STATUS }, + { "None", CPLD4_REG_INT2_SOURCE_STATUS }, + { "None", CPLD4_REG_INT0_SOURCE_INT }, + { "None", CPLD4_REG_INT1_SOURCE_INT }, + { "None", CPLD4_REG_INT2_SOURCE_INT }, + { "None", CPLD4_REG_INT0_SOURCE_MASK }, + { "None", CPLD4_REG_INT1_SOURCE_MASK }, + { "None", CPLD4_REG_INT2_SOURCE_MASK }, + { "None", CPLD4_REG_I2C_PORT_ID }, + { "None", CPLD4_REG_I2C_OP_CODE }, + { "None", CPLD4_REG_I2C_DEV_ADDR }, + { "None", CPLD4_REG_I2C_COMMAND_BYTE0 }, + { "None", CPLD4_REG_I2C_COMMAND_BYTE1 }, + { "None", CPLD4_REG_I2C_COMMAND_BYTE2 }, + { "None", CPLD4_REG_I2C_STATUS_RESET }, + { "None", CPLD4_REG_I2C_WRITE_DATA_BYTE0 }, + { "None", CPLD4_REG_I2C_WRITE_DATA_BYTE1 }, + { "None", CPLD4_REG_I2C_WRITE_DATA_BYTE2 }, + { "None", CPLD4_REG_I2C_WRITE_DATA_BYTE3 }, + { "None", CPLD4_REG_I2C_WRITE_DATA_BYTE4 }, + { "None", CPLD4_REG_I2C_WRITE_DATA_BYTE5 }, + { "None", CPLD4_REG_I2C_WRITE_DATA_BYTE6 }, + { "None", CPLD4_REG_I2C_WRITE_DATA_BYTE7 }, + { "None", CPLD4_REG_I2C_READ_DATA_BYTE0 }, + { "None", CPLD4_REG_I2C_READ_DATA_BYTE1 }, + { "None", CPLD4_REG_I2C_READ_DATA_BYTE2 }, + { "None", CPLD4_REG_I2C_READ_DATA_BYTE3 }, + { "None", CPLD4_REG_I2C_READ_DATA_BYTE4 }, + { "None", CPLD4_REG_I2C_READ_DATA_BYTE5 }, + { "None", CPLD4_REG_I2C_READ_DATA_BYTE6 }, + { "None", CPLD4_REG_I2C_READ_DATA_BYTE7 }, + { "None", CPLD4_REG_QSFP_RESET_CONTROL }, + { "None", CPLD4_REG_QSFP_LPMOD_CONTROL }, + { "None", CPLD4_REG_QSFP_ABS_STATUS }, + { "None", CPLD4_REG_QSFP_INT_STATUS }, + { "None", CPLD4_REG_QSFP_I2C_READY }, + { NULL, 0 } +}; + +const char* +cpld4_reg_name(cpld4_reg_t e) +{ + const char* name; + if(aim_map_si_i(&name, e, cpld4_reg_map, 0)) { + return name; + } + else { + return "-invalid value for enum type 'cpld4_reg'"; + } +} + +int +cpld4_reg_value(const char* str, cpld4_reg_t* e, int substr) +{ + int i; + AIM_REFERENCE(substr); + if(aim_map_si_s(&i, str, cpld4_reg_map, 0)) { + /* Enum Found */ + *e = i; + return 0; + } + else { + return -1; + } +} + +const char* +cpld4_reg_desc(cpld4_reg_t e) +{ + const char* name; + if(aim_map_si_i(&name, e, cpld4_reg_desc_map, 0)) { + return name; + } + else { + return "-invalid value for enum type 'cpld4_reg'"; + } +} + +int +cpld4_reg_valid(cpld4_reg_t e) +{ + return aim_map_si_i(NULL, e, cpld4_reg_map, 0) ? 1 : 0; +} + + +aim_map_si_t cpld5_reg_map[] = +{ + { "VERSION", CPLD5_REG_VERSION }, + { "SCRATCH", CPLD5_REG_SCRATCH }, + { "I2C_PORT_ID", CPLD5_REG_I2C_PORT_ID }, + { "I2C_OP_CODE", CPLD5_REG_I2C_OP_CODE }, + { "I2C_DEV_ADDR", CPLD5_REG_I2C_DEV_ADDR }, + { "I2C_CMD_BYTE0", CPLD5_REG_I2C_CMD_BYTE0 }, + { "I2C_CMD_BYTE1", CPLD5_REG_I2C_CMD_BYTE1 }, + { "I2C_CMD_BYTE2", CPLD5_REG_I2C_CMD_BYTE2 }, + { "I2C_STATUS_RESET", CPLD5_REG_I2C_STATUS_RESET }, + { "I2C_WRITE_DATA_BYTE0", CPLD5_REG_I2C_WRITE_DATA_BYTE0 }, + { "I2C_WRITE_DATA_BYTE1", CPLD5_REG_I2C_WRITE_DATA_BYTE1 }, + { "I2C_WRITE_DATA_BYTE2", CPLD5_REG_I2C_WRITE_DATA_BYTE2 }, + { "I2C_WRITE_DATA_BYTE3", CPLD5_REG_I2C_WRITE_DATA_BYTE3 }, + { "I2C_WRITE_DATA_BYTE4", CPLD5_REG_I2C_WRITE_DATA_BYTE4 }, + { "I2C_WRITE_DATA_BYTE5", CPLD5_REG_I2C_WRITE_DATA_BYTE5 }, + { "I2C_WRITE_DATA_BYTE6", CPLD5_REG_I2C_WRITE_DATA_BYTE6 }, + { "I2C_WRITE_DATA_BYTE7", CPLD5_REG_I2C_WRITE_DATA_BYTE7 }, + { "I2C_READ_DATA_BYTE0", CPLD5_REG_I2C_READ_DATA_BYTE0 }, + { "I2C_READ_DATA_BYTE1", CPLD5_REG_I2C_READ_DATA_BYTE1 }, + { "I2C_READ_DATA_BYTE2", CPLD5_REG_I2C_READ_DATA_BYTE2 }, + { "I2C_READ_DATA_BYTE3", CPLD5_REG_I2C_READ_DATA_BYTE3 }, + { "I2C_READ_DATA_BYTE4", CPLD5_REG_I2C_READ_DATA_BYTE4 }, + { "I2C_READ_DATA_BYTE5", CPLD5_REG_I2C_READ_DATA_BYTE5 }, + { "I2C_READ_DATA_BYTE6", CPLD5_REG_I2C_READ_DATA_BYTE6 }, + { "I2C_READ_DATA_BYTE7", CPLD5_REG_I2C_READ_DATA_BYTE7 }, + { "SFP_37_44_RX_LOS", CPLD5_REG_SFP_37_44_RX_LOS }, + { "SFP_45_48_RX_LOS", CPLD5_REG_SFP_45_48_RX_LOS }, + { "SFP_37_44_RX_LOS_INT", CPLD5_REG_SFP_37_44_RX_LOS_INT }, + { "SFP_45_48_RX_LOS_INT", CPLD5_REG_SFP_45_48_RX_LOS_INT }, + { "SFP_37_44_RX_LOS_MASK", CPLD5_REG_SFP_37_44_RX_LOS_MASK }, + { "SFP_45_48_RX_LOS_MASK", CPLD5_REG_SFP_45_48_RX_LOS_MASK }, + { "SFP_37_44_TX_DISABLE", CPLD5_REG_SFP_37_44_TX_DISABLE }, + { "SFP_45_48_TX_DISABLE", CPLD5_REG_SFP_45_48_TX_DISABLE }, + { "SFP_37_44_RS_CONTROL", CPLD5_REG_SFP_37_44_RS_CONTROL }, + { "SFP_45_48_RS_CONTROL", CPLD5_REG_SFP_45_48_RS_CONTROL }, + { "SFP_37_44_TX_FAULT", CPLD5_REG_SFP_37_44_TX_FAULT }, + { "SFP_45_48_TX_FAULT", CPLD5_REG_SFP_45_48_TX_FAULT }, + { "SFP_37_44_ABS_STATUS", CPLD5_REG_SFP_37_44_ABS_STATUS }, + { "SFP_45_48_ABS_STATUS", CPLD5_REG_SFP_45_48_ABS_STATUS }, + { NULL, 0 } +}; + +aim_map_si_t cpld5_reg_desc_map[] = +{ + { "None", CPLD5_REG_VERSION }, + { "None", CPLD5_REG_SCRATCH }, + { "None", CPLD5_REG_I2C_PORT_ID }, + { "None", CPLD5_REG_I2C_OP_CODE }, + { "None", CPLD5_REG_I2C_DEV_ADDR }, + { "None", CPLD5_REG_I2C_CMD_BYTE0 }, + { "None", CPLD5_REG_I2C_CMD_BYTE1 }, + { "None", CPLD5_REG_I2C_CMD_BYTE2 }, + { "None", CPLD5_REG_I2C_STATUS_RESET }, + { "None", CPLD5_REG_I2C_WRITE_DATA_BYTE0 }, + { "None", CPLD5_REG_I2C_WRITE_DATA_BYTE1 }, + { "None", CPLD5_REG_I2C_WRITE_DATA_BYTE2 }, + { "None", CPLD5_REG_I2C_WRITE_DATA_BYTE3 }, + { "None", CPLD5_REG_I2C_WRITE_DATA_BYTE4 }, + { "None", CPLD5_REG_I2C_WRITE_DATA_BYTE5 }, + { "None", CPLD5_REG_I2C_WRITE_DATA_BYTE6 }, + { "None", CPLD5_REG_I2C_WRITE_DATA_BYTE7 }, + { "None", CPLD5_REG_I2C_READ_DATA_BYTE0 }, + { "None", CPLD5_REG_I2C_READ_DATA_BYTE1 }, + { "None", CPLD5_REG_I2C_READ_DATA_BYTE2 }, + { "None", CPLD5_REG_I2C_READ_DATA_BYTE3 }, + { "None", CPLD5_REG_I2C_READ_DATA_BYTE4 }, + { "None", CPLD5_REG_I2C_READ_DATA_BYTE5 }, + { "None", CPLD5_REG_I2C_READ_DATA_BYTE6 }, + { "None", CPLD5_REG_I2C_READ_DATA_BYTE7 }, + { "None", CPLD5_REG_SFP_37_44_RX_LOS }, + { "None", CPLD5_REG_SFP_45_48_RX_LOS }, + { "None", CPLD5_REG_SFP_37_44_RX_LOS_INT }, + { "None", CPLD5_REG_SFP_45_48_RX_LOS_INT }, + { "None", CPLD5_REG_SFP_37_44_RX_LOS_MASK }, + { "None", CPLD5_REG_SFP_45_48_RX_LOS_MASK }, + { "None", CPLD5_REG_SFP_37_44_TX_DISABLE }, + { "None", CPLD5_REG_SFP_45_48_TX_DISABLE }, + { "None", CPLD5_REG_SFP_37_44_RS_CONTROL }, + { "None", CPLD5_REG_SFP_45_48_RS_CONTROL }, + { "None", CPLD5_REG_SFP_37_44_TX_FAULT }, + { "None", CPLD5_REG_SFP_45_48_TX_FAULT }, + { "None", CPLD5_REG_SFP_37_44_ABS_STATUS }, + { "None", CPLD5_REG_SFP_45_48_ABS_STATUS }, + { NULL, 0 } +}; + +const char* +cpld5_reg_name(cpld5_reg_t e) +{ + const char* name; + if(aim_map_si_i(&name, e, cpld5_reg_map, 0)) { + return name; + } + else { + return "-invalid value for enum type 'cpld5_reg'"; + } +} + +int +cpld5_reg_value(const char* str, cpld5_reg_t* e, int substr) +{ + int i; + AIM_REFERENCE(substr); + if(aim_map_si_s(&i, str, cpld5_reg_map, 0)) { + /* Enum Found */ + *e = i; + return 0; + } + else { + return -1; + } +} + +const char* +cpld5_reg_desc(cpld5_reg_t e) +{ + const char* name; + if(aim_map_si_i(&name, e, cpld5_reg_desc_map, 0)) { + return name; + } + else { + return "-invalid value for enum type 'cpld5_reg'"; + } +} + +int +cpld5_reg_valid(cpld5_reg_t e) +{ + return aim_map_si_i(NULL, e, cpld5_reg_map, 0) ? 1 : 0; +} + +/* */ + diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/x86_64_cel_redstone_xp_int.h b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/x86_64_cel_redstone_xp_int.h new file mode 100644 index 00000000..27f57467 --- /dev/null +++ b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/x86_64_cel_redstone_xp_int.h @@ -0,0 +1,337 @@ +/**************************************************************************//** + * + * x86_64_cel_redstone_xp Internal Header + * + *****************************************************************************/ +#ifndef __X86_64_CEL_REDSTONE_XP_INT_H__ +#define __X86_64_CEL_REDSTONE_XP_INT_H__ + +#include + +/* */ +/** cpld1_reg */ +typedef enum cpld1_reg_e { + CPLD1_REG_VERSION = 256, + CPLD1_REG_SCRATCH = 257, + CPLD1_REG_RESET_CONTROL = 258, + CPLD1_REG_RESET_SOURCE = 259, + CPLD1_REG_BOARD_TYPE = 260, + CPLD1_REG_INT_PORT_STATUS = 272, + CPLD1_REG_INT0_SOURCE_STATUS = 273, + CPLD1_REG_INT0_SOURCE_INT = 274, + CPLD1_REG_INT0_SOURCE_MASK = 275, + CPLD1_REG_POWER_SUPPLY_STATUS = 288, + CPLD1_REG_POWER_GOOD_STATUS = 289, + CPLD1_REG_BPP_CONTROL = 290, + CPLD1_REG_WRITE_PROTECT_CONTROL = 291, + CPLD1_REG_MISC_STATUS_CONTROL = 292, + CPLD1_REG_INFO_RAM_ADDR_HIGH = 304, + CPLD1_REG_INFO_RAM_ADDR_LOW = 305, + CPLD1_REG_INFO_RAM_READ_DATA = 306, + CPLD1_REG_INFO_RAM_WRITE_DATA = 307, +} cpld1_reg_t; + +/** Enum names. */ +const char* cpld1_reg_name(cpld1_reg_t e); + +/** Enum values. */ +int cpld1_reg_value(const char* str, cpld1_reg_t* e, int substr); + +/** Enum descriptions. */ +const char* cpld1_reg_desc(cpld1_reg_t e); + +/** Enum validator. */ +int cpld1_reg_valid(cpld1_reg_t e); + +/** validator */ +#define CPLD1_REG_VALID(_e) \ + (cpld1_reg_valid((_e))) + +/** cpld1_reg_map table. */ +extern aim_map_si_t cpld1_reg_map[]; +/** cpld1_reg_desc_map table. */ +extern aim_map_si_t cpld1_reg_desc_map[]; + +/** cpld2_reg */ +typedef enum cpld2_reg_e { + CPLD2_REG_VERSION = 512, + CPLD2_REG_SCRATCH = 513, + CPLD2_REG_I2C_PORT_ID = 528, + CPLD2_REG_I2C_OP_CODE = 529, + CPLD2_REG_I2C_DEV_ADDR = 530, + CPLD2_REG_I2C_CMD_BYTE0 = 531, + CPLD2_REG_I2C_CMD_BYTE1 = 532, + CPLD2_REG_I2C_CMD_BYTE2 = 533, + CPLD2_REG_I2C_STATUS_RESET = 534, + CPLD2_REG_I2C_WRITE_DATA_BYTE0 = 544, + CPLD2_REG_I2C_WRITE_DATA_BYTE1 = 545, + CPLD2_REG_I2C_WRITE_DATA_BYTE2 = 546, + CPLD2_REG_I2C_WRITE_DATA_BYTE3 = 547, + CPLD2_REG_I2C_WRITE_DATA_BYTE4 = 548, + CPLD2_REG_I2C_WRITE_DATA_BYTE5 = 549, + CPLD2_REG_I2C_WRITE_DATA_BYTE6 = 550, + CPLD2_REG_I2C_WRITE_DATA_BYTE7 = 551, + CPLD2_REG_I2C_READ_DATA_BYTE0 = 560, + CPLD2_REG_I2C_READ_DATA_BYTE1 = 561, + CPLD2_REG_I2C_READ_DATA_BYTE2 = 562, + CPLD2_REG_I2C_READ_DATA_BYTE3 = 563, + CPLD2_REG_I2C_READ_DATA_BYTE4 = 564, + CPLD2_REG_I2C_READ_DATA_BYTE5 = 565, + CPLD2_REG_I2C_READ_DATA_BYTE6 = 566, + CPLD2_REG_I2C_READ_DATA_BYTE7 = 567, + CPLD2_REG_SFP_1_8_RX_LOS = 576, + CPLD2_REG_SFP_9_16_RX_LOS = 577, + CPLD2_REG_SFP_17_18_RX_LOS = 578, + CPLD2_REG_SFP_1_8_RX_LOS_INT = 579, + CPLD2_REG_SFP_9_16_RX_LOS_INT = 580, + CPLD2_REG_SFP_17_18_RX_LOS_INT = 581, + CPLD2_REG_SFP_1_8_RX_LOS_MASK = 582, + CPLD2_REG_SFP_9_16_RX_LOS_MASK = 583, + CPLD2_REG_SFP_17_18_RX_LOS_MASK = 584, + CPLD2_REG_SFP_1_8_TX_DISABLE = 592, + CPLD2_REG_SFP_9_16_TX_DISABLE = 593, + CPLD2_REG_SFP_17_18_TX_DISABLE = 594, + CPLD2_REG_SFP_1_8_RS_CONTROL = 595, + CPLD2_REG_SFP_9_16_RS_CONTROL = 596, + CPLD2_REG_SFP_17_18_RS_CONTROL = 597, + CPLD2_REG_SFP_1_8_TX_FAULT = 598, + CPLD2_REG_SFP_9_16_TX_FAULT = 599, + CPLD2_REG_SFP_17_18_TX_FAULT = 600, + CPLD2_REG_SFP_1_8_ABS_STATUS = 601, + CPLD2_REG_SFP_9_16_ABS_STATUS = 602, + CPLD2_REG_SFP_17_18_ABS_STATUS = 603, +} cpld2_reg_t; + +/** Enum names. */ +const char* cpld2_reg_name(cpld2_reg_t e); + +/** Enum values. */ +int cpld2_reg_value(const char* str, cpld2_reg_t* e, int substr); + +/** Enum descriptions. */ +const char* cpld2_reg_desc(cpld2_reg_t e); + +/** Enum validator. */ +int cpld2_reg_valid(cpld2_reg_t e); + +/** validator */ +#define CPLD2_REG_VALID(_e) \ + (cpld2_reg_valid((_e))) + +/** cpld2_reg_map table. */ +extern aim_map_si_t cpld2_reg_map[]; +/** cpld2_reg_desc_map table. */ +extern aim_map_si_t cpld2_reg_desc_map[]; + +/** cpld3_reg */ +typedef enum cpld3_reg_e { + CPLD3_REG_VERSION = 640, + CPLD3_REG_SCRATCH = 641, + CPLD3_REG_I2C_PORT_ID = 656, + CPLD3_REG_I2C_OP_CODE = 657, + CPLD3_REG_I2C_DEV_ADDR = 658, + CPLD3_REG_I2C_CMD_BYTE0 = 659, + CPLD3_REG_I2C_CMD_BYTE1 = 660, + CPLD3_REG_I2C_CMD_BYTE2 = 661, + CPLD3_REG_I2C_STATUS_RESET = 662, + CPLD3_REG_I2C_WRITE_DATA_BYTE0 = 672, + CPLD3_REG_I2C_WRITE_DATA_BYTE1 = 673, + CPLD3_REG_I2C_WRITE_DATA_BYTE2 = 674, + CPLD3_REG_I2C_WRITE_DATA_BYTE3 = 675, + CPLD3_REG_I2C_WRITE_DATA_BYTE4 = 676, + CPLD3_REG_I2C_WRITE_DATA_BYTE5 = 677, + CPLD3_REG_I2C_WRITE_DATA_BYTE6 = 678, + CPLD3_REG_I2C_WRITE_DATA_BYTE7 = 679, + CPLD3_REG_I2C_READ_DATA_BYTE0 = 688, + CPLD3_REG_I2C_READ_DATA_BYTE1 = 689, + CPLD3_REG_I2C_READ_DATA_BYTE2 = 690, + CPLD3_REG_I2C_READ_DATA_BYTE3 = 691, + CPLD3_REG_I2C_READ_DATA_BYTE4 = 692, + CPLD3_REG_I2C_READ_DATA_BYTE5 = 693, + CPLD3_REG_I2C_READ_DATA_BYTE6 = 694, + CPLD3_REG_I2C_READ_DATA_BYTE7 = 695, + CPLD3_REG_SFP_19_26_RX_LOS = 704, + CPLD3_REG_SFP_27_34_RX_LOS = 705, + CPLD3_REG_SFP_35_36_RX_LOS = 706, + CPLD3_REG_SFP_19_26_RX_LOS_INT = 707, + CPLD3_REG_SFP_27_34_RX_LOS_INT = 708, + CPLD3_REG_SFP_35_36_RX_LOS_INT = 709, + CPLD3_REG_SFP_19_26_RX_LOS_MASK = 710, + CPLD3_REG_SFP_27_34_RX_LOS_MASK = 711, + CPLD3_REG_SFP_35_36_RX_LOS_MASK = 712, + CPLD3_REG_SFP_19_26_TX_DISABLE = 720, + CPLD3_REG_SFP_27_34_TX_DISABLE = 721, + CPLD3_REG_SFP_35_36_TX_DISABLE = 722, + CPLD3_REG_SFP_19_26_RS_CONTROL = 723, + CPLD3_REG_SFP_27_34_RS_CONTROL = 724, + CPLD3_REG_SFP_35_36_RS_CONTROL = 725, + CPLD3_REG_SFP_19_26_TX_FAULT = 726, + CPLD3_REG_SFP_27_34_TX_FAULT = 727, + CPLD3_REG_SFP_35_36_TX_FAULT = 728, + CPLD3_REG_SFP_19_26_ABS_STATUS = 729, + CPLD3_REG_SFP_27_34_ABS_STATUS = 730, + CPLD3_REG_SFP_35_36_ABS_STATUS = 731, +} cpld3_reg_t; + +/** Enum names. */ +const char* cpld3_reg_name(cpld3_reg_t e); + +/** Enum values. */ +int cpld3_reg_value(const char* str, cpld3_reg_t* e, int substr); + +/** Enum descriptions. */ +const char* cpld3_reg_desc(cpld3_reg_t e); + +/** Enum validator. */ +int cpld3_reg_valid(cpld3_reg_t e); + +/** validator */ +#define CPLD3_REG_VALID(_e) \ + (cpld3_reg_valid((_e))) + +/** cpld3_reg_map table. */ +extern aim_map_si_t cpld3_reg_map[]; +/** cpld3_reg_desc_map table. */ +extern aim_map_si_t cpld3_reg_desc_map[]; + +/** cpld4_reg */ +typedef enum cpld4_reg_e { + CPLD4_REG_VERSION = 768, + CPLD4_REG_SCRATCH = 769, + CPLD4_REG_RESET_CONTROL = 770, + CPLD4_REG_LED_CONTROL = 771, + CPLD4_REG_MISC_STATUS_CONTROL = 772, + CPLD4_REG_INT_PORT_STATUS = 773, + CPLD4_REG_INT0_SOURCE_STATUS = 774, + CPLD4_REG_INT1_SOURCE_STATUS = 775, + CPLD4_REG_INT2_SOURCE_STATUS = 776, + CPLD4_REG_INT0_SOURCE_INT = 777, + CPLD4_REG_INT1_SOURCE_INT = 778, + CPLD4_REG_INT2_SOURCE_INT = 779, + CPLD4_REG_INT0_SOURCE_MASK = 780, + CPLD4_REG_INT1_SOURCE_MASK = 781, + CPLD4_REG_INT2_SOURCE_MASK = 782, + CPLD4_REG_I2C_PORT_ID = 784, + CPLD4_REG_I2C_OP_CODE = 785, + CPLD4_REG_I2C_DEV_ADDR = 786, + CPLD4_REG_I2C_COMMAND_BYTE0 = 787, + CPLD4_REG_I2C_COMMAND_BYTE1 = 788, + CPLD4_REG_I2C_COMMAND_BYTE2 = 789, + CPLD4_REG_I2C_STATUS_RESET = 790, + CPLD4_REG_I2C_WRITE_DATA_BYTE0 = 800, + CPLD4_REG_I2C_WRITE_DATA_BYTE1 = 801, + CPLD4_REG_I2C_WRITE_DATA_BYTE2 = 802, + CPLD4_REG_I2C_WRITE_DATA_BYTE3 = 803, + CPLD4_REG_I2C_WRITE_DATA_BYTE4 = 804, + CPLD4_REG_I2C_WRITE_DATA_BYTE5 = 805, + CPLD4_REG_I2C_WRITE_DATA_BYTE6 = 806, + CPLD4_REG_I2C_WRITE_DATA_BYTE7 = 807, + CPLD4_REG_I2C_READ_DATA_BYTE0 = 816, + CPLD4_REG_I2C_READ_DATA_BYTE1 = 817, + CPLD4_REG_I2C_READ_DATA_BYTE2 = 818, + CPLD4_REG_I2C_READ_DATA_BYTE3 = 819, + CPLD4_REG_I2C_READ_DATA_BYTE4 = 820, + CPLD4_REG_I2C_READ_DATA_BYTE5 = 821, + CPLD4_REG_I2C_READ_DATA_BYTE6 = 822, + CPLD4_REG_I2C_READ_DATA_BYTE7 = 823, + CPLD4_REG_QSFP_RESET_CONTROL = 864, + CPLD4_REG_QSFP_LPMOD_CONTROL = 865, + CPLD4_REG_QSFP_ABS_STATUS = 866, + CPLD4_REG_QSFP_INT_STATUS = 867, + CPLD4_REG_QSFP_I2C_READY = 868, +} cpld4_reg_t; + +/** Enum names. */ +const char* cpld4_reg_name(cpld4_reg_t e); + +/** Enum values. */ +int cpld4_reg_value(const char* str, cpld4_reg_t* e, int substr); + +/** Enum descriptions. */ +const char* cpld4_reg_desc(cpld4_reg_t e); + +/** Enum validator. */ +int cpld4_reg_valid(cpld4_reg_t e); + +/** validator */ +#define CPLD4_REG_VALID(_e) \ + (cpld4_reg_valid((_e))) + +/** cpld4_reg_map table. */ +extern aim_map_si_t cpld4_reg_map[]; +/** cpld4_reg_desc_map table. */ +extern aim_map_si_t cpld4_reg_desc_map[]; + +/** cpld5_reg */ +typedef enum cpld5_reg_e { + CPLD5_REG_VERSION = 896, + CPLD5_REG_SCRATCH = 897, + CPLD5_REG_I2C_PORT_ID = 912, + CPLD5_REG_I2C_OP_CODE = 913, + CPLD5_REG_I2C_DEV_ADDR = 914, + CPLD5_REG_I2C_CMD_BYTE0 = 915, + CPLD5_REG_I2C_CMD_BYTE1 = 916, + CPLD5_REG_I2C_CMD_BYTE2 = 917, + CPLD5_REG_I2C_STATUS_RESET = 918, + CPLD5_REG_I2C_WRITE_DATA_BYTE0 = 928, + CPLD5_REG_I2C_WRITE_DATA_BYTE1 = 929, + CPLD5_REG_I2C_WRITE_DATA_BYTE2 = 930, + CPLD5_REG_I2C_WRITE_DATA_BYTE3 = 931, + CPLD5_REG_I2C_WRITE_DATA_BYTE4 = 932, + CPLD5_REG_I2C_WRITE_DATA_BYTE5 = 933, + CPLD5_REG_I2C_WRITE_DATA_BYTE6 = 934, + CPLD5_REG_I2C_WRITE_DATA_BYTE7 = 935, + CPLD5_REG_I2C_READ_DATA_BYTE0 = 944, + CPLD5_REG_I2C_READ_DATA_BYTE1 = 945, + CPLD5_REG_I2C_READ_DATA_BYTE2 = 946, + CPLD5_REG_I2C_READ_DATA_BYTE3 = 947, + CPLD5_REG_I2C_READ_DATA_BYTE4 = 948, + CPLD5_REG_I2C_READ_DATA_BYTE5 = 949, + CPLD5_REG_I2C_READ_DATA_BYTE6 = 950, + CPLD5_REG_I2C_READ_DATA_BYTE7 = 951, + CPLD5_REG_SFP_37_44_RX_LOS = 960, + CPLD5_REG_SFP_45_48_RX_LOS = 961, + CPLD5_REG_SFP_37_44_RX_LOS_INT = 962, + CPLD5_REG_SFP_45_48_RX_LOS_INT = 963, + CPLD5_REG_SFP_37_44_RX_LOS_MASK = 964, + CPLD5_REG_SFP_45_48_RX_LOS_MASK = 965, + CPLD5_REG_SFP_37_44_TX_DISABLE = 976, + CPLD5_REG_SFP_45_48_TX_DISABLE = 977, + CPLD5_REG_SFP_37_44_RS_CONTROL = 978, + CPLD5_REG_SFP_45_48_RS_CONTROL = 979, + CPLD5_REG_SFP_37_44_TX_FAULT = 980, + CPLD5_REG_SFP_45_48_TX_FAULT = 981, + CPLD5_REG_SFP_37_44_ABS_STATUS = 982, + CPLD5_REG_SFP_45_48_ABS_STATUS = 983, +} cpld5_reg_t; + +/** Enum names. */ +const char* cpld5_reg_name(cpld5_reg_t e); + +/** Enum values. */ +int cpld5_reg_value(const char* str, cpld5_reg_t* e, int substr); + +/** Enum descriptions. */ +const char* cpld5_reg_desc(cpld5_reg_t e); + +/** Enum validator. */ +int cpld5_reg_valid(cpld5_reg_t e); + +/** validator */ +#define CPLD5_REG_VALID(_e) \ + (cpld5_reg_valid((_e))) + +/** cpld5_reg_map table. */ +extern aim_map_si_t cpld5_reg_map[]; +/** cpld5_reg_desc_map table. */ +extern aim_map_si_t cpld5_reg_desc_map[]; +/* */ + +#define CEL_REDSTONE_MAX_PORT 54 +#define ALL_SFP_I2C_ADDRESS (0xA0 >> 1) +#define ALL_SFP_DIAG_I2C_ADDRESS (0xA2 >> 1) +#define SFP_XFP_LOS_ADDR 110 +#define SFP_XFP_LOS_SIZE 1 +#define QSFP_LOS_ADDR 3 + +#endif /* __X86_64_CEL_REDSTONE_XP_INT_H__ */ diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/x86_64_cel_redstone_xp_log.c b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/x86_64_cel_redstone_xp_log.c new file mode 100644 index 00000000..363c1170 --- /dev/null +++ b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/x86_64_cel_redstone_xp_log.c @@ -0,0 +1,18 @@ +/**************************************************************************//** + * + * + * + *****************************************************************************/ +#include + +#include "x86_64_cel_redstone_xp_log.h" +/* + * x86_64_cel_redstone_xp log struct. + */ +AIM_LOG_STRUCT_DEFINE( + X86_64_CEL_REDSTONE_XP_CONFIG_LOG_OPTIONS_DEFAULT, + X86_64_CEL_REDSTONE_XP_CONFIG_LOG_BITS_DEFAULT, + NULL, /* Custom log map */ + X86_64_CEL_REDSTONE_XP_CONFIG_LOG_CUSTOM_BITS_DEFAULT + ); + diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/x86_64_cel_redstone_xp_log.h b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/x86_64_cel_redstone_xp_log.h new file mode 100644 index 00000000..03a5649b --- /dev/null +++ b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/x86_64_cel_redstone_xp_log.h @@ -0,0 +1,12 @@ +/**************************************************************************//** + * + * + * + *****************************************************************************/ +#ifndef __X86_64_CEL_REDSTONE_XP_LOG_H__ +#define __X86_64_CEL_REDSTONE_XP_LOG_H__ + +#define AIM_LOG_MODULE_NAME x86_64_cel_redstone_xp +#include + +#endif /* __X86_64_CEL_REDSTONE_XP_LOG_H__ */ diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/x86_64_cel_redstone_xp_module.c b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/x86_64_cel_redstone_xp_module.c new file mode 100644 index 00000000..6c337ad5 --- /dev/null +++ b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/x86_64_cel_redstone_xp_module.c @@ -0,0 +1,24 @@ +/**************************************************************************//** + * + * + * + *****************************************************************************/ +#include + +#include "x86_64_cel_redstone_xp_log.h" + +static int +datatypes_init__(void) +{ +#define X86_64_CEL_REDSTONE_XP_ENUMERATION_ENTRY(_enum_name, _desc) AIM_DATATYPE_MAP_REGISTER(_enum_name, _enum_name##_map, _desc, AIM_LOG_INTERNAL); +#include + return 0; +} + +void __x86_64_cel_redstone_xp_module_init__(void) +{ + AIM_LOG_STRUCT_REGISTER(); + datatypes_init__(); +} + +int __onlp_platform_version__ = 1; diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/x86_64_cel_redstone_xp_ucli.c b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/x86_64_cel_redstone_xp_ucli.c new file mode 100644 index 00000000..97a4473c --- /dev/null +++ b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/x86_64_cel_redstone_xp_ucli.c @@ -0,0 +1,50 @@ +/**************************************************************************//** + * + * + * + *****************************************************************************/ +#include + +#if X86_64_CEL_REDSTONE_XP_CONFIG_INCLUDE_UCLI == 1 + +#include +#include +#include + +static ucli_status_t +x86_64_cel_redstone_xp_ucli_ucli__config__(ucli_context_t* uc) +{ + UCLI_HANDLER_MACRO_MODULE_CONFIG(x86_64_cel_redstone_xp) +} + +/* */ +/* */ + +static ucli_module_t +x86_64_cel_redstone_xp_ucli_module__ = + { + "x86_64_cel_redstone_xp_ucli", + NULL, + x86_64_cel_redstone_xp_ucli_ucli_handlers__, + NULL, + NULL, + }; + +ucli_node_t* +x86_64_cel_redstone_xp_ucli_node_create(void) +{ + ucli_node_t* n; + ucli_module_init(&x86_64_cel_redstone_xp_ucli_module__); + n = ucli_node_create("x86_64_cel_redstone_xp", NULL, &x86_64_cel_redstone_xp_ucli_module__); + ucli_node_subnode_add(n, ucli_module_log_node_create("x86_64_cel_redstone_xp")); + return n; +} + +#else +void* +x86_64_cel_redstone_xp_ucli_node_create(void) +{ + return NULL; +} +#endif + From 9955252eef36c1462e308649c670dae85e6c1536 Mon Sep 17 00:00:00 2001 From: Sridhar Pitchai Date: Sat, 29 Oct 2016 08:00:52 -0700 Subject: [PATCH 3/3] Addressing review comments version 0.1 --- .../onlp/builds/src/module/src/cplds.h | 12 ----- .../onlp/builds/src/module/src/i2c_chips.c | 46 +++++++++---------- .../onlp/builds/src/module/src/platform.h | 6 +-- .../module/src/{cplds.c => redstone_cpld.c} | 7 +-- .../module/src/{cpld.h => redstone_cpld.h} | 14 ++++-- .../onlp/builds/src/module/src/sfpi.c | 2 +- .../onlp/builds/src/module/src/sys_eeprom.c | 2 +- .../onlp/builds/src/module/src/sysi.c | 2 +- 8 files changed, 39 insertions(+), 52 deletions(-) delete mode 100644 packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/cplds.h rename packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/{cplds.c => redstone_cpld.c} (98%) rename packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/{cpld.h => redstone_cpld.h} (81%) diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/cplds.h b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/cplds.h deleted file mode 100644 index e0f7db06..00000000 --- a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/cplds.h +++ /dev/null @@ -1,12 +0,0 @@ -#ifndef __CPLDS_H__ -#define __CPLDS_H__ - -int cpld_io_init(void); -int cpld_read(int addr); -void cpld_write(int addr, uint8_t value); -void cpld_modify(int addr, uint8_t andmask, uint8_t ormask); -int cpld_dump(aim_pvs_t* pvs, int cpldid); - -#endif /* __CPLDS_H__ */ - - diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/i2c_chips.c b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/i2c_chips.c index f2928b46..84b1cfc6 100644 --- a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/i2c_chips.c +++ b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/i2c_chips.c @@ -10,11 +10,10 @@ #include -#include "cpld.h" #include "i2c_dev.h" #include "i2c_chips.h" +#include "redstone_cpld.h" -//#define PSOC_TAKE_I2C #define PSOC_CTRL_SMBUS 0x01 static struct ts_info ts[] = { @@ -36,36 +35,33 @@ static const struct dev_info i2c_dev[NUM_CHIPS] = { #define FANGROUP_NUM 4 static const struct fan_config fan[FAN_NUM] = { - {0x4D, 0x4E, 0x40},//Fan 1 Front - {0x2E, 0x4E, 0x40},//Fan 1 Rear - {0x4D, 0x6E, 0x60},//Fan 2 F - {0x2e, 0x3E, 0x30},//Fan 2 R - {0x4D, 0x5E, 0x50},//Fan 3 F - {0x2E, 0x7E, 0x70},//Fan 3 R - {0x4D, 0x3E, 0x30},//Fan 4 F - {0x2E, 0x5E, 0x50},//Fan 4 R + {0x4D, 0x4E, 0x40}, //Fan 1 Front + {0x2E, 0x4E, 0x40}, //Fan 1 Rear + {0x4D, 0x6E, 0x60}, //Fan 2 F + {0x2e, 0x3E, 0x30}, //Fan 2 R + {0x4D, 0x5E, 0x50}, //Fan 3 F + {0x2E, 0x7E, 0x70}, //Fan 3 R + {0x4D, 0x3E, 0x30}, //Fan 4 F + {0x2E, 0x5E, 0x50}, //Fan 4 R }; static struct led_gpio ledGpio[] = { - {32, 31},//4_0,3_7, gpio(x_y) = x*8+y - {30, 29},//3_6,3_5 - /*{36, 35},//4_4,4_3 For smallstone*/ - {38, 37},//4_6,4_5 - {34, 33},//4_2,4_1 + {32, 31}, //4_0,3_7, gpio(x_y) = x*8+y + {30, 29}, //3_6,3_5 + {38, 37}, //4_6,4_5 + {34, 33}, //4_2,4_1 }; static unsigned char airFlowGpio[] = { - 16,//IO2_0 gpio = 2*8+0, gpio(x_y) = x*8+y - 15,//IO1_7 - /*18,//IO2_2 //For smallstone */ - 19,//IO2_3 - 17,//IO2_1 + 16, //IO2_0 gpio = 2*8+0, gpio(x_y) = x*8+y + 15, //IO1_7 + 19, //IO2_3 + 17, //IO2_1 }; static unsigned char presentGpio[] = { - 11,//IO1_3 gpio = 2*8+0, gpio(x_y) = x*8+y - 10,//IO1_2 - /* 13,//IO1_5 //For smallstone */ - 14,//IO1_6 - 12,//IO1_4 + 11, //IO1_3 gpio = 2*8+0, gpio(x_y) = x*8+y + 10, //IO1_2 + 14, //IO1_6 + 12, //IO1_4 }; static int has_been_read = 0; diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/platform.h b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/platform.h index d215ff20..8753f424 100644 --- a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/platform.h +++ b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/platform.h @@ -1,5 +1,5 @@ -#ifndef CPLD_H -#define CPLD_H +#ifndef _PLATFORM_REDSTONE_H_ +#define _PLATFORM_REDSTONE_H_ #define FAN_COUNT 10 #define PSU_FAN 8 @@ -25,4 +25,4 @@ #define LED_PSU_1 9 #define LED_PSU_2 10 -#endif +#endif /* _PLATFORM_REDSTONE_H_ */ diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/cplds.c b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/redstone_cpld.c similarity index 98% rename from packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/cplds.c rename to packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/redstone_cpld.c index d9c6e1ae..f70b3178 100644 --- a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/cplds.c +++ b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/redstone_cpld.c @@ -5,7 +5,7 @@ #include #include "x86_64_cel_redstone_xp_log.h" #include "x86_64_cel_redstone_xp_int.h" -#include "cplds.h" +#include "redstone_cpld.h" int cpld_io_init(void) @@ -78,7 +78,6 @@ cpld_dump(aim_pvs_t* pvs, int cpldid) } -// EXPERIMENT #define PORT_BANK1_START 1 #define PORT_BANK1_END 18 #define PORT_BANK2_START 19 @@ -209,9 +208,7 @@ read_sfp(int portID, char devAddr, char reg, char *data, int len) outb(reg, ioBase + cmdbyte0); } } -// FIXME return writedata * 0; -// return 0; } int @@ -320,8 +317,6 @@ write_sfp(int portID, char devAddr, char reg, char *data, int len) outb(ioBase + cmdbyte0, reg); } } -// FIXME return writedata * readdata * 0; -// return 0; } diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/cpld.h b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/redstone_cpld.h similarity index 81% rename from packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/cpld.h rename to packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/redstone_cpld.h index 3b73e3cd..2dffc7b2 100644 --- a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/cpld.h +++ b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/redstone_cpld.h @@ -1,6 +1,8 @@ -#ifndef CPLD_H -#define CPLD_H +#ifndef _REDSTONE_CPLD_H_ +#define _REDSTONE_CPLD_H_ +#include +#include #include #define BIT0 0x1 @@ -58,4 +60,10 @@ int write_cpld(int reg, unsigned char value); int read_sfp(int portID, char devAddr, char reg, char *data, int len); int write_sfp(int portID, char devAddr, char reg, char *data, int len); -#endif +int cpld_io_init(void); +int cpld_read(int addr); +void cpld_write(int addr, uint8_t value); +void cpld_modify(int addr, uint8_t andmask, uint8_t ormask); +int cpld_dump(aim_pvs_t* pvs, int cpldid); + +#endif /* _REDSTONE_CPLD_H_ */ diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/sfpi.c b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/sfpi.c index 5f0ed0d8..f4764ed5 100644 --- a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/sfpi.c +++ b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/sfpi.c @@ -6,7 +6,7 @@ #include #include -#include "cpld.h" +#include "redstone_cpld.h" #include "x86_64_cel_redstone_xp_int.h" #include "sfp_xfp.h" diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/sys_eeprom.c b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/sys_eeprom.c index bd07caa9..488937cd 100644 --- a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/sys_eeprom.c +++ b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/sys_eeprom.c @@ -6,9 +6,9 @@ #include #include "sys_eeprom.h" -#include "cpld.h" #include "i2c_chips.h" #include "i2c_dev.h" +#include "redstone_cpld.h" static inline u_int8_t is_valid_tlvinfo_header(tlvinfo_header_t *hdr) { diff --git a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/sysi.c b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/sysi.c index 98fe0b73..c3bf8bc1 100644 --- a/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/sysi.c +++ b/packages/platforms/celestica/x86-64/x86-64-cel-redstone-xp/onlp/builds/src/module/src/sysi.c @@ -8,8 +8,8 @@ #include "x86_64_cel_redstone_xp_log.h" #include "platform.h" -#include "cplds.h" #include "sys_eeprom.h" +#include "redstone_cpld.h" const char* onlp_sysi_platform_get(void)