diff --git a/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/.gitignore b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/.gitignore new file mode 100755 index 00000000..9f7b1342 --- /dev/null +++ b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/.gitignore @@ -0,0 +1 @@ +onlpdump.mk diff --git a/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/Makefile b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/Makefile new file mode 100755 index 00000000..003238cf --- /dev/null +++ b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/modules/Makefile b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/modules/Makefile new file mode 100755 index 00000000..003238cf --- /dev/null +++ b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/modules/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/modules/PKG.yml b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/modules/PKG.yml new file mode 100755 index 00000000..23adefed --- /dev/null +++ b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/modules/PKG.yml @@ -0,0 +1 @@ +!include $ONL_TEMPLATES/no-platform-modules.yml ARCH=amd64 VENDOR=ingrasys BASENAME=x86-64-ingrasys-s9180-32x KERNELS="onl-kernel-3.16-lts-x86-64-all:amd64" diff --git a/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/Makefile b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/Makefile new file mode 100755 index 00000000..003238cf --- /dev/null +++ b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/PKG.yml b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/PKG.yml new file mode 100755 index 00000000..c87e02d4 --- /dev/null +++ b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/PKG.yml @@ -0,0 +1 @@ +!include $ONL_TEMPLATES/onlp-platform-any.yml PLATFORM=x86-64-ingrasys-s9180-32x ARCH=amd64 TOOLCHAIN=x86_64-linux-gnu diff --git a/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/builds/Makefile b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/builds/Makefile new file mode 100755 index 00000000..e7437cb2 --- /dev/null +++ b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/builds/Makefile @@ -0,0 +1,2 @@ +FILTER=src +include $(ONL)/make/subdirs.mk diff --git a/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/builds/lib/Makefile b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/builds/lib/Makefile new file mode 100755 index 00000000..cafc27df --- /dev/null +++ b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/builds/lib/Makefile @@ -0,0 +1,45 @@ +############################################################ +# +# +# Copyright 2014 BigSwitch Networks, Inc. +# +# Licensed under the Eclipse Public License, Version 1.0 (the +# "License"); you may not use this file except in compliance +# with the License. You may obtain a copy of the License at +# +# http://www.eclipse.org/legal/epl-v10.html +# +# Unless required by applicable law or agreed to in writing, +# software distributed under the License is distributed on an +# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, +# either express or implied. See the License for the specific +# language governing permissions and limitations under the +# License. +# +# +############################################################ +# +# +############################################################ +include $(ONL)/make/config.amd64.mk + +MODULE := libonlp-x86-64-ingrasys-s9180-32x +include $(BUILDER)/standardinit.mk + +DEPENDMODULES := AIM IOF x86_64_ingrasys_s9180_32x onlplib +DEPENDMODULE_HEADERS := sff + +include $(BUILDER)/dependmodules.mk + +SHAREDLIB := libonlp-x86-64-ingrasys-s9180-32x.so +$(SHAREDLIB)_TARGETS := $(ALL_TARGETS) +include $(BUILDER)/so.mk +.DEFAULT_GOAL := $(SHAREDLIB) + +GLOBAL_CFLAGS += -I$(onlp_BASEDIR)/module/inc +GLOBAL_CFLAGS += -DAIM_CONFIG_INCLUDE_MODULES_INIT=1 +GLOBAL_CFLAGS += -fPIC +GLOBAL_LINK_LIBS += -lpthread + +include $(BUILDER)/targets.mk + diff --git a/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/builds/onlpdump/Makefile b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/builds/onlpdump/Makefile new file mode 100755 index 00000000..399c4b02 --- /dev/null +++ b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/builds/onlpdump/Makefile @@ -0,0 +1,45 @@ +############################################################ +# +# +# Copyright 2014 BigSwitch Networks, Inc. +# +# Licensed under the Eclipse Public License, Version 1.0 (the +# "License"); you may not use this file except in compliance +# with the License. You may obtain a copy of the License at +# +# http://www.eclipse.org/legal/epl-v10.html +# +# Unless required by applicable law or agreed to in writing, +# software distributed under the License is distributed on an +# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, +# either express or implied. See the License for the specific +# language governing permissions and limitations under the +# License. +# +# +############################################################ +# +# +# +############################################################ +include $(ONL)/make/config.amd64.mk + +.DEFAULT_GOAL := onlpdump + +MODULE := onlpdump +include $(BUILDER)/standardinit.mk + +DEPENDMODULES := AIM IOF onlp x86_64_ingrasys_s9180_32x onlplib onlp_platform_defaults sff cjson cjson_util timer_wheel OS + +include $(BUILDER)/dependmodules.mk + +BINARY := onlpdump +$(BINARY)_LIBRARIES := $(LIBRARY_TARGETS) +include $(BUILDER)/bin.mk + +GLOBAL_CFLAGS += -DAIM_CONFIG_AIM_MAIN_FUNCTION=onlpdump_main +GLOBAL_CFLAGS += -DAIM_CONFIG_INCLUDE_MODULES_INIT=1 +GLOBAL_CFLAGS += -DAIM_CONFIG_INCLUDE_MAIN=1 +GLOBAL_LINK_LIBS += -lpthread -lm + +include $(BUILDER)/targets.mk diff --git a/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/builds/src/x86_64_ingrasys_s9180_32x/.gitignore b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/builds/src/x86_64_ingrasys_s9180_32x/.gitignore new file mode 100755 index 00000000..bb569e2c --- /dev/null +++ b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/builds/src/x86_64_ingrasys_s9180_32x/.gitignore @@ -0,0 +1,2 @@ +/x86_64_ingrasys_s9180_32x.mk +/doc diff --git a/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/builds/src/x86_64_ingrasys_s9180_32x/.module b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/builds/src/x86_64_ingrasys_s9180_32x/.module new file mode 100755 index 00000000..88300c89 --- /dev/null +++ b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/builds/src/x86_64_ingrasys_s9180_32x/.module @@ -0,0 +1 @@ +name: x86_64_ingrasys_s9180_32x diff --git a/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/builds/src/x86_64_ingrasys_s9180_32x/Makefile b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/builds/src/x86_64_ingrasys_s9180_32x/Makefile new file mode 100755 index 00000000..9e00628a --- /dev/null +++ b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/builds/src/x86_64_ingrasys_s9180_32x/Makefile @@ -0,0 +1,10 @@ +############################################################ +# +# +# +############################################################ +include $(ONL)/make/config.mk + +MODULE := x86_64_ingrasys_s9180_32x +AUTOMODULE := x86_64_ingrasys_s9180_32x +include $(BUILDER)/definemodule.mk diff --git a/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/builds/src/x86_64_ingrasys_s9180_32x/module/auto/make.mk b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/builds/src/x86_64_ingrasys_s9180_32x/module/auto/make.mk new file mode 100755 index 00000000..61665f86 --- /dev/null +++ b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/builds/src/x86_64_ingrasys_s9180_32x/module/auto/make.mk @@ -0,0 +1,7 @@ +# +# x86_64_ingrasys_s9180_32x Autogeneration +# +############################################################################### +x86-64-ingrasys-s9180-32x_AUTO_DEFS := module/auto/x86-64-ingrasys-s9180-32x.yml +x86-64-ingrasys-s9180-32x_AUTO_DIRS := module/inc/x86-64-ingrasys-s9180-32x module/src +include $(BUILDER)/auto.mk diff --git a/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/builds/src/x86_64_ingrasys_s9180_32x/module/auto/x86-64-ingrasys-s9180-32x.yml b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/builds/src/x86_64_ingrasys_s9180_32x/module/auto/x86-64-ingrasys-s9180-32x.yml new file mode 100755 index 00000000..1c6422b4 --- /dev/null +++ b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/builds/src/x86_64_ingrasys_s9180_32x/module/auto/x86-64-ingrasys-s9180-32x.yml @@ -0,0 +1,47 @@ +############################################################################### +# +# X86_64_INGRASYS_S9180_32X Autogeneration Definitions. +# +############################################################################### + +cdefs: &cdefs +- X86_64_INGRASYS_S9180_32X_CONFIG_INCLUDE_LOGGING: + doc: "Include or exclude logging." + default: 1 +- X86_64_INGRASYS_S9180_32X_CONFIG_LOG_OPTIONS_DEFAULT: + doc: "Default enabled log options." + default: AIM_LOG_OPTIONS_DEFAULT +- X86_64_INGRASYS_S9180_32X_CONFIG_LOG_BITS_DEFAULT: + doc: "Default enabled log bits." + default: AIM_LOG_BITS_DEFAULT +- X86_64_INGRASYS_S9180_32X_CONFIG_LOG_CUSTOM_BITS_DEFAULT: + doc: "Default enabled custom log bits." + default: 0 +- X86_64_INGRASYS_S9180_32X_CONFIG_PORTING_STDLIB: + doc: "Default all porting macros to use the C standard libraries." + default: 1 +- X86_64_INGRASYS_S9180_32X_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS: + doc: "Include standard library headers for stdlib porting macros." + default: X86_64_INGRASYS_S9180_32X_CONFIG_PORTING_STDLIB +- X86_64_INGRASYS_S9180_32X_CONFIG_INCLUDE_UCLI: + doc: "Include generic uCli support." + default: 0 + + +definitions: + cdefs: + X86_64_INGRASYS_S9180_32X_CONFIG_HEADER: + defs: *cdefs + basename: x86_64_ingrasys_s9180_32x_config + + portingmacro: + X86_64_INGRASYS_S9180_32X: + macros: + - malloc + - free + - memset + - memcpy + - strncpy + - vsnprintf + - snprintf + - strlen diff --git a/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/builds/src/x86_64_ingrasys_s9180_32x/module/inc/x86_64_ingrasys_s9180_32x/x86_64_ingrasys_s9180_32x.x b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/builds/src/x86_64_ingrasys_s9180_32x/module/inc/x86_64_ingrasys_s9180_32x/x86_64_ingrasys_s9180_32x.x new file mode 100755 index 00000000..e13d404c --- /dev/null +++ b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/builds/src/x86_64_ingrasys_s9180_32x/module/inc/x86_64_ingrasys_s9180_32x/x86_64_ingrasys_s9180_32x.x @@ -0,0 +1,34 @@ +/************************************************************ + * + * + * Copyright 2014, 2015 Big Switch Networks, Inc. + * + * Licensed under the Eclipse Public License, Version 1.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.eclipse.org/legal/epl-v10.html + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, + * either express or implied. See the License for the specific + * language governing permissions and limitations under the + * License. + * + * + ************************************************************ + * + * + * + ***********************************************************/ + +#include + +/* <--auto.start.xmacro(ALL).define> */ +/* */ + +/* <--auto.start.xenum(ALL).define> */ +/* */ + + diff --git a/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/builds/src/x86_64_ingrasys_s9180_32x/module/inc/x86_64_ingrasys_s9180_32x/x86_64_ingrasys_s9180_32x_config.h b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/builds/src/x86_64_ingrasys_s9180_32x/module/inc/x86_64_ingrasys_s9180_32x/x86_64_ingrasys_s9180_32x_config.h new file mode 100755 index 00000000..db82c6fc --- /dev/null +++ b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/builds/src/x86_64_ingrasys_s9180_32x/module/inc/x86_64_ingrasys_s9180_32x/x86_64_ingrasys_s9180_32x_config.h @@ -0,0 +1,162 @@ +/************************************************************ + * + * + * Copyright 2014, 2015 Big Switch Networks, Inc. + * + * Licensed under the Eclipse Public License, Version 1.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.eclipse.org/legal/epl-v10.html + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, + * either express or implied. See the License for the specific + * language governing permissions and limitations under the + * License. + * + * + ************************************************************ + * + * + * + ***********************************************************/ + +/**************************************************************************//** + * + * @file + * @brief x86_64_ingrasys_s9180_32x Configuration Header + * + * @addtogroup x86_64_ingrasys_s9180_32x-config + * @{ + * + *****************************************************************************/ +#ifndef __X86_64_INGRAYSYS_S9180_32X_CONFIG_H__ +#define __X86_64_INGRAYSYS_S9180_32X_CONFIG_H__ + +#ifdef GLOBAL_INCLUDE_CUSTOM_CONFIG +#include +#endif +#ifdef X86_64_INGRAYSYS_S9180_32X_INCLUDE_CUSTOM_CONFIG +#include +#endif + +/* */ +#include +/** + * X86_64_INGRAYSYS_S9180_32X_CONFIG_INCLUDE_LOGGING + * + * Include or exclude logging. */ + + +#ifndef X86_64_INGRAYSYS_S9180_32X_CONFIG_INCLUDE_LOGGING +#define X86_64_INGRAYSYS_S9180_32X_CONFIG_INCLUDE_LOGGING 1 +#endif + +/** + * X86_64_INGRAYSYS_S9180_32X_CONFIG_LOG_OPTIONS_DEFAULT + * + * Default enabled log options. */ + + +#ifndef X86_64_INGRAYSYS_S9180_32X_CONFIG_LOG_OPTIONS_DEFAULT +#define X86_64_INGRAYSYS_S9180_32X_CONFIG_LOG_OPTIONS_DEFAULT AIM_LOG_OPTIONS_DEFAULT +#endif + +/** + * X86_64_INGRAYSYS_S9180_32X_CONFIG_LOG_BITS_DEFAULT + * + * Default enabled log bits. */ + + +#ifndef X86_64_INGRAYSYS_S9180_32X_CONFIG_LOG_BITS_DEFAULT +#define X86_64_INGRAYSYS_S9180_32X_CONFIG_LOG_BITS_DEFAULT AIM_LOG_BITS_DEFAULT +#endif + +/** + * X86_64_INGRAYSYS_S9180_32X_CONFIG_LOG_CUSTOM_BITS_DEFAULT + * + * Default enabled custom log bits. */ + + +#ifndef X86_64_INGRAYSYS_S9180_32X_CONFIG_LOG_CUSTOM_BITS_DEFAULT +#define X86_64_INGRAYSYS_S9180_32X_CONFIG_LOG_CUSTOM_BITS_DEFAULT 0 +#endif + +/** + * X86_64_INGRAYSYS_S9180_32X_CONFIG_PORTING_STDLIB + * + * Default all porting macros to use the C standard libraries. */ + + +#ifndef X86_64_INGRAYSYS_S9180_32X_CONFIG_PORTING_STDLIB +#define X86_64_INGRAYSYS_S9180_32X_CONFIG_PORTING_STDLIB 1 +#endif + +/** + * X86_64_INGRAYSYS_S9180_32X_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS + * + * Include standard library headers for stdlib porting macros. */ + + +#ifndef X86_64_INGRAYSYS_S9180_32X_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS +#define X86_64_INGRAYSYS_S9180_32X_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS X86_64_INGRAYSYS_S9180_32X_CONFIG_PORTING_STDLIB +#endif + +/** + * X86_64_INGRAYSYS_S9180_32X_CONFIG_INCLUDE_UCLI + * + * Include generic uCli support. */ + + +#ifndef X86_64_INGRAYSYS_S9180_32X_CONFIG_INCLUDE_UCLI +#define X86_64_INGRAYSYS_S9180_32X_CONFIG_INCLUDE_UCLI 0 +#endif + +/** + * X86_64_INGRAYSYS_S9180_32X_CONFIG_SFP_COUNT + * + * SFP Count. */ + + +#ifndef X86_64_INGRAYSYS_S9180_32X_CONFIG_SFP_COUNT +#define X86_64_INGRAYSYS_S9180_32X_CONFIG_SFP_COUNT 0 +#endif + + + +/** + * All compile time options can be queried or displayed + */ + +/** Configuration settings structure. */ +typedef struct x86_64_ingrasys_s9180_32x_config_settings_s { + /** name */ + const char* name; + /** value */ + const char* value; +} x86_64_ingrasys_s9180_32x_config_settings_t; + +/** Configuration settings table. */ +/** x86_64_ingrasys_s9180_32x_config_settings table. */ +extern x86_64_ingrasys_s9180_32x_config_settings_t x86_64_ingrasys_s9180_32x_config_settings[]; + +/** + * @brief Lookup a configuration setting. + * @param setting The name of the configuration option to lookup. + */ +const char* x86_64_ingrasys_s9180_32x_config_lookup(const char* setting); + +/** + * @brief Show the compile-time configuration. + * @param pvs The output stream. + */ +int x86_64_ingrasys_s9180_32x_config_show(struct aim_pvs_s* pvs); + +/* */ + +#include "x86_64_ingrasys_s9180_32x_porting.h" + +#endif /* __X86_64_INGRAYSYS_S9180_32X_CONFIG_H__ */ +/* @} */ diff --git a/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/builds/src/x86_64_ingrasys_s9180_32x/module/inc/x86_64_ingrasys_s9180_32x/x86_64_ingrasys_s9180_32x_dox.h b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/builds/src/x86_64_ingrasys_s9180_32x/module/inc/x86_64_ingrasys_s9180_32x/x86_64_ingrasys_s9180_32x_dox.h new file mode 100755 index 00000000..76067c8e --- /dev/null +++ b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/builds/src/x86_64_ingrasys_s9180_32x/module/inc/x86_64_ingrasys_s9180_32x/x86_64_ingrasys_s9180_32x_dox.h @@ -0,0 +1,26 @@ +/**************************************************************************//** + * + * x86_64_ingrasys_s9180_32x Doxygen Header + * + *****************************************************************************/ +#ifndef __x86_64_ingrasys_s9180_32x_DOX_H__ +#define __x86_64_ingrasys_s9180_32x_DOX_H__ + +/** + * @defgroup x86_64_ingrasys_s9180_32x x86_64_ingrasys_s9180_32x - x86_64_ingrasys_s9180_32x Description + * + +The documentation overview for this module should go here. + + * + * @{ + * + * @defgroup x86_64_ingrasys_s9180_32x-x86_64_ingrasys_s9180_32x Public Interface + * @defgroup x86_64_ingrasys_s9180_32x-config Compile Time Configuration + * @defgroup x86_64_ingrasys_s9180_32x-porting Porting Macros + * + * @} + * + */ + +#endif /* __x86_64_ingrasys_s9180_32x_DOX_H__ */ diff --git a/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/builds/src/x86_64_ingrasys_s9180_32x/module/inc/x86_64_ingrasys_s9180_32x/x86_64_ingrasys_s9180_32x_porting.h b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/builds/src/x86_64_ingrasys_s9180_32x/module/inc/x86_64_ingrasys_s9180_32x/x86_64_ingrasys_s9180_32x_porting.h new file mode 100755 index 00000000..1d3fb7c1 --- /dev/null +++ b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/builds/src/x86_64_ingrasys_s9180_32x/module/inc/x86_64_ingrasys_s9180_32x/x86_64_ingrasys_s9180_32x_porting.h @@ -0,0 +1,106 @@ +/********************************************************//** + * + * @file + * @brief x86_64_Ingrasys_s9180_32x Porting Macros. + * + * @addtogroup x86_64_Ingrasys_s9180_32x-porting + * @{ + * + ***********************************************************/ +#ifndef __X86_64_INGRAYSYS_S9180_32X_PORTING_H__ +#define __X86_64_INGRAYSYS_S9180_32X_PORTING_H__ + +/* */ +#if X86_64_INGRAYSYS_S9180_32X_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS == 1 +#include +#include +#include +#include +#include +#endif + +#ifndef X86_64_INGRAYSYS_S9180_32X_MALLOC + #if defined(GLOBAL_MALLOC) + #define X86_64_INGRAYSYS_S9180_32X_MALLOC GLOBAL_MALLOC + #elif X86_64_INGRAYSYS_S9180_32X_CONFIG_PORTING_STDLIB == 1 + #define X86_64_INGRAYSYS_S9180_32X_MALLOC malloc + #else + #error The macro X86_64_INGRAYSYS_S9180_32X_MALLOC is required but cannot be defined. + #endif +#endif + +#ifndef X86_64_INGRAYSYS_S9180_32X_FREE + #if defined(GLOBAL_FREE) + #define X86_64_INGRAYSYS_S9180_32X_FREE GLOBAL_FREE + #elif X86_64_INGRAYSYS_S9180_32X_CONFIG_PORTING_STDLIB == 1 + #define X86_64_INGRAYSYS_S9180_32X_FREE free + #else + #error The macro X86_64_INGRAYSYS_S9180_32X_FREE is required but cannot be defined. + #endif +#endif + +#ifndef X86_64_INGRAYSYS_S9180_32X_MEMSET + #if defined(GLOBAL_MEMSET) + #define X86_64_INGRAYSYS_S9180_32X_MEMSET GLOBAL_MEMSET + #elif X86_64_INGRAYSYS_S9180_32X_CONFIG_PORTING_STDLIB == 1 + #define X86_64_INGRAYSYS_S9180_32X_MEMSET memset + #else + #error The macro X86_64_INGRAYSYS_S9180_32X_MEMSET is required but cannot be defined. + #endif +#endif + +#ifndef X86_64_INGRAYSYS_S9180_32X_MEMCPY + #if defined(GLOBAL_MEMCPY) + #define X86_64_INGRAYSYS_S9180_32X_MEMCPY GLOBAL_MEMCPY + #elif X86_64_INGRAYSYS_S9180_32X_CONFIG_PORTING_STDLIB == 1 + #define X86_64_INGRAYSYS_S9180_32X_MEMCPY memcpy + #else + #error The macro X86_64_INGRAYSYS_S9180_32X_MEMCPY is required but cannot be defined. + #endif +#endif + +#ifndef X86_64_INGRAYSYS_S9180_32X_STRNCPY + #if defined(GLOBAL_STRNCPY) + #define X86_64_INGRAYSYS_S9180_32X_STRNCPY GLOBAL_STRNCPY + #elif X86_64_INGRAYSYS_S9180_32X_CONFIG_PORTING_STDLIB == 1 + #define X86_64_INGRAYSYS_S9180_32X_STRNCPY strncpy + #else + #error The macro X86_64_INGRAYSYS_S9180_32X_STRNCPY is required but cannot be defined. + #endif +#endif + +#ifndef X86_64_INGRAYSYS_S9180_32X_VSNPRINTF + #if defined(GLOBAL_VSNPRINTF) + #define X86_64_INGRAYSYS_S9180_32X_VSNPRINTF GLOBAL_VSNPRINTF + #elif X86_64_INGRAYSYS_S9180_32X_CONFIG_PORTING_STDLIB == 1 + #define X86_64_INGRAYSYS_S9180_32X_VSNPRINTF vsnprintf + #else + #error The macro X86_64_INGRAYSYS_S9180_32X_VSNPRINTF is required but cannot be defined. + #endif +#endif + +#ifndef X86_64_INGRAYSYS_S9180_32X_SNPRINTF + #if defined(GLOBAL_SNPRINTF) + #define X86_64_INGRAYSYS_S9180_32X_SNPRINTF GLOBAL_SNPRINTF + #elif X86_64_INGRAYSYS_S9180_32X_CONFIG_PORTING_STDLIB == 1 + #define X86_64_INGRAYSYS_S9180_32X_SNPRINTF snprintf + #else + #error The macro X86_64_INGRAYSYS_S9180_32X_SNPRINTF is required but cannot be defined. + #endif +#endif + +#ifndef X86_64_INGRAYSYS_S9180_32X_STRLEN + #if defined(GLOBAL_STRLEN) + #define X86_64_INGRAYSYS_S9180_32X_STRLEN GLOBAL_STRLEN + #elif X86_64_INGRAYSYS_S9180_32X_CONFIG_PORTING_STDLIB == 1 + #define X86_64_INGRAYSYS_S9180_32X_STRLEN strlen + #else + #error The macro X86_64_INGRAYSYS_S9180_32X_STRLEN is required but cannot be defined. + #endif +#endif + +/* */ + + +#endif /* __X86_64_INGRAYSYS_S9180_32X_PORTING_H__ */ +/* @} */ diff --git a/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/builds/src/x86_64_ingrasys_s9180_32x/module/make.mk b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/builds/src/x86_64_ingrasys_s9180_32x/module/make.mk new file mode 100755 index 00000000..03592ef6 --- /dev/null +++ b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/builds/src/x86_64_ingrasys_s9180_32x/module/make.mk @@ -0,0 +1,29 @@ +############################################################ +# +# +# Copyright 2014, 2015 Big Switch Networks, Inc. +# +# Licensed under the Eclipse Public License, Version 1.0 (the +# "License"); you may not use this file except in compliance +# with the License. You may obtain a copy of the License at +# +# http://www.eclipse.org/legal/epl-v10.html +# +# Unless required by applicable law or agreed to in writing, +# software distributed under the License is distributed on an +# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, +# either express or implied. See the License for the specific +# language governing permissions and limitations under the +# License. +# +# +############################################################ +# +# +# +############################################################ +THIS_DIR := $(dir $(lastword $(MAKEFILE_LIST))) +x86_64_ingrasys_s9180_32x_INCLUDES := -I $(THIS_DIR)inc +x86_64_ingrasys_s9180_32x_INTERNAL_INCLUDES := -I $(THIS_DIR)src +x86_64_ingrasys_s9180_32x_DEPENDMODULE_ENTRIES := init:x86_64_ingrasys_s9180_32x ucli:x86_64_ingrasys_s9180_32x + diff --git a/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/builds/src/x86_64_ingrasys_s9180_32x/module/src/Makefile b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/builds/src/x86_64_ingrasys_s9180_32x/module/src/Makefile new file mode 100755 index 00000000..fe84a5d1 --- /dev/null +++ b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/builds/src/x86_64_ingrasys_s9180_32x/module/src/Makefile @@ -0,0 +1,30 @@ +############################################################ +# +# +# Copyright 2014, 2015 Big Switch Networks, Inc. +# +# Licensed under the Eclipse Public License, Version 1.0 (the +# "License"); you may not use this file except in compliance +# with the License. You may obtain a copy of the License at +# +# http://www.eclipse.org/legal/epl-v10.html +# +# Unless required by applicable law or agreed to in writing, +# software distributed under the License is distributed on an +# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, +# either express or implied. See the License for the specific +# language governing permissions and limitations under the +# License. +# +# +############################################################ +# +# Local source generation targets. +# +############################################################ + +include ../../../../init.mk + +ucli: + $(SUBMODULE_BIGCODE)/tools/uclihandlers.py x86_64_ingrasys_s9180_32x_ucli.c + diff --git a/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/builds/src/x86_64_ingrasys_s9180_32x/module/src/fani.c b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/builds/src/x86_64_ingrasys_s9180_32x/module/src/fani.c new file mode 100755 index 00000000..a08c504d --- /dev/null +++ b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/builds/src/x86_64_ingrasys_s9180_32x/module/src/fani.c @@ -0,0 +1,327 @@ +/************************************************************ + * + * + * Copyright 2014, 2015 Big Switch Networks, Inc. + * + * Licensed under the Eclipse Public License, Version 1.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.eclipse.org/legal/epl-v10.html + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, + * either express or implied. See the License for the specific + * language governing permissions and limitations under the + * License. + * + * + ************************************************************ + * + * Fan Platform Implementation Defaults. + * + ***********************************************************/ +#include +#include "x86_64_ingrasys_s9180_32x_int.h" +#include +#include +#include "platform_lib.h" + +onlp_fan_info_t fan_info[] = { + { }, /* Not used */ + { + { FAN_OID_FAN1, "FANTRAY 1-A", 0 }, + ONLP_FAN_STATUS_PRESENT, + ONLP_FAN_CAPS_GET_RPM | ONLP_FAN_CAPS_GET_PERCENTAGE, + 0, + 0, + ONLP_FAN_MODE_INVALID, + }, + { + { FAN_OID_FAN2, "FANTRAY 1-B", 0 }, + ONLP_FAN_STATUS_PRESENT, + ONLP_FAN_CAPS_GET_RPM | ONLP_FAN_CAPS_GET_PERCENTAGE, + 0, + 0, + ONLP_FAN_MODE_INVALID, + }, + { + { FAN_OID_FAN3, "FANTRAY 2-A", 0 }, + ONLP_FAN_STATUS_PRESENT, + ONLP_FAN_CAPS_GET_RPM | ONLP_FAN_CAPS_GET_PERCENTAGE, + 0, + 0, + ONLP_FAN_MODE_INVALID, + }, + { + { FAN_OID_FAN4, "FANTRAY 2-B", 0 }, + ONLP_FAN_STATUS_PRESENT, + ONLP_FAN_CAPS_GET_RPM | ONLP_FAN_CAPS_GET_PERCENTAGE, + 0, + 0, + ONLP_FAN_MODE_INVALID, + }, + { + { FAN_OID_FAN5, "FANTRAY 3-A", 0 }, + ONLP_FAN_STATUS_PRESENT, + ONLP_FAN_CAPS_GET_RPM | ONLP_FAN_CAPS_GET_PERCENTAGE, + 0, + 0, + ONLP_FAN_MODE_INVALID, + }, + { + { FAN_OID_FAN6, "FANTRAY 3-B", 0 }, + ONLP_FAN_STATUS_PRESENT, + ONLP_FAN_CAPS_GET_RPM | ONLP_FAN_CAPS_GET_PERCENTAGE, + 0, + 0, + ONLP_FAN_MODE_INVALID, + }, + { + { FAN_OID_FAN7, "FANTRAY 4-A", 0 }, + ONLP_FAN_STATUS_PRESENT, + ONLP_FAN_CAPS_GET_RPM | ONLP_FAN_CAPS_GET_PERCENTAGE, + 0, + 0, + ONLP_FAN_MODE_INVALID, + }, + { + { FAN_OID_FAN8, "FANTRAY 4-B", 0 }, + ONLP_FAN_STATUS_PRESENT, + ONLP_FAN_CAPS_GET_RPM | ONLP_FAN_CAPS_GET_PERCENTAGE, + 0, + 0, + ONLP_FAN_MODE_INVALID, + }, + { + { FAN_OID_PSU_FAN1, "PSU-1 FAN", 0 }, + ONLP_FAN_STATUS_PRESENT, + }, + { + { FAN_OID_PSU_FAN2, "PSU-2 FAN", 0 }, + ONLP_FAN_STATUS_PRESENT, + } +}; + +/* + * This function will be called prior to all of onlp_fani_* functions. + */ +int +onlp_fani_init(void) +{ + return ONLP_STATUS_OK; +} + +int sys_fan_present_get(onlp_fan_info_t* info, int id) +{ + int rv, fan_presence, i2c_bus, offset, fan_reg_mask; + + /* get fan presence*/ + i2c_bus = I2C_BUS_59; + switch (id) + { + case FAN_ID_FAN1: + case FAN_ID_FAN2: + offset = 1; + fan_reg_mask = FAN_1_2_PRESENT_MASK; + break; + case FAN_ID_FAN3: + case FAN_ID_FAN4: + offset = 1; + fan_reg_mask = FAN_3_4_PRESENT_MASK; + break; + case FAN_ID_FAN5: + case FAN_ID_FAN6: + offset = 0; + fan_reg_mask = FAN_5_6_PRESENT_MASK; + break; + case FAN_ID_FAN7: + case FAN_ID_FAN8: + offset = 0; + fan_reg_mask = FAN_7_8_PRESENT_MASK; + break; + default: + return ONLP_STATUS_E_INVALID; + } + + rv = onlp_i2c_readb(i2c_bus, FAN_GPIO_ADDR, offset, ONLP_I2C_F_FORCE); + if (rv < 0) { + return ONLP_STATUS_E_INTERNAL; + } + + fan_presence = (rv & fan_reg_mask) ? 0 : 1; + + if (!fan_presence) { + info->status &= ~ONLP_FAN_STATUS_PRESENT; + } else { + info->status |= ONLP_FAN_STATUS_PRESENT; + } + + return ONLP_STATUS_OK; +} + +int +sys_fan_info_get(onlp_fan_info_t* info, int id) +{ + int rv, fan_status, fan_rpm, perc_val, percentage; + int max_fan_speed = 22000; + fan_status = 0; + fan_rpm = 0; + + rv = sys_fan_present_get(info, id); + if (rv < 0) { + return ONLP_STATUS_E_INTERNAL; + } + + rv = onlp_file_read_int(&fan_status, SYS_FAN_PREFIX "fan%d_alarm", id); + if (rv < 0) { + return ONLP_STATUS_E_INTERNAL; + } + + /* fan status > 1, means failure */ + if (fan_status > 0) { + info->status |= ONLP_FAN_STATUS_FAILED; + return ONLP_STATUS_OK; + } + + rv = onlp_file_read_int(&fan_rpm, SYS_FAN_PREFIX "fan%d_input", id); + if (rv < 0) { + return ONLP_STATUS_E_INTERNAL; + } + info->rpm = fan_rpm; + + /* get speed percentage*/ + switch (id) + { + case FAN_ID_FAN1: + case FAN_ID_FAN2: + case FAN_ID_FAN3: + case FAN_ID_FAN4: + rv = onlp_file_read_int(&perc_val, SYS_FAN_PREFIX "pwm%d", + FAN_CTRL_SET1); + break; + case FAN_ID_FAN5: + case FAN_ID_FAN6: + case FAN_ID_FAN7: + case FAN_ID_FAN8: + rv = onlp_file_read_int(&perc_val, SYS_FAN_PREFIX "pwm%d", + FAN_CTRL_SET2); + break; + default: + return ONLP_STATUS_E_INVALID; + } + if (rv < 0) { + return ONLP_STATUS_E_INTERNAL; + } + + percentage = (info->rpm*100)/max_fan_speed; + info->percentage = percentage; + + return ONLP_STATUS_OK; +} + +int +sys_fan_rpm_percent_set(int perc) +{ + int rc; + rc = onlp_file_write_int(perc, SYS_FAN_PREFIX "pwm%d", FAN_CTRL_SET1); + + if (rc < 0) { + return ONLP_STATUS_E_INTERNAL; + } + + rc = onlp_file_write_int(perc, SYS_FAN_PREFIX "pwm%d", FAN_CTRL_SET2); + if (rc < 0) { + return ONLP_STATUS_E_INTERNAL; + } + + return ONLP_STATUS_OK; +} + +int +onlp_fani_rpm_set(onlp_oid_t id, int rpm) +{ + return ONLP_STATUS_E_UNSUPPORTED; +} + +/* + * This function sets the fan speed of the given OID as a percentage. + * + * This will only be called if the OID has the PERCENTAGE_SET + * capability. + * + * It is optional if you have no fans at all with this feature. + */ +int +onlp_fani_percentage_set(onlp_oid_t id, int percentage) +{ + int fid, perc_val, rc; + fid = ONLP_OID_ID_GET(id); + + /* + * Set fan speed + * Driver accept value in range between 128 and 255. + * Value 128 is 50%. + * Value 200 is 80%. + * Value 255 is 100%. + */ + if (percentage == 100) { + perc_val = 255; + } else if (percentage == 80) { + perc_val = 200; + } else if (percentage == 50) { + perc_val = 128; + } else { + return ONLP_STATUS_E_INVALID; + } + + switch (fid) + { + case FAN_ID_FAN1: + case FAN_ID_FAN2: + case FAN_ID_FAN3: + case FAN_ID_FAN4: + case FAN_ID_FAN5: + case FAN_ID_FAN6: + case FAN_ID_FAN7: + case FAN_ID_FAN8: + rc = sys_fan_rpm_percent_set(perc_val); + break; + default: + return ONLP_STATUS_E_INVALID; + } + return rc; +} + +int +onlp_fani_info_get(onlp_oid_t id, onlp_fan_info_t* rv) +{ + int fan_id ,rc; + + fan_id = ONLP_OID_ID_GET(id); + *rv = fan_info[fan_id]; + rv->caps |= ONLP_FAN_CAPS_GET_RPM; + + switch (fan_id) { + case FAN_ID_FAN1: + case FAN_ID_FAN2: + case FAN_ID_FAN3: + case FAN_ID_FAN4: + case FAN_ID_FAN5: + case FAN_ID_FAN6: + case FAN_ID_FAN7: + case FAN_ID_FAN8: + rc = sys_fan_info_get(rv, fan_id); + break; + case FAN_ID_PSU_FAN1: + case FAN_ID_PSU_FAN2: + rc = psu_fan_info_get(rv, fan_id); + break; + default: + return ONLP_STATUS_E_INTERNAL; + break; + } + + return rc; +} diff --git a/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/builds/src/x86_64_ingrasys_s9180_32x/module/src/ledi.c b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/builds/src/x86_64_ingrasys_s9180_32x/module/src/ledi.c new file mode 100755 index 00000000..ea4bc275 --- /dev/null +++ b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/builds/src/x86_64_ingrasys_s9180_32x/module/src/ledi.c @@ -0,0 +1,228 @@ +/************************************************************ + * + * + * Copyright 2014, 2015 Big Switch Networks, Inc. + * + * Licensed under the Eclipse Public License, Version 1.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.eclipse.org/legal/epl-v10.html + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, + * either express or implied. See the License for the specific + * language governing permissions and limitations under the + * License. + * + * + ************************************************************ + * + * + ***********************************************************/ +#include +#include +#include +#include +#include +#include + +#include "platform_lib.h" + +/* + * Get the information for the given LED OID. + */ +static onlp_led_info_t led_info[] = +{ + { }, /* Not used */ + { + { LED_OID_SYSTEM, "Chassis LED 1 (SYS LED)", 0 }, + ONLP_LED_STATUS_PRESENT, + ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_GREEN, + }, + { + { LED_OID_FAN, "Chassis LED 2 (FAN LED)", 0 }, + ONLP_LED_STATUS_PRESENT, + ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_ORANGE | + ONLP_LED_CAPS_GREEN | ONLP_LED_CAPS_AUTO, + }, + { + { LED_OID_PSU1, "Chassis LED 3 (PSU1 LED)", 0 }, + ONLP_LED_STATUS_PRESENT, + ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_ORANGE | + ONLP_LED_CAPS_GREEN | ONLP_LED_CAPS_AUTO, + }, + { + { LED_OID_PSU2, "Chassis LED 4 (PSU2 LED)", 0 }, + ONLP_LED_STATUS_PRESENT, + ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_ORANGE | + ONLP_LED_CAPS_GREEN | ONLP_LED_CAPS_AUTO, + }, + { + { LED_OID_FAN_TRAY1, "Rear LED 1 (FAN TRAY1 LED)", 0 }, + ONLP_LED_STATUS_PRESENT, + ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_ORANGE | + ONLP_LED_CAPS_GREEN | ONLP_LED_CAPS_AUTO, + }, + { + { LED_OID_FAN_TRAY2, "Rear LED 2 (FAN TRAY2 LED)", 0 }, + ONLP_LED_STATUS_PRESENT, + ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_ORANGE | + ONLP_LED_CAPS_GREEN | ONLP_LED_CAPS_AUTO, + }, + { + { LED_OID_FAN_TRAY3, "Rear LED 3 (FAN TRAY3 LED)", 0 }, + ONLP_LED_STATUS_PRESENT, + ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_ORANGE | + ONLP_LED_CAPS_GREEN | ONLP_LED_CAPS_AUTO, + }, + { + { LED_OID_FAN_TRAY4, "Rear LED 4 (FAN TRAY4 LED)", 0 }, + ONLP_LED_STATUS_PRESENT, + ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_ORANGE | + ONLP_LED_CAPS_GREEN | ONLP_LED_CAPS_AUTO, + } +}; + +extern int sys_fan_info_get(onlp_fan_info_t* info, int id); + +/* + * This function will be called prior to any other onlp_ledi_* functions. + */ +int +onlp_ledi_init(void) +{ + return ONLP_STATUS_OK; +} + +int +onlp_ledi_info_get(onlp_oid_t id, onlp_led_info_t* info) +{ + int led_id, pw_exist, pw_good, rc, psu_mask, fan_id; + int exist_offset, good_offset, i2c_bus; + onlp_fan_info_t fan_info; + + memset(&fan_info, 0, sizeof(onlp_fan_info_t)); + led_id = ONLP_OID_ID_GET(id); + + *info = led_info[led_id]; + + if (id == LED_OID_PSU1 || id == LED_OID_PSU2) { + + psu_mask = PSU_MUX_MASK; + + if (id == LED_OID_PSU1) { + i2c_bus = I2C_BUS_PSU1; + exist_offset = PSU1_PRESENT_OFFSET; + good_offset = PSU1_PWGOOD_OFFSET; + } else { + i2c_bus = I2C_BUS_PSU2; + exist_offset = PSU2_PRESENT_OFFSET; + good_offset = PSU2_PWGOOD_OFFSET; + } + /* check psu status */ + if ((rc = psu_present_get(&pw_exist, exist_offset, i2c_bus, psu_mask)) + != ONLP_STATUS_OK) { + return ONLP_STATUS_E_INTERNAL; + } + if ((rc = psu_pwgood_get(&pw_good, good_offset, i2c_bus, psu_mask)) + != ONLP_STATUS_OK) { + return ONLP_STATUS_E_INTERNAL; + } + /* psu not present */ + if (pw_exist != PSU_STATUS_PRESENT) { + info->status &= ~ONLP_LED_STATUS_ON; + info->mode = ONLP_LED_MODE_OFF; + } else if (pw_good != PSU_STATUS_POWER_GOOD) { + info->status |= ONLP_LED_STATUS_ON; + info->mode |= ONLP_LED_MODE_ORANGE; + } else { + info->status |= ONLP_LED_STATUS_ON; + info->mode |= ONLP_LED_MODE_GREEN; + } + } else if (id == LED_OID_FAN) { + info->status |= ONLP_LED_STATUS_ON; + info->mode |= ONLP_LED_MODE_GREEN; + for (fan_id=FAN_ID_FAN1; fan_id<=FAN_ID_FAN8; ++fan_id) { + rc = sys_fan_info_get(&fan_info, fan_id); + if (rc != ONLP_STATUS_OK || fan_info.status & ONLP_FAN_STATUS_FAILED) { + info->mode &= ~ONLP_LED_MODE_GREEN; + info->mode |= ONLP_LED_MODE_ORANGE; + break; + } + } + } else if (id == LED_OID_SYSTEM) { + info->status |= ONLP_LED_STATUS_ON; + info->mode |= ONLP_LED_MODE_GREEN; + } else { + info->status |= ONLP_LED_STATUS_ON; + info->mode |= ONLP_LED_MODE_ON; + } + + return ONLP_STATUS_OK; +} + +/* + * Turn an LED on or off. + * + * This function will only be called if the LED OID supports the ONOFF + * capability. + * + * What 'on' means in terms of colors or modes for multimode LEDs is + * up to the platform to decide. This is intended as baseline toggle mechanism. + */ +int +onlp_ledi_set(onlp_oid_t id, int on_or_off) +{ + if (!on_or_off) { + return onlp_ledi_mode_set(id, ONLP_LED_MODE_OFF); + } + + return ONLP_STATUS_E_UNSUPPORTED; +} + +/* + * This function puts the LED into the given mode. It is a more functional + * interface for multimode LEDs. + * + * Only modes reported in the LED's capabilities will be attempted. + */ +int +onlp_ledi_mode_set(onlp_oid_t id, onlp_led_mode_t mode) +{ + int led_id, rc; + + led_id = ONLP_OID_ID_GET(id); + switch (led_id) { + case LED_SYSTEM_LED: + rc = system_led_set(mode); + break; + case LED_FAN_LED: + rc = fan_led_set(mode); + break; + case LED_PSU1_LED: + rc = psu1_led_set(mode); + break; + case LED_PSU2_LED: + rc = psu2_led_set(mode); + break; + case LED_FAN_TRAY1: + case LED_FAN_TRAY2: + case LED_FAN_TRAY3: + case LED_FAN_TRAY4: + rc = fan_tray_led_set(id, mode); + break; + default: + return ONLP_STATUS_E_INTERNAL; + break; + } + + return rc; +} + +int +onlp_ledi_ioctl(onlp_oid_t id, va_list vargs) +{ + return ONLP_STATUS_OK; +} diff --git a/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/builds/src/x86_64_ingrasys_s9180_32x/module/src/make.mk b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/builds/src/x86_64_ingrasys_s9180_32x/module/src/make.mk new file mode 100755 index 00000000..e34082b6 --- /dev/null +++ b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/builds/src/x86_64_ingrasys_s9180_32x/module/src/make.mk @@ -0,0 +1,29 @@ +############################################################ +# +# +# Copyright 2014, 2015 Big Switch Networks, Inc. +# +# Licensed under the Eclipse Public License, Version 1.0 (the +# "License"); you may not use this file except in compliance +# with the License. You may obtain a copy of the License at +# +# http://www.eclipse.org/legal/epl-v10.html +# +# Unless required by applicable law or agreed to in writing, +# software distributed under the License is distributed on an +# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, +# either express or implied. See the License for the specific +# language governing permissions and limitations under the +# License. +# +# +############################################################ +# +# +# +############################################################ + +LIBRARY := x86_64_ingrasys_s9180_32x +$(LIBRARY)_SUBDIR := $(dir $(lastword $(MAKEFILE_LIST))) +#$(LIBRARY)_LAST := 1 +include $(BUILDER)/lib.mk diff --git a/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/builds/src/x86_64_ingrasys_s9180_32x/module/src/platform_lib.c b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/builds/src/x86_64_ingrasys_s9180_32x/module/src/platform_lib.c new file mode 100755 index 00000000..aedcd64a --- /dev/null +++ b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/builds/src/x86_64_ingrasys_s9180_32x/module/src/platform_lib.c @@ -0,0 +1,624 @@ +/************************************************************ + * + * + * Copyright 2014 Big Switch Networks, Inc. + * Copyright 2013 Accton Technology Corporation. + * + * Licensed under the Eclipse Public License, Version 1.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.eclipse.org/legal/epl-v10.html + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, + * either express or implied. See the License for the specific + * language governing permissions and limitations under the + * License. + * + * + ************************************************************ + * + * + * + ***********************************************************/ +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "platform_lib.h" + +int +psu_thermal_get(onlp_thermal_info_t* info, int thermal_id) +{ + int pw_exist, pw_good, exist_offset, good_offset; + int offset, i2c_bus, rc; + int value, buf, psu_mask; + unsigned int y_value = 0; + unsigned char n_value = 0; + unsigned int temp = 0; + char result[32]; + + if (thermal_id == THERMAL_ID_PSU1_1) { + i2c_bus = I2C_BUS_PSU1; + offset = PSU_THERMAL1_OFFSET; + exist_offset = PSU1_PRESENT_OFFSET; + good_offset = PSU1_PWGOOD_OFFSET; + } else if (thermal_id == THERMAL_ID_PSU1_2) { + i2c_bus = I2C_BUS_PSU1; + offset = PSU_THERMAL2_OFFSET; + exist_offset = PSU1_PRESENT_OFFSET; + good_offset = PSU1_PWGOOD_OFFSET; + } else if (thermal_id == THERMAL_ID_PSU2_1) { + i2c_bus = I2C_BUS_PSU2; + offset = PSU_THERMAL1_OFFSET; + exist_offset = PSU2_PRESENT_OFFSET; + good_offset = PSU2_PWGOOD_OFFSET; + } else if (thermal_id == THERMAL_ID_PSU2_2) { + i2c_bus = I2C_BUS_PSU2; + offset = PSU_THERMAL2_OFFSET; + exist_offset = PSU2_PRESENT_OFFSET; + good_offset = PSU2_PWGOOD_OFFSET; + } + + psu_mask = PSU_MUX_MASK; + + /* check psu status */ + if ((rc = psu_present_get(&pw_exist, exist_offset, I2C_BUS_0, psu_mask)) + != ONLP_STATUS_OK) { + return ONLP_STATUS_E_INTERNAL; + } + + if (pw_exist != PSU_STATUS_PRESENT) { + info->mcelsius = 0; + info->status &= ~ONLP_THERMAL_STATUS_PRESENT; + return ONLP_STATUS_OK; + } else { + info->status |= ONLP_THERMAL_STATUS_PRESENT; + } + + if ((rc = psu_pwgood_get(&pw_good, good_offset, I2C_BUS_0, psu_mask)) + != ONLP_STATUS_OK) { + return ONLP_STATUS_E_INTERNAL; + } + + if (pw_good != PSU_STATUS_POWER_GOOD) { + info->mcelsius = 0; + return ONLP_STATUS_OK; + } + + value = onlp_i2c_readw(i2c_bus, PSU_REG, offset, ONLP_I2C_F_FORCE); + + y_value = (value & 0x07FF); + if ((value & 0x8000)&&(y_value)) { + n_value = 0xF0 + (((value) >> 11) & 0x0F); + n_value = (~n_value) +1; + temp = (unsigned int)(1<> 11) & 0x0F); + snprintf(result, sizeof(result), "%d", (y_value*(1<mcelsius = (int)(buf * 1000); + + return ONLP_STATUS_OK; +} + +int +psu_fan_info_get(onlp_fan_info_t* info, int id) +{ + int pw_exist, pw_good, exist_offset, good_offset; + int i2c_bus, psu_mask, rc; + unsigned int tmp_fan_rpm, fan_rpm; + + if (id == FAN_ID_PSU_FAN1) { + i2c_bus = I2C_BUS_PSU1; + exist_offset = PSU1_PRESENT_OFFSET; + good_offset = PSU1_PWGOOD_OFFSET; + } else if (id == FAN_ID_PSU_FAN2) { + i2c_bus = I2C_BUS_PSU2; + exist_offset = PSU2_PRESENT_OFFSET; + good_offset = PSU2_PWGOOD_OFFSET; + } else { + return ONLP_STATUS_E_INTERNAL; + } + + psu_mask = PSU_MUX_MASK; + + /* check psu status */ + if ((rc = psu_present_get(&pw_exist, exist_offset, I2C_BUS_0, psu_mask)) + != ONLP_STATUS_OK) { + return ONLP_STATUS_E_INTERNAL; + } + + if (pw_exist != PSU_STATUS_PRESENT) { + info->rpm = 0; + info->status &= ~ONLP_FAN_STATUS_PRESENT; + return ONLP_STATUS_OK; + } else { + info->status |= ONLP_FAN_STATUS_PRESENT; + } + + if ((rc = psu_pwgood_get(&pw_good, good_offset, I2C_BUS_0, psu_mask)) + != ONLP_STATUS_OK) { + return ONLP_STATUS_E_INTERNAL; + } + + if (pw_good != PSU_STATUS_POWER_GOOD) { + info->rpm = 0; + return ONLP_STATUS_OK; + } + + tmp_fan_rpm = onlp_i2c_readw(i2c_bus, PSU_REG, PSU_FAN_RPM_OFFSET, ONLP_I2C_F_FORCE); + + fan_rpm = (unsigned int)tmp_fan_rpm; + fan_rpm = (fan_rpm & 0x07FF) * (1 << ((fan_rpm >> 11) & 0x1F)); + info->rpm = (int)fan_rpm; + + return ONLP_STATUS_OK; +} + +int +psu_vout_get(onlp_psu_info_t* info, int i2c_bus) +{ + int v_value = 0; + int n_value = 0; + unsigned int temp = 0; + char result[32]; + double dvalue; + memset(result, 0, sizeof(result)); + + n_value = onlp_i2c_readb(i2c_bus, PSU_REG, PSU_VOUT_OFFSET1, ONLP_I2C_F_FORCE); + if (n_value < 0) { + return ONLP_STATUS_E_INTERNAL; + } + + v_value = onlp_i2c_readw(i2c_bus, PSU_REG, PSU_VOUT_OFFSET2, ONLP_I2C_F_FORCE); + if (v_value < 0) { + return ONLP_STATUS_E_INTERNAL; + } + + if (n_value & 0x10) { + n_value = 0xF0 + (n_value & 0x0F); + n_value = (~n_value) +1; + temp = (unsigned int)(1< 0.0) { + info->caps |= ONLP_PSU_CAPS_VOUT; + info->mvout = (int)(dvalue * 1000); + } + + return ONLP_STATUS_OK; +} + +int +psu_iout_get(onlp_psu_info_t* info, int i2c_bus) +{ + int value; + unsigned int y_value = 0; + unsigned char n_value = 0; + unsigned int temp = 0; + char result[32]; + memset(result, 0, sizeof(result)); + double dvalue; + + value = onlp_i2c_readw(i2c_bus, PSU_REG, PSU_IOUT_OFFSET, ONLP_I2C_F_FORCE); + if (value < 0) { + return ONLP_STATUS_E_INTERNAL; + } + + y_value = (value & 0x07FF); + if ((value & 0x8000)&&(y_value)) + { + n_value = 0xF0 + (((value) >> 11) & 0x0F); + n_value = (~n_value) +1; + temp = (unsigned int)(1<> 11) & 0x0F); + snprintf(result, sizeof(result), "%d", (y_value*(1< 0.0) { + info->caps |= ONLP_PSU_CAPS_IOUT; + info->miout = (int)(dvalue * 1000); + } + + return ONLP_STATUS_OK; +} + +int +psu_pout_get(onlp_psu_info_t* info, int i2c_bus) +{ + int value; + unsigned int y_value = 0; + unsigned char n_value = 0; + unsigned int temp = 0; + char result[32]; + memset(result, 0, sizeof(result)); + double dvalue; + + value = onlp_i2c_readw(i2c_bus, PSU_REG, PSU_POUT_OFFSET, ONLP_I2C_F_FORCE); + if (value < 0) { + return ONLP_STATUS_E_INTERNAL; + } + + y_value = (value & 0x07FF); + if ((value & 0x8000)&&(y_value)) + { + n_value = 0xF0 + (((value) >> 11) & 0x0F); + n_value = (~n_value) +1; + temp = (unsigned int)(1<> 11) & 0x0F); + snprintf(result, sizeof(result), "%d", (y_value*(1< 0.0) { + info->caps |= ONLP_PSU_CAPS_POUT; + info->mpout = (int)(dvalue * 1000); + } + + return ONLP_STATUS_OK; +} + +int +psu_pin_get(onlp_psu_info_t* info, int i2c_bus) +{ + int value; + unsigned int y_value = 0; + unsigned char n_value = 0; + unsigned int temp = 0; + char result[32]; + memset(result, 0, sizeof(result)); + double dvalue; + + value = onlp_i2c_readw(i2c_bus, PSU_REG, PSU_PIN_OFFSET, ONLP_I2C_F_FORCE); + if (value < 0) { + return ONLP_STATUS_E_INTERNAL; + } + + y_value = (value & 0x07FF); + if ((value & 0x8000)&&(y_value)) + { + n_value = 0xF0 + (((value) >> 11) & 0x0F); + n_value = (~n_value) +1; + temp = (unsigned int)(1<> 11) & 0x0F); + snprintf(result, sizeof(result), "%d", (y_value*(1< 0.0) { + info->caps |= ONLP_PSU_CAPS_PIN; + info->mpin = (int)(dvalue * 1000); + } + + return ONLP_STATUS_OK; +} + +int +psu_eeprom_get(onlp_psu_info_t* info, int id) +{ + uint8_t data[256]; + char eeprom_path[128]; + int data_len, i, rc; + memset(data, 0, sizeof(data)); + memset(eeprom_path, 0, sizeof(eeprom_path)); + + if (id == PSU_ID_PSU1) { + rc = onlp_file_read(data, sizeof(data), &data_len, PSU1_EEPROM_PATH); + } else { + rc = onlp_file_read(data, sizeof(data), &data_len, PSU2_EEPROM_PATH); + } + + if (rc == ONLP_STATUS_OK) + { + i = 11; + + /* Manufacturer Name */ + data_len = (data[i]&0x0f); + i++; + i += data_len; + + /* Product Name */ + data_len = (data[i]&0x0f); + i++; + memcpy(info->model, (char *) &(data[i]), data_len); + i += data_len; + + /* Product part,model number */ + data_len = (data[i]&0x0f); + i++; + i += data_len; + + /* Product Version */ + data_len = (data[i]&0x0f); + i++; + i += data_len; + + /* Product Serial Number */ + data_len = (data[i]&0x0f); + i++; + memcpy(info->serial, (char *) &(data[i]), data_len); + } else { + strcpy(info->model, "Missing"); + strcpy(info->serial, "Missing"); + } + + return ONLP_STATUS_OK; +} + + +int +psu_present_get(int *pw_exist, int exist_offset, int i2c_bus, int psu_mask) +{ + int psu_pres; + + psu_pres = onlp_i2c_readb(i2c_bus, PSU_STATE_REG, 0x0, + ONLP_I2C_F_FORCE); + if (psu_pres < 0) { + return ONLP_STATUS_E_INTERNAL; + } + + *pw_exist = (((psu_pres >> exist_offset) & psu_mask) ? 0 : 1); + return ONLP_STATUS_OK; +} + +int +psu_pwgood_get(int *pw_good, int good_offset, int i2c_bus, int psu_mask) +{ + int psu_pwgood; + + psu_pwgood = onlp_i2c_readb(i2c_bus, PSU_STATE_REG, 0x0, + ONLP_I2C_F_FORCE); + if (psu_pwgood < 0) { + return ONLP_STATUS_E_INTERNAL; + } + + *pw_good = (((psu_pwgood >> good_offset) & psu_mask) ? 1 : 0); + return ONLP_STATUS_OK; +} + +int +qsfp_present_get(int port, int *pres_val) +{ + int reg_addr, val, offset; + + if (port >= 1 && port <= 8) { + reg_addr = QSFP_PRES_REG1; + offset = QSFP_PRES_OFFSET1; + } else if (port >= 9 && port <= 16) { + reg_addr = QSFP_PRES_REG1; + offset = QSFP_PRES_OFFSET2; + } else if (port >= 17 && port <= 24) { + reg_addr = QSFP_PRES_REG2; + offset = QSFP_PRES_OFFSET1; + } else if (port >= 25 && port <= 32) { + reg_addr = QSFP_PRES_REG2; + offset = QSFP_PRES_OFFSET2; + } else { + return ONLP_STATUS_E_INTERNAL; + } + + val = onlp_i2c_readb(I2C_BUS_6, reg_addr, offset, ONLP_I2C_F_FORCE); + if (val < 0) { + return ONLP_STATUS_E_INTERNAL; + } + + *pres_val = val; + + return ONLP_STATUS_OK; +} + + +int +system_led_set(onlp_led_mode_t mode) +{ + int rc; + if(mode == ONLP_LED_MODE_GREEN) { + rc = onlp_i2c_modifyb(I2C_BUS_50, LED_REG, LED_OFFSET, LED_SYS_AND_MASK, + LED_SYS_GMASK, ONLP_I2C_F_FORCE); + } + else if(mode == ONLP_LED_MODE_ORANGE) { + rc = onlp_i2c_modifyb(I2C_BUS_50, LED_REG, LED_OFFSET, LED_SYS_AND_MASK, + LED_SYS_YMASK, ONLP_I2C_F_FORCE); + } else { + return ONLP_STATUS_E_INTERNAL; + } + + if (rc < 0) { + return ONLP_STATUS_E_INTERNAL; + } + + return ONLP_STATUS_OK; +} + +int +fan_led_set(onlp_led_mode_t mode) +{ + int rc; + + if(mode == ONLP_LED_MODE_GREEN ) { + rc = onlp_i2c_modifyb(I2C_BUS_50, LED_REG, LED_OFFSET, LED_FAN_AND_MASK, + LED_FAN_GMASK, ONLP_I2C_F_FORCE); + } + else if(mode == ONLP_LED_MODE_ORANGE) { + rc = onlp_i2c_modifyb(I2C_BUS_50, LED_REG, LED_OFFSET, LED_FAN_AND_MASK, + LED_FAN_YMASK, ONLP_I2C_F_FORCE); + } else { + return ONLP_STATUS_E_INTERNAL; + } + + if (rc < 0) { + return ONLP_STATUS_E_INTERNAL; + } + + return ONLP_STATUS_OK; +} + +int +psu1_led_set(onlp_led_mode_t mode) +{ + int rc; + if(mode == ONLP_LED_MODE_GREEN) { + rc = onlp_i2c_modifyb(I2C_BUS_50, LED_REG, LED_PWOK_OFFSET, + LED_PSU1_ON_AND_MASK, LED_PSU1_ON_OR_MASK, + ONLP_I2C_F_FORCE); + rc = onlp_i2c_modifyb(I2C_BUS_50, LED_REG, LED_OFFSET, + LED_PSU1_AND_MASK, LED_PSU1_GMASK, + ONLP_I2C_F_FORCE); + } else if(mode == ONLP_LED_MODE_ORANGE) { + rc = onlp_i2c_modifyb(I2C_BUS_50, LED_REG, LED_PWOK_OFFSET, + LED_PSU1_ON_AND_MASK, LED_PSU1_ON_OR_MASK, + ONLP_I2C_F_FORCE); + rc = onlp_i2c_modifyb(I2C_BUS_50, LED_REG, LED_OFFSET, + LED_PSU1_AND_MASK, LED_PSU1_YMASK, + ONLP_I2C_F_FORCE); + } else if(mode == ONLP_LED_MODE_OFF) { + rc = onlp_i2c_modifyb(I2C_BUS_50, LED_REG, LED_PWOK_OFFSET, + LED_PSU1_OFF_AND_MASK, LED_PSU1_OFF_OR_MASK, + ONLP_I2C_F_FORCE); + } else { + return ONLP_STATUS_E_INTERNAL; + } + + if (rc < 0) { + return ONLP_STATUS_E_INTERNAL; + } + + return ONLP_STATUS_OK; +} + +int +psu2_led_set(onlp_led_mode_t mode) +{ + int rc; + if(mode == ONLP_LED_MODE_GREEN) { + rc = onlp_i2c_modifyb(I2C_BUS_50, LED_REG, LED_PWOK_OFFSET, + LED_PSU2_ON_AND_MASK, LED_PSU2_ON_OR_MASK, + ONLP_I2C_F_FORCE); + rc = onlp_i2c_modifyb(I2C_BUS_50, LED_REG, LED_OFFSET, + LED_PSU2_AND_MASK, LED_PSU2_GMASK, + ONLP_I2C_F_FORCE); + } else if(mode == ONLP_LED_MODE_ORANGE) { + rc = onlp_i2c_modifyb(I2C_BUS_50, LED_REG, LED_PWOK_OFFSET, + LED_PSU2_ON_AND_MASK, LED_PSU2_ON_OR_MASK, + ONLP_I2C_F_FORCE); + rc = onlp_i2c_modifyb(I2C_BUS_50, LED_REG, LED_OFFSET, + LED_PSU2_AND_MASK, LED_PSU2_YMASK, + ONLP_I2C_F_FORCE); + } else if(mode == ONLP_LED_MODE_OFF) { + rc = onlp_i2c_modifyb(I2C_BUS_50, LED_REG, LED_PWOK_OFFSET, + LED_PSU2_OFF_AND_MASK, LED_PSU2_OFF_OR_MASK, + ONLP_I2C_F_FORCE); + } else { + return ONLP_STATUS_E_INTERNAL; + } + + + if (rc < 0) { + return ONLP_STATUS_E_INTERNAL; + } + + return ONLP_STATUS_OK; +} + +int +fan_tray_led_set(onlp_oid_t id, onlp_led_mode_t mode) +{ + int rc, temp_id; + int fan_tray_id, offset; + + temp_id = ONLP_OID_ID_GET(id); + switch (temp_id) { + case 5: + fan_tray_id = 1; + offset = 2; + break; + case 6: + fan_tray_id = 2; + offset = 2; + break; + case 7: + fan_tray_id = 3; + offset = 3; + break; + case 8: + fan_tray_id = 4; + offset = 3; + break; + default: + return ONLP_STATUS_E_INTERNAL; + break; + } + if (fan_tray_id == 1 || fan_tray_id == 3) { + if (mode == ONLP_LED_MODE_GREEN) { + rc = onlp_i2c_modifyb(I2C_BUS_59, FAN_GPIO_ADDR, offset, 0xFC, + 0x02, ONLP_I2C_F_FORCE); + } else if (mode == ONLP_LED_MODE_ORANGE) { + rc = onlp_i2c_modifyb(I2C_BUS_59, FAN_GPIO_ADDR, offset, 0xFC, + 0x01, ONLP_I2C_F_FORCE); + } + } else if (fan_tray_id == 2 || fan_tray_id == 4) { + if (mode == ONLP_LED_MODE_GREEN) { + rc = onlp_i2c_modifyb(I2C_BUS_59, FAN_GPIO_ADDR, offset, 0xCF, + 0x20, ONLP_I2C_F_FORCE); + } else if (mode == ONLP_LED_MODE_ORANGE) { + rc = onlp_i2c_modifyb(I2C_BUS_59, FAN_GPIO_ADDR, offset, 0xCF, + 0x10, ONLP_I2C_F_FORCE); + } + } + if (rc < 0) { + return ONLP_STATUS_E_INTERNAL; + } + + return ONLP_STATUS_OK; +} + +int +sysi_platform_info_get(onlp_platform_info_t* pi) +{ + int cpld_release, cpld_version, cpld_rev; + + cpld_rev = onlp_i2c_readb(I2C_BUS_44, CPLD_REG, CPLD_VER_OFFSET, ONLP_I2C_F_FORCE); + if (cpld_rev < 0) { + return ONLP_STATUS_E_INTERNAL; + } + + cpld_release = (((cpld_rev) >> 6 & 0x01)); + cpld_version = (((cpld_rev) & 0x3F)); + + pi->cpld_versions = aim_fstrdup( + "CPLD is %d version(0:RD 1:Release), Revision is 0x%02x\n", + cpld_release, cpld_version); + + return ONLP_STATUS_OK; +} diff --git a/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/builds/src/x86_64_ingrasys_s9180_32x/module/src/platform_lib.h b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/builds/src/x86_64_ingrasys_s9180_32x/module/src/platform_lib.h new file mode 100755 index 00000000..e7bde010 --- /dev/null +++ b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/builds/src/x86_64_ingrasys_s9180_32x/module/src/platform_lib.h @@ -0,0 +1,306 @@ +/************************************************************ + * + * + * Copyright 2014 Big Switch Networks, Inc. + * Copyright 2013 Accton Technology Corporation. + * + * Licensed under the Eclipse Public License, Version 1.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.eclipse.org/legal/epl-v10.html + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, + * either express or implied. See the License for the specific + * language governing permissions and limitations under the + * License. + * + * + ************************************************************ + * + * + * + ***********************************************************/ +#ifndef __PLATFORM_LIB_H__ +#define __PLATFORM_LIB_H__ + +#include +#include +#include +#include +#include +#include "x86_64_ingrasys_s9180_32x_int.h" +#include "x86_64_ingrasys_s9180_32x_log.h" + +#include +#define SYS_CPU_TEMP_PREFIX "/sys/class/hwmon/hwmon0/" +#define SYS_CORE_TEMP_PREFIX "/sys/class/hwmon/hwmon2/" +#define SYS_CPU_BOARD_TEMP_PREFIX "/sys/class/hwmon/hwmon3/" +#define SYS_PSU1_NEAR_TEMP_PREFIX "/sys/class/hwmon/hwmon4/" +#define SYS_PSU2_NEAR_TEMP_PREFIX "/sys/class/hwmon/hwmon7/" +#define SYS_MAC_REAR_TEMP_PREFIX "/sys/class/hwmon/hwmon5/" +#define SYS_QSFP_NEAR_TEMP_PREFIX "/sys/class/hwmon/hwmon6/" +#define SYS_FAN_PREFIX "/sys/class/hwmon/hwmon1/device/" +#define SYS_EEPROM_PATH "/sys/bus/i2c/devices/0-0055/eeprom" +#define PSU1_EEPROM_PATH "/sys/bus/i2c/devices/58-0050/eeprom" +#define PSU2_EEPROM_PATH "/sys/bus/i2c/devices/57-0050/eeprom" +#define PSU_STATUS_PRESENT 1 +#define PSU_STATUS_POWER_GOOD 1 +#define FAN_PRESENT 0 +#define FAN_CTRL_SET1 1 +#define FAN_CTRL_SET2 2 +#define MAX_SYS_FAN_NUM 8 +#define BOARD_THERMAL_NUM 6 +#define SYS_FAN_NUM 8 +//#define QSFP_NUM 32 +#define PORT_NUM 34 + +#define THERMAL_NUM 15 +#define LED_NUM 4 +#define FAN_NUM 10 + + + +#define THERMAL_SHUTDOWN_DEFAULT 105000 + +#define THERMAL_ERROR_DEFAULT 95000 +#define THERMAL_ERROR_FAN_PERC 100 + +#define THERMAL_WARNING_DEFAULT 77000 +#define THERMAL_WARNING_FAN_PERC 80 + +#define THERMAL_NORMAL_DEFAULT 72000 +#define THERMAL_NORMAL_FAN_PERC 50 + +/* I2C bus */ +#define I2C_BUS_0 0 +#define I2C_BUS_1 1 +#define I2C_BUS_2 2 +#define I2C_BUS_3 3 +#define I2C_BUS_4 4 +#define I2C_BUS_5 5 +#define I2C_BUS_6 6 +#define I2C_BUS_7 7 +#define I2C_BUS_8 8 +#define I2C_BUS_9 9 +#define I2C_BUS_44 44 /* cpld */ +#define I2C_BUS_50 50 /* SYS LED */ +#define I2C_BUS_57 (57) /* PSU2 */ +#define I2C_BUS_58 (58) /* PSU1 */ +#define I2C_BUS_59 59 /* FRU */ + +#define I2C_BUS_PSU1 I2C_BUS_58 /* PSU1 */ +#define I2C_BUS_PSU2 I2C_BUS_57 /* PSU2 */ + +/* PSU */ +#define PSU_MUX_MASK 0x01 + +#define PSU_THERMAL1_OFFSET 0x8D +#define PSU_THERMAL2_OFFSET 0x8E +#define PSU_THERMAL_REG 0x58 +#define PSU_FAN_RPM_REG 0x58 +#define PSU_FAN_RPM_OFFSET 0x90 +#define PSU_REG 0x58 +#define PSU_VOUT_OFFSET1 0x20 +#define PSU_VOUT_OFFSET2 0x8B +#define PSU_IOUT_OFFSET 0x8C +#define PSU_POUT_OFFSET 0x96 +#define PSU_PIN_OFFSET 0x97 + +#define PSU_STATE_REG 0x25 +#define PSU1_PRESENT_OFFSET 0x04 +#define PSU2_PRESENT_OFFSET 0x01 +#define PSU1_PWGOOD_OFFSET 0x03 +#define PSU2_PWGOOD_OFFSET 0x00 + +/* LED */ +#define LED_REG 0x75 +#define LED_OFFSET 0x02 +#define LED_PWOK_OFFSET 0x03 + +#define LED_SYS_AND_MASK 0xFE +#define LED_SYS_GMASK 0x01 +#define LED_SYS_YMASK 0x00 + +#define LED_FAN_AND_MASK 0xF9 +#define LED_FAN_GMASK 0x02 +#define LED_FAN_YMASK 0x06 + +#define LED_PSU2_AND_MASK 0xEF +#define LED_PSU2_GMASK 0x00 +#define LED_PSU2_YMASK 0x10 +#define LED_PSU2_ON_AND_MASK 0xFD +#define LED_PSU2_ON_OR_MASK 0x02 +#define LED_PSU2_OFF_AND_MASK 0xFD +#define LED_PSU2_OFF_OR_MASK 0x00 +#define LED_PSU1_AND_MASK 0xF7 +#define LED_PSU1_GMASK 0x00 +#define LED_PSU1_YMASK 0x08 +#define LED_PSU1_ON_AND_MASK 0xFE +#define LED_PSU1_ON_OR_MASK 0x01 +#define LED_PSU1_OFF_AND_MASK 0xFE +#define LED_PSU1_OFF_OR_MASK 0x00 +#define LED_SYS_ON_MASK 0x00 +#define LED_SYS_OFF_MASK 0x33 + +/* SYS */ +#define CPLD_REG 0x33 +#define CPLD_VER_OFFSET 0x01 + +/* QSFP */ +#define QSFP_PRES_REG1 0x20 +#define QSFP_PRES_REG2 0x21 +#define QSFP_PRES_OFFSET1 0x00 +#define QSFP_PRES_OFFSET2 0x01 + +/* FAN */ +#define FAN_GPIO_ADDR 0x20 +#define FAN_1_2_PRESENT_MASK 0x40 +#define FAN_3_4_PRESENT_MASK 0x04 +#define FAN_5_6_PRESENT_MASK 0x40 +#define FAN_7_8_PRESENT_MASK 0x04 + +/** led_oid */ +typedef enum led_oid_e { + LED_OID_SYSTEM = ONLP_LED_ID_CREATE(1), + LED_OID_FAN = ONLP_LED_ID_CREATE(2), + LED_OID_PSU1 = ONLP_LED_ID_CREATE(3), + LED_OID_PSU2 = ONLP_LED_ID_CREATE(4), + LED_OID_FAN_TRAY1 = ONLP_LED_ID_CREATE(5), + LED_OID_FAN_TRAY2 = ONLP_LED_ID_CREATE(6), + LED_OID_FAN_TRAY3 = ONLP_LED_ID_CREATE(7), + LED_OID_FAN_TRAY4 = ONLP_LED_ID_CREATE(8), +} led_oid_t; + +/** led_id */ +typedef enum led_id_e { + LED_SYSTEM_LED = 1, + LED_FAN_LED = 2, + LED_PSU1_LED = 3, + LED_PSU2_LED = 4, + LED_FAN_TRAY1 = 5, + LED_FAN_TRAY2 = 6, + LED_FAN_TRAY3 = 7, + LED_FAN_TRAY4 = 8, +} led_id_t; + +/** Thermal_oid */ +typedef enum thermal_oid_e { + THERMAL_OID_FRONT_MAC = ONLP_THERMAL_ID_CREATE(1), + THERMAL_OID_ASIC = ONLP_THERMAL_ID_CREATE(2), + THERMAL_OID_CPU1 = ONLP_THERMAL_ID_CREATE(3), + THERMAL_OID_CPU2 = ONLP_THERMAL_ID_CREATE(4), + THERMAL_OID_CPU3 = ONLP_THERMAL_ID_CREATE(5), + THERMAL_OID_CPU4 = ONLP_THERMAL_ID_CREATE(6), + THERMAL_OID_PSU1_1 = ONLP_THERMAL_ID_CREATE(7), + THERMAL_OID_PSU1_2 = ONLP_THERMAL_ID_CREATE(8), + THERMAL_OID_PSU2_1 = ONLP_THERMAL_ID_CREATE(9), + THERMAL_OID_PSU2_2 = ONLP_THERMAL_ID_CREATE(10), + THERMAL_OID_CPU_BOARD = ONLP_THERMAL_ID_CREATE(11), + THERMAL_OID_PSU1_NEAR = ONLP_THERMAL_ID_CREATE(12), + THERMAL_OID_PSU2_NEAR = ONLP_THERMAL_ID_CREATE(13), + THERMAL_OID_MAC_REAR = ONLP_THERMAL_ID_CREATE(14), + THERMAL_OID_QSFP_NEAR = ONLP_THERMAL_ID_CREATE(15), +} thermal_oid_t; + +/** thermal_id */ +typedef enum thermal_id_e { + THERMAL_ID_FRONT_MAC = 1, + THERMAL_ID_ASIC = 2, + THERMAL_ID_CPU1 = 3, + THERMAL_ID_CPU2 = 4, + THERMAL_ID_CPU3 = 5, + THERMAL_ID_CPU4 = 6, + THERMAL_ID_PSU1_1 = 7, + THERMAL_ID_PSU1_2 = 8, + THERMAL_ID_PSU2_1 = 9, + THERMAL_ID_PSU2_2 = 10, + THERMAL_ID_CPU_BOARD = 11, + THERMAL_ID_PSU1_NEAR = 12, + THERMAL_ID_PSU2_NEAR = 13, + THERMAL_ID_MAC_REAR = 14, + THERMAL_ID_QSFP_NEAR = 15, +} thermal_id_t; + +/* Shortcut for CPU thermal threshold value. */ +#define THERMAL_THRESHOLD_INIT_DEFAULTS \ + { THERMAL_WARNING_DEFAULT, \ + THERMAL_ERROR_DEFAULT, \ + THERMAL_SHUTDOWN_DEFAULT } + +/** Fan_oid */ +typedef enum fan_oid_e { + FAN_OID_FAN1 = ONLP_FAN_ID_CREATE(1), + FAN_OID_FAN2 = ONLP_FAN_ID_CREATE(2), + FAN_OID_FAN3 = ONLP_FAN_ID_CREATE(3), + FAN_OID_FAN4 = ONLP_FAN_ID_CREATE(4), + FAN_OID_FAN5 = ONLP_FAN_ID_CREATE(5), + FAN_OID_FAN6 = ONLP_FAN_ID_CREATE(6), + FAN_OID_FAN7 = ONLP_FAN_ID_CREATE(7), + FAN_OID_FAN8 = ONLP_FAN_ID_CREATE(8), + FAN_OID_PSU_FAN1 = ONLP_FAN_ID_CREATE(9), + FAN_OID_PSU_FAN2 = ONLP_FAN_ID_CREATE(10) +} fan_oid_t; + +/** fan_id */ +typedef enum fan_id_e { + FAN_ID_FAN1 = 1, + FAN_ID_FAN2 = 2, + FAN_ID_FAN3 = 3, + FAN_ID_FAN4 = 4, + FAN_ID_FAN5 = 5, + FAN_ID_FAN6 = 6, + FAN_ID_FAN7 = 7, + FAN_ID_FAN8 = 8, + FAN_ID_PSU_FAN1 = 9, + FAN_ID_PSU_FAN2 = 10 +} fan_id_t; + +/** led_oid */ +typedef enum psu_oid_e { + PSU_OID_PSU1 = ONLP_PSU_ID_CREATE(1), + PSU_OID_PSU2 = ONLP_PSU_ID_CREATE(2) +} psu_oid_t; + +/** fan_id */ +typedef enum psu_id_e { + PSU_ID_PSU1 = 1, + PSU_ID_PSU2 = 2 +} psu_id_t; + +int psu_thermal_get(onlp_thermal_info_t* info, int id); + +int psu_fan_info_get(onlp_fan_info_t* info, int id); + +int psu_vout_get(onlp_psu_info_t* info, int i2c_bus); + +int psu_iout_get(onlp_psu_info_t* info, int i2c_bus); + +int psu_pout_get(onlp_psu_info_t* info, int i2c_bus); + +int psu_pin_get(onlp_psu_info_t* info, int i2c_bus); + +int psu_eeprom_get(onlp_psu_info_t* info, int id); + +int psu_present_get(int *pw_exist, int exist_offset, + int i2c_bus, int psu_mask); + +int psu_pwgood_get(int *pw_good, int good_offset, int i2c_bus, int psu_mask); + +int psu2_led_set(onlp_led_mode_t mode); + +int psu1_led_set(onlp_led_mode_t mode); + +int fan_led_set(onlp_led_mode_t mode); + +int system_led_set(onlp_led_mode_t mode); + +int fan_tray_led_set(onlp_oid_t id, onlp_led_mode_t mode); + +int sysi_platform_info_get(onlp_platform_info_t* pi); + +int qsfp_present_get(int port, int *pres_val); + +#endif /* __PLATFORM_LIB_H__ */ diff --git a/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/builds/src/x86_64_ingrasys_s9180_32x/module/src/psui.c b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/builds/src/x86_64_ingrasys_s9180_32x/module/src/psui.c new file mode 100755 index 00000000..6ef1c98f --- /dev/null +++ b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/builds/src/x86_64_ingrasys_s9180_32x/module/src/psui.c @@ -0,0 +1,160 @@ +/************************************************************ + * + * + * Copyright 2014, 2015 Big Switch Networks, Inc. + * + * Licensed under the Eclipse Public License, Version 1.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.eclipse.org/legal/epl-v10.html + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, + * either express or implied. See the License for the specific + * language governing permissions and limitations under the + * License. + * + * + ************************************************************ + * + * + * + ***********************************************************/ +#include +#include + +#include "platform_lib.h" + +static onlp_psu_info_t pinfo[] = +{ + { }, /* Not used */ + { + { + PSU_OID_PSU1, + "PSU-1", + 0, + { + FAN_OID_PSU_FAN1, + }, + } + }, + { + { + PSU_OID_PSU2, + "PSU-2", + 0, + { + FAN_OID_PSU_FAN2, + }, + } + } +}; + +int +onlp_psui_init(void) +{ + return ONLP_STATUS_OK; +} + +int +psu_status_info_get(int id, onlp_psu_info_t *info) +{ + int pw_exist, exist_offset; + int pw_good, good_offset; + int rc, psu_mask, i2c_bus; + + if (id == PSU_ID_PSU1) { + i2c_bus = I2C_BUS_PSU1; + exist_offset = PSU1_PRESENT_OFFSET; + good_offset = PSU1_PWGOOD_OFFSET; + } else if (id == PSU_ID_PSU2) { + i2c_bus = I2C_BUS_PSU2; + exist_offset = PSU2_PRESENT_OFFSET; + good_offset = PSU2_PWGOOD_OFFSET; + } else { + return ONLP_STATUS_E_INTERNAL; + } + + psu_mask = PSU_MUX_MASK; + + /* Get power present status */ + if ((rc = psu_present_get(&pw_exist, exist_offset, I2C_BUS_0, psu_mask)) + != ONLP_STATUS_OK) { + return ONLP_STATUS_E_INTERNAL; + } + + if (pw_exist != PSU_STATUS_PRESENT) { + info->status &= ~ONLP_PSU_STATUS_PRESENT; + info->status |= ONLP_PSU_STATUS_FAILED; + return ONLP_STATUS_OK; + } + info->status |= ONLP_PSU_STATUS_PRESENT; + + /* Get power good status */ + if ((rc = psu_pwgood_get(&pw_good, good_offset, I2C_BUS_0, psu_mask)) + != ONLP_STATUS_OK) { + return ONLP_STATUS_E_INTERNAL; + } + + if (pw_good != PSU_STATUS_POWER_GOOD) { + info->status |= ONLP_PSU_STATUS_UNPLUGGED; + return ONLP_STATUS_OK; + } else { + info->status &= ~ONLP_PSU_STATUS_UNPLUGGED; + } + + /* Get power eeprom status */ + if ((rc = psu_eeprom_get(info, id)) != ONLP_STATUS_OK) { + return ONLP_STATUS_E_INTERNAL; + } + + /* Get power iout status */ + if ((rc = psu_iout_get(info, i2c_bus)) != ONLP_STATUS_OK) { + return ONLP_STATUS_E_INTERNAL; + } + + /* Get power pout status */ + if ((rc = psu_pout_get(info, i2c_bus)) != ONLP_STATUS_OK) { + return ONLP_STATUS_E_INTERNAL; + } + + /* Get power pin status */ + if ((rc = psu_pin_get(info, i2c_bus)) != ONLP_STATUS_OK) { + return ONLP_STATUS_E_INTERNAL; + } + + /* Get power vout status */ + if ((rc = psu_vout_get(info, i2c_bus)) != ONLP_STATUS_OK) { + return ONLP_STATUS_E_INTERNAL; + } + + return ONLP_STATUS_OK; +} + +int +onlp_psui_info_get(onlp_oid_t id, onlp_psu_info_t* info) +{ + int pid; + + pid = ONLP_OID_ID_GET(id); + memset(info, 0, sizeof(onlp_psu_info_t)); + + /* Set the onlp_oid_hdr_t */ + *info = pinfo[pid]; + + switch (pid) { + case PSU_ID_PSU1: + case PSU_ID_PSU2: + return psu_status_info_get(pid, info); + break; + default: + return ONLP_STATUS_E_UNSUPPORTED; + break; + } + + return ONLP_STATUS_OK; + + +} diff --git a/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/builds/src/x86_64_ingrasys_s9180_32x/module/src/sfpi.c b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/builds/src/x86_64_ingrasys_s9180_32x/module/src/sfpi.c new file mode 100755 index 00000000..a8b68f3a --- /dev/null +++ b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/builds/src/x86_64_ingrasys_s9180_32x/module/src/sfpi.c @@ -0,0 +1,171 @@ +/************************************************************ + * + * + * Copyright 2014, 2015 Big Switch Networks, Inc. + * + * Licensed under the Eclipse Public License, Version 1.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.eclipse.org/legal/epl-v10.html + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, + * either express or implied. See the License for the specific + * language governing permissions and limitations under the + * License. + * + * + ************************************************************ + * + * + ***********************************************************/ +#include +#include +#include +#include +#include +#include +#include +#include +#include "x86_64_ingrasys_s9180_32x_log.h" +#include "platform_lib.h" + +int +onlp_sfpi_init(void) +{ + return ONLP_STATUS_OK; +} + +int +onlp_sfpi_bitmap_get(onlp_sfp_bitmap_t* bmap) +{ + int p; + for(p = 1; p <= PORT_NUM; p++) { + AIM_BITMAP_SET(bmap, p); + } + return ONLP_STATUS_OK; +} + +int +onlp_sfpi_is_present(int port) +{ + int status, rc, gpio_num; + + if (port >= 1 && port <= 16) { + gpio_num = 496 + ((port - 1) ^ 1); + } else if (port >= 17 && port <= 32) { + gpio_num = 464 + ((port - 1) ^ 1); + } else if (port == 33) { + gpio_num = 432; + } else if (port == 34) { + gpio_num = 433; + } + + if ((rc = onlp_file_read_int(&status, "/sys/class/gpio/gpio%d/value", + gpio_num)) != ONLP_STATUS_OK) { + return ONLP_STATUS_E_INTERNAL; + } + + return status; +} + + +int +onlp_sfpi_presence_bitmap_get(onlp_sfp_bitmap_t* dst) +{ + int p = 1; + int rc = 0; + + for (p = 1; p <= PORT_NUM; p++) { + rc = onlp_sfpi_is_present(p); + AIM_BITMAP_MOD(dst, p, (1 == rc) ? 1 : 0); + } + + return ONLP_STATUS_OK; +} + +/* + * This function reads the SFPs idrom and returns in + * in the data buffer provided. + */ +int +onlp_sfpi_eeprom_read(int port, uint8_t data[256]) +{ + int eeprombusidx, eeprombus, eeprombusbase; + char eeprom_path[512], eeprom_addr[32]; + memset(eeprom_path, 0, sizeof(eeprom_path)); + memset(eeprom_addr, 0, sizeof(eeprom_addr)); + strncpy(eeprom_addr, "0050", sizeof(eeprom_addr)); + + memset(data, 0, 256); + + if (port >= 1 && port <= 8) { + eeprombusbase = 9; + } else if (port >= 9 && port <= 16) { + eeprombusbase = 17; + } else if (port >= 17 && port <= 24) { + eeprombusbase = 25; + } else if (port >= 25 && port <= 32) { + eeprombusbase = 33; + } else if (port == 33) { + eeprombus = 45; + } else if (port == 34) { + eeprombus = 46; + } else { + return 0; + } + + /* port 33 and 34 doesn't need to swap */ + if (port >=1 && port <= 32) { + eeprombusidx = port % 8; + switch (eeprombusidx) { + case 1: + eeprombus = eeprombusbase + 1; + break; + case 2: + eeprombus = eeprombusbase + 0; + break; + case 3: + eeprombus = eeprombusbase + 3; + break; + case 4: + eeprombus = eeprombusbase + 2; + break; + case 5: + eeprombus = eeprombusbase + 5; + break; + case 6: + eeprombus = eeprombusbase + 4; + break; + case 7: + eeprombus = eeprombusbase + 7; + break; + case 0: + eeprombus = eeprombusbase + 6; + break; + default: + return ONLP_STATUS_E_INTERNAL; + break; + } + } + + snprintf(eeprom_path, sizeof(eeprom_path), + "/sys/bus/i2c/devices/%d-%s/eeprom", eeprombus, eeprom_addr); + + if (onlplib_sfp_eeprom_read_file(eeprom_path, data) != 0) { + return ONLP_STATUS_E_INTERNAL; + } + + return ONLP_STATUS_OK; +} + +/* + * De-initialize the SFPI subsystem. + */ +int +onlp_sfpi_denit(void) +{ + return ONLP_STATUS_OK; +} diff --git a/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/builds/src/x86_64_ingrasys_s9180_32x/module/src/sysi.c b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/builds/src/x86_64_ingrasys_s9180_32x/module/src/sysi.c new file mode 100755 index 00000000..08a81c60 --- /dev/null +++ b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/builds/src/x86_64_ingrasys_s9180_32x/module/src/sysi.c @@ -0,0 +1,346 @@ +/************************************************************ + * + * + * Copyright 2014, 2015 Big Switch Networks, Inc. + * + * Licensed under the Eclipse Public License, Version 1.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.eclipse.org/legal/epl-v10.html + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, + * either express or implied. See the License for the specific + * language governing permissions and limitations under the + * License. + * + * + ************************************************************ + * + * + * + ***********************************************************/ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "platform_lib.h" + +const char* +onlp_sysi_platform_get(void) +{ + return "x86-64-ingrasys-s9180-32x-r0"; +} + +int +onlp_sysi_init(void) +{ + return ONLP_STATUS_OK; +} + +int +onlp_sysi_onie_data_get(uint8_t** data, int* size) +{ + uint8_t* rdata = aim_zmalloc(256); + if(onlp_file_read(rdata, 256, size, SYS_EEPROM_PATH) == ONLP_STATUS_OK) { + if(*size == 256) { + *data = rdata; + return ONLP_STATUS_OK; + } + } + + AIM_LOG_INFO("Unable to get data from eeprom \n"); + aim_free(rdata); + *size = 0; + return ONLP_STATUS_E_INTERNAL; +} + +int +onlp_sysi_oids_get(onlp_oid_t* table, int max) +{ + onlp_oid_t* e = table; + memset(table, 0, max*sizeof(onlp_oid_t)); + int i; + + /* 2 PSUs */ + *e++ = ONLP_PSU_ID_CREATE(1); + *e++ = ONLP_PSU_ID_CREATE(2); + + /* LEDs Item */ + for (i=1; i<=LED_NUM; i++) { + *e++ = ONLP_LED_ID_CREATE(i); + } + + /* THERMALs Item */ + for (i=1; i<=THERMAL_NUM; i++) { + *e++ = ONLP_THERMAL_ID_CREATE(i); + } + + /* Fans Item */ + for (i=1; i<=FAN_NUM; i++) { + *e++ = ONLP_FAN_ID_CREATE(i); + } + + return ONLP_STATUS_OK; +} + +int +decide_fan_percentage(int is_up, int new_temp) +{ + int new_perc; + if (is_up) { + if (new_temp >= THERMAL_ERROR_DEFAULT) { + new_perc = THERMAL_ERROR_FAN_PERC; + } else if (new_temp >= THERMAL_WARNING_DEFAULT) { + new_perc = THERMAL_WARNING_FAN_PERC; + } else { + new_perc = THERMAL_NORMAL_FAN_PERC; + } + } else { + if (new_temp <= THERMAL_NORMAL_DEFAULT) { + new_perc = THERMAL_NORMAL_FAN_PERC; + } else if (new_temp <= THERMAL_WARNING_DEFAULT) { + new_perc = THERMAL_WARNING_FAN_PERC; + } else { + new_perc = THERMAL_ERROR_FAN_PERC; + } + } + + return new_perc; +} + +int +platform_thermal_temp_get(int *thermal_temp) +{ + int i, temp, max_temp, rc; + onlp_thermal_info_t thermal_info; + memset(&thermal_info, 0, sizeof(thermal_info)); + uint32_t thermal_arr[] = { THERMAL_OID_FRONT_MAC, + THERMAL_OID_ASIC, + THERMAL_OID_CPU1, + THERMAL_OID_CPU2, + THERMAL_OID_CPU3, + THERMAL_OID_CPU4 }; + max_temp = 0; + + for (i=0; i max_temp) { + max_temp = temp; + } + } + *thermal_temp = max_temp; + + return ONLP_STATUS_OK; +} + +int +onlp_sysi_platform_manage_fans(void) +{ + int rc, is_up ,new_temp, thermal_temp, diff; + static int new_perc = 0, ori_perc = 0; + static int ori_temp = 0; + onlp_thermal_info_t thermal_info; + memset(&thermal_info, 0, sizeof(thermal_info)); + + /* get new temperature */ + if ((rc = platform_thermal_temp_get(&thermal_temp)) != ONLP_STATUS_OK) { + goto _EXIT; + } + + new_temp = thermal_temp; + diff = new_temp - ori_temp; + + if (diff == 0) { + goto _EXIT; + } else { + is_up = (diff > 0 ? 1 : 0); + } + + new_perc = decide_fan_percentage(is_up, new_temp); + + if (ori_perc == new_perc) { + goto _EXIT; + } + + + AIM_LOG_INFO("The Fan Speeds Percent are now at %d%%", new_perc); + + if ((rc = onlp_fani_percentage_set(THERMAL_OID_ASIC, new_perc)) != ONLP_STATUS_OK) { + goto _EXIT; + } + + /* update */ + ori_perc = new_perc; + ori_temp = new_temp; + +_EXIT : + return rc; +} + +int +onlp_sysi_platform_manage_leds(void) +{ + int psu1_status, psu2_status, rc, i; + static int pre_psu1_status = 0, pre_psu2_status = 0, pre_fan_status = 0; + + //------------------------------- + static int pre_fan_tray_status[4] = {0}; + int fan_tray_id, sum, total = 0; + onlp_led_status_t fan_tray_status[SYS_FAN_NUM]; + //------------------------------- + + onlp_psu_info_t psu_info; + onlp_fan_info_t fan_info; + + //-------- ----------------------- + memset(&fan_tray_status, 0, sizeof(fan_tray_status)); + //------------------------------- + + memset(&psu_info, 0, sizeof(onlp_psu_info_t)); + memset(&fan_info, 0, sizeof(onlp_fan_info_t)); + uint32_t fan_arr[] = { FAN_OID_FAN1, + FAN_OID_FAN2, + FAN_OID_FAN3, + FAN_OID_FAN4, + FAN_OID_FAN5, + FAN_OID_FAN6, + FAN_OID_FAN7, + FAN_OID_FAN8, }; + + /* PSU LED CTRL */ + if ((rc = onlp_psui_info_get(PSU_OID_PSU1, &psu_info)) != ONLP_STATUS_OK) { + goto _EXIT; + } + + psu1_status = psu_info.status; + if (psu1_status != pre_psu1_status) { + if((psu1_status & ONLP_PSU_STATUS_PRESENT) == 0) { + rc = onlp_ledi_mode_set(LED_OID_PSU1, ONLP_LED_MODE_OFF); + } + else if(psu1_status != ONLP_PSU_STATUS_PRESENT) { + rc = onlp_ledi_mode_set(LED_OID_PSU1, ONLP_LED_MODE_ORANGE); + } else { + rc = onlp_ledi_mode_set(LED_OID_PSU1, ONLP_LED_MODE_GREEN); + } + + if (rc != ONLP_STATUS_OK) { + goto _EXIT; + } + pre_psu1_status = psu1_status; + } + + if ((rc = onlp_psui_info_get(PSU_OID_PSU2, &psu_info)) != ONLP_STATUS_OK) { + goto _EXIT; + } + + psu2_status = psu_info.status; + if( psu2_status != pre_psu2_status) { + if((psu2_status & ONLP_PSU_STATUS_PRESENT) == 0) { + rc = onlp_ledi_mode_set(LED_OID_PSU2, ONLP_LED_MODE_OFF); + } + else if(psu2_status != ONLP_PSU_STATUS_PRESENT) { + rc = onlp_ledi_mode_set(LED_OID_PSU2, ONLP_LED_MODE_ORANGE); + } else { + rc = onlp_ledi_mode_set(LED_OID_PSU2, ONLP_LED_MODE_GREEN); + } + + if (rc != ONLP_STATUS_OK) { + goto _EXIT; + } + pre_psu2_status = psu2_status; + } + + /* FAN LED CTRL */ + for (i=0; i ONLP_LED_STATUS_FAILED) { + rc = onlp_ledi_mode_set(fan_tray_id, ONLP_LED_MODE_ORANGE); + + } else { + rc = onlp_ledi_mode_set(fan_tray_id, ONLP_LED_MODE_GREEN); + } + + if (rc != ONLP_STATUS_OK) { + goto _EXIT; + } + + pre_fan_tray_status[fan_tray_id - 5] = sum; + } + } + } + + + if (total != pre_fan_status) { + if (total == (ONLP_LED_STATUS_PRESENT * 8)) { + rc = onlp_ledi_mode_set(LED_OID_FAN, ONLP_LED_MODE_GREEN); + } else { + rc = onlp_ledi_mode_set(LED_OID_FAN, ONLP_LED_MODE_ORANGE); + } + + if (rc != ONLP_STATUS_OK) { + goto _EXIT; + } + + pre_fan_status = total; + } + +_EXIT : + return rc; +} + +int +onlp_sysi_platform_info_get(onlp_platform_info_t* pi) +{ + int rc; + if ((rc = sysi_platform_info_get(pi)) != ONLP_STATUS_OK) { + return ONLP_STATUS_E_INTERNAL; + } + + return ONLP_STATUS_OK; +} + diff --git a/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/builds/src/x86_64_ingrasys_s9180_32x/module/src/thermali.c b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/builds/src/x86_64_ingrasys_s9180_32x/module/src/thermali.c new file mode 100755 index 00000000..95bebcc7 --- /dev/null +++ b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/builds/src/x86_64_ingrasys_s9180_32x/module/src/thermali.c @@ -0,0 +1,301 @@ +/************************************************************ + * + * + * Copyright 2014, 2015 Big Switch Networks, Inc. + * + * Licensed under the Eclipse Public License, Version 1.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.eclipse.org/legal/epl-v10.html + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, + * either express or implied. See the License for the specific + * language governing permissions and limitations under the + * License. + * + * + ************************************************************ + * + * Thermal Sensor Platform Implementation. + * + ***********************************************************/ +#include +#include +#include "x86_64_ingrasys_s9180_32x_log.h" +#include "platform_lib.h" + +static onlp_thermal_info_t thermal_info[] = { + { }, /* Not used */ + { { THERMAL_OID_FRONT_MAC, "Front MAC", 0}, + ONLP_THERMAL_STATUS_PRESENT, + ONLP_THERMAL_CAPS_ALL, 0, THERMAL_THRESHOLD_INIT_DEFAULTS + }, + { { THERMAL_OID_ASIC, "ASIC Core Temp", 0}, + ONLP_THERMAL_STATUS_PRESENT, + ONLP_THERMAL_CAPS_ALL, 0, THERMAL_THRESHOLD_INIT_DEFAULTS + }, + { { THERMAL_OID_CPU1, "CPU Thermal 1", 0}, + ONLP_THERMAL_STATUS_PRESENT, + ONLP_THERMAL_CAPS_ALL, 0, THERMAL_THRESHOLD_INIT_DEFAULTS + }, + { { THERMAL_OID_CPU2, "CPU Thermal 2", 0}, + ONLP_THERMAL_STATUS_PRESENT, + ONLP_THERMAL_CAPS_ALL, 0, THERMAL_THRESHOLD_INIT_DEFAULTS + }, + { { THERMAL_OID_CPU3, "CPU Thermal 3", 0}, + ONLP_THERMAL_STATUS_PRESENT, + ONLP_THERMAL_CAPS_ALL, 0, THERMAL_THRESHOLD_INIT_DEFAULTS + }, + { { THERMAL_OID_CPU4, "CPU Thermal 4", 0}, + ONLP_THERMAL_STATUS_PRESENT, + ONLP_THERMAL_CAPS_ALL, 0, THERMAL_THRESHOLD_INIT_DEFAULTS + }, + { { THERMAL_OID_PSU1_1, "PSU-1 Thermal 1", PSU_OID_PSU1}, + ONLP_THERMAL_STATUS_PRESENT, + ONLP_THERMAL_CAPS_GET_TEMPERATURE, 0 + }, + { { THERMAL_OID_PSU1_2, "PSU-1 Thermal 2", PSU_OID_PSU1}, + ONLP_THERMAL_STATUS_PRESENT, + ONLP_THERMAL_CAPS_GET_TEMPERATURE, 0 + }, + { { THERMAL_OID_PSU2_1, "PSU-2 Thermal 1", PSU_OID_PSU2}, + ONLP_THERMAL_STATUS_PRESENT, + ONLP_THERMAL_CAPS_GET_TEMPERATURE, 0 + }, + { { THERMAL_OID_PSU2_2, "PSU-2 Thermal 2", PSU_OID_PSU2}, + ONLP_THERMAL_STATUS_PRESENT, + ONLP_THERMAL_CAPS_GET_TEMPERATURE, 0 + }, + { { THERMAL_OID_CPU_BOARD, "CPU Board", 0}, + ONLP_THERMAL_STATUS_PRESENT, + ONLP_THERMAL_CAPS_GET_TEMPERATURE, 0 + }, + { { THERMAL_OID_PSU1_NEAR, "Near PSU 1", 0}, + ONLP_THERMAL_STATUS_PRESENT, + ONLP_THERMAL_CAPS_GET_TEMPERATURE, 0 + }, + { { THERMAL_OID_PSU2_NEAR, "Near PSU 2", 0}, + ONLP_THERMAL_STATUS_PRESENT, + ONLP_THERMAL_CAPS_GET_TEMPERATURE, 0 + }, + { { THERMAL_OID_MAC_REAR, "Rear MAC", 0}, + ONLP_THERMAL_STATUS_PRESENT, + ONLP_THERMAL_CAPS_GET_TEMPERATURE, 0 + }, + { { THERMAL_OID_QSFP_NEAR, "Near QSFP Port", 0}, + ONLP_THERMAL_STATUS_PRESENT, + ONLP_THERMAL_CAPS_GET_TEMPERATURE, 0 + } +}; + +/* + * This will be called to intiialize the thermali subsystem. + */ +int +onlp_thermali_init(void) +{ + return ONLP_STATUS_OK; +} + +static int +sys_thermal_info_get(onlp_thermal_info_t* info, int id) +{ + int rv; + + rv = onlp_file_read_int(&info->mcelsius, + SYS_CORE_TEMP_PREFIX "temp%d_input", id); + + if(rv == ONLP_STATUS_E_INTERNAL) { + return rv; + } + + if(rv == ONLP_STATUS_E_MISSING) { + info->status &= ~1; + return 0; + } + + return ONLP_STATUS_OK; +} + +static int +cpu_thermal_info_get(onlp_thermal_info_t* info, int id) +{ + int rv; + int offset; + + offset = 1; + id = id - offset; + rv = onlp_file_read_int(&info->mcelsius, + SYS_CPU_TEMP_PREFIX "temp%d_input", id); + + if(rv == ONLP_STATUS_E_INTERNAL) { + return rv; + } + + if(rv == ONLP_STATUS_E_MISSING) { + info->status &= ~1; + return 0; + } + + return ONLP_STATUS_OK; +} + +int +psu_thermal_info_get(onlp_thermal_info_t* info, int id) +{ + int rv; + + rv = psu_thermal_get(info, id); + if(rv == ONLP_STATUS_E_INTERNAL) { + return rv; + } + + return ONLP_STATUS_OK; +} + +static int +cpu_board_thermal_info_get(onlp_thermal_info_t* info) +{ + int rv; + + rv = onlp_file_read_int(&info->mcelsius, + SYS_CPU_BOARD_TEMP_PREFIX "temp1_input"); + + if (rv == ONLP_STATUS_E_INTERNAL) { + return rv; + } + + if (rv == ONLP_STATUS_E_MISSING) { + info->status &= ~1; + return 0; + } + + return ONLP_STATUS_OK; +} + +static int +psu_near_thermal_info_get(onlp_thermal_info_t* info, int id) +{ + int rv; + + if (id == THERMAL_ID_PSU1_NEAR) { + rv = onlp_file_read_int(&info->mcelsius, + SYS_PSU1_NEAR_TEMP_PREFIX "temp1_input"); + } else if (id == THERMAL_ID_PSU2_NEAR) { + rv = onlp_file_read_int(&info->mcelsius, + SYS_PSU2_NEAR_TEMP_PREFIX "temp1_input"); + } else { + return ONLP_STATUS_E_INTERNAL; + } + + if (rv == ONLP_STATUS_E_INTERNAL) { + return rv; + } + + if (rv == ONLP_STATUS_E_MISSING) { + info->status &= ~1; + return 0; + } + + return ONLP_STATUS_OK; +} + +static int +mac_rear_thermal_info_get(onlp_thermal_info_t* info) +{ + int rv; + + rv = onlp_file_read_int(&info->mcelsius, + SYS_MAC_REAR_TEMP_PREFIX "temp1_input"); + + if (rv == ONLP_STATUS_E_INTERNAL) { + return rv; + } + + if (rv == ONLP_STATUS_E_MISSING) { + info->status &= ~1; + return 0; + } + + return ONLP_STATUS_OK; +} + +static int +qsfp_near_thermal_info_get(onlp_thermal_info_t* info) +{ + int rv; + + rv = onlp_file_read_int(&info->mcelsius, + SYS_QSFP_NEAR_TEMP_PREFIX "temp1_input"); + + if (rv == ONLP_STATUS_E_INTERNAL) { + return rv; + } + + if (rv == ONLP_STATUS_E_MISSING) { + info->status &= ~1; + return 0; + } + + return ONLP_STATUS_OK; +} + +/* + * Retrieve the information structure for the given thermal OID. + * + * If the OID is invalid, return ONLP_E_STATUS_INVALID. + * If an unexpected error occurs, return ONLP_E_STATUS_INTERNAL. + * Otherwise, return ONLP_STATUS_OK with the OID's information. + * + * Note -- it is expected that you fill out the information + * structure even if the sensor described by the OID is not present. + */ +int +onlp_thermali_info_get(onlp_oid_t id, onlp_thermal_info_t* info) +{ + int sensor_id, rc; + sensor_id = ONLP_OID_ID_GET(id); + + *info = thermal_info[sensor_id]; + info->caps |= ONLP_THERMAL_CAPS_GET_TEMPERATURE; + + switch (sensor_id) { + case THERMAL_ID_ASIC: + case THERMAL_ID_FRONT_MAC: + rc = sys_thermal_info_get(info, sensor_id); + break; + case THERMAL_ID_CPU1: + case THERMAL_ID_CPU2: + case THERMAL_ID_CPU3: + case THERMAL_ID_CPU4: + rc = cpu_thermal_info_get(info, sensor_id); + break; + case THERMAL_ID_PSU1_1: + case THERMAL_ID_PSU1_2: + case THERMAL_ID_PSU2_1: + case THERMAL_ID_PSU2_2: + rc = psu_thermal_info_get(info, sensor_id); + break; + case THERMAL_ID_CPU_BOARD: + rc = cpu_board_thermal_info_get(info); + break; + case THERMAL_ID_PSU1_NEAR: + case THERMAL_ID_PSU2_NEAR: + rc = psu_near_thermal_info_get(info, sensor_id); + break; + case THERMAL_ID_MAC_REAR: + rc = mac_rear_thermal_info_get(info); + break; + case THERMAL_ID_QSFP_NEAR: + rc = qsfp_near_thermal_info_get(info); + break; + default: + return ONLP_STATUS_E_INTERNAL; + break; + } + + return rc; +} diff --git a/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/builds/src/x86_64_ingrasys_s9180_32x/module/src/x86_64_ingrasys_s9180_32x_config.c b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/builds/src/x86_64_ingrasys_s9180_32x/module/src/x86_64_ingrasys_s9180_32x_config.c new file mode 100755 index 00000000..d0dab1c8 --- /dev/null +++ b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/builds/src/x86_64_ingrasys_s9180_32x/module/src/x86_64_ingrasys_s9180_32x_config.c @@ -0,0 +1,101 @@ +/************************************************************ + * + * + * Copyright 2014, 2015 Big Switch Networks, Inc. + * + * Licensed under the Eclipse Public License, Version 1.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.eclipse.org/legal/epl-v10.html + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, + * either express or implied. See the License for the specific + * language governing permissions and limitations under the + * License. + * + * + ************************************************************ + * + * + * + ***********************************************************/ + +#include + +/* */ +#define __x86_64_ingrasys_s9180_32x_config_STRINGIFY_NAME(_x) #_x +#define __x86_64_ingrasys_s9180_32x_config_STRINGIFY_VALUE(_x) __x86_64_ingrasys_s9180_32x_config_STRINGIFY_NAME(_x) +x86_64_ingrasys_s9180_32x_config_settings_t x86_64_ingrasys_s9180_32x_config_settings[] = +{ +#ifdef X86_64_INGRAYSYS_S9180_32X_CONFIG_INCLUDE_LOGGING + { __x86_64_ingrasys_s9180_32x_config_STRINGIFY_NAME(X86_64_INGRAYSYS_S9180_32X_CONFIG_INCLUDE_LOGGING), __x86_64_ingrasys_s9180_32x_config_STRINGIFY_VALUE(X86_64_INGRAYSYS_S9180_32X_CONFIG_INCLUDE_LOGGING) }, +#else +{ X86_64_INGRAYSYS_S9180_32X_CONFIG_INCLUDE_LOGGING(__x86_64_ingrasys_s9180_32x_config_STRINGIFY_NAME), "__undefined__" }, +#endif +#ifdef X86_64_INGRAYSYS_S9180_32X_CONFIG_LOG_OPTIONS_DEFAULT + { __x86_64_ingrasys_s9180_32x_config_STRINGIFY_NAME(X86_64_INGRAYSYS_S9180_32X_CONFIG_LOG_OPTIONS_DEFAULT), __x86_64_ingrasys_s9180_32x_config_STRINGIFY_VALUE(X86_64_INGRAYSYS_S9180_32X_CONFIG_LOG_OPTIONS_DEFAULT) }, +#else +{ X86_64_INGRAYSYS_S9180_32X_CONFIG_LOG_OPTIONS_DEFAULT(__x86_64_ingrasys_s9180_32x_config_STRINGIFY_NAME), "__undefined__" }, +#endif +#ifdef X86_64_INGRAYSYS_S9180_32X_CONFIG_LOG_BITS_DEFAULT + { __x86_64_ingrasys_s9180_32x_config_STRINGIFY_NAME(X86_64_INGRAYSYS_S9180_32X_CONFIG_LOG_BITS_DEFAULT), __x86_64_ingrasys_s9180_32x_config_STRINGIFY_VALUE(X86_64_INGRAYSYS_S9180_32X_CONFIG_LOG_BITS_DEFAULT) }, +#else +{ X86_64_INGRAYSYS_S9180_32X_CONFIG_LOG_BITS_DEFAULT(__x86_64_ingrasys_s9180_32x_config_STRINGIFY_NAME), "__undefined__" }, +#endif +#ifdef X86_64_INGRAYSYS_S9180_32X_CONFIG_LOG_CUSTOM_BITS_DEFAULT + { __x86_64_ingrasys_s9180_32x_config_STRINGIFY_NAME(X86_64_INGRAYSYS_S9180_32X_CONFIG_LOG_CUSTOM_BITS_DEFAULT), __x86_64_ingrasys_s9180_32x_config_STRINGIFY_VALUE(X86_64_INGRAYSYS_S9180_32X_CONFIG_LOG_CUSTOM_BITS_DEFAULT) }, +#else +{ X86_64_INGRAYSYS_S9180_32X_CONFIG_LOG_CUSTOM_BITS_DEFAULT(__x86_64_ingrasys_s9180_32x_config_STRINGIFY_NAME), "__undefined__" }, +#endif +#ifdef X86_64_INGRAYSYS_S9180_32X_CONFIG_PORTING_STDLIB + { __x86_64_ingrasys_s9180_32x_config_STRINGIFY_NAME(X86_64_INGRAYSYS_S9180_32X_CONFIG_PORTING_STDLIB), __x86_64_ingrasys_s9180_32x_config_STRINGIFY_VALUE(X86_64_INGRAYSYS_S9180_32X_CONFIG_PORTING_STDLIB) }, +#else +{ X86_64_INGRAYSYS_S9180_32X_CONFIG_PORTING_STDLIB(__x86_64_ingrasys_s9180_32x_config_STRINGIFY_NAME), "__undefined__" }, +#endif +#ifdef X86_64_INGRAYSYS_S9180_32X_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS + { __x86_64_ingrasys_s9180_32x_config_STRINGIFY_NAME(X86_64_INGRAYSYS_S9180_32X_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS), __x86_64_ingrasys_s9180_32x_config_STRINGIFY_VALUE(X86_64_INGRAYSYS_S9180_32X_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS) }, +#else +{ X86_64_INGRAYSYS_S9180_32X_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS(__x86_64_ingrasys_s9180_32x_config_STRINGIFY_NAME), "__undefined__" }, +#endif +#ifdef X86_64_INGRAYSYS_S9180_32X_CONFIG_INCLUDE_UCLI + { __x86_64_ingrasys_s9180_32x_config_STRINGIFY_NAME(X86_64_INGRAYSYS_S9180_32X_CONFIG_INCLUDE_UCLI), __x86_64_ingrasys_s9180_32x_config_STRINGIFY_VALUE(X86_64_INGRAYSYS_S9180_32X_CONFIG_INCLUDE_UCLI) }, +#else +{ X86_64_INGRAYSYS_S9180_32X_CONFIG_INCLUDE_UCLI(__x86_64_ingrasys_s9180_32x_config_STRINGIFY_NAME), "__undefined__" }, +#endif +#ifdef X86_64_INGRAYSYS_S9180_32X_CONFIG_SFP_COUNT + { __x86_64_ingrasys_s9180_32x_config_STRINGIFY_NAME(X86_64_INGRAYSYS_S9180_32X_CONFIG_SFP_COUNT), __x86_64_ingrasys_s9180_32x_config_STRINGIFY_VALUE(X86_64_INGRAYSYS_S9180_32X_CONFIG_SFP_COUNT) }, +#else +{ X86_64_INGRAYSYS_S9180_32X_CONFIG_SFP_COUNT(__x86_64_ingrasys_s9180_32x_config_STRINGIFY_NAME), "__undefined__" }, +#endif + { NULL, NULL } +}; +#undef __x86_64_ingrasys_s9180_32x_config_STRINGIFY_VALUE +#undef __x86_64_ingrasys_s9180_32x_config_STRINGIFY_NAME + +const char* +x86_64_ingrasys_s9180_32x_config_lookup(const char* setting) +{ + int i; + for(i = 0; x86_64_ingrasys_s9180_32x_config_settings[i].name; i++) { + if(strcmp(x86_64_ingrasys_s9180_32x_config_settings[i].name, setting)) { + return x86_64_ingrasys_s9180_32x_config_settings[i].value; + } + } + return NULL; +} + +int +x86_64_ingrasys_s9180_32x_config_show(struct aim_pvs_s* pvs) +{ + int i; + for(i = 0; x86_64_ingrasys_s9180_32x_config_settings[i].name; i++) { + aim_printf(pvs, "%s = %s\n", x86_64_ingrasys_s9180_32x_config_settings[i].name, x86_64_ingrasys_s9180_32x_config_settings[i].value); + } + return i; +} + +/* */ + diff --git a/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/builds/src/x86_64_ingrasys_s9180_32x/module/src/x86_64_ingrasys_s9180_32x_enums.c b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/builds/src/x86_64_ingrasys_s9180_32x/module/src/x86_64_ingrasys_s9180_32x_enums.c new file mode 100755 index 00000000..30d7f908 --- /dev/null +++ b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/builds/src/x86_64_ingrasys_s9180_32x/module/src/x86_64_ingrasys_s9180_32x_enums.c @@ -0,0 +1,30 @@ +/************************************************************ + * + * + * Copyright 2014, 2015 Big Switch Networks, Inc. + * + * Licensed under the Eclipse Public License, Version 1.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.eclipse.org/legal/epl-v10.html + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, + * either express or implied. See the License for the specific + * language governing permissions and limitations under the + * License. + * + * + ************************************************************ + * + * + * + ***********************************************************/ + +#include + +/* <--auto.start.enum(ALL).source> */ +/* */ + diff --git a/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/builds/src/x86_64_ingrasys_s9180_32x/module/src/x86_64_ingrasys_s9180_32x_int.h b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/builds/src/x86_64_ingrasys_s9180_32x/module/src/x86_64_ingrasys_s9180_32x_int.h new file mode 100755 index 00000000..54e126e4 --- /dev/null +++ b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/builds/src/x86_64_ingrasys_s9180_32x/module/src/x86_64_ingrasys_s9180_32x_int.h @@ -0,0 +1,29 @@ +/************************************************************ + * + * + * Copyright 2014, 2015 Big Switch Networks, Inc. + * + * Licensed under the Eclipse Public License, Version 1.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.eclipse.org/legal/epl-v10.html + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, + * either express or implied. See the License for the specific + * language governing permissions and limitations under the + * License. + * + * + ************************************************************ + * + * + * + ***********************************************************/ + +#ifndef __x86_64_ingrasys_s9180_32x_INT_H__ +#define __x86_64_ingrasys_s9180_32x_INT_H__ + +#endif /* __x86_64_ingrasys_s9180_32x_INT_H__ */ diff --git a/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/builds/src/x86_64_ingrasys_s9180_32x/module/src/x86_64_ingrasys_s9180_32x_log.c b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/builds/src/x86_64_ingrasys_s9180_32x/module/src/x86_64_ingrasys_s9180_32x_log.c new file mode 100755 index 00000000..c1e2fcaf --- /dev/null +++ b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/builds/src/x86_64_ingrasys_s9180_32x/module/src/x86_64_ingrasys_s9180_32x_log.c @@ -0,0 +1,38 @@ +/************************************************************ + * + * + * Copyright 2014, 2015 Big Switch Networks, Inc. + * + * Licensed under the Eclipse Public License, Version 1.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.eclipse.org/legal/epl-v10.html + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, + * either express or implied. See the License for the specific + * language governing permissions and limitations under the + * License. + * + * + ************************************************************ + * + * + * + ***********************************************************/ + +#include + +#include "x86_64_ingrasys_s9180_32x_log.h" +/* + * x86_64_ingrasys_s9180_32x log struct. + */ +AIM_LOG_STRUCT_DEFINE( + X86_64_INGRAYSYS_S9180_32X_CONFIG_LOG_OPTIONS_DEFAULT, + X86_64_INGRAYSYS_S9180_32X_CONFIG_LOG_BITS_DEFAULT, + NULL, /* Custom log map */ + X86_64_INGRAYSYS_S9180_32X_CONFIG_LOG_CUSTOM_BITS_DEFAULT + ); + diff --git a/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/builds/src/x86_64_ingrasys_s9180_32x/module/src/x86_64_ingrasys_s9180_32x_log.h b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/builds/src/x86_64_ingrasys_s9180_32x/module/src/x86_64_ingrasys_s9180_32x_log.h new file mode 100755 index 00000000..f69147bf --- /dev/null +++ b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/builds/src/x86_64_ingrasys_s9180_32x/module/src/x86_64_ingrasys_s9180_32x_log.h @@ -0,0 +1,32 @@ +/************************************************************ + * + * + * Copyright 2014, 2015 Big Switch Networks, Inc. + * + * Licensed under the Eclipse Public License, Version 1.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.eclipse.org/legal/epl-v10.html + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, + * either express or implied. See the License for the specific + * language governing permissions and limitations under the + * License. + * + * + ************************************************************ + * + * + * + ***********************************************************/ + +#ifndef __x86_64_ingrasys_s9180_32x_LOG_H__ +#define __x86_64_ingrasys_s9180_32x_LOG_H__ + +#define AIM_LOG_MODULE_NAME x86_64_ingrasys_s9180_32x +#include + +#endif /* __x86_64_ingrasys_s9180_32x_LOG_H__ */ diff --git a/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/builds/src/x86_64_ingrasys_s9180_32x/module/src/x86_64_ingrasys_s9180_32x_module.c b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/builds/src/x86_64_ingrasys_s9180_32x/module/src/x86_64_ingrasys_s9180_32x_module.c new file mode 100755 index 00000000..35ffa630 --- /dev/null +++ b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/builds/src/x86_64_ingrasys_s9180_32x/module/src/x86_64_ingrasys_s9180_32x_module.c @@ -0,0 +1,44 @@ +/************************************************************ + * + * + * Copyright 2014, 2015 Big Switch Networks, Inc. + * + * Licensed under the Eclipse Public License, Version 1.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.eclipse.org/legal/epl-v10.html + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, + * either express or implied. See the License for the specific + * language governing permissions and limitations under the + * License. + * + * + ************************************************************ + * + * + * + ***********************************************************/ + +#include + +#include "x86_64_ingrasys_s9180_32x_log.h" + +static int +datatypes_init__(void) +{ +#define INGRAYSYS_S9180_32X_ENUMERATION_ENTRY(_enum_name, _desc) AIM_DATATYPE_MAP_REGISTER(_enum_name, _enum_name##_map, _desc, AIM_LOG_INTERNAL); +#include + return 0; +} + +void __x86_64_ingrasys_s9180_32x_module_init__(void) +{ + AIM_LOG_STRUCT_REGISTER(); + datatypes_init__(); +} + +int __onlp_platform_version__ = 1; diff --git a/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/builds/src/x86_64_ingrasys_s9180_32x/module/src/x86_64_ingrasys_s9180_32x_ucli.c b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/builds/src/x86_64_ingrasys_s9180_32x/module/src/x86_64_ingrasys_s9180_32x_ucli.c new file mode 100755 index 00000000..dee69a62 --- /dev/null +++ b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/onlp/builds/src/x86_64_ingrasys_s9180_32x/module/src/x86_64_ingrasys_s9180_32x_ucli.c @@ -0,0 +1,82 @@ +/************************************************************ + * + * + * Copyright 2014, 2015 Big Switch Networks, Inc. + * + * Licensed under the Eclipse Public License, Version 1.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.eclipse.org/legal/epl-v10.html + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, + * either express or implied. See the License for the specific + * language governing permissions and limitations under the + * License. + * + * + ************************************************************ + * + * + * + ***********************************************************/ + +#include + +#if ONLPSIM_CONFIG_INCLUDE_UCLI == 1 + +#include +#include +#include + +static ucli_status_t +x86_64_ingrasys_s9180_32x_ucli_ucli__config__(ucli_context_t* uc) +{ + UCLI_HANDLER_MACRO_MODULE_CONFIG(x86_64_ingrasys_s9180_32x) +} + +/* */ +/****************************************************************************** + * + * These handler table(s) were autogenerated from the symbols in this + * source file. + * + *****************************************************************************/ +static ucli_command_handler_f x86_64_ingrasys_s9180_32x_ucli_ucli_handlers__[] = +{ + x86_64_ingrasys_s9180_32x_ucli_ucli__config__, + NULL +}; +/******************************************************************************/ +/* */ + +static ucli_module_t +x86_64_ingrasys_s9180_32x_ucli_module__ = + { + "x86_64_ingrasys_s9180_32x_ucli", + NULL, + x86_64_ingrasys_s9180_32x_ucli_ucli_handlers__, + NULL, + NULL, + }; + +ucli_node_t* +x86_64_ingrasys_s9180_32x_ucli_node_create(void) +{ + ucli_node_t* n; + ucli_module_init(&x86_64_ingrasys_s9180_32x_ucli_module__); + n = ucli_node_create("x86_64_ingrasys_s9180_32x", NULL, &x86_64_ingrasys_s9180_32x_ucli_module__); + ucli_node_subnode_add(n, ucli_module_log_node_create("x86_64_ingrasys_s9180_32x")); + return n; +} + +#else +void* +x86_64_ingrasys_s9180_32x_ucli_node_create(void) +{ + return NULL; +} +#endif + diff --git a/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/platform-config/Makefile b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/platform-config/Makefile new file mode 100755 index 00000000..003238cf --- /dev/null +++ b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/platform-config/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/platform-config/r0/Makefile b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/platform-config/r0/Makefile new file mode 100755 index 00000000..003238cf --- /dev/null +++ b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/platform-config/r0/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/platform-config/r0/PKG.yml b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/platform-config/r0/PKG.yml new file mode 100755 index 00000000..8054deba --- /dev/null +++ b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/platform-config/r0/PKG.yml @@ -0,0 +1 @@ +!include $ONL_TEMPLATES/platform-config-platform.yml ARCH=amd64 VENDOR=ingrasys BASENAME=x86-64-ingrasys-s9180-32x REVISION=r0 diff --git a/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/platform-config/r0/src/lib/x86-64-ingrasys-s9180-32x-r0.yml b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/platform-config/r0/src/lib/x86-64-ingrasys-s9180-32x-r0.yml new file mode 100755 index 00000000..1e2b0902 --- /dev/null +++ b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/platform-config/r0/src/lib/x86-64-ingrasys-s9180-32x-r0.yml @@ -0,0 +1,30 @@ +--- + +###################################################################### +# +# platform-config for x86-64-ingrasys-s9180-32x +# +###################################################################### + +x86-64-ingrasys-s9180-32x-r0: + + grub: + + serial: >- + --port=0x3f8 + --speed=115200 + --word=8 + --parity=no + --stop=1 + + kernel: + <<: *kernel-3-16 + + args: >- + console=ttyS0,115200n8 + + ##network + ## interfaces: + ## ma1: + ## name: ~ + ## syspath: pci0000:00/0000:00:03.0 diff --git a/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/platform-config/r0/src/python/x86_64_ingrasys_s9180_32x_r0/__init__.py b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/platform-config/r0/src/python/x86_64_ingrasys_s9180_32x_r0/__init__.py new file mode 100755 index 00000000..002c1774 --- /dev/null +++ b/packages/platforms/ingrasys/x86-64/x86-64-ingrasys-s9180-32x/platform-config/r0/src/python/x86_64_ingrasys_s9180_32x_r0/__init__.py @@ -0,0 +1,287 @@ +from onl.platform.base import * +from onl.platform.ingrasys import * +import os + +class OnlPlatform_x86_64_ingrasys_s9180_32x_r0(OnlPlatformIngrasys): + PLATFORM='x86-64-ingrasys-s9180-32x-r0' + MODEL="S9180-32X" + SYS_OBJECT_ID=".9180.32" + + def baseconfig(self): + + self.insmod("eeprom_mb") + # init SYS EEPROM devices + self.new_i2c_device('mb_eeprom', 0x55, 0) + + os.system("modprobe w83795") + os.system("modprobe eeprom") + + ########### initialize I2C bus 0 ########### + # init PCA9548 + self.new_i2c_devices( + [ + ('pca9548', 0x70, 0), + ('pca9548', 0x71, 1), + ('pca9548', 0x71, 2), + ('pca9548', 0x71, 3), + ('pca9548', 0x71, 4), + ('pca9548', 0x71, 7), + ('pca9548', 0x76, 0), + ] + ) + + # init PCA9545 + self.new_i2c_device('pca9545', 0x72, 0) + + # Golden Finger to show CPLD + os.system("i2cget -y 44 0x74 2") + + # Reset BMC Dummy Board + os.system("i2cset -y -r 0 0x26 4 0x00") + os.system("i2cset -y -r 0 0x26 5 0x00") + os.system("i2cset -y -r 0 0x26 2 0x3F") + os.system("i2cset -y -r 0 0x26 3 0x1F") + os.system("i2cset -y -r 0 0x26 6 0xC0") + os.system("i2cset -y -r 0 0x26 7 0x00") + + # CPU Baord + os.system("i2cset -y -r 0 0x77 6 0xFF") + os.system("i2cset -y -r 0 0x77 7 0xFF") + + # init SMBUS1 ABS + os.system("i2cset -y -r 5 0x20 4 0x00") + os.system("i2cset -y -r 5 0x20 5 0x00") + os.system("i2cset -y -r 5 0x20 6 0xFF") + os.system("i2cset -y -r 5 0x20 7 0xFF") + + os.system("i2cset -y -r 5 0x21 4 0x00") + os.system("i2cset -y -r 5 0x21 5 0x00") + os.system("i2cset -y -r 5 0x21 6 0xFF") + os.system("i2cset -y -r 5 0x21 7 0xFF") + + os.system("i2cset -y -r 5 0x22 4 0x00") + os.system("i2cset -y -r 5 0x22 5 0x00") + os.system("i2cset -y -r 5 0x22 6 0xFF") + os.system("i2cset -y -r 5 0x22 7 0xFF") + + os.system("i2cset -y -r 5 0x23 4 0x00") + os.system("i2cset -y -r 5 0x23 5 0x00") + os.system("i2cset -y -r 5 0x23 2 0xCF") + os.system("i2cset -y -r 5 0x23 3 0xF0") + os.system("i2cset -y -r 5 0x23 6 0xCF") + os.system("i2cset -y -r 5 0x23 7 0xF0") + + # init SFP + os.system("i2cset -y -r 5 0x27 4 0x00") + os.system("i2cset -y -r 5 0x27 5 0x00") + os.system("i2cset -y -r 5 0x27 2 0x00") + os.system("i2cset -y -r 5 0x27 3 0x00") + os.system("i2cset -y -r 5 0x27 6 0xCF") + os.system("i2cset -y -r 5 0x27 7 0xF0") + + # set ZQSFP LP_MODE = 0 + os.system("i2cset -y -r 6 0x20 4 0x00") + os.system("i2cset -y -r 6 0x20 5 0x00") + os.system("i2cset -y -r 6 0x20 2 0x00") + os.system("i2cset -y -r 6 0x20 3 0x00") + os.system("i2cset -y -r 6 0x20 6 0x00") + os.system("i2cset -y -r 6 0x20 7 0x00") + + os.system("i2cset -y -r 6 0x21 4 0x00") + os.system("i2cset -y -r 6 0x21 5 0x00") + os.system("i2cset -y -r 6 0x21 2 0x00") + os.system("i2cset -y -r 6 0x21 3 0x00") + os.system("i2cset -y -r 6 0x21 6 0x00") + os.system("i2cset -y -r 6 0x21 7 0x00") + + # set ZQSFP RST = 1 + os.system("i2cset -y -r 6 0x22 4 0x00") + os.system("i2cset -y -r 6 0x22 5 0x00") + os.system("i2cset -y -r 6 0x22 2 0xFF") + os.system("i2cset -y -r 6 0x22 3 0xFF") + os.system("i2cset -y -r 6 0x22 6 0x00") + os.system("i2cset -y -r 6 0x22 7 0x00") + + os.system("i2cset -y -r 6 0x23 4 0x00") + os.system("i2cset -y -r 6 0x23 5 0x00") + os.system("i2cset -y -r 6 0x23 2 0xFF") + os.system("i2cset -y -r 6 0x23 3 0xFF") + os.system("i2cset -y -r 6 0x23 6 0x00") + os.system("i2cset -y -r 6 0x23 7 0x00") + + # init Host GPIO + os.system("i2cset -y -r 0 0x74 4 0x00") + os.system("i2cset -y -r 0 0x74 5 0x00") + os.system("i2cset -y -r 0 0x74 2 0x0F") + os.system("i2cset -y -r 0 0x74 3 0xDF") + os.system("i2cset -y -r 0 0x74 6 0x08") + os.system("i2cset -y -r 0 0x74 7 0x1F") + + # init LED board after PVT (BAREFOOT_IO_EXP_LED_ID) + #os.system("i2cset -y -r 50 0x75 4 0x00") + #os.system("i2cset -y -r 50 0x75 5 0x00") + #os.system("i2cset -y -r 50 0x75 6 0x00") + #os.system("i2cset -y -r 50 0x75 7 0xFF") + + # init Board ID + os.system("i2cset -y -r 51 0x27 4 0x00") + os.system("i2cset -y -r 51 0x27 5 0x00") + os.system("i2cset -y -r 51 0x27 6 0xFF") + os.system("i2cset -y -r 51 0x27 7 0xFF") + + # init Board ID of Dummy BMC Board + os.system("i2cset -y -r 0 0x24 4 0x00") + os.system("i2cset -y -r 0 0x24 5 0x00") + os.system("i2cset -y -r 0 0x24 6 0xFF") + os.system("i2cset -y -r 0 0x24 7 0xFF") + + # init PSU I/O (BAREFOOT_IO_EXP_PSU_ID) + os.system("i2cset -y -r 0 0x25 4 0x00") + os.system("i2cset -y -r 0 0x25 5 0x00") + os.system("i2cset -y -r 0 0x25 2 0x00") + os.system("i2cset -y -r 0 0x25 3 0x1D") + os.system("i2cset -y -r 0 0x25 6 0xDB") + os.system("i2cset -y -r 0 0x25 7 0x03") + + # init FAN I/O (BAREFOOT_IO_EXP_FAN_ID) + os.system("i2cset -y -r 59 0x20 4 0x00") + os.system("i2cset -y -r 59 0x20 5 0x00") + os.system("i2cset -y -r 59 0x20 2 0x11") + os.system("i2cset -y -r 59 0x20 3 0x11") + os.system("i2cset -y -r 59 0x20 6 0xCC") + os.system("i2cset -y -r 59 0x20 7 0xCC") + + # init Fan + # select bank 0 + os.system("i2cset -y -r 56 0x2F 0x00 0x80") + # enable FANIN 1-8 + os.system("i2cset -y -r 56 0x2F 0x06 0xFF") + # disable FANIN 9-14 + os.system("i2cset -y -r 56 0x2F 0x07 0x00") + # select bank 2 + os.system("i2cset -y -r 56 0x2F 0x00 0x82") + # set PWM mode in FOMC + os.system("i2cset -y -r 56 0x2F 0x0F 0x00") + + # init VOLMON + os.system("i2cset -y -r 56 0x2F 0x00 0x80") + os.system("i2cset -y -r 56 0x2F 0x01 0x1C") + os.system("i2cset -y -r 56 0x2F 0x00 0x80") + os.system("i2cset -y -r 56 0x2F 0x02 0xFF") + os.system("i2cset -y -r 56 0x2F 0x03 0x50") + os.system("i2cset -y -r 56 0x2F 0x04 0x0A") + os.system("i2cset -y -r 56 0x2F 0x00 0x80") + os.system("i2cset -y -r 56 0x2F 0x01 0x1D") + self.new_i2c_device('w83795adg', 0x2F, 56) + + # init Fan Speed + os.system("echo 120 > /sys/class/hwmon/hwmon1/device/pwm1") + os.system("echo 120 > /sys/class/hwmon/hwmon1/device/pwm2") + + # init Temperature + self.new_i2c_devices( + [ + # ASIC Coretemp and Front MAC + ('lm86', 0x4C, 41), + + # CPU Board + ('tmp75', 0x4F, 0), + + # Near PSU1 + ('tmp75', 0x48, 41), + + # Rear MAC + ('tmp75', 0x4A, 41), + + # Near Port 32 + ('tmp75', 0x4B, 41), + + # Near PSU2 + ('tmp75', 0x4D, 41), + ] + ) + + # init GPIO, ABS Port 0-15 + self.new_i2c_device('pca9535', 0x20, 5) + for i in range(496, 512): + os.system("echo %d > /sys/class/gpio/export" % i) + os.system("echo 1 > /sys/class/gpio/gpio%d/active_low" % i) + + # init GPIO, ABS Port 16-31 + self.new_i2c_device('pca9535', 0x21, 5) + for i in range(480, 496): + os.system("echo %d > /sys/class/gpio/export" % i) + os.system("echo 1 > /sys/class/gpio/gpio%d/active_low" % i) + + # init GPIO, INT Port 0-15 + self.new_i2c_device('pca9535', 0x22, 5) + for i in range(464, 480): + os.system("echo %d > /sys/class/gpio/export" % i) + os.system("echo 1 > /sys/class/gpio/gpio%d/active_low" % i) + + # init GPIO, INT Port 16-31 + self.new_i2c_device('pca9535', 0x23, 5) + for i in range(448, 464): + os.system("echo %d > /sys/class/gpio/export" % i) + os.system("echo 1 > /sys/class/gpio/gpio%d/active_low" % i) + + # init GPIO, SFP + self.new_i2c_device('pca9535', 0x27, 5) + for i in range(432, 448): + os.system("echo %d > /sys/class/gpio/export" % i) + if i == 180 or i == 181 or i == 184 or \ + i == 185 or i == 186 or i == 187: + os.system("echo out > /sys/class/gpio/gpio%d/direction" % i) + else: + os.system("echo 1 > /sys/class/gpio/gpio%d/active_low" % i) + + # init GPIO, LP Mode Port 0-15 + self.new_i2c_device('pca9535', 0x20, 6) + for i in range(416, 432): + os.system("echo %d > /sys/class/gpio/export" % i) + os.system("echo out > /sys/class/gpio/gpio%d/direction" % i) + + # init GPIO, LP Mode Port 16-31 + self.new_i2c_device('pca9535', 0x21, 6) + for i in range(400, 416): + os.system("echo %d > /sys/class/gpio/export" % i) + os.system("echo out > /sys/class/gpio/gpio%d/direction" % i) + + # init GPIO, RST Port 0-15 + self.new_i2c_device('pca9535', 0x22, 6) + for i in range(384, 400): + os.system("echo %d > /sys/class/gpio/export" % i) + os.system("echo out > /sys/class/gpio/gpio%d/direction" % i) + os.system("echo 1 > /sys/class/gpio/gpio%d/active_low" % i) + os.system("echo 0 > /sys/class/gpio/gpio%d/value" % i) + + # init GPIO, RST Port 16-31 + self.new_i2c_device('pca9535', 0x23, 6) + for i in range(368, 384): + os.system("echo %d > /sys/class/gpio/export" % i) + os.system("echo out > /sys/class/gpio/gpio%d/direction" % i) + os.system("echo 1 > /sys/class/gpio/gpio%d/active_low" % i) + os.system("echo 0 > /sys/class/gpio/gpio%d/value" % i) + + # init QSFP EEPROM + for port in range(1, 33): + self.new_i2c_device('sff8436', 0x50, port + 8) + + # init SFP(0/1) EEPROM + self.new_i2c_device('sff8436', 0x50, 45) + self.new_i2c_device('sff8436', 0x50, 46) + + # init PSU(0/1) EEPROM devices + self.new_i2c_device('eeprom', 0x50, 57) + self.new_i2c_device('eeprom', 0x50, 58) + + # init SYS LED + os.system("i2cset -y -r 50 0x75 2 0x01") + os.system("i2cset -y -r 50 0x75 4 0x00") + os.system("i2cset -y -r 50 0x75 5 0x00") + os.system("i2cset -y -r 50 0x75 6 0x00") + os.system("i2cset -y -r 50 0x75 7 0x00") + + return True + +