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[Mellanox] Update HW-MGMT package to new version V.7.0030.1011 (#16239)

Browse Source 
- Why I did it
1. Update Mellanox HW-MGMT package to newer version V.7.0030.1011
2. Replace the SONiC PMON Thermal control algorithm with the one inside the HW-MGMT package on all Nvidia platforms
3. Support Spectrum-4 systems

- How I did it
1. Update the HW-MGMT package version number and submodule pointer
2. Remove the thermal control algorithm implementation from Mellanox platform API
3. Revise the patch to HW-MGMT package which will disable HW-MGMT from running on SIMX
4. Update the downstream kernel patch list

Signed-off-by: Kebo Liu <kebol@nvidia.com>
This commit is contained in:
Kebo Liu
2023-09-06 16:32:08 +08:00
committed by GitHub
parent 1e7db2ab01
commit e286869b24
195 changed files with 36511 additions and 3133 deletions
Download Patch File Download Diff File Expand all files Collapse all files

72
device/mellanox/x86_64-mlnx_msn2700-r0/thermal_policy.json
View File

@@ -4,77 +4,9 @@
"fan_speed_when_suspend": "60"
},
"info_types": [
{
"type": "fan_info"
},
{
"type": "psu_info"
},
{
"type": "chassis_info"
}
],
"policies": [
{
"name": "any fan absence",
"conditions": [
{
"type": "fan.any.absence"
}
],
"actions": [
{
"type": "fan.all.set_speed",
"speed": "100"
}
]
},
{
"name": "any psu absence",
"conditions": [
{
"type": "psu.any.absence"
}
],
"actions": [
{
"type": "fan.all.set_speed",
"speed": "100"
}
]
},
{
"name": "any fan broken",
"conditions": [
{
"type": "fan.any.fault"
}
],
"actions": [
{
"type": "fan.all.set_speed",
"speed": "100"
}
]
},
{
"name": "all fan and psu presence",
"conditions": [
{
"type": "fan.all.presence"
},
{
"type": "psu.all.presence"
},
{
"type": "fan.all.good"
}
],
"actions": [
{
"type": "thermal.recover"
}
]
}
]
}

4
platform/mellanox/hw-management.mk
View File

@@ -1,5 +1,5 @@
#
# Copyright (c) 2016-2022 NVIDIA CORPORATION & AFFILIATES.
# Copyright (c) 2016-2023 NVIDIA CORPORATION & AFFILIATES.
# Apache-2.0
#
# Licensed under the Apache License, Version 2.0 (the "License");
@@ -16,7 +16,7 @@
#
# Mellanox HW Management
MLNX_HW_MANAGEMENT_VERSION = 7.0020.4301
MLNX_HW_MANAGEMENT_VERSION = 7.0030.1011
export MLNX_HW_MANAGEMENT_VERSION

144
platform/mellanox/hw-management/0002-Disable-hw-mgmt-on-SimX-platforms.patch
View File

@@ -1,69 +1,103 @@
From 422b64397f2f33b394d037820f0ceb4c09e3a725 Mon Sep 17 00:00:00 2001
From: Alexander Allen <arallen@nvidia.com>
Date: Fri, 21 Jan 2022 16:47:19 +0000
Subject: [PATCH 2/4] Disable hw-mgmt on SimX platforms
From eb3a76d7fbd0cbf2c370ecadd912960b094403d6 Mon Sep 17 00:00:00 2001
From: Junchao-Mellanox <junchao@nvidia.com>
Date: Wed, 23 Aug 2023 14:33:44 +0800
Subject: [PATCH] [PATCH 2/4] Disable hw-mgmt on SimX platforms
---
usr/usr/bin/hw-management-ready.sh | 11 +++++++----
usr/usr/bin/hw-management.sh | 9 +++++++++
2 files changed, 16 insertions(+), 4 deletions(-)
usr/usr/bin/hw-management-ready.sh | 3 ---
usr/usr/bin/hw-management.sh | 21 +++++++++------------
2 files changed, 9 insertions(+), 15 deletions(-)
diff --git a/usr/usr/bin/hw-management-ready.sh b/usr/usr/bin/hw-management-ready.sh
index 88672a8..7558c68 100755
index 840bb0b..2f8547f 100755
--- a/usr/usr/bin/hw-management-ready.sh
+++ b/usr/usr/bin/hw-management-ready.sh
@@ -51,17 +51,20 @@ if [ -d /var/run/hw-management ]; then
rm -fr /var/run/hw-management
fi
-case $board_type in
-VMOD0014)
+if [ -z "$(lspci -vvv | grep SimX)" ]; then
+ case $board_type in
+ VMOD0014)
if [ ! -d /sys/devices/pci0000:00/0000:00:1f.0/NVSN2201:00/mlxreg-hotplug/hwmon ]; then
timeout 180 bash -c 'until [ -d /sys/devices/pci0000:00/0000:00:1f.0/NVSN2201:00/mlxreg-hotplug/hwmon ]; do sleep 0.2; done'
fi
;;
-*)
+ *)
if [ ! -d /sys/devices/platform/mlxplat/mlxreg-hotplug/hwmon ]; then
timeout 180 bash -c 'until [ -d /sys/devices/platform/mlxplat/mlxreg-hotplug/hwmon ]; do sleep 0.2; done'
fi
;;
-esac
+ esac
+fi
+
echo "Start Chassis HW management service."
logger -t hw-management -p daemon.notice "Start Chassis HW management service."
@@ -56,9 +56,6 @@ fi
# environment, TC need to be stopped.
if [ -n "$(lspci -vvv | grep SimX)" ]; then
case $product_sku in
- HI130|HI122)
- # Let the TC continue to run
- ;;
*)
if systemctl is-enabled --quiet hw-management-tc; then
echo "Stopping and disabling hw-management-tc on SimX"
diff --git a/usr/usr/bin/hw-management.sh b/usr/usr/bin/hw-management.sh
index 1ee05b5..50d922b 100755
index d3914d1..a60dba9 100755
--- a/usr/usr/bin/hw-management.sh
+++ b/usr/usr/bin/hw-management.sh
@@ -2310,6 +2310,13 @@ do_chip_down()
/usr/bin/hw-management-thermal-events.sh change hotplug_asic down %S %p
}
@@ -545,7 +545,7 @@ function restore_i2c_bus_frequency_default()
function find_regio_sysfs_path_helper()
{
# Find hwmon{n} sysfs path for regio device
- case $board_type in
+ case $board_type in
VMOD0014)
for path in /sys/devices/pci0000:00/*/NVSN2201:*/mlxreg-io/hwmon/hwmon*; do
if [ -d "$path" ]; then
@@ -732,10 +732,10 @@ set_jtag_gpio()
gpio_tdi=$((gpiobase+jtag_tdi))
echo $gpio_tdi > /sys/class/gpio/"$export_unexport"
+check_simx()
+{
+ if [ -n "$(lspci -vvv | grep SimX)" ]; then
+ exit 0
- # In SN2201 system.
+ # In SN2201 system.
# GPIO0 for CPU request to reset the Main Board I2C Mux.
- # GPIO1 for CPU control the CPU Board MUX when doing the ISP programming.
- # GPIO13 for CPU request Main Board JTAG control signal.
+ # GPIO1 for CPU control the CPU Board MUX when doing the ISP programming.
+ # GPIO13 for CPU request Main Board JTAG control signal.
if [ "$board_type" == "VMOD0014" ]; then
mux_reset=27
jtag_mux_en=33
@@ -1294,7 +1294,7 @@ connect_msn4700_msn4600_A1()
# msn4600C with removed A2D
connect_table+=(${msn4600C_A1_base_connect_table[@]})
else
- # msn4700/msn4600 respin
+ # msn4700/msn4600 respin
connect_table+=(${msn4700_msn4600_A1_base_connect_table[@]})
fi
add_cpu_board_to_connection_table
@@ -2144,7 +2144,7 @@ create_symbolic_links()
fi
if [ ! -d $thermal_path ]; then
mkdir $thermal_path
- fi
+ fi
+}
+
__usage="
Usage: $(basename "$0") [Options]
if [ ! -d $config_path ]; then
mkdir $config_path
fi
@@ -2341,7 +2341,7 @@ do_start()
check_system
set_asic_pci_id
@@ -2335,6 +2342,8 @@ Options:
force-reload Performs hw-management 'stop' and the 'start.
"
+check_simx
+
case $ACTION in
start)
if [ -d /var/run/hw-management ]; then
- asic_control=$(< $config_path/asic_control)
+ asic_control=$(< $config_path/asic_control)
if [[ $asic_control -ne 0 ]]; then
get_asic_bus
get_asic2_bus
@@ -2379,9 +2379,9 @@ do_start()
else
ln -sf /etc/sensors3.conf $config_path/lm_sensors_config
fi
- if [ -v "lm_sensors_labels" ] && [ -f $lm_sensors_labels ]; then
+ if [ -v "lm_sensors_labels" ] && [ -f $lm_sensors_labels ]; then
ln -sf $lm_sensors_labels $config_path/lm_sensors_labels
- fi
+ fi
if [ -v "thermal_control_config" ] && [ -f $thermal_control_config ]; then
ln -sf $thermal_control_config $config_path/tc_config.json
else
@@ -2528,9 +2528,6 @@ do_chip_up_down()
check_simx()
{
case $sku in
- HI130|HI122)
- # Let the initialization go through
- ;;
*)
if [ -n "$(lspci -vvv | grep SimX)" ]; then
exit 0
--
2.20.1
1.9.1

2
platform/mellanox/hw-management/hw-mgmt

Submodule platform/mellanox/hw-management/hw-mgmt updated: c036e38b39...c7d4c31a21

114
platform/mellanox/hw-management/hwmgmt_nonup_patches
View File

@@ -1,4 +1,10 @@
# Current non-upstream patch list, should be updated by hwmgmt_kernel_patches.py script
0049-leds-mlxreg-Provide-conversion-for-hardware-LED-colo.patch
0050-leds-mlxreg-Skip-setting-LED-color-during-initializa.patch
0051-leds-mlxreg-Allow-multi-instantiation-of-same-name-L.patch
0098-1-Revert-mlxsw-Use-u16-for-local_port-field.patch
0098-2-Revert-mlxsw-i2c-Fix-chunk-size-setting.patch
0098-3-Revert-mlxsw-core_hwmon-Adjust-module-label-names.patch
0099-mlxsw-core_hwmon-Fix-variable-names-for-hwmon-attrib.patch
0100-mlxsw-core_thermal-Rename-labels-according-to-naming.patch
0101-mlxsw-core_thermal-Remove-obsolete-API-for-query-res.patch
@@ -57,7 +63,107 @@
0154-mlxsw-core-Export-line-card-API.patch
0155-mlxsw-minimal-Add-system-event-handler.patch
0156-mlxsw-minimal-Add-interfaces-for-line-card-initializ.patch
0163-platform-mellanox-Introduce-support-for-rack-manager.patch
0176-platform-mellanox-fix-reset_pwr_converter_fail-attri.patch
0177-Documentation-ABI-fix-description-of-fix-reset_pwr_c.patch
0178-platform-mellanox-Introduce-support-for-next-generat.patch
0167-DS-lan743x-Add-support-for-fixed-phy.patch
0168-TMP-mlxsw-minimal-Ignore-error-reading-SPAD-register.patch
0171-platform-mellanox-mlxreg-lc-Fix-cleanup-on-failure-a.patch
0172-DS-platform-mlx-platform-Add-SPI-path-for-rack-switc.patch
0174-DS-mlxsw-core_linecards-Skip-devlink-and-provisionin.patch
0181-Revert-Fix-out-of-bounds-memory-accesses-in-thermal.patch
0182-platform-mellanox-Introduce-support-of-new-Nvidia-L1.patch
0183-platform-mellanox-Split-initialization-procedure.patch
0184-platform-mellanox-Split-logic-in-init-and-exit-flow.patch
0185-platform-mellanox-Extend-all-systems-with-I2C-notifi.patch
0187-platform_data-mlxreg-Add-field-with-mapped-resource-.patch
0188-i2c-mux-Add-register-map-based-mux-driver.patch
0189-i2c-mlxcpld-Allow-driver-to-run-on-ARM64-architectur.patch
0190-i2c-mlxcpld-Modify-base-address-type.patch
0191-i2c-mlxcpld-Allow-to-configure-base-address-of-regis.patch
0192-i2c-mlxcpld-Add-support-for-extended-transaction-len.patch
0193-platform-mellanox-mlx-platform-Add-mux-selection-reg.patch
0194-platform-mellanox-mlx-platform-Move-bus-shift-assign.patch
0195-platform-mellanox-Add-support-for-dynamic-I2C-channe.patch
0196-platform-mellanox-Relocate-mlx-platform-driver.patch
0197-platform-mellanox-Add-initial-support-for-PCIe-based.patch
0198-platform-mellanox-Introduce-support-for-switches-bas.patch
0199-platform-mellanox-mlx-platform-Add-reset-and-extend-.patch
0200-dt-bindings-i2c-mellanox-i2c-mlxbf-convert-txt-to-YA.patch
0203-i2c-mlxbf-remove-IRQF_ONESHOT.patch
0206-i2c-mlxbf-add-multi-slave-functionality.patch
0207-i2c-mlxbf-support-BlueField-3-SoC.patch
0208-i2c-mlxbf-remove-device-tree-support.patch
0209-UBUNTU-SAUCE-i2c-mlxbf.c-Add-driver-version.patch
0210-platform-mellanox-Typo-fix-in-the-file-mlxbf-bootctl.patch
0211-UBUNTU-SAUCE-platform-mellanox-Updates-to-mlxbf-boot.patch
0212-platform-mellanox-mlxbf-pmc-Add-Mellanox-BlueField-P.patch
0213-platform-mellanox-mlxbf-pmc-fix-kernel-doc-notation.patch
0214-platform-mellanox-mlxbf-pmc-Fix-an-IS_ERR-vs-NULL-bu.patch
0215-UBUNTU-SAUCE-platform-mellanox-Updates-to-mlxbf-pmc.patch
0216-UBUNTU-SAUCE-mlxbf_pmc-Fix-references-to-sprintf.patch
0217-UBUNTU-SAUCE-mlxbf-pmc-Fix-error-when-reading-unprog.patch
0218-UBUNTU-SAUCE-platform-mellanox-Add-mlx-trio-driver.patch
0219-UBUNTU-SAUCE-platform-mellanox-mlxbf-tmfifo-Add-Blue.patch
0220-UBUNTU-SAUCE-pka-Add-pka-driver.patch
0221-UBUNTU-SAUCE-platform-mellanox-Add-mlxbf-livefish-dr.patch
0222-workqueue-Add-resource-managed-version-of-delayed-wo.patch
0223-devm-helpers-Fix-devm_delayed_work_autocancel-kernel.patch
0224-devm-helpers-Add-resource-managed-version-of-work-in.patch
0225-UBUNTU-SAUCE-Add-support-to-pwr-mlxbf.c-driver.patch
0226-Add-Mellanox-BlueField-Gigabit-Ethernet-driver.patch
0227-mlxbf_gige-clear-valid_polarity-upon-open.patch
0228-net-mellanox-mlxbf_gige-Replace-non-standard-interru.patch
0229-mlxbf_gige-increase-MDIO-polling-rate-to-5us.patch
0230-mlxbf_gige-remove-driver-managed-interrupt-counts.patch
0231-mlxbf_gige-remove-own-module-name-define-and-use-KBU.patch
0232-UBUNTU-SAUCE-mlxbf_gige-add-ethtool-mlxbf_gige_set_r.patch
0233-UBUNTU-SAUCE-Fix-OOB-handling-RX-packets-in-heavy-tr.patch
0234-UBUNTU-SAUCE-mlxbf_gige-add-validation-of-ACPI-table.patch
0235-UBUNTU-SAUCE-mlxbf_gige-set-driver-version-to-1.27.patch
0236-UBUNTU-SAUCE-mlxbf_gige-clear-MDIO-gateway-lock-afte.patch
0237-mlxbf_gige-compute-MDIO-period-based-on-i1clk.patch
0238-net-mlxbf_gige-Fix-an-IS_ERR-vs-NULL-bug-in-mlxbf_gi.patch
0239-UBUNTU-SAUCE-mlxbf_gige-add-MDIO-support-for-BlueFie.patch
0240-UBUNTU-SAUCE-mlxbf_gige-support-10M-100M-1G-speeds-o.patch
0241-UBUNTU-SAUCE-mlxbf_gige-add-BlueField-3-Serdes-confi.patch
0242-UBUNTU-SAUCE-mlxbf_gige-add-BlueField-3-ethtool_ops.patch
0243-UBUNTU-SAUCE-bluefield_edac-Add-SMC-support.patch
0244-UBUNTU-SAUCE-bluefield_edac-Update-license-and-copyr.patch
0245-gpio-mlxbf2-Convert-to-device-PM-ops.patch
0246-gpio-mlxbf2-Drop-wrong-use-of-ACPI_PTR.patch
0247-gpio-mlxbf2-Use-devm_platform_ioremap_resource.patch
0248-gpio-mlxbf2-Use-DEFINE_RES_MEM_NAMED-helper-macro.patch
0249-gpio-mlxbf2-Introduce-IRQ-support.patch
0250-UBUNTU-SAUCE-gpio-mlxbf2.c-support-driver-version.patch
0251-mmc-sdhci-of-dwcmshc-add-rockchip-platform-support.patch
0252-mmc-sdhci-of-dwcmshc-add-ACPI-support-for-BlueField-.patch
0253-mmc-sdhci-of-dwcmshc-fix-error-return-code-in-dwcmsh.patch
0254-mmc-sdhci-of-dwcmshc-set-MMC_CAP_WAIT_WHILE_BUSY.patch
0255-mmc-sdhci-of-dwcmshc-Re-enable-support-for-the-BlueF.patch
0256-UBUNTU-SAUCE-Support-BlueField-3-GPIO-driver.patch
0257-regmap-debugfs-Enable-writing-to-the-regmap-debugfs-.patch
0258-UBUNTU-SAUCE-mlx-bootctl-support-icm-carveout-eeprom.patch
0259-mmc-sdhci-of-dwcmshc-Enable-host-V4-support-for-Blue.patch
0260-UBUNTU-SAUCE-mlxbf-pka-Fix-kernel-crash-with-pka-TRN.patch
0261-mlxbf-ptm-power-and-thermal-management-debugfs-drive.patch
0262-UBUNTU-SAUCE-mlxbf-pmc-Fix-event-string-typo.patch
0263-UBUNTU-SAUCE-mlxbf-pmc-Support-for-BlueField-3-perfo.patch
0264-UBUNTU-SAUCE-platform-mellanox-Add-ctrl-message-and-.patch
0266-UBUNTU-SAUCE-mlxbf-pmc-Bug-fix-for-BlueField-3-count.patch
0267-UBUNTU-SAUCE-mmc-sdhci-of-dwcmshc-add-the-missing-de.patch
0268-DS-mlxsw-core_linecards-Disable-firmware-bundling-ma.patch
0269-platform-mellanox-Cosmetic-changes.patch
0270-platform-mellanox-Fix-order-in-exit-flow.patch
0271-platform-mellanox-Add-new-attributes.patch
0272-platform-mellanox-Change-register-offset-addresses.patch
0273-platform-mellanox-Add-field-upgrade-capability-regis.patch
0274-platform-mellanox-Modify-reset-causes-description.patch
0275-mlxsw-Use-u16-for-local_port-field-instead-of-u8.patch
0276-mlxsw-minimal-Change-type-for-local-port.patch
0277-mlxsw-i2c-Fix-chunk-size-setting-in-output-mailbox-b.patch
0278-platform-mellanox-mlx-platform-Modify-graceful-shutd.patch
0279-platform-mellanox-mlx-platform-Fix-signals-polarity-.patch
0280-platform-mellanox-mlxreg-hotplug-Extend-condition-fo.patch
0281-platform-mellanox-mlx-platform-Modify-health-and-pow.patch
0282-platform-mellanox-mlx-platform-add-support-of-5th-CP.patch
0283-mlxsw-core_hwmon-Align-modules-label-name-assignment.patch
0284-platform-mellanox-mlx-platform-fix-CPLD4-PN-report.patch
9002-TMP-fix-for-fan-minimum-speed.patch

107
platform/mellanox/mlnx-platform-api/sonic_platform/device_data.py
View File

@@ -1,5 +1,5 @@
#
# Copyright (c) 2020-2022 NVIDIA CORPORATION & AFFILIATES.
# Copyright (c) 2020-2023 NVIDIA CORPORATION & AFFILIATES.
# Apache-2.0
#
# Licensed under the Apache License, Version 2.0 (the "License");
@@ -23,10 +23,6 @@ from . import utils
DEVICE_DATA = {
'x86_64-mlnx_msn2700-r0': {
'thermal': {
'minimum_table': {
"unk_trust": {"-127:30":13, "31:40":14 , "41:120":15},
"unk_untrust": {"-127:25":13, "26:30":14 , "31:35":15, "36:120":16}
},
"capability": {
"comex_amb": False
}
@@ -34,10 +30,6 @@ DEVICE_DATA = {
},
'x86_64-mlnx_msn2740-r0': {
'thermal': {
'minimum_table': {
"unk_trust": {"-127:120":13},
"unk_untrust": {"-127:15":13, "16:25":14 , "26:30":15, "31:120":17},
},
"capability": {
"cpu_pack": False,
"comex_amb": False
@@ -46,10 +38,6 @@ DEVICE_DATA = {
},
'x86_64-mlnx_msn2100-r0': {
'thermal': {
'minimum_table': {
"unk_trust": {"-127:40":12, "41:120":13},
"unk_untrust": {"-127:15":12, "16:25":13, "26:30":14, "31:35":15, "36:120":16}
},
"capability": {
"cpu_pack": False,
"comex_amb": False
@@ -58,10 +46,6 @@ DEVICE_DATA = {
},
'x86_64-mlnx_msn2410-r0': {
'thermal': {
'minimum_table': {
"unk_trust": {"-127:30":13, "31:40":14 , "41:120":15},
"unk_untrust": {"-127:25":13, "26:30":14 , "31:35":15, "36:120":16}
},
"capability": {
"comex_amb": False
}
@@ -69,10 +53,6 @@ DEVICE_DATA = {
},
'x86_64-mlnx_msn2010-r0': {
'thermal': {
'minimum_table': {
"unk_trust": {"-127:120":12},
"unk_untrust": {"-127:15":12, "16:20":13 , "21:30":14, "31:35":15, "36:120":16}
},
"capability": {
"cpu_pack": False,
"comex_amb": False
@@ -80,75 +60,26 @@ DEVICE_DATA = {
}
},
'x86_64-mlnx_msn3700-r0': {
'thermal': {
'minimum_table': {
"unk_trust": {"-127:25":12, "26:40":13 , "41:120":14},
"unk_untrust": {"-127:15":12, "16:30":13 , "31:35":14, "36:40":15, "41:120":16},
}
}
},
'x86_64-mlnx_msn3700c-r0': {
'thermal': {
'minimum_table': {
"unk_trust": {"-127:40":12, "41:120":13},
"unk_untrust": {"-127:10":12, "11:20":13 , "21:30":14, "31:35":15, "36:120":16},
}
}
},
'x86_64-mlnx_msn3800-r0': {
'thermal': {
'minimum_table': {
"unk_trust": {"-127:30":12, "31:40":13 , "41:120":14},
"unk_untrust": {"-127:0":12, "1:10":13 , "11:15":14, "16:20":15, "21:35":16, "36:120":17},
}
}
},
'x86_64-mlnx_msn4700-r0': {
'thermal': {
'minimum_table': {
"unk_trust": {"-127:35":14, "36:120":15},
"unk_untrust": {"-127:35":14, "36:120":15},
}
}
},
'x86_64-mlnx_msn4410-r0': {
'thermal': {
'minimum_table': {
"unk_trust": {"-127:40":12, "41:120":13},
"unk_untrust": {"-127:10":12, "11:20":13, "21:30":14, "31:35":15, "36:120":16},
}
}
},
'x86_64-mlnx_msn3420-r0': {
'thermal': {
'minimum_table': {
"unk_trust": {"-127:120":12},
"unk_untrust": {"-127:25":12, "26:35":13, "36:40":14, "41:120":16},
}
}
},
'x86_64-mlnx_msn4600c-r0': {
'thermal': {
'minimum_table': {
"unk_trust": {"-127:40":12, "41:120":13},
"unk_untrust": {"-127:5":12, "6:20":13, "21:30":14, "31:35":15, "36:40":16, "41:120":17},
}
}
},
'x86_64-mlnx_msn4600-r0': {
'thermal': {
'minimum_table': {
"unk_trust": {"-127:40": 12, "41:120": 13},
"unk_untrust": {"-127:5": 12, "6:20": 13, "21:30": 14, "31:35": 15, "36:40": 16, "41:120": 17},
}
}
},
'x86_64-nvidia_sn4800-r0': {
'thermal': {
"capability": {
"comex_amb": False
},
'cpu_threshold': (80, 95) # min=80, max=95
}
},
'sfp': {
'max_port_per_line_card': 16
@@ -156,10 +87,6 @@ DEVICE_DATA = {
},
'x86_64-nvidia_sn2201-r0': {
'thermal': {
'minimum_table': {
"unk_trust": {"-127:30": 13, "31:35": 14, "36:40": 15, "41:120": 16},
"unk_untrust": {"-127:15": 13, "16:20": 14, "21:25": 15, "26:30": 16, "31:35": 17, "36:40": 18, "41:120": 19},
},
"capability": {
"comex_amb": False,
"cpu_amb": True
@@ -242,19 +169,6 @@ class DeviceDataManager:
def get_sodimm_thermal_count(cls):
return len(glob.glob('/run/hw-management/thermal/sodimm*_temp_input'))
@classmethod
@utils.read_only_cache()
def get_minimum_table(cls):
platform_data = DEVICE_DATA.get(cls.get_platform_name(), None)
if not platform_data:
return None
thermal_data = platform_data.get('thermal', None)
if not thermal_data:
return None
return thermal_data.get('minimum_table', None)
@classmethod
@utils.read_only_cache()
def get_thermal_capability(cls):
@@ -285,23 +199,6 @@ class DeviceDataManager:
return 0
return sfp_data.get('max_port_per_line_card', 0)
@classmethod
def is_cpu_thermal_control_supported(cls):
return cls.get_cpu_thermal_threshold() != (None, None)
@classmethod
@utils.read_only_cache()
def get_cpu_thermal_threshold(cls):
platform_data = DEVICE_DATA.get(cls.get_platform_name(), None)
if not platform_data:
return None, None
thermal_data = platform_data.get('thermal', None)
if not thermal_data:
return None, None
return thermal_data.get('cpu_threshold', (None, None))
@classmethod
def get_bios_component(cls):
from .component import ComponentBIOS, ComponentBIOSSN2201

5
platform/mellanox/mlnx-platform-api/sonic_platform/fan.py
View File

@@ -1,5 +1,5 @@
#
# Copyright (c) 2019-2022 NVIDIA CORPORATION & AFFILIATES.
# Copyright (c) 2019-2023 NVIDIA CORPORATION & AFFILIATES.
# Apache-2.0
#
# Licensed under the Apache License, Version 2.0 (the "License");
@@ -216,7 +216,7 @@ class PsuFan(MlnxFan):
"""
try:
# Get PSU fan target speed according to current system cooling level
cooling_level = Thermal.get_cooling_level()
cooling_level = utils.read_int_from_file('/run/hw-management/thermal/cooling_cur_state', log_func=None)
return int(self.PSU_FAN_SPEED[cooling_level], 16)
except Exception:
return self.get_speed()
@@ -250,6 +250,7 @@ class PsuFan(MlnxFan):
logger.log_error('Failed to set PSU FAN speed - {}'.format(e))
return False
class Fan(MlnxFan):
"""Platform-specific Fan class"""
def __init__(self, fan_index, fan_drawer, position):

191
platform/mellanox/mlnx-platform-api/sonic_platform/thermal.py
View File

@@ -1,5 +1,5 @@
#
# Copyright (c) 2019-2022 NVIDIA CORPORATION & AFFILIATES.
# Copyright (c) 2019-2023 NVIDIA CORPORATION & AFFILIATES.
# Apache-2.0
#
# Licensed under the Apache License, Version 2.0 (the "License");
@@ -27,12 +27,11 @@ try:
from sonic_py_common.logger import Logger
import copy
import os
import glob
from .device_data import DeviceDataManager
from . import utils
except ImportError as e:
raise ImportError (str(e) + "- required module not found")
raise ImportError(str(e) + "- required module not found")
# Global logger class instance
logger = Logger()
@@ -143,23 +142,6 @@ THERMAL_NAMING_RULE = {
}
CHASSIS_THERMAL_SYSFS_FOLDER = '/run/hw-management/thermal'
COOLING_STATE_PATH = "/var/run/hw-management/thermal/cooling_cur_state"
THERMAL_ZONE_ASIC_PATH = '/var/run/hw-management/thermal/mlxsw/'
THERMAL_ZONE_FOLDER_WILDCARD = '/run/hw-management/thermal/mlxsw*'
THERMAL_ZONE_HIGH_THRESHOLD = 'temp_trip_high'
THERMAL_ZONE_HOT_THRESHOLD = 'temp_trip_hot'
THERMAL_ZONE_NORMAL_THRESHOLD = 'temp_trip_norm'
THERMAL_ZONE_MODE_FILE = 'thermal_zone_mode'
THERMAL_ZONE_POLICY_FILE = 'thermal_zone_policy'
THERMAL_ZONE_TEMP_FILE = 'thermal_zone_temp'
THERMAL_ZONE_HYSTERESIS = 5000
MODULE_TEMP_FAULT_WILDCARRD = '/run/hw-management/thermal/module*_temp_fault'
MAX_AMBIENT_TEMP = 120
# Min allowed cooling level when all thermal zones are in normal state
MIN_COOLING_LEVEL_FOR_NORMAL = 2
# Min allowed cooling level when any thermal zone is in high state but no thermal zone is in emergency state
MIN_COOLING_LEVEL_FOR_HIGH = 4
MAX_COOLING_LEVEL = 10
def initialize_chassis_thermals():
@@ -369,175 +351,6 @@ class Thermal(ThermalBase):
"""
return False
@classmethod
def set_thermal_algorithm_status(cls, status, force=True):
"""
Enable/disable kernel thermal algorithm.
When enable kernel thermal algorithm, kernel will adjust fan speed
according to thermal zones temperature. Please note that kernel will
only adjust fan speed when temperature across some "edge", e.g temperature
changes to exceed high threshold.
When disable kernel thermal algorithm, kernel no longer adjust fan speed.
We usually disable the algorithm when we want to set a fix speed. E.g, when
a fan unit is removed from system, we will set fan speed to 100% and disable
the algorithm to avoid it adjust the speed.
Returns:
True if thermal algorithm status changed.
"""
if not force and cls.thermal_algorithm_status == status:
return False
cls.thermal_algorithm_status = status
mode = "enabled" if status else "disabled"
policy = "step_wise" if status else "user_space"
for thermal_zone_folder in glob.iglob(THERMAL_ZONE_FOLDER_WILDCARD):
policy_file = os.path.join(thermal_zone_folder, THERMAL_ZONE_POLICY_FILE)
utils.write_file(policy_file, policy)
mode_file = os.path.join(thermal_zone_folder, THERMAL_ZONE_MODE_FILE)
utils.write_file(mode_file, mode)
return True
@classmethod
def get_min_allowed_cooling_level_by_thermal_zone(cls):
"""Get min allowed cooling level according to thermal zone status:
1. If temperature of all thermal zones is less than normal threshold, min allowed cooling level is
$MIN_COOLING_LEVEL_FOR_NORMAL = 2
2. If temperature of any thermal zone is greater than normal threshold, but no thermal zone temperature
is greater than high threshold, min allowed cooling level is $MIN_COOLING_LEVEL_FOR_HIGH = 4
3. Otherwise, there is no minimum allowed value and policy should not adjust cooling level
Returns:
int: minimum allowed cooling level
"""
min_allowed = MIN_COOLING_LEVEL_FOR_NORMAL
thermal_zone_present = False
try:
for thermal_zone_folder in glob.iglob(THERMAL_ZONE_FOLDER_WILDCARD):
current = utils.read_int_from_file(os.path.join(thermal_zone_folder, THERMAL_ZONE_TEMP_FILE))
if current == 0:
# Temperature value 0 means that this thermal zone has no
# sensor and it should be ignored in this loop
continue
thermal_zone_present = True
normal_thresh = utils.read_int_from_file(os.path.join(thermal_zone_folder, THERMAL_ZONE_NORMAL_THRESHOLD))
if current < normal_thresh - THERMAL_ZONE_HYSTERESIS:
continue
hot_thresh = utils.read_int_from_file(os.path.join(thermal_zone_folder, THERMAL_ZONE_HIGH_THRESHOLD))
if current < hot_thresh - THERMAL_ZONE_HYSTERESIS:
min_allowed = MIN_COOLING_LEVEL_FOR_HIGH
else:
min_allowed = None
break
except Exception as e:
logger.log_error('Failed to get thermal zone status for {} - {}'.format(thermal_zone_folder, repr(e)))
return None
return min_allowed if thermal_zone_present else None
@classmethod
def check_module_temperature_trustable(cls):
for file_path in glob.iglob(MODULE_TEMP_FAULT_WILDCARRD):
fault = utils.read_int_from_file(file_path)
if fault != 0:
return 'untrust'
return 'trust'
@classmethod
def get_min_amb_temperature(cls):
fan_ambient_path = os.path.join(CHASSIS_THERMAL_SYSFS_FOLDER, 'fan_amb')
port_ambient_path = os.path.join(CHASSIS_THERMAL_SYSFS_FOLDER, 'port_amb')
try:
fan_ambient_temp = utils.read_int_from_file(fan_ambient_path, raise_exception=True)
port_ambient_temp = utils.read_int_from_file(port_ambient_path, raise_exception=True)
return fan_ambient_temp if fan_ambient_temp < port_ambient_temp else port_ambient_temp
except Exception as e:
# Can't get ambient temperature, return maximum
logger.log_error('Failed to get minimum ambient temperature, use pessimistic instead')
return MAX_AMBIENT_TEMP
@classmethod
def set_cooling_level(cls, level):
"""
Change cooling level. The input level should be an integer value [1, 10].
1 means 10%, 2 means 20%, 10 means 100%.
"""
if cls.last_set_cooling_level != level:
utils.write_file(COOLING_STATE_PATH, level + 10, raise_exception=True)
cls.last_set_cooling_level = level
@classmethod
def set_cooling_state(cls, state):
"""Change cooling state.
Args:
state (int): cooling state
"""
if cls.last_set_cooling_state != state:
utils.write_file(COOLING_STATE_PATH, state, raise_exception=True)
cls.last_set_cooling_state = state
@classmethod
def get_cooling_level(cls):
try:
return utils.read_int_from_file(COOLING_STATE_PATH, raise_exception=True)
except (ValueError, IOError) as e:
raise RuntimeError("Failed to get cooling level - {}".format(e))
@classmethod
def set_expect_cooling_level(cls, expect_value):
"""During thermal policy running, cache the expect cooling level generated by policies. The max expect
cooling level will be committed to hardware.
Args:
expect_value (int): Expected cooling level value
"""
if cls.expect_cooling_level is None or cls.expect_cooling_level < expect_value:
cls.expect_cooling_level = int(expect_value)
@classmethod
def commit_cooling_level(cls, thermal_info_dict):
"""Commit cooling level to hardware. This will affect system fan and PSU fan speed.
Args:
thermal_info_dict (dict): Thermal information dictionary
"""
if cls.expect_cooling_level is not None:
cls.set_cooling_level(cls.expect_cooling_level)
if cls.expect_cooling_state is not None:
cls.set_cooling_state(cls.expect_cooling_state)
elif cls.expect_cooling_level is not None:
cls.set_cooling_state(cls.expect_cooling_level)
cls.expect_cooling_level = None
# We need to set system fan speed here because kernel will automaticlly adjust fan speed according to cooling level and cooling state
# Commit PSU fan speed with current state
from .thermal_infos import ChassisInfo
if ChassisInfo.INFO_NAME in thermal_info_dict and isinstance(thermal_info_dict[ChassisInfo.INFO_NAME], ChassisInfo):
cooling_level = cls.get_cooling_level()
if cls.last_set_psu_cooling_level == cooling_level:
return
speed = cooling_level * 10
chassis = thermal_info_dict[ChassisInfo.INFO_NAME].get_chassis()
for psu in chassis.get_all_psus():
for psu_fan in psu.get_all_fans():
psu_fan.set_speed(speed)
cls.last_set_psu_cooling_level = cooling_level
@classmethod
def monitor_asic_themal_zone(cls):
"""This is a protection for asic thermal zone, if asic temperature is greater than hot threshold + THERMAL_ZONE_HYSTERESIS,
and if cooling state is not MAX, we need enforce the cooling state to MAX
"""
asic_temp = utils.read_int_from_file(os.path.join(THERMAL_ZONE_ASIC_PATH, THERMAL_ZONE_TEMP_FILE), raise_exception=True)
hot_thresh = utils.read_int_from_file(os.path.join(THERMAL_ZONE_ASIC_PATH, THERMAL_ZONE_HOT_THRESHOLD), raise_exception=True)
if asic_temp >= hot_thresh + THERMAL_ZONE_HYSTERESIS:
cls.expect_cooling_state = MAX_COOLING_LEVEL
else:
cls.expect_cooling_state = None
class RemovableThermal(Thermal):
def __init__(self, name, temp_file, high_th_file, high_crit_th_file, position, presence_cb):

111
platform/mellanox/mlnx-platform-api/sonic_platform/thermal_actions.py
View File

@@ -1,111 +0,0 @@
#
# Copyright (c) 2020-2022 NVIDIA CORPORATION & AFFILIATES.
# Apache-2.0
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
#
from sonic_platform_base.sonic_thermal_control.thermal_action_base import ThermalPolicyActionBase
from sonic_platform_base.sonic_thermal_control.thermal_json_object import thermal_json_object
from .thermal import Thermal
class SetFanSpeedAction(ThermalPolicyActionBase):
"""
Base thermal action class to set speed for fans
"""
# JSON field definition
JSON_FIELD_SPEED = 'speed'
def __init__(self):
"""
Constructor of SetFanSpeedAction which actually do nothing.
"""
self.speed = None
def load_from_json(self, json_obj):
"""
Construct SetFanSpeedAction via JSON. JSON example:
{
"type": "fan.all.set_speed"
"speed": "100"
}
:param json_obj: A JSON object representing a SetFanSpeedAction action.
:return:
"""
if SetFanSpeedAction.JSON_FIELD_SPEED in json_obj:
speed = float(json_obj[SetFanSpeedAction.JSON_FIELD_SPEED])
if speed < 0 or speed > 100:
raise ValueError('SetFanSpeedAction invalid speed value {} in JSON policy file, valid value should be [0, 100]'.
format(speed))
self.speed = float(json_obj[SetFanSpeedAction.JSON_FIELD_SPEED])
else:
raise ValueError('SetFanSpeedAction missing mandatory field {} in JSON policy file'.
format(SetFanSpeedAction.JSON_FIELD_SPEED))
@thermal_json_object('fan.all.set_speed')
class SetAllFanSpeedAction(SetFanSpeedAction):
"""
Action to set speed for all fans
"""
def execute(self, thermal_info_dict):
"""
Set speed for all fans
:param thermal_info_dict: A dictionary stores all thermal information.
:return:
"""
Thermal.set_expect_cooling_level(self.speed / 10)
@thermal_json_object('thermal.recover')
class ThermalRecoverAction(ThermalPolicyActionBase):
UNKNOWN_SKU_COOLING_LEVEL = 6
def execute(self, thermal_info_dict):
from .device_data import DeviceDataManager
from .thermal import MAX_COOLING_LEVEL, MIN_COOLING_LEVEL_FOR_HIGH, logger
Thermal.monitor_asic_themal_zone()
# Calculate dynamic minimum cooling level
dynamic_min_cooling_level = None
minimum_table = DeviceDataManager.get_minimum_table()
if not minimum_table:
# If there is no minimum_table defined, set dynamic_min_cooling_level to default value
dynamic_min_cooling_level = ThermalRecoverAction.UNKNOWN_SKU_COOLING_LEVEL
else:
trust_state = Thermal.check_module_temperature_trustable()
temperature = Thermal.get_min_amb_temperature()
temperature = int(temperature / 1000)
minimum_table = minimum_table['unk_{}'.format(trust_state)]
for key, cooling_level in minimum_table.items():
temp_range = key.split(':')
temp_min = int(temp_range[0].strip())
temp_max = int(temp_range[1].strip())
if temp_min <= temperature <= temp_max:
dynamic_min_cooling_level = cooling_level - 10
break
if not dynamic_min_cooling_level:
# Should not go to this branch, just in case
logger.log_error('Failed to get dynamic minimum cooling level')
dynamic_min_cooling_level = MAX_COOLING_LEVEL
if Thermal.last_set_cooling_level is not None and dynamic_min_cooling_level > Thermal.last_set_cooling_level and dynamic_min_cooling_level >= MIN_COOLING_LEVEL_FOR_HIGH:
# No need to check thermal zone as dynamic_min_cooling_level is greater than previous value and MIN_COOLING_LEVEL_FOR_HIGH
Thermal.set_expect_cooling_level(dynamic_min_cooling_level)
else:
min_cooling_level_by_tz = Thermal.get_min_allowed_cooling_level_by_thermal_zone()
if min_cooling_level_by_tz is not None:
cooling_level = max(dynamic_min_cooling_level, min_cooling_level_by_tz)
Thermal.set_expect_cooling_level(cooling_level)

92
platform/mellanox/mlnx-platform-api/sonic_platform/thermal_conditions.py
View File

@@ -1,92 +0,0 @@
#
# Copyright (c) 2020-2022 NVIDIA CORPORATION & AFFILIATES.
# Apache-2.0
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
#
from sonic_platform_base.sonic_thermal_control.thermal_condition_base import ThermalPolicyConditionBase
from sonic_platform_base.sonic_thermal_control.thermal_json_object import thermal_json_object
class FanCondition(ThermalPolicyConditionBase):
def get_fan_info(self, thermal_info_dict):
from .thermal_infos import FanInfo
if FanInfo.INFO_NAME in thermal_info_dict and isinstance(thermal_info_dict[FanInfo.INFO_NAME], FanInfo):
return thermal_info_dict[FanInfo.INFO_NAME]
else:
return None
@thermal_json_object('fan.any.absence')
class AnyFanAbsenceCondition(FanCondition):
def is_match(self, thermal_info_dict):
fan_info_obj = self.get_fan_info(thermal_info_dict)
return len(fan_info_obj.get_absence_fans()) > 0 if fan_info_obj else False
@thermal_json_object('fan.all.absence')
class AllFanAbsenceCondition(FanCondition):
def is_match(self, thermal_info_dict):
fan_info_obj = self.get_fan_info(thermal_info_dict)
return len(fan_info_obj.get_presence_fans()) == 0 if fan_info_obj else False
@thermal_json_object('fan.all.presence')
class AllFanPresenceCondition(FanCondition):
def is_match(self, thermal_info_dict):
fan_info_obj = self.get_fan_info(thermal_info_dict)
return len(fan_info_obj.get_absence_fans()) == 0 if fan_info_obj else False
@thermal_json_object('fan.any.fault')
class AnyFanFaultCondition(FanCondition):
def is_match(self, thermal_info_dict):
fan_info_obj = self.get_fan_info(thermal_info_dict)
return len(fan_info_obj.get_fault_fans()) > 0 if fan_info_obj else False
@thermal_json_object('fan.all.good')
class AllFanGoodCondition(FanCondition):
def is_match(self, thermal_info_dict):
fan_info_obj = self.get_fan_info(thermal_info_dict)
return len(fan_info_obj.get_fault_fans()) == 0 if fan_info_obj else False
class PsuCondition(ThermalPolicyConditionBase):
def get_psu_info(self, thermal_info_dict):
from .thermal_infos import PsuInfo
if PsuInfo.INFO_NAME in thermal_info_dict and isinstance(thermal_info_dict[PsuInfo.INFO_NAME], PsuInfo):
return thermal_info_dict[PsuInfo.INFO_NAME]
else:
return None
@thermal_json_object('psu.any.absence')
class AnyPsuAbsenceCondition(PsuCondition):
def is_match(self, thermal_info_dict):
psu_info_obj = self.get_psu_info(thermal_info_dict)
return len(psu_info_obj.get_absence_psus()) > 0 if psu_info_obj else False
@thermal_json_object('psu.all.absence')
class AllPsuAbsenceCondition(PsuCondition):
def is_match(self, thermal_info_dict):
psu_info_obj = self.get_psu_info(thermal_info_dict)
return len(psu_info_obj.get_presence_psus()) == 0 if psu_info_obj else False
@thermal_json_object('psu.all.presence')
class AllPsuPresenceCondition(PsuCondition):
def is_match(self, thermal_info_dict):
psu_info_obj = self.get_psu_info(thermal_info_dict)
return len(psu_info_obj.get_absence_psus()) == 0 if psu_info_obj else False

171
platform/mellanox/mlnx-platform-api/sonic_platform/thermal_infos.py
View File

@@ -1,171 +0,0 @@
#
# Copyright (c) 2020-2021 NVIDIA CORPORATION & AFFILIATES.
# Apache-2.0
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
#
from sonic_platform_base.sonic_thermal_control.thermal_info_base import ThermalPolicyInfoBase
from sonic_platform_base.sonic_thermal_control.thermal_json_object import thermal_json_object
@thermal_json_object('fan_info')
class FanInfo(ThermalPolicyInfoBase):
"""
Fan information needed by thermal policy
"""
# Fan information name
INFO_NAME = 'fan_info'
def __init__(self):
self._absence_fans = set()
self._presence_fans = set()
self._fault_fans = set()
self._status_changed = False
def collect(self, chassis):
"""
Collect absence and presence fans.
:param chassis: The chassis object
:return:
"""
self._status_changed = False
for fan_drawer in chassis.get_all_fan_drawers():
for fan in fan_drawer.get_all_fans():
presence = fan.get_presence()
status = fan.get_status()
if presence and fan not in self._presence_fans:
self._presence_fans.add(fan)
self._status_changed = True
if fan in self._absence_fans:
self._absence_fans.remove(fan)
elif not presence and fan not in self._absence_fans:
self._absence_fans.add(fan)
self._status_changed = True
if fan in self._presence_fans:
self._presence_fans.remove(fan)
if not status and fan not in self._fault_fans:
self._fault_fans.add(fan)
self._status_changed = True
elif status and fan in self._fault_fans:
self._fault_fans.remove(fan)
self._status_changed = True
def get_absence_fans(self):
"""
Retrieves absence fans
:return: A set of absence fans
"""
return self._absence_fans
def get_presence_fans(self):
"""
Retrieves presence fans
:return: A set of presence fans
"""
return self._presence_fans
def get_fault_fans(self):
"""
Retrieves fault fans
:return: A set of fault fans
"""
return self._fault_fans
def is_status_changed(self):
"""
Retrieves if the status of fan information changed
:return: True if status changed else False
"""
return self._status_changed
@thermal_json_object('psu_info')
class PsuInfo(ThermalPolicyInfoBase):
"""
PSU information needed by thermal policy
"""
INFO_NAME = 'psu_info'
def __init__(self):
self._absence_psus = set()
self._presence_psus = set()
self._status_changed = False
def collect(self, chassis):
"""
Collect absence and presence PSUs.
:param chassis: The chassis object
:return:
"""
self._status_changed = False
for psu in chassis.get_all_psus():
if psu.get_presence() and psu not in self._presence_psus:
self._presence_psus.add(psu)
self._status_changed = True
if psu in self._absence_psus:
self._absence_psus.remove(psu)
elif (not psu.get_presence()) and psu not in self._absence_psus:
self._absence_psus.add(psu)
self._status_changed = True
if psu in self._presence_psus:
self._presence_psus.remove(psu)
def get_absence_psus(self):
"""
Retrieves presence PSUs
:return: A set of absence PSUs
"""
return self._absence_psus
def get_presence_psus(self):
"""
Retrieves presence PSUs
:return: A set of presence fans
"""
return self._presence_psus
def is_status_changed(self):
"""
Retrieves if the status of PSU information changed
:return: True if status changed else False
"""
return self._status_changed
@thermal_json_object('chassis_info')
class ChassisInfo(ThermalPolicyInfoBase):
"""
Chassis information needed by thermal policy
"""
INFO_NAME = 'chassis_info'
def __init__(self):
self._chassis = None
def collect(self, chassis):
"""
Collect platform chassis.
:param chassis: The chassis object
:return:
"""
self._chassis = chassis
def get_chassis(self):
"""
Retrieves platform chassis object
:return: A platform chassis object.
"""
return self._chassis

76
platform/mellanox/mlnx-platform-api/sonic_platform/thermal_manager.py
View File

@@ -1,5 +1,5 @@
#
# Copyright (c) 2020-2022 NVIDIA CORPORATION & AFFILIATES.
# Copyright (c) 2020-2023 NVIDIA CORPORATION & AFFILIATES.
# Apache-2.0
#
# Licensed under the Apache License, Version 2.0 (the "License");
@@ -15,81 +15,9 @@
# limitations under the License.
#
from sonic_platform_base.sonic_thermal_control.thermal_manager_base import ThermalManagerBase
from .cpu_thermal_control import CPUThermalControl
from .device_data import DeviceDataManager
from .thermal_actions import *
from .thermal_conditions import *
from .thermal_infos import *
from .thermal import logger, MAX_COOLING_LEVEL, Thermal
class ThermalManager(ThermalManagerBase):
cpu_thermal_control = None
@classmethod
def start_thermal_control_algorithm(cls):
"""
Start thermal control algorithm
Returns:
bool: True if set success, False if fail.
"""
Thermal.set_thermal_algorithm_status(True)
@classmethod
def stop_thermal_control_algorithm(cls):
"""
Stop thermal control algorithm
Returns:
bool: True if set success, False if fail.
"""
Thermal.set_thermal_algorithm_status(False)
@classmethod
def start_cpu_thermal_control_algoritm(cls):
if cls.cpu_thermal_control:
return
if not DeviceDataManager.is_cpu_thermal_control_supported():
return
cls.cpu_thermal_control = CPUThermalControl()
cls.cpu_thermal_control.task_run()
@classmethod
def stop_cpu_thermal_control_algoritm(cls):
if cls.cpu_thermal_control:
cls.cpu_thermal_control.task_stop()
cls.cpu_thermal_control = None
@classmethod
def run_policy(cls, chassis):
if cls._running:
cls.start_cpu_thermal_control_algoritm()
else:
cls.stop_cpu_thermal_control_algoritm()
if not cls._policy_dict:
return
try:
cls._collect_thermal_information(chassis)
except Exception as e:
logger.log_error('Failed to collect thermal information {}'.format(repr(e)))
Thermal.set_expect_cooling_level(MAX_COOLING_LEVEL)
Thermal.commit_cooling_level(cls._thermal_info_dict)
return
for policy in cls._policy_dict.values():
if not cls._running:
return
try:
if policy.is_match(cls._thermal_info_dict):
policy.do_action(cls._thermal_info_dict)
except Exception as e:
logger.log_error('Failed to run thermal policy {} - {}'.format(policy.name, repr(e)))
# In case there is an exception, we put cooling level to max value
Thermal.set_expect_cooling_level(MAX_COOLING_LEVEL)
Thermal.commit_cooling_level(cls._thermal_info_dict)
pass

18
platform/mellanox/mlnx-platform-api/tests/duplicate_action.json
View File

@@ -1,18 +0,0 @@
{
"name": "any fan absence",
"conditions": [
{
"type": "fan.any.absence"
}
],
"actions": [
{
"type": "fan.all.set_speed",
"speed": "100"
},
{
"type": "fan.all.set_speed",
"speed": "100"
}
]
}

17
platform/mellanox/mlnx-platform-api/tests/duplicate_condition.json
View File

@@ -1,17 +0,0 @@
{
"name": "any fan absence",
"conditions": [
{
"type": "fan.any.absence"
},
{
"type": "fan.any.absence"
}
],
"actions": [
{
"type": "fan.all.set_speed",
"speed": "100"
}
]
}

10
platform/mellanox/mlnx-platform-api/tests/empty_action.json
View File

@@ -1,10 +0,0 @@
{
"name": "any fan absence",
"conditions": [
{
"type": "fan.any.absence"
}
],
"actions": [
]
}

11
platform/mellanox/mlnx-platform-api/tests/empty_condition.json
View File

@@ -1,11 +0,0 @@
{
"name": "any fan absence",
"conditions": [
],
"actions": [
{
"type": "fan.all.set_speed",
"speed": "100"
}
]
}

72
platform/mellanox/mlnx-platform-api/tests/policy_with_same_conditions.json
View File

@@ -1,72 +0,0 @@
{
"thermal_control_algorithm": {
"run_at_boot_up": "false",
"fan_speed_when_suspend": "60"
},
"info_types": [
{
"type": "fan_info"
},
{
"type": "psu_info"
},
{
"type": "chassis_info"
}
],
"policies": [
{
"name": "all fan and psu presence",
"conditions": [
{
"type": "fan.all.presence"
},
{
"type": "psu.all.presence"
}
],
"actions": [
{
"type": "thermal.recover"
},
{
"type": "fan.all.set_speed",
"speed": "100"
}
]
},
{
"name": "any psu absence",
"conditions": [
{
"type": "psu.any.absence"
}
],
"actions": [
{
"type": "thermal.recover"
},
{
"type": "fan.all.set_speed",
"speed": "100"
}
]
},
{
"name": "all fan and psu presence 1",
"conditions": [
{
"type": "fan.all.presence"
},
{
"type": "psu.all.presence"
}
],
"actions": [
{
"type": "thermal.recover"
}
]
}
]
}

83
platform/mellanox/mlnx-platform-api/tests/test_cpu_thermal_control.py
View File

@@ -1,83 +0,0 @@
#
# Copyright (c) 2019-2022 NVIDIA CORPORATION & AFFILIATES.
# Apache-2.0
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
#
#############################################################################
# Mellanox
#
# Module contains an implementation of SONiC Platform Base API and
# provides the Chassis information which are available in the platform
#
#############################################################################
import glob
import os
import pytest
import sys
if sys.version_info.major == 3:
from unittest import mock
else:
import mock
test_path = os.path.dirname(os.path.abspath(__file__))
modules_path = os.path.dirname(test_path)
sys.path.insert(0, modules_path)
from sonic_platform.cpu_thermal_control import CPUThermalControl
class TestCPUThermalControl:
@mock.patch('sonic_platform.device_data.DeviceDataManager.get_cpu_thermal_threshold', mock.MagicMock(return_value=(85, 95)))
@mock.patch('sonic_platform.utils.read_int_from_file')
@mock.patch('sonic_platform.utils.write_file')
def test_run(self, mock_write_file, mock_read_file):
instance = CPUThermalControl()
file_content = {
CPUThermalControl.CPU_COOLING_STATE: 5,
CPUThermalControl.CPU_TEMP_FILE: instance.temp_high + 1
}
def read_file(file_path, **kwargs):
return file_content[file_path]
mock_read_file.side_effect = read_file
# Test current temp is higher than high threshold
instance.run(0)
mock_write_file.assert_called_with(CPUThermalControl.CPU_COOLING_STATE, CPUThermalControl.MAX_COOLING_STATE, log_func=None)
# Test current temp is lower than low threshold
file_content[CPUThermalControl.CPU_TEMP_FILE] = instance.temp_low - 1
instance.run(0)
mock_write_file.assert_called_with(CPUThermalControl.CPU_COOLING_STATE, CPUThermalControl.MIN_COOLING_STATE, log_func=None)
# Test current temp increasing
file_content[CPUThermalControl.CPU_TEMP_FILE] = instance.temp_low
instance.run(0)
mock_write_file.assert_called_with(CPUThermalControl.CPU_COOLING_STATE, 6, log_func=None)
# Test current temp decreasing
instance.run(instance.temp_low + 1)
mock_write_file.assert_called_with(CPUThermalControl.CPU_COOLING_STATE, 4, log_func=None)
# Test current temp increasing and current cooling state is already the max
file_content[CPUThermalControl.CPU_TEMP_FILE] = 85
file_content[CPUThermalControl.CPU_COOLING_STATE] = CPUThermalControl.MAX_COOLING_STATE
instance.run(84)
mock_write_file.assert_called_with(CPUThermalControl.CPU_COOLING_STATE, CPUThermalControl.MAX_COOLING_STATE, log_func=None)
# Test current temp decreasing and current cooling state is already the max
file_content[CPUThermalControl.CPU_COOLING_STATE] = CPUThermalControl.MIN_COOLING_STATE
instance.run(86)
mock_write_file.assert_called_with(CPUThermalControl.CPU_COOLING_STATE, CPUThermalControl.MIN_COOLING_STATE, log_func=None)

7
platform/mellanox/mlnx-platform-api/tests/test_fan_api.py
View File

@@ -1,5 +1,5 @@
#
# Copyright (c) 2020-2022 NVIDIA CORPORATION & AFFILIATES.
# Copyright (c) 2020-2023 NVIDIA CORPORATION & AFFILIATES.
# Apache-2.0
#
# Licensed under the Apache License, Version 2.0 (the "License");
@@ -108,11 +108,10 @@ class TestFan:
mock_write_file.assert_called_with(fan.fan_speed_set_path, 153, raise_exception=True)
@patch('sonic_platform.utils.read_int_from_file')
@patch('sonic_platform.thermal.Thermal.get_cooling_level')
@patch('sonic_platform.psu.Psu.get_presence')
@patch('sonic_platform.psu.Psu.get_powergood_status')
@patch('os.path.exists')
def test_psu_fan_basic(self, mock_path_exists, mock_powergood, mock_presence, mock_cooling_level, mock_read_int):
def test_psu_fan_basic(self, mock_path_exists, mock_powergood, mock_presence, mock_read_int):
mock_path_exists.return_value = False
psu = Psu(0)
fan = PsuFan(0, 1, psu)
@@ -125,7 +124,7 @@ class TestFan:
assert fan.get_presence() is False
mock_path_exists.return_value = True
assert fan.get_presence() is True
mock_cooling_level.return_value = 7
mock_read_int.return_value = 7
assert fan.get_target_speed() == 70
mock_read_int.return_value = FAN_DIR_VALUE_INTAKE
assert fan.get_direction() == Fan.FAN_DIRECTION_INTAKE

146
platform/mellanox/mlnx-platform-api/tests/test_thermal.py
View File

@@ -205,149 +205,3 @@ class TestThermal:
mock_read.return_value = None
assert thermal.get_high_critical_threshold() is None
@mock.patch('glob.iglob', mock.MagicMock(return_value=['thermal_zone1', 'thermal_zone2']))
@mock.patch('sonic_platform.utils.write_file')
def test_set_thermal_algorithm_status(self, mock_write):
from sonic_platform.thermal import Thermal, THERMAL_ZONE_FOLDER_WILDCARD, THERMAL_ZONE_POLICY_FILE, THERMAL_ZONE_MODE_FILE
assert Thermal.set_thermal_algorithm_status(True, False)
for folder in glob.iglob(THERMAL_ZONE_FOLDER_WILDCARD):
mock_write.assert_any_call(os.path.join(folder, THERMAL_ZONE_POLICY_FILE), 'step_wise')
mock_write.assert_any_call(os.path.join(folder, THERMAL_ZONE_MODE_FILE), 'enabled')
assert Thermal.set_thermal_algorithm_status(False, False)
for folder in glob.iglob(THERMAL_ZONE_FOLDER_WILDCARD):
mock_write.assert_any_call(os.path.join(folder, THERMAL_ZONE_POLICY_FILE), 'user_space')
mock_write.assert_any_call(os.path.join(folder, THERMAL_ZONE_MODE_FILE), 'disabled')
assert not Thermal.set_thermal_algorithm_status(False, False)
assert Thermal.set_thermal_algorithm_status(False)
@mock.patch('glob.iglob', mock.MagicMock(return_value=['thermal_zone1', 'thermal_zone2']))
@mock.patch('sonic_platform.utils.read_int_from_file')
def test_get_min_allowed_cooling_level_by_thermal_zone(self, mock_read_file):
from sonic_platform.thermal import Thermal, THERMAL_ZONE_TEMP_FILE, THERMAL_ZONE_HIGH_THRESHOLD, THERMAL_ZONE_NORMAL_THRESHOLD, MIN_COOLING_LEVEL_FOR_HIGH, MIN_COOLING_LEVEL_FOR_NORMAL
mock_read_file.side_effect = Exception('')
assert Thermal.get_min_allowed_cooling_level_by_thermal_zone() is None
mock_file_content = {}
def mock_read_int_from_file(file_path, default=0, raise_exception=False):
return mock_file_content[file_path]
mock_read_file.side_effect = mock_read_int_from_file
mock_file_content[os.path.join('thermal_zone1', THERMAL_ZONE_NORMAL_THRESHOLD)] = 75000
mock_file_content[os.path.join('thermal_zone1', THERMAL_ZONE_HIGH_THRESHOLD)] = 85000
mock_file_content[os.path.join('thermal_zone1', THERMAL_ZONE_TEMP_FILE)] = 69000
mock_file_content[os.path.join('thermal_zone2', THERMAL_ZONE_NORMAL_THRESHOLD)] = 75000
mock_file_content[os.path.join('thermal_zone1', THERMAL_ZONE_HIGH_THRESHOLD)] = 85000
mock_file_content[os.path.join('thermal_zone2', THERMAL_ZONE_TEMP_FILE)] = 24000
assert Thermal.get_min_allowed_cooling_level_by_thermal_zone() == MIN_COOLING_LEVEL_FOR_NORMAL
mock_file_content[os.path.join('thermal_zone1', THERMAL_ZONE_TEMP_FILE)] = 71000
assert Thermal.get_min_allowed_cooling_level_by_thermal_zone() == MIN_COOLING_LEVEL_FOR_HIGH
mock_file_content[os.path.join('thermal_zone1', THERMAL_ZONE_TEMP_FILE)] = 79000
assert Thermal.get_min_allowed_cooling_level_by_thermal_zone() == MIN_COOLING_LEVEL_FOR_HIGH
mock_file_content[os.path.join('thermal_zone1', THERMAL_ZONE_TEMP_FILE)] = 81000
assert Thermal.get_min_allowed_cooling_level_by_thermal_zone() is None
@mock.patch('glob.iglob', mock.MagicMock(return_value=['thermal_zone1', 'thermal_zone2']))
@mock.patch('sonic_platform.utils.read_int_from_file')
def test_no_sensor_thermal_zone(self, mock_read_file):
from sonic_platform.thermal import Thermal, THERMAL_ZONE_TEMP_FILE, THERMAL_ZONE_HIGH_THRESHOLD, THERMAL_ZONE_NORMAL_THRESHOLD, MIN_COOLING_LEVEL_FOR_HIGH, MIN_COOLING_LEVEL_FOR_NORMAL
mock_file_content = {}
def mock_read_int_from_file(file_path, **kwargs):
return mock_file_content[file_path]
mock_read_file.side_effect = mock_read_int_from_file
mock_file_content[os.path.join('thermal_zone1', THERMAL_ZONE_NORMAL_THRESHOLD)] = 0
mock_file_content[os.path.join('thermal_zone1', THERMAL_ZONE_HIGH_THRESHOLD)] = 0
mock_file_content[os.path.join('thermal_zone1', THERMAL_ZONE_TEMP_FILE)] = 0
mock_file_content[os.path.join('thermal_zone2', THERMAL_ZONE_NORMAL_THRESHOLD)] = 75000
mock_file_content[os.path.join('thermal_zone2', THERMAL_ZONE_HIGH_THRESHOLD)] = 85000
mock_file_content[os.path.join('thermal_zone2', THERMAL_ZONE_TEMP_FILE)] = 24000
assert Thermal.get_min_allowed_cooling_level_by_thermal_zone() == MIN_COOLING_LEVEL_FOR_NORMAL
mock_file_content[os.path.join('thermal_zone2', THERMAL_ZONE_TEMP_FILE)] = 71000
assert Thermal.get_min_allowed_cooling_level_by_thermal_zone() == MIN_COOLING_LEVEL_FOR_HIGH
mock_file_content[os.path.join('thermal_zone2', THERMAL_ZONE_TEMP_FILE)] = 79000
assert Thermal.get_min_allowed_cooling_level_by_thermal_zone() == MIN_COOLING_LEVEL_FOR_HIGH
mock_file_content[os.path.join('thermal_zone2', THERMAL_ZONE_TEMP_FILE)] = 81000
assert Thermal.get_min_allowed_cooling_level_by_thermal_zone() is None
@mock.patch('glob.iglob', mock.MagicMock(return_value=['thermal_zone1', 'thermal_zone2']))
def test_check_module_temperature_trustable(self):
from sonic_platform.thermal import Thermal
from sonic_platform import utils
utils.read_int_from_file = mock.MagicMock(return_value=1)
assert Thermal.check_module_temperature_trustable() == 'untrust'
utils.read_int_from_file = mock.MagicMock(return_value=0)
assert Thermal.check_module_temperature_trustable() == 'trust'
def test_get_min_amb_temperature(self):
from sonic_platform.thermal import Thermal, MAX_AMBIENT_TEMP, CHASSIS_THERMAL_SYSFS_FOLDER
from sonic_platform import utils
utils.read_int_from_file = mock.MagicMock(side_effect=Exception(''))
assert Thermal.get_min_amb_temperature() == MAX_AMBIENT_TEMP
mock_file_content = {}
def mock_read_int_from_file(file_path, default=0, raise_exception=False):
return mock_file_content[file_path]
utils.read_int_from_file = mock_read_int_from_file
mock_file_content[os.path.join(CHASSIS_THERMAL_SYSFS_FOLDER, 'fan_amb')] = 50
mock_file_content[os.path.join(CHASSIS_THERMAL_SYSFS_FOLDER, 'port_amb')] = 40
assert Thermal.get_min_amb_temperature() == 40
@mock.patch('sonic_platform.utils.write_file')
def test_set_cooling_level(self, mock_write_file):
from sonic_platform.thermal import Thermal, COOLING_STATE_PATH
Thermal.set_cooling_level(10)
calls = [mock.call(COOLING_STATE_PATH, 20, raise_exception=True)]
mock_write_file.assert_has_calls(calls)
pre_call_count = mock_write_file.call_count
Thermal.set_cooling_level(10)
assert pre_call_count == mock_write_file.call_count
Thermal.set_cooling_level(9)
calls = [mock.call(COOLING_STATE_PATH, 19, raise_exception=True)]
mock_write_file.assert_has_calls(calls)
@mock.patch('sonic_platform.utils.write_file')
def test_set_cooling_state(self, mock_write_file):
from sonic_platform.thermal import Thermal, COOLING_STATE_PATH
Thermal.set_cooling_state(10)
calls = [mock.call(COOLING_STATE_PATH, 10, raise_exception=True)]
mock_write_file.assert_has_calls(calls)
pre_call_count = mock_write_file.call_count
Thermal.set_cooling_state(10)
assert pre_call_count == mock_write_file.call_count
Thermal.set_cooling_state(9)
calls = [mock.call(COOLING_STATE_PATH, 9, raise_exception=True)]
mock_write_file.assert_has_calls(calls)
@mock.patch('sonic_platform.utils.read_int_from_file')
def test_get_cooling_level(self, mock_read_file):
from sonic_platform.thermal import Thermal, COOLING_STATE_PATH
Thermal.get_cooling_level()
mock_read_file.assert_called_with(COOLING_STATE_PATH, raise_exception=True)
mock_read_file.side_effect = IOError('')
with pytest.raises(RuntimeError):
Thermal.get_cooling_level()
mock_read_file.side_effect = ValueError('')
with pytest.raises(RuntimeError):
Thermal.get_cooling_level()

510
platform/mellanox/mlnx-platform-api/tests/test_thermal_policy.py
View File

@@ -1,510 +0,0 @@
#
# Copyright (c) 2020-2022 NVIDIA CORPORATION & AFFILIATES.
# Apache-2.0
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
#
import os
import sys
import pytest
import json
from mock import MagicMock, patch
from .mock_platform import MockChassis, MockFan, MockFanDrawer, MockPsu
test_path = os.path.dirname(os.path.abspath(__file__))
modules_path = os.path.dirname(test_path)
sys.path.insert(0, modules_path)
from sonic_platform.thermal_manager import ThermalManager
from sonic_platform.thermal_infos import FanInfo, PsuInfo
from sonic_platform.thermal import Thermal, MAX_COOLING_LEVEL
from sonic_platform.device_data import DeviceDataManager
@pytest.fixture(scope='session', autouse=True)
def thermal_manager():
policy_file = os.path.join(test_path, 'thermal_policy.json')
ThermalManager.load(policy_file)
return ThermalManager
def test_load_policy(thermal_manager):
assert 'psu_info' in thermal_manager._thermal_info_dict
assert 'fan_info' in thermal_manager._thermal_info_dict
assert 'chassis_info' in thermal_manager._thermal_info_dict
assert 'any fan absence' in thermal_manager._policy_dict
assert 'any psu absence' in thermal_manager._policy_dict
assert 'any fan broken' in thermal_manager._policy_dict
assert 'all fan and psu presence' in thermal_manager._policy_dict
assert thermal_manager._fan_speed_when_suspend == 60
assert thermal_manager._run_thermal_algorithm_at_boot_up == False
def test_fan_info():
chassis = MockChassis()
chassis.make_fan_absence()
fan_info = FanInfo()
fan_info.collect(chassis)
assert len(fan_info.get_absence_fans()) == 1
assert len(fan_info.get_presence_fans()) == 0
assert len(fan_info.get_fault_fans()) == 0
assert fan_info.is_status_changed()
chassis.get_all_fan_drawers()[0].get_all_fans()[0].presence = True
fan_info.collect(chassis)
assert len(fan_info.get_absence_fans()) == 0
assert len(fan_info.get_presence_fans()) == 1
assert len(fan_info.get_fault_fans()) == 0
assert fan_info.is_status_changed()
chassis.get_all_fan_drawers()[0].get_all_fans()[0].status = False
fan_info.collect(chassis)
assert len(fan_info.get_absence_fans()) == 0
assert len(fan_info.get_presence_fans()) == 1
assert len(fan_info.get_fault_fans()) == 1
assert fan_info.is_status_changed()
def test_psu_info():
chassis = MockChassis()
chassis.make_psu_absence()
psu_info = PsuInfo()
psu_info.collect(chassis)
assert len(psu_info.get_absence_psus()) == 1
assert len(psu_info.get_presence_psus()) == 0
assert psu_info.is_status_changed()
psu_list = chassis.get_all_psus()
psu_list[0].presence = True
psu_info.collect(chassis)
assert len(psu_info.get_absence_psus()) == 0
assert len(psu_info.get_presence_psus()) == 1
assert psu_info.is_status_changed()
psu_list[0].powergood = False
psu_info.collect(chassis)
assert len(psu_info.get_absence_psus()) == 0
assert len(psu_info.get_presence_psus()) == 1
assert not psu_info.is_status_changed()
@patch('sonic_platform.thermal.Thermal.monitor_asic_themal_zone', MagicMock())
@patch('sonic_platform.thermal.Thermal.get_cooling_level', MagicMock(return_value=6))
@patch('sonic_platform.thermal.Thermal.get_min_allowed_cooling_level_by_thermal_zone', MagicMock(return_value=2))
@patch('sonic_platform.thermal.Thermal.set_cooling_state')
@patch('sonic_platform.thermal.Thermal.set_cooling_level')
def test_fan_policy(mock_set_cooling_level, mock_set_cooling_state, thermal_manager):
print('In test_fan_policy')
from sonic_platform.thermal import MIN_COOLING_LEVEL_FOR_NORMAL
chassis = MockChassis()
chassis.make_fan_absence()
chassis.get_all_fan_drawers()[0].get_all_fans().append(MockFan())
chassis.platform_name = 'some_platform'
thermal_manager.run_policy(chassis)
mock_set_cooling_level.assert_called_with(MAX_COOLING_LEVEL)
mock_set_cooling_state.assert_called_with(MAX_COOLING_LEVEL)
Thermal.expect_cooling_level = None
fan_list = chassis.get_all_fan_drawers()[0].get_all_fans()
fan_list[0].presence = True
thermal_manager.run_policy(chassis)
mock_set_cooling_level.assert_called_with(6)
mock_set_cooling_state.assert_called_with(6)
Thermal.expect_cooling_level = None
fan_list[0].status = False
thermal_manager.run_policy(chassis)
mock_set_cooling_level.assert_called_with(MAX_COOLING_LEVEL)
Thermal.expect_cooling_level = None
fan_list[0].status = True
thermal_manager.run_policy(chassis)
mock_set_cooling_level.assert_called_with(6)
mock_set_cooling_state.assert_called_with(6)
@patch('sonic_platform.thermal.Thermal.monitor_asic_themal_zone', MagicMock())
@patch('sonic_platform.thermal.Thermal.get_min_allowed_cooling_level_by_thermal_zone', MagicMock(return_value=2))
@patch('sonic_platform.thermal.Thermal.get_cooling_level', MagicMock(return_value=6))
@patch('sonic_platform.thermal.Thermal.set_cooling_state')
@patch('sonic_platform.thermal.Thermal.set_cooling_level')
def test_psu_policy(mock_set_cooling_level, mock_set_cooling_state, thermal_manager):
chassis = MockChassis()
chassis.make_psu_absence()
chassis.platform_name = 'some_platform'
thermal_manager.run_policy(chassis)
mock_set_cooling_level.assert_called_with(MAX_COOLING_LEVEL)
mock_set_cooling_state.assert_called_with(MAX_COOLING_LEVEL)
psu_list = chassis.get_all_psus()
psu_list[0].presence = True
thermal_manager.run_policy(chassis)
mock_set_cooling_level.assert_called_with(6)
mock_set_cooling_state.assert_called_with(6)
def test_any_fan_absence_condition():
chassis = MockChassis()
chassis.make_fan_absence()
fan_info = FanInfo()
fan_info.collect(chassis)
from sonic_platform.thermal_conditions import AnyFanAbsenceCondition
condition = AnyFanAbsenceCondition()
assert condition.is_match({'fan_info': fan_info})
fan = chassis.get_all_fan_drawers()[0].get_all_fans()[0]
fan.presence = True
fan_info.collect(chassis)
assert not condition.is_match({'fan_info': fan_info})
def test_all_fan_absence_condition():
chassis = MockChassis()
chassis.make_fan_absence()
fan = MockFan()
fan_list = chassis.get_all_fan_drawers()[0].get_all_fans()
fan_list.append(fan)
fan_info = FanInfo()
fan_info.collect(chassis)
from sonic_platform.thermal_conditions import AllFanAbsenceCondition
condition = AllFanAbsenceCondition()
assert not condition.is_match({'fan_info': fan_info})
fan.presence = False
fan_info.collect(chassis)
assert condition.is_match({'fan_info': fan_info})
def test_all_fan_presence_condition():
chassis = MockChassis()
chassis.make_fan_absence()
fan = MockFan()
fan_list = chassis.get_all_fan_drawers()[0].get_all_fans()
fan_list.append(fan)
fan_info = FanInfo()
fan_info.collect(chassis)
from sonic_platform.thermal_conditions import AllFanPresenceCondition
condition = AllFanPresenceCondition()
assert not condition.is_match({'fan_info': fan_info})
fan_list[0].presence = True
fan_info.collect(chassis)
assert condition.is_match({'fan_info': fan_info})
def test_any_fan_fault_condition():
chassis = MockChassis()
chassis.get_all_fan_drawers().append(MockFanDrawer())
fan = MockFan()
fan_list = chassis.get_all_fan_drawers()[0].get_all_fans()
fan_list.append(fan)
fault_fan = MockFan()
fault_fan.status = False
fan_list.append(fault_fan)
fan_info = FanInfo()
fan_info.collect(chassis)
from sonic_platform.thermal_conditions import AnyFanFaultCondition
condition = AnyFanFaultCondition()
assert condition.is_match({'fan_info': fan_info})
fault_fan.status = True
fan_info.collect(chassis)
assert not condition.is_match({'fan_info': fan_info})
def test_all_fan_good_condition():
chassis = MockChassis()
chassis.get_all_fan_drawers().append(MockFanDrawer())
fan = MockFan()
fan_list = chassis.get_all_fan_drawers()[0].get_all_fans()
fan_list.append(fan)
fault_fan = MockFan()
fault_fan.status = False
fan_list.append(fault_fan)
fan_info = FanInfo()
fan_info.collect(chassis)
from sonic_platform.thermal_conditions import AllFanGoodCondition
condition = AllFanGoodCondition()
assert not condition.is_match({'fan_info': fan_info})
fault_fan.status = True
fan_info.collect(chassis)
assert condition.is_match({'fan_info': fan_info})
def test_any_psu_absence_condition():
chassis = MockChassis()
chassis.make_psu_absence()
psu_info = PsuInfo()
psu_info.collect(chassis)
from sonic_platform.thermal_conditions import AnyPsuAbsenceCondition
condition = AnyPsuAbsenceCondition()
assert condition.is_match({'psu_info': psu_info})
psu = chassis.get_all_psus()[0]
psu.presence = True
psu_info.collect(chassis)
assert not condition.is_match({'psu_info': psu_info})
def test_all_psu_absence_condition():
chassis = MockChassis()
chassis.make_psu_absence()
psu = MockPsu()
psu_list = chassis.get_all_psus()
psu_list.append(psu)
psu_info = PsuInfo()
psu_info.collect(chassis)
from sonic_platform.thermal_conditions import AllPsuAbsenceCondition
condition = AllPsuAbsenceCondition()
assert not condition.is_match({'psu_info': psu_info})
psu.presence = False
psu_info.collect(chassis)
assert condition.is_match({'psu_info': psu_info})
def test_all_fan_presence_condition():
chassis = MockChassis()
chassis.make_psu_absence()
psu = MockPsu()
psu_list = chassis.get_all_psus()
psu_list.append(psu)
psu_info = PsuInfo()
psu_info.collect(chassis)
from sonic_platform.thermal_conditions import AllPsuPresenceCondition
condition = AllPsuPresenceCondition()
assert not condition.is_match({'psu_info': psu_info})
psu_list[0].presence = True
psu_info.collect(chassis)
assert condition.is_match({'psu_info': psu_info})
def test_load_set_fan_speed_action():
from sonic_platform.thermal_actions import SetAllFanSpeedAction
action = SetAllFanSpeedAction()
json_str = '{\"speed\": \"50\"}'
json_obj = json.loads(json_str)
action.load_from_json(json_obj)
assert action.speed == 50
json_str = '{\"speed\": \"-1\"}'
json_obj = json.loads(json_str)
with pytest.raises(ValueError):
action.load_from_json(json_obj)
json_str = '{\"speed\": \"101\"}'
json_obj = json.loads(json_str)
with pytest.raises(ValueError):
action.load_from_json(json_obj)
json_str = '{\"invalid\": \"101\"}'
json_obj = json.loads(json_str)
with pytest.raises(ValueError):
action.load_from_json(json_obj)
@patch('sonic_platform.thermal.Thermal.set_cooling_level', MagicMock())
def test_execute_set_fan_speed_action():
chassis = MockChassis()
chassis.get_all_fan_drawers().append(MockFanDrawer())
fan_list = chassis.get_all_fan_drawers()[0].get_all_fans()
fan_list.append(MockFan())
fan_list.append(MockFan())
fan_info = FanInfo()
fan_info.collect(chassis)
Thermal.expect_cooling_level = None
from sonic_platform.thermal_actions import SetAllFanSpeedAction
action = SetAllFanSpeedAction()
action.speed = 20
action.execute({'fan_info': fan_info})
assert Thermal.expect_cooling_level == 2
def test_load_duplicate_condition():
from sonic_platform_base.sonic_thermal_control.thermal_policy import ThermalPolicy
with open(os.path.join(test_path, 'duplicate_condition.json')) as f:
json_obj = json.load(f)
policy = ThermalPolicy()
with pytest.raises(Exception):
policy.load_from_json(json_obj)
def test_load_duplicate_action():
from sonic_platform_base.sonic_thermal_control.thermal_policy import ThermalPolicy
with open(os.path.join(test_path, 'duplicate_action.json')) as f:
json_obj = json.load(f)
policy = ThermalPolicy()
with pytest.raises(Exception):
policy.load_from_json(json_obj)
def test_load_empty_condition():
from sonic_platform_base.sonic_thermal_control.thermal_policy import ThermalPolicy
with open(os.path.join(test_path, 'empty_condition.json')) as f:
json_obj = json.load(f)
policy = ThermalPolicy()
with pytest.raises(Exception):
policy.load_from_json(json_obj)
def test_load_empty_action():
from sonic_platform_base.sonic_thermal_control.thermal_policy import ThermalPolicy
with open(os.path.join(test_path, 'empty_action.json')) as f:
json_obj = json.load(f)
policy = ThermalPolicy()
with pytest.raises(Exception):
policy.load_from_json(json_obj)
def test_load_policy_with_same_conditions():
from sonic_platform_base.sonic_thermal_control.thermal_manager_base import ThermalManagerBase
class MockThermalManager(ThermalManagerBase):
pass
with pytest.raises(Exception):
MockThermalManager.load(os.path.join(test_path, 'policy_with_same_conditions.json'))
def test_dynamic_minimum_table_data():
from sonic_platform.device_data import DEVICE_DATA
for platform, platform_data in DEVICE_DATA.items():
if 'thermal' in platform_data and 'minimum_table' in platform_data['thermal']:
minimum_table = platform_data['thermal']['minimum_table']
check_minimum_table_data(platform, minimum_table)
def check_minimum_table_data(platform, minimum_table):
valid_dir = ['p2c', 'c2p', 'unk']
valid_trust_state = ['trust', 'untrust']
for category, data in minimum_table.items():
key_data = category.split('_')
assert key_data[0] in valid_dir
assert key_data[1] in valid_trust_state
data_list = [(value, key) for key, value in data.items()]
data_list.sort(key=lambda x : x[0])
previous_edge = None
previous_cooling_level = None
for item in data_list:
cooling_level = item[0]
range_str = item[1]
ranges = range_str.split(':')
low = int(ranges[0])
high = int(ranges[1])
assert low < high
if previous_edge is None:
assert low == -127
else:
assert low - previous_edge == 1, '{}-{}-{} error, item={}'.format(platform, key_data[0], key_data[1], item)
previous_edge = high
assert 10 <= cooling_level <= 20
if previous_cooling_level is not None:
assert cooling_level > previous_cooling_level
previous_cooling_level = cooling_level
@patch('sonic_platform.thermal.Thermal.monitor_asic_themal_zone', MagicMock())
@patch('sonic_platform.device_data.DeviceDataManager.get_platform_name')
@patch('sonic_platform.thermal.Thermal.get_min_allowed_cooling_level_by_thermal_zone')
@patch('sonic_platform.thermal.Thermal.get_min_amb_temperature')
@patch('sonic_platform.thermal.Thermal.check_module_temperature_trustable')
def test_thermal_recover_policy(mock_check_trustable, mock_get_min_amb, moc_get_min_allowed, mock_platform_name):
from sonic_platform.thermal_infos import ChassisInfo
from sonic_platform.thermal_actions import ThermalRecoverAction
chassis = MockChassis()
mock_platform_name.return_value = 'invalid'
info = ChassisInfo()
info._chassis = chassis
thermal_info_dict = {ChassisInfo.INFO_NAME: info}
Thermal.expect_cooling_level = None
action = ThermalRecoverAction()
moc_get_min_allowed.return_value = 2
action.execute(thermal_info_dict)
assert Thermal.expect_cooling_level == 6
Thermal.last_set_cooling_level = Thermal.expect_cooling_level
Thermal.expect_cooling_level = None
mock_platform_name.return_value = 'x86_64-mlnx_msn2700-r0'
mock_check_trustable.return_value = 'trust'
mock_get_min_amb.return_value = 29999
moc_get_min_allowed.return_value = None
action.execute(thermal_info_dict)
assert Thermal.expect_cooling_level is None
moc_get_min_allowed.return_value = 4
action.execute(thermal_info_dict)
assert Thermal.expect_cooling_level == 4
Thermal.last_set_cooling_level = Thermal.expect_cooling_level
mock_check_trustable.return_value = 'untrust'
mock_get_min_amb.return_value = 31001
action.execute(thermal_info_dict)
assert Thermal.expect_cooling_level == 5
@patch('sonic_platform.thermal.Thermal.set_cooling_state')
@patch('sonic_platform.utils.read_int_from_file')
def test_monitor_asic_themal_zone(mock_read_int, mock_set_cooling_state):
mock_read_int.side_effect = [111000, 105000]
Thermal.monitor_asic_themal_zone()
assert Thermal.expect_cooling_state == MAX_COOLING_LEVEL
Thermal.commit_cooling_level({})
mock_set_cooling_state.assert_called_with(MAX_COOLING_LEVEL)
mock_read_int.reset()
mock_read_int.side_effect = [104000, 105000]
Thermal.monitor_asic_themal_zone()
assert Thermal.expect_cooling_state is None
def test_set_expect_cooling_level():
Thermal.set_expect_cooling_level(5)
assert Thermal.expect_cooling_level == 5
Thermal.set_expect_cooling_level(3)
assert Thermal.expect_cooling_level == 5
Thermal.set_expect_cooling_level(10)
assert Thermal.expect_cooling_level == 10
@patch('sonic_platform.thermal.Thermal.commit_cooling_level', MagicMock())
@patch('sonic_platform.thermal_conditions.AnyFanFaultCondition.is_match')
@patch('sonic_platform.thermal_manager.ThermalManager._collect_thermal_information')
@patch('sonic_platform.thermal.Thermal.set_expect_cooling_level')
def test_run_policy(mock_expect, mock_collect_info, mock_match, thermal_manager):
chassis = MockChassis()
mock_collect_info.side_effect = Exception('')
thermal_manager.run_policy(chassis)
mock_expect.assert_called_with(MAX_COOLING_LEVEL)
mock_collect_info.side_effect = None
mock_expect.reset_mock()
mock_match.side_effect = Exception('')
thermal_manager.run_policy(chassis)
mock_expect.assert_called_with(MAX_COOLING_LEVEL)
thermal_manager.stop()
mock_expect.reset_mock()
thermal_manager.run_policy(chassis)
assert mock_expect.call_count == 0

81
platform/mellanox/mlnx-platform-api/tests/thermal_policy.json
View File

@@ -1,81 +0,0 @@
{
"thermal_control_algorithm": {
"run_at_boot_up": "false",
"fan_speed_when_suspend": "60"
},
"info_types": [
{
"type": "fan_info"
},
{
"type": "psu_info"
},
{
"type": "chassis_info"
}
],
"policies": [
{
"name": "any fan absence",
"conditions": [
{
"type": "fan.any.absence"
}
],
"actions": [
{
"type": "fan.all.set_speed",
"speed": "100"
}
]
},
{
"name": "any psu absence",
"conditions": [
{
"type": "psu.any.absence"
}
],
"actions": [
{
"type": "fan.all.set_speed",
"speed": "100"
}
]
},
{
"name": "any fan broken",
"conditions": [
{
"type": "fan.any.fault"
}
],
"actions": [
{
"type": "fan.all.set_speed",
"speed": "100"
}
]
},
{
"name": "all fan and psu presence",
"conditions": [
{
"type": "fan.all.presence"
},
{
"type": "psu.all.presence"
},
{
"type": "fan.all.good"
}
],
"actions": [
{
"type": "thermal.recover",
"status": "true"
}
]
}
]
}

96
platform/mellanox/non-upstream-patches/patches/0049-leds-mlxreg-Provide-conversion-for-hardware-LED-colo.patch Normal file
View File

@@ -0,0 +1,96 @@
From 4db801c656712234c840883b68429e6d45080ea3 Mon Sep 17 00:00:00 2001
From: Vadim Pasternak <vadimp@nvidia.com>
Date: Tue, 6 Jul 2021 18:38:29 +0000
Subject: [PATCH backport v5.10.43 49/67] leds: mlxreg: Provide conversion for
hardware LED color code
In case register is set by hardware, convert hardware color code to
expose correct color to "sysfs".
For some LED color at initial state is set by hardware. Hardware
controls LED color until the first software write access to any LED
register - the first software access cancels hardware control.
If LED is under hardware control - detect the color in brightness_get()
function.
Signed-off-by: Vadim Pasternak <vadimp@nvidia.com>
---
drivers/leds/leds-mlxreg.c | 27 ++++++++++++++++++++++-----
1 file changed, 22 insertions(+), 5 deletions(-)
diff --git a/drivers/leds/leds-mlxreg.c b/drivers/leds/leds-mlxreg.c
index 82aea1cd0c12..aa82f6a521f8 100644
--- a/drivers/leds/leds-mlxreg.c
+++ b/drivers/leds/leds-mlxreg.c
@@ -17,7 +17,9 @@
#define MLXREG_LED_OFFSET_BLINK_3HZ 0x01 /* Offset from solid: 3Hz blink */
#define MLXREG_LED_OFFSET_BLINK_6HZ 0x02 /* Offset from solid: 6Hz blink */
#define MLXREG_LED_IS_OFF 0x00 /* Off */
-#define MLXREG_LED_RED_SOLID 0x05 /* Solid red */
+#define MLXREG_LED_RED_SOLID_HW 0x01 /* Solid red or orange by hardware */
+#define MLXREG_LED_RED_SOLID 0x05 /* Solid red or orange */
+#define MLXREG_LED_GREEN_SOLID_HW 0x09 /* Solid green by hardware */
#define MLXREG_LED_GREEN_SOLID 0x0D /* Solid green */
#define MLXREG_LED_AMBER_SOLID 0x09 /* Solid amber */
#define MLXREG_LED_BLINK_3HZ 167 /* ~167 msec off/on - HW support */
@@ -30,6 +32,7 @@
* @data: led configuration data;
* @led_classdev: led class data;
* @base_color: base led color (other colors have constant offset from base);
+ * @base_color_hw: base led color set by hardware;
* @led_data: led data;
* @data_parent: pointer to private device control data of parent;
*/
@@ -37,6 +40,7 @@ struct mlxreg_led_data {
struct mlxreg_core_data *data;
struct led_classdev led_cdev;
u8 base_color;
+ u8 base_color_hw;
void *data_parent;
char led_cdev_name[MLXREG_CORE_LABEL_MAX_SIZE];
};
@@ -124,8 +128,17 @@ mlxreg_led_get_hw(struct mlxreg_led_data *led_data)
regval = regval & ~data->mask;
regval = (ror32(data->mask, data->bit) == 0xf0) ? ror32(regval,
data->bit) : ror32(regval, data->bit + 4);
- if (regval >= led_data->base_color &&
- regval <= (led_data->base_color + MLXREG_LED_OFFSET_BLINK_6HZ))
+
+ /*
+ * For some LED color at initial state is set by hardware. Hardware controls LED color
+ * until the first write access to any LED register. If LED is under hardware control -
+ * convert the value to the software mask to expose correct color. The first LED set by
+ * software cancels hardware control.
+ */
+ if ((regval >= led_data->base_color &&
+ regval <= (led_data->base_color + MLXREG_LED_OFFSET_BLINK_6HZ)) ||
+ (led_data->base_color_hw && regval >= led_data->base_color_hw &&
+ regval <= (led_data->base_color_hw + MLXREG_LED_OFFSET_BLINK_6HZ)))
return LED_FULL;
return LED_OFF;
@@ -217,16 +230,20 @@ static int mlxreg_led_config(struct mlxreg_led_priv_data *priv)
led_cdev = &led_data->led_cdev;
led_data->data_parent = priv;
- if (strstr(data->label, "red") ||
- strstr(data->label, "orange")) {
+ if (strstr(data->label, "red")) {
+ brightness = LED_OFF;
+ led_data->base_color = MLXREG_LED_RED_SOLID;
+ } else if (strstr(data->label, "orange")) {
brightness = LED_OFF;
led_data->base_color = MLXREG_LED_RED_SOLID;
+ led_data->base_color_hw = MLXREG_LED_RED_SOLID_HW;
} else if (strstr(data->label, "amber")) {
brightness = LED_OFF;
led_data->base_color = MLXREG_LED_AMBER_SOLID;
} else {
brightness = LED_OFF;
led_data->base_color = MLXREG_LED_GREEN_SOLID;
+ led_data->base_color_hw = MLXREG_LED_GREEN_SOLID_HW;
}
snprintf(led_data->led_cdev_name, sizeof(led_data->led_cdev_name),
"mlxreg:%s", data->label);
--
2.20.1

38
platform/mellanox/non-upstream-patches/patches/0050-leds-mlxreg-Skip-setting-LED-color-during-initializa.patch Normal file
View File

@@ -0,0 +1,38 @@
From 3d0e396f29b5da17385c279946b70ee5cd373efe Mon Sep 17 00:00:00 2001
From: Vadim Pasternak <vadimp@nvidia.com>
Date: Wed, 7 Jul 2021 10:18:14 +0000
Subject: [PATCH backport 5.10 050/182] leds: mlxreg: Skip setting LED color
during initialization
Hardware controls LED through CPLD device and LED control ownership
passes to the software after it performs the first write operation for
any LED on a system.
For example, hardware sets "system" LED "green blink" during boot and
might change it to "red", in case something is went wrong from hardware
point of view.
The motivation for not setting LED during kernel initialization is for
keeping hardware settings visible for user, until user will not decide
to set LEDs according to user OS specific requirements.
Signed-off-by: Vadim Pasternak <vadimp@nvidia.com>
---
drivers/leds/leds-mlxreg.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/leds/leds-mlxreg.c b/drivers/leds/leds-mlxreg.c
index 82aea1cd0c12..7df4653a80d7 100644
--- a/drivers/leds/leds-mlxreg.c
+++ b/drivers/leds/leds-mlxreg.c
@@ -243,9 +243,6 @@ static int mlxreg_led_config(struct mlxreg_led_priv_data *priv)
if (err)
return err;
- if (led_cdev->brightness)
- mlxreg_led_brightness_set(led_cdev,
- led_cdev->brightness);
dev_info(led_cdev->dev, "label: %s, mask: 0x%02x, offset:0x%02x\n",
data->label, data->mask, data->reg);
}
--
2.20.1

77
platform/mellanox/non-upstream-patches/patches/0051-leds-mlxreg-Allow-multi-instantiation-of-same-name-L.patch Normal file
View File

@@ -0,0 +1,77 @@
From 6782d682cb0510d0fee33f456ed3492834bad97d Mon Sep 17 00:00:00 2001
From: Vadim Pasternak <vadimp@nvidia.com>
Date: Wed, 7 Jul 2021 10:29:27 +0000
Subject: leds: mlxreg: Allow multi-instantiation of same name LED for modular
systems
It could be more than one instance of LED with the same name in the
modular systems. For example, "status" or "uid" LED can be located
on chassis and on each line card of modular system.
In order to avoid conflicts with duplicated names, append platform
device Id, which is unique, to LED name after driver name.
Thus, for example, "status" LED on chassis is to be called, like it is
called now on non-modular systems, on which platform device Id is not
specified: "mlxreg:status:green". While for the line cards LEDs it will
be called like: "pcicard48:status:green", "ibcard66:status:green",
etc. Where line card prefix is specified according to the type of bus
connecting line card to the chassis.
LED driver works on top of register space of the programmable devices
(CPLD or FPGA), providing the logic for LED control. The programmable
devices on the line cards are connected through I2C bus and LED driver
will work over I2C. On main board programmable device is connected
through LPC, and LED driver works over LPC.
The motivation it to provide support for new modular systems which
could be equipped with the different types of replaceable line cards
and management board.
Line cards are connected to the chassis through I2C interface for the
chassis management operations and through PCIe for the networking
operations.
The first type of line card supports 16x100GbE QSFP28 Ethernet ports.
Those line cards equipped with the programmable devices aimed for
system control of Nvidia Ethernet switch ASIC control, Nvidia FPGA,
Nvidia gearboxes (PHYs).
The next coming card generations are supposed to support:
- Line cards with 8x200Gbe QSFP28 Ethernet ports.
- Line cards with 4x400Gbe QSFP-DD Ethernet ports.
- Smart cards equipped with Nvidia ARM CPU for offloading and for fast
access to the storage (EBoF).
- Fabric cards for inter-connection.
Signed-off-by: Vadim Pasternak <vadimp@nvidia.com>
---
drivers/leds/leds-mlxreg.c | 15 +++++++++++++--
1 file changed, 13 insertions(+), 2 deletions(-)
diff --git a/drivers/leds/leds-mlxreg.c b/drivers/leds/leds-mlxreg.c
index 0f2608a34..099ff4be2 100644
--- a/drivers/leds/leds-mlxreg.c
+++ b/drivers/leds/leds-mlxreg.c
@@ -245,8 +245,19 @@ static int mlxreg_led_config(struct mlxreg_led_priv_data *priv)
led_data->base_color = MLXREG_LED_GREEN_SOLID;
led_data->base_color_hw = MLXREG_LED_GREEN_SOLID_HW;
}
- snprintf(led_data->led_cdev_name, sizeof(led_data->led_cdev_name),
- "mlxreg:%s", data->label);
+
+ /*
+ * Id greater than zero is used for LEDs located on replaceable unit,
+ * like line card or fabric card. In this case Id is set to I2C bus
+ * number. Otherwise LEDs located on the main board. The field "identity"
+ * specifies the type of bus connecting line card to the chassis.
+ */
+ if (priv->pdev->id > 0)
+ sprintf(led_data->led_cdev_name, "%scard%d:%s", led_pdata->identity,
+ priv->pdev->id, data->label);
+ else
+ sprintf(led_data->led_cdev_name, "%s:%s", "mlxreg",
+ data->label);
led_cdev->name = led_data->led_cdev_name;
led_cdev->brightness = brightness;
led_cdev->max_brightness = LED_ON;
--
2.14.1

771
platform/mellanox/non-upstream-patches/patches/0098-1-Revert-mlxsw-Use-u16-for-local_port-field.patch Normal file
View File

@@ -0,0 +1,771 @@
From 3a6322534307154e067d0596f52f287ecd0f599e Mon Sep 17 00:00:00 2001
From: Ciju Rajan K <crajank@nvidia.com>
Date: Thu, 17 Aug 2023 10:00:25 +0000
Subject: Revert "mlxsw: Use u16 for local_port field instead of u8"
This reverts commit 0639995c2017338c563db36f631e94d19ae45c74.
---
drivers/net/ethernet/mellanox/mlxsw/core.c | 32 ++++----
drivers/net/ethernet/mellanox/mlxsw/core.h | 34 ++++-----
drivers/net/ethernet/mellanox/mlxsw/minimal.c | 6 +-
drivers/net/ethernet/mellanox/mlxsw/reg.h | 106 +++++++++++++-------------
4 files changed, 89 insertions(+), 89 deletions(-)
diff --git a/drivers/net/ethernet/mellanox/mlxsw/core.c b/drivers/net/ethernet/mellanox/mlxsw/core.c
index 631c19222fc4..7938bad70e37 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/core.c
+++ b/drivers/net/ethernet/mellanox/mlxsw/core.c
@@ -47,7 +47,7 @@ static struct workqueue_struct *mlxsw_owq;
struct mlxsw_core_port {
struct devlink_port devlink_port;
void *port_driver_priv;
- u16 local_port;
+ u8 local_port;
};
void *mlxsw_core_port_driver_priv(struct mlxsw_core_port *mlxsw_core_port)
@@ -669,7 +669,7 @@ static void mlxsw_emad_process_response(struct mlxsw_core *mlxsw_core,
}
/* called with rcu read lock held */
-static void mlxsw_emad_rx_listener_func(struct sk_buff *skb, u16 local_port,
+static void mlxsw_emad_rx_listener_func(struct sk_buff *skb, u8 local_port,
void *priv)
{
struct mlxsw_core *mlxsw_core = priv;
@@ -2094,7 +2094,7 @@ int mlxsw_core_skb_transmit(struct mlxsw_core *mlxsw_core, struct sk_buff *skb,
EXPORT_SYMBOL(mlxsw_core_skb_transmit);
void mlxsw_core_ptp_transmitted(struct mlxsw_core *mlxsw_core,
- struct sk_buff *skb, u16 local_port)
+ struct sk_buff *skb, u8 local_port)
{
if (mlxsw_core->driver->ptp_transmitted)
mlxsw_core->driver->ptp_transmitted(mlxsw_core, skb,
@@ -2172,7 +2172,7 @@ mlxsw_core_rx_listener_state_set(struct mlxsw_core *mlxsw_core,
rxl_item->enabled = enabled;
}
-static void mlxsw_core_event_listener_func(struct sk_buff *skb, u16 local_port,
+static void mlxsw_core_event_listener_func(struct sk_buff *skb, u8 local_port,
void *priv)
{
struct mlxsw_event_listener_item *event_listener_item = priv;
@@ -2599,7 +2599,7 @@ void mlxsw_core_skb_receive(struct mlxsw_core *mlxsw_core, struct sk_buff *skb,
{
struct mlxsw_rx_listener_item *rxl_item;
const struct mlxsw_rx_listener *rxl;
- u16 local_port;
+ u8 local_port;
bool found = false;
if (rx_info->is_lag) {
@@ -2657,7 +2657,7 @@ static int mlxsw_core_lag_mapping_index(struct mlxsw_core *mlxsw_core,
}
void mlxsw_core_lag_mapping_set(struct mlxsw_core *mlxsw_core,
- u16 lag_id, u8 port_index, u16 local_port)
+ u16 lag_id, u8 port_index, u8 local_port)
{
int index = mlxsw_core_lag_mapping_index(mlxsw_core,
lag_id, port_index);
@@ -2677,7 +2677,7 @@ u8 mlxsw_core_lag_mapping_get(struct mlxsw_core *mlxsw_core,
EXPORT_SYMBOL(mlxsw_core_lag_mapping_get);
void mlxsw_core_lag_mapping_clear(struct mlxsw_core *mlxsw_core,
- u16 lag_id, u16 local_port)
+ u16 lag_id, u8 local_port)
{
int i;
@@ -2705,7 +2705,7 @@ u64 mlxsw_core_res_get(struct mlxsw_core *mlxsw_core,
}
EXPORT_SYMBOL(mlxsw_core_res_get);
-static int __mlxsw_core_port_init(struct mlxsw_core *mlxsw_core, u16 local_port,
+static int __mlxsw_core_port_init(struct mlxsw_core *mlxsw_core, u8 local_port,
enum devlink_port_flavour flavour,
u32 port_number, bool split,
u32 split_port_subnumber,
@@ -2736,7 +2736,7 @@ static int __mlxsw_core_port_init(struct mlxsw_core *mlxsw_core, u16 local_port,
return err;
}
-static void __mlxsw_core_port_fini(struct mlxsw_core *mlxsw_core, u16 local_port)
+static void __mlxsw_core_port_fini(struct mlxsw_core *mlxsw_core, u8 local_port)
{
struct mlxsw_core_port *mlxsw_core_port =
&mlxsw_core->ports[local_port];
@@ -2746,7 +2746,7 @@ static void __mlxsw_core_port_fini(struct mlxsw_core *mlxsw_core, u16 local_port
memset(mlxsw_core_port, 0, sizeof(*mlxsw_core_port));
}
-int mlxsw_core_port_init(struct mlxsw_core *mlxsw_core, u16 local_port,
+int mlxsw_core_port_init(struct mlxsw_core *mlxsw_core, u8 local_port,
u32 port_number, bool split,
u32 split_port_subnumber,
bool splittable, u32 lanes,
@@ -2761,7 +2761,7 @@ int mlxsw_core_port_init(struct mlxsw_core *mlxsw_core, u16 local_port,
}
EXPORT_SYMBOL(mlxsw_core_port_init);
-void mlxsw_core_port_fini(struct mlxsw_core *mlxsw_core, u16 local_port)
+void mlxsw_core_port_fini(struct mlxsw_core *mlxsw_core, u8 local_port)
{
__mlxsw_core_port_fini(mlxsw_core, local_port);
}
@@ -2794,7 +2794,7 @@ void mlxsw_core_cpu_port_fini(struct mlxsw_core *mlxsw_core)
}
EXPORT_SYMBOL(mlxsw_core_cpu_port_fini);
-void mlxsw_core_port_eth_set(struct mlxsw_core *mlxsw_core, u16 local_port,
+void mlxsw_core_port_eth_set(struct mlxsw_core *mlxsw_core, u8 local_port,
void *port_driver_priv, struct net_device *dev)
{
struct mlxsw_core_port *mlxsw_core_port =
@@ -2806,7 +2806,7 @@ void mlxsw_core_port_eth_set(struct mlxsw_core *mlxsw_core, u16 local_port,
}
EXPORT_SYMBOL(mlxsw_core_port_eth_set);
-void mlxsw_core_port_ib_set(struct mlxsw_core *mlxsw_core, u16 local_port,
+void mlxsw_core_port_ib_set(struct mlxsw_core *mlxsw_core, u8 local_port,
void *port_driver_priv)
{
struct mlxsw_core_port *mlxsw_core_port =
@@ -2818,7 +2818,7 @@ void mlxsw_core_port_ib_set(struct mlxsw_core *mlxsw_core, u16 local_port,
}
EXPORT_SYMBOL(mlxsw_core_port_ib_set);
-void mlxsw_core_port_clear(struct mlxsw_core *mlxsw_core, u16 local_port,
+void mlxsw_core_port_clear(struct mlxsw_core *mlxsw_core, u8 local_port,
void *port_driver_priv)
{
struct mlxsw_core_port *mlxsw_core_port =
@@ -2831,7 +2831,7 @@ void mlxsw_core_port_clear(struct mlxsw_core *mlxsw_core, u16 local_port,
EXPORT_SYMBOL(mlxsw_core_port_clear);
enum devlink_port_type mlxsw_core_port_type_get(struct mlxsw_core *mlxsw_core,
- u16 local_port)
+ u8 local_port)
{
struct mlxsw_core_port *mlxsw_core_port =
&mlxsw_core->ports[local_port];
@@ -2844,7 +2844,7 @@ EXPORT_SYMBOL(mlxsw_core_port_type_get);
struct devlink_port *
mlxsw_core_port_devlink_port_get(struct mlxsw_core *mlxsw_core,
- u16 local_port)
+ u8 local_port)
{
struct mlxsw_core_port *mlxsw_core_port =
&mlxsw_core->ports[local_port];
diff --git a/drivers/net/ethernet/mellanox/mlxsw/core.h b/drivers/net/ethernet/mellanox/mlxsw/core.h
index 1fc783174292..56efb8e48022 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/core.h
+++ b/drivers/net/ethernet/mellanox/mlxsw/core.h
@@ -49,7 +49,7 @@ int mlxsw_core_bus_device_register(const struct mlxsw_bus_info *mlxsw_bus_info,
void mlxsw_core_bus_device_unregister(struct mlxsw_core *mlxsw_core, bool reload);
struct mlxsw_tx_info {
- u16 local_port;
+ u8 local_port;
bool is_emad;
};
@@ -58,11 +58,11 @@ bool mlxsw_core_skb_transmit_busy(struct mlxsw_core *mlxsw_core,
int mlxsw_core_skb_transmit(struct mlxsw_core *mlxsw_core, struct sk_buff *skb,
const struct mlxsw_tx_info *tx_info);
void mlxsw_core_ptp_transmitted(struct mlxsw_core *mlxsw_core,
- struct sk_buff *skb, u16 local_port);
+ struct sk_buff *skb, u8 local_port);
struct mlxsw_rx_listener {
- void (*func)(struct sk_buff *skb, u16 local_port, void *priv);
- u16 local_port;
+ void (*func)(struct sk_buff *skb, u8 local_port, void *priv);
+ u8 local_port;
u8 mirror_reason;
u16 trap_id;
};
@@ -194,35 +194,35 @@ void mlxsw_core_skb_receive(struct mlxsw_core *mlxsw_core, struct sk_buff *skb,
struct mlxsw_rx_info *rx_info);
void mlxsw_core_lag_mapping_set(struct mlxsw_core *mlxsw_core,
- u16 lag_id, u8 port_index, u16 local_port);
+ u16 lag_id, u8 port_index, u8 local_port);
u8 mlxsw_core_lag_mapping_get(struct mlxsw_core *mlxsw_core,
u16 lag_id, u8 port_index);
void mlxsw_core_lag_mapping_clear(struct mlxsw_core *mlxsw_core,
- u16 lag_id, u16 local_port);
+ u16 lag_id, u8 local_port);
void *mlxsw_core_port_driver_priv(struct mlxsw_core_port *mlxsw_core_port);
-int mlxsw_core_port_init(struct mlxsw_core *mlxsw_core, u16 local_port,
+int mlxsw_core_port_init(struct mlxsw_core *mlxsw_core, u8 local_port,
u32 port_number, bool split, u32 split_port_subnumber,
bool splittable, u32 lanes,
const unsigned char *switch_id,
unsigned char switch_id_len);
-void mlxsw_core_port_fini(struct mlxsw_core *mlxsw_core, u16 local_port);
+void mlxsw_core_port_fini(struct mlxsw_core *mlxsw_core, u8 local_port);
int mlxsw_core_cpu_port_init(struct mlxsw_core *mlxsw_core,
void *port_driver_priv,
const unsigned char *switch_id,
unsigned char switch_id_len);
void mlxsw_core_cpu_port_fini(struct mlxsw_core *mlxsw_core);
-void mlxsw_core_port_eth_set(struct mlxsw_core *mlxsw_core, u16 local_port,
+void mlxsw_core_port_eth_set(struct mlxsw_core *mlxsw_core, u8 local_port,
void *port_driver_priv, struct net_device *dev);
-void mlxsw_core_port_ib_set(struct mlxsw_core *mlxsw_core, u16 local_port,
+void mlxsw_core_port_ib_set(struct mlxsw_core *mlxsw_core, u8 local_port,
void *port_driver_priv);
-void mlxsw_core_port_clear(struct mlxsw_core *mlxsw_core, u16 local_port,
+void mlxsw_core_port_clear(struct mlxsw_core *mlxsw_core, u8 local_port,
void *port_driver_priv);
enum devlink_port_type mlxsw_core_port_type_get(struct mlxsw_core *mlxsw_core,
- u16 local_port);
+ u8 local_port);
struct devlink_port *
mlxsw_core_port_devlink_port_get(struct mlxsw_core *mlxsw_core,
- u16 local_port);
+ u8 local_port);
struct mlxsw_env *mlxsw_core_env(const struct mlxsw_core *mlxsw_core);
int mlxsw_core_module_max_width(struct mlxsw_core *mlxsw_core, u8 module);
@@ -290,11 +290,11 @@ struct mlxsw_driver {
struct netlink_ext_ack *extack);
void (*fini)(struct mlxsw_core *mlxsw_core);
int (*basic_trap_groups_set)(struct mlxsw_core *mlxsw_core);
- int (*port_type_set)(struct mlxsw_core *mlxsw_core, u16 local_port,
+ int (*port_type_set)(struct mlxsw_core *mlxsw_core, u8 local_port,
enum devlink_port_type new_type);
- int (*port_split)(struct mlxsw_core *mlxsw_core, u16 local_port,
+ int (*port_split)(struct mlxsw_core *mlxsw_core, u8 local_port,
unsigned int count, struct netlink_ext_ack *extack);
- int (*port_unsplit)(struct mlxsw_core *mlxsw_core, u16 local_port,
+ int (*port_unsplit)(struct mlxsw_core *mlxsw_core, u8 local_port,
struct netlink_ext_ack *extack);
int (*sb_pool_get)(struct mlxsw_core *mlxsw_core,
unsigned int sb_index, u16 pool_index,
@@ -368,7 +368,7 @@ struct mlxsw_driver {
* is responsible for freeing the passed-in SKB.
*/
void (*ptp_transmitted)(struct mlxsw_core *mlxsw_core,
- struct sk_buff *skb, u16 local_port);
+ struct sk_buff *skb, u8 local_port);
u8 txhdr_len;
const struct mlxsw_config_profile *profile;
diff --git a/drivers/net/ethernet/mellanox/mlxsw/minimal.c b/drivers/net/ethernet/mellanox/mlxsw/minimal.c
index 1ddd11320b99..3d07c2dcf08d 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/minimal.c
+++ b/drivers/net/ethernet/mellanox/mlxsw/minimal.c
@@ -38,7 +38,7 @@ struct mlxsw_m {
struct mlxsw_m_port {
struct net_device *dev;
struct mlxsw_m *mlxsw_m;
- u16 local_port;
+ u8 local_port;
u8 module;
};
@@ -201,7 +201,7 @@ mlxsw_m_port_dev_addr_get(struct mlxsw_m_port *mlxsw_m_port)
}
static int
-mlxsw_m_port_create(struct mlxsw_m *mlxsw_m, u16 local_port, u8 module)
+mlxsw_m_port_create(struct mlxsw_m *mlxsw_m, u8 local_port, u8 module)
{
struct mlxsw_m_port *mlxsw_m_port;
struct net_device *dev;
@@ -264,7 +264,7 @@ mlxsw_m_port_create(struct mlxsw_m *mlxsw_m, u16 local_port, u8 module)
return err;
}
-static void mlxsw_m_port_remove(struct mlxsw_m *mlxsw_m, u16 local_port)
+static void mlxsw_m_port_remove(struct mlxsw_m *mlxsw_m, u8 local_port)
{
struct mlxsw_m_port *mlxsw_m_port = mlxsw_m->ports[local_port];
diff --git a/drivers/net/ethernet/mellanox/mlxsw/reg.h b/drivers/net/ethernet/mellanox/mlxsw/reg.h
index 2ec9ec6078e2..a9119451d999 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/reg.h
+++ b/drivers/net/ethernet/mellanox/mlxsw/reg.h
@@ -161,7 +161,7 @@ MLXSW_ITEM32(reg, sspr, sub_port, 0x00, 8, 8);
*/
MLXSW_ITEM32(reg, sspr, system_port, 0x04, 0, 16);
-static inline void mlxsw_reg_sspr_pack(char *payload, u16 local_port)
+static inline void mlxsw_reg_sspr_pack(char *payload, u8 local_port)
{
MLXSW_REG_ZERO(sspr, payload);
mlxsw_reg_sspr_m_set(payload, 1);
@@ -407,7 +407,7 @@ static inline void mlxsw_reg_sfd_uc_pack(char *payload, int rec_index,
enum mlxsw_reg_sfd_rec_policy policy,
const char *mac, u16 fid_vid,
enum mlxsw_reg_sfd_rec_action action,
- u16 local_port)
+ u8 local_port)
{
mlxsw_reg_sfd_rec_pack(payload, rec_index,
MLXSW_REG_SFD_REC_TYPE_UNICAST, mac, action);
@@ -419,7 +419,7 @@ static inline void mlxsw_reg_sfd_uc_pack(char *payload, int rec_index,
static inline void mlxsw_reg_sfd_uc_unpack(char *payload, int rec_index,
char *mac, u16 *p_fid_vid,
- u16 *p_local_port)
+ u8 *p_local_port)
{
mlxsw_reg_sfd_rec_mac_memcpy_from(payload, rec_index, mac);
*p_fid_vid = mlxsw_reg_sfd_uc_fid_vid_get(payload, rec_index);
@@ -685,7 +685,7 @@ MLXSW_ITEM32_INDEXED(reg, sfn, mac_system_port, MLXSW_REG_SFN_BASE_LEN, 0, 16,
static inline void mlxsw_reg_sfn_mac_unpack(char *payload, int rec_index,
char *mac, u16 *p_vid,
- u16 *p_local_port)
+ u8 *p_local_port)
{
mlxsw_reg_sfn_rec_mac_memcpy_from(payload, rec_index, mac);
*p_vid = mlxsw_reg_sfn_mac_fid_get(payload, rec_index);
@@ -800,7 +800,7 @@ enum mlxsw_reg_spms_state {
*/
MLXSW_ITEM_BIT_ARRAY(reg, spms, state, 0x04, 0x400, 2);
-static inline void mlxsw_reg_spms_pack(char *payload, u16 local_port)
+static inline void mlxsw_reg_spms_pack(char *payload, u8 local_port)
{
MLXSW_REG_ZERO(spms, payload);
mlxsw_reg_spms_local_port_set(payload, local_port);
@@ -840,7 +840,7 @@ MLXSW_ITEM32(reg, spvid, sub_port, 0x00, 8, 8);
*/
MLXSW_ITEM32(reg, spvid, pvid, 0x04, 0, 12);
-static inline void mlxsw_reg_spvid_pack(char *payload, u16 local_port, u16 pvid)
+static inline void mlxsw_reg_spvid_pack(char *payload, u8 local_port, u16 pvid)
{
MLXSW_REG_ZERO(spvid, payload);
mlxsw_reg_spvid_local_port_set(payload, local_port);
@@ -929,7 +929,7 @@ MLXSW_ITEM32_INDEXED(reg, spvm, rec_vid,
MLXSW_REG_SPVM_BASE_LEN, 0, 12,
MLXSW_REG_SPVM_REC_LEN, 0, false);
-static inline void mlxsw_reg_spvm_pack(char *payload, u16 local_port,
+static inline void mlxsw_reg_spvm_pack(char *payload, u8 local_port,
u16 vid_begin, u16 vid_end,
bool is_member, bool untagged)
{
@@ -991,7 +991,7 @@ MLXSW_ITEM32(reg, spaft, allow_prio_tagged, 0x04, 30, 1);
*/
MLXSW_ITEM32(reg, spaft, allow_tagged, 0x04, 29, 1);
-static inline void mlxsw_reg_spaft_pack(char *payload, u16 local_port,
+static inline void mlxsw_reg_spaft_pack(char *payload, u8 local_port,
bool allow_untagged)
{
MLXSW_REG_ZERO(spaft, payload);
@@ -1317,7 +1317,7 @@ MLXSW_ITEM32(reg, sldr, num_ports, 0x04, 24, 8);
MLXSW_ITEM32_INDEXED(reg, sldr, system_port, 0x08, 0, 16, 4, 0, false);
static inline void mlxsw_reg_sldr_lag_add_port_pack(char *payload, u8 lag_id,
- u16 local_port)
+ u8 local_port)
{
MLXSW_REG_ZERO(sldr, payload);
mlxsw_reg_sldr_op_set(payload, MLXSW_REG_SLDR_OP_LAG_ADD_PORT_LIST);
@@ -1327,7 +1327,7 @@ static inline void mlxsw_reg_sldr_lag_add_port_pack(char *payload, u8 lag_id,
}
static inline void mlxsw_reg_sldr_lag_remove_port_pack(char *payload, u8 lag_id,
- u16 local_port)
+ u8 local_port)
{
MLXSW_REG_ZERO(sldr, payload);
mlxsw_reg_sldr_op_set(payload, MLXSW_REG_SLDR_OP_LAG_REMOVE_PORT_LIST);
@@ -1501,7 +1501,7 @@ MLXSW_ITEM32(reg, slcor, lag_id, 0x00, 0, 10);
MLXSW_ITEM32(reg, slcor, port_index, 0x04, 0, 10);
static inline void mlxsw_reg_slcor_pack(char *payload,
- u16 local_port, u16 lag_id,
+ u8 local_port, u16 lag_id,
enum mlxsw_reg_slcor_col col)
{
MLXSW_REG_ZERO(slcor, payload);
@@ -1511,7 +1511,7 @@ static inline void mlxsw_reg_slcor_pack(char *payload,
}
static inline void mlxsw_reg_slcor_port_add_pack(char *payload,
- u16 local_port, u16 lag_id,
+ u8 local_port, u16 lag_id,
u8 port_index)
{
mlxsw_reg_slcor_pack(payload, local_port, lag_id,
@@ -1520,21 +1520,21 @@ static inline void mlxsw_reg_slcor_port_add_pack(char *payload,
}
static inline void mlxsw_reg_slcor_port_remove_pack(char *payload,
- u16 local_port, u16 lag_id)
+ u8 local_port, u16 lag_id)
{
mlxsw_reg_slcor_pack(payload, local_port, lag_id,
MLXSW_REG_SLCOR_COL_LAG_REMOVE_PORT);
}
static inline void mlxsw_reg_slcor_col_enable_pack(char *payload,
- u16 local_port, u16 lag_id)
+ u8 local_port, u16 lag_id)
{
mlxsw_reg_slcor_pack(payload, local_port, lag_id,
MLXSW_REG_SLCOR_COL_LAG_COLLECTOR_ENABLED);
}
static inline void mlxsw_reg_slcor_col_disable_pack(char *payload,
- u16 local_port, u16 lag_id)
+ u8 local_port, u16 lag_id)
{
mlxsw_reg_slcor_pack(payload, local_port, lag_id,
MLXSW_REG_SLCOR_COL_LAG_COLLECTOR_ENABLED);
@@ -1581,7 +1581,7 @@ enum mlxsw_reg_spmlr_learn_mode {
*/
MLXSW_ITEM32(reg, spmlr, learn_mode, 0x04, 30, 2);
-static inline void mlxsw_reg_spmlr_pack(char *payload, u16 local_port,
+static inline void mlxsw_reg_spmlr_pack(char *payload, u8 local_port,
enum mlxsw_reg_spmlr_learn_mode mode)
{
MLXSW_REG_ZERO(spmlr, payload);
@@ -1666,7 +1666,7 @@ MLXSW_ITEM32(reg, svfa, counter_set_type, 0x08, 24, 8);
*/
MLXSW_ITEM32(reg, svfa, counter_index, 0x08, 0, 24);
-static inline void mlxsw_reg_svfa_pack(char *payload, u16 local_port,
+static inline void mlxsw_reg_svfa_pack(char *payload, u8 local_port,
enum mlxsw_reg_svfa_mt mt, bool valid,
u16 fid, u16 vid)
{
@@ -1705,7 +1705,7 @@ MLXSW_ITEM32(reg, svpe, local_port, 0x00, 16, 8);
*/
MLXSW_ITEM32(reg, svpe, vp_en, 0x00, 8, 1);
-static inline void mlxsw_reg_svpe_pack(char *payload, u16 local_port,
+static inline void mlxsw_reg_svpe_pack(char *payload, u8 local_port,
bool enable)
{
MLXSW_REG_ZERO(svpe, payload);
@@ -1838,7 +1838,7 @@ MLXSW_ITEM32_INDEXED(reg, spvmlr, rec_learn_enable, MLXSW_REG_SPVMLR_BASE_LEN,
MLXSW_ITEM32_INDEXED(reg, spvmlr, rec_vid, MLXSW_REG_SPVMLR_BASE_LEN, 0, 12,
MLXSW_REG_SPVMLR_REC_LEN, 0x00, false);
-static inline void mlxsw_reg_spvmlr_pack(char *payload, u16 local_port,
+static inline void mlxsw_reg_spvmlr_pack(char *payload, u8 local_port,
u16 vid_begin, u16 vid_end,
bool learn_enable)
{
@@ -1907,7 +1907,7 @@ MLXSW_ITEM32_INDEXED(reg, cwtp, profile_max, MLXSW_REG_CWTP_BASE_LEN,
#define MLXSW_REG_CWTP_MAX_PROFILE 2
#define MLXSW_REG_CWTP_DEFAULT_PROFILE 1
-static inline void mlxsw_reg_cwtp_pack(char *payload, u16 local_port,
+static inline void mlxsw_reg_cwtp_pack(char *payload, u8 local_port,
u8 traffic_class)
{
int i;
@@ -2025,7 +2025,7 @@ MLXSW_ITEM32(reg, cwtpm, ntcp_r, 64, 0, 2);
#define MLXSW_REG_CWTPM_RESET_PROFILE 0
-static inline void mlxsw_reg_cwtpm_pack(char *payload, u16 local_port,
+static inline void mlxsw_reg_cwtpm_pack(char *payload, u8 local_port,
u8 traffic_class, u8 profile,
bool wred, bool ecn)
{
@@ -2116,7 +2116,7 @@ MLXSW_ITEM32(reg, ppbt, acl_info, 0x10, 0, 16);
static inline void mlxsw_reg_ppbt_pack(char *payload, enum mlxsw_reg_pxbt_e e,
enum mlxsw_reg_pxbt_op op,
- u16 local_port, u16 acl_info)
+ u8 local_port, u16 acl_info)
{
MLXSW_REG_ZERO(ppbt, payload);
mlxsw_reg_ppbt_e_set(payload, e);
@@ -3260,7 +3260,7 @@ enum mlxsw_reg_qpts_trust_state {
*/
MLXSW_ITEM32(reg, qpts, trust_state, 0x04, 0, 3);
-static inline void mlxsw_reg_qpts_pack(char *payload, u16 local_port,
+static inline void mlxsw_reg_qpts_pack(char *payload, u8 local_port,
enum mlxsw_reg_qpts_trust_state ts)
{
MLXSW_REG_ZERO(qpts, payload);
@@ -3476,7 +3476,7 @@ MLXSW_ITEM32(reg, qtct, switch_prio, 0x00, 0, 4);
*/
MLXSW_ITEM32(reg, qtct, tclass, 0x04, 0, 4);
-static inline void mlxsw_reg_qtct_pack(char *payload, u16 local_port,
+static inline void mlxsw_reg_qtct_pack(char *payload, u8 local_port,
u8 switch_prio, u8 tclass)
{
MLXSW_REG_ZERO(qtct, payload);
@@ -3643,7 +3643,7 @@ MLXSW_ITEM32(reg, qeec, max_shaper_bs, 0x1C, 0, 6);
#define MLXSW_REG_QEEC_LOWEST_SHAPER_BS_SP2 11
#define MLXSW_REG_QEEC_LOWEST_SHAPER_BS_SP3 11
-static inline void mlxsw_reg_qeec_pack(char *payload, u16 local_port,
+static inline void mlxsw_reg_qeec_pack(char *payload, u8 local_port,
enum mlxsw_reg_qeec_hr hr, u8 index,
u8 next_index)
{
@@ -3654,7 +3654,7 @@ static inline void mlxsw_reg_qeec_pack(char *payload, u16 local_port,
mlxsw_reg_qeec_next_element_index_set(payload, next_index);
}
-static inline void mlxsw_reg_qeec_ptps_pack(char *payload, u16 local_port,
+static inline void mlxsw_reg_qeec_ptps_pack(char *payload, u8 local_port,
bool ptps)
{
MLXSW_REG_ZERO(qeec, payload);
@@ -3692,7 +3692,7 @@ MLXSW_ITEM32(reg, qrwe, dscp, 0x04, 1, 1);
*/
MLXSW_ITEM32(reg, qrwe, pcp, 0x04, 0, 1);
-static inline void mlxsw_reg_qrwe_pack(char *payload, u16 local_port,
+static inline void mlxsw_reg_qrwe_pack(char *payload, u8 local_port,
bool rewrite_pcp, bool rewrite_dscp)
{
MLXSW_REG_ZERO(qrwe, payload);
@@ -3772,7 +3772,7 @@ MLXSW_ITEM32_INDEXED(reg, qpdsm, prio_entry_color2_dscp,
MLXSW_REG_QPDSM_BASE_LEN, 8, 6,
MLXSW_REG_QPDSM_PRIO_ENTRY_REC_LEN, 0x00, false);
-static inline void mlxsw_reg_qpdsm_pack(char *payload, u16 local_port)
+static inline void mlxsw_reg_qpdsm_pack(char *payload, u8 local_port)
{
MLXSW_REG_ZERO(qpdsm, payload);
mlxsw_reg_qpdsm_local_port_set(payload, local_port);
@@ -3813,7 +3813,7 @@ MLXSW_ITEM32(reg, qpdp, local_port, 0x00, 16, 8);
*/
MLXSW_ITEM32(reg, qpdp, switch_prio, 0x04, 0, 4);
-static inline void mlxsw_reg_qpdp_pack(char *payload, u16 local_port,
+static inline void mlxsw_reg_qpdp_pack(char *payload, u8 local_port,
u8 switch_prio)
{
MLXSW_REG_ZERO(qpdp, payload);
@@ -3859,7 +3859,7 @@ MLXSW_ITEM16_INDEXED(reg, qpdpm, dscp_entry_prio,
MLXSW_REG_QPDPM_BASE_LEN, 0, 4,
MLXSW_REG_QPDPM_DSCP_ENTRY_REC_LEN, 0x00, false);
-static inline void mlxsw_reg_qpdpm_pack(char *payload, u16 local_port)
+static inline void mlxsw_reg_qpdpm_pack(char *payload, u8 local_port)
{
MLXSW_REG_ZERO(qpdpm, payload);
mlxsw_reg_qpdpm_local_port_set(payload, local_port);
@@ -3901,7 +3901,7 @@ MLXSW_ITEM32(reg, qtctm, local_port, 0x00, 16, 8);
MLXSW_ITEM32(reg, qtctm, mc, 0x04, 0, 1);
static inline void
-mlxsw_reg_qtctm_pack(char *payload, u16 local_port, bool mc)
+mlxsw_reg_qtctm_pack(char *payload, u8 local_port, bool mc)
{
MLXSW_REG_ZERO(qtctm, payload);
mlxsw_reg_qtctm_local_port_set(payload, local_port);
@@ -4065,7 +4065,7 @@ MLXSW_ITEM32_INDEXED(reg, pmlp, tx_lane, 0x04, 16, 4, 0x04, 0x00, false);
*/
MLXSW_ITEM32_INDEXED(reg, pmlp, rx_lane, 0x04, 24, 4, 0x04, 0x00, false);
-static inline void mlxsw_reg_pmlp_pack(char *payload, u16 local_port)
+static inline void mlxsw_reg_pmlp_pack(char *payload, u8 local_port)
{
MLXSW_REG_ZERO(pmlp, payload);
mlxsw_reg_pmlp_local_port_set(payload, local_port);
@@ -4112,7 +4112,7 @@ MLXSW_ITEM32(reg, pmtu, admin_mtu, 0x08, 16, 16);
*/
MLXSW_ITEM32(reg, pmtu, oper_mtu, 0x0C, 16, 16);
-static inline void mlxsw_reg_pmtu_pack(char *payload, u16 local_port,
+static inline void mlxsw_reg_pmtu_pack(char *payload, u8 local_port,
u16 new_mtu)
{
MLXSW_REG_ZERO(pmtu, payload);
@@ -4306,7 +4306,7 @@ enum mlxsw_reg_ptys_connector_type {
*/
MLXSW_ITEM32(reg, ptys, connector_type, 0x2C, 0, 4);
-static inline void mlxsw_reg_ptys_eth_pack(char *payload, u16 local_port,
+static inline void mlxsw_reg_ptys_eth_pack(char *payload, u8 local_port,
u32 proto_admin, bool autoneg)
{
MLXSW_REG_ZERO(ptys, payload);
@@ -4316,7 +4316,7 @@ static inline void mlxsw_reg_ptys_eth_pack(char *payload, u16 local_port,
mlxsw_reg_ptys_an_disable_admin_set(payload, !autoneg);
}
-static inline void mlxsw_reg_ptys_ext_eth_pack(char *payload, u16 local_port,
+static inline void mlxsw_reg_ptys_ext_eth_pack(char *payload, u8 local_port,
u32 proto_admin, bool autoneg)
{
MLXSW_REG_ZERO(ptys, payload);
@@ -4358,7 +4358,7 @@ static inline void mlxsw_reg_ptys_ext_eth_unpack(char *payload,
mlxsw_reg_ptys_ext_eth_proto_oper_get(payload);
}
-static inline void mlxsw_reg_ptys_ib_pack(char *payload, u16 local_port,
+static inline void mlxsw_reg_ptys_ib_pack(char *payload, u8 local_port,
u16 proto_admin, u16 link_width)
{
MLXSW_REG_ZERO(ptys, payload);
@@ -4416,7 +4416,7 @@ MLXSW_ITEM32(reg, ppad, local_port, 0x00, 16, 8);
MLXSW_ITEM_BUF(reg, ppad, mac, 0x02, 6);
static inline void mlxsw_reg_ppad_pack(char *payload, bool single_base_mac,
- u16 local_port)
+ u8 local_port)
{
MLXSW_REG_ZERO(ppad, payload);
mlxsw_reg_ppad_single_base_mac_set(payload, !!single_base_mac);
@@ -4490,7 +4490,7 @@ MLXSW_ITEM32(reg, paos, ee, 0x04, 30, 1);
*/
MLXSW_ITEM32(reg, paos, e, 0x04, 0, 2);
-static inline void mlxsw_reg_paos_pack(char *payload, u16 local_port,
+static inline void mlxsw_reg_paos_pack(char *payload, u8 local_port,
enum mlxsw_port_admin_status status)
{
MLXSW_REG_ZERO(paos, payload);
@@ -4633,7 +4633,7 @@ static inline void mlxsw_reg_pfcc_prio_pack(char *payload, u8 pfc_en)
mlxsw_reg_pfcc_pfcrx_set(payload, pfc_en);
}
-static inline void mlxsw_reg_pfcc_pack(char *payload, u16 local_port)
+static inline void mlxsw_reg_pfcc_pack(char *payload, u8 local_port)
{
MLXSW_REG_ZERO(pfcc, payload);
mlxsw_reg_pfcc_local_port_set(payload, local_port);
@@ -5132,7 +5132,7 @@ MLXSW_ITEM64(reg, ppcnt, tc_no_buffer_discard_uc,
MLXSW_ITEM64(reg, ppcnt, wred_discard,
MLXSW_REG_PPCNT_COUNTERS_OFFSET + 0x00, 0, 64);
-static inline void mlxsw_reg_ppcnt_pack(char *payload, u16 local_port,
+static inline void mlxsw_reg_ppcnt_pack(char *payload, u8 local_port,
enum mlxsw_reg_ppcnt_grp grp,
u8 prio_tc)
{
@@ -5243,7 +5243,7 @@ MLXSW_ITEM_BIT_ARRAY(reg, pptb, prio_to_buff_msb, 0x0C, 0x04, 4);
#define MLXSW_REG_PPTB_ALL_PRIO 0xFF
-static inline void mlxsw_reg_pptb_pack(char *payload, u16 local_port)
+static inline void mlxsw_reg_pptb_pack(char *payload, u8 local_port)
{
MLXSW_REG_ZERO(pptb, payload);
mlxsw_reg_pptb_mm_set(payload, MLXSW_REG_PPTB_MM_UM);
@@ -5340,7 +5340,7 @@ MLXSW_ITEM32_INDEXED(reg, pbmc, buf_xoff_threshold, 0x0C, 16, 16,
MLXSW_ITEM32_INDEXED(reg, pbmc, buf_xon_threshold, 0x0C, 0, 16,
0x08, 0x04, false);
-static inline void mlxsw_reg_pbmc_pack(char *payload, u16 local_port,
+static inline void mlxsw_reg_pbmc_pack(char *payload, u8 local_port,
u16 xoff_timer_value, u16 xoff_refresh)
{
MLXSW_REG_ZERO(pbmc, payload);
@@ -5398,7 +5398,7 @@ MLXSW_ITEM32(reg, pspa, local_port, 0x00, 16, 8);
*/
MLXSW_ITEM32(reg, pspa, sub_port, 0x00, 8, 8);
-static inline void mlxsw_reg_pspa_pack(char *payload, u8 swid, u16 local_port)
+static inline void mlxsw_reg_pspa_pack(char *payload, u8 swid, u8 local_port)
{
MLXSW_REG_ZERO(pspa, payload);
mlxsw_reg_pspa_swid_set(payload, swid);
@@ -5513,7 +5513,7 @@ MLXSW_ITEM32(reg, pplr, local_port, 0x00, 16, 8);
*/
MLXSW_ITEM32(reg, pplr, lb_en, 0x04, 0, 8);
-static inline void mlxsw_reg_pplr_pack(char *payload, u16 local_port,
+static inline void mlxsw_reg_pplr_pack(char *payload, u8 local_port,
bool phy_local)
{
MLXSW_REG_ZERO(pplr, payload);
@@ -5609,7 +5609,7 @@ MLXSW_ITEM32(reg, pddr, trblsh_group_opcode, 0x08, 0, 16);
*/
MLXSW_ITEM32(reg, pddr, trblsh_status_opcode, 0x0C, 0, 16);
-static inline void mlxsw_reg_pddr_pack(char *payload, u16 local_port,
+static inline void mlxsw_reg_pddr_pack(char *payload, u8 local_port,
u8 page_select)
{
MLXSW_REG_ZERO(pddr, payload);
@@ -9160,7 +9160,7 @@ MLXSW_ITEM32(reg, mpar, enable, 0x04, 31, 1);
*/
MLXSW_ITEM32(reg, mpar, pa_id, 0x04, 0, 4);
-static inline void mlxsw_reg_mpar_pack(char *payload, u16 local_port,
+static inline void mlxsw_reg_mpar_pack(char *payload, u8 local_port,
enum mlxsw_reg_mpar_i_e i_e,
bool enable, u8 pa_id)
{
@@ -9281,7 +9281,7 @@ MLXSW_ITEM32(reg, mlcr, beacon_duration, 0x04, 0, 16);
*/
MLXSW_ITEM32(reg, mlcr, beacon_remain, 0x08, 0, 16);
-static inline void mlxsw_reg_mlcr_pack(char *payload, u16 local_port,
+static inline void mlxsw_reg_mlcr_pack(char *payload, u8 local_port,
bool active)
{
MLXSW_REG_ZERO(mlcr, payload);
@@ -9671,7 +9671,7 @@ MLXSW_ITEM32(reg, mpsc, e, 0x04, 30, 1);
*/
MLXSW_ITEM32(reg, mpsc, rate, 0x08, 0, 32);
-static inline void mlxsw_reg_mpsc_pack(char *payload, u16 local_port, bool e,
+static inline void mlxsw_reg_mpsc_pack(char *payload, u8 local_port, bool e,
u32 rate)
{
MLXSW_REG_ZERO(mpsc, payload);
@@ -9904,7 +9904,7 @@ MLXSW_ITEM32(reg, momte, type, 0x04, 0, 8);
*/
MLXSW_ITEM_BIT_ARRAY(reg, momte, tclass_en, 0x08, 0x08, 1);
-static inline void mlxsw_reg_momte_pack(char *payload, u16 local_port,
+static inline void mlxsw_reg_momte_pack(char *payload, u8 local_port,
enum mlxsw_reg_momte_type type)
{
MLXSW_REG_ZERO(momte, payload);
@@ -10574,7 +10574,7 @@ MLXSW_ITEM32(reg, tnqdr, local_port, 0x00, 16, 8);
*/
MLXSW_ITEM32(reg, tnqdr, dscp, 0x04, 0, 6);
-static inline void mlxsw_reg_tnqdr_pack(char *payload, u16 local_port)
+static inline void mlxsw_reg_tnqdr_pack(char *payload, u8 local_port)
{
MLXSW_REG_ZERO(tnqdr, payload);
mlxsw_reg_tnqdr_local_port_set(payload, local_port);
@@ -10963,7 +10963,7 @@ MLXSW_ITEM32(reg, sbcm, max_buff, 0x1C, 0, 24);
*/
MLXSW_ITEM32(reg, sbcm, pool, 0x24, 0, 4);
-static inline void mlxsw_reg_sbcm_pack(char *payload, u16 local_port, u8 pg_buff,
+static inline void mlxsw_reg_sbcm_pack(char *payload, u8 local_port, u8 pg_buff,
enum mlxsw_reg_sbxx_dir dir,
u32 min_buff, u32 max_buff,
bool infi_max, u8 pool)
@@ -11049,7 +11049,7 @@ MLXSW_ITEM32(reg, sbpm, min_buff, 0x18, 0, 24);
*/
MLXSW_ITEM32(reg, sbpm, max_buff, 0x1C, 0, 24);
-static inline void mlxsw_reg_sbpm_pack(char *payload, u16 local_port, u8 pool,
+static inline void mlxsw_reg_sbpm_pack(char *payload, u8 local_port, u8 pool,
enum mlxsw_reg_sbxx_dir dir, bool clr,
u32 min_buff, u32 max_buff)
{
@@ -11244,7 +11244,7 @@ MLXSW_ITEM32(reg, sbib, local_port, 0x00, 16, 8);
*/
MLXSW_ITEM32(reg, sbib, buff_size, 0x08, 0, 24);
-static inline void mlxsw_reg_sbib_pack(char *payload, u16 local_port,
+static inline void mlxsw_reg_sbib_pack(char *payload, u8 local_port,
u32 buff_size)
{
MLXSW_REG_ZERO(sbib, payload);
--
2.14.1

26
platform/mellanox/non-upstream-patches/patches/0098-2-Revert-mlxsw-i2c-Fix-chunk-size-setting.patch Normal file
View File

@@ -0,0 +1,26 @@
From 0dda3bcede5f26c2bd44edbd90c7e9f0aab9ccf0 Mon Sep 17 00:00:00 2001
From: Ciju Rajan K <crajank@nvidia.com>
Date: Thu, 17 Aug 2023 10:00:59 +0000
Subject: Revert "mlxsw: i2c: Fix chunk size setting in output mailbox buffer"
This reverts commit ac91378962238d34030bb4035308f88ba173165f.
---
drivers/net/ethernet/mellanox/mlxsw/i2c.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/mellanox/mlxsw/i2c.c b/drivers/net/ethernet/mellanox/mlxsw/i2c.c
index cc99ec3f4e96..b8a5c0cbb6b5 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/i2c.c
+++ b/drivers/net/ethernet/mellanox/mlxsw/i2c.c
@@ -447,7 +447,7 @@ mlxsw_i2c_cmd(struct device *dev, u16 opcode, u32 in_mod, size_t in_mbox_size,
} else {
/* No input mailbox is case of initialization query command. */
reg_size = MLXSW_I2C_MAX_DATA_SIZE;
- num = DIV_ROUND_UP(reg_size, mlxsw_i2c->block_size);
+ num = reg_size / mlxsw_i2c->block_size;
if (mutex_lock_interruptible(&mlxsw_i2c->cmd.lock) < 0) {
dev_err(&client->dev, "Could not acquire lock");
--
2.14.1

28
platform/mellanox/non-upstream-patches/patches/0098-3-Revert-mlxsw-core_hwmon-Adjust-module-label-names.patch Normal file
View File

@@ -0,0 +1,28 @@
From e0f5c6c6572fd70ad8fa0d268ee95fb8aba1bd98 Mon Sep 17 00:00:00 2001
From: Ciju Rajan K <crajank@nvidia.com>
Date: Thu, 17 Aug 2023 10:01:22 +0000
Subject: Revert "mlxsw: core_hwmon: Adjust module label names based on MTCAP
sensor counter"
This reverts commit 33aa62a331425d5828d417eeac7fab697eb45286.
---
drivers/net/ethernet/mellanox/mlxsw/core_hwmon.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/mellanox/mlxsw/core_hwmon.c b/drivers/net/ethernet/mellanox/mlxsw/core_hwmon.c
index 464787b10b73..d41afdfbd085 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/core_hwmon.c
+++ b/drivers/net/ethernet/mellanox/mlxsw/core_hwmon.c
@@ -377,8 +377,7 @@ mlxsw_hwmon_module_temp_label_show(struct device *dev,
container_of(attr, struct mlxsw_hwmon_attr, dev_attr);
return sprintf(buf, "front panel %03u\n",
- mlwsw_hwmon_attr->type_index + 1 -
- mlwsw_hwmon_attr->hwmon->sensor_count);
+ mlwsw_hwmon_attr->type_index);
}
static ssize_t
--
2.14.1

9
platform/mellanox/non-upstream-patches/patches/0099-mlxsw-core_hwmon-Fix-variable-names-for-hwmon-attrib.patch
View File

@@ -1,7 +1,8 @@
From 45dc72bca025600611d6d08e00758618ddb5d7d0 Mon Sep 17 00:00:00 2001
From 320a964b80a8f9245da0515a26c2d41e035b3d10 Mon Sep 17 00:00:00 2001
From: Vadim Pasternak <vadimp@nvidia.com>
Date: Fri, 3 Dec 2021 11:48:41 +0200
Subject: [PATCH] mlxsw: core_hwmon: Fix variable names for hwmon attributes
Subject: [PATCH backport 5.10 099/182] mlxsw: core_hwmon: Fix variable names
for hwmon attributes
Replace all local variables 'mlwsw_hwmon_attr' by 'mlxsw_hwmon_attr'.
All variable prefixes should start with 'mlxsw' according to the naming
@@ -15,7 +16,7 @@ Signed-off-by: Ido Schimmel <idosch@nvidia.com>
1 file changed, 38 insertions(+), 38 deletions(-)
diff --git a/drivers/net/ethernet/mellanox/mlxsw/core_hwmon.c b/drivers/net/ethernet/mellanox/mlxsw/core_hwmon.c
index d41afdfbd..3788d02b5 100644
index d41afdfbd085..3788d02b5244 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/core_hwmon.c
+++ b/drivers/net/ethernet/mellanox/mlxsw/core_hwmon.c
@@ -57,14 +57,14 @@ static ssize_t mlxsw_hwmon_temp_show(struct device *dev,
@@ -251,5 +252,5 @@ index d41afdfbd..3788d02b5 100644
return sprintf(buf, "gearbox %03u\n", index);
--
2.30.2
2.20.1

26
platform/mellanox/non-upstream-patches/patches/0100-mlxsw-core_thermal-Rename-labels-according-to-naming.patch
View File

@@ -1,8 +1,8 @@
From d2d0080ec104f01fbf0d6b4750f70f1ebe013495 Mon Sep 17 00:00:00 2001
From 2f12c9f7cd1d91732ee64d11611cc4cb6baf69a6 Mon Sep 17 00:00:00 2001
From: Vadim Pasternak <vadimp@nvidia.com>
Date: Fri, 3 Dec 2021 11:48:42 +0200
Subject: [PATCH] mlxsw: core_thermal: Rename labels according to naming
convention
Subject: [PATCH backport 5.10 100/182] mlxsw: core_thermal: Rename labels
according to naming convention
Rename labels for error flow handling in order to align with naming
convention used in rest of 'mlxsw' code.
@@ -15,10 +15,10 @@ Signed-off-by: Ido Schimmel <idosch@nvidia.com>
1 file changed, 23 insertions(+), 20 deletions(-)
diff --git a/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c b/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c
index cc4cddbdb..e5997b6a0 100644
index 91abc7a3f7ea..f471f03e0094 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c
+++ b/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c
@@ -401,11 +401,11 @@ static int mlxsw_thermal_module_bind(struct thermal_zone_device *tzdev,
@@ -393,11 +393,11 @@ static int mlxsw_thermal_module_bind(struct thermal_zone_device *tzdev,
trip->min_state,
THERMAL_WEIGHT_DEFAULT);
if (err < 0)
@@ -32,7 +32,7 @@ index cc4cddbdb..e5997b6a0 100644
for (j = i - 1; j >= 0; j--)
thermal_zone_unbind_cooling_device(tzdev, j, cdev);
return err;
@@ -807,7 +807,7 @@ mlxsw_thermal_modules_init(struct device *dev, struct mlxsw_core *core,
@@ -766,7 +766,7 @@ mlxsw_thermal_modules_init(struct device *dev, struct mlxsw_core *core,
for (i = 0; i < thermal->tz_module_num; i++) {
err = mlxsw_thermal_module_init(dev, core, thermal, i);
if (err)
@@ -41,7 +41,7 @@ index cc4cddbdb..e5997b6a0 100644
}
for (i = 0; i < thermal->tz_module_num; i++) {
@@ -816,12 +816,13 @@ mlxsw_thermal_modules_init(struct device *dev, struct mlxsw_core *core,
@@ -775,12 +775,13 @@ mlxsw_thermal_modules_init(struct device *dev, struct mlxsw_core *core,
continue;
err = mlxsw_thermal_module_tz_init(module_tz);
if (err)
@@ -57,7 +57,7 @@ index cc4cddbdb..e5997b6a0 100644
for (i = thermal->tz_module_num - 1; i >= 0; i--)
mlxsw_thermal_module_fini(&thermal->tz_module_arr[i]);
kfree(thermal->tz_module_arr);
@@ -912,12 +913,12 @@ mlxsw_thermal_gearboxes_init(struct device *dev, struct mlxsw_core *core,
@@ -871,12 +872,12 @@ mlxsw_thermal_gearboxes_init(struct device *dev, struct mlxsw_core *core,
gearbox_tz->parent = thermal;
err = mlxsw_thermal_gearbox_tz_init(gearbox_tz);
if (err)
@@ -72,7 +72,7 @@ index cc4cddbdb..e5997b6a0 100644
for (i--; i >= 0; i--)
mlxsw_thermal_gearbox_tz_fini(&thermal->tz_gearbox_arr[i]);
kfree(thermal->tz_gearbox_arr);
@@ -961,7 +962,7 @@ int mlxsw_thermal_init(struct mlxsw_core *core,
@@ -920,7 +921,7 @@ int mlxsw_thermal_init(struct mlxsw_core *core,
err = mlxsw_reg_query(thermal->core, MLXSW_REG(mfcr), mfcr_pl);
if (err) {
dev_err(dev, "Failed to probe PWMs\n");
@@ -81,7 +81,7 @@ index cc4cddbdb..e5997b6a0 100644
}
mlxsw_reg_mfcr_unpack(mfcr_pl, &freq, &tacho_active, &pwm_active);
@@ -975,14 +976,14 @@ int mlxsw_thermal_init(struct mlxsw_core *core,
@@ -934,14 +935,14 @@ int mlxsw_thermal_init(struct mlxsw_core *core,
err = mlxsw_reg_query(thermal->core, MLXSW_REG(mfsl),
mfsl_pl);
if (err)
@@ -98,7 +98,7 @@ index cc4cddbdb..e5997b6a0 100644
}
}
for (i = 0; i < MLXSW_MFCR_PWMS_MAX; i++) {
@@ -995,7 +996,7 @@ int mlxsw_thermal_init(struct mlxsw_core *core,
@@ -954,7 +955,7 @@ int mlxsw_thermal_init(struct mlxsw_core *core,
if (IS_ERR(cdev)) {
err = PTR_ERR(cdev);
dev_err(dev, "Failed to register cooling device\n");
@@ -107,7 +107,7 @@ index cc4cddbdb..e5997b6a0 100644
}
thermal->cdevs[i] = cdev;
}
@@ -1020,38 +1021,40 @@ int mlxsw_thermal_init(struct mlxsw_core *core,
@@ -978,38 +979,40 @@ int mlxsw_thermal_init(struct mlxsw_core *core,
if (IS_ERR(thermal->tzdev)) {
err = PTR_ERR(thermal->tzdev);
dev_err(dev, "Failed to register thermal zone\n");
@@ -158,5 +158,5 @@ index cc4cddbdb..e5997b6a0 100644
return err;
}
--
2.30.2
2.20.1

23
platform/mellanox/non-upstream-patches/patches/0101-mlxsw-core_thermal-Remove-obsolete-API-for-query-res.patch
View File

@@ -1,7 +1,8 @@
From 1186332d9cbf3f7cbd2ed52dfcb594ce4e2d2df8 Mon Sep 17 00:00:00 2001
From d0a94e237cb6d2020a0a1c27f357a9c3bfc0b1d5 Mon Sep 17 00:00:00 2001
From: Vadim Pasternak <vadimp@nvidia.com>
Date: Fri, 3 Dec 2021 11:48:43 +0200
Subject: [PATCH] mlxsw: core_thermal: Remove obsolete API for query resource
Subject: [PATCH backport 5.10 101/182] mlxsw: core_thermal: Remove obsolete
API for query resource
Remove obsolete API mlxsw_core_res_query_enabled(), which is only
relevant for end-of-life SwitchX-2 ASICs. Support for these ASICs was
@@ -18,7 +19,7 @@ Signed-off-by: Ido Schimmel <idosch@nvidia.com>
4 files changed, 23 deletions(-)
diff --git a/drivers/net/ethernet/mellanox/mlxsw/core.c b/drivers/net/ethernet/mellanox/mlxsw/core.c
index 7938bad70..0b1888318 100644
index 7938bad70e37..0b1888318ef1 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/core.c
+++ b/drivers/net/ethernet/mellanox/mlxsw/core.c
@@ -129,12 +129,6 @@ void *mlxsw_core_driver_priv(struct mlxsw_core *mlxsw_core)
@@ -35,7 +36,7 @@ index 7938bad70..0b1888318 100644
{
return mlxsw_core->driver->temp_warn_enabled;
diff --git a/drivers/net/ethernet/mellanox/mlxsw/core.h b/drivers/net/ethernet/mellanox/mlxsw/core.h
index 56efb8e48..0ceb7dae9 100644
index 56efb8e48022..0ceb7dae95f6 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/core.h
+++ b/drivers/net/ethernet/mellanox/mlxsw/core.h
@@ -30,8 +30,6 @@ unsigned int mlxsw_core_max_ports(const struct mlxsw_core *mlxsw_core);
@@ -48,7 +49,7 @@ index 56efb8e48..0ceb7dae9 100644
bool
diff --git a/drivers/net/ethernet/mellanox/mlxsw/core_hwmon.c b/drivers/net/ethernet/mellanox/mlxsw/core_hwmon.c
index 3788d02b5..8b170ad92 100644
index 3788d02b5244..8b170ad92302 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/core_hwmon.c
+++ b/drivers/net/ethernet/mellanox/mlxsw/core_hwmon.c
@@ -655,9 +655,6 @@ static int mlxsw_hwmon_module_init(struct mlxsw_hwmon *mlxsw_hwmon)
@@ -62,10 +63,10 @@ index 3788d02b5..8b170ad92 100644
err = mlxsw_reg_query(mlxsw_hwmon->core, MLXSW_REG(mgpir), mgpir_pl);
if (err)
diff --git a/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c b/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c
index e5997b6a0..9b0cd6f79 100644
index f471f03e0094..80942c78d9e5 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c
+++ b/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c
@@ -787,9 +787,6 @@ mlxsw_thermal_modules_init(struct device *dev, struct mlxsw_core *core,
@@ -746,9 +746,6 @@ mlxsw_thermal_modules_init(struct device *dev, struct mlxsw_core *core,
char mgpir_pl[MLXSW_REG_MGPIR_LEN];
int i, err;
@@ -75,7 +76,7 @@ index e5997b6a0..9b0cd6f79 100644
mlxsw_reg_mgpir_pack(mgpir_pl);
err = mlxsw_reg_query(core, MLXSW_REG(mgpir), mgpir_pl);
if (err)
@@ -834,9 +831,6 @@ mlxsw_thermal_modules_fini(struct mlxsw_thermal *thermal)
@@ -793,9 +790,6 @@ mlxsw_thermal_modules_fini(struct mlxsw_thermal *thermal)
{
int i;
@@ -85,7 +86,7 @@ index e5997b6a0..9b0cd6f79 100644
for (i = thermal->tz_module_num - 1; i >= 0; i--)
mlxsw_thermal_module_fini(&thermal->tz_module_arr[i]);
kfree(thermal->tz_module_arr);
@@ -884,9 +878,6 @@ mlxsw_thermal_gearboxes_init(struct device *dev, struct mlxsw_core *core,
@@ -843,9 +837,6 @@ mlxsw_thermal_gearboxes_init(struct device *dev, struct mlxsw_core *core,
int i;
int err;
@@ -95,7 +96,7 @@ index e5997b6a0..9b0cd6f79 100644
mlxsw_reg_mgpir_pack(mgpir_pl);
err = mlxsw_reg_query(core, MLXSW_REG(mgpir), mgpir_pl);
if (err)
@@ -930,9 +921,6 @@ mlxsw_thermal_gearboxes_fini(struct mlxsw_thermal *thermal)
@@ -889,9 +880,6 @@ mlxsw_thermal_gearboxes_fini(struct mlxsw_thermal *thermal)
{
int i;
@@ -106,5 +107,5 @@ index e5997b6a0..9b0cd6f79 100644
mlxsw_thermal_gearbox_tz_fini(&thermal->tz_gearbox_arr[i]);
kfree(thermal->tz_gearbox_arr);
--
2.30.2
2.20.1

11
platform/mellanox/non-upstream-patches/patches/0102-mlxsw-reg-Add-mgpir_-prefix-to-MGPIR-fields-comments.patch
View File

@@ -1,7 +1,8 @@
From ad972c6b6591023ddc7547bbcbc5c5e1941b29c5 Mon Sep 17 00:00:00 2001
From 2e6cd3d593c0bf1cc38093a73ec7777a5b806bfe Mon Sep 17 00:00:00 2001
From: Vadim Pasternak <vadimp@nvidia.com>
Date: Fri, 3 Dec 2021 11:48:44 +0200
Subject: [PATCH] mlxsw: reg: Add "mgpir_" prefix to MGPIR fields comments
Subject: [PATCH backport 5.10 102/182] mlxsw: reg: Add "mgpir_" prefix to
MGPIR fields comments
Do the same as for other registers and have "mgpir_" prefix for the
MGPIR fields.
@@ -14,10 +15,10 @@ Signed-off-by: Ido Schimmel <idosch@nvidia.com>
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/net/ethernet/mellanox/mlxsw/reg.h b/drivers/net/ethernet/mellanox/mlxsw/reg.h
index a9119451d..7f7cdb3fc 100644
index 7f9b902049db..c3fb2e4d4458 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/reg.h
+++ b/drivers/net/ethernet/mellanox/mlxsw/reg.h
@@ -10131,24 +10131,24 @@ enum mlxsw_reg_mgpir_device_type {
@@ -10130,24 +10130,24 @@ enum mlxsw_reg_mgpir_device_type {
MLXSW_REG_MGPIR_DEVICE_TYPE_GEARBOX_DIE,
};
@@ -47,5 +48,5 @@ index a9119451d..7f7cdb3fc 100644
* Access: RO
*/
--
2.30.2
2.20.1

24
platform/mellanox/non-upstream-patches/patches/0103-mlxsw-core-Remove-unnecessary-asserts.patch
View File

@@ -1,7 +1,7 @@
From 4392d92a40328fe18d1152fae6fada74f46fa1a3 Mon Sep 17 00:00:00 2001
From 7b7f5f88374c3377fc28e48a0bc77ae4aa783fda Mon Sep 17 00:00:00 2001
From: Vadim Pasternak <vadimp@nvidia.com>
Date: Tue, 7 Dec 2021 16:07:31 +0200
Subject: [PATCH] mlxsw: core: Remove unnecessary asserts
Subject: [PATCH backport 5.10 103/182] mlxsw: core: Remove unnecessary asserts
Remove unnecessary asserts for module index validation. Leave only one
that is actually necessary in mlxsw_env_pmpe_listener_func() where the
@@ -14,10 +14,10 @@ Signed-off-by: Ido Schimmel <idosch@nvidia.com>
1 file changed, 24 deletions(-)
diff --git a/drivers/net/ethernet/mellanox/mlxsw/core_env.c b/drivers/net/ethernet/mellanox/mlxsw/core_env.c
index 61f7a40c0..4cbed2e3b 100644
index 6dd4ae2f45f4..c1d51b4b6b36 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/core_env.c
+++ b/drivers/net/ethernet/mellanox/mlxsw/core_env.c
@@ -416,9 +416,6 @@ int mlxsw_env_reset_module(struct net_device *netdev,
@@ -414,9 +414,6 @@ int mlxsw_env_reset_module(struct net_device *netdev,
!(req & (ETH_RESET_PHY << ETH_RESET_SHARED_SHIFT)))
return 0;
@@ -27,7 +27,7 @@ index 61f7a40c0..4cbed2e3b 100644
mutex_lock(&mlxsw_env->module_info_lock);
if (mlxsw_env->module_info[module].num_ports_up) {
@@ -458,9 +455,6 @@ mlxsw_env_get_module_power_mode(struct mlxsw_core *mlxsw_core, u8 module,
@@ -456,9 +453,6 @@ mlxsw_env_get_module_power_mode(struct mlxsw_core *mlxsw_core, u8 module,
u32 status_bits;
int err;
@@ -37,7 +37,7 @@ index 61f7a40c0..4cbed2e3b 100644
mutex_lock(&mlxsw_env->module_info_lock);
params->policy = mlxsw_env->module_info[module].power_mode_policy;
@@ -562,9 +556,6 @@ mlxsw_env_set_module_power_mode(struct mlxsw_core *mlxsw_core, u8 module,
@@ -560,9 +554,6 @@ mlxsw_env_set_module_power_mode(struct mlxsw_core *mlxsw_core, u8 module,
bool low_power;
int err = 0;
@@ -47,7 +47,7 @@ index 61f7a40c0..4cbed2e3b 100644
if (policy != ETHTOOL_MODULE_POWER_MODE_POLICY_HIGH &&
policy != ETHTOOL_MODULE_POWER_MODE_POLICY_AUTO) {
NL_SET_ERR_MSG_MOD(extack, "Unsupported power mode policy");
@@ -903,9 +894,6 @@ mlxsw_env_module_overheat_counter_get(struct mlxsw_core *mlxsw_core, u8 module,
@@ -901,9 +892,6 @@ mlxsw_env_module_overheat_counter_get(struct mlxsw_core *mlxsw_core, u8 module,
{
struct mlxsw_env *mlxsw_env = mlxsw_core_env(mlxsw_core);
@@ -57,7 +57,7 @@ index 61f7a40c0..4cbed2e3b 100644
mutex_lock(&mlxsw_env->module_info_lock);
*p_counter = mlxsw_env->module_info[module].module_overheat_counter;
mutex_unlock(&mlxsw_env->module_info_lock);
@@ -918,9 +906,6 @@ void mlxsw_env_module_port_map(struct mlxsw_core *mlxsw_core, u8 module)
@@ -916,9 +904,6 @@ void mlxsw_env_module_port_map(struct mlxsw_core *mlxsw_core, u8 module)
{
struct mlxsw_env *mlxsw_env = mlxsw_core_env(mlxsw_core);
@@ -67,7 +67,7 @@ index 61f7a40c0..4cbed2e3b 100644
mutex_lock(&mlxsw_env->module_info_lock);
mlxsw_env->module_info[module].num_ports_mapped++;
mutex_unlock(&mlxsw_env->module_info_lock);
@@ -931,9 +916,6 @@ void mlxsw_env_module_port_unmap(struct mlxsw_core *mlxsw_core, u8 module)
@@ -929,9 +914,6 @@ void mlxsw_env_module_port_unmap(struct mlxsw_core *mlxsw_core, u8 module)
{
struct mlxsw_env *mlxsw_env = mlxsw_core_env(mlxsw_core);
@@ -77,7 +77,7 @@ index 61f7a40c0..4cbed2e3b 100644
mutex_lock(&mlxsw_env->module_info_lock);
mlxsw_env->module_info[module].num_ports_mapped--;
mutex_unlock(&mlxsw_env->module_info_lock);
@@ -945,9 +927,6 @@ int mlxsw_env_module_port_up(struct mlxsw_core *mlxsw_core, u8 module)
@@ -943,9 +925,6 @@ int mlxsw_env_module_port_up(struct mlxsw_core *mlxsw_core, u8 module)
struct mlxsw_env *mlxsw_env = mlxsw_core_env(mlxsw_core);
int err = 0;
@@ -87,7 +87,7 @@ index 61f7a40c0..4cbed2e3b 100644
mutex_lock(&mlxsw_env->module_info_lock);
if (mlxsw_env->module_info[module].power_mode_policy !=
@@ -977,9 +956,6 @@ void mlxsw_env_module_port_down(struct mlxsw_core *mlxsw_core, u8 module)
@@ -975,9 +954,6 @@ void mlxsw_env_module_port_down(struct mlxsw_core *mlxsw_core, u8 module)
{
struct mlxsw_env *mlxsw_env = mlxsw_core_env(mlxsw_core);
@@ -98,5 +98,5 @@ index 61f7a40c0..4cbed2e3b 100644
mlxsw_env->module_info[module].num_ports_up--;
--
2.30.2
2.20.1

23
platform/mellanox/non-upstream-patches/patches/0104-mlxsw-reg-Extend-MTMP-register-with-new-slot-number-.patch
View File

@@ -1,7 +1,8 @@
From 5c2fb60aa437b4858f15bb8bfb02d9df43b4dd95 Mon Sep 17 00:00:00 2001
From 58426cf3ccba63cbc0b9ddc2abfc1173ca8ba368 Mon Sep 17 00:00:00 2001
From: Vadim Pasternak <vadimp@nvidia.com>
Date: Fri, 3 Dec 2021 11:48:45 +0200
Subject: [PATCH] mlxsw: reg: Extend MTMP register with new slot number field
Subject: [PATCH backport 5.10 104/182] mlxsw: reg: Extend MTMP register with
new slot number field
Extend MTMP (Management Temperature Register) with new field specifying
the slot index. The purpose of this field is to support access to MTMP
@@ -23,10 +24,10 @@ Signed-off-by: Ido Schimmel <idosch@nvidia.com>
4 files changed, 19 insertions(+), 11 deletions(-)
diff --git a/drivers/net/ethernet/mellanox/mlxsw/core_env.c b/drivers/net/ethernet/mellanox/mlxsw/core_env.c
index 4cbed2e3b..0b43029b2 100644
index c1d51b4b6b36..32faedfd2ea8 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/core_env.c
+++ b/drivers/net/ethernet/mellanox/mlxsw/core_env.c
@@ -143,7 +143,7 @@ int mlxsw_env_module_temp_thresholds_get(struct mlxsw_core *core, int module,
@@ -142,7 +142,7 @@ int mlxsw_env_module_temp_thresholds_get(struct mlxsw_core *core, int module,
int page;
int err;
@@ -36,7 +37,7 @@ index 4cbed2e3b..0b43029b2 100644
err = mlxsw_reg_query(core, MLXSW_REG(mtmp), mtmp_pl);
if (err)
diff --git a/drivers/net/ethernet/mellanox/mlxsw/core_hwmon.c b/drivers/net/ethernet/mellanox/mlxsw/core_hwmon.c
index 8b170ad92..71ca3b561 100644
index 8b170ad92302..71ca3b561e62 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/core_hwmon.c
+++ b/drivers/net/ethernet/mellanox/mlxsw/core_hwmon.c
@@ -66,7 +66,7 @@ static ssize_t mlxsw_hwmon_temp_show(struct device *dev,
@@ -79,10 +80,10 @@ index 8b170ad92..71ca3b561 100644
MLXSW_REG(mtmp), mtmp_pl);
if (err) {
diff --git a/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c b/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c
index 9b0cd6f79..8d88633c9 100644
index 80942c78d9e5..f4f0f8ce8597 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c
+++ b/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c
@@ -280,7 +280,7 @@ static int mlxsw_thermal_get_temp(struct thermal_zone_device *tzdev,
@@ -272,7 +272,7 @@ static int mlxsw_thermal_get_temp(struct thermal_zone_device *tzdev,
int temp;
int err;
@@ -91,7 +92,7 @@ index 9b0cd6f79..8d88633c9 100644
err = mlxsw_reg_query(thermal->core, MLXSW_REG(mtmp), mtmp_pl);
if (err) {
@@ -440,7 +440,7 @@ mlxsw_thermal_module_temp_and_thresholds_get(struct mlxsw_core *core,
@@ -432,7 +432,7 @@ mlxsw_thermal_module_temp_and_thresholds_get(struct mlxsw_core *core,
int err;
/* Read module temperature and thresholds. */
@@ -100,7 +101,7 @@ index 9b0cd6f79..8d88633c9 100644
err = mlxsw_reg_query(core, MLXSW_REG(mtmp), mtmp_pl);
if (err) {
/* Set temperature and thresholds to zero to avoid passing
@@ -585,7 +585,7 @@ static int mlxsw_thermal_gearbox_temp_get(struct thermal_zone_device *tzdev,
@@ -577,7 +577,7 @@ static int mlxsw_thermal_gearbox_temp_get(struct thermal_zone_device *tzdev,
int err;
index = MLXSW_REG_MTMP_GBOX_INDEX_MIN + tz->module;
@@ -110,7 +111,7 @@ index 9b0cd6f79..8d88633c9 100644
err = mlxsw_reg_query(thermal->core, MLXSW_REG(mtmp), mtmp_pl);
if (err)
diff --git a/drivers/net/ethernet/mellanox/mlxsw/reg.h b/drivers/net/ethernet/mellanox/mlxsw/reg.h
index 7f7cdb3fc..52cb58c6d 100644
index c3fb2e4d4458..0428904b99d2 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/reg.h
+++ b/drivers/net/ethernet/mellanox/mlxsw/reg.h
@@ -8541,6 +8541,12 @@ MLXSW_ITEM32(reg, mtcap, sensor_count, 0x00, 0, 7);
@@ -142,5 +143,5 @@ index 7f7cdb3fc..52cb58c6d 100644
mlxsw_reg_mtmp_mte_set(payload, max_temp_enable);
mlxsw_reg_mtmp_mtr_set(payload, max_temp_reset);
--
2.30.2
2.20.1

15
platform/mellanox/non-upstream-patches/patches/0105-mlxsw-reg-Extend-MTBR-register-with-new-slot-number-.patch
View File

@@ -1,7 +1,8 @@
From c9c0ae28ab85836ee15920ddafaa3ba45e0dcaeb Mon Sep 17 00:00:00 2001
From c9c07da3e3dadf102a25e27f49d0ce4f414c096c Mon Sep 17 00:00:00 2001
From: Vadim Pasternak <vadimp@nvidia.com>
Date: Fri, 3 Dec 2021 11:48:46 +0200
Subject: [PATCH] mlxsw: reg: Extend MTBR register with new slot number field
Subject: [PATCH backport 5.10 105/182] mlxsw: reg: Extend MTBR register with
new slot number field
Extend MTBR (Management Temperature Bulk Register) with new field
specifying the slot number. The purpose of this field is to support
@@ -22,10 +23,10 @@ Signed-off-by: Ido Schimmel <idosch@nvidia.com>
3 files changed, 13 insertions(+), 6 deletions(-)
diff --git a/drivers/net/ethernet/mellanox/mlxsw/core_env.c b/drivers/net/ethernet/mellanox/mlxsw/core_env.c
index 0b43029b2..7feefb38b 100644
index 32faedfd2ea8..c2aa05be5bcc 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/core_env.c
+++ b/drivers/net/ethernet/mellanox/mlxsw/core_env.c
@@ -593,8 +593,8 @@ static int mlxsw_env_module_has_temp_sensor(struct mlxsw_core *mlxsw_core,
@@ -591,8 +591,8 @@ static int mlxsw_env_module_has_temp_sensor(struct mlxsw_core *mlxsw_core,
u16 temp;
int err;
@@ -37,7 +38,7 @@ index 0b43029b2..7feefb38b 100644
if (err)
return err;
diff --git a/drivers/net/ethernet/mellanox/mlxsw/core_hwmon.c b/drivers/net/ethernet/mellanox/mlxsw/core_hwmon.c
index 71ca3b561..f4bc711a1 100644
index 71ca3b561e62..f4bc711a16cf 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/core_hwmon.c
+++ b/drivers/net/ethernet/mellanox/mlxsw/core_hwmon.c
@@ -271,8 +271,8 @@ static ssize_t mlxsw_hwmon_module_temp_fault_show(struct device *dev,
@@ -52,7 +53,7 @@ index 71ca3b561..f4bc711a1 100644
if (err) {
dev_err(dev, "Failed to query module temperature sensor\n");
diff --git a/drivers/net/ethernet/mellanox/mlxsw/reg.h b/drivers/net/ethernet/mellanox/mlxsw/reg.h
index 52cb58c6d..56927c772 100644
index 0428904b99d2..df210bd9a29c 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/reg.h
+++ b/drivers/net/ethernet/mellanox/mlxsw/reg.h
@@ -8707,6 +8707,12 @@ MLXSW_ITEM_BIT_ARRAY(reg, mtwe, sensor_warning, 0x0, 0x10, 1);
@@ -83,5 +84,5 @@ index 52cb58c6d..56927c772 100644
mlxsw_reg_mtbr_num_rec_set(payload, num_rec);
}
--
2.30.2
2.20.1

19
platform/mellanox/non-upstream-patches/patches/0106-mlxsw-reg-Extend-MCIA-register-with-new-slot-number-.patch
View File

@@ -1,7 +1,8 @@
From d494bb0c59dd1f6150f189e2878babf53b67e111 Mon Sep 17 00:00:00 2001
From 4f10b61f33bdaee774b31b7fe37a76058b755561 Mon Sep 17 00:00:00 2001
From: Vadim Pasternak <vadimp@nvidia.com>
Date: Fri, 3 Dec 2021 11:48:47 +0200
Subject: [PATCH] mlxsw: reg: Extend MCIA register with new slot number field
Subject: [PATCH backport 5.10 106/182] mlxsw: reg: Extend MCIA register with
new slot number field
Extend MCIA (Management Cable Info Access Register) with new field
specifying the slot number. The purpose of this field is to support
@@ -21,7 +22,7 @@ Signed-off-by: Ido Schimmel <idosch@nvidia.com>
2 files changed, 18 insertions(+), 9 deletions(-)
diff --git a/drivers/net/ethernet/mellanox/mlxsw/core_env.c b/drivers/net/ethernet/mellanox/mlxsw/core_env.c
index 7feefb38b..21eacbe0a 100644
index c2aa05be5bcc..a516c04ad19b 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/core_env.c
+++ b/drivers/net/ethernet/mellanox/mlxsw/core_env.c
@@ -35,8 +35,8 @@ static int mlxsw_env_validate_cable_ident(struct mlxsw_core *core, int id,
@@ -35,7 +36,7 @@ index 7feefb38b..21eacbe0a 100644
err = mlxsw_reg_query(core, MLXSW_REG(mcia), mcia_pl);
if (err)
return err;
@@ -111,7 +111,8 @@ mlxsw_env_query_module_eeprom(struct mlxsw_core *mlxsw_core, int module,
@@ -110,7 +110,8 @@ mlxsw_env_query_module_eeprom(struct mlxsw_core *mlxsw_core, int module,
}
}
@@ -45,7 +46,7 @@ index 7feefb38b..21eacbe0a 100644
err = mlxsw_reg_query(mlxsw_core, MLXSW_REG(mcia), mcia_pl);
if (err)
@@ -185,12 +186,12 @@ int mlxsw_env_module_temp_thresholds_get(struct mlxsw_core *core, int module,
@@ -184,12 +185,12 @@ int mlxsw_env_module_temp_thresholds_get(struct mlxsw_core *core, int module,
page = MLXSW_REG_MCIA_TH_PAGE_CMIS_NUM;
else
page = MLXSW_REG_MCIA_TH_PAGE_NUM;
@@ -60,7 +61,7 @@ index 7feefb38b..21eacbe0a 100644
MLXSW_REG_MCIA_PAGE0_LO,
off, MLXSW_REG_MCIA_TH_ITEM_SIZE,
MLXSW_REG_MCIA_I2C_ADDR_HIGH);
@@ -371,7 +372,7 @@ mlxsw_env_get_module_eeprom_by_page(struct mlxsw_core *mlxsw_core, u8 module,
@@ -369,7 +370,7 @@ mlxsw_env_get_module_eeprom_by_page(struct mlxsw_core *mlxsw_core, u8 module,
size = min_t(u8, page->length - bytes_read,
MLXSW_REG_MCIA_EEPROM_SIZE);
@@ -70,7 +71,7 @@ index 7feefb38b..21eacbe0a 100644
page->i2c_address);
mlxsw_reg_mcia_bank_number_set(mcia_pl, page->bank);
diff --git a/drivers/net/ethernet/mellanox/mlxsw/reg.h b/drivers/net/ethernet/mellanox/mlxsw/reg.h
index 56927c772..2714e316c 100644
index df210bd9a29c..bdbe198a9053 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/reg.h
+++ b/drivers/net/ethernet/mellanox/mlxsw/reg.h
@@ -8798,6 +8798,12 @@ MLXSW_ITEM32(reg, mcia, l, 0x00, 31, 1);
@@ -86,7 +87,7 @@ index 56927c772..2714e316c 100644
enum {
MLXSW_REG_MCIA_STATUS_GOOD = 0,
/* No response from module's EEPROM. */
@@ -8897,11 +8903,13 @@ MLXSW_ITEM_BUF(reg, mcia, eeprom, 0x10, MLXSW_REG_MCIA_EEPROM_SIZE);
@@ -8896,11 +8902,13 @@ MLXSW_ITEM_BUF(reg, mcia, eeprom, 0x10, MLXSW_REG_MCIA_EEPROM_SIZE);
MLXSW_REG_MCIA_EEPROM_PAGE_LENGTH) / \
MLXSW_REG_MCIA_EEPROM_UP_PAGE_LENGTH + 1)
@@ -104,5 +105,5 @@ index 56927c772..2714e316c 100644
mlxsw_reg_mcia_l_set(payload, lock);
mlxsw_reg_mcia_page_number_set(payload, page_number);
--
2.30.2
2.20.1

17
platform/mellanox/non-upstream-patches/patches/0107-mlxsw-reg-Extend-MCION-register-with-new-slot-number.patch
View File

@@ -1,7 +1,8 @@
From 9c4ce1a56515e927399a87b63deeacd77ada6b3b Mon Sep 17 00:00:00 2001
From aba06998f55ba715e6161a427356fccc17b466fc Mon Sep 17 00:00:00 2001
From: Vadim Pasternak <vadimp@nvidia.com>
Date: Fri, 3 Dec 2021 11:48:50 +0200
Subject: [PATCH] mlxsw: reg: Extend MCION register with new slot number field
Subject: [PATCH backport 5.10 107/182] mlxsw: reg: Extend MCION register with
new slot number field
Extend MCION (Management Cable IO and Notifications Register) with new
field specifying the slot number. The purpose of this field is to
@@ -22,10 +23,10 @@ Signed-off-by: Ido Schimmel <idosch@nvidia.com>
2 files changed, 9 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/mellanox/mlxsw/core_env.c b/drivers/net/ethernet/mellanox/mlxsw/core_env.c
index 21eacbe0a..d88033ec6 100644
index a516c04ad19b..2ac8444aa8b2 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/core_env.c
+++ b/drivers/net/ethernet/mellanox/mlxsw/core_env.c
@@ -460,7 +460,7 @@ mlxsw_env_get_module_power_mode(struct mlxsw_core *mlxsw_core, u8 module,
@@ -458,7 +458,7 @@ mlxsw_env_get_module_power_mode(struct mlxsw_core *mlxsw_core, u8 module,
params->policy = mlxsw_env->module_info[module].power_mode_policy;
@@ -35,10 +36,10 @@ index 21eacbe0a..d88033ec6 100644
if (err) {
NL_SET_ERR_MSG_MOD(extack, "Failed to retrieve module's power mode");
diff --git a/drivers/net/ethernet/mellanox/mlxsw/reg.h b/drivers/net/ethernet/mellanox/mlxsw/reg.h
index 2714e316c..243d91f1d 100644
index bdbe198a9053..acde0cd00944 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/reg.h
+++ b/drivers/net/ethernet/mellanox/mlxsw/reg.h
@@ -9328,6 +9328,12 @@ MLXSW_REG_DEFINE(mcion, MLXSW_REG_MCION_ID, MLXSW_REG_MCION_LEN);
@@ -9327,6 +9327,12 @@ MLXSW_REG_DEFINE(mcion, MLXSW_REG_MCION_ID, MLXSW_REG_MCION_LEN);
*/
MLXSW_ITEM32(reg, mcion, module, 0x00, 16, 8);
@@ -51,7 +52,7 @@ index 2714e316c..243d91f1d 100644
enum {
MLXSW_REG_MCION_MODULE_STATUS_BITS_PRESENT_MASK = BIT(0),
MLXSW_REG_MCION_MODULE_STATUS_BITS_LOW_POWER_MASK = BIT(8),
@@ -9339,9 +9345,10 @@ enum {
@@ -9338,9 +9344,10 @@ enum {
*/
MLXSW_ITEM32(reg, mcion, module_status_bits, 0x04, 0, 16);
@@ -64,5 +65,5 @@ index 2714e316c..243d91f1d 100644
}
--
2.30.2
2.20.1

13
platform/mellanox/non-upstream-patches/patches/0108-mlxsw-reg-Extend-PMMP-register-with-new-slot-number-.patch
View File

@@ -1,7 +1,8 @@
From d707ce17ce596c2deb97b481dffb24b8c4537fa2 Mon Sep 17 00:00:00 2001
From 0aebe300b70a084161c12e813396025b255d91d7 Mon Sep 17 00:00:00 2001
From: Vadim Pasternak <vadimp@nvidia.com>
Date: Fri, 3 Dec 2021 11:48:51 +0200
Subject: [PATCH] mlxsw: reg: Extend PMMP register with new slot number field
Subject: [PATCH backport 5.10 108/182] mlxsw: reg: Extend PMMP register with
new slot number field
Extend PMMP (Port Module Memory Map Properties Register) with new
field specifying the slot number. The purpose of this field is to
@@ -21,10 +22,10 @@ Signed-off-by: Ido Schimmel <idosch@nvidia.com>
2 files changed, 9 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/mellanox/mlxsw/core_env.c b/drivers/net/ethernet/mellanox/mlxsw/core_env.c
index d88033ec6..49c58197b 100644
index 2ac8444aa8b2..ad27a1c90f92 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/core_env.c
+++ b/drivers/net/ethernet/mellanox/mlxsw/core_env.c
@@ -503,7 +503,7 @@ static int mlxsw_env_module_low_power_set(struct mlxsw_core *mlxsw_core,
@@ -501,7 +501,7 @@ static int mlxsw_env_module_low_power_set(struct mlxsw_core *mlxsw_core,
u16 eeprom_override_mask, eeprom_override;
char pmmp_pl[MLXSW_REG_PMMP_LEN];
@@ -34,7 +35,7 @@ index d88033ec6..49c58197b 100644
/* Mask all the bits except low power mode. */
eeprom_override_mask = ~MLXSW_REG_PMMP_EEPROM_OVERRIDE_LOW_POWER_MASK;
diff --git a/drivers/net/ethernet/mellanox/mlxsw/reg.h b/drivers/net/ethernet/mellanox/mlxsw/reg.h
index 243d91f1d..c19db16bf 100644
index acde0cd00944..aad0cb1497aa 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/reg.h
+++ b/drivers/net/ethernet/mellanox/mlxsw/reg.h
@@ -5633,6 +5633,12 @@ MLXSW_REG_DEFINE(pmmp, MLXSW_REG_PMMP_ID, MLXSW_REG_PMMP_LEN);
@@ -63,5 +64,5 @@ index 243d91f1d..c19db16bf 100644
}
--
2.30.2
2.20.1

29
platform/mellanox/non-upstream-patches/patches/0109-mlxsw-reg-Extend-MGPIR-register-with-new-slot-fields.patch
View File

@@ -1,7 +1,8 @@
From 1373ed22ae41e92c081bb80df4b3c4c0630edbb9 Mon Sep 17 00:00:00 2001
From 441a7861ef61f4d0d55dee542d4704487694f68c Mon Sep 17 00:00:00 2001
From: Vadim Pasternak <vadimp@nvidia.com>
Date: Wed, 22 Dec 2021 06:11:50 +0000
Subject: [PATCH] mlxsw: reg: Extend MGPIR register with new slot fields
Subject: [PATCH backport 5.10 109/182] mlxsw: reg: Extend MGPIR register with
new slot fields
Extend MGPIR (Management General Peripheral Information Register) with
new fields specifying the slot number and number of the slots available
@@ -25,10 +26,10 @@ Signed-off-by: Ido Schimmel <idosch@nvidia.com>
5 files changed, 31 insertions(+), 14 deletions(-)
diff --git a/drivers/net/ethernet/mellanox/mlxsw/core_env.c b/drivers/net/ethernet/mellanox/mlxsw/core_env.c
index 49c58197b..b1a1204e7 100644
index ad27a1c90f92..8ab15d5bd7f5 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/core_env.c
+++ b/drivers/net/ethernet/mellanox/mlxsw/core_env.c
@@ -985,12 +985,12 @@ int mlxsw_env_init(struct mlxsw_core *mlxsw_core, struct mlxsw_env **p_env)
@@ -983,12 +983,12 @@ int mlxsw_env_init(struct mlxsw_core *mlxsw_core, struct mlxsw_env **p_env)
u8 module_count;
int i, err;
@@ -44,7 +45,7 @@ index 49c58197b..b1a1204e7 100644
env = kzalloc(struct_size(env, module_info, module_count), GFP_KERNEL);
if (!env)
diff --git a/drivers/net/ethernet/mellanox/mlxsw/core_hwmon.c b/drivers/net/ethernet/mellanox/mlxsw/core_hwmon.c
index f4bc711a1..2bc4c4556 100644
index f4bc711a16cf..2bc4c4556895 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/core_hwmon.c
+++ b/drivers/net/ethernet/mellanox/mlxsw/core_hwmon.c
@@ -656,13 +656,13 @@ static int mlxsw_hwmon_module_init(struct mlxsw_hwmon *mlxsw_hwmon)
@@ -80,10 +81,10 @@ index f4bc711a1..2bc4c4556 100644
!gbox_num)
return 0;
diff --git a/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c b/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c
index 8d88633c9..56e0291f1 100644
index f4f0f8ce8597..21a7415c8ef5 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c
+++ b/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c
@@ -787,13 +787,13 @@ mlxsw_thermal_modules_init(struct device *dev, struct mlxsw_core *core,
@@ -746,13 +746,13 @@ mlxsw_thermal_modules_init(struct device *dev, struct mlxsw_core *core,
char mgpir_pl[MLXSW_REG_MGPIR_LEN];
int i, err;
@@ -99,7 +100,7 @@ index 8d88633c9..56e0291f1 100644
thermal->tz_module_arr = kcalloc(thermal->tz_module_num,
sizeof(*thermal->tz_module_arr),
@@ -878,13 +878,13 @@ mlxsw_thermal_gearboxes_init(struct device *dev, struct mlxsw_core *core,
@@ -837,13 +837,13 @@ mlxsw_thermal_gearboxes_init(struct device *dev, struct mlxsw_core *core,
int i;
int err;
@@ -116,7 +117,7 @@ index 8d88633c9..56e0291f1 100644
!gbox_num)
return 0;
diff --git a/drivers/net/ethernet/mellanox/mlxsw/minimal.c b/drivers/net/ethernet/mellanox/mlxsw/minimal.c
index 3d07c2dcf..b2ffcfda8 100644
index 3d07c2dcf08d..b2ffcfda8374 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/minimal.c
+++ b/drivers/net/ethernet/mellanox/mlxsw/minimal.c
@@ -280,13 +280,13 @@ static int mlxsw_m_ports_create(struct mlxsw_m *mlxsw_m)
@@ -136,10 +137,10 @@ index 3d07c2dcf..b2ffcfda8 100644
return 0;
diff --git a/drivers/net/ethernet/mellanox/mlxsw/reg.h b/drivers/net/ethernet/mellanox/mlxsw/reg.h
index c19db16bf..e981630fd 100644
index aad0cb1497aa..a5fa25d4bd8f 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/reg.h
+++ b/drivers/net/ethernet/mellanox/mlxsw/reg.h
@@ -10167,6 +10167,12 @@ enum mlxsw_reg_mgpir_device_type {
@@ -10166,6 +10166,12 @@ enum mlxsw_reg_mgpir_device_type {
MLXSW_REG_MGPIR_DEVICE_TYPE_GEARBOX_DIE,
};
@@ -152,7 +153,7 @@ index c19db16bf..e981630fd 100644
/* mgpir_device_type
* Access: RO
*/
@@ -10184,21 +10190,29 @@ MLXSW_ITEM32(reg, mgpir, devices_per_flash, 0x00, 16, 8);
@@ -10183,21 +10189,29 @@ MLXSW_ITEM32(reg, mgpir, devices_per_flash, 0x00, 16, 8);
*/
MLXSW_ITEM32(reg, mgpir, num_of_devices, 0x00, 0, 8);
@@ -184,7 +185,7 @@ index c19db16bf..e981630fd 100644
{
if (num_of_devices)
*num_of_devices = mlxsw_reg_mgpir_num_of_devices_get(payload);
@@ -10209,6 +10223,8 @@ mlxsw_reg_mgpir_unpack(char *payload, u8 *num_of_devices,
@@ -10208,6 +10222,8 @@ mlxsw_reg_mgpir_unpack(char *payload, u8 *num_of_devices,
mlxsw_reg_mgpir_devices_per_flash_get(payload);
if (num_of_modules)
*num_of_modules = mlxsw_reg_mgpir_num_of_modules_get(payload);
@@ -194,5 +195,5 @@ index c19db16bf..e981630fd 100644
/* MFDE - Monitoring FW Debug Register
--
2.30.2
2.20.1

18
platform/mellanox/non-upstream-patches/patches/0110-mlxsw-core_env-Pass-slot-index-during-PMAOS-register.patch
View File

@@ -1,8 +1,8 @@
From 562fe3c68c9dbcff172eeae8b4f0a84484b5e3e9 Mon Sep 17 00:00:00 2001
From 7c2049bccef11b265fd4a4458b92277ea8ea97fc Mon Sep 17 00:00:00 2001
From: Vadim Pasternak <vadimp@nvidia.com>
Date: Fri, 3 Dec 2021 11:48:52 +0200
Subject: [PATCH] mlxsw: core_env: Pass slot index during PMAOS register write
call
Subject: [PATCH backport 5.10 110/182] mlxsw: core_env: Pass slot index during
PMAOS register write call
Pass the slot index down to PMAOS pack helper alongside with the module.
@@ -15,10 +15,10 @@ Signed-off-by: Ido Schimmel <idosch@nvidia.com>
2 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/drivers/net/ethernet/mellanox/mlxsw/core_env.c b/drivers/net/ethernet/mellanox/mlxsw/core_env.c
index b1a1204e7..45058d4cf 100644
index 8ab15d5bd7f5..b7c1fd3dbf45 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/core_env.c
+++ b/drivers/net/ethernet/mellanox/mlxsw/core_env.c
@@ -400,7 +400,7 @@ static int mlxsw_env_module_reset(struct mlxsw_core *mlxsw_core, u8 module)
@@ -398,7 +398,7 @@ static int mlxsw_env_module_reset(struct mlxsw_core *mlxsw_core, u8 module)
{
char pmaos_pl[MLXSW_REG_PMAOS_LEN];
@@ -27,7 +27,7 @@ index b1a1204e7..45058d4cf 100644
mlxsw_reg_pmaos_rst_set(pmaos_pl, true);
return mlxsw_reg_write(mlxsw_core, MLXSW_REG(pmaos), pmaos_pl);
@@ -488,7 +488,7 @@ static int mlxsw_env_module_enable_set(struct mlxsw_core *mlxsw_core,
@@ -486,7 +486,7 @@ static int mlxsw_env_module_enable_set(struct mlxsw_core *mlxsw_core,
enum mlxsw_reg_pmaos_admin_status admin_status;
char pmaos_pl[MLXSW_REG_PMAOS_LEN];
@@ -36,7 +36,7 @@ index b1a1204e7..45058d4cf 100644
admin_status = enable ? MLXSW_REG_PMAOS_ADMIN_STATUS_ENABLED :
MLXSW_REG_PMAOS_ADMIN_STATUS_DISABLED;
mlxsw_reg_pmaos_admin_status_set(pmaos_pl, admin_status);
@@ -878,7 +878,7 @@ mlxsw_env_module_oper_state_event_enable(struct mlxsw_core *mlxsw_core,
@@ -876,7 +876,7 @@ mlxsw_env_module_oper_state_event_enable(struct mlxsw_core *mlxsw_core,
for (i = 0; i < module_count; i++) {
char pmaos_pl[MLXSW_REG_PMAOS_LEN];
@@ -46,7 +46,7 @@ index b1a1204e7..45058d4cf 100644
MLXSW_REG_PMAOS_E_GENERATE_EVENT);
mlxsw_reg_pmaos_ee_set(pmaos_pl, true);
diff --git a/drivers/net/ethernet/mellanox/mlxsw/reg.h b/drivers/net/ethernet/mellanox/mlxsw/reg.h
index e981630fd..748a22ec4 100644
index a5fa25d4bd8f..07f68fd1a4e5 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/reg.h
+++ b/drivers/net/ethernet/mellanox/mlxsw/reg.h
@@ -5481,9 +5481,10 @@ enum mlxsw_reg_pmaos_e {
@@ -62,5 +62,5 @@ index e981630fd..748a22ec4 100644
}
--
2.30.2
2.20.1

12
platform/mellanox/non-upstream-patches/patches/0111-mlxsw-reg-Add-new-field-to-Management-General-Periph.patch
View File

@@ -1,8 +1,8 @@
From fe27f006de6b428fe59acb1960373b32e59adf0b Mon Sep 17 00:00:00 2001
From 4b630e780a6fa8b387e79e252169d5743faf5321 Mon Sep 17 00:00:00 2001
From: Vadim Pasternak <vadimp@nvidia.com>
Date: Fri, 3 Dec 2021 11:48:49 +0200
Subject: [PATCH] mlxsw: reg: Add new field to Management General Peripheral
Information Register
Subject: [PATCH backport 5.10 111/182] mlxsw: reg: Add new field to Management
General Peripheral Information Register
Add new field 'max_modules_per_slot' to provide maximum number of
modules that can be connected per slot. This field will always be zero,
@@ -17,10 +17,10 @@ Signed-off-by: Ido Schimmel <idosch@nvidia.com>
1 file changed, 6 insertions(+)
diff --git a/drivers/net/ethernet/mellanox/mlxsw/reg.h b/drivers/net/ethernet/mellanox/mlxsw/reg.h
index 748a22ec4..9de037b9a 100644
index 07f68fd1a4e5..98c627ffe039 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/reg.h
+++ b/drivers/net/ethernet/mellanox/mlxsw/reg.h
@@ -10191,6 +10191,12 @@ MLXSW_ITEM32(reg, mgpir, devices_per_flash, 0x00, 16, 8);
@@ -10190,6 +10190,12 @@ MLXSW_ITEM32(reg, mgpir, devices_per_flash, 0x00, 16, 8);
*/
MLXSW_ITEM32(reg, mgpir, num_of_devices, 0x00, 0, 8);
@@ -34,5 +34,5 @@ index 748a22ec4..9de037b9a 100644
* Number of slots in the system.
* Access: RO
--
2.30.2
2.20.1

104
platform/mellanox/non-upstream-patches/patches/0112-mlxsw-core-Extend-interfaces-for-cable-info-access-w.patch
View File

@@ -1,8 +1,8 @@
From 5577988f783619b9d55f19c983ee8667f52165b7 Mon Sep 17 00:00:00 2001
From 0b0f4813bdd0b4ed70074d616f68bb6c774662bc Mon Sep 17 00:00:00 2001
From: Vadim Pasternak <vadimp@nvidia.com>
Date: Fri, 3 Dec 2021 11:48:53 +0200
Subject: [PATCH] mlxsw: core: Extend interfaces for cable info access with
slot argument
Subject: [PATCH backport 5.10 112/182] mlxsw: core: Extend interfaces for
cable info access with slot argument
Extend all cable info APIs with 'slot_index' argument.
@@ -24,7 +24,7 @@ Signed-off-by: Ido Schimmel <idosch@nvidia.com>
7 files changed, 155 insertions(+), 107 deletions(-)
diff --git a/drivers/net/ethernet/mellanox/mlxsw/core_env.c b/drivers/net/ethernet/mellanox/mlxsw/core_env.c
index 45058d4cf..fefb9bb02 100644
index b7c1fd3dbf45..fc4468a6b0f6 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/core_env.c
+++ b/drivers/net/ethernet/mellanox/mlxsw/core_env.c
@@ -27,16 +27,18 @@ struct mlxsw_env {
@@ -50,7 +50,7 @@ index 45058d4cf..fefb9bb02 100644
err = mlxsw_reg_query(core, MLXSW_REG(mcia), mcia_pl);
if (err)
return err;
@@ -65,8 +67,8 @@ static int mlxsw_env_validate_cable_ident(struct mlxsw_core *core, int id,
@@ -64,8 +66,8 @@ static int mlxsw_env_validate_cable_ident(struct mlxsw_core *core, int id,
}
static int
@@ -61,7 +61,7 @@ index 45058d4cf..fefb9bb02 100644
bool qsfp, unsigned int *p_read_size)
{
char mcia_pl[MLXSW_REG_MCIA_LEN];
@@ -111,7 +113,7 @@ mlxsw_env_query_module_eeprom(struct mlxsw_core *mlxsw_core, int module,
@@ -110,7 +112,7 @@ mlxsw_env_query_module_eeprom(struct mlxsw_core *mlxsw_core, int module,
}
}
@@ -70,7 +70,7 @@ index 45058d4cf..fefb9bb02 100644
i2c_addr);
err = mlxsw_reg_query(mlxsw_core, MLXSW_REG(mcia), mcia_pl);
@@ -129,8 +131,9 @@ mlxsw_env_query_module_eeprom(struct mlxsw_core *mlxsw_core, int module,
@@ -128,8 +130,9 @@ mlxsw_env_query_module_eeprom(struct mlxsw_core *mlxsw_core, int module,
return 0;
}
@@ -82,7 +82,7 @@ index 45058d4cf..fefb9bb02 100644
{
unsigned int module_temp, module_crit, module_emerg;
union {
@@ -144,8 +147,9 @@ int mlxsw_env_module_temp_thresholds_get(struct mlxsw_core *core, int module,
@@ -143,8 +146,9 @@ int mlxsw_env_module_temp_thresholds_get(struct mlxsw_core *core, int module,
int page;
int err;
@@ -94,7 +94,7 @@ index 45058d4cf..fefb9bb02 100644
err = mlxsw_reg_query(core, MLXSW_REG(mtmp), mtmp_pl);
if (err)
return err;
@@ -174,7 +178,8 @@ int mlxsw_env_module_temp_thresholds_get(struct mlxsw_core *core, int module,
@@ -173,7 +177,8 @@ int mlxsw_env_module_temp_thresholds_get(struct mlxsw_core *core, int module,
*/
/* Validate module identifier value. */
@@ -104,7 +104,7 @@ index 45058d4cf..fefb9bb02 100644
if (err)
return err;
@@ -186,12 +191,12 @@ int mlxsw_env_module_temp_thresholds_get(struct mlxsw_core *core, int module,
@@ -185,12 +190,12 @@ int mlxsw_env_module_temp_thresholds_get(struct mlxsw_core *core, int module,
page = MLXSW_REG_MCIA_TH_PAGE_CMIS_NUM;
else
page = MLXSW_REG_MCIA_TH_PAGE_NUM;
@@ -119,7 +119,7 @@ index 45058d4cf..fefb9bb02 100644
MLXSW_REG_MCIA_PAGE0_LO,
off, MLXSW_REG_MCIA_TH_ITEM_SIZE,
MLXSW_REG_MCIA_I2C_ADDR_HIGH);
@@ -208,8 +213,8 @@ int mlxsw_env_module_temp_thresholds_get(struct mlxsw_core *core, int module,
@@ -207,8 +212,8 @@ int mlxsw_env_module_temp_thresholds_get(struct mlxsw_core *core, int module,
return 0;
}
@@ -130,7 +130,7 @@ index 45058d4cf..fefb9bb02 100644
{
u8 module_info[MLXSW_REG_MCIA_EEPROM_MODULE_INFO_SIZE];
u16 offset = MLXSW_REG_MCIA_EEPROM_MODULE_INFO_SIZE;
@@ -217,8 +222,9 @@ int mlxsw_env_get_module_info(struct mlxsw_core *mlxsw_core, int module,
@@ -216,8 +221,9 @@ int mlxsw_env_get_module_info(struct mlxsw_core *mlxsw_core, int module,
unsigned int read_size;
int err;
@@ -142,7 +142,7 @@ index 45058d4cf..fefb9bb02 100644
if (err)
return err;
@@ -247,9 +253,10 @@ int mlxsw_env_get_module_info(struct mlxsw_core *mlxsw_core, int module,
@@ -246,9 +252,10 @@ int mlxsw_env_get_module_info(struct mlxsw_core *mlxsw_core, int module,
break;
case MLXSW_REG_MCIA_EEPROM_MODULE_INFO_ID_SFP:
/* Verify if transceiver provides diagnostic monitoring page */
@@ -156,7 +156,7 @@ index 45058d4cf..fefb9bb02 100644
if (err)
return err;
@@ -288,8 +295,9 @@ int mlxsw_env_get_module_info(struct mlxsw_core *mlxsw_core, int module,
@@ -286,8 +293,9 @@ int mlxsw_env_get_module_info(struct mlxsw_core *mlxsw_core, int module,
EXPORT_SYMBOL(mlxsw_env_get_module_info);
int mlxsw_env_get_module_eeprom(struct net_device *netdev,
@@ -168,7 +168,7 @@ index 45058d4cf..fefb9bb02 100644
{
int offset = ee->offset;
unsigned int read_size;
@@ -302,12 +310,14 @@ int mlxsw_env_get_module_eeprom(struct net_device *netdev,
@@ -300,12 +308,14 @@ int mlxsw_env_get_module_eeprom(struct net_device *netdev,
memset(data, 0, ee->len);
/* Validate module identifier value. */
@@ -185,7 +185,7 @@ index 45058d4cf..fefb9bb02 100644
ee->len - i, data + i,
qsfp, &read_size);
if (err) {
@@ -353,7 +363,8 @@ static int mlxsw_env_mcia_status_process(const char *mcia_pl,
@@ -351,7 +361,8 @@ static int mlxsw_env_mcia_status_process(const char *mcia_pl,
}
int
@@ -195,7 +195,7 @@ index 45058d4cf..fefb9bb02 100644
const struct ethtool_module_eeprom *page,
struct netlink_ext_ack *extack)
{
@@ -372,7 +383,7 @@ mlxsw_env_get_module_eeprom_by_page(struct mlxsw_core *mlxsw_core, u8 module,
@@ -370,7 +381,7 @@ mlxsw_env_get_module_eeprom_by_page(struct mlxsw_core *mlxsw_core, u8 module,
size = min_t(u8, page->length - bytes_read,
MLXSW_REG_MCIA_EEPROM_SIZE);
@@ -204,7 +204,7 @@ index 45058d4cf..fefb9bb02 100644
device_addr + bytes_read, size,
page->i2c_address);
mlxsw_reg_mcia_bank_number_set(mcia_pl, page->bank);
@@ -396,18 +407,20 @@ mlxsw_env_get_module_eeprom_by_page(struct mlxsw_core *mlxsw_core, u8 module,
@@ -394,18 +405,20 @@ mlxsw_env_get_module_eeprom_by_page(struct mlxsw_core *mlxsw_core, u8 module,
}
EXPORT_SYMBOL(mlxsw_env_get_module_eeprom_by_page);
@@ -228,7 +228,7 @@ index 45058d4cf..fefb9bb02 100644
{
struct mlxsw_env *mlxsw_env = mlxsw_core_env(mlxsw_core);
u32 req = *flags;
@@ -432,7 +445,7 @@ int mlxsw_env_reset_module(struct net_device *netdev,
@@ -430,7 +443,7 @@ int mlxsw_env_reset_module(struct net_device *netdev,
goto out;
}
@@ -237,7 +237,7 @@ index 45058d4cf..fefb9bb02 100644
if (err) {
netdev_err(netdev, "Failed to reset module\n");
goto out;
@@ -447,7 +460,8 @@ int mlxsw_env_reset_module(struct net_device *netdev,
@@ -445,7 +458,8 @@ int mlxsw_env_reset_module(struct net_device *netdev,
EXPORT_SYMBOL(mlxsw_env_reset_module);
int
@@ -247,7 +247,7 @@ index 45058d4cf..fefb9bb02 100644
struct ethtool_module_power_mode_params *params,
struct netlink_ext_ack *extack)
{
@@ -460,7 +474,7 @@ mlxsw_env_get_module_power_mode(struct mlxsw_core *mlxsw_core, u8 module,
@@ -458,7 +472,7 @@ mlxsw_env_get_module_power_mode(struct mlxsw_core *mlxsw_core, u8 module,
params->policy = mlxsw_env->module_info[module].power_mode_policy;
@@ -256,7 +256,7 @@ index 45058d4cf..fefb9bb02 100644
err = mlxsw_reg_query(mlxsw_core, MLXSW_REG(mcion), mcion_pl);
if (err) {
NL_SET_ERR_MSG_MOD(extack, "Failed to retrieve module's power mode");
@@ -483,12 +497,12 @@ mlxsw_env_get_module_power_mode(struct mlxsw_core *mlxsw_core, u8 module,
@@ -481,12 +495,12 @@ mlxsw_env_get_module_power_mode(struct mlxsw_core *mlxsw_core, u8 module,
EXPORT_SYMBOL(mlxsw_env_get_module_power_mode);
static int mlxsw_env_module_enable_set(struct mlxsw_core *mlxsw_core,
@@ -271,7 +271,7 @@ index 45058d4cf..fefb9bb02 100644
admin_status = enable ? MLXSW_REG_PMAOS_ADMIN_STATUS_ENABLED :
MLXSW_REG_PMAOS_ADMIN_STATUS_DISABLED;
mlxsw_reg_pmaos_admin_status_set(pmaos_pl, admin_status);
@@ -498,12 +512,13 @@ static int mlxsw_env_module_enable_set(struct mlxsw_core *mlxsw_core,
@@ -496,12 +510,13 @@ static int mlxsw_env_module_enable_set(struct mlxsw_core *mlxsw_core,
}
static int mlxsw_env_module_low_power_set(struct mlxsw_core *mlxsw_core,
@@ -287,7 +287,7 @@ index 45058d4cf..fefb9bb02 100644
mlxsw_reg_pmmp_sticky_set(pmmp_pl, true);
/* Mask all the bits except low power mode. */
eeprom_override_mask = ~MLXSW_REG_PMMP_EEPROM_OVERRIDE_LOW_POWER_MASK;
@@ -516,24 +531,26 @@ static int mlxsw_env_module_low_power_set(struct mlxsw_core *mlxsw_core,
@@ -514,24 +529,26 @@ static int mlxsw_env_module_low_power_set(struct mlxsw_core *mlxsw_core,
}
static int __mlxsw_env_set_module_power_mode(struct mlxsw_core *mlxsw_core,
@@ -318,7 +318,7 @@ index 45058d4cf..fefb9bb02 100644
if (err) {
NL_SET_ERR_MSG_MOD(extack, "Failed to enable module");
goto err_module_enable_set;
@@ -542,14 +559,16 @@ static int __mlxsw_env_set_module_power_mode(struct mlxsw_core *mlxsw_core,
@@ -540,14 +557,16 @@ static int __mlxsw_env_set_module_power_mode(struct mlxsw_core *mlxsw_core,
return 0;
err_module_enable_set:
@@ -338,7 +338,7 @@ index 45058d4cf..fefb9bb02 100644
enum ethtool_module_power_mode_policy policy,
struct netlink_ext_ack *extack)
{
@@ -573,8 +592,8 @@ mlxsw_env_set_module_power_mode(struct mlxsw_core *mlxsw_core, u8 module,
@@ -571,8 +590,8 @@ mlxsw_env_set_module_power_mode(struct mlxsw_core *mlxsw_core, u8 module,
goto out_set_policy;
low_power = policy == ETHTOOL_MODULE_POWER_MODE_POLICY_AUTO;
@@ -349,7 +349,7 @@ index 45058d4cf..fefb9bb02 100644
if (err)
goto out;
@@ -587,14 +606,14 @@ mlxsw_env_set_module_power_mode(struct mlxsw_core *mlxsw_core, u8 module,
@@ -585,14 +604,14 @@ mlxsw_env_set_module_power_mode(struct mlxsw_core *mlxsw_core, u8 module,
EXPORT_SYMBOL(mlxsw_env_set_module_power_mode);
static int mlxsw_env_module_has_temp_sensor(struct mlxsw_core *mlxsw_core,
@@ -366,7 +366,7 @@ index 45058d4cf..fefb9bb02 100644
MLXSW_REG_MTBR_BASE_MODULE_INDEX + module, 1);
err = mlxsw_reg_query(mlxsw_core, MLXSW_REG(mtbr), mtbr_pl);
if (err)
@@ -615,13 +634,15 @@ static int mlxsw_env_module_has_temp_sensor(struct mlxsw_core *mlxsw_core,
@@ -613,13 +632,15 @@ static int mlxsw_env_module_has_temp_sensor(struct mlxsw_core *mlxsw_core,
return 0;
}
@@ -384,7 +384,7 @@ index 45058d4cf..fefb9bb02 100644
mlxsw_reg_mtmp_sensor_index_set(mtmp_pl, sensor_index);
err = mlxsw_reg_query(mlxsw_core, MLXSW_REG(mtmp), mtmp_pl);
if (err)
@@ -629,6 +650,7 @@ static int mlxsw_env_temp_event_set(struct mlxsw_core *mlxsw_core,
@@ -627,6 +648,7 @@ static int mlxsw_env_temp_event_set(struct mlxsw_core *mlxsw_core,
if (enable) {
err = mlxsw_env_module_temp_thresholds_get(mlxsw_core,
@@ -392,7 +392,7 @@ index 45058d4cf..fefb9bb02 100644
sensor_index -
MLXSW_REG_MTMP_MODULE_INDEX_MIN,
SFP_TEMP_HIGH_WARN,
@@ -656,14 +678,14 @@ static int mlxsw_env_temp_event_set(struct mlxsw_core *mlxsw_core,
@@ -654,14 +676,14 @@ static int mlxsw_env_temp_event_set(struct mlxsw_core *mlxsw_core,
}
static int mlxsw_env_module_temp_event_enable(struct mlxsw_core *mlxsw_core,
@@ -410,7 +410,7 @@ index 45058d4cf..fefb9bb02 100644
if (err)
return err;
@@ -671,7 +693,8 @@ static int mlxsw_env_module_temp_event_enable(struct mlxsw_core *mlxsw_core,
@@ -669,7 +691,8 @@ static int mlxsw_env_module_temp_event_enable(struct mlxsw_core *mlxsw_core,
continue;
sensor_index = i + MLXSW_REG_MTMP_MODULE_INDEX_MIN;
@@ -420,7 +420,7 @@ index 45058d4cf..fefb9bb02 100644
if (err)
return err;
}
@@ -778,6 +801,7 @@ static void mlxsw_env_temp_warn_event_unregister(struct mlxsw_env *mlxsw_env)
@@ -776,6 +799,7 @@ static void mlxsw_env_temp_warn_event_unregister(struct mlxsw_env *mlxsw_env)
struct mlxsw_env_module_plug_unplug_event {
struct mlxsw_env *mlxsw_env;
@@ -428,7 +428,7 @@ index 45058d4cf..fefb9bb02 100644
u8 module;
struct work_struct work;
};
@@ -798,7 +822,9 @@ static void mlxsw_env_pmpe_event_work(struct work_struct *work)
@@ -796,7 +820,9 @@ static void mlxsw_env_pmpe_event_work(struct work_struct *work)
mlxsw_env->module_info[event->module].is_overheat = false;
mutex_unlock(&mlxsw_env->module_info_lock);
@@ -439,7 +439,7 @@ index 45058d4cf..fefb9bb02 100644
&has_temp_sensor);
/* Do not disable events on modules without sensors or faulty sensors
* because FW returns errors.
@@ -810,7 +836,8 @@ static void mlxsw_env_pmpe_event_work(struct work_struct *work)
@@ -808,7 +834,8 @@ static void mlxsw_env_pmpe_event_work(struct work_struct *work)
goto out;
sensor_index = event->module + MLXSW_REG_MTMP_MODULE_INDEX_MIN;
@@ -449,7 +449,7 @@ index 45058d4cf..fefb9bb02 100644
out:
kfree(event);
@@ -837,6 +864,7 @@ mlxsw_env_pmpe_listener_func(const struct mlxsw_reg_info *reg, char *pmpe_pl,
@@ -835,6 +862,7 @@ mlxsw_env_pmpe_listener_func(const struct mlxsw_reg_info *reg, char *pmpe_pl,
return;
event->mlxsw_env = mlxsw_env;
@@ -457,7 +457,7 @@ index 45058d4cf..fefb9bb02 100644
event->module = module;
INIT_WORK(&event->work, mlxsw_env_pmpe_event_work);
mlxsw_core_schedule_work(&event->work);
@@ -871,14 +899,14 @@ mlxsw_env_module_plug_event_unregister(struct mlxsw_env *mlxsw_env)
@@ -869,14 +897,14 @@ mlxsw_env_module_plug_event_unregister(struct mlxsw_env *mlxsw_env)
static int
mlxsw_env_module_oper_state_event_enable(struct mlxsw_core *mlxsw_core,
@@ -474,7 +474,7 @@ index 45058d4cf..fefb9bb02 100644
mlxsw_reg_pmaos_e_set(pmaos_pl,
MLXSW_REG_PMAOS_E_GENERATE_EVENT);
mlxsw_reg_pmaos_ee_set(pmaos_pl, true);
@@ -890,8 +918,8 @@ mlxsw_env_module_oper_state_event_enable(struct mlxsw_core *mlxsw_core,
@@ -888,8 +916,8 @@ mlxsw_env_module_oper_state_event_enable(struct mlxsw_core *mlxsw_core,
}
int
@@ -485,7 +485,7 @@ index 45058d4cf..fefb9bb02 100644
{
struct mlxsw_env *mlxsw_env = mlxsw_core_env(mlxsw_core);
@@ -903,7 +931,8 @@ mlxsw_env_module_overheat_counter_get(struct mlxsw_core *mlxsw_core, u8 module,
@@ -901,7 +929,8 @@ mlxsw_env_module_overheat_counter_get(struct mlxsw_core *mlxsw_core, u8 module,
}
EXPORT_SYMBOL(mlxsw_env_module_overheat_counter_get);
@@ -495,7 +495,7 @@ index 45058d4cf..fefb9bb02 100644
{
struct mlxsw_env *mlxsw_env = mlxsw_core_env(mlxsw_core);
@@ -913,7 +942,8 @@ void mlxsw_env_module_port_map(struct mlxsw_core *mlxsw_core, u8 module)
@@ -911,7 +940,8 @@ void mlxsw_env_module_port_map(struct mlxsw_core *mlxsw_core, u8 module)
}
EXPORT_SYMBOL(mlxsw_env_module_port_map);
@@ -505,7 +505,7 @@ index 45058d4cf..fefb9bb02 100644
{
struct mlxsw_env *mlxsw_env = mlxsw_core_env(mlxsw_core);
@@ -923,7 +953,8 @@ void mlxsw_env_module_port_unmap(struct mlxsw_core *mlxsw_core, u8 module)
@@ -921,7 +951,8 @@ void mlxsw_env_module_port_unmap(struct mlxsw_core *mlxsw_core, u8 module)
}
EXPORT_SYMBOL(mlxsw_env_module_port_unmap);
@@ -515,7 +515,7 @@ index 45058d4cf..fefb9bb02 100644
{
struct mlxsw_env *mlxsw_env = mlxsw_core_env(mlxsw_core);
int err = 0;
@@ -940,8 +971,8 @@ int mlxsw_env_module_port_up(struct mlxsw_core *mlxsw_core, u8 module)
@@ -938,8 +969,8 @@ int mlxsw_env_module_port_up(struct mlxsw_core *mlxsw_core, u8 module)
/* Transition to high power mode following first port using the module
* being put administratively up.
*/
@@ -526,7 +526,7 @@ index 45058d4cf..fefb9bb02 100644
if (err)
goto out_unlock;
@@ -953,7 +984,8 @@ int mlxsw_env_module_port_up(struct mlxsw_core *mlxsw_core, u8 module)
@@ -951,7 +982,8 @@ int mlxsw_env_module_port_up(struct mlxsw_core *mlxsw_core, u8 module)
}
EXPORT_SYMBOL(mlxsw_env_module_port_up);
@@ -536,7 +536,7 @@ index 45058d4cf..fefb9bb02 100644
{
struct mlxsw_env *mlxsw_env = mlxsw_core_env(mlxsw_core);
@@ -971,7 +1003,8 @@ void mlxsw_env_module_port_down(struct mlxsw_core *mlxsw_core, u8 module)
@@ -969,7 +1001,8 @@ void mlxsw_env_module_port_down(struct mlxsw_core *mlxsw_core, u8 module)
/* Transition to low power mode following last port using the module
* being put administratively down.
*/
@@ -546,7 +546,7 @@ index 45058d4cf..fefb9bb02 100644
out_unlock:
mutex_unlock(&mlxsw_env->module_info_lock);
@@ -1016,12 +1049,13 @@ int mlxsw_env_init(struct mlxsw_core *mlxsw_core, struct mlxsw_env **p_env)
@@ -1014,12 +1047,13 @@ int mlxsw_env_init(struct mlxsw_core *mlxsw_core, struct mlxsw_env **p_env)
if (err)
goto err_module_plug_event_register;
@@ -563,7 +563,7 @@ index 45058d4cf..fefb9bb02 100644
goto err_temp_event_enable;
diff --git a/drivers/net/ethernet/mellanox/mlxsw/core_env.h b/drivers/net/ethernet/mellanox/mlxsw/core_env.h
index da121b1a8..03d027870 100644
index da121b1a84b4..03d027870d65 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/core_env.h
+++ b/drivers/net/ethernet/mellanox/mlxsw/core_env.h
@@ -9,46 +9,55 @@
@@ -640,7 +640,7 @@ index da121b1a8..03d027870 100644
int mlxsw_env_init(struct mlxsw_core *core, struct mlxsw_env **p_env);
void mlxsw_env_fini(struct mlxsw_env *env);
diff --git a/drivers/net/ethernet/mellanox/mlxsw/core_hwmon.c b/drivers/net/ethernet/mellanox/mlxsw/core_hwmon.c
index 2bc4c4556..5df54a5bf 100644
index 2bc4c4556895..5df54a5bf292 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/core_hwmon.c
+++ b/drivers/net/ethernet/mellanox/mlxsw/core_hwmon.c
@@ -311,8 +311,9 @@ static int mlxsw_hwmon_module_temp_critical_get(struct device *dev,
@@ -668,10 +668,10 @@ index 2bc4c4556..5df54a5bf 100644
dev_err(dev, "Failed to query module temperature thresholds\n");
return err;
diff --git a/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c b/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c
index 56e0291f1..3f9062f1c 100644
index 21a7415c8ef5..4f84c4bb66af 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c
+++ b/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c
@@ -159,13 +159,13 @@ mlxsw_thermal_module_trips_update(struct device *dev, struct mlxsw_core *core,
@@ -151,13 +151,13 @@ mlxsw_thermal_module_trips_update(struct device *dev, struct mlxsw_core *core,
* EEPROM if we got valid thresholds from MTMP.
*/
if (!emerg_temp || !crit_temp) {
@@ -688,7 +688,7 @@ index 56e0291f1..3f9062f1c 100644
&emerg_temp);
if (err)
diff --git a/drivers/net/ethernet/mellanox/mlxsw/minimal.c b/drivers/net/ethernet/mellanox/mlxsw/minimal.c
index b2ffcfda8..104f1ba02 100644
index b2ffcfda8374..104f1ba0242f 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/minimal.c
+++ b/drivers/net/ethernet/mellanox/mlxsw/minimal.c
@@ -59,7 +59,8 @@ static int mlxsw_m_port_open(struct net_device *dev)
@@ -769,7 +769,7 @@ index b2ffcfda8..104f1ba02 100644
}
diff --git a/drivers/net/ethernet/mellanox/mlxsw/spectrum.c b/drivers/net/ethernet/mellanox/mlxsw/spectrum.c
index 9f068c030..5066fcc46 100644
index 4110e15c22c7..e0424f490c6f 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/spectrum.c
+++ b/drivers/net/ethernet/mellanox/mlxsw/spectrum.c
@@ -1377,7 +1377,7 @@ static int mlxsw_sp_port_overheat_init_val_set(struct mlxsw_sp_port *mlxsw_sp_po
@@ -782,7 +782,7 @@ index 9f068c030..5066fcc46 100644
if (err)
return err;
diff --git a/drivers/net/ethernet/mellanox/mlxsw/spectrum_ethtool.c b/drivers/net/ethernet/mellanox/mlxsw/spectrum_ethtool.c
index 369b9d0dc..c9298b236 100644
index 369b9d0dc5d4..c9298b236182 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/spectrum_ethtool.c
+++ b/drivers/net/ethernet/mellanox/mlxsw/spectrum_ethtool.c
@@ -566,7 +566,7 @@ mlxsw_sp_port_get_transceiver_overheat_stats(struct mlxsw_sp_port *mlxsw_sp_port
@@ -824,5 +824,5 @@ index 369b9d0dc..c9298b236 100644
static int
--
2.30.2
2.20.1

64
platform/mellanox/non-upstream-patches/patches/0113-mlxsw-core-Extend-port-module-data-structures-for-li.patch
View File

@@ -1,8 +1,8 @@
From 8e7c606209b97b89b58d21a2c33c319ade1ba867 Mon Sep 17 00:00:00 2001
From fe0bf4454c709fa1ddb5fa105e88f2d57cb5ef5a Mon Sep 17 00:00:00 2001
From: Vadim Pasternak <vadimp@nvidia.com>
Date: Tue, 14 Dec 2021 10:57:27 +0200
Subject: [PATCH] mlxsw: core: Extend port module data structures for line
cards
Subject: [PATCH backport 5.10 113/182] mlxsw: core: Extend port module data
structures for line cards
The port module core is tasked with module operations such as setting
power mode policy and reset. The per-module information is currently
@@ -21,7 +21,7 @@ Signed-off-by: Ido Schimmel <idosch@nvidia.com>
1 file changed, 157 insertions(+), 66 deletions(-)
diff --git a/drivers/net/ethernet/mellanox/mlxsw/core_env.c b/drivers/net/ethernet/mellanox/mlxsw/core_env.c
index fefb9bb02..2a6630547 100644
index fc4468a6b0f6..606d89b6f50f 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/core_env.c
+++ b/drivers/net/ethernet/mellanox/mlxsw/core_env.c
@@ -20,13 +20,19 @@ struct mlxsw_env_module_info {
@@ -47,7 +47,7 @@ index fefb9bb02..2a6630547 100644
static int
mlxsw_env_validate_cable_ident(struct mlxsw_core *core, u8 slot_index, int id,
bool *qsfp, bool *cmis)
@@ -407,6 +413,15 @@ mlxsw_env_get_module_eeprom_by_page(struct mlxsw_core *mlxsw_core,
@@ -405,6 +411,15 @@ mlxsw_env_get_module_eeprom_by_page(struct mlxsw_core *mlxsw_core,
}
EXPORT_SYMBOL(mlxsw_env_get_module_eeprom_by_page);
@@ -63,7 +63,7 @@ index fefb9bb02..2a6630547 100644
static int mlxsw_env_module_reset(struct mlxsw_core *mlxsw_core, u8 slot_index,
u8 module)
{
@@ -423,6 +438,7 @@ int mlxsw_env_reset_module(struct net_device *netdev,
@@ -421,6 +436,7 @@ int mlxsw_env_reset_module(struct net_device *netdev,
u8 module, u32 *flags)
{
struct mlxsw_env *mlxsw_env = mlxsw_core_env(mlxsw_core);
@@ -71,7 +71,7 @@ index fefb9bb02..2a6630547 100644
u32 req = *flags;
int err;
@@ -430,15 +446,16 @@ int mlxsw_env_reset_module(struct net_device *netdev,
@@ -428,15 +444,16 @@ int mlxsw_env_reset_module(struct net_device *netdev,
!(req & (ETH_RESET_PHY << ETH_RESET_SHARED_SHIFT)))
return 0;
@@ -91,7 +91,7 @@ index fefb9bb02..2a6630547 100644
!(req & (ETH_RESET_PHY << ETH_RESET_SHARED_SHIFT))) {
netdev_err(netdev, "Cannot reset module without \"phy-shared\" flag when shared by multiple ports\n");
err = -EINVAL;
@@ -454,7 +471,7 @@ int mlxsw_env_reset_module(struct net_device *netdev,
@@ -452,7 +469,7 @@ int mlxsw_env_reset_module(struct net_device *netdev,
*flags &= ~(ETH_RESET_PHY | (ETH_RESET_PHY << ETH_RESET_SHARED_SHIFT));
out:
@@ -100,7 +100,7 @@ index fefb9bb02..2a6630547 100644
return err;
}
EXPORT_SYMBOL(mlxsw_env_reset_module);
@@ -466,13 +483,15 @@ mlxsw_env_get_module_power_mode(struct mlxsw_core *mlxsw_core, u8 slot_index,
@@ -464,13 +481,15 @@ mlxsw_env_get_module_power_mode(struct mlxsw_core *mlxsw_core, u8 slot_index,
struct netlink_ext_ack *extack)
{
struct mlxsw_env *mlxsw_env = mlxsw_core_env(mlxsw_core);
@@ -118,7 +118,7 @@ index fefb9bb02..2a6630547 100644
mlxsw_reg_mcion_pack(mcion_pl, slot_index, module);
err = mlxsw_reg_query(mlxsw_core, MLXSW_REG(mcion), mcion_pl);
@@ -491,7 +510,7 @@ mlxsw_env_get_module_power_mode(struct mlxsw_core *mlxsw_core, u8 slot_index,
@@ -489,7 +508,7 @@ mlxsw_env_get_module_power_mode(struct mlxsw_core *mlxsw_core, u8 slot_index,
params->mode = ETHTOOL_MODULE_POWER_MODE_HIGH;
out:
@@ -127,7 +127,7 @@ index fefb9bb02..2a6630547 100644
return err;
}
EXPORT_SYMBOL(mlxsw_env_get_module_power_mode);
@@ -573,6 +592,7 @@ mlxsw_env_set_module_power_mode(struct mlxsw_core *mlxsw_core, u8 slot_index,
@@ -571,6 +590,7 @@ mlxsw_env_set_module_power_mode(struct mlxsw_core *mlxsw_core, u8 slot_index,
struct netlink_ext_ack *extack)
{
struct mlxsw_env *mlxsw_env = mlxsw_core_env(mlxsw_core);
@@ -135,7 +135,7 @@ index fefb9bb02..2a6630547 100644
bool low_power;
int err = 0;
@@ -582,13 +602,14 @@ mlxsw_env_set_module_power_mode(struct mlxsw_core *mlxsw_core, u8 slot_index,
@@ -580,13 +600,14 @@ mlxsw_env_set_module_power_mode(struct mlxsw_core *mlxsw_core, u8 slot_index,
return -EOPNOTSUPP;
}
@@ -153,7 +153,7 @@ index fefb9bb02..2a6630547 100644
goto out_set_policy;
low_power = policy == ETHTOOL_MODULE_POWER_MODE_POLICY_AUTO;
@@ -598,9 +619,9 @@ mlxsw_env_set_module_power_mode(struct mlxsw_core *mlxsw_core, u8 slot_index,
@@ -596,9 +617,9 @@ mlxsw_env_set_module_power_mode(struct mlxsw_core *mlxsw_core, u8 slot_index,
goto out;
out_set_policy:
@@ -165,7 +165,7 @@ index fefb9bb02..2a6630547 100644
return err;
}
EXPORT_SYMBOL(mlxsw_env_set_module_power_mode);
@@ -711,6 +732,7 @@ struct mlxsw_env_module_temp_warn_event {
@@ -709,6 +730,7 @@ struct mlxsw_env_module_temp_warn_event {
static void mlxsw_env_mtwe_event_work(struct work_struct *work)
{
struct mlxsw_env_module_temp_warn_event *event;
@@ -173,7 +173,7 @@ index fefb9bb02..2a6630547 100644
struct mlxsw_env *mlxsw_env;
int i, sensor_warning;
bool is_overheat;
@@ -719,7 +741,7 @@ static void mlxsw_env_mtwe_event_work(struct work_struct *work)
@@ -717,7 +739,7 @@ static void mlxsw_env_mtwe_event_work(struct work_struct *work)
work);
mlxsw_env = event->mlxsw_env;
@@ -182,7 +182,7 @@ index fefb9bb02..2a6630547 100644
/* 64-127 of sensor_index are mapped to the port modules
* sequentially (module 0 is mapped to sensor_index 64,
* module 1 to sensor_index 65 and so on)
@@ -727,9 +749,10 @@ static void mlxsw_env_mtwe_event_work(struct work_struct *work)
@@ -725,9 +747,10 @@ static void mlxsw_env_mtwe_event_work(struct work_struct *work)
sensor_warning =
mlxsw_reg_mtwe_sensor_warning_get(event->mtwe_pl,
i + MLXSW_REG_MTMP_MODULE_INDEX_MIN);
@@ -196,7 +196,7 @@ index fefb9bb02..2a6630547 100644
if ((is_overheat && sensor_warning) ||
(!is_overheat && !sensor_warning)) {
@@ -737,21 +760,21 @@ static void mlxsw_env_mtwe_event_work(struct work_struct *work)
@@ -735,21 +758,21 @@ static void mlxsw_env_mtwe_event_work(struct work_struct *work)
* warning OR current state in "no warning" and MTWE
* does not report warning.
*/
@@ -224,7 +224,7 @@ index fefb9bb02..2a6630547 100644
}
}
@@ -809,6 +832,7 @@ struct mlxsw_env_module_plug_unplug_event {
@@ -807,6 +830,7 @@ struct mlxsw_env_module_plug_unplug_event {
static void mlxsw_env_pmpe_event_work(struct work_struct *work)
{
struct mlxsw_env_module_plug_unplug_event *event;
@@ -232,7 +232,7 @@ index fefb9bb02..2a6630547 100644
struct mlxsw_env *mlxsw_env;
bool has_temp_sensor;
u16 sensor_index;
@@ -818,9 +842,12 @@ static void mlxsw_env_pmpe_event_work(struct work_struct *work)
@@ -816,9 +840,12 @@ static void mlxsw_env_pmpe_event_work(struct work_struct *work)
work);
mlxsw_env = event->mlxsw_env;
@@ -248,7 +248,7 @@ index fefb9bb02..2a6630547 100644
err = mlxsw_env_module_has_temp_sensor(mlxsw_env->core,
event->slot_index,
@@ -847,12 +874,14 @@ static void
@@ -845,12 +872,14 @@ static void
mlxsw_env_pmpe_listener_func(const struct mlxsw_reg_info *reg, char *pmpe_pl,
void *priv)
{
@@ -264,7 +264,7 @@ index fefb9bb02..2a6630547 100644
return;
module_status = mlxsw_reg_pmpe_module_status_get(pmpe_pl);
@@ -864,7 +893,7 @@ mlxsw_env_pmpe_listener_func(const struct mlxsw_reg_info *reg, char *pmpe_pl,
@@ -862,7 +891,7 @@ mlxsw_env_pmpe_listener_func(const struct mlxsw_reg_info *reg, char *pmpe_pl,
return;
event->mlxsw_env = mlxsw_env;
@@ -273,7 +273,7 @@ index fefb9bb02..2a6630547 100644
event->module = module;
INIT_WORK(&event->work, mlxsw_env_pmpe_event_work);
mlxsw_core_schedule_work(&event->work);
@@ -922,10 +951,12 @@ mlxsw_env_module_overheat_counter_get(struct mlxsw_core *mlxsw_core, u8 slot_ind
@@ -920,10 +949,12 @@ mlxsw_env_module_overheat_counter_get(struct mlxsw_core *mlxsw_core, u8 slot_ind
u8 module, u64 *p_counter)
{
struct mlxsw_env *mlxsw_env = mlxsw_core_env(mlxsw_core);
@@ -289,7 +289,7 @@ index fefb9bb02..2a6630547 100644
return 0;
}
@@ -935,10 +966,12 @@ void mlxsw_env_module_port_map(struct mlxsw_core *mlxsw_core, u8 slot_index,
@@ -933,10 +964,12 @@ void mlxsw_env_module_port_map(struct mlxsw_core *mlxsw_core, u8 slot_index,
u8 module)
{
struct mlxsw_env *mlxsw_env = mlxsw_core_env(mlxsw_core);
@@ -305,7 +305,7 @@ index fefb9bb02..2a6630547 100644
}
EXPORT_SYMBOL(mlxsw_env_module_port_map);
@@ -946,10 +979,12 @@ void mlxsw_env_module_port_unmap(struct mlxsw_core *mlxsw_core, u8 slot_index,
@@ -944,10 +977,12 @@ void mlxsw_env_module_port_unmap(struct mlxsw_core *mlxsw_core, u8 slot_index,
u8 module)
{
struct mlxsw_env *mlxsw_env = mlxsw_core_env(mlxsw_core);
@@ -321,7 +321,7 @@ index fefb9bb02..2a6630547 100644
}
EXPORT_SYMBOL(mlxsw_env_module_port_unmap);
@@ -957,15 +992,17 @@ int mlxsw_env_module_port_up(struct mlxsw_core *mlxsw_core, u8 slot_index,
@@ -955,15 +990,17 @@ int mlxsw_env_module_port_up(struct mlxsw_core *mlxsw_core, u8 slot_index,
u8 module)
{
struct mlxsw_env *mlxsw_env = mlxsw_core_env(mlxsw_core);
@@ -342,7 +342,7 @@ index fefb9bb02..2a6630547 100644
goto out_inc;
/* Transition to high power mode following first port using the module
@@ -977,9 +1014,9 @@ int mlxsw_env_module_port_up(struct mlxsw_core *mlxsw_core, u8 slot_index,
@@ -975,9 +1012,9 @@ int mlxsw_env_module_port_up(struct mlxsw_core *mlxsw_core, u8 slot_index,
goto out_unlock;
out_inc:
@@ -354,7 +354,7 @@ index fefb9bb02..2a6630547 100644
return err;
}
EXPORT_SYMBOL(mlxsw_env_module_port_up);
@@ -988,16 +1025,18 @@ void mlxsw_env_module_port_down(struct mlxsw_core *mlxsw_core, u8 slot_index,
@@ -986,16 +1023,18 @@ void mlxsw_env_module_port_down(struct mlxsw_core *mlxsw_core, u8 slot_index,
u8 module)
{
struct mlxsw_env *mlxsw_env = mlxsw_core_env(mlxsw_core);
@@ -377,7 +377,7 @@ index fefb9bb02..2a6630547 100644
goto out_unlock;
/* Transition to low power mode following last port using the module
@@ -1007,38 +1046,83 @@ void mlxsw_env_module_port_down(struct mlxsw_core *mlxsw_core, u8 slot_index,
@@ -1005,38 +1044,83 @@ void mlxsw_env_module_port_down(struct mlxsw_core *mlxsw_core, u8 slot_index,
NULL);
out_unlock:
@@ -475,7 +475,7 @@ index fefb9bb02..2a6630547 100644
*p_env = env;
err = mlxsw_env_temp_warn_event_register(mlxsw_core);
@@ -1049,13 +1133,17 @@ int mlxsw_env_init(struct mlxsw_core *mlxsw_core, struct mlxsw_env **p_env)
@@ -1047,13 +1131,17 @@ int mlxsw_env_init(struct mlxsw_core *mlxsw_core, struct mlxsw_env **p_env)
if (err)
goto err_module_plug_event_register;
@@ -495,7 +495,7 @@ index fefb9bb02..2a6630547 100644
if (err)
goto err_temp_event_enable;
@@ -1067,7 +1155,9 @@ int mlxsw_env_init(struct mlxsw_core *mlxsw_core, struct mlxsw_env **p_env)
@@ -1065,7 +1153,9 @@ int mlxsw_env_init(struct mlxsw_core *mlxsw_core, struct mlxsw_env **p_env)
err_module_plug_event_register:
mlxsw_env_temp_warn_event_unregister(env);
err_temp_warn_event_register:
@@ -506,7 +506,7 @@ index fefb9bb02..2a6630547 100644
kfree(env);
return err;
}
@@ -1078,6 +1168,7 @@ void mlxsw_env_fini(struct mlxsw_env *env)
@@ -1076,6 +1166,7 @@ void mlxsw_env_fini(struct mlxsw_env *env)
/* Make sure there is no more event work scheduled. */
mlxsw_core_flush_owq();
mlxsw_env_temp_warn_event_unregister(env);
@@ -516,5 +516,5 @@ index fefb9bb02..2a6630547 100644
kfree(env);
}
--
2.30.2
2.20.1

16
platform/mellanox/non-upstream-patches/patches/0114-mlxsw-core-Move-port-module-events-enablement-to-a-s.patch
View File

@@ -1,8 +1,8 @@
From 9eb9b3172a238d5818d2925e2db6b0f686b31411 Mon Sep 17 00:00:00 2001
From 3c3be37747cb938fff1178f88d611eb00159297b Mon Sep 17 00:00:00 2001
From: Vadim Pasternak <vadimp@nvidia.com>
Date: Tue, 14 Dec 2021 10:57:28 +0200
Subject: [PATCH] mlxsw: core: Move port module events enablement to a separate
function
Subject: [PATCH backport 5.10 114/182] mlxsw: core: Move port module events
enablement to a separate function
Use a separate function for enablement of port module events such
plug/unplug and temperature threshold crossing. The motivation is to
@@ -15,10 +15,10 @@ Signed-off-by: Ido Schimmel <idosch@nvidia.com>
1 file changed, 34 insertions(+), 10 deletions(-)
diff --git a/drivers/net/ethernet/mellanox/mlxsw/core_env.c b/drivers/net/ethernet/mellanox/mlxsw/core_env.c
index 2a6630547..94d44db1a 100644
index 606d89b6f50f..4553dfa68f96 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/core_env.c
+++ b/drivers/net/ethernet/mellanox/mlxsw/core_env.c
@@ -1089,6 +1089,32 @@ static void mlxsw_env_line_cards_free(struct mlxsw_env *env)
@@ -1087,6 +1087,32 @@ static void mlxsw_env_line_cards_free(struct mlxsw_env *env)
kfree(env->line_cards[i]);
}
@@ -51,7 +51,7 @@ index 2a6630547..94d44db1a 100644
int mlxsw_env_init(struct mlxsw_core *mlxsw_core, struct mlxsw_env **p_env)
{
u8 module_count, num_of_slots, max_module_count;
@@ -1137,20 +1163,17 @@ int mlxsw_env_init(struct mlxsw_core *mlxsw_core, struct mlxsw_env **p_env)
@@ -1135,20 +1161,17 @@ int mlxsw_env_init(struct mlxsw_core *mlxsw_core, struct mlxsw_env **p_env)
* is to be set after line card is activated.
*/
env->line_cards[0]->module_count = num_of_slots ? 0 : module_count;
@@ -79,7 +79,7 @@ index 2a6630547..94d44db1a 100644
mlxsw_env_module_plug_event_unregister(env);
err_module_plug_event_register:
mlxsw_env_temp_warn_event_unregister(env);
@@ -1164,6 +1187,7 @@ int mlxsw_env_init(struct mlxsw_core *mlxsw_core, struct mlxsw_env **p_env)
@@ -1162,6 +1185,7 @@ int mlxsw_env_init(struct mlxsw_core *mlxsw_core, struct mlxsw_env **p_env)
void mlxsw_env_fini(struct mlxsw_env *env)
{
@@ -88,5 +88,5 @@ index 2a6630547..94d44db1a 100644
/* Make sure there is no more event work scheduled. */
mlxsw_core_flush_owq();
--
2.30.2
2.20.1

9
platform/mellanox/non-upstream-patches/patches/0115-mlxsw-core_hwmon-Split-gearbox-initialization.patch
View File

@@ -1,7 +1,8 @@
From 4d15dd7f69b89a370731b08cb3f13e5dd591c189 Mon Sep 17 00:00:00 2001
From 1a451b46c16494cfa38bb47495ad632626502681 Mon Sep 17 00:00:00 2001
From: Vadim Pasternak <vadimp@nvidia.com>
Date: Tue, 14 Dec 2021 10:57:29 +0200
Subject: [PATCH] mlxsw: core_hwmon: Split gearbox initialization
Subject: [PATCH backport 5.10 115/182] mlxsw: core_hwmon: Split gearbox
initialization
Split gearbox initialization in two functions - the first one is to be
used for gearbox configuration validation, the second for creation of
@@ -24,7 +25,7 @@ Signed-off-by: Ido Schimmel <idosch@nvidia.com>
1 file changed, 33 insertions(+), 10 deletions(-)
diff --git a/drivers/net/ethernet/mellanox/mlxsw/core_hwmon.c b/drivers/net/ethernet/mellanox/mlxsw/core_hwmon.c
index 5df54a5bf..7061c18b7 100644
index 5df54a5bf292..7061c18b7edc 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/core_hwmon.c
+++ b/drivers/net/ethernet/mellanox/mlxsw/core_hwmon.c
@@ -700,13 +700,11 @@ static int mlxsw_hwmon_module_init(struct mlxsw_hwmon *mlxsw_hwmon)
@@ -117,5 +118,5 @@ index 5df54a5bf..7061c18b7 100644
kfree(mlxsw_hwmon);
}
--
2.30.2
2.20.1

10
platform/mellanox/non-upstream-patches/patches/0116-mlxsw-core_hwmon-Extend-internal-structures-to-suppo.patch
View File

@@ -1,8 +1,8 @@
From 9780cd7afe3455d0ee428f5009514780e858c133 Mon Sep 17 00:00:00 2001
From a18e5112ed12150e245e275e187ecd6d87d66b0e Mon Sep 17 00:00:00 2001
From: Vadim Pasternak <vadimp@nvidia.com>
Date: Tue, 14 Dec 2021 10:57:30 +0200
Subject: [PATCH] mlxsw: core_hwmon: Extend internal structures to support
multi hwmon objects
Subject: [PATCH backport 5.10 116/182] mlxsw: core_hwmon: Extend internal
structures to support multi hwmon objects
Currently, mlxsw supports a single hwmon device and registers it with
attributes corresponding to the various objects found on the main
@@ -32,7 +32,7 @@ Signed-off-by: Ido Schimmel <idosch@nvidia.com>
1 file changed, 112 insertions(+), 80 deletions(-)
diff --git a/drivers/net/ethernet/mellanox/mlxsw/core_hwmon.c b/drivers/net/ethernet/mellanox/mlxsw/core_hwmon.c
index 7061c18b7..31b370862 100644
index 7061c18b7edc..31b370862131 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/core_hwmon.c
+++ b/drivers/net/ethernet/mellanox/mlxsw/core_hwmon.c
@@ -27,7 +27,7 @@
@@ -537,5 +537,5 @@ index 7061c18b7..31b370862 100644
kfree(mlxsw_hwmon);
}
--
2.30.2
2.20.1

10
platform/mellanox/non-upstream-patches/patches/0117-mlxsw-core_hwmon-Introduce-slot-parameter-in-hwmon-i.patch
View File

@@ -1,8 +1,8 @@
From aa8cdb2df37cbfb7bb37f90879d385428e32ae23 Mon Sep 17 00:00:00 2001
From 15f2f79bffb77324a389b7e174f32406924d3a3a Mon Sep 17 00:00:00 2001
From: Vadim Pasternak <vadimp@nvidia.com>
Date: Tue, 14 Dec 2021 10:57:31 +0200
Subject: [PATCH] mlxsw: core_hwmon: Introduce slot parameter in hwmon
interfaces
Subject: [PATCH backport 5.10 117/182] mlxsw: core_hwmon: Introduce slot
parameter in hwmon interfaces
Add 'slot' parameter to 'mlxsw_hwmon_dev' structure. Use this parameter
in mlxsw_reg_mtmp_pack(), mlxsw_reg_mtbr_pack() and
@@ -18,7 +18,7 @@ Signed-off-by: Ido Schimmel <idosch@nvidia.com>
1 file changed, 18 insertions(+), 8 deletions(-)
diff --git a/drivers/net/ethernet/mellanox/mlxsw/core_hwmon.c b/drivers/net/ethernet/mellanox/mlxsw/core_hwmon.c
index 31b370862..0d7edabf1 100644
index 31b370862131..0d7edabf19a4 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/core_hwmon.c
+++ b/drivers/net/ethernet/mellanox/mlxsw/core_hwmon.c
@@ -50,6 +50,7 @@ struct mlxsw_hwmon_dev {
@@ -125,5 +125,5 @@ index 31b370862..0d7edabf1 100644
err = mlxsw_hwmon_temp_init(mlxsw_hwmon->main);
if (err)
--
2.30.2
2.20.1

10
platform/mellanox/non-upstream-patches/patches/0118-mlxsw-core_hwmon-Extend-hwmon-device-with-gearbox-ma.patch
View File

@@ -1,8 +1,8 @@
From 94d3b63c64fc202bfe525cc3b500c23e92d38fbf Mon Sep 17 00:00:00 2001
From c627292817e68e29abdf5fd9be93340251d71f7a Mon Sep 17 00:00:00 2001
From: Vadim Pasternak <vadimp@nvidia.com>
Date: Tue, 14 Dec 2021 10:57:32 +0200
Subject: [PATCH] mlxsw: core_hwmon: Extend hwmon device with gearbox mapping
field
Subject: [PATCH backport 5.10 118/182] mlxsw: core_hwmon: Extend hwmon device
with gearbox mapping field
Add gearbox mapping field to 'mlxsw_hwmon_dev' structure. It should
provide the mapping for gearbox sensor indexes, given gearbox number.
@@ -17,7 +17,7 @@ Signed-off-by: Ido Schimmel <idosch@nvidia.com>
1 file changed, 31 insertions(+), 9 deletions(-)
diff --git a/drivers/net/ethernet/mellanox/mlxsw/core_hwmon.c b/drivers/net/ethernet/mellanox/mlxsw/core_hwmon.c
index 0d7edabf1..6af23f472 100644
index 0d7edabf19a4..6af23f4724e4 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/core_hwmon.c
+++ b/drivers/net/ethernet/mellanox/mlxsw/core_hwmon.c
@@ -32,10 +32,11 @@ struct mlxsw_hwmon_attr {
@@ -132,5 +132,5 @@ index 0d7edabf1..6af23f472 100644
sensor_index, true, true);
err = mlxsw_reg_write(mlxsw_hwmon->core,
--
2.30.2
2.20.1

46
platform/mellanox/non-upstream-patches/patches/0119-mlxsw-core_thermal-Extend-internal-structures-to-sup.patch
View File

@@ -1,8 +1,8 @@
From ab0f9b9dd1f7326242eee0b0a643d6d34e557ae3 Mon Sep 17 00:00:00 2001
From 8851888004e82e73629f031e8af592c36b12c469 Mon Sep 17 00:00:00 2001
From: Vadim Pasternak <vadimp@nvidia.com>
Date: Tue, 14 Dec 2021 10:57:33 +0200
Subject: [PATCH] mlxsw: core_thermal: Extend internal structures to support
multi thermal areas
Subject: [PATCH backport 5.10 119/182] mlxsw: core_thermal: Extend internal
structures to support multi thermal areas
Introduce intermediate level for thermal zones areas.
Currently all thermal zones are associated with thermal objects located
@@ -29,10 +29,10 @@ Signed-off-by: Ido Schimmel <idosch@nvidia.com>
1 file changed, 83 insertions(+), 51 deletions(-)
diff --git a/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c b/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c
index 3f9062f1c..77a484a55 100644
index 4f84c4bb66af..5f8b1e92475b 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c
+++ b/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c
@@ -91,6 +91,15 @@ struct mlxsw_thermal_module {
@@ -83,6 +83,15 @@ struct mlxsw_thermal_module {
struct thermal_zone_device *tzdev;
struct mlxsw_thermal_trip trips[MLXSW_THERMAL_NUM_TRIPS];
int module; /* Module or gearbox number */
@@ -48,7 +48,7 @@ index 3f9062f1c..77a484a55 100644
};
struct mlxsw_thermal {
@@ -101,10 +110,7 @@ struct mlxsw_thermal {
@@ -93,10 +102,7 @@ struct mlxsw_thermal {
struct thermal_cooling_device *cdevs[MLXSW_MFCR_PWMS_MAX];
u8 cooling_levels[MLXSW_THERMAL_MAX_STATE + 1];
struct mlxsw_thermal_trip trips[MLXSW_THERMAL_NUM_TRIPS];
@@ -60,7 +60,7 @@ index 3f9062f1c..77a484a55 100644
unsigned int tz_highest_score;
struct thermal_zone_device *tz_highest_dev;
};
@@ -159,13 +165,15 @@ mlxsw_thermal_module_trips_update(struct device *dev, struct mlxsw_core *core,
@@ -151,13 +157,15 @@ mlxsw_thermal_module_trips_update(struct device *dev, struct mlxsw_core *core,
* EEPROM if we got valid thresholds from MTMP.
*/
if (!emerg_temp || !crit_temp) {
@@ -78,7 +78,7 @@ index 3f9062f1c..77a484a55 100644
SFP_TEMP_HIGH_ALARM,
&emerg_temp);
if (err)
@@ -432,15 +440,16 @@ static int mlxsw_thermal_module_unbind(struct thermal_zone_device *tzdev,
@@ -424,15 +432,16 @@ static int mlxsw_thermal_module_unbind(struct thermal_zone_device *tzdev,
static void
mlxsw_thermal_module_temp_and_thresholds_get(struct mlxsw_core *core,
@@ -98,7 +98,7 @@ index 3f9062f1c..77a484a55 100644
err = mlxsw_reg_query(core, MLXSW_REG(mtmp), mtmp_pl);
if (err) {
/* Set temperature and thresholds to zero to avoid passing
@@ -471,6 +480,7 @@ static int mlxsw_thermal_module_temp_get(struct thermal_zone_device *tzdev,
@@ -463,6 +472,7 @@ static int mlxsw_thermal_module_temp_get(struct thermal_zone_device *tzdev,
/* Read module temperature and thresholds. */
mlxsw_thermal_module_temp_and_thresholds_get(thermal->core,
@@ -106,7 +106,7 @@ index 3f9062f1c..77a484a55 100644
sensor_index, &temp,
&crit_temp, &emerg_temp);
*p_temp = temp;
@@ -585,7 +595,7 @@ static int mlxsw_thermal_gearbox_temp_get(struct thermal_zone_device *tzdev,
@@ -577,7 +587,7 @@ static int mlxsw_thermal_gearbox_temp_get(struct thermal_zone_device *tzdev,
int err;
index = MLXSW_REG_MTMP_GBOX_INDEX_MIN + tz->module;
@@ -115,7 +115,7 @@ index 3f9062f1c..77a484a55 100644
err = mlxsw_reg_query(thermal->core, MLXSW_REG(mtmp), mtmp_pl);
if (err)
@@ -745,25 +755,28 @@ static void mlxsw_thermal_module_tz_fini(struct thermal_zone_device *tzdev)
@@ -704,25 +714,28 @@ static void mlxsw_thermal_module_tz_fini(struct thermal_zone_device *tzdev)
static int
mlxsw_thermal_module_init(struct device *dev, struct mlxsw_core *core,
@@ -147,7 +147,7 @@ index 3f9062f1c..77a484a55 100644
&crit_temp, &emerg_temp);
/* Update trip point according to the module data. */
return mlxsw_thermal_module_trips_update(dev, core, module_tz,
@@ -781,34 +794,39 @@ static void mlxsw_thermal_module_fini(struct mlxsw_thermal_module *module_tz)
@@ -740,34 +753,39 @@ static void mlxsw_thermal_module_fini(struct mlxsw_thermal_module *module_tz)
static int
mlxsw_thermal_modules_init(struct device *dev, struct mlxsw_core *core,
@@ -198,7 +198,7 @@ index 3f9062f1c..77a484a55 100644
if (!module_tz->parent)
continue;
err = mlxsw_thermal_module_tz_init(module_tz);
@@ -820,20 +838,21 @@ mlxsw_thermal_modules_init(struct device *dev, struct mlxsw_core *core,
@@ -779,20 +797,21 @@ mlxsw_thermal_modules_init(struct device *dev, struct mlxsw_core *core,
err_thermal_module_tz_init:
err_thermal_module_init:
@@ -227,7 +227,7 @@ index 3f9062f1c..77a484a55 100644
}
static int
@@ -869,7 +888,8 @@ mlxsw_thermal_gearbox_tz_fini(struct mlxsw_thermal_module *gearbox_tz)
@@ -828,7 +847,8 @@ mlxsw_thermal_gearbox_tz_fini(struct mlxsw_thermal_module *gearbox_tz)
static int
mlxsw_thermal_gearboxes_init(struct device *dev, struct mlxsw_core *core,
@@ -237,7 +237,7 @@ index 3f9062f1c..77a484a55 100644
{
enum mlxsw_reg_mgpir_device_type device_type;
struct mlxsw_thermal_module *gearbox_tz;
@@ -889,19 +909,20 @@ mlxsw_thermal_gearboxes_init(struct device *dev, struct mlxsw_core *core,
@@ -848,19 +868,20 @@ mlxsw_thermal_gearboxes_init(struct device *dev, struct mlxsw_core *core,
!gbox_num)
return 0;
@@ -265,7 +265,7 @@ index 3f9062f1c..77a484a55 100644
err = mlxsw_thermal_gearbox_tz_init(gearbox_tz);
if (err)
goto err_thermal_gearbox_tz_init;
@@ -911,19 +932,20 @@ mlxsw_thermal_gearboxes_init(struct device *dev, struct mlxsw_core *core,
@@ -870,19 +891,20 @@ mlxsw_thermal_gearboxes_init(struct device *dev, struct mlxsw_core *core,
err_thermal_gearbox_tz_init:
for (i--; i >= 0; i--)
@@ -292,7 +292,7 @@ index 3f9062f1c..77a484a55 100644
}
int mlxsw_thermal_init(struct mlxsw_core *core,
@@ -943,9 +965,16 @@ int mlxsw_thermal_init(struct mlxsw_core *core,
@@ -902,9 +924,16 @@ int mlxsw_thermal_init(struct mlxsw_core *core,
if (!thermal)
return -ENOMEM;
@@ -309,7 +309,7 @@ index 3f9062f1c..77a484a55 100644
err = mlxsw_reg_query(thermal->core, MLXSW_REG(mfcr), mfcr_pl);
if (err) {
@@ -1012,11 +1041,11 @@ int mlxsw_thermal_init(struct mlxsw_core *core,
@@ -970,11 +999,11 @@ int mlxsw_thermal_init(struct mlxsw_core *core,
goto err_thermal_zone_device_register;
}
@@ -323,7 +323,7 @@ index 3f9062f1c..77a484a55 100644
if (err)
goto err_thermal_gearboxes_init;
@@ -1028,9 +1057,9 @@ int mlxsw_thermal_init(struct mlxsw_core *core,
@@ -986,9 +1015,9 @@ int mlxsw_thermal_init(struct mlxsw_core *core,
return 0;
err_thermal_zone_device_enable:
@@ -335,7 +335,7 @@ index 3f9062f1c..77a484a55 100644
err_thermal_modules_init:
if (thermal->tzdev) {
thermal_zone_device_unregister(thermal->tzdev);
@@ -1043,6 +1072,8 @@ int mlxsw_thermal_init(struct mlxsw_core *core,
@@ -1001,6 +1030,8 @@ int mlxsw_thermal_init(struct mlxsw_core *core,
thermal_cooling_device_unregister(thermal->cdevs[i]);
err_reg_write:
err_reg_query:
@@ -344,7 +344,7 @@ index 3f9062f1c..77a484a55 100644
devm_kfree(dev, thermal);
return err;
}
@@ -1051,8 +1082,8 @@ void mlxsw_thermal_fini(struct mlxsw_thermal *thermal)
@@ -1009,8 +1040,8 @@ void mlxsw_thermal_fini(struct mlxsw_thermal *thermal)
{
int i;
@@ -355,7 +355,7 @@ index 3f9062f1c..77a484a55 100644
if (thermal->tzdev) {
thermal_zone_device_unregister(thermal->tzdev);
thermal->tzdev = NULL;
@@ -1065,5 +1096,6 @@ void mlxsw_thermal_fini(struct mlxsw_thermal *thermal)
@@ -1023,5 +1054,6 @@ void mlxsw_thermal_fini(struct mlxsw_thermal *thermal)
}
}
@@ -363,5 +363,5 @@ index 3f9062f1c..77a484a55 100644
devm_kfree(thermal->bus_info->dev, thermal);
}
--
2.30.2
2.20.1

25
platform/mellanox/non-upstream-patches/patches/0120-mlxsw-core_thermal-Split-gearbox-initialization.patch
View File

@@ -1,7 +1,8 @@
From 219381cde0a7294834aff7e3f30584182b26a2b6 Mon Sep 17 00:00:00 2001
From ed83386ce79974230c5fa59245efe760046d944c Mon Sep 17 00:00:00 2001
From: Vadim Pasternak <vadimp@nvidia.com>
Date: Tue, 14 Dec 2021 10:57:34 +0200
Subject: [PATCH] mlxsw: core_thermal: Split gearbox initialization
Subject: [PATCH backport 5.10 120/182] mlxsw: core_thermal: Split gearbox
initialization
Split gearbox initialization in two routines - the first one is to be
used for gearbox configuration validation, the second for creation of
@@ -26,10 +27,10 @@ Signed-off-by: Ido Schimmel <idosch@nvidia.com>
1 file changed, 34 insertions(+), 9 deletions(-)
diff --git a/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c b/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c
index 77a484a55..a8ecd8fea 100644
index 5f8b1e92475b..313856b88f6c 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c
+++ b/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c
@@ -887,15 +887,12 @@ mlxsw_thermal_gearbox_tz_fini(struct mlxsw_thermal_module *gearbox_tz)
@@ -846,15 +846,12 @@ mlxsw_thermal_gearbox_tz_fini(struct mlxsw_thermal_module *gearbox_tz)
}
static int
@@ -47,7 +48,7 @@ index 77a484a55..a8ecd8fea 100644
int err;
mlxsw_reg_mgpir_pack(mgpir_pl, 0);
@@ -905,8 +902,11 @@ mlxsw_thermal_gearboxes_init(struct device *dev, struct mlxsw_core *core,
@@ -864,8 +861,11 @@ mlxsw_thermal_gearboxes_init(struct device *dev, struct mlxsw_core *core,
mlxsw_reg_mgpir_unpack(mgpir_pl, &gbox_num, &device_type, NULL,
NULL, NULL);
@@ -61,7 +62,7 @@ index 77a484a55..a8ecd8fea 100644
return 0;
area->tz_gearbox_num = gbox_num;
@@ -916,6 +916,26 @@ mlxsw_thermal_gearboxes_init(struct device *dev, struct mlxsw_core *core,
@@ -875,6 +875,26 @@ mlxsw_thermal_gearboxes_init(struct device *dev, struct mlxsw_core *core,
if (!area->tz_gearbox_arr)
return -ENOMEM;
@@ -88,7 +89,7 @@ index 77a484a55..a8ecd8fea 100644
for (i = 0; i < area->tz_gearbox_num; i++) {
gearbox_tz = &area->tz_gearbox_arr[i];
memcpy(gearbox_tz->trips, default_thermal_trips,
@@ -933,7 +953,6 @@ mlxsw_thermal_gearboxes_init(struct device *dev, struct mlxsw_core *core,
@@ -892,7 +912,6 @@ mlxsw_thermal_gearboxes_init(struct device *dev, struct mlxsw_core *core,
err_thermal_gearbox_tz_init:
for (i--; i >= 0; i--)
mlxsw_thermal_gearbox_tz_fini(&area->tz_gearbox_arr[i]);
@@ -96,7 +97,7 @@ index 77a484a55..a8ecd8fea 100644
return err;
}
@@ -945,7 +964,6 @@ mlxsw_thermal_gearboxes_fini(struct mlxsw_thermal *thermal,
@@ -904,7 +923,6 @@ mlxsw_thermal_gearboxes_fini(struct mlxsw_thermal *thermal,
for (i = area->tz_gearbox_num - 1; i >= 0; i--)
mlxsw_thermal_gearbox_tz_fini(&area->tz_gearbox_arr[i]);
@@ -104,7 +105,7 @@ index 77a484a55..a8ecd8fea 100644
}
int mlxsw_thermal_init(struct mlxsw_core *core,
@@ -1045,6 +1063,10 @@ int mlxsw_thermal_init(struct mlxsw_core *core,
@@ -1003,6 +1021,10 @@ int mlxsw_thermal_init(struct mlxsw_core *core,
if (err)
goto err_thermal_modules_init;
@@ -115,7 +116,7 @@ index 77a484a55..a8ecd8fea 100644
err = mlxsw_thermal_gearboxes_init(dev, core, thermal, thermal->main);
if (err)
goto err_thermal_gearboxes_init;
@@ -1059,6 +1081,8 @@ int mlxsw_thermal_init(struct mlxsw_core *core,
@@ -1017,6 +1039,8 @@ int mlxsw_thermal_init(struct mlxsw_core *core,
err_thermal_zone_device_enable:
mlxsw_thermal_gearboxes_fini(thermal, thermal->main);
err_thermal_gearboxes_init:
@@ -124,7 +125,7 @@ index 77a484a55..a8ecd8fea 100644
mlxsw_thermal_modules_fini(thermal, thermal->main);
err_thermal_modules_init:
if (thermal->tzdev) {
@@ -1083,6 +1107,7 @@ void mlxsw_thermal_fini(struct mlxsw_thermal *thermal)
@@ -1041,6 +1065,7 @@ void mlxsw_thermal_fini(struct mlxsw_thermal *thermal)
int i;
mlxsw_thermal_gearboxes_fini(thermal, thermal->main);
@@ -133,5 +134,5 @@ index 77a484a55..a8ecd8fea 100644
if (thermal->tzdev) {
thermal_zone_device_unregister(thermal->tzdev);
--
2.30.2
2.20.1

22
platform/mellanox/non-upstream-patches/patches/0121-mlxsw-core_thermal-Extend-thermal-area-with-gearbox-.patch
View File

@@ -1,8 +1,8 @@
From 9c8482e7c487a0a19f0d6d5df06c70aa529d3023 Mon Sep 17 00:00:00 2001
From 13a7ef7fcdc09def9d9756510f49da82283d78df Mon Sep 17 00:00:00 2001
From: Vadim Pasternak <vadimp@nvidia.com>
Date: Tue, 14 Dec 2021 10:57:35 +0200
Subject: [PATCH] mlxsw: core_thermal: Extend thermal area with gearbox mapping
field
Subject: [PATCH backport 5.10 121/182] mlxsw: core_thermal: Extend thermal
area with gearbox mapping field
Add gearbox mapping field 'gearbox_sensor_map' to
'mlxsw_thermal_module' structure. It should provide the mapping for
@@ -18,10 +18,10 @@ Signed-off-by: Ido Schimmel <idosch@nvidia.com>
1 file changed, 25 insertions(+), 8 deletions(-)
diff --git a/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c b/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c
index a8ecd8fea..2efedd35b 100644
index 313856b88f6c..bde5489d9240 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c
+++ b/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c
@@ -85,9 +85,11 @@ static const struct mlxsw_thermal_trip default_thermal_trips[] = {
@@ -77,9 +77,11 @@ static const struct mlxsw_thermal_trip default_thermal_trips[] = {
#define MLXSW_THERMAL_TRIP_MASK (BIT(MLXSW_THERMAL_NUM_TRIPS) - 1)
struct mlxsw_thermal;
@@ -33,7 +33,7 @@ index a8ecd8fea..2efedd35b 100644
struct thermal_zone_device *tzdev;
struct mlxsw_thermal_trip trips[MLXSW_THERMAL_NUM_TRIPS];
int module; /* Module or gearbox number */
@@ -100,6 +102,7 @@ struct mlxsw_thermal_area {
@@ -92,6 +94,7 @@ struct mlxsw_thermal_area {
struct mlxsw_thermal_module *tz_gearbox_arr;
u8 tz_gearbox_num;
u8 slot_index;
@@ -41,7 +41,7 @@ index a8ecd8fea..2efedd35b 100644
};
struct mlxsw_thermal {
@@ -594,7 +597,7 @@ static int mlxsw_thermal_gearbox_temp_get(struct thermal_zone_device *tzdev,
@@ -586,7 +589,7 @@ static int mlxsw_thermal_gearbox_temp_get(struct thermal_zone_device *tzdev,
int temp;
int err;
@@ -50,7 +50,7 @@ index a8ecd8fea..2efedd35b 100644
mlxsw_reg_mtmp_pack(mtmp_pl, tz->slot_index, index, false, false);
err = mlxsw_reg_query(thermal->core, MLXSW_REG(mtmp), mtmp_pl);
@@ -768,6 +771,7 @@ mlxsw_thermal_module_init(struct device *dev, struct mlxsw_core *core,
@@ -727,6 +730,7 @@ mlxsw_thermal_module_init(struct device *dev, struct mlxsw_core *core,
if (module_tz->parent)
return 0;
module_tz->module = module;
@@ -58,7 +58,7 @@ index a8ecd8fea..2efedd35b 100644
module_tz->slot_index = area->slot_index;
module_tz->parent = thermal;
memcpy(module_tz->trips, default_thermal_trips,
@@ -892,36 +896,48 @@ mlxsw_thermal_gearboxes_main_init(struct device *dev, struct mlxsw_core *core,
@@ -851,36 +855,48 @@ mlxsw_thermal_gearboxes_main_init(struct device *dev, struct mlxsw_core *core,
{
enum mlxsw_reg_mgpir_device_type device_type;
char mgpir_pl[MLXSW_REG_MGPIR_LEN];
@@ -114,7 +114,7 @@ index a8ecd8fea..2efedd35b 100644
kfree(area->tz_gearbox_arr);
}
@@ -942,6 +958,7 @@ mlxsw_thermal_gearboxes_init(struct device *dev, struct mlxsw_core *core,
@@ -901,6 +917,7 @@ mlxsw_thermal_gearboxes_init(struct device *dev, struct mlxsw_core *core,
sizeof(thermal->trips));
gearbox_tz->module = i;
gearbox_tz->parent = thermal;
@@ -123,5 +123,5 @@ index a8ecd8fea..2efedd35b 100644
err = mlxsw_thermal_gearbox_tz_init(gearbox_tz);
if (err)
--
2.30.2
2.20.1

14
platform/mellanox/non-upstream-patches/patches/0122-mlxsw-core_thermal-Add-line-card-id-prefix-to-line-c.patch
View File

@@ -1,8 +1,8 @@
From 3f3548804a89b7fbe15fa92ea8686f08b990b083 Mon Sep 17 00:00:00 2001
From 901e0ed6354f716b23854ad2f8e4eeb9a74414ab Mon Sep 17 00:00:00 2001
From: Vadim Pasternak <vadimp@nvidia.com>
Date: Tue, 14 Dec 2021 10:57:36 +0200
Subject: [PATCH] mlxsw: core_thermal: Add line card id prefix to line card
thermal zone name
Subject: [PATCH backport 5.10 122/182] mlxsw: core_thermal: Add line card id
prefix to line card thermal zone name
Add prefix "lc#n" to thermal zones associated with the thermal objects
found on line cards.
@@ -21,10 +21,10 @@ Signed-off-by: Ido Schimmel <idosch@nvidia.com>
1 file changed, 12 insertions(+), 4 deletions(-)
diff --git a/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c b/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c
index 2efedd35b..421555d3f 100644
index bde5489d9240..4964c9164c2d 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c
+++ b/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c
@@ -730,8 +730,12 @@ mlxsw_thermal_module_tz_init(struct mlxsw_thermal_module *module_tz)
@@ -689,8 +689,12 @@ mlxsw_thermal_module_tz_init(struct mlxsw_thermal_module *module_tz)
char tz_name[MLXSW_THERMAL_ZONE_MAX_NAME];
int err;
@@ -39,7 +39,7 @@ index 2efedd35b..421555d3f 100644
module_tz->tzdev = thermal_zone_device_register(tz_name,
MLXSW_THERMAL_NUM_TRIPS,
MLXSW_THERMAL_TRIP_MASK,
@@ -865,8 +869,12 @@ mlxsw_thermal_gearbox_tz_init(struct mlxsw_thermal_module *gearbox_tz)
@@ -824,8 +828,12 @@ mlxsw_thermal_gearbox_tz_init(struct mlxsw_thermal_module *gearbox_tz)
char tz_name[MLXSW_THERMAL_ZONE_MAX_NAME];
int ret;
@@ -55,5 +55,5 @@ index 2efedd35b..421555d3f 100644
MLXSW_THERMAL_NUM_TRIPS,
MLXSW_THERMAL_TRIP_MASK,
--
2.30.2
2.20.1

12
platform/mellanox/non-upstream-patches/patches/0123-mlxsw-core_thermal-Use-exact-name-of-cooling-devices.patch
View File

@@ -1,8 +1,8 @@
From 34251eb77f3f50ac2d574876f33c65d8d2c70e9c Mon Sep 17 00:00:00 2001
From 7e5f922bac5153137a8b1f486728d9d95b4922bc Mon Sep 17 00:00:00 2001
From: Vadim Pasternak <vadimp@nvidia.com>
Date: Tue, 14 Dec 2021 10:57:37 +0200
Subject: [PATCH] mlxsw: core_thermal: Use exact name of cooling devices for
binding
Subject: [PATCH backport 5.10 123/182] mlxsw: core_thermal: Use exact name of
cooling devices for binding
Modular system supports additional cooling devices "mlxreg_fan1",
"mlxreg_fan2", etcetera. Thermal zones in "mlxsw" driver should be
@@ -17,10 +17,10 @@ Signed-off-by: Ido Schimmel <idosch@nvidia.com>
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c b/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c
index 421555d3f..a20a91285 100644
index 4964c9164c2d..64c6a78f3aa0 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c
+++ b/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c
@@ -141,8 +141,7 @@ static int mlxsw_get_cooling_device_idx(struct mlxsw_thermal *thermal,
@@ -133,8 +133,7 @@ static int mlxsw_get_cooling_device_idx(struct mlxsw_thermal *thermal,
/* Allow mlxsw thermal zone binding to an external cooling device */
for (i = 0; i < ARRAY_SIZE(mlxsw_thermal_external_allowed_cdev); i++) {
@@ -31,5 +31,5 @@ index 421555d3f..a20a91285 100644
}
--
2.30.2
2.20.1

19
platform/mellanox/non-upstream-patches/patches/0124-mlxsw-core_thermal-Use-common-define-for-thermal-zon.patch
View File

@@ -1,20 +1,21 @@
From 56370efd25ad5b77b87645d779dd577674c12864 Mon Sep 17 00:00:00 2001
From 8d06868f51917926f99299eaac26d6f86eff3593 Mon Sep 17 00:00:00 2001
From: Vadim Pasternak <vadimp@nvidia.com>
Date: Tue, 14 Dec 2021 10:57:38 +0200
Subject: [PATCH] mlxsw: core_thermal: Use common define for thermal zone name
length
Date: Wed, 13 Apr 2022 18:17:33 +0300
Subject: [PATCH backport 5.10 124/182] mlxsw: core_thermal: Use common define
for thermal zone name length
Replace internal define 'MLXSW_THERMAL_ZONE_MAX_NAME' by common
'THERMAL_NAME_LENGTH'.
Signed-off-by: Vadim Pasternak <vadimp@nvidia.com>
Signed-off-by: Ido Schimmel <idosch@nvidia.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
---
drivers/net/ethernet/mellanox/mlxsw/core_thermal.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c b/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c
index a20a91285..e860cade5 100644
index 64c6a78f3aa0..b9253c9f70d9 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c
+++ b/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c
@@ -21,7 +21,6 @@
@@ -24,8 +25,8 @@ index a20a91285..e860cade5 100644
-#define MLXSW_THERMAL_ZONE_MAX_NAME 16
#define MLXSW_THERMAL_TEMP_SCORE_MAX GENMASK(31, 0)
#define MLXSW_THERMAL_MAX_STATE 10
#define MLXSW_THERMAL_MAX_DUTY 255
@@ -726,7 +725,7 @@ static const struct thermal_cooling_device_ops mlxsw_cooling_ops = {
#define MLXSW_THERMAL_MIN_STATE 2
@@ -685,7 +684,7 @@ static const struct thermal_cooling_device_ops mlxsw_cooling_ops = {
static int
mlxsw_thermal_module_tz_init(struct mlxsw_thermal_module *module_tz)
{
@@ -34,7 +35,7 @@ index a20a91285..e860cade5 100644
int err;
if (module_tz->slot_index)
@@ -865,7 +864,7 @@ mlxsw_thermal_modules_fini(struct mlxsw_thermal *thermal,
@@ -824,7 +823,7 @@ mlxsw_thermal_modules_fini(struct mlxsw_thermal *thermal,
static int
mlxsw_thermal_gearbox_tz_init(struct mlxsw_thermal_module *gearbox_tz)
{
@@ -44,5 +45,5 @@ index a20a91285..e860cade5 100644
if (gearbox_tz->slot_index)
--
2.30.2
2.20.1

13
platform/mellanox/non-upstream-patches/patches/0125-devlink-add-support-to-create-line-card-and-expose-t.patch
View File

@@ -1,7 +1,8 @@
From 242d6e2b00a25ec4184a63cec76c9f7f7c235594 Mon Sep 17 00:00:00 2001
From 36a2e4e93d7d1ca2ed670b4cf827400ba367e290 Mon Sep 17 00:00:00 2001
From: Vadim Pasternak <vadimp@nvidia.com>
Date: Wed, 22 Dec 2021 08:57:27 +0000
Subject: [PATCH] devlink: add support to create line card and expose to user
Subject: [PATCH backport 5.10 125/182] devlink: add support to create line
card and expose to user
Extend the devlink API so the driver is going to be able to create and
destroy linecard instances. There can be multiple line cards per devlink
@@ -16,7 +17,7 @@ Signed-off-by: Jiri Pirko <jiri@nvidia.com>
3 files changed, 339 insertions(+), 1 deletion(-)
diff --git a/include/net/devlink.h b/include/net/devlink.h
index b01bb9bca..e8f046590 100644
index b01bb9bca5a2..e8f046590579 100644
--- a/include/net/devlink.h
+++ b/include/net/devlink.h
@@ -31,6 +31,7 @@ struct devlink_dev_stats {
@@ -70,7 +71,7 @@ index b01bb9bca..e8f046590 100644
u32 size, u16 ingress_pools_count,
u16 egress_pools_count, u16 ingress_tc_count,
diff --git a/include/uapi/linux/devlink.h b/include/uapi/linux/devlink.h
index cf89c318f..ff07ad596 100644
index cf89c318f2ac..ff07ad596035 100644
--- a/include/uapi/linux/devlink.h
+++ b/include/uapi/linux/devlink.h
@@ -126,6 +126,16 @@ enum devlink_command {
@@ -110,7 +111,7 @@ index cf89c318f..ff07ad596 100644
__DEVLINK_ATTR_MAX,
diff --git a/net/core/devlink.c b/net/core/devlink.c
index 72047750d..645fe0612 100644
index 72047750dcd9..645fe0612b53 100644
--- a/net/core/devlink.c
+++ b/net/core/devlink.c
@@ -91,6 +91,25 @@ static const struct nla_policy devlink_function_nl_policy[DEVLINK_PORT_FUNCTION_
@@ -527,5 +528,5 @@ index 72047750d..645fe0612 100644
u32 size, u16 ingress_pools_count,
u16 egress_pools_count, u16 ingress_tc_count,
--
2.30.2
2.20.1

13
platform/mellanox/non-upstream-patches/patches/0126-devlink-implement-line-card-provisioning.patch
View File

@@ -1,7 +1,8 @@
From b0a30f401ca5d69f3cd78a0bf6dd1471f7aea0be Mon Sep 17 00:00:00 2001
From 37d223fa389636092d519ca903f186d608eed3c8 Mon Sep 17 00:00:00 2001
From: Jiri Pirko <jiri@nvidia.com>
Date: Thu, 31 Dec 2020 17:35:08 +0100
Subject: [PATCH] devlink: implement line card provisioning
Subject: [PATCH backport 5.10 126/182] devlink: implement line card
provisioning
In order to be able to configure all needed stuff on a port/netdevice
of a line card without the line card being present, introduce line card
@@ -28,7 +29,7 @@ Signed-off-by: Jiri Pirko <jiri@nvidia.com>
3 files changed, 346 insertions(+), 21 deletions(-)
diff --git a/include/net/devlink.h b/include/net/devlink.h
index e8f046590..44b60085e 100644
index e8f046590579..44b60085ec16 100644
--- a/include/net/devlink.h
+++ b/include/net/devlink.h
@@ -142,11 +142,43 @@ struct devlink_port {
@@ -93,7 +94,7 @@ index e8f046590..44b60085e 100644
u32 size, u16 ingress_pools_count,
u16 egress_pools_count, u16 ingress_tc_count,
diff --git a/include/uapi/linux/devlink.h b/include/uapi/linux/devlink.h
index ff07ad596..d88336645 100644
index ff07ad596035..d8833664522f 100644
--- a/include/uapi/linux/devlink.h
+++ b/include/uapi/linux/devlink.h
@@ -334,6 +334,18 @@ enum devlink_reload_limit {
@@ -126,7 +127,7 @@ index ff07ad596..d88336645 100644
/* add new attributes above here, update the policy in devlink.c */
diff --git a/net/core/devlink.c b/net/core/devlink.c
index 645fe0612..943973ffc 100644
index 645fe0612b53..943973ffc450 100644
--- a/net/core/devlink.c
+++ b/net/core/devlink.c
@@ -265,8 +265,10 @@ devlink_linecard_get_from_info(struct devlink *devlink, struct genl_info *info)
@@ -550,5 +551,5 @@ index 645fe0612..943973ffc 100644
u32 size, u16 ingress_pools_count,
u16 egress_pools_count, u16 ingress_tc_count,
--
2.30.2
2.20.1

13
platform/mellanox/non-upstream-patches/patches/0127-devlink-implement-line-card-active-state.patch
View File

@@ -1,7 +1,8 @@
From 999c148a0a19a6a6c96dbc5b6615285d80c28de9 Mon Sep 17 00:00:00 2001
From 9edffb671d73df181e382930bda0a3870e6ac120 Mon Sep 17 00:00:00 2001
From: Jiri Pirko <jiri@nvidia.com>
Date: Wed, 6 Jan 2021 16:03:43 +0100
Subject: [PATCH] devlink: implement line card active state
Subject: [PATCH backport 5.10 127/182] devlink: implement line card active
state
Allow driver to mark a linecard as active. Expose this state to the
userspace over devlink netlink interface with proper notifications.
@@ -14,7 +15,7 @@ Signed-off-by: Jiri Pirko <jiri@nvidia.com>
3 files changed, 40 insertions(+)
diff --git a/include/net/devlink.h b/include/net/devlink.h
index 44b60085e..d9b2b559c 100644
index 44b60085ec16..d9b2b559c9a2 100644
--- a/include/net/devlink.h
+++ b/include/net/devlink.h
@@ -157,6 +157,7 @@ struct devlink_linecard {
@@ -35,7 +36,7 @@ index 44b60085e..d9b2b559c 100644
u32 size, u16 ingress_pools_count,
u16 egress_pools_count, u16 ingress_tc_count,
diff --git a/include/uapi/linux/devlink.h b/include/uapi/linux/devlink.h
index d88336645..5ace55666 100644
index d8833664522f..5ace55666d27 100644
--- a/include/uapi/linux/devlink.h
+++ b/include/uapi/linux/devlink.h
@@ -341,6 +341,7 @@ enum devlink_linecard_state {
@@ -47,7 +48,7 @@ index d88336645..5ace55666 100644
__DEVLINK_LINECARD_STATE_MAX,
DEVLINK_LINECARD_STATE_MAX = __DEVLINK_LINECARD_STATE_MAX - 1
diff --git a/net/core/devlink.c b/net/core/devlink.c
index 943973ffc..724633810 100644
index 943973ffc450..724633810758 100644
--- a/net/core/devlink.c
+++ b/net/core/devlink.c
@@ -9001,6 +9001,42 @@ void devlink_linecard_provision_fail(struct devlink_linecard *linecard)
@@ -94,5 +95,5 @@ index 943973ffc..724633810 100644
u32 size, u16 ingress_pools_count,
u16 egress_pools_count, u16 ingress_tc_count,
--
2.30.2
2.20.1

11
platform/mellanox/non-upstream-patches/patches/0128-devlink-add-port-to-line-card-relationship-set.patch
View File

@@ -1,7 +1,8 @@
From ce052dd9aec77733b55fe1285a9be5c4cbcc87b3 Mon Sep 17 00:00:00 2001
From fb810d890bd142a7cfc14fb7e5f1519eee366208 Mon Sep 17 00:00:00 2001
From: Vadim Pasternak <vadimp@nvidia.com>
Date: Wed, 22 Dec 2021 14:10:14 +0000
Subject: [PATCH] devlink: add port to line card relationship set
Subject: [PATCH backport 5.10 128/182] devlink: add port to line card
relationship set
In order to properly inform user about relationship between port and
line card, introduce a driver API to set line card for a port. Use this
@@ -16,7 +17,7 @@ Signed-off-by: Jiri Pirko <jiri@nvidia.com>
2 files changed, 32 insertions(+), 6 deletions(-)
diff --git a/include/net/devlink.h b/include/net/devlink.h
index d9b2b559c..3d4ceb290 100644
index d9b2b559c9a2..3d4ceb2902b8 100644
--- a/include/net/devlink.h
+++ b/include/net/devlink.h
@@ -140,6 +140,8 @@ struct devlink_port {
@@ -38,7 +39,7 @@ index d9b2b559c..3d4ceb290 100644
devlink_linecard_create(struct devlink *devlink, unsigned int linecard_index,
const struct devlink_linecard_ops *ops, void *priv);
diff --git a/net/core/devlink.c b/net/core/devlink.c
index 724633810..b43e93ccc 100644
index 724633810758..b43e93ccc672 100644
--- a/net/core/devlink.c
+++ b/net/core/devlink.c
@@ -905,6 +905,10 @@ static int devlink_nl_port_fill(struct sk_buff *msg, struct devlink *devlink,
@@ -97,5 +98,5 @@ index 724633810..b43e93ccc 100644
case DEVLINK_PORT_FLAVOUR_CPU:
case DEVLINK_PORT_FLAVOUR_DSA:
--
2.30.2
2.20.1

13
platform/mellanox/non-upstream-patches/patches/0129-devlink-introduce-linecard-info-get-message.patch
View File

@@ -1,7 +1,8 @@
From fdc91e1289c5e491e93f7d7a872d2d656d1d0e7f Mon Sep 17 00:00:00 2001
From 13e29cf4f38755ae717615071b07cd438e8819e6 Mon Sep 17 00:00:00 2001
From: Jiri Pirko <jiri@nvidia.com>
Date: Fri, 19 Feb 2021 09:36:15 +0100
Subject: [PATCH] devlink: introduce linecard info get message
Subject: [PATCH backport 5.10 129/182] devlink: introduce linecard info get
message
Allow the driver to provide per line card info get op to fill-up info,
similar to the "devlink dev info".
@@ -14,7 +15,7 @@ Signed-off-by: Jiri Pirko <jiri@nvidia.com>
3 files changed, 140 insertions(+), 5 deletions(-)
diff --git a/include/net/devlink.h b/include/net/devlink.h
index 3d4ceb290..059bed6ae 100644
index 3d4ceb2902b8..059bed6aef3c 100644
--- a/include/net/devlink.h
+++ b/include/net/devlink.h
@@ -162,6 +162,8 @@ struct devlink_linecard {
@@ -53,7 +54,7 @@ index 3d4ceb290..059bed6ae 100644
/**
* struct devlink_region_ops - Region operations
diff --git a/include/uapi/linux/devlink.h b/include/uapi/linux/devlink.h
index 5ace55666..2c9f7d584 100644
index 5ace55666d27..2c9f7d584b48 100644
--- a/include/uapi/linux/devlink.h
+++ b/include/uapi/linux/devlink.h
@@ -136,6 +136,8 @@ enum devlink_command {
@@ -74,7 +75,7 @@ index 5ace55666..2c9f7d584 100644
/* add new attributes above here, update the policy in devlink.c */
diff --git a/net/core/devlink.c b/net/core/devlink.c
index b43e93ccc..04f8038f8 100644
index b43e93ccc672..04f8038f8e23 100644
--- a/net/core/devlink.c
+++ b/net/core/devlink.c
@@ -1245,6 +1245,10 @@ struct devlink_linecard_type {
@@ -241,5 +242,5 @@ index b43e93ccc..04f8038f8 100644
.cmd = DEVLINK_CMD_SB_GET,
.validate = GENL_DONT_VALIDATE_STRICT | GENL_DONT_VALIDATE_DUMP,
--
2.30.2
2.20.1

13
platform/mellanox/non-upstream-patches/patches/0130-devlink-introduce-linecard-info-get-message.patch
View File

@@ -1,7 +1,8 @@
From 7a39de95203f7dc033bdc81703989d627f2ca0de Mon Sep 17 00:00:00 2001
From b8243b5c2fdb9871cd55a864b95e197ced9ad532 Mon Sep 17 00:00:00 2001
From: Vadim Pasternak <vadimp@nvidia.com>
Date: Wed, 22 Dec 2021 15:11:36 +0000
Subject: [PATCH] devlink: introduce linecard info get message
Subject: [PATCH backport 5.10 130/182] devlink: introduce linecard info get
message
Allow the driver to provide per line card info get op to fill-up info,
similar to the "devlink dev info".
@@ -23,7 +24,7 @@ Signed-off-by: Jiri Pirko <jiri@nvidia.com>
3 files changed, 182 insertions(+)
diff --git a/include/net/devlink.h b/include/net/devlink.h
index 059bed6ae..06b61c1d7 100644
index 059bed6aef3c..06b61c1d7938 100644
--- a/include/net/devlink.h
+++ b/include/net/devlink.h
@@ -160,9 +160,11 @@ struct devlink_linecard {
@@ -63,7 +64,7 @@ index 059bed6ae..06b61c1d7 100644
const char *type);
void devlink_linecard_provision_clear(struct devlink_linecard *linecard);
diff --git a/include/uapi/linux/devlink.h b/include/uapi/linux/devlink.h
index 2c9f7d584..bac94c3c1 100644
index 2c9f7d584b48..bac94c3c1bb0 100644
--- a/include/uapi/linux/devlink.h
+++ b/include/uapi/linux/devlink.h
@@ -569,6 +569,10 @@ enum devlink_attr {
@@ -78,7 +79,7 @@ index 2c9f7d584..bac94c3c1 100644
/* add new attributes above here, update the policy in devlink.c */
diff --git a/net/core/devlink.c b/net/core/devlink.c
index 04f8038f8..ca014f40a 100644
index 04f8038f8e23..ca014f40ac02 100644
--- a/net/core/devlink.c
+++ b/net/core/devlink.c
@@ -1249,6 +1249,59 @@ struct devlink_info_req {
@@ -311,5 +312,5 @@ index 04f8038f8..ca014f40a 100644
linecard->type = NULL;
devlink_linecard_notify(linecard, DEVLINK_CMD_LINECARD_NEW);
--
2.30.2
2.20.1

11
platform/mellanox/non-upstream-patches/patches/0131-mlxsw-reg-Add-Ports-Mapping-event-Configuration-Regi.patch
View File

@@ -1,7 +1,8 @@
From ec8e91d320c8cccb8ad59663d2d59810ea5aecb9 Mon Sep 17 00:00:00 2001
From 4a49468e7fc7e94a83703215445d9b3919642eb9 Mon Sep 17 00:00:00 2001
From: Jiri Pirko <jiri@nvidia.com>
Date: Fri, 29 Jan 2021 08:45:09 +0100
Subject: [PATCH] mlxsw: reg: Add Ports Mapping event Configuration Register
Subject: [PATCH backport 5.10 131/182] mlxsw: reg: Add Ports Mapping event
Configuration Register
The PMECR register use to enable/disable event trigger in case of
local port mapping change.
@@ -12,7 +13,7 @@ Signed-off-by: Jiri Pirko <jiri@nvidia.com>
1 file changed, 64 insertions(+)
diff --git a/drivers/net/ethernet/mellanox/mlxsw/reg.h b/drivers/net/ethernet/mellanox/mlxsw/reg.h
index 9de037b9a..42169957c 100644
index 98c627ffe039..93e3366cfcb9 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/reg.h
+++ b/drivers/net/ethernet/mellanox/mlxsw/reg.h
@@ -5524,6 +5524,69 @@ static inline void mlxsw_reg_pplr_pack(char *payload, u8 local_port,
@@ -85,7 +86,7 @@ index 9de037b9a..42169957c 100644
/* PMPE - Port Module Plug/Unplug Event Register
* ---------------------------------------------
* This register reports any operational status change of a module.
@@ -11376,6 +11439,7 @@ static const struct mlxsw_reg_info *mlxsw_reg_infos[] = {
@@ -11375,6 +11438,7 @@ static const struct mlxsw_reg_info *mlxsw_reg_infos[] = {
MLXSW_REG(pspa),
MLXSW_REG(pmaos),
MLXSW_REG(pplr),
@@ -94,5 +95,5 @@ index 9de037b9a..42169957c 100644
MLXSW_REG(pddr),
MLXSW_REG(pmtm),
--
2.30.2
2.20.1

13
platform/mellanox/non-upstream-patches/patches/0132-mlxsw-reg-Add-Management-DownStream-Device-Query-Reg.patch
View File

@@ -1,7 +1,8 @@
From e46f9bfa89b8b9caced49a74db695e86e963b35d Mon Sep 17 00:00:00 2001
From 5d8d4899f493e3b18712fc96a45eb020985740b1 Mon Sep 17 00:00:00 2001
From: Vadim Pasternak <vadimp@nvidia.com>
Date: Mon, 3 Jan 2022 10:20:49 +0000
Subject: [PATCH] mlxsw: reg: Add Management DownStream Device Query Register
Subject: [PATCH backport 5.10 132/182] mlxsw: reg: Add Management DownStream
Device Query Register
The MDDQ register allows to query the DownStream device properties.
@@ -11,10 +12,10 @@ Signed-off-by: Jiri Pirko <jiri@nvidia.com>
1 file changed, 234 insertions(+)
diff --git a/drivers/net/ethernet/mellanox/mlxsw/reg.h b/drivers/net/ethernet/mellanox/mlxsw/reg.h
index 42169957c..d5301bd6f 100644
index 93e3366cfcb9..ad7faeb95646 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/reg.h
+++ b/drivers/net/ethernet/mellanox/mlxsw/reg.h
@@ -10297,6 +10297,239 @@ mlxsw_reg_mgpir_unpack(char *payload, u8 *num_of_devices,
@@ -10296,6 +10296,239 @@ mlxsw_reg_mgpir_unpack(char *payload, u8 *num_of_devices,
*num_of_slots = mlxsw_reg_mgpir_num_of_slots_get(payload);
}
@@ -254,7 +255,7 @@ index 42169957c..d5301bd6f 100644
/* MFDE - Monitoring FW Debug Register
* -----------------------------------
*/
@@ -11496,6 +11729,7 @@ static const struct mlxsw_reg_info *mlxsw_reg_infos[] = {
@@ -11495,6 +11728,7 @@ static const struct mlxsw_reg_info *mlxsw_reg_infos[] = {
MLXSW_REG(mtptpt),
MLXSW_REG(mfgd),
MLXSW_REG(mgpir),
@@ -263,5 +264,5 @@ index 42169957c..d5301bd6f 100644
MLXSW_REG(tngcr),
MLXSW_REG(tnumt),
--
2.30.2
2.20.1

13
platform/mellanox/non-upstream-patches/patches/0133-mlxsw-reg-Add-Management-DownStream-Device-Control-R.patch
View File

@@ -1,7 +1,8 @@
From ab25c37ca20274cbf51ab603aa44f682cf5b51b5 Mon Sep 17 00:00:00 2001
From 14d65a09a9b77a5ed632a73ff006042d26be3226 Mon Sep 17 00:00:00 2001
From: Jiri Pirko <jiri@nvidia.com>
Date: Tue, 19 Jan 2021 12:16:58 +0100
Subject: [PATCH] mlxsw: reg: Add Management DownStream Device Control Register
Subject: [PATCH backport 5.10 133/182] mlxsw: reg: Add Management DownStream
Device Control Register
The MDDC register allows control downstream devices and line cards.
@@ -11,10 +12,10 @@ Signed-off-by: Jiri Pirko <jiri@nvidia.com>
1 file changed, 37 insertions(+)
diff --git a/drivers/net/ethernet/mellanox/mlxsw/reg.h b/drivers/net/ethernet/mellanox/mlxsw/reg.h
index d5301bd6f..9cbdf407f 100644
index ad7faeb95646..cddfe5702140 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/reg.h
+++ b/drivers/net/ethernet/mellanox/mlxsw/reg.h
@@ -10530,6 +10530,42 @@ mlxsw_reg_mddq_slot_name_unpack(const char *payload, char *slot_ascii_name)
@@ -10529,6 +10529,42 @@ mlxsw_reg_mddq_slot_name_unpack(const char *payload, char *slot_ascii_name)
mlxsw_reg_mddq_slot_ascii_name_memcpy_from(payload, slot_ascii_name);
}
@@ -57,7 +58,7 @@ index d5301bd6f..9cbdf407f 100644
/* MFDE - Monitoring FW Debug Register
* -----------------------------------
*/
@@ -11730,6 +11766,7 @@ static const struct mlxsw_reg_info *mlxsw_reg_infos[] = {
@@ -11729,6 +11765,7 @@ static const struct mlxsw_reg_info *mlxsw_reg_infos[] = {
MLXSW_REG(mfgd),
MLXSW_REG(mgpir),
MLXSW_REG(mddq),
@@ -66,5 +67,5 @@ index d5301bd6f..9cbdf407f 100644
MLXSW_REG(tngcr),
MLXSW_REG(tnumt),
--
2.30.2
2.20.1

13
platform/mellanox/non-upstream-patches/patches/0134-mlxsw-reg-Add-Management-Binary-Code-Transfer-Regist.patch
View File

@@ -1,7 +1,8 @@
From 618665ccbf600c2838fb2e181246aef0fa90bac2 Mon Sep 17 00:00:00 2001
From e9afbd683a14e3369ba25dcb9c8147a8b478b5c0 Mon Sep 17 00:00:00 2001
From: Jiri Pirko <jiri@nvidia.com>
Date: Thu, 10 Dec 2020 18:27:38 +0100
Subject: [PATCH] mlxsw: reg: Add Management Binary Code Transfer Register
Subject: [PATCH backport 5.10 134/182] mlxsw: reg: Add Management Binary Code
Transfer Register
The MBCT register allows to transfer binary codes from the Host to
the management FW by transferring it by chunks of maximum 1KB.
@@ -12,10 +13,10 @@ Signed-off-by: Jiri Pirko <jiri@nvidia.com>
1 file changed, 120 insertions(+)
diff --git a/drivers/net/ethernet/mellanox/mlxsw/reg.h b/drivers/net/ethernet/mellanox/mlxsw/reg.h
index 9cbdf407f..89b21910f 100644
index cddfe5702140..e060f054e0a9 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/reg.h
+++ b/drivers/net/ethernet/mellanox/mlxsw/reg.h
@@ -10297,6 +10297,125 @@ mlxsw_reg_mgpir_unpack(char *payload, u8 *num_of_devices,
@@ -10296,6 +10296,125 @@ mlxsw_reg_mgpir_unpack(char *payload, u8 *num_of_devices,
*num_of_slots = mlxsw_reg_mgpir_num_of_slots_get(payload);
}
@@ -141,7 +142,7 @@ index 9cbdf407f..89b21910f 100644
/* MDDQ - Management DownStream Device Query Register
* --------------------------------------------------
* This register allows to query the DownStream device properties. The desired
@@ -11765,6 +11884,7 @@ static const struct mlxsw_reg_info *mlxsw_reg_infos[] = {
@@ -11764,6 +11883,7 @@ static const struct mlxsw_reg_info *mlxsw_reg_infos[] = {
MLXSW_REG(mtptpt),
MLXSW_REG(mfgd),
MLXSW_REG(mgpir),
@@ -150,5 +151,5 @@ index 9cbdf407f..89b21910f 100644
MLXSW_REG(mddc),
MLXSW_REG(mfde),
--
2.30.2
2.20.1

20
platform/mellanox/non-upstream-patches/patches/0135-mlxsw-core_linecards-Add-line-card-objects-and-imple.patch
View File

@@ -1,8 +1,8 @@
From 3c23c52a44d6f87f7caaf09babb6196e523d1e7c Mon Sep 17 00:00:00 2001
From 59c953deed31161dc358e6d397af2b5b0f5ee61c Mon Sep 17 00:00:00 2001
From: Vadim Pasternak <vadimp@nvidia.com>
Date: Wed, 22 Dec 2021 16:06:54 +0000
Subject: [PATCH] mlxsw: core_linecards: Add line card objects and implement
provisioning
Subject: [PATCH backport 5.10 135/182] mlxsw: core_linecards: Add line card
objects and implement provisioning
Introduce objects for line cards and an infrastructure around that.
Use devlink_linecard_create/destroy() to register the line card with
@@ -21,7 +21,7 @@ Signed-off-by: Jiri Pirko <jiri@nvidia.com>
create mode 100644 drivers/net/ethernet/mellanox/mlxsw/core_linecards.c
diff --git a/drivers/net/ethernet/mellanox/mlxsw/Makefile b/drivers/net/ethernet/mellanox/mlxsw/Makefile
index 892724380..ca7260a14 100644
index 892724380ea2..ca7260a145f5 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/Makefile
+++ b/drivers/net/ethernet/mellanox/mlxsw/Makefile
@@ -1,7 +1,8 @@
@@ -35,7 +35,7 @@ index 892724380..ca7260a14 100644
mlxsw_core-$(CONFIG_MLXSW_CORE_THERMAL) += core_thermal.o
obj-$(CONFIG_MLXSW_PCI) += mlxsw_pci.o
diff --git a/drivers/net/ethernet/mellanox/mlxsw/core.c b/drivers/net/ethernet/mellanox/mlxsw/core.c
index 0b1888318..246db548f 100644
index 0b1888318ef1..246db548f011 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/core.c
+++ b/drivers/net/ethernet/mellanox/mlxsw/core.c
@@ -82,6 +82,7 @@ struct mlxsw_core {
@@ -112,7 +112,7 @@ index 0b1888318..246db548f 100644
kfree(mlxsw_core->lag.mapping);
mlxsw_ports_fini(mlxsw_core);
diff --git a/drivers/net/ethernet/mellanox/mlxsw/core.h b/drivers/net/ethernet/mellanox/mlxsw/core.h
index 0ceb7dae9..d3c5d8289 100644
index 0ceb7dae95f6..d3c5d8289a85 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/core.h
+++ b/drivers/net/ethernet/mellanox/mlxsw/core.h
@@ -30,6 +30,8 @@ unsigned int mlxsw_core_max_ports(const struct mlxsw_core *mlxsw_core);
@@ -175,7 +175,7 @@ index 0ceb7dae9..d3c5d8289 100644
#endif
diff --git a/drivers/net/ethernet/mellanox/mlxsw/core_linecards.c b/drivers/net/ethernet/mellanox/mlxsw/core_linecards.c
new file mode 100644
index 000000000..a324ce243
index 000000000000..a324ce2436e8
--- /dev/null
+++ b/drivers/net/ethernet/mellanox/mlxsw/core_linecards.c
@@ -0,0 +1,775 @@
@@ -955,7 +955,7 @@ index 000000000..a324ce243
+
+MODULE_FIRMWARE(MLXSW_LINECARDS_INI_BUNDLE_FILE);
diff --git a/drivers/net/ethernet/mellanox/mlxsw/spectrum.c b/drivers/net/ethernet/mellanox/mlxsw/spectrum.c
index 5066fcc46..d7a230828 100644
index e0424f490c6f..bc233a5c8a79 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/spectrum.c
+++ b/drivers/net/ethernet/mellanox/mlxsw/spectrum.c
@@ -2076,6 +2076,72 @@ static void mlxsw_sp_pude_event_func(const struct mlxsw_reg_info *reg,
@@ -1041,7 +1041,7 @@ index 5066fcc46..d7a230828 100644
MLXSW_SP_RXL_NO_MARK(FID_MISS, TRAP_TO_CPU, FID_MISS, false),
/* L3 traps */
diff --git a/drivers/net/ethernet/mellanox/mlxsw/trap.h b/drivers/net/ethernet/mellanox/mlxsw/trap.h
index 57f9e2460..f3e522de2 100644
index 57f9e24602d0..f3e522de2f68 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/trap.h
+++ b/drivers/net/ethernet/mellanox/mlxsw/trap.h
@@ -132,6 +132,12 @@ enum mlxsw_event_trap_id {
@@ -1058,5 +1058,5 @@ index 57f9e2460..f3e522de2 100644
#endif /* _MLXSW_TRAP_H */
--
2.30.2
2.20.1

11
platform/mellanox/non-upstream-patches/patches/0136-mlxsw-core_linecards-Implement-line-card-activation-.patch
View File

@@ -1,7 +1,8 @@
From f2ecea65348e527345e9e7a59766162eb2297a53 Mon Sep 17 00:00:00 2001
From e7379493c9f7e30f7d20459ed07a435095e9a889 Mon Sep 17 00:00:00 2001
From: Jiri Pirko <jiri@nvidia.com>
Date: Fri, 22 Jan 2021 14:45:06 +0100
Subject: [PATCH] mlxsw: core_linecards: Implement line card activation process
Subject: [PATCH backport 5.10 136/182] mlxsw: core_linecards: Implement line
card activation process
Allow to process events generated upon line card getting "ready" and
"active".
@@ -13,7 +14,7 @@ Signed-off-by: Jiri Pirko <jiri@nvidia.com>
2 files changed, 80 insertions(+), 8 deletions(-)
diff --git a/drivers/net/ethernet/mellanox/mlxsw/core.h b/drivers/net/ethernet/mellanox/mlxsw/core.h
index d3c5d8289..ecd91bb8c 100644
index d3c5d8289a85..ecd91bb8ca77 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/core.h
+++ b/drivers/net/ethernet/mellanox/mlxsw/core.h
@@ -521,6 +521,9 @@ struct mlxsw_linecard {
@@ -27,7 +28,7 @@ index d3c5d8289..ecd91bb8c 100644
struct mlxsw_linecard_types_info;
diff --git a/drivers/net/ethernet/mellanox/mlxsw/core_linecards.c b/drivers/net/ethernet/mellanox/mlxsw/core_linecards.c
index a324ce243..134437f49 100644
index a324ce2436e8..134437f49219 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/core_linecards.c
+++ b/drivers/net/ethernet/mellanox/mlxsw/core_linecards.c
@@ -67,6 +67,8 @@ static const char *mlxsw_linecard_type_name(struct mlxsw_linecard *linecard)
@@ -201,5 +202,5 @@ index a324ce243..134437f49 100644
void mlxsw_linecards_fini(struct mlxsw_core *mlxsw_core,
--
2.30.2
2.20.1

13
platform/mellanox/non-upstream-patches/patches/0137-mlxsw-core-Extend-driver-ops-by-remove-selected-port.patch
View File

@@ -1,7 +1,8 @@
From 063ca0577ceb2355884555d96a24a740a2c03bdb Mon Sep 17 00:00:00 2001
From a0e62e8df42c4ae6eabba2ea0c2d076d8c8d06fb Mon Sep 17 00:00:00 2001
From: Vadim Pasternak <vadimp@nvidia.com>
Date: Wed, 22 Dec 2021 16:26:43 +0000
Subject: [PATCH] mlxsw: core: Extend driver ops by remove selected ports op
Subject: [PATCH backport 5.10 137/182] mlxsw: core: Extend driver ops by
remove selected ports op
In case of line card implementation, the core has to have a way to
remove relevant ports manually. Extend the Spectrum driver ops by an op
@@ -15,7 +16,7 @@ Signed-off-by: Jiri Pirko <jiri@nvidia.com>
3 files changed, 32 insertions(+)
diff --git a/drivers/net/ethernet/mellanox/mlxsw/core.c b/drivers/net/ethernet/mellanox/mlxsw/core.c
index 246db548f..2b4f9844b 100644
index 246db548f011..2b4f9844b1d6 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/core.c
+++ b/drivers/net/ethernet/mellanox/mlxsw/core.c
@@ -2870,6 +2870,15 @@ mlxsw_core_port_devlink_port_get(struct mlxsw_core *mlxsw_core,
@@ -35,7 +36,7 @@ index 246db548f..2b4f9844b 100644
{
return mlxsw_core->env;
diff --git a/drivers/net/ethernet/mellanox/mlxsw/core.h b/drivers/net/ethernet/mellanox/mlxsw/core.h
index ecd91bb8c..70f97ef74 100644
index ecd91bb8ca77..70f97ef74a2c 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/core.h
+++ b/drivers/net/ethernet/mellanox/mlxsw/core.h
@@ -223,6 +223,10 @@ enum devlink_port_type mlxsw_core_port_type_get(struct mlxsw_core *mlxsw_core,
@@ -61,7 +62,7 @@ index ecd91bb8c..70f97ef74 100644
unsigned int sb_index, u16 pool_index,
struct devlink_sb_pool_info *pool_info);
diff --git a/drivers/net/ethernet/mellanox/mlxsw/spectrum.c b/drivers/net/ethernet/mellanox/mlxsw/spectrum.c
index d7a230828..75b418fbe 100644
index bc233a5c8a79..82acff318dcd 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/spectrum.c
+++ b/drivers/net/ethernet/mellanox/mlxsw/spectrum.c
@@ -1736,6 +1736,20 @@ static void mlxsw_sp_ports_remove(struct mlxsw_sp *mlxsw_sp)
@@ -94,5 +95,5 @@ index d7a230828..75b418fbe 100644
.sb_pool_set = mlxsw_sp_sb_pool_set,
.sb_port_pool_get = mlxsw_sp_sb_port_pool_get,
--
2.30.2
2.20.1

19
platform/mellanox/non-upstream-patches/patches/0138-mlxsw-spectrum-Add-port-to-linecard-mapping.patch
View File

@@ -1,7 +1,8 @@
From fd68af1d7a7c58c3f7db6ec95aba528137ec4c2d Mon Sep 17 00:00:00 2001
From 718b7aec4ec4c7e3c327b2ffbf43b27126688836 Mon Sep 17 00:00:00 2001
From: Vadim Pasternak <vadimp@nvidia.com>
Date: Mon, 3 Jan 2022 11:22:42 +0000
Subject: [PATCH] mlxsw: spectrum: Add port to linecard mapping
Subject: [PATCH backport 5.10 138/182] mlxsw: spectrum: Add port to linecard
mapping
For each port get slot_index using PMLP register. For ports residing
on a linecard, identify it with the linecard by setting mapping
@@ -19,7 +20,7 @@ Signed-off-by: Jiri Pirko <jiri@nvidia.com>
6 files changed, 20 insertions(+), 9 deletions(-)
diff --git a/drivers/net/ethernet/mellanox/mlxsw/core.c b/drivers/net/ethernet/mellanox/mlxsw/core.c
index 2b4f9844b..68ef007ac 100644
index 2b4f9844b1d6..68ef007ac48c 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/core.c
+++ b/drivers/net/ethernet/mellanox/mlxsw/core.c
@@ -48,6 +48,7 @@ struct mlxsw_core_port {
@@ -82,7 +83,7 @@ index 2b4f9844b..68ef007ac 100644
if (err)
return err;
diff --git a/drivers/net/ethernet/mellanox/mlxsw/core.h b/drivers/net/ethernet/mellanox/mlxsw/core.h
index 70f97ef74..8e738ddb3 100644
index 70f97ef74a2c..8e738ddb39c8 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/core.h
+++ b/drivers/net/ethernet/mellanox/mlxsw/core.h
@@ -202,7 +202,8 @@ void mlxsw_core_lag_mapping_clear(struct mlxsw_core *mlxsw_core,
@@ -96,7 +97,7 @@ index 70f97ef74..8e738ddb3 100644
const unsigned char *switch_id,
unsigned char switch_id_len);
diff --git a/drivers/net/ethernet/mellanox/mlxsw/minimal.c b/drivers/net/ethernet/mellanox/mlxsw/minimal.c
index 104f1ba02..30925f573 100644
index 104f1ba0242f..30925f57362e 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/minimal.c
+++ b/drivers/net/ethernet/mellanox/mlxsw/minimal.c
@@ -210,7 +210,7 @@ mlxsw_m_port_create(struct mlxsw_m *mlxsw_m, u8 local_port, u8 module)
@@ -109,7 +110,7 @@ index 104f1ba02..30925f573 100644
0, mlxsw_m->base_mac,
sizeof(mlxsw_m->base_mac));
diff --git a/drivers/net/ethernet/mellanox/mlxsw/spectrum.c b/drivers/net/ethernet/mellanox/mlxsw/spectrum.c
index 75b418fbe..31eec40a3 100644
index 82acff318dcd..c87267d002c6 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/spectrum.c
+++ b/drivers/net/ethernet/mellanox/mlxsw/spectrum.c
@@ -1399,7 +1399,7 @@ static int mlxsw_sp_port_create(struct mlxsw_sp *mlxsw_sp, u8 local_port,
@@ -122,7 +123,7 @@ index 75b418fbe..31eec40a3 100644
port_mapping->lane / lanes,
splittable, lanes,
diff --git a/drivers/net/ethernet/mellanox/mlxsw/switchib.c b/drivers/net/ethernet/mellanox/mlxsw/switchib.c
index 1e561132e..090b9a103 100644
index 1e561132eb1e..090b9a103c04 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/switchib.c
+++ b/drivers/net/ethernet/mellanox/mlxsw/switchib.c
@@ -280,7 +280,7 @@ static int mlxsw_sib_port_create(struct mlxsw_sib *mlxsw_sib, u8 local_port,
@@ -135,7 +136,7 @@ index 1e561132e..090b9a103 100644
mlxsw_sib->hw_id, sizeof(mlxsw_sib->hw_id));
if (err) {
diff --git a/drivers/net/ethernet/mellanox/mlxsw/switchx2.c b/drivers/net/ethernet/mellanox/mlxsw/switchx2.c
index 131b2a53d..bf8a54776 100644
index 131b2a53d261..bf8a54776861 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/switchx2.c
+++ b/drivers/net/ethernet/mellanox/mlxsw/switchx2.c
@@ -1085,7 +1085,7 @@ static int mlxsw_sx_port_eth_create(struct mlxsw_sx *mlxsw_sx, u8 local_port,
@@ -148,5 +149,5 @@ index 131b2a53d..bf8a54776 100644
mlxsw_sx->hw_id, sizeof(mlxsw_sx->hw_id));
if (err) {
--
2.30.2
2.20.1

14
platform/mellanox/non-upstream-patches/patches/0139-mlxsw-reg-Introduce-Management-Temperature-Extended-.patch
View File

@@ -1,8 +1,8 @@
From a719653b2a7f0943e757c04dab73df324e469436 Mon Sep 17 00:00:00 2001
From 44b270551552a48c2a0799f1660b7bfdd0c10519 Mon Sep 17 00:00:00 2001
From: Vadim Pasternak <vadimp@nvidia.com>
Date: Wed, 12 May 2021 22:57:37 +0300
Subject: [PATCH] mlxsw: reg: Introduce Management Temperature Extended
Capabilities Register
Subject: [PATCH backport 5.10 139/182] mlxsw: reg: Introduce Management
Temperature Extended Capabilities Register
Introduce new register MTECR (Management Temperature Extended
Capabilities Register). This register exposes the capabilities of the
@@ -16,10 +16,10 @@ Signed-off-by: Jiri Pirko <jiri@nvidia.com>
1 file changed, 67 insertions(+)
diff --git a/drivers/net/ethernet/mellanox/mlxsw/reg.h b/drivers/net/ethernet/mellanox/mlxsw/reg.h
index 89b21910f..c1ce0b42e 100644
index e060f054e0a9..5757c4f40277 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/reg.h
+++ b/drivers/net/ethernet/mellanox/mlxsw/reg.h
@@ -10297,6 +10297,72 @@ mlxsw_reg_mgpir_unpack(char *payload, u8 *num_of_devices,
@@ -10296,6 +10296,72 @@ mlxsw_reg_mgpir_unpack(char *payload, u8 *num_of_devices,
*num_of_slots = mlxsw_reg_mgpir_num_of_slots_get(payload);
}
@@ -92,7 +92,7 @@ index 89b21910f..c1ce0b42e 100644
/* MBCT - Management Binary Code Transfer Register
* -----------------------------------------------
* This register allows to transfer binary codes from the Host to
@@ -11884,6 +11950,7 @@ static const struct mlxsw_reg_info *mlxsw_reg_infos[] = {
@@ -11883,6 +11949,7 @@ static const struct mlxsw_reg_info *mlxsw_reg_infos[] = {
MLXSW_REG(mtptpt),
MLXSW_REG(mfgd),
MLXSW_REG(mgpir),
@@ -101,5 +101,5 @@ index 89b21910f..c1ce0b42e 100644
MLXSW_REG(mddq),
MLXSW_REG(mddc),
--
2.30.2
2.20.1

13
platform/mellanox/non-upstream-patches/patches/0140-mlxsw-core-Add-APIs-for-thermal-sensor-mapping.patch
View File

@@ -1,7 +1,8 @@
From 1ea36b4966e21d9d599da7e4e3195364841d9318 Mon Sep 17 00:00:00 2001
From 3614c1e72e48e03c64ce88d269d97ee4743f9cc4 Mon Sep 17 00:00:00 2001
From: Vadim Pasternak <vadimp@nvidia.com>
Date: Mon, 13 Dec 2021 12:29:10 +0000
Subject: [PATCH] mlxsw: core: Add APIs for thermal sensor mapping
Subject: [PATCH backport 5.10 140/182] mlxsw: core: Add APIs for thermal
sensor mapping
Add APIs mlxsw_env_sensor_map_init() and mlxsw_env_sensor_map_fini(().
The purpose of the first one is to allocate and create thermal sensors
@@ -21,10 +22,10 @@ Signed-off-by: Vadim Pasternak <vadimp@nvidia.com>
2 files changed, 59 insertions(+)
diff --git a/drivers/net/ethernet/mellanox/mlxsw/core_env.c b/drivers/net/ethernet/mellanox/mlxsw/core_env.c
index 94d44db1a..c27cd424b 100644
index 4553dfa68f96..4f3fc25af013 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/core_env.c
+++ b/drivers/net/ethernet/mellanox/mlxsw/core_env.c
@@ -626,6 +626,53 @@ mlxsw_env_set_module_power_mode(struct mlxsw_core *mlxsw_core, u8 slot_index,
@@ -624,6 +624,53 @@ mlxsw_env_set_module_power_mode(struct mlxsw_core *mlxsw_core, u8 slot_index,
}
EXPORT_SYMBOL(mlxsw_env_set_module_power_mode);
@@ -79,7 +80,7 @@ index 94d44db1a..c27cd424b 100644
u8 slot_index, u8 module,
bool *p_has_temp_sensor)
diff --git a/drivers/net/ethernet/mellanox/mlxsw/core_env.h b/drivers/net/ethernet/mellanox/mlxsw/core_env.h
index 03d027870..336c9ee57 100644
index 03d027870d65..336c9ee579cb 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/core_env.h
+++ b/drivers/net/ethernet/mellanox/mlxsw/core_env.h
@@ -9,6 +9,11 @@
@@ -109,5 +110,5 @@ index 03d027870..336c9ee57 100644
mlxsw_env_get_module_eeprom_by_page(struct mlxsw_core *mlxsw_core,
u8 slot_index, u8 module,
--
2.30.2
2.20.1

14
platform/mellanox/non-upstream-patches/patches/0141-mlxsw-reg-Add-Management-DownStream-Device-Tunneling.patch
View File

@@ -1,8 +1,8 @@
From 46563dcd511270f67a9e771497ccfc73907aa4d3 Mon Sep 17 00:00:00 2001
From d7353e41900e4d6fa44fa5e51a483b9f01432846 Mon Sep 17 00:00:00 2001
From: Jiri Pirko <jiri@nvidia.com>
Date: Thu, 25 Feb 2021 10:17:53 +0100
Subject: [PATCH] mlxsw: reg: Add Management DownStream Device Tunneling
Register
Subject: [PATCH backport 5.10 141/182] mlxsw: reg: Add Management DownStream
Device Tunneling Register
The MDDT register allows deliver query and request messages
(PRM registers, commands) to a DownStream device.
@@ -13,10 +13,10 @@ Signed-off-by: Jiri Pirko <jiri@nvidia.com>
1 file changed, 91 insertions(+)
diff --git a/drivers/net/ethernet/mellanox/mlxsw/reg.h b/drivers/net/ethernet/mellanox/mlxsw/reg.h
index c1ce0b42e..f8c828e05 100644
index 5757c4f40277..7b71e9ae3d51 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/reg.h
+++ b/drivers/net/ethernet/mellanox/mlxsw/reg.h
@@ -10482,6 +10482,96 @@ mlxsw_reg_mbct_unpack(const char *payload, u8 *p_slot_index,
@@ -10481,6 +10481,96 @@ mlxsw_reg_mbct_unpack(const char *payload, u8 *p_slot_index,
*p_fsm_state = mlxsw_reg_mbct_fsm_state_get(payload);
}
@@ -113,7 +113,7 @@ index c1ce0b42e..f8c828e05 100644
/* MDDQ - Management DownStream Device Query Register
* --------------------------------------------------
* This register allows to query the DownStream device properties. The desired
@@ -11952,6 +12042,7 @@ static const struct mlxsw_reg_info *mlxsw_reg_infos[] = {
@@ -11951,6 +12041,7 @@ static const struct mlxsw_reg_info *mlxsw_reg_infos[] = {
MLXSW_REG(mgpir),
MLXSW_REG(mtecr),
MLXSW_REG(mbct),
@@ -122,5 +122,5 @@ index c1ce0b42e..f8c828e05 100644
MLXSW_REG(mddc),
MLXSW_REG(mfde),
--
2.30.2
2.20.1

12
platform/mellanox/non-upstream-patches/patches/0142-mlxsw-core_linecards-Probe-devices-for-provisioned-l.patch
View File

@@ -1,8 +1,8 @@
From 70bc337251ccbfe095a89457ded233c3ad5b9bbc Mon Sep 17 00:00:00 2001
From 51f5cf36b8b2c94d8a71bfa17d5f71257048c314 Mon Sep 17 00:00:00 2001
From: Jiri Pirko <jiri@nvidia.com>
Date: Fri, 26 Feb 2021 13:15:09 +0100
Subject: [PATCH] mlxsw: core_linecards: Probe devices for provisioned line
card and attach them
Subject: [PATCH backport 5.10 142/182] mlxsw: core_linecards: Probe devices
for provisioned line card and attach them
In case the line card is provisioned, go over all possible existing
devices (gearboxes) on it and attach them, so devlink core is aware of
@@ -15,7 +15,7 @@ Signed-off-by: Jiri Pirko <jiri@nvidia.com>
2 files changed, 108 insertions(+), 8 deletions(-)
diff --git a/drivers/net/ethernet/mellanox/mlxsw/core.h b/drivers/net/ethernet/mellanox/mlxsw/core.h
index 8e738ddb3..593470d14 100644
index 8e738ddb39c8..593470d14815 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/core.h
+++ b/drivers/net/ethernet/mellanox/mlxsw/core.h
@@ -533,6 +533,9 @@ struct mlxsw_linecard {
@@ -29,7 +29,7 @@ index 8e738ddb3..593470d14 100644
struct mlxsw_linecard_types_info;
diff --git a/drivers/net/ethernet/mellanox/mlxsw/core_linecards.c b/drivers/net/ethernet/mellanox/mlxsw/core_linecards.c
index 134437f49..720ad6d82 100644
index 134437f49219..720ad6d82798 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/core_linecards.c
+++ b/drivers/net/ethernet/mellanox/mlxsw/core_linecards.c
@@ -64,27 +64,120 @@ static const char *mlxsw_linecard_type_name(struct mlxsw_linecard *linecard)
@@ -220,5 +220,5 @@ index 134437f49..720ad6d82 100644
mutex_destroy(&linecard->lock);
}
--
2.30.2
2.20.1

10
platform/mellanox/non-upstream-patches/patches/0143-mlxsw-core_linecards-Expose-device-FW-version-over-d.patch
View File

@@ -1,8 +1,8 @@
From 8279b3c273fac860394fb922c70c336993e6f087 Mon Sep 17 00:00:00 2001
From e4830f23af9d14fac42764dd077f49de8de7bff2 Mon Sep 17 00:00:00 2001
From: Jiri Pirko <jiri@nvidia.com>
Date: Thu, 10 Jun 2021 15:32:00 +0200
Subject: [PATCH] mlxsw: core_linecards: Expose device FW version over device
info
Subject: [PATCH backport 5.10 143/182] mlxsw: core_linecards: Expose device FW
version over device info
Extend MDDQ to obtain FW version of line card device and implement
device_info_get() op to fill up the info with that.
@@ -13,7 +13,7 @@ Signed-off-by: Jiri Pirko <jiri@nvidia.com>
1 file changed, 100 insertions(+), 4 deletions(-)
diff --git a/drivers/net/ethernet/mellanox/mlxsw/core_linecards.c b/drivers/net/ethernet/mellanox/mlxsw/core_linecards.c
index 720ad6d82..cb872f918 100644
index 720ad6d82798..cb872f918f01 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/core_linecards.c
+++ b/drivers/net/ethernet/mellanox/mlxsw/core_linecards.c
@@ -64,13 +64,31 @@ static const char *mlxsw_linecard_type_name(struct mlxsw_linecard *linecard)
@@ -173,5 +173,5 @@ index 720ad6d82..cb872f918 100644
static int mlxsw_linecard_init(struct mlxsw_core *mlxsw_core,
--
2.30.2
2.20.1

13
platform/mellanox/non-upstream-patches/patches/0144-mlxsw-core-Introduce-flash-update-components.patch
View File

@@ -1,7 +1,8 @@
From a1421cadee435540d09a5526525f692821a271cd Mon Sep 17 00:00:00 2001
From 1eb0843255d6e92aa96d0ea11a15ab1f86b20e4f Mon Sep 17 00:00:00 2001
From: Jiri Pirko <jiri@nvidia.com>
Date: Fri, 26 Feb 2021 18:40:28 +0100
Subject: [PATCH] mlxsw: core: Introduce flash update components
Subject: [PATCH backport 5.10 144/182] mlxsw: core: Introduce flash update
components
Introduce an infrastructure allowing to have multiple components for
flashing purposes that can be registered from inside the driver. Convert
@@ -15,7 +16,7 @@ Signed-off-by: Jiri Pirko <jiri@nvidia.com>
3 files changed, 125 insertions(+), 7 deletions(-)
diff --git a/drivers/net/ethernet/mellanox/mlxsw/core.c b/drivers/net/ethernet/mellanox/mlxsw/core.c
index 68ef007ac..f55071982 100644
index 68ef007ac48c..f55071982271 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/core.c
+++ b/drivers/net/ethernet/mellanox/mlxsw/core.c
@@ -91,6 +91,10 @@ struct mlxsw_core {
@@ -188,7 +189,7 @@ index 68ef007ac..f55071982 100644
return;
diff --git a/drivers/net/ethernet/mellanox/mlxsw/core.h b/drivers/net/ethernet/mellanox/mlxsw/core.h
index 593470d14..30f00da0a 100644
index 593470d14815..30f00da0a48d 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/core.h
+++ b/drivers/net/ethernet/mellanox/mlxsw/core.h
@@ -41,6 +41,18 @@ mlxsw_core_fw_rev_minor_subminor_validate(const struct mlxsw_fw_rev *rev,
@@ -211,7 +212,7 @@ index 593470d14..30f00da0a 100644
const struct mlxsw_bus *mlxsw_bus,
void *bus_priv, bool reload,
diff --git a/include/net/devlink.h b/include/net/devlink.h
index 06b61c1d7..fafbec26d 100644
index 06b61c1d7938..fafbec26d2c4 100644
--- a/include/net/devlink.h
+++ b/include/net/devlink.h
@@ -19,6 +19,7 @@
@@ -239,5 +240,5 @@ index 06b61c1d7..fafbec26d 100644
const char *component;
u32 overwrite_mask;
--
2.30.2
2.20.1

16
platform/mellanox/non-upstream-patches/patches/0145-mlxfw-Get-the-PSID-value-using-op-instead-of-passing.patch
View File

@@ -1,8 +1,8 @@
From ecf655b1e2329f2376f014c2cad0f81ec2ac5deb Mon Sep 17 00:00:00 2001
From 81cb237570a4d0251455d17e073337f73c1b4aa9 Mon Sep 17 00:00:00 2001
From: Jiri Pirko <jiri@nvidia.com>
Date: Fri, 4 Jun 2021 10:25:35 +0200
Subject: [PATCH] mlxfw: Get the PSID value using op instead of passing it in
struct
Subject: [PATCH backport 5.10 145/182] mlxfw: Get the PSID value using op
instead of passing it in struct
In preparation for line card device flashing, where the PSID is going to
be obtained dynamically using MGIR register for each individual line
@@ -17,7 +17,7 @@ Signed-off-by: Jiri Pirko <jiri@nvidia.com>
4 files changed, 52 insertions(+), 12 deletions(-)
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/fw.c b/drivers/net/ethernet/mellanox/mlx5/core/fw.c
index 02558ac2a..06edfd5b1 100644
index 02558ac2ace6..06edfd5b12e0 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/fw.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/fw.c
@@ -494,6 +494,20 @@ struct mlx5_mlxfw_dev {
@@ -60,7 +60,7 @@ index 02558ac2a..06edfd5b1 100644
},
.mlx5_core_dev = dev
diff --git a/drivers/net/ethernet/mellanox/mlxfw/mlxfw.h b/drivers/net/ethernet/mellanox/mlxfw/mlxfw.h
index 7654841a0..b83651246 100644
index 7654841a05c2..b83651246c1f 100644
--- a/drivers/net/ethernet/mellanox/mlxfw/mlxfw.h
+++ b/drivers/net/ethernet/mellanox/mlxfw/mlxfw.h
@@ -11,8 +11,6 @@
@@ -82,7 +82,7 @@ index 7654841a0..b83651246 100644
u32 *p_max_size, u8 *p_align_bits,
u16 *p_max_write_size);
diff --git a/drivers/net/ethernet/mellanox/mlxfw/mlxfw_fsm.c b/drivers/net/ethernet/mellanox/mlxfw/mlxfw_fsm.c
index bcd166911..329ddf1b3 100644
index bcd166911d44..329ddf1b3b89 100644
--- a/drivers/net/ethernet/mellanox/mlxfw/mlxfw_fsm.c
+++ b/drivers/net/ethernet/mellanox/mlxfw/mlxfw_fsm.c
@@ -303,7 +303,8 @@ static int mlxfw_flash_component(struct mlxfw_dev *mlxfw_dev,
@@ -152,7 +152,7 @@ index bcd166911..329ddf1b3 100644
err_fsm_reactivate:
err_state_wait_idle_to_locked:
diff --git a/drivers/net/ethernet/mellanox/mlxsw/core.c b/drivers/net/ethernet/mellanox/mlxsw/core.c
index f55071982..8c1280781 100644
index f55071982271..8c128078105a 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/core.c
+++ b/drivers/net/ethernet/mellanox/mlxsw/core.c
@@ -890,6 +890,21 @@ struct mlxsw_core_fw_info {
@@ -196,5 +196,5 @@ index f55071982..8c1280781 100644
},
.mlxsw_core = mlxsw_core
--
2.30.2
2.20.1

9
platform/mellanox/non-upstream-patches/patches/0146-mlxsw-core_linecards-Implement-line-card-device-flas.patch
View File

@@ -1,7 +1,8 @@
From b721c11b90bb0ef2fcd0bfccd6334948153edea2 Mon Sep 17 00:00:00 2001
From 0e642e558b98e1a686b39acb53f53c1fb9735b02 Mon Sep 17 00:00:00 2001
From: Jiri Pirko <jiri@nvidia.com>
Date: Fri, 5 Mar 2021 09:33:21 +0100
Subject: [PATCH] mlxsw: core_linecards: Implement line card device flashing
Subject: [PATCH backport 5.10 146/182] mlxsw: core_linecards: Implement line
card device flashing
Generate flash component name and register it internally within mlxsw
for flashing. Also, propagate the component name to devlink core which
@@ -15,7 +16,7 @@ Signed-off-by: Jiri Pirko <jiri@nvidia.com>
1 file changed, 334 insertions(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/mellanox/mlxsw/core_linecards.c b/drivers/net/ethernet/mellanox/mlxsw/core_linecards.c
index cb872f918..9f9ee582f 100644
index cb872f918f01..9f9ee582fce2 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/core_linecards.c
+++ b/drivers/net/ethernet/mellanox/mlxsw/core_linecards.c
@@ -73,6 +73,7 @@ struct mlxsw_linecard_device_info {
@@ -396,5 +397,5 @@ index cb872f918..9f9ee582f 100644
}
--
2.30.2
2.20.1

12
platform/mellanox/non-upstream-patches/patches/0147-mlxsw-core_linecards-Introduce-ops-for-linecards-sta.patch
View File

@@ -1,8 +1,8 @@
From 19bae5f5978a43a22258843cc999b592d0e4b414 Mon Sep 17 00:00:00 2001
From 5e3bebf1e096e4770cad3aaf3d03fa22429fe5f9 Mon Sep 17 00:00:00 2001
From: Jiri Pirko <jiri@nvidia.com>
Date: Fri, 22 Jan 2021 15:01:06 +0100
Subject: [PATCH] mlxsw: core_linecards: Introduce ops for linecards status
change tracking
Subject: [PATCH backport 5.10 147/182] mlxsw: core_linecards: Introduce ops
for linecards status change tracking
Introduce an infrastructure allowing the core to register set of ops
which are called whenever line card gets provisione/unprovisioned
@@ -15,7 +15,7 @@ Signed-off-by: Jiri Pirko <jiri@nvidia.com>
2 files changed, 150 insertions(+), 6 deletions(-)
diff --git a/drivers/net/ethernet/mellanox/mlxsw/core.h b/drivers/net/ethernet/mellanox/mlxsw/core.h
index 30f00da0a..10ea541bb 100644
index 30f00da0a48d..10ea541bb19d 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/core.h
+++ b/drivers/net/ethernet/mellanox/mlxsw/core.h
@@ -582,4 +582,26 @@ int mlxsw_linecard_status_process(struct mlxsw_core *mlxsw_core,
@@ -46,7 +46,7 @@ index 30f00da0a..10ea541bb 100644
+
#endif
diff --git a/drivers/net/ethernet/mellanox/mlxsw/core_linecards.c b/drivers/net/ethernet/mellanox/mlxsw/core_linecards.c
index 9f9ee582f..3a2fdd22d 100644
index 9f9ee582fce2..3a2fdd22dc21 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/core_linecards.c
+++ b/drivers/net/ethernet/mellanox/mlxsw/core_linecards.c
@@ -576,6 +576,59 @@ static void mlxsw_linecard_provision_fail(struct mlxsw_core *mlxsw_core,
@@ -273,5 +273,5 @@ index 9f9ee582f..3a2fdd22d 100644
+
MODULE_FIRMWARE(MLXSW_LINECARDS_INI_BUNDLE_FILE);
--
2.30.2
2.20.1

18
platform/mellanox/non-upstream-patches/patches/0148-mlxsw-core-Add-interfaces-for-line-card-initializati.patch
View File

@@ -1,8 +1,8 @@
From 8d6f7da411b62b4450db1ebb8b687dbc5a386300 Mon Sep 17 00:00:00 2001
From d037308b118ee4a1ccf557dc3f1c47b81bb62c4c Mon Sep 17 00:00:00 2001
From: Vadim Pasternak <vadimp@nvidia.com>
Date: Mon, 13 Dec 2021 12:54:36 +0000
Subject: [PATCH] mlxsw: core: Add interfaces for line card initialization and
de-initialization
Subject: [PATCH backport 5.10 148/182] mlxsw: core: Add interfaces for line
card initialization and de-initialization
Add callback functions for line card cables info initialization and
de-initialization.
@@ -19,10 +19,10 @@ Signed-off-by: Vadim Pasternak <vadimp@nvidia.com>
1 file changed, 78 insertions(+)
diff --git a/drivers/net/ethernet/mellanox/mlxsw/core_env.c b/drivers/net/ethernet/mellanox/mlxsw/core_env.c
index c27cd424b..f9c770eec 100644
index 4f3fc25af013..98f7cf672d9e 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/core_env.c
+++ b/drivers/net/ethernet/mellanox/mlxsw/core_env.c
@@ -1162,6 +1162,77 @@ mlxsw_env_module_event_disable(struct mlxsw_env *mlxsw_env, u8 slot_index)
@@ -1160,6 +1160,77 @@ mlxsw_env_module_event_disable(struct mlxsw_env *mlxsw_env, u8 slot_index)
{
}
@@ -100,7 +100,7 @@ index c27cd424b..f9c770eec 100644
int mlxsw_env_init(struct mlxsw_core *mlxsw_core, struct mlxsw_env **p_env)
{
u8 module_count, num_of_slots, max_module_count;
@@ -1198,6 +1269,10 @@ int mlxsw_env_init(struct mlxsw_core *mlxsw_core, struct mlxsw_env **p_env)
@@ -1196,6 +1267,10 @@ int mlxsw_env_init(struct mlxsw_core *mlxsw_core, struct mlxsw_env **p_env)
mutex_init(&env->line_cards_lock);
*p_env = env;
@@ -111,7 +111,7 @@ index c27cd424b..f9c770eec 100644
err = mlxsw_env_temp_warn_event_register(mlxsw_core);
if (err)
goto err_temp_warn_event_register;
@@ -1225,6 +1300,8 @@ int mlxsw_env_init(struct mlxsw_core *mlxsw_core, struct mlxsw_env **p_env)
@@ -1223,6 +1298,8 @@ int mlxsw_env_init(struct mlxsw_core *mlxsw_core, struct mlxsw_env **p_env)
err_module_plug_event_register:
mlxsw_env_temp_warn_event_unregister(env);
err_temp_warn_event_register:
@@ -120,7 +120,7 @@ index c27cd424b..f9c770eec 100644
mutex_destroy(&env->line_cards_lock);
mlxsw_env_line_cards_free(env);
err_mlxsw_env_line_cards_alloc:
@@ -1239,6 +1316,7 @@ void mlxsw_env_fini(struct mlxsw_env *env)
@@ -1237,6 +1314,7 @@ void mlxsw_env_fini(struct mlxsw_env *env)
/* Make sure there is no more event work scheduled. */
mlxsw_core_flush_owq();
mlxsw_env_temp_warn_event_unregister(env);
@@ -129,5 +129,5 @@ index c27cd424b..f9c770eec 100644
mlxsw_env_line_cards_free(env);
kfree(env);
--
2.30.2
2.20.1

22
platform/mellanox/non-upstream-patches/patches/0149-mlxsw-core_thermal-Add-interfaces-for-line-card-init.patch
View File

@@ -1,8 +1,8 @@
From 62b2da593b9ee1042b0d65c7b84e9f463497ecd8 Mon Sep 17 00:00:00 2001
From 71416a2dd1900ac8eb9b7d5cd08911d331b074ff Mon Sep 17 00:00:00 2001
From: Vadim Pasternak <vadimp@nvidia.com>
Date: Wed, 12 May 2021 22:57:39 +0300
Subject: [PATCH] mlxsw: core_thermal: Add interfaces for line card
initialization and de-initialization
Subject: [PATCH backport 5.10 149/182] mlxsw: core_thermal: Add interfaces for
line card initialization and de-initialization
Add callback functions for line card thermal area initialization and
de-initialization. Each line card is associated with the relevant
@@ -34,10 +34,10 @@ Signed-off-by: Jiri Pirko <jiri@nvidia.com>
1 file changed, 129 insertions(+)
diff --git a/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c b/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c
index e860cade5..88a2f63c8 100644
index b9253c9f70d9..529108aea3c6 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c
+++ b/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c
@@ -96,6 +96,7 @@ struct mlxsw_thermal_module {
@@ -88,6 +88,7 @@ struct mlxsw_thermal_module {
};
struct mlxsw_thermal_area {
@@ -45,7 +45,7 @@ index e860cade5..88a2f63c8 100644
struct mlxsw_thermal_module *tz_module_arr;
u8 tz_module_num;
struct mlxsw_thermal_module *tz_gearbox_arr;
@@ -113,6 +114,7 @@ struct mlxsw_thermal {
@@ -105,6 +106,7 @@ struct mlxsw_thermal {
u8 cooling_levels[MLXSW_THERMAL_MAX_STATE + 1];
struct mlxsw_thermal_trip trips[MLXSW_THERMAL_NUM_TRIPS];
struct mlxsw_thermal_area *main;
@@ -53,7 +53,7 @@ index e860cade5..88a2f63c8 100644
unsigned int tz_highest_score;
struct thermal_zone_device *tz_highest_dev;
};
@@ -989,6 +991,126 @@ mlxsw_thermal_gearboxes_fini(struct mlxsw_thermal *thermal,
@@ -948,6 +950,126 @@ mlxsw_thermal_gearboxes_fini(struct mlxsw_thermal *thermal,
mlxsw_thermal_gearbox_tz_fini(&area->tz_gearbox_arr[i]);
}
@@ -180,7 +180,7 @@ index e860cade5..88a2f63c8 100644
int mlxsw_thermal_init(struct mlxsw_core *core,
const struct mlxsw_bus_info *bus_info,
struct mlxsw_thermal **p_thermal)
@@ -1094,6 +1216,10 @@ int mlxsw_thermal_init(struct mlxsw_core *core,
@@ -1052,6 +1174,10 @@ int mlxsw_thermal_init(struct mlxsw_core *core,
if (err)
goto err_thermal_gearboxes_init;
@@ -191,7 +191,7 @@ index e860cade5..88a2f63c8 100644
err = thermal_zone_device_enable(thermal->tzdev);
if (err)
goto err_thermal_zone_device_enable;
@@ -1102,6 +1228,8 @@ int mlxsw_thermal_init(struct mlxsw_core *core,
@@ -1060,6 +1186,8 @@ int mlxsw_thermal_init(struct mlxsw_core *core,
return 0;
err_thermal_zone_device_enable:
@@ -200,7 +200,7 @@ index e860cade5..88a2f63c8 100644
mlxsw_thermal_gearboxes_fini(thermal, thermal->main);
err_thermal_gearboxes_init:
mlxsw_thermal_gearboxes_main_fini(thermal->main);
@@ -1129,6 +1257,7 @@ void mlxsw_thermal_fini(struct mlxsw_thermal *thermal)
@@ -1087,6 +1215,7 @@ void mlxsw_thermal_fini(struct mlxsw_thermal *thermal)
{
int i;
@@ -209,5 +209,5 @@ index e860cade5..88a2f63c8 100644
mlxsw_thermal_gearboxes_main_fini(thermal->main);
mlxsw_thermal_modules_fini(thermal, thermal->main);
--
2.30.2
2.20.1

10
platform/mellanox/non-upstream-patches/patches/0150-mlxsw-core_hwmon-Add-interfaces-for-line-card-initia.patch
View File

@@ -1,8 +1,8 @@
From 97f2a14ec9543588b37be8fc54aad9ed13cceec9 Mon Sep 17 00:00:00 2001
From 7405ad4281c96aedcf879357d03487556abed05d Mon Sep 17 00:00:00 2001
From: Vadim Pasternak <vadimp@nvidia.com>
Date: Wed, 12 May 2021 22:57:42 +0300
Subject: [PATCH] mlxsw: core_hwmon: Add interfaces for line card
initialization and de-initialization
Subject: [PATCH backport 5.10 150/182] mlxsw: core_hwmon: Add interfaces for
line card initialization and de-initialization
Add callback functions for line card 'hwmon' initialization and
de-initialization. Each line card is associated with the relevant
@@ -29,7 +29,7 @@ Signed-off-by: Jiri Pirko <jiri@nvidia.com>
1 file changed, 134 insertions(+), 3 deletions(-)
diff --git a/drivers/net/ethernet/mellanox/mlxsw/core_hwmon.c b/drivers/net/ethernet/mellanox/mlxsw/core_hwmon.c
index 6af23f472..a27146cca 100644
index 6af23f4724e4..a27146ccafc5 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/core_hwmon.c
+++ b/drivers/net/ethernet/mellanox/mlxsw/core_hwmon.c
@@ -19,6 +19,7 @@
@@ -231,5 +231,5 @@ index 6af23f472..a27146cca 100644
mlxsw_hwmon_gearbox_main_fini(mlxsw_hwmon->main);
kfree(mlxsw_hwmon->main);
--
2.30.2
2.20.1

9
platform/mellanox/non-upstream-patches/patches/0151-mlxsw-minimal-Prepare-driver-for-modular-system-supp.patch
View File

@@ -1,7 +1,8 @@
From 37eabf5ec0121c1a5092f48360b3d1208a22e655 Mon Sep 17 00:00:00 2001
From e3a3f15e69b566577c2ebe0b6f3bc019476c6879 Mon Sep 17 00:00:00 2001
From: Vadim Pasternak <vadimp@nvidia.com>
Date: Thu, 30 Dec 2021 16:02:59 +0000
Subject: [PATCH] mlxsw: minimal: Prepare driver for modular system support
Subject: [PATCH backport 5.10 151/182] mlxsw: minimal: Prepare driver for
modular system support
As a preparation for line cards support:
- Allocate per line card array according to the queried number of slots
@@ -23,7 +24,7 @@ Signed-off-by: Vadim Pasternak <vadimp@nvidia.com>
1 file changed, 242 insertions(+), 51 deletions(-)
diff --git a/drivers/net/ethernet/mellanox/mlxsw/minimal.c b/drivers/net/ethernet/mellanox/mlxsw/minimal.c
index 30925f573..59c5053dc 100644
index 30925f57362e..59c5053dc5fd 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/minimal.c
+++ b/drivers/net/ethernet/mellanox/mlxsw/minimal.c
@@ -24,22 +24,40 @@ static const struct mlxsw_fw_rev mlxsw_m_fw_rev = {
@@ -491,5 +492,5 @@ index 30925f573..59c5053dc 100644
static const struct mlxsw_config_profile mlxsw_m_config_profile;
--
2.30.2
2.20.1

18
platform/mellanox/non-upstream-patches/patches/0152-mlxsw-core-Extend-bus-init-function-with-event-handl.patch
View File

@@ -1,8 +1,8 @@
From bf88a40c8d0379e1ce8a6cc0a2bf4f935f90307c Mon Sep 17 00:00:00 2001
From da7c615b231402e3084dae855468be117538535c Mon Sep 17 00:00:00 2001
From: Vadim Pasternak <vadimp@nvidia.com>
Date: Wed, 15 Dec 2021 08:59:14 +0000
Subject: [PATCH] mlxsw: core: Extend bus init function with event handler
argument
Subject: [PATCH backport 5.10 152/182] mlxsw: core: Extend bus init function
with event handler argument
The purpose of new argument - is to introduce system event handler for
treating line card activation / deactivation signals on modular system.
@@ -16,7 +16,7 @@ Signed-off-by: Vadim Pasternak <vadimp@nvidia.com>
4 files changed, 13 insertions(+), 6 deletions(-)
diff --git a/drivers/net/ethernet/mellanox/mlxsw/core.c b/drivers/net/ethernet/mellanox/mlxsw/core.c
index 8c1280781..a9bb43837 100644
index 8c128078105a..a9bb43837b33 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/core.c
+++ b/drivers/net/ethernet/mellanox/mlxsw/core.c
@@ -2005,7 +2005,8 @@ __mlxsw_core_bus_device_register(const struct mlxsw_bus_info *mlxsw_bus_info,
@@ -30,7 +30,7 @@ index 8c1280781..a9bb43837 100644
goto err_bus_init;
diff --git a/drivers/net/ethernet/mellanox/mlxsw/core.h b/drivers/net/ethernet/mellanox/mlxsw/core.h
index 10ea541bb..b09f9013d 100644
index 10ea541bb19d..b09f9013db77 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/core.h
+++ b/drivers/net/ethernet/mellanox/mlxsw/core.h
@@ -390,6 +390,7 @@ struct mlxsw_driver {
@@ -52,10 +52,10 @@ index 10ea541bb..b09f9013d 100644
bool (*skb_transmit_busy)(void *bus_priv,
const struct mlxsw_tx_info *tx_info);
diff --git a/drivers/net/ethernet/mellanox/mlxsw/i2c.c b/drivers/net/ethernet/mellanox/mlxsw/i2c.c
index b8a5c0cbb..b75416561 100644
index ce843ea91464..0cdb9b9d8353 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/i2c.c
+++ b/drivers/net/ethernet/mellanox/mlxsw/i2c.c
@@ -530,7 +530,8 @@ static int mlxsw_i2c_skb_transmit(void *bus_priv, struct sk_buff *skb,
@@ -509,7 +509,8 @@ static int mlxsw_i2c_skb_transmit(void *bus_priv, struct sk_buff *skb,
static int
mlxsw_i2c_init(void *bus_priv, struct mlxsw_core *mlxsw_core,
const struct mlxsw_config_profile *profile,
@@ -66,7 +66,7 @@ index b8a5c0cbb..b75416561 100644
struct mlxsw_i2c *mlxsw_i2c = bus_priv;
char *mbox;
diff --git a/drivers/net/ethernet/mellanox/mlxsw/pci.c b/drivers/net/ethernet/mellanox/mlxsw/pci.c
index dbb16ce25..e8e91130c 100644
index dbb16ce25bdf..e8e91130cdf5 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/pci.c
+++ b/drivers/net/ethernet/mellanox/mlxsw/pci.c
@@ -1411,9 +1411,12 @@ static void mlxsw_pci_free_irq_vectors(struct mlxsw_pci *mlxsw_pci)
@@ -86,5 +86,5 @@ index dbb16ce25..e8e91130c 100644
struct mlxsw_pci *mlxsw_pci = bus_priv;
struct pci_dev *pdev = mlxsw_pci->pdev;
--
2.30.2
2.20.1

31
platform/mellanox/non-upstream-patches/patches/0153-mlxsw-i2c-Add-support-for-system-events-handling.patch
View File

@@ -1,7 +1,8 @@
From c5235b3c4a8ab2b758140d75a7422117e917478c Mon Sep 17 00:00:00 2001
From 8d7807e7b8326c537aa7db4fe31b2ca183d32248 Mon Sep 17 00:00:00 2001
From: Vadim Pasternak <vadimp@nvidia.com>
Date: Sun, 19 Dec 2021 09:12:58 +0000
Subject: [PATCH] mlxsw: i2c: Add support for system events handling
Subject: [PATCH backport v5.10.164 1/1] mlxsw: i2c: Add support for system
events handling
Extend i2c bus driver with interrupt handler to support system specific
hotplug events, related to line card state change.
@@ -17,7 +18,7 @@ Signed-off-by: Vadim Pasternak <vadimp@nvidia.com>
1 file changed, 110 insertions(+)
diff --git a/drivers/net/ethernet/mellanox/mlxsw/i2c.c b/drivers/net/ethernet/mellanox/mlxsw/i2c.c
index b75416561..e5883b4e8 100644
index cc99ec3f4e96..02f5733cfcc6 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/i2c.c
+++ b/drivers/net/ethernet/mellanox/mlxsw/i2c.c
@@ -9,6 +9,7 @@
@@ -41,33 +42,33 @@ index b75416561..e5883b4e8 100644
/**
* struct mlxsw_i2c - device private data:
* @cmd: command attributes;
@@ -64,6 +71,12 @@
@@ -63,6 +70,12 @@
* @core: switch core pointer;
* @bus_info: bus info block;
* @block_size: maximum block size allowed to pass to under layer;
* @status: status to indicate chip reset or in-service update;
+ * @pdata: device platform data;
+ * @dwork_irq: interrupts delayed work queue;
+ * @lock - lock for interrupts sync;
+ * @sys_event_handler: system events handler callback;
+ * @irq: IRQ line number;
+ * @irq_unhandled_count: number of unhandled interrupts;
* @status: status to indicate chip reset or in-service update;
*/
struct mlxsw_i2c {
struct {
@@ -78,6 +91,12 @@ struct mlxsw_i2c {
@@ -77,6 +90,12 @@ struct mlxsw_i2c {
struct mlxsw_core *core;
struct mlxsw_bus_info bus_info;
u16 block_size;
u8 status;
+ struct mlxreg_core_hotplug_platform_data *pdata;
+ struct delayed_work dwork_irq;
+ spinlock_t lock; /* sync with interrupt */
+ void (*sys_event_handler)(struct mlxsw_core *mlxsw_core);
+ int irq;
+ atomic_t irq_unhandled_count;
u8 status;
};
#define MLXSW_I2C_READ_MSG(_client, _addr_buf, _buf, _len) { \
@@ -538,6 +557,7 @@ mlxsw_i2c_init(void *bus_priv, struct mlxsw_core *mlxsw_core,
@@ -537,6 +556,7 @@ mlxsw_i2c_init(void *bus_priv, struct mlxsw_core *mlxsw_core,
int err;
mlxsw_i2c->core = mlxsw_core;
@@ -75,7 +76,7 @@ index b75416561..e5883b4e8 100644
mbox = mlxsw_cmd_mbox_alloc();
if (!mbox)
@@ -568,6 +588,87 @@ static void mlxsw_i2c_fini(void *bus_priv)
@@ -567,6 +587,87 @@ static void mlxsw_i2c_fini(void *bus_priv)
mlxsw_i2c->core = NULL;
}
@@ -163,7 +164,7 @@ index b75416561..e5883b4e8 100644
static const struct mlxsw_bus mlxsw_i2c_bus = {
.kind = "i2c",
.init = mlxsw_i2c_init,
@@ -662,6 +763,7 @@ static int mlxsw_i2c_probe(struct i2c_client *client,
@@ -661,6 +762,7 @@ static int mlxsw_i2c_probe(struct i2c_client *client,
mlxsw_i2c->bus_info.dev = &client->dev;
mlxsw_i2c->bus_info.low_frequency = true;
mlxsw_i2c->dev = &client->dev;
@@ -171,7 +172,7 @@ index b75416561..e5883b4e8 100644
err = mlxsw_core_bus_device_register(&mlxsw_i2c->bus_info,
&mlxsw_i2c_bus, mlxsw_i2c, false,
@@ -671,6 +773,12 @@ static int mlxsw_i2c_probe(struct i2c_client *client,
@@ -670,6 +772,12 @@ static int mlxsw_i2c_probe(struct i2c_client *client,
return err;
}
@@ -184,7 +185,7 @@ index b75416561..e5883b4e8 100644
return 0;
errout:
@@ -684,6 +792,8 @@ static int mlxsw_i2c_remove(struct i2c_client *client)
@@ -683,6 +791,8 @@ static int mlxsw_i2c_remove(struct i2c_client *client)
{
struct mlxsw_i2c *mlxsw_i2c = i2c_get_clientdata(client);
@@ -194,5 +195,5 @@ index b75416561..e5883b4e8 100644
mutex_destroy(&mlxsw_i2c->cmd.lock);
--
2.30.2
2.20.1

8
platform/mellanox/non-upstream-patches/patches/0154-mlxsw-core-Export-line-card-API.patch
View File

@@ -1,7 +1,7 @@
From 8099c3baf5f819fdf187b67cc3ed0ce25360cf88 Mon Sep 17 00:00:00 2001
From a89d212954b74f3169e3061a3623eadfb86441e6 Mon Sep 17 00:00:00 2001
From: Vadim Pasternak <vadimp@nvidia.com>
Date: Sun, 19 Dec 2021 09:31:32 +0000
Subject: [PATCH] mlxsw: core: Export line card API
Subject: [PATCH backport 5.10 154/182] mlxsw: core: Export line card API
Export API mlxsw_core_linecards() for being used by 'minimal' driver.
@@ -11,7 +11,7 @@ Signed-off-by: Vadim Pasternak <vadimp@nvidia.com>
1 file changed, 1 insertion(+)
diff --git a/drivers/net/ethernet/mellanox/mlxsw/core.c b/drivers/net/ethernet/mellanox/mlxsw/core.c
index a9bb43837..a26c6d880 100644
index a9bb43837b33..a26c6d880928 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/core.c
+++ b/drivers/net/ethernet/mellanox/mlxsw/core.c
@@ -103,6 +103,7 @@ struct mlxsw_linecards *mlxsw_core_linecards(struct mlxsw_core *mlxsw_core)
@@ -23,5 +23,5 @@ index a9bb43837..a26c6d880 100644
#define MLXSW_PORT_MAX_PORTS_DEFAULT 0x40
--
2.30.2
2.20.1

9
platform/mellanox/non-upstream-patches/patches/0155-mlxsw-minimal-Add-system-event-handler.patch
View File

@@ -1,7 +1,8 @@
From b526413a86afcd1d6bd3f4e05f25631c8103f617 Mon Sep 17 00:00:00 2001
From deb4f328672850d9ac4d8d51be7e0d8e727387af Mon Sep 17 00:00:00 2001
From: Vadim Pasternak <vadimp@nvidia.com>
Date: Sun, 19 Dec 2021 09:25:35 +0000
Subject: [PATCH] mlxsw: minimal: Add system event handler
Subject: [PATCH backport 5.10 155/182] mlxsw: minimal: Add system event
handler
Add system event handler for treating line card specific signals on
modular system. These signals indicate line card state changes, like
@@ -16,7 +17,7 @@ Signed-off-by: Vadim Pasternak <vadimp@nvidia.com>
1 file changed, 23 insertions(+)
diff --git a/drivers/net/ethernet/mellanox/mlxsw/minimal.c b/drivers/net/ethernet/mellanox/mlxsw/minimal.c
index 59c5053dc..27afb28e4 100644
index 59c5053dc5fd..27afb28e439f 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/minimal.c
+++ b/drivers/net/ethernet/mellanox/mlxsw/minimal.c
@@ -527,6 +527,28 @@ static void mlxsw_m_line_cards_free(struct mlxsw_m *mlxsw_m)
@@ -57,5 +58,5 @@ index 59c5053dc..27afb28e4 100644
.res_query_enabled = true,
};
--
2.30.2
2.20.1

10
platform/mellanox/non-upstream-patches/patches/0156-mlxsw-minimal-Add-interfaces-for-line-card-initializ.patch
View File

@@ -1,8 +1,8 @@
From 20b2dd627f42e79a8fce30d29d4cea64f6636521 Mon Sep 17 00:00:00 2001
From 933a623916a00d83616d653a82329750d94de0f1 Mon Sep 17 00:00:00 2001
From: Vadim Pasternak <vadimp@nvidia.com>
Date: Sun, 19 Dec 2021 09:40:34 +0000
Subject: [PATCH] mlxsw: minimal: Add interfaces for line card initialization
and de-initialization
Subject: [PATCH backport 5.10 156/182] mlxsw: minimal: Add interfaces for line
card initialization and de-initialization
Add callback functions for line card 'netdevice' objects initialization
and de-initialization. Each line card is associated with the set of
@@ -18,7 +18,7 @@ Signed-off-by: Vadim Pasternak <vadimp@nvidia.com>
1 file changed, 70 insertions(+)
diff --git a/drivers/net/ethernet/mellanox/mlxsw/minimal.c b/drivers/net/ethernet/mellanox/mlxsw/minimal.c
index 27afb28e4..0b605c6aa 100644
index 27afb28e439f..0b605c6aa637 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/minimal.c
+++ b/drivers/net/ethernet/mellanox/mlxsw/minimal.c
@@ -549,6 +549,69 @@ static void mlxsw_m_sys_event_handler(struct mlxsw_core *mlxsw_core)
@@ -115,5 +115,5 @@ index 27afb28e4..0b605c6aa 100644
mlxsw_m_line_cards_free(mlxsw_m);
}
--
2.30.2
2.20.1

420
platform/mellanox/non-upstream-patches/patches/0163-platform-mellanox-Introduce-support-for-rack-manager.patch
View File

@@ -1,420 +0,0 @@
From bb18ddc163092447e40f8aba96140280e2201409 Mon Sep 17 00:00:00 2001
From: Vadim Pasternak <vadimp@nvidia.com>
Date: Mon, 14 Feb 2022 13:24:44 +0200
Subject: [PATCH] platform: mellanox: Introduce support for rack manager switch
The rack switch is designed to provide high bandwidth, low latency
connectivity using optical fiber as the primary interconnect.
System supports 32 OSFP ports, non-blocking switching capacity of
25.6Tbps.
System equipped with:
- 2 replaceable power supplies (AC) with 1+1 redundancy model.
- 7 replaceable fan drawers with 6+1 redundancy model.
- 2 External Root of Trust or EROT (Glacier) devices for securing
ASICs firmware.
Signed-off-by: Vadim Pasternak <vadimp@nvidia.com>
---
drivers/platform/x86/mlx-platform.c | 259 ++++++++++++++++++++++++++++
1 file changed, 259 insertions(+)
diff --git a/drivers/platform/x86/mlx-platform.c b/drivers/platform/x86/mlx-platform.c
index d0bb2becf..f1d0cc1aa 100644
--- a/drivers/platform/x86/mlx-platform.c
+++ b/drivers/platform/x86/mlx-platform.c
@@ -90,6 +90,12 @@
#define MLXPLAT_CPLD_LPC_REG_FAN_OFFSET 0x88
#define MLXPLAT_CPLD_LPC_REG_FAN_EVENT_OFFSET 0x89
#define MLXPLAT_CPLD_LPC_REG_FAN_MASK_OFFSET 0x8a
+#define MLXPLAT_CPLD_LPC_REG_EROT_OFFSET 0x91
+#define MLXPLAT_CPLD_LPC_REG_EROT_EVENT_OFFSET 0x92
+#define MLXPLAT_CPLD_LPC_REG_EROT_MASK_OFFSET 0x93
+#define MLXPLAT_CPLD_LPC_REG_EROTE_OFFSET 0x94
+#define MLXPLAT_CPLD_LPC_REG_EROTE_EVENT_OFFSET 0x95
+#define MLXPLAT_CPLD_LPC_REG_EROTE_MASK_OFFSET 0x96
#define MLXPLAT_CPLD_LPC_REG_LC_VR_OFFSET 0x9a
#define MLXPLAT_CPLD_LPC_REG_LC_VR_EVENT_OFFSET 0x9b
#define MLXPLAT_CPLD_LPC_REG_LC_VR_MASK_OFFSET 0x9c
@@ -109,6 +115,8 @@
#define MLXPLAT_CPLD_LPC_REG_LC_SD_EVENT_OFFSET 0xaa
#define MLXPLAT_CPLD_LPC_REG_LC_SD_MASK_OFFSET 0xab
#define MLXPLAT_CPLD_LPC_REG_LC_PWR_ON 0xb2
+#define MLXPLAT_CPLD_LPC_REG_GP4_RO_OFFSET 0xc2
+#define MLXPLAT_CPLD_LPC_REG_SPI_CHNL_SELECT 0xc3
#define MLXPLAT_CPLD_LPC_REG_WD_CLEAR_OFFSET 0xc7
#define MLXPLAT_CPLD_LPC_REG_WD_CLEAR_WP_OFFSET 0xc8
#define MLXPLAT_CPLD_LPC_REG_WD1_TMR_OFFSET 0xc9
@@ -214,6 +222,7 @@
#define MLXPLAT_CPLD_LED_HI_NIBBLE_MASK GENMASK(3, 0)
#define MLXPLAT_CPLD_VOLTREG_UPD_MASK GENMASK(5, 4)
#define MLXPLAT_CPLD_GWP_MASK GENMASK(0, 0)
+#define MLXPLAT_CPLD_EROT_MASK GENMASK(1, 0)
#define MLXPLAT_CPLD_I2C_CAP_BIT 0x04
#define MLXPLAT_CPLD_I2C_CAP_MASK GENMASK(5, MLXPLAT_CPLD_I2C_CAP_BIT)
@@ -243,6 +252,7 @@
#define MLXPLAT_CPLD_CH2_ETH_MODULAR 3
#define MLXPLAT_CPLD_CH3_ETH_MODULAR 43
#define MLXPLAT_CPLD_CH4_ETH_MODULAR 51
+#define MLXPLAT_CPLD_CH2_RACK_SWITCH 18
/* Number of LPC attached MUX platform devices */
#define MLXPLAT_CPLD_LPC_MUX_DEVS 4
@@ -280,6 +290,9 @@
/* Minimum power required for turning on Ethernet modular system (WATT) */
#define MLXPLAT_CPLD_ETH_MODULAR_PWR_MIN 50
+/* Default value for PWM control register for rack switch system */
+#define MLXPLAT_REGMAP_NVSWITCH_PWM_DEFAULT 0xf4
+
/* mlxplat_priv - platform private data
* @pdev_i2c - i2c controller platform device
* @pdev_mux - array of mux platform devices
@@ -460,6 +473,36 @@ static struct i2c_mux_reg_platform_data mlxplat_modular_mux_data[] = {
},
};
+/* Platform channels for rack swicth system family */
+static const int mlxplat_rack_switch_channels[] = {
+ 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16,
+};
+
+/* Platform rack switch mux data */
+static struct i2c_mux_reg_platform_data mlxplat_rack_switch_mux_data[] = {
+ {
+ .parent = 1,
+ .base_nr = MLXPLAT_CPLD_CH1,
+ .write_only = 1,
+ .reg = (void __iomem *)MLXPLAT_CPLD_LPC_REG1,
+ .reg_size = 1,
+ .idle_in_use = 1,
+ .values = mlxplat_rack_switch_channels,
+ .n_values = ARRAY_SIZE(mlxplat_rack_switch_channels),
+ },
+ {
+ .parent = 1,
+ .base_nr = MLXPLAT_CPLD_CH2_RACK_SWITCH,
+ .write_only = 1,
+ .reg = (void __iomem *)MLXPLAT_CPLD_LPC_REG2,
+ .reg_size = 1,
+ .idle_in_use = 1,
+ .values = mlxplat_msn21xx_channels,
+ .n_values = ARRAY_SIZE(mlxplat_msn21xx_channels),
+ },
+
+};
+
/* Platform hotplug devices */
static struct i2c_board_info mlxplat_mlxcpld_pwr[] = {
{
@@ -2064,6 +2107,97 @@ struct mlxreg_core_hotplug_platform_data mlxplat_mlxcpld_chassis_blade_data = {
.mask_low = MLXPLAT_CPLD_LOW_AGGR_MASK_LOW,
};
+/* Platform hotplug for switch systems family data */
+static struct mlxreg_core_data mlxplat_mlxcpld_erot_ap_items_data[] = {
+ {
+ .label = "erot1_ap",
+ .reg = MLXPLAT_CPLD_LPC_REG_EROT_OFFSET,
+ .mask = BIT(0),
+ .hpdev.nr = MLXPLAT_CPLD_NR_NONE,
+ },
+ {
+ .label = "erot2_ap",
+ .reg = MLXPLAT_CPLD_LPC_REG_EROT_OFFSET,
+ .mask = BIT(1),
+ .hpdev.nr = MLXPLAT_CPLD_NR_NONE,
+ },
+};
+
+static struct mlxreg_core_data mlxplat_mlxcpld_erot_error_items_data[] = {
+ {
+ .label = "erot1_error",
+ .reg = MLXPLAT_CPLD_LPC_REG_EROTE_OFFSET,
+ .mask = BIT(0),
+ .hpdev.nr = MLXPLAT_CPLD_NR_NONE,
+ },
+ {
+ .label = "erot2_error",
+ .reg = MLXPLAT_CPLD_LPC_REG_EROTE_OFFSET,
+ .mask = BIT(1),
+ .hpdev.nr = MLXPLAT_CPLD_NR_NONE,
+ },
+};
+
+static struct mlxreg_core_item mlxplat_mlxcpld_rack_switch_items[] = {
+ {
+ .data = mlxplat_mlxcpld_ext_psu_items_data,
+ .aggr_mask = MLXPLAT_CPLD_AGGR_MASK_NG_DEF,
+ .reg = MLXPLAT_CPLD_LPC_REG_PSU_OFFSET,
+ .mask = MLXPLAT_CPLD_PSU_EXT_MASK,
+ .capability = MLXPLAT_CPLD_LPC_REG_PSU_I2C_CAP_OFFSET,
+ .count = ARRAY_SIZE(mlxplat_mlxcpld_ext_psu_items_data),
+ .inversed = 1,
+ .health = false,
+ },
+ {
+ .data = mlxplat_mlxcpld_ext_pwr_items_data,
+ .aggr_mask = MLXPLAT_CPLD_AGGR_MASK_NG_DEF,
+ .reg = MLXPLAT_CPLD_LPC_REG_PWR_OFFSET,
+ .mask = MLXPLAT_CPLD_PWR_EXT_MASK,
+ .capability = MLXPLAT_CPLD_LPC_REG_PSU_I2C_CAP_OFFSET,
+ .count = ARRAY_SIZE(mlxplat_mlxcpld_ext_pwr_items_data),
+ .inversed = 0,
+ .health = false,
+ },
+ {
+ .data = mlxplat_mlxcpld_default_ng_fan_items_data,
+ .aggr_mask = MLXPLAT_CPLD_AGGR_MASK_NG_DEF,
+ .reg = MLXPLAT_CPLD_LPC_REG_FAN_OFFSET,
+ .mask = MLXPLAT_CPLD_FAN_NG_MASK,
+ .count = ARRAY_SIZE(mlxplat_mlxcpld_default_ng_fan_items_data),
+ .inversed = 1,
+ .health = false,
+ },
+ {
+ .data = mlxplat_mlxcpld_erot_ap_items_data,
+ .aggr_mask = MLXPLAT_CPLD_AGGR_MASK_NG_DEF,
+ .reg = MLXPLAT_CPLD_LPC_REG_EROT_OFFSET,
+ .mask = MLXPLAT_CPLD_EROT_MASK,
+ .count = ARRAY_SIZE(mlxplat_mlxcpld_erot_ap_items_data),
+ .inversed = 1,
+ .health = false,
+ },
+ {
+ .data = mlxplat_mlxcpld_erot_error_items_data,
+ .aggr_mask = MLXPLAT_CPLD_AGGR_MASK_NG_DEF,
+ .reg = MLXPLAT_CPLD_LPC_REG_EROTE_OFFSET,
+ .mask = MLXPLAT_CPLD_EROT_MASK,
+ .count = ARRAY_SIZE(mlxplat_mlxcpld_erot_error_items_data),
+ .inversed = 1,
+ .health = false,
+ },
+};
+
+static
+struct mlxreg_core_hotplug_platform_data mlxplat_mlxcpld_rack_switch_data = {
+ .items = mlxplat_mlxcpld_rack_switch_items,
+ .counter = ARRAY_SIZE(mlxplat_mlxcpld_rack_switch_items),
+ .cell = MLXPLAT_CPLD_LPC_REG_AGGR_OFFSET,
+ .mask = MLXPLAT_CPLD_AGGR_MASK_NG_DEF | MLXPLAT_CPLD_AGGR_MASK_COMEX,
+ .cell_low = MLXPLAT_CPLD_LPC_REG_AGGRLO_OFFSET,
+ .mask_low = MLXPLAT_CPLD_LOW_AGGR_MASK_LOW,
+};
+
/* Platform led default data */
static struct mlxreg_core_data mlxplat_mlxcpld_default_led_data[] = {
{
@@ -2947,6 +3081,42 @@ static struct mlxreg_core_data mlxplat_mlxcpld_default_ng_regs_io_data[] = {
.mask = GENMASK(7, 0) & ~BIT(2),
.mode = 0444,
},
+ {
+ .label = "erot1_reset",
+ .reg = MLXPLAT_CPLD_LPC_REG_RESET_GP2_OFFSET,
+ .mask = GENMASK(7, 0) & ~BIT(6),
+ .mode = 0644,
+ },
+ {
+ .label = "erot2_reset",
+ .reg = MLXPLAT_CPLD_LPC_REG_RESET_GP2_OFFSET,
+ .mask = GENMASK(7, 0) & ~BIT(7),
+ .mode = 0644,
+ },
+ {
+ .label = "erot1_recovery",
+ .reg = MLXPLAT_CPLD_LPC_REG_PWM_CONTROL_OFFSET,
+ .mask = GENMASK(7, 0) & ~BIT(6),
+ .mode = 0644,
+ },
+ {
+ .label = "erot2_recovery",
+ .reg = MLXPLAT_CPLD_LPC_REG_PWM_CONTROL_OFFSET,
+ .mask = GENMASK(7, 0) & ~BIT(7),
+ .mode = 0644,
+ },
+ {
+ .label = "erot1_wp",
+ .reg = MLXPLAT_CPLD_LPC_REG_PWM_CONTROL_OFFSET,
+ .mask = GENMASK(7, 0) & ~BIT(4),
+ .mode = 0644,
+ },
+ {
+ .label = "erot2_wp",
+ .reg = MLXPLAT_CPLD_LPC_REG_PWM_CONTROL_OFFSET,
+ .mask = GENMASK(7, 0) & ~BIT(5),
+ .mode = 0644,
+ },
{
.label = "reset_long_pb",
.reg = MLXPLAT_CPLD_LPC_REG_RESET_CAUSE_OFFSET,
@@ -3142,6 +3312,25 @@ static struct mlxreg_core_data mlxplat_mlxcpld_default_ng_regs_io_data[] = {
.mask = GENMASK(7, 0) & ~BIT(4),
.mode = 0644,
},
+ {
+ .label = "erot1_ap_reset",
+ .reg = MLXPLAT_CPLD_LPC_REG_GP4_RO_OFFSET,
+ .mask = GENMASK(7, 0) & ~BIT(0),
+ .mode = 0444,
+ },
+ {
+ .label = "erot2_ap_reset",
+ .reg = MLXPLAT_CPLD_LPC_REG_GP4_RO_OFFSET,
+ .mask = GENMASK(7, 0) & ~BIT(1),
+ .mode = 0444,
+ },
+ {
+ .label = "spi_chnl_select",
+ .reg = MLXPLAT_CPLD_LPC_REG_SPI_CHNL_SELECT,
+ .mask = GENMASK(7, 0),
+ .bit = 1,
+ .mode = 0644,
+ },
{
.label = "config1",
.reg = MLXPLAT_CPLD_LPC_REG_CONFIG1_OFFSET,
@@ -4257,6 +4446,10 @@ static bool mlxplat_mlxcpld_writeable_reg(struct device *dev, unsigned int reg)
case MLXPLAT_CPLD_LPC_REG_PWR_MASK_OFFSET:
case MLXPLAT_CPLD_LPC_REG_FAN_EVENT_OFFSET:
case MLXPLAT_CPLD_LPC_REG_FAN_MASK_OFFSET:
+ case MLXPLAT_CPLD_LPC_REG_EROT_EVENT_OFFSET:
+ case MLXPLAT_CPLD_LPC_REG_EROT_MASK_OFFSET:
+ case MLXPLAT_CPLD_LPC_REG_EROTE_EVENT_OFFSET:
+ case MLXPLAT_CPLD_LPC_REG_EROTE_MASK_OFFSET:
case MLXPLAT_CPLD_LPC_REG_AGGRLC_MASK_OFFSET:
case MLXPLAT_CPLD_LPC_REG_LC_IN_EVENT_OFFSET:
case MLXPLAT_CPLD_LPC_REG_LC_IN_MASK_OFFSET:
@@ -4274,6 +4467,8 @@ static bool mlxplat_mlxcpld_writeable_reg(struct device *dev, unsigned int reg)
case MLXPLAT_CPLD_LPC_REG_LC_SD_EVENT_OFFSET:
case MLXPLAT_CPLD_LPC_REG_LC_SD_MASK_OFFSET:
case MLXPLAT_CPLD_LPC_REG_LC_PWR_ON:
+ case MLXPLAT_CPLD_LPC_REG_GP4_RO_OFFSET:
+ case MLXPLAT_CPLD_LPC_REG_SPI_CHNL_SELECT:
case MLXPLAT_CPLD_LPC_REG_WD_CLEAR_OFFSET:
case MLXPLAT_CPLD_LPC_REG_WD_CLEAR_WP_OFFSET:
case MLXPLAT_CPLD_LPC_REG_WD1_TMR_OFFSET:
@@ -4358,6 +4553,12 @@ static bool mlxplat_mlxcpld_readable_reg(struct device *dev, unsigned int reg)
case MLXPLAT_CPLD_LPC_REG_FAN_OFFSET:
case MLXPLAT_CPLD_LPC_REG_FAN_EVENT_OFFSET:
case MLXPLAT_CPLD_LPC_REG_FAN_MASK_OFFSET:
+ case MLXPLAT_CPLD_LPC_REG_EROT_OFFSET:
+ case MLXPLAT_CPLD_LPC_REG_EROT_EVENT_OFFSET:
+ case MLXPLAT_CPLD_LPC_REG_EROT_MASK_OFFSET:
+ case MLXPLAT_CPLD_LPC_REG_EROTE_OFFSET:
+ case MLXPLAT_CPLD_LPC_REG_EROTE_EVENT_OFFSET:
+ case MLXPLAT_CPLD_LPC_REG_EROTE_MASK_OFFSET:
case MLXPLAT_CPLD_LPC_REG_AGGRLC_OFFSET:
case MLXPLAT_CPLD_LPC_REG_AGGRLC_MASK_OFFSET:
case MLXPLAT_CPLD_LPC_REG_LC_IN_OFFSET:
@@ -4382,6 +4583,7 @@ static bool mlxplat_mlxcpld_readable_reg(struct device *dev, unsigned int reg)
case MLXPLAT_CPLD_LPC_REG_LC_SD_EVENT_OFFSET:
case MLXPLAT_CPLD_LPC_REG_LC_SD_MASK_OFFSET:
case MLXPLAT_CPLD_LPC_REG_LC_PWR_ON:
+ case MLXPLAT_CPLD_LPC_REG_SPI_CHNL_SELECT:
case MLXPLAT_CPLD_LPC_REG_WD_CLEAR_OFFSET:
case MLXPLAT_CPLD_LPC_REG_WD_CLEAR_WP_OFFSET:
case MLXPLAT_CPLD_LPC_REG_WD1_TMR_OFFSET:
@@ -4492,6 +4694,12 @@ static bool mlxplat_mlxcpld_volatile_reg(struct device *dev, unsigned int reg)
case MLXPLAT_CPLD_LPC_REG_FAN_OFFSET:
case MLXPLAT_CPLD_LPC_REG_FAN_EVENT_OFFSET:
case MLXPLAT_CPLD_LPC_REG_FAN_MASK_OFFSET:
+ case MLXPLAT_CPLD_LPC_REG_EROT_OFFSET:
+ case MLXPLAT_CPLD_LPC_REG_EROT_EVENT_OFFSET:
+ case MLXPLAT_CPLD_LPC_REG_EROT_MASK_OFFSET:
+ case MLXPLAT_CPLD_LPC_REG_EROTE_OFFSET:
+ case MLXPLAT_CPLD_LPC_REG_EROTE_EVENT_OFFSET:
+ case MLXPLAT_CPLD_LPC_REG_EROTE_MASK_OFFSET:
case MLXPLAT_CPLD_LPC_REG_AGGRLC_OFFSET:
case MLXPLAT_CPLD_LPC_REG_AGGRLC_MASK_OFFSET:
case MLXPLAT_CPLD_LPC_REG_LC_IN_OFFSET:
@@ -4516,6 +4724,8 @@ static bool mlxplat_mlxcpld_volatile_reg(struct device *dev, unsigned int reg)
case MLXPLAT_CPLD_LPC_REG_LC_SD_EVENT_OFFSET:
case MLXPLAT_CPLD_LPC_REG_LC_SD_MASK_OFFSET:
case MLXPLAT_CPLD_LPC_REG_LC_PWR_ON:
+ case MLXPLAT_CPLD_LPC_REG_GP4_RO_OFFSET:
+ case MLXPLAT_CPLD_LPC_REG_SPI_CHNL_SELECT:
case MLXPLAT_CPLD_LPC_REG_WD2_TMR_OFFSET:
case MLXPLAT_CPLD_LPC_REG_WD2_TLEFT_OFFSET:
case MLXPLAT_CPLD_LPC_REG_WD3_TMR_OFFSET:
@@ -4583,6 +4793,13 @@ static const struct reg_default mlxplat_mlxcpld_regmap_ng400[] = {
{ MLXPLAT_CPLD_LPC_REG_WD3_ACT_OFFSET, 0x00 },
};
+static const struct reg_default mlxplat_mlxcpld_regmap_rack_switch[] = {
+ { MLXPLAT_CPLD_LPC_REG_PWM_CONTROL_OFFSET, MLXPLAT_REGMAP_NVSWITCH_PWM_DEFAULT },
+ { MLXPLAT_CPLD_LPC_REG_WD1_ACT_OFFSET, 0x00 },
+ { MLXPLAT_CPLD_LPC_REG_WD2_ACT_OFFSET, 0x00 },
+ { MLXPLAT_CPLD_LPC_REG_WD3_ACT_OFFSET, 0x00 },
+};
+
static const struct reg_default mlxplat_mlxcpld_regmap_eth_modular[] = {
{ MLXPLAT_CPLD_LPC_REG_GP2_OFFSET, 0x61 },
{ MLXPLAT_CPLD_LPC_REG_PWM_CONTROL_OFFSET, 0x00 },
@@ -4676,6 +4893,20 @@ static const struct regmap_config mlxplat_mlxcpld_regmap_config_ng400 = {
.reg_write = mlxplat_mlxcpld_reg_write,
};
+static const struct regmap_config mlxplat_mlxcpld_regmap_config_rack_switch = {
+ .reg_bits = 8,
+ .val_bits = 8,
+ .max_register = 255,
+ .cache_type = REGCACHE_FLAT,
+ .writeable_reg = mlxplat_mlxcpld_writeable_reg,
+ .readable_reg = mlxplat_mlxcpld_readable_reg,
+ .volatile_reg = mlxplat_mlxcpld_volatile_reg,
+ .reg_defaults = mlxplat_mlxcpld_regmap_rack_switch,
+ .num_reg_defaults = ARRAY_SIZE(mlxplat_mlxcpld_regmap_rack_switch),
+ .reg_read = mlxplat_mlxcpld_reg_read,
+ .reg_write = mlxplat_mlxcpld_reg_write,
+};
+
static const struct regmap_config mlxplat_mlxcpld_regmap_config_eth_modular = {
.reg_bits = 8,
.val_bits = 8,
@@ -4957,6 +5188,27 @@ static int __init mlxplat_dmi_modular_matched(const struct dmi_system_id *dmi)
return 1;
}
+static int __init mlxplat_dmi_rack_switch_matched(const struct dmi_system_id *dmi)
+{
+ int i;
+
+ mlxplat_max_adap_num = MLXPLAT_CPLD_MAX_PHYS_ADAPTER_NUM;
+ mlxplat_mux_num = ARRAY_SIZE(mlxplat_rack_switch_mux_data);
+ mlxplat_mux_data = mlxplat_rack_switch_mux_data;
+ mlxplat_hotplug = &mlxplat_mlxcpld_rack_switch_data;
+ mlxplat_hotplug->deferred_nr =
+ mlxplat_msn21xx_channels[MLXPLAT_CPLD_GRP_CHNL_NUM - 1];
+ mlxplat_led = &mlxplat_default_ng_led_data;
+ mlxplat_regs_io = &mlxplat_default_ng_regs_io_data;
+ mlxplat_fan = &mlxplat_default_fan_data;
+ for (i = 0; i < ARRAY_SIZE(mlxplat_mlxcpld_wd_set_type2); i++)
+ mlxplat_wd_data[i] = &mlxplat_mlxcpld_wd_set_type2[i];
+ mlxplat_i2c = &mlxplat_mlxcpld_i2c_ng_data;
+ mlxplat_regmap_config = &mlxplat_mlxcpld_regmap_config_rack_switch;
+
+ return 1;
+}
+
static const struct dmi_system_id mlxplat_dmi_table[] __initconst = {
{
.callback = mlxplat_dmi_default_wc_matched,
@@ -5007,6 +5259,13 @@ static const struct dmi_system_id mlxplat_dmi_table[] __initconst = {
DMI_MATCH(DMI_BOARD_NAME, "VMOD0009"),
},
},
+ {
+ .callback = mlxplat_dmi_rack_switch_matched,
+ .matches = {
+ DMI_MATCH(DMI_BOARD_NAME, "VMOD0010"),
+ DMI_EXACT_MATCH(DMI_PRODUCT_SKU, "HI142"),
+ },
+ },
{
.callback = mlxplat_dmi_ng400_matched,
.matches = {
--
2.30.2

97
platform/mellanox/non-upstream-patches/patches/0167-DS-lan743x-Add-support-for-fixed-phy.patch Normal file
View File

@@ -0,0 +1,97 @@
From 12b2a85b4b3bb17f44611b9c320fd4e84915b122 Mon Sep 17 00:00:00 2001
From: Vadim Pasternak <vadimp@nvidia.com>
Date: Fri, 6 May 2022 16:52:53 +0300
Subject: [PATCH backport 5.10 167/182] DS: lan743x: Add support for fixed phy
Add support for fixed phy for non DTS architecture.
Signed-off-by: Vadim Pasternak <vadimp@nvidia.com>
---
drivers/net/ethernet/microchip/Kconfig | 11 ++++++++
drivers/net/ethernet/microchip/lan743x_main.c | 26 ++++++++++++++++---
2 files changed, 33 insertions(+), 4 deletions(-)
diff --git a/drivers/net/ethernet/microchip/Kconfig b/drivers/net/ethernet/microchip/Kconfig
index d0f6dfe0dcf3..6c66b55bc811 100644
--- a/drivers/net/ethernet/microchip/Kconfig
+++ b/drivers/net/ethernet/microchip/Kconfig
@@ -54,4 +54,15 @@ config LAN743X
To compile this driver as a module, choose M here. The module will be
called lan743x.
+config LAN743X_FIXED_PHY
+ bool "Direct R/G/MII connection without PHY"
+ default n
+ depends on LAN743X
+ select FIXED_PHY
+ help
+ Direct R/G/MII connection to a remote MII device without PHY in between.
+ No mdio bus will be used in this case and no auto-negotiation takes place.
+ The configuration settings below need to mirror the configuration of the
+ remote MII device.
+
endif # NET_VENDOR_MICROCHIP
diff --git a/drivers/net/ethernet/microchip/lan743x_main.c b/drivers/net/ethernet/microchip/lan743x_main.c
index 481f89d193f7..b6250a7469da 100644
--- a/drivers/net/ethernet/microchip/lan743x_main.c
+++ b/drivers/net/ethernet/microchip/lan743x_main.c
@@ -798,6 +798,7 @@ static int lan743x_mac_init(struct lan743x_adapter *adapter)
/* disable auto duplex, and speed detection. Phylib does that */
data = lan743x_csr_read(adapter, MAC_CR);
+
data &= ~(MAC_CR_ADD_ | MAC_CR_ASD_);
data |= MAC_CR_CNTR_RST_;
lan743x_csr_write(adapter, MAC_CR, data);
@@ -1002,7 +1003,10 @@ static void lan743x_phy_close(struct lan743x_adapter *adapter)
struct net_device *netdev = adapter->netdev;
phy_stop(netdev->phydev);
- phy_disconnect(netdev->phydev);
+ if (IS_REACHABLE(CONFIG_LAN743X_FIXED_PHY))
+ fixed_phy_unregister(netdev->phydev);
+ else
+ phy_disconnect(netdev->phydev);
netdev->phydev = NULL;
}
@@ -1038,11 +1042,24 @@ static int lan743x_phy_open(struct lan743x_adapter *adapter)
if (!phydev) {
/* try internal phy */
- phydev = phy_find_first(adapter->mdiobus);
+ if (IS_REACHABLE(CONFIG_LAN743X_FIXED_PHY)) {
+ struct fixed_phy_status phy_status;
+
+ phy_status.link = 1;
+ phy_status.speed = 1000;
+ phy_status.duplex = DUPLEX_FULL;
+ phy_status.pause = 0;
+ phy_status.asym_pause = 0;
+ adapter->phy_mode = PHY_INTERFACE_MODE_RGMII;
+ phydev = fixed_phy_register(PHY_POLL, &phy_status, 0);
+ } else {
+ adapter->phy_mode = PHY_INTERFACE_MODE_GMII;
+ phydev = phy_find_first(adapter->mdiobus);
+ }
+
if (!phydev)
goto return_error;
- adapter->phy_mode = PHY_INTERFACE_MODE_GMII;
ret = phy_connect_direct(netdev, phydev,
lan743x_phy_link_status_change,
adapter->phy_mode);
@@ -1059,7 +1076,8 @@ static int lan743x_phy_open(struct lan743x_adapter *adapter)
phy->fc_autoneg = phydev->autoneg;
phy_start(phydev);
- phy_start_aneg(phydev);
+ if (!IS_REACHABLE(CONFIG_LAN743X_FIXED_PHY))
+ phy_start_aneg(phydev);
return 0;
return_error:
--
2.20.1

34
platform/mellanox/non-upstream-patches/patches/0168-TMP-mlxsw-minimal-Ignore-error-reading-SPAD-register.patch Normal file
View File

@@ -0,0 +1,34 @@
From cbb77f161d60964733f332e4ccfb9f240947c3ef Mon Sep 17 00:00:00 2001
From: root <root@fit-build-116.mtl.labs.mlnx>
Date: Tue, 5 Apr 2022 21:35:55 +0300
Subject: [PATCH backport 5.10 168/182] TMP: mlxsw: minimal: Ignore error
reading SPAD register
WA until FW will add support for SPAD register for all systems.
Signed-off-by: Vadim Pasternak <vadimp@nvidia.com>
---
drivers/net/ethernet/mellanox/mlxsw/minimal.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/mellanox/mlxsw/minimal.c b/drivers/net/ethernet/mellanox/mlxsw/minimal.c
index 0b605c6aa637..5fd319697c94 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/minimal.c
+++ b/drivers/net/ethernet/mellanox/mlxsw/minimal.c
@@ -64,11 +64,12 @@ static int mlxsw_m_base_mac_get(struct mlxsw_m *mlxsw_m)
{
char spad_pl[MLXSW_REG_SPAD_LEN] = {0};
int err;
-
+#if 0
err = mlxsw_reg_query(mlxsw_m->core, MLXSW_REG(spad), spad_pl);
if (err)
return err;
mlxsw_reg_spad_base_mac_memcpy_from(spad_pl, mlxsw_m->base_mac);
+#endif
return 0;
}
--
2.20.1

194
platform/mellanox/non-upstream-patches/patches/0171-platform-mellanox-mlxreg-lc-Fix-cleanup-on-failure-a.patch Normal file
View File

@@ -0,0 +1,194 @@
From 7a45b6a2a14c292e89a09afde8fcc7d1ceb20ebd Mon Sep 17 00:00:00 2001
From: Vadim Pasternak <vadimp@nvidia.com>
Date: Wed, 22 Jun 2022 13:01:15 +0300
Subject: [PATCH backport 5.10 171/182] platform/mellanox: mlxreg-lc: Fix
cleanup on failure and add more verbosity in error flow
Clean client object in case of probing failure.
Prevent running remove routine in case probing failed.
Add error log for each kind of failures during probing.
Fixes: 62f9529b8d5c ("platform/mellanox: mlxreg-lc: Add initial support for Nvidia line card devices")
Signed-off-by: Vadim Pasternak <vadimp@nvidia.com>
---
drivers/platform/mellanox/mlxreg-lc.c | 85 ++++++++++++++++++++-------
1 file changed, 63 insertions(+), 22 deletions(-)
diff --git a/drivers/platform/mellanox/mlxreg-lc.c b/drivers/platform/mellanox/mlxreg-lc.c
index 75c28179dd07..e3caccb1a528 100644
--- a/drivers/platform/mellanox/mlxreg-lc.c
+++ b/drivers/platform/mellanox/mlxreg-lc.c
@@ -569,9 +569,6 @@ static int mlxreg_lc_event_handler(void *handle, enum mlxreg_hotplug_kind kind,
dev_info(mlxreg_lc->dev, "linecard#%d state %d event kind %d action %d\n",
mlxreg_lc->data->slot, mlxreg_lc->state, kind, action);
- if (!(mlxreg_lc->state & MLXREG_LC_INITIALIZED))
- return 0;
-
switch (kind) {
case MLXREG_HOTPLUG_LC_SYNCED:
/*
@@ -725,8 +722,12 @@ mlxreg_lc_config_init(struct mlxreg_lc *mlxreg_lc, void *regmap,
switch (regval) {
case MLXREG_LC_SN4800_C16:
err = mlxreg_lc_sn4800_c16_config_init(mlxreg_lc, regmap, data);
- if (err)
+ if (err) {
+ dev_err(dev, "Failed to config client %s at bus %d at addr 0x%02x\n",
+ data->hpdev.brdinfo->type, data->hpdev.nr,
+ data->hpdev.brdinfo->addr);
return err;
+ }
break;
default:
return -ENODEV;
@@ -739,8 +740,11 @@ mlxreg_lc_config_init(struct mlxreg_lc *mlxreg_lc, void *regmap,
mlxreg_lc->mux = platform_device_register_resndata(dev, "i2c-mux-mlxcpld", data->hpdev.nr,
NULL, 0, mlxreg_lc->mux_data,
sizeof(*mlxreg_lc->mux_data));
- if (IS_ERR(mlxreg_lc->mux))
+ if (IS_ERR(mlxreg_lc->mux)) {
+ dev_err(dev, "Failed to create mux infra for client %s at bus %d at addr 0x%02x\n",
+ data->hpdev.brdinfo->type, data->hpdev.nr, data->hpdev.brdinfo->addr);
return PTR_ERR(mlxreg_lc->mux);
+ }
/* Register IO access driver. */
if (mlxreg_lc->io_data) {
@@ -749,6 +753,9 @@ mlxreg_lc_config_init(struct mlxreg_lc *mlxreg_lc, void *regmap,
platform_device_register_resndata(dev, "mlxreg-io", data->hpdev.nr, NULL, 0,
mlxreg_lc->io_data, sizeof(*mlxreg_lc->io_data));
if (IS_ERR(mlxreg_lc->io_regs)) {
+ dev_err(dev, "Failed to create regio for client %s at bus %d at addr 0x%02x\n",
+ data->hpdev.brdinfo->type, data->hpdev.nr,
+ data->hpdev.brdinfo->addr);
err = PTR_ERR(mlxreg_lc->io_regs);
goto fail_register_io;
}
@@ -762,6 +769,9 @@ mlxreg_lc_config_init(struct mlxreg_lc *mlxreg_lc, void *regmap,
mlxreg_lc->led_data,
sizeof(*mlxreg_lc->led_data));
if (IS_ERR(mlxreg_lc->led)) {
+ dev_err(dev, "Failed to create LED objects for client %s at bus %d at addr 0x%02x\n",
+ data->hpdev.brdinfo->type, data->hpdev.nr,
+ data->hpdev.brdinfo->addr);
err = PTR_ERR(mlxreg_lc->led);
goto fail_register_led;
}
@@ -818,7 +828,8 @@ static int mlxreg_lc_probe(struct platform_device *pdev)
if (!data->hpdev.adapter) {
dev_err(&pdev->dev, "Failed to get adapter for bus %d\n",
data->hpdev.nr);
- return -EFAULT;
+ err = -EFAULT;
+ goto i2c_get_adapter_fail;
}
/* Create device at the top of line card I2C tree.*/
@@ -827,32 +838,40 @@ static int mlxreg_lc_probe(struct platform_device *pdev)
if (IS_ERR(data->hpdev.client)) {
dev_err(&pdev->dev, "Failed to create client %s at bus %d at addr 0x%02x\n",
data->hpdev.brdinfo->type, data->hpdev.nr, data->hpdev.brdinfo->addr);
-
- i2c_put_adapter(data->hpdev.adapter);
- data->hpdev.adapter = NULL;
- return PTR_ERR(data->hpdev.client);
+ err = PTR_ERR(data->hpdev.client);
+ goto i2c_new_device_fail;
}
regmap = devm_regmap_init_i2c(data->hpdev.client,
&mlxreg_lc_regmap_conf);
if (IS_ERR(regmap)) {
+ dev_err(&pdev->dev, "Failed to create regmap for client %s at bus %d at addr 0x%02x\n",
+ data->hpdev.brdinfo->type, data->hpdev.nr, data->hpdev.brdinfo->addr);
err = PTR_ERR(regmap);
- goto mlxreg_lc_probe_fail;
+ goto devm_regmap_init_i2c_fail;
}
/* Set default registers. */
for (i = 0; i < mlxreg_lc_regmap_conf.num_reg_defaults; i++) {
err = regmap_write(regmap, mlxreg_lc_regmap_default[i].reg,
mlxreg_lc_regmap_default[i].def);
- if (err)
- goto mlxreg_lc_probe_fail;
+ if (err) {
+ dev_err(&pdev->dev, "Failed to set default regmap %d for client %s at bus %d at addr 0x%02x\n",
+ i, data->hpdev.brdinfo->type, data->hpdev.nr,
+ data->hpdev.brdinfo->addr);
+ goto regmap_write_fail;
+ }
}
/* Sync registers with hardware. */
regcache_mark_dirty(regmap);
err = regcache_sync(regmap);
- if (err)
- goto mlxreg_lc_probe_fail;
+ if (err) {
+ dev_err(&pdev->dev, "Failed to sync regmap for client %s at bus %d at addr 0x%02x\n",
+ data->hpdev.brdinfo->type, data->hpdev.nr, data->hpdev.brdinfo->addr);
+ err = PTR_ERR(regmap);
+ goto regcache_sync_fail;
+ }
par_pdata = data->hpdev.brdinfo->platform_data;
mlxreg_lc->par_regmap = par_pdata->regmap;
@@ -863,12 +882,27 @@ static int mlxreg_lc_probe(struct platform_device *pdev)
/* Configure line card. */
err = mlxreg_lc_config_init(mlxreg_lc, regmap, data);
if (err)
- goto mlxreg_lc_probe_fail;
+ goto mlxreg_lc_config_init_fail;
return err;
-mlxreg_lc_probe_fail:
+mlxreg_lc_config_init_fail:
+regcache_sync_fail:
+regmap_write_fail:
+devm_regmap_init_i2c_fail:
+ if (data->hpdev.client) {
+ i2c_unregister_device(data->hpdev.client);
+ data->hpdev.client = NULL;
+ }
+i2c_new_device_fail:
i2c_put_adapter(data->hpdev.adapter);
+ data->hpdev.adapter = NULL;
+i2c_get_adapter_fail:
+ /* Clear event notification callback and handle. */
+ if (data->notifier) {
+ data->notifier->user_handler = NULL;
+ data->notifier->handle = NULL;
+ }
return err;
}
@@ -877,11 +911,18 @@ static int mlxreg_lc_remove(struct platform_device *pdev)
struct mlxreg_core_data *data = dev_get_platdata(&pdev->dev);
struct mlxreg_lc *mlxreg_lc = platform_get_drvdata(pdev);
- /* Clear event notification callback. */
- if (data->notifier) {
- data->notifier->user_handler = NULL;
- data->notifier->handle = NULL;
- }
+ /*
+ * Probing and removing are invoked by hotplug events raised on line card insertion and
+ * removing. If probing procedure fails all data is cleared. However, hotplug event still
+ * will be raised on line card removing and activate removing procedure. In this case there
+ * is nothing to remove.
+ */
+ if (!data->notifier || !data->notifier->handle)
+ return 0;
+
+ /* Clear event notification callback and handle. */
+ data->notifier->user_handler = NULL;
+ data->notifier->handle = NULL;
/* Destroy static I2C device feeding by main power. */
mlxreg_lc_destroy_static_devices(mlxreg_lc, mlxreg_lc->main_devs,
--
2.20.1

84
platform/mellanox/non-upstream-patches/patches/0172-DS-platform-mlx-platform-Add-SPI-path-for-rack-switc.patch Normal file
View File

@@ -0,0 +1,84 @@
From b1e9734f4dc29c65e05a8f35ec67efb7784d321f Mon Sep 17 00:00:00 2001
From: Vadim Pasternak <vadimp@nvidia.com>
Date: Sun, 15 May 2022 14:31:10 +0300
Subject: [PATCH backport 5.10 172/182] DS: platform: mlx-platform: Add SPI
path for rack switch for EROT access
Create spidev for OOB access to External Root of Trusts devices.
Signed-off-by: Vadim Pasternak <vadimp@nvidia.com>
---
drivers/platform/x86/mlx-platform.c | 16 ++++++++++++++++
drivers/spi/spi.c | 1 +
2 files changed, 17 insertions(+)
diff --git a/drivers/platform/x86/mlx-platform.c b/drivers/platform/x86/mlx-platform.c
index 3ad85934d6e3..135ccea3a34e 100644
--- a/drivers/platform/x86/mlx-platform.c
+++ b/drivers/platform/x86/mlx-platform.c
@@ -16,6 +16,7 @@
#include <linux/platform_data/i2c-mux-reg.h>
#include <linux/platform_data/mlxreg.h>
#include <linux/regmap.h>
+#include <linux/spi/spi.h>
#define MLX_PLAT_DEVICE_NAME "mlxplat"
@@ -2299,6 +2300,16 @@ struct mlxreg_core_hotplug_platform_data mlxplat_mlxcpld_rack_switch_data = {
.mask_low = MLXPLAT_CPLD_LOW_AGGR_MASK_LOW,
};
+static struct spi_board_info rack_switch_switch_spi_board_info[] = {
+ {
+ .modalias = "spidev",
+ .irq = -1,
+ .max_speed_hz = 20000000,
+ .bus_num = 0,
+ .chip_select = 0,
+ },
+};
+
/* Platform led default data */
static struct mlxreg_core_data mlxplat_mlxcpld_default_led_data[] = {
{
@@ -5254,6 +5265,7 @@ static struct mlxreg_core_platform_data *mlxplat_fan;
static struct mlxreg_core_platform_data
*mlxplat_wd_data[MLXPLAT_CPLD_WD_MAX_DEVS];
static const struct regmap_config *mlxplat_regmap_config;
+static struct spi_board_info *mlxplat_spi;
static int __init mlxplat_dmi_default_matched(const struct dmi_system_id *dmi)
{
@@ -5551,6 +5563,7 @@ static int __init mlxplat_dmi_rack_switch_matched(const struct dmi_system_id *dm
mlxplat_wd_data[i] = &mlxplat_mlxcpld_wd_set_type2[i];
mlxplat_i2c = &mlxplat_mlxcpld_i2c_ng_data;
mlxplat_regmap_config = &mlxplat_mlxcpld_regmap_config_rack_switch;
+ mlxplat_spi = rack_switch_switch_spi_board_info;
return 1;
}
@@ -5917,6 +5930,9 @@ static int __init mlxplat_init(void)
}
}
+ if (mlxplat_spi)
+ spi_register_board_info(mlxplat_spi, 1);
+
/* Add WD drivers. */
err = mlxplat_mlxcpld_check_wd_capability(priv->regmap);
if (err)
diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c
index 857a1399850c..2efafa34ff22 100644
--- a/drivers/spi/spi.c
+++ b/drivers/spi/spi.c
@@ -790,6 +790,7 @@ int spi_register_board_info(struct spi_board_info const *info, unsigned n)
return 0;
}
+EXPORT_SYMBOL(spi_register_board_info);
/*-------------------------------------------------------------------------*/
--
2.20.1

93
platform/mellanox/non-upstream-patches/patches/0174-DS-mlxsw-core_linecards-Skip-devlink-and-provisionin.patch Normal file
View File

@@ -0,0 +1,93 @@
From 8b0f2061c6f8d799b7da9b7f50edb18208e67bb8 Mon Sep 17 00:00:00 2001
From: Vadim Pasternak <vadimp@nvidia.com>
Date: Fri, 22 Jul 2022 01:15:43 +0300
Subject: [PATCH backport 5.10 174/182] DS: mlxsw: core_linecards: Skip devlink
and provisioning operation
Do not execute provisioning / unprovisioning flow in not upstream
environment.
Signed-off-by: Vadim Pasternak <vadimp@nvidia.com>
---
.../net/ethernet/mellanox/mlxsw/core_linecards.c | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/drivers/net/ethernet/mellanox/mlxsw/core_linecards.c b/drivers/net/ethernet/mellanox/mlxsw/core_linecards.c
index 3a2fdd22dc21..30665a6f3e4d 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/core_linecards.c
+++ b/drivers/net/ethernet/mellanox/mlxsw/core_linecards.c
@@ -651,8 +651,11 @@ mlxsw_linecard_provision_set(struct mlxsw_core *mlxsw_core,
linecard);
if (err)
goto err_cbs_call;
+
linecard->provisioned = true;
+#if 0
devlink_linecard_provision_set(linecard->devlink_linecard, type);
+#endif
return 0;
err_cbs_call:
@@ -670,12 +673,15 @@ static void mlxsw_linecard_provision_clear(struct mlxsw_core *mlxsw_core,
linecard);
mlxsw_linecard_devices_detach(linecard->linecards->mlxsw_core,
linecard);
+#if 0
devlink_linecard_provision_clear(linecard->devlink_linecard);
+#endif
}
static int mlxsw_linecard_ready_set(struct mlxsw_core *mlxsw_core,
struct mlxsw_linecard *linecard)
{
+#if 0
char mddc_pl[MLXSW_REG_MDDC_LEN];
int err;
@@ -683,6 +689,7 @@ static int mlxsw_linecard_ready_set(struct mlxsw_core *mlxsw_core,
err = mlxsw_reg_write(mlxsw_core, MLXSW_REG(mddc), mddc_pl);
if (err)
return err;
+#endif
linecard->ready = true;
return 0;
}
@@ -690,6 +697,7 @@ static int mlxsw_linecard_ready_set(struct mlxsw_core *mlxsw_core,
static int mlxsw_linecard_ready_clear(struct mlxsw_core *mlxsw_core,
struct mlxsw_linecard *linecard)
{
+#if 0
char mddc_pl[MLXSW_REG_MDDC_LEN];
int err;
@@ -697,6 +705,7 @@ static int mlxsw_linecard_ready_clear(struct mlxsw_core *mlxsw_core,
err = mlxsw_reg_write(mlxsw_core, MLXSW_REG(mddc), mddc_pl);
if (err)
return err;
+#endif
linecard->ready = false;
return 0;
}
@@ -722,7 +731,9 @@ static int mlxsw_linecard_active_set(struct mlxsw_core *mlxsw_core,
item->event_ops->got_active(mlxsw_core, linecard->slot_index,
linecard, item->priv);
}
+#if 0
devlink_linecard_activate(linecard->devlink_linecard);
+#endif
return 0;
}
@@ -739,7 +750,9 @@ static void mlxsw_linecard_active_clear(struct mlxsw_core *mlxsw_core,
item->event_ops->got_inactive(mlxsw_core, linecard->slot_index,
linecard, item->priv);
}
+#if 0
devlink_linecard_deactivate(linecard->devlink_linecard);
+#endif
}
static int __mlxsw_linecard_status_process(struct mlxsw_core *mlxsw_core,
--
2.20.1

30
platform/mellanox/non-upstream-patches/patches/0176-platform-mellanox-fix-reset_pwr_converter_fail-attri.patch
View File

@@ -1,30 +0,0 @@
From d3b1142ce6c3fbb02c39fc8d2e9f24ecbf466973 Mon Sep 17 00:00:00 2001
From: Michael Shych <michaelsh@nvidia.com>
Date: Sun, 4 Sep 2022 10:41:45 +0300
Subject: [PATCH] platform: mellanox: fix reset_pwr_converter_fail attribute.
Change incorrect reset_voltmon_upgrade_fail atitribute name to
reset_pwr_converter_fail.
Signed-off-by: Michael Shych <michaelsh@nvidia.com>
Reviewed-by: Vadim Pasternak <vadimp@nvidia.com>
---
drivers/platform/x86/mlx-platform.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/platform/x86/mlx-platform.c b/drivers/platform/x86/mlx-platform.c
index f1d0cc1aa..31c5cc10f 100644
--- a/drivers/platform/x86/mlx-platform.c
+++ b/drivers/platform/x86/mlx-platform.c
@@ -3904,7 +3904,7 @@ static struct mlxreg_core_data mlxplat_mlxcpld_chassis_blade_regs_io_data[] = {
.mode = 0444,
},
{
- .label = "reset_voltmon_upgrade_fail",
+ .label = "reset_pwr_converter_fail",
.reg = MLXPLAT_CPLD_LPC_REG_RST_CAUSE2_OFFSET,
.mask = GENMASK(7, 0) & ~BIT(0),
.mode = 0444,
--
2.30.2

38
platform/mellanox/non-upstream-patches/patches/0177-Documentation-ABI-fix-description-of-fix-reset_pwr_c.patch
View File

@@ -1,38 +0,0 @@
From 85ac7ddf15f380460b9e17f0e2c99aa8e476ef3f Mon Sep 17 00:00:00 2001
From: Michael Shych <michaelsh@nvidia.com>
Date: Sun, 4 Sep 2022 10:46:01 +0300
Subject: [PATCH] Documentation/ABI: fix description of fix
reset_pwr_converter_fail attribute.
Change description of incorrect reset_voltmon_upgrade_fail atitribute
name to reset_pwr_converter_fail.
Signed-off-by: Michael Shych <michaelsh@nvidia.com>
Reviewed-by: Vadim Pasternak <vadimp@nvidia.com>
---
Documentation/ABI/stable/sysfs-driver-mlxreg-io | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/Documentation/ABI/stable/sysfs-driver-mlxreg-io b/Documentation/ABI/stable/sysfs-driver-mlxreg-io
index 0913a8daf..ac503e84e 100644
--- a/Documentation/ABI/stable/sysfs-driver-mlxreg-io
+++ b/Documentation/ABI/stable/sysfs-driver-mlxreg-io
@@ -103,13 +103,13 @@ Description: These files show the system reset cause, as following: power
What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/reset_comex_pwr_fail
What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/reset_from_comex
What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/reset_system
-What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/reset_voltmon_upgrade_fail
+What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/reset_pwr_converter_fail
Date: November 2018
KernelVersion: 5.0
Contact: Vadim Pasternak <vadimpmellanox.com>
Description: These files show the system reset cause, as following: ComEx
power fail, reset from ComEx, system platform reset, reset
- due to voltage monitor devices upgrade failure,
+ due to power converter devices failure,
Value 1 in file means this is reset cause, 0 - otherwise.
Only one bit could be 1 at the same time, representing only
the last reset cause.
--
2.30.2

295
platform/mellanox/non-upstream-patches/patches/0178-platform-mellanox-Introduce-support-for-next-generat.patch
View File

@@ -1,295 +0,0 @@
From 4c485e6f50001f0ea691b0ce5c0d90a118e8d360 Mon Sep 17 00:00:00 2001
From: Michael Shych <michaelsh@nvidia.com>
Date: Sun, 4 Sep 2022 14:03:58 +0300
Subject: [PATCH] platform: mellanox: Introduce support for next-generation
800GB/s ethernet switch.
Introduce support for Nvidia next-generation 800GB/s ethernet switch - SN5600.
SN5600 is 51.2 Tbps Ethernet switch based on Nvidia Spectrum-4 ASIC.
It can provide up to 64x800Gb/s (ETH) full bidirectional bandwidth per port
using PAM-4 modulations. The system supports 64 Belly to Belly 2x4 OSFP cages.
The switch was designed to fit standard 2U racks.
Features:
- 64 OSFP ports support 800GbE - 10GbE speed.
- Additional 25GbE - 1GbE service port on the front panel.
- Air-cooled with 3 + 1 redundant fan units.
- 1 + 1 redundant 3000W or 3600W PSUs.
- System management board is based on Intel Coffee-lake CPU E-2276
with secure-boot support.
Signed-off-by: Michael Shych <michaelsh@nvidia.com>
Reviewed-by: Vadim Pasternak <vadimp@nvidia.com>
---
drivers/platform/x86/mlx-platform.c | 178 ++++++++++++++++++++++++++++
1 file changed, 178 insertions(+)
diff --git a/drivers/platform/x86/mlx-platform.c b/drivers/platform/x86/mlx-platform.c
index 31c5cc10f..7e9f2a5ab 100644
--- a/drivers/platform/x86/mlx-platform.c
+++ b/drivers/platform/x86/mlx-platform.c
@@ -253,6 +253,7 @@
#define MLXPLAT_CPLD_CH3_ETH_MODULAR 43
#define MLXPLAT_CPLD_CH4_ETH_MODULAR 51
#define MLXPLAT_CPLD_CH2_RACK_SWITCH 18
+#define MLXPLAT_CPLD_CH2_NG800 34
/* Number of LPC attached MUX platform devices */
#define MLXPLAT_CPLD_LPC_MUX_DEVS 4
@@ -503,6 +504,37 @@ static struct i2c_mux_reg_platform_data mlxplat_rack_switch_mux_data[] = {
};
+/* Platform channels for ng800 system family */
+static const int mlxplat_ng800_channels[] = {
+ 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17,
+ 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32
+};
+
+/* Platform ng800 mux data */
+static struct i2c_mux_reg_platform_data mlxplat_ng800_mux_data[] = {
+ {
+ .parent = 1,
+ .base_nr = MLXPLAT_CPLD_CH1,
+ .write_only = 1,
+ .reg = (void __iomem *)MLXPLAT_CPLD_LPC_REG1,
+ .reg_size = 1,
+ .idle_in_use = 1,
+ .values = mlxplat_ng800_channels,
+ .n_values = ARRAY_SIZE(mlxplat_ng800_channels),
+ },
+ {
+ .parent = 1,
+ .base_nr = MLXPLAT_CPLD_CH2_NG800,
+ .write_only = 1,
+ .reg = (void __iomem *)MLXPLAT_CPLD_LPC_REG2,
+ .reg_size = 1,
+ .idle_in_use = 1,
+ .values = mlxplat_msn21xx_channels,
+ .n_values = ARRAY_SIZE(mlxplat_msn21xx_channels),
+ },
+
+};
+
/* Platform hotplug devices */
static struct i2c_board_info mlxplat_mlxcpld_pwr[] = {
{
@@ -522,6 +554,15 @@ static struct i2c_board_info mlxplat_mlxcpld_ext_pwr[] = {
},
};
+static struct i2c_board_info mlxplat_mlxcpld_pwr_ng800[] = {
+ {
+ I2C_BOARD_INFO("dps460", 0x59),
+ },
+ {
+ I2C_BOARD_INFO("dps460", 0x5a),
+ },
+};
+
static struct i2c_board_info mlxplat_mlxcpld_fan[] = {
{
I2C_BOARD_INFO("24c32", 0x50),
@@ -601,6 +642,23 @@ static struct mlxreg_core_data mlxplat_mlxcpld_default_pwr_wc_items_data[] = {
},
};
+static struct mlxreg_core_data mlxplat_mlxcpld_default_pwr_ng800_items_data[] = {
+ {
+ .label = "pwr1",
+ .reg = MLXPLAT_CPLD_LPC_REG_PWR_OFFSET,
+ .mask = BIT(0),
+ .hpdev.brdinfo = &mlxplat_mlxcpld_pwr_ng800[0],
+ .hpdev.nr = MLXPLAT_CPLD_PSU_MSNXXXX_NR,
+ },
+ {
+ .label = "pwr2",
+ .reg = MLXPLAT_CPLD_LPC_REG_PWR_OFFSET,
+ .mask = BIT(1),
+ .hpdev.brdinfo = &mlxplat_mlxcpld_pwr_ng800[1],
+ .hpdev.nr = MLXPLAT_CPLD_PSU_MSNXXXX_NR,
+ },
+};
+
static struct mlxreg_core_data mlxplat_mlxcpld_default_fan_items_data[] = {
{
.label = "fan1",
@@ -1224,6 +1282,47 @@ static struct mlxreg_core_item mlxplat_mlxcpld_ext_items[] = {
}
};
+static struct mlxreg_core_item mlxplat_mlxcpld_ng800_items[] = {
+ {
+ .data = mlxplat_mlxcpld_default_ng_psu_items_data,
+ .aggr_mask = MLXPLAT_CPLD_AGGR_MASK_NG_DEF,
+ .reg = MLXPLAT_CPLD_LPC_REG_PSU_OFFSET,
+ .mask = MLXPLAT_CPLD_PSU_EXT_MASK,
+ .capability = MLXPLAT_CPLD_LPC_REG_PSU_I2C_CAP_OFFSET,
+ .count = ARRAY_SIZE(mlxplat_mlxcpld_default_ng_psu_items_data),
+ .inversed = 1,
+ .health = false,
+ },
+ {
+ .data = mlxplat_mlxcpld_default_pwr_ng800_items_data,
+ .aggr_mask = MLXPLAT_CPLD_AGGR_MASK_NG_DEF,
+ .reg = MLXPLAT_CPLD_LPC_REG_PWR_OFFSET,
+ .mask = MLXPLAT_CPLD_PWR_EXT_MASK,
+ .capability = MLXPLAT_CPLD_LPC_REG_PSU_I2C_CAP_OFFSET,
+ .count = ARRAY_SIZE(mlxplat_mlxcpld_default_pwr_ng800_items_data),
+ .inversed = 0,
+ .health = false,
+ },
+ {
+ .data = mlxplat_mlxcpld_default_ng_fan_items_data,
+ .aggr_mask = MLXPLAT_CPLD_AGGR_MASK_NG_DEF,
+ .reg = MLXPLAT_CPLD_LPC_REG_FAN_OFFSET,
+ .mask = MLXPLAT_CPLD_FAN_NG_MASK,
+ .count = ARRAY_SIZE(mlxplat_mlxcpld_default_ng_fan_items_data),
+ .inversed = 1,
+ .health = false,
+ },
+ {
+ .data = mlxplat_mlxcpld_default_asic_items_data,
+ .aggr_mask = MLXPLAT_CPLD_AGGR_MASK_NG_DEF,
+ .reg = MLXPLAT_CPLD_LPC_REG_ASIC_HEALTH_OFFSET,
+ .mask = MLXPLAT_CPLD_ASIC_MASK,
+ .count = ARRAY_SIZE(mlxplat_mlxcpld_default_asic_items_data),
+ .inversed = 0,
+ .health = true,
+ },
+};
+
static
struct mlxreg_core_hotplug_platform_data mlxplat_mlxcpld_ext_data = {
.items = mlxplat_mlxcpld_ext_items,
@@ -1234,6 +1333,16 @@ struct mlxreg_core_hotplug_platform_data mlxplat_mlxcpld_ext_data = {
.mask_low = MLXPLAT_CPLD_LOW_AGGR_MASK_LOW | MLXPLAT_CPLD_LOW_AGGR_MASK_ASIC2,
};
+static
+struct mlxreg_core_hotplug_platform_data mlxplat_mlxcpld_ng800_data = {
+ .items = mlxplat_mlxcpld_ng800_items,
+ .counter = ARRAY_SIZE(mlxplat_mlxcpld_ng800_items),
+ .cell = MLXPLAT_CPLD_LPC_REG_AGGR_OFFSET,
+ .mask = MLXPLAT_CPLD_AGGR_MASK_NG_DEF | MLXPLAT_CPLD_AGGR_MASK_COMEX,
+ .cell_low = MLXPLAT_CPLD_LPC_REG_AGGRLO_OFFSET,
+ .mask_low = MLXPLAT_CPLD_LOW_AGGR_MASK_LOW | MLXPLAT_CPLD_LOW_AGGR_MASK_ASIC2,
+};
+
static struct mlxreg_core_data mlxplat_mlxcpld_modular_pwr_items_data[] = {
{
.label = "pwr1",
@@ -3093,6 +3202,12 @@ static struct mlxreg_core_data mlxplat_mlxcpld_default_ng_regs_io_data[] = {
.mask = GENMASK(7, 0) & ~BIT(7),
.mode = 0644,
},
+ {
+ .label = "clk_brd_prog_en",
+ .reg = MLXPLAT_CPLD_LPC_REG_PWM_CONTROL_OFFSET,
+ .mask = GENMASK(7, 0) & ~BIT(1),
+ .mode = 0644,
+ },
{
.label = "erot1_recovery",
.reg = MLXPLAT_CPLD_LPC_REG_PWM_CONTROL_OFFSET,
@@ -3219,6 +3334,12 @@ static struct mlxreg_core_data mlxplat_mlxcpld_default_ng_regs_io_data[] = {
.mask = GENMASK(7, 0) & ~BIT(6),
.mode = 0444,
},
+ {
+ .label = "reset_ac_ok_fail",
+ .reg = MLXPLAT_CPLD_LPC_REG_RST_CAUSE2_OFFSET,
+ .mask = GENMASK(7, 0) & ~BIT(7),
+ .mode = 0444,
+ },
{
.label = "psu1_on",
.reg = MLXPLAT_CPLD_LPC_REG_GP1_OFFSET,
@@ -3324,6 +3445,30 @@ static struct mlxreg_core_data mlxplat_mlxcpld_default_ng_regs_io_data[] = {
.mask = GENMASK(7, 0) & ~BIT(1),
.mode = 0444,
},
+ {
+ .label = "clk_brd1_boot_fail",
+ .reg = MLXPLAT_CPLD_LPC_REG_GP4_RO_OFFSET,
+ .mask = GENMASK(7, 0) & ~BIT(4),
+ .mode = 0444,
+ },
+ {
+ .label = "clk_brd2_boot_fail",
+ .reg = MLXPLAT_CPLD_LPC_REG_GP4_RO_OFFSET,
+ .mask = GENMASK(7, 0) & ~BIT(5),
+ .mode = 0444,
+ },
+ {
+ .label = "clk_brd_fail",
+ .reg = MLXPLAT_CPLD_LPC_REG_GP4_RO_OFFSET,
+ .mask = GENMASK(7, 0) & ~BIT(6),
+ .mode = 0444,
+ },
+ {
+ .label = "asic_pg_fail",
+ .reg = MLXPLAT_CPLD_LPC_REG_GP4_RO_OFFSET,
+ .mask = GENMASK(7, 0) & ~BIT(7),
+ .mode = 0444,
+ },
{
.label = "spi_chnl_select",
.reg = MLXPLAT_CPLD_LPC_REG_SPI_CHNL_SELECT,
@@ -3621,6 +3766,12 @@ static struct mlxreg_core_data mlxplat_mlxcpld_modular_regs_io_data[] = {
.bit = 5,
.mode = 0444,
},
+ {
+ .label = "pwr_converter_prog_en",
+ .reg = MLXPLAT_CPLD_LPC_REG_GP0_OFFSET,
+ .mask = GENMASK(7, 0) & ~BIT(0),
+ .mode = 0644,
+ },
{
.label = "vpd_wp",
.reg = MLXPLAT_CPLD_LPC_REG_GP0_OFFSET,
@@ -5209,6 +5360,27 @@ static int __init mlxplat_dmi_rack_switch_matched(const struct dmi_system_id *dm
return 1;
}
+static int __init mlxplat_dmi_ng800_matched(const struct dmi_system_id *dmi)
+{
+ int i;
+
+ mlxplat_max_adap_num = MLXPLAT_CPLD_MAX_PHYS_ADAPTER_NUM;
+ mlxplat_mux_num = ARRAY_SIZE(mlxplat_ng800_mux_data);
+ mlxplat_mux_data = mlxplat_ng800_mux_data;
+ mlxplat_hotplug = &mlxplat_mlxcpld_ng800_data;
+ mlxplat_hotplug->deferred_nr =
+ mlxplat_msn21xx_channels[MLXPLAT_CPLD_GRP_CHNL_NUM - 1];
+ mlxplat_led = &mlxplat_default_ng_led_data;
+ mlxplat_regs_io = &mlxplat_default_ng_regs_io_data;
+ mlxplat_fan = &mlxplat_default_fan_data;
+ for (i = 0; i < ARRAY_SIZE(mlxplat_mlxcpld_wd_set_type2); i++)
+ mlxplat_wd_data[i] = &mlxplat_mlxcpld_wd_set_type2[i];
+ mlxplat_i2c = &mlxplat_mlxcpld_i2c_ng_data;
+ mlxplat_regmap_config = &mlxplat_mlxcpld_regmap_config_ng400;
+
+ return 1;
+}
+
static const struct dmi_system_id mlxplat_dmi_table[] __initconst = {
{
.callback = mlxplat_dmi_default_wc_matched,
@@ -5278,6 +5450,12 @@ static const struct dmi_system_id mlxplat_dmi_table[] __initconst = {
DMI_MATCH(DMI_BOARD_NAME, "VMOD0011"),
},
},
+ {
+ .callback = mlxplat_dmi_ng800_matched,
+ .matches = {
+ DMI_MATCH(DMI_BOARD_NAME, "VMOD0013"),
+ },
+ },
{
.callback = mlxplat_dmi_chassis_blade_matched,
.matches = {
--
2.30.2

99
platform/mellanox/non-upstream-patches/patches/0181-Revert-Fix-out-of-bounds-memory-accesses-in-thermal.patch Normal file
View File

@@ -0,0 +1,99 @@
From f2dffe0f83a05dfbf0190316f0d260f7d7ff76a8 Mon Sep 17 00:00:00 2001
From: Vadim Pasternak <vadimp@nvidia.com>
Date: Mon, 23 Jan 2023 21:38:24 +0200
Subject: [PATCH backport 5.10 181/182] Revert "mlxsw: thermal: Fix
out-of-bounds memory accesses"
This reverts commit e59d839743b50cb1d3f42a786bea48cc5621d254.
---
.../ethernet/mellanox/mlxsw/core_thermal.c | 52 +++++++++++++++++--
1 file changed, 47 insertions(+), 5 deletions(-)
diff --git a/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c b/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c
index 529108aea3c6..88a2f63c8839 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c
+++ b/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c
@@ -23,8 +23,16 @@
#define MLXSW_THERMAL_MODULE_TEMP_SHIFT (MLXSW_THERMAL_HYSTERESIS_TEMP * 2)
#define MLXSW_THERMAL_TEMP_SCORE_MAX GENMASK(31, 0)
#define MLXSW_THERMAL_MAX_STATE 10
-#define MLXSW_THERMAL_MIN_STATE 2
#define MLXSW_THERMAL_MAX_DUTY 255
+/* Minimum and maximum fan allowed speed in percent: from 20% to 100%. Values
+ * MLXSW_THERMAL_MAX_STATE + x, where x is between 2 and 10 are used for
+ * setting fan speed dynamic minimum. For example, if value is set to 14 (40%)
+ * cooling levels vector will be set to 4, 4, 4, 4, 4, 5, 6, 7, 8, 9, 10 to
+ * introduce PWM speed in percent: 40, 40, 40, 40, 40, 50, 60. 70, 80, 90, 100.
+ */
+#define MLXSW_THERMAL_SPEED_MIN (MLXSW_THERMAL_MAX_STATE + 2)
+#define MLXSW_THERMAL_SPEED_MAX (MLXSW_THERMAL_MAX_STATE * 2)
+#define MLXSW_THERMAL_SPEED_MIN_LEVEL 2 /* 20% */
/* External cooling devices, allowed for binding to mlxsw thermal zones. */
static char * const mlxsw_thermal_external_allowed_cdev[] = {
@@ -656,16 +664,49 @@ static int mlxsw_thermal_set_cur_state(struct thermal_cooling_device *cdev,
struct mlxsw_thermal *thermal = cdev->devdata;
struct device *dev = thermal->bus_info->dev;
char mfsc_pl[MLXSW_REG_MFSC_LEN];
+ unsigned long cur_state, i;
int idx;
+ u8 duty;
int err;
- if (state > MLXSW_THERMAL_MAX_STATE)
- return -EINVAL;
-
idx = mlxsw_get_cooling_device_idx(thermal, cdev);
if (idx < 0)
return idx;
+ /* Verify if this request is for changing allowed fan dynamical
+ * minimum. If it is - update cooling levels accordingly and update
+ * state, if current state is below the newly requested minimum state.
+ * For example, if current state is 5, and minimal state is to be
+ * changed from 4 to 6, thermal->cooling_levels[0 to 5] will be changed
+ * all from 4 to 6. And state 5 (thermal->cooling_levels[4]) should be
+ * overwritten.
+ */
+ if (state >= MLXSW_THERMAL_SPEED_MIN &&
+ state <= MLXSW_THERMAL_SPEED_MAX) {
+ state -= MLXSW_THERMAL_MAX_STATE;
+ for (i = 0; i <= MLXSW_THERMAL_MAX_STATE; i++)
+ thermal->cooling_levels[i] = max(state, i);
+
+ mlxsw_reg_mfsc_pack(mfsc_pl, idx, 0);
+ err = mlxsw_reg_query(thermal->core, MLXSW_REG(mfsc), mfsc_pl);
+ if (err)
+ return err;
+
+ duty = mlxsw_reg_mfsc_pwm_duty_cycle_get(mfsc_pl);
+ cur_state = mlxsw_duty_to_state(duty);
+
+ /* If current fan state is lower than requested dynamical
+ * minimum, increase fan speed up to dynamical minimum.
+ */
+ if (state < cur_state)
+ return 0;
+
+ state = cur_state;
+ }
+
+ if (state > MLXSW_THERMAL_MAX_STATE)
+ return -EINVAL;
+
/* Normalize the state to the valid speed range. */
state = thermal->cooling_levels[state];
mlxsw_reg_mfsc_pack(mfsc_pl, idx, mlxsw_state_to_duty(state));
@@ -1143,7 +1184,8 @@ int mlxsw_thermal_init(struct mlxsw_core *core,
/* Initialize cooling levels per PWM state. */
for (i = 0; i < MLXSW_THERMAL_MAX_STATE; i++)
- thermal->cooling_levels[i] = max(MLXSW_THERMAL_MIN_STATE, i);
+ thermal->cooling_levels[i] = max(MLXSW_THERMAL_SPEED_MIN_LEVEL,
+ i);
thermal->polling_delay = bus_info->low_frequency ?
MLXSW_THERMAL_SLOW_POLL_INT :
--
2.20.1

647
platform/mellanox/non-upstream-patches/patches/0182-platform-mellanox-Introduce-support-of-new-Nvidia-L1.patch Normal file
View File

@@ -0,0 +1,647 @@
From 74ab8a216510df924ca88d2f3d5944eb107264d0 Mon Sep 17 00:00:00 2001
From: Vadim Pasternak <vadimp@nvidia.com>
Date: Sun, 11 Dec 2022 09:26:48 +0200
Subject: [PATCH backport 5.10 1/5] platform: mellanox: Introduce support of
new Nvidia L1 switch
Add support for new L1 switch nodes providing L1 connectivity for
multi-node networking chassis.
The purpose is to provide compute server with full management and IO
subsystems with connections to L1 switches.
System contains the following components:
- COMe module based on Intel Coffee Lake CPU
- Switch baseboard with two ASICs, while
24 ports of each ASICs are connected to one backplane connector
32 ports of each ASIC are connected to 8 OSFPs
- Integrated 60mm dual-rotor FANs inside L1 node (N+2 redundancy)
- Support 48V or 54V DC input from the external power server.
Add the structures related to the new systems to allow proper activation
of the all required platform driver.
Add poweroff callback to support deep power cycle flow, which should
include special actions against CPLD device for performing graceful
operation.
Signed-off-by: Vadim Pasternak <vadimp@nvidia.com>
---
drivers/platform/x86/mlx-platform.c | 395 +++++++++++++++++++++++++++-
1 file changed, 393 insertions(+), 2 deletions(-)
diff --git a/drivers/platform/x86/mlx-platform.c b/drivers/platform/x86/mlx-platform.c
index 4bbe1d8f0..a2addd1b3 100644
--- a/drivers/platform/x86/mlx-platform.c
+++ b/drivers/platform/x86/mlx-platform.c
@@ -15,6 +15,7 @@
#include <linux/platform_device.h>
#include <linux/platform_data/i2c-mux-reg.h>
#include <linux/platform_data/mlxreg.h>
+#include <linux/reboot.h>
#include <linux/regmap.h>
#include <linux/spi/spi.h>
@@ -62,12 +63,19 @@
#define MLXPLAT_CPLD_LPC_REG_PWM_CONTROL_OFFSET 0x37
#define MLXPLAT_CPLD_LPC_REG_AGGR_OFFSET 0x3a
#define MLXPLAT_CPLD_LPC_REG_AGGR_MASK_OFFSET 0x3b
+#define MLXPLAT_CPLD_LPC_REG_DBG1_OFFSET 0x3c
+#define MLXPLAT_CPLD_LPC_REG_DBG2_OFFSET 0x3d
+#define MLXPLAT_CPLD_LPC_REG_DBG3_OFFSET 0x3e
+#define MLXPLAT_CPLD_LPC_REG_DBG4_OFFSET 0x3f
#define MLXPLAT_CPLD_LPC_REG_AGGRLO_OFFSET 0x40
#define MLXPLAT_CPLD_LPC_REG_AGGRLO_MASK_OFFSET 0x41
#define MLXPLAT_CPLD_LPC_REG_AGGRCO_OFFSET 0x42
#define MLXPLAT_CPLD_LPC_REG_AGGRCO_MASK_OFFSET 0x43
#define MLXPLAT_CPLD_LPC_REG_AGGRCX_OFFSET 0x44
#define MLXPLAT_CPLD_LPC_REG_AGGRCX_MASK_OFFSET 0x45
+#define MLXPLAT_CPLD_LPC_REG_BRD_OFFSET 0x47
+#define MLXPLAT_CPLD_LPC_REG_BRD_EVENT_OFFSET 0x48
+#define MLXPLAT_CPLD_LPC_REG_BRD_MASK_OFFSET 0x49
#define MLXPLAT_CPLD_LPC_REG_GWP_OFFSET 0x4a
#define MLXPLAT_CPLD_LPC_REG_GWP_EVENT_OFFSET 0x4b
#define MLXPLAT_CPLD_LPC_REG_GWP_MASK_OFFSET 0x4c
@@ -97,6 +105,9 @@
#define MLXPLAT_CPLD_LPC_REG_EROTE_OFFSET 0x94
#define MLXPLAT_CPLD_LPC_REG_EROTE_EVENT_OFFSET 0x95
#define MLXPLAT_CPLD_LPC_REG_EROTE_MASK_OFFSET 0x96
+#define MLXPLAT_CPLD_LPC_REG_PWRB_OFFSET 0x97
+#define MLXPLAT_CPLD_LPC_REG_PWRB_EVENT_OFFSET 0x98
+#define MLXPLAT_CPLD_LPC_REG_PWRB_MASK_OFFSET 0x99
#define MLXPLAT_CPLD_LPC_REG_LC_VR_OFFSET 0x9a
#define MLXPLAT_CPLD_LPC_REG_LC_VR_EVENT_OFFSET 0x9b
#define MLXPLAT_CPLD_LPC_REG_LC_VR_MASK_OFFSET 0x9c
@@ -128,6 +139,7 @@
#define MLXPLAT_CPLD_LPC_REG_WD3_TMR_OFFSET 0xd1
#define MLXPLAT_CPLD_LPC_REG_WD3_TLEFT_OFFSET 0xd2
#define MLXPLAT_CPLD_LPC_REG_WD3_ACT_OFFSET 0xd3
+#define MLXPLAT_CPLD_LPC_REG_DBG_CTRL_OFFSET 0xd9
#define MLXPLAT_CPLD_LPC_REG_CPLD1_MVER_OFFSET 0xde
#define MLXPLAT_CPLD_LPC_REG_CPLD2_MVER_OFFSET 0xdf
#define MLXPLAT_CPLD_LPC_REG_CPLD3_MVER_OFFSET 0xe0
@@ -211,6 +223,7 @@
MLXPLAT_CPLD_AGGR_MASK_LC_SDWN)
#define MLXPLAT_CPLD_LOW_AGGR_MASK_LOW 0xc1
#define MLXPLAT_CPLD_LOW_AGGR_MASK_ASIC2 BIT(2)
+#define MLXPLAT_CPLD_LOW_AGGR_MASK_PWR_BUT BIT(4)
#define MLXPLAT_CPLD_LOW_AGGR_MASK_I2C BIT(6)
#define MLXPLAT_CPLD_PSU_MASK GENMASK(1, 0)
#define MLXPLAT_CPLD_PWR_MASK GENMASK(1, 0)
@@ -225,6 +238,16 @@
#define MLXPLAT_CPLD_VOLTREG_UPD_MASK GENMASK(5, 4)
#define MLXPLAT_CPLD_GWP_MASK GENMASK(0, 0)
#define MLXPLAT_CPLD_EROT_MASK GENMASK(1, 0)
+#define MLXPLAT_CPLD_PWR_BUTTON_MASK BIT(0)
+#define MLXPLAT_CPLD_LATCH_RST_MASK BIT(5)
+#define MLXPLAT_CPLD_THERMAL1_PDB_MASK BIT(3)
+#define MLXPLAT_CPLD_THERMAL2_PDB_MASK BIT(4)
+#define MLXPLAT_CPLD_INTRUSION_MASK BIT(6)
+#define MLXPLAT_CPLD_PWM_PG_MASK BIT(7)
+#define MLXPLAT_CPLD_L1_CHA_HEALTH_MASK (MLXPLAT_CPLD_THERMAL1_PDB_MASK | \
+ MLXPLAT_CPLD_THERMAL2_PDB_MASK | \
+ MLXPLAT_CPLD_INTRUSION_MASK |\
+ MLXPLAT_CPLD_PWM_PG_MASK)
#define MLXPLAT_CPLD_I2C_CAP_BIT 0x04
#define MLXPLAT_CPLD_I2C_CAP_MASK GENMASK(5, MLXPLAT_CPLD_I2C_CAP_BIT)
@@ -237,6 +260,8 @@
/* Masks for aggregation for modular systems */
#define MLXPLAT_CPLD_LPC_LC_MASK GENMASK(7, 0)
+#define MLXPLAT_CPLD_HALT_MASK BIT(3)
+
/* Default I2C parent bus number */
#define MLXPLAT_CPLD_PHYS_ADAPTER_DEF_NR 1
@@ -317,6 +342,8 @@ struct mlxplat_priv {
void *regmap;
};
+static struct platform_device *mlxplat_dev;
+
/* Regions for LPC I2C controller and LPC base register space */
static const struct resource mlxplat_lpc_resources[] = {
[0] = DEFINE_RES_NAMED(MLXPLAT_CPLD_LPC_I2C_BASE_ADRR,
@@ -476,7 +503,7 @@ static struct i2c_mux_reg_platform_data mlxplat_modular_mux_data[] = {
},
};
-/* Platform channels for rack swicth system family */
+/* Platform channels for rack switch system family */
static const int mlxplat_rack_switch_channels[] = {
1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16,
};
@@ -2409,6 +2436,156 @@ struct mlxreg_core_hotplug_platform_data mlxplat_mlxcpld_rack_switch_data = {
.mask_low = MLXPLAT_CPLD_LOW_AGGR_MASK_LOW,
};
+/* Callback performs graceful shutdown after notification about power button event */
+static int
+mlxplat_mlxcpld_l1_switch_pwr_events_handler(void *handle, enum mlxreg_hotplug_kind kind,
+ u8 action)
+{
+ dev_info(&mlxplat_dev->dev, "System shutdown due to short press of power button");
+ kernel_halt();
+ return 0;
+}
+
+static struct mlxreg_core_hotplug_notifier mlxplat_mlxcpld_l1_switch_pwr_events_notifier = {
+ .user_handler = mlxplat_mlxcpld_l1_switch_pwr_events_handler,
+};
+
+/* Platform hotplug for l1 switch systems family data */
+static struct mlxreg_core_data mlxplat_mlxcpld_l1_switch_pwr_events_items_data[] = {
+ {
+ .label = "power_button",
+ .reg = MLXPLAT_CPLD_LPC_REG_PWRB_OFFSET,
+ .mask = MLXPLAT_CPLD_PWR_BUTTON_MASK,
+ .hpdev.nr = MLXPLAT_CPLD_NR_NONE,
+ .hpdev.notifier = &mlxplat_mlxcpld_l1_switch_pwr_events_notifier,
+ },
+};
+
+/* Callback activates latch reset flow after notification about intrusion event */
+static int
+mlxplat_mlxcpld_l1_switch_intrusion_events_handler(void *handle, enum mlxreg_hotplug_kind kind,
+ u8 action)
+{
+ struct mlxplat_priv *priv = platform_get_drvdata(mlxplat_dev);
+ u32 regval;
+ int err;
+
+ err = regmap_read(priv->regmap, MLXPLAT_CPLD_LPC_REG_GP1_OFFSET, &regval);
+ if (err)
+ goto fail_regmap_read;
+
+ if (action) {
+ dev_info(&mlxplat_dev->dev, "Detected intrusion - system latch is opened");
+ err = regmap_write(priv->regmap, MLXPLAT_CPLD_LPC_REG_GP1_OFFSET,
+ regval | MLXPLAT_CPLD_LATCH_RST_MASK);
+ } else {
+ dev_info(&mlxplat_dev->dev, "System latch is properly closed");
+ err = regmap_write(priv->regmap, MLXPLAT_CPLD_LPC_REG_GP1_OFFSET,
+ regval & ~MLXPLAT_CPLD_LATCH_RST_MASK);
+ }
+
+ if (err)
+ goto fail_regmap_write;
+
+ return 0;
+
+fail_regmap_read:
+fail_regmap_write:
+ dev_err(&mlxplat_dev->dev, "Register access failed");
+ return err;
+}
+
+static struct mlxreg_core_hotplug_notifier mlxplat_mlxcpld_l1_switch_intrusion_events_notifier = {
+ .user_handler = mlxplat_mlxcpld_l1_switch_intrusion_events_handler,
+};
+
+static struct mlxreg_core_data mlxplat_mlxcpld_l1_switch_health_events_items_data[] = {
+ {
+ .label = "thermal1_pdb",
+ .reg = MLXPLAT_CPLD_LPC_REG_BRD_OFFSET,
+ .mask = MLXPLAT_CPLD_THERMAL1_PDB_MASK,
+ .hpdev.nr = MLXPLAT_CPLD_NR_NONE,
+ },
+ {
+ .label = "thermal2_pdb",
+ .reg = MLXPLAT_CPLD_LPC_REG_BRD_OFFSET,
+ .mask = MLXPLAT_CPLD_THERMAL2_PDB_MASK,
+ .hpdev.nr = MLXPLAT_CPLD_NR_NONE,
+ },
+ {
+ .label = "intrusion",
+ .reg = MLXPLAT_CPLD_LPC_REG_BRD_OFFSET,
+ .mask = MLXPLAT_CPLD_INTRUSION_MASK,
+ .hpdev.nr = MLXPLAT_CPLD_NR_NONE,
+ .hpdev.notifier = &mlxplat_mlxcpld_l1_switch_intrusion_events_notifier,
+ },
+ {
+ .label = "pwm_pg",
+ .reg = MLXPLAT_CPLD_LPC_REG_BRD_OFFSET,
+ .mask = MLXPLAT_CPLD_PWM_PG_MASK,
+ .hpdev.nr = MLXPLAT_CPLD_NR_NONE,
+ },
+};
+
+static struct mlxreg_core_item mlxplat_mlxcpld_l1_switch_events_items[] = {
+ {
+ .data = mlxplat_mlxcpld_default_ng_fan_items_data,
+ .aggr_mask = MLXPLAT_CPLD_AGGR_MASK_NG_DEF,
+ .reg = MLXPLAT_CPLD_LPC_REG_FAN_OFFSET,
+ .mask = MLXPLAT_CPLD_FAN_NG_MASK,
+ .count = ARRAY_SIZE(mlxplat_mlxcpld_default_ng_fan_items_data),
+ .inversed = 1,
+ .health = false,
+ },
+ {
+ .data = mlxplat_mlxcpld_erot_ap_items_data,
+ .aggr_mask = MLXPLAT_CPLD_AGGR_MASK_NG_DEF,
+ .reg = MLXPLAT_CPLD_LPC_REG_EROT_OFFSET,
+ .mask = MLXPLAT_CPLD_EROT_MASK,
+ .count = ARRAY_SIZE(mlxplat_mlxcpld_erot_ap_items_data),
+ .inversed = 1,
+ .health = false,
+ },
+ {
+ .data = mlxplat_mlxcpld_erot_error_items_data,
+ .aggr_mask = MLXPLAT_CPLD_AGGR_MASK_NG_DEF,
+ .reg = MLXPLAT_CPLD_LPC_REG_EROTE_OFFSET,
+ .mask = MLXPLAT_CPLD_EROT_MASK,
+ .count = ARRAY_SIZE(mlxplat_mlxcpld_erot_error_items_data),
+ .inversed = 1,
+ .health = false,
+ },
+ {
+ .data = mlxplat_mlxcpld_l1_switch_pwr_events_items_data,
+ .aggr_mask = MLXPLAT_CPLD_AGGR_MASK_NG_DEF,
+ .reg = MLXPLAT_CPLD_LPC_REG_PWRB_OFFSET,
+ .mask = MLXPLAT_CPLD_PWR_BUTTON_MASK,
+ .count = ARRAY_SIZE(mlxplat_mlxcpld_l1_switch_pwr_events_items_data),
+ .inversed = 0,
+ .health = false,
+ },
+ {
+ .data = mlxplat_mlxcpld_l1_switch_health_events_items_data,
+ .aggr_mask = MLXPLAT_CPLD_AGGR_MASK_NG_DEF,
+ .reg = MLXPLAT_CPLD_LPC_REG_BRD_OFFSET,
+ .mask = MLXPLAT_CPLD_L1_CHA_HEALTH_MASK,
+ .count = ARRAY_SIZE(mlxplat_mlxcpld_l1_switch_health_events_items_data),
+ .inversed = 0,
+ .health = false,
+ .ind = 8,
+ },
+};
+
+static
+struct mlxreg_core_hotplug_platform_data mlxplat_mlxcpld_l1_switch_data = {
+ .items = mlxplat_mlxcpld_l1_switch_events_items,
+ .counter = ARRAY_SIZE(mlxplat_mlxcpld_l1_switch_events_items),
+ .cell = MLXPLAT_CPLD_LPC_REG_AGGR_OFFSET,
+ .mask = MLXPLAT_CPLD_AGGR_MASK_NG_DEF | MLXPLAT_CPLD_AGGR_MASK_COMEX,
+ .cell_low = MLXPLAT_CPLD_LPC_REG_AGGRLO_OFFSET,
+ .mask_low = MLXPLAT_CPLD_LOW_AGGR_MASK_LOW | MLXPLAT_CPLD_LOW_AGGR_MASK_PWR_BUT,
+};
+
static struct spi_board_info rack_switch_switch_spi_board_info[] = {
{
.modalias = "spidev",
@@ -3066,6 +3243,114 @@ static struct mlxreg_core_platform_data mlxplat_qmb8700_led_data = {
.counter = ARRAY_SIZE(mlxplat_mlxcpld_qmb8700_led_data),
};
+/* Platform led data for chassis system */
+static struct mlxreg_core_data mlxplat_mlxcpld_l1_switch_led_data[] = {
+ {
+ .label = "status:green",
+ .reg = MLXPLAT_CPLD_LPC_REG_LED1_OFFSET,
+ .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK,
+ },
+ {
+ .label = "status:orange",
+ .reg = MLXPLAT_CPLD_LPC_REG_LED1_OFFSET,
+ .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK
+ },
+ {
+ .label = "fan1:green",
+ .reg = MLXPLAT_CPLD_LPC_REG_LED2_OFFSET,
+ .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK,
+ .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET,
+ .bit = BIT(0),
+ },
+ {
+ .label = "fan1:orange",
+ .reg = MLXPLAT_CPLD_LPC_REG_LED2_OFFSET,
+ .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK,
+ .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET,
+ .bit = BIT(0),
+ },
+ {
+ .label = "fan2:green",
+ .reg = MLXPLAT_CPLD_LPC_REG_LED2_OFFSET,
+ .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK,
+ .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET,
+ .bit = BIT(1),
+ },
+ {
+ .label = "fan2:orange",
+ .reg = MLXPLAT_CPLD_LPC_REG_LED2_OFFSET,
+ .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK,
+ .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET,
+ .bit = BIT(1),
+ },
+ {
+ .label = "fan3:green",
+ .reg = MLXPLAT_CPLD_LPC_REG_LED3_OFFSET,
+ .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK,
+ .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET,
+ .bit = BIT(2),
+ },
+ {
+ .label = "fan3:orange",
+ .reg = MLXPLAT_CPLD_LPC_REG_LED3_OFFSET,
+ .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK,
+ .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET,
+ .bit = BIT(2),
+ },
+ {
+ .label = "fan4:green",
+ .reg = MLXPLAT_CPLD_LPC_REG_LED3_OFFSET,
+ .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK,
+ .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET,
+ .bit = BIT(3),
+ },
+ {
+ .label = "fan4:orange",
+ .reg = MLXPLAT_CPLD_LPC_REG_LED3_OFFSET,
+ .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK,
+ .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET,
+ .bit = BIT(3),
+ },
+ {
+ .label = "fan5:green",
+ .reg = MLXPLAT_CPLD_LPC_REG_LED4_OFFSET,
+ .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK,
+ .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET,
+ .bit = BIT(4),
+ },
+ {
+ .label = "fan5:orange",
+ .reg = MLXPLAT_CPLD_LPC_REG_LED4_OFFSET,
+ .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK,
+ .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET,
+ .bit = BIT(4),
+ },
+ {
+ .label = "fan6:green",
+ .reg = MLXPLAT_CPLD_LPC_REG_LED4_OFFSET,
+ .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK,
+ .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET,
+ .bit = BIT(5),
+ },
+ {
+ .label = "fan6:orange",
+ .reg = MLXPLAT_CPLD_LPC_REG_LED4_OFFSET,
+ .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK,
+ .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET,
+ .bit = BIT(5),
+ },
+ {
+ .label = "uid:blue",
+ .reg = MLXPLAT_CPLD_LPC_REG_LED5_OFFSET,
+ .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK,
+ },
+};
+
+static struct mlxreg_core_platform_data mlxplat_l1_switch_led_data = {
+ .data = mlxplat_mlxcpld_l1_switch_led_data,
+ .counter = ARRAY_SIZE(mlxplat_mlxcpld_l1_switch_led_data),
+};
+
/* Platform register access default */
static struct mlxreg_core_data mlxplat_mlxcpld_default_regs_io_data[] = {
{
@@ -3594,12 +3879,48 @@ static struct mlxreg_core_data mlxplat_mlxcpld_default_ng_regs_io_data[] = {
.mask = GENMASK(7, 0) & ~BIT(3),
.mode = 0200,
},
+ {
+ .label = "deep_pwr_cycle",
+ .reg = MLXPLAT_CPLD_LPC_REG_GP1_OFFSET,
+ .mask = GENMASK(7, 0) & ~BIT(5),
+ .mode = 0200,
+ },
+ {
+ .label = "latch_reset",
+ .reg = MLXPLAT_CPLD_LPC_REG_GP1_OFFSET,
+ .mask = GENMASK(7, 0) & ~BIT(5),
+ .mode = 0200,
+ },
{
.label = "jtag_enable",
.reg = MLXPLAT_CPLD_LPC_REG_GP2_OFFSET,
.mask = GENMASK(7, 0) & ~BIT(4),
.mode = 0644,
},
+ {
+ .label = "dbg1",
+ .reg = MLXPLAT_CPLD_LPC_REG_DBG1_OFFSET,
+ .bit = GENMASK(7, 0),
+ .mode = 0644,
+ },
+ {
+ .label = "dbg2",
+ .reg = MLXPLAT_CPLD_LPC_REG_DBG2_OFFSET,
+ .bit = GENMASK(7, 0),
+ .mode = 0644,
+ },
+ {
+ .label = "dbg3",
+ .reg = MLXPLAT_CPLD_LPC_REG_DBG3_OFFSET,
+ .bit = GENMASK(7, 0),
+ .mode = 0644,
+ },
+ {
+ .label = "dbg4",
+ .reg = MLXPLAT_CPLD_LPC_REG_DBG4_OFFSET,
+ .bit = GENMASK(7, 0),
+ .mode = 0644,
+ },
{
.label = "asic_health",
.reg = MLXPLAT_CPLD_LPC_REG_ASIC_HEALTH_OFFSET,
@@ -4913,11 +5234,18 @@ static bool mlxplat_mlxcpld_writeable_reg(struct device *dev, unsigned int reg)
case MLXPLAT_CPLD_LPC_SAFE_BIOS_OFFSET:
case MLXPLAT_CPLD_LPC_SAFE_BIOS_WP_OFFSET:
case MLXPLAT_CPLD_LPC_REG_AGGR_MASK_OFFSET:
+ case MLXPLAT_CPLD_LPC_REG_DBG1_OFFSET:
+ case MLXPLAT_CPLD_LPC_REG_DBG2_OFFSET:
+ case MLXPLAT_CPLD_LPC_REG_DBG3_OFFSET:
+ case MLXPLAT_CPLD_LPC_REG_DBG4_OFFSET:
case MLXPLAT_CPLD_LPC_REG_AGGRLO_MASK_OFFSET:
case MLXPLAT_CPLD_LPC_REG_AGGRCO_MASK_OFFSET:
case MLXPLAT_CPLD_LPC_REG_AGGRCX_MASK_OFFSET:
case MLXPLAT_CPLD_LPC_REG_GWP_EVENT_OFFSET:
case MLXPLAT_CPLD_LPC_REG_GWP_MASK_OFFSET:
+ case MLXPLAT_CPLD_LPC_REG_BRD_OFFSET:
+ case MLXPLAT_CPLD_LPC_REG_BRD_EVENT_OFFSET:
+ case MLXPLAT_CPLD_LPC_REG_BRD_MASK_OFFSET:
case MLXPLAT_CPLD_LPC_REG_ASIC_EVENT_OFFSET:
case MLXPLAT_CPLD_LPC_REG_ASIC_MASK_OFFSET:
case MLXPLAT_CPLD_LPC_REG_ASIC2_EVENT_OFFSET:
@@ -4932,6 +5260,8 @@ static bool mlxplat_mlxcpld_writeable_reg(struct device *dev, unsigned int reg)
case MLXPLAT_CPLD_LPC_REG_EROT_MASK_OFFSET:
case MLXPLAT_CPLD_LPC_REG_EROTE_EVENT_OFFSET:
case MLXPLAT_CPLD_LPC_REG_EROTE_MASK_OFFSET:
+ case MLXPLAT_CPLD_LPC_REG_PWRB_EVENT_OFFSET:
+ case MLXPLAT_CPLD_LPC_REG_PWRB_MASK_OFFSET:
case MLXPLAT_CPLD_LPC_REG_AGGRLC_MASK_OFFSET:
case MLXPLAT_CPLD_LPC_REG_LC_IN_EVENT_OFFSET:
case MLXPLAT_CPLD_LPC_REG_LC_IN_MASK_OFFSET:
@@ -4960,6 +5290,7 @@ static bool mlxplat_mlxcpld_writeable_reg(struct device *dev, unsigned int reg)
case MLXPLAT_CPLD_LPC_REG_WD3_TMR_OFFSET:
case MLXPLAT_CPLD_LPC_REG_WD3_TLEFT_OFFSET:
case MLXPLAT_CPLD_LPC_REG_WD3_ACT_OFFSET:
+ case MLXPLAT_CPLD_LPC_REG_DBG_CTRL_OFFSET:
case MLXPLAT_CPLD_LPC_REG_PWM1_OFFSET:
case MLXPLAT_CPLD_LPC_REG_PWM2_OFFSET:
case MLXPLAT_CPLD_LPC_REG_PWM3_OFFSET:
@@ -5010,6 +5341,10 @@ static bool mlxplat_mlxcpld_readable_reg(struct device *dev, unsigned int reg)
case MLXPLAT_CPLD_LPC_SAFE_BIOS_WP_OFFSET:
case MLXPLAT_CPLD_LPC_REG_AGGR_OFFSET:
case MLXPLAT_CPLD_LPC_REG_AGGR_MASK_OFFSET:
+ case MLXPLAT_CPLD_LPC_REG_DBG1_OFFSET:
+ case MLXPLAT_CPLD_LPC_REG_DBG2_OFFSET:
+ case MLXPLAT_CPLD_LPC_REG_DBG3_OFFSET:
+ case MLXPLAT_CPLD_LPC_REG_DBG4_OFFSET:
case MLXPLAT_CPLD_LPC_REG_AGGRLO_OFFSET:
case MLXPLAT_CPLD_LPC_REG_AGGRLO_MASK_OFFSET:
case MLXPLAT_CPLD_LPC_REG_AGGRCO_OFFSET:
@@ -5019,6 +5354,9 @@ static bool mlxplat_mlxcpld_readable_reg(struct device *dev, unsigned int reg)
case MLXPLAT_CPLD_LPC_REG_GWP_OFFSET:
case MLXPLAT_CPLD_LPC_REG_GWP_EVENT_OFFSET:
case MLXPLAT_CPLD_LPC_REG_GWP_MASK_OFFSET:
+ case MLXPLAT_CPLD_LPC_REG_BRD_OFFSET:
+ case MLXPLAT_CPLD_LPC_REG_BRD_EVENT_OFFSET:
+ case MLXPLAT_CPLD_LPC_REG_BRD_MASK_OFFSET:
case MLXPLAT_CPLD_LPC_REG_ASIC_HEALTH_OFFSET:
case MLXPLAT_CPLD_LPC_REG_ASIC_EVENT_OFFSET:
case MLXPLAT_CPLD_LPC_REG_ASIC_MASK_OFFSET:
@@ -5040,6 +5378,9 @@ static bool mlxplat_mlxcpld_readable_reg(struct device *dev, unsigned int reg)
case MLXPLAT_CPLD_LPC_REG_EROTE_OFFSET:
case MLXPLAT_CPLD_LPC_REG_EROTE_EVENT_OFFSET:
case MLXPLAT_CPLD_LPC_REG_EROTE_MASK_OFFSET:
+ case MLXPLAT_CPLD_LPC_REG_PWRB_OFFSET:
+ case MLXPLAT_CPLD_LPC_REG_PWRB_EVENT_OFFSET:
+ case MLXPLAT_CPLD_LPC_REG_PWRB_MASK_OFFSET:
case MLXPLAT_CPLD_LPC_REG_AGGRLC_OFFSET:
case MLXPLAT_CPLD_LPC_REG_AGGRLC_MASK_OFFSET:
case MLXPLAT_CPLD_LPC_REG_LC_IN_OFFSET:
@@ -5076,6 +5417,7 @@ static bool mlxplat_mlxcpld_readable_reg(struct device *dev, unsigned int reg)
case MLXPLAT_CPLD_LPC_REG_WD3_TMR_OFFSET:
case MLXPLAT_CPLD_LPC_REG_WD3_TLEFT_OFFSET:
case MLXPLAT_CPLD_LPC_REG_WD3_ACT_OFFSET:
+ case MLXPLAT_CPLD_LPC_REG_DBG_CTRL_OFFSET:
case MLXPLAT_CPLD_LPC_REG_CPLD1_MVER_OFFSET:
case MLXPLAT_CPLD_LPC_REG_CPLD2_MVER_OFFSET:
case MLXPLAT_CPLD_LPC_REG_CPLD3_MVER_OFFSET:
@@ -5152,6 +5494,10 @@ static bool mlxplat_mlxcpld_volatile_reg(struct device *dev, unsigned int reg)
case MLXPLAT_CPLD_LPC_SAFE_BIOS_WP_OFFSET:
case MLXPLAT_CPLD_LPC_REG_AGGR_OFFSET:
case MLXPLAT_CPLD_LPC_REG_AGGR_MASK_OFFSET:
+ case MLXPLAT_CPLD_LPC_REG_DBG1_OFFSET:
+ case MLXPLAT_CPLD_LPC_REG_DBG2_OFFSET:
+ case MLXPLAT_CPLD_LPC_REG_DBG3_OFFSET:
+ case MLXPLAT_CPLD_LPC_REG_DBG4_OFFSET:
case MLXPLAT_CPLD_LPC_REG_AGGRLO_OFFSET:
case MLXPLAT_CPLD_LPC_REG_AGGRLO_MASK_OFFSET:
case MLXPLAT_CPLD_LPC_REG_AGGRCO_OFFSET:
@@ -5161,6 +5507,9 @@ static bool mlxplat_mlxcpld_volatile_reg(struct device *dev, unsigned int reg)
case MLXPLAT_CPLD_LPC_REG_GWP_OFFSET:
case MLXPLAT_CPLD_LPC_REG_GWP_EVENT_OFFSET:
case MLXPLAT_CPLD_LPC_REG_GWP_MASK_OFFSET:
+ case MLXPLAT_CPLD_LPC_REG_BRD_OFFSET:
+ case MLXPLAT_CPLD_LPC_REG_BRD_EVENT_OFFSET:
+ case MLXPLAT_CPLD_LPC_REG_BRD_MASK_OFFSET:
case MLXPLAT_CPLD_LPC_REG_ASIC_HEALTH_OFFSET:
case MLXPLAT_CPLD_LPC_REG_ASIC_EVENT_OFFSET:
case MLXPLAT_CPLD_LPC_REG_ASIC_MASK_OFFSET:
@@ -5182,6 +5531,9 @@ static bool mlxplat_mlxcpld_volatile_reg(struct device *dev, unsigned int reg)
case MLXPLAT_CPLD_LPC_REG_EROTE_OFFSET:
case MLXPLAT_CPLD_LPC_REG_EROTE_EVENT_OFFSET:
case MLXPLAT_CPLD_LPC_REG_EROTE_MASK_OFFSET:
+ case MLXPLAT_CPLD_LPC_REG_PWRB_OFFSET:
+ case MLXPLAT_CPLD_LPC_REG_PWRB_EVENT_OFFSET:
+ case MLXPLAT_CPLD_LPC_REG_PWRB_MASK_OFFSET:
case MLXPLAT_CPLD_LPC_REG_AGGRLC_OFFSET:
case MLXPLAT_CPLD_LPC_REG_AGGRLC_MASK_OFFSET:
case MLXPLAT_CPLD_LPC_REG_LC_IN_OFFSET:
@@ -5212,6 +5564,7 @@ static bool mlxplat_mlxcpld_volatile_reg(struct device *dev, unsigned int reg)
case MLXPLAT_CPLD_LPC_REG_WD2_TLEFT_OFFSET:
case MLXPLAT_CPLD_LPC_REG_WD3_TMR_OFFSET:
case MLXPLAT_CPLD_LPC_REG_WD3_TLEFT_OFFSET:
+ case MLXPLAT_CPLD_LPC_REG_DBG_CTRL_OFFSET:
case MLXPLAT_CPLD_LPC_REG_CPLD1_MVER_OFFSET:
case MLXPLAT_CPLD_LPC_REG_CPLD2_MVER_OFFSET:
case MLXPLAT_CPLD_LPC_REG_CPLD3_MVER_OFFSET:
@@ -5407,7 +5760,6 @@ static struct resource mlxplat_mlxcpld_resources[] = {
[0] = DEFINE_RES_IRQ_NAMED(MLXPLAT_CPLD_LPC_SYSIRQ, "mlxreg-hotplug"),
};
-static struct platform_device *mlxplat_dev;
static struct mlxreg_core_hotplug_platform_data *mlxplat_i2c;
static struct mlxreg_core_hotplug_platform_data *mlxplat_hotplug;
static struct mlxreg_core_platform_data *mlxplat_led;
@@ -5418,6 +5770,14 @@ static struct mlxreg_core_platform_data
static const struct regmap_config *mlxplat_regmap_config;
static struct spi_board_info *mlxplat_spi;
+/* Platform default poweroff function */
+static void mlxplat_poweroff(void)
+{
+ struct mlxplat_priv *priv = platform_get_drvdata(mlxplat_dev);
+
+ regmap_write(priv->regmap, MLXPLAT_CPLD_LPC_REG_GP1_OFFSET, MLXPLAT_CPLD_HALT_MASK);
+}
+
static int __init mlxplat_dmi_default_matched(const struct dmi_system_id *dmi)
{
int i;
@@ -5740,6 +6100,29 @@ static int __init mlxplat_dmi_ng800_matched(const struct dmi_system_id *dmi)
return 1;
}
+static int __init mlxplat_dmi_l1_switch_matched(const struct dmi_system_id *dmi)
+{
+ int i;
+
+ mlxplat_max_adap_num = MLXPLAT_CPLD_MAX_PHYS_ADAPTER_NUM;
+ mlxplat_mux_num = ARRAY_SIZE(mlxplat_rack_switch_mux_data);
+ mlxplat_mux_data = mlxplat_rack_switch_mux_data;
+ mlxplat_hotplug = &mlxplat_mlxcpld_l1_switch_data;
+ mlxplat_hotplug->deferred_nr =
+ mlxplat_msn21xx_channels[MLXPLAT_CPLD_GRP_CHNL_NUM - 1];
+ mlxplat_led = &mlxplat_l1_switch_led_data;
+ mlxplat_regs_io = &mlxplat_default_ng_regs_io_data;
+ mlxplat_fan = &mlxplat_default_fan_data;
+ for (i = 0; i < ARRAY_SIZE(mlxplat_mlxcpld_wd_set_type2); i++)
+ mlxplat_wd_data[i] = &mlxplat_mlxcpld_wd_set_type2[i];
+ mlxplat_i2c = &mlxplat_mlxcpld_i2c_ng_data;
+ mlxplat_regmap_config = &mlxplat_mlxcpld_regmap_config_rack_switch;
+ pm_power_off = mlxplat_poweroff;
+ mlxplat_spi = rack_switch_switch_spi_board_info;
+
+ return 1;
+}
+
static const struct dmi_system_id mlxplat_dmi_table[] __initconst = {
{
.callback = mlxplat_dmi_default_wc_matched,
@@ -5835,6 +6218,12 @@ static const struct dmi_system_id mlxplat_dmi_table[] __initconst = {
DMI_MATCH(DMI_BOARD_NAME, "VMOD0015"),
},
},
+ {
+ .callback = mlxplat_dmi_l1_switch_matched,
+ .matches = {
+ DMI_MATCH(DMI_BOARD_NAME, "VMOD0017"),
+ },
+ },
{
.callback = mlxplat_dmi_msn274x_matched,
.matches = {
@@ -6167,6 +6556,8 @@ static void __exit mlxplat_exit(void)
struct mlxplat_priv *priv = platform_get_drvdata(mlxplat_dev);
int i;
+ if (pm_power_off)
+ pm_power_off = NULL;
for (i = MLXPLAT_CPLD_WD_MAX_DEVS - 1; i >= 0 ; i--)
platform_device_unregister(priv->pdev_wd[i]);
if (priv->pdev_fan)
--
2.20.1

168
platform/mellanox/non-upstream-patches/patches/0183-platform-mellanox-Split-initialization-procedure.patch Normal file
View File

@@ -0,0 +1,168 @@
From 5a2cfa144640a047ab17de5ef12dfefbe7e2f8c3 Mon Sep 17 00:00:00 2001
From: Vadim Pasternak <vadimp@nvidia.com>
Date: Sun, 11 Dec 2022 10:44:43 +0200
Subject: [PATCH backport 5.10 2/5] platform: mellanox: Split initialization
procedure
Split mlxplat_init() into two by adding mlxplat_pre_init().
Motivation is to prepare 'mlx-platform' driver to support systems
equipped PCIe based programming logic device.
Such systems are supposed to use different system resources, thus this
commit separates resources allocation related code.
Signed-off-by: Vadim Pasternak <vadimp@nvidia.com>
---
drivers/platform/x86/mlx-platform.c | 78 ++++++++++++++++++++++-------
1 file changed, 60 insertions(+), 18 deletions(-)
diff --git a/drivers/platform/x86/mlx-platform.c b/drivers/platform/x86/mlx-platform.c
index a2addd1b3..199f22d72 100644
--- a/drivers/platform/x86/mlx-platform.c
+++ b/drivers/platform/x86/mlx-platform.c
@@ -330,6 +330,8 @@
* @pdev_fan - FAN platform devices
* @pdev_wd - array of watchdog platform devices
* @regmap: device register map
+ * @hotplug_resources: system hotplug resources
+ * @hotplug_resources_size: size of system hotplug resources
*/
struct mlxplat_priv {
struct platform_device *pdev_i2c;
@@ -340,6 +342,8 @@ struct mlxplat_priv {
struct platform_device *pdev_fan;
struct platform_device *pdev_wd[MLXPLAT_CPLD_WD_MAX_DEVS];
void *regmap;
+ struct resource *hotplug_resources;
+ unsigned int hotplug_resources_size;
};
static struct platform_device *mlxplat_dev;
@@ -6365,20 +6369,63 @@ static int mlxplat_mlxcpld_check_wd_capability(void *regmap)
return 0;
}
+static int mlxplat_lpc_cpld_device_init(struct resource **hotplug_resources,
+ unsigned int *hotplug_resources_size)
+{
+ int err;
+
+ mlxplat_dev = platform_device_register_simple(MLX_PLAT_DEVICE_NAME, PLATFORM_DEVID_NONE,
+ mlxplat_lpc_resources,
+ ARRAY_SIZE(mlxplat_lpc_resources));
+ if (IS_ERR(mlxplat_dev))
+ return PTR_ERR(mlxplat_dev);
+
+ mlxplat_mlxcpld_regmap_ctx.base = devm_ioport_map(&mlxplat_dev->dev,
+ mlxplat_lpc_resources[1].start, 1);
+ if (!mlxplat_mlxcpld_regmap_ctx.base) {
+ err = -ENOMEM;
+ goto fail_devm_ioport_map;
+ }
+
+ *hotplug_resources = mlxplat_mlxcpld_resources;
+ *hotplug_resources_size = ARRAY_SIZE(mlxplat_mlxcpld_resources);
+
+ return 0;
+
+fail_devm_ioport_map:
+ platform_device_unregister(mlxplat_dev);
+ return err;
+}
+
+static void mlxplat_lpc_cpld_device_exit(void)
+{
+ platform_device_unregister(mlxplat_dev);
+}
+
+static int
+mlxplat_pre_init(struct resource **hotplug_resources, unsigned int *hotplug_resources_size)
+{
+ return mlxplat_lpc_cpld_device_init(hotplug_resources, hotplug_resources_size);
+}
+
+static void mlxplat_post_exit(void)
+{
+ mlxplat_lpc_cpld_device_exit();
+}
+
static int __init mlxplat_init(void)
{
+ unsigned int hotplug_resources_size;
+ struct resource *hotplug_resources;
struct mlxplat_priv *priv;
int i, j, nr, err;
if (!dmi_check_system(mlxplat_dmi_table))
return -ENODEV;
- mlxplat_dev = platform_device_register_simple(MLX_PLAT_DEVICE_NAME, -1,
- mlxplat_lpc_resources,
- ARRAY_SIZE(mlxplat_lpc_resources));
-
- if (IS_ERR(mlxplat_dev))
- return PTR_ERR(mlxplat_dev);
+ err = mlxplat_pre_init(&hotplug_resources, &hotplug_resources_size);
+ if (err)
+ return err;
priv = devm_kzalloc(&mlxplat_dev->dev, sizeof(struct mlxplat_priv),
GFP_KERNEL);
@@ -6388,12 +6435,8 @@ static int __init mlxplat_init(void)
}
platform_set_drvdata(mlxplat_dev, priv);
- mlxplat_mlxcpld_regmap_ctx.base = devm_ioport_map(&mlxplat_dev->dev,
- mlxplat_lpc_resources[1].start, 1);
- if (!mlxplat_mlxcpld_regmap_ctx.base) {
- err = -ENOMEM;
- goto fail_alloc;
- }
+ priv->hotplug_resources = hotplug_resources;
+ priv->hotplug_resources_size = hotplug_resources_size;
if (!mlxplat_regmap_config)
mlxplat_regmap_config = &mlxplat_mlxcpld_regmap_config;
@@ -6414,8 +6457,8 @@ static int __init mlxplat_init(void)
if (mlxplat_i2c)
mlxplat_i2c->regmap = priv->regmap;
priv->pdev_i2c = platform_device_register_resndata(&mlxplat_dev->dev, "i2c_mlxcpld",
- nr, mlxplat_mlxcpld_resources,
- ARRAY_SIZE(mlxplat_mlxcpld_resources),
+ nr, priv->hotplug_resources,
+ priv->hotplug_resources_size,
mlxplat_i2c, sizeof(*mlxplat_i2c));
if (IS_ERR(priv->pdev_i2c)) {
err = PTR_ERR(priv->pdev_i2c);
@@ -6439,8 +6482,8 @@ static int __init mlxplat_init(void)
priv->pdev_hotplug =
platform_device_register_resndata(&mlxplat_dev->dev,
"mlxreg-hotplug", PLATFORM_DEVID_NONE,
- mlxplat_mlxcpld_resources,
- ARRAY_SIZE(mlxplat_mlxcpld_resources),
+ priv->hotplug_resources,
+ priv->hotplug_resources_size,
mlxplat_hotplug, sizeof(*mlxplat_hotplug));
if (IS_ERR(priv->pdev_hotplug)) {
err = PTR_ERR(priv->pdev_hotplug);
@@ -6545,7 +6588,6 @@ static int __init mlxplat_init(void)
platform_device_unregister(priv->pdev_mux[i]);
platform_device_unregister(priv->pdev_i2c);
fail_alloc:
- platform_device_unregister(mlxplat_dev);
return err;
}
@@ -6573,7 +6615,7 @@ static void __exit mlxplat_exit(void)
platform_device_unregister(priv->pdev_mux[i]);
platform_device_unregister(priv->pdev_i2c);
- platform_device_unregister(mlxplat_dev);
+ mlxplat_post_exit();
}
module_exit(mlxplat_exit);
--
2.20.1

455
platform/mellanox/non-upstream-patches/patches/0184-platform-mellanox-Split-logic-in-init-and-exit-flow.patch Normal file
View File

@@ -0,0 +1,455 @@
From f00081a6e0b7af5a0b85db3121afe3cc6a62f9e7 Mon Sep 17 00:00:00 2001
From: Vadim Pasternak <vadimp@nvidia.com>
Date: Sun, 11 Dec 2022 11:08:07 +0200
Subject: [PATCH backport 5.10 072/150] platform: mellanox: Split logic in init
and exit flow
Split logic in mlxplat_init()/mlxplat_exit() routines.
Separate initialization of I2C infrastructure and others platform
drivers.
Motivation is to provide synchronization between I2C bus and mux
drivers and other drivers using this infrastructure.
I2C main bus and MUX busses are implemented in FPGA logic. On some new
systems the numbers allocated for these busses could be variable
depending on order of initialization of I2C native busses. Since bus
numbers are passed to some other platform drivers during initialization
flow, it is necessary to synchronize completion of I2C infrastructure
drivers and activation of rest of drivers.
Thus initialization flow will be performed in synchronized order.
Signed-off-by: Vadim Pasternak <vadimp@nvidia.com>
---
drivers/platform/x86/mlx-platform.c | 313 ++++++++++++++++++----------
1 file changed, 204 insertions(+), 109 deletions(-)
diff --git a/drivers/platform/x86/mlx-platform.c b/drivers/platform/x86/mlx-platform.c
index 199f22d72..05a630135 100644
--- a/drivers/platform/x86/mlx-platform.c
+++ b/drivers/platform/x86/mlx-platform.c
@@ -321,6 +321,9 @@
/* Default value for PWM control register for rack switch system */
#define MLXPLAT_REGMAP_NVSWITCH_PWM_DEFAULT 0xf4
+#define MLXPLAT_I2C_MAIN_BUS_NOTIFIED 0x01
+#define MLXPLAT_I2C_MAIN_BUS_HANDLE_CREATED 0x02
+
/* mlxplat_priv - platform private data
* @pdev_i2c - i2c controller platform device
* @pdev_mux - array of mux platform devices
@@ -332,6 +335,7 @@
* @regmap: device register map
* @hotplug_resources: system hotplug resources
* @hotplug_resources_size: size of system hotplug resources
+ * @hi2c_main_init_status: init status of I2C main bus
*/
struct mlxplat_priv {
struct platform_device *pdev_i2c;
@@ -344,9 +348,11 @@ struct mlxplat_priv {
void *regmap;
struct resource *hotplug_resources;
unsigned int hotplug_resources_size;
+ u8 i2c_main_init_status;
};
static struct platform_device *mlxplat_dev;
+static int mlxplat_i2c_main_complition_notify(void *handle, int id);
/* Regions for LPC I2C controller and LPC base register space */
static const struct resource mlxplat_lpc_resources[] = {
@@ -381,6 +387,7 @@ static struct mlxreg_core_hotplug_platform_data mlxplat_mlxcpld_i2c_ng_data = {
.mask = MLXPLAT_CPLD_AGGR_MASK_COMEX,
.cell_low = MLXPLAT_CPLD_LPC_REG_AGGRCO_OFFSET,
.mask_low = MLXPLAT_CPLD_LOW_AGGR_MASK_I2C,
+ .completion_notify = mlxplat_i2c_main_complition_notify,
};
/* Platform default channels */
@@ -6413,68 +6420,9 @@ static void mlxplat_post_exit(void)
mlxplat_lpc_cpld_device_exit();
}
-static int __init mlxplat_init(void)
+static int mlxplat_post_init(struct mlxplat_priv *priv)
{
- unsigned int hotplug_resources_size;
- struct resource *hotplug_resources;
- struct mlxplat_priv *priv;
- int i, j, nr, err;
-
- if (!dmi_check_system(mlxplat_dmi_table))
- return -ENODEV;
-
- err = mlxplat_pre_init(&hotplug_resources, &hotplug_resources_size);
- if (err)
- return err;
-
- priv = devm_kzalloc(&mlxplat_dev->dev, sizeof(struct mlxplat_priv),
- GFP_KERNEL);
- if (!priv) {
- err = -ENOMEM;
- goto fail_alloc;
- }
- platform_set_drvdata(mlxplat_dev, priv);
-
- priv->hotplug_resources = hotplug_resources;
- priv->hotplug_resources_size = hotplug_resources_size;
-
- if (!mlxplat_regmap_config)
- mlxplat_regmap_config = &mlxplat_mlxcpld_regmap_config;
-
- priv->regmap = devm_regmap_init(&mlxplat_dev->dev, NULL,
- &mlxplat_mlxcpld_regmap_ctx,
- mlxplat_regmap_config);
- if (IS_ERR(priv->regmap)) {
- err = PTR_ERR(priv->regmap);
- goto fail_alloc;
- }
-
- err = mlxplat_mlxcpld_verify_bus_topology(&nr);
- if (nr < 0)
- goto fail_alloc;
-
- nr = (nr == mlxplat_max_adap_num) ? -1 : nr;
- if (mlxplat_i2c)
- mlxplat_i2c->regmap = priv->regmap;
- priv->pdev_i2c = platform_device_register_resndata(&mlxplat_dev->dev, "i2c_mlxcpld",
- nr, priv->hotplug_resources,
- priv->hotplug_resources_size,
- mlxplat_i2c, sizeof(*mlxplat_i2c));
- if (IS_ERR(priv->pdev_i2c)) {
- err = PTR_ERR(priv->pdev_i2c);
- goto fail_alloc;
- }
-
- for (i = 0; i < mlxplat_mux_num; i++) {
- priv->pdev_mux[i] = platform_device_register_resndata(&priv->pdev_i2c->dev,
- "i2c-mux-reg", i, NULL, 0,
- &mlxplat_mux_data[i],
- sizeof(mlxplat_mux_data[i]));
- if (IS_ERR(priv->pdev_mux[i])) {
- err = PTR_ERR(priv->pdev_mux[i]);
- goto fail_platform_mux_register;
- }
- }
+ int i = 0, err;
/* Add hotplug driver */
if (mlxplat_hotplug) {
@@ -6487,19 +6435,10 @@ static int __init mlxplat_init(void)
mlxplat_hotplug, sizeof(*mlxplat_hotplug));
if (IS_ERR(priv->pdev_hotplug)) {
err = PTR_ERR(priv->pdev_hotplug);
- goto fail_platform_mux_register;
+ goto fail_platform_hotplug_register;
}
}
- /* Set default registers. */
- for (j = 0; j < mlxplat_regmap_config->num_reg_defaults; j++) {
- err = regmap_write(priv->regmap,
- mlxplat_regmap_config->reg_defaults[j].reg,
- mlxplat_regmap_config->reg_defaults[j].def);
- if (err)
- goto fail_platform_mux_register;
- }
-
/* Add LED driver. */
if (mlxplat_led) {
mlxplat_led->regmap = priv->regmap;
@@ -6509,7 +6448,7 @@ static int __init mlxplat_init(void)
sizeof(*mlxplat_led));
if (IS_ERR(priv->pdev_led)) {
err = PTR_ERR(priv->pdev_led);
- goto fail_platform_hotplug_register;
+ goto fail_platform_leds_register;
}
}
@@ -6523,7 +6462,7 @@ static int __init mlxplat_init(void)
sizeof(*mlxplat_regs_io));
if (IS_ERR(priv->pdev_io_regs)) {
err = PTR_ERR(priv->pdev_io_regs);
- goto fail_platform_led_register;
+ goto fail_platform_io_register;
}
}
@@ -6536,7 +6475,7 @@ static int __init mlxplat_init(void)
sizeof(*mlxplat_fan));
if (IS_ERR(priv->pdev_fan)) {
err = PTR_ERR(priv->pdev_fan);
- goto fail_platform_io_regs_register;
+ goto fail_platform_fan_register;
}
}
@@ -6547,59 +6486,42 @@ static int __init mlxplat_init(void)
err = mlxplat_mlxcpld_check_wd_capability(priv->regmap);
if (err)
goto fail_platform_wd_register;
- for (j = 0; j < MLXPLAT_CPLD_WD_MAX_DEVS; j++) {
- if (mlxplat_wd_data[j]) {
- mlxplat_wd_data[j]->regmap = priv->regmap;
- priv->pdev_wd[j] =
- platform_device_register_resndata(&mlxplat_dev->dev, "mlx-wdt", j,
- NULL, 0, mlxplat_wd_data[j],
- sizeof(*mlxplat_wd_data[j]));
- if (IS_ERR(priv->pdev_wd[j])) {
- err = PTR_ERR(priv->pdev_wd[j]);
+ for (i = 0; i < MLXPLAT_CPLD_WD_MAX_DEVS; i++) {
+ if (mlxplat_wd_data[i]) {
+ mlxplat_wd_data[i]->regmap = priv->regmap;
+ priv->pdev_wd[i] =
+ platform_device_register_resndata(&mlxplat_dev->dev, "mlx-wdt", i,
+ NULL, 0, mlxplat_wd_data[i],
+ sizeof(*mlxplat_wd_data[i]));
+ if (IS_ERR(priv->pdev_wd[i])) {
+ err = PTR_ERR(priv->pdev_wd[i]);
goto fail_platform_wd_register;
}
}
}
- /* Sync registers with hardware. */
- regcache_mark_dirty(priv->regmap);
- err = regcache_sync(priv->regmap);
- if (err)
- goto fail_platform_wd_register;
-
return 0;
fail_platform_wd_register:
- while (--j >= 0)
- platform_device_unregister(priv->pdev_wd[j]);
- if (mlxplat_fan)
- platform_device_unregister(priv->pdev_fan);
-fail_platform_io_regs_register:
+ while (--i >= 0)
+ platform_device_unregister(priv->pdev_wd[i]);
+fail_platform_fan_register:
if (mlxplat_regs_io)
platform_device_unregister(priv->pdev_io_regs);
-fail_platform_led_register:
+fail_platform_io_register:
if (mlxplat_led)
platform_device_unregister(priv->pdev_led);
-fail_platform_hotplug_register:
+fail_platform_leds_register:
if (mlxplat_hotplug)
platform_device_unregister(priv->pdev_hotplug);
-fail_platform_mux_register:
- while (--i >= 0)
- platform_device_unregister(priv->pdev_mux[i]);
- platform_device_unregister(priv->pdev_i2c);
-fail_alloc:
-
+fail_platform_hotplug_register:
return err;
}
-module_init(mlxplat_init);
-static void __exit mlxplat_exit(void)
+static void mlxplat_pre_exit(struct mlxplat_priv *priv)
{
- struct mlxplat_priv *priv = platform_get_drvdata(mlxplat_dev);
int i;
- if (pm_power_off)
- pm_power_off = NULL;
for (i = MLXPLAT_CPLD_WD_MAX_DEVS - 1; i >= 0 ; i--)
platform_device_unregister(priv->pdev_wd[i]);
if (priv->pdev_fan)
@@ -6610,13 +6532,186 @@ static void __exit mlxplat_exit(void)
platform_device_unregister(priv->pdev_led);
if (priv->pdev_hotplug)
platform_device_unregister(priv->pdev_hotplug);
+}
+
+static int
+mlxplat_i2c_mux_complition_notify(void *handle, struct i2c_adapter *parent,
+ struct i2c_adapter *adapters[])
+{
+ struct mlxplat_priv *priv = handle;
+
+ return mlxplat_post_init(priv);
+}
- for (i = mlxplat_mux_num - 1; i >= 0 ; i--)
+static int mlxplat_i2c_mux_topolgy_init(struct mlxplat_priv *priv)
+{
+ int i, err;
+
+ if (!priv->pdev_i2c) {
+ priv->i2c_main_init_status = MLXPLAT_I2C_MAIN_BUS_NOTIFIED;
+ return 0;
+ }
+
+ priv->i2c_main_init_status = MLXPLAT_I2C_MAIN_BUS_HANDLE_CREATED;
+ for (i = 0; i < mlxplat_mux_num; i++) {
+ priv->pdev_mux[i] = platform_device_register_resndata(&priv->pdev_i2c->dev,
+ "i2c-mux-reg", i, NULL, 0,
+ &mlxplat_mux_data[i],
+ sizeof(mlxplat_mux_data[i]));
+ if (IS_ERR(priv->pdev_mux[i])) {
+ err = PTR_ERR(priv->pdev_mux[i]);
+ goto fail_platform_mux_register;
+ }
+ }
+
+ return mlxplat_i2c_mux_complition_notify(priv, NULL, NULL);
+
+fail_platform_mux_register:
+ while (--i >= 0)
platform_device_unregister(priv->pdev_mux[i]);
+ return err;
+}
+
+static void mlxplat_i2c_mux_topolgy_exit(struct mlxplat_priv *priv)
+{
+ int i;
+
+ for (i = mlxplat_mux_num - 1; i >= 0 ; i--) {
+ if (priv->pdev_mux[i])
+ platform_device_unregister(priv->pdev_mux[i]);
+ }
- platform_device_unregister(priv->pdev_i2c);
mlxplat_post_exit();
}
+
+static int mlxplat_i2c_main_complition_notify(void *handle, int id)
+{
+ struct mlxplat_priv *priv = handle;
+
+ return mlxplat_i2c_mux_topolgy_init(priv);
+}
+
+static int mlxplat_i2c_main_init(struct mlxplat_priv *priv)
+{
+ int nr, err;
+
+ if (!mlxplat_i2c)
+ return 0;
+
+ err = mlxplat_mlxcpld_verify_bus_topology(&nr);
+ if (nr < 0)
+ goto fail_mlxplat_mlxcpld_verify_bus_topology;
+
+ nr = (nr == mlxplat_max_adap_num) ? -1 : nr;
+ mlxplat_i2c->regmap = priv->regmap;
+ mlxplat_i2c->handle = priv;
+
+ priv->pdev_i2c = platform_device_register_resndata(&mlxplat_dev->dev, "i2c_mlxcpld",
+ nr, priv->hotplug_resources,
+ priv->hotplug_resources_size,
+ mlxplat_i2c, sizeof(*mlxplat_i2c));
+ if (IS_ERR(priv->pdev_i2c)) {
+ err = PTR_ERR(priv->pdev_i2c);
+ goto fail_platform_i2c_register;
+ }
+
+ if (priv->i2c_main_init_status == MLXPLAT_I2C_MAIN_BUS_NOTIFIED) {
+ err = mlxplat_i2c_mux_topolgy_init(priv);
+ if (err)
+ goto fail_mlxplat_i2c_mux_topolgy_init;
+ }
+
+ return 0;
+
+fail_mlxplat_i2c_mux_topolgy_init:
+fail_platform_i2c_register:
+fail_mlxplat_mlxcpld_verify_bus_topology:
+ return err;
+}
+
+static void mlxplat_i2c_main_exit(struct mlxplat_priv *priv)
+{
+ mlxplat_i2c_mux_topolgy_exit(priv);
+ if (priv->pdev_i2c)
+ platform_device_unregister(priv->pdev_i2c);
+}
+
+static int __init mlxplat_init(void)
+{
+ unsigned int hotplug_resources_size;
+ struct resource *hotplug_resources;
+ struct mlxplat_priv *priv;
+ int i, err;
+
+ if (!dmi_check_system(mlxplat_dmi_table))
+ return -ENODEV;
+
+ err = mlxplat_pre_init(&hotplug_resources, &hotplug_resources_size);
+ if (err)
+ return err;
+
+ priv = devm_kzalloc(&mlxplat_dev->dev, sizeof(struct mlxplat_priv),
+ GFP_KERNEL);
+ if (!priv) {
+ err = -ENOMEM;
+ goto fail_alloc;
+ }
+ platform_set_drvdata(mlxplat_dev, priv);
+ priv->hotplug_resources = hotplug_resources;
+ priv->hotplug_resources_size = hotplug_resources_size;
+
+ if (!mlxplat_regmap_config)
+ mlxplat_regmap_config = &mlxplat_mlxcpld_regmap_config;
+
+ priv->regmap = devm_regmap_init(&mlxplat_dev->dev, NULL,
+ &mlxplat_mlxcpld_regmap_ctx,
+ mlxplat_regmap_config);
+ if (IS_ERR(priv->regmap)) {
+ err = PTR_ERR(priv->regmap);
+ goto fail_alloc;
+ }
+
+ /* Set default registers. */
+ for (i = 0; i < mlxplat_regmap_config->num_reg_defaults; i++) {
+ err = regmap_write(priv->regmap,
+ mlxplat_regmap_config->reg_defaults[i].reg,
+ mlxplat_regmap_config->reg_defaults[i].def);
+ if (err)
+ goto fail_regmap_write;
+ }
+
+ err = mlxplat_i2c_main_init(priv);
+ if (err)
+ goto fail_mlxplat_i2c_main_init;
+
+ /* Sync registers with hardware. */
+ regcache_mark_dirty(priv->regmap);
+ err = regcache_sync(priv->regmap);
+ if (err)
+ goto fail_regcache_sync;
+
+ return 0;
+
+fail_regcache_sync:
+ mlxplat_pre_exit(priv);
+fail_mlxplat_i2c_main_init:
+fail_regmap_write:
+fail_alloc:
+ mlxplat_post_exit();
+
+ return err;
+}
+module_init(mlxplat_init);
+
+static void __exit mlxplat_exit(void)
+{
+ struct mlxplat_priv *priv = platform_get_drvdata(mlxplat_dev);
+
+ if (pm_power_off)
+ pm_power_off = NULL;
+ mlxplat_pre_exit(priv);
+ mlxplat_i2c_main_exit(priv);
+}
module_exit(mlxplat_exit);
MODULE_AUTHOR("Vadim Pasternak (vadimp@mellanox.com)");
--
2.20.1

81
platform/mellanox/non-upstream-patches/patches/0185-platform-mellanox-Extend-all-systems-with-I2C-notifi.patch Normal file
View File

@@ -0,0 +1,81 @@
From 3a61ad447e2ec437079c86c277b80acde19e9173 Mon Sep 17 00:00:00 2001
From: Vadim Pasternak <vadimp@nvidia.com>
Date: Mon, 26 Dec 2022 22:28:33 +0200
Subject: [PATCH backport 5.10 073/150] platform: mellanox: Extend all systems
with I2C notification callback
Motivation is to provide synchronization between I2C main bus and other
platform drivers using this notification callback.
Signed-off-by: Vadim Pasternak <vadimp@nvidia.com>
---
drivers/platform/x86/mlx-platform.c | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/drivers/platform/x86/mlx-platform.c b/drivers/platform/x86/mlx-platform.c
index 05a630135..1ef0bb975 100644
--- a/drivers/platform/x86/mlx-platform.c
+++ b/drivers/platform/x86/mlx-platform.c
@@ -365,6 +365,11 @@ static const struct resource mlxplat_lpc_resources[] = {
IORESOURCE_IO),
};
+/* Platform systems default i2c data */
+static struct mlxreg_core_hotplug_platform_data mlxplat_mlxcpld_i2c_default_data = {
+ .completion_notify = mlxplat_i2c_main_complition_notify,
+};
+
/* Platform i2c next generation systems data */
static struct mlxreg_core_data mlxplat_mlxcpld_i2c_ng_items_data[] = {
{
@@ -5807,6 +5812,7 @@ static int __init mlxplat_dmi_default_matched(const struct dmi_system_id *dmi)
mlxplat_led = &mlxplat_default_led_data;
mlxplat_regs_io = &mlxplat_default_regs_io_data;
mlxplat_wd_data[0] = &mlxplat_mlxcpld_wd_set_type1[0];
+ mlxplat_i2c = &mlxplat_mlxcpld_i2c_default_data;
return 1;
}
@@ -5829,6 +5835,7 @@ static int __init mlxplat_dmi_default_wc_matched(const struct dmi_system_id *dmi
mlxplat_led = &mlxplat_default_led_wc_data;
mlxplat_regs_io = &mlxplat_default_regs_io_data;
mlxplat_wd_data[0] = &mlxplat_mlxcpld_wd_set_type1[0];
+ mlxplat_i2c = &mlxplat_mlxcpld_i2c_default_data;
return 1;
}
@@ -5876,6 +5883,7 @@ static int __init mlxplat_dmi_msn21xx_matched(const struct dmi_system_id *dmi)
mlxplat_led = &mlxplat_msn21xx_led_data;
mlxplat_regs_io = &mlxplat_msn21xx_regs_io_data;
mlxplat_wd_data[0] = &mlxplat_mlxcpld_wd_set_type1[0];
+ mlxplat_i2c = &mlxplat_mlxcpld_i2c_default_data;
return 1;
}
@@ -5898,6 +5906,7 @@ static int __init mlxplat_dmi_msn274x_matched(const struct dmi_system_id *dmi)
mlxplat_led = &mlxplat_default_led_data;
mlxplat_regs_io = &mlxplat_msn21xx_regs_io_data;
mlxplat_wd_data[0] = &mlxplat_mlxcpld_wd_set_type1[0];
+ mlxplat_i2c = &mlxplat_mlxcpld_i2c_default_data;
return 1;
}
@@ -5920,6 +5929,7 @@ static int __init mlxplat_dmi_msn201x_matched(const struct dmi_system_id *dmi)
mlxplat_led = &mlxplat_msn21xx_led_data;
mlxplat_regs_io = &mlxplat_msn21xx_regs_io_data;
mlxplat_wd_data[0] = &mlxplat_mlxcpld_wd_set_type1[0];
+ mlxplat_i2c = &mlxplat_mlxcpld_i2c_default_data;
return 1;
}
@@ -5969,6 +5979,7 @@ static int __init mlxplat_dmi_comex_matched(const struct dmi_system_id *dmi)
mlxplat_fan = &mlxplat_default_fan_data;
for (i = 0; i < ARRAY_SIZE(mlxplat_mlxcpld_wd_set_type2); i++)
mlxplat_wd_data[i] = &mlxplat_mlxcpld_wd_set_type2[i];
+ mlxplat_i2c = &mlxplat_mlxcpld_i2c_default_data;
mlxplat_regmap_config = &mlxplat_mlxcpld_regmap_config_comex;
return 1;
--
2.20.1

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