diff --git a/.gitmodules b/.gitmodules
index c426599..eec8167 100644
--- a/.gitmodules
+++ b/.gitmodules
@@ -1,6 +1,9 @@
[submodule "sm/ONL"]
path = sm/ONL
- url = https://github.com/microsonic/OpenNetworkLinux.git
+ url = https://github.com/oopt-goldstone/OpenNetworkLinux.git
[submodule "sm/sonic-buildimage"]
path = sm/sonic-buildimage
url = https://github.com/microsonic/sonic-buildimage.git
+[submodule "sm/linux-gft"]
+ path = sm/linux-gft
+ url = https://github.com/oopt-goldstone/linux-gft.git
diff --git a/Makefile b/Makefile
index ca4800e..9ad6243 100644
--- a/Makefile
+++ b/Makefile
@@ -1,5 +1,3 @@
-all: autobuild
-
ifndef GOLDSTONE_BUILDER_IMAGE
GOLDSTONE_BUILDER_IMAGE = gs-builder
endif
@@ -51,12 +49,19 @@ BUILDER_OPTS = \
--isolate \
# THIS LINE INTENTIONALLY LEFT BLANK
-ARCH = amd64
+ALL_ARCHES = arm64 amd64
+
+# Build rule for each architecture.
+define build_arch_template
+$(1) :
+ $(MAKE) -C builds/$(1)
+endef
+$(foreach a,$(ALL_ARCHES),$(eval $(call build_arch_template,$(a))))
all: builder docker
-autobuild:
- $(MAKE) -C builds/$(ARCH)
+
+autobuild: $(ALL_ARCHES)
docker-check:
@which docker > /dev/null || (echo "*** Docker appears to be missing. Please install docker in order to build Goldstone." && exit 1)
@@ -67,6 +72,8 @@ docker-debug: docker-check
$(ONL)/docker/tools/onlbuilder $(BUILDER_OPTS) $(VOLUMES_OPTS) -c tools/debug.sh
builder:
+ docker pull --platform=linux/amd64 python:3-buster
+ docker tag python:3-buster python:3-buster-amd64
cd docker/images/builder && docker build -t $(GOLDSTONE_BUILDER_IMAGE) .
docker: docker-check
diff --git a/README.md b/README.md
index 3ed4c3b..9de37c1 100644
--- a/README.md
+++ b/README.md
@@ -1,15 +1,46 @@
-# Goldstone
+Goldstone NOS
+---
-Goldstone is an open source network OS for TIP OOPT networking hardware
+Goldstone NOS is an open source network OS for [TIP OOPT](https://telecominfraproject.com/oopt/) networking hardware
+
+### Supported Hardware
+
+- Wistron WTP-01-02-00 (Galileo 1)
+- Wistron WTP-01-C1-00 (Galileo FlexT)
+- Edgecore AS7716-24SC/XC (Cassini)
### How to build
-- prerequisite: Docker ( version >= 18.09 )
+#### Prerequisite
+
+- Git
+- Docker ( version >= 18.09, enable [buildkit](https://docs.docker.com/develop/develop-images/build_enhancements/) )
+- Python2
+- make
```
-$ git clone https://github.com/Telecominfraproject/goldstone.git
-$ cd goldstone
+$ docker run --rm --privileged multiarch/qemu-user-static --reset -p yes # https://github.com/multiarch/qemu-user-static
+$ git clone https://github.com/oopt-goldstone/goldstone-buildimage.git
+$ cd goldstone-buildimage
$ git submodule update --init
$ make builder
$ make docker
```
+
+This will build [ONIE](https://opencomputeproject.github.io/onie/) installers that can be installed on the supported hardware under `RELEASE` directory.
+
+```
+$ find RELEASE
+RELEASE
+RELEASE/buster
+RELEASE/buster/arm64
+RELEASE/buster/arm64/goldstone-ea520b9_ONL-OS10_2022-06-08.2311-ea520b9_ARM64.swi.md5sum
+RELEASE/buster/arm64/goldstone-ea520b9_ONL-OS_2022-06-08.2311-ea520b9_ARM64_INSTALLER
+RELEASE/buster/arm64/goldstone-ea520b9_ONL-OS_2022-06-08.2311-ea520b9_ARM64_INSTALLER.md5sum
+RELEASE/buster/arm64/goldstone-ea520b9_ONL-OS10_2022-06-08.2311-ea520b9_ARM64.swi
+RELEASE/buster/amd64
+RELEASE/buster/amd64/goldstone-ea520b9_ONL-OS10_2022-06-08.2311-ea520b9_AMD64.swi.md5sum
+RELEASE/buster/amd64/goldstone-ea520b9_ONL-OS_2022-06-08.2311-ea520b9_AMD64_INSTALLER
+RELEASE/buster/amd64/goldstone-ea520b9_ONL-OS_2022-06-08.2311-ea520b9_AMD64_INSTALLER.md5sum
+RELEASE/buster/amd64/goldstone-ea520b9_ONL-OS10_2022-06-08.2311-ea520b9_AMD64.swi
+```
diff --git a/builds/amd64/installer/swi/PKG.yml b/builds/amd64/installer/swi/PKG.yml
deleted file mode 100644
index 188f9f2..0000000
--- a/builds/amd64/installer/swi/PKG.yml
+++ /dev/null
@@ -1 +0,0 @@
-!include $X1/builds/any/installer/APKG.yml ARCH=amd64 BOOTMODE=swi
diff --git a/builds/amd64/installer/swi/builds/Makefile b/builds/amd64/installer/swi/builds/Makefile
deleted file mode 100644
index 2322fd9..0000000
--- a/builds/amd64/installer/swi/builds/Makefile
+++ /dev/null
@@ -1,3 +0,0 @@
-BOOTMODE=SWI
-include $(X1)/make/config.amd64.mk
-include $(X1)/builds/any/installer/builds/Makefile
diff --git a/builds/amd64/rootfs/arch-packages.yml b/builds/amd64/rootfs/arch-packages.yml
new file mode 100644
index 0000000..fe7e5ec
--- /dev/null
+++ b/builds/amd64/rootfs/arch-packages.yml
@@ -0,0 +1,32 @@
+- apt-transport-https
+- ca-certificates
+- dmidecode
+- parted
+- grub2
+- efibootmgr
+- gdisk
+- ipmitool
+- iptables
+- x1-upgrade
+- onl-kernel-5.4-lts-x86-64-all-modules
+- x1-saibcm-kernel-5.4-lts-x86-64-all:amd64
+- gs-usonic:amd64
+- gs-tai:amd64
+- k3s:amd64
+- stern:amd64
+- gs-mgmt:amd64
+- cfp2piu-kernel-5.4-lts-x86-64-all:amd64
+- libyang1:amd64
+- sysrepo:amd64
+- gscli:amd64
+- onlp-py3:amd64
+- gssystem:amd64
+- libtac2:amd64
+- libtac2-bin:amd64
+- libpam-tacplus:amd64
+- libnss-tacplus:amd64
+- gsyang:all
+- netopeer2:amd64
+- gs-snmp:amd64
+- gs-xlate-oc:amd64
+- python3.10:amd64
diff --git a/builds/amd64/rootfs/builds/Makefile b/builds/amd64/rootfs/builds/Makefile
index 7c3d5f1..6003469 100644
--- a/builds/amd64/rootfs/builds/Makefile
+++ b/builds/amd64/rootfs/builds/Makefile
@@ -22,10 +22,6 @@ ifndef RFS_DIR
RFS_DIR := $(RFS_WORKDIR)/rootfs-$(ARCH).d
endif
-ifndef RFS_CPIO
-RFS_CPIO := $(RFS_WORKDIR)/rootfs-$(ARCH).cpio.gz
-endif
-
ifndef RFS_SQUASH
RFS_SQUASH := $(RFS_WORKDIR)/rootfs-$(ARCH).sqsh
endif
diff --git a/builds/amd64/rootfs/overlay/etc/network/interfaces b/builds/amd64/rootfs/overlay/etc/network/interfaces
new file mode 100644
index 0000000..c0b12ce
--- /dev/null
+++ b/builds/amd64/rootfs/overlay/etc/network/interfaces
@@ -0,0 +1,4 @@
+source-directory /etc/network/interfaces.d
+
+auto eth0
+iface eth0 inet dhcp
diff --git a/builds/amd64/swi/builds/Makefile b/builds/amd64/swi/builds/Makefile
index 520198b..044eea6 100644
--- a/builds/amd64/swi/builds/Makefile
+++ b/builds/amd64/swi/builds/Makefile
@@ -1,3 +1,3 @@
-ROOTFS_PACKAGE := x1-rootfs
+ROOTFS_PACKAGE := goldstone-rootfs
include $(X1)/make/config.amd64.mk
include $(ONL)/make/swi.mk
diff --git a/builds/any/installer/APKG.yml b/builds/any/installer/APKG.yml
index 7520a31..6b20782 100644
--- a/builds/any/installer/APKG.yml
+++ b/builds/any/installer/APKG.yml
@@ -3,17 +3,14 @@ variables:
prerequisites:
broken: true
- packages: [ "x1-swi:$ARCH" ]
+ packages: [ "goldstone-swi:$ARCH" ]
packages:
- - name: x1-installer-$BOOTMODE
+ - name: goldstone-installer-$BOOTMODE
summary: Goldstone Network OS $ARCH Installer
arch: $ARCH
version: 0.$FNAME_RELEASE_ID
- copyright: Copyright 2018 Big Switch Networks
- maintainer: support@bigswitch.com
- changelog: Initial
- support: support@bigswitch.com
+ maintainer: goldstone-nos@googlegroups.com
files:
builds/*INSTALLER : $$PKG_INSTALL/
diff --git a/builds/any/installer/builds/Makefile b/builds/any/installer/builds/Makefile
index 8cea9c8..b11ba52 100644
--- a/builds/any/installer/builds/Makefile
+++ b/builds/any/installer/builds/Makefile
@@ -2,18 +2,18 @@ ifndef ARCH
$(error $$ARCH not set)
endif
-ifndef BOOTMODE
-$(error $$BOOTMODE not set)
+ifneq ($(BOOTMODE), INSTALLED)
+$(error $$BOOTMODE is not INSTALLED but $BOOTMOT)
endif
# Hardcoded to match ONL File naming conventions.
include $(X1)/make/versions/version-goldstone.mk
-INSTALLER_NAME=$(FNAME_PRODUCT_VERSION)_ONL-OS_$(FNAME_BUILD_ID)_$(UARCH)_$(BOOTMODE)_INSTALLER
+INSTALLER_NAME=$(FNAME_PRODUCT_VERSION)_$(FNAME_BUILD_ID)_$(UARCH)_INSTALLER
MKINSTALLER_OPTS := \
--arch $(ARCH) \
--boot-config boot-config \
- --swi x1-swi:$(ARCH) \
+ --swi goldstone-swi:$(ARCH) \
--add-file zerotouch.json \
--onl-version "$(VERSION_STRING)" \
# THIS LINE INTENTIONALLY LEFT BLANK
diff --git a/builds/any/rootfs/APKG.yml b/builds/any/rootfs/APKG.yml
index f498481..49cd1fd 100644
--- a/builds/any/rootfs/APKG.yml
+++ b/builds/any/rootfs/APKG.yml
@@ -2,16 +2,12 @@ variables:
!include $X1/make/versions/version-goldstone.yml
packages:
- - name: x1-rootfs
+ - name: goldstone-rootfs
summary: Goldstone Network OS Root Filesystem
arch: $ARCH
version: 0.$FNAME_RELEASE_ID
- copyright: Copyright 2018 Big Switch Networks
- maintainer: support@bigswitch.com
- changelog: Initial
- support: support@bigswitch.com
+ maintainer: goldstone-nos@googlegroups.com
files:
- builds/$ONL_DEBIAN_SUITE/rootfs-$ARCH.cpio.gz : $$PKG_INSTALL/
builds/$ONL_DEBIAN_SUITE/rootfs-$ARCH.sqsh : $$PKG_INSTALL/
builds/$ONL_DEBIAN_SUITE/manifest.json : $$PKG_INSTALL/
diff --git a/builds/any/rootfs/all-packages.yml b/builds/any/rootfs/all-packages.yml
index cb176d2..37cc33d 100644
--- a/builds/any/rootfs/all-packages.yml
+++ b/builds/any/rootfs/all-packages.yml
@@ -43,3 +43,4 @@
- watchdog
- gs-config
- python-parted
+- jq
diff --git a/builds/any/rootfs/rfs.yml b/builds/any/rootfs/rfs.yml
index 3b9417b..744e5c5 100644
--- a/builds/any/rootfs/rfs.yml
+++ b/builds/any/rootfs/rfs.yml
@@ -6,7 +6,7 @@ Packages: &Packages
- !script $ONL/tools/onl-platform-pkgs.py ${PLATFORM_LIST}
- !script $X1/tools/goldstone-platform-pkgs.py ${PLATFORM_LIST}
- !include $X1/builds/any/rootfs/all-packages.yml
- - !include $X1/builds/any/rootfs/${ARCH}-packages.yml
+ - !include $X1/builds/$ARCH/rootfs/arch-packages.yml
Multistrap:
General:
@@ -45,6 +45,7 @@ Configure:
- $ONL/builds/any/rootfs/${ONL_DEBIAN_SUITE}/common/overlay
- $ONL/builds/any/rootfs/${ONL_DEBIAN_SUITE}/${INIT}/overlay
- $X1/builds/any/rootfs/overlay
+ - $X1/builds/${ARCH}/rootfs/overlay
update-rc.d:
- 'onlpd defaults'
@@ -69,12 +70,18 @@ Configure:
console: True
PermitRootLogin: 'yes'
+ groups:
+ gsmgmt:
+ force: true
+
users:
root:
password: x1
admin:
password: admin
- shell: /usr/bin/gscli
+ shell: /usr/local/bin/gscli
+ groups:
+ - gsmgmt
manifests:
'/etc/onl/rootfs/manifest.json' :
@@ -103,3 +110,5 @@ Configure:
- 'sudo mkdir -p __rfs__/var/tmp'
- 'sudo mkdir -p __rfs__/host/warmboot'
- 'sudo mkdir -p __rfs__/var/log/swss'
+ - 'sudo chroot __rfs__ update-alternatives --set iptables /usr/sbin/iptables-legacy'
+ - 'if [ ${ARCH} = amd64 ]; then sudo chroot __rfs__ systemctl enable ipmievd.service; fi'
diff --git a/builds/any/swi/APKG.yml b/builds/any/swi/APKG.yml
index c5b7845..607a928 100644
--- a/builds/any/swi/APKG.yml
+++ b/builds/any/swi/APKG.yml
@@ -3,17 +3,14 @@ variables:
prerequisites:
broken: true
- packages: [ "x1-rootfs:$ARCH" ]
+ packages: [ "goldstone-rootfs:$ARCH" ]
packages:
- - name: x1-swi
+ - name: goldstone-swi
summary: Goldstone Network OS Switch Image (All $ARCH) Platforms)
arch: $ARCH
version: 0.$FNAME_RELEASE_ID
- copyright: Copyright 2018 Big Switch Networks
- maintainer: support@bigswitch.com
- changelog: Initial
- support: support@bigswitch.com
+ maintainer: goldstone-nos@googlegroups.com
files:
builds/$ONL_DEBIAN_SUITE/*.swi : $$PKG_INSTALL/
diff --git a/builds/arm64/Makefile b/builds/arm64/Makefile
new file mode 100644
index 0000000..435a9da
--- /dev/null
+++ b/builds/arm64/Makefile
@@ -0,0 +1 @@
+include $(ONL)/make/arch-build.mk
diff --git a/builds/amd64/installer/swi/Makefile b/builds/arm64/installer/Makefile
similarity index 100%
rename from builds/amd64/installer/swi/Makefile
rename to builds/arm64/installer/Makefile
diff --git a/builds/arm64/installer/installed/Makefile b/builds/arm64/installer/installed/Makefile
new file mode 100644
index 0000000..dc1e7b8
--- /dev/null
+++ b/builds/arm64/installer/installed/Makefile
@@ -0,0 +1 @@
+include $(ONL)/make/pkg.mk
diff --git a/builds/arm64/installer/installed/PKG.yml b/builds/arm64/installer/installed/PKG.yml
new file mode 100644
index 0000000..57bd105
--- /dev/null
+++ b/builds/arm64/installer/installed/PKG.yml
@@ -0,0 +1 @@
+!include $X1/builds/any/installer/APKG.yml ARCH=arm64 BOOTMODE=installed
diff --git a/builds/amd64/installer/swi/builds/.gitignore b/builds/arm64/installer/installed/builds/.gitignore
similarity index 100%
rename from builds/amd64/installer/swi/builds/.gitignore
rename to builds/arm64/installer/installed/builds/.gitignore
diff --git a/builds/arm64/installer/installed/builds/Makefile b/builds/arm64/installer/installed/builds/Makefile
new file mode 100644
index 0000000..2f01166
--- /dev/null
+++ b/builds/arm64/installer/installed/builds/Makefile
@@ -0,0 +1,3 @@
+BOOTMODE=INSTALLED
+include $(X1)/make/config.arm64.mk
+include $(X1)/builds/any/installer/builds/Makefile
diff --git a/builds/amd64/installer/swi/builds/boot-config b/builds/arm64/installer/installed/builds/boot-config
similarity index 62%
rename from builds/amd64/installer/swi/builds/boot-config
rename to builds/arm64/installer/installed/builds/boot-config
index e1072e1..0729d91 100644
--- a/builds/amd64/installer/swi/builds/boot-config
+++ b/builds/arm64/installer/installed/builds/boot-config
@@ -1,3 +1,3 @@
NETDEV=eth0
-BOOTMODE=SWI
+BOOTMODE=INSTALLED
SWI=images::latest
diff --git a/builds/arm64/rootfs/.gitignore b/builds/arm64/rootfs/.gitignore
new file mode 100644
index 0000000..b291816
--- /dev/null
+++ b/builds/arm64/rootfs/.gitignore
@@ -0,0 +1 @@
+*.d/
diff --git a/builds/arm64/rootfs/Makefile b/builds/arm64/rootfs/Makefile
new file mode 100644
index 0000000..dc1e7b8
--- /dev/null
+++ b/builds/arm64/rootfs/Makefile
@@ -0,0 +1 @@
+include $(ONL)/make/pkg.mk
diff --git a/builds/arm64/rootfs/PKG.yml b/builds/arm64/rootfs/PKG.yml
new file mode 100644
index 0000000..71b09c8
--- /dev/null
+++ b/builds/arm64/rootfs/PKG.yml
@@ -0,0 +1 @@
+!include $X1/builds/any/rootfs/APKG.yml ARCH=arm64
diff --git a/builds/arm64/rootfs/arch-packages.yml b/builds/arm64/rootfs/arch-packages.yml
new file mode 100644
index 0000000..b549392
--- /dev/null
+++ b/builds/arm64/rootfs/arch-packages.yml
@@ -0,0 +1,29 @@
+- apt-transport-https
+- ca-certificates
+- dmidecode
+- parted
+- gdisk
+- iptables
+- u-boot-tools
+- libatomic1
+- goldstone-kernel-5.4-lts-arm64-all-modules
+- k3s:arm64
+- stern:arm64
+- gs-tai:arm64
+- gs-tai-gearbox:arm64
+- gs-tai-dpll:arm64
+- gs-mgmt:arm64
+- libyang1:arm64
+- sysrepo:arm64
+- gscli:arm64
+- onlp-py3:arm64
+- gssystem:arm64
+- libtac2:arm64
+- libtac2-bin:arm64
+- libpam-tacplus:arm64
+- libnss-tacplus:arm64
+- gsyang:all
+- netopeer2:arm64
+- gs-snmp:arm64
+- gs-xlate-oc:arm64
+- python3.10:arm64
diff --git a/builds/arm64/rootfs/builds/.gitignore b/builds/arm64/rootfs/builds/.gitignore
new file mode 100644
index 0000000..2ddf5f2
--- /dev/null
+++ b/builds/arm64/rootfs/builds/.gitignore
@@ -0,0 +1 @@
+manifest.json
diff --git a/builds/arm64/rootfs/builds/Makefile b/builds/arm64/rootfs/builds/Makefile
new file mode 100644
index 0000000..033eac4
--- /dev/null
+++ b/builds/arm64/rootfs/builds/Makefile
@@ -0,0 +1,53 @@
+include $(X1)/make/config.arm64.mk
+
+ifndef PLATFORM_LIST
+ export PLATFORM_LIST=$(shell onlpm --list-platforms --arch arm64 --csv )
+endif
+
+RFS_CONFIG := $(X1)/builds/any/rootfs/rfs.yml
+
+ifndef ARCH
+$(error $$ARCH must be specified)
+endif
+
+ifndef RFS_CONFIG
+$(error $$RFS_CONFIG must be set to the RFS yaml configuration file)
+endif
+
+ifndef RFS_WORKDIR
+RFS_WORKDIR := $(ONL_DEBIAN_SUITE)
+endif
+
+ifndef RFS_DIR
+RFS_DIR := $(RFS_WORKDIR)/rootfs-$(ARCH).d
+endif
+
+ifndef RFS_SQUASH
+RFS_SQUASH := $(RFS_WORKDIR)/rootfs-$(ARCH).sqsh
+endif
+
+RFS_COMMAND := $(ONL)/tools/onlrfs.py --config $(RFS_CONFIG) --arch $(ARCH) --dir $(RFS_DIR)
+
+ifdef RFS_CPIO
+RFS_COMMAND += --cpio $(RFS_CPIO)
+endif
+
+ifdef RFS_SQUASH
+RFS_COMMAND += --squash $(RFS_SQUASH)
+endif
+
+ifndef RFS_MANIFEST
+RFS_MANIFEST := etc/goldstone/rootfs/manifest.json
+endif
+
+LOCAL_MANIFEST := $(RFS_WORKDIR)/manifest.json
+
+RFS: clean
+ $(ONL_V_at) $(RFS_COMMAND)
+ $(ONL_V_at) [ -f $(RFS_DIR)/$(RFS_MANIFEST) ] && sudo cp $(RFS_DIR)/$(RFS_MANIFEST) $(LOCAL_MANIFEST)
+
+clean:
+ $(ONL_V_at) sudo rm -rf $(RFS_WORKDIR)
+
+show-packages:
+ $(ONL_V_at) $(RFS_COMMAND) --show-packages
diff --git a/builds/arm64/rootfs/overlay/etc/network/interfaces b/builds/arm64/rootfs/overlay/etc/network/interfaces
new file mode 100644
index 0000000..caa7f5a
--- /dev/null
+++ b/builds/arm64/rootfs/overlay/etc/network/interfaces
@@ -0,0 +1,7 @@
+source-directory /etc/network/interfaces.d
+
+auto eth0
+iface eth0 inet manual
+
+auto swp2
+iface swp2 inet dhcp
diff --git a/builds/arm64/swi/Makefile b/builds/arm64/swi/Makefile
new file mode 100644
index 0000000..dc1e7b8
--- /dev/null
+++ b/builds/arm64/swi/Makefile
@@ -0,0 +1 @@
+include $(ONL)/make/pkg.mk
diff --git a/builds/arm64/swi/PKG.yml b/builds/arm64/swi/PKG.yml
new file mode 100644
index 0000000..ff16d16
--- /dev/null
+++ b/builds/arm64/swi/PKG.yml
@@ -0,0 +1 @@
+!include $X1/builds/any/swi/APKG.yml ARCH=arm64
diff --git a/builds/arm64/swi/builds/.gitignore b/builds/arm64/swi/builds/.gitignore
new file mode 100644
index 0000000..bcaee90
--- /dev/null
+++ b/builds/arm64/swi/builds/.gitignore
@@ -0,0 +1,2 @@
+manifest.json
+zerotouch.json
diff --git a/builds/arm64/swi/builds/Makefile b/builds/arm64/swi/builds/Makefile
new file mode 100644
index 0000000..37d174a
--- /dev/null
+++ b/builds/arm64/swi/builds/Makefile
@@ -0,0 +1,3 @@
+ROOTFS_PACKAGE := goldstone-rootfs
+include $(X1)/make/config.arm64.mk
+include $(ONL)/make/swi.mk
diff --git a/docker/images/builder/Dockerfile b/docker/images/builder/Dockerfile
index c83fdd1..dce5a6a 100644
--- a/docker/images/builder/Dockerfile
+++ b/docker/images/builder/Dockerfile
@@ -1,7 +1,26 @@
+FROM alpine:latest AS buildx
+RUN apk add --no-cache curl jq
+RUN curl -sS https://api.github.com/repos/docker/buildx/releases/latest | \
+ jq -r '.assets[].browser_download_url' | grep linux-amd64 | xargs curl -sSL > /docker-buildx
+RUN chmod a+x /docker-buildx
+
FROM opennetworklinux/builder10:1.2
-RUN apt update && DEBIAN_FRONTEND=noninteractive apt install -qy apt-transport-https ed libelf-dev python-pip ca-certificates apt-cacher-ng
+RUN apt update --allow-releaseinfo-change && DEBIAN_FRONTEND=noninteractive apt install -qy apt-transport-https ed libelf-dev python-pip ca-certificates apt-cacher-ng curl
# Install Docker cli
-RUN wget -O /tmp/docker.tgz https://download.docker.com/linux/static/stable/x86_64/docker-19.03.9.tgz && tar xf /tmp/docker.tgz -C /tmp && mv /tmp/docker/docker /usr/bin/ && rm -rf /tmp/*
+COPY --from=docker:20.10 /usr/local/bin/docker /usr/local/bin/
+COPY --from=buildx /docker-buildx /usr/local/lib/docker/cli-plugins/
+
+COPY --from=python:3-buster-amd64 /usr/local/bin/python3 /usr/local/bin/python3
+COPY --from=python:3-buster-amd64 /usr/local/lib/python3.10 /usr/local/lib/python3.10
+COPY --from=python:3-buster-amd64 /usr/local/lib/libpython3.10.so.1.0 /usr/local/lib/libpython3.10.so.1.0
+COPY --from=python:3-buster-amd64 /usr/local/include/python3.10 /usr/local/include/python3.10
+
+RUN ldconfig
RUN git clone https://github.com/AgentD/squashfs-tools-ng.git && cd squashfs-tools-ng && ./autogen.sh && ./configure && make && make install && ldconfig
+
+RUN cd /usr/bin/ && curl -s "https://raw.githubusercontent.com/kubernetes-sigs/kustomize/master/hack/install_kustomize.sh" | bash
+
+RUN curl -LO https://github.com/oras-project/oras/releases/download/v0.12.0/oras_0.12.0_linux_amd64.tar.gz && mkdir -p oras-install/ && tar -zxf oras_0.12.0_*.tar.gz -C oras-install/ && mv oras-install/oras /usr/local/bin/ && rm -rf oras_0.12.0_*.tar.gz oras-install/
+
diff --git a/make/config.arm64.mk b/make/config.arm64.mk
new file mode 100644
index 0000000..00bece8
--- /dev/null
+++ b/make/config.arm64.mk
@@ -0,0 +1,2 @@
+include $(ONL)/make/config.arm64.mk
+include $(X1)/make/config.mk
diff --git a/make/mgmt.mk b/make/mgmt.mk
new file mode 100644
index 0000000..cb3b441
--- /dev/null
+++ b/make/mgmt.mk
@@ -0,0 +1,11 @@
+GS_MGMT_IMAGE_REPO ?= ghcr.io/oopt-goldstone/mgmt
+GS_MGMT_VERSION ?= v0.5.0
+
+.PHONY: manifests
+
+manifests:
+ rm -rf manifests && mkdir manifests
+ for file in $(wildcard $(TEMPLATE_DIR)/*.yaml);\
+ do\
+ sed -e s!IMAGE_TAG!$(IMAGE_TAG)!g -e s!MGMT_IMAGE_REPO!$(GS_MGMT_IMAGE_REPO)!g $$file > manifests/$$(basename $$file);\
+ done
diff --git a/packages/base/all/gs-config/PKG.yml b/packages/base/all/gs-config/PKG.yml
index 736701f..d326c6f 100644
--- a/packages/base/all/gs-config/PKG.yml
+++ b/packages/base/all/gs-config/PKG.yml
@@ -2,13 +2,7 @@ packages:
- name: gs-config
arch: all
version: 1.0.0
- copyright: Copyright 2020 Wataru Ishida
- maintainer: wataru.ishid@gmail.com
- changelog: Initial
- support: wataru.ishid@gmail.com
+ maintainer: goldstone-nos@googlegroups.com
summary: Goldstone config file
- after-install: $__DIR__/after-install.sh
- before-remove: $__DIR__/before-remove.sh
files:
- builds/gs-config.service: /etc/systemd/system/
- builds/gs_config.sh: /usr/bin/
+ builds/80.gs-platform-baseconf: /etc/boot.d/
diff --git a/packages/base/all/gs-config/builds/80.gs-platform-baseconf b/packages/base/all/gs-config/builds/80.gs-platform-baseconf
new file mode 100755
index 0000000..3383932
--- /dev/null
+++ b/packages/base/all/gs-config/builds/80.gs-platform-baseconf
@@ -0,0 +1,35 @@
+#!/bin/bash
+
+set -eux
+
+source /etc/profile.d/onl-platform-current.sh # modify $PATH to include onlpdump
+
+if [ -e /etc/goldstone/platform ]; then
+ PLATFORM=`cat /etc/goldstone/platform`
+elif [ -e /etc/onl/platform ]; then
+ PLATFORM=`cat /etc/onl/platform`
+ mkdir -p /etc/goldstone
+ echo $PLATFORM > /etc/goldstone/platform
+else
+ PLATFORM=`onlpdump -o | awk '/Platform Name:/{ print $3 }'`
+ if [ -z "$PLATFORM" ]; then
+ echo "no platform detected by onlpdump command"
+ exit 1
+ fi
+ PLATFORM=${PLATFORM//_/-}
+ mkdir -p /etc/goldstone
+ echo $PLATFORM > /etc/goldstone/platform
+fi
+
+rm -rf /var/lib/goldstone/device/current
+
+if [ ! -d /var/lib/goldstone/device/$PLATFORM ]; then
+ echo "/var/lib/goldstone/device/$PLATFORM not found"
+ exit 1
+fi
+
+cd /var/lib/goldstone/device && ln -sf $PLATFORM current
+
+if [ -e /var/lib/goldstone/device/current/init.sh ]; then
+ /var/lib/goldstone/device/current/init.sh
+fi
diff --git a/packages/base/amd64/k3s/builds/Makefile b/packages/base/amd64/k3s/builds/Makefile
index 9f4edec..b7ea5ef 100644
--- a/packages/base/amd64/k3s/builds/Makefile
+++ b/packages/base/amd64/k3s/builds/Makefile
@@ -1,3 +1,4 @@
+K3S_DIGEST := 04443fbf9e01ff9c3ad5b1dec8cac0df5885e5aac7e3b79196e35a9023e92e25
+
include $(X1)/make/config.amd64.mk
include $(X1)/packages/base/any/k3s/builds/Makefile
-
diff --git a/packages/base/amd64/mgmt/PKG.yml b/packages/base/amd64/mgmt/PKG.yml
index 7223abe..de51310 100644
--- a/packages/base/amd64/mgmt/PKG.yml
+++ b/packages/base/amd64/mgmt/PKG.yml
@@ -1,15 +1 @@
-packages:
- - name: gs-mgmt
- arch: amd64
- version: 1.0.0
- copyright: Copyright 2020 Wataru Ishida
- maintainer: wataru.ishid@gmail.com
- changelog: Initial
- support: wataru.ishid@gmail.com
- summary: Goldstone Management Framework
- before-remove: $__DIR__/before-remove.sh
- depends:
- - k3s
- files:
- builds/mgmt-amd64.tar: /var/lib/rancher/k3s/agent/images/
- builds/manifests: /var/lib/rancher/k3s/server/manifests/mgmt/
+!include $X1/packages/base/any/mgmt/APKG.yml ARCH=amd64
diff --git a/packages/base/amd64/mgmt/builds/.gitignore b/packages/base/amd64/mgmt/builds/.gitignore
index d874ad6..4cfe78d 100644
--- a/packages/base/amd64/mgmt/builds/.gitignore
+++ b/packages/base/amd64/mgmt/builds/.gitignore
@@ -1 +1,7 @@
*.tar
+*.deb
+*.whl
+*.yang
+manifests
+yang
+gs-yang.py
diff --git a/packages/base/amd64/mgmt/builds/Makefile b/packages/base/amd64/mgmt/builds/Makefile
index be1335a..abdadb3 100644
--- a/packages/base/amd64/mgmt/builds/Makefile
+++ b/packages/base/amd64/mgmt/builds/Makefile
@@ -1,9 +1,2 @@
-IMAGE_REPO=docker.io/microsonic
-IMAGES=gs-mgmt-debug
-TAG=latest
-
-mgmt-amd64.tar: FORCE
- DOCKER_BUILDKIT=1 docker build --build-arg BASE=$(IMAGE_REPO)/$(IMAGES):$(TAG) -t $(IMAGES):$(TAG) .
- docker save $(foreach image,$(IMAGES), $(image):$(TAG)) > $@
-
-FORCE:
+include $(X1)/make/config.amd64.mk
+include $(X1)/packages/base/any/mgmt/builds/Makefile
diff --git a/packages/base/amd64/mgmt/builds/manifests/mgmt.yaml b/packages/base/amd64/mgmt/builds/manifests/mgmt.yaml
deleted file mode 100644
index 2f7d496..0000000
--- a/packages/base/amd64/mgmt/builds/manifests/mgmt.yaml
+++ /dev/null
@@ -1,270 +0,0 @@
-apiVersion: v1
-kind: Service
-metadata:
- name: netopeer2
-spec:
- selector:
- app: gs-mgmt
- ports:
- - protocol: TCP
- port: 830
-
----
-
-apiVersion: v1
-kind: ServiceAccount
-metadata:
- name: gs-mgmt
- namespace: default
-
----
-
-apiVersion: rbac.authorization.k8s.io/v1
-kind: ClusterRoleBinding
-metadata:
- name: gs-mgmt
-roleRef:
- apiGroup: rbac.authorization.k8s.io
- kind: ClusterRole
- name: view
-subjects:
-- kind: ServiceAccount
- name: gs-mgmt
- namespace: default
-
----
-
-apiVersion: batch/v1
-kind: Job
-metadata:
- name: prep-gs-mgmt
-spec:
- template:
- spec:
- hostPID: true
- restartPolicy: Never
- containers:
- - name: prep-sysrepo
- image: docker.io/microsonic/gs-mgmt-debug:latest
- imagePullPolicy: IfNotPresent
- command: ['sysrepoctl', '-s', '/var/lib/goldstone/yang/gs', '--install', '/var/lib/goldstone/yang/gs/goldstone-tai.yang,/var/lib/goldstone/yang/gs/goldstone-onlp.yang']
- volumeMounts:
- - name: shm
- mountPath: /dev/shm
- - name: sysrepo
- mountPath: /var/lib/sysrepo
- - name: prep-np
- image: docker.io/microsonic/gs-mgmt-netopeer2:latest
- imagePullPolicy: IfNotPresent
- command: ['sh', '-c', '$NP2/setup.sh && $NP2/merge_hostkey.sh && $NP2/merge_config.sh']
- env:
- - name: NP2
- value: /usr/local/share/netopeer2/scripts
- - name: NP2_MODULE_OWNER
- value: root
- - name: NP2_MODULE_GROUP
- value: root
- - name: NP2_MODULE_PERMS
- value: "600"
- - name: NP2_MODULE_DIR
- value: /usr/local/share/yang/modules/netopeer2
- volumeMounts:
- - mountPath: /dev/shm
- name: shm
- - mountPath: /var/lib/sysrepo
- name: sysrepo
- volumes:
- - name: shm
- hostPath:
- path: /dev/shm
- - name: sysrepo
- hostPath:
- path: /var/lib/sysrepo
-
----
-
-apiVersion: apps/v1
-kind: DaemonSet
-metadata:
- name: gs-mgmt-cli
- labels:
- app: gs-mgmt
-spec:
- selector:
- matchLabels:
- app: gs-mgmt-cli
- template:
- metadata:
- labels:
- app: gs-mgmt-cli
- spec:
- hostPID: true
- serviceAccountName: gs-mgmt
- initContainers:
- - name: wait-prep
- image: docker.io/bitnami/kubectl:latest
- imagePullPolicy: IfNotPresent
- command: ['kubectl', 'wait', '--for=condition=complete', 'job/prep-gs-mgmt']
- containers:
- - name: cli
- image: docker.io/microsonic/gs-mgmt-debug:latest
- imagePullPolicy: IfNotPresent
- command: ['sh', '-c', 'while true; do gscli -c "transponder; show"; sleep 2; done']
- volumeMounts:
- - name: shm
- mountPath: /dev/shm
- - name: sysrepo
- mountPath: /var/lib/sysrepo
- volumes:
- - name: shm
- hostPath:
- path: /dev/shm
- - name: sysrepo
- hostPath:
- path: /var/lib/sysrepo
-
----
-
-apiVersion: apps/v1
-kind: DaemonSet
-metadata:
- name: gs-mgmt-np2
- labels:
- app: gs-mgmt
-spec:
- selector:
- matchLabels:
- app: gs-mgmt-np2
- template:
- metadata:
- labels:
- app: gs-mgmt-np2
- spec:
- hostPID: true
- serviceAccountName: gs-mgmt
- initContainers:
- - name: wait-prep
- image: docker.io/bitnami/kubectl:latest
- imagePullPolicy: IfNotPresent
- command: ['kubectl', 'wait', '--for=condition=complete', 'job/prep-gs-mgmt']
- containers:
- - name: netopeer2
- image: docker.io/microsonic/gs-mgmt-netopeer2:latest
- imagePullPolicy: IfNotPresent
- command: ['netopeer2-server', '-d', '-v', '2']
- volumeMounts:
- - name: shm
- mountPath: /dev/shm
- - name: sysrepo
- mountPath: /var/lib/sysrepo
- volumes:
- - name: shm
- hostPath:
- path: /dev/shm
- - name: sysrepo
- hostPath:
- path: /var/lib/sysrepo
-
----
-
-apiVersion: apps/v1
-kind: DaemonSet
-metadata:
- name: gs-mgmt-tai
- labels:
- app: gs-mgmt
-spec:
- selector:
- matchLabels:
- app: gs-mgmt-tai
- template:
- metadata:
- labels:
- app: gs-mgmt-tai
- spec:
- hostPID: true
- serviceAccountName: gs-mgmt
- initContainers:
- - name: wait-prep
- image: docker.io/bitnami/kubectl:latest
- imagePullPolicy: IfNotPresent
- command: ['kubectl', 'wait', '--for=condition=complete', 'job/prep-gs-mgmt']
- containers:
- - name: tai
- image: docker.io/microsonic/gs-mgmt-debug:latest
- imagePullPolicy: IfNotPresent
- command: ['sh', '-c', 'gssouthd-tai --taish-server $TAISH_SERVER_SERVICE_HOST:$TAISH_SERVER_SERVICE_PORT --verbose']
- volumeMounts:
- - name: shm
- mountPath: /dev/shm
- - name: sysrepo
- mountPath: /var/lib/sysrepo
- volumes:
- - name: shm
- hostPath:
- path: /dev/shm
- - name: sysrepo
- hostPath:
- path: /var/lib/sysrepo
-
----
-
-apiVersion: apps/v1
-kind: DaemonSet
-metadata:
- name: gs-mgmt-onlp
- labels:
- app: gs-mgmt
-spec:
- selector:
- matchLabels:
- app: gs-mgmt-onlp
- template:
- metadata:
- labels:
- app: gs-mgmt-onlp
- spec:
- hostPID: true
- serviceAccountName: gs-mgmt
- initContainers:
- - name: wait-prep
- image: docker.io/bitnami/kubectl:latest
- imagePullPolicy: IfNotPresent
- command: ['kubectl', 'wait', '--for=condition=complete', 'job/prep-gs-mgmt']
- containers:
- - name: onlp
- image: docker.io/microsonic/gs-mgmt-debug:latest
- imagePullPolicy: IfNotPresent
- command: ['gssouthd-onlp']
- volumeMounts:
- - name: shm
- mountPath: /dev/shm
- - name: sysrepo
- mountPath: /var/lib/sysrepo
- - name: onl
- mountPath: /etc/onl/
- - name: host-lib
- mountPath: /lib/x86_64-linux-gnu/libonlp-platform.so
- - name: host-i2c-lib
- mountPath: /lib/x86_64-linux-gnu/libi2c.so.0
- securityContext:
- capabilities:
- add:
- - IPC_OWNER
- - IPC_LOCK
- volumes:
- - name: shm
- hostPath:
- path: /dev/shm
- - name: sysrepo
- hostPath:
- path: /var/lib/sysrepo
- - name: onl
- hostPath:
- path: /etc/onl
- - name: host-lib
- hostPath:
- path: /lib/x86_64-linux-gnu/libonlp-platform.so
- - name: host-i2c-lib
- hostPath:
- path: /usr/lib/x86_64-linux-gnu/libi2c.so.0.1.1
diff --git a/packages/base/amd64/mgmt/builds/templates/kustomization.yaml b/packages/base/amd64/mgmt/builds/templates/kustomization.yaml
new file mode 100644
index 0000000..549f946
--- /dev/null
+++ b/packages/base/amd64/mgmt/builds/templates/kustomization.yaml
@@ -0,0 +1,8 @@
+bases:
+- base
+
+patches:
+- north-notif.yaml
+- south-onlp.yaml
+- south-sonic.yaml
+- south-tai.yaml
diff --git a/packages/base/amd64/mgmt/builds/templates/north-notif.yaml b/packages/base/amd64/mgmt/builds/templates/north-notif.yaml
new file mode 100644
index 0000000..429d9bd
--- /dev/null
+++ b/packages/base/amd64/mgmt/builds/templates/north-notif.yaml
@@ -0,0 +1,10 @@
+apiVersion: apps/v1
+kind: DaemonSet
+metadata:
+ name: north-notif
+spec:
+ template:
+ spec:
+ containers:
+ - name: notif
+ image: MGMT_IMAGE_REPO/north-notif:IMAGE_TAG
diff --git a/packages/base/amd64/mgmt/builds/templates/south-onlp.yaml b/packages/base/amd64/mgmt/builds/templates/south-onlp.yaml
new file mode 100644
index 0000000..b2efb6e
--- /dev/null
+++ b/packages/base/amd64/mgmt/builds/templates/south-onlp.yaml
@@ -0,0 +1,22 @@
+apiVersion: apps/v1
+kind: DaemonSet
+metadata:
+ name: south-onlp
+spec:
+ template:
+ spec:
+ containers:
+ - name: onlp
+ image: MGMT_IMAGE_REPO/south-onlp:IMAGE_TAG
+ volumeMounts:
+ - name: host-lib
+ mountPath: /lib/x86_64-linux-gnu/libonlp-platform.so
+ - name: host-i2c-lib
+ mountPath: /lib/x86_64-linux-gnu/libi2c.so.0
+ volumes:
+ - name: host-lib
+ hostPath:
+ path: /lib/x86_64-linux-gnu/libonlp-platform.so
+ - name: host-i2c-lib
+ hostPath:
+ path: /usr/lib/x86_64-linux-gnu/libi2c.so.0
diff --git a/packages/base/amd64/mgmt/builds/templates/south-sonic.yaml b/packages/base/amd64/mgmt/builds/templates/south-sonic.yaml
new file mode 100644
index 0000000..13bd021
--- /dev/null
+++ b/packages/base/amd64/mgmt/builds/templates/south-sonic.yaml
@@ -0,0 +1,10 @@
+apiVersion: apps/v1
+kind: DaemonSet
+metadata:
+ name: south-sonic
+spec:
+ template:
+ spec:
+ containers:
+ - name: sonic
+ image: MGMT_IMAGE_REPO/south-sonic:IMAGE_TAG
diff --git a/packages/base/amd64/mgmt/builds/templates/south-tai.yaml b/packages/base/amd64/mgmt/builds/templates/south-tai.yaml
new file mode 100644
index 0000000..36eb990
--- /dev/null
+++ b/packages/base/amd64/mgmt/builds/templates/south-tai.yaml
@@ -0,0 +1,10 @@
+apiVersion: apps/v1
+kind: DaemonSet
+metadata:
+ name: south-tai
+spec:
+ template:
+ spec:
+ containers:
+ - name: tai
+ image: MGMT_IMAGE_REPO/south-tai:IMAGE_TAG
diff --git a/packages/base/amd64/netopeer2/Makefile b/packages/base/amd64/netopeer2/Makefile
new file mode 100644
index 0000000..dc1e7b8
--- /dev/null
+++ b/packages/base/amd64/netopeer2/Makefile
@@ -0,0 +1 @@
+include $(ONL)/make/pkg.mk
diff --git a/packages/base/amd64/netopeer2/PKG.yml b/packages/base/amd64/netopeer2/PKG.yml
new file mode 100644
index 0000000..89f20f6
--- /dev/null
+++ b/packages/base/amd64/netopeer2/PKG.yml
@@ -0,0 +1 @@
+!include $X1/packages/base/any/netopeer2/APKG.yml ARCH=amd64
diff --git a/packages/base/amd64/netopeer2/builds/.gitignore b/packages/base/amd64/netopeer2/builds/.gitignore
new file mode 100644
index 0000000..0ba4042
--- /dev/null
+++ b/packages/base/amd64/netopeer2/builds/.gitignore
@@ -0,0 +1,4 @@
+*.tar
+scripts
+yang
+manifests
diff --git a/packages/base/amd64/netopeer2/builds/Makefile b/packages/base/amd64/netopeer2/builds/Makefile
new file mode 100644
index 0000000..ac95186
--- /dev/null
+++ b/packages/base/amd64/netopeer2/builds/Makefile
@@ -0,0 +1,2 @@
+include $(X1)/make/config.amd64.mk
+include $(X1)/packages/base/any/netopeer2/builds/Makefile
diff --git a/packages/base/amd64/piu/piu-kernel-5.4-lts-x86_64-all/builds/.gitignore b/packages/base/amd64/piu/piu-kernel-5.4-lts-x86_64-all/builds/.gitignore
new file mode 100644
index 0000000..a65b417
--- /dev/null
+++ b/packages/base/amd64/piu/piu-kernel-5.4-lts-x86_64-all/builds/.gitignore
@@ -0,0 +1 @@
+lib
diff --git a/packages/base/amd64/python3.10/Makefile b/packages/base/amd64/python3.10/Makefile
new file mode 100644
index 0000000..dc1e7b8
--- /dev/null
+++ b/packages/base/amd64/python3.10/Makefile
@@ -0,0 +1 @@
+include $(ONL)/make/pkg.mk
diff --git a/packages/base/amd64/python3.10/PKG.yml b/packages/base/amd64/python3.10/PKG.yml
new file mode 100644
index 0000000..1e21403
--- /dev/null
+++ b/packages/base/amd64/python3.10/PKG.yml
@@ -0,0 +1 @@
+!include $X1/packages/base/any/python3.10/APKG.yml ARCH=amd64
diff --git a/packages/base/amd64/python3.10/builds/.gitignore b/packages/base/amd64/python3.10/builds/.gitignore
new file mode 100644
index 0000000..e801f2b
--- /dev/null
+++ b/packages/base/amd64/python3.10/builds/.gitignore
@@ -0,0 +1,4 @@
+libpython3.10.so.1.0
+pip
+python
+python3.10
diff --git a/packages/base/amd64/python3.10/builds/Makefile b/packages/base/amd64/python3.10/builds/Makefile
new file mode 100644
index 0000000..5f18d25
--- /dev/null
+++ b/packages/base/amd64/python3.10/builds/Makefile
@@ -0,0 +1,2 @@
+include $(X1)/make/config.amd64.mk
+include $(X1)/packages/base/any/python3.10/builds/Makefile
diff --git a/packages/base/amd64/snmp/Makefile b/packages/base/amd64/snmp/Makefile
new file mode 100644
index 0000000..dc1e7b8
--- /dev/null
+++ b/packages/base/amd64/snmp/Makefile
@@ -0,0 +1 @@
+include $(ONL)/make/pkg.mk
diff --git a/packages/base/amd64/snmp/PKG.yml b/packages/base/amd64/snmp/PKG.yml
new file mode 100644
index 0000000..fed3ed5
--- /dev/null
+++ b/packages/base/amd64/snmp/PKG.yml
@@ -0,0 +1 @@
+!include $X1/packages/base/any/snmp/APKG.yml ARCH=amd64
diff --git a/packages/base/amd64/snmp/builds/.gitignore b/packages/base/amd64/snmp/builds/.gitignore
new file mode 100644
index 0000000..8e3b1b3
--- /dev/null
+++ b/packages/base/amd64/snmp/builds/.gitignore
@@ -0,0 +1,2 @@
+*.tar
+manifests
diff --git a/packages/base/amd64/snmp/builds/Makefile b/packages/base/amd64/snmp/builds/Makefile
new file mode 100644
index 0000000..a0a728e
--- /dev/null
+++ b/packages/base/amd64/snmp/builds/Makefile
@@ -0,0 +1,2 @@
+include $(X1)/make/config.amd64.mk
+include $(X1)/packages/base/any/snmp/builds/Makefile
diff --git a/packages/base/amd64/stern/PKG.yml b/packages/base/amd64/stern/PKG.yml
index c82ac8f..44dc59e 100644
--- a/packages/base/amd64/stern/PKG.yml
+++ b/packages/base/amd64/stern/PKG.yml
@@ -1,13 +1 @@
-packages:
- - name: stern
- arch: amd64
- version: 1.0.0
- copyright: Copyright 2020 Wataru Ishida
- maintainer: wataru.ishid@gmail.com
- changelog: Initial
- support: wataru.ishid@gmail.com
- summary: stern
- depends:
- - k3s
- files:
- builds/stern: /usr/local/bin/stern
+!include $X1/packages/base/any/stern/APKG.yml ARCH=amd64
diff --git a/packages/base/amd64/stern/builds/.gitignore b/packages/base/amd64/stern/builds/.gitignore
index 574b945..c8b7006 100644
--- a/packages/base/amd64/stern/builds/.gitignore
+++ b/packages/base/amd64/stern/builds/.gitignore
@@ -1 +1,3 @@
stern
+LICENSE
+*.tar.gz
diff --git a/packages/base/amd64/stern/builds/Makefile b/packages/base/amd64/stern/builds/Makefile
index a30ca57..acc92d1 100644
--- a/packages/base/amd64/stern/builds/Makefile
+++ b/packages/base/amd64/stern/builds/Makefile
@@ -1,5 +1,2 @@
-STERN_VERSION = 1.11.0
-
-stern:
- wget -O $@ https://github.com/wercker/stern/releases/download/$(STERN_VERSION)/stern_linux_amd64
- chmod +x $@
+include $(X1)/make/config.amd64.mk
+include $(X1)/packages/base/any/stern/builds/Makefile
diff --git a/packages/base/amd64/tai/PKG.yml b/packages/base/amd64/tai/PKG.yml
index 1f176b6..aeccf4a 100644
--- a/packages/base/amd64/tai/PKG.yml
+++ b/packages/base/amd64/tai/PKG.yml
@@ -1,15 +1 @@
-packages:
- - name: x1-tai
- arch: amd64
- version: 1.0.0
- copyright: Copyright 2020 Wataru Ishida
- maintainer: wataru.ishid@gmail.com
- changelog: Initial
- support: wataru.ishid@gmail.com
- summary: TAI shell server
- before-remove: $__DIR__/before-remove.sh
- depends:
- - k3s
- files:
- builds/tai-amd64.tar: /var/lib/rancher/k3s/agent/images/
- builds/manifests: /var/lib/rancher/k3s/server/manifests/tai/
+!include $X1/packages/base/any/tai/APKG.yml ARCH=amd64 DEFAULT_LIBTAI=libtai-mux.so.0.5.0
diff --git a/packages/base/amd64/tai/builds/Makefile b/packages/base/amd64/tai/builds/Makefile
index a1612c3..d20963b 100644
--- a/packages/base/amd64/tai/builds/Makefile
+++ b/packages/base/amd64/tai/builds/Makefile
@@ -1,9 +1,19 @@
-IMAGE_REPO=docker.io/microsonic
-IMAGES=tai
-TAG=latest
+TAI_LIBS := libtai-ldc.so.0.5.0 libtai-menara.so.0.5.0 libtai-lumentum.so.0.5.0 libtai-mux.so.0.5.0 libtai-aco.so.0.1.0
-tai-amd64.tar: FORCE
- DOCKER_BUILDKIT=1 docker build --build-arg BASE=$(IMAGE_REPO)/$(IMAGES):$(TAG) -t $(IMAGES):$(TAG) .
- docker save $(foreach image,$(IMAGES), $(image):$(TAG)) > $@
+include $(X1)/make/config.amd64.mk
+include $(X1)/packages/base/any/tai/builds/Makefile
-FORCE:
+$(LIB_DIR)/libtai-ldc.so.0.5.0:
+ oras pull -o $(LIB_DIR) ghcr.io/oopt-goldstone/libtai-ldc:0.5.0@sha256:34b7953204e2c92988bd20c4f4c40db5a8ebe628b2820b5d28ac71f1672f6c1b
+
+$(LIB_DIR)/libtai-menara.so.0.5.0:
+ oras pull -o $(LIB_DIR) ghcr.io/oopt-goldstone/libtai-menara:0.5.0@sha256:d18a51440b9b98a8a029e7bfced83c68d363bfeca4c2a52ec53a98ff22695420
+
+$(LIB_DIR)/libtai-lumentum.so.0.5.0:
+ oras pull -o $(LIB_DIR) ghcr.io/oopt-goldstone/libtai-lumentum:0.5.0@sha256:4273a2ed6ae1b80b568c20487faea391c07e12ff849a882ecd8d11c3fcff7b67
+
+$(LIB_DIR)/libtai-mux.so.0.5.0:
+ oras pull -o $(LIB_DIR) ghcr.io/oopt-goldstone/libtai-mux:0.5.0@sha256:c72f6d40d57f14823471b2a472ff2216525d7d8b347b33625a01911d8cd26028
+
+$(LIB_DIR)/libtai-aco.so.0.1.0:
+ oras pull -o $(LIB_DIR) ghcr.io/oopt-goldstone/libtai-aco:0.1.0@sha256:e27e154de9adcd8be8e80bf453d4bbac63179a7bddc7a1b05451c446963419c3
diff --git a/packages/base/amd64/tai/builds/manifests/kustomization.yaml b/packages/base/amd64/tai/builds/manifests/kustomization.yaml
new file mode 100644
index 0000000..da10e6f
--- /dev/null
+++ b/packages/base/amd64/tai/builds/manifests/kustomization.yaml
@@ -0,0 +1,5 @@
+bases:
+- base
+
+patches:
+- tai.yaml
diff --git a/packages/base/amd64/tai/builds/manifests/tai.yaml b/packages/base/amd64/tai/builds/manifests/tai.yaml
index d1221d2..debc1c5 100644
--- a/packages/base/amd64/tai/builds/manifests/tai.yaml
+++ b/packages/base/amd64/tai/builds/manifests/tai.yaml
@@ -1,38 +1,15 @@
apiVersion: apps/v1
kind: Deployment
metadata:
- name: tai
+ name: tai
spec:
- replicas: 1
- selector:
- matchLabels:
- app: tai
- strategy:
- type: Recreate
- template:
- metadata:
- labels:
- app: tai
- spec:
- containers:
- - name: taish-server
- image: tai:latest
- imagePullPolicy: IfNotPresent
- command: ['taish_server']
- env:
- - name: LD_LIBRARY_PATH
- value: "/var/lib/tai"
- volumeMounts:
- - name: host-libtai
- mountPath: /var/lib/tai
- - name: tai-config
- mountPath: /etc/tai
- securityContext:
- privileged: true
- volumes:
- - name: host-libtai
- hostPath:
- path: /var/lib/tai/
- - name: tai-config
- hostPath:
- path: /var/lib/goldstone/device/current/tai
+ template:
+ spec:
+ containers:
+ - name: taish-server
+ image: tai-amd64:latest
+ env:
+ - name: TAI_MUX_PLATFORM_ADAPTER
+ value: "exec"
+ - name: TAI_MUX_EXEC_SCRIPT
+ value: "/etc/tai/mux/exec.py"
diff --git a/packages/base/amd64/tai/builds/tai.service b/packages/base/amd64/tai/builds/tai.service
new file mode 100644
index 0000000..a648be8
--- /dev/null
+++ b/packages/base/amd64/tai/builds/tai.service
@@ -0,0 +1,13 @@
+[Unit]
+Description=TAI shell service
+
+[Service]
+Type=oneshot
+ExecStartPre=/bin/sh -c 'while [ true ]; do ( kubectl get nodes | grep " Ready" ) && exit 0; sleep 1; done'
+ExecStart=/usr/bin/tai.sh start
+ExecStop=-/usr/bin/tai.sh stop
+RemainAfterExit=true
+StandardOutput=journal
+
+[Install]
+WantedBy=multi-user.target
diff --git a/packages/base/amd64/tai/builds/tai.sh b/packages/base/amd64/tai/builds/tai.sh
new file mode 100755
index 0000000..9b8d641
--- /dev/null
+++ b/packages/base/amd64/tai/builds/tai.sh
@@ -0,0 +1,25 @@
+#!/bin/bash
+
+set -eux
+
+start() {
+ kubectl apply -f /var/lib/tai/k8s
+ kubectl wait --for=condition=ready pod/$(kubectl get pod -l app=tai -o jsonpath='{.items[0].metadata.name}')
+}
+
+
+stop() {
+ pod=$(kubectl get pod -l app=tai -o jsonpath='{.items[0].metadata.name}' 2>/dev/null || echo 'dummy' )
+ kubectl delete --ignore-not-found -f /var/lib/tai/k8s
+ kubectl delete --ignore-not-found pods/$pod
+}
+
+case "$1" in
+ start|stop)
+ $1
+ ;;
+ *)
+ echo "Usage: $0 {start|stop}"
+ exit 1
+ ;;
+esac
diff --git a/packages/base/amd64/usonic/PKG.yml b/packages/base/amd64/usonic/PKG.yml
index 9880122..0017de6 100644
--- a/packages/base/amd64/usonic/PKG.yml
+++ b/packages/base/amd64/usonic/PKG.yml
@@ -1,19 +1,18 @@
packages:
- - name: x1-usonic
+ - name: gs-usonic
arch: amd64
version: 1.0.0
- copyright: Copyright 2020 Wataru Ishida
- maintainer: wataru.ishid@gmail.com
- changelog: Initial
- support: wataru.ishid@gmail.com
+ maintainer: goldstone-nos@googlegroups.com
summary: usonic
after-install: $__DIR__/after-install.sh
- after-remove: $__DIR__/after-remove.sh
before-remove: $__DIR__/before-remove.sh
depends:
- k3s
+ - jq
files:
builds/usonic-amd64.tar: /var/lib/rancher/k3s/agent/images/
- builds/manifests: /var/lib/rancher/k3s/server/manifests/usonic
- builds/load-usonic-config.service: /etc/systemd/system/
- builds/load_usonic_config.sh: /usr/bin/
+ builds/manifests: /var/lib/usonic/k8s
+ builds/usonic.service: /etc/systemd/system/
+ builds/usonic.sh: /usr/bin/
+ builds/bcm.sh: /etc/profile.d/
+ builds/libsai.so: /var/lib/usonic/lib/
diff --git a/packages/base/amd64/usonic/after-install.sh b/packages/base/amd64/usonic/after-install.sh
index 5387b12..6754ff3 100644
--- a/packages/base/amd64/usonic/after-install.sh
+++ b/packages/base/amd64/usonic/after-install.sh
@@ -2,6 +2,4 @@
set -eux
-systemctl enable load-usonic-config.service
-
-mkdir -p /var/lib/usonic/redis
+systemctl enable usonic.service
diff --git a/packages/base/amd64/usonic/before-remove.sh b/packages/base/amd64/usonic/before-remove.sh
index 9bec794..82b02b3 100644
--- a/packages/base/amd64/usonic/before-remove.sh
+++ b/packages/base/amd64/usonic/before-remove.sh
@@ -2,5 +2,5 @@
set -eux
-systemctl disable load-usonic-config.service
-kubectl delete -f /var/lib/rancher/k3s/server/manifests/usonic/ || true
+systemctl disable usonic.service
+usonic.sh stop || true
diff --git a/packages/base/amd64/usonic/builds/Makefile b/packages/base/amd64/usonic/builds/Makefile
index 81d4a6f..528d828 100644
--- a/packages/base/amd64/usonic/builds/Makefile
+++ b/packages/base/amd64/usonic/builds/Makefile
@@ -1,6 +1,21 @@
-USONIC_IMAGE_REPO=docker.io/microsonic
-USONIC_IMAGES=usonic-debug:201904 usonic-cli:latest
+USONIC_IMAGES ?= docker.io/nlpldev/usonic-cli:latest ghcr.io/microsonic/usonic-debug:201904 docker.io/bitnami/kubectl:latest
+BCMD_IMAGE ?= bcmd:latest
-usonic-amd64.tar: Makefile
- $(foreach image,$(USONIC_IMAGES), docker pull $(USONIC_IMAGE_REPO)/$(image);)
- docker save $(foreach image,$(USONIC_IMAGES), $(USONIC_IMAGE_REPO)/$(image)) > $@
+SAI_VERSION := 20220524
+
+.PHONY: bcmd
+
+all: usonic-amd64.tar libsai.so
+
+usonic-amd64.tar: Makefile bcmd
+ for image in $(USONIC_IMAGES);\
+ do \
+ docker pull $$image; \
+ done
+ docker save $(USONIC_IMAGES) $(BCMD_IMAGE) > $@
+
+libsai.so:
+ oras pull ghcr.io/oopt-goldstone/libsai:$(SAI_VERSION)
+
+bcmd:
+ cd bcmd && DOCKER_BUILDKIT=1 docker build --progress plain -t $(BCMD_IMAGE) .
diff --git a/packages/base/amd64/usonic/builds/bcm.sh b/packages/base/amd64/usonic/builds/bcm.sh
new file mode 100644
index 0000000..15c159e
--- /dev/null
+++ b/packages/base/amd64/usonic/builds/bcm.sh
@@ -0,0 +1 @@
+alias bcmsh='k exec -it deploy/usonic-core -c syncd -- socat unix-connect:/run/sswsyncd/sswsyncd.socket -'
diff --git a/packages/base/amd64/usonic/builds/bcmd/Dockerfile b/packages/base/amd64/usonic/builds/bcmd/Dockerfile
new file mode 100644
index 0000000..0c4c1ae
--- /dev/null
+++ b/packages/base/amd64/usonic/builds/bcmd/Dockerfile
@@ -0,0 +1,13 @@
+# syntax=docker/dockerfile:1.3
+
+FROM python:3-slim AS builder
+
+RUN pip install --upgrade pip
+RUN pip install wheel grpcio-tools grpclib
+RUN --mount=type=bind,target=/src,rw cd /src && python -m grpc_tools.protoc -Iproto --python_out=. --python_grpc_out=. ./proto/bcmd/bcmd.proto && mkdir /dist && pip wheel . -w /dist && find /dist
+
+FROM python:3-slim
+
+ADD https://sonicstorage.blob.core.windows.net/packages/20190307/bcmcmd?sv=2015-04-05&sr=b&sig=sUdbU7oVbh5exbXXHVL5TDFBTWDDBASHeJ8Cp0B0TIc%3D&se=2038-05-06T22%3A34%3A19Z&sp=r /usr/bin/bcmcmd
+RUN chmod +x /usr/bin/bcmcmd
+RUN --mount=type=bind,from=builder,source=/dist,target=/dist pip install /dist/*.whl
diff --git a/packages/base/amd64/usonic/builds/bcmd/bcmd/.gitignore b/packages/base/amd64/usonic/builds/bcmd/bcmd/.gitignore
new file mode 100644
index 0000000..9ed4147
--- /dev/null
+++ b/packages/base/amd64/usonic/builds/bcmd/bcmd/.gitignore
@@ -0,0 +1,3 @@
+bcmd_grpc.py
+bcmd_pb2.py
+__pycache__
diff --git a/packages/base/amd64/usonic/builds/bcmd/bcmd/__init__.py b/packages/base/amd64/usonic/builds/bcmd/bcmd/__init__.py
new file mode 100644
index 0000000..e69de29
diff --git a/packages/base/amd64/usonic/builds/bcmd/bcmd/client.py b/packages/base/amd64/usonic/builds/bcmd/bcmd/client.py
new file mode 100644
index 0000000..6cf6fa8
--- /dev/null
+++ b/packages/base/amd64/usonic/builds/bcmd/bcmd/client.py
@@ -0,0 +1,25 @@
+import asyncio
+import argparse
+
+from grpclib.client import Channel
+
+from bcmd import bcmd_pb2
+from bcmd import bcmd_grpc
+
+def main():
+ parser = argparse.ArgumentParser()
+ parser.add_argument("command", nargs="*")
+
+ args = parser.parse_args()
+
+ async def _main():
+ async with Channel('127.0.0.1', 50051) as ch:
+ bcm = bcmd_grpc.BCMDStub(ch)
+ reply = await bcm.Exec(bcmd_pb2.ExecRequest(command=" ".join(args.command)))
+ print(reply.response)
+
+ asyncio.run(_main())
+
+
+if __name__ == "__main__":
+ main()
diff --git a/packages/base/amd64/usonic/builds/bcmd/bcmd/server.py b/packages/base/amd64/usonic/builds/bcmd/bcmd/server.py
new file mode 100644
index 0000000..4a5110c
--- /dev/null
+++ b/packages/base/amd64/usonic/builds/bcmd/bcmd/server.py
@@ -0,0 +1,107 @@
+import logging
+import subprocess
+import argparse
+from parse import *
+from bcmd import bcmd_pb2
+from bcmd import bcmd_grpc
+import asyncio
+
+from grpclib.utils import graceful_exit
+from grpclib.server import Server
+
+logger = logging.getLogger(__name__)
+
+
+def bcmcmd(cmds):
+ logger.debug(f"cmds: {cmds}")
+ output = subprocess.run(["bcmcmd", cmds], capture_output=True)
+ output = "\n".join(line for line in output.stdout.decode().split("\r\n"))
+ logger.debug(f"output: {output}")
+ return output
+
+
+class BCMd(bcmd_grpc.BCMDBase):
+ async def Exec(self, stream):
+ request = await stream.recv_message()
+ response = bcmcmd(request.command)
+ await stream.send_message(bcmd_pb2.ExecResponse(response=response))
+
+
+def get_temp():
+ output = bcmcmd("show temp")
+ data = []
+ for line in output.split("\n"):
+ result = parse("temperature monitor {:d}: current= {:f}, peak= {:f}", line)
+ if result:
+ data.append((result[1], result[2]))
+
+ return data
+
+
+async def temp_loop(output_dir, interval):
+ while True:
+ d = get_temp()
+ for i, v in enumerate(d):
+ with open(f"{output_dir}/temp{i+1}_current", "w") as f:
+ f.write(f"{int(v[0] * 1000)}\n")
+
+ with open(f"{output_dir}/temp{i+1}_peak", "w") as f:
+ f.write(f"{int(v[1] * 1000)}\n")
+
+ with open(f"{output_dir}/temp_avg", "w") as f:
+ v = sum(v[0] * 1000 for v in d) // len(d)
+ f.write(f"{int(v)}\n")
+
+ with open(f"{output_dir}/temp_max_peak", "w") as f:
+ v = max(v[1] * 1000 for v in d)
+ f.write(f"{int(v)}\n")
+
+ await asyncio.sleep(interval)
+
+
+def main():
+ parser = argparse.ArgumentParser()
+ parser.add_argument("--init-soc")
+ parser.add_argument("--temp-capture-interval", default=10)
+ parser.add_argument("--temp-output-dir", default="/run/bcm")
+ parser.add_argument("-v", "--verbose", action="store_true")
+
+ args = parser.parse_args()
+ output_dir = args.temp_output_dir
+ interval = args.temp_capture_interval
+
+ fmt = "%(levelname)s %(module)s %(funcName)s l.%(lineno)d | %(message)s"
+ if args.verbose:
+ logging.basicConfig(level=logging.DEBUG, format=fmt)
+ for noisy in ["parse", "hpack"]:
+ l = logging.getLogger(noisy)
+ l.setLevel(logging.INFO)
+
+ else:
+ logging.basicConfig(level=logging.INFO, format=fmt)
+
+ if args.init_soc:
+ print(bcmcmd(args.init_soc))
+
+ async def _main():
+ server = Server([BCMd()])
+ with graceful_exit([server]):
+ await server.start("0.0.0.0", "50051")
+ tasks = [
+ asyncio.create_task(server.wait_closed()),
+ asyncio.create_task(temp_loop(output_dir, interval)),
+ ]
+ done, pending = await asyncio.wait(
+ tasks, return_when=asyncio.FIRST_COMPLETED
+ )
+ logger.debug(f"done: {done}, pending: {pending}")
+ for task in done:
+ e = task.exception()
+ if e:
+ raise e
+
+ asyncio.run(_main())
+
+
+if __name__ == "__main__":
+ main()
diff --git a/packages/base/amd64/usonic/builds/bcmd/proto/bcmd/bcmd.proto b/packages/base/amd64/usonic/builds/bcmd/proto/bcmd/bcmd.proto
new file mode 100644
index 0000000..4a16ed0
--- /dev/null
+++ b/packages/base/amd64/usonic/builds/bcmd/proto/bcmd/bcmd.proto
@@ -0,0 +1,15 @@
+syntax = "proto3";
+
+package bcmd;
+
+service BCMD {
+ rpc Exec(ExecRequest) returns (ExecResponse);
+}
+
+message ExecRequest {
+ string command = 1;
+}
+
+message ExecResponse {
+ string response = 1;
+}
diff --git a/packages/base/amd64/usonic/builds/bcmd/requirements.txt b/packages/base/amd64/usonic/builds/bcmd/requirements.txt
new file mode 100644
index 0000000..7fdc90b
--- /dev/null
+++ b/packages/base/amd64/usonic/builds/bcmd/requirements.txt
@@ -0,0 +1,3 @@
+parse
+grpclib
+protobuf
diff --git a/packages/base/amd64/usonic/builds/bcmd/setup.py b/packages/base/amd64/usonic/builds/bcmd/setup.py
new file mode 100644
index 0000000..b72fce6
--- /dev/null
+++ b/packages/base/amd64/usonic/builds/bcmd/setup.py
@@ -0,0 +1,18 @@
+import setuptools
+
+with open("requirements.txt", "r") as f:
+ install_requires = f.read().split()
+
+setuptools.setup(
+ name="bcmd",
+ version="0.1.0",
+ install_requires=install_requires,
+ entry_points={
+ "console_scripts": [
+ "bcmd = bcmd.server:main",
+ "bcmsh = bcmd.client:main",
+ ],
+ },
+ packages=["bcmd"],
+ zip_safe=False,
+)
diff --git a/packages/base/amd64/usonic/builds/manifests/cli.yaml b/packages/base/amd64/usonic/builds/manifests/cli.yaml
index 994dc1b..5b5c10f 100644
--- a/packages/base/amd64/usonic/builds/manifests/cli.yaml
+++ b/packages/base/amd64/usonic/builds/manifests/cli.yaml
@@ -5,7 +5,7 @@ metadata:
spec:
containers:
- name: cli
- image: docker.io/microsonic/usonic-cli:latest
+ image: docker.io/nlpldev/usonic-cli:latest
imagePullPolicy: IfNotPresent
command: ['sh', '-c', 'sleep 100000']
volumeMounts:
@@ -21,7 +21,11 @@ spec:
name: sonic-db-config
- name: sonic-version
configMap:
- name: sonic-version
+ name: usonic-config
+ items:
+ - key: sonic_version.yml
+ path: sonic_version.yml
- name: usonic-config
configMap:
name: usonic-config
+ terminationGracePeriodSeconds: 0
diff --git a/packages/base/amd64/usonic/builds/manifests/redis.yaml b/packages/base/amd64/usonic/builds/manifests/redis.yaml
index 0c99466..90b5f54 100644
--- a/packages/base/amd64/usonic/builds/manifests/redis.yaml
+++ b/packages/base/amd64/usonic/builds/manifests/redis.yaml
@@ -7,7 +7,7 @@ metadata:
spec:
containers:
- name: redis
- image: docker.io/microsonic/usonic-debug:201904
+ image: ghcr.io/microsonic/usonic-debug:201904
imagePullPolicy: IfNotPresent
command: ["redis-server", "/etc/redis/redis.conf"]
volumeMounts:
diff --git a/packages/base/amd64/usonic/builds/manifests/sonic-version.yaml b/packages/base/amd64/usonic/builds/manifests/sonic-version.yaml
index e3a837f..d79eb1d 100644
--- a/packages/base/amd64/usonic/builds/manifests/sonic-version.yaml
+++ b/packages/base/amd64/usonic/builds/manifests/sonic-version.yaml
@@ -6,7 +6,7 @@ data:
commit_id: '443ccce'
build_date: Fri Sep 27 23:52:52 UTC 2019
build_number: 0
- built_by: wataru@x1builder
+ built_by: goldstone-nos@googlegroups.com
debian_version: 8.11
kernel_version: 4.9.0-9-2-amd64
kind: ConfigMap
diff --git a/packages/base/amd64/usonic/builds/manifests/start-script.yaml b/packages/base/amd64/usonic/builds/manifests/start-script.yaml
index 56f5fec..c87407c 100644
--- a/packages/base/amd64/usonic/builds/manifests/start-script.yaml
+++ b/packages/base/amd64/usonic/builds/manifests/start-script.yaml
@@ -3,19 +3,12 @@ kind: ConfigMap
metadata:
name: start-script
data:
- prepvs.sh: |
- #!/bin/sh
- for index in $(seq 2);
- do
- ip link add vEthernet$index type veth peer name veth$index
- ip link set up dev vEthernet$index
- ip link set up dev veth$index
- done
start.sh: |
#!/bin/sh
set -eux
REDIS_HOST='-h redis.default.svc.cluster.local'
+ # REDIS_HOST='-h 127.0.0.1'
redis-cli ${REDIS_HOST} flushall
@@ -23,5 +16,3 @@ data:
do
redis-cli -n 3 ${REDIS_HOST} hset $daemon LOGOUTPUT STDERR;
done
-
- $(dirname $0)/prepvs.sh
diff --git a/packages/base/amd64/usonic/builds/manifests/usonic.yaml b/packages/base/amd64/usonic/builds/manifests/usonic.yaml
index b51b106..2bfdfc8 100644
--- a/packages/base/amd64/usonic/builds/manifests/usonic.yaml
+++ b/packages/base/amd64/usonic/builds/manifests/usonic.yaml
@@ -1,22 +1,52 @@
+apiVersion: v1
+kind: ServiceAccount
+metadata:
+ name: usonic
+ namespace: default
+
+
+---
+
+apiVersion: rbac.authorization.k8s.io/v1
+kind: ClusterRoleBinding
+metadata:
+ name: usonic
+roleRef:
+ apiGroup: rbac.authorization.k8s.io
+ kind: ClusterRole
+ name: view
+subjects:
+- kind: ServiceAccount
+ name: usonic
+ namespace: default
+
+---
+
apiVersion: apps/v1
kind: Deployment
metadata:
- name: usonic
+ name: usonic-core
+ labels:
+ app: usonic
spec:
replicas: 1
selector:
matchLabels:
app: usonic
+ usonic: core
strategy:
type: Recreate
template:
metadata:
labels:
app: usonic
+ usonic: core
spec:
+ hostNetwork: true
+ dnsPolicy: ClusterFirstWithHostNet
initContainers:
- name: init-loglevel
- image: docker.io/microsonic/usonic-debug:201904
+ image: ghcr.io/microsonic/usonic-debug:201904
imagePullPolicy: IfNotPresent
command: ['/var/run/start/start.sh']
volumeMounts:
@@ -26,7 +56,7 @@ spec:
capabilities:
add: ["NET_ADMIN"]
- name: init-configdb
- image: docker.io/microsonic/usonic-cli:latest
+ image: docker.io/nlpldev/usonic-cli:latest
imagePullPolicy: IfNotPresent
command: ['sonic-cfggen', '-k', 'dummy', '-p', '/etc/usonic/port_config.ini', '-j', '/etc/sonic/config_db.json', '--write-to-db']
volumeMounts:
@@ -37,17 +67,17 @@ spec:
- name: usonic-config
mountPath: /etc/usonic/
- name: complete-init
- image: docker.io/microsonic/usonic-debug:201904
+ image: ghcr.io/microsonic/usonic-debug:201904
imagePullPolicy: IfNotPresent
command: ['redis-cli', '-h', 'redis.default.svc.cluster.local', '-n', '4', 'SET', 'CONFIG_DB_INITIALIZED', '1']
containers:
- name: syncd
- image: docker.io/microsonic/usonic-debug:201904
+ image: ghcr.io/microsonic/usonic-debug:201904
imagePullPolicy: IfNotPresent
command: ['sh', '-c', 'service syslog-ng start && dsserve /usr/bin/syncd -p /etc/sonic/sai.profile -d']
env:
- name: LD_LIBRARY_PATH
- value: "/var/lib/current:/var/lib/usonic"
+ value: "/var/lib/current:/var/lib/usonic/lib"
volumeMounts:
- name: usonic-config
mountPath: /etc/sonic/
@@ -62,7 +92,7 @@ spec:
- name: bcmsh-sock
mountPath: /var/run/sswsyncd
- name: host-libsai
- mountPath: /var/lib/usonic
+ mountPath: /var/lib/usonic/lib
- name: current
mountPath: /var/lib/current
securityContext:
@@ -70,58 +100,29 @@ spec:
capabilities:
add: ["NET_ADMIN"]
- name: orchagent
- image: docker.io/microsonic/usonic-debug:201904
+ image: ghcr.io/microsonic/usonic-debug:201904
imagePullPolicy: IfNotPresent
- command: ['sh', '-c', 'sleep 5 && gdb -ex "run" -ex "bt" --args orchagent -m $GLOBAL_MAC_ADDRESS']
+ command: ['orchagent']
+ args: ['-m', '$(GLOBAL_MAC_ADDRESS)']
env:
- name: GLOBAL_MAC_ADDRESS
- value: "72:16:EA:18:79:F9"
+ valueFrom:
+ configMapKeyRef:
+ name: usonic-config
+ key: macaddress
volumeMounts:
- name: redis-sock
mountPath: /var/run/redis/redis.sock
- name: sonic-db-config
mountPath: /var/run/redis/sonic-db/
- - name: portsyncd
- image: docker.io/microsonic/usonic-debug:201904
- imagePullPolicy: IfNotPresent
- command: ['sh', '-c', 'sleep 8 && gdb -ex "run" -ex "bt" portsyncd']
- volumeMounts:
- - name: redis-sock
- mountPath: /var/run/redis/redis.sock
- - name: sonic-db-config
- mountPath: /var/run/redis/sonic-db/
- - name: neighsyncd
- image: docker.io/microsonic/usonic-debug:201904
- imagePullPolicy: IfNotPresent
- command: ['sh', '-c', 'sleep 8 && gdb -ex "run" -ex "bt" neighsyncd']
- volumeMounts:
- - name: redis-sock
- mountPath: /var/run/redis/redis.sock
- - name: sonic-db-config
- mountPath: /var/run/redis/sonic-db/
- - name: vlanmgrd
- image: docker.io/microsonic/usonic-debug:201904
- imagePullPolicy: IfNotPresent
- command: ['sh', '-c', 'mount -o remount,rw /sys && sleep 8 && gdb -ex "run" -ex "bt" vlanmgrd']
- volumeMounts:
- - name: redis-sock
- mountPath: /var/run/redis/redis.sock
- - name: sonic-db-config
- mountPath: /var/run/redis/sonic-db/
- securityContext:
- privileged: true
- - name: intfmgrd
- image: docker.io/microsonic/usonic-debug:201904
- imagePullPolicy: IfNotPresent
- command: ['sh', '-c', 'sleep 8 && gdb -ex "run" -ex "bt" intfmgrd']
- volumeMounts:
- - name: redis-sock
- mountPath: /var/run/redis/redis.sock
- - name: sonic-db-config
- mountPath: /var/run/redis/sonic-db/
- securityContext:
- capabilities:
- add: ["NET_ADMIN"]
+ startupProbe:
+ exec:
+ command:
+ - grep
+ - SAI_SWITCH_ATTR_NUMBER_OF_ACTIVE_PORTS
+ - sairedis.rec
+ failureThreshold: 60 # 60 * 2 = 120sec for SAI initialization
+ periodSeconds: 2
volumes:
- name: redis-sock
hostPath:
@@ -141,19 +142,559 @@ spec:
- name: usonic-config
configMap:
name: usonic-config
+ - name: config-db-json
+ configMap:
+ name: usonic-config
+ items:
+ - key: config_db.json
+ path: config_db.json
- name: sonic-db-config
configMap:
name: sonic-db-config
- - name: config-db-json
- configMap:
- name: config-db-json
- name: warm-boot
emptyDir: {}
- name: bcmsh-sock
- emptyDir: {}
+ hostPath:
+ path: /var/run/sswsyncd/
- name: host-libsai
hostPath:
- path: /var/lib/usonic/
+ path: /var/lib/usonic/lib
- name: current
hostPath:
path: /var/lib/goldstone/device/current/usonic
+
+---
+apiVersion: v1
+kind: Service
+metadata:
+ name: bcmd
+spec:
+ selector:
+ app: usonic
+ usonic: bcm
+ ports:
+ - protocol: TCP
+ port: 50051
+
+---
+apiVersion: apps/v1
+kind: Deployment
+metadata:
+ name: usonic-bcm
+ labels:
+ app: usonic
+spec:
+ replicas: 1
+ selector:
+ matchLabels:
+ app: usonic
+ usonic: bcm
+ strategy:
+ type: Recreate
+ template:
+ metadata:
+ labels:
+ app: usonic
+ usonic: bcm
+ spec:
+ serviceAccountName: usonic
+ initContainers:
+ - name: wait-core
+ image: docker.io/bitnami/kubectl:latest
+ imagePullPolicy: IfNotPresent
+ command: ['kubectl', 'wait', '--for=condition=available', 'deploy/usonic-core', '--timeout=5m']
+ containers:
+ - name: bcmd
+ image: bcmd:latest
+ imagePullPolicy: IfNotPresent
+ env:
+ - name: LED_PROC_INIT_SOC
+ value: "/var/lib/current/led_proc_init.soc"
+ command: ['bcmd']
+ args: ['--init-soc', '$(LED_PROC_INIT_SOC)']
+ volumeMounts:
+ - name: bcmsh-sock
+ mountPath: /var/run/sswsyncd
+ - name: current
+ mountPath: /var/lib/current
+ - name: bcmrun
+ mountPath: /run/bcm
+ volumes:
+ - name: bcmsh-sock
+ hostPath:
+ path: /var/run/sswsyncd/
+ - name: current
+ hostPath:
+ path: /var/lib/goldstone/device/current/usonic
+ - name: bcmrun
+ hostPath:
+ path: /run/bcm
+
+
+---
+
+apiVersion: apps/v1
+kind: Deployment
+metadata:
+ name: usonic-port
+ labels:
+ app: usonic
+spec:
+ replicas: 1
+ selector:
+ matchLabels:
+ app: usonic
+ usonic: port
+ strategy:
+ type: Recreate
+ template:
+ metadata:
+ labels:
+ app: usonic
+ usonic: port
+ spec:
+ serviceAccountName: usonic
+ hostNetwork: true
+ dnsPolicy: ClusterFirstWithHostNet
+ initContainers:
+ - name: wait-core
+ image: docker.io/bitnami/kubectl:latest
+ imagePullPolicy: IfNotPresent
+ command: ['kubectl', 'wait', '--for=condition=available', 'deploy/usonic-bcm', '--timeout=5m']
+ containers:
+ - name: portsyncd
+ image: ghcr.io/microsonic/usonic-debug:201904
+ imagePullPolicy: IfNotPresent
+ command: ['portsyncd']
+ volumeMounts:
+ - name: redis-sock
+ mountPath: /var/run/redis/redis.sock
+ - name: sonic-db-config
+ mountPath: /var/run/redis/sonic-db/
+ securityContext:
+ capabilities:
+ add: ["NET_ADMIN"]
+ # TODO: need more research to use this. enabling startupProbe makes
+ # state change to 'ready' really slow.
+ #
+ # startupProbe:
+ # exec:
+ # command:
+ # - bash
+ # - -c
+ # - 'redis-cli exists PORT_TABLE:PortInitDone | grep 1'
+ # failureThreshold: 5 # 5sec for Port initialization
+ # periodSeconds: 1
+ livenessProbe:
+ exec:
+ command:
+ - bash
+ - -c
+ - 'redis-cli -h redis.default.svc.cluster.local exists PORT_TABLE:PortInitDone | grep 1'
+ failureThreshold: 1
+ periodSeconds: 10
+ # using this instead of startupProbe for now
+ initialDelaySeconds: 5
+ volumes:
+ - name: redis-sock
+ hostPath:
+ path: /var/lib/usonic/redis/redis.sock
+ type: Socket
+ - name: sonic-db-config
+ configMap:
+ name: sonic-db-config
+
+---
+
+apiVersion: apps/v1
+kind: Deployment
+metadata:
+ name: usonic-neighbor
+ labels:
+ app: usonic
+spec:
+ replicas: 1
+ selector:
+ matchLabels:
+ app: usonic
+ usonic: neighbor
+ strategy:
+ type: Recreate
+ template:
+ metadata:
+ labels:
+ app: usonic
+ usonic: neighbor
+ spec:
+ serviceAccountName: usonic
+ hostNetwork: true
+ dnsPolicy: ClusterFirstWithHostNet
+ initContainers:
+ - name: wait-core
+ image: docker.io/bitnami/kubectl:latest
+ imagePullPolicy: IfNotPresent
+ command: ['kubectl', 'wait', '--for=condition=available', 'deploy/usonic-port', '--timeout=5m']
+ containers:
+ - name: neighsyncd
+ image: ghcr.io/microsonic/usonic-debug:201904
+ imagePullPolicy: IfNotPresent
+ command: ['neighsyncd']
+ volumeMounts:
+ - name: redis-sock
+ mountPath: /var/run/redis/redis.sock
+ - name: sonic-db-config
+ mountPath: /var/run/redis/sonic-db/
+ securityContext:
+ capabilities:
+ add: ["NET_ADMIN"]
+ volumes:
+ - name: redis-sock
+ hostPath:
+ path: /var/lib/usonic/redis/redis.sock
+ type: Socket
+ - name: sonic-db-config
+ configMap:
+ name: sonic-db-config
+
+---
+
+apiVersion: apps/v1
+kind: Deployment
+metadata:
+ name: usonic-frr
+ labels:
+ app: usonic
+spec:
+ replicas: 1
+ selector:
+ matchLabels:
+ app: usonic
+ usonic: frr
+ strategy:
+ type: Recreate
+ template:
+ metadata:
+ labels:
+ app: usonic
+ usonic: frr
+ spec:
+ hostNetwork: true
+ serviceAccountName: usonic
+ dnsPolicy: ClusterFirstWithHostNet
+ initContainers:
+ - name: wait-core
+ image: docker.io/bitnami/kubectl:latest
+ imagePullPolicy: IfNotPresent
+ command: ['kubectl', 'wait', '--for=condition=available', 'deploy/usonic-core', '--timeout=5m']
+ containers:
+ - name: fpmsyncd
+ image: ghcr.io/microsonic/usonic-debug:201904
+ imagePullPolicy: IfNotPresent
+ command: ['fpmsyncd']
+ volumeMounts:
+ - name: redis-sock
+ mountPath: /var/run/redis/redis.sock
+ - name: frr
+ mountPath: /var/run/frr/
+ - name: sonic-db-config
+ mountPath: /var/run/redis/sonic-db/
+ securityContext:
+ privileged: true
+ capabilities:
+ add: ["NET_ADMIN"]
+ - name: zebra
+ image: ghcr.io/microsonic/usonic-debug:201904
+ imagePullPolicy: IfNotPresent
+ command: ['/usr/lib/frr/zebra', '-A', '127.0.0.1', '-s', '90000000', '-M', 'fpm']
+ volumeMounts:
+ - name: frr
+ mountPath: /var/run/frr/
+ securityContext:
+ privileged: true
+ capabilities:
+ add: ["NET_ADMIN"]
+ - name: staticd
+ image: ghcr.io/microsonic/usonic-debug:201904
+ imagePullPolicy: IfNotPresent
+ command: ['/usr/lib/frr/staticd', '-A', '127.0.0.1']
+ volumeMounts:
+ - name: frr
+ mountPath: /var/run/frr/
+ securityContext:
+ privileged: true
+ capabilities:
+ add: ["NET_ADMIN"]
+ - name: bgpd
+ image: ghcr.io/microsonic/usonic-debug:201904
+ imagePullPolicy: IfNotPresent
+ command: ['/usr/lib/frr/bgpd', '-A', '127.0.0.1']
+ volumeMounts:
+ - name: frr
+ mountPath: /var/run/frr/
+ securityContext:
+ privileged: true
+ capabilities:
+ add: ["NET_ADMIN"]
+ volumes:
+ - name: redis-sock
+ hostPath:
+ path: /var/lib/usonic/redis/redis.sock
+ type: Socket
+ - name: frr
+ emptyDir: {}
+ - name: sonic-db-config
+ configMap:
+ name: sonic-db-config
+---
+
+apiVersion: apps/v1
+kind: Deployment
+metadata:
+ name: usonic-teamd
+ labels:
+ app: usonic
+spec:
+ replicas: 1
+ selector:
+ matchLabels:
+ app: usonic
+ usonic: teamd
+ strategy:
+ type: Recreate
+ template:
+ metadata:
+ labels:
+ app: usonic
+ usonic: teamd
+ spec:
+ hostNetwork: true
+ serviceAccountName: usonic
+ dnsPolicy: ClusterFirstWithHostNet
+ initContainers:
+ - name: wait-core
+ image: docker.io/bitnami/kubectl:latest
+ imagePullPolicy: IfNotPresent
+ command: ['kubectl', 'wait', '--for=condition=available', 'deploy/usonic-port', '--timeout=5m']
+ containers:
+ - name: teamsyncd
+ image: ghcr.io/microsonic/usonic-debug:201904
+ imagePullPolicy: IfNotPresent
+ command: ['teamsyncd']
+ volumeMounts:
+ - name: redis-sock
+ mountPath: /var/run/redis/redis.sock
+ - name: teamd
+ mountPath: /var/run/teamd/
+ - name: sonic-db-config
+ mountPath: /var/run/redis/sonic-db/
+ securityContext:
+ privileged: true
+ capabilities:
+ add: ["NET_ADMIN"]
+ - name: teammgrd
+ image: ghcr.io/microsonic/usonic-debug:201904
+ imagePullPolicy: IfNotPresent
+ command: ['teammgrd']
+ volumeMounts:
+ - name: redis-sock
+ mountPath: /var/run/redis/redis.sock
+ - name: teamd
+ mountPath: /var/run/teamd/
+ - name: sonic-db-config
+ mountPath: /var/run/redis/sonic-db/
+ securityContext:
+ privileged: true
+ capabilities:
+ add: ["NET_ADMIN"]
+ volumes:
+ - name: redis-sock
+ hostPath:
+ path: /var/lib/usonic/redis/redis.sock
+ type: Socket
+ - name: teamd
+ emptyDir: {}
+ - name: sonic-db-config
+ configMap:
+ name: sonic-db-config
+---
+
+apiVersion: apps/v1
+kind: Deployment
+metadata:
+ name: usonic-lldpd
+ labels:
+ app: usonic
+spec:
+ replicas: 1
+ selector:
+ matchLabels:
+ app: usonic
+ usonic: lldpd
+ strategy:
+ type: Recreate
+ template:
+ metadata:
+ labels:
+ app: usonic
+ usonic: lldpd
+ spec:
+ hostNetwork: true
+ serviceAccountName: usonic
+ dnsPolicy: ClusterFirstWithHostNet
+ initContainers:
+ - name: wait-core
+ image: docker.io/bitnami/kubectl:latest
+ imagePullPolicy: IfNotPresent
+ command: ['kubectl', 'wait', '--for=condition=available', 'deploy/usonic-core', '--timeout=5m']
+ containers:
+ - name: lldpd
+ image: ghcr.io/microsonic/usonic-debug:201904
+ imagePullPolicy: IfNotPresent
+ command: ['/usr/sbin/lldpd', '-d', '-I', 'Ethernet*,eth0', '-C', 'eth0']
+ volumeMounts:
+ - name: redis-sock
+ mountPath: /var/run/redis/redis.sock
+ - name: lldpd
+ mountPath: /var/run/
+ - name: sonic-db-config
+ mountPath: /var/run/redis/sonic-db/
+ securityContext:
+ privileged: true
+ capabilities:
+ add: ["NET_ADMIN"]
+ # - name: lldpsyncd
+ # image: ghcr.io/microsonic/usonic-debug:201904
+ # imagePullPolicy: IfNotPresent
+ # command: ['/usr/bin/env', 'python2', '-m', 'lldp_syncd']
+ # volumeMounts:
+ # - name: redis-sock
+ # mountPath: /var/run/redis/redis.sock
+ # - name: lldpd
+ # mountPath: /var/run/
+ # - name: sonic-db-config
+ # mountPath: /var/run/redis/sonic-db/
+ # securityContext:
+ # privileged: true
+ # capabilities:
+ # add: ["NET_ADMIN"]
+ # - name: lldpmgrd
+ # image: ghcr.io/microsonic/usonic-debug:201904
+ # imagePullPolicy: IfNotPresent
+ # command: ['/usr/bin/lldpmgrd']
+ # volumeMounts:
+ # - name: redis-sock
+ # mountPath: /var/run/redis/redis.sock
+ # - name: lldpd
+ # mountPath: /var/run/
+ # - name: sonic-db-config
+ # mountPath: /var/run/redis/sonic-db/
+ # securityContext:
+ # privileged: true
+ # capabilities:
+ # add: ["NET_ADMIN"]
+ volumes:
+ - name: redis-sock
+ hostPath:
+ path: /var/lib/usonic/redis/redis.sock
+ type: Socket
+ - name: lldpd
+ emptyDir: {}
+ - name: sonic-db-config
+ configMap:
+ name: sonic-db-config
+
+
+---
+
+apiVersion: apps/v1
+kind: Deployment
+metadata:
+ name: usonic-mgrd
+ labels:
+ app: usonic
+spec:
+ replicas: 1
+ selector:
+ matchLabels:
+ app: usonic
+ usonic: mgrd
+ strategy:
+ type: Recreate
+ template:
+ metadata:
+ labels:
+ app: usonic
+ usonic: mgrd
+ spec:
+ serviceAccountName: usonic
+ hostNetwork: true
+ dnsPolicy: ClusterFirstWithHostNet
+ initContainers:
+ - name: wait-core
+ image: docker.io/bitnami/kubectl:latest
+ imagePullPolicy: IfNotPresent
+ command: ['kubectl', 'wait', '--for=condition=available', 'deploy/usonic-port', '--timeout=5m']
+ - name: swssconfig
+ image: ghcr.io/microsonic/usonic-debug:201904
+ imagePullPolicy: IfNotPresent
+ command: ['swssconfig']
+ volumeMounts:
+ - name: redis-sock
+ mountPath: /var/run/redis/redis.sock
+ containers:
+ - name: vlanmgrd
+ image: ghcr.io/microsonic/usonic-debug:201904
+ imagePullPolicy: IfNotPresent
+ command: ['sh', '-c', 'mount -o remount,rw /sys && vlanmgrd']
+ volumeMounts:
+ - name: redis-sock
+ mountPath: /var/run/redis/redis.sock
+ - name: sonic-db-config
+ mountPath: /var/run/redis/sonic-db/
+ securityContext:
+ privileged: true
+ - name: intfmgrd
+ image: ghcr.io/microsonic/usonic-debug:201904
+ imagePullPolicy: IfNotPresent
+ command: ['intfmgrd']
+ volumeMounts:
+ - name: redis-sock
+ mountPath: /var/run/redis/redis.sock
+ - name: sonic-db-config
+ mountPath: /var/run/redis/sonic-db/
+ securityContext:
+ capabilities:
+ add: ["NET_ADMIN"]
+ - name: portmgrd
+ image: ghcr.io/microsonic/usonic-debug:201904
+ imagePullPolicy: IfNotPresent
+ command: ['portmgrd']
+ volumeMounts:
+ - name: redis-sock
+ mountPath: /var/run/redis/redis.sock
+ - name: sonic-db-config
+ mountPath: /var/run/redis/sonic-db/
+ securityContext:
+ capabilities:
+ add: ["NET_ADMIN"]
+ - name: nbrmgrd
+ image: ghcr.io/microsonic/usonic-debug:201904
+ imagePullPolicy: IfNotPresent
+ command: ['nbrmgrd']
+ volumeMounts:
+ - name: redis-sock
+ mountPath: /var/run/redis/redis.sock
+ - name: sonic-db-config
+ mountPath: /var/run/redis/sonic-db/
+ securityContext:
+ capabilities:
+ add: ["NET_ADMIN"]
+ volumes:
+ - name: redis-sock
+ hostPath:
+ path: /var/lib/usonic/redis/redis.sock
+ type: Socket
+ - name: sonic-db-config
+ configMap:
+ name: sonic-db-config
+
diff --git a/packages/base/amd64/usonic/builds/usonic.service b/packages/base/amd64/usonic/builds/usonic.service
new file mode 100644
index 0000000..035a1a4
--- /dev/null
+++ b/packages/base/amd64/usonic/builds/usonic.service
@@ -0,0 +1,13 @@
+[Unit]
+Description=uSONiC
+
+[Service]
+Type=oneshot
+ExecStartPre=/bin/sh -c 'while [ true ]; do ( kubectl get nodes | grep " Ready" ) && exit 0; sleep 1; done'
+ExecStart=/usr/bin/usonic.sh start
+ExecStop=-/usr/bin/usonic.sh stop
+RemainAfterExit=true
+StandardOutput=journal
+
+[Install]
+WantedBy=multi-user.target
diff --git a/packages/base/amd64/usonic/builds/usonic.sh b/packages/base/amd64/usonic/builds/usonic.sh
new file mode 100755
index 0000000..3da1e9d
--- /dev/null
+++ b/packages/base/amd64/usonic/builds/usonic.sh
@@ -0,0 +1,62 @@
+#!/bin/bash
+
+set -eux
+
+# For SONiC hostname should be "localhost", so its hardcoded below.
+# Seems some places of SONiC has been hardcoded with hostname as "localhost",
+# so vlanmgrd container fails to start when hostname is different.
+#
+# Even on official SONiC builds, system hostname and hostname in Redis are
+# different
+create_config_db() {
+ exec 3<<< $(jq -n "{DEVICE_METADATA: {localhost: {hwsku: \"$(cat /etc/goldstone/platform)\",\
+ mac: \"$(cat /sys/class/net/eth0/address)\",\
+ platform: \"$(cat /etc/goldstone/platform)\"}}}")
+}
+
+create_sonic_version() {
+ exec 4<<< "build_version: $(jq .version.PRODUCT_ID_VERSION /etc/goldstone/rootfs/manifest.json)
+asic_type: broadcom
+commit_id: $(jq .version.BUILD_SHORT_SHA1 /etc/goldstone/rootfs/manifest.json)
+build_date: $(jq .version.BUILD_TIMESTAMP /etc/goldstone/rootfs/manifest.json)
+build_number: 0
+built_by: '-'
+debian_version: $(jq '."os-release".VERSION' /etc/goldstone/rootfs/manifest.json)
+kernel_version: $(uname -r)
+"
+}
+
+
+start() {
+ mkdir -p /var/lib/usonic/redis
+ create_config_db
+ create_sonic_version
+ kubectl create configmap usonic-config \
+ --from-file=config_db.json=/dev/fd/3 \
+ --from-file=sonic_version.yml=/dev/fd/4 \
+ --from-file="/var/lib/goldstone/device/current/usonic" \
+ --from-literal=macaddress="$(cat /sys/class/net/eth0/address)" \
+ --dry-run=client -o yaml | kubectl apply -f -
+ kubectl apply -f /var/lib/usonic/k8s
+ kubectl wait --for=condition=available deploy/usonic-core --timeout=5m
+ for pod in $(kubectl get pod -l app=usonic -o jsonpath='{.items[*].metadata.name}'); do
+ kubectl wait --for=condition=ready pod/$pod --timeout 5m
+ done
+}
+
+
+stop() {
+ kubectl delete -f /var/lib/usonic/k8s
+ kubectl delete configmap usonic-config
+ rm -rf /var/lib/usonic/redis
+}
+
+case "$1" in
+ start|stop)
+ $1
+ ;;
+ *)
+ echo "Usage: $0 {start|stop}"
+ exit 1
+ ;;
+esac
diff --git a/packages/base/amd64/xlate-oc/Makefile b/packages/base/amd64/xlate-oc/Makefile
new file mode 100644
index 0000000..dc1e7b8
--- /dev/null
+++ b/packages/base/amd64/xlate-oc/Makefile
@@ -0,0 +1 @@
+include $(ONL)/make/pkg.mk
diff --git a/packages/base/amd64/xlate-oc/PKG.yml b/packages/base/amd64/xlate-oc/PKG.yml
new file mode 100644
index 0000000..1abf452
--- /dev/null
+++ b/packages/base/amd64/xlate-oc/PKG.yml
@@ -0,0 +1 @@
+!include $X1/packages/base/any/xlate-oc/APKG.yml ARCH=amd64
diff --git a/packages/base/amd64/xlate-oc/builds/.gitignore b/packages/base/amd64/xlate-oc/builds/.gitignore
new file mode 100644
index 0000000..8e3b1b3
--- /dev/null
+++ b/packages/base/amd64/xlate-oc/builds/.gitignore
@@ -0,0 +1,2 @@
+*.tar
+manifests
diff --git a/packages/base/amd64/xlate-oc/builds/Makefile b/packages/base/amd64/xlate-oc/builds/Makefile
new file mode 100644
index 0000000..c71ad0f
--- /dev/null
+++ b/packages/base/amd64/xlate-oc/builds/Makefile
@@ -0,0 +1,2 @@
+include $(X1)/make/config.amd64.mk
+include $(X1)/packages/base/any/xlate-oc/builds/Makefile
diff --git a/packages/base/any/fit/loader/APKG.yml b/packages/base/any/fit/loader/APKG.yml
new file mode 100644
index 0000000..5db2047
--- /dev/null
+++ b/packages/base/any/fit/loader/APKG.yml
@@ -0,0 +1,22 @@
+prerequisites:
+ packages:
+ - x1-loader-initrd:$ARCH
+ stage: 3
+
+common:
+ arch: $ARCH
+ version: 1.0.0
+ copyright: Copyright 2013, 2014, 2015 Big Switch Networks
+ maintainer: support@bigswitch.com
+ support: opennetworklinux@googlegroups.com
+
+packages:
+ - name: x1-loader-fit
+ version: 1.0.0
+ summary: X1 FIT Loader Image for $ARCH
+
+ files:
+ builds/x1-loader-fit.itb : $$PKG_INSTALL/
+ builds/manifest.json : $$PKG_INSTALL/
+
+ changelog: Change changes changes.,
diff --git a/packages/base/any/fit/loader/builds/Makefile b/packages/base/any/fit/loader/builds/Makefile
new file mode 100644
index 0000000..c20281b
--- /dev/null
+++ b/packages/base/any/fit/loader/builds/Makefile
@@ -0,0 +1,14 @@
+ifndef ARCH
+$(error $$ARCH must be set)
+endif
+
+.PHONY: x1-loader-fit.itb x1-loader-fit.its
+
+x1-loader-fit.itb: its
+ $(ONL)/tools/flat-image-tree.py --initrd x1-loader-initrd:$(ARCH),x1-loader-initrd-$(ARCH).cpio.gz --arch $(ARCH) --add-platform initrd --itb $@
+ $(ONLPM) --copy-file x1-loader-initrd:$(ARCH) manifest.json .
+
+x1-loader-fit.its:
+ $(ONL)/tools/flat-image-tree.py --initrd x1-loader-initrd:$(ARCH),x1-loader-initrd-$(ARCH).cpio.gz --arch $(ARCH) --add-platform initrd --its $@
+
+its: x1-loader-fit.its
diff --git a/packages/base/any/k3s/APKG.yml b/packages/base/any/k3s/APKG.yml
index 2dc7ed7..20d0550 100644
--- a/packages/base/any/k3s/APKG.yml
+++ b/packages/base/any/k3s/APKG.yml
@@ -2,16 +2,14 @@ packages:
- name: k3s
arch: $ARCH
version: 1.0.0
- copyright: Copyright 2020 Wataru Ishida
- maintainer: wataru.ishid@gmail.com
- changelog: Initial
- support: wataru.ishid@gmail.com
+ maintainer: goldstone-nos@googlegroups.com
summary: k3s
after-install: $X1/packages/base/any/k3s/after-install.sh
build-depends:
- apt-transport-https
- ca-certificates
files:
- builds/k3s-airgap-images-$ARCH.tar: /var/lib/rancher/k3s/agent/images/
+ builds/k3s-airgap-images-$ARCH.tar.gz: /var/lib/rancher/k3s/agent/images/
builds/k3s: /usr/local/bin/
- builds/install.sh: /usr/share/k3s/
+ $X1/packages/base/any/k3s/builds/k3s-gs-killall.sh: /usr/local/bin/
+ $X1/packages/base/any/k3s/builds/prep-k3s.service: /etc/systemd/system/
diff --git a/packages/base/any/k3s/after-install.sh b/packages/base/any/k3s/after-install.sh
index 03c2722..20ef2af 100644
--- a/packages/base/any/k3s/after-install.sh
+++ b/packages/base/any/k3s/after-install.sh
@@ -661,6 +661,7 @@ ExecStartPre=-/sbin/modprobe overlay
ExecStartPost=/bin/sh -c 'while [ true ]; do ( kubectl get nodes | grep " Ready" ) && exit 0; sleep 1; done'
ExecStart=${BIN_DIR}/k3s \\
${CMD_K3S_EXEC}
+ --bind-address 127.0.0.1 --advertise-address 127.0.0.1 --node-ip 127.0.0.1 --flannel-iface lo --disable local-storage --disable metrics-server --disable traefik --disable-cloud-controller --kubelet-arg 'address=127.0.0.1'
EOF
}
@@ -725,6 +726,7 @@ get_installed_hashes() {
# --- enable and start systemd service ---
systemd_enable() {
info "systemd: Enabling ${SYSTEM_NAME} unit"
+ $SUDO systemctl enable prep-k3s.service >/dev/null
$SUDO systemctl enable ${FILE_K3S_SERVICE} >/dev/null
# $SUDO systemctl daemon-reload >/dev/null
}
diff --git a/packages/base/any/k3s/builds/Makefile b/packages/base/any/k3s/builds/Makefile
index 05aac45..6c9c52c 100644
--- a/packages/base/any/k3s/builds/Makefile
+++ b/packages/base/any/k3s/builds/Makefile
@@ -1,14 +1,7 @@
-K3S_VERSION = v1.18.3
-
-all: k3s-airgap-images-$(ARCH).tar k3s install.sh
-
-k3s-airgap-images-$(ARCH).tar:
- wget -O $@ https://github.com/rancher/k3s/releases/download/$(K3S_VERSION)%2Bk3s1/k3s-airgap-images-$(ARCH).tar
+all: k3s k3s-airgap-images-$(ARCH).tar.gz
k3s:
- wget -O $@ https://github.com/rancher/k3s/releases/download/$(K3S_VERSION)%2Bk3s1/k3s
- chmod +x $@
+ oras pull ghcr.io/oopt-goldstone/k3s:1.22.2@sha256:$(K3S_DIGEST)
+ tar xvf k3s.tar
-install.sh:
- wget -O $@ https://raw.githubusercontent.com/rancher/k3s/master/install.sh
- chmod +x $@
+k3s-airgap-images-$(ARCH).tar.gz: k3s
diff --git a/packages/base/any/k3s/builds/k3s-gs-killall.sh b/packages/base/any/k3s/builds/k3s-gs-killall.sh
new file mode 100755
index 0000000..3229902
--- /dev/null
+++ b/packages/base/any/k3s/builds/k3s-gs-killall.sh
@@ -0,0 +1,68 @@
+#!/bin/sh
+[ $(id -u) -eq 0 ] || exec sudo $0 $@
+
+for bin in /var/lib/rancher/k3s/data/**/bin/; do
+ [ -d $bin ] && export PATH=$PATH:$bin:$bin/aux
+done
+
+set -x
+
+pschildren() {
+ ps -e -o ppid= -o pid= | \
+ sed -e 's/^\s*//g; s/\s\s*/\t/g;' | \
+ grep -w "^$1" | \
+ cut -f2
+}
+
+pstree() {
+ for pid in $@; do
+ echo $pid
+ for child in $(pschildren $pid); do
+ pstree $child
+ done
+ done
+}
+
+killtree() {
+ kill -9 $(
+ { set +x; } 2>/dev/null;
+ pstree $@;
+ set -x;
+ ) 2>/dev/null
+}
+
+getshims() {
+ ps -e -o pid= -o args= | sed -e 's/^ *//; s/\s\s*/\t/;' | grep -w 'k3s/data/[^/]*/bin/containerd-shim' | cut -f1
+}
+
+killtree $({ set +x; } 2>/dev/null; getshims; set -x)
+
+do_unmount() {
+ { set +x; } 2>/dev/null
+ MOUNTS=
+ while read ignore mount ignore; do
+ MOUNTS="$mount\n$MOUNTS"
+ done /dev/null | grep 'master cni0' | while read ignore iface ignore; do
+ iface=${iface%%@*}
+ [ -z "$iface" ] || ip link delete $iface
+done
+ip link delete cni0
+ip link delete flannel.1
+rm -rf /var/lib/cni/
+iptables-save | grep -v KUBE- | grep -v CNI- | iptables-restore
diff --git a/packages/base/any/k3s/builds/prep-k3s.service b/packages/base/any/k3s/builds/prep-k3s.service
new file mode 100644
index 0000000..fda0aa9
--- /dev/null
+++ b/packages/base/any/k3s/builds/prep-k3s.service
@@ -0,0 +1,14 @@
+[Unit]
+Description=Prepare Lightweight Kubernetes
+Before=k3s.service
+
+[Service]
+Type=oneshot
+ExecStart=rm -rf /var/lib/rancher/k3s/server
+ExecStop=k3s-gs-killall.sh
+ExecStopPost=rm -rf /var/lib/rancher/k3s/server
+RemainAfterExit=true
+StandardOutput=jornal
+
+[Install]
+WantedBy=multi-user.target
diff --git a/packages/base/any/kernels/5.4-lts/configs/arm64-all/.gitignore b/packages/base/any/kernels/5.4-lts/configs/arm64-all/.gitignore
new file mode 100644
index 0000000..7e37417
--- /dev/null
+++ b/packages/base/any/kernels/5.4-lts/configs/arm64-all/.gitignore
@@ -0,0 +1,3 @@
+kernel-*
+linux-*
+lib
diff --git a/packages/base/any/kernels/5.4-lts/configs/arm64-all/Makefile b/packages/base/any/kernels/5.4-lts/configs/arm64-all/Makefile
new file mode 100644
index 0000000..2597388
--- /dev/null
+++ b/packages/base/any/kernels/5.4-lts/configs/arm64-all/Makefile
@@ -0,0 +1,45 @@
+############################################################
+#
+#
+# Copyright 2015 Big Switch Networks, Inc.
+#
+# Licensed under the Eclipse Public License, Version 1.0 (the
+# "License"); you may not use this file except in compliance
+# with the License. You may obtain a copy of the License at
+#
+# http://www.eclipse.org/legal/epl-v10.html
+#
+# Unless required by applicable law or agreed to in writing,
+# software distributed under the License is distributed on an
+# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+# either express or implied. See the License for the specific
+# language governing permissions and limitations under the
+# License.
+#
+#
+############################################################
+THIS_DIR := $(abspath $(dir $(lastword $(MAKEFILE_LIST))))
+include $(ONL)/make/config.mk
+include $(ONL)/make/config.arm64.mk
+
+ifndef K_TARGET_DIR
+K_TARGET_DIR := $(THIS_DIR)
+endif
+
+MODSYNCLIST_EXTRA = arch/arm64
+
+include ../../kconfig.mk
+K_CONFIG := arm64-all.config
+K_BUILD_TARGET := Image.gz
+K_COPY_SRC := arch/arm64/boot/Image.gz
+ifndef K_COPY_DST
+K_COPY_DST := kernel-5.4-lts-arm64-all.bin.gz
+endif
+
+K_SKIP_DOWNLOAD := 1
+K_SKIP_EXTRACT := 1
+
+export ARCH := arm64
+DTS_LIST := wistron/wtp-01-c1-00
+
+include $(ONL)/make/kbuild.mk
diff --git a/packages/base/any/kernels/5.4-lts/configs/arm64-all/arm64-all.config b/packages/base/any/kernels/5.4-lts/configs/arm64-all/arm64-all.config
new file mode 100644
index 0000000..d3fd36e
--- /dev/null
+++ b/packages/base/any/kernels/5.4-lts/configs/arm64-all/arm64-all.config
@@ -0,0 +1,8747 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# Linux/arm64 5.4.47 Kernel Configuration
+#
+
+#
+# Compiler: aarch64-linux-gnu-gcc (Debian 8.3.0-2) 8.3.0
+#
+CONFIG_CC_IS_GCC=y
+CONFIG_GCC_VERSION=80300
+CONFIG_CLANG_VERSION=0
+CONFIG_CC_CAN_LINK=y
+CONFIG_CC_HAS_ASM_GOTO=y
+CONFIG_CC_HAS_ASM_INLINE=y
+CONFIG_IRQ_WORK=y
+CONFIG_BUILDTIME_EXTABLE_SORT=y
+CONFIG_THREAD_INFO_IN_TASK=y
+
+#
+# General setup
+#
+CONFIG_INIT_ENV_ARG_LIMIT=32
+# CONFIG_COMPILE_TEST is not set
+CONFIG_LOCALVERSION="-Goldstone"
+# CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_BUILD_SALT=""
+CONFIG_DEFAULT_HOSTNAME="(none)"
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+CONFIG_POSIX_MQUEUE=y
+CONFIG_POSIX_MQUEUE_SYSCTL=y
+CONFIG_CROSS_MEMORY_ATTACH=y
+# CONFIG_USELIB is not set
+CONFIG_AUDIT=y
+CONFIG_HAVE_ARCH_AUDITSYSCALL=y
+CONFIG_AUDITSYSCALL=y
+
+#
+# IRQ subsystem
+#
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_GENERIC_IRQ_SHOW=y
+CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
+CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y
+CONFIG_GENERIC_IRQ_MIGRATION=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_GENERIC_IRQ_CHIP=y
+CONFIG_IRQ_DOMAIN=y
+CONFIG_IRQ_DOMAIN_HIERARCHY=y
+CONFIG_GENERIC_MSI_IRQ=y
+CONFIG_GENERIC_MSI_IRQ_DOMAIN=y
+CONFIG_IRQ_MSI_IOMMU=y
+CONFIG_HANDLE_DOMAIN_IRQ=y
+CONFIG_IRQ_FORCED_THREADING=y
+CONFIG_SPARSE_IRQ=y
+# CONFIG_GENERIC_IRQ_DEBUGFS is not set
+# end of IRQ subsystem
+
+CONFIG_GENERIC_IRQ_MULTI_HANDLER=y
+CONFIG_ARCH_CLOCKSOURCE_DATA=y
+CONFIG_GENERIC_TIME_VSYSCALL=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_ARCH_HAS_TICK_BROADCAST=y
+CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
+
+#
+# Timers subsystem
+#
+CONFIG_TICK_ONESHOT=y
+CONFIG_NO_HZ_COMMON=y
+# CONFIG_HZ_PERIODIC is not set
+CONFIG_NO_HZ_IDLE=y
+# CONFIG_NO_HZ_FULL is not set
+# CONFIG_NO_HZ is not set
+CONFIG_HIGH_RES_TIMERS=y
+# end of Timers subsystem
+
+# CONFIG_PREEMPT_NONE is not set
+# CONFIG_PREEMPT_VOLUNTARY is not set
+CONFIG_PREEMPT=y
+CONFIG_PREEMPT_COUNT=y
+CONFIG_PREEMPTION=y
+
+#
+# CPU/Task time and stats accounting
+#
+CONFIG_TICK_CPU_ACCOUNTING=y
+# CONFIG_VIRT_CPU_ACCOUNTING_GEN is not set
+CONFIG_IRQ_TIME_ACCOUNTING=y
+CONFIG_HAVE_SCHED_AVG_IRQ=y
+CONFIG_BSD_PROCESS_ACCT=y
+CONFIG_BSD_PROCESS_ACCT_V3=y
+CONFIG_TASKSTATS=y
+CONFIG_TASK_DELAY_ACCT=y
+CONFIG_TASK_XACCT=y
+CONFIG_TASK_IO_ACCOUNTING=y
+# CONFIG_PSI is not set
+# end of CPU/Task time and stats accounting
+
+CONFIG_CPU_ISOLATION=y
+
+#
+# RCU Subsystem
+#
+CONFIG_PREEMPT_RCU=y
+# CONFIG_RCU_EXPERT is not set
+CONFIG_SRCU=y
+CONFIG_TREE_SRCU=y
+CONFIG_TASKS_RCU=y
+CONFIG_RCU_STALL_COMMON=y
+CONFIG_RCU_NEED_SEGCBLIST=y
+# end of RCU Subsystem
+
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+# CONFIG_IKHEADERS is not set
+CONFIG_LOG_BUF_SHIFT=17
+CONFIG_LOG_CPU_MAX_BUF_SHIFT=12
+CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT=13
+CONFIG_GENERIC_SCHED_CLOCK=y
+
+#
+# Scheduler features
+#
+# CONFIG_UCLAMP_TASK is not set
+# end of Scheduler features
+
+CONFIG_ARCH_SUPPORTS_NUMA_BALANCING=y
+CONFIG_ARCH_SUPPORTS_INT128=y
+CONFIG_NUMA_BALANCING=y
+CONFIG_NUMA_BALANCING_DEFAULT_ENABLED=y
+CONFIG_CGROUPS=y
+CONFIG_PAGE_COUNTER=y
+CONFIG_MEMCG=y
+CONFIG_MEMCG_SWAP=y
+CONFIG_MEMCG_SWAP_ENABLED=y
+CONFIG_MEMCG_KMEM=y
+CONFIG_BLK_CGROUP=y
+CONFIG_CGROUP_WRITEBACK=y
+CONFIG_CGROUP_SCHED=y
+CONFIG_FAIR_GROUP_SCHED=y
+CONFIG_CFS_BANDWIDTH=y
+CONFIG_RT_GROUP_SCHED=y
+CONFIG_CGROUP_PIDS=y
+# CONFIG_CGROUP_RDMA is not set
+CONFIG_CGROUP_FREEZER=y
+CONFIG_CGROUP_HUGETLB=y
+CONFIG_CPUSETS=y
+CONFIG_PROC_PID_CPUSET=y
+CONFIG_CGROUP_DEVICE=y
+CONFIG_CGROUP_CPUACCT=y
+CONFIG_CGROUP_PERF=y
+# CONFIG_CGROUP_DEBUG is not set
+CONFIG_SOCK_CGROUP_DATA=y
+CONFIG_NAMESPACES=y
+CONFIG_UTS_NS=y
+CONFIG_IPC_NS=y
+CONFIG_USER_NS=y
+CONFIG_PID_NS=y
+CONFIG_NET_NS=y
+CONFIG_CHECKPOINT_RESTORE=y
+CONFIG_SCHED_AUTOGROUP=y
+# CONFIG_SYSFS_DEPRECATED is not set
+CONFIG_RELAY=y
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_RD_GZIP=y
+CONFIG_RD_BZIP2=y
+CONFIG_RD_LZMA=y
+CONFIG_RD_XZ=y
+CONFIG_RD_LZO=y
+CONFIG_RD_LZ4=y
+CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE=y
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SYSCTL=y
+CONFIG_HAVE_UID16=y
+CONFIG_SYSCTL_EXCEPTION_TRACE=y
+CONFIG_BPF=y
+CONFIG_EXPERT=y
+CONFIG_UID16=y
+CONFIG_MULTIUSER=y
+# CONFIG_SGETMASK_SYSCALL is not set
+CONFIG_SYSFS_SYSCALL=y
+# CONFIG_SYSCTL_SYSCALL is not set
+CONFIG_FHANDLE=y
+CONFIG_POSIX_TIMERS=y
+CONFIG_PRINTK=y
+CONFIG_PRINTK_NMI=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_FUTEX_PI=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_AIO=y
+CONFIG_IO_URING=y
+CONFIG_ADVISE_SYSCALLS=y
+CONFIG_MEMBARRIER=y
+CONFIG_KALLSYMS=y
+CONFIG_KALLSYMS_ALL=y
+CONFIG_KALLSYMS_BASE_RELATIVE=y
+# CONFIG_BPF_SYSCALL is not set
+# CONFIG_USERFAULTFD is not set
+CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y
+CONFIG_RSEQ=y
+# CONFIG_DEBUG_RSEQ is not set
+# CONFIG_EMBEDDED is not set
+CONFIG_HAVE_PERF_EVENTS=y
+# CONFIG_PC104 is not set
+
+#
+# Kernel Performance Events And Counters
+#
+CONFIG_PERF_EVENTS=y
+# CONFIG_DEBUG_PERF_USE_VMALLOC is not set
+# end of Kernel Performance Events And Counters
+
+CONFIG_VM_EVENT_COUNTERS=y
+# CONFIG_COMPAT_BRK is not set
+CONFIG_SLAB=y
+# CONFIG_SLUB is not set
+# CONFIG_SLOB is not set
+CONFIG_SLAB_MERGE_DEFAULT=y
+# CONFIG_SLAB_FREELIST_RANDOM is not set
+# CONFIG_SHUFFLE_PAGE_ALLOCATOR is not set
+CONFIG_PROFILING=y
+CONFIG_TRACEPOINTS=y
+# end of General setup
+
+CONFIG_ARM64=y
+CONFIG_64BIT=y
+CONFIG_MMU=y
+CONFIG_ARM64_PAGE_SHIFT=12
+CONFIG_ARM64_CONT_SHIFT=4
+CONFIG_ARCH_MMAP_RND_BITS_MIN=18
+CONFIG_ARCH_MMAP_RND_BITS_MAX=33
+CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11
+CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=16
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_GENERIC_BUG=y
+CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CSUM=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_ZONE_DMA32=y
+CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
+CONFIG_SMP=y
+CONFIG_KERNEL_MODE_NEON=y
+CONFIG_FIX_EARLYCON_MEM=y
+CONFIG_PGTABLE_LEVELS=4
+CONFIG_ARCH_SUPPORTS_UPROBES=y
+CONFIG_ARCH_PROC_KCORE_TEXT=y
+
+#
+# Platform selection
+#
+# CONFIG_ARCH_ACTIONS is not set
+CONFIG_ARCH_AGILEX=y
+CONFIG_ARCH_SUNXI=y
+CONFIG_ARCH_ALPINE=y
+CONFIG_ARCH_BCM2835=y
+CONFIG_ARCH_BCM_IPROC=y
+CONFIG_ARCH_BERLIN=y
+# CONFIG_ARCH_BITMAIN is not set
+CONFIG_ARCH_BRCMSTB=y
+CONFIG_ARCH_EXYNOS=y
+CONFIG_ARCH_K3=y
+CONFIG_ARCH_LAYERSCAPE=y
+CONFIG_ARCH_LG1K=y
+CONFIG_ARCH_HISI=y
+CONFIG_ARCH_MEDIATEK=y
+CONFIG_ARCH_MESON=y
+CONFIG_ARCH_MVEBU=y
+CONFIG_ARCH_MXC=y
+CONFIG_HAVE_IMX_BUSFREQ=y
+CONFIG_ARCH_QCOM=y
+# CONFIG_ARCH_REALTEK is not set
+CONFIG_ARCH_RENESAS=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_ARCH_S32=y
+
+#
+# S32 SOC selection
+#
+CONFIG_SOC_S32V234=y
+# end of S32 SOC selection
+
+CONFIG_ARCH_SEATTLE=y
+CONFIG_ARCH_STRATIX10=y
+CONFIG_ARCH_SYNQUACER=y
+CONFIG_ARCH_TEGRA=y
+CONFIG_ARCH_SPRD=y
+CONFIG_ARCH_THUNDER=y
+CONFIG_ARCH_THUNDER2=y
+CONFIG_ARCH_UNIPHIER=y
+CONFIG_ARCH_VEXPRESS=y
+CONFIG_ARCH_XGENE=y
+CONFIG_ARCH_ZX=y
+CONFIG_ARCH_ZYNQMP=y
+# end of Platform selection
+
+#
+# Kernel Features
+#
+
+#
+# ARM errata workarounds via the alternatives framework
+#
+CONFIG_ARM64_WORKAROUND_CLEAN_CACHE=y
+CONFIG_ARM64_ERRATUM_826319=y
+CONFIG_ARM64_ERRATUM_827319=y
+CONFIG_ARM64_ERRATUM_824069=y
+CONFIG_ARM64_ERRATUM_819472=y
+CONFIG_ARM64_ERRATUM_832075=y
+CONFIG_ARM64_ERRATUM_834220=y
+CONFIG_ARM64_ERRATUM_845719=y
+CONFIG_ARM64_ERRATUM_843419=y
+CONFIG_ARM64_ERRATUM_1024718=y
+CONFIG_ARM64_ERRATUM_1418040=y
+CONFIG_ARM64_ERRATUM_1165522=y
+CONFIG_ARM64_ERRATUM_1286807=y
+CONFIG_ARM64_ERRATUM_1463225=y
+CONFIG_ARM64_ERRATUM_1542419=y
+CONFIG_CAVIUM_ERRATUM_22375=y
+CONFIG_CAVIUM_ERRATUM_23144=y
+CONFIG_CAVIUM_ERRATUM_23154=y
+CONFIG_CAVIUM_ERRATUM_27456=y
+CONFIG_CAVIUM_ERRATUM_30115=y
+CONFIG_CAVIUM_TX2_ERRATUM_219=y
+CONFIG_QCOM_FALKOR_ERRATUM_1003=y
+CONFIG_ARM64_WORKAROUND_REPEAT_TLBI=y
+CONFIG_QCOM_FALKOR_ERRATUM_1009=y
+CONFIG_QCOM_QDF2400_ERRATUM_0065=y
+CONFIG_SOCIONEXT_SYNQUACER_PREITS=y
+CONFIG_HISILICON_ERRATUM_161600802=y
+CONFIG_QCOM_FALKOR_ERRATUM_E1041=y
+CONFIG_FUJITSU_ERRATUM_010001=y
+# end of ARM errata workarounds via the alternatives framework
+
+CONFIG_ARM64_4K_PAGES=y
+# CONFIG_ARM64_16K_PAGES is not set
+# CONFIG_ARM64_64K_PAGES is not set
+# CONFIG_ARM64_VA_BITS_39 is not set
+CONFIG_ARM64_VA_BITS_48=y
+CONFIG_ARM64_VA_BITS=48
+CONFIG_ARM64_PA_BITS_48=y
+CONFIG_ARM64_PA_BITS=48
+# CONFIG_CPU_BIG_ENDIAN is not set
+CONFIG_SCHED_MC=y
+# CONFIG_SCHED_SMT is not set
+CONFIG_NR_CPUS=16
+CONFIG_HOTPLUG_CPU=y
+CONFIG_NUMA=y
+CONFIG_NODES_SHIFT=2
+CONFIG_USE_PERCPU_NUMA_NODE_ID=y
+CONFIG_HAVE_SETUP_PER_CPU_AREA=y
+CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK=y
+CONFIG_HOLES_IN_ZONE=y
+# CONFIG_HZ_100 is not set
+CONFIG_HZ_250=y
+# CONFIG_HZ_300 is not set
+# CONFIG_HZ_1000 is not set
+CONFIG_HZ=250
+CONFIG_SCHED_HRTICK=y
+CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y
+CONFIG_ARCH_SPARSEMEM_ENABLE=y
+CONFIG_ARCH_SPARSEMEM_DEFAULT=y
+CONFIG_ARCH_SELECT_MEMORY_MODEL=y
+CONFIG_HAVE_ARCH_PFN_VALID=y
+CONFIG_HW_PERF_EVENTS=y
+CONFIG_SYS_SUPPORTS_HUGETLBFS=y
+CONFIG_ARCH_WANT_HUGE_PMD_SHARE=y
+CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y
+CONFIG_ARCH_ENABLE_SPLIT_PMD_PTLOCK=y
+CONFIG_SECCOMP=y
+CONFIG_PARAVIRT=y
+# CONFIG_PARAVIRT_TIME_ACCOUNTING is not set
+CONFIG_KEXEC=y
+# CONFIG_KEXEC_FILE is not set
+CONFIG_CRASH_DUMP=y
+CONFIG_XEN_DOM0=y
+CONFIG_XEN=y
+CONFIG_FORCE_MAX_ZONEORDER=11
+CONFIG_UNMAP_KERNEL_AT_EL0=y
+CONFIG_HARDEN_BRANCH_PREDICTOR=y
+CONFIG_HARDEN_EL2_VECTORS=y
+CONFIG_ARM64_SSBD=y
+CONFIG_RODATA_FULL_DEFAULT_ENABLED=y
+# CONFIG_ARM64_SW_TTBR0_PAN is not set
+CONFIG_ARM64_TAGGED_ADDR_ABI=y
+CONFIG_COMPAT=y
+CONFIG_KUSER_HELPERS=y
+# CONFIG_ARMV8_DEPRECATED is not set
+
+#
+# ARMv8.1 architectural features
+#
+CONFIG_ARM64_HW_AFDBM=y
+CONFIG_ARM64_PAN=y
+CONFIG_ARM64_LSE_ATOMICS=y
+CONFIG_ARM64_VHE=y
+# end of ARMv8.1 architectural features
+
+#
+# ARMv8.2 architectural features
+#
+CONFIG_ARM64_UAO=y
+# CONFIG_ARM64_PMEM is not set
+CONFIG_ARM64_RAS_EXTN=y
+CONFIG_ARM64_CNP=y
+# end of ARMv8.2 architectural features
+
+#
+# ARMv8.3 architectural features
+#
+CONFIG_ARM64_PTR_AUTH=y
+# end of ARMv8.3 architectural features
+
+CONFIG_ARM64_SVE=y
+CONFIG_ARM64_MODULE_PLTS=y
+# CONFIG_ARM64_PSEUDO_NMI is not set
+CONFIG_RELOCATABLE=y
+CONFIG_RANDOMIZE_BASE=y
+CONFIG_RANDOMIZE_MODULE_REGION_FULL=y
+# end of Kernel Features
+
+#
+# Boot options
+#
+# CONFIG_ARM64_ACPI_PARKING_PROTOCOL is not set
+CONFIG_CMDLINE=""
+# CONFIG_CMDLINE_FORCE is not set
+CONFIG_EFI_STUB=y
+CONFIG_EFI=y
+CONFIG_DMI=y
+# end of Boot options
+
+CONFIG_SYSVIPC_COMPAT=y
+CONFIG_ARCH_ENABLE_HUGEPAGE_MIGRATION=y
+
+#
+# Power management options
+#
+CONFIG_SUSPEND=y
+CONFIG_SUSPEND_FREEZER=y
+# CONFIG_SUSPEND_SKIP_SYNC is not set
+# CONFIG_HIBERNATION is not set
+CONFIG_PM_SLEEP=y
+CONFIG_PM_SLEEP_SMP=y
+# CONFIG_PM_AUTOSLEEP is not set
+# CONFIG_PM_WAKELOCKS is not set
+CONFIG_PM=y
+CONFIG_PM_DEBUG=y
+# CONFIG_PM_ADVANCED_DEBUG is not set
+CONFIG_PM_TEST_SUSPEND=y
+CONFIG_PM_SLEEP_DEBUG=y
+# CONFIG_DPM_WATCHDOG is not set
+CONFIG_PM_CLK=y
+CONFIG_PM_GENERIC_DOMAINS=y
+CONFIG_WQ_POWER_EFFICIENT_DEFAULT=y
+CONFIG_PM_GENERIC_DOMAINS_SLEEP=y
+CONFIG_PM_GENERIC_DOMAINS_OF=y
+CONFIG_CPU_PM=y
+# CONFIG_ENERGY_MODEL is not set
+CONFIG_ARCH_HIBERNATION_POSSIBLE=y
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+# end of Power management options
+
+#
+# CPU Power Management
+#
+
+#
+# CPU Idle
+#
+CONFIG_CPU_IDLE=y
+CONFIG_CPU_IDLE_MULTIPLE_DRIVERS=y
+# CONFIG_CPU_IDLE_GOV_LADDER is not set
+CONFIG_CPU_IDLE_GOV_MENU=y
+# CONFIG_CPU_IDLE_GOV_TEO is not set
+CONFIG_DT_IDLE_STATES=y
+
+#
+# ARM CPU Idle Drivers
+#
+CONFIG_ARM_CPUIDLE=y
+CONFIG_ARM_PSCI_CPUIDLE=y
+# end of ARM CPU Idle Drivers
+# end of CPU Idle
+
+#
+# CPU Frequency scaling
+#
+CONFIG_CPU_FREQ=y
+CONFIG_CPU_FREQ_GOV_ATTR_SET=y
+CONFIG_CPU_FREQ_GOV_COMMON=y
+CONFIG_CPU_FREQ_STAT=y
+# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
+CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
+# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_SCHEDUTIL is not set
+CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
+CONFIG_CPU_FREQ_GOV_POWERSAVE=m
+CONFIG_CPU_FREQ_GOV_USERSPACE=y
+CONFIG_CPU_FREQ_GOV_ONDEMAND=y
+CONFIG_CPU_FREQ_GOV_CONSERVATIVE=m
+CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y
+
+#
+# CPU frequency scaling drivers
+#
+CONFIG_CPUFREQ_DT=y
+CONFIG_CPUFREQ_DT_PLATDEV=y
+CONFIG_ACPI_CPPC_CPUFREQ=m
+# CONFIG_ARM_ALLWINNER_SUN50I_CPUFREQ_NVMEM is not set
+CONFIG_ARM_ARMADA_37XX_CPUFREQ=y
+# CONFIG_ARM_ARMADA_8K_CPUFREQ is not set
+CONFIG_ARM_SCPI_CPUFREQ=y
+CONFIG_ARM_BRCMSTB_AVS_CPUFREQ=y
+CONFIG_ARM_IMX_CPUFREQ_DT=y
+# CONFIG_ARM_IMX7ULP_CPUFREQ is not set
+# CONFIG_ARM_MEDIATEK_CPUFREQ is not set
+# CONFIG_ARM_QCOM_CPUFREQ_NVMEM is not set
+# CONFIG_ARM_QCOM_CPUFREQ_HW is not set
+CONFIG_ARM_RASPBERRYPI_CPUFREQ=m
+CONFIG_ARM_TEGRA20_CPUFREQ=y
+CONFIG_ARM_TEGRA124_CPUFREQ=y
+CONFIG_ARM_TEGRA186_CPUFREQ=y
+CONFIG_QORIQ_CPUFREQ=y
+# end of CPU Frequency scaling
+# end of CPU Power Management
+
+#
+# Firmware Drivers
+#
+# CONFIG_ARM_SCMI_PROTOCOL is not set
+CONFIG_ARM_SCPI_PROTOCOL=y
+CONFIG_ARM_SCPI_POWER_DOMAIN=y
+# CONFIG_ARM_SDE_INTERFACE is not set
+# CONFIG_FIRMWARE_MEMMAP is not set
+CONFIG_DMIID=y
+# CONFIG_DMI_SYSFS is not set
+# CONFIG_ISCSI_IBFT is not set
+CONFIG_RASPBERRYPI_FIRMWARE=y
+# CONFIG_FW_CFG_SYSFS is not set
+CONFIG_INTEL_STRATIX10_SERVICE=y
+# CONFIG_INTEL_STRATIX10_RSU is not set
+CONFIG_QCOM_SCM=y
+CONFIG_QCOM_SCM_64=y
+# CONFIG_QCOM_SCM_DOWNLOAD_MODE_DEFAULT is not set
+CONFIG_TI_SCI_PROTOCOL=y
+# CONFIG_TURRIS_MOX_RWTM is not set
+CONFIG_HAVE_ARM_SMCCC=y
+CONFIG_ARM_PSCI_FW=y
+# CONFIG_ARM_PSCI_CHECKER is not set
+# CONFIG_GOOGLE_FIRMWARE is not set
+
+#
+# EFI (Extensible Firmware Interface) Support
+#
+# CONFIG_EFI_VARS is not set
+CONFIG_EFI_ESRT=y
+CONFIG_EFI_PARAMS_FROM_FDT=y
+CONFIG_EFI_RUNTIME_WRAPPERS=y
+CONFIG_EFI_ARMSTUB=y
+CONFIG_EFI_ARMSTUB_DTB_LOADER=y
+CONFIG_EFI_CAPSULE_LOADER=y
+# CONFIG_EFI_TEST is not set
+# CONFIG_RESET_ATTACK_MITIGATION is not set
+# end of EFI (Extensible Firmware Interface) Support
+
+CONFIG_UEFI_CPER=y
+CONFIG_UEFI_CPER_ARM=y
+CONFIG_EFI_EARLYCON=y
+CONFIG_IMX_DSP=y
+CONFIG_IMX_SCU=y
+CONFIG_IMX_SCU_PD=y
+CONFIG_MESON_SM=y
+
+#
+# Tegra firmware driver
+#
+CONFIG_TEGRA_IVC=y
+CONFIG_TEGRA_BPMP=y
+# end of Tegra firmware driver
+
+#
+# Zynq MPSoC Firmware Drivers
+#
+CONFIG_ZYNQMP_FIRMWARE=y
+# CONFIG_ZYNQMP_FIRMWARE_DEBUG is not set
+# end of Zynq MPSoC Firmware Drivers
+# end of Firmware Drivers
+
+CONFIG_ARCH_SUPPORTS_ACPI=y
+CONFIG_ACPI=y
+CONFIG_ACPI_GENERIC_GSI=y
+CONFIG_ACPI_CCA_REQUIRED=y
+# CONFIG_ACPI_DEBUGGER is not set
+CONFIG_ACPI_SPCR_TABLE=y
+# CONFIG_ACPI_EC_DEBUGFS is not set
+CONFIG_ACPI_AC=y
+CONFIG_ACPI_BATTERY=y
+CONFIG_ACPI_BUTTON=y
+CONFIG_ACPI_FAN=y
+# CONFIG_ACPI_TAD is not set
+# CONFIG_ACPI_DOCK is not set
+CONFIG_ACPI_PROCESSOR_IDLE=y
+CONFIG_ACPI_MCFG=y
+CONFIG_ACPI_CPPC_LIB=y
+CONFIG_ACPI_PROCESSOR=y
+# CONFIG_ACPI_IPMI is not set
+CONFIG_ACPI_HOTPLUG_CPU=y
+CONFIG_ACPI_THERMAL=y
+CONFIG_ACPI_NUMA=y
+CONFIG_ARCH_HAS_ACPI_TABLE_UPGRADE=y
+CONFIG_ACPI_TABLE_UPGRADE=y
+# CONFIG_ACPI_DEBUG is not set
+# CONFIG_ACPI_PCI_SLOT is not set
+CONFIG_ACPI_CONTAINER=y
+CONFIG_ACPI_HED=y
+# CONFIG_ACPI_CUSTOM_METHOD is not set
+# CONFIG_ACPI_BGRT is not set
+CONFIG_ACPI_REDUCED_HARDWARE_ONLY=y
+# CONFIG_ACPI_HMAT is not set
+CONFIG_HAVE_ACPI_APEI=y
+CONFIG_ACPI_APEI=y
+CONFIG_ACPI_APEI_GHES=y
+CONFIG_ACPI_APEI_PCIEAER=y
+CONFIG_ACPI_APEI_SEA=y
+CONFIG_ACPI_APEI_MEMORY_FAILURE=y
+CONFIG_ACPI_APEI_EINJ=y
+# CONFIG_ACPI_APEI_ERST_DEBUG is not set
+# CONFIG_PMIC_OPREGION is not set
+# CONFIG_ACPI_CONFIGFS is not set
+CONFIG_ACPI_IORT=y
+CONFIG_ACPI_GTDT=y
+CONFIG_ACPI_PPTT=y
+CONFIG_HAVE_KVM_IRQCHIP=y
+CONFIG_HAVE_KVM_IRQFD=y
+CONFIG_HAVE_KVM_IRQ_ROUTING=y
+CONFIG_HAVE_KVM_EVENTFD=y
+CONFIG_KVM_MMIO=y
+CONFIG_HAVE_KVM_MSI=y
+CONFIG_HAVE_KVM_CPU_RELAX_INTERCEPT=y
+CONFIG_KVM_VFIO=y
+CONFIG_HAVE_KVM_ARCH_TLB_FLUSH_ALL=y
+CONFIG_KVM_GENERIC_DIRTYLOG_READ_PROTECT=y
+CONFIG_HAVE_KVM_IRQ_BYPASS=y
+CONFIG_HAVE_KVM_VCPU_RUN_PID_CHANGE=y
+CONFIG_IRQ_BYPASS_MANAGER=y
+CONFIG_VIRTUALIZATION=y
+CONFIG_KVM=y
+CONFIG_KVM_ARM_HOST=y
+CONFIG_KVM_ARM_PMU=y
+CONFIG_KVM_INDIRECT_VECTORS=y
+CONFIG_VHOST_NET=y
+CONFIG_VHOST=y
+# CONFIG_VHOST_CROSS_ENDIAN_LEGACY is not set
+CONFIG_ARM64_CRYPTO=y
+CONFIG_CRYPTO_SHA256_ARM64=y
+CONFIG_CRYPTO_SHA512_ARM64=m
+CONFIG_CRYPTO_SHA1_ARM64_CE=y
+CONFIG_CRYPTO_SHA2_ARM64_CE=y
+CONFIG_CRYPTO_SHA512_ARM64_CE=m
+CONFIG_CRYPTO_SHA3_ARM64=m
+CONFIG_CRYPTO_SM3_ARM64_CE=m
+# CONFIG_CRYPTO_SM4_ARM64_CE is not set
+CONFIG_CRYPTO_GHASH_ARM64_CE=y
+CONFIG_CRYPTO_CRCT10DIF_ARM64_CE=m
+CONFIG_CRYPTO_AES_ARM64=y
+CONFIG_CRYPTO_AES_ARM64_CE=y
+CONFIG_CRYPTO_AES_ARM64_CE_CCM=y
+CONFIG_CRYPTO_AES_ARM64_CE_BLK=y
+CONFIG_CRYPTO_AES_ARM64_NEON_BLK=m
+CONFIG_CRYPTO_CHACHA20_NEON=m
+# CONFIG_CRYPTO_NHPOLY1305_NEON is not set
+CONFIG_CRYPTO_AES_ARM64_BS=m
+
+#
+# General architecture-dependent options
+#
+CONFIG_CRASH_CORE=y
+CONFIG_KEXEC_CORE=y
+# CONFIG_KPROBES is not set
+CONFIG_JUMP_LABEL=y
+# CONFIG_STATIC_KEYS_SELFTEST is not set
+CONFIG_UPROBES=y
+CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_FUNCTION_ERROR_INJECTION=y
+CONFIG_HAVE_NMI=y
+CONFIG_HAVE_ARCH_TRACEHOOK=y
+CONFIG_HAVE_DMA_CONTIGUOUS=y
+CONFIG_GENERIC_SMP_IDLE_THREAD=y
+CONFIG_GENERIC_IDLE_POLL_SETUP=y
+CONFIG_ARCH_HAS_FORTIFY_SOURCE=y
+CONFIG_ARCH_HAS_KEEPINITRD=y
+CONFIG_ARCH_HAS_SET_MEMORY=y
+CONFIG_ARCH_HAS_SET_DIRECT_MAP=y
+CONFIG_HAVE_ARCH_THREAD_STRUCT_WHITELIST=y
+CONFIG_HAVE_ASM_MODVERSIONS=y
+CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
+CONFIG_HAVE_RSEQ=y
+CONFIG_HAVE_FUNCTION_ARG_ACCESS_API=y
+CONFIG_HAVE_CLK=y
+CONFIG_HAVE_HW_BREAKPOINT=y
+CONFIG_HAVE_PERF_REGS=y
+CONFIG_HAVE_PERF_USER_STACK_DUMP=y
+CONFIG_HAVE_ARCH_JUMP_LABEL=y
+CONFIG_HAVE_ARCH_JUMP_LABEL_RELATIVE=y
+CONFIG_HAVE_RCU_TABLE_FREE=y
+CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG=y
+CONFIG_HAVE_CMPXCHG_LOCAL=y
+CONFIG_HAVE_CMPXCHG_DOUBLE=y
+CONFIG_ARCH_WANT_COMPAT_IPC_PARSE_VERSION=y
+CONFIG_HAVE_ARCH_SECCOMP_FILTER=y
+CONFIG_SECCOMP_FILTER=y
+CONFIG_HAVE_ARCH_STACKLEAK=y
+CONFIG_HAVE_STACKPROTECTOR=y
+CONFIG_CC_HAS_STACKPROTECTOR_NONE=y
+CONFIG_STACKPROTECTOR=y
+CONFIG_STACKPROTECTOR_STRONG=y
+CONFIG_HAVE_CONTEXT_TRACKING=y
+CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y
+CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y
+CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y
+CONFIG_HAVE_ARCH_HUGE_VMAP=y
+CONFIG_HAVE_MOD_ARCH_SPECIFIC=y
+CONFIG_MODULES_USE_ELF_RELA=y
+CONFIG_ARCH_HAS_ELF_RANDOMIZE=y
+CONFIG_HAVE_ARCH_MMAP_RND_BITS=y
+CONFIG_ARCH_MMAP_RND_BITS=18
+CONFIG_HAVE_ARCH_MMAP_RND_COMPAT_BITS=y
+CONFIG_ARCH_MMAP_RND_COMPAT_BITS=11
+CONFIG_ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT=y
+CONFIG_HAVE_COPY_THREAD_TLS=y
+CONFIG_CLONE_BACKWARDS=y
+CONFIG_OLD_SIGSUSPEND3=y
+CONFIG_COMPAT_OLD_SIGACTION=y
+CONFIG_64BIT_TIME=y
+CONFIG_COMPAT_32BIT_TIME=y
+CONFIG_HAVE_ARCH_VMAP_STACK=y
+CONFIG_VMAP_STACK=y
+CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y
+CONFIG_STRICT_KERNEL_RWX=y
+CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y
+CONFIG_STRICT_MODULE_RWX=y
+CONFIG_REFCOUNT_FULL=y
+CONFIG_HAVE_ARCH_PREL32_RELOCATIONS=y
+CONFIG_ARCH_USE_MEMREMAP_PROT=y
+# CONFIG_LOCK_EVENT_COUNTS is not set
+CONFIG_ARCH_HAS_RELR=y
+
+#
+# GCOV-based kernel profiling
+#
+# CONFIG_GCOV_KERNEL is not set
+CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y
+# end of GCOV-based kernel profiling
+
+CONFIG_PLUGIN_HOSTCC=""
+CONFIG_HAVE_GCC_PLUGINS=y
+# end of General architecture-dependent options
+
+CONFIG_RT_MUTEXES=y
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+CONFIG_MODULE_FORCE_LOAD=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+CONFIG_MODVERSIONS=y
+CONFIG_ASM_MODVERSIONS=y
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+# CONFIG_MODULE_SIG is not set
+# CONFIG_MODULE_COMPRESS is not set
+# CONFIG_MODULE_ALLOW_MISSING_NAMESPACE_IMPORTS is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_TRIM_UNUSED_KSYMS is not set
+CONFIG_MODULES_TREE_LOOKUP=y
+CONFIG_BLOCK=y
+CONFIG_BLK_SCSI_REQUEST=y
+CONFIG_BLK_DEV_BSG=y
+CONFIG_BLK_DEV_BSGLIB=y
+CONFIG_BLK_DEV_INTEGRITY=y
+# CONFIG_BLK_DEV_ZONED is not set
+CONFIG_BLK_DEV_THROTTLING=y
+# CONFIG_BLK_DEV_THROTTLING_LOW is not set
+# CONFIG_BLK_CMDLINE_PARSER is not set
+# CONFIG_BLK_WBT is not set
+# CONFIG_BLK_CGROUP_IOLATENCY is not set
+# CONFIG_BLK_CGROUP_IOCOST is not set
+CONFIG_BLK_DEBUG_FS=y
+# CONFIG_BLK_SED_OPAL is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+CONFIG_EFI_PARTITION=y
+# end of Partition Types
+
+CONFIG_BLOCK_COMPAT=y
+CONFIG_BLK_MQ_PCI=y
+CONFIG_BLK_MQ_VIRTIO=y
+CONFIG_BLK_PM=y
+
+#
+# IO Schedulers
+#
+CONFIG_MQ_IOSCHED_DEADLINE=y
+CONFIG_MQ_IOSCHED_KYBER=y
+# CONFIG_IOSCHED_BFQ is not set
+# end of IO Schedulers
+
+CONFIG_PREEMPT_NOTIFIERS=y
+CONFIG_ASN1=y
+CONFIG_UNINLINE_SPIN_UNLOCK=y
+CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y
+CONFIG_MUTEX_SPIN_ON_OWNER=y
+CONFIG_RWSEM_SPIN_ON_OWNER=y
+CONFIG_LOCK_SPIN_ON_OWNER=y
+CONFIG_ARCH_USE_QUEUED_SPINLOCKS=y
+CONFIG_QUEUED_SPINLOCKS=y
+CONFIG_ARCH_USE_QUEUED_RWLOCKS=y
+CONFIG_QUEUED_RWLOCKS=y
+CONFIG_ARCH_HAS_SYSCALL_WRAPPER=y
+CONFIG_FREEZER=y
+
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF=y
+CONFIG_COMPAT_BINFMT_ELF=y
+CONFIG_ELFCORE=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_BINFMT_SCRIPT=y
+CONFIG_BINFMT_MISC=y
+CONFIG_COREDUMP=y
+# end of Executable file formats
+
+#
+# Memory Management options
+#
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_SPARSEMEM_MANUAL=y
+CONFIG_SPARSEMEM=y
+CONFIG_NEED_MULTIPLE_NODES=y
+CONFIG_HAVE_MEMORY_PRESENT=y
+CONFIG_SPARSEMEM_EXTREME=y
+CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y
+CONFIG_SPARSEMEM_VMEMMAP=y
+CONFIG_HAVE_MEMBLOCK_NODE_MAP=y
+CONFIG_HAVE_FAST_GUP=y
+CONFIG_ARCH_KEEP_MEMBLOCK=y
+CONFIG_MEMORY_ISOLATION=y
+# CONFIG_MEMORY_HOTPLUG is not set
+CONFIG_SPLIT_PTLOCK_CPUS=4
+CONFIG_MEMORY_BALLOON=y
+CONFIG_BALLOON_COMPACTION=y
+CONFIG_COMPACTION=y
+CONFIG_MIGRATION=y
+CONFIG_CONTIG_ALLOC=y
+CONFIG_PHYS_ADDR_T_64BIT=y
+CONFIG_MMU_NOTIFIER=y
+CONFIG_KSM=y
+CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
+CONFIG_ARCH_SUPPORTS_MEMORY_FAILURE=y
+CONFIG_MEMORY_FAILURE=y
+# CONFIG_HWPOISON_INJECT is not set
+CONFIG_TRANSPARENT_HUGEPAGE=y
+CONFIG_TRANSPARENT_HUGEPAGE_ALWAYS=y
+# CONFIG_TRANSPARENT_HUGEPAGE_MADVISE is not set
+CONFIG_TRANSPARENT_HUGE_PAGECACHE=y
+# CONFIG_CLEANCACHE is not set
+# CONFIG_FRONTSWAP is not set
+CONFIG_CMA=y
+# CONFIG_CMA_DEBUG is not set
+# CONFIG_CMA_DEBUGFS is not set
+CONFIG_CMA_AREAS=7
+# CONFIG_ZPOOL is not set
+# CONFIG_ZBUD is not set
+# CONFIG_ZSMALLOC is not set
+CONFIG_GENERIC_EARLY_IOREMAP=y
+# CONFIG_DEFERRED_STRUCT_PAGE_INIT is not set
+# CONFIG_IDLE_PAGE_TRACKING is not set
+CONFIG_ARCH_HAS_PTE_DEVMAP=y
+CONFIG_FRAME_VECTOR=y
+# CONFIG_PERCPU_STATS is not set
+# CONFIG_GUP_BENCHMARK is not set
+# CONFIG_READ_ONLY_THP_FOR_FS is not set
+CONFIG_ARCH_HAS_PTE_SPECIAL=y
+# end of Memory Management options
+
+CONFIG_NET=y
+CONFIG_COMPAT_NETLINK_MESSAGES=y
+CONFIG_NET_INGRESS=y
+CONFIG_SKB_EXTENSIONS=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+CONFIG_PACKET_DIAG=y
+CONFIG_UNIX=y
+CONFIG_UNIX_SCM=y
+CONFIG_UNIX_DIAG=y
+# CONFIG_TLS is not set
+CONFIG_XFRM=y
+CONFIG_XFRM_ALGO=y
+CONFIG_XFRM_USER=y
+# CONFIG_XFRM_INTERFACE is not set
+# CONFIG_XFRM_SUB_POLICY is not set
+# CONFIG_XFRM_MIGRATE is not set
+# CONFIG_XFRM_STATISTICS is not set
+CONFIG_NET_KEY=y
+# CONFIG_NET_KEY_MIGRATE is not set
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+CONFIG_IP_ADVANCED_ROUTER=y
+# CONFIG_IP_FIB_TRIE_STATS is not set
+CONFIG_IP_MULTIPLE_TABLES=y
+# CONFIG_IP_ROUTE_MULTIPATH is not set
+# CONFIG_IP_ROUTE_VERBOSE is not set
+CONFIG_IP_ROUTE_CLASSID=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE_DEMUX is not set
+CONFIG_NET_IP_TUNNEL=y
+# CONFIG_IP_MROUTE is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_NET_IPVTI is not set
+CONFIG_NET_UDP_TUNNEL=m
+# CONFIG_NET_FOU is not set
+# CONFIG_NET_FOU_IP_TUNNELS is not set
+# CONFIG_INET_AH is not set
+CONFIG_INET_ESP=y
+# CONFIG_INET_ESP_OFFLOAD is not set
+# CONFIG_INET_IPCOMP is not set
+CONFIG_INET_TUNNEL=y
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_INET_UDP_DIAG is not set
+# CONFIG_INET_RAW_DIAG is not set
+# CONFIG_INET_DIAG_DESTROY is not set
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+CONFIG_IPV6=y
+# CONFIG_IPV6_ROUTER_PREF is not set
+# CONFIG_IPV6_OPTIMISTIC_DAD is not set
+# CONFIG_INET6_AH is not set
+# CONFIG_INET6_ESP is not set
+# CONFIG_INET6_IPCOMP is not set
+# CONFIG_IPV6_MIP6 is not set
+# CONFIG_IPV6_ILA is not set
+# CONFIG_IPV6_VTI is not set
+CONFIG_IPV6_SIT=y
+# CONFIG_IPV6_SIT_6RD is not set
+CONFIG_IPV6_NDISC_NODETYPE=y
+# CONFIG_IPV6_TUNNEL is not set
+# CONFIG_IPV6_MULTIPLE_TABLES is not set
+# CONFIG_IPV6_MROUTE is not set
+# CONFIG_IPV6_SEG6_LWTUNNEL is not set
+# CONFIG_IPV6_SEG6_HMAC is not set
+# CONFIG_NETLABEL is not set
+# CONFIG_NETWORK_SECMARK is not set
+CONFIG_NET_PTP_CLASSIFY=y
+# CONFIG_NETWORK_PHY_TIMESTAMPING is not set
+CONFIG_NETFILTER=y
+CONFIG_NETFILTER_ADVANCED=y
+CONFIG_BRIDGE_NETFILTER=y
+
+#
+# Core Netfilter Configuration
+#
+CONFIG_NETFILTER_INGRESS=y
+CONFIG_NETFILTER_NETLINK=y
+CONFIG_NETFILTER_FAMILY_BRIDGE=y
+CONFIG_NETFILTER_NETLINK_ACCT=m
+# CONFIG_NETFILTER_NETLINK_QUEUE is not set
+# CONFIG_NETFILTER_NETLINK_LOG is not set
+CONFIG_NETFILTER_NETLINK_OSF=m
+CONFIG_NF_CONNTRACK=y
+CONFIG_NF_LOG_COMMON=y
+# CONFIG_NF_LOG_NETDEV is not set
+CONFIG_NETFILTER_CONNCOUNT=m
+CONFIG_NF_CONNTRACK_MARK=y
+# CONFIG_NF_CONNTRACK_ZONES is not set
+CONFIG_NF_CONNTRACK_PROCFS=y
+CONFIG_NF_CONNTRACK_EVENTS=y
+# CONFIG_NF_CONNTRACK_TIMEOUT is not set
+# CONFIG_NF_CONNTRACK_TIMESTAMP is not set
+CONFIG_NF_CONNTRACK_LABELS=y
+CONFIG_NF_CT_PROTO_DCCP=y
+CONFIG_NF_CT_PROTO_SCTP=y
+CONFIG_NF_CT_PROTO_UDPLITE=y
+# CONFIG_NF_CONNTRACK_AMANDA is not set
+# CONFIG_NF_CONNTRACK_FTP is not set
+# CONFIG_NF_CONNTRACK_H323 is not set
+# CONFIG_NF_CONNTRACK_IRC is not set
+# CONFIG_NF_CONNTRACK_NETBIOS_NS is not set
+# CONFIG_NF_CONNTRACK_SNMP is not set
+# CONFIG_NF_CONNTRACK_PPTP is not set
+# CONFIG_NF_CONNTRACK_SANE is not set
+# CONFIG_NF_CONNTRACK_SIP is not set
+# CONFIG_NF_CONNTRACK_TFTP is not set
+# CONFIG_NF_CT_NETLINK is not set
+CONFIG_NF_NAT=y
+CONFIG_NF_NAT_MASQUERADE=y
+CONFIG_NF_TABLES=y
+# CONFIG_NF_TABLES_SET is not set
+# CONFIG_NF_TABLES_INET is not set
+# CONFIG_NF_TABLES_NETDEV is not set
+# CONFIG_NFT_NUMGEN is not set
+CONFIG_NFT_CT=y
+# CONFIG_NFT_COUNTER is not set
+# CONFIG_NFT_CONNLIMIT is not set
+# CONFIG_NFT_LOG is not set
+# CONFIG_NFT_LIMIT is not set
+CONFIG_NFT_MASQ=y
+# CONFIG_NFT_REDIR is not set
+CONFIG_NFT_NAT=y
+# CONFIG_NFT_TUNNEL is not set
+# CONFIG_NFT_OBJREF is not set
+# CONFIG_NFT_QUOTA is not set
+# CONFIG_NFT_REJECT is not set
+CONFIG_NFT_COMPAT=y
+# CONFIG_NFT_HASH is not set
+# CONFIG_NFT_XFRM is not set
+# CONFIG_NFT_SOCKET is not set
+# CONFIG_NFT_OSF is not set
+# CONFIG_NFT_TPROXY is not set
+# CONFIG_NFT_SYNPROXY is not set
+# CONFIG_NF_FLOW_TABLE is not set
+CONFIG_NETFILTER_XTABLES=y
+
+#
+# Xtables combined modules
+#
+CONFIG_NETFILTER_XT_MARK=m
+CONFIG_NETFILTER_XT_CONNMARK=y
+CONFIG_NETFILTER_XT_SET=y
+
+#
+# Xtables targets
+#
+# CONFIG_NETFILTER_XT_TARGET_AUDIT is not set
+CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m
+# CONFIG_NETFILTER_XT_TARGET_CLASSIFY is not set
+CONFIG_NETFILTER_XT_TARGET_CONNMARK=y
+# CONFIG_NETFILTER_XT_TARGET_DSCP is not set
+# CONFIG_NETFILTER_XT_TARGET_HL is not set
+# CONFIG_NETFILTER_XT_TARGET_HMARK is not set
+# CONFIG_NETFILTER_XT_TARGET_IDLETIMER is not set
+# CONFIG_NETFILTER_XT_TARGET_LED is not set
+CONFIG_NETFILTER_XT_TARGET_LOG=m
+# CONFIG_NETFILTER_XT_TARGET_MARK is not set
+CONFIG_NETFILTER_XT_NAT=y
+# CONFIG_NETFILTER_XT_TARGET_NETMAP is not set
+# CONFIG_NETFILTER_XT_TARGET_NFLOG is not set
+# CONFIG_NETFILTER_XT_TARGET_NFQUEUE is not set
+CONFIG_NETFILTER_XT_TARGET_RATEEST=m
+# CONFIG_NETFILTER_XT_TARGET_REDIRECT is not set
+CONFIG_NETFILTER_XT_TARGET_MASQUERADE=y
+# CONFIG_NETFILTER_XT_TARGET_TEE is not set
+# CONFIG_NETFILTER_XT_TARGET_TPROXY is not set
+# CONFIG_NETFILTER_XT_TARGET_TCPMSS is not set
+# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set
+
+#
+# Xtables matches
+#
+CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=m
+CONFIG_NETFILTER_XT_MATCH_BPF=m
+CONFIG_NETFILTER_XT_MATCH_CGROUP=m
+CONFIG_NETFILTER_XT_MATCH_CLUSTER=m
+CONFIG_NETFILTER_XT_MATCH_COMMENT=m
+CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m
+CONFIG_NETFILTER_XT_MATCH_CONNLABEL=m
+CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m
+CONFIG_NETFILTER_XT_MATCH_CONNMARK=m
+CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m
+CONFIG_NETFILTER_XT_MATCH_CPU=m
+CONFIG_NETFILTER_XT_MATCH_DCCP=m
+CONFIG_NETFILTER_XT_MATCH_DEVGROUP=m
+CONFIG_NETFILTER_XT_MATCH_DSCP=m
+CONFIG_NETFILTER_XT_MATCH_ECN=m
+CONFIG_NETFILTER_XT_MATCH_ESP=m
+CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m
+CONFIG_NETFILTER_XT_MATCH_HELPER=m
+CONFIG_NETFILTER_XT_MATCH_HL=m
+CONFIG_NETFILTER_XT_MATCH_IPCOMP=m
+CONFIG_NETFILTER_XT_MATCH_IPRANGE=m
+CONFIG_NETFILTER_XT_MATCH_IPVS=m
+CONFIG_NETFILTER_XT_MATCH_L2TP=m
+CONFIG_NETFILTER_XT_MATCH_LENGTH=m
+CONFIG_NETFILTER_XT_MATCH_LIMIT=m
+CONFIG_NETFILTER_XT_MATCH_MAC=m
+CONFIG_NETFILTER_XT_MATCH_MARK=m
+CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
+CONFIG_NETFILTER_XT_MATCH_NFACCT=m
+CONFIG_NETFILTER_XT_MATCH_OSF=m
+CONFIG_NETFILTER_XT_MATCH_OWNER=m
+CONFIG_NETFILTER_XT_MATCH_POLICY=m
+CONFIG_NETFILTER_XT_MATCH_PHYSDEV=m
+CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
+CONFIG_NETFILTER_XT_MATCH_QUOTA=m
+CONFIG_NETFILTER_XT_MATCH_RATEEST=m
+CONFIG_NETFILTER_XT_MATCH_REALM=m
+CONFIG_NETFILTER_XT_MATCH_RECENT=m
+CONFIG_NETFILTER_XT_MATCH_SCTP=m
+CONFIG_NETFILTER_XT_MATCH_SOCKET=m
+CONFIG_NETFILTER_XT_MATCH_STATE=m
+CONFIG_NETFILTER_XT_MATCH_STATISTIC=m
+CONFIG_NETFILTER_XT_MATCH_STRING=m
+CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
+CONFIG_NETFILTER_XT_MATCH_TIME=m
+CONFIG_NETFILTER_XT_MATCH_U32=m
+# end of Core Netfilter Configuration
+
+CONFIG_IP_SET=y
+CONFIG_IP_SET_MAX=256
+CONFIG_IP_SET_BITMAP_IP=y
+CONFIG_IP_SET_BITMAP_IPMAC=y
+CONFIG_IP_SET_BITMAP_PORT=y
+CONFIG_IP_SET_HASH_IP=y
+CONFIG_IP_SET_HASH_IPMARK=y
+CONFIG_IP_SET_HASH_IPPORT=y
+CONFIG_IP_SET_HASH_IPPORTIP=y
+CONFIG_IP_SET_HASH_IPPORTNET=y
+CONFIG_IP_SET_HASH_IPMAC=y
+CONFIG_IP_SET_HASH_MAC=y
+CONFIG_IP_SET_HASH_NETPORTNET=y
+CONFIG_IP_SET_HASH_NET=y
+CONFIG_IP_SET_HASH_NETNET=y
+CONFIG_IP_SET_HASH_NETPORT=y
+CONFIG_IP_SET_HASH_NETIFACE=y
+CONFIG_IP_SET_LIST_SET=y
+CONFIG_IP_VS=y
+# CONFIG_IP_VS_IPV6 is not set
+# CONFIG_IP_VS_DEBUG is not set
+CONFIG_IP_VS_TAB_BITS=12
+
+#
+# IPVS transport protocol load balancing support
+#
+CONFIG_IP_VS_PROTO_TCP=y
+CONFIG_IP_VS_PROTO_UDP=y
+# CONFIG_IP_VS_PROTO_ESP is not set
+# CONFIG_IP_VS_PROTO_AH is not set
+# CONFIG_IP_VS_PROTO_SCTP is not set
+
+#
+# IPVS scheduler
+#
+CONFIG_IP_VS_RR=y
+# CONFIG_IP_VS_WRR is not set
+# CONFIG_IP_VS_LC is not set
+# CONFIG_IP_VS_WLC is not set
+# CONFIG_IP_VS_FO is not set
+# CONFIG_IP_VS_OVF is not set
+# CONFIG_IP_VS_LBLC is not set
+# CONFIG_IP_VS_LBLCR is not set
+# CONFIG_IP_VS_DH is not set
+# CONFIG_IP_VS_SH is not set
+# CONFIG_IP_VS_MH is not set
+# CONFIG_IP_VS_SED is not set
+# CONFIG_IP_VS_NQ is not set
+
+#
+# IPVS SH scheduler
+#
+CONFIG_IP_VS_SH_TAB_BITS=8
+
+#
+# IPVS MH scheduler
+#
+CONFIG_IP_VS_MH_TAB_INDEX=12
+
+#
+# IPVS application helper
+#
+CONFIG_IP_VS_NFCT=y
+
+#
+# IP: Netfilter Configuration
+#
+CONFIG_NF_DEFRAG_IPV4=y
+CONFIG_NF_SOCKET_IPV4=m
+# CONFIG_NF_TPROXY_IPV4 is not set
+CONFIG_NF_TABLES_IPV4=y
+# CONFIG_NFT_DUP_IPV4 is not set
+# CONFIG_NFT_FIB_IPV4 is not set
+# CONFIG_NF_TABLES_ARP is not set
+# CONFIG_NF_DUP_IPV4 is not set
+# CONFIG_NF_LOG_ARP is not set
+CONFIG_NF_LOG_IPV4=m
+CONFIG_NF_REJECT_IPV4=m
+CONFIG_IP_NF_IPTABLES=y
+# CONFIG_IP_NF_MATCH_AH is not set
+# CONFIG_IP_NF_MATCH_ECN is not set
+# CONFIG_IP_NF_MATCH_RPFILTER is not set
+# CONFIG_IP_NF_MATCH_TTL is not set
+CONFIG_IP_NF_FILTER=y
+CONFIG_IP_NF_TARGET_REJECT=m
+# CONFIG_IP_NF_TARGET_SYNPROXY is not set
+CONFIG_IP_NF_NAT=y
+CONFIG_IP_NF_TARGET_MASQUERADE=y
+# CONFIG_IP_NF_TARGET_NETMAP is not set
+CONFIG_IP_NF_TARGET_REDIRECT=y
+CONFIG_IP_NF_MANGLE=y
+# CONFIG_IP_NF_TARGET_CLUSTERIP is not set
+# CONFIG_IP_NF_TARGET_ECN is not set
+# CONFIG_IP_NF_TARGET_TTL is not set
+# CONFIG_IP_NF_RAW is not set
+# CONFIG_IP_NF_SECURITY is not set
+# CONFIG_IP_NF_ARPTABLES is not set
+# end of IP: Netfilter Configuration
+
+#
+# IPv6: Netfilter Configuration
+#
+CONFIG_NF_SOCKET_IPV6=m
+# CONFIG_NF_TPROXY_IPV6 is not set
+# CONFIG_NF_TABLES_IPV6 is not set
+# CONFIG_NF_DUP_IPV6 is not set
+CONFIG_NF_REJECT_IPV6=y
+CONFIG_NF_LOG_IPV6=y
+CONFIG_IP6_NF_IPTABLES=m
+# CONFIG_IP6_NF_MATCH_AH is not set
+# CONFIG_IP6_NF_MATCH_EUI64 is not set
+# CONFIG_IP6_NF_MATCH_FRAG is not set
+# CONFIG_IP6_NF_MATCH_OPTS is not set
+# CONFIG_IP6_NF_MATCH_HL is not set
+# CONFIG_IP6_NF_MATCH_IPV6HEADER is not set
+# CONFIG_IP6_NF_MATCH_MH is not set
+# CONFIG_IP6_NF_MATCH_RPFILTER is not set
+# CONFIG_IP6_NF_MATCH_RT is not set
+# CONFIG_IP6_NF_MATCH_SRH is not set
+# CONFIG_IP6_NF_TARGET_HL is not set
+CONFIG_IP6_NF_FILTER=m
+CONFIG_IP6_NF_TARGET_REJECT=m
+# CONFIG_IP6_NF_TARGET_SYNPROXY is not set
+CONFIG_IP6_NF_MANGLE=m
+# CONFIG_IP6_NF_RAW is not set
+# CONFIG_IP6_NF_SECURITY is not set
+CONFIG_IP6_NF_NAT=m
+CONFIG_IP6_NF_TARGET_MASQUERADE=m
+# CONFIG_IP6_NF_TARGET_NPT is not set
+# end of IPv6: Netfilter Configuration
+
+CONFIG_NF_DEFRAG_IPV6=y
+CONFIG_NF_TABLES_BRIDGE=y
+# CONFIG_NFT_BRIDGE_META is not set
+# CONFIG_NF_LOG_BRIDGE is not set
+# CONFIG_NF_CONNTRACK_BRIDGE is not set
+CONFIG_BRIDGE_NF_EBTABLES=y
+# CONFIG_BRIDGE_EBT_BROUTE is not set
+# CONFIG_BRIDGE_EBT_T_FILTER is not set
+CONFIG_BRIDGE_EBT_T_NAT=y
+# CONFIG_BRIDGE_EBT_802_3 is not set
+# CONFIG_BRIDGE_EBT_AMONG is not set
+# CONFIG_BRIDGE_EBT_ARP is not set
+# CONFIG_BRIDGE_EBT_IP is not set
+# CONFIG_BRIDGE_EBT_IP6 is not set
+# CONFIG_BRIDGE_EBT_LIMIT is not set
+# CONFIG_BRIDGE_EBT_MARK is not set
+# CONFIG_BRIDGE_EBT_PKTTYPE is not set
+# CONFIG_BRIDGE_EBT_STP is not set
+# CONFIG_BRIDGE_EBT_VLAN is not set
+# CONFIG_BRIDGE_EBT_ARPREPLY is not set
+CONFIG_BRIDGE_EBT_DNAT=y
+# CONFIG_BRIDGE_EBT_MARK_T is not set
+# CONFIG_BRIDGE_EBT_REDIRECT is not set
+CONFIG_BRIDGE_EBT_SNAT=y
+# CONFIG_BRIDGE_EBT_LOG is not set
+# CONFIG_BRIDGE_EBT_NFLOG is not set
+# CONFIG_BPFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_L2TP is not set
+CONFIG_STP=y
+CONFIG_GARP=y
+CONFIG_MRP=y
+CONFIG_BRIDGE=y
+CONFIG_BRIDGE_IGMP_SNOOPING=y
+CONFIG_BRIDGE_VLAN_FILTERING=y
+CONFIG_HAVE_NET_DSA=y
+CONFIG_NET_DSA=y
+# CONFIG_NET_DSA_TAG_8021Q is not set
+# CONFIG_NET_DSA_TAG_BRCM is not set
+# CONFIG_NET_DSA_TAG_BRCM_PREPEND is not set
+# CONFIG_NET_DSA_TAG_GSWIP is not set
+# CONFIG_NET_DSA_TAG_DSA is not set
+# CONFIG_NET_DSA_TAG_EDSA is not set
+# CONFIG_NET_DSA_TAG_MTK is not set
+# CONFIG_NET_DSA_TAG_KSZ is not set
+CONFIG_NET_DSA_TAG_OCELOT=y
+# CONFIG_NET_DSA_TAG_QCA is not set
+# CONFIG_NET_DSA_TAG_LAN9303 is not set
+# CONFIG_NET_DSA_TAG_SJA1105 is not set
+# CONFIG_NET_DSA_TAG_TRAILER is not set
+CONFIG_VLAN_8021Q=y
+CONFIG_VLAN_8021Q_GVRP=y
+CONFIG_VLAN_8021Q_MVRP=y
+# CONFIG_DECNET is not set
+CONFIG_LLC=y
+CONFIG_LLC2=y
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_PHONET is not set
+# CONFIG_6LOWPAN is not set
+# CONFIG_IEEE802154 is not set
+CONFIG_NET_SCHED=y
+
+#
+# Queueing/Scheduling
+#
+# CONFIG_NET_SCH_CBQ is not set
+# CONFIG_NET_SCH_HTB is not set
+# CONFIG_NET_SCH_HFSC is not set
+# CONFIG_NET_SCH_PRIO is not set
+CONFIG_NET_SCH_MULTIQ=y
+# CONFIG_NET_SCH_RED is not set
+# CONFIG_NET_SCH_SFB is not set
+# CONFIG_NET_SCH_SFQ is not set
+# CONFIG_NET_SCH_TEQL is not set
+# CONFIG_NET_SCH_TBF is not set
+# CONFIG_NET_SCH_CBS is not set
+# CONFIG_NET_SCH_ETF is not set
+# CONFIG_NET_SCH_TAPRIO is not set
+# CONFIG_NET_SCH_GRED is not set
+# CONFIG_NET_SCH_DSMARK is not set
+# CONFIG_NET_SCH_NETEM is not set
+# CONFIG_NET_SCH_DRR is not set
+CONFIG_NET_SCH_MQPRIO=y
+# CONFIG_NET_SCH_SKBPRIO is not set
+# CONFIG_NET_SCH_CHOKE is not set
+# CONFIG_NET_SCH_QFQ is not set
+# CONFIG_NET_SCH_CODEL is not set
+# CONFIG_NET_SCH_FQ_CODEL is not set
+# CONFIG_NET_SCH_CAKE is not set
+# CONFIG_NET_SCH_FQ is not set
+# CONFIG_NET_SCH_HHF is not set
+# CONFIG_NET_SCH_PIE is not set
+# CONFIG_NET_SCH_INGRESS is not set
+# CONFIG_NET_SCH_PLUG is not set
+# CONFIG_NET_SCH_DEFAULT is not set
+
+#
+# Classification
+#
+CONFIG_NET_CLS=y
+CONFIG_NET_CLS_BASIC=y
+CONFIG_NET_CLS_TCINDEX=y
+# CONFIG_NET_CLS_ROUTE4 is not set
+# CONFIG_NET_CLS_FW is not set
+CONFIG_NET_CLS_U32=y
+# CONFIG_CLS_U32_PERF is not set
+# CONFIG_CLS_U32_MARK is not set
+# CONFIG_NET_CLS_RSVP is not set
+# CONFIG_NET_CLS_RSVP6 is not set
+# CONFIG_NET_CLS_FLOW is not set
+CONFIG_NET_CLS_CGROUP=y
+# CONFIG_NET_CLS_BPF is not set
+CONFIG_NET_CLS_FLOWER=y
+# CONFIG_NET_CLS_MATCHALL is not set
+CONFIG_NET_EMATCH=y
+CONFIG_NET_EMATCH_STACK=32
+# CONFIG_NET_EMATCH_CMP is not set
+# CONFIG_NET_EMATCH_NBYTE is not set
+CONFIG_NET_EMATCH_U32=y
+# CONFIG_NET_EMATCH_META is not set
+# CONFIG_NET_EMATCH_TEXT is not set
+# CONFIG_NET_EMATCH_CANID is not set
+CONFIG_NET_EMATCH_IPSET=y
+# CONFIG_NET_EMATCH_IPT is not set
+CONFIG_NET_CLS_ACT=y
+# CONFIG_NET_ACT_POLICE is not set
+# CONFIG_NET_ACT_GACT is not set
+# CONFIG_NET_ACT_MIRRED is not set
+# CONFIG_NET_ACT_SAMPLE is not set
+# CONFIG_NET_ACT_IPT is not set
+# CONFIG_NET_ACT_NAT is not set
+CONFIG_NET_ACT_PEDIT=y
+# CONFIG_NET_ACT_SIMP is not set
+CONFIG_NET_ACT_SKBEDIT=y
+# CONFIG_NET_ACT_CSUM is not set
+# CONFIG_NET_ACT_MPLS is not set
+CONFIG_NET_ACT_VLAN=y
+# CONFIG_NET_ACT_BPF is not set
+# CONFIG_NET_ACT_CONNMARK is not set
+# CONFIG_NET_ACT_CTINFO is not set
+CONFIG_NET_ACT_SKBMOD=y
+# CONFIG_NET_ACT_IFE is not set
+# CONFIG_NET_ACT_TUNNEL_KEY is not set
+# CONFIG_NET_ACT_CT is not set
+# CONFIG_NET_TC_SKB_EXT is not set
+CONFIG_NET_SCH_FIFO=y
+# CONFIG_DCB is not set
+CONFIG_TSN=y
+CONFIG_DNS_RESOLVER=y
+# CONFIG_BATMAN_ADV is not set
+# CONFIG_OPENVSWITCH is not set
+# CONFIG_VSOCKETS is not set
+CONFIG_NETLINK_DIAG=y
+# CONFIG_MPLS is not set
+# CONFIG_NET_NSH is not set
+# CONFIG_HSR is not set
+CONFIG_NET_SWITCHDEV=y
+# CONFIG_NET_L3_MASTER_DEV is not set
+CONFIG_QRTR=m
+CONFIG_QRTR_SMD=m
+CONFIG_QRTR_TUN=m
+# CONFIG_NET_NCSI is not set
+CONFIG_RPS=y
+CONFIG_RFS_ACCEL=y
+CONFIG_XPS=y
+CONFIG_CGROUP_NET_PRIO=y
+CONFIG_CGROUP_NET_CLASSID=y
+CONFIG_NET_RX_BUSY_POLL=y
+CONFIG_BQL=y
+CONFIG_BPF_JIT=y
+CONFIG_NET_FLOW_LIMIT=y
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+CONFIG_NET_DROP_MONITOR=y
+# end of Network testing
+# end of Networking options
+
+# CONFIG_HAMRADIO is not set
+CONFIG_CAN=y
+CONFIG_CAN_RAW=y
+CONFIG_CAN_BCM=y
+CONFIG_CAN_GW=y
+# CONFIG_CAN_J1939 is not set
+
+#
+# CAN Device Drivers
+#
+# CONFIG_CAN_VCAN is not set
+# CONFIG_CAN_VXCAN is not set
+# CONFIG_CAN_SLCAN is not set
+CONFIG_CAN_DEV=y
+CONFIG_CAN_CALC_BITTIMING=y
+CONFIG_CAN_FLEXCAN=y
+# CONFIG_CAN_GRCAN is not set
+# CONFIG_CAN_KVASER_PCIEFD is not set
+# CONFIG_CAN_XILINXCAN is not set
+# CONFIG_CAN_C_CAN is not set
+# CONFIG_CAN_CC770 is not set
+# CONFIG_CAN_IFI_CANFD is not set
+# CONFIG_CAN_M_CAN is not set
+# CONFIG_CAN_PEAK_PCIEFD is not set
+# CONFIG_CAN_RCAR is not set
+# CONFIG_CAN_RCAR_CANFD is not set
+# CONFIG_CAN_SJA1000 is not set
+# CONFIG_CAN_SOFTING is not set
+
+#
+# CAN SPI interfaces
+#
+# CONFIG_CAN_HI311X is not set
+# CONFIG_CAN_MCP251X is not set
+# end of CAN SPI interfaces
+
+#
+# CAN USB interfaces
+#
+# CONFIG_CAN_8DEV_USB is not set
+# CONFIG_CAN_EMS_USB is not set
+# CONFIG_CAN_ESD_USB2 is not set
+# CONFIG_CAN_GS_USB is not set
+# CONFIG_CAN_KVASER_USB is not set
+# CONFIG_CAN_MCBA_USB is not set
+# CONFIG_CAN_PEAK_USB is not set
+# CONFIG_CAN_UCAN is not set
+# end of CAN USB interfaces
+
+# CONFIG_CAN_DEBUG_DEVICES is not set
+# end of CAN Device Drivers
+
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+# CONFIG_AF_KCM is not set
+CONFIG_FIB_RULES=y
+CONFIG_WIRELESS=y
+CONFIG_WIRELESS_EXT=y
+CONFIG_WEXT_CORE=y
+CONFIG_WEXT_PROC=y
+CONFIG_WEXT_SPY=y
+CONFIG_WEXT_PRIV=y
+# CONFIG_CFG80211 is not set
+CONFIG_LIB80211=y
+CONFIG_LIB80211_CRYPT_WEP=y
+CONFIG_LIB80211_CRYPT_CCMP=y
+CONFIG_LIB80211_CRYPT_TKIP=y
+# CONFIG_LIB80211_DEBUG is not set
+
+#
+# CFG80211 needs to be enabled for MAC80211
+#
+CONFIG_MAC80211_STA_HASH_MAX_SIZE=0
+# CONFIG_WIMAX is not set
+# CONFIG_RFKILL is not set
+CONFIG_NET_9P=y
+CONFIG_NET_9P_VIRTIO=y
+# CONFIG_NET_9P_XEN is not set
+# CONFIG_NET_9P_DEBUG is not set
+# CONFIG_CAIF is not set
+# CONFIG_CEPH_LIB is not set
+# CONFIG_NFC is not set
+# CONFIG_PSAMPLE is not set
+# CONFIG_NET_IFE is not set
+# CONFIG_LWTUNNEL is not set
+CONFIG_DST_CACHE=y
+CONFIG_GRO_CELLS=y
+CONFIG_NET_DEVLINK=y
+CONFIG_PAGE_POOL=y
+CONFIG_FAILOVER=y
+CONFIG_HAVE_EBPF_JIT=y
+
+#
+# Device Drivers
+#
+CONFIG_ARM_AMBA=y
+CONFIG_TEGRA_AHB=y
+CONFIG_HAVE_PCI=y
+CONFIG_PCI=y
+CONFIG_PCI_DOMAINS=y
+CONFIG_PCI_DOMAINS_GENERIC=y
+CONFIG_PCI_SYSCALL=y
+CONFIG_PCIEPORTBUS=y
+# CONFIG_HOTPLUG_PCI_PCIE is not set
+CONFIG_PCIEAER=y
+# CONFIG_PCIEAER_INJECT is not set
+# CONFIG_PCIE_ECRC is not set
+CONFIG_PCIEASPM=y
+# CONFIG_PCIEASPM_DEBUG is not set
+CONFIG_PCIEASPM_DEFAULT=y
+# CONFIG_PCIEASPM_POWERSAVE is not set
+# CONFIG_PCIEASPM_POWER_SUPERSAVE is not set
+# CONFIG_PCIEASPM_PERFORMANCE is not set
+CONFIG_PCIE_PME=y
+# CONFIG_PCIE_DPC is not set
+# CONFIG_PCIE_PTM is not set
+# CONFIG_PCIE_BW is not set
+CONFIG_PCI_MSI=y
+CONFIG_PCI_MSI_IRQ_DOMAIN=y
+CONFIG_PCI_QUIRKS=y
+# CONFIG_PCI_DEBUG is not set
+# CONFIG_PCI_REALLOC_ENABLE_AUTO is not set
+# CONFIG_PCI_STUB is not set
+# CONFIG_PCI_PF_STUB is not set
+CONFIG_PCI_ATS=y
+CONFIG_PCI_ECAM=y
+CONFIG_PCI_BRIDGE_EMUL=y
+CONFIG_PCI_IOV=y
+# CONFIG_PCI_PRI is not set
+# CONFIG_PCI_PASID is not set
+CONFIG_PCI_LABEL=y
+CONFIG_HOTPLUG_PCI=y
+CONFIG_HOTPLUG_PCI_ACPI=y
+# CONFIG_HOTPLUG_PCI_ACPI_IBM is not set
+# CONFIG_HOTPLUG_PCI_CPCI is not set
+# CONFIG_HOTPLUG_PCI_SHPC is not set
+
+#
+# PCI controller drivers
+#
+CONFIG_PCI_AARDVARK=y
+
+#
+# Cadence PCIe controllers support
+#
+# CONFIG_PCIE_CADENCE_HOST is not set
+# end of Cadence PCIe controllers support
+
+# CONFIG_PCIE_XILINX_NWL is not set
+# CONFIG_PCI_FTPCI100 is not set
+CONFIG_PCI_TEGRA=y
+CONFIG_PCIE_RCAR=y
+CONFIG_PCI_HOST_COMMON=y
+CONFIG_PCI_HOST_GENERIC=y
+# CONFIG_PCIE_XILINX is not set
+CONFIG_PCI_XGENE=y
+CONFIG_PCI_XGENE_MSI=y
+CONFIG_PCIE_IPROC=y
+CONFIG_PCIE_IPROC_PLATFORM=y
+CONFIG_PCIE_IPROC_MSI=y
+CONFIG_PCIE_ALTERA=y
+CONFIG_PCIE_ALTERA_MSI=y
+CONFIG_PCI_HOST_THUNDER_PEM=y
+CONFIG_PCI_HOST_THUNDER_ECAM=y
+CONFIG_PCIE_ROCKCHIP=y
+CONFIG_PCIE_ROCKCHIP_HOST=m
+# CONFIG_PCIE_MEDIATEK is not set
+CONFIG_PCIE_MICROSEMI=m
+CONFIG_PCIE_FPGA=m
+CONFIG_PCIE_MFPGA=y
+
+#
+# DesignWare PCI Core Support
+#
+CONFIG_PCIE_DW=y
+CONFIG_PCIE_DW_HOST=y
+# CONFIG_PCIE_DW_PLAT_HOST is not set
+CONFIG_PCI_IMX6=y
+# CONFIG_PCI_IMX6_COMPLIANCE_TEST is not set
+# CONFIG_EP_MODE_IN_EP_RC_SYS is not set
+# CONFIG_RC_MODE_IN_EP_RC_SYS is not set
+CONFIG_PCI_KEYSTONE=y
+CONFIG_PCI_KEYSTONE_HOST=y
+CONFIG_PCI_LAYERSCAPE=y
+CONFIG_PCI_HISI=y
+CONFIG_PCIE_QCOM=y
+CONFIG_PCIE_ARMADA_8K=y
+CONFIG_PCIE_KIRIN=y
+CONFIG_PCIE_HISI_STB=y
+# CONFIG_PCI_MESON is not set
+CONFIG_PCIE_TEGRA194=m
+# CONFIG_PCIE_UNIPHIER is not set
+# CONFIG_PCIE_AL is not set
+# end of DesignWare PCI Core Support
+
+#
+# Mobiveil PCIe Core Support
+#
+CONFIG_PCIE_MOBIVEIL=y
+CONFIG_PCIE_MOBIVEIL_HOST=y
+# CONFIG_PCIE_MOBIVEIL_PLAT is not set
+CONFIG_PCIE_LAYERSCAPE_GEN4=y
+# end of Mobiveil PCIe Core Support
+# end of PCI controller drivers
+
+#
+# PCI Endpoint
+#
+# CONFIG_PCI_ENDPOINT is not set
+# end of PCI Endpoint
+
+#
+# PCI switch controller drivers
+#
+# CONFIG_PCI_SW_SWITCHTEC is not set
+# end of PCI switch controller drivers
+
+# CONFIG_PCCARD is not set
+# CONFIG_RAPIDIO is not set
+
+#
+# Generic Driver Options
+#
+# CONFIG_UEVENT_HELPER is not set
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+
+#
+# Firmware loader
+#
+CONFIG_FW_LOADER=y
+CONFIG_FW_LOADER_PAGED_BUF=y
+CONFIG_EXTRA_FIRMWARE="microchip/mscc_vsc8584_revb_int8051_fb48.bin microchip/mscc_vsc8574_revb_int8051_29e8.bin"
+CONFIG_EXTRA_FIRMWARE_DIR="/lib/firmware"
+CONFIG_FW_LOADER_USER_HELPER=y
+CONFIG_FW_LOADER_USER_HELPER_FALLBACK=y
+# CONFIG_FW_LOADER_COMPRESS is not set
+# end of Firmware loader
+
+CONFIG_WANT_DEV_COREDUMP=y
+CONFIG_ALLOW_DEV_COREDUMP=y
+CONFIG_DEV_COREDUMP=y
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_DEBUG_TEST_DRIVER_REMOVE is not set
+# CONFIG_TEST_ASYNC_DRIVER_PROBE is not set
+CONFIG_SYS_HYPERVISOR=y
+CONFIG_GENERIC_CPU_AUTOPROBE=y
+CONFIG_GENERIC_CPU_VULNERABILITIES=y
+CONFIG_SOC_BUS=y
+CONFIG_REGMAP=y
+CONFIG_REGMAP_I2C=y
+CONFIG_REGMAP_SPI=y
+CONFIG_REGMAP_SPMI=y
+CONFIG_REGMAP_MMIO=y
+CONFIG_REGMAP_IRQ=y
+CONFIG_DMA_SHARED_BUFFER=y
+# CONFIG_DMA_FENCE_TRACE is not set
+CONFIG_GENERIC_ARCH_TOPOLOGY=y
+# end of Generic Driver Options
+
+#
+# Bus devices
+#
+CONFIG_BRCMSTB_GISB_ARB=y
+# CONFIG_MOXTET is not set
+CONFIG_HISILICON_LPC=y
+# CONFIG_IMX_WEIM is not set
+CONFIG_QCOM_EBI2=y
+CONFIG_SIMPLE_PM_BUS=y
+CONFIG_SUN50I_DE2_BUS=y
+CONFIG_SUNXI_RSB=y
+# CONFIG_TEGRA_ACONNECT is not set
+# CONFIG_TEGRA_GMI is not set
+CONFIG_UNIPHIER_SYSTEM_BUS=y
+CONFIG_VEXPRESS_CONFIG=y
+CONFIG_FSL_MC_BUS=y
+CONFIG_FSL_MC_UAPI_SUPPORT=y
+# end of Bus devices
+
+# CONFIG_CONNECTOR is not set
+# CONFIG_GNSS is not set
+CONFIG_MTD=y
+# CONFIG_MTD_TESTS is not set
+
+#
+# Partition parsers
+#
+# CONFIG_MTD_AR7_PARTS is not set
+CONFIG_MTD_CMDLINE_PARTS=y
+CONFIG_MTD_OF_PARTS=y
+# CONFIG_MTD_AFS_PARTS is not set
+# CONFIG_MTD_REDBOOT_PARTS is not set
+# end of Partition parsers
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_SM_FTL is not set
+# CONFIG_MTD_OOPS is not set
+# CONFIG_MTD_SWAP is not set
+# CONFIG_MTD_PARTITIONED_MASTER is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_GEN_PROBE=y
+CONFIG_MTD_CFI_ADV_OPTIONS=y
+CONFIG_MTD_CFI_NOSWAP=y
+# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
+# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set
+# CONFIG_MTD_CFI_GEOMETRY is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_OTP is not set
+CONFIG_MTD_CFI_INTELEXT=y
+CONFIG_MTD_CFI_AMDSTD=y
+CONFIG_MTD_CFI_STAA=y
+CONFIG_MTD_CFI_UTIL=y
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+# end of RAM/ROM/Flash chip drivers
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+CONFIG_MTD_PHYSMAP=y
+# CONFIG_MTD_PHYSMAP_COMPAT is not set
+CONFIG_MTD_PHYSMAP_OF=y
+# CONFIG_MTD_PHYSMAP_VERSATILE is not set
+# CONFIG_MTD_PHYSMAP_GEMINI is not set
+# CONFIG_MTD_INTEL_VR_NOR is not set
+# CONFIG_MTD_PLATRAM is not set
+# end of Mapping drivers for chip access
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_PMC551 is not set
+CONFIG_MTD_DATAFLASH=y
+# CONFIG_MTD_DATAFLASH_WRITE_VERIFY is not set
+# CONFIG_MTD_DATAFLASH_OTP is not set
+# CONFIG_MTD_MCHP23K256 is not set
+CONFIG_MTD_SST25L=y
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOCG3 is not set
+# end of Self-contained MTD device drivers
+
+CONFIG_MTD_NAND_CORE=y
+# CONFIG_MTD_ONENAND is not set
+CONFIG_MTD_NAND_ECC_SW_HAMMING=y
+# CONFIG_MTD_NAND_ECC_SW_HAMMING_SMC is not set
+CONFIG_MTD_RAW_NAND=y
+# CONFIG_MTD_NAND_ECC_SW_BCH is not set
+
+#
+# Raw/parallel NAND flash controllers
+#
+CONFIG_MTD_NAND_DENALI=y
+# CONFIG_MTD_NAND_DENALI_PCI is not set
+CONFIG_MTD_NAND_DENALI_DT=y
+# CONFIG_MTD_NAND_CAFE is not set
+CONFIG_MTD_NAND_MARVELL=y
+# CONFIG_MTD_NAND_BRCMNAND is not set
+CONFIG_MTD_NAND_GPMI_NAND=y
+CONFIG_MTD_NAND_FSL_IFC=y
+# CONFIG_MTD_NAND_MXC is not set
+# CONFIG_MTD_NAND_SUNXI is not set
+# CONFIG_MTD_NAND_HISI504 is not set
+CONFIG_MTD_NAND_QCOM=y
+# CONFIG_MTD_NAND_MTK is not set
+# CONFIG_MTD_NAND_MXIC is not set
+# CONFIG_MTD_NAND_TEGRA is not set
+# CONFIG_MTD_NAND_MESON is not set
+# CONFIG_MTD_NAND_GPIO is not set
+# CONFIG_MTD_NAND_PLATFORM is not set
+
+#
+# Misc
+#
+# CONFIG_MTD_NAND_NANDSIM is not set
+# CONFIG_MTD_NAND_RICOH is not set
+# CONFIG_MTD_NAND_DISKONCHIP is not set
+# CONFIG_MTD_SPI_NAND is not set
+
+#
+# LPDDR & LPDDR2 PCM memory drivers
+#
+# CONFIG_MTD_LPDDR is not set
+# end of LPDDR & LPDDR2 PCM memory drivers
+
+CONFIG_MTD_SPI_NOR=y
+# CONFIG_MTD_SPI_NOR_USE_4K_SECTORS is not set
+# CONFIG_SPI_CADENCE_QUADSPI is not set
+# CONFIG_SPI_HISI_SFC is not set
+# CONFIG_SPI_MTK_QUADSPI is not set
+CONFIG_MTD_UBI=y
+CONFIG_MTD_UBI_WL_THRESHOLD=4096
+CONFIG_MTD_UBI_BEB_LIMIT=20
+# CONFIG_MTD_UBI_FASTMAP is not set
+# CONFIG_MTD_UBI_GLUEBI is not set
+# CONFIG_MTD_UBI_BLOCK is not set
+# CONFIG_MTD_HYPERBUS is not set
+CONFIG_DTC=y
+CONFIG_OF=y
+# CONFIG_OF_UNITTEST is not set
+CONFIG_OF_FLATTREE=y
+CONFIG_OF_EARLY_FLATTREE=y
+CONFIG_OF_KOBJ=y
+CONFIG_OF_DYNAMIC=y
+CONFIG_OF_ADDRESS=y
+CONFIG_OF_IRQ=y
+CONFIG_OF_NET=y
+CONFIG_OF_MDIO=y
+CONFIG_OF_RESERVED_MEM=y
+CONFIG_OF_RESOLVE=y
+CONFIG_OF_OVERLAY=y
+CONFIG_OF_NUMA=y
+# CONFIG_PARPORT is not set
+CONFIG_PNP=y
+CONFIG_PNP_DEBUG_MESSAGES=y
+
+#
+# Protocols
+#
+CONFIG_PNPACPI=y
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_NULL_BLK is not set
+# CONFIG_BLK_DEV_PCIESSD_MTIP32XX is not set
+# CONFIG_BLK_DEV_UMEM is not set
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_BLK_DEV_LOOP_MIN_COUNT=8
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+# CONFIG_BLK_DEV_DRBD is not set
+CONFIG_BLK_DEV_NBD=m
+# CONFIG_BLK_DEV_SKD is not set
+# CONFIG_BLK_DEV_SX8 is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=4096
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+CONFIG_XEN_BLKDEV_FRONTEND=y
+# CONFIG_XEN_BLKDEV_BACKEND is not set
+CONFIG_VIRTIO_BLK=y
+# CONFIG_VIRTIO_BLK_SCSI is not set
+# CONFIG_BLK_DEV_RBD is not set
+# CONFIG_BLK_DEV_RSXX is not set
+
+#
+# NVME Support
+#
+CONFIG_NVME_CORE=y
+CONFIG_BLK_DEV_NVME=y
+# CONFIG_NVME_MULTIPATH is not set
+# CONFIG_NVME_FC is not set
+# CONFIG_NVME_TCP is not set
+# CONFIG_NVME_TARGET is not set
+# end of NVME Support
+
+#
+# Misc devices
+#
+# CONFIG_AD525X_DPOT is not set
+# CONFIG_DUMMY_IRQ is not set
+# CONFIG_PHANTOM is not set
+# CONFIG_TIFM_CORE is not set
+# CONFIG_ICS932S401 is not set
+# CONFIG_ENCLOSURE_SERVICES is not set
+# CONFIG_HP_ILO is not set
+# CONFIG_QCOM_COINCELL is not set
+# CONFIG_QCOM_FASTRPC is not set
+# CONFIG_APDS9802ALS is not set
+# CONFIG_ISL29003 is not set
+# CONFIG_ISL29020 is not set
+CONFIG_SENSORS_FXOS8700=y
+CONFIG_SENSORS_FXAS2100X=y
+# CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_SENSORS_BH1770 is not set
+# CONFIG_SENSORS_APDS990X is not set
+# CONFIG_HMC6352 is not set
+# CONFIG_DS1682 is not set
+# CONFIG_LATTICE_ECP3_CONFIG is not set
+CONFIG_SRAM=y
+CONFIG_VEXPRESS_SYSCFG=y
+# CONFIG_PCI_ENDPOINT_TEST is not set
+# CONFIG_XILINX_SDFEC is not set
+# CONFIG_PVPANIC is not set
+# CONFIG_C2PORT is not set
+
+#
+# EEPROM support
+#
+CONFIG_EEPROM_AT24=y
+CONFIG_EEPROM_AT25=m
+# CONFIG_EEPROM_LEGACY is not set
+# CONFIG_EEPROM_MAX6875 is not set
+# CONFIG_EEPROM_93CX6 is not set
+# CONFIG_EEPROM_93XX46 is not set
+# CONFIG_EEPROM_IDT_89HPESX is not set
+# CONFIG_EEPROM_EE1004 is not set
+# end of EEPROM support
+
+# CONFIG_CB710_CORE is not set
+
+#
+# Texas Instruments shared transport line discipline
+#
+# CONFIG_TI_ST is not set
+# end of Texas Instruments shared transport line discipline
+
+# CONFIG_SENSORS_LIS3_I2C is not set
+# CONFIG_ALTERA_STAPL is not set
+
+#
+# Intel MIC & related support
+#
+
+#
+# Intel MIC Bus Driver
+#
+
+#
+# SCIF Bus Driver
+#
+
+#
+# VOP Bus Driver
+#
+# CONFIG_VOP_BUS is not set
+
+#
+# Intel MIC Host Driver
+#
+
+#
+# Intel MIC Card Driver
+#
+
+#
+# SCIF Driver
+#
+
+#
+# Intel MIC Coprocessor State Management (COSM) Drivers
+#
+
+#
+# VOP Driver
+#
+# end of Intel MIC & related support
+
+# CONFIG_GENWQE is not set
+# CONFIG_ECHO is not set
+# CONFIG_MISC_ALCOR_PCI is not set
+# CONFIG_MISC_RTSX_PCI is not set
+# CONFIG_MISC_RTSX_USB is not set
+# CONFIG_HABANA_AI is not set
+# end of Misc devices
+
+#
+# SCSI device support
+#
+CONFIG_SCSI_MOD=y
+CONFIG_RAID_ATTRS=m
+CONFIG_SCSI=y
+CONFIG_SCSI_DMA=y
+# CONFIG_SCSI_PROC_FS is not set
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_BLK_DEV_SR is not set
+# CONFIG_CHR_DEV_SG is not set
+# CONFIG_CHR_DEV_SCH is not set
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+# CONFIG_SCSI_SCAN_ASYNC is not set
+
+#
+# SCSI Transports
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+CONFIG_SCSI_SAS_ATTRS=y
+CONFIG_SCSI_SAS_LIBSAS=y
+CONFIG_SCSI_SAS_ATA=y
+CONFIG_SCSI_SAS_HOST_SMP=y
+# CONFIG_SCSI_SRP_ATTRS is not set
+# end of SCSI Transports
+
+CONFIG_SCSI_LOWLEVEL=y
+# CONFIG_ISCSI_TCP is not set
+# CONFIG_ISCSI_BOOT_SYSFS is not set
+# CONFIG_SCSI_CXGB3_ISCSI is not set
+# CONFIG_SCSI_CXGB4_ISCSI is not set
+# CONFIG_SCSI_BNX2_ISCSI is not set
+# CONFIG_BE2ISCSI is not set
+# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
+# CONFIG_SCSI_HPSA is not set
+# CONFIG_SCSI_3W_9XXX is not set
+# CONFIG_SCSI_3W_SAS is not set
+# CONFIG_SCSI_ACARD is not set
+# CONFIG_SCSI_AACRAID is not set
+# CONFIG_SCSI_AIC7XXX is not set
+# CONFIG_SCSI_AIC79XX is not set
+# CONFIG_SCSI_AIC94XX is not set
+CONFIG_SCSI_HISI_SAS=y
+CONFIG_SCSI_HISI_SAS_PCI=y
+# CONFIG_SCSI_MVSAS is not set
+# CONFIG_SCSI_MVUMI is not set
+# CONFIG_SCSI_ADVANSYS is not set
+# CONFIG_SCSI_ARCMSR is not set
+# CONFIG_SCSI_ESAS2R is not set
+# CONFIG_MEGARAID_NEWGEN is not set
+# CONFIG_MEGARAID_LEGACY is not set
+# CONFIG_MEGARAID_SAS is not set
+CONFIG_SCSI_MPT3SAS=m
+CONFIG_SCSI_MPT2SAS_MAX_SGE=128
+CONFIG_SCSI_MPT3SAS_MAX_SGE=128
+# CONFIG_SCSI_MPT2SAS is not set
+# CONFIG_SCSI_SMARTPQI is not set
+CONFIG_SCSI_UFSHCD=y
+# CONFIG_SCSI_UFSHCD_PCI is not set
+CONFIG_SCSI_UFSHCD_PLATFORM=y
+# CONFIG_SCSI_UFS_CDNS_PLATFORM is not set
+# CONFIG_SCSI_UFS_DWC_TC_PLATFORM is not set
+CONFIG_SCSI_UFS_QCOM=m
+# CONFIG_SCSI_UFS_MEDIATEK is not set
+CONFIG_SCSI_UFS_HISI=y
+# CONFIG_SCSI_UFS_BSG is not set
+# CONFIG_SCSI_HPTIOP is not set
+# CONFIG_SCSI_MYRB is not set
+# CONFIG_SCSI_MYRS is not set
+# CONFIG_XEN_SCSI_FRONTEND is not set
+# CONFIG_SCSI_SNIC is not set
+# CONFIG_SCSI_DMX3191D is not set
+# CONFIG_SCSI_FDOMAIN_PCI is not set
+# CONFIG_SCSI_GDTH is not set
+# CONFIG_SCSI_IPS is not set
+# CONFIG_SCSI_INITIO is not set
+# CONFIG_SCSI_INIA100 is not set
+# CONFIG_SCSI_STEX is not set
+# CONFIG_SCSI_SYM53C8XX_2 is not set
+# CONFIG_SCSI_IPR is not set
+# CONFIG_SCSI_QLOGIC_1280 is not set
+# CONFIG_SCSI_QLA_ISCSI is not set
+# CONFIG_SCSI_DC395x is not set
+# CONFIG_SCSI_AM53C974 is not set
+# CONFIG_SCSI_WD719X is not set
+# CONFIG_SCSI_DEBUG is not set
+# CONFIG_SCSI_PMCRAID is not set
+# CONFIG_SCSI_PM8001 is not set
+# CONFIG_SCSI_VIRTIO is not set
+# CONFIG_SCSI_DH is not set
+# end of SCSI device support
+
+CONFIG_HAVE_PATA_PLATFORM=y
+CONFIG_ATA=y
+CONFIG_ATA_VERBOSE_ERROR=y
+CONFIG_ATA_ACPI=y
+# CONFIG_SATA_ZPODD is not set
+CONFIG_SATA_PMP=y
+
+#
+# Controllers with non-SFF native interface
+#
+CONFIG_SATA_AHCI=y
+CONFIG_SATA_MOBILE_LPM_POLICY=0
+CONFIG_SATA_AHCI_PLATFORM=y
+# CONFIG_AHCI_BRCM is not set
+CONFIG_AHCI_IMX=y
+CONFIG_AHCI_CEVA=y
+# CONFIG_AHCI_MTK is not set
+CONFIG_AHCI_MVEBU=y
+# CONFIG_AHCI_SUNXI is not set
+# CONFIG_AHCI_TEGRA is not set
+CONFIG_AHCI_XGENE=y
+CONFIG_AHCI_QORIQ=y
+# CONFIG_SATA_AHCI_SEATTLE is not set
+# CONFIG_SATA_INIC162X is not set
+# CONFIG_SATA_ACARD_AHCI is not set
+CONFIG_SATA_SIL24=y
+CONFIG_ATA_SFF=y
+
+#
+# SFF controllers with custom DMA interface
+#
+# CONFIG_PDC_ADMA is not set
+# CONFIG_SATA_QSTOR is not set
+# CONFIG_SATA_SX4 is not set
+CONFIG_ATA_BMDMA=y
+
+#
+# SATA SFF controllers with BMDMA
+#
+# CONFIG_ATA_PIIX is not set
+# CONFIG_SATA_DWC is not set
+# CONFIG_SATA_MV is not set
+# CONFIG_SATA_NV is not set
+# CONFIG_SATA_PROMISE is not set
+CONFIG_SATA_RCAR=y
+# CONFIG_SATA_SIL is not set
+# CONFIG_SATA_SIS is not set
+# CONFIG_SATA_SVW is not set
+# CONFIG_SATA_ULI is not set
+# CONFIG_SATA_VIA is not set
+# CONFIG_SATA_VITESSE is not set
+
+#
+# PATA SFF controllers with BMDMA
+#
+# CONFIG_PATA_ALI is not set
+# CONFIG_PATA_AMD is not set
+# CONFIG_PATA_ARTOP is not set
+# CONFIG_PATA_ATIIXP is not set
+# CONFIG_PATA_ATP867X is not set
+# CONFIG_PATA_CMD64X is not set
+# CONFIG_PATA_CYPRESS is not set
+# CONFIG_PATA_EFAR is not set
+# CONFIG_PATA_HPT366 is not set
+# CONFIG_PATA_HPT37X is not set
+# CONFIG_PATA_HPT3X2N is not set
+# CONFIG_PATA_HPT3X3 is not set
+# CONFIG_PATA_IMX is not set
+# CONFIG_PATA_IT8213 is not set
+# CONFIG_PATA_IT821X is not set
+# CONFIG_PATA_JMICRON is not set
+# CONFIG_PATA_MARVELL is not set
+# CONFIG_PATA_NETCELL is not set
+# CONFIG_PATA_NINJA32 is not set
+# CONFIG_PATA_NS87415 is not set
+# CONFIG_PATA_OLDPIIX is not set
+# CONFIG_PATA_OPTIDMA is not set
+# CONFIG_PATA_PDC2027X is not set
+# CONFIG_PATA_PDC_OLD is not set
+# CONFIG_PATA_RADISYS is not set
+# CONFIG_PATA_RDC is not set
+# CONFIG_PATA_SCH is not set
+# CONFIG_PATA_SERVERWORKS is not set
+# CONFIG_PATA_SIL680 is not set
+# CONFIG_PATA_SIS is not set
+# CONFIG_PATA_TOSHIBA is not set
+# CONFIG_PATA_TRIFLEX is not set
+# CONFIG_PATA_VIA is not set
+# CONFIG_PATA_WINBOND is not set
+
+#
+# PIO-only SFF controllers
+#
+# CONFIG_PATA_CMD640_PCI is not set
+# CONFIG_PATA_MPIIX is not set
+# CONFIG_PATA_NS87410 is not set
+# CONFIG_PATA_OPTI is not set
+CONFIG_PATA_PLATFORM=y
+CONFIG_PATA_OF_PLATFORM=y
+# CONFIG_PATA_RZ1000 is not set
+
+#
+# Generic fallback / legacy drivers
+#
+# CONFIG_PATA_ACPI is not set
+# CONFIG_ATA_GENERIC is not set
+# CONFIG_PATA_LEGACY is not set
+CONFIG_MD=y
+CONFIG_BLK_DEV_MD=m
+# CONFIG_MD_LINEAR is not set
+# CONFIG_MD_RAID0 is not set
+# CONFIG_MD_RAID1 is not set
+# CONFIG_MD_RAID10 is not set
+# CONFIG_MD_RAID456 is not set
+# CONFIG_MD_MULTIPATH is not set
+# CONFIG_MD_FAULTY is not set
+# CONFIG_BCACHE is not set
+CONFIG_BLK_DEV_DM_BUILTIN=y
+CONFIG_BLK_DEV_DM=m
+# CONFIG_DM_DEBUG is not set
+# CONFIG_DM_UNSTRIPED is not set
+# CONFIG_DM_CRYPT is not set
+# CONFIG_DM_SNAPSHOT is not set
+# CONFIG_DM_THIN_PROVISIONING is not set
+# CONFIG_DM_CACHE is not set
+# CONFIG_DM_WRITECACHE is not set
+# CONFIG_DM_ERA is not set
+# CONFIG_DM_CLONE is not set
+CONFIG_DM_MIRROR=m
+# CONFIG_DM_LOG_USERSPACE is not set
+# CONFIG_DM_RAID is not set
+CONFIG_DM_ZERO=m
+# CONFIG_DM_MULTIPATH is not set
+# CONFIG_DM_DELAY is not set
+# CONFIG_DM_DUST is not set
+# CONFIG_DM_UEVENT is not set
+# CONFIG_DM_FLAKEY is not set
+# CONFIG_DM_VERITY is not set
+# CONFIG_DM_SWITCH is not set
+# CONFIG_DM_LOG_WRITES is not set
+# CONFIG_DM_INTEGRITY is not set
+# CONFIG_TARGET_CORE is not set
+# CONFIG_FUSION is not set
+
+#
+# IEEE 1394 (FireWire) support
+#
+# CONFIG_FIREWIRE is not set
+# CONFIG_FIREWIRE_NOSY is not set
+# end of IEEE 1394 (FireWire) support
+
+CONFIG_NETDEVICES=y
+CONFIG_MII=y
+CONFIG_NET_CORE=y
+# CONFIG_BONDING is not set
+# CONFIG_DUMMY is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_NET_FC is not set
+# CONFIG_IFB is not set
+# CONFIG_NET_TEAM is not set
+CONFIG_MACVLAN=y
+CONFIG_MACVTAP=y
+# CONFIG_IPVLAN is not set
+CONFIG_VXLAN=m
+# CONFIG_GENEVE is not set
+# CONFIG_GTP is not set
+# CONFIG_MACSEC is not set
+# CONFIG_NETCONSOLE is not set
+CONFIG_TUN=y
+CONFIG_TAP=y
+# CONFIG_TUN_VNET_CROSS_LE is not set
+CONFIG_VETH=m
+CONFIG_VIRTIO_NET=y
+# CONFIG_NLMON is not set
+# CONFIG_ARCNET is not set
+
+#
+# CAIF transport drivers
+#
+
+#
+# Distributed Switch Architecture drivers
+#
+# CONFIG_B53 is not set
+# CONFIG_NET_DSA_BCM_SF2 is not set
+# CONFIG_NET_DSA_LOOP is not set
+# CONFIG_NET_DSA_LANTIQ_GSWIP is not set
+# CONFIG_NET_DSA_MT7530 is not set
+# CONFIG_NET_DSA_MV88E6060 is not set
+# CONFIG_NET_DSA_MICROCHIP_KSZ9477 is not set
+# CONFIG_NET_DSA_MICROCHIP_KSZ8795 is not set
+# CONFIG_NET_DSA_MV88E6XXX is not set
+CONFIG_NET_DSA_MSCC_FELIX=y
+CONFIG_MSCC_FELIX_SWITCH_TSN=y
+# CONFIG_NET_DSA_SJA1105 is not set
+# CONFIG_NET_DSA_QCA8K is not set
+# CONFIG_NET_DSA_REALTEK_SMI is not set
+# CONFIG_NET_DSA_SMSC_LAN9303_I2C is not set
+# CONFIG_NET_DSA_SMSC_LAN9303_MDIO is not set
+# CONFIG_NET_DSA_VITESSE_VSC73XX_SPI is not set
+# CONFIG_NET_DSA_VITESSE_VSC73XX_PLATFORM is not set
+# end of Distributed Switch Architecture drivers
+
+CONFIG_ETHERNET=y
+CONFIG_MDIO=m
+CONFIG_NET_VENDOR_3COM=y
+# CONFIG_VORTEX is not set
+# CONFIG_TYPHOON is not set
+CONFIG_NET_VENDOR_ADAPTEC=y
+# CONFIG_ADAPTEC_STARFIRE is not set
+CONFIG_NET_VENDOR_AGERE=y
+# CONFIG_ET131X is not set
+CONFIG_NET_VENDOR_ALACRITECH=y
+# CONFIG_SLICOSS is not set
+CONFIG_NET_VENDOR_ALLWINNER=y
+# CONFIG_SUN4I_EMAC is not set
+CONFIG_NET_VENDOR_ALTEON=y
+# CONFIG_ACENIC is not set
+# CONFIG_ALTERA_TSE is not set
+CONFIG_NET_VENDOR_AMAZON=y
+# CONFIG_ENA_ETHERNET is not set
+CONFIG_NET_VENDOR_AMD=y
+# CONFIG_AMD8111_ETH is not set
+# CONFIG_PCNET32 is not set
+CONFIG_AMD_XGBE=y
+CONFIG_NET_XGENE=y
+# CONFIG_NET_XGENE_V2 is not set
+CONFIG_NET_VENDOR_AQUANTIA=y
+# CONFIG_AQTION is not set
+CONFIG_NET_VENDOR_ARC=y
+# CONFIG_EMAC_ROCKCHIP is not set
+CONFIG_NET_VENDOR_ATHEROS=y
+# CONFIG_ATL2 is not set
+# CONFIG_ATL1 is not set
+# CONFIG_ATL1E is not set
+CONFIG_ATL1C=m
+# CONFIG_ALX is not set
+CONFIG_NET_VENDOR_AURORA=y
+# CONFIG_AURORA_NB8800 is not set
+CONFIG_NET_VENDOR_BROADCOM=y
+# CONFIG_B44 is not set
+# CONFIG_BCMGENET is not set
+# CONFIG_BNX2 is not set
+# CONFIG_CNIC is not set
+# CONFIG_TIGON3 is not set
+CONFIG_BNX2X=m
+CONFIG_BNX2X_SRIOV=y
+CONFIG_BGMAC=y
+CONFIG_BGMAC_PLATFORM=y
+# CONFIG_SYSTEMPORT is not set
+# CONFIG_BNXT is not set
+CONFIG_NET_VENDOR_BROCADE=y
+# CONFIG_BNA is not set
+CONFIG_NET_VENDOR_CADENCE=y
+CONFIG_MACB=y
+CONFIG_MACB_USE_HWSTAMP=y
+# CONFIG_MACB_PCI is not set
+CONFIG_NET_VENDOR_CAVIUM=y
+CONFIG_THUNDER_NIC_PF=y
+# CONFIG_THUNDER_NIC_VF is not set
+CONFIG_THUNDER_NIC_BGX=y
+CONFIG_THUNDER_NIC_RGX=y
+# CONFIG_CAVIUM_PTP is not set
+# CONFIG_LIQUIDIO is not set
+# CONFIG_LIQUIDIO_VF is not set
+CONFIG_NET_VENDOR_CHELSIO=y
+# CONFIG_CHELSIO_T1 is not set
+# CONFIG_CHELSIO_T3 is not set
+# CONFIG_CHELSIO_T4 is not set
+# CONFIG_CHELSIO_T4VF is not set
+CONFIG_NET_VENDOR_CISCO=y
+# CONFIG_ENIC is not set
+CONFIG_NET_VENDOR_CORTINA=y
+# CONFIG_GEMINI_ETHERNET is not set
+# CONFIG_DNET is not set
+CONFIG_NET_VENDOR_DEC=y
+# CONFIG_NET_TULIP is not set
+CONFIG_NET_VENDOR_DLINK=y
+# CONFIG_DL2K is not set
+# CONFIG_SUNDANCE is not set
+CONFIG_NET_VENDOR_EMULEX=y
+# CONFIG_BE2NET is not set
+CONFIG_NET_VENDOR_EZCHIP=y
+# CONFIG_EZCHIP_NPS_MANAGEMENT_ENET is not set
+CONFIG_NET_VENDOR_FREESCALE=y
+CONFIG_FEC=y
+# CONFIG_FSL_FMAN is not set
+# CONFIG_FSL_PQ_MDIO is not set
+CONFIG_FSL_XGMAC_MDIO=y
+# CONFIG_GIANFAR is not set
+
+#
+# Frame Manager support
+#
+CONFIG_FSL_SDK_FMAN=y
+# CONFIG_FSL_SDK_FMAN_TEST is not set
+
+#
+# FMAN Processor support
+#
+CONFIG_FMAN_ARM=y
+# CONFIG_FMAN_P3040_P4080_P5020 is not set
+# CONFIG_FMAN_P1023 is not set
+# CONFIG_FMAN_V3H is not set
+# CONFIG_FMAN_V3L is not set
+# end of FMAN Processor support
+
+# CONFIG_FSL_SDK_FMAN_RTC_API is not set
+# CONFIG_FMAN_MIB_CNT_OVF_IRQ_EN is not set
+CONFIG_FSL_FM_MAX_FRAME_SIZE=1522
+CONFIG_FSL_FM_RX_EXTRA_HEADROOM=64
+# CONFIG_FMAN_PFC is not set
+# end of Frame Manager support
+
+CONFIG_FSL_SDK_DPAA_ETH=y
+# CONFIG_FSL_DPAA_HOOKS is not set
+# CONFIG_FSL_DPAA_CEETM is not set
+CONFIG_FSL_DPAA_OFFLINE_PORTS=y
+CONFIG_FSL_DPAA_ADVANCED_DRIVERS=y
+# CONFIG_FSL_DPAA_ETH_JUMBO_FRAME is not set
+# CONFIG_FSL_DPAA_TS is not set
+# CONFIG_FSL_DPAA_1588 is not set
+CONFIG_FSL_DPAA_ETH_MAX_BUF_COUNT=128
+CONFIG_FSL_DPAA_ETH_REFILL_THRESHOLD=80
+CONFIG_FSL_DPAA_CS_THRESHOLD_1G=0x06000000
+CONFIG_FSL_DPAA_CS_THRESHOLD_10G=0x10000000
+CONFIG_FSL_DPAA_INGRESS_CS_THRESHOLD=0x10000000
+CONFIG_FSL_DPAA_ETH_DEBUGFS=y
+# CONFIG_FSL_DPAA_ETH_DEBUG is not set
+# CONFIG_FSL_DPAA_DBG_LOOP is not set
+CONFIG_FSL_DPAA2_ETH=y
+# CONFIG_FSL_DPAA2_ETH_USE_ERR_QUEUE is not set
+# CONFIG_FSL_DPAA2_ETH_CEETM is not set
+CONFIG_FSL_DPAA2_PTP_CLOCK=y
+CONFIG_FSL_ENETC=y
+CONFIG_FSL_ENETC_VF=y
+CONFIG_FSL_ENETC_MDIO=y
+CONFIG_FSL_ENETC_CHARDEV_MDIO=m
+# CONFIG_FSL_ENETC_PTP_CLOCK is not set
+CONFIG_ENETC_TSN=y
+CONFIG_NET_VENDOR_GOOGLE=y
+# CONFIG_GVE is not set
+CONFIG_NET_VENDOR_HISILICON=y
+CONFIG_HIX5HD2_GMAC=y
+# CONFIG_HISI_FEMAC is not set
+# CONFIG_HIP04_ETH is not set
+CONFIG_HNS_MDIO=y
+CONFIG_HNS=y
+CONFIG_HNS_DSAF=y
+CONFIG_HNS_ENET=y
+CONFIG_HNS3=y
+CONFIG_HNS3_HCLGE=y
+# CONFIG_HNS3_HCLGEVF is not set
+CONFIG_HNS3_ENET=y
+CONFIG_NET_VENDOR_HP=y
+# CONFIG_HP100 is not set
+CONFIG_NET_VENDOR_HUAWEI=y
+# CONFIG_HINIC is not set
+CONFIG_NET_VENDOR_I825XX=y
+CONFIG_NET_VENDOR_INTEL=y
+# CONFIG_E100 is not set
+CONFIG_E1000=y
+CONFIG_E1000E=y
+CONFIG_IGB=y
+CONFIG_IGB_HWMON=y
+CONFIG_IGBVF=y
+# CONFIG_IXGB is not set
+# CONFIG_IXGBE is not set
+# CONFIG_IXGBEVF is not set
+# CONFIG_I40E is not set
+# CONFIG_I40EVF is not set
+# CONFIG_ICE is not set
+# CONFIG_FM10K is not set
+# CONFIG_IGC is not set
+# CONFIG_JME is not set
+CONFIG_NET_VENDOR_MARVELL=y
+CONFIG_MVMDIO=y
+CONFIG_MVNETA=y
+CONFIG_MVPP2=y
+# CONFIG_PXA168_ETH is not set
+# CONFIG_SKGE is not set
+CONFIG_SKY2=y
+# CONFIG_SKY2_DEBUG is not set
+# CONFIG_OCTEONTX2_AF is not set
+# CONFIG_NET_VENDOR_MEDIATEK is not set
+CONFIG_NET_VENDOR_MELLANOX=y
+CONFIG_MLX4_EN=m
+CONFIG_MLX4_CORE=m
+CONFIG_MLX4_DEBUG=y
+CONFIG_MLX4_CORE_GEN2=y
+CONFIG_MLX5_CORE=m
+# CONFIG_MLX5_FPGA is not set
+CONFIG_MLX5_CORE_EN=y
+CONFIG_MLX5_EN_ARFS=y
+CONFIG_MLX5_EN_RXNFC=y
+CONFIG_MLX5_MPFS=y
+CONFIG_MLX5_ESWITCH=y
+# CONFIG_MLX5_CORE_IPOIB is not set
+CONFIG_MLX5_SW_STEERING=y
+# CONFIG_MLXSW_CORE is not set
+CONFIG_MLXFW=m
+CONFIG_NET_VENDOR_MICREL=y
+# CONFIG_KS8842 is not set
+# CONFIG_KS8851 is not set
+# CONFIG_KS8851_MLL is not set
+# CONFIG_KSZ884X_PCI is not set
+CONFIG_NET_VENDOR_MICROCHIP=y
+# CONFIG_ENC28J60 is not set
+# CONFIG_ENCX24J600 is not set
+# CONFIG_LAN743X is not set
+CONFIG_NET_VENDOR_MICROSEMI=y
+CONFIG_MSCC_OCELOT_SWITCH=y
+# CONFIG_MSCC_OCELOT_SWITCH_OCELOT is not set
+CONFIG_NET_VENDOR_MYRI=y
+# CONFIG_MYRI10GE is not set
+# CONFIG_FEALNX is not set
+CONFIG_NET_VENDOR_NATSEMI=y
+# CONFIG_NATSEMI is not set
+# CONFIG_NS83820 is not set
+CONFIG_NET_VENDOR_NETERION=y
+# CONFIG_S2IO is not set
+# CONFIG_VXGE is not set
+CONFIG_NET_VENDOR_NETRONOME=y
+# CONFIG_NFP is not set
+CONFIG_NET_VENDOR_NI=y
+# CONFIG_NI_XGE_MANAGEMENT_ENET is not set
+CONFIG_NET_VENDOR_8390=y
+# CONFIG_NE2K_PCI is not set
+CONFIG_NET_VENDOR_NVIDIA=y
+# CONFIG_FORCEDETH is not set
+CONFIG_NET_VENDOR_OKI=y
+# CONFIG_ETHOC is not set
+CONFIG_NET_VENDOR_PACKET_ENGINES=y
+# CONFIG_HAMACHI is not set
+# CONFIG_YELLOWFIN is not set
+CONFIG_NET_VENDOR_PENSANDO=y
+# CONFIG_IONIC is not set
+CONFIG_NET_VENDOR_QLOGIC=y
+# CONFIG_QLA3XXX is not set
+# CONFIG_QLCNIC is not set
+# CONFIG_NETXEN_NIC is not set
+# CONFIG_QED is not set
+CONFIG_NET_VENDOR_QUALCOMM=y
+# CONFIG_QCA7000_SPI is not set
+# CONFIG_QCA7000_UART is not set
+# CONFIG_QCOM_EMAC is not set
+# CONFIG_RMNET is not set
+CONFIG_NET_VENDOR_RDC=y
+# CONFIG_R6040 is not set
+CONFIG_NET_VENDOR_REALTEK=y
+# CONFIG_8139CP is not set
+# CONFIG_8139TOO is not set
+# CONFIG_R8169 is not set
+CONFIG_NET_VENDOR_RENESAS=y
+# CONFIG_SH_ETH is not set
+CONFIG_RAVB=y
+CONFIG_NET_VENDOR_ROCKER=y
+# CONFIG_ROCKER is not set
+CONFIG_NET_VENDOR_SAMSUNG=y
+# CONFIG_SXGBE_ETH is not set
+CONFIG_NET_VENDOR_SEEQ=y
+CONFIG_NET_VENDOR_SOLARFLARE=y
+# CONFIG_SFC is not set
+# CONFIG_SFC_FALCON is not set
+CONFIG_NET_VENDOR_SILAN=y
+# CONFIG_SC92031 is not set
+CONFIG_NET_VENDOR_SIS=y
+# CONFIG_SIS900 is not set
+# CONFIG_SIS190 is not set
+CONFIG_NET_VENDOR_SMSC=y
+CONFIG_SMC91X=y
+# CONFIG_EPIC100 is not set
+CONFIG_SMSC911X=y
+# CONFIG_SMSC9420 is not set
+CONFIG_NET_VENDOR_SOCIONEXT=y
+CONFIG_SNI_AVE=y
+CONFIG_SNI_NETSEC=y
+# CONFIG_NET_VENDOR_STMICRO is not set
+CONFIG_NET_VENDOR_SUN=y
+# CONFIG_HAPPYMEAL is not set
+# CONFIG_SUNGEM is not set
+# CONFIG_CASSINI is not set
+# CONFIG_NIU is not set
+CONFIG_NET_VENDOR_SYNOPSYS=y
+# CONFIG_DWC_XLGMAC is not set
+CONFIG_NET_VENDOR_TEHUTI=y
+# CONFIG_TEHUTI is not set
+CONFIG_NET_VENDOR_TI=y
+# CONFIG_TI_CPSW_PHY_SEL is not set
+# CONFIG_TLAN is not set
+CONFIG_NET_VENDOR_VIA=y
+# CONFIG_VIA_RHINE is not set
+# CONFIG_VIA_VELOCITY is not set
+CONFIG_NET_VENDOR_WIZNET=y
+# CONFIG_WIZNET_W5100 is not set
+# CONFIG_WIZNET_W5300 is not set
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
+# CONFIG_NET_SB1000 is not set
+CONFIG_MDIO_DEVICE=y
+CONFIG_MDIO_BUS=y
+# CONFIG_MDIO_BCM_IPROC is not set
+# CONFIG_MDIO_BCM_UNIMAC is not set
+CONFIG_MDIO_BITBANG=y
+CONFIG_MDIO_BUS_MUX=y
+CONFIG_MDIO_BUS_MUX_BCM_IPROC=y
+# CONFIG_MDIO_BUS_MUX_GPIO is not set
+CONFIG_MDIO_BUS_MUX_MESON_G12A=m
+CONFIG_MDIO_BUS_MUX_MMIOREG=y
+CONFIG_MDIO_BUS_MUX_MULTIPLEXER=y
+CONFIG_MDIO_CAVIUM=y
+# CONFIG_MDIO_GPIO is not set
+# CONFIG_MDIO_HISI_FEMAC is not set
+# CONFIG_MDIO_MSCC_MIIM is not set
+# CONFIG_MDIO_OCTEON is not set
+# CONFIG_MDIO_SUN4I is not set
+CONFIG_MDIO_THUNDER=y
+CONFIG_MDIO_XGENE=y
+CONFIG_PHYLINK=y
+CONFIG_PHYLIB=y
+CONFIG_SWPHY=y
+# CONFIG_LED_TRIGGER_PHY is not set
+
+#
+# MII PHY device drivers
+#
+# CONFIG_SFP is not set
+# CONFIG_ADIN_PHY is not set
+# CONFIG_AMD_PHY is not set
+CONFIG_AQUANTIA_PHY=y
+# CONFIG_AX88796B_PHY is not set
+CONFIG_AT803X_PHY=y
+# CONFIG_AT803X_PHY_SMART_EEE is not set
+# CONFIG_BCM7XXX_PHY is not set
+# CONFIG_BCM87XX_PHY is not set
+# CONFIG_BROADCOM_PHY is not set
+# CONFIG_CICADA_PHY is not set
+# CONFIG_CORTINA_PHY is not set
+# CONFIG_DAVICOM_PHY is not set
+# CONFIG_DP83822_PHY is not set
+# CONFIG_DP83TC811_PHY is not set
+# CONFIG_DP83848_PHY is not set
+# CONFIG_DP83867_PHY is not set
+CONFIG_FIXED_PHY=y
+# CONFIG_ICPLUS_PHY is not set
+CONFIG_INPHI_PHY=y
+# CONFIG_INTEL_XWAY_PHY is not set
+# CONFIG_LSI_ET1011C_PHY is not set
+# CONFIG_LXT_PHY is not set
+CONFIG_MARVELL_PHY=m
+CONFIG_MARVELL_10G_PHY=m
+CONFIG_MESON_GXL_PHY=m
+CONFIG_MICREL_PHY=y
+CONFIG_MICROCHIP_PHY=m
+# CONFIG_MICROCHIP_T1_PHY is not set
+CONFIG_MICROSEMI_PHY=y
+# CONFIG_NATIONAL_PHY is not set
+CONFIG_NXP_TJA11XX_PHY=y
+# CONFIG_QSEMI_PHY is not set
+CONFIG_REALTEK_PHY=y
+# CONFIG_RENESAS_PHY is not set
+CONFIG_ROCKCHIP_PHY=y
+# CONFIG_SMSC_PHY is not set
+# CONFIG_STE10XP is not set
+# CONFIG_TERANETICS_PHY is not set
+CONFIG_VITESSE_PHY=y
+# CONFIG_XILINX_GMII2RGMII is not set
+# CONFIG_MICREL_KS8995MA is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+CONFIG_USB_NET_DRIVERS=y
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_KAWETH is not set
+CONFIG_USB_PEGASUS=m
+CONFIG_USB_RTL8150=m
+CONFIG_USB_RTL8152=y
+CONFIG_USB_LAN78XX=m
+CONFIG_USB_USBNET=y
+CONFIG_USB_NET_AX8817X=y
+CONFIG_USB_NET_AX88179_178A=y
+CONFIG_USB_NET_CDCETHER=m
+# CONFIG_USB_NET_CDC_EEM is not set
+CONFIG_USB_NET_CDC_NCM=m
+# CONFIG_USB_NET_HUAWEI_CDC_NCM is not set
+# CONFIG_USB_NET_CDC_MBIM is not set
+CONFIG_USB_NET_DM9601=m
+# CONFIG_USB_NET_SR9700 is not set
+CONFIG_USB_NET_SR9800=m
+CONFIG_USB_NET_SMSC75XX=m
+CONFIG_USB_NET_SMSC95XX=m
+# CONFIG_USB_NET_GL620A is not set
+CONFIG_USB_NET_NET1080=m
+CONFIG_USB_NET_PLUSB=m
+CONFIG_USB_NET_MCS7830=m
+# CONFIG_USB_NET_RNDIS_HOST is not set
+CONFIG_USB_NET_CDC_SUBSET_ENABLE=m
+CONFIG_USB_NET_CDC_SUBSET=m
+# CONFIG_USB_ALI_M5632 is not set
+# CONFIG_USB_AN2720 is not set
+CONFIG_USB_BELKIN=y
+CONFIG_USB_ARMLINUX=y
+# CONFIG_USB_EPSON2888 is not set
+# CONFIG_USB_KC2190 is not set
+CONFIG_USB_NET_ZAURUS=m
+# CONFIG_USB_NET_CX82310_ETH is not set
+# CONFIG_USB_NET_KALMIA is not set
+# CONFIG_USB_NET_QMI_WWAN is not set
+# CONFIG_USB_NET_INT51X1 is not set
+# CONFIG_USB_IPHETH is not set
+# CONFIG_USB_SIERRA_NET is not set
+# CONFIG_USB_VL600 is not set
+# CONFIG_USB_NET_CH9200 is not set
+# CONFIG_USB_NET_AQC111 is not set
+CONFIG_WLAN=y
+# CONFIG_WIRELESS_WDS is not set
+CONFIG_WLAN_VENDOR_ADMTEK=y
+CONFIG_WLAN_VENDOR_ATH=y
+# CONFIG_ATH_DEBUG is not set
+# CONFIG_ATH5K_PCI is not set
+CONFIG_WLAN_VENDOR_ATMEL=y
+CONFIG_WLAN_VENDOR_BROADCOM=y
+CONFIG_WLAN_VENDOR_CISCO=y
+CONFIG_WLAN_VENDOR_INTEL=y
+CONFIG_WLAN_VENDOR_INTERSIL=y
+CONFIG_HOSTAP=y
+# CONFIG_HOSTAP_FIRMWARE is not set
+# CONFIG_HOSTAP_PLX is not set
+# CONFIG_HOSTAP_PCI is not set
+# CONFIG_PRISM54 is not set
+CONFIG_WLAN_VENDOR_MARVELL=y
+CONFIG_WLAN_VENDOR_MEDIATEK=y
+CONFIG_WLAN_VENDOR_RALINK=y
+CONFIG_WLAN_VENDOR_REALTEK=y
+CONFIG_WLAN_VENDOR_RSI=y
+CONFIG_WLAN_VENDOR_ST=y
+CONFIG_WLAN_VENDOR_TI=y
+CONFIG_WLAN_VENDOR_ZYDAS=y
+CONFIG_WLAN_VENDOR_QUANTENNA=y
+
+#
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
+# CONFIG_WAN is not set
+CONFIG_XEN_NETDEV_FRONTEND=y
+# CONFIG_XEN_NETDEV_BACKEND is not set
+# CONFIG_VMXNET3 is not set
+# CONFIG_FUJITSU_ES is not set
+# CONFIG_NETDEVSIM is not set
+CONFIG_NET_FAILOVER=y
+# CONFIG_IVSHMEM_NET is not set
+# CONFIG_ISDN is not set
+# CONFIG_NVM is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+CONFIG_INPUT_LEDS=y
+CONFIG_INPUT_FF_MEMLESS=y
+CONFIG_INPUT_POLLDEV=y
+# CONFIG_INPUT_SPARSEKMAP is not set
+CONFIG_INPUT_MATRIXKMAP=y
+
+#
+# Userland interfaces
+#
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_JOYDEV is not set
+CONFIG_INPUT_EVDEV=y
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+CONFIG_INPUT_KEYBOARD=y
+CONFIG_KEYBOARD_ADC=m
+# CONFIG_KEYBOARD_ADP5588 is not set
+# CONFIG_KEYBOARD_ADP5589 is not set
+CONFIG_KEYBOARD_ATKBD=y
+# CONFIG_KEYBOARD_QT1050 is not set
+# CONFIG_KEYBOARD_QT1070 is not set
+# CONFIG_KEYBOARD_QT2160 is not set
+# CONFIG_KEYBOARD_DLINK_DIR685 is not set
+# CONFIG_KEYBOARD_LKKBD is not set
+CONFIG_KEYBOARD_GPIO=y
+# CONFIG_KEYBOARD_GPIO_POLLED is not set
+# CONFIG_KEYBOARD_TCA6416 is not set
+# CONFIG_KEYBOARD_TCA8418 is not set
+# CONFIG_KEYBOARD_MATRIX is not set
+# CONFIG_KEYBOARD_LM8323 is not set
+# CONFIG_KEYBOARD_LM8333 is not set
+# CONFIG_KEYBOARD_MAX7359 is not set
+# CONFIG_KEYBOARD_MCS is not set
+# CONFIG_KEYBOARD_MPR121 is not set
+CONFIG_KEYBOARD_SNVS_PWRKEY=y
+CONFIG_KEYBOARD_IMX_SC_PWRKEY=y
+# CONFIG_KEYBOARD_IMX is not set
+# CONFIG_KEYBOARD_NEWTON is not set
+# CONFIG_KEYBOARD_TEGRA is not set
+# CONFIG_KEYBOARD_OPENCORES is not set
+# CONFIG_KEYBOARD_SAMSUNG is not set
+# CONFIG_KEYBOARD_STOWAWAY is not set
+# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_KEYBOARD_SUN4I_LRADC is not set
+# CONFIG_KEYBOARD_OMAP4 is not set
+# CONFIG_KEYBOARD_TM2_TOUCHKEY is not set
+# CONFIG_KEYBOARD_XTKBD is not set
+CONFIG_KEYBOARD_CROS_EC=y
+# CONFIG_KEYBOARD_CAP11XX is not set
+# CONFIG_KEYBOARD_BCM is not set
+CONFIG_INPUT_MOUSE=y
+CONFIG_MOUSE_PS2=y
+CONFIG_MOUSE_PS2_ALPS=y
+CONFIG_MOUSE_PS2_BYD=y
+CONFIG_MOUSE_PS2_LOGIPS2PP=y
+CONFIG_MOUSE_PS2_SYNAPTICS=y
+CONFIG_MOUSE_PS2_SYNAPTICS_SMBUS=y
+CONFIG_MOUSE_PS2_CYPRESS=y
+CONFIG_MOUSE_PS2_TRACKPOINT=y
+# CONFIG_MOUSE_PS2_ELANTECH is not set
+# CONFIG_MOUSE_PS2_SENTELIC is not set
+# CONFIG_MOUSE_PS2_TOUCHKIT is not set
+CONFIG_MOUSE_PS2_FOCALTECH=y
+CONFIG_MOUSE_PS2_SMBUS=y
+# CONFIG_MOUSE_SERIAL is not set
+# CONFIG_MOUSE_APPLETOUCH is not set
+# CONFIG_MOUSE_BCM5974 is not set
+# CONFIG_MOUSE_CYAPA is not set
+# CONFIG_MOUSE_ELAN_I2C is not set
+# CONFIG_MOUSE_VSXXXAA is not set
+# CONFIG_MOUSE_GPIO is not set
+# CONFIG_MOUSE_SYNAPTICS_I2C is not set
+# CONFIG_MOUSE_SYNAPTICS_USB is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+CONFIG_INPUT_TOUCHSCREEN=y
+CONFIG_TOUCHSCREEN_PROPERTIES=y
+# CONFIG_TOUCHSCREEN_ADS7846 is not set
+CONFIG_TOUCHSCREEN_CT36X_WLD=y
+# CONFIG_TOUCHSCREEN_AD7877 is not set
+# CONFIG_TOUCHSCREEN_AD7879 is not set
+# CONFIG_TOUCHSCREEN_ADC is not set
+# CONFIG_TOUCHSCREEN_AR1021_I2C is not set
+CONFIG_TOUCHSCREEN_ATMEL_MXT=m
+# CONFIG_TOUCHSCREEN_ATMEL_MXT_T37 is not set
+# CONFIG_TOUCHSCREEN_AUO_PIXCIR is not set
+# CONFIG_TOUCHSCREEN_BU21013 is not set
+# CONFIG_TOUCHSCREEN_BU21029 is not set
+# CONFIG_TOUCHSCREEN_CHIPONE_ICN8318 is not set
+# CONFIG_TOUCHSCREEN_CHIPONE_ICN8505 is not set
+# CONFIG_TOUCHSCREEN_CY8CTMG110 is not set
+# CONFIG_TOUCHSCREEN_CYTTSP_CORE is not set
+# CONFIG_TOUCHSCREEN_CYTTSP4_CORE is not set
+# CONFIG_TOUCHSCREEN_DYNAPRO is not set
+# CONFIG_TOUCHSCREEN_HAMPSHIRE is not set
+# CONFIG_TOUCHSCREEN_EETI is not set
+# CONFIG_TOUCHSCREEN_EGALAX is not set
+# CONFIG_TOUCHSCREEN_EGALAX_SERIAL is not set
+# CONFIG_TOUCHSCREEN_EXC3000 is not set
+# CONFIG_TOUCHSCREEN_ELAN_TS is not set
+# CONFIG_TOUCHSCREEN_FUJITSU is not set
+# CONFIG_TOUCHSCREEN_GOODIX is not set
+# CONFIG_TOUCHSCREEN_HIDEEP is not set
+# CONFIG_TOUCHSCREEN_ILI210X is not set
+# CONFIG_TOUCHSCREEN_IPROC is not set
+# CONFIG_TOUCHSCREEN_S6SY761 is not set
+# CONFIG_TOUCHSCREEN_GUNZE is not set
+# CONFIG_TOUCHSCREEN_EKTF2127 is not set
+# CONFIG_TOUCHSCREEN_ELAN is not set
+# CONFIG_TOUCHSCREEN_ELO is not set
+# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
+# CONFIG_TOUCHSCREEN_WACOM_I2C is not set
+# CONFIG_TOUCHSCREEN_MAX11801 is not set
+# CONFIG_TOUCHSCREEN_MCS5000 is not set
+# CONFIG_TOUCHSCREEN_MMS114 is not set
+# CONFIG_TOUCHSCREEN_MELFAS_MIP4 is not set
+# CONFIG_TOUCHSCREEN_MTOUCH is not set
+# CONFIG_TOUCHSCREEN_IMX6UL_TSC is not set
+# CONFIG_TOUCHSCREEN_INEXIO is not set
+# CONFIG_TOUCHSCREEN_MK712 is not set
+# CONFIG_TOUCHSCREEN_PENMOUNT is not set
+# CONFIG_TOUCHSCREEN_EDT_FT5X06 is not set
+# CONFIG_TOUCHSCREEN_RASPBERRYPI_FW is not set
+# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
+# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
+# CONFIG_TOUCHSCREEN_PIXCIR is not set
+# CONFIG_TOUCHSCREEN_WDT87XX_I2C is not set
+# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
+# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
+# CONFIG_TOUCHSCREEN_TSC_SERIO is not set
+# CONFIG_TOUCHSCREEN_TSC2004 is not set
+# CONFIG_TOUCHSCREEN_TSC2005 is not set
+# CONFIG_TOUCHSCREEN_TSC2007 is not set
+# CONFIG_TOUCHSCREEN_RM_TS is not set
+# CONFIG_TOUCHSCREEN_SILEAD is not set
+# CONFIG_TOUCHSCREEN_SIS_I2C is not set
+# CONFIG_TOUCHSCREEN_ST1232 is not set
+# CONFIG_TOUCHSCREEN_STMFTS is not set
+# CONFIG_TOUCHSCREEN_SUN4I is not set
+# CONFIG_TOUCHSCREEN_SUR40 is not set
+# CONFIG_TOUCHSCREEN_SURFACE3_SPI is not set
+# CONFIG_TOUCHSCREEN_SX8654 is not set
+# CONFIG_TOUCHSCREEN_TPS6507X is not set
+# CONFIG_TOUCHSCREEN_ZET6223 is not set
+# CONFIG_TOUCHSCREEN_ZFORCE is not set
+# CONFIG_TOUCHSCREEN_ROHM_BU21023 is not set
+# CONFIG_TOUCHSCREEN_IQS5XX is not set
+CONFIG_TOUCHSCREEN_SYNAPTICS_DSX=y
+CONFIG_TOUCHSCREEN_SYNAPTICS_DSX_I2C=m
+# CONFIG_TOUCHSCREEN_FTS is not set
+CONFIG_INPUT_MISC=y
+# CONFIG_INPUT_AD714X is not set
+# CONFIG_INPUT_ATMEL_CAPTOUCH is not set
+# CONFIG_INPUT_BMA150 is not set
+# CONFIG_INPUT_E3X0_BUTTON is not set
+# CONFIG_INPUT_MSM_VIBRATOR is not set
+CONFIG_INPUT_PM8941_PWRKEY=y
+# CONFIG_INPUT_PM8XXX_VIBRATOR is not set
+# CONFIG_INPUT_MMA8450 is not set
+# CONFIG_INPUT_GP2A is not set
+# CONFIG_INPUT_GPIO_BEEPER is not set
+# CONFIG_INPUT_GPIO_DECODER is not set
+# CONFIG_INPUT_GPIO_VIBRA is not set
+# CONFIG_INPUT_ATI_REMOTE2 is not set
+# CONFIG_INPUT_KEYSPAN_REMOTE is not set
+# CONFIG_INPUT_KXTJ9 is not set
+# CONFIG_INPUT_POWERMATE is not set
+# CONFIG_INPUT_YEALINK is not set
+# CONFIG_INPUT_CM109 is not set
+# CONFIG_INPUT_REGULATOR_HAPTIC is not set
+# CONFIG_INPUT_AXP20X_PEK is not set
+# CONFIG_INPUT_UINPUT is not set
+# CONFIG_INPUT_PCF8574 is not set
+# CONFIG_INPUT_PWM_BEEPER is not set
+# CONFIG_INPUT_PWM_VIBRA is not set
+# CONFIG_INPUT_RK805_PWRKEY is not set
+# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set
+# CONFIG_INPUT_ADXL34X is not set
+# CONFIG_INPUT_IMS_PCU is not set
+# CONFIG_INPUT_CMA3000 is not set
+CONFIG_INPUT_XEN_KBDDEV_FRONTEND=y
+# CONFIG_INPUT_SOC_BUTTON_ARRAY is not set
+# CONFIG_INPUT_DRV260X_HAPTICS is not set
+# CONFIG_INPUT_DRV2665_HAPTICS is not set
+# CONFIG_INPUT_DRV2667_HAPTICS is not set
+CONFIG_INPUT_HISI_POWERKEY=y
+CONFIG_INPUT_MPL3115=y
+# CONFIG_SENSOR_FXLS8471 is not set
+CONFIG_INPUT_ISL29023=y
+# CONFIG_RMI4_CORE is not set
+
+#
+# Hardware I/O ports
+#
+CONFIG_SERIO=y
+# CONFIG_SERIO_SERPORT is not set
+CONFIG_SERIO_AMBAKMI=y
+# CONFIG_SERIO_PCIPS2 is not set
+CONFIG_SERIO_LIBPS2=y
+# CONFIG_SERIO_RAW is not set
+# CONFIG_SERIO_ALTERA_PS2 is not set
+# CONFIG_SERIO_PS2MULT is not set
+# CONFIG_SERIO_ARC_PS2 is not set
+# CONFIG_SERIO_APBPS2 is not set
+# CONFIG_SERIO_SUN4I_PS2 is not set
+# CONFIG_SERIO_GPIO_PS2 is not set
+# CONFIG_USERIO is not set
+# CONFIG_GAMEPORT is not set
+# end of Hardware I/O ports
+# end of Input device support
+
+#
+# Character devices
+#
+CONFIG_TTY=y
+CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+CONFIG_VT_CONSOLE=y
+CONFIG_VT_CONSOLE_SLEEP=y
+CONFIG_HW_CONSOLE=y
+CONFIG_VT_HW_CONSOLE_BINDING=y
+CONFIG_UNIX98_PTYS=y
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=16
+# CONFIG_SERIAL_NONSTANDARD is not set
+# CONFIG_NOZOMI is not set
+# CONFIG_N_GSM is not set
+# CONFIG_TRACE_SINK is not set
+# CONFIG_NULL_TTY is not set
+CONFIG_LDISC_AUTOLOAD=y
+CONFIG_DEVMEM=y
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_EARLYCON=y
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_DEPRECATED_OPTIONS=y
+CONFIG_SERIAL_8250_PNP=y
+# CONFIG_SERIAL_8250_FINTEK is not set
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_DMA=y
+CONFIG_SERIAL_8250_PCI=y
+CONFIG_SERIAL_8250_EXAR=y
+CONFIG_SERIAL_8250_NR_UARTS=4
+CONFIG_SERIAL_8250_RUNTIME_UARTS=4
+CONFIG_SERIAL_8250_EXTENDED=y
+# CONFIG_SERIAL_8250_MANY_PORTS is not set
+# CONFIG_SERIAL_8250_ASPEED_VUART is not set
+CONFIG_SERIAL_8250_SHARE_IRQ=y
+# CONFIG_SERIAL_8250_DETECT_IRQ is not set
+# CONFIG_SERIAL_8250_RSA is not set
+CONFIG_SERIAL_8250_DWLIB=y
+CONFIG_SERIAL_8250_BCM2835AUX=y
+CONFIG_SERIAL_8250_FSL=y
+CONFIG_SERIAL_8250_DW=y
+# CONFIG_SERIAL_8250_RT288X is not set
+CONFIG_SERIAL_8250_OMAP=y
+CONFIG_SERIAL_8250_OMAP_TTYO_FIXUP=y
+CONFIG_SERIAL_8250_MT6577=y
+CONFIG_SERIAL_8250_UNIPHIER=y
+CONFIG_SERIAL_OF_PLATFORM=y
+
+#
+# Non-8250 serial port support
+#
+# CONFIG_SERIAL_AMBA_PL010 is not set
+CONFIG_SERIAL_AMBA_PL011=y
+CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
+# CONFIG_SERIAL_EARLYCON_ARM_SEMIHOST is not set
+CONFIG_SERIAL_MESON=y
+CONFIG_SERIAL_MESON_CONSOLE=y
+CONFIG_SERIAL_SAMSUNG=y
+CONFIG_SERIAL_SAMSUNG_UARTS_4=y
+CONFIG_SERIAL_SAMSUNG_UARTS=4
+CONFIG_SERIAL_SAMSUNG_CONSOLE=y
+CONFIG_SERIAL_TEGRA=y
+CONFIG_SERIAL_TEGRA_TCU=y
+CONFIG_SERIAL_TEGRA_TCU_CONSOLE=y
+# CONFIG_SERIAL_MAX3100 is not set
+# CONFIG_SERIAL_MAX310X is not set
+CONFIG_SERIAL_IMX=y
+CONFIG_SERIAL_IMX_CONSOLE=y
+# CONFIG_SERIAL_UARTLITE is not set
+CONFIG_SERIAL_SH_SCI=y
+CONFIG_SERIAL_SH_SCI_NR_UARTS=18
+CONFIG_SERIAL_SH_SCI_CONSOLE=y
+CONFIG_SERIAL_SH_SCI_EARLYCON=y
+CONFIG_SERIAL_SH_SCI_DMA=y
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_SERIAL_JSM is not set
+CONFIG_SERIAL_MSM=y
+CONFIG_SERIAL_MSM_CONSOLE=y
+CONFIG_SERIAL_QCOM_GENI=y
+CONFIG_SERIAL_QCOM_GENI_CONSOLE=y
+# CONFIG_SERIAL_SIFIVE is not set
+# CONFIG_SERIAL_SCCNXP is not set
+# CONFIG_SERIAL_SC16IS7XX is not set
+# CONFIG_SERIAL_ALTERA_JTAGUART is not set
+# CONFIG_SERIAL_ALTERA_UART is not set
+# CONFIG_SERIAL_IFX6X60 is not set
+CONFIG_SERIAL_XILINX_PS_UART=y
+CONFIG_SERIAL_XILINX_PS_UART_CONSOLE=y
+# CONFIG_SERIAL_ARC is not set
+# CONFIG_SERIAL_RP2 is not set
+CONFIG_SERIAL_FSL_LPUART=y
+CONFIG_SERIAL_FSL_LPUART_CONSOLE=y
+CONFIG_SERIAL_FSL_LINFLEXUART=y
+CONFIG_SERIAL_FSL_LINFLEXUART_CONSOLE=y
+# CONFIG_SERIAL_CONEXANT_DIGICOLOR is not set
+# CONFIG_SERIAL_SPRD is not set
+CONFIG_SERIAL_MVEBU_UART=y
+CONFIG_SERIAL_MVEBU_CONSOLE=y
+# end of Serial drivers
+
+CONFIG_SERIAL_MCTRL_GPIO=y
+CONFIG_SERIAL_DEV_BUS=y
+CONFIG_SERIAL_DEV_CTRL_TTYPORT=y
+# CONFIG_TTY_PRINTK is not set
+CONFIG_HVC_DRIVER=y
+CONFIG_HVC_IRQ=y
+CONFIG_HVC_XEN=y
+CONFIG_HVC_XEN_FRONTEND=y
+# CONFIG_HVC_DCC is not set
+CONFIG_VIRTIO_CONSOLE=y
+CONFIG_IPMI_HANDLER=m
+CONFIG_IPMI_DMI_DECODE=y
+CONFIG_IPMI_PLAT_DATA=y
+# CONFIG_IPMI_PANIC_EVENT is not set
+CONFIG_IPMI_DEVICE_INTERFACE=m
+CONFIG_IPMI_SI=m
+# CONFIG_IPMI_SSIF is not set
+# CONFIG_IPMI_WATCHDOG is not set
+# CONFIG_IPMI_POWEROFF is not set
+# CONFIG_IPMB_DEVICE_INTERFACE is not set
+CONFIG_HW_RANDOM=y
+# CONFIG_HW_RANDOM_TIMERIOMEM is not set
+CONFIG_HW_RANDOM_BCM2835=y
+CONFIG_HW_RANDOM_IPROC_RNG200=y
+CONFIG_HW_RANDOM_OMAP=y
+# CONFIG_HW_RANDOM_VIRTIO is not set
+CONFIG_HW_RANDOM_IMX_RNGC=y
+CONFIG_HW_RANDOM_HISI=y
+CONFIG_HW_RANDOM_XGENE=y
+CONFIG_HW_RANDOM_MESON=y
+CONFIG_HW_RANDOM_CAVIUM=y
+CONFIG_HW_RANDOM_MTK=y
+CONFIG_HW_RANDOM_EXYNOS=y
+CONFIG_HW_RANDOM_OPTEE=y
+# CONFIG_APPLICOM is not set
+# CONFIG_RAW_DRIVER is not set
+CONFIG_TCG_TPM=y
+CONFIG_HW_RANDOM_TPM=y
+# CONFIG_TCG_TIS is not set
+# CONFIG_TCG_TIS_SPI is not set
+# CONFIG_TCG_TIS_I2C_ATMEL is not set
+CONFIG_TCG_TIS_I2C_INFINEON=y
+# CONFIG_TCG_TIS_I2C_NUVOTON is not set
+# CONFIG_TCG_ATMEL is not set
+# CONFIG_TCG_INFINEON is not set
+# CONFIG_TCG_XEN is not set
+# CONFIG_TCG_CRB is not set
+# CONFIG_TCG_VTPM_PROXY is not set
+# CONFIG_TCG_FTPM_TEE is not set
+# CONFIG_TCG_TIS_ST33ZP24_I2C is not set
+# CONFIG_TCG_TIS_ST33ZP24_SPI is not set
+CONFIG_DEVPORT=y
+# CONFIG_XILLYBUS is not set
+# end of Character devices
+
+# CONFIG_RANDOM_TRUST_BOOTLOADER is not set
+
+#
+# I2C support
+#
+CONFIG_I2C=y
+CONFIG_ACPI_I2C_OPREGION=y
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_COMPAT=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_MUX=y
+
+#
+# Multiplexer I2C Chip support
+#
+# CONFIG_I2C_ARB_GPIO_CHALLENGE is not set
+# CONFIG_I2C_MUX_GPIO is not set
+# CONFIG_I2C_MUX_GPMUX is not set
+# CONFIG_I2C_MUX_LTC4306 is not set
+# CONFIG_I2C_MUX_PCA9541 is not set
+CONFIG_I2C_MUX_PCA954x=y
+# CONFIG_I2C_MUX_PINCTRL is not set
+# CONFIG_I2C_MUX_REG is not set
+# CONFIG_I2C_DEMUX_PINCTRL is not set
+# CONFIG_I2C_MUX_MLXCPLD is not set
+# end of Multiplexer I2C Chip support
+
+CONFIG_I2C_HELPER_AUTO=y
+CONFIG_I2C_ALGOBIT=y
+
+#
+# I2C Hardware Bus support
+#
+
+#
+# PC SMBus host controller drivers
+#
+# CONFIG_I2C_ALI1535 is not set
+# CONFIG_I2C_ALI1563 is not set
+# CONFIG_I2C_ALI15X3 is not set
+# CONFIG_I2C_AMD756 is not set
+# CONFIG_I2C_AMD8111 is not set
+# CONFIG_I2C_AMD_MP2 is not set
+# CONFIG_I2C_HIX5HD2 is not set
+# CONFIG_I2C_I801 is not set
+# CONFIG_I2C_ISCH is not set
+# CONFIG_I2C_PIIX4 is not set
+# CONFIG_I2C_NFORCE2 is not set
+# CONFIG_I2C_NVIDIA_GPU is not set
+# CONFIG_I2C_SIS5595 is not set
+# CONFIG_I2C_SIS630 is not set
+# CONFIG_I2C_SIS96X is not set
+# CONFIG_I2C_VIA is not set
+# CONFIG_I2C_VIAPRO is not set
+
+#
+# ACPI drivers
+#
+# CONFIG_I2C_SCMI is not set
+
+#
+# I2C system bus drivers (mostly embedded / system-on-chip)
+#
+CONFIG_I2C_BCM2835=m
+CONFIG_I2C_BCM_IPROC=y
+CONFIG_I2C_BRCMSTB=y
+# CONFIG_I2C_CADENCE is not set
+# CONFIG_I2C_CBUS_GPIO is not set
+CONFIG_I2C_DESIGNWARE_CORE=y
+CONFIG_I2C_DESIGNWARE_PLATFORM=y
+# CONFIG_I2C_DESIGNWARE_SLAVE is not set
+# CONFIG_I2C_DESIGNWARE_PCI is not set
+# CONFIG_I2C_EMEV2 is not set
+CONFIG_I2C_EXYNOS5=y
+CONFIG_I2C_GPIO=m
+# CONFIG_I2C_GPIO_FAULT_INJECTOR is not set
+CONFIG_I2C_IMX=y
+CONFIG_I2C_IMX_LPI2C=y
+CONFIG_I2C_MESON=y
+# CONFIG_I2C_MT65XX is not set
+CONFIG_I2C_MV64XXX=y
+# CONFIG_I2C_NOMADIK is not set
+# CONFIG_I2C_OCORES is not set
+# CONFIG_I2C_OMAP is not set
+# CONFIG_I2C_PCA_PLATFORM is not set
+CONFIG_I2C_PXA=y
+# CONFIG_I2C_PXA_SLAVE is not set
+CONFIG_I2C_QCOM_GENI=m
+CONFIG_I2C_QUP=y
+# CONFIG_I2C_RIIC is not set
+CONFIG_I2C_RK3X=y
+CONFIG_I2C_RPBUS=y
+CONFIG_I2C_SH_MOBILE=y
+# CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_SPRD is not set
+# CONFIG_I2C_SYNQUACER is not set
+CONFIG_I2C_TEGRA=y
+CONFIG_I2C_TEGRA_BPMP=y
+# CONFIG_I2C_UNIPHIER is not set
+CONFIG_I2C_UNIPHIER_F=y
+# CONFIG_I2C_VERSATILE is not set
+# CONFIG_I2C_THUNDERX is not set
+# CONFIG_I2C_XILINX is not set
+# CONFIG_I2C_XLP9XX is not set
+CONFIG_I2C_RCAR=y
+
+#
+# External I2C/SMBus adapter drivers
+#
+# CONFIG_I2C_DIOLAN_U2C is not set
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_ROBOTFUZZ_OSIF is not set
+# CONFIG_I2C_TAOS_EVM is not set
+# CONFIG_I2C_TINY_USB is not set
+
+#
+# Other I2C/SMBus bus drivers
+#
+CONFIG_I2C_CROS_EC_TUNNEL=y
+# CONFIG_I2C_XGENE_SLIMPRO is not set
+CONFIG_I2C_ZX2967=y
+CONFIG_XEN_I2C_FRONTEND=y
+# CONFIG_XEN_I2C_BACKEND is not set
+# end of I2C Hardware Bus support
+
+# CONFIG_I2C_STUB is not set
+CONFIG_I2C_SLAVE=y
+# CONFIG_I2C_SLAVE_EEPROM is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# end of I2C support
+
+# CONFIG_I3C is not set
+CONFIG_SPI=y
+# CONFIG_SPI_DEBUG is not set
+CONFIG_SPI_MASTER=y
+CONFIG_SPI_MEM=y
+
+#
+# SPI Master Controller Drivers
+#
+# CONFIG_SPI_ALTERA is not set
+CONFIG_SPI_ARMADA_3700=y
+# CONFIG_SPI_AXI_SPI_ENGINE is not set
+CONFIG_SPI_BCM2835=m
+CONFIG_SPI_BCM2835AUX=m
+CONFIG_SPI_BCM_QSPI=y
+CONFIG_SPI_BITBANG=y
+# CONFIG_SPI_CADENCE is not set
+# CONFIG_SPI_DESIGNWARE is not set
+CONFIG_SPI_FSL_LPSPI=y
+CONFIG_SPI_FSL_QUADSPI=y
+CONFIG_SPI_NXP_FLEXSPI=y
+# CONFIG_SPI_GPIO is not set
+CONFIG_SPI_IMX=y
+# CONFIG_SPI_FSL_SPI is not set
+CONFIG_SPI_FSL_DSPI=y
+CONFIG_SPI_MESON_SPICC=m
+CONFIG_SPI_MESON_SPIFC=m
+# CONFIG_SPI_MT65XX is not set
+# CONFIG_SPI_OC_TINY is not set
+# CONFIG_SPI_OMAP24XX is not set
+CONFIG_SPI_ORION=y
+CONFIG_SPI_PL022=y
+# CONFIG_SPI_PXA2XX is not set
+CONFIG_SPI_ROCKCHIP=y
+# CONFIG_SPI_RSPI is not set
+# CONFIG_SPI_QCOM_QSPI is not set
+CONFIG_SPI_QUP=y
+# CONFIG_SPI_QCOM_GENI is not set
+CONFIG_SPI_S3C64XX=y
+# CONFIG_SPI_SC18IS602 is not set
+# CONFIG_SPI_SH_MSIOF is not set
+# CONFIG_SPI_SH_HSPI is not set
+# CONFIG_SPI_SIFIVE is not set
+# CONFIG_SPI_SLAVE_MT27XX is not set
+# CONFIG_SPI_SPRD is not set
+# CONFIG_SPI_SPRD_ADI is not set
+# CONFIG_SPI_SUN4I is not set
+CONFIG_SPI_SUN6I=y
+# CONFIG_SPI_SYNQUACER is not set
+# CONFIG_SPI_MXIC is not set
+# CONFIG_SPI_TEGRA114 is not set
+# CONFIG_SPI_TEGRA20_SFLASH is not set
+# CONFIG_SPI_TEGRA20_SLINK is not set
+# CONFIG_SPI_THUNDERX is not set
+# CONFIG_SPI_UNIPHIER is not set
+# CONFIG_SPI_XCOMM is not set
+# CONFIG_SPI_XILINX is not set
+# CONFIG_SPI_XLP is not set
+# CONFIG_SPI_ZYNQMP_GQSPI is not set
+
+#
+# SPI Protocol Masters
+#
+CONFIG_SPI_SPIDEV=y
+# CONFIG_SPI_LOOPBACK_TEST is not set
+# CONFIG_SPI_TLE62X0 is not set
+CONFIG_SPI_SLAVE=y
+CONFIG_SPI_SLAVE_TIME=y
+CONFIG_SPI_SLAVE_SYSTEM_CONTROL=y
+CONFIG_SPMI=y
+CONFIG_SPMI_MSM_PMIC_ARB=y
+# CONFIG_HSI is not set
+CONFIG_PPS=y
+# CONFIG_PPS_DEBUG is not set
+
+#
+# PPS clients support
+#
+# CONFIG_PPS_CLIENT_KTIMER is not set
+# CONFIG_PPS_CLIENT_LDISC is not set
+# CONFIG_PPS_CLIENT_GPIO is not set
+
+#
+# PPS generators support
+#
+
+#
+# PTP clock support
+#
+CONFIG_PTP_1588_CLOCK=y
+CONFIG_PTP_1588_CLOCK_DTE=y
+CONFIG_PTP_1588_CLOCK_QORIQ=y
+
+#
+# Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks.
+#
+# end of PTP clock support
+
+CONFIG_PINCTRL=y
+CONFIG_GENERIC_PINCTRL_GROUPS=y
+CONFIG_PINMUX=y
+CONFIG_GENERIC_PINMUX_FUNCTIONS=y
+CONFIG_PINCONF=y
+CONFIG_GENERIC_PINCONF=y
+# CONFIG_DEBUG_PINCTRL is not set
+# CONFIG_PINCTRL_AXP209 is not set
+# CONFIG_PINCTRL_AMD is not set
+# CONFIG_PINCTRL_MCP23S08 is not set
+CONFIG_PINCTRL_ROCKCHIP=y
+CONFIG_PINCTRL_SINGLE=y
+# CONFIG_PINCTRL_SX150X is not set
+# CONFIG_PINCTRL_STMFX is not set
+CONFIG_PINCTRL_MAX77620=y
+# CONFIG_PINCTRL_RK805 is not set
+# CONFIG_PINCTRL_OCELOT is not set
+CONFIG_PINCTRL_BCM2835=y
+CONFIG_PINCTRL_IPROC_GPIO=y
+CONFIG_PINCTRL_NS2_MUX=y
+# CONFIG_PINCTRL_AS370 is not set
+# CONFIG_PINCTRL_BERLIN_BG4CT is not set
+CONFIG_PINCTRL_IMX=y
+CONFIG_PINCTRL_IMX_SCU=y
+CONFIG_PINCTRL_IMX8MM=y
+CONFIG_PINCTRL_IMX8MN=y
+CONFIG_PINCTRL_IMX8MQ=y
+CONFIG_PINCTRL_IMX8QM=y
+CONFIG_PINCTRL_IMX8QXP=y
+CONFIG_PINCTRL_S32V_CORE=y
+CONFIG_PINCTRL_S32V234=y
+CONFIG_PINCTRL_MVEBU=y
+CONFIG_PINCTRL_ARMADA_AP806=y
+CONFIG_PINCTRL_ARMADA_CP110=y
+CONFIG_PINCTRL_ARMADA_37XX=y
+CONFIG_PINCTRL_MSM=y
+# CONFIG_PINCTRL_APQ8064 is not set
+# CONFIG_PINCTRL_APQ8084 is not set
+# CONFIG_PINCTRL_IPQ4019 is not set
+# CONFIG_PINCTRL_IPQ8064 is not set
+CONFIG_PINCTRL_IPQ8074=y
+# CONFIG_PINCTRL_MSM8660 is not set
+# CONFIG_PINCTRL_MSM8960 is not set
+# CONFIG_PINCTRL_MDM9615 is not set
+# CONFIG_PINCTRL_MSM8X74 is not set
+CONFIG_PINCTRL_MSM8916=y
+CONFIG_PINCTRL_MSM8994=y
+CONFIG_PINCTRL_MSM8996=y
+CONFIG_PINCTRL_MSM8998=y
+CONFIG_PINCTRL_QCS404=y
+CONFIG_PINCTRL_QDF2XXX=y
+CONFIG_PINCTRL_QCOM_SPMI_PMIC=y
+# CONFIG_PINCTRL_QCOM_SSBI_PMIC is not set
+# CONFIG_PINCTRL_SC7180 is not set
+# CONFIG_PINCTRL_SDM660 is not set
+CONFIG_PINCTRL_SDM845=y
+CONFIG_PINCTRL_SM8150=y
+CONFIG_PINCTRL_SAMSUNG=y
+CONFIG_PINCTRL_EXYNOS=y
+CONFIG_PINCTRL_EXYNOS_ARM64=y
+CONFIG_PINCTRL_SH_PFC=y
+CONFIG_PINCTRL_PFC_R8A774A1=y
+CONFIG_PINCTRL_PFC_R8A774C0=y
+CONFIG_PINCTRL_PFC_R8A7795=y
+CONFIG_PINCTRL_PFC_R8A7796=y
+CONFIG_PINCTRL_PFC_R8A77965=y
+CONFIG_PINCTRL_PFC_R8A77970=y
+CONFIG_PINCTRL_PFC_R8A77980=y
+CONFIG_PINCTRL_PFC_R8A77990=y
+CONFIG_PINCTRL_PFC_R8A77995=y
+# CONFIG_PINCTRL_SPRD is not set
+CONFIG_PINCTRL_SUNXI=y
+# CONFIG_PINCTRL_SUN4I_A10 is not set
+# CONFIG_PINCTRL_SUN5I is not set
+# CONFIG_PINCTRL_SUN6I_A31 is not set
+# CONFIG_PINCTRL_SUN6I_A31_R is not set
+# CONFIG_PINCTRL_SUN8I_A23 is not set
+# CONFIG_PINCTRL_SUN8I_A33 is not set
+# CONFIG_PINCTRL_SUN8I_A83T is not set
+# CONFIG_PINCTRL_SUN8I_A83T_R is not set
+# CONFIG_PINCTRL_SUN8I_A23_R is not set
+# CONFIG_PINCTRL_SUN8I_H3 is not set
+CONFIG_PINCTRL_SUN8I_H3_R=y
+# CONFIG_PINCTRL_SUN8I_V3S is not set
+# CONFIG_PINCTRL_SUN9I_A80 is not set
+# CONFIG_PINCTRL_SUN9I_A80_R is not set
+CONFIG_PINCTRL_SUN50I_A64=y
+CONFIG_PINCTRL_SUN50I_A64_R=y
+CONFIG_PINCTRL_SUN50I_H5=y
+CONFIG_PINCTRL_SUN50I_H6=y
+CONFIG_PINCTRL_SUN50I_H6_R=y
+CONFIG_PINCTRL_TEGRA=y
+CONFIG_PINCTRL_TEGRA124=y
+CONFIG_PINCTRL_TEGRA210=y
+CONFIG_PINCTRL_TEGRA194=y
+CONFIG_PINCTRL_TEGRA_XUSB=y
+CONFIG_PINCTRL_UNIPHIER=y
+# CONFIG_PINCTRL_UNIPHIER_LD4 is not set
+# CONFIG_PINCTRL_UNIPHIER_PRO4 is not set
+# CONFIG_PINCTRL_UNIPHIER_SLD8 is not set
+# CONFIG_PINCTRL_UNIPHIER_PRO5 is not set
+# CONFIG_PINCTRL_UNIPHIER_PXS2 is not set
+# CONFIG_PINCTRL_UNIPHIER_LD6B is not set
+CONFIG_PINCTRL_UNIPHIER_LD11=y
+CONFIG_PINCTRL_UNIPHIER_LD20=y
+CONFIG_PINCTRL_UNIPHIER_PXS3=y
+
+#
+# MediaTek pinctrl drivers
+#
+CONFIG_EINT_MTK=y
+CONFIG_PINCTRL_MTK=y
+CONFIG_PINCTRL_MTK_MOORE=y
+CONFIG_PINCTRL_MTK_PARIS=y
+CONFIG_PINCTRL_MT2712=y
+CONFIG_PINCTRL_MT6765=y
+CONFIG_PINCTRL_MT6797=y
+CONFIG_PINCTRL_MT7622=y
+CONFIG_PINCTRL_MT8173=y
+CONFIG_PINCTRL_MT8183=y
+CONFIG_PINCTRL_MT8516=y
+# end of MediaTek pinctrl drivers
+
+# CONFIG_PINCTRL_ZX296718 is not set
+CONFIG_PINCTRL_MESON=y
+CONFIG_PINCTRL_MESON_GXBB=y
+CONFIG_PINCTRL_MESON_GXL=y
+CONFIG_PINCTRL_MESON8_PMX=y
+CONFIG_PINCTRL_MESON_AXG=y
+CONFIG_PINCTRL_MESON_AXG_PMX=y
+CONFIG_PINCTRL_MESON_G12A=y
+CONFIG_GPIOLIB=y
+CONFIG_GPIOLIB_FASTPATH_LIMIT=512
+CONFIG_OF_GPIO=y
+CONFIG_GPIO_ACPI=y
+CONFIG_GPIOLIB_IRQCHIP=y
+# CONFIG_DEBUG_GPIO is not set
+CONFIG_GPIO_SYSFS=y
+CONFIG_GPIO_GENERIC=y
+
+#
+# Memory mapped GPIO drivers
+#
+# CONFIG_GPIO_74XX_MMIO is not set
+# CONFIG_GPIO_ALTERA is not set
+# CONFIG_GPIO_AMDPT is not set
+CONFIG_GPIO_RASPBERRYPI_EXP=y
+CONFIG_GPIO_BRCMSTB=y
+# CONFIG_GPIO_CADENCE is not set
+# CONFIG_GPIO_DAVINCI is not set
+CONFIG_GPIO_DWAPB=y
+# CONFIG_GPIO_EIC_SPRD is not set
+# CONFIG_GPIO_EXAR is not set
+# CONFIG_GPIO_FTGPIO010 is not set
+CONFIG_GPIO_GENERIC_PLATFORM=y
+# CONFIG_GPIO_GRGPIO is not set
+# CONFIG_GPIO_HLWD is not set
+CONFIG_GPIO_MB86S7X=y
+CONFIG_GPIO_MPC8XXX=y
+CONFIG_GPIO_MVEBU=y
+CONFIG_GPIO_MXC=y
+CONFIG_GPIO_MXC_PAD_WAKEUP=y
+CONFIG_GPIO_PL061=y
+CONFIG_GPIO_RCAR=y
+# CONFIG_GPIO_SAMA5D2_PIOBU is not set
+# CONFIG_GPIO_SPRD is not set
+# CONFIG_GPIO_SYSCON is not set
+CONFIG_GPIO_TEGRA=y
+CONFIG_GPIO_TEGRA186=y
+# CONFIG_GPIO_THUNDERX is not set
+CONFIG_GPIO_UNIPHIER=y
+# CONFIG_GPIO_IMX_RPMSG is not set
+CONFIG_GPIO_XGENE=y
+CONFIG_GPIO_XGENE_SB=y
+# CONFIG_GPIO_XILINX is not set
+# CONFIG_GPIO_XLP is not set
+# CONFIG_GPIO_ZYNQ is not set
+# CONFIG_GPIO_ZX is not set
+# CONFIG_GPIO_AMD_FCH is not set
+# end of Memory mapped GPIO drivers
+
+#
+# I2C GPIO expanders
+#
+# CONFIG_GPIO_ADP5588 is not set
+# CONFIG_GPIO_ADNP is not set
+# CONFIG_GPIO_GW_PLD is not set
+# CONFIG_GPIO_MAX7300 is not set
+CONFIG_GPIO_MAX732X=y
+# CONFIG_GPIO_MAX732X_IRQ is not set
+CONFIG_GPIO_PCA953X=y
+CONFIG_GPIO_PCA953X_IRQ=y
+# CONFIG_GPIO_PCF857X is not set
+# CONFIG_GPIO_TPIC2810 is not set
+# end of I2C GPIO expanders
+
+#
+# MFD GPIO expanders
+#
+# CONFIG_GPIO_BD9571MWV is not set
+CONFIG_GPIO_MAX77620=y
+# end of MFD GPIO expanders
+
+#
+# PCI GPIO expanders
+#
+# CONFIG_GPIO_BT8XX is not set
+# CONFIG_GPIO_PCI_IDIO_16 is not set
+# CONFIG_GPIO_PCIE_IDIO_24 is not set
+# CONFIG_GPIO_RDC321X is not set
+# end of PCI GPIO expanders
+
+#
+# SPI GPIO expanders
+#
+# CONFIG_GPIO_74X164 is not set
+# CONFIG_GPIO_MAX3191X is not set
+# CONFIG_GPIO_MAX7301 is not set
+# CONFIG_GPIO_MC33880 is not set
+# CONFIG_GPIO_PISOSR is not set
+# CONFIG_GPIO_XRA1403 is not set
+# end of SPI GPIO expanders
+
+#
+# USB GPIO expanders
+#
+# end of USB GPIO expanders
+
+# CONFIG_GPIO_MOCKUP is not set
+# CONFIG_W1 is not set
+CONFIG_POWER_AVS=y
+CONFIG_ROCKCHIP_IODOMAIN=y
+CONFIG_POWER_RESET=y
+CONFIG_POWER_RESET_BRCMSTB=y
+# CONFIG_POWER_RESET_GPIO is not set
+# CONFIG_POWER_RESET_GPIO_RESTART is not set
+# CONFIG_POWER_RESET_HISI is not set
+CONFIG_POWER_RESET_MSM=y
+# CONFIG_POWER_RESET_QCOM_PON is not set
+# CONFIG_POWER_RESET_LTC2952 is not set
+# CONFIG_POWER_RESET_RESTART is not set
+CONFIG_POWER_RESET_VEXPRESS=y
+CONFIG_POWER_RESET_XGENE=y
+CONFIG_POWER_RESET_SYSCON=y
+# CONFIG_POWER_RESET_SYSCON_POWEROFF is not set
+# CONFIG_POWER_RESET_ZX is not set
+CONFIG_REBOOT_MODE=y
+CONFIG_SYSCON_REBOOT_MODE=y
+# CONFIG_NVMEM_REBOOT_MODE is not set
+CONFIG_POWER_SUPPLY=y
+# CONFIG_POWER_SUPPLY_DEBUG is not set
+CONFIG_POWER_SUPPLY_HWMON=y
+# CONFIG_PDA_POWER is not set
+# CONFIG_GENERIC_ADC_BATTERY is not set
+# CONFIG_TEST_POWER is not set
+# CONFIG_CHARGER_ADP5061 is not set
+# CONFIG_BATTERY_DS2780 is not set
+# CONFIG_BATTERY_DS2781 is not set
+# CONFIG_BATTERY_DS2782 is not set
+# CONFIG_BATTERY_LEGO_EV3 is not set
+CONFIG_BATTERY_SBS=m
+# CONFIG_CHARGER_SBS is not set
+# CONFIG_MANAGER_SBS is not set
+CONFIG_BATTERY_BQ27XXX=y
+CONFIG_BATTERY_BQ27XXX_I2C=y
+# CONFIG_BATTERY_BQ27XXX_DT_UPDATES_NVM is not set
+# CONFIG_AXP20X_POWER is not set
+# CONFIG_AXP288_FUEL_GAUGE is not set
+# CONFIG_BATTERY_MAX17040 is not set
+# CONFIG_BATTERY_MAX17042 is not set
+# CONFIG_CHARGER_ISP1704 is not set
+# CONFIG_CHARGER_MAX8903 is not set
+# CONFIG_CHARGER_LP8727 is not set
+# CONFIG_CHARGER_GPIO is not set
+# CONFIG_CHARGER_MANAGER is not set
+# CONFIG_CHARGER_LT3651 is not set
+# CONFIG_CHARGER_DETECTOR_MAX14656 is not set
+# CONFIG_CHARGER_QCOM_SMBB is not set
+# CONFIG_CHARGER_BQ2415X is not set
+# CONFIG_CHARGER_BQ24190 is not set
+# CONFIG_CHARGER_BQ24257 is not set
+# CONFIG_CHARGER_BQ24735 is not set
+# CONFIG_CHARGER_BQ25890 is not set
+# CONFIG_CHARGER_SMB347 is not set
+# CONFIG_BATTERY_GAUGE_LTC2941 is not set
+# CONFIG_CHARGER_RT9455 is not set
+# CONFIG_CHARGER_CROS_USBPD is not set
+# CONFIG_CHARGER_UCS1002 is not set
+CONFIG_HWMON=y
+# CONFIG_HWMON_DEBUG_CHIP is not set
+
+#
+# Native drivers
+#
+# CONFIG_SENSORS_AD7314 is not set
+# CONFIG_SENSORS_AD7414 is not set
+# CONFIG_SENSORS_AD7418 is not set
+# CONFIG_SENSORS_ADM1021 is not set
+# CONFIG_SENSORS_ADM1025 is not set
+# CONFIG_SENSORS_ADM1026 is not set
+# CONFIG_SENSORS_ADM1029 is not set
+# CONFIG_SENSORS_ADM1031 is not set
+# CONFIG_SENSORS_ADM9240 is not set
+# CONFIG_SENSORS_ADT7310 is not set
+# CONFIG_SENSORS_ADT7410 is not set
+# CONFIG_SENSORS_ADT7411 is not set
+# CONFIG_SENSORS_ADT7462 is not set
+# CONFIG_SENSORS_ADT7470 is not set
+# CONFIG_SENSORS_ADT7475 is not set
+# CONFIG_SENSORS_AS370 is not set
+# CONFIG_SENSORS_ASC7621 is not set
+CONFIG_SENSORS_ARM_SCPI=y
+# CONFIG_SENSORS_ASPEED is not set
+# CONFIG_SENSORS_ATXP1 is not set
+# CONFIG_SENSORS_DS620 is not set
+# CONFIG_SENSORS_DS1621 is not set
+# CONFIG_SENSORS_I5K_AMB is not set
+# CONFIG_SENSORS_F71805F is not set
+# CONFIG_SENSORS_F71882FG is not set
+# CONFIG_SENSORS_F75375S is not set
+# CONFIG_SENSORS_FTSTEUTATES is not set
+# CONFIG_SENSORS_GL518SM is not set
+# CONFIG_SENSORS_GL520SM is not set
+# CONFIG_SENSORS_G760A is not set
+# CONFIG_SENSORS_G762 is not set
+# CONFIG_SENSORS_GPIO_FAN is not set
+# CONFIG_SENSORS_HIH6130 is not set
+# CONFIG_SENSORS_IBMAEM is not set
+# CONFIG_SENSORS_IBMPEX is not set
+# CONFIG_SENSORS_IIO_HWMON is not set
+# CONFIG_SENSORS_IT87 is not set
+# CONFIG_SENSORS_JC42 is not set
+# CONFIG_SENSORS_POWR1220 is not set
+# CONFIG_SENSORS_LINEAGE is not set
+# CONFIG_SENSORS_LTC2945 is not set
+# CONFIG_SENSORS_LTC2990 is not set
+# CONFIG_SENSORS_LTC4151 is not set
+# CONFIG_SENSORS_LTC4215 is not set
+# CONFIG_SENSORS_LTC4222 is not set
+# CONFIG_SENSORS_LTC4245 is not set
+# CONFIG_SENSORS_LTC4260 is not set
+# CONFIG_SENSORS_LTC4261 is not set
+# CONFIG_SENSORS_MAX1111 is not set
+# CONFIG_SENSORS_MAX16065 is not set
+# CONFIG_SENSORS_MAX1619 is not set
+# CONFIG_SENSORS_MAX1668 is not set
+# CONFIG_SENSORS_MAX17135 is not set
+# CONFIG_SENSORS_MAX197 is not set
+# CONFIG_SENSORS_MAX31722 is not set
+# CONFIG_SENSORS_MAX6621 is not set
+# CONFIG_SENSORS_MAX6639 is not set
+# CONFIG_SENSORS_MAX6642 is not set
+# CONFIG_SENSORS_MAX6650 is not set
+# CONFIG_SENSORS_MAX6697 is not set
+# CONFIG_SENSORS_MAX31790 is not set
+# CONFIG_SENSORS_MCP3021 is not set
+# CONFIG_SENSORS_TC654 is not set
+# CONFIG_SENSORS_ADCXX is not set
+# CONFIG_SENSORS_LM63 is not set
+# CONFIG_SENSORS_LM70 is not set
+# CONFIG_SENSORS_LM73 is not set
+CONFIG_SENSORS_LM75=y
+# CONFIG_SENSORS_LM77 is not set
+# CONFIG_SENSORS_LM78 is not set
+# CONFIG_SENSORS_LM80 is not set
+# CONFIG_SENSORS_LM83 is not set
+# CONFIG_SENSORS_LM85 is not set
+# CONFIG_SENSORS_LM87 is not set
+CONFIG_SENSORS_LM90=y
+# CONFIG_SENSORS_LM92 is not set
+# CONFIG_SENSORS_LM93 is not set
+# CONFIG_SENSORS_LM95234 is not set
+# CONFIG_SENSORS_LM95241 is not set
+CONFIG_SENSORS_LM95245=y
+# CONFIG_SENSORS_PC87360 is not set
+# CONFIG_SENSORS_PC87427 is not set
+# CONFIG_SENSORS_NTC_THERMISTOR is not set
+# CONFIG_SENSORS_NCT6683 is not set
+# CONFIG_SENSORS_NCT6775 is not set
+# CONFIG_SENSORS_NCT7802 is not set
+# CONFIG_SENSORS_NCT7904 is not set
+# CONFIG_SENSORS_NPCM7XX is not set
+# CONFIG_SENSORS_OCC_P8_I2C is not set
+# CONFIG_SENSORS_PCF8591 is not set
+# CONFIG_PMBUS is not set
+CONFIG_SENSORS_PWM_FAN=m
+CONFIG_SENSORS_RASPBERRYPI_HWMON=m
+# CONFIG_SENSORS_SHT15 is not set
+# CONFIG_SENSORS_SHT21 is not set
+# CONFIG_SENSORS_SHT3x is not set
+# CONFIG_SENSORS_SHTC1 is not set
+# CONFIG_SENSORS_SIS5595 is not set
+# CONFIG_SENSORS_DME1737 is not set
+# CONFIG_SENSORS_EMC1403 is not set
+# CONFIG_SENSORS_EMC2103 is not set
+# CONFIG_SENSORS_EMC6W201 is not set
+# CONFIG_SENSORS_SMSC47M1 is not set
+# CONFIG_SENSORS_SMSC47M192 is not set
+# CONFIG_SENSORS_SMSC47B397 is not set
+# CONFIG_SENSORS_SCH5627 is not set
+# CONFIG_SENSORS_SCH5636 is not set
+# CONFIG_SENSORS_STTS751 is not set
+# CONFIG_SENSORS_SMM665 is not set
+# CONFIG_SENSORS_ADC128D818 is not set
+# CONFIG_SENSORS_ADS7828 is not set
+# CONFIG_SENSORS_ADS7871 is not set
+# CONFIG_SENSORS_AMC6821 is not set
+# CONFIG_SENSORS_INA209 is not set
+CONFIG_SENSORS_INA2XX=m
+CONFIG_SENSORS_INA3221=m
+# CONFIG_SENSORS_TC74 is not set
+# CONFIG_SENSORS_THMC50 is not set
+# CONFIG_SENSORS_TMP102 is not set
+# CONFIG_SENSORS_TMP103 is not set
+# CONFIG_SENSORS_TMP108 is not set
+# CONFIG_SENSORS_TMP401 is not set
+# CONFIG_SENSORS_TMP421 is not set
+# CONFIG_SENSORS_VEXPRESS is not set
+# CONFIG_SENSORS_VIA686A is not set
+# CONFIG_SENSORS_VT1211 is not set
+# CONFIG_SENSORS_VT8231 is not set
+# CONFIG_SENSORS_W83773G is not set
+# CONFIG_SENSORS_W83781D is not set
+# CONFIG_SENSORS_W83791D is not set
+# CONFIG_SENSORS_W83792D is not set
+# CONFIG_SENSORS_W83793 is not set
+# CONFIG_SENSORS_W83795 is not set
+# CONFIG_SENSORS_W83L785TS is not set
+# CONFIG_SENSORS_W83L786NG is not set
+# CONFIG_SENSORS_W83627HF is not set
+# CONFIG_SENSORS_W83627EHF is not set
+# CONFIG_SENSORS_XGENE is not set
+
+#
+# ACPI drivers
+#
+# CONFIG_SENSORS_ACPI_POWER is not set
+# CONFIG_SENSORS_MAG3110 is not set
+CONFIG_MXC_MMA8451=y
+CONFIG_THERMAL=y
+# CONFIG_THERMAL_STATISTICS is not set
+CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0
+CONFIG_THERMAL_HWMON=y
+CONFIG_THERMAL_OF=y
+CONFIG_THERMAL_WRITABLE_TRIPS=y
+CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y
+# CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set
+# CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE is not set
+# CONFIG_THERMAL_DEFAULT_GOV_POWER_ALLOCATOR is not set
+# CONFIG_THERMAL_GOV_FAIR_SHARE is not set
+CONFIG_THERMAL_GOV_STEP_WISE=y
+# CONFIG_THERMAL_GOV_BANG_BANG is not set
+# CONFIG_THERMAL_GOV_USER_SPACE is not set
+CONFIG_THERMAL_GOV_POWER_ALLOCATOR=y
+CONFIG_CPU_THERMAL=y
+# CONFIG_CLOCK_THERMAL is not set
+# CONFIG_DEVFREQ_THERMAL is not set
+CONFIG_THERMAL_EMULATION=y
+# CONFIG_THERMAL_MMIO is not set
+CONFIG_HISI_THERMAL=y
+# CONFIG_IMX_THERMAL is not set
+CONFIG_IMX_SC_THERMAL=y
+CONFIG_DEVICE_THERMAL=y
+CONFIG_IMX8MM_THERMAL=y
+# CONFIG_MAX77620_THERMAL is not set
+CONFIG_QORIQ_THERMAL=y
+CONFIG_ROCKCHIP_THERMAL=m
+CONFIG_RCAR_THERMAL=y
+CONFIG_RCAR_GEN3_THERMAL=y
+CONFIG_ARMADA_THERMAL=y
+CONFIG_MTK_THERMAL=y
+
+#
+# Broadcom thermal drivers
+#
+CONFIG_BCM2835_THERMAL=m
+CONFIG_BRCMSTB_THERMAL=m
+CONFIG_BCM_NS_THERMAL=y
+CONFIG_BCM_SR_THERMAL=y
+# end of Broadcom thermal drivers
+
+#
+# Samsung thermal drivers
+#
+CONFIG_EXYNOS_THERMAL=y
+# end of Samsung thermal drivers
+
+#
+# NVIDIA Tegra thermal drivers
+#
+# CONFIG_TEGRA_SOCTHERM is not set
+CONFIG_TEGRA_BPMP_THERMAL=m
+# end of NVIDIA Tegra thermal drivers
+
+# CONFIG_GENERIC_ADC_THERMAL is not set
+
+#
+# Qualcomm thermal drivers
+#
+CONFIG_QCOM_TSENS=y
+# CONFIG_QCOM_SPMI_TEMP_ALARM is not set
+# end of Qualcomm thermal drivers
+
+# CONFIG_ZX2967_THERMAL is not set
+CONFIG_UNIPHIER_THERMAL=y
+CONFIG_WATCHDOG=y
+CONFIG_WATCHDOG_CORE=y
+# CONFIG_WATCHDOG_NOWAYOUT is not set
+CONFIG_WATCHDOG_HANDLE_BOOT_ENABLED=y
+CONFIG_WATCHDOG_OPEN_TIMEOUT=0
+# CONFIG_WATCHDOG_SYSFS is not set
+
+#
+# Watchdog Pretimeout Governors
+#
+# CONFIG_WATCHDOG_PRETIMEOUT_GOV is not set
+
+#
+# Watchdog Device Drivers
+#
+# CONFIG_SOFT_WATCHDOG is not set
+# CONFIG_GPIO_WATCHDOG is not set
+# CONFIG_WDAT_WDT is not set
+# CONFIG_XILINX_WATCHDOG is not set
+# CONFIG_ZIIRAVE_WATCHDOG is not set
+CONFIG_ARM_SP805_WATCHDOG=y
+CONFIG_ARM_SBSA_WATCHDOG=y
+# CONFIG_ARMADA_37XX_WATCHDOG is not set
+# CONFIG_CADENCE_WATCHDOG is not set
+CONFIG_HAVE_S3C2410_WATCHDOG=y
+CONFIG_S3C2410_WATCHDOG=y
+CONFIG_DW_WATCHDOG=y
+CONFIG_SUNXI_WATCHDOG=m
+# CONFIG_MAX63XX_WATCHDOG is not set
+# CONFIG_MAX77620_WATCHDOG is not set
+CONFIG_IMX2_WDT=y
+CONFIG_IMX_SC_WDT=y
+# CONFIG_IMX7ULP_WDT is not set
+# CONFIG_TEGRA_WATCHDOG is not set
+# CONFIG_QCOM_WDT is not set
+CONFIG_MESON_GXBB_WATCHDOG=m
+CONFIG_MESON_WATCHDOG=m
+# CONFIG_MEDIATEK_WATCHDOG is not set
+CONFIG_RENESAS_WDT=y
+# CONFIG_RENESAS_RZAWDT is not set
+# CONFIG_ZX2967_WATCHDOG is not set
+CONFIG_UNIPHIER_WATCHDOG=y
+# CONFIG_SPRD_WATCHDOG is not set
+# CONFIG_PM8916_WATCHDOG is not set
+# CONFIG_ALIM7101_WDT is not set
+# CONFIG_I6300ESB_WDT is not set
+CONFIG_BCM2835_WDT=y
+# CONFIG_BCM7038_WDT is not set
+# CONFIG_MEN_A21_WDT is not set
+# CONFIG_XEN_WDT is not set
+
+#
+# PCI-based Watchdog Cards
+#
+# CONFIG_PCIPCWATCHDOG is not set
+# CONFIG_WDTPCI is not set
+
+#
+# USB-based Watchdog Cards
+#
+# CONFIG_USBPCWATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
+# CONFIG_SSB is not set
+CONFIG_BCMA_POSSIBLE=y
+# CONFIG_BCMA is not set
+
+#
+# Multifunction device drivers
+#
+CONFIG_MFD_CORE=y
+CONFIG_MFD_ALTERA_SYSMGR=y
+# CONFIG_MFD_ACT8945A is not set
+# CONFIG_MFD_SUN4I_GPADC is not set
+# CONFIG_MFD_AS3711 is not set
+# CONFIG_MFD_AS3722 is not set
+# CONFIG_PMIC_ADP5520 is not set
+# CONFIG_MFD_AAT2870_CORE is not set
+# CONFIG_MFD_ATMEL_FLEXCOM is not set
+# CONFIG_MFD_ATMEL_HLCDC is not set
+# CONFIG_MFD_BCM590XX is not set
+CONFIG_MFD_BD9571MWV=y
+# CONFIG_MFD_AC100 is not set
+CONFIG_MFD_AXP20X=y
+CONFIG_MFD_AXP20X_I2C=y
+CONFIG_MFD_AXP20X_RSB=y
+CONFIG_MFD_CROS_EC_DEV=y
+# CONFIG_MFD_MADERA is not set
+# CONFIG_PMIC_DA903X is not set
+# CONFIG_MFD_DA9052_SPI is not set
+# CONFIG_MFD_DA9052_I2C is not set
+# CONFIG_MFD_DA9055 is not set
+# CONFIG_MFD_DA9062 is not set
+# CONFIG_MFD_DA9063 is not set
+# CONFIG_MFD_DA9150 is not set
+# CONFIG_MFD_DLN2 is not set
+CONFIG_MFD_EXYNOS_LPASS=m
+# CONFIG_MFD_MC13XXX_SPI is not set
+# CONFIG_MFD_MC13XXX_I2C is not set
+# CONFIG_MFD_MXC_HDMI is not set
+CONFIG_MFD_HI6421_PMIC=y
+CONFIG_MFD_HI655X_PMIC=y
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_HTC_I2CPLD is not set
+# CONFIG_LPC_ICH is not set
+# CONFIG_LPC_SCH is not set
+# CONFIG_MFD_JANZ_CMODIO is not set
+# CONFIG_MFD_KEMPLD is not set
+# CONFIG_MFD_88PM800 is not set
+# CONFIG_MFD_88PM805 is not set
+# CONFIG_MFD_88PM860X is not set
+# CONFIG_MFD_MAX14577 is not set
+# CONFIG_MFD_MAX17135 is not set
+CONFIG_MFD_MAX77620=y
+# CONFIG_MFD_MAX77650 is not set
+# CONFIG_MFD_MAX77686 is not set
+# CONFIG_MFD_MAX77693 is not set
+# CONFIG_MFD_MAX77843 is not set
+# CONFIG_MFD_MAX8907 is not set
+# CONFIG_MFD_MAX8925 is not set
+# CONFIG_MFD_MAX8997 is not set
+# CONFIG_MFD_MAX8998 is not set
+# CONFIG_MFD_MT6397 is not set
+# CONFIG_MFD_MENF21BMC is not set
+# CONFIG_EZX_PCAP is not set
+# CONFIG_MFD_CPCAP is not set
+# CONFIG_MFD_VIPERBOARD is not set
+# CONFIG_MFD_RETU is not set
+# CONFIG_MFD_PCF50633 is not set
+# CONFIG_MFD_QCOM_RPM is not set
+CONFIG_MFD_SPMI_PMIC=y
+# CONFIG_MFD_RDC321X is not set
+# CONFIG_MFD_RT5033 is not set
+# CONFIG_MFD_RC5T583 is not set
+CONFIG_MFD_RK808=y
+# CONFIG_MFD_RN5T618 is not set
+CONFIG_MFD_SEC_CORE=y
+# CONFIG_MFD_SI476X_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_MFD_SKY81452 is not set
+# CONFIG_MFD_SMSC is not set
+# CONFIG_MFD_SC27XX_PMIC is not set
+# CONFIG_ABX500_CORE is not set
+# CONFIG_MFD_STMPE is not set
+CONFIG_MFD_SUN6I_PRCM=y
+CONFIG_MFD_SYSCON=y
+# CONFIG_MFD_TI_AM335X_TSCADC is not set
+# CONFIG_MFD_LP3943 is not set
+# CONFIG_MFD_LP8788 is not set
+# CONFIG_MFD_TI_LMU is not set
+# CONFIG_MFD_PALMAS is not set
+# CONFIG_TPS6105X is not set
+# CONFIG_TPS65010 is not set
+# CONFIG_TPS6507X is not set
+# CONFIG_MFD_TPS65086 is not set
+# CONFIG_MFD_TPS65090 is not set
+# CONFIG_MFD_TPS65217 is not set
+# CONFIG_MFD_TPS68470 is not set
+# CONFIG_MFD_TI_LP873X is not set
+# CONFIG_MFD_TI_LP87565 is not set
+# CONFIG_MFD_TPS65218 is not set
+# CONFIG_MFD_TPS6586X is not set
+# CONFIG_MFD_TPS65910 is not set
+# CONFIG_MFD_TPS65912_I2C is not set
+# CONFIG_MFD_TPS65912_SPI is not set
+# CONFIG_MFD_TPS80031 is not set
+# CONFIG_TWL4030_CORE is not set
+# CONFIG_TWL6040_CORE is not set
+# CONFIG_MFD_WL1273_CORE is not set
+# CONFIG_MFD_LM3533 is not set
+# CONFIG_MFD_TC3589X is not set
+# CONFIG_MFD_TQMX86 is not set
+# CONFIG_MFD_VX855 is not set
+# CONFIG_MFD_LOCHNAGAR is not set
+# CONFIG_MFD_ARIZONA_I2C is not set
+# CONFIG_MFD_ARIZONA_SPI is not set
+# CONFIG_MFD_WM8400 is not set
+# CONFIG_MFD_WM831X_I2C is not set
+# CONFIG_MFD_WM831X_SPI is not set
+# CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_WM8994 is not set
+CONFIG_MFD_ROHM_BD718XX=y
+# CONFIG_MFD_ROHM_BD70528 is not set
+# CONFIG_MFD_STPMIC1 is not set
+# CONFIG_MFD_STMFX is not set
+CONFIG_MFD_PCA9450=y
+CONFIG_MFD_VEXPRESS_SYSREG=y
+# CONFIG_RAVE_SP_CORE is not set
+# end of Multifunction device drivers
+
+CONFIG_REGULATOR=y
+# CONFIG_REGULATOR_DEBUG is not set
+CONFIG_REGULATOR_FIXED_VOLTAGE=y
+# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set
+# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set
+# CONFIG_REGULATOR_88PG86X is not set
+# CONFIG_REGULATOR_ACT8865 is not set
+# CONFIG_REGULATOR_AD5398 is not set
+# CONFIG_REGULATOR_ANATOP is not set
+CONFIG_REGULATOR_AXP20X=y
+CONFIG_REGULATOR_BD718XX=y
+CONFIG_REGULATOR_BD9571MWV=y
+# CONFIG_REGULATOR_DA9210 is not set
+# CONFIG_REGULATOR_DA9211 is not set
+CONFIG_REGULATOR_FAN53555=y
+CONFIG_REGULATOR_GPIO=y
+# CONFIG_REGULATOR_HI6421 is not set
+CONFIG_REGULATOR_HI6421V530=y
+CONFIG_REGULATOR_HI655X=y
+# CONFIG_REGULATOR_ISL9305 is not set
+# CONFIG_REGULATOR_ISL6271A is not set
+# CONFIG_REGULATOR_LP3971 is not set
+# CONFIG_REGULATOR_LP3972 is not set
+# CONFIG_REGULATOR_LP872X is not set
+# CONFIG_REGULATOR_LP8755 is not set
+# CONFIG_REGULATOR_LTC3589 is not set
+# CONFIG_REGULATOR_LTC3676 is not set
+# CONFIG_REGULATOR_MAX1586 is not set
+CONFIG_REGULATOR_MAX77620=y
+# CONFIG_REGULATOR_MAX8649 is not set
+# CONFIG_REGULATOR_MAX8660 is not set
+# CONFIG_REGULATOR_MAX8952 is not set
+CONFIG_REGULATOR_MAX8973=y
+# CONFIG_REGULATOR_MCP16502 is not set
+# CONFIG_REGULATOR_MT6311 is not set
+CONFIG_REGULATOR_PCA9450=y
+# CONFIG_REGULATOR_PF1550_RPMSG is not set
+CONFIG_REGULATOR_PFUZE100=y
+# CONFIG_REGULATOR_PV88060 is not set
+# CONFIG_REGULATOR_PV88080 is not set
+# CONFIG_REGULATOR_PV88090 is not set
+CONFIG_REGULATOR_PWM=y
+CONFIG_REGULATOR_QCOM_RPMH=y
+CONFIG_REGULATOR_QCOM_SMD_RPM=y
+CONFIG_REGULATOR_QCOM_SPMI=y
+CONFIG_REGULATOR_RK808=y
+# CONFIG_REGULATOR_S2MPA01 is not set
+CONFIG_REGULATOR_S2MPS11=y
+# CONFIG_REGULATOR_S5M8767 is not set
+# CONFIG_REGULATOR_SLG51000 is not set
+# CONFIG_REGULATOR_SY8106A is not set
+# CONFIG_REGULATOR_SY8824X is not set
+# CONFIG_REGULATOR_TPS51632 is not set
+# CONFIG_REGULATOR_TPS62360 is not set
+# CONFIG_REGULATOR_TPS65023 is not set
+# CONFIG_REGULATOR_TPS6507X is not set
+# CONFIG_REGULATOR_TPS65132 is not set
+# CONFIG_REGULATOR_TPS6524X is not set
+CONFIG_REGULATOR_UNIPHIER=y
+CONFIG_REGULATOR_VCTRL=m
+# CONFIG_REGULATOR_VEXPRESS is not set
+CONFIG_CEC_CORE=y
+CONFIG_CEC_NOTIFIER=y
+CONFIG_RC_CORE=m
+CONFIG_RC_MAP=m
+# CONFIG_LIRC is not set
+CONFIG_RC_DECODERS=y
+# CONFIG_IR_NEC_DECODER is not set
+# CONFIG_IR_RC5_DECODER is not set
+# CONFIG_IR_RC6_DECODER is not set
+# CONFIG_IR_JVC_DECODER is not set
+# CONFIG_IR_SONY_DECODER is not set
+# CONFIG_IR_SANYO_DECODER is not set
+# CONFIG_IR_SHARP_DECODER is not set
+# CONFIG_IR_MCE_KBD_DECODER is not set
+# CONFIG_IR_XMP_DECODER is not set
+# CONFIG_IR_IMON_DECODER is not set
+# CONFIG_IR_RCMM_DECODER is not set
+CONFIG_RC_DEVICES=y
+# CONFIG_RC_ATI_REMOTE is not set
+# CONFIG_IR_ENE is not set
+# CONFIG_IR_HIX5HD2 is not set
+# CONFIG_IR_IMON is not set
+# CONFIG_IR_IMON_RAW is not set
+# CONFIG_IR_MCEUSB is not set
+# CONFIG_IR_ITE_CIR is not set
+# CONFIG_IR_FINTEK is not set
+CONFIG_IR_MESON=m
+# CONFIG_IR_MTK is not set
+# CONFIG_IR_NUVOTON is not set
+# CONFIG_IR_REDRAT3 is not set
+# CONFIG_IR_STREAMZAP is not set
+# CONFIG_IR_IGORPLUGUSB is not set
+# CONFIG_IR_IGUANA is not set
+# CONFIG_IR_TTUSBIR is not set
+# CONFIG_RC_LOOPBACK is not set
+# CONFIG_IR_GPIO_CIR is not set
+CONFIG_IR_SUNXI=m
+# CONFIG_IR_SERIAL is not set
+# CONFIG_IR_SIR is not set
+# CONFIG_RC_XBOX_DVD is not set
+# CONFIG_IR_ZX is not set
+CONFIG_MEDIA_SUPPORT=y
+
+#
+# Multimedia core support
+#
+CONFIG_MEDIA_CAMERA_SUPPORT=y
+CONFIG_MEDIA_ANALOG_TV_SUPPORT=y
+CONFIG_MEDIA_DIGITAL_TV_SUPPORT=y
+# CONFIG_MEDIA_RADIO_SUPPORT is not set
+# CONFIG_MEDIA_SDR_SUPPORT is not set
+# CONFIG_MEDIA_CEC_SUPPORT is not set
+CONFIG_MEDIA_CONTROLLER=y
+# CONFIG_MEDIA_CONTROLLER_DVB is not set
+# CONFIG_MEDIA_CONTROLLER_REQUEST_API is not set
+CONFIG_VIDEO_DEV=y
+CONFIG_VIDEO_V4L2_SUBDEV_API=y
+CONFIG_VIDEO_V4L2=y
+CONFIG_VIDEO_V4L2_I2C=y
+# CONFIG_VIDEO_ADV_DEBUG is not set
+# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set
+CONFIG_V4L2_MEM2MEM_DEV=y
+CONFIG_V4L2_FWNODE=y
+CONFIG_DVB_CORE=y
+# CONFIG_DVB_MMAP is not set
+# CONFIG_DVB_NET is not set
+CONFIG_DVB_MAX_ADAPTERS=16
+# CONFIG_DVB_DYNAMIC_MINORS is not set
+# CONFIG_DVB_DEMUX_SECTION_LOSS_LOG is not set
+# CONFIG_DVB_ULE_DEBUG is not set
+
+#
+# Media drivers
+#
+CONFIG_MEDIA_USB_SUPPORT=y
+
+#
+# Webcam devices
+#
+CONFIG_USB_VIDEO_CLASS=m
+CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y
+CONFIG_USB_GSPCA=m
+# CONFIG_USB_M5602 is not set
+# CONFIG_USB_STV06XX is not set
+# CONFIG_USB_GL860 is not set
+# CONFIG_USB_GSPCA_BENQ is not set
+# CONFIG_USB_GSPCA_CONEX is not set
+# CONFIG_USB_GSPCA_CPIA1 is not set
+# CONFIG_USB_GSPCA_DTCS033 is not set
+# CONFIG_USB_GSPCA_ETOMS is not set
+# CONFIG_USB_GSPCA_FINEPIX is not set
+# CONFIG_USB_GSPCA_JEILINJ is not set
+# CONFIG_USB_GSPCA_JL2005BCD is not set
+# CONFIG_USB_GSPCA_KINECT is not set
+# CONFIG_USB_GSPCA_KONICA is not set
+# CONFIG_USB_GSPCA_MARS is not set
+# CONFIG_USB_GSPCA_MR97310A is not set
+# CONFIG_USB_GSPCA_NW80X is not set
+# CONFIG_USB_GSPCA_OV519 is not set
+# CONFIG_USB_GSPCA_OV534 is not set
+# CONFIG_USB_GSPCA_OV534_9 is not set
+# CONFIG_USB_GSPCA_PAC207 is not set
+# CONFIG_USB_GSPCA_PAC7302 is not set
+# CONFIG_USB_GSPCA_PAC7311 is not set
+# CONFIG_USB_GSPCA_SE401 is not set
+# CONFIG_USB_GSPCA_SN9C2028 is not set
+# CONFIG_USB_GSPCA_SN9C20X is not set
+# CONFIG_USB_GSPCA_SONIXB is not set
+# CONFIG_USB_GSPCA_SONIXJ is not set
+# CONFIG_USB_GSPCA_SPCA500 is not set
+# CONFIG_USB_GSPCA_SPCA501 is not set
+# CONFIG_USB_GSPCA_SPCA505 is not set
+# CONFIG_USB_GSPCA_SPCA506 is not set
+# CONFIG_USB_GSPCA_SPCA508 is not set
+# CONFIG_USB_GSPCA_SPCA561 is not set
+# CONFIG_USB_GSPCA_SPCA1528 is not set
+# CONFIG_USB_GSPCA_SQ905 is not set
+# CONFIG_USB_GSPCA_SQ905C is not set
+# CONFIG_USB_GSPCA_SQ930X is not set
+# CONFIG_USB_GSPCA_STK014 is not set
+# CONFIG_USB_GSPCA_STK1135 is not set
+# CONFIG_USB_GSPCA_STV0680 is not set
+# CONFIG_USB_GSPCA_SUNPLUS is not set
+# CONFIG_USB_GSPCA_T613 is not set
+# CONFIG_USB_GSPCA_TOPRO is not set
+# CONFIG_USB_GSPCA_TOUPTEK is not set
+# CONFIG_USB_GSPCA_TV8532 is not set
+# CONFIG_USB_GSPCA_VC032X is not set
+# CONFIG_USB_GSPCA_VICAM is not set
+# CONFIG_USB_GSPCA_XIRLINK_CIT is not set
+# CONFIG_USB_GSPCA_ZC3XX is not set
+# CONFIG_USB_PWC is not set
+# CONFIG_VIDEO_CPIA2 is not set
+# CONFIG_USB_ZR364XX is not set
+# CONFIG_USB_STKWEBCAM is not set
+# CONFIG_USB_S2255 is not set
+# CONFIG_VIDEO_USBTV is not set
+
+#
+# Analog TV USB devices
+#
+# CONFIG_VIDEO_PVRUSB2 is not set
+# CONFIG_VIDEO_HDPVR is not set
+# CONFIG_VIDEO_USBVISION is not set
+# CONFIG_VIDEO_STK1160_COMMON is not set
+# CONFIG_VIDEO_GO7007 is not set
+
+#
+# Analog/digital TV USB devices
+#
+# CONFIG_VIDEO_AU0828 is not set
+# CONFIG_VIDEO_CX231XX is not set
+# CONFIG_VIDEO_TM6000 is not set
+
+#
+# Digital TV USB devices
+#
+# CONFIG_DVB_USB is not set
+# CONFIG_DVB_USB_V2 is not set
+# CONFIG_DVB_TTUSB_BUDGET is not set
+# CONFIG_DVB_TTUSB_DEC is not set
+# CONFIG_SMS_USB_DRV is not set
+# CONFIG_DVB_B2C2_FLEXCOP_USB is not set
+# CONFIG_DVB_AS102 is not set
+
+#
+# Webcam, TV (analog/digital) USB devices
+#
+# CONFIG_VIDEO_EM28XX is not set
+# CONFIG_MEDIA_PCI_SUPPORT is not set
+CONFIG_V4L_PLATFORM_DRIVERS=y
+# CONFIG_VIDEO_CAFE_CCIC is not set
+# CONFIG_VIDEO_CADENCE is not set
+# CONFIG_VIDEO_ASPEED is not set
+# CONFIG_VIDEO_MUX is not set
+# CONFIG_VIDEO_QCOM_CAMSS is not set
+CONFIG_VIDEO_MX8_CAPTURE=y
+CONFIG_VIDEO_MXC_CAPTURE=y
+# CONFIG_VIDEO_MXC_OUTPUT is not set
+
+#
+# IMX8 Camera ISI/MIPI Features support
+#
+CONFIG_IMX8_MIPI_CSI2_YAV=y
+CONFIG_IMX8_JPEG=m
+# end of IMX8 Camera ISI/MIPI Features support
+
+CONFIG_VIDEO_MXC_CSI_CAMERA=y
+# CONFIG_MXC_VADC is not set
+CONFIG_MXC_MIPI_CSI=y
+
+#
+# MXC Camera/V4L2 PRP Features support
+#
+# CONFIG_MXC_CAMERA_OV5640_V2 is not set
+CONFIG_MXC_CAMERA_OV5640_MIPI_V2=y
+# CONFIG_MXC_CAMERA_OV5647_MIPI is not set
+# end of MXC Camera/V4L2 PRP Features support
+
+# CONFIG_VIDEO_MXC_PXP_V4L2 is not set
+# CONFIG_VIDEO_SAMSUNG_EXYNOS4_IS is not set
+# CONFIG_VIDEO_XILINX is not set
+# CONFIG_VIDEO_RCAR_CSI2 is not set
+# CONFIG_VIDEO_RCAR_VIN is not set
+# CONFIG_VIDEO_SUN4I_CSI is not set
+CONFIG_VIDEO_SUN6I_CSI=m
+CONFIG_V4L_MEM2MEM_DRIVERS=y
+# CONFIG_VIDEO_CODA is not set
+# CONFIG_VIDEO_IMX_PXP is not set
+# CONFIG_VIDEO_MEDIATEK_VPU is not set
+# CONFIG_VIDEO_MEM2MEM_DEINTERLACE is not set
+# CONFIG_VIDEO_SAMSUNG_S5P_G2D is not set
+CONFIG_VIDEO_SAMSUNG_S5P_JPEG=m
+CONFIG_VIDEO_SAMSUNG_S5P_MFC=m
+CONFIG_VIDEO_SAMSUNG_EXYNOS_GSC=m
+# CONFIG_VIDEO_SH_VEU is not set
+# CONFIG_VIDEO_RENESAS_FDP1 is not set
+# CONFIG_VIDEO_RENESAS_JPU is not set
+CONFIG_VIDEO_RENESAS_FCP=m
+CONFIG_VIDEO_RENESAS_VSP1=m
+# CONFIG_VIDEO_ROCKCHIP_RGA is not set
+# CONFIG_VIDEO_QCOM_VENUS is not set
+# CONFIG_V4L_TEST_DRIVERS is not set
+# CONFIG_DVB_PLATFORM_DRIVERS is not set
+
+#
+# Supported MMC/SDIO adapters
+#
+# CONFIG_SMS_SDIO_DRV is not set
+# CONFIG_CYPRESS_FIRMWARE is not set
+CONFIG_VIDEOBUF2_CORE=y
+CONFIG_VIDEOBUF2_V4L2=y
+CONFIG_VIDEOBUF2_MEMOPS=y
+CONFIG_VIDEOBUF2_DMA_CONTIG=y
+CONFIG_VIDEOBUF2_VMALLOC=y
+
+#
+# Media ancillary drivers (tuners, sensors, i2c, spi, frontends)
+#
+# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set
+CONFIG_MEDIA_ATTACH=y
+CONFIG_VIDEO_IR_I2C=m
+
+#
+# I2C Encoders, decoders, sensors and other helper chips
+#
+
+#
+# Audio decoders, processors and mixers
+#
+# CONFIG_VIDEO_TVAUDIO is not set
+# CONFIG_VIDEO_TDA7432 is not set
+# CONFIG_VIDEO_TDA9840 is not set
+# CONFIG_VIDEO_TDA1997X is not set
+# CONFIG_VIDEO_TEA6415C is not set
+# CONFIG_VIDEO_TEA6420 is not set
+# CONFIG_VIDEO_MSP3400 is not set
+# CONFIG_VIDEO_CS3308 is not set
+# CONFIG_VIDEO_CS5345 is not set
+# CONFIG_VIDEO_CS53L32A is not set
+# CONFIG_VIDEO_TLV320AIC23B is not set
+# CONFIG_VIDEO_UDA1342 is not set
+# CONFIG_VIDEO_WM8775 is not set
+# CONFIG_VIDEO_WM8739 is not set
+# CONFIG_VIDEO_VP27SMPX is not set
+# CONFIG_VIDEO_SONY_BTF_MPX is not set
+
+#
+# RDS decoders
+#
+# CONFIG_VIDEO_SAA6588 is not set
+
+#
+# Video decoders
+#
+# CONFIG_VIDEO_ADV7180 is not set
+# CONFIG_VIDEO_ADV7183 is not set
+# CONFIG_VIDEO_ADV748X is not set
+# CONFIG_VIDEO_ADV7604 is not set
+# CONFIG_VIDEO_ADV7842 is not set
+# CONFIG_VIDEO_BT819 is not set
+# CONFIG_VIDEO_BT856 is not set
+# CONFIG_VIDEO_BT866 is not set
+# CONFIG_VIDEO_KS0127 is not set
+# CONFIG_VIDEO_ML86V7667 is not set
+# CONFIG_VIDEO_SAA7110 is not set
+# CONFIG_VIDEO_SAA711X is not set
+# CONFIG_VIDEO_TC358743 is not set
+# CONFIG_VIDEO_TVP514X is not set
+# CONFIG_VIDEO_TVP5150 is not set
+# CONFIG_VIDEO_TVP7002 is not set
+# CONFIG_VIDEO_TW2804 is not set
+# CONFIG_VIDEO_TW9903 is not set
+# CONFIG_VIDEO_TW9906 is not set
+# CONFIG_VIDEO_TW9910 is not set
+# CONFIG_VIDEO_VPX3220 is not set
+
+#
+# Video and audio decoders
+#
+# CONFIG_VIDEO_SAA717X is not set
+# CONFIG_VIDEO_CX25840 is not set
+
+#
+# Video encoders
+#
+# CONFIG_VIDEO_SAA7127 is not set
+# CONFIG_VIDEO_SAA7185 is not set
+# CONFIG_VIDEO_ADV7170 is not set
+# CONFIG_VIDEO_ADV7175 is not set
+# CONFIG_VIDEO_ADV7343 is not set
+# CONFIG_VIDEO_ADV7393 is not set
+# CONFIG_VIDEO_AD9389B is not set
+# CONFIG_VIDEO_AK881X is not set
+# CONFIG_VIDEO_THS8200 is not set
+
+#
+# Camera sensor devices
+#
+# CONFIG_VIDEO_IMX214 is not set
+# CONFIG_VIDEO_IMX258 is not set
+# CONFIG_VIDEO_IMX274 is not set
+# CONFIG_VIDEO_IMX319 is not set
+# CONFIG_VIDEO_IMX355 is not set
+# CONFIG_VIDEO_OV2640 is not set
+# CONFIG_VIDEO_OV2659 is not set
+# CONFIG_VIDEO_OV2680 is not set
+# CONFIG_VIDEO_OV2685 is not set
+CONFIG_VIDEO_OV5640=y
+# CONFIG_VIDEO_OV5645 is not set
+# CONFIG_VIDEO_OV5647 is not set
+# CONFIG_VIDEO_OV6650 is not set
+# CONFIG_VIDEO_OV5670 is not set
+# CONFIG_VIDEO_OV5675 is not set
+# CONFIG_VIDEO_OV5695 is not set
+# CONFIG_VIDEO_OV7251 is not set
+# CONFIG_VIDEO_OV772X is not set
+# CONFIG_VIDEO_OV7640 is not set
+# CONFIG_VIDEO_OV7670 is not set
+# CONFIG_VIDEO_OV7740 is not set
+# CONFIG_VIDEO_OV8856 is not set
+# CONFIG_VIDEO_OV9640 is not set
+# CONFIG_VIDEO_OV9650 is not set
+# CONFIG_VIDEO_OV13858 is not set
+# CONFIG_VIDEO_VS6624 is not set
+# CONFIG_VIDEO_MT9M001 is not set
+# CONFIG_VIDEO_MT9M032 is not set
+# CONFIG_VIDEO_MT9M111 is not set
+# CONFIG_VIDEO_MT9P031 is not set
+# CONFIG_VIDEO_MT9T001 is not set
+# CONFIG_VIDEO_MT9T112 is not set
+# CONFIG_VIDEO_MT9V011 is not set
+# CONFIG_VIDEO_MT9V032 is not set
+# CONFIG_VIDEO_MT9V111 is not set
+# CONFIG_VIDEO_SR030PC30 is not set
+# CONFIG_VIDEO_NOON010PC30 is not set
+# CONFIG_VIDEO_M5MOLS is not set
+# CONFIG_VIDEO_RJ54N1 is not set
+# CONFIG_VIDEO_S5K6AA is not set
+# CONFIG_VIDEO_S5K6A3 is not set
+# CONFIG_VIDEO_S5K4ECGX is not set
+# CONFIG_VIDEO_S5K5BAF is not set
+# CONFIG_VIDEO_SMIAPP is not set
+# CONFIG_VIDEO_ET8EK8 is not set
+# CONFIG_VIDEO_S5C73M3 is not set
+
+#
+# Lens drivers
+#
+# CONFIG_VIDEO_AD5820 is not set
+# CONFIG_VIDEO_AK7375 is not set
+# CONFIG_VIDEO_DW9714 is not set
+# CONFIG_VIDEO_DW9807_VCM is not set
+
+#
+# Flash devices
+#
+# CONFIG_VIDEO_ADP1653 is not set
+# CONFIG_VIDEO_LM3560 is not set
+# CONFIG_VIDEO_LM3646 is not set
+
+#
+# Video improvement chips
+#
+# CONFIG_VIDEO_UPD64031A is not set
+# CONFIG_VIDEO_UPD64083 is not set
+
+#
+# Audio/Video compression chips
+#
+# CONFIG_VIDEO_SAA6752HS is not set
+
+#
+# SDR tuner chips
+#
+
+#
+# Miscellaneous helper chips
+#
+# CONFIG_VIDEO_THS7303 is not set
+# CONFIG_VIDEO_M52790 is not set
+# CONFIG_VIDEO_I2C is not set
+# CONFIG_VIDEO_ST_MIPID02 is not set
+# end of I2C Encoders, decoders, sensors and other helper chips
+
+#
+# SPI helper chips
+#
+# CONFIG_VIDEO_GS1662 is not set
+# end of SPI helper chips
+
+#
+# Media SPI Adapters
+#
+CONFIG_CXD2880_SPI_DRV=m
+# end of Media SPI Adapters
+
+CONFIG_MEDIA_TUNER=y
+
+#
+# Customize TV tuners
+#
+CONFIG_MEDIA_TUNER_SIMPLE=m
+CONFIG_MEDIA_TUNER_TDA18250=m
+CONFIG_MEDIA_TUNER_TDA8290=m
+CONFIG_MEDIA_TUNER_TDA827X=m
+CONFIG_MEDIA_TUNER_TDA18271=m
+CONFIG_MEDIA_TUNER_TDA9887=m
+CONFIG_MEDIA_TUNER_TEA5761=m
+CONFIG_MEDIA_TUNER_TEA5767=m
+CONFIG_MEDIA_TUNER_MSI001=m
+CONFIG_MEDIA_TUNER_MT20XX=m
+CONFIG_MEDIA_TUNER_MT2060=m
+CONFIG_MEDIA_TUNER_MT2063=m
+CONFIG_MEDIA_TUNER_MT2266=m
+CONFIG_MEDIA_TUNER_MT2131=m
+CONFIG_MEDIA_TUNER_QT1010=m
+CONFIG_MEDIA_TUNER_XC2028=m
+CONFIG_MEDIA_TUNER_XC5000=m
+CONFIG_MEDIA_TUNER_XC4000=m
+CONFIG_MEDIA_TUNER_MXL5005S=m
+CONFIG_MEDIA_TUNER_MXL5007T=m
+CONFIG_MEDIA_TUNER_MC44S803=m
+CONFIG_MEDIA_TUNER_MAX2165=m
+CONFIG_MEDIA_TUNER_TDA18218=m
+CONFIG_MEDIA_TUNER_FC0011=m
+CONFIG_MEDIA_TUNER_FC0012=m
+CONFIG_MEDIA_TUNER_FC0013=m
+CONFIG_MEDIA_TUNER_TDA18212=m
+CONFIG_MEDIA_TUNER_E4000=m
+CONFIG_MEDIA_TUNER_FC2580=m
+CONFIG_MEDIA_TUNER_M88RS6000T=m
+CONFIG_MEDIA_TUNER_TUA9001=m
+CONFIG_MEDIA_TUNER_SI2157=m
+CONFIG_MEDIA_TUNER_IT913X=m
+CONFIG_MEDIA_TUNER_R820T=m
+CONFIG_MEDIA_TUNER_MXL301RF=m
+CONFIG_MEDIA_TUNER_QM1D1C0042=m
+CONFIG_MEDIA_TUNER_QM1D1B0004=m
+# end of Customize TV tuners
+
+#
+# Customise DVB Frontends
+#
+
+#
+# Multistandard (satellite) frontends
+#
+CONFIG_DVB_STB0899=m
+CONFIG_DVB_STB6100=m
+CONFIG_DVB_STV090x=m
+CONFIG_DVB_STV0910=m
+CONFIG_DVB_STV6110x=m
+CONFIG_DVB_STV6111=m
+CONFIG_DVB_MXL5XX=m
+CONFIG_DVB_M88DS3103=m
+
+#
+# Multistandard (cable + terrestrial) frontends
+#
+CONFIG_DVB_DRXK=m
+CONFIG_DVB_TDA18271C2DD=m
+CONFIG_DVB_SI2165=m
+CONFIG_DVB_MN88472=m
+CONFIG_DVB_MN88473=m
+
+#
+# DVB-S (satellite) frontends
+#
+CONFIG_DVB_CX24110=m
+CONFIG_DVB_CX24123=m
+CONFIG_DVB_MT312=m
+CONFIG_DVB_ZL10036=m
+CONFIG_DVB_ZL10039=m
+CONFIG_DVB_S5H1420=m
+CONFIG_DVB_STV0288=m
+CONFIG_DVB_STB6000=m
+CONFIG_DVB_STV0299=m
+CONFIG_DVB_STV6110=m
+CONFIG_DVB_STV0900=m
+CONFIG_DVB_TDA8083=m
+CONFIG_DVB_TDA10086=m
+CONFIG_DVB_TDA8261=m
+CONFIG_DVB_VES1X93=m
+CONFIG_DVB_TUNER_ITD1000=m
+CONFIG_DVB_TUNER_CX24113=m
+CONFIG_DVB_TDA826X=m
+CONFIG_DVB_TUA6100=m
+CONFIG_DVB_CX24116=m
+CONFIG_DVB_CX24117=m
+CONFIG_DVB_CX24120=m
+CONFIG_DVB_SI21XX=m
+CONFIG_DVB_TS2020=m
+CONFIG_DVB_DS3000=m
+CONFIG_DVB_MB86A16=m
+CONFIG_DVB_TDA10071=m
+
+#
+# DVB-T (terrestrial) frontends
+#
+CONFIG_DVB_SP8870=m
+CONFIG_DVB_SP887X=m
+CONFIG_DVB_CX22700=m
+CONFIG_DVB_CX22702=m
+CONFIG_DVB_S5H1432=m
+CONFIG_DVB_DRXD=m
+CONFIG_DVB_L64781=m
+CONFIG_DVB_TDA1004X=m
+CONFIG_DVB_NXT6000=m
+CONFIG_DVB_MT352=m
+CONFIG_DVB_ZL10353=m
+CONFIG_DVB_DIB3000MB=m
+CONFIG_DVB_DIB3000MC=m
+CONFIG_DVB_DIB7000M=m
+CONFIG_DVB_DIB7000P=m
+CONFIG_DVB_DIB9000=m
+CONFIG_DVB_TDA10048=m
+CONFIG_DVB_AF9013=m
+CONFIG_DVB_EC100=m
+CONFIG_DVB_STV0367=m
+CONFIG_DVB_CXD2820R=m
+CONFIG_DVB_CXD2841ER=m
+CONFIG_DVB_RTL2830=m
+CONFIG_DVB_RTL2832=m
+CONFIG_DVB_SI2168=m
+CONFIG_DVB_ZD1301_DEMOD=m
+CONFIG_DVB_CXD2880=m
+
+#
+# DVB-C (cable) frontends
+#
+CONFIG_DVB_VES1820=m
+CONFIG_DVB_TDA10021=m
+CONFIG_DVB_TDA10023=m
+CONFIG_DVB_STV0297=m
+
+#
+# ATSC (North American/Korean Terrestrial/Cable DTV) frontends
+#
+CONFIG_DVB_NXT200X=m
+CONFIG_DVB_OR51211=m
+CONFIG_DVB_OR51132=m
+CONFIG_DVB_BCM3510=m
+CONFIG_DVB_LGDT330X=m
+CONFIG_DVB_LGDT3305=m
+CONFIG_DVB_LGDT3306A=m
+CONFIG_DVB_LG2160=m
+CONFIG_DVB_S5H1409=m
+CONFIG_DVB_AU8522=m
+CONFIG_DVB_AU8522_DTV=m
+CONFIG_DVB_AU8522_V4L=m
+CONFIG_DVB_S5H1411=m
+
+#
+# ISDB-T (terrestrial) frontends
+#
+CONFIG_DVB_S921=m
+CONFIG_DVB_DIB8000=m
+CONFIG_DVB_MB86A20S=m
+
+#
+# ISDB-S (satellite) & ISDB-T (terrestrial) frontends
+#
+CONFIG_DVB_TC90522=m
+CONFIG_DVB_MN88443X=m
+
+#
+# Digital terrestrial only tuners/PLL
+#
+CONFIG_DVB_PLL=m
+CONFIG_DVB_TUNER_DIB0070=m
+CONFIG_DVB_TUNER_DIB0090=m
+
+#
+# SEC control devices for DVB-S
+#
+CONFIG_DVB_DRX39XYJ=m
+CONFIG_DVB_LNBH25=m
+CONFIG_DVB_LNBH29=m
+CONFIG_DVB_LNBP21=m
+CONFIG_DVB_LNBP22=m
+CONFIG_DVB_ISL6405=m
+CONFIG_DVB_ISL6421=m
+CONFIG_DVB_ISL6423=m
+CONFIG_DVB_A8293=m
+CONFIG_DVB_LGS8GL5=m
+CONFIG_DVB_LGS8GXX=m
+CONFIG_DVB_ATBM8830=m
+CONFIG_DVB_TDA665x=m
+CONFIG_DVB_IX2505V=m
+CONFIG_DVB_M88RS2000=m
+CONFIG_DVB_AF9033=m
+CONFIG_DVB_HORUS3A=m
+CONFIG_DVB_ASCOT2E=m
+CONFIG_DVB_HELENE=m
+
+#
+# Common Interface (EN50221) controller drivers
+#
+CONFIG_DVB_CXD2099=m
+CONFIG_DVB_SP2=m
+
+#
+# Tools to develop new frontends
+#
+# CONFIG_DVB_DUMMY_FE is not set
+# end of Customise DVB Frontends
+
+#
+# Graphics support
+#
+CONFIG_VGA_ARB=y
+CONFIG_VGA_ARB_MAX_GPUS=16
+# CONFIG_TEGRA_HOST1X is not set
+CONFIG_IMX8_PC=y
+CONFIG_IMX8_PRG=y
+CONFIG_IMX8_DPRC=y
+CONFIG_IMX_DPU_CORE=y
+CONFIG_IMX_DPU_BLIT=y
+CONFIG_IMX_LCDIF_CORE=y
+CONFIG_DRM=y
+CONFIG_DRM_MIPI_DSI=y
+# CONFIG_DRM_DP_AUX_CHARDEV is not set
+# CONFIG_DRM_DEBUG_MM is not set
+# CONFIG_DRM_DEBUG_SELFTEST is not set
+CONFIG_DRM_KMS_HELPER=y
+CONFIG_DRM_KMS_FB_HELPER=y
+CONFIG_DRM_FBDEV_EMULATION=y
+CONFIG_DRM_FBDEV_OVERALLOC=100
+# CONFIG_DRM_FBDEV_LEAK_PHYS_SMEM is not set
+# CONFIG_DRM_LOAD_EDID_FIRMWARE is not set
+# CONFIG_DRM_DP_CEC is not set
+CONFIG_DRM_TTM=m
+CONFIG_DRM_GEM_CMA_HELPER=y
+CONFIG_DRM_KMS_CMA_HELPER=y
+CONFIG_DRM_GEM_SHMEM_HELPER=y
+CONFIG_DRM_VM=y
+CONFIG_DRM_SCHED=m
+
+#
+# I2C encoder or helper chips
+#
+CONFIG_DRM_I2C_CH7006=m
+CONFIG_DRM_I2C_SIL164=m
+CONFIG_DRM_I2C_NXP_TDA998X=m
+# CONFIG_DRM_I2C_NXP_TDA9950 is not set
+# end of I2C encoder or helper chips
+
+#
+# ARM devices
+#
+# CONFIG_DRM_HDLCD is not set
+CONFIG_DRM_MALI_DISPLAY=m
+# CONFIG_DRM_KOMEDA is not set
+# end of ARM devices
+
+# CONFIG_DRM_RADEON is not set
+# CONFIG_DRM_AMDGPU is not set
+
+#
+# ACP (Audio CoProcessor) Configuration
+#
+# end of ACP (Audio CoProcessor) Configuration
+
+CONFIG_DRM_NOUVEAU=m
+CONFIG_NOUVEAU_LEGACY_CTX_SUPPORT=y
+CONFIG_NOUVEAU_PLATFORM_DRIVER=y
+CONFIG_NOUVEAU_DEBUG=5
+CONFIG_NOUVEAU_DEBUG_DEFAULT=3
+# CONFIG_NOUVEAU_DEBUG_MMU is not set
+CONFIG_DRM_NOUVEAU_BACKLIGHT=y
+# CONFIG_DRM_VGEM is not set
+# CONFIG_DRM_VKMS is not set
+CONFIG_DRM_ATI_PCIGART=y
+# CONFIG_DRM_EXYNOS is not set
+# CONFIG_DRM_ROCKCHIP is not set
+# CONFIG_DRM_UDL is not set
+# CONFIG_DRM_AST is not set
+# CONFIG_DRM_MGAG200 is not set
+# CONFIG_DRM_CIRRUS_QEMU is not set
+# CONFIG_DRM_RCAR_DU is not set
+# CONFIG_DRM_RCAR_DW_HDMI is not set
+CONFIG_DRM_RCAR_LVDS=m
+CONFIG_DRM_RCAR_WRITEBACK=y
+CONFIG_DRM_SUN4I=m
+CONFIG_DRM_SUN4I_HDMI=m
+# CONFIG_DRM_SUN4I_HDMI_CEC is not set
+CONFIG_DRM_SUN4I_BACKEND=m
+# CONFIG_DRM_SUN6I_DSI is not set
+CONFIG_DRM_SUN8I_DW_HDMI=m
+CONFIG_DRM_SUN8I_MIXER=m
+CONFIG_DRM_SUN8I_TCON_TOP=m
+# CONFIG_DRM_QXL is not set
+# CONFIG_DRM_BOCHS is not set
+# CONFIG_DRM_VIRTIO_GPU is not set
+# CONFIG_DRM_MSM is not set
+# CONFIG_DRM_TEGRA is not set
+CONFIG_DRM_PANEL=y
+
+#
+# Display Panels
+#
+# CONFIG_DRM_PANEL_ARM_VERSATILE is not set
+# CONFIG_DRM_PANEL_LVDS is not set
+CONFIG_DRM_PANEL_SIMPLE=y
+# CONFIG_DRM_PANEL_FEIYANG_FY07024DI26A30D is not set
+# CONFIG_DRM_PANEL_ILITEK_IL9322 is not set
+# CONFIG_DRM_PANEL_ILITEK_ILI9881C is not set
+# CONFIG_DRM_PANEL_INNOLUX_P079ZCA is not set
+# CONFIG_DRM_PANEL_JDI_LT070ME05000 is not set
+# CONFIG_DRM_PANEL_KINGDISPLAY_KD097D04 is not set
+# CONFIG_DRM_PANEL_SAMSUNG_LD9040 is not set
+# CONFIG_DRM_PANEL_LG_LB035Q02 is not set
+# CONFIG_DRM_PANEL_LG_LG4573 is not set
+# CONFIG_DRM_PANEL_NEC_NL8048HL11 is not set
+# CONFIG_DRM_PANEL_NOVATEK_NT39016 is not set
+# CONFIG_DRM_PANEL_OLIMEX_LCD_OLINUXINO is not set
+# CONFIG_DRM_PANEL_ORISETECH_OTM8009A is not set
+# CONFIG_DRM_PANEL_OSD_OSD101T2587_53TS is not set
+# CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00 is not set
+# CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN is not set
+CONFIG_DRM_PANEL_RAYDIUM_RM67191=y
+# CONFIG_DRM_PANEL_RAYDIUM_RM68200 is not set
+# CONFIG_DRM_PANEL_ROCKTECH_JH057N00900 is not set
+# CONFIG_DRM_PANEL_RONBO_RB070D30 is not set
+# CONFIG_DRM_PANEL_SAMSUNG_S6D16D0 is not set
+# CONFIG_DRM_PANEL_SAMSUNG_S6E3HA2 is not set
+# CONFIG_DRM_PANEL_SAMSUNG_S6E63J0X03 is not set
+# CONFIG_DRM_PANEL_SAMSUNG_S6E63M0 is not set
+# CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0 is not set
+# CONFIG_DRM_PANEL_SEIKO_43WVF1G is not set
+# CONFIG_DRM_PANEL_SHARP_LQ101R1SX01 is not set
+# CONFIG_DRM_PANEL_SHARP_LS037V7DW01 is not set
+# CONFIG_DRM_PANEL_SHARP_LS043T1LE01 is not set
+# CONFIG_DRM_PANEL_SITRONIX_ST7701 is not set
+# CONFIG_DRM_PANEL_SITRONIX_ST7789V is not set
+# CONFIG_DRM_PANEL_SONY_ACX565AKM is not set
+# CONFIG_DRM_PANEL_TPO_TD028TTEC1 is not set
+# CONFIG_DRM_PANEL_TPO_TD043MTEA1 is not set
+# CONFIG_DRM_PANEL_TPO_TPG110 is not set
+# CONFIG_DRM_PANEL_TRULY_NT35597_WQXGA is not set
+# end of Display Panels
+
+CONFIG_DRM_BRIDGE=y
+CONFIG_DRM_PANEL_BRIDGE=y
+
+#
+# Display Interface Bridges
+#
+# CONFIG_DRM_ANALOGIX_ANX78XX is not set
+# CONFIG_DRM_CDNS_DSI is not set
+# CONFIG_DRM_DUMB_VGA_DAC is not set
+# CONFIG_DRM_LVDS_ENCODER is not set
+# CONFIG_DRM_MEGACHIPS_STDPXXXX_GE_B850V3_FW is not set
+CONFIG_DRM_SEC_MIPI_DSIM=y
+# CONFIG_DRM_NXP_PTN3460 is not set
+# CONFIG_DRM_PARADE_PS8622 is not set
+# CONFIG_DRM_SIL_SII8620 is not set
+CONFIG_DRM_SII902X=m
+# CONFIG_DRM_SII9234 is not set
+# CONFIG_DRM_THINE_THC63LVD1024 is not set
+# CONFIG_DRM_TOSHIBA_TC358764 is not set
+# CONFIG_DRM_TOSHIBA_TC358767 is not set
+# CONFIG_DRM_TI_TFP410 is not set
+# CONFIG_DRM_TI_SN65DSI86 is not set
+CONFIG_DRM_I2C_ADV7511=y
+# CONFIG_DRM_I2C_ADV7511_AUDIO is not set
+CONFIG_DRM_I2C_ADV7533=y
+CONFIG_DRM_I2C_ADV7511_CEC=y
+CONFIG_DRM_NWL_MIPI_DSI=y
+CONFIG_DRM_CDNS_MHDP=y
+CONFIG_DRM_CDNS_HDMI=y
+CONFIG_DRM_CDNS_DP=y
+CONFIG_DRM_CDNS_AUDIO=y
+CONFIG_DRM_CDNS_HDMI_CEC=y
+CONFIG_DRM_DW_HDMI=y
+# CONFIG_DRM_DW_HDMI_AHB_AUDIO is not set
+CONFIG_DRM_DW_HDMI_I2S_AUDIO=m
+# CONFIG_DRM_DW_HDMI_CEC is not set
+CONFIG_DRM_ITE_IT6263=y
+# end of Display Interface Bridges
+
+CONFIG_DRM_IMX=y
+CONFIG_DRM_IMX_PARALLEL_DISPLAY=y
+CONFIG_DRM_IMX_TVE=y
+CONFIG_DRM_IMX_LDB=y
+CONFIG_DRM_IMX_HDMI=y
+CONFIG_DRM_IMX_SEC_DSIM=y
+CONFIG_DRM_IMX_CDNS_MHDP=y
+CONFIG_DRM_IMX_DPU=y
+CONFIG_DRM_IMX_LCDIF=y
+CONFIG_DRM_IMX_DCSS=y
+# CONFIG_DRM_VC4 is not set
+CONFIG_DRM_ETNAVIV=m
+CONFIG_DRM_ETNAVIV_THERMAL=y
+# CONFIG_DRM_ARCPGU is not set
+# CONFIG_DRM_HISI_HIBMC is not set
+# CONFIG_DRM_HISI_KIRIN is not set
+# CONFIG_DRM_MEDIATEK is not set
+# CONFIG_DRM_ZTE is not set
+CONFIG_DRM_MXS=y
+CONFIG_DRM_MXSFB=y
+# CONFIG_DRM_MESON is not set
+# CONFIG_DRM_GM12U320 is not set
+# CONFIG_TINYDRM_HX8357D is not set
+# CONFIG_TINYDRM_ILI9225 is not set
+# CONFIG_TINYDRM_ILI9341 is not set
+# CONFIG_TINYDRM_MI0283QT is not set
+# CONFIG_TINYDRM_REPAPER is not set
+# CONFIG_TINYDRM_ST7586 is not set
+# CONFIG_TINYDRM_ST7735R is not set
+CONFIG_DRM_PL111=m
+# CONFIG_DRM_XEN is not set
+CONFIG_DRM_LIMA=m
+CONFIG_DRM_PANFROST=m
+CONFIG_DRM_LEGACY=y
+# CONFIG_DRM_TDFX is not set
+# CONFIG_DRM_R128 is not set
+# CONFIG_DRM_MGA is not set
+# CONFIG_DRM_VIA is not set
+# CONFIG_DRM_SAVAGE is not set
+CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y
+
+#
+# Frame buffer Devices
+#
+CONFIG_FB_CMDLINE=y
+CONFIG_FB_NOTIFY=y
+CONFIG_FB=y
+# CONFIG_FIRMWARE_EDID is not set
+CONFIG_FB_CFB_FILLRECT=y
+CONFIG_FB_CFB_COPYAREA=y
+CONFIG_FB_CFB_IMAGEBLIT=y
+CONFIG_FB_SYS_FILLRECT=y
+CONFIG_FB_SYS_COPYAREA=y
+CONFIG_FB_SYS_IMAGEBLIT=y
+# CONFIG_FB_FOREIGN_ENDIAN is not set
+CONFIG_FB_SYS_FOPS=y
+CONFIG_FB_DEFERRED_IO=y
+CONFIG_FB_MODE_HELPERS=y
+# CONFIG_FB_TILEBLITTING is not set
+
+#
+# Frame buffer hardware drivers
+#
+# CONFIG_FB_CIRRUS is not set
+# CONFIG_FB_PM2 is not set
+CONFIG_FB_ARMCLCD=y
+# CONFIG_FB_IMX is not set
+# CONFIG_FB_CYBER2000 is not set
+# CONFIG_FB_ASILIANT is not set
+# CONFIG_FB_IMSTT is not set
+CONFIG_FB_EFI=y
+# CONFIG_FB_OPENCORES is not set
+# CONFIG_FB_S1D13XXX is not set
+# CONFIG_FB_NVIDIA is not set
+# CONFIG_FB_RIVA is not set
+# CONFIG_FB_I740 is not set
+# CONFIG_FB_MATROX is not set
+# CONFIG_FB_RADEON is not set
+# CONFIG_FB_ATY128 is not set
+# CONFIG_FB_ATY is not set
+# CONFIG_FB_S3 is not set
+# CONFIG_FB_SAVAGE is not set
+# CONFIG_FB_SIS is not set
+# CONFIG_FB_NEOMAGIC is not set
+# CONFIG_FB_KYRO is not set
+# CONFIG_FB_3DFX is not set
+# CONFIG_FB_VOODOO1 is not set
+# CONFIG_FB_VT8623 is not set
+# CONFIG_FB_TRIDENT is not set
+# CONFIG_FB_ARK is not set
+# CONFIG_FB_PM3 is not set
+# CONFIG_FB_CARMINE is not set
+# CONFIG_FB_SH_MOBILE_LCDC is not set
+# CONFIG_FB_SMSCUFX is not set
+# CONFIG_FB_UDL is not set
+# CONFIG_FB_IBM_GXT4500 is not set
+# CONFIG_FB_XILINX is not set
+# CONFIG_FB_VIRTUAL is not set
+CONFIG_XEN_FBDEV_FRONTEND=y
+# CONFIG_FB_METRONOME is not set
+# CONFIG_FB_MB862XX is not set
+CONFIG_FB_MX3=y
+# CONFIG_FB_MXS is not set
+# CONFIG_FB_SIMPLE is not set
+# CONFIG_FB_SSD1307 is not set
+# CONFIG_FB_SM712 is not set
+CONFIG_FB_MXC=y
+# CONFIG_FB_MXC_DISP_FRAMEWORK is not set
+# CONFIG_FB_MXC_OVERLAY is not set
+CONFIG_FB_MXC_EDID=y
+# CONFIG_FB_MXC_EINK_PANEL is not set
+# CONFIG_FB_MXC_EINK_V2_PANEL is not set
+# end of Frame buffer Devices
+
+#
+# Backlight & LCD device support
+#
+# CONFIG_LCD_CLASS_DEVICE is not set
+CONFIG_BACKLIGHT_CLASS_DEVICE=y
+# CONFIG_BACKLIGHT_GENERIC is not set
+CONFIG_BACKLIGHT_PWM=y
+# CONFIG_BACKLIGHT_PM8941_WLED is not set
+# CONFIG_BACKLIGHT_ADP8860 is not set
+# CONFIG_BACKLIGHT_ADP8870 is not set
+# CONFIG_BACKLIGHT_LM3630A is not set
+# CONFIG_BACKLIGHT_LM3639 is not set
+CONFIG_BACKLIGHT_LP855X=m
+# CONFIG_BACKLIGHT_GPIO is not set
+# CONFIG_BACKLIGHT_LV5207LP is not set
+# CONFIG_BACKLIGHT_BD6107 is not set
+# CONFIG_BACKLIGHT_ARCXCNN is not set
+# end of Backlight & LCD device support
+
+CONFIG_VIDEOMODE_HELPERS=y
+CONFIG_HDMI=y
+
+#
+# Console display driver support
+#
+CONFIG_DUMMY_CONSOLE=y
+CONFIG_DUMMY_CONSOLE_COLUMNS=80
+CONFIG_DUMMY_CONSOLE_ROWS=25
+CONFIG_FRAMEBUFFER_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
+# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
+# CONFIG_FRAMEBUFFER_CONSOLE_DEFERRED_TAKEOVER is not set
+# end of Console display driver support
+
+CONFIG_LOGO=y
+# CONFIG_LOGO_LINUX_MONO is not set
+# CONFIG_LOGO_LINUX_VGA16 is not set
+CONFIG_LOGO_LINUX_CLUT224=y
+# end of Graphics support
+
+CONFIG_SOUND=y
+CONFIG_SOUND_OSS_CORE=y
+CONFIG_SOUND_OSS_CORE_PRECLAIM=y
+CONFIG_SND=y
+CONFIG_SND_TIMER=y
+CONFIG_SND_PCM=y
+CONFIG_SND_PCM_ELD=y
+CONFIG_SND_PCM_IEC958=y
+CONFIG_SND_DMAENGINE_PCM=y
+CONFIG_SND_HWDEP=m
+CONFIG_SND_RAWMIDI=y
+CONFIG_SND_COMPRESS_OFFLOAD=y
+CONFIG_SND_JACK=y
+CONFIG_SND_JACK_INPUT_DEV=y
+CONFIG_SND_OSSEMUL=y
+CONFIG_SND_MIXER_OSS=y
+CONFIG_SND_PCM_OSS=y
+CONFIG_SND_PCM_OSS_PLUGINS=y
+CONFIG_SND_PCM_TIMER=y
+# CONFIG_SND_HRTIMER is not set
+CONFIG_SND_DYNAMIC_MINORS=y
+CONFIG_SND_MAX_CARDS=32
+CONFIG_SND_SUPPORT_OLD_API=y
+CONFIG_SND_PROC_FS=y
+CONFIG_SND_VERBOSE_PROCFS=y
+# CONFIG_SND_VERBOSE_PRINTK is not set
+# CONFIG_SND_DEBUG is not set
+CONFIG_SND_VMASTER=y
+# CONFIG_SND_SEQUENCER is not set
+CONFIG_SND_DRIVERS=y
+# CONFIG_SND_DUMMY is not set
+# CONFIG_SND_ALOOP is not set
+# CONFIG_SND_MTPAV is not set
+# CONFIG_SND_SERIAL_U16550 is not set
+# CONFIG_SND_MPU401 is not set
+CONFIG_SND_PCI=y
+# CONFIG_SND_AD1889 is not set
+# CONFIG_SND_ATIIXP is not set
+# CONFIG_SND_ATIIXP_MODEM is not set
+# CONFIG_SND_AU8810 is not set
+# CONFIG_SND_AU8820 is not set
+# CONFIG_SND_AU8830 is not set
+# CONFIG_SND_AW2 is not set
+# CONFIG_SND_BT87X is not set
+# CONFIG_SND_CA0106 is not set
+# CONFIG_SND_CMIPCI is not set
+# CONFIG_SND_OXYGEN is not set
+# CONFIG_SND_CS4281 is not set
+# CONFIG_SND_CS46XX is not set
+# CONFIG_SND_CTXFI is not set
+# CONFIG_SND_DARLA20 is not set
+# CONFIG_SND_GINA20 is not set
+# CONFIG_SND_LAYLA20 is not set
+# CONFIG_SND_DARLA24 is not set
+# CONFIG_SND_GINA24 is not set
+# CONFIG_SND_LAYLA24 is not set
+# CONFIG_SND_MONA is not set
+# CONFIG_SND_MIA is not set
+# CONFIG_SND_ECHO3G is not set
+# CONFIG_SND_INDIGO is not set
+# CONFIG_SND_INDIGOIO is not set
+# CONFIG_SND_INDIGODJ is not set
+# CONFIG_SND_INDIGOIOX is not set
+# CONFIG_SND_INDIGODJX is not set
+# CONFIG_SND_ENS1370 is not set
+# CONFIG_SND_ENS1371 is not set
+# CONFIG_SND_FM801 is not set
+# CONFIG_SND_HDSP is not set
+# CONFIG_SND_HDSPM is not set
+# CONFIG_SND_ICE1724 is not set
+# CONFIG_SND_INTEL8X0 is not set
+# CONFIG_SND_INTEL8X0M is not set
+# CONFIG_SND_KORG1212 is not set
+# CONFIG_SND_LOLA is not set
+# CONFIG_SND_LX6464ES is not set
+# CONFIG_SND_MIXART is not set
+# CONFIG_SND_NM256 is not set
+# CONFIG_SND_PCXHR is not set
+# CONFIG_SND_RIPTIDE is not set
+# CONFIG_SND_RME32 is not set
+# CONFIG_SND_RME96 is not set
+# CONFIG_SND_RME9652 is not set
+# CONFIG_SND_SE6X is not set
+# CONFIG_SND_VIA82XX is not set
+# CONFIG_SND_VIA82XX_MODEM is not set
+# CONFIG_SND_VIRTUOSO is not set
+# CONFIG_SND_VX222 is not set
+# CONFIG_SND_YMFPCI is not set
+
+#
+# HD-Audio
+#
+CONFIG_SND_HDA=m
+# CONFIG_SND_HDA_INTEL is not set
+CONFIG_SND_HDA_TEGRA=m
+# CONFIG_SND_HDA_HWDEP is not set
+# CONFIG_SND_HDA_RECONFIG is not set
+# CONFIG_SND_HDA_INPUT_BEEP is not set
+# CONFIG_SND_HDA_PATCH_LOADER is not set
+# CONFIG_SND_HDA_CODEC_REALTEK is not set
+# CONFIG_SND_HDA_CODEC_ANALOG is not set
+# CONFIG_SND_HDA_CODEC_SIGMATEL is not set
+# CONFIG_SND_HDA_CODEC_VIA is not set
+CONFIG_SND_HDA_CODEC_HDMI=m
+# CONFIG_SND_HDA_CODEC_CIRRUS is not set
+# CONFIG_SND_HDA_CODEC_CONEXANT is not set
+# CONFIG_SND_HDA_CODEC_CA0110 is not set
+# CONFIG_SND_HDA_CODEC_CA0132 is not set
+# CONFIG_SND_HDA_CODEC_CMEDIA is not set
+# CONFIG_SND_HDA_CODEC_SI3054 is not set
+# CONFIG_SND_HDA_GENERIC is not set
+CONFIG_SND_HDA_POWER_SAVE_DEFAULT=0
+# end of HD-Audio
+
+CONFIG_SND_HDA_CORE=m
+CONFIG_SND_HDA_ALIGNED_MMIO=y
+CONFIG_SND_HDA_PREALLOC_SIZE=64
+CONFIG_SND_SPI=y
+CONFIG_SND_USB=y
+CONFIG_SND_USB_AUDIO=m
+CONFIG_SND_USB_AUDIO_USE_MEDIA_CONTROLLER=y
+# CONFIG_SND_USB_UA101 is not set
+# CONFIG_SND_USB_CAIAQ is not set
+# CONFIG_SND_USB_6FIRE is not set
+# CONFIG_SND_USB_HIFACE is not set
+# CONFIG_SND_BCD2000 is not set
+# CONFIG_SND_USB_POD is not set
+# CONFIG_SND_USB_PODHD is not set
+# CONFIG_SND_USB_TONEPORT is not set
+# CONFIG_SND_USB_VARIAX is not set
+CONFIG_SND_SOC=y
+CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y
+CONFIG_SND_SOC_COMPRESS=y
+CONFIG_SND_SOC_TOPOLOGY=y
+# CONFIG_SND_SOC_AMD_ACP is not set
+# CONFIG_SND_ATMEL_SOC is not set
+CONFIG_SND_BCM2835_SOC_I2S=m
+# CONFIG_SND_DESIGNWARE_I2S is not set
+
+#
+# SoC Audio for Freescale CPUs
+#
+
+#
+# Common SoC Audio options for Freescale CPUs:
+#
+CONFIG_SND_SOC_FSL_ASRC=y
+CONFIG_SND_SOC_FSL_SAI=y
+CONFIG_SND_SOC_FSL_AUDMIX=y
+# CONFIG_SND_SOC_FSL_SSI is not set
+CONFIG_SND_SOC_FSL_SPDIF=y
+CONFIG_SND_SOC_FSL_ESAI=y
+CONFIG_SND_SOC_FSL_DAI=m
+CONFIG_SND_SOC_FSL_MICFIL=y
+CONFIG_SND_SOC_FSL_EASRC=y
+CONFIG_SND_SOC_FSL_DSP=y
+CONFIG_SND_SOC_FSL_RPMSG_I2S=y
+CONFIG_SND_SOC_FSL_UTILS=y
+CONFIG_SND_SOC_IMX_PCM_DMA=y
+CONFIG_SND_SOC_IMX_PCM_RPMSG=y
+# CONFIG_SND_SOC_IMX_AUDMUX is not set
+CONFIG_SND_IMX_SOC=y
+
+#
+# SoC Audio support for Freescale i.MX boards:
+#
+CONFIG_SND_SOC_IMX_AK4458=y
+CONFIG_SND_SOC_IMX_AK5558=y
+CONFIG_SND_SOC_IMX_AK4497=y
+CONFIG_SND_SOC_IMX_WM8960=y
+CONFIG_SND_SOC_IMX_WM8524=y
+# CONFIG_SND_SOC_IMX_SII902X is not set
+# CONFIG_SND_SOC_IMX_WM8958 is not set
+CONFIG_SND_SOC_IMX_CS42888=y
+# CONFIG_SND_SOC_IMX_WM8962 is not set
+CONFIG_SND_SOC_IMX_MICFIL=y
+CONFIG_SND_SOC_IMX_RPMSG=y
+# CONFIG_SND_SOC_IMX_ES8328 is not set
+# CONFIG_SND_SOC_IMX_SGTL5000 is not set
+CONFIG_SND_SOC_IMX_MQS=y
+CONFIG_SND_SOC_IMX_SPDIF=y
+# CONFIG_SND_SOC_FSL_ASOC_CARD is not set
+CONFIG_SND_SOC_IMX_AUDMIX=y
+CONFIG_SND_SOC_IMX_PDM_MIC=y
+CONFIG_SND_SOC_IMX_DSP=y
+# CONFIG_SND_SOC_IMX_SI476X is not set
+CONFIG_SND_SOC_IMX_CDNHDMI=y
+# end of SoC Audio for Freescale CPUs
+
+# CONFIG_SND_I2S_HI6210_I2S is not set
+# CONFIG_SND_KIRKWOOD_SOC is not set
+# CONFIG_SND_SOC_IMG is not set
+# CONFIG_SND_SOC_MT2701 is not set
+# CONFIG_SND_SOC_MT6797 is not set
+# CONFIG_SND_SOC_MT8173 is not set
+# CONFIG_SND_SOC_MT8183 is not set
+# CONFIG_SND_SOC_MTK_BTCVSD is not set
+
+#
+# ASoC support for Amlogic platforms
+#
+CONFIG_SND_MESON_AXG_FIFO=m
+CONFIG_SND_MESON_AXG_FRDDR=m
+CONFIG_SND_MESON_AXG_TODDR=m
+CONFIG_SND_MESON_AXG_TDM_FORMATTER=m
+CONFIG_SND_MESON_AXG_TDM_INTERFACE=m
+CONFIG_SND_MESON_AXG_TDMIN=m
+CONFIG_SND_MESON_AXG_TDMOUT=m
+CONFIG_SND_MESON_AXG_SOUND_CARD=m
+CONFIG_SND_MESON_AXG_SPDIFOUT=m
+CONFIG_SND_MESON_AXG_SPDIFIN=m
+CONFIG_SND_MESON_AXG_PDM=m
+CONFIG_SND_MESON_G12A_TOHDMITX=m
+# end of ASoC support for Amlogic platforms
+
+# CONFIG_SND_SOC_QCOM is not set
+# CONFIG_SND_SOC_ROCKCHIP is not set
+CONFIG_SND_SOC_SAMSUNG=y
+# CONFIG_SND_SAMSUNG_PCM is not set
+# CONFIG_SND_SAMSUNG_SPDIF is not set
+# CONFIG_SND_SAMSUNG_I2S is not set
+# CONFIG_SND_SOC_SAMSUNG_SMDK_WM8994 is not set
+# CONFIG_SND_SOC_SAMSUNG_SMDK_SPDIF is not set
+# CONFIG_SND_SOC_SMDK_WM8994_PCM is not set
+# CONFIG_SND_SOC_SNOW is not set
+# CONFIG_SND_SOC_ODROID is not set
+# CONFIG_SND_SOC_ARNDALE_RT5631_ALC5631 is not set
+
+#
+# SoC Audio support for Renesas SoCs
+#
+# CONFIG_SND_SOC_SH4_FSI is not set
+CONFIG_SND_SOC_RCAR=m
+# end of SoC Audio support for Renesas SoCs
+
+CONFIG_SND_SOC_SOF_TOPLEVEL=y
+# CONFIG_SND_SOC_SOF_PCI is not set
+# CONFIG_SND_SOC_SOF_ACPI is not set
+CONFIG_SND_SOC_SOF_OF=m
+CONFIG_SND_SOC_SOF_OPTIONS=m
+# CONFIG_SND_SOC_SOF_NOCODEC_SUPPORT is not set
+# CONFIG_SND_SOC_SOF_STRICT_ABI_CHECKS is not set
+# CONFIG_SND_SOC_SOF_DEBUG is not set
+CONFIG_SND_SOC_SOF=m
+CONFIG_SND_SOC_SOF_IMX_TOPLEVEL=y
+# CONFIG_SND_SOC_SOF_IMX8_SUPPORT is not set
+# CONFIG_SND_SOC_SPRD is not set
+
+#
+# STMicroelectronics STM32 SOC audio support
+#
+# end of STMicroelectronics STM32 SOC audio support
+
+#
+# Allwinner SoC Audio support
+#
+# CONFIG_SND_SUN4I_CODEC is not set
+# CONFIG_SND_SUN8I_CODEC is not set
+# CONFIG_SND_SUN8I_CODEC_ANALOG is not set
+# CONFIG_SND_SUN50I_CODEC_ANALOG is not set
+# CONFIG_SND_SUN4I_I2S is not set
+CONFIG_SND_SUN4I_SPDIF=m
+# end of Allwinner SoC Audio support
+
+# CONFIG_SND_SOC_TEGRA is not set
+# CONFIG_SND_SOC_UNIPHIER is not set
+# CONFIG_SND_SOC_XILINX_I2S is not set
+# CONFIG_SND_SOC_XILINX_AUDIO_FORMATTER is not set
+# CONFIG_SND_SOC_XILINX_SPDIF is not set
+# CONFIG_SND_SOC_XTFPGA_I2S is not set
+# CONFIG_ZX_SPDIF is not set
+# CONFIG_ZX_I2S is not set
+# CONFIG_ZX_TDM is not set
+CONFIG_SND_SOC_I2C_AND_SPI=y
+
+#
+# CODEC drivers
+#
+# CONFIG_SND_SOC_AC97_CODEC is not set
+# CONFIG_SND_SOC_ADAU1701 is not set
+# CONFIG_SND_SOC_ADAU1761_I2C is not set
+# CONFIG_SND_SOC_ADAU1761_SPI is not set
+# CONFIG_SND_SOC_ADAU7002 is not set
+# CONFIG_SND_SOC_AK4104 is not set
+# CONFIG_SND_SOC_AK4118 is not set
+CONFIG_SND_SOC_AK4458=y
+# CONFIG_SND_SOC_AK4554 is not set
+CONFIG_SND_SOC_AK4613=m
+# CONFIG_SND_SOC_AK4642 is not set
+# CONFIG_SND_SOC_AK5386 is not set
+CONFIG_SND_SOC_AK5558=y
+# CONFIG_SND_SOC_ALC5623 is not set
+# CONFIG_SND_SOC_BD28623 is not set
+# CONFIG_SND_SOC_BT_SCO is not set
+# CONFIG_SND_SOC_CROS_EC_CODEC is not set
+# CONFIG_SND_SOC_CS35L32 is not set
+# CONFIG_SND_SOC_CS35L33 is not set
+# CONFIG_SND_SOC_CS35L34 is not set
+# CONFIG_SND_SOC_CS35L35 is not set
+# CONFIG_SND_SOC_CS35L36 is not set
+# CONFIG_SND_SOC_CS42L42 is not set
+# CONFIG_SND_SOC_CS42L51_I2C is not set
+# CONFIG_SND_SOC_CS42L52 is not set
+# CONFIG_SND_SOC_CS42L56 is not set
+# CONFIG_SND_SOC_CS42L73 is not set
+# CONFIG_SND_SOC_CS4265 is not set
+# CONFIG_SND_SOC_CS4270 is not set
+# CONFIG_SND_SOC_CS4271_I2C is not set
+# CONFIG_SND_SOC_CS4271_SPI is not set
+CONFIG_SND_SOC_CS42XX8=y
+CONFIG_SND_SOC_CS42XX8_I2C=y
+# CONFIG_SND_SOC_CS43130 is not set
+# CONFIG_SND_SOC_CS4341 is not set
+# CONFIG_SND_SOC_CS4349 is not set
+# CONFIG_SND_SOC_CS53L30 is not set
+# CONFIG_SND_SOC_CX2072X is not set
+CONFIG_SND_SOC_DMIC=m
+CONFIG_SND_SOC_HDMI_CODEC=y
+CONFIG_SND_SOC_ES7134=m
+CONFIG_SND_SOC_ES7241=m
+# CONFIG_SND_SOC_ES8316 is not set
+# CONFIG_SND_SOC_ES8328_I2C is not set
+# CONFIG_SND_SOC_ES8328_SPI is not set
+CONFIG_SND_SOC_FSL_MQS=y
+# CONFIG_SND_SOC_GTM601 is not set
+# CONFIG_SND_SOC_INNO_RK3036 is not set
+# CONFIG_SND_SOC_MAX98088 is not set
+CONFIG_SND_SOC_MAX98357A=m
+# CONFIG_SND_SOC_MAX98504 is not set
+# CONFIG_SND_SOC_MAX9867 is not set
+# CONFIG_SND_SOC_MAX98927 is not set
+# CONFIG_SND_SOC_MAX98373 is not set
+# CONFIG_SND_SOC_MAX9860 is not set
+# CONFIG_SND_SOC_MSM8916_WCD_ANALOG is not set
+# CONFIG_SND_SOC_MSM8916_WCD_DIGITAL is not set
+# CONFIG_SND_SOC_PCM1681 is not set
+# CONFIG_SND_SOC_PCM1789_I2C is not set
+# CONFIG_SND_SOC_PCM179X_I2C is not set
+# CONFIG_SND_SOC_PCM179X_SPI is not set
+# CONFIG_SND_SOC_PCM186X_I2C is not set
+# CONFIG_SND_SOC_PCM186X_SPI is not set
+# CONFIG_SND_SOC_PCM3060_I2C is not set
+# CONFIG_SND_SOC_PCM3060_SPI is not set
+CONFIG_SND_SOC_PCM3168A=m
+CONFIG_SND_SOC_PCM3168A_I2C=m
+# CONFIG_SND_SOC_PCM3168A_SPI is not set
+# CONFIG_SND_SOC_PCM512x_I2C is not set
+# CONFIG_SND_SOC_PCM512x_SPI is not set
+# CONFIG_SND_SOC_RK3328 is not set
+# CONFIG_SND_SOC_RT5616 is not set
+# CONFIG_SND_SOC_RT5631 is not set
+CONFIG_SND_SOC_SGTL5000=m
+# CONFIG_SND_SOC_SIMPLE_AMPLIFIER is not set
+# CONFIG_SND_SOC_SIRF_AUDIO_CODEC is not set
+CONFIG_SND_SOC_SPDIF=m
+# CONFIG_SND_SOC_SSM2305 is not set
+# CONFIG_SND_SOC_SSM2602_SPI is not set
+# CONFIG_SND_SOC_SSM2602_I2C is not set
+# CONFIG_SND_SOC_SSM4567 is not set
+# CONFIG_SND_SOC_STA32X is not set
+# CONFIG_SND_SOC_STA350 is not set
+# CONFIG_SND_SOC_STI_SAS is not set
+# CONFIG_SND_SOC_TAS2552 is not set
+# CONFIG_SND_SOC_TAS5086 is not set
+CONFIG_SND_SOC_TAS571X=m
+# CONFIG_SND_SOC_TAS5720 is not set
+# CONFIG_SND_SOC_TAS6424 is not set
+# CONFIG_SND_SOC_TDA7419 is not set
+# CONFIG_SND_SOC_TFA9879 is not set
+# CONFIG_SND_SOC_TLV320AIC23_I2C is not set
+# CONFIG_SND_SOC_TLV320AIC23_SPI is not set
+# CONFIG_SND_SOC_TLV320AIC31XX is not set
+# CONFIG_SND_SOC_TLV320AIC32X4_I2C is not set
+# CONFIG_SND_SOC_TLV320AIC32X4_SPI is not set
+# CONFIG_SND_SOC_TLV320AIC3X is not set
+# CONFIG_SND_SOC_TS3A227E is not set
+# CONFIG_SND_SOC_TSCS42XX is not set
+# CONFIG_SND_SOC_TSCS454 is not set
+# CONFIG_SND_SOC_UDA1334 is not set
+# CONFIG_SND_SOC_WM8510 is not set
+# CONFIG_SND_SOC_WM8523 is not set
+CONFIG_SND_SOC_WM8524=y
+# CONFIG_SND_SOC_WM8580 is not set
+# CONFIG_SND_SOC_WM8711 is not set
+# CONFIG_SND_SOC_WM8728 is not set
+# CONFIG_SND_SOC_WM8731 is not set
+# CONFIG_SND_SOC_WM8737 is not set
+# CONFIG_SND_SOC_WM8741 is not set
+# CONFIG_SND_SOC_WM8750 is not set
+# CONFIG_SND_SOC_WM8753 is not set
+# CONFIG_SND_SOC_WM8770 is not set
+# CONFIG_SND_SOC_WM8776 is not set
+# CONFIG_SND_SOC_WM8782 is not set
+# CONFIG_SND_SOC_WM8804_I2C is not set
+# CONFIG_SND_SOC_WM8804_SPI is not set
+# CONFIG_SND_SOC_WM8903 is not set
+# CONFIG_SND_SOC_WM8904 is not set
+CONFIG_SND_SOC_WM8960=y
+# CONFIG_SND_SOC_WM8962 is not set
+# CONFIG_SND_SOC_WM8974 is not set
+# CONFIG_SND_SOC_WM8978 is not set
+# CONFIG_SND_SOC_WM8985 is not set
+# CONFIG_SND_SOC_ZX_AUD96P22 is not set
+CONFIG_SND_SOC_RPMSG_WM8960=y
+CONFIG_SND_SOC_RPMSG_CS42XX8=y
+CONFIG_SND_SOC_RPMSG_AK4497=y
+# CONFIG_SND_SOC_MAX9759 is not set
+# CONFIG_SND_SOC_MT6351 is not set
+# CONFIG_SND_SOC_MT6358 is not set
+# CONFIG_SND_SOC_NAU8540 is not set
+# CONFIG_SND_SOC_NAU8810 is not set
+# CONFIG_SND_SOC_NAU8822 is not set
+# CONFIG_SND_SOC_NAU8824 is not set
+# CONFIG_SND_SOC_TPA6130A2 is not set
+# end of CODEC drivers
+
+CONFIG_SND_SIMPLE_CARD_UTILS=y
+CONFIG_SND_SIMPLE_CARD=y
+CONFIG_SND_AUDIO_GRAPH_CARD=y
+# CONFIG_SND_XEN_FRONTEND is not set
+
+#
+# HID support
+#
+CONFIG_HID=y
+# CONFIG_HID_BATTERY_STRENGTH is not set
+# CONFIG_HIDRAW is not set
+# CONFIG_UHID is not set
+CONFIG_HID_GENERIC=y
+
+#
+# Special HID drivers
+#
+CONFIG_HID_A4TECH=y
+# CONFIG_HID_ACCUTOUCH is not set
+# CONFIG_HID_ACRUX is not set
+CONFIG_HID_APPLE=y
+# CONFIG_HID_APPLEIR is not set
+# CONFIG_HID_ASUS is not set
+# CONFIG_HID_AUREAL is not set
+CONFIG_HID_BELKIN=y
+# CONFIG_HID_BETOP_FF is not set
+# CONFIG_HID_BIGBEN_FF is not set
+CONFIG_HID_CHERRY=y
+CONFIG_HID_CHICONY=y
+# CONFIG_HID_CORSAIR is not set
+# CONFIG_HID_COUGAR is not set
+# CONFIG_HID_MACALLY is not set
+# CONFIG_HID_PRODIKEYS is not set
+# CONFIG_HID_CMEDIA is not set
+# CONFIG_HID_CREATIVE_SB0540 is not set
+CONFIG_HID_CYPRESS=y
+# CONFIG_HID_DRAGONRISE is not set
+# CONFIG_HID_EMS_FF is not set
+# CONFIG_HID_ELAN is not set
+# CONFIG_HID_ELECOM is not set
+# CONFIG_HID_ELO is not set
+CONFIG_HID_EZKEY=y
+# CONFIG_HID_GEMBIRD is not set
+# CONFIG_HID_GFRM is not set
+# CONFIG_HID_HOLTEK is not set
+# CONFIG_HID_GOOGLE_HAMMER is not set
+# CONFIG_HID_GT683R is not set
+# CONFIG_HID_KEYTOUCH is not set
+# CONFIG_HID_KYE is not set
+# CONFIG_HID_UCLOGIC is not set
+# CONFIG_HID_WALTOP is not set
+# CONFIG_HID_VIEWSONIC is not set
+# CONFIG_HID_GYRATION is not set
+# CONFIG_HID_ICADE is not set
+CONFIG_HID_ITE=y
+# CONFIG_HID_JABRA is not set
+# CONFIG_HID_TWINHAN is not set
+CONFIG_HID_KENSINGTON=y
+# CONFIG_HID_LCPOWER is not set
+# CONFIG_HID_LED is not set
+# CONFIG_HID_LENOVO is not set
+CONFIG_HID_LOGITECH=y
+# CONFIG_HID_LOGITECH_HIDPP is not set
+# CONFIG_LOGITECH_FF is not set
+# CONFIG_LOGIRUMBLEPAD2_FF is not set
+# CONFIG_LOGIG940_FF is not set
+# CONFIG_LOGIWHEELS_FF is not set
+# CONFIG_HID_MAGICMOUSE is not set
+# CONFIG_HID_MALTRON is not set
+# CONFIG_HID_MAYFLASH is not set
+CONFIG_HID_REDRAGON=y
+CONFIG_HID_MICROSOFT=y
+CONFIG_HID_MONTEREY=y
+# CONFIG_HID_MULTITOUCH is not set
+# CONFIG_HID_NTI is not set
+# CONFIG_HID_NTRIG is not set
+# CONFIG_HID_ORTEK is not set
+# CONFIG_HID_PANTHERLORD is not set
+# CONFIG_HID_PENMOUNT is not set
+# CONFIG_HID_PETALYNX is not set
+# CONFIG_HID_PICOLCD is not set
+# CONFIG_HID_PLANTRONICS is not set
+# CONFIG_HID_PRIMAX is not set
+# CONFIG_HID_RETRODE is not set
+# CONFIG_HID_ROCCAT is not set
+# CONFIG_HID_SAITEK is not set
+# CONFIG_HID_SAMSUNG is not set
+# CONFIG_HID_SONY is not set
+# CONFIG_HID_SPEEDLINK is not set
+# CONFIG_HID_STEAM is not set
+# CONFIG_HID_STEELSERIES is not set
+# CONFIG_HID_SUNPLUS is not set
+# CONFIG_HID_RMI is not set
+# CONFIG_HID_GREENASIA is not set
+# CONFIG_HID_SMARTJOYPLUS is not set
+# CONFIG_HID_TIVO is not set
+# CONFIG_HID_TOPSEED is not set
+# CONFIG_HID_THINGM is not set
+# CONFIG_HID_THRUSTMASTER is not set
+# CONFIG_HID_UDRAW_PS3 is not set
+# CONFIG_HID_U2FZERO is not set
+# CONFIG_HID_WACOM is not set
+# CONFIG_HID_WIIMOTE is not set
+# CONFIG_HID_XINMO is not set
+# CONFIG_HID_ZEROPLUS is not set
+# CONFIG_HID_ZYDACRON is not set
+# CONFIG_HID_SENSOR_HUB is not set
+# CONFIG_HID_ALPS is not set
+# end of Special HID drivers
+
+#
+# USB HID support
+#
+CONFIG_USB_HID=y
+# CONFIG_HID_PID is not set
+# CONFIG_USB_HIDDEV is not set
+# end of USB HID support
+
+#
+# I2C HID support
+#
+CONFIG_I2C_HID=m
+# end of I2C HID support
+# end of HID support
+
+CONFIG_USB_OHCI_LITTLE_ENDIAN=y
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_COMMON=y
+# CONFIG_USB_LED_TRIG is not set
+CONFIG_USB_ULPI_BUS=y
+# CONFIG_USB_CONN_GPIO is not set
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB=y
+CONFIG_USB_PCI=y
+# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
+
+#
+# Miscellaneous USB options
+#
+CONFIG_USB_DEFAULT_PERSIST=y
+# CONFIG_USB_DYNAMIC_MINORS is not set
+CONFIG_USB_OTG=y
+# CONFIG_USB_OTG_WHITELIST is not set
+# CONFIG_USB_OTG_BLACKLIST_HUB is not set
+# CONFIG_USB_OTG_FSM is not set
+# CONFIG_USB_LEDS_TRIGGER_USBPORT is not set
+CONFIG_USB_AUTOSUSPEND_DELAY=2
+# CONFIG_USB_MON is not set
+
+#
+# USB Host Controller Drivers
+#
+# CONFIG_USB_C67X00_HCD is not set
+CONFIG_USB_XHCI_HCD=y
+# CONFIG_USB_XHCI_DBGCAP is not set
+CONFIG_USB_XHCI_PCI=y
+CONFIG_USB_XHCI_PLATFORM=y
+# CONFIG_USB_XHCI_HISTB is not set
+# CONFIG_USB_XHCI_MTK is not set
+# CONFIG_USB_XHCI_MVEBU is not set
+CONFIG_USB_XHCI_RCAR=y
+CONFIG_USB_XHCI_TEGRA=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_ROOT_HUB_TT=y
+CONFIG_USB_EHCI_TT_NEWSCHED=y
+CONFIG_USB_EHCI_PCI=y
+# CONFIG_USB_EHCI_FSL is not set
+# CONFIG_USB_EHCI_MXC is not set
+CONFIG_USB_EHCI_HCD_ORION=y
+# CONFIG_USB_EHCI_TEGRA is not set
+CONFIG_USB_EHCI_EXYNOS=y
+CONFIG_USB_EHCI_HCD_PLATFORM=y
+# CONFIG_USB_OXU210HP_HCD is not set
+# CONFIG_USB_ISP116X_HCD is not set
+# CONFIG_USB_FOTG210_HCD is not set
+# CONFIG_USB_MAX3421_HCD is not set
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_HCD_PCI=y
+CONFIG_USB_OHCI_EXYNOS=y
+CONFIG_USB_OHCI_HCD_PLATFORM=y
+# CONFIG_USB_UHCI_HCD is not set
+# CONFIG_USB_SL811_HCD is not set
+# CONFIG_USB_R8A66597_HCD is not set
+# CONFIG_USB_HCD_TEST_MODE is not set
+# CONFIG_USB_RENESAS_USBHS is not set
+
+#
+# USB Device Class drivers
+#
+CONFIG_USB_ACM=m
+# CONFIG_USB_PRINTER is not set
+# CONFIG_USB_WDM is not set
+# CONFIG_USB_TMC is not set
+
+#
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
+#
+
+#
+# also be needed; see USB_STORAGE Help for more info
+#
+CONFIG_USB_STORAGE=y
+# CONFIG_USB_STORAGE_DEBUG is not set
+# CONFIG_USB_STORAGE_REALTEK is not set
+# CONFIG_USB_STORAGE_DATAFAB is not set
+# CONFIG_USB_STORAGE_FREECOM is not set
+# CONFIG_USB_STORAGE_ISD200 is not set
+# CONFIG_USB_STORAGE_USBAT is not set
+# CONFIG_USB_STORAGE_SDDR09 is not set
+# CONFIG_USB_STORAGE_SDDR55 is not set
+# CONFIG_USB_STORAGE_JUMPSHOT is not set
+# CONFIG_USB_STORAGE_ALAUDA is not set
+# CONFIG_USB_STORAGE_ONETOUCH is not set
+# CONFIG_USB_STORAGE_KARMA is not set
+# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
+# CONFIG_USB_STORAGE_ENE_UB6250 is not set
+# CONFIG_USB_UAS is not set
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_MICROTEK is not set
+# CONFIG_USBIP_CORE is not set
+CONFIG_USB_CDNS3=y
+CONFIG_USB_CDNS3_GADGET=y
+CONFIG_USB_CDNS3_HOST=y
+# CONFIG_USB_MTU3 is not set
+CONFIG_USB_MUSB_HDRC=y
+# CONFIG_USB_MUSB_HOST is not set
+# CONFIG_USB_MUSB_GADGET is not set
+CONFIG_USB_MUSB_DUAL_ROLE=y
+
+#
+# Platform Glue Layer
+#
+CONFIG_USB_MUSB_SUNXI=y
+
+#
+# MUSB DMA mode
+#
+# CONFIG_MUSB_PIO_ONLY is not set
+CONFIG_USB_DWC3=y
+# CONFIG_USB_DWC3_ULPI is not set
+# CONFIG_USB_DWC3_HOST is not set
+# CONFIG_USB_DWC3_GADGET is not set
+CONFIG_USB_DWC3_DUAL_ROLE=y
+
+#
+# Platform Glue Driver Support
+#
+CONFIG_USB_DWC3_EXYNOS=y
+CONFIG_USB_DWC3_PCI=y
+CONFIG_USB_DWC3_HAPS=y
+CONFIG_USB_DWC3_KEYSTONE=y
+CONFIG_USB_DWC3_MESON_G12A=y
+CONFIG_USB_DWC3_OF_SIMPLE=y
+CONFIG_USB_DWC3_QCOM=y
+CONFIG_USB_DWC2=y
+# CONFIG_USB_DWC2_HOST is not set
+
+#
+# Gadget/Dual-role mode requires USB Gadget support to be enabled
+#
+# CONFIG_USB_DWC2_PERIPHERAL is not set
+CONFIG_USB_DWC2_DUAL_ROLE=y
+# CONFIG_USB_DWC2_PCI is not set
+# CONFIG_USB_DWC2_DEBUG is not set
+# CONFIG_USB_DWC2_TRACK_MISSED_SOFS is not set
+CONFIG_USB_CHIPIDEA=y
+CONFIG_USB_CHIPIDEA_OF=y
+CONFIG_USB_CHIPIDEA_PCI=y
+CONFIG_USB_CHIPIDEA_UDC=y
+CONFIG_USB_CHIPIDEA_HOST=y
+CONFIG_USB_ISP1760=y
+CONFIG_USB_ISP1760_HCD=y
+CONFIG_USB_ISP1761_UDC=y
+# CONFIG_USB_ISP1760_HOST_ROLE is not set
+# CONFIG_USB_ISP1760_GADGET_ROLE is not set
+CONFIG_USB_ISP1760_DUAL_ROLE=y
+
+#
+# USB port drivers
+#
+# CONFIG_USB_SERIAL is not set
+
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_EMI62 is not set
+# CONFIG_USB_EMI26 is not set
+# CONFIG_USB_ADUTUX is not set
+# CONFIG_USB_SEVSEG is not set
+# CONFIG_USB_LEGOTOWER is not set
+# CONFIG_USB_LCD is not set
+# CONFIG_USB_CYPRESS_CY7C63 is not set
+# CONFIG_USB_CYTHERM is not set
+# CONFIG_USB_IDMOUSE is not set
+# CONFIG_USB_FTDI_ELAN is not set
+# CONFIG_USB_APPLEDISPLAY is not set
+# CONFIG_USB_SISUSBVGA is not set
+# CONFIG_USB_LD is not set
+# CONFIG_USB_TRANCEVIBRATOR is not set
+# CONFIG_USB_IOWARRIOR is not set
+CONFIG_USB_TEST=m
+CONFIG_USB_EHSET_TEST_FIXTURE=m
+# CONFIG_USB_ISIGHTFW is not set
+# CONFIG_USB_YUREX is not set
+# CONFIG_USB_EZUSB_FX2 is not set
+# CONFIG_USB_HUB_USB251XB is not set
+CONFIG_USB_HSIC_USB3503=y
+# CONFIG_USB_HSIC_USB4604 is not set
+# CONFIG_USB_LINK_LAYER_TEST is not set
+# CONFIG_USB_CHAOSKEY is not set
+
+#
+# USB Physical Layer drivers
+#
+CONFIG_USB_PHY=y
+CONFIG_NOP_USB_XCEIV=y
+# CONFIG_USB_GPIO_VBUS is not set
+# CONFIG_USB_ISP1301 is not set
+CONFIG_USB_MXS_PHY=y
+# CONFIG_USB_TEGRA_PHY is not set
+CONFIG_USB_ULPI=y
+CONFIG_USB_ULPI_VIEWPORT=y
+# end of USB Physical Layer drivers
+
+CONFIG_USB_GADGET=y
+# CONFIG_USB_GADGET_DEBUG is not set
+# CONFIG_USB_GADGET_DEBUG_FILES is not set
+# CONFIG_USB_GADGET_DEBUG_FS is not set
+CONFIG_USB_GADGET_VBUS_DRAW=2
+CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=2
+# CONFIG_U_SERIAL_CONSOLE is not set
+
+#
+# USB Peripheral Controller
+#
+# CONFIG_USB_FSL_USB2 is not set
+# CONFIG_USB_FOTG210_UDC is not set
+# CONFIG_USB_GR_UDC is not set
+# CONFIG_USB_R8A66597 is not set
+CONFIG_USB_RENESAS_USB3=m
+# CONFIG_USB_PXA27X is not set
+# CONFIG_USB_MV_UDC is not set
+# CONFIG_USB_MV_U3D is not set
+CONFIG_USB_SNP_CORE=y
+CONFIG_USB_SNP_UDC_PLAT=y
+# CONFIG_USB_M66592 is not set
+CONFIG_USB_BDC_UDC=y
+
+#
+# Platform Support
+#
+CONFIG_USB_BDC_PCI=y
+# CONFIG_USB_AMD5536UDC is not set
+# CONFIG_USB_NET2272 is not set
+# CONFIG_USB_NET2280 is not set
+# CONFIG_USB_GOKU is not set
+# CONFIG_USB_EG20T is not set
+# CONFIG_USB_GADGET_XILINX is not set
+# CONFIG_USB_DUMMY_HCD is not set
+# end of USB Peripheral Controller
+
+CONFIG_USB_LIBCOMPOSITE=y
+CONFIG_USB_F_ACM=y
+CONFIG_USB_F_SS_LB=y
+CONFIG_USB_U_SERIAL=y
+CONFIG_USB_U_ETHER=y
+CONFIG_USB_U_AUDIO=y
+CONFIG_USB_F_SERIAL=y
+CONFIG_USB_F_OBEX=y
+CONFIG_USB_F_NCM=y
+CONFIG_USB_F_ECM=y
+CONFIG_USB_F_EEM=y
+CONFIG_USB_F_SUBSET=y
+CONFIG_USB_F_RNDIS=y
+CONFIG_USB_F_MASS_STORAGE=y
+CONFIG_USB_F_FS=y
+CONFIG_USB_F_UAC1=y
+CONFIG_USB_F_UAC1_LEGACY=y
+CONFIG_USB_F_UAC2=y
+CONFIG_USB_F_UVC=y
+CONFIG_USB_F_MIDI=y
+CONFIG_USB_F_HID=y
+CONFIG_USB_CONFIGFS=y
+CONFIG_USB_CONFIGFS_SERIAL=y
+CONFIG_USB_CONFIGFS_ACM=y
+CONFIG_USB_CONFIGFS_OBEX=y
+CONFIG_USB_CONFIGFS_NCM=y
+CONFIG_USB_CONFIGFS_ECM=y
+CONFIG_USB_CONFIGFS_ECM_SUBSET=y
+CONFIG_USB_CONFIGFS_RNDIS=y
+CONFIG_USB_CONFIGFS_EEM=y
+CONFIG_USB_CONFIGFS_MASS_STORAGE=y
+CONFIG_USB_CONFIGFS_F_LB_SS=y
+CONFIG_USB_CONFIGFS_F_FS=y
+CONFIG_USB_CONFIGFS_F_UAC1=y
+CONFIG_USB_CONFIGFS_F_UAC1_LEGACY=y
+CONFIG_USB_CONFIGFS_F_UAC2=y
+CONFIG_USB_CONFIGFS_F_MIDI=y
+CONFIG_USB_CONFIGFS_F_HID=y
+CONFIG_USB_CONFIGFS_F_UVC=y
+# CONFIG_USB_CONFIGFS_F_PRINTER is not set
+CONFIG_USB_ZERO=m
+# CONFIG_USB_ZERO_HNPTEST is not set
+CONFIG_USB_AUDIO=m
+# CONFIG_GADGET_UAC1 is not set
+CONFIG_USB_ETH=m
+CONFIG_USB_ETH_RNDIS=y
+# CONFIG_USB_ETH_EEM is not set
+# CONFIG_USB_G_NCM is not set
+# CONFIG_USB_GADGETFS is not set
+# CONFIG_USB_FUNCTIONFS is not set
+CONFIG_USB_MASS_STORAGE=m
+CONFIG_USB_G_SERIAL=m
+# CONFIG_USB_MIDI_GADGET is not set
+# CONFIG_USB_G_PRINTER is not set
+# CONFIG_USB_CDC_COMPOSITE is not set
+# CONFIG_USB_G_ACM_MS is not set
+# CONFIG_USB_G_MULTI is not set
+# CONFIG_USB_G_HID is not set
+# CONFIG_USB_G_DBGP is not set
+# CONFIG_USB_G_WEBCAM is not set
+CONFIG_TYPEC=y
+CONFIG_TYPEC_TCPM=y
+CONFIG_TYPEC_TCPCI=y
+# CONFIG_TYPEC_RT1711H is not set
+# CONFIG_TYPEC_FUSB302 is not set
+# CONFIG_TYPEC_UCSI is not set
+# CONFIG_TYPEC_TPS6598X is not set
+
+#
+# USB Type-C Multiplexer/DeMultiplexer Switch support
+#
+# CONFIG_TYPEC_MUX_PI3USB30532 is not set
+CONFIG_TYPEC_SWITCH_GPIO=y
+# end of USB Type-C Multiplexer/DeMultiplexer Switch support
+
+#
+# USB Type-C Alternate Mode drivers
+#
+# CONFIG_TYPEC_DP_ALTMODE is not set
+# end of USB Type-C Alternate Mode drivers
+
+CONFIG_USB_ROLE_SWITCH=y
+CONFIG_MMC=y
+CONFIG_PWRSEQ_EMMC=y
+CONFIG_PWRSEQ_SIMPLE=y
+CONFIG_MMC_BLOCK=y
+CONFIG_MMC_BLOCK_MINORS=32
+# CONFIG_SDIO_UART is not set
+# CONFIG_MMC_TEST is not set
+
+#
+# MMC/SD/SDIO Host Controller Drivers
+#
+# CONFIG_MMC_DEBUG is not set
+CONFIG_MMC_ARMMMCI=y
+CONFIG_MMC_QCOM_DML=y
+CONFIG_MMC_STM32_SDMMC=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_IO_ACCESSORS=y
+# CONFIG_MMC_SDHCI_PCI is not set
+CONFIG_MMC_SDHCI_ACPI=y
+CONFIG_MMC_SDHCI_PLTFM=y
+CONFIG_MMC_SDHCI_OF_ARASAN=y
+# CONFIG_MMC_SDHCI_OF_ASPEED is not set
+# CONFIG_MMC_SDHCI_OF_AT91 is not set
+CONFIG_MMC_SDHCI_OF_ESDHC=y
+# CONFIG_MMC_SDHCI_OF_DWCMSHC is not set
+CONFIG_MMC_SDHCI_CADENCE=y
+CONFIG_MMC_SDHCI_ESDHC_IMX=y
+CONFIG_MMC_SDHCI_TEGRA=y
+# CONFIG_MMC_SDHCI_PXAV3 is not set
+CONFIG_MMC_SDHCI_F_SDH30=y
+CONFIG_MMC_SDHCI_IPROC=y
+CONFIG_MMC_MESON_GX=y
+# CONFIG_MMC_MESON_MX_SDIO is not set
+CONFIG_MMC_SDHCI_MSM=y
+# CONFIG_MMC_MXC is not set
+# CONFIG_MMC_TIFM_SD is not set
+CONFIG_MMC_SPI=y
+# CONFIG_MMC_SDHCI_SPRD is not set
+CONFIG_MMC_TMIO_CORE=y
+CONFIG_MMC_SDHI=y
+# CONFIG_MMC_SDHI_SYS_DMAC is not set
+CONFIG_MMC_SDHI_INTERNAL_DMAC=y
+CONFIG_MMC_UNIPHIER=y
+# CONFIG_MMC_CB710 is not set
+# CONFIG_MMC_VIA_SDMMC is not set
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_PLTFM=y
+# CONFIG_MMC_DW_BLUEFIELD is not set
+CONFIG_MMC_DW_EXYNOS=y
+CONFIG_MMC_DW_HI3798CV200=y
+CONFIG_MMC_DW_K3=y
+# CONFIG_MMC_DW_PCI is not set
+CONFIG_MMC_DW_ROCKCHIP=y
+# CONFIG_MMC_DW_ZX is not set
+# CONFIG_MMC_SH_MMCIF is not set
+# CONFIG_MMC_VUB300 is not set
+# CONFIG_MMC_USHC is not set
+# CONFIG_MMC_USDHI6ROL0 is not set
+CONFIG_MMC_SUNXI=y
+CONFIG_MMC_CQHCI=y
+# CONFIG_MMC_TOSHIBA_PCI is not set
+CONFIG_MMC_BCM2835=y
+# CONFIG_MMC_MTK is not set
+CONFIG_MMC_SDHCI_BRCMSTB=y
+CONFIG_MMC_SDHCI_XENON=y
+# CONFIG_MMC_SDHCI_OMAP is not set
+# CONFIG_MMC_SDHCI_AM654 is not set
+# CONFIG_MEMSTICK is not set
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+# CONFIG_LEDS_CLASS_FLASH is not set
+# CONFIG_LEDS_BRIGHTNESS_HW_CHANGED is not set
+
+#
+# LED drivers
+#
+# CONFIG_LEDS_AN30259A is not set
+# CONFIG_LEDS_BCM6328 is not set
+# CONFIG_LEDS_BCM6358 is not set
+# CONFIG_LEDS_CR0014114 is not set
+# CONFIG_LEDS_LM3530 is not set
+# CONFIG_LEDS_LM3532 is not set
+# CONFIG_LEDS_LM3642 is not set
+# CONFIG_LEDS_LM3692X is not set
+# CONFIG_LEDS_PCA9532 is not set
+CONFIG_LEDS_GPIO=y
+# CONFIG_LEDS_LP3944 is not set
+# CONFIG_LEDS_LP3952 is not set
+# CONFIG_LEDS_LP5521 is not set
+# CONFIG_LEDS_LP5523 is not set
+# CONFIG_LEDS_LP5562 is not set
+# CONFIG_LEDS_LP8501 is not set
+# CONFIG_LEDS_LP8860 is not set
+# CONFIG_LEDS_PCA955X is not set
+# CONFIG_LEDS_PCA963X is not set
+# CONFIG_LEDS_DAC124S085 is not set
+CONFIG_LEDS_PWM=y
+# CONFIG_LEDS_REGULATOR is not set
+# CONFIG_LEDS_BD2802 is not set
+# CONFIG_LEDS_LT3593 is not set
+# CONFIG_LEDS_TCA6507 is not set
+# CONFIG_LEDS_TLC591XX is not set
+# CONFIG_LEDS_LM355x is not set
+# CONFIG_LEDS_IS31FL319X is not set
+# CONFIG_LEDS_IS31FL32XX is not set
+
+#
+# LED driver for blink(1) USB RGB LED is under Special HID drivers (HID_THINGM)
+#
+# CONFIG_LEDS_BLINKM is not set
+CONFIG_LEDS_SYSCON=y
+# CONFIG_LEDS_MLXREG is not set
+# CONFIG_LEDS_USER is not set
+# CONFIG_LEDS_SPI_BYTE is not set
+# CONFIG_LEDS_TI_LMU_COMMON is not set
+
+#
+# LED Triggers
+#
+CONFIG_LEDS_TRIGGERS=y
+# CONFIG_LEDS_TRIGGER_TIMER is not set
+# CONFIG_LEDS_TRIGGER_ONESHOT is not set
+CONFIG_LEDS_TRIGGER_DISK=y
+# CONFIG_LEDS_TRIGGER_MTD is not set
+CONFIG_LEDS_TRIGGER_HEARTBEAT=y
+# CONFIG_LEDS_TRIGGER_BACKLIGHT is not set
+CONFIG_LEDS_TRIGGER_CPU=y
+# CONFIG_LEDS_TRIGGER_ACTIVITY is not set
+# CONFIG_LEDS_TRIGGER_GPIO is not set
+CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
+
+#
+# iptables trigger is under Netfilter config (LED target)
+#
+# CONFIG_LEDS_TRIGGER_TRANSIENT is not set
+# CONFIG_LEDS_TRIGGER_CAMERA is not set
+CONFIG_LEDS_TRIGGER_PANIC=y
+# CONFIG_LEDS_TRIGGER_NETDEV is not set
+# CONFIG_LEDS_TRIGGER_PATTERN is not set
+# CONFIG_LEDS_TRIGGER_AUDIO is not set
+# CONFIG_ACCESSIBILITY is not set
+# CONFIG_INFINIBAND is not set
+CONFIG_EDAC_SUPPORT=y
+CONFIG_EDAC=y
+CONFIG_EDAC_LEGACY_SYSFS=y
+# CONFIG_EDAC_DEBUG is not set
+CONFIG_EDAC_GHES=y
+# CONFIG_EDAC_LAYERSCAPE is not set
+# CONFIG_EDAC_THUNDERX is not set
+# CONFIG_EDAC_ALTERA is not set
+# CONFIG_EDAC_SYNOPSYS is not set
+# CONFIG_EDAC_XGENE is not set
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+CONFIG_RTC_SYSTOHC=y
+CONFIG_RTC_SYSTOHC_DEVICE="rtc0"
+# CONFIG_RTC_DEBUG is not set
+CONFIG_RTC_NVMEM=y
+
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+# CONFIG_RTC_DRV_TEST is not set
+
+#
+# I2C RTC drivers
+#
+# CONFIG_RTC_DRV_ABB5ZES3 is not set
+# CONFIG_RTC_DRV_ABEOZ9 is not set
+# CONFIG_RTC_DRV_ABX80X is not set
+CONFIG_RTC_DRV_BRCMSTB=y
+CONFIG_RTC_DRV_DS1307=y
+# CONFIG_RTC_DRV_DS1307_CENTURY is not set
+# CONFIG_RTC_DRV_DS1374 is not set
+# CONFIG_RTC_DRV_DS1672 is not set
+# CONFIG_RTC_DRV_HYM8563 is not set
+# CONFIG_RTC_DRV_MAX6900 is not set
+CONFIG_RTC_DRV_MAX77686=y
+CONFIG_RTC_DRV_MESON_VRTC=m
+CONFIG_RTC_DRV_RK808=m
+# CONFIG_RTC_DRV_RS5C372 is not set
+# CONFIG_RTC_DRV_ISL1208 is not set
+# CONFIG_RTC_DRV_ISL12022 is not set
+# CONFIG_RTC_DRV_ISL12026 is not set
+# CONFIG_RTC_DRV_X1205 is not set
+# CONFIG_RTC_DRV_PCF8523 is not set
+# CONFIG_RTC_DRV_PCF85063 is not set
+CONFIG_RTC_DRV_PCF85363=y
+# CONFIG_RTC_DRV_PCF8563 is not set
+# CONFIG_RTC_DRV_PCF8583 is not set
+# CONFIG_RTC_DRV_M41T80 is not set
+# CONFIG_RTC_DRV_BQ32K is not set
+# CONFIG_RTC_DRV_S35390A is not set
+# CONFIG_RTC_DRV_FM3130 is not set
+# CONFIG_RTC_DRV_RX8010 is not set
+CONFIG_RTC_DRV_RX8581=m
+# CONFIG_RTC_DRV_RX8025 is not set
+# CONFIG_RTC_DRV_EM3027 is not set
+# CONFIG_RTC_DRV_RV3028 is not set
+# CONFIG_RTC_DRV_RV8803 is not set
+CONFIG_RTC_DRV_S5M=y
+# CONFIG_RTC_DRV_SD3078 is not set
+
+#
+# SPI RTC drivers
+#
+# CONFIG_RTC_DRV_M41T93 is not set
+# CONFIG_RTC_DRV_M41T94 is not set
+# CONFIG_RTC_DRV_DS1302 is not set
+# CONFIG_RTC_DRV_DS1305 is not set
+# CONFIG_RTC_DRV_DS1343 is not set
+# CONFIG_RTC_DRV_DS1347 is not set
+# CONFIG_RTC_DRV_DS1390 is not set
+# CONFIG_RTC_DRV_MAX6916 is not set
+# CONFIG_RTC_DRV_R9701 is not set
+# CONFIG_RTC_DRV_RX4581 is not set
+# CONFIG_RTC_DRV_RX6110 is not set
+# CONFIG_RTC_DRV_RS5C348 is not set
+# CONFIG_RTC_DRV_MAX6902 is not set
+# CONFIG_RTC_DRV_PCF2123 is not set
+# CONFIG_RTC_DRV_MCP795 is not set
+CONFIG_RTC_I2C_AND_SPI=y
+
+#
+# SPI and I2C RTC drivers
+#
+CONFIG_RTC_DRV_DS3232=y
+CONFIG_RTC_DRV_DS3232_HWMON=y
+CONFIG_RTC_DRV_PCF2127=y
+# CONFIG_RTC_DRV_RV3029C2 is not set
+
+#
+# Platform RTC drivers
+#
+# CONFIG_RTC_DRV_DS1286 is not set
+# CONFIG_RTC_DRV_DS1511 is not set
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_DS1685_FAMILY is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_DS2404 is not set
+CONFIG_RTC_DRV_EFI=y
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T35 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_MSM6242 is not set
+# CONFIG_RTC_DRV_BQ4802 is not set
+# CONFIG_RTC_DRV_RP5C01 is not set
+# CONFIG_RTC_DRV_V3020 is not set
+# CONFIG_RTC_DRV_ZYNQMP is not set
+CONFIG_RTC_DRV_CROS_EC=y
+
+#
+# on-CPU RTC drivers
+#
+# CONFIG_RTC_DRV_IMXDI is not set
+CONFIG_RTC_DRV_FSL_FTM_ALARM=y
+CONFIG_HAVE_S3C_RTC=y
+CONFIG_RTC_DRV_S3C=y
+# CONFIG_RTC_DRV_SH is not set
+# CONFIG_RTC_DRV_PL030 is not set
+CONFIG_RTC_DRV_PL031=y
+CONFIG_RTC_DRV_SUN6I=y
+# CONFIG_RTC_DRV_MV is not set
+CONFIG_RTC_DRV_ARMADA38X=y
+# CONFIG_RTC_DRV_CADENCE is not set
+# CONFIG_RTC_DRV_FTRTC010 is not set
+# CONFIG_RTC_DRV_PM8XXX is not set
+CONFIG_RTC_DRV_TEGRA=y
+# CONFIG_RTC_DRV_MXC is not set
+# CONFIG_RTC_DRV_MXC_V2 is not set
+CONFIG_RTC_DRV_SNVS=y
+CONFIG_RTC_DRV_IMX_SC=y
+# CONFIG_RTC_DRV_IMX_RPMSG is not set
+# CONFIG_RTC_DRV_MT7622 is not set
+CONFIG_RTC_DRV_XGENE=y
+# CONFIG_RTC_DRV_R7301 is not set
+
+#
+# HID Sensor RTC drivers
+#
+CONFIG_DMADEVICES=y
+# CONFIG_DMADEVICES_DEBUG is not set
+
+#
+# DMA Devices
+#
+CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH=y
+CONFIG_DMA_ENGINE=y
+CONFIG_DMA_VIRTUAL_CHANNELS=y
+CONFIG_DMA_ACPI=y
+CONFIG_DMA_OF=y
+# CONFIG_ALTERA_MSGDMA is not set
+# CONFIG_AMBA_PL08X is not set
+# CONFIG_AXI_DMAC is not set
+CONFIG_BCM_SBA_RAID=m
+# CONFIG_CRYPTO_DEV_FSL_CAAM_DMA is not set
+CONFIG_DMA_BCM2835=m
+CONFIG_DMA_SUN6I=m
+# CONFIG_DW_AXI_DMAC is not set
+CONFIG_FSL_EDMA=y
+# CONFIG_FSL_QDMA is not set
+CONFIG_FSL_EDMA_V3=y
+# CONFIG_IMX_DMA is not set
+CONFIG_IMX_SDMA=y
+# CONFIG_INTEL_IDMA64 is not set
+CONFIG_K3_DMA=y
+CONFIG_MV_XOR=y
+CONFIG_MV_XOR_V2=y
+CONFIG_MXS_DMA=y
+CONFIG_MX3_IPU=y
+CONFIG_MX3_IPU_IRQS=4
+CONFIG_PL330_DMA=y
+# CONFIG_SPRD_DMA is not set
+CONFIG_TEGRA20_APB_DMA=y
+# CONFIG_TEGRA210_ADMA is not set
+# CONFIG_UNIPHIER_MDMAC is not set
+# CONFIG_XGENE_DMA is not set
+# CONFIG_XILINX_DMA is not set
+# CONFIG_XILINX_ZYNQMP_DMA is not set
+# CONFIG_ZX_DMA is not set
+# CONFIG_MTK_HSDMA is not set
+# CONFIG_MTK_CQDMA is not set
+# CONFIG_MTK_UART_APDMA is not set
+CONFIG_QCOM_BAM_DMA=y
+CONFIG_QCOM_HIDMA_MGMT=y
+CONFIG_QCOM_HIDMA=y
+# CONFIG_DW_DMAC is not set
+# CONFIG_DW_DMAC_PCI is not set
+# CONFIG_DW_EDMA is not set
+# CONFIG_DW_EDMA_PCIE is not set
+CONFIG_RENESAS_DMA=y
+CONFIG_RCAR_DMAC=y
+CONFIG_RENESAS_USB_DMAC=m
+# CONFIG_FSL_DPAA2_QDMA is not set
+
+#
+# DMA Clients
+#
+# CONFIG_ASYNC_TX_DMA is not set
+CONFIG_DMATEST=y
+CONFIG_DMA_ENGINE_RAID=y
+
+#
+# DMABUF options
+#
+CONFIG_SYNC_FILE=y
+# CONFIG_SW_SYNC is not set
+# CONFIG_UDMABUF is not set
+# CONFIG_DMABUF_SELFTESTS is not set
+# end of DMABUF options
+
+# CONFIG_AUXDISPLAY is not set
+CONFIG_UIO=y
+CONFIG_UIO_CIF=y
+CONFIG_UIO_PDRV_GENIRQ=y
+CONFIG_UIO_DMEM_GENIRQ=y
+CONFIG_UIO_AEC=y
+CONFIG_UIO_SERCOS3=y
+CONFIG_UIO_PCI_GENERIC=y
+CONFIG_UIO_NETX=y
+# CONFIG_UIO_PRUSS is not set
+CONFIG_UIO_MF624=y
+CONFIG_VFIO_IOMMU_TYPE1=y
+CONFIG_VFIO_VIRQFD=y
+CONFIG_VFIO=y
+# CONFIG_VFIO_NOIOMMU is not set
+CONFIG_VFIO_PCI=y
+CONFIG_VFIO_PCI_MMAP=y
+CONFIG_VFIO_PCI_INTX=y
+# CONFIG_VFIO_PLATFORM is not set
+# CONFIG_VFIO_MDEV is not set
+CONFIG_VFIO_FSL_MC=y
+# CONFIG_VIRT_DRIVERS is not set
+CONFIG_VIRTIO=y
+CONFIG_VIRTIO_MENU=y
+CONFIG_VIRTIO_PCI=y
+CONFIG_VIRTIO_PCI_LEGACY=y
+CONFIG_VIRTIO_BALLOON=y
+# CONFIG_VIRTIO_INPUT is not set
+CONFIG_VIRTIO_MMIO=y
+# CONFIG_VIRTIO_MMIO_CMDLINE_DEVICES is not set
+
+#
+# Microsoft Hyper-V guest support
+#
+# end of Microsoft Hyper-V guest support
+
+#
+# Xen driver support
+#
+CONFIG_XEN_BALLOON=y
+CONFIG_XEN_SCRUB_PAGES_DEFAULT=y
+CONFIG_XEN_DEV_EVTCHN=y
+CONFIG_XEN_BACKEND=y
+CONFIG_XENFS=y
+CONFIG_XEN_COMPAT_XENFS=y
+CONFIG_XEN_SYS_HYPERVISOR=y
+CONFIG_XEN_XENBUS_FRONTEND=y
+CONFIG_XEN_GNTDEV=y
+CONFIG_XEN_GRANT_DEV_ALLOC=y
+# CONFIG_XEN_GRANT_DMA_ALLOC is not set
+CONFIG_SWIOTLB_XEN=y
+# CONFIG_XEN_PVCALLS_FRONTEND is not set
+# CONFIG_XEN_PVCALLS_BACKEND is not set
+CONFIG_XEN_PRIVCMD=y
+CONFIG_XEN_EFI=y
+CONFIG_XEN_AUTO_XLATE=y
+# end of Xen driver support
+
+# CONFIG_GREYBUS is not set
+CONFIG_STAGING=y
+# CONFIG_COMEDI is not set
+# CONFIG_RTL8192U is not set
+# CONFIG_RTLLIB is not set
+# CONFIG_R8712U is not set
+# CONFIG_RTS5208 is not set
+
+#
+# IIO staging drivers
+#
+
+#
+# Accelerometers
+#
+# CONFIG_ADIS16203 is not set
+# CONFIG_ADIS16240 is not set
+# end of Accelerometers
+
+#
+# Analog to digital converters
+#
+# CONFIG_AD7816 is not set
+# CONFIG_AD7192 is not set
+# CONFIG_AD7280 is not set
+# end of Analog to digital converters
+
+#
+# Analog digital bi-direction converters
+#
+# CONFIG_ADT7316 is not set
+# end of Analog digital bi-direction converters
+
+#
+# Capacitance to digital converters
+#
+# CONFIG_AD7150 is not set
+# CONFIG_AD7746 is not set
+# end of Capacitance to digital converters
+
+#
+# Direct Digital Synthesis
+#
+# CONFIG_AD9832 is not set
+# CONFIG_AD9834 is not set
+# end of Direct Digital Synthesis
+
+#
+# Network Analyzer, Impedance Converters
+#
+# CONFIG_AD5933 is not set
+# end of Network Analyzer, Impedance Converters
+
+#
+# Active energy metering IC
+#
+# CONFIG_ADE7854 is not set
+# end of Active energy metering IC
+
+#
+# Resolver to digital converters
+#
+# CONFIG_AD2S1210 is not set
+# end of Resolver to digital converters
+# end of IIO staging drivers
+
+# CONFIG_FB_SM750 is not set
+# CONFIG_USB_EMXX is not set
+
+#
+# Speakup console speech
+#
+# CONFIG_SPEAKUP is not set
+# end of Speakup console speech
+
+# CONFIG_MFD_NVEC is not set
+CONFIG_STAGING_MEDIA=y
+# CONFIG_VIDEO_ALLEGRO_DVT is not set
+CONFIG_VIDEO_IMX_CAPTURE=y
+
+#
+# i.MX8QXP/QM Camera ISI/MIPI Features support
+#
+CONFIG_IMX8_MEDIA_DEVICE=y
+CONFIG_IMX8_ISI_CORE=y
+CONFIG_IMX8_ISI_CAPTURE=y
+CONFIG_IMX8_ISI_M2M=y
+CONFIG_IMX8_MIPI_CSI2=y
+CONFIG_IMX8_MIPI_CSI2_SAM=y
+CONFIG_IMX8_PARALLEL_CSI=y
+CONFIG_GMSL_MAX9286=y
+# end of i.MX8QXP/QM Camera ISI/MIPI Features support
+
+# CONFIG_VIDEO_MESON_VDEC is not set
+# CONFIG_VIDEO_SUNXI is not set
+# CONFIG_TEGRA_VDE is not set
+
+#
+# soc_camera sensor drivers
+#
+
+#
+# Android
+#
+CONFIG_ION=y
+CONFIG_ION_SYSTEM_HEAP=y
+CONFIG_ION_CMA_HEAP=y
+# end of Android
+
+# CONFIG_STAGING_BOARD is not set
+# CONFIG_LTE_GDM724X is not set
+# CONFIG_GS_FPGABOOT is not set
+# CONFIG_UNISYSSPAR is not set
+# CONFIG_COMMON_CLK_XLNX_CLKWZRD is not set
+# CONFIG_FB_TFT is not set
+CONFIG_FSL_DPAA2=y
+CONFIG_FSL_DPAA2_ETHSW=y
+CONFIG_FSL_DPAA2_MAC=y
+# CONFIG_FSL_DPAA2_MAC_NETDEVS is not set
+CONFIG_FSL_DPAA2_EVB=y
+# CONFIG_MOST is not set
+# CONFIG_KS7010 is not set
+CONFIG_BCM_VIDEOCORE=y
+# CONFIG_BCM2835_VCHIQ is not set
+# CONFIG_SND_BCM2835 is not set
+# CONFIG_VIDEO_BCM2835 is not set
+# CONFIG_PI433 is not set
+
+#
+# Gasket devices
+#
+# CONFIG_STAGING_GASKET_FRAMEWORK is not set
+# end of Gasket devices
+
+# CONFIG_XIL_AXIS_FIFO is not set
+# CONFIG_FIELDBUS_DEV is not set
+# CONFIG_KPC2000 is not set
+# CONFIG_USB_WUSB_CBAF is not set
+# CONFIG_UWB is not set
+# CONFIG_EXFAT_FS is not set
+# CONFIG_QLGE is not set
+CONFIG_FSL_SDK_DPA=y
+
+#
+# Freescale Datapath QMan/BMan options
+#
+# CONFIG_FSL_DPA_CHECKING is not set
+CONFIG_FSL_DPA_CAN_WAIT=y
+CONFIG_FSL_DPA_CAN_WAIT_SYNC=y
+CONFIG_FSL_DPA_PIRQ_FAST=y
+CONFIG_FSL_DPA_PIRQ_SLOW=y
+CONFIG_FSL_DPA_PORTAL_SHARE=y
+CONFIG_FSL_SDK_BMAN=y
+CONFIG_FSL_BMAN_CONFIG=y
+# CONFIG_FSL_BMAN_TEST is not set
+CONFIG_FSL_BMAN_DEBUGFS=y
+CONFIG_FSL_SDK_QMAN=y
+CONFIG_FSL_QMAN_POLL_LIMIT=32
+CONFIG_FSL_QMAN_CONFIG=y
+# CONFIG_FSL_QMAN_TEST is not set
+CONFIG_FSL_QMAN_DEBUGFS=y
+CONFIG_FSL_QMAN_FQD_SZ=10
+CONFIG_FSL_QMAN_PFDR_SZ=13
+CONFIG_FSL_QMAN_CI_SCHED_CFG_SRCCIV=4
+CONFIG_FSL_QMAN_CI_SCHED_CFG_SRQ_W=3
+CONFIG_FSL_QMAN_CI_SCHED_CFG_RW_W=2
+CONFIG_FSL_QMAN_CI_SCHED_CFG_BMAN_W=2
+CONFIG_FSL_QMAN_PIRQ_DQRR_ITHRESH=12
+CONFIG_FSL_QMAN_PIRQ_MR_ITHRESH=4
+CONFIG_FSL_QMAN_PIRQ_IPERIOD=100
+CONFIG_FSL_QMAN_FQ_LOOKUP=y
+CONFIG_QMAN_CEETM_UPDATE_PERIOD=1000
+CONFIG_FSL_QMAN_INIT_TIMEOUT=10
+CONFIG_FSL_USDPAA=y
+# end of Freescale Datapath QMan/BMan options
+
+CONFIG_FSL_PPFE=y
+CONFIG_FSL_PPFE_UTIL_DISABLED=y
+# CONFIG_GOLDFISH is not set
+CONFIG_MFD_CROS_EC=y
+CONFIG_CHROME_PLATFORMS=y
+# CONFIG_CHROMEOS_TBMC is not set
+CONFIG_CROS_EC=y
+CONFIG_CROS_EC_I2C=y
+# CONFIG_CROS_EC_RPMSG is not set
+CONFIG_CROS_EC_SPI=y
+CONFIG_CROS_EC_PROTO=y
+# CONFIG_CROS_KBD_LED_BACKLIGHT is not set
+CONFIG_CROS_EC_CHARDEV=y
+CONFIG_CROS_EC_LIGHTBAR=y
+CONFIG_CROS_EC_VBC=y
+CONFIG_CROS_EC_DEBUGFS=y
+CONFIG_CROS_EC_SYSFS=y
+# CONFIG_MELLANOX_PLATFORM is not set
+CONFIG_CLKDEV_LOOKUP=y
+CONFIG_HAVE_CLK_PREPARE=y
+CONFIG_COMMON_CLK=y
+
+#
+# Common Clock Framework
+#
+CONFIG_COMMON_CLK_VERSATILE=y
+CONFIG_CLK_SP810=y
+CONFIG_CLK_VEXPRESS_OSC=y
+# CONFIG_CLK_HSDK is not set
+# CONFIG_COMMON_CLK_MAX77686 is not set
+# CONFIG_COMMON_CLK_MAX9485 is not set
+CONFIG_COMMON_CLK_RK808=y
+CONFIG_COMMON_CLK_HI655X=y
+CONFIG_COMMON_CLK_SCPI=y
+# CONFIG_COMMON_CLK_SI5341 is not set
+# CONFIG_COMMON_CLK_SI5351 is not set
+# CONFIG_COMMON_CLK_SI514 is not set
+# CONFIG_COMMON_CLK_SI544 is not set
+# CONFIG_COMMON_CLK_SI570 is not set
+# CONFIG_COMMON_CLK_CDCE706 is not set
+# CONFIG_COMMON_CLK_CDCE925 is not set
+CONFIG_COMMON_CLK_CS2000_CP=y
+CONFIG_COMMON_CLK_S2MPS11=y
+CONFIG_CLK_QORIQ=y
+CONFIG_CLK_LS1028A_PLLDIG=y
+CONFIG_COMMON_CLK_XGENE=y
+CONFIG_COMMON_CLK_PWM=y
+# CONFIG_COMMON_CLK_VC5 is not set
+# CONFIG_COMMON_CLK_BD718XX is not set
+# CONFIG_COMMON_CLK_FIXED_MMIO is not set
+CONFIG_CLK_BCM2835=y
+CONFIG_COMMON_CLK_IPROC=y
+CONFIG_CLK_BCM_NS2=y
+CONFIG_CLK_BCM_SR=y
+CONFIG_CLK_RASPBERRYPI=m
+CONFIG_COMMON_CLK_HI3516CV300=y
+CONFIG_COMMON_CLK_HI3519=y
+CONFIG_COMMON_CLK_HI3660=y
+CONFIG_COMMON_CLK_HI3670=y
+CONFIG_COMMON_CLK_HI3798CV200=y
+CONFIG_COMMON_CLK_HI6220=y
+CONFIG_RESET_HISI=y
+CONFIG_STUB_CLK_HI6220=y
+CONFIG_STUB_CLK_HI3660=y
+CONFIG_MXC_CLK=y
+CONFIG_MXC_CLK_SCU=y
+CONFIG_CLK_IMX8MM=y
+CONFIG_CLK_IMX8MN=y
+CONFIG_CLK_IMX8MQ=y
+CONFIG_CLK_IMX8QXP=y
+CONFIG_TI_SCI_CLK=y
+# CONFIG_TI_SCI_CLK_PROBE_FROM_FW is not set
+
+#
+# Clock driver for MediaTek SoC
+#
+CONFIG_COMMON_CLK_MEDIATEK=y
+CONFIG_COMMON_CLK_MT2712=y
+# CONFIG_COMMON_CLK_MT2712_BDPSYS is not set
+# CONFIG_COMMON_CLK_MT2712_IMGSYS is not set
+# CONFIG_COMMON_CLK_MT2712_JPGDECSYS is not set
+# CONFIG_COMMON_CLK_MT2712_MFGCFG is not set
+# CONFIG_COMMON_CLK_MT2712_MMSYS is not set
+# CONFIG_COMMON_CLK_MT2712_VDECSYS is not set
+# CONFIG_COMMON_CLK_MT2712_VENCSYS is not set
+CONFIG_COMMON_CLK_MT6779=y
+# CONFIG_COMMON_CLK_MT6779_MMSYS is not set
+# CONFIG_COMMON_CLK_MT6779_IMGSYS is not set
+# CONFIG_COMMON_CLK_MT6779_IPESYS is not set
+# CONFIG_COMMON_CLK_MT6779_CAMSYS is not set
+# CONFIG_COMMON_CLK_MT6779_VDECSYS is not set
+# CONFIG_COMMON_CLK_MT6779_VENCSYS is not set
+# CONFIG_COMMON_CLK_MT6779_MFGCFG is not set
+# CONFIG_COMMON_CLK_MT6779_AUDSYS is not set
+CONFIG_COMMON_CLK_MT6797=y
+# CONFIG_COMMON_CLK_MT6797_MMSYS is not set
+# CONFIG_COMMON_CLK_MT6797_IMGSYS is not set
+# CONFIG_COMMON_CLK_MT6797_VDECSYS is not set
+# CONFIG_COMMON_CLK_MT6797_VENCSYS is not set
+CONFIG_COMMON_CLK_MT7622=y
+# CONFIG_COMMON_CLK_MT7622_ETHSYS is not set
+# CONFIG_COMMON_CLK_MT7622_HIFSYS is not set
+# CONFIG_COMMON_CLK_MT7622_AUDSYS is not set
+CONFIG_COMMON_CLK_MT8173=y
+CONFIG_COMMON_CLK_MT8183=y
+# CONFIG_COMMON_CLK_MT8183_AUDIOSYS is not set
+# CONFIG_COMMON_CLK_MT8183_CAMSYS is not set
+# CONFIG_COMMON_CLK_MT8183_IMGSYS is not set
+# CONFIG_COMMON_CLK_MT8183_IPU_CORE0 is not set
+# CONFIG_COMMON_CLK_MT8183_IPU_CORE1 is not set
+# CONFIG_COMMON_CLK_MT8183_IPU_ADL is not set
+# CONFIG_COMMON_CLK_MT8183_IPU_CONN is not set
+# CONFIG_COMMON_CLK_MT8183_MFGCFG is not set
+# CONFIG_COMMON_CLK_MT8183_MMSYS is not set
+# CONFIG_COMMON_CLK_MT8183_VDECSYS is not set
+# CONFIG_COMMON_CLK_MT8183_VENCSYS is not set
+CONFIG_COMMON_CLK_MT8516=y
+# CONFIG_COMMON_CLK_MT8516_AUDSYS is not set
+# end of Clock driver for MediaTek SoC
+
+CONFIG_COMMON_CLK_MESON_REGMAP=y
+CONFIG_COMMON_CLK_MESON_DUALDIV=y
+CONFIG_COMMON_CLK_MESON_MPLL=y
+CONFIG_COMMON_CLK_MESON_PHASE=m
+CONFIG_COMMON_CLK_MESON_PLL=y
+CONFIG_COMMON_CLK_MESON_SCLK_DIV=m
+CONFIG_COMMON_CLK_MESON_VID_PLL_DIV=y
+CONFIG_COMMON_CLK_MESON_AO_CLKC=y
+CONFIG_COMMON_CLK_MESON_EE_CLKC=y
+CONFIG_COMMON_CLK_MESON_CPU_DYNDIV=y
+CONFIG_COMMON_CLK_GXBB=y
+CONFIG_COMMON_CLK_AXG=y
+CONFIG_COMMON_CLK_AXG_AUDIO=m
+CONFIG_COMMON_CLK_G12A=y
+CONFIG_ARMADA_AP_CP_HELPER=y
+CONFIG_ARMADA_37XX_CLK=y
+CONFIG_ARMADA_AP806_SYSCON=y
+CONFIG_ARMADA_CP110_SYSCON=y
+CONFIG_QCOM_GDSC=y
+CONFIG_QCOM_RPMCC=y
+CONFIG_COMMON_CLK_QCOM=y
+CONFIG_QCOM_A53PLL=y
+CONFIG_QCOM_CLK_APCS_MSM8916=y
+CONFIG_QCOM_CLK_SMD_RPM=y
+CONFIG_QCOM_CLK_RPMH=y
+# CONFIG_APQ_GCC_8084 is not set
+# CONFIG_APQ_MMCC_8084 is not set
+# CONFIG_IPQ_GCC_4019 is not set
+# CONFIG_IPQ_GCC_806X is not set
+# CONFIG_IPQ_LCC_806X is not set
+CONFIG_IPQ_GCC_8074=y
+# CONFIG_MSM_GCC_8660 is not set
+CONFIG_MSM_GCC_8916=y
+# CONFIG_MSM_GCC_8960 is not set
+# CONFIG_MSM_LCC_8960 is not set
+# CONFIG_MDM_GCC_9615 is not set
+# CONFIG_MDM_LCC_9615 is not set
+# CONFIG_MSM_MMCC_8960 is not set
+# CONFIG_MSM_GCC_8974 is not set
+# CONFIG_MSM_MMCC_8974 is not set
+CONFIG_MSM_GCC_8994=y
+CONFIG_MSM_GCC_8996=y
+CONFIG_MSM_MMCC_8996=y
+CONFIG_MSM_GCC_8998=y
+CONFIG_QCS_GCC_404=y
+# CONFIG_SDM_CAMCC_845 is not set
+# CONFIG_SDM_GCC_660 is not set
+# CONFIG_QCS_TURING_404 is not set
+CONFIG_SDM_GCC_845=y
+# CONFIG_SDM_GPUCC_845 is not set
+# CONFIG_SDM_VIDEOCC_845 is not set
+# CONFIG_SDM_DISPCC_845 is not set
+# CONFIG_SDM_LPASSCC_845 is not set
+CONFIG_SM_GCC_8150=y
+# CONFIG_SPMI_PMIC_CLKDIV is not set
+# CONFIG_QCOM_HFPLL is not set
+# CONFIG_KPSS_XCC is not set
+CONFIG_CLK_RENESAS=y
+CONFIG_CLK_R8A774A1=y
+CONFIG_CLK_R8A774C0=y
+CONFIG_CLK_R8A7795=y
+CONFIG_CLK_R8A7796=y
+CONFIG_CLK_R8A77965=y
+CONFIG_CLK_R8A77970=y
+CONFIG_CLK_R8A77980=y
+CONFIG_CLK_R8A77990=y
+CONFIG_CLK_R8A77995=y
+# CONFIG_CLK_R9A06G032 is not set
+CONFIG_CLK_RCAR_GEN3_CPG=y
+# CONFIG_CLK_RCAR_USB2_CLOCK_SEL is not set
+CONFIG_CLK_RENESAS_CPG_MSSR=y
+CONFIG_CLK_RENESAS_DIV6=y
+CONFIG_ARCH_S32_CLK=y
+CONFIG_COMMON_CLK_SAMSUNG=y
+CONFIG_EXYNOS_ARM64_COMMON_CLK=y
+CONFIG_EXYNOS_AUDSS_CLK_CON=y
+CONFIG_SPRD_COMMON_CLK=y
+CONFIG_SPRD_SC9860_CLK=y
+CONFIG_CLK_SUNXI=y
+CONFIG_CLK_SUNXI_CLOCKS=y
+CONFIG_CLK_SUNXI_PRCM_SUN6I=y
+CONFIG_CLK_SUNXI_PRCM_SUN8I=y
+CONFIG_CLK_SUNXI_PRCM_SUN9I=y
+CONFIG_SUNXI_CCU=y
+CONFIG_SUN50I_A64_CCU=y
+CONFIG_SUN50I_H6_CCU=y
+CONFIG_SUN50I_H6_R_CCU=y
+# CONFIG_SUN8I_A83T_CCU is not set
+CONFIG_SUN8I_H3_CCU=y
+CONFIG_SUN8I_DE2_CCU=y
+CONFIG_SUN8I_R_CCU=y
+CONFIG_CLK_TEGRA_BPMP=y
+CONFIG_TEGRA_CLK_DFLL=y
+CONFIG_CLK_UNIPHIER=y
+# CONFIG_COMMON_CLK_ZYNQMP is not set
+# end of Common Clock Framework
+
+CONFIG_HWSPINLOCK=y
+# CONFIG_HWSPINLOCK_OMAP is not set
+CONFIG_HWSPINLOCK_QCOM=y
+# CONFIG_HWSPINLOCK_SPRD is not set
+
+#
+# Clock Source drivers
+#
+CONFIG_TIMER_OF=y
+CONFIG_TIMER_ACPI=y
+CONFIG_TIMER_PROBE=y
+CONFIG_CLKSRC_MMIO=y
+CONFIG_ROCKCHIP_TIMER=y
+CONFIG_TEGRA_TIMER=y
+CONFIG_ARM_ARCH_TIMER=y
+CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y
+CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND=y
+CONFIG_FSL_ERRATUM_A008585=y
+CONFIG_HISILICON_ERRATUM_161010101=y
+CONFIG_ARM64_ERRATUM_858921=y
+CONFIG_SUN50I_ERRATUM_UNKNOWN1=y
+CONFIG_ARM_TIMER_SP804=y
+CONFIG_SYS_SUPPORTS_SH_CMT=y
+CONFIG_MTK_TIMER=y
+CONFIG_SPRD_TIMER=y
+CONFIG_SYS_SUPPORTS_SH_TMU=y
+CONFIG_SH_TIMER_CMT=y
+CONFIG_SH_TIMER_TMU=y
+CONFIG_CLKSRC_VERSATILE=y
+CONFIG_TIMER_IMX_SYS_CTR=y
+# end of Clock Source drivers
+
+CONFIG_MAILBOX=y
+CONFIG_ARM_MHU=y
+CONFIG_IMX_MBOX=y
+CONFIG_PLATFORM_MHU=y
+# CONFIG_PL320_MBOX is not set
+# CONFIG_ARMADA_37XX_RWTM_MBOX is not set
+# CONFIG_OMAP2PLUS_MBOX is not set
+# CONFIG_ROCKCHIP_MBOX is not set
+CONFIG_PCC=y
+# CONFIG_ALTERA_MBOX is not set
+CONFIG_BCM2835_MBOX=y
+CONFIG_TI_MESSAGE_MANAGER=y
+CONFIG_HI3660_MBOX=y
+CONFIG_HI6220_MBOX=y
+# CONFIG_MAILBOX_TEST is not set
+CONFIG_QCOM_APCS_IPC=y
+CONFIG_TEGRA_HSP_MBOX=y
+# CONFIG_XGENE_SLIMPRO_MBOX is not set
+# CONFIG_BCM_PDC_MBOX is not set
+CONFIG_BCM_FLEXRM_MBOX=m
+# CONFIG_MTK_CMDQ_MBOX is not set
+# CONFIG_ZYNQMP_IPI_MBOX is not set
+CONFIG_IOMMU_IOVA=y
+CONFIG_IOMMU_API=y
+CONFIG_IOMMU_SUPPORT=y
+
+#
+# Generic IOMMU Pagetable Support
+#
+CONFIG_IOMMU_IO_PGTABLE=y
+CONFIG_IOMMU_IO_PGTABLE_LPAE=y
+# CONFIG_IOMMU_IO_PGTABLE_LPAE_SELFTEST is not set
+# CONFIG_IOMMU_IO_PGTABLE_ARMV7S is not set
+# end of Generic IOMMU Pagetable Support
+
+# CONFIG_IOMMU_DEBUGFS is not set
+CONFIG_IOMMU_DEFAULT_PASSTHROUGH=y
+CONFIG_OF_IOMMU=y
+CONFIG_IOMMU_DMA=y
+CONFIG_ROCKCHIP_IOMMU=y
+CONFIG_TEGRA_IOMMU_SMMU=y
+# CONFIG_EXYNOS_IOMMU is not set
+# CONFIG_IPMMU_VMSA is not set
+CONFIG_ARM_SMMU=y
+# CONFIG_ARM_SMMU_DISABLE_BYPASS_BY_DEFAULT is not set
+CONFIG_ARM_SMMU_V3=y
+# CONFIG_MTK_IOMMU is not set
+CONFIG_QCOM_IOMMU=y
+# CONFIG_VIRTIO_IOMMU is not set
+
+#
+# Remoteproc drivers
+#
+CONFIG_REMOTEPROC=y
+# CONFIG_IMX_REMOTEPROC is not set
+CONFIG_QCOM_RPROC_COMMON=m
+CONFIG_QCOM_Q6V5_COMMON=m
+# CONFIG_QCOM_Q6V5_ADSP is not set
+CONFIG_QCOM_Q6V5_MSS=m
+CONFIG_QCOM_Q6V5_PAS=m
+# CONFIG_QCOM_Q6V5_WCSS is not set
+CONFIG_QCOM_SYSMON=m
+# CONFIG_QCOM_WCNSS_PIL is not set
+# end of Remoteproc drivers
+
+#
+# Rpmsg drivers
+#
+CONFIG_RPMSG=y
+# CONFIG_RPMSG_CHAR is not set
+CONFIG_RPMSG_QCOM_GLINK_NATIVE=y
+CONFIG_RPMSG_QCOM_GLINK_RPM=y
+CONFIG_RPMSG_QCOM_GLINK_SMEM=m
+CONFIG_RPMSG_QCOM_SMD=y
+CONFIG_RPMSG_VIRTIO=y
+CONFIG_HAVE_IMX_RPMSG=y
+CONFIG_IMX_RPMSG_PINGPONG=m
+CONFIG_IMX_RPMSG_TTY=m
+# end of Rpmsg drivers
+
+# CONFIG_SOUNDWIRE is not set
+
+#
+# SOC (System On Chip) specific Drivers
+#
+
+#
+# Amlogic SoC drivers
+#
+CONFIG_MESON_CANVAS=m
+CONFIG_MESON_CLK_MEASURE=y
+CONFIG_MESON_GX_SOCINFO=y
+CONFIG_MESON_GX_PM_DOMAINS=y
+CONFIG_MESON_EE_PM_DOMAINS=y
+CONFIG_MESON_MX_SOCINFO=y
+# end of Amlogic SoC drivers
+
+#
+# Aspeed SoC drivers
+#
+# end of Aspeed SoC drivers
+
+#
+# Broadcom SoC drivers
+#
+CONFIG_BCM2835_POWER=y
+CONFIG_RASPBERRYPI_POWER=y
+CONFIG_SOC_BRCMSTB=y
+CONFIG_BRCMSTB_PM=y
+# end of Broadcom SoC drivers
+
+#
+# NXP/Freescale QorIQ SoC drivers
+#
+# CONFIG_FSL_DPAA is not set
+# CONFIG_QUICC_ENGINE is not set
+CONFIG_FSL_GUTS=y
+CONFIG_FSL_MC_DPIO=y
+CONFIG_DPAA2_CONSOLE=y
+CONFIG_FSL_QIXIS=y
+CONFIG_FSL_RCPM=y
+# end of NXP/Freescale QorIQ SoC drivers
+
+#
+# i.MX SoC drivers
+#
+CONFIG_IMX_GPCV2_PM_DOMAINS=y
+CONFIG_IMX_SCU_SOC=y
+CONFIG_IMX8M_PM_DOMAINS=y
+CONFIG_IMX8M_BUSFREQ=y
+# end of i.MX SoC drivers
+
+#
+# MediaTek SoC drivers
+#
+# CONFIG_MTK_CMDQ is not set
+CONFIG_MTK_INFRACFG=y
+# CONFIG_MTK_PMIC_WRAP is not set
+CONFIG_MTK_SCPSYS=y
+# end of MediaTek SoC drivers
+
+#
+# Qualcomm SoC drivers
+#
+# CONFIG_QCOM_AOSS_QMP is not set
+CONFIG_QCOM_COMMAND_DB=y
+CONFIG_QCOM_GENI_SE=y
+CONFIG_QCOM_GLINK_SSR=m
+# CONFIG_QCOM_GSBI is not set
+# CONFIG_QCOM_LLCC is not set
+CONFIG_QCOM_MDT_LOADER=m
+CONFIG_QCOM_QMI_HELPERS=m
+# CONFIG_QCOM_RMTFS_MEM is not set
+CONFIG_QCOM_RPMH=y
+# CONFIG_QCOM_RPMHPD is not set
+# CONFIG_QCOM_RPMPD is not set
+CONFIG_QCOM_SMEM=y
+CONFIG_QCOM_SMD_RPM=y
+CONFIG_QCOM_SMEM_STATE=y
+CONFIG_QCOM_SMP2P=y
+CONFIG_QCOM_SMSM=y
+# CONFIG_QCOM_SOCINFO is not set
+# CONFIG_QCOM_WCNSS_CTRL is not set
+# CONFIG_QCOM_APR is not set
+# end of Qualcomm SoC drivers
+
+CONFIG_SOC_RENESAS=y
+CONFIG_ARCH_RCAR_GEN3=y
+CONFIG_ARCH_R8A774A1=y
+CONFIG_ARCH_R8A774C0=y
+CONFIG_ARCH_R8A7795=y
+CONFIG_ARCH_R8A7796=y
+CONFIG_ARCH_R8A77965=y
+CONFIG_ARCH_R8A77970=y
+CONFIG_ARCH_R8A77980=y
+CONFIG_ARCH_R8A77990=y
+CONFIG_ARCH_R8A77995=y
+CONFIG_SYSC_R8A774A1=y
+CONFIG_SYSC_R8A774C0=y
+CONFIG_SYSC_R8A7795=y
+CONFIG_SYSC_R8A7796=y
+CONFIG_SYSC_R8A77965=y
+CONFIG_SYSC_R8A77970=y
+CONFIG_SYSC_R8A77980=y
+CONFIG_SYSC_R8A77990=y
+CONFIG_SYSC_R8A77995=y
+CONFIG_RST_RCAR=y
+CONFIG_SYSC_RCAR=y
+CONFIG_ROCKCHIP_GRF=y
+CONFIG_ROCKCHIP_PM_DOMAINS=y
+CONFIG_SOC_SAMSUNG=y
+CONFIG_EXYNOS_CHIPID=y
+CONFIG_EXYNOS_PMU=y
+CONFIG_EXYNOS_PM_DOMAINS=y
+CONFIG_SUNXI_SRAM=y
+CONFIG_ARCH_TEGRA_132_SOC=y
+CONFIG_ARCH_TEGRA_210_SOC=y
+CONFIG_ARCH_TEGRA_186_SOC=y
+CONFIG_ARCH_TEGRA_194_SOC=y
+CONFIG_SOC_TEGRA_FUSE=y
+CONFIG_SOC_TEGRA_FLOWCTRL=y
+CONFIG_SOC_TEGRA_PMC=y
+CONFIG_SOC_TEGRA_POWERGATE_BPMP=y
+CONFIG_ARCH_K3_AM6_SOC=y
+CONFIG_ARCH_K3_J721E_SOC=y
+CONFIG_SOC_TI=y
+CONFIG_TI_SCI_PM_DOMAINS=y
+CONFIG_TI_SCI_INTA_MSI_DOMAIN=y
+
+#
+# Xilinx SoC drivers
+#
+# CONFIG_XILINX_VCU is not set
+CONFIG_ZYNQMP_POWER=y
+CONFIG_ZYNQMP_PM_DOMAINS=y
+# end of Xilinx SoC drivers
+
+# CONFIG_SOC_ZTE is not set
+# end of SOC (System On Chip) specific Drivers
+
+CONFIG_PM_DEVFREQ=y
+
+#
+# DEVFREQ Governors
+#
+CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND=y
+# CONFIG_DEVFREQ_GOV_PERFORMANCE is not set
+# CONFIG_DEVFREQ_GOV_POWERSAVE is not set
+# CONFIG_DEVFREQ_GOV_USERSPACE is not set
+# CONFIG_DEVFREQ_GOV_PASSIVE is not set
+
+#
+# DEVFREQ Drivers
+#
+# CONFIG_ARM_EXYNOS_BUS_DEVFREQ is not set
+# CONFIG_ARM_TEGRA_DEVFREQ is not set
+# CONFIG_ARM_RK3399_DMC_DEVFREQ is not set
+# CONFIG_PM_DEVFREQ_EVENT is not set
+CONFIG_EXTCON=y
+
+#
+# Extcon Device Drivers
+#
+# CONFIG_EXTCON_ADC_JACK is not set
+# CONFIG_EXTCON_FSA9480 is not set
+# CONFIG_EXTCON_GPIO is not set
+# CONFIG_EXTCON_MAX3355 is not set
+# CONFIG_EXTCON_PTN5150 is not set
+# CONFIG_EXTCON_QCOM_SPMI_MISC is not set
+# CONFIG_EXTCON_RT8973A is not set
+# CONFIG_EXTCON_SM5502 is not set
+CONFIG_EXTCON_USB_GPIO=y
+CONFIG_EXTCON_USBC_CROS_EC=y
+CONFIG_MEMORY=y
+# CONFIG_ARM_PL172_MPMC is not set
+CONFIG_FSL_IFC=y
+CONFIG_TEGRA_MC=y
+CONFIG_IIO=y
+CONFIG_IIO_BUFFER=y
+# CONFIG_IIO_BUFFER_CB is not set
+# CONFIG_IIO_BUFFER_HW_CONSUMER is not set
+CONFIG_IIO_KFIFO_BUF=m
+CONFIG_IIO_TRIGGERED_BUFFER=m
+# CONFIG_IIO_CONFIGFS is not set
+CONFIG_IIO_TRIGGER=y
+CONFIG_IIO_CONSUMERS_PER_TRIGGER=2
+# CONFIG_IIO_SW_DEVICE is not set
+# CONFIG_IIO_SW_TRIGGER is not set
+
+#
+# Accelerometers
+#
+# CONFIG_ADIS16201 is not set
+# CONFIG_ADIS16209 is not set
+# CONFIG_ADXL345_I2C is not set
+# CONFIG_ADXL345_SPI is not set
+# CONFIG_ADXL372_SPI is not set
+# CONFIG_ADXL372_I2C is not set
+# CONFIG_BMA180 is not set
+# CONFIG_BMA220 is not set
+# CONFIG_BMC150_ACCEL is not set
+# CONFIG_DA280 is not set
+# CONFIG_DA311 is not set
+# CONFIG_DMARD06 is not set
+# CONFIG_DMARD09 is not set
+# CONFIG_DMARD10 is not set
+# CONFIG_IIO_CROS_EC_ACCEL_LEGACY is not set
+# CONFIG_IIO_ST_ACCEL_3AXIS is not set
+# CONFIG_KXSD9 is not set
+# CONFIG_KXCJK1013 is not set
+# CONFIG_MC3230 is not set
+# CONFIG_MMA7455_I2C is not set
+# CONFIG_MMA7455_SPI is not set
+# CONFIG_MMA7660 is not set
+# CONFIG_MMA8452 is not set
+# CONFIG_MMA9551 is not set
+# CONFIG_MMA9553 is not set
+# CONFIG_MXC4005 is not set
+# CONFIG_MXC6255 is not set
+# CONFIG_SCA3000 is not set
+# CONFIG_STK8312 is not set
+# CONFIG_STK8BA50 is not set
+# end of Accelerometers
+
+#
+# Analog to digital converters
+#
+# CONFIG_AD7124 is not set
+# CONFIG_AD7266 is not set
+# CONFIG_AD7291 is not set
+# CONFIG_AD7298 is not set
+# CONFIG_AD7476 is not set
+# CONFIG_AD7606_IFACE_PARALLEL is not set
+# CONFIG_AD7606_IFACE_SPI is not set
+# CONFIG_AD7766 is not set
+# CONFIG_AD7768_1 is not set
+# CONFIG_AD7780 is not set
+# CONFIG_AD7791 is not set
+# CONFIG_AD7793 is not set
+# CONFIG_AD7887 is not set
+# CONFIG_AD7923 is not set
+# CONFIG_AD7949 is not set
+# CONFIG_AD799X is not set
+# CONFIG_AXP20X_ADC is not set
+# CONFIG_AXP288_ADC is not set
+# CONFIG_BCM_IPROC_ADC is not set
+# CONFIG_BERLIN2_ADC is not set
+# CONFIG_CC10001_ADC is not set
+# CONFIG_ENVELOPE_DETECTOR is not set
+CONFIG_EXYNOS_ADC=y
+# CONFIG_HI8435 is not set
+# CONFIG_HX711 is not set
+# CONFIG_INA2XX_ADC is not set
+# CONFIG_IMX7D_ADC is not set
+CONFIG_IMX8QXP_ADC=y
+# CONFIG_LTC2471 is not set
+# CONFIG_LTC2485 is not set
+# CONFIG_LTC2497 is not set
+# CONFIG_MAX1027 is not set
+# CONFIG_MAX11100 is not set
+# CONFIG_MAX1118 is not set
+# CONFIG_MAX1363 is not set
+# CONFIG_MAX9611 is not set
+# CONFIG_MCP320X is not set
+# CONFIG_MCP3422 is not set
+# CONFIG_MCP3911 is not set
+# CONFIG_MEDIATEK_MT6577_AUXADC is not set
+CONFIG_MESON_SARADC=y
+# CONFIG_NAU7802 is not set
+# CONFIG_QCOM_SPMI_IADC is not set
+# CONFIG_QCOM_SPMI_VADC is not set
+# CONFIG_QCOM_SPMI_ADC5 is not set
+CONFIG_ROCKCHIP_SARADC=m
+# CONFIG_SD_ADC_MODULATOR is not set
+# CONFIG_TI_ADC081C is not set
+# CONFIG_TI_ADC0832 is not set
+# CONFIG_TI_ADC084S021 is not set
+# CONFIG_TI_ADC12138 is not set
+# CONFIG_TI_ADC108S102 is not set
+# CONFIG_TI_ADC128S052 is not set
+# CONFIG_TI_ADC161S626 is not set
+# CONFIG_TI_ADS1015 is not set
+# CONFIG_TI_ADS7950 is not set
+# CONFIG_TI_ADS8344 is not set
+# CONFIG_TI_ADS8688 is not set
+# CONFIG_TI_ADS124S08 is not set
+# CONFIG_TI_TLC4541 is not set
+# CONFIG_VF610_ADC is not set
+# CONFIG_XILINX_XADC is not set
+# end of Analog to digital converters
+
+#
+# Analog Front Ends
+#
+# CONFIG_IIO_RESCALE is not set
+# end of Analog Front Ends
+
+#
+# Amplifiers
+#
+# CONFIG_AD8366 is not set
+# end of Amplifiers
+
+#
+# Chemical Sensors
+#
+# CONFIG_ATLAS_PH_SENSOR is not set
+# CONFIG_BME680 is not set
+# CONFIG_CCS811 is not set
+# CONFIG_IAQCORE is not set
+# CONFIG_PMS7003 is not set
+# CONFIG_SENSIRION_SGP30 is not set
+# CONFIG_SPS30 is not set
+# CONFIG_VZ89X is not set
+# end of Chemical Sensors
+
+CONFIG_IIO_CROS_EC_SENSORS_CORE=m
+CONFIG_IIO_CROS_EC_SENSORS=m
+# CONFIG_IIO_CROS_EC_SENSORS_LID_ANGLE is not set
+
+#
+# Hid Sensor IIO Common
+#
+# end of Hid Sensor IIO Common
+
+#
+# SSP Sensor Common
+#
+# CONFIG_IIO_SSP_SENSORHUB is not set
+# end of SSP Sensor Common
+
+#
+# Digital to analog converters
+#
+# CONFIG_AD5064 is not set
+# CONFIG_AD5360 is not set
+# CONFIG_AD5380 is not set
+# CONFIG_AD5421 is not set
+# CONFIG_AD5446 is not set
+# CONFIG_AD5449 is not set
+# CONFIG_AD5592R is not set
+# CONFIG_AD5593R is not set
+# CONFIG_AD5504 is not set
+# CONFIG_AD5624R_SPI is not set
+# CONFIG_LTC1660 is not set
+# CONFIG_LTC2632 is not set
+# CONFIG_AD5686_SPI is not set
+# CONFIG_AD5696_I2C is not set
+# CONFIG_AD5755 is not set
+# CONFIG_AD5758 is not set
+# CONFIG_AD5761 is not set
+# CONFIG_AD5764 is not set
+# CONFIG_AD5791 is not set
+# CONFIG_AD7303 is not set
+# CONFIG_AD8801 is not set
+# CONFIG_DPOT_DAC is not set
+# CONFIG_DS4424 is not set
+# CONFIG_M62332 is not set
+# CONFIG_MAX517 is not set
+# CONFIG_MAX5821 is not set
+# CONFIG_MCP4725 is not set
+# CONFIG_MCP4922 is not set
+# CONFIG_TI_DAC082S085 is not set
+# CONFIG_TI_DAC5571 is not set
+# CONFIG_TI_DAC7311 is not set
+# CONFIG_TI_DAC7612 is not set
+# CONFIG_VF610_DAC is not set
+# end of Digital to analog converters
+
+#
+# IIO dummy driver
+#
+# end of IIO dummy driver
+
+#
+# Frequency Synthesizers DDS/PLL
+#
+
+#
+# Clock Generator/Distribution
+#
+# CONFIG_AD9523 is not set
+# end of Clock Generator/Distribution
+
+#
+# Phase-Locked Loop (PLL) frequency synthesizers
+#
+# CONFIG_ADF4350 is not set
+# CONFIG_ADF4371 is not set
+# end of Phase-Locked Loop (PLL) frequency synthesizers
+# end of Frequency Synthesizers DDS/PLL
+
+#
+# Digital gyroscope sensors
+#
+# CONFIG_ADIS16080 is not set
+# CONFIG_ADIS16130 is not set
+# CONFIG_ADIS16136 is not set
+# CONFIG_ADIS16260 is not set
+# CONFIG_ADXRS450 is not set
+# CONFIG_BMG160 is not set
+# CONFIG_FXAS21002C is not set
+# CONFIG_MPU3050_I2C is not set
+# CONFIG_IIO_ST_GYRO_3AXIS is not set
+# CONFIG_ITG3200 is not set
+# end of Digital gyroscope sensors
+
+#
+# Health Sensors
+#
+
+#
+# Heart Rate Monitors
+#
+# CONFIG_AFE4403 is not set
+# CONFIG_AFE4404 is not set
+# CONFIG_MAX30100 is not set
+# CONFIG_MAX30102 is not set
+# end of Heart Rate Monitors
+# end of Health Sensors
+
+#
+# Humidity sensors
+#
+# CONFIG_AM2315 is not set
+# CONFIG_DHT11 is not set
+# CONFIG_HDC100X is not set
+# CONFIG_HTS221 is not set
+# CONFIG_HTU21 is not set
+# CONFIG_SI7005 is not set
+# CONFIG_SI7020 is not set
+# end of Humidity sensors
+
+#
+# Inertial measurement units
+#
+# CONFIG_ADIS16400 is not set
+# CONFIG_ADIS16460 is not set
+# CONFIG_ADIS16480 is not set
+# CONFIG_BMI160_I2C is not set
+# CONFIG_BMI160_SPI is not set
+# CONFIG_KMX61 is not set
+# CONFIG_INV_MPU6050_I2C is not set
+# CONFIG_INV_MPU6050_SPI is not set
+# CONFIG_IIO_ST_LSM6DSX is not set
+# end of Inertial measurement units
+
+#
+# Light sensors
+#
+# CONFIG_ACPI_ALS is not set
+# CONFIG_ADJD_S311 is not set
+# CONFIG_AL3320A is not set
+# CONFIG_APDS9300 is not set
+# CONFIG_APDS9960 is not set
+# CONFIG_BH1750 is not set
+# CONFIG_BH1780 is not set
+# CONFIG_CM32181 is not set
+# CONFIG_CM3232 is not set
+# CONFIG_CM3323 is not set
+# CONFIG_CM3605 is not set
+# CONFIG_CM36651 is not set
+CONFIG_IIO_CROS_EC_LIGHT_PROX=m
+# CONFIG_GP2AP020A00F is not set
+# CONFIG_SENSORS_ISL29018 is not set
+# CONFIG_SENSORS_ISL29028 is not set
+# CONFIG_ISL29125 is not set
+# CONFIG_JSA1212 is not set
+# CONFIG_RPR0521 is not set
+# CONFIG_LTR501 is not set
+# CONFIG_LV0104CS is not set
+# CONFIG_MAX44000 is not set
+# CONFIG_MAX44009 is not set
+# CONFIG_NOA1305 is not set
+# CONFIG_OPT3001 is not set
+# CONFIG_PA12203001 is not set
+# CONFIG_SI1133 is not set
+# CONFIG_SI1145 is not set
+# CONFIG_STK3310 is not set
+# CONFIG_ST_UVIS25 is not set
+# CONFIG_TCS3414 is not set
+# CONFIG_TCS3472 is not set
+# CONFIG_SENSORS_TSL2563 is not set
+# CONFIG_TSL2583 is not set
+# CONFIG_TSL2772 is not set
+# CONFIG_TSL4531 is not set
+# CONFIG_US5182D is not set
+# CONFIG_VCNL4000 is not set
+# CONFIG_VCNL4035 is not set
+# CONFIG_VEML6070 is not set
+# CONFIG_VL6180 is not set
+# CONFIG_ZOPT2201 is not set
+# end of Light sensors
+
+#
+# Magnetometer sensors
+#
+# CONFIG_AK8974 is not set
+# CONFIG_AK8975 is not set
+# CONFIG_AK09911 is not set
+# CONFIG_BMC150_MAGN_I2C is not set
+# CONFIG_BMC150_MAGN_SPI is not set
+# CONFIG_MAG3110 is not set
+# CONFIG_MMC35240 is not set
+# CONFIG_IIO_ST_MAGN_3AXIS is not set
+# CONFIG_SENSORS_HMC5843_I2C is not set
+# CONFIG_SENSORS_HMC5843_SPI is not set
+# CONFIG_SENSORS_RM3100_I2C is not set
+# CONFIG_SENSORS_RM3100_SPI is not set
+# end of Magnetometer sensors
+
+#
+# Multiplexers
+#
+# CONFIG_IIO_MUX is not set
+# end of Multiplexers
+
+#
+# Inclinometer sensors
+#
+# end of Inclinometer sensors
+
+#
+# Triggers - standalone
+#
+# CONFIG_IIO_INTERRUPT_TRIGGER is not set
+# CONFIG_IIO_SYSFS_TRIGGER is not set
+# end of Triggers - standalone
+
+#
+# Digital potentiometers
+#
+# CONFIG_AD5272 is not set
+# CONFIG_DS1803 is not set
+# CONFIG_MAX5432 is not set
+# CONFIG_MAX5481 is not set
+# CONFIG_MAX5487 is not set
+# CONFIG_MCP4018 is not set
+# CONFIG_MCP4131 is not set
+# CONFIG_MCP4531 is not set
+# CONFIG_MCP41010 is not set
+# CONFIG_TPL0102 is not set
+# end of Digital potentiometers
+
+#
+# Digital potentiostats
+#
+# CONFIG_LMP91000 is not set
+# end of Digital potentiostats
+
+#
+# Pressure sensors
+#
+# CONFIG_ABP060MG is not set
+# CONFIG_BMP280 is not set
+CONFIG_IIO_CROS_EC_BARO=m
+# CONFIG_DPS310 is not set
+# CONFIG_HP03 is not set
+# CONFIG_MPL115_I2C is not set
+# CONFIG_MPL115_SPI is not set
+# CONFIG_MPL3115 is not set
+# CONFIG_MS5611 is not set
+# CONFIG_MS5637 is not set
+# CONFIG_IIO_ST_PRESS is not set
+# CONFIG_T5403 is not set
+# CONFIG_HP206C is not set
+# CONFIG_ZPA2326 is not set
+# end of Pressure sensors
+
+#
+# Lightning sensors
+#
+# CONFIG_AS3935 is not set
+# end of Lightning sensors
+
+#
+# Proximity and distance sensors
+#
+# CONFIG_ISL29501 is not set
+# CONFIG_LIDAR_LITE_V2 is not set
+# CONFIG_MB1232 is not set
+# CONFIG_RFD77402 is not set
+# CONFIG_SRF04 is not set
+# CONFIG_SX9500 is not set
+# CONFIG_SRF08 is not set
+# CONFIG_VL53L0X_I2C is not set
+# end of Proximity and distance sensors
+
+#
+# Resolver to digital converters
+#
+# CONFIG_AD2S90 is not set
+# CONFIG_AD2S1200 is not set
+# end of Resolver to digital converters
+
+#
+# Temperature sensors
+#
+# CONFIG_MAXIM_THERMOCOUPLE is not set
+# CONFIG_MLX90614 is not set
+# CONFIG_MLX90632 is not set
+# CONFIG_TMP006 is not set
+# CONFIG_TMP007 is not set
+# CONFIG_TSYS01 is not set
+# CONFIG_TSYS02D is not set
+# CONFIG_MAX31856 is not set
+# end of Temperature sensors
+
+# CONFIG_NTB is not set
+# CONFIG_VME_BUS is not set
+CONFIG_PWM=y
+CONFIG_PWM_SYSFS=y
+CONFIG_PWM_BCM_IPROC=y
+CONFIG_PWM_BCM2835=m
+# CONFIG_PWM_BERLIN is not set
+# CONFIG_PWM_BRCMSTB is not set
+CONFIG_PWM_CROS_EC=m
+# CONFIG_PWM_FSL_FTM is not set
+# CONFIG_PWM_HIBVT is not set
+# CONFIG_PWM_IMX1 is not set
+CONFIG_PWM_IMX27=y
+# CONFIG_PWM_IMX_TPM is not set
+CONFIG_PWM_MESON=m
+# CONFIG_PWM_MTK_DISP is not set
+# CONFIG_PWM_MEDIATEK is not set
+# CONFIG_PWM_PCA9685 is not set
+CONFIG_PWM_RCAR=m
+# CONFIG_PWM_RENESAS_TPU is not set
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_PWM_SAMSUNG=y
+# CONFIG_PWM_SPRD is not set
+CONFIG_PWM_SUN4I=m
+CONFIG_PWM_TEGRA=m
+# CONFIG_PWM_TIECAP is not set
+# CONFIG_PWM_TIEHRPWM is not set
+# CONFIG_PWM_ZX is not set
+
+#
+# IRQ chip support
+#
+CONFIG_IRQCHIP=y
+CONFIG_ARM_GIC=y
+CONFIG_ARM_GIC_PM=y
+CONFIG_ARM_GIC_MAX_NR=1
+CONFIG_ARM_GIC_V2M=y
+CONFIG_ARM_GIC_V3=y
+CONFIG_ARM_GIC_V3_ITS=y
+CONFIG_ARM_GIC_V3_ITS_PCI=y
+CONFIG_ARM_GIC_V3_ITS_FSL_MC=y
+CONFIG_ALPINE_MSI=y
+# CONFIG_AL_FIC is not set
+CONFIG_BCM7038_L1_IRQ=y
+CONFIG_BRCMSTB_L2_IRQ=y
+CONFIG_DW_APB_ICTL=y
+CONFIG_HISILICON_IRQ_MBIGEN=y
+CONFIG_RENESAS_IRQC=y
+CONFIG_IMX_GPCV2=y
+CONFIG_MVEBU_GICP=y
+CONFIG_MVEBU_ICU=y
+CONFIG_MVEBU_ODMI=y
+CONFIG_MVEBU_PIC=y
+CONFIG_MVEBU_SEI=y
+CONFIG_LS_SCFG_MSI=y
+CONFIG_PARTITION_PERCPU=y
+CONFIG_QCOM_IRQ_COMBINER=y
+CONFIG_IRQ_UNIPHIER_AIDET=y
+CONFIG_MESON_IRQ_GPIO=y
+# CONFIG_QCOM_PDC is not set
+CONFIG_IMX_IRQSTEER=y
+CONFIG_TI_SCI_INTR_IRQCHIP=y
+CONFIG_TI_SCI_INTA_IRQCHIP=y
+CONFIG_IMX_INTMUX=y
+# end of IRQ chip support
+
+# CONFIG_IPACK_BUS is not set
+CONFIG_ARCH_HAS_RESET_CONTROLLER=y
+CONFIG_RESET_CONTROLLER=y
+CONFIG_RESET_BERLIN=y
+CONFIG_RESET_BRCMSTB=y
+CONFIG_RESET_DISPMIX=y
+CONFIG_RESET_IMX7=y
+CONFIG_RESET_GPIO=y
+CONFIG_RESET_MESON=y
+CONFIG_RESET_MESON_AUDIO_ARB=m
+# CONFIG_RESET_QCOM_AOSS is not set
+# CONFIG_RESET_QCOM_PDC is not set
+CONFIG_RESET_SIMPLE=y
+CONFIG_RESET_SUNXI=y
+CONFIG_RESET_TI_SCI=y
+# CONFIG_RESET_TI_SYSCON is not set
+CONFIG_RESET_UNIPHIER=y
+CONFIG_RESET_UNIPHIER_GLUE=y
+CONFIG_COMMON_RESET_HI3660=y
+CONFIG_COMMON_RESET_HI6220=y
+CONFIG_RESET_TEGRA_BPMP=y
+
+#
+# PHY Subsystem
+#
+CONFIG_GENERIC_PHY=y
+CONFIG_GENERIC_PHY_MIPI_DPHY=y
+CONFIG_PHY_XGENE=y
+CONFIG_PHY_MIXEL_LVDS=y
+CONFIG_PHY_MIXEL_LVDS_COMBO=y
+CONFIG_PHY_SUN4I_USB=y
+# CONFIG_PHY_SUN6I_MIPI_DPHY is not set
+# CONFIG_PHY_SUN9I_USB is not set
+CONFIG_PHY_MESON8B_USB2=y
+CONFIG_PHY_MESON_GXL_USB2=y
+CONFIG_PHY_MESON_GXL_USB3=y
+CONFIG_PHY_MESON_G12A_USB2=y
+CONFIG_PHY_MESON_G12A_USB3_PCIE=y
+CONFIG_PHY_BCM_SR_USB=y
+# CONFIG_BCM_KONA_USB2_PHY is not set
+# CONFIG_PHY_BCM_NS_USB2 is not set
+# CONFIG_PHY_BCM_NS_USB3 is not set
+CONFIG_PHY_NS2_PCIE=y
+CONFIG_PHY_NS2_USB_DRD=y
+CONFIG_PHY_BRCM_SATA=y
+CONFIG_PHY_BRCM_USB=y
+CONFIG_PHY_BCM_SR_PCIE=y
+# CONFIG_PHY_CADENCE_DP is not set
+# CONFIG_PHY_CADENCE_DPHY is not set
+# CONFIG_PHY_CADENCE_SIERRA is not set
+CONFIG_PHY_FSL_IMX8MQ_USB=y
+CONFIG_PHY_MIXEL_MIPI_DPHY=y
+CONFIG_PHY_HI6220_USB=y
+# CONFIG_PHY_HI3660_USB is not set
+CONFIG_PHY_HISTB_COMBPHY=y
+CONFIG_PHY_HISI_INNO_USB2=y
+# CONFIG_PHY_BERLIN_SATA is not set
+# CONFIG_PHY_BERLIN_USB is not set
+CONFIG_PHY_MVEBU_A3700_COMPHY=y
+CONFIG_PHY_MVEBU_A3700_UTMI=y
+# CONFIG_PHY_MVEBU_A38X_COMPHY is not set
+CONFIG_PHY_MVEBU_CP110_COMPHY=y
+# CONFIG_PHY_PXA_28NM_HSIC is not set
+# CONFIG_PHY_PXA_28NM_USB2 is not set
+# CONFIG_PHY_MTK_TPHY is not set
+# CONFIG_PHY_MTK_UFS is not set
+# CONFIG_PHY_MTK_XSPHY is not set
+# CONFIG_PHY_CPCAP_USB is not set
+# CONFIG_PHY_MAPPHONE_MDM6600 is not set
+# CONFIG_PHY_OCELOT_SERDES is not set
+# CONFIG_PHY_QCOM_APQ8064_SATA is not set
+# CONFIG_PHY_QCOM_IPQ806X_SATA is not set
+# CONFIG_PHY_QCOM_PCIE2 is not set
+CONFIG_PHY_QCOM_QMP=m
+CONFIG_PHY_QCOM_QUSB2=m
+# CONFIG_PHY_QCOM_UFS is not set
+CONFIG_PHY_QCOM_USB_HS=y
+# CONFIG_PHY_QCOM_USB_HSIC is not set
+# CONFIG_PHY_RCAR_GEN2 is not set
+CONFIG_PHY_RCAR_GEN3_PCIE=y
+CONFIG_PHY_RCAR_GEN3_USB2=y
+CONFIG_PHY_RCAR_GEN3_USB3=m
+# CONFIG_PHY_ROCKCHIP_DP is not set
+CONFIG_PHY_ROCKCHIP_EMMC=y
+CONFIG_PHY_ROCKCHIP_INNO_HDMI=m
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_PHY_ROCKCHIP_PCIE=m
+CONFIG_PHY_ROCKCHIP_TYPEC=y
+# CONFIG_PHY_ROCKCHIP_USB is not set
+CONFIG_PHY_EXYNOS_DP_VIDEO=y
+CONFIG_PHY_EXYNOS_MIPI_VIDEO=y
+# CONFIG_PHY_EXYNOS_PCIE is not set
+CONFIG_PHY_SAMSUNG_USB2=y
+CONFIG_PHY_EXYNOS5_USBDRD=y
+CONFIG_PHY_UNIPHIER_USB2=y
+CONFIG_PHY_UNIPHIER_USB3=y
+# CONFIG_PHY_UNIPHIER_PCIE is not set
+CONFIG_PHY_TEGRA_XUSB=y
+CONFIG_PHY_TEGRA194_P2U=m
+# CONFIG_PHY_AM654_SERDES is not set
+# CONFIG_OMAP_USB2 is not set
+# CONFIG_PHY_TUSB1210 is not set
+# end of PHY Subsystem
+
+# CONFIG_POWERCAP is not set
+# CONFIG_MCB is not set
+
+#
+# Performance monitor support
+#
+# CONFIG_ARM_CCI_PMU is not set
+# CONFIG_ARM_CCN is not set
+CONFIG_ARM_PMU=y
+CONFIG_ARM_PMU_ACPI=y
+# CONFIG_ARM_SMMU_V3_PMU is not set
+# CONFIG_ARM_DSU_PMU is not set
+CONFIG_FSL_IMX8_DDR_PMU=m
+CONFIG_HISI_PMU=y
+CONFIG_QCOM_L2_PMU=y
+CONFIG_QCOM_L3_PMU=y
+CONFIG_THUNDERX2_PMU=m
+# CONFIG_XGENE_PMU is not set
+# CONFIG_ARM_SPE_PMU is not set
+# end of Performance monitor support
+
+CONFIG_RAS=y
+
+#
+# Android
+#
+# CONFIG_ANDROID is not set
+# end of Android
+
+# CONFIG_LIBNVDIMM is not set
+# CONFIG_DAX is not set
+CONFIG_NVMEM=y
+CONFIG_NVMEM_SYSFS=y
+# CONFIG_NVMEM_IMX_IIM is not set
+CONFIG_NVMEM_IMX_OCOTP=y
+CONFIG_NVMEM_IMX_OCOTP_SCU=y
+# CONFIG_MTK_EFUSE is not set
+CONFIG_QCOM_QFPROM=y
+CONFIG_ROCKCHIP_EFUSE=y
+CONFIG_NVMEM_BCM_OCOTP=y
+CONFIG_NVMEM_SUNXI_SID=y
+CONFIG_UNIPHIER_EFUSE=y
+CONFIG_MESON_EFUSE=m
+# CONFIG_MESON_MX_EFUSE is not set
+# CONFIG_NVMEM_SNVS_LPGPR is not set
+# CONFIG_NVMEM_ZYNQMP is not set
+
+#
+# HW tracing support
+#
+# CONFIG_STM is not set
+# CONFIG_INTEL_TH is not set
+# end of HW tracing support
+
+CONFIG_FPGA=y
+# CONFIG_ALTERA_PR_IP_CORE is not set
+# CONFIG_FPGA_MGR_ALTERA_PS_SPI is not set
+# CONFIG_FPGA_MGR_ALTERA_CVP is not set
+CONFIG_FPGA_MGR_STRATIX10_SOC=m
+# CONFIG_FPGA_MGR_XILINX_SPI is not set
+# CONFIG_FPGA_MGR_ICE40_SPI is not set
+# CONFIG_FPGA_MGR_MACHXO2_SPI is not set
+CONFIG_FPGA_BRIDGE=m
+CONFIG_ALTERA_FREEZE_BRIDGE=m
+# CONFIG_XILINX_PR_DECOUPLER is not set
+CONFIG_FPGA_REGION=m
+CONFIG_OF_FPGA_REGION=m
+# CONFIG_FPGA_DFL is not set
+# CONFIG_FPGA_MGR_ZYNQMP_FPGA is not set
+# CONFIG_FSI is not set
+CONFIG_TEE=y
+
+#
+# TEE drivers
+#
+CONFIG_OPTEE=y
+CONFIG_OPTEE_SHM_NUM_PRIV_PAGES=1
+# end of TEE drivers
+
+CONFIG_MULTIPLEXER=y
+
+#
+# Multiplexer drivers
+#
+# CONFIG_MUX_ADG792A is not set
+# CONFIG_MUX_ADGS1408 is not set
+# CONFIG_MUX_GPIO is not set
+CONFIG_MUX_MMIO=y
+# end of Multiplexer drivers
+
+CONFIG_PM_OPP=y
+# CONFIG_SIOX is not set
+# CONFIG_SLIMBUS is not set
+# CONFIG_INTERCONNECT is not set
+# CONFIG_COUNTER is not set
+
+#
+# MXC support drivers
+#
+CONFIG_MXC_SIM=y
+# CONFIG_MXC_IPU is not set
+
+#
+# MXC HANTRO(Video Processing Unit) support
+#
+CONFIG_MXC_HANTRO=y
+# end of MXC HANTRO(Video Processing Unit) support
+
+#
+# MXC HANTRO(Video Processing Unit) 845 support
+#
+CONFIG_MXC_HANTRO_845=y
+# end of MXC HANTRO(Video Processing Unit) 845 support
+
+#
+# MXC HANTRO(Video Processing Unit) encoder support
+#
+CONFIG_MXC_HANTRO_845_H1=y
+# end of MXC HANTRO(Video Processing Unit) encoder support
+
+#
+# MXC VPU(Video Processing Unit) MALONE DECODER support
+#
+CONFIG_MXC_VPU_MALONE=y
+# CONFIG_MXC_VPU_MALONE_DEBUG is not set
+# end of MXC VPU(Video Processing Unit) MALONE DECODER support
+
+#
+# MXC VPU(Video Processing Unit) WINDSOR ENCODER support
+#
+CONFIG_MXC_VPU_WINDSOR=y
+# CONFIG_MXC_VPU_WINDSOR_DEBUG is not set
+# end of MXC VPU(Video Processing Unit) WINDSOR ENCODER support
+
+#
+# MXC Vivante GPU support
+#
+CONFIG_MXC_GPU_VIV=y
+# end of MXC Vivante GPU support
+
+#
+# MXC VPU(Video Processing Unit) support
+#
+# end of MXC VPU(Video Processing Unit) support
+
+#
+# MXC SIM Support
+#
+# CONFIG_MXC_SIMv2 is not set
+CONFIG_MXC_EMVSIM=y
+# end of MXC SIM Support
+
+#
+# MXC Media Local Bus Driver
+#
+CONFIG_MXC_MLB=y
+CONFIG_MXC_MLB150=y
+# end of MXC Media Local Bus Driver
+
+#
+# MXC HDMI CEC (Consumer Electronics Control) support
+#
+# end of MXC HDMI CEC (Consumer Electronics Control) support
+
+#
+# MXC MIPI Support
+#
+# end of MXC MIPI Support
+# end of MXC support drivers
+# end of Device Drivers
+
+#
+# File systems
+#
+CONFIG_DCACHE_WORD_ACCESS=y
+# CONFIG_VALIDATE_FS_PARSER is not set
+CONFIG_FS_IOMAP=y
+CONFIG_EXT2_FS=y
+CONFIG_EXT2_FS_XATTR=y
+CONFIG_EXT2_FS_POSIX_ACL=y
+# CONFIG_EXT2_FS_SECURITY is not set
+CONFIG_EXT3_FS=y
+CONFIG_EXT3_FS_POSIX_ACL=y
+# CONFIG_EXT3_FS_SECURITY is not set
+CONFIG_EXT4_FS=y
+CONFIG_EXT4_FS_POSIX_ACL=y
+CONFIG_EXT4_FS_SECURITY=y
+# CONFIG_EXT4_DEBUG is not set
+CONFIG_JBD2=y
+# CONFIG_JBD2_DEBUG is not set
+CONFIG_FS_MBCACHE=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
+# CONFIG_OCFS2_FS is not set
+CONFIG_BTRFS_FS=y
+CONFIG_BTRFS_FS_POSIX_ACL=y
+# CONFIG_BTRFS_FS_CHECK_INTEGRITY is not set
+# CONFIG_BTRFS_FS_RUN_SANITY_TESTS is not set
+# CONFIG_BTRFS_DEBUG is not set
+# CONFIG_BTRFS_ASSERT is not set
+# CONFIG_BTRFS_FS_REF_VERIFY is not set
+# CONFIG_NILFS2_FS is not set
+# CONFIG_F2FS_FS is not set
+# CONFIG_FS_DAX is not set
+CONFIG_FS_POSIX_ACL=y
+CONFIG_EXPORTFS=y
+# CONFIG_EXPORTFS_BLOCK_OPS is not set
+CONFIG_FILE_LOCKING=y
+CONFIG_MANDATORY_FILE_LOCKING=y
+# CONFIG_FS_ENCRYPTION is not set
+# CONFIG_FS_VERITY is not set
+CONFIG_FSNOTIFY=y
+CONFIG_DNOTIFY=y
+CONFIG_INOTIFY_USER=y
+CONFIG_FANOTIFY=y
+CONFIG_FANOTIFY_ACCESS_PERMISSIONS=y
+CONFIG_QUOTA=y
+# CONFIG_QUOTA_NETLINK_INTERFACE is not set
+CONFIG_PRINT_QUOTA_WARNING=y
+# CONFIG_QUOTA_DEBUG is not set
+# CONFIG_QFMT_V1 is not set
+# CONFIG_QFMT_V2 is not set
+CONFIG_QUOTACTL=y
+CONFIG_AUTOFS4_FS=y
+CONFIG_AUTOFS_FS=y
+CONFIG_FUSE_FS=y
+CONFIG_CUSE=m
+# CONFIG_VIRTIO_FS is not set
+CONFIG_OVERLAY_FS=y
+# CONFIG_OVERLAY_FS_REDIRECT_DIR is not set
+CONFIG_OVERLAY_FS_REDIRECT_ALWAYS_FOLLOW=y
+# CONFIG_OVERLAY_FS_INDEX is not set
+# CONFIG_OVERLAY_FS_XINO_AUTO is not set
+# CONFIG_OVERLAY_FS_METACOPY is not set
+
+#
+# Caches
+#
+# CONFIG_FSCACHE is not set
+# end of Caches
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+# end of CD-ROM/DVD Filesystems
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=y
+# CONFIG_MSDOS_FS is not set
+CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+# CONFIG_FAT_DEFAULT_UTF8 is not set
+# CONFIG_NTFS_FS is not set
+# end of DOS/FAT/NT Filesystems
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+CONFIG_PROC_VMCORE=y
+# CONFIG_PROC_VMCORE_DEVICE_DUMP is not set
+CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_PROC_CHILDREN=y
+CONFIG_KERNFS=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+CONFIG_TMPFS_POSIX_ACL=y
+CONFIG_TMPFS_XATTR=y
+CONFIG_HUGETLBFS=y
+CONFIG_HUGETLB_PAGE=y
+CONFIG_MEMFD_CREATE=y
+CONFIG_ARCH_HAS_GIGANTIC_PAGE=y
+CONFIG_CONFIGFS_FS=y
+CONFIG_EFIVAR_FS=y
+# end of Pseudo filesystems
+
+CONFIG_MISC_FILESYSTEMS=y
+# CONFIG_ORANGEFS_FS is not set
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_ECRYPT_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_FS_DEBUG=0
+CONFIG_JFFS2_FS_WRITEBUFFER=y
+# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
+# CONFIG_JFFS2_SUMMARY is not set
+# CONFIG_JFFS2_FS_XATTR is not set
+# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
+CONFIG_JFFS2_ZLIB=y
+CONFIG_JFFS2_RTIME=y
+CONFIG_UBIFS_FS=y
+# CONFIG_UBIFS_FS_ADVANCED_COMPR is not set
+CONFIG_UBIFS_FS_LZO=y
+CONFIG_UBIFS_FS_ZLIB=y
+CONFIG_UBIFS_FS_ZSTD=y
+# CONFIG_UBIFS_ATIME_SUPPORT is not set
+CONFIG_UBIFS_FS_XATTR=y
+CONFIG_UBIFS_FS_SECURITY=y
+# CONFIG_UBIFS_FS_AUTHENTICATION is not set
+# CONFIG_CRAMFS is not set
+CONFIG_SQUASHFS=y
+CONFIG_SQUASHFS_FILE_CACHE=y
+# CONFIG_SQUASHFS_FILE_DIRECT is not set
+CONFIG_SQUASHFS_DECOMP_SINGLE=y
+# CONFIG_SQUASHFS_DECOMP_MULTI is not set
+# CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU is not set
+# CONFIG_SQUASHFS_XATTR is not set
+CONFIG_SQUASHFS_ZLIB=y
+# CONFIG_SQUASHFS_LZ4 is not set
+# CONFIG_SQUASHFS_LZO is not set
+CONFIG_SQUASHFS_XZ=y
+# CONFIG_SQUASHFS_ZSTD is not set
+# CONFIG_SQUASHFS_4K_DEVBLK_SIZE is not set
+# CONFIG_SQUASHFS_EMBEDDED is not set
+CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_QNX6FS_FS is not set
+# CONFIG_ROMFS_FS is not set
+CONFIG_PSTORE=y
+CONFIG_PSTORE_DEFLATE_COMPRESS=y
+# CONFIG_PSTORE_LZO_COMPRESS is not set
+# CONFIG_PSTORE_LZ4_COMPRESS is not set
+# CONFIG_PSTORE_LZ4HC_COMPRESS is not set
+# CONFIG_PSTORE_842_COMPRESS is not set
+# CONFIG_PSTORE_ZSTD_COMPRESS is not set
+CONFIG_PSTORE_COMPRESS=y
+CONFIG_PSTORE_DEFLATE_COMPRESS_DEFAULT=y
+CONFIG_PSTORE_COMPRESS_DEFAULT="deflate"
+# CONFIG_PSTORE_CONSOLE is not set
+# CONFIG_PSTORE_PMSG is not set
+# CONFIG_PSTORE_FTRACE is not set
+# CONFIG_PSTORE_RAM is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+# CONFIG_EROFS_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V2=y
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V3_ACL is not set
+CONFIG_NFS_V4=y
+# CONFIG_NFS_SWAP is not set
+CONFIG_NFS_V4_1=y
+CONFIG_NFS_V4_2=y
+CONFIG_PNFS_FILE_LAYOUT=y
+CONFIG_PNFS_BLOCK=m
+CONFIG_PNFS_FLEXFILE_LAYOUT=m
+CONFIG_NFS_V4_1_IMPLEMENTATION_ID_DOMAIN="kernel.org"
+# CONFIG_NFS_V4_1_MIGRATION is not set
+CONFIG_NFS_V4_SECURITY_LABEL=y
+CONFIG_ROOT_NFS=y
+# CONFIG_NFS_USE_LEGACY_DNS is not set
+CONFIG_NFS_USE_KERNEL_DNS=y
+# CONFIG_NFSD is not set
+CONFIG_GRACE_PERIOD=y
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+CONFIG_SUNRPC_GSS=y
+CONFIG_SUNRPC_BACKCHANNEL=y
+CONFIG_RPCSEC_GSS_KRB5=m
+# CONFIG_SUNRPC_DISABLE_INSECURE_ENCTYPES is not set
+# CONFIG_SUNRPC_DEBUG is not set
+# CONFIG_CEPH_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+CONFIG_9P_FS=y
+# CONFIG_9P_FS_POSIX_ACL is not set
+# CONFIG_9P_FS_SECURITY is not set
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=y
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ASCII is not set
+CONFIG_NLS_ISO8859_1=y
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+# CONFIG_NLS_MAC_ROMAN is not set
+# CONFIG_NLS_MAC_CELTIC is not set
+# CONFIG_NLS_MAC_CENTEURO is not set
+# CONFIG_NLS_MAC_CROATIAN is not set
+# CONFIG_NLS_MAC_CYRILLIC is not set
+# CONFIG_NLS_MAC_GAELIC is not set
+# CONFIG_NLS_MAC_GREEK is not set
+# CONFIG_NLS_MAC_ICELAND is not set
+# CONFIG_NLS_MAC_INUIT is not set
+# CONFIG_NLS_MAC_ROMANIAN is not set
+# CONFIG_NLS_MAC_TURKISH is not set
+# CONFIG_NLS_UTF8 is not set
+# CONFIG_DLM is not set
+# CONFIG_UNICODE is not set
+# end of File systems
+
+#
+# Security options
+#
+CONFIG_KEYS=y
+CONFIG_KEYS_COMPAT=y
+# CONFIG_KEYS_REQUEST_CACHE is not set
+# CONFIG_PERSISTENT_KEYRINGS is not set
+# CONFIG_BIG_KEYS is not set
+# CONFIG_TRUSTED_KEYS is not set
+# CONFIG_SECURE_KEYS is not set
+# CONFIG_ENCRYPTED_KEYS is not set
+# CONFIG_KEY_DH_OPERATIONS is not set
+# CONFIG_SECURITY_DMESG_RESTRICT is not set
+CONFIG_SECURITY=y
+CONFIG_SECURITYFS=y
+# CONFIG_SECURITY_NETWORK is not set
+# CONFIG_SECURITY_PATH is not set
+CONFIG_HAVE_HARDENED_USERCOPY_ALLOCATOR=y
+# CONFIG_HARDENED_USERCOPY is not set
+# CONFIG_FORTIFY_SOURCE is not set
+# CONFIG_STATIC_USERMODEHELPER is not set
+# CONFIG_SECURITY_SMACK is not set
+# CONFIG_SECURITY_TOMOYO is not set
+# CONFIG_SECURITY_APPARMOR is not set
+# CONFIG_SECURITY_LOADPIN is not set
+# CONFIG_SECURITY_YAMA is not set
+# CONFIG_SECURITY_SAFESETID is not set
+# CONFIG_SECURITY_LOCKDOWN_LSM is not set
+CONFIG_INTEGRITY=y
+# CONFIG_INTEGRITY_SIGNATURE is not set
+CONFIG_INTEGRITY_AUDIT=y
+# CONFIG_IMA is not set
+# CONFIG_EVM is not set
+CONFIG_DEFAULT_SECURITY_DAC=y
+CONFIG_LSM="lockdown,yama,loadpin,safesetid,integrity"
+
+#
+# Kernel hardening options
+#
+
+#
+# Memory initialization
+#
+CONFIG_INIT_STACK_NONE=y
+# CONFIG_INIT_ON_ALLOC_DEFAULT_ON is not set
+# CONFIG_INIT_ON_FREE_DEFAULT_ON is not set
+# end of Memory initialization
+# end of Kernel hardening options
+# end of Security options
+
+CONFIG_XOR_BLOCKS=y
+CONFIG_ASYNC_TX_DISABLE_PQ_VAL_DMA=y
+CONFIG_ASYNC_TX_DISABLE_XOR_VAL_DMA=y
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_ALGAPI2=y
+CONFIG_CRYPTO_AEAD=y
+CONFIG_CRYPTO_AEAD2=y
+CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_BLKCIPHER2=y
+CONFIG_CRYPTO_HASH=y
+CONFIG_CRYPTO_HASH2=y
+CONFIG_CRYPTO_RNG=y
+CONFIG_CRYPTO_RNG2=y
+CONFIG_CRYPTO_RNG_DEFAULT=y
+CONFIG_CRYPTO_AKCIPHER2=y
+CONFIG_CRYPTO_AKCIPHER=y
+CONFIG_CRYPTO_KPP2=y
+CONFIG_CRYPTO_KPP=y
+CONFIG_CRYPTO_ACOMP2=y
+CONFIG_CRYPTO_MANAGER=y
+CONFIG_CRYPTO_MANAGER2=y
+CONFIG_CRYPTO_USER=y
+CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y
+CONFIG_CRYPTO_GF128MUL=y
+CONFIG_CRYPTO_NULL=y
+CONFIG_CRYPTO_NULL2=y
+# CONFIG_CRYPTO_PCRYPT is not set
+CONFIG_CRYPTO_CRYPTD=y
+CONFIG_CRYPTO_AUTHENC=y
+CONFIG_CRYPTO_TEST=m
+CONFIG_CRYPTO_SIMD=y
+CONFIG_CRYPTO_ENGINE=m
+
+#
+# Public-key cryptography
+#
+CONFIG_CRYPTO_RSA=y
+# CONFIG_CRYPTO_DH is not set
+CONFIG_CRYPTO_ECC=y
+CONFIG_CRYPTO_ECDH=y
+# CONFIG_CRYPTO_ECRDSA is not set
+
+#
+# Authenticated Encryption with Associated Data
+#
+CONFIG_CRYPTO_CCM=y
+CONFIG_CRYPTO_GCM=y
+CONFIG_CRYPTO_CHACHA20POLY1305=m
+# CONFIG_CRYPTO_AEGIS128 is not set
+CONFIG_CRYPTO_SEQIV=y
+CONFIG_CRYPTO_ECHAINIV=y
+CONFIG_CRYPTO_TLS=m
+
+#
+# Block modes
+#
+CONFIG_CRYPTO_CBC=y
+# CONFIG_CRYPTO_CFB is not set
+CONFIG_CRYPTO_CTR=y
+CONFIG_CRYPTO_CTS=m
+CONFIG_CRYPTO_ECB=y
+CONFIG_CRYPTO_LRW=m
+# CONFIG_CRYPTO_OFB is not set
+# CONFIG_CRYPTO_PCBC is not set
+CONFIG_CRYPTO_XTS=m
+# CONFIG_CRYPTO_KEYWRAP is not set
+# CONFIG_CRYPTO_ADIANTUM is not set
+# CONFIG_CRYPTO_ESSIV is not set
+
+#
+# Hash modes
+#
+CONFIG_CRYPTO_CMAC=y
+CONFIG_CRYPTO_HMAC=y
+# CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_VMAC is not set
+
+#
+# Digest
+#
+CONFIG_CRYPTO_CRC32C=y
+# CONFIG_CRYPTO_CRC32 is not set
+# CONFIG_CRYPTO_XXHASH is not set
+CONFIG_CRYPTO_CRCT10DIF=y
+CONFIG_CRYPTO_GHASH=y
+CONFIG_CRYPTO_POLY1305=m
+CONFIG_CRYPTO_MD4=m
+CONFIG_CRYPTO_MD5=y
+CONFIG_CRYPTO_MICHAEL_MIC=y
+CONFIG_CRYPTO_RMD128=m
+CONFIG_CRYPTO_RMD160=m
+CONFIG_CRYPTO_RMD256=m
+CONFIG_CRYPTO_RMD320=m
+CONFIG_CRYPTO_SHA1=y
+CONFIG_CRYPTO_LIB_SHA256=y
+CONFIG_CRYPTO_SHA256=y
+CONFIG_CRYPTO_SHA512=m
+CONFIG_CRYPTO_SHA3=m
+CONFIG_CRYPTO_SM3=m
+# CONFIG_CRYPTO_STREEBOG is not set
+CONFIG_CRYPTO_TGR192=m
+CONFIG_CRYPTO_WP512=m
+
+#
+# Ciphers
+#
+CONFIG_CRYPTO_LIB_AES=y
+CONFIG_CRYPTO_AES=y
+# CONFIG_CRYPTO_AES_TI is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+CONFIG_CRYPTO_LIB_ARC4=y
+CONFIG_CRYPTO_ARC4=y
+CONFIG_CRYPTO_BLOWFISH=m
+CONFIG_CRYPTO_BLOWFISH_COMMON=m
+CONFIG_CRYPTO_CAMELLIA=m
+CONFIG_CRYPTO_CAST_COMMON=m
+CONFIG_CRYPTO_CAST5=m
+CONFIG_CRYPTO_CAST6=m
+CONFIG_CRYPTO_LIB_DES=y
+CONFIG_CRYPTO_DES=y
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_SALSA20 is not set
+CONFIG_CRYPTO_CHACHA20=m
+# CONFIG_CRYPTO_SEED is not set
+CONFIG_CRYPTO_SERPENT=m
+# CONFIG_CRYPTO_SM4 is not set
+# CONFIG_CRYPTO_TEA is not set
+CONFIG_CRYPTO_TWOFISH=m
+CONFIG_CRYPTO_TWOFISH_COMMON=m
+
+#
+# Compression
+#
+CONFIG_CRYPTO_DEFLATE=y
+CONFIG_CRYPTO_LZO=y
+# CONFIG_CRYPTO_842 is not set
+# CONFIG_CRYPTO_LZ4 is not set
+# CONFIG_CRYPTO_LZ4HC is not set
+CONFIG_CRYPTO_ZSTD=y
+
+#
+# Random Number Generation
+#
+CONFIG_CRYPTO_ANSI_CPRNG=y
+CONFIG_CRYPTO_DRBG_MENU=y
+CONFIG_CRYPTO_DRBG_HMAC=y
+# CONFIG_CRYPTO_DRBG_HASH is not set
+# CONFIG_CRYPTO_DRBG_CTR is not set
+CONFIG_CRYPTO_DRBG=y
+CONFIG_CRYPTO_JITTERENTROPY=y
+# CONFIG_CRYPTO_USER_API_HASH is not set
+# CONFIG_CRYPTO_USER_API_SKCIPHER is not set
+# CONFIG_CRYPTO_USER_API_RNG is not set
+# CONFIG_CRYPTO_USER_API_AEAD is not set
+# CONFIG_CRYPTO_STATS is not set
+CONFIG_CRYPTO_HASH_INFO=y
+CONFIG_CRYPTO_HW=y
+# CONFIG_CRYPTO_DEV_MARVELL_CESA is not set
+CONFIG_CRYPTO_DEV_FSL_CAAM_COMMON=y
+CONFIG_CRYPTO_DEV_FSL_CAAM_CRYPTO_API_DESC=y
+CONFIG_CRYPTO_DEV_FSL_CAAM_AHASH_API_DESC=y
+CONFIG_CRYPTO_DEV_FSL_CAAM_SECVIO=y
+CONFIG_CRYPTO_DEV_FSL_CAAM=y
+# CONFIG_CRYPTO_DEV_FSL_CAAM_DEBUG is not set
+CONFIG_CRYPTO_DEV_FSL_CAAM_JR=y
+CONFIG_CRYPTO_DEV_FSL_CAAM_RINGSIZE=9
+# CONFIG_CRYPTO_DEV_FSL_CAAM_INTC is not set
+CONFIG_CRYPTO_DEV_FSL_CAAM_CRYPTO_API=y
+CONFIG_CRYPTO_DEV_FSL_CAAM_CRYPTO_API_QI=y
+CONFIG_CRYPTO_DEV_FSL_CAAM_AHASH_API=y
+CONFIG_CRYPTO_DEV_FSL_CAAM_PKC_API=y
+CONFIG_CRYPTO_DEV_FSL_CAAM_RNG_API=y
+# CONFIG_CRYPTO_DEV_FSL_CAAM_TK_API is not set
+# CONFIG_CRYPTO_DEV_FSL_CAAM_RNG_TEST is not set
+CONFIG_CRYPTO_DEV_FSL_CAAM_SM=y
+CONFIG_CRYPTO_DEV_FSL_CAAM_SM_SLOTSIZE=7
+CONFIG_CRYPTO_DEV_FSL_CAAM_SM_TEST=m
+CONFIG_CRYPTO_DEV_FSL_CAAM_JR_UIO=y
+CONFIG_CRYPTO_DEV_FSL_DPAA2_CAAM=y
+# CONFIG_CRYPTO_DEV_SAHARA is not set
+# CONFIG_CRYPTO_DEV_EXYNOS_RNG is not set
+# CONFIG_CRYPTO_DEV_S5P is not set
+# CONFIG_CRYPTO_DEV_ATMEL_ECC is not set
+# CONFIG_CRYPTO_DEV_ATMEL_SHA204A is not set
+# CONFIG_CRYPTO_DEV_CCP is not set
+# CONFIG_CRYPTO_DEV_MXS_DCP is not set
+# CONFIG_CAVIUM_CPT is not set
+# CONFIG_CRYPTO_DEV_NITROX_CNN55XX is not set
+# CONFIG_CRYPTO_DEV_CAVIUM_ZIP is not set
+# CONFIG_CRYPTO_DEV_QCE is not set
+# CONFIG_CRYPTO_DEV_QCOM_RNG is not set
+# CONFIG_CRYPTO_DEV_ROCKCHIP is not set
+CONFIG_CRYPTO_DEV_VIRTIO=m
+CONFIG_CRYPTO_DEV_BCM_SPU=m
+# CONFIG_CRYPTO_DEV_SAFEXCEL is not set
+# CONFIG_CRYPTO_DEV_CCREE is not set
+# CONFIG_CRYPTO_DEV_HISI_SEC is not set
+# CONFIG_CRYPTO_DEV_HISI_ZIP is not set
+CONFIG_ASYMMETRIC_KEY_TYPE=y
+CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE=y
+CONFIG_X509_CERTIFICATE_PARSER=y
+# CONFIG_PKCS8_PRIVATE_KEY_PARSER is not set
+CONFIG_PKCS7_MESSAGE_PARSER=y
+
+#
+# Certificates for signature checking
+#
+CONFIG_SYSTEM_TRUSTED_KEYRING=y
+CONFIG_SYSTEM_TRUSTED_KEYS=""
+# CONFIG_SYSTEM_EXTRA_CERTIFICATE is not set
+# CONFIG_SECONDARY_TRUSTED_KEYRING is not set
+# CONFIG_SYSTEM_BLACKLIST_KEYRING is not set
+# end of Certificates for signature checking
+
+CONFIG_BINARY_PRINTF=y
+
+#
+# Library routines
+#
+CONFIG_RAID6_PQ=y
+CONFIG_RAID6_PQ_BENCHMARK=y
+CONFIG_PACKING=y
+CONFIG_BITREVERSE=y
+CONFIG_HAVE_ARCH_BITREVERSE=y
+CONFIG_GENERIC_STRNCPY_FROM_USER=y
+CONFIG_GENERIC_STRNLEN_USER=y
+CONFIG_GENERIC_NET_UTILS=y
+# CONFIG_CORDIC is not set
+CONFIG_RATIONAL=y
+CONFIG_GENERIC_PCI_IOMAP=y
+CONFIG_STMP_DEVICE=y
+CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y
+CONFIG_ARCH_HAS_FAST_MULTIPLIER=y
+CONFIG_INDIRECT_PIO=y
+# CONFIG_CRC_CCITT is not set
+CONFIG_CRC16=y
+CONFIG_CRC_T10DIF=y
+CONFIG_CRC_ITU_T=y
+CONFIG_CRC32=y
+# CONFIG_CRC32_SELFTEST is not set
+CONFIG_CRC32_SLICEBY8=y
+# CONFIG_CRC32_SLICEBY4 is not set
+# CONFIG_CRC32_SARWATE is not set
+# CONFIG_CRC32_BIT is not set
+# CONFIG_CRC64 is not set
+# CONFIG_CRC4 is not set
+CONFIG_CRC7=y
+CONFIG_LIBCRC32C=y
+# CONFIG_CRC8 is not set
+CONFIG_XXHASH=y
+CONFIG_AUDIT_GENERIC=y
+CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y
+CONFIG_AUDIT_COMPAT_GENERIC=y
+# CONFIG_RANDOM32_SELFTEST is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_LZO_COMPRESS=y
+CONFIG_LZO_DECOMPRESS=y
+CONFIG_LZ4_DECOMPRESS=y
+CONFIG_ZSTD_COMPRESS=y
+CONFIG_ZSTD_DECOMPRESS=y
+CONFIG_XZ_DEC=y
+CONFIG_XZ_DEC_X86=y
+CONFIG_XZ_DEC_POWERPC=y
+CONFIG_XZ_DEC_IA64=y
+CONFIG_XZ_DEC_ARM=y
+CONFIG_XZ_DEC_ARMTHUMB=y
+CONFIG_XZ_DEC_SPARC=y
+CONFIG_XZ_DEC_BCJ=y
+# CONFIG_XZ_DEC_TEST is not set
+CONFIG_DECOMPRESS_GZIP=y
+CONFIG_DECOMPRESS_BZIP2=y
+CONFIG_DECOMPRESS_LZMA=y
+CONFIG_DECOMPRESS_XZ=y
+CONFIG_DECOMPRESS_LZO=y
+CONFIG_DECOMPRESS_LZ4=y
+CONFIG_GENERIC_ALLOCATOR=y
+CONFIG_TEXTSEARCH=y
+CONFIG_TEXTSEARCH_KMP=m
+CONFIG_TEXTSEARCH_BM=m
+CONFIG_TEXTSEARCH_FSM=m
+CONFIG_XARRAY_MULTI=y
+CONFIG_ASSOCIATIVE_ARRAY=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT_MAP=y
+CONFIG_HAS_DMA=y
+CONFIG_NEED_SG_DMA_LENGTH=y
+CONFIG_NEED_DMA_MAP_STATE=y
+CONFIG_ARCH_DMA_ADDR_T_64BIT=y
+CONFIG_DMA_DECLARE_COHERENT=y
+CONFIG_ARCH_HAS_SETUP_DMA_OPS=y
+CONFIG_ARCH_HAS_TEARDOWN_DMA_OPS=y
+CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE=y
+CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU=y
+CONFIG_ARCH_HAS_DMA_PREP_COHERENT=y
+CONFIG_ARCH_HAS_DMA_COHERENT_TO_PFN=y
+CONFIG_SWIOTLB=y
+CONFIG_DMA_REMAP=y
+CONFIG_DMA_DIRECT_REMAP=y
+CONFIG_DMA_CMA=y
+
+#
+# Default contiguous memory area size:
+#
+CONFIG_CMA_SIZE_MBYTES=320
+CONFIG_CMA_SIZE_SEL_MBYTES=y
+# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set
+# CONFIG_CMA_SIZE_SEL_MIN is not set
+# CONFIG_CMA_SIZE_SEL_MAX is not set
+CONFIG_CMA_ALIGNMENT=8
+# CONFIG_DMA_API_DEBUG is not set
+CONFIG_SGL_ALLOC=y
+CONFIG_CPU_RMAP=y
+CONFIG_DQL=y
+CONFIG_GLOB=y
+# CONFIG_GLOB_SELFTEST is not set
+CONFIG_NLATTR=y
+CONFIG_CLZ_TAB=y
+CONFIG_IRQ_POLL=y
+CONFIG_MPILIB=y
+CONFIG_DIMLIB=y
+CONFIG_LIBFDT=y
+CONFIG_OID_REGISTRY=y
+CONFIG_UCS2_STRING=y
+CONFIG_HAVE_GENERIC_VDSO=y
+CONFIG_GENERIC_GETTIMEOFDAY=y
+CONFIG_FONT_SUPPORT=y
+# CONFIG_FONTS is not set
+CONFIG_FONT_8x8=y
+CONFIG_FONT_8x16=y
+CONFIG_SG_POOL=y
+CONFIG_SBITMAP=y
+# CONFIG_STRING_SELFTEST is not set
+# end of Library routines
+
+#
+# Kernel hacking
+#
+
+#
+# printk and dmesg options
+#
+CONFIG_PRINTK_TIME=y
+# CONFIG_PRINTK_CALLER is not set
+CONFIG_CONSOLE_LOGLEVEL_DEFAULT=7
+CONFIG_CONSOLE_LOGLEVEL_QUIET=4
+CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4
+# CONFIG_BOOT_PRINTK_DELAY is not set
+# CONFIG_DYNAMIC_DEBUG is not set
+# end of printk and dmesg options
+
+#
+# Compile-time checks and compiler options
+#
+CONFIG_DEBUG_INFO=y
+# CONFIG_DEBUG_INFO_REDUCED is not set
+# CONFIG_DEBUG_INFO_SPLIT is not set
+# CONFIG_DEBUG_INFO_DWARF4 is not set
+# CONFIG_DEBUG_INFO_BTF is not set
+# CONFIG_GDB_SCRIPTS is not set
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=2048
+# CONFIG_STRIP_ASM_SYMS is not set
+# CONFIG_READABLE_ASM is not set
+CONFIG_DEBUG_FS=y
+# CONFIG_HEADERS_INSTALL is not set
+CONFIG_OPTIMIZE_INLINING=y
+# CONFIG_DEBUG_SECTION_MISMATCH is not set
+CONFIG_SECTION_MISMATCH_WARN_ONLY=y
+CONFIG_ARCH_WANT_FRAME_POINTERS=y
+CONFIG_FRAME_POINTER=y
+# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
+# end of Compile-time checks and compiler options
+
+CONFIG_MAGIC_SYSRQ=y
+CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE=0x1
+CONFIG_MAGIC_SYSRQ_SERIAL=y
+CONFIG_DEBUG_KERNEL=y
+CONFIG_DEBUG_MISC=y
+
+#
+# Memory Debugging
+#
+# CONFIG_PAGE_EXTENSION is not set
+# CONFIG_DEBUG_PAGEALLOC is not set
+# CONFIG_PAGE_OWNER is not set
+# CONFIG_PAGE_POISONING is not set
+# CONFIG_DEBUG_PAGE_REF is not set
+# CONFIG_DEBUG_RODATA_TEST is not set
+# CONFIG_DEBUG_OBJECTS is not set
+# CONFIG_DEBUG_SLAB is not set
+CONFIG_HAVE_DEBUG_KMEMLEAK=y
+# CONFIG_DEBUG_KMEMLEAK is not set
+# CONFIG_DEBUG_STACK_USAGE is not set
+# CONFIG_DEBUG_VM is not set
+CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y
+# CONFIG_DEBUG_VIRTUAL is not set
+CONFIG_DEBUG_MEMORY_INIT=y
+# CONFIG_DEBUG_PER_CPU_MAPS is not set
+CONFIG_HAVE_ARCH_KASAN=y
+CONFIG_HAVE_ARCH_KASAN_SW_TAGS=y
+CONFIG_CC_HAS_KASAN_GENERIC=y
+# CONFIG_KASAN is not set
+CONFIG_KASAN_STACK=1
+# end of Memory Debugging
+
+CONFIG_ARCH_HAS_KCOV=y
+CONFIG_CC_HAS_SANCOV_TRACE_PC=y
+# CONFIG_KCOV is not set
+# CONFIG_DEBUG_SHIRQ is not set
+
+#
+# Debug Lockups and Hangs
+#
+# CONFIG_SOFTLOCKUP_DETECTOR is not set
+# CONFIG_DETECT_HUNG_TASK is not set
+# CONFIG_WQ_WATCHDOG is not set
+# end of Debug Lockups and Hangs
+
+# CONFIG_PANIC_ON_OOPS is not set
+CONFIG_PANIC_ON_OOPS_VALUE=0
+CONFIG_PANIC_TIMEOUT=0
+# CONFIG_SCHED_DEBUG is not set
+CONFIG_SCHED_INFO=y
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_SCHED_STACK_END_CHECK is not set
+# CONFIG_DEBUG_TIMEKEEPING is not set
+# CONFIG_DEBUG_PREEMPT is not set
+
+#
+# Lock Debugging (spinlocks, mutexes, etc...)
+#
+CONFIG_LOCK_DEBUGGING_SUPPORT=y
+# CONFIG_PROVE_LOCKING is not set
+# CONFIG_LOCK_STAT is not set
+# CONFIG_DEBUG_RT_MUTEXES is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_WW_MUTEX_SLOWPATH is not set
+# CONFIG_DEBUG_RWSEMS is not set
+# CONFIG_DEBUG_LOCK_ALLOC is not set
+# CONFIG_DEBUG_ATOMIC_SLEEP is not set
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_LOCK_TORTURE_TEST is not set
+# CONFIG_WW_MUTEX_SELFTEST is not set
+# end of Lock Debugging (spinlocks, mutexes, etc...)
+
+CONFIG_STACKTRACE=y
+# CONFIG_WARN_ALL_UNSEEDED_RANDOM is not set
+# CONFIG_DEBUG_KOBJECT is not set
+CONFIG_HAVE_DEBUG_BUGVERBOSE=y
+CONFIG_DEBUG_BUGVERBOSE=y
+# CONFIG_DEBUG_LIST is not set
+# CONFIG_DEBUG_PLIST is not set
+# CONFIG_DEBUG_SG is not set
+# CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_DEBUG_CREDENTIALS is not set
+
+#
+# RCU Debugging
+#
+# CONFIG_RCU_PERF_TEST is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+CONFIG_RCU_CPU_STALL_TIMEOUT=21
+# CONFIG_RCU_TRACE is not set
+# CONFIG_RCU_EQS_DEBUG is not set
+# end of RCU Debugging
+
+# CONFIG_DEBUG_WQ_FORCE_RR_CPU is not set
+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set
+# CONFIG_NOTIFIER_ERROR_INJECTION is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_LATENCYTOP is not set
+CONFIG_NOP_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
+CONFIG_HAVE_C_RECORDMCOUNT=y
+CONFIG_TRACER_MAX_TRACE=y
+CONFIG_TRACE_CLOCK=y
+CONFIG_RING_BUFFER=y
+CONFIG_EVENT_TRACING=y
+CONFIG_CONTEXT_SWITCH_TRACER=y
+CONFIG_TRACING=y
+CONFIG_GENERIC_TRACER=y
+CONFIG_TRACING_SUPPORT=y
+CONFIG_FTRACE=y
+CONFIG_FUNCTION_TRACER=y
+CONFIG_FUNCTION_GRAPH_TRACER=y
+# CONFIG_PREEMPTIRQ_EVENTS is not set
+# CONFIG_IRQSOFF_TRACER is not set
+# CONFIG_PREEMPT_TRACER is not set
+CONFIG_SCHED_TRACER=y
+# CONFIG_HWLAT_TRACER is not set
+CONFIG_FTRACE_SYSCALLS=y
+CONFIG_TRACER_SNAPSHOT=y
+# CONFIG_TRACER_SNAPSHOT_PER_CPU_SWAP is not set
+CONFIG_BRANCH_PROFILE_NONE=y
+# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
+# CONFIG_PROFILE_ALL_BRANCHES is not set
+CONFIG_STACK_TRACER=y
+# CONFIG_BLK_DEV_IO_TRACE is not set
+CONFIG_UPROBE_EVENTS=y
+CONFIG_DYNAMIC_EVENTS=y
+CONFIG_PROBE_EVENTS=y
+CONFIG_DYNAMIC_FTRACE=y
+# CONFIG_FUNCTION_PROFILER is not set
+CONFIG_FTRACE_MCOUNT_RECORD=y
+# CONFIG_FTRACE_STARTUP_TEST is not set
+# CONFIG_HIST_TRIGGERS is not set
+# CONFIG_TRACEPOINT_BENCHMARK is not set
+# CONFIG_RING_BUFFER_BENCHMARK is not set
+# CONFIG_RING_BUFFER_STARTUP_TEST is not set
+# CONFIG_PREEMPTIRQ_DELAY_TEST is not set
+# CONFIG_TRACE_EVAL_MAP_FILE is not set
+CONFIG_RUNTIME_TESTING_MENU=y
+# CONFIG_LKDTM is not set
+# CONFIG_TEST_LIST_SORT is not set
+# CONFIG_TEST_SORT is not set
+# CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_RBTREE_TEST is not set
+# CONFIG_REED_SOLOMON_TEST is not set
+# CONFIG_INTERVAL_TREE_TEST is not set
+# CONFIG_PERCPU_TEST is not set
+# CONFIG_ATOMIC64_SELFTEST is not set
+# CONFIG_TEST_HEXDUMP is not set
+# CONFIG_TEST_STRING_HELPERS is not set
+# CONFIG_TEST_STRSCPY is not set
+# CONFIG_TEST_KSTRTOX is not set
+# CONFIG_TEST_PRINTF is not set
+# CONFIG_TEST_BITMAP is not set
+# CONFIG_TEST_BITFIELD is not set
+# CONFIG_TEST_UUID is not set
+# CONFIG_TEST_XARRAY is not set
+# CONFIG_TEST_OVERFLOW is not set
+# CONFIG_TEST_RHASHTABLE is not set
+# CONFIG_TEST_HASH is not set
+# CONFIG_TEST_IDA is not set
+# CONFIG_TEST_LKM is not set
+# CONFIG_TEST_VMALLOC is not set
+# CONFIG_TEST_USER_COPY is not set
+# CONFIG_TEST_BPF is not set
+# CONFIG_TEST_BLACKHOLE_DEV is not set
+# CONFIG_FIND_BIT_BENCHMARK is not set
+# CONFIG_TEST_FIRMWARE is not set
+# CONFIG_TEST_SYSCTL is not set
+# CONFIG_TEST_UDELAY is not set
+# CONFIG_TEST_STATIC_KEYS is not set
+# CONFIG_TEST_KMOD is not set
+# CONFIG_TEST_MEMCAT_P is not set
+# CONFIG_TEST_STACKINIT is not set
+# CONFIG_TEST_MEMINIT is not set
+CONFIG_MEMTEST=y
+# CONFIG_BUG_ON_DATA_CORRUPTION is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_KGDB is not set
+CONFIG_ARCH_HAS_UBSAN_SANITIZE_ALL=y
+# CONFIG_UBSAN is not set
+CONFIG_UBSAN_ALIGNMENT=y
+CONFIG_ARCH_HAS_DEVMEM_IS_ALLOWED=y
+CONFIG_STRICT_DEVMEM=y
+# CONFIG_IO_STRICT_DEVMEM is not set
+# CONFIG_ARM64_PTDUMP_DEBUGFS is not set
+CONFIG_PID_IN_CONTEXTIDR=y
+# CONFIG_ARM64_RANDOMIZE_TEXT_OFFSET is not set
+# CONFIG_DEBUG_WX is not set
+# CONFIG_DEBUG_ALIGN_RODATA is not set
+# CONFIG_DEBUG_EFI is not set
+# CONFIG_ARM64_RELOC_TEST is not set
+# CONFIG_CORESIGHT is not set
+# end of Kernel hacking
diff --git a/packages/base/any/kernels/5.4-lts/kconfig.mk b/packages/base/any/kernels/5.4-lts/kconfig.mk
new file mode 100644
index 0000000..792b1bb
--- /dev/null
+++ b/packages/base/any/kernels/5.4-lts/kconfig.mk
@@ -0,0 +1,8 @@
+THIS_DIR := $(abspath $(dir $(lastword $(MAKEFILE_LIST))))
+K_MAJOR_VERSION := 5
+K_PATCH_LEVEL := 4
+K_SUB_LEVEL := 47
+K_SUFFIX :=
+K_PATCH_DIR := $(THIS_DIR)/patches
+K_MODSYNCLIST := tools/objtool
+K_MODSYNCKEEP := scripts
diff --git a/packages/base/any/kernels/5.4-lts/patches/0001-add-DTS-for-GFT.patch b/packages/base/any/kernels/5.4-lts/patches/0001-add-DTS-for-GFT.patch
new file mode 100644
index 0000000..0855f12
--- /dev/null
+++ b/packages/base/any/kernels/5.4-lts/patches/0001-add-DTS-for-GFT.patch
@@ -0,0 +1,1294 @@
+From 6deb660293164d2cf87745b2733bd0d1fc1c0fec Mon Sep 17 00:00:00 2001
+From: Wataru Ishida
+Date: Sun, 11 Jul 2021 02:03:57 +0000
+Subject: [PATCH] add DTS for GFT
+
+Signed-off-by: Wataru Ishida
+---
+ arch/arm64/boot/dts/wistron/Makefile | 6 +
+ arch/arm64/boot/dts/wistron/wtp-01-c1-00.dts | 1260 ++++++++++++++++++
+ 2 files changed, 1266 insertions(+)
+ create mode 100644 arch/arm64/boot/dts/wistron/Makefile
+ create mode 100644 arch/arm64/boot/dts/wistron/wtp-01-c1-00.dts
+
+diff --git a/arch/arm64/boot/dts/wistron/Makefile b/arch/arm64/boot/dts/wistron/Makefile
+new file mode 100644
+index 000000000000..13c5fd005e18
+--- /dev/null
++++ b/arch/arm64/boot/dts/wistron/Makefile
+@@ -0,0 +1,6 @@
++# SPDX-License-Identifier: GPL-2.0
++#
++# required for overlay support
++DTC_FLAGS_wtp-01-c1-00 := -@
++
++dtb-$(CONFIG_ARCH_LAYERSCAPE) += wtp-01-c1-00.dtb
+diff --git a/arch/arm64/boot/dts/wistron/wtp-01-c1-00.dts b/arch/arm64/boot/dts/wistron/wtp-01-c1-00.dts
+new file mode 100644
+index 000000000000..5982656e97d3
+--- /dev/null
++++ b/arch/arm64/boot/dts/wistron/wtp-01-c1-00.dts
+@@ -0,0 +1,1260 @@
++/dts-v1/;
++
++/ {
++ compatible = "fsl,ls1028a-rdb\0fsl,ls1028a";
++ interrupt-parent = <0x01>;
++ #address-cells = <0x02>;
++ #size-cells = <0x02>;
++ model = "LS1028A RDB Board";
++
++ psci {
++ status = "okay";
++ method = "smc";
++ compatible = "arm,psci-1.0\0arm,psci-0.2";
++ };
++
++ aliases {
++ rtc1 = "/soc/timer@2810000";
++ crypto = "/soc/crypto@8000000";
++ serial0 = "/soc/serial@21c0500";
++ serial1 = "/soc/serial@21c0600";
++ };
++
++ cpus {
++ #address-cells = <0x01>;
++ #size-cells = <0x00>;
++
++ cpu@0 {
++ device_type = "cpu";
++ compatible = "arm,cortex-a72";
++ reg = <0x00>;
++ enable-method = "psci";
++ clocks = <0x02 0x01 0x00>;
++ next-level-cache = <0x03>;
++ cpu-idle-states = <0x04>;
++ #cooling-cells = <0x02>;
++ phandle = <0x0c>;
++ };
++
++ cpu@1 {
++ device_type = "cpu";
++ compatible = "arm,cortex-a72";
++ reg = <0x01>;
++ enable-method = "psci";
++ clocks = <0x02 0x01 0x00>;
++ next-level-cache = <0x03>;
++ cpu-idle-states = <0x04>;
++ #cooling-cells = <0x02>;
++ phandle = <0x0d>;
++ };
++
++ l2-cache {
++ compatible = "cache";
++ phandle = <0x03>;
++ };
++ };
++
++ idle-states {
++ entry-method = "arm,psci";
++
++ cpu-pw20 {
++ compatible = "arm,idle-state";
++ idle-state-name = "PW20";
++ arm,psci-suspend-param = <0x00>;
++ entry-latency-us = <0x7d0>;
++ exit-latency-us = <0x7d0>;
++ min-residency-us = <0x1770>;
++ phandle = <0x04>;
++ };
++ };
++
++ rtc-clk {
++ compatible = "fixed-clock";
++ #clock-cells = <0x00>;
++ clock-frequency = <0x8000>;
++ clock-output-names = "rtc_clk";
++ phandle = <0x15>;
++ };
++
++ clock-sysclk {
++ compatible = "fixed-clock";
++ #clock-cells = <0x00>;
++ clock-frequency = <0x5f5e100>;
++ clock-output-names = "sysclk";
++ phandle = <0x07>;
++ };
++
++ clock-osc-27m {
++ compatible = "fixed-clock";
++ #clock-cells = <0x00>;
++ clock-frequency = <0x19bfcc0>;
++ clock-output-names = "phy_27m";
++ phandle = <0x05>;
++ };
++
++ clock-controller@f1f0000 {
++ compatible = "fsl,ls1028a-plldig";
++ reg = <0x00 0xf1f0000 0x00 0xffff>;
++ #clock-cells = <0x00>;
++ clocks = <0x05>;
++ phandle = <0x17>;
++ };
++
++ reboot {
++ compatible = "syscon-reboot";
++ regmap = <0x06>;
++ offset = <0xb0>;
++ mask = <0x02>;
++ };
++
++ timer {
++ compatible = "arm,armv8-timer";
++ interrupts = <0x01 0x0d 0x308 0x01 0x0e 0x308 0x01 0x0b 0x308 0x01 0x0a 0x308>;
++ };
++
++ pmu {
++ compatible = "arm,cortex-a72-pmu";
++ interrupts = <0x01 0x07 0x04>;
++ };
++
++ interrupt-controller@6000000 {
++ compatible = "arm,gic-v3";
++ #address-cells = <0x02>;
++ #size-cells = <0x02>;
++ ranges;
++ reg = <0x00 0x6000000 0x00 0x10000 0x00 0x6040000 0x00 0x40000>;
++ #interrupt-cells = <0x03>;
++ interrupt-controller;
++ interrupts = <0x01 0x09 0xf08>;
++ phandle = <0x01>;
++
++ gic-its@6020000 {
++ compatible = "arm,gic-v3-its";
++ msi-controller;
++ reg = <0x00 0x6020000 0x00 0x20000>;
++ phandle = <0x10>;
++ };
++ };
++
++ soc {
++ compatible = "simple-bus";
++ #address-cells = <0x02>;
++ #size-cells = <0x02>;
++ ranges;
++
++ memory-controller@1080000 {
++ compatible = "fsl,qoriq-memory-controller";
++ reg = <0x00 0x1080000 0x00 0x1000>;
++ interrupts = <0x00 0x90 0x04>;
++ big-endian;
++ };
++
++ syscon@1e00000 {
++ compatible = "fsl,ls1028a-dcfg\0syscon";
++ reg = <0x00 0x1e00000 0x00 0x10000>;
++ little-endian;
++ };
++
++ syscon@1e60000 {
++ compatible = "syscon";
++ reg = <0x00 0x1e60000 0x00 0x10000>;
++ little-endian;
++ phandle = <0x06>;
++ };
++
++ syscon@1fc0000 {
++ compatible = "fsl,ls1028a-scfg\0syscon";
++ reg = <0x00 0x1fc0000 0x00 0x10000>;
++ big-endian;
++ };
++
++ clock-controller@1300000 {
++ compatible = "fsl,ls1028a-clockgen";
++ reg = <0x00 0x1300000 0x00 0xa0000>;
++ #clock-cells = <0x02>;
++ clocks = <0x07>;
++ phandle = <0x02>;
++ };
++
++ spi@20c0000 {
++ compatible = "nxp,lx2160a-fspi";
++ #address-cells = <0x01>;
++ #size-cells = <0x00>;
++ reg = <0x00 0x20c0000 0x00 0x10000 0x00 0x20000000 0x00 0x10000000>;
++ reg-names = "fspi_base\0fspi_mmap";
++ interrupts = <0x00 0x19 0x04>;
++ clocks = <0x02 0x04 0x03 0x02 0x04 0x03>;
++ clock-names = "fspi_en\0fspi";
++ status = "okay";
++
++ flash@0 {
++ compatible = "spansion,m25p80";
++ #address-cells = <0x01>;
++ #size-cells = <0x01>;
++ m25p,fast-read;
++ spi-max-frequency = <0x1312d00>;
++ reg = <0x00>;
++ spi-rx-bus-width = <0x08>;
++ spi-tx-bus-width = <0x01>;
++ };
++ };
++
++ i2c@2000000 {
++ compatible = "fsl,vf610-i2c";
++ #address-cells = <0x01>;
++ #size-cells = <0x00>;
++ reg = <0x00 0x2000000 0x00 0x10000>;
++ interrupts = <0x00 0x22 0x04>;
++ clocks = <0x02 0x04 0x03>;
++ status = "okay";
++
++ i2c-mux@70 {
++ compatible = "nxp,pca9548";
++ reg = <0x70>;
++ #address-cells = <0x01>;
++ #size-cells = <0x00>;
++ i2c-mux-idle-disconnect;
++
++ i2c@0 {
++ #address-cells = <0x01>;
++ #size-cells = <0x00>;
++ reg = <0x00>;
++ };
++
++ i2c@1 {
++ #address-cells = <0x01>;
++ #size-cells = <0x00>;
++ reg = <0x01>;
++ };
++
++ i2c@2 {
++ #address-cells = <0x01>;
++ #size-cells = <0x00>;
++ reg = <0x02>;
++ };
++
++ i2c@3 {
++ #address-cells = <0x01>;
++ #size-cells = <0x00>;
++ reg = <0x03>;
++ };
++
++ i2c@4 {
++ #address-cells = <0x01>;
++ #size-cells = <0x00>;
++ reg = <0x04>;
++ };
++
++ i2c@5 {
++ #address-cells = <0x01>;
++ #size-cells = <0x00>;
++ reg = <0x05>;
++ };
++
++ i2c@6 {
++ #address-cells = <0x01>;
++ #size-cells = <0x00>;
++ reg = <0x06>;
++ };
++
++ i2c@7 {
++ #address-cells = <0x01>;
++ #size-cells = <0x00>;
++ reg = <0x07>;
++ };
++ };
++
++ i2c-mux@71 {
++ compatible = "nxp,pca9548";
++ reg = <0x71>;
++ #address-cells = <0x01>;
++ #size-cells = <0x00>;
++ i2c-mux-idle-disconnect;
++
++ i2c@0 {
++ #address-cells = <0x01>;
++ #size-cells = <0x00>;
++ reg = <0x00>;
++ };
++
++ i2c@1 {
++ #address-cells = <0x01>;
++ #size-cells = <0x00>;
++ reg = <0x01>;
++ };
++
++ i2c@2 {
++ #address-cells = <0x01>;
++ #size-cells = <0x00>;
++ reg = <0x02>;
++ };
++
++ i2c@3 {
++ #address-cells = <0x01>;
++ #size-cells = <0x00>;
++ reg = <0x03>;
++ };
++
++ i2c@4 {
++ #address-cells = <0x01>;
++ #size-cells = <0x00>;
++ reg = <0x04>;
++ };
++
++ i2c@5 {
++ #address-cells = <0x01>;
++ #size-cells = <0x00>;
++ reg = <0x05>;
++ };
++
++ i2c@6 {
++ #address-cells = <0x01>;
++ #size-cells = <0x00>;
++ reg = <0x06>;
++ };
++
++ i2c@7 {
++ #address-cells = <0x01>;
++ #size-cells = <0x00>;
++ reg = <0x07>;
++ };
++ };
++
++ i2c-mux@73 {
++ compatible = "nxp,pca9543";
++ reg = <0x73>;
++ #address-cells = <0x01>;
++ #size-cells = <0x00>;
++ i2c-mux-idle-disconnect;
++
++ i2c@0 {
++ #address-cells = <0x01>;
++ #size-cells = <0x00>;
++ reg = <0x00>;
++ };
++
++ i2c@1 {
++ #address-cells = <0x01>;
++ #size-cells = <0x00>;
++ reg = <0x01>;
++ };
++ };
++
++ tmp75@48 {
++ compatible = "ti,tmp75";
++ reg = <0x48>;
++ };
++
++ tmp75@49 {
++ compatible = "ti,tmp75";
++ reg = <0x49>;
++ };
++
++ tmp75@4a {
++ compatible = "ti,tmp75";
++ reg = <0x4a>;
++ };
++
++ temp-sensor@18 {
++ compatible = "national,lm95245";
++ reg = <0x18>;
++ };
++
++ temp-sensor@29 {
++ compatible = "national,lm95245";
++ reg = <0x29>;
++ };
++
++ temp-sensor@4c {
++ compatible = "nxp,sa56004";
++ reg = <0x4c>;
++ vcc-supply = <0x08>;
++ };
++ };
++
++ i2c@2010000 {
++ compatible = "fsl,vf610-i2c";
++ #address-cells = <0x01>;
++ #size-cells = <0x00>;
++ reg = <0x00 0x2010000 0x00 0x10000>;
++ interrupts = <0x00 0x22 0x04>;
++ clocks = <0x02 0x04 0x03>;
++ status = "okay";
++ };
++
++ i2c@2020000 {
++ compatible = "fsl,vf610-i2c";
++ #address-cells = <0x01>;
++ #size-cells = <0x00>;
++ reg = <0x00 0x2020000 0x00 0x10000>;
++ interrupts = <0x00 0x23 0x04>;
++ clocks = <0x02 0x04 0x03>;
++ status = "disabled";
++ };
++
++ i2c@2030000 {
++ compatible = "fsl,vf610-i2c";
++ #address-cells = <0x01>;
++ #size-cells = <0x00>;
++ reg = <0x00 0x2030000 0x00 0x10000>;
++ interrupts = <0x00 0x23 0x04>;
++ clocks = <0x02 0x04 0x03>;
++ status = "disabled";
++ };
++
++ i2c@2040000 {
++ compatible = "fsl,vf610-i2c";
++ #address-cells = <0x01>;
++ #size-cells = <0x00>;
++ reg = <0x00 0x2040000 0x00 0x10000>;
++ interrupts = <0x00 0x4a 0x04>;
++ clocks = <0x02 0x04 0x03>;
++ status = "disabled";
++ };
++
++ i2c@2050000 {
++ compatible = "fsl,vf610-i2c";
++ #address-cells = <0x01>;
++ #size-cells = <0x00>;
++ reg = <0x00 0x2050000 0x00 0x10000>;
++ interrupts = <0x00 0x4a 0x04>;
++ clocks = <0x02 0x04 0x03>;
++ status = "disabled";
++ };
++
++ i2c@2060000 {
++ compatible = "fsl,vf610-i2c";
++ #address-cells = <0x01>;
++ #size-cells = <0x00>;
++ reg = <0x00 0x2060000 0x00 0x10000>;
++ interrupts = <0x00 0x4b 0x04>;
++ clocks = <0x02 0x04 0x03>;
++ status = "disabled";
++ };
++
++ i2c@2070000 {
++ compatible = "fsl,vf610-i2c";
++ #address-cells = <0x01>;
++ #size-cells = <0x00>;
++ reg = <0x00 0x2070000 0x00 0x10000>;
++ interrupts = <0x00 0x4b 0x04>;
++ clocks = <0x02 0x04 0x03>;
++ status = "disabled";
++ };
++
++ spi@2100000 {
++ compatible = "fsl,ls1028a-dspi\0fsl,ls1021a-v1.0-dspi";
++ #address-cells = <0x01>;
++ #size-cells = <0x00>;
++ reg = <0x00 0x2100000 0x00 0x10000>;
++ interrupts = <0x00 0x1a 0x04>;
++ clock-names = "dspi";
++ clocks = <0x02 0x04 0x01>;
++ spi-num-chipselects = <0x04>;
++ little-endian;
++ status = "disabled";
++ };
++
++ spi@2110000 {
++ compatible = "fsl,ls1028a-dspi\0fsl,ls1021a-v1.0-dspi";
++ #address-cells = <0x01>;
++ #size-cells = <0x00>;
++ reg = <0x00 0x2110000 0x00 0x10000>;
++ interrupts = <0x00 0x1a 0x04>;
++ clock-names = "dspi";
++ clocks = <0x02 0x04 0x01>;
++ spi-num-chipselects = <0x04>;
++ little-endian;
++ status = "disabled";
++ };
++
++ spi@2120000 {
++ compatible = "fsl,ls1028a-dspi\0fsl,ls1021a-v1.0-dspi";
++ #address-cells = <0x01>;
++ #size-cells = <0x00>;
++ reg = <0x00 0x2120000 0x00 0x10000>;
++ interrupts = <0x00 0x1a 0x04>;
++ clock-names = "dspi";
++ clocks = <0x02 0x04 0x01>;
++ spi-num-chipselects = <0x03>;
++ little-endian;
++ status = "disabled";
++ };
++
++ mmc@2140000 {
++ iommus = <0x0f 0x03>;
++ compatible = "fsl,ls1028a-esdhc\0fsl,esdhc";
++ reg = <0x00 0x2140000 0x00 0x10000>;
++ interrupts = <0x00 0x1c 0x04>;
++ clock-frequency = <0xbebc200>;
++ clocks = <0x02 0x02 0x01>;
++ voltage-ranges = <0x708 0x708 0xce4 0xce4>;
++ sdhci,auto-cmd12;
++ little-endian;
++ bus-width = <0x04>;
++ status = "disabled";
++ sd-uhs-sdr104;
++ sd-uhs-sdr50;
++ sd-uhs-sdr25;
++ sd-uhs-sdr12;
++ };
++
++ mmc@2150000 {
++ iommus = <0x0f 0x45>;
++ compatible = "fsl,ls1028a-esdhc\0fsl,esdhc";
++ reg = <0x00 0x2150000 0x00 0x10000>;
++ interrupts = <0x00 0x3f 0x04>;
++ clock-frequency = <0xbebc200>;
++ clocks = <0x02 0x02 0x01>;
++ voltage-ranges = <0x708 0x708 0xce4 0xce4>;
++ sdhci,auto-cmd12;
++ broken-cd;
++ little-endian;
++ bus-width = <0x08>;
++ status = "okay";
++ mmc-hs200-1_8v;
++ mmc-hs400-1_8v;
++ };
++
++ can@2180000 {
++ compatible = "fsl,ls1028ar1-flexcan\0fsl,lx2160ar1-flexcan";
++ reg = <0x00 0x2180000 0x00 0x10000>;
++ interrupts = <0x00 0x15 0x04>;
++ clocks = <0x07 0x02 0x04 0x01>;
++ clock-names = "ipg\0per";
++ status = "okay";
++
++ can-transceiver {
++ max-bitrate = <0x4c4b40>;
++ };
++ };
++
++ can@2190000 {
++ compatible = "fsl,ls1028ar1-flexcan\0fsl,lx2160ar1-flexcan";
++ reg = <0x00 0x2190000 0x00 0x10000>;
++ interrupts = <0x00 0x16 0x04>;
++ clocks = <0x07 0x02 0x04 0x01>;
++ clock-names = "ipg\0per";
++ status = "disabled";
++ };
++
++ serial@21c0500 {
++ clock-frequency = <0xbebc200>;
++ compatible = "fsl,ns16550\0ns16550a";
++ reg = <0x00 0x21c0500 0x00 0x100>;
++ interrupts = <0x00 0x20 0x04>;
++ clocks = <0x02 0x04 0x01>;
++ status = "okay";
++ };
++
++ serial@21c0600 {
++ clock-frequency = <0xbebc200>;
++ compatible = "fsl,ns16550\0ns16550a";
++ reg = <0x00 0x21c0600 0x00 0x100>;
++ interrupts = <0x00 0x20 0x04>;
++ clocks = <0x02 0x04 0x01>;
++ status = "okay";
++ };
++
++ serial@2260000 {
++ compatible = "fsl,ls1028a-lpuart";
++ reg = <0x00 0x2260000 0x00 0x1000>;
++ interrupts = <0x00 0xe8 0x04>;
++ clocks = <0x02 0x04 0x01>;
++ clock-names = "ipg";
++ status = "disabled";
++ };
++
++ serial@2270000 {
++ compatible = "fsl,ls1028a-lpuart";
++ reg = <0x00 0x2270000 0x00 0x1000>;
++ interrupts = <0x00 0xe9 0x04>;
++ clocks = <0x02 0x04 0x01>;
++ clock-names = "ipg";
++ status = "disabled";
++ };
++
++ serial@2280000 {
++ compatible = "fsl,ls1028a-lpuart";
++ reg = <0x00 0x2280000 0x00 0x1000>;
++ interrupts = <0x00 0xea 0x04>;
++ clocks = <0x02 0x04 0x01>;
++ clock-names = "ipg";
++ status = "disabled";
++ };
++
++ serial@2290000 {
++ compatible = "fsl,ls1028a-lpuart";
++ reg = <0x00 0x2290000 0x00 0x1000>;
++ interrupts = <0x00 0xeb 0x04>;
++ clocks = <0x02 0x04 0x01>;
++ clock-names = "ipg";
++ status = "disabled";
++ };
++
++ serial@22a0000 {
++ compatible = "fsl,ls1028a-lpuart";
++ reg = <0x00 0x22a0000 0x00 0x1000>;
++ interrupts = <0x00 0xec 0x04>;
++ clocks = <0x02 0x04 0x01>;
++ clock-names = "ipg";
++ status = "disabled";
++ };
++
++ serial@22b0000 {
++ compatible = "fsl,ls1028a-lpuart";
++ reg = <0x00 0x22b0000 0x00 0x1000>;
++ interrupts = <0x00 0xed 0x04>;
++ clocks = <0x02 0x04 0x01>;
++ clock-names = "ipg";
++ status = "disabled";
++ };
++
++ dma-controller@22c0000 {
++ #dma-cells = <0x02>;
++ compatible = "fsl,ls1028a-edma";
++ reg = <0x00 0x22c0000 0x00 0x10000 0x00 0x22d0000 0x00 0x10000 0x00 0x22e0000 0x00 0x10000>;
++ interrupts = <0x00 0x38 0x04 0x00 0x38 0x04>;
++ interrupt-names = "edma-tx\0edma-err";
++ dma-channels = <0x20>;
++ clock-names = "dmamux0\0dmamux1";
++ clocks = <0x02 0x04 0x01 0x02 0x04 0x01>;
++ phandle = <0x09>;
++ };
++
++ gpio@2300000 {
++ compatible = "fsl,ls1028a-gpio\0fsl,qoriq-gpio";
++ reg = <0x00 0x2300000 0x00 0x10000>;
++ interrupts = <0x00 0x24 0x04>;
++ gpio-controller;
++ #gpio-cells = <0x02>;
++ interrupt-controller;
++ #interrupt-cells = <0x02>;
++ little-endian;
++ };
++
++ gpio@2310000 {
++ compatible = "fsl,ls1028a-gpio\0fsl,qoriq-gpio";
++ reg = <0x00 0x2310000 0x00 0x10000>;
++ interrupts = <0x00 0x24 0x04>;
++ gpio-controller;
++ #gpio-cells = <0x02>;
++ interrupt-controller;
++ #interrupt-cells = <0x02>;
++ little-endian;
++ };
++
++ gpio@2320000 {
++ compatible = "fsl,ls1028a-gpio\0fsl,qoriq-gpio";
++ reg = <0x00 0x2320000 0x00 0x10000>;
++ interrupts = <0x00 0x25 0x04>;
++ gpio-controller;
++ #gpio-cells = <0x02>;
++ interrupt-controller;
++ #interrupt-cells = <0x02>;
++ little-endian;
++ };
++
++ usb@3100000 {
++ iommus = <0x0f 0x01>;
++ compatible = "fsl,ls1028a-dwc3\0snps,dwc3";
++ reg = <0x00 0x3100000 0x00 0x10000>;
++ interrupts = <0x00 0x50 0x04>;
++ dr_mode = "host";
++ snps,dis_rxdet_inp3_quirk;
++ snps,quirk-frame-length-adjustment = <0x20>;
++ snps,incr-burst-type-adjustment = <0x01 0x04 0x08 0x10>;
++ dma-coherent;
++ };
++
++ usb@3110000 {
++ iommus = <0x0f 0x02>;
++ compatible = "fsl,ls1028a-dwc3\0snps,dwc3";
++ reg = <0x00 0x3110000 0x00 0x10000>;
++ interrupts = <0x00 0x51 0x04>;
++ dr_mode = "otg";
++ snps,dis_rxdet_inp3_quirk;
++ snps,quirk-frame-length-adjustment = <0x20>;
++ snps,incr-burst-type-adjustment = <0x01 0x04 0x08 0x10>;
++ dma-coherent;
++ };
++
++ sata@3200000 {
++ iommus = <0x0f 0x04>;
++ compatible = "fsl,ls1028a-ahci";
++ reg = <0x00 0x3200000 0x00 0x10000 0x07 0x100520 0x00 0x04>;
++ reg-names = "ahci\0sata-ecc";
++ interrupts = <0x00 0x85 0x04>;
++ clocks = <0x02 0x04 0x01>;
++ status = "okay";
++ };
++
++ iommu@5000000 {
++ compatible = "arm,mmu-500";
++ reg = <0x00 0x5000000 0x00 0x800000>;
++ #global-interrupts = <0x08>;
++ #iommu-cells = <0x01>;
++ stream-match-mask = <0x7c00>;
++ interrupts = <0x00 0x0d 0x04 0x00 0x0e 0x04 0x00 0x0f 0x04 0x00 0x10 0x04 0x00 0xd3 0x04 0x00 0xd4 0x04 0x00 0xd5 0x04 0x00 0xd6 0x04 0x00 0x92 0x04 0x00 0x93 0x04 0x00 0x94 0x04 0x00 0x95 0x04 0x00 0x96 0x04 0x00 0x97 0x04 0x00 0x98 0x04 0x00 0x99 0x04 0x00 0x9a 0x04 0x00 0x9b 0x04 0x00 0x9c 0x04 0x00 0x9d 0x04 0x00 0x9e 0x04 0x00 0x9f 0x04 0x00 0xa0 0x04 0x00 0xa1 0x04 0x00 0xa2 0x04 0x00 0xa3 0x04 0x00 0xa4 0x04 0x00 0xa5 0x04 0x00 0xa6 0x04 0x00 0xa7 0x04 0x00 0xa8 0x04 0x00 0xa9 0x04 0x00 0xaa 0x04 0x00 0xab 0x04 0x00 0xac 0x04 0x00 0xad 0x04 0x00 0xae 0x04 0x00 0xaf 0x04 0x00 0xb0 0x04 0x00 0xb1 0x04 0x00 0xb2 0x04 0x00 0xb3 0x04 0x00 0xb4 0x04 0x00 0xb5 0x04 0x00 0xb6 0x04 0x00 0xb7 0x04 0x00 0xb8 0x04 0x00 0xb9 0x04 0x00 0xba 0x04 0x00 0xbb 0x04 0x00 0xbc 0x04 0x00 0xbd 0x04 0x00 0xbe 0x04 0x00 0xbf 0x04 0x00 0xc0 0x04 0x00 0xc1 0x04 0x00 0xc2 0x04 0x00 0xc3 0x04 0x00 0xc4 0x04 0x00 0xc5 0x04 0x00 0xc6 0x04 0x00 0xc7 0x04 0x00 0xc8 0x04 0x00 0xc9 0x04 0x00 0xca 0x04 0x00 0xcb 0x04 0x00 0xcc 0x04 0x00 0xcd 0x04 0x00 0xce 0x04 0x00 0xcf 0x04 0x00 0xd0 0x04 0x00 0xd1 0x04>;
++ phandle = <0x0f>;
++ };
++
++ crypto@8000000 {
++ compatible = "fsl,sec-v5.0\0fsl,sec-v4.0";
++ fsl,sec-era = <0x0a>;
++ #address-cells = <0x01>;
++ #size-cells = <0x01>;
++ ranges = <0x00 0x00 0x8000000 0x100000>;
++ reg = <0x00 0x8000000 0x00 0x100000>;
++ interrupts = <0x00 0x8b 0x04>;
++ dma-coherent;
++
++ jr@10000 {
++ iommus = <0x0f 0x41>;
++ compatible = "fsl,sec-v5.0-job-ring\0fsl,sec-v4.0-job-ring";
++ reg = <0x10000 0x10000>;
++ interrupts = <0x00 0x8c 0x04>;
++ };
++
++ jr@20000 {
++ iommus = <0x0f 0x42>;
++ compatible = "fsl,sec-v5.0-job-ring\0fsl,sec-v4.0-job-ring";
++ reg = <0x20000 0x10000>;
++ interrupts = <0x00 0x8d 0x04>;
++ };
++
++ jr@30000 {
++ iommus = <0x0f 0x43>;
++ compatible = "fsl,sec-v5.0-job-ring\0fsl,sec-v4.0-job-ring";
++ reg = <0x30000 0x10000>;
++ interrupts = <0x00 0x8e 0x04>;
++ };
++ };
++
++ dma-controller@8380000 {
++ iommus = <0x0f 0x05>;
++ compatible = "fsl,ls1028a-qdma\0fsl,ls1021a-qdma";
++ reg = <0x00 0x8380000 0x00 0x1000 0x00 0x8390000 0x00 0x10000 0x00 0x83a0000 0x00 0x40000>;
++ interrupts = <0x00 0x2b 0x04 0x00 0xfb 0x04 0x00 0xfc 0x04 0x00 0xfd 0x04 0x00 0xfe 0x04>;
++ interrupt-names = "qdma-error\0qdma-queue0\0qdma-queue1\0qdma-queue2\0qdma-queue3";
++ dma-channels = <0x08>;
++ block-number = <0x01>;
++ block-offset = <0x10000>;
++ fsl,dma-queues = <0x02>;
++ status-sizes = <0x40>;
++ queue-sizes = <0x40 0x40>;
++ };
++
++ watchdog@c000000 {
++ compatible = "arm,sp805\0arm,primecell";
++ reg = <0x00 0xc000000 0x00 0x1000>;
++ clocks = <0x02 0x04 0x0f 0x02 0x04 0x0f>;
++ clock-names = "apb_pclk\0wdog_clk";
++ };
++
++ watchdog@c010000 {
++ compatible = "arm,sp805\0arm,primecell";
++ reg = <0x00 0xc010000 0x00 0x1000>;
++ clocks = <0x02 0x04 0x0f 0x02 0x04 0x0f>;
++ clock-names = "apb_pclk\0wdog_clk";
++ };
++
++ gpu@f0c0000 {
++ iommus = <0x0f 0x47>;
++ compatible = "fsl,ls1028a-gpu";
++ reg = <0x00 0xf0c0000 0x00 0x10000 0x00 0x80000000 0x00 0x80000000 0x00 0x00 0x00 0x3000000>;
++ reg-names = "base\0phys_baseaddr\0contiguous_mem";
++ interrupts = <0x00 0xdc 0x04>;
++ };
++
++ audio-controller@f100000 {
++ #sound-dai-cells = <0x00>;
++ compatible = "fsl,vf610-sai";
++ reg = <0x00 0xf100000 0x00 0x10000>;
++ interrupts = <0x00 0x52 0x04>;
++ clocks = <0x02 0x04 0x01 0x02 0x04 0x01 0x02 0x04 0x01 0x02 0x04 0x01 0x02 0x04 0x01>;
++ clock-names = "bus\0mclk0\0mclk1\0mclk2\0mclk3";
++ dma-names = "tx\0rx";
++ dmas = <0x09 0x01 0x04 0x09 0x01 0x03>;
++ status = "disabled";
++ };
++
++ audio-controller@f110000 {
++ #sound-dai-cells = <0x00>;
++ compatible = "fsl,vf610-sai";
++ reg = <0x00 0xf110000 0x00 0x10000>;
++ interrupts = <0x00 0x52 0x04>;
++ clocks = <0x02 0x04 0x01 0x02 0x04 0x01 0x02 0x04 0x01 0x02 0x04 0x01 0x02 0x04 0x01>;
++ clock-names = "bus\0mclk0\0mclk1\0mclk2\0mclk3";
++ dma-names = "tx\0rx";
++ dmas = <0x09 0x01 0x06 0x09 0x01 0x05>;
++ status = "disabled";
++ };
++
++ audio-controller@f130000 {
++ #sound-dai-cells = <0x00>;
++ compatible = "fsl,vf610-sai";
++ reg = <0x00 0xf130000 0x00 0x10000>;
++ interrupts = <0x00 0x53 0x04>;
++ clocks = <0x02 0x04 0x01 0x02 0x04 0x01 0x02 0x04 0x01 0x02 0x04 0x01 0x02 0x04 0x01>;
++ clock-names = "bus\0mclk0\0mclk1\0mclk2\0mclk3";
++ dma-names = "tx\0rx";
++ dmas = <0x09 0x01 0x0a 0x09 0x01 0x09>;
++ status = "okay";
++ };
++
++ tmu@1f00000 {
++ compatible = "fsl,qoriq-tmu";
++ reg = <0x00 0x1f80000 0x00 0x10000>;
++ interrupts = <0x00 0x17 0x04>;
++ fsl,tmu-range = <0xb0000 0xa0026 0x80048 0x70061>;
++ fsl,tmu-calibration = <0x00 0x24 0x01 0x2b 0x02 0x31 0x03 0x38 0x04 0x3f 0x05 0x45 0x06 0x4c 0x07 0x53 0x08 0x59 0x09 0x60 0x0a 0x66 0x0b 0x6d 0x10000 0x1c 0x10001 0x24 0x10002 0x2c 0x10003 0x35 0x10004 0x3d 0x10005 0x45 0x10006 0x4d 0x10007 0x55 0x10008 0x5e 0x10009 0x66 0x1000a 0x6e 0x20000 0x18 0x20001 0x22 0x20002 0x2d 0x20003 0x38 0x20004 0x43 0x20005 0x4d 0x20006 0x58 0x20007 0x63 0x20008 0x6e 0x30000 0x10 0x30001 0x1c 0x30002 0x29 0x30003 0x36 0x30004 0x42 0x30005 0x4f 0x30006 0x5b 0x30007 0x68>;
++ little-endian;
++ #thermal-sensor-cells = <0x01>;
++ phandle = <0x0a>;
++ };
++
++ thermal-zones {
++
++ core-cluster {
++ polling-delay-passive = <0x3e8>;
++ polling-delay = <0x1388>;
++ thermal-sensors = <0x0a 0x00>;
++
++ trips {
++
++ core-cluster-alert {
++ temperature = <0x14c08>;
++ hysteresis = <0x7d0>;
++ type = "passive";
++ phandle = <0x0b>;
++ };
++
++ core-cluster-crit {
++ temperature = <0x17318>;
++ hysteresis = <0x7d0>;
++ type = "critical";
++ };
++ };
++
++ cooling-maps {
++
++ map0 {
++ trip = <0x0b>;
++ cooling-device = <0x0c 0xffffffff 0xffffffff 0x0d 0xffffffff 0xffffffff>;
++ };
++ };
++ };
++
++ ddr-controller {
++ polling-delay-passive = <0x3e8>;
++ polling-delay = <0x1388>;
++ thermal-sensors = <0x0a 0x01>;
++
++ trips {
++
++ ddr-controller-alert {
++ temperature = <0x14c08>;
++ hysteresis = <0x7d0>;
++ type = "passive";
++ phandle = <0x0e>;
++ };
++
++ ddr-controller-crit {
++ temperature = <0x17318>;
++ hysteresis = <0x7d0>;
++ type = "critical";
++ };
++ };
++
++ cooling-maps {
++
++ map0 {
++ trip = <0x0e>;
++ cooling-device = <0x0c 0xffffffff 0xffffffff 0x0d 0xffffffff 0xffffffff>;
++ };
++ };
++ };
++ };
++
++ pcie@3400000 {
++ msi-map = <0x00 0x10 0x07 0x01 0x100 0x10 0x0e 0x01>;
++ compatible = "fsl,ls1028a-pcie";
++ reg = <0x00 0x3400000 0x00 0x100000 0x80 0x00 0x00 0x2000>;
++ reg-names = "regs\0config";
++ interrupts = <0x00 0x6c 0x04 0x00 0x6d 0x04>;
++ interrupt-names = "pme\0aer";
++ #address-cells = <0x03>;
++ #size-cells = <0x02>;
++ device_type = "pci";
++ dma-coherent;
++ iommu-map = <0x00 0x0f 0x07 0x01 0x100 0x0f 0x0e 0x01>;
++ bus-range = <0x00 0xff>;
++ ranges = <0x81000000 0x00 0x00 0x80 0x10000 0x00 0x10000 0x82000000 0x00 0x40000000 0x80 0x40000000 0x00 0x40000000>;
++ msi-parent = <0x10>;
++ #interrupt-cells = <0x01>;
++ interrupt-map-mask = <0x00 0x00 0x00 0x07>;
++ interrupt-map = <0x00 0x00 0x00 0x01 0x01 0x00 0x00 0x00 0x6d 0x04 0x00 0x00 0x00 0x02 0x01 0x00 0x00 0x00 0x6e 0x04 0x00 0x00 0x00 0x03 0x01 0x00 0x00 0x00 0x6f 0x04 0x00 0x00 0x00 0x04 0x01 0x00 0x00 0x00 0x70 0x04>;
++ status = "okay";
++ };
++
++ pcie@3500000 {
++ msi-map = <0x00 0x10 0x08 0x01 0x100 0x10 0x0f 0x01>;
++ compatible = "fsl,ls1028a-pcie";
++ reg = <0x00 0x3500000 0x00 0x100000 0x88 0x00 0x00 0x2000>;
++ reg-names = "regs\0config";
++ interrupts = <0x00 0x71 0x04 0x00 0x72 0x04>;
++ interrupt-names = "pme\0aer";
++ #address-cells = <0x03>;
++ #size-cells = <0x02>;
++ device_type = "pci";
++ dma-coherent;
++ iommu-map = <0x00 0x0f 0x08 0x01 0x100 0x0f 0x0f 0x01>;
++ bus-range = <0x00 0xff>;
++ ranges = <0x81000000 0x00 0x00 0x88 0x10000 0x00 0x10000 0x82000000 0x00 0x40000000 0x88 0x40000000 0x00 0x40000000>;
++ msi-parent = <0x10>;
++ #interrupt-cells = <0x01>;
++ interrupt-map-mask = <0x00 0x00 0x00 0x07>;
++ interrupt-map = <0x00 0x00 0x00 0x01 0x01 0x00 0x00 0x00 0x72 0x04 0x00 0x00 0x00 0x02 0x01 0x00 0x00 0x00 0x73 0x04 0x00 0x00 0x00 0x03 0x01 0x00 0x00 0x00 0x74 0x04 0x00 0x00 0x00 0x04 0x01 0x00 0x00 0x00 0x75 0x04>;
++ status = "okay";
++ };
++
++ pcie@1f0000000 {
++ compatible = "pci-host-ecam-generic";
++ reg = <0x01 0xf0000000 0x00 0x100000>;
++ #address-cells = <0x03>;
++ #size-cells = <0x02>;
++ msi-parent = <0x10>;
++ device_type = "pci";
++ bus-range = <0x00 0x00>;
++ dma-coherent;
++ msi-map = <0x00 0x10 0x20 0x0c>;
++ iommu-map = <0x00 0x0f 0x20 0x0c>;
++ ranges = <0x82000000 0x00 0x00 0x01 0xf8000000 0x00 0x160000 0xc2000000 0x00 0x00 0x01 0xf8160000 0x00 0x70000 0x82000000 0x00 0x00 0x01 0xf81d0000 0x00 0x20000 0xc2000000 0x00 0x00 0x01 0xf81f0000 0x00 0x20000 0x82000000 0x00 0x00 0x01 0xf8210000 0x00 0x20000 0xc2000000 0x00 0x00 0x01 0xf8230000 0x00 0x20000 0x82000000 0x00 0x00 0x01 0xfc000000 0x00 0x400000>;
++
++ ethernet@0,0 {
++ compatible = "fsl,enetc";
++ reg = <0x00 0x00 0x00 0x00 0x00>;
++ status = "disabled";
++ };
++
++ ethernet@0,1 {
++ compatible = "fsl,enetc";
++ reg = <0x100 0x00 0x00 0x00 0x00>;
++ status = "disabled";
++ };
++
++ mdio@0,3 {
++ compatible = "fsl,enetc-mdio";
++ reg = <0x300 0x00 0x00 0x00 0x00>;
++ #address-cells = <0x01>;
++ #size-cells = <0x00>;
++
++ ethernet-phy@0 {
++ reg = <0x00>;
++ };
++
++ ethernet-phy@1 {
++ reg = <0x01>;
++ };
++
++ ethernet-phy@2 {
++ reg = <0x02>;
++ };
++
++ ethernet-phy@3 {
++ reg = <0x03>;
++ };
++
++ ethernet-phy@8 {
++ reg = <0x08>;
++ phandle = <0x11>;
++ };
++
++ ethernet-phy@9 {
++ reg = <0x09>;
++ phandle = <0x12>;
++ };
++
++ ethernet-phy@a {
++ reg = <0x0a>;
++ phandle = <0x13>;
++ };
++ };
++
++ ethernet@0,2 {
++ mac-address = [5e 15 53 3a 2c 8e];
++ compatible = "fsl,enetc";
++ reg = <0x200 0x00 0x00 0x00 0x00>;
++ phandle = <0x14>;
++
++ fixed-link {
++ speed = <0x3e8>;
++ full-duplex;
++ };
++ };
++
++ ethernet@0,4 {
++ compatible = "fsl,enetc-ptp";
++ reg = <0x400 0x00 0x00 0x00 0x00>;
++ clocks = <0x02 0x04 0x00>;
++ little-endian;
++ fsl,extts-fifo;
++ };
++
++ ethernet-switch@0,5 {
++ reg = <0x500 0x00 0x00 0x00 0x00>;
++ interrupts = <0x00 0x5f 0x04>;
++
++ ports {
++ #address-cells = <0x01>;
++ #size-cells = <0x00>;
++
++ port@0 {
++ reg = <0x00>;
++ status = "okay";
++ label = "swp0";
++ phy-handle = <0x11>;
++ phy-mode = "qsgmii";
++ managed = "in-band-status";
++ };
++
++ port@1 {
++ reg = <0x01>;
++ status = "okay";
++ label = "swp1";
++ phy-handle = <0x12>;
++ phy-mode = "qsgmii";
++ managed = "in-band-status";
++ };
++
++ port@2 {
++ reg = <0x02>;
++ status = "okay";
++ label = "swp2";
++ phy-handle = <0x13>;
++ phy-mode = "qsgmii";
++ managed = "in-band-status";
++ };
++
++ port@3 {
++ reg = <0x03>;
++ status = "disabled";
++ label = "swp3";
++ };
++
++ port@4 {
++ reg = <0x04>;
++ ethernet = <0x14>;
++ phy-mode = "internal";
++
++ fixed-link {
++ speed = <0x9c4>;
++ full-duplex;
++ };
++ };
++
++ port@5 {
++ reg = <0x05>;
++ phy-mode = "internal";
++ status = "disabled";
++
++ fixed-link {
++ speed = <0x3e8>;
++ full-duplex;
++ };
++ };
++ };
++ };
++
++ ethernet@0,6 {
++ compatible = "fsl,enetc";
++ reg = <0x600 0x00 0x00 0x00 0x00>;
++ status = "okay";
++
++ fixed-link {
++ speed = <0x3e8>;
++ full-duplex;
++ };
++ };
++ };
++
++ pwm@2800000 {
++ compatible = "fsl,vf610-ftm-pwm";
++ #pwm-cells = <0x03>;
++ reg = <0x00 0x2800000 0x00 0x10000>;
++ clock-names = "ftm_sys\0ftm_ext\0ftm_fix\0ftm_cnt_clk_en";
++ clocks = <0x02 0x04 0x01 0x02 0x04 0x01 0x15 0x02 0x04 0x01>;
++ status = "okay";
++ };
++
++ pwm@2810000 {
++ compatible = "fsl,vf610-ftm-pwm";
++ #pwm-cells = <0x03>;
++ reg = <0x00 0x2810000 0x00 0x10000>;
++ clock-names = "ftm_sys\0ftm_ext\0ftm_fix\0ftm_cnt_clk_en";
++ clocks = <0x02 0x04 0x01 0x02 0x04 0x01 0x15 0x02 0x04 0x01>;
++ status = "disabled";
++ };
++
++ pwm@2820000 {
++ compatible = "fsl,vf610-ftm-pwm";
++ #pwm-cells = <0x03>;
++ reg = <0x00 0x2820000 0x00 0x10000>;
++ clock-names = "ftm_sys\0ftm_ext\0ftm_fix\0ftm_cnt_clk_en";
++ clocks = <0x02 0x04 0x01 0x02 0x04 0x01 0x15 0x02 0x04 0x01>;
++ status = "disabled";
++ };
++
++ pwm@2830000 {
++ compatible = "fsl,vf610-ftm-pwm";
++ #pwm-cells = <0x03>;
++ reg = <0x00 0x2830000 0x00 0x10000>;
++ clock-names = "ftm_sys\0ftm_ext\0ftm_fix\0ftm_cnt_clk_en";
++ clocks = <0x02 0x04 0x01 0x02 0x04 0x01 0x15 0x02 0x04 0x01>;
++ status = "disabled";
++ };
++
++ pwm@2840000 {
++ compatible = "fsl,vf610-ftm-pwm";
++ #pwm-cells = <0x03>;
++ reg = <0x00 0x2840000 0x00 0x10000>;
++ clock-names = "ftm_sys\0ftm_ext\0ftm_fix\0ftm_cnt_clk_en";
++ clocks = <0x02 0x04 0x01 0x02 0x04 0x01 0x15 0x02 0x04 0x01>;
++ status = "disabled";
++ };
++
++ pwm@2850000 {
++ compatible = "fsl,vf610-ftm-pwm";
++ #pwm-cells = <0x03>;
++ reg = <0x00 0x2850000 0x00 0x10000>;
++ clock-names = "ftm_sys\0ftm_ext\0ftm_fix\0ftm_cnt_clk_en";
++ clocks = <0x02 0x04 0x01 0x02 0x04 0x01 0x15 0x02 0x04 0x01>;
++ status = "disabled";
++ };
++
++ pwm@2860000 {
++ compatible = "fsl,vf610-ftm-pwm";
++ #pwm-cells = <0x03>;
++ reg = <0x00 0x2860000 0x00 0x10000>;
++ clock-names = "ftm_sys\0ftm_ext\0ftm_fix\0ftm_cnt_clk_en";
++ clocks = <0x02 0x04 0x01 0x02 0x04 0x01 0x15 0x02 0x04 0x01>;
++ status = "disabled";
++ };
++
++ pwm@2870000 {
++ compatible = "fsl,vf610-ftm-pwm";
++ #pwm-cells = <0x03>;
++ reg = <0x00 0x2870000 0x00 0x10000>;
++ clock-names = "ftm_sys\0ftm_ext\0ftm_fix\0ftm_cnt_clk_en";
++ clocks = <0x02 0x04 0x01 0x02 0x04 0x01 0x15 0x02 0x04 0x01>;
++ status = "disabled";
++ };
++
++ rcpm@1e34040 {
++ compatible = "fsl,ls1028a-rcpm\0fsl,qoriq-rcpm-2.1+";
++ reg = <0x00 0x1e34040 0x00 0x1c>;
++ #fsl,rcpm-wakeup-cells = <0x07>;
++ little-endian;
++ phandle = <0x16>;
++ };
++
++ timer@2800000 {
++ compatible = "fsl,ls1028a-ftm-alarm";
++ reg = <0x00 0x2800000 0x00 0x10000>;
++ fsl,rcpm-wakeup = <0x16 0x00 0x00 0x00 0x00 0x4000 0x00 0x00>;
++ interrupts = <0x00 0x2c 0x04>;
++ status = "disabled";
++ };
++
++ timer@2810000 {
++ compatible = "fsl,ls1028a-ftm-alarm";
++ reg = <0x00 0x2810000 0x00 0x10000>;
++ fsl,rcpm-wakeup = <0x16 0x00 0x00 0x00 0x00 0x4000 0x00 0x00>;
++ interrupts = <0x00 0x2d 0x04>;
++ status = "okay";
++ };
++ };
++
++ firmware {
++
++ optee {
++ compatible = "linaro,optee-tz";
++ method = "smc";
++ };
++ };
++
++ display@f080000 {
++ iommus = <0x0f 0x48>;
++ compatible = "arm,mali-dp500";
++ reg = <0x00 0xf080000 0x00 0x10000>;
++ interrupts = <0x00 0xde 0x04 0x00 0xdf 0x04>;
++ interrupt-names = "DE\0SE";
++ clocks = <0x17 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02>;
++ clock-names = "pxlclk\0mclk\0aclk\0pclk";
++ arm,malidp-output-port-lines = [08 08 08];
++ arm,malidp-arqos-value = <0xd000d000>;
++
++ port {
++
++ endpoint {
++ remote-endpoint = <0x18>;
++ phandle = <0x19>;
++ };
++ };
++ };
++
++ display@f200000 {
++ compatible = "cdn,ls1028a-dp";
++ reg = <0x00 0xf200000 0x00 0xfffff>;
++ interrupts = <0x00 0xdd 0x04>;
++ clocks = <0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x17>;
++ clock-names = "clk_core\0pclk\0sclk\0cclk\0clk_vif\0clk_pxl";
++ lane-mapping = <0x4e>;
++ status = "okay";
++
++ port {
++
++ endpoint {
++ remote-endpoint = <0x19>;
++ phandle = <0x18>;
++ };
++ };
++ };
++
++ chosen {
++ kaslr-seed = <0x00 0x00>;
++ linux,stdout-path = "/soc/serial@21c0500";
++ bootargs = "console=ttyS0,115200 earlycon=uart8250,mmio,0x21c0500 root=PARTUUID=30dd9c9d-04 rw rootwait video=1920x1080-32@60 cma=256M iommu.passthrough=1 arm-smmu.disable_bypass=0";
++ stdout-path = "serial0:115200n8";
++ };
++
++ memory@80000000 {
++ device_type = "memory";
++ reg = <0x00 0x80000000 0x00 0x7be00000 0x20 0x80000000 0x01 0x80000000>;
++ };
++
++ clock-mclk {
++ compatible = "fixed-clock";
++ #clock-cells = <0x00>;
++ clock-frequency = <0x17d7840>;
++ };
++
++ regulator-1p8v {
++ compatible = "regulator-fixed";
++ regulator-name = "1P8V";
++ regulator-min-microvolt = <0x1b7740>;
++ regulator-max-microvolt = <0x1b7740>;
++ regulator-always-on;
++ };
++
++ regulator-sb3v3 {
++ compatible = "regulator-fixed";
++ regulator-name = "3v3_vbus";
++ regulator-min-microvolt = <0x325aa0>;
++ regulator-max-microvolt = <0x325aa0>;
++ regulator-boot-on;
++ regulator-always-on;
++ phandle = <0x08>;
++ };
++};
+--
+2.25.1
+
diff --git a/packages/base/any/kernels/5.4-lts/patches/0001-enetc-remove-printk.patch b/packages/base/any/kernels/5.4-lts/patches/0001-enetc-remove-printk.patch
new file mode 100644
index 0000000..9a6684b
--- /dev/null
+++ b/packages/base/any/kernels/5.4-lts/patches/0001-enetc-remove-printk.patch
@@ -0,0 +1,133 @@
+From 222e05d5a4974f3fafb46c73d0340c383a6dd4b3 Mon Sep 17 00:00:00 2001
+From: Wataru Ishida
+Date: Tue, 7 Sep 2021 03:49:40 +0000
+Subject: [PATCH] enetc: remove printk
+
+Signed-off-by: Wataru Ishida
+---
+ .../freescale/enetc/enetc_chardev_mdio.c | 32 +++++++++----------
+ 1 file changed, 16 insertions(+), 16 deletions(-)
+
+diff --git a/drivers/net/ethernet/freescale/enetc/enetc_chardev_mdio.c b/drivers/net/ethernet/freescale/enetc/enetc_chardev_mdio.c
+index c9fc38c6c1fe..220158c9f3ef 100644
+--- a/drivers/net/ethernet/freescale/enetc/enetc_chardev_mdio.c
++++ b/drivers/net/ethernet/freescale/enetc/enetc_chardev_mdio.c
+@@ -62,7 +62,7 @@ static struct class *enetc_mdio_class = NULL;
+ static int char_mdio_dev_open(struct inode* inode,
+ struct file* file)
+ {
+- printk("open operation invoked \n");
++// printk("open operation invoked \n");
+ return SUCCESS;
+ }
+
+@@ -76,7 +76,7 @@ static int char_mdio_dev_open(struct inode* inode,
+ static int char_mdio_dev_release(struct inode* inode,
+ struct file* file)
+ {
+- printk("close operation invoked \n");
++// printk("close operation invoked \n");
+ return SUCCESS;
+ }
+
+@@ -111,7 +111,7 @@ static long char_mdio_dev_ioctl(struct file* f, u32 cmd, unsigned long arg)
+ switch (cmd)
+ {
+ case ENETC_MDIO_WRITE:
+- printk("in ENETC_MDIO_WRITE \n");
++ //printk("in ENETC_MDIO_WRITE \n");
+
+ mutex_lock(&mdio_demo->mdio_lock);
+ //printk("mdio write start... \n");
+@@ -122,7 +122,7 @@ static long char_mdio_dev_ioctl(struct file* f, u32 cmd, unsigned long arg)
+
+ break;
+ case ENETC_MDIO_READ:
+- printk("in ENETC_MDIO_READ \n");
++ //printk("in ENETC_MDIO_READ \n");
+
+ mutex_lock(&mdio_demo->mdio_lock);
+ //printk("mdio read start... \n");
+@@ -131,13 +131,13 @@ static long char_mdio_dev_ioctl(struct file* f, u32 cmd, unsigned long arg)
+ mutex_unlock(&mdio_demo->mdio_lock);
+ //printk("mutex_unlock \n");
+
+- printk("in ENETC_MDIO_READ read value = %4x \n", local_cf.value);
++ // printk("in ENETC_MDIO_READ read value = %4x \n", local_cf.value);
+ ret = copy_to_user((struct config_mdio*)arg, &local_cf, sizeof(struct config_mdio));
+ //printk(KERN_INFO "ret = %d\n", ret);
+
+ break;
+ case ENETC_MDIO_CONFIG:
+- printk("in ENETC_MDIO_CONFIG \n");
++ // printk("in ENETC_MDIO_CONFIG \n");
+ is_disable_mdio_vsc8504 = local_cf.is_disable_mdio;
+ break;
+ }
+@@ -170,18 +170,18 @@ static __init int mdiodrv_init(void)
+ {
+ int ret,count=1;
+
+- printk("Module Inserted \n");
++ // printk("Module Inserted \n");
+
+ /* Request dynamic allocation of a device major number */
+ if(alloc_chrdev_region (&enetc_mdio_dev, 0, count, MDIO_DEV_NAME) < 0) {
+- printk (KERN_ERR "failed to reserve major/minor range\n");
++// printk (KERN_ERR "failed to reserve major/minor range\n");
+ return -1;
+ }
+
+- printk("ENETC_MDIO_DEV: Got Major %d\n", MAJOR(enetc_mdio_dev));
++// printk("ENETC_MDIO_DEV: Got Major %d\n", MAJOR(enetc_mdio_dev));
+
+ if (!(enetc_mdio_cdev = cdev_alloc ())) {
+- printk (KERN_ERR "cdev_alloc() failed\n");
++// printk (KERN_ERR "cdev_alloc() failed\n");
+ unregister_chrdev_region (enetc_mdio_dev, count);
+ return -1;
+ }
+@@ -191,7 +191,7 @@ static __init int mdiodrv_init(void)
+ /* Connect the majot/mionr number to the cdev */
+ ret=cdev_add(enetc_mdio_cdev,enetc_mdio_dev,count);
+ if( ret < 0 ) {
+- printk("Error registering device driver\n");
++// printk("Error registering device driver\n");
+ cdev_del(enetc_mdio_cdev);
+ unregister_chrdev_region(enetc_mdio_dev, count);
+ return -1;
+@@ -202,10 +202,10 @@ static __init int mdiodrv_init(void)
+ /* Send uevents to udev, So it will create /dev nodes */
+ device_create(enetc_mdio_class, NULL, enetc_mdio_dev, "%s", MDIO_DEV_NAME);
+
+- printk("Successfully created /dev/ENETC_MDIO_DEV\n");
++// printk("Successfully created /dev/ENETC_MDIO_DEV\n");
+
+- printk("\nDevice Registered: %s\n", MDIO_DEV_NAME);
+- printk(KERN_INFO "Major number = %d, Minor number = %d\n", MAJOR(enetc_mdio_dev), MINOR(enetc_mdio_dev));
++// printk("\nDevice Registered: %s\n", MDIO_DEV_NAME);
++// printk(KERN_INFO "Major number = %d, Minor number = %d\n", MAJOR(enetc_mdio_dev), MINOR(enetc_mdio_dev));
+
+ return 0;
+ }
+@@ -218,7 +218,7 @@ static __init int mdiodrv_init(void)
+
+ static __exit void mdiodrv_cleanup(void)
+ {
+- printk("Module Deleted \n");
++// printk("Module Deleted \n");
+ /* Remove the cdev */
+ cdev_del(enetc_mdio_cdev);
+ /* Release the major number */
+@@ -227,7 +227,7 @@ static __exit void mdiodrv_cleanup(void)
+ device_destroy(enetc_mdio_class, enetc_mdio_dev);
+ class_destroy(enetc_mdio_class);
+
+- printk("\n Driver unregistered \n");
++// printk("\n Driver unregistered \n");
+ }
+
+ module_init(mdiodrv_init);
+--
+2.25.1
+
diff --git a/packages/base/any/mgmt/APKG.yml b/packages/base/any/mgmt/APKG.yml
new file mode 100644
index 0000000..18b56ea
--- /dev/null
+++ b/packages/base/any/mgmt/APKG.yml
@@ -0,0 +1,112 @@
+packages:
+ - name: libyang1
+ arch: $ARCH
+ external: $__DIR__/builds/debs/libyang1_$ARCH.deb
+ - name: sysrepo
+ arch: $ARCH
+ external: $__DIR__/builds/debs/sysrepo_$ARCH.deb
+ - name: libtac2
+ arch: $ARCH
+ external: $__DIR__/builds/debs/libtac2_$ARCH.deb
+ - name: libtac2-bin
+ arch: $ARCH
+ external: $__DIR__/builds/debs/libtac2-bin_$ARCH.deb
+ - name: libpam-tacplus
+ arch: $ARCH
+ external: $__DIR__/builds/debs/libpam-tacplus_$ARCH.deb
+ - name: libnss-tacplus
+ arch: $ARCH
+ external: $__DIR__/builds/debs/libnss-tacplus_$ARCH.deb
+ - name: libyang-python
+ arch: $ARCH
+ version: 1.0.0
+ maintainer: goldstone-nos@googlegroups.com
+ summary: libyang python wrapper
+ depends:
+ - libyang1
+ - libffi-dev
+ files:
+ builds/wheels/libyang: /var/lib/goldstone/wheels/libyang
+ after-install: $X1/packages/base/any/mgmt/libyang-python-after-install.sh
+ before-remove: $X1/packages/base/any/mgmt/libyang-python-before-remove.sh
+ - name: sysrepo-python
+ arch: $ARCH
+ version: 1.0.0
+ maintainer: goldstone-nos@googlegroups.com
+ summary: sysrepo python wrapper
+ depends:
+ - sysrepo
+ - libyang-python
+ files:
+ builds/wheels/sysrepo: /var/lib/goldstone/wheels/sysrepo
+ after-install: $X1/packages/base/any/mgmt/sysrepo-python-after-install.sh
+ before-remove: $X1/packages/base/any/mgmt/sysrepo-python-before-remove.sh
+ - name: gsyang
+ arch: all
+ version: 1.0.0
+ maintainer: goldstone-nos@googlegroups.com
+ summary: Goldstone YANG models
+ depends:
+ - sysrepo
+ files:
+ builds/yang: /var/lib/goldstone/yang
+ builds/gs-yang.py: /usr/bin/
+ $X1/packages/base/any/mgmt/builds/units/gs-yang.service: /etc/systemd/system/
+ after-install: $X1/packages/base/any/mgmt/gsyang-after-install.sh
+ before-remove: $X1/packages/base/any/mgmt/gsyang-before-remove.sh
+ - name: gscli
+ arch: $ARCH
+ version: 1.0.0
+ maintainer: goldstone-nos@googlegroups.com
+ summary: Goldstone CLI
+ depends:
+ - sysrepo-python
+ files:
+ builds/wheels/cli: /var/lib/goldstone/wheels/cli
+ builds/wheels/lib: /var/lib/goldstone/wheels/lib
+ after-install: $X1/packages/base/any/mgmt/gscli-after-install.sh
+ before-remove: $X1/packages/base/any/mgmt/gscli-before-remove.sh
+ - name: gssystem
+ arch: $ARCH
+ version: 1.0.0
+ maintainer: goldstone-nos@googlegroups.com
+ summary: Goldstone South System Deamon
+ depends:
+ - sysrepo-python
+ - dbus
+ files:
+ builds/wheels/system: /var/lib/goldstone/wheels/system
+ $X1/packages/base/any/mgmt/builds/units/gs-south-system.service: /etc/systemd/system/
+ $X1/packages/base/any/mgmt/builds/units/gs-south-system-yang.service: /etc/systemd/system/
+ after-install: $X1/packages/base/any/mgmt/gssouth-systemd-after-install.sh
+ before-remove: $X1/packages/base/any/mgmt/gssouth-systemd-before-remove.sh
+ - name: gs-mgmt
+ arch: $ARCH
+ version: 1.0.0
+ maintainer: goldstone-nos@googlegroups.com
+ summary: Goldstone Management Daemons
+ depends:
+ - k3s
+ files:
+ builds/mgmt-$ARCH.tar: /var/lib/rancher/k3s/agent/images/
+ builds/k8s-$ARCH.tar: /var/lib/rancher/k3s/agent/images/
+ builds/manifests: /var/lib/goldstone/k8s
+ $X1/packages/base/any/mgmt/builds/manifests: /var/lib/goldstone/k8s/base
+ $X1/packages/base/any/mgmt/builds/gs-mgmt.py: /usr/bin/
+ $X1/packages/base/any/mgmt/builds/units/gs-mgmt.target: /etc/systemd/system/
+ $X1/packages/base/any/mgmt/builds/units/gs-mgmt-south.target: /etc/systemd/system/
+ $X1/packages/base/any/mgmt/builds/units/gs-mgmt-north.target: /etc/systemd/system/
+ $X1/packages/base/any/mgmt/builds/units/gs-mgmt-xlate.target: /etc/systemd/system/
+ $X1/packages/base/any/mgmt/builds/units/gs-south-gearbox.service: /etc/systemd/system/
+ $X1/packages/base/any/mgmt/builds/units/gs-south-gearbox-yang.service: /etc/systemd/system/
+ $X1/packages/base/any/mgmt/builds/units/gs-south-dpll.service: /etc/systemd/system/
+ $X1/packages/base/any/mgmt/builds/units/gs-south-dpll-yang.service: /etc/systemd/system/
+ $X1/packages/base/any/mgmt/builds/units/gs-south-sonic.service: /etc/systemd/system/
+ $X1/packages/base/any/mgmt/builds/units/gs-south-sonic-yang.service: /etc/systemd/system/
+ $X1/packages/base/any/mgmt/builds/units/gs-south-tai.service: /etc/systemd/system/
+ $X1/packages/base/any/mgmt/builds/units/gs-south-tai-yang.service: /etc/systemd/system/
+ $X1/packages/base/any/mgmt/builds/units/gs-south-onlp.service: /etc/systemd/system/
+ $X1/packages/base/any/mgmt/builds/units/gs-south-onlp-yang.service: /etc/systemd/system/
+ $X1/packages/base/any/mgmt/builds/units/gs-north-notif.service: /etc/systemd/system/
+ after-install: $X1/packages/base/any/mgmt/gsmgmt-after-install.sh
+ before-remove: $X1/packages/base/any/mgmt/gsmgmt-before-remove.sh
diff --git a/packages/base/any/mgmt/Makefile b/packages/base/any/mgmt/Makefile
new file mode 100644
index 0000000..dc1e7b8
--- /dev/null
+++ b/packages/base/any/mgmt/Makefile
@@ -0,0 +1 @@
+include $(ONL)/make/pkg.mk
diff --git a/packages/base/any/mgmt/builds/Makefile b/packages/base/any/mgmt/builds/Makefile
new file mode 100644
index 0000000..42590a5
--- /dev/null
+++ b/packages/base/any/mgmt/builds/Makefile
@@ -0,0 +1,66 @@
+include $(X1)/make/mgmt.mk
+
+TEMPLATE_DIR ?= templates
+
+GS_MGMT_VERSION ?= latest
+
+IMAGE_TAG ?= $(GS_MGMT_VERSION)
+MGMT_BUILDER ?= $(GS_MGMT_IMAGE_REPO)/host-packages:$(IMAGE_TAG)
+YANG_CONTAINER ?= $(GS_MGMT_IMAGE_REPO)/south-onlp:$(IMAGE_TAG)
+IMAGES ?= south-onlp south-tai north-notif
+KUBECTL_IMAGE ?= lachlanevenson/k8s-kubectl:latest # multi-arch image
+
+ifeq ($(ARCH), arm64)
+ IMAGES += south-gearbox south-dpll
+else ifeq ($(ARCH), amd64)
+ IMAGES += south-sonic
+endif
+
+MGMT_IMAGES ?= $(addsuffix :$(IMAGE_TAG),$(addprefix $(GS_MGMT_IMAGE_REPO)/,$(IMAGES)))
+
+.PHONY: wheels debs yang
+
+.DEFAULT_GOAL := all
+
+all: wheels debs yang mgmt-$(ARCH).tar k8s-$(ARCH).tar gs-yang.py manifests
+
+mgmt-$(ARCH).tar: FORCE
+ for image in $(MGMT_IMAGES); do docker pull --platform=linux/$(ARCH) $$image; done
+ docker save $(MGMT_IMAGES) > $@
+
+k8s-$(ARCH).tar: FORCE
+ docker pull --platform=linux/$(ARCH) $(KUBECTL_IMAGE)
+ docker save $(KUBECTL_IMAGE) > $@
+
+host-image:
+ docker pull --platform=linux/$(ARCH) $(MGMT_BUILDER)
+
+yang-image:
+ docker pull --platform=linux/$(ARCH) $(YANG_CONTAINER)
+
+debs: host-image
+ $(RM) -r debs && mkdir debs
+ docker run -v `pwd`/debs:/data -w /data $(MGMT_BUILDER) sh -c "cp /usr/share/debs/libyang/libyang1_*.deb /data/libyang1_$(ARCH).deb"
+ docker run -v `pwd`/debs:/data -w /data $(MGMT_BUILDER) sh -c "cp /usr/share/debs/sysrepo/sysrepo_*.deb /data/sysrepo_$(ARCH).deb"
+ docker run -v `pwd`/debs:/data -w /data $(MGMT_BUILDER) sh -c "cp /usr/share/debs/tacacs/libtac2_*.deb /data/libtac2_$(ARCH).deb"
+ docker run -v `pwd`/debs:/data -w /data $(MGMT_BUILDER) sh -c "cp /usr/share/debs/tacacs/libtac2-bin_*.deb /data/libtac2-bin_$(ARCH).deb"
+ docker run -v `pwd`/debs:/data -w /data $(MGMT_BUILDER) sh -c "cp /usr/share/debs/tacacs/libpam-tacplus_*.deb /data/libpam-tacplus_$(ARCH).deb"
+ docker run -v `pwd`/debs:/data -w /data $(MGMT_BUILDER) sh -c "cp /usr/share/debs/tacacs/libnss-tacplus_*.deb /data/libnss-tacplus_$(ARCH).deb"
+
+wheels: host-image
+ $(RM) -r wheels && mkdir wheels && cd wheels && mkdir libyang sysrepo lib cli system
+ docker run -v `pwd`/wheels:/data -w /data $(MGMT_BUILDER) sh -c "cp /usr/share/wheels/libyang/*.whl /data/libyang"
+ docker run -v `pwd`/wheels:/data -w /data $(MGMT_BUILDER) sh -c "cp /usr/share/wheels/sysrepo/*.whl /data/sysrepo"
+ docker run -v `pwd`/wheels:/data -w /data $(MGMT_BUILDER) sh -c "cp /usr/share/wheels/lib/*.whl /data/lib"
+ docker run -v `pwd`/wheels:/data -w /data $(MGMT_BUILDER) sh -c "cp /usr/share/wheels/cli/*.whl /data/cli"
+ docker run -v `pwd`/wheels:/data -w /data $(MGMT_BUILDER) sh -c "cp /usr/share/wheels/system/*.whl /data/system"
+
+yang: yang-image
+ $(RM) -r yang && mkdir yang
+ docker run --rm -u `id -u`:`id -g` -v `pwd`:/data -w /data --rm $(YANG_CONTAINER) sh -c "cp -r /var/lib/goldstone/yang ."
+
+gs-yang.py: yang-image
+ $(RM) -r $@
+ docker run --rm -u `id -u`:`id -g` -v `pwd`:/data -w /data --rm $(YANG_CONTAINER) sh -c "cp /usr/local/bin/gs-yang.py ."
+
+FORCE:
diff --git a/packages/base/any/mgmt/builds/gs-mgmt.py b/packages/base/any/mgmt/builds/gs-mgmt.py
new file mode 100755
index 0000000..171cb34
--- /dev/null
+++ b/packages/base/any/mgmt/builds/gs-mgmt.py
@@ -0,0 +1,97 @@
+#!/usr/bin/env python
+
+import subprocess
+import sys
+import time
+import argparse
+from pathlib import Path
+
+APPS = [
+ "north-notif",
+ "north-netconf",
+ "north-snmp",
+ "south-sonic",
+ "south-gearbox",
+ "south-dpll",
+ "south-tai",
+ "south-onlp",
+ "xlate-oc",
+]
+
+
+def stop(app, manifest_dir, kustomize):
+ pod = subprocess.run(
+ f"kubectl get pod -l app={app} -o jsonpath='{{.items[0].metadata.name}}' 2>/dev/null || echo 'dummy'",
+ capture_output=True,
+ check=True,
+ shell=True,
+ )
+ pod = pod.stdout.decode()
+ flag = "-k" if kustomize else "-f"
+ subprocess.run(
+ f"kubectl delete --ignore-not-found {flag} {manifest_dir} -l gs-mgmt={app}",
+ check=True,
+ shell=True,
+ )
+ subprocess.run(
+ f"kubectl delete --ignore-not-found pods/{pod}", check=True, shell=True
+ )
+
+
+def start(app, manifest_dir, kustomize):
+ flag = "-k" if kustomize else "-f"
+ subprocess.run(
+ f"kubectl apply {flag} {manifest_dir} -l gs-mgmt={app}",
+ shell=True,
+ check=True,
+ )
+
+ for _ in range(5):
+ proc = subprocess.run(
+ f"kubectl get pod -l app={app} -o jsonpath='{{.items[0].metadata.name}}'",
+ capture_output=True,
+ shell=True,
+ )
+ if proc.returncode == 0:
+ pod = proc.stdout.decode()
+ break
+ else:
+ print("timeout.")
+ stop(app)
+ sys.exit(1)
+
+ subprocess.run(
+ f"kubectl wait --timeout=5m --for=condition=ready pod/{pod}",
+ shell=True,
+ check=True,
+ )
+
+
+def usage():
+ return f"usage: {sys.argv[0]} {{start|stop}} "
+
+
+def main(action, app, manifest_dir):
+ if not Path(manifest_dir).exists():
+ print(f"{manifest_dir} not found")
+ sys.exit(1)
+
+ kustomize = len(list(Path(manifest_dir).glob("kustomization.yaml"))) > 0
+
+ if action == "start":
+ start(app, manifest_dir, kustomize)
+ elif action == "stop":
+ stop(app, manifest_dir, kustomize)
+ else:
+ print(usage())
+ sys.exit(1)
+
+
+if __name__ == "__main__":
+ parser = argparse.ArgumentParser(description="Goldstone Management Launcher")
+ parser.add_argument("action", choices=["stop", "start"])
+ parser.add_argument("app", choices=APPS)
+ parser.add_argument("--manifest-dir", default="/var/lib/goldstone/k8s")
+
+ args = parser.parse_args()
+ main(args.action, args.app, args.manifest_dir)
diff --git a/packages/base/any/mgmt/builds/manifests/kustomization.yaml b/packages/base/any/mgmt/builds/manifests/kustomization.yaml
new file mode 100644
index 0000000..62be055
--- /dev/null
+++ b/packages/base/any/mgmt/builds/manifests/kustomization.yaml
@@ -0,0 +1,7 @@
+resources:
+- north-notif.yaml
+- south-gearbox.yaml
+- south-dpll.yaml
+- south-onlp.yaml
+- south-sonic.yaml
+- south-tai.yaml
diff --git a/packages/base/any/mgmt/builds/manifests/north-notif.yaml b/packages/base/any/mgmt/builds/manifests/north-notif.yaml
new file mode 100644
index 0000000..5255f40
--- /dev/null
+++ b/packages/base/any/mgmt/builds/manifests/north-notif.yaml
@@ -0,0 +1,49 @@
+apiVersion: apps/v1
+kind: DaemonSet
+metadata:
+ name: north-notif
+ labels:
+ app: gs-mgmt
+ gs-mgmt: north-notif
+spec:
+ selector:
+ matchLabels:
+ app: north-notif
+ template:
+ metadata:
+ labels:
+ app: north-notif
+ spec:
+ containers:
+ - name: notif
+ image: ghcr.io/oopt-goldstone/mgmt/north-notif:latest
+ imagePullPolicy: IfNotPresent
+ command: ['gsnorthd-notif']
+ args: ['--verbose']
+ volumeMounts:
+ - name: shm
+ mountPath: /dev/shm
+ - name: sysrepo
+ mountPath: /var/lib/sysrepo
+ livenessProbe:
+ httpGet:
+ path: /healthz
+ port: liveness-port
+ failureThreshold: 2
+ periodSeconds: 10
+ startupProbe:
+ httpGet:
+ path: /healthz
+ port: liveness-port
+ failureThreshold: 120
+ periodSeconds: 1
+ ports:
+ - name: liveness-port
+ containerPort: 8080
+ volumes:
+ - name: shm
+ hostPath:
+ path: /dev/shm
+ - name: sysrepo
+ hostPath:
+ path: /var/lib/sysrepo
diff --git a/packages/base/any/mgmt/builds/manifests/south-dpll.yaml b/packages/base/any/mgmt/builds/manifests/south-dpll.yaml
new file mode 100644
index 0000000..bf16a2c
--- /dev/null
+++ b/packages/base/any/mgmt/builds/manifests/south-dpll.yaml
@@ -0,0 +1,57 @@
+apiVersion: apps/v1
+kind: DaemonSet
+metadata:
+ name: south-dpll
+ labels:
+ app: gs-mgmt
+ gs-mgmt: south-dpll
+spec:
+ selector:
+ matchLabels:
+ app: south-dpll
+ template:
+ metadata:
+ labels:
+ app: south-dpll
+ spec:
+ containers:
+ - name: dpll
+ image: ghcr.io/oopt-goldstone/mgmt/south-dpll:latest
+ imagePullPolicy: IfNotPresent
+ command: ['gssouthd-dpll']
+ args: ['--taish-server', "$(TAI_DPLL_SERVICE_HOST):$(TAI_DPLL_SERVICE_PORT)", "--verbose", "$(PLATFORM_FILE)"]
+ env:
+ - name: PLATFORM_FILE
+ value: /current/platform.json
+ volumeMounts:
+ - name: shm
+ mountPath: /dev/shm
+ - name: sysrepo
+ mountPath: /var/lib/sysrepo
+ - name: current
+ mountPath: /current
+ livenessProbe:
+ httpGet:
+ path: /healthz
+ port: liveness-port
+ failureThreshold: 2
+ periodSeconds: 10
+ startupProbe:
+ httpGet:
+ path: /healthz
+ port: liveness-port
+ failureThreshold: 30
+ periodSeconds: 10
+ ports:
+ - name: liveness-port
+ containerPort: 8080
+ volumes:
+ - name: shm
+ hostPath:
+ path: /dev/shm
+ - name: sysrepo
+ hostPath:
+ path: /var/lib/sysrepo
+ - name: current
+ hostPath:
+ path: /var/lib/goldstone/device/current
diff --git a/packages/base/any/mgmt/builds/manifests/south-gearbox.yaml b/packages/base/any/mgmt/builds/manifests/south-gearbox.yaml
new file mode 100644
index 0000000..872a89a
--- /dev/null
+++ b/packages/base/any/mgmt/builds/manifests/south-gearbox.yaml
@@ -0,0 +1,57 @@
+apiVersion: apps/v1
+kind: DaemonSet
+metadata:
+ name: south-gearbox
+ labels:
+ app: gs-mgmt
+ gs-mgmt: south-gearbox
+spec:
+ selector:
+ matchLabels:
+ app: south-gearbox
+ template:
+ metadata:
+ labels:
+ app: south-gearbox
+ spec:
+ containers:
+ - name: gearbox
+ image: ghcr.io/oopt-goldstone/mgmt/south-gearbox:latest
+ imagePullPolicy: IfNotPresent
+ command: ['gssouthd-gearbox']
+ args: ['--taish-server', "$(TAI_GEARBOX_SERVICE_HOST):$(TAI_GEARBOX_SERVICE_PORT)", "--verbose", "$(PLATFORM_FILE)"]
+ env:
+ - name: PLATFORM_FILE
+ value: /current/platform.json
+ volumeMounts:
+ - name: shm
+ mountPath: /dev/shm
+ - name: sysrepo
+ mountPath: /var/lib/sysrepo
+ - name: current
+ mountPath: /current
+ livenessProbe:
+ httpGet:
+ path: /healthz
+ port: liveness-port
+ failureThreshold: 2
+ periodSeconds: 10
+ startupProbe:
+ httpGet:
+ path: /healthz
+ port: liveness-port
+ failureThreshold: 30
+ periodSeconds: 10
+ ports:
+ - name: liveness-port
+ containerPort: 8080
+ volumes:
+ - name: shm
+ hostPath:
+ path: /dev/shm
+ - name: sysrepo
+ hostPath:
+ path: /var/lib/sysrepo
+ - name: current
+ hostPath:
+ path: /var/lib/goldstone/device/current
diff --git a/packages/base/any/mgmt/builds/manifests/south-onlp.yaml b/packages/base/any/mgmt/builds/manifests/south-onlp.yaml
new file mode 100644
index 0000000..d700641
--- /dev/null
+++ b/packages/base/any/mgmt/builds/manifests/south-onlp.yaml
@@ -0,0 +1,69 @@
+apiVersion: apps/v1
+kind: DaemonSet
+metadata:
+ name: south-onlp
+ labels:
+ app: gs-mgmt
+ gs-mgmt: south-onlp
+spec:
+ selector:
+ matchLabels:
+ app: south-onlp
+ template:
+ metadata:
+ labels:
+ app: south-onlp
+ spec:
+ containers:
+ - name: onlp
+ image: ghcr.io/oopt-goldstone/mgmt/south-onlp:latest
+ imagePullPolicy: IfNotPresent
+ command: ['gssouthd-onlp']
+ args: ['--verbose']
+ env:
+ - name: PYTHONPATH
+ value: /usr/lib/python3/dist-packages
+ volumeMounts:
+ - name: shm
+ mountPath: /dev/shm
+ - name: sysrepo
+ mountPath: /var/lib/sysrepo
+ - name: onl
+ mountPath: /etc/onl/
+ - name: sys
+ mountPath: /sys
+ securityContext:
+ privileged: true
+ capabilities:
+ add:
+ - IPC_OWNER
+ - IPC_LOCK
+ livenessProbe:
+ httpGet:
+ path: /healthz
+ port: liveness-port
+ failureThreshold: 5
+ periodSeconds: 10
+ timeoutSeconds: 5
+ startupProbe:
+ httpGet:
+ path: /healthz
+ port: liveness-port
+ failureThreshold: 120
+ periodSeconds: 1
+ ports:
+ - name: liveness-port
+ containerPort: 8080
+ volumes:
+ - name: shm
+ hostPath:
+ path: /dev/shm
+ - name: sysrepo
+ hostPath:
+ path: /var/lib/sysrepo
+ - name: onl
+ hostPath:
+ path: /etc/onl
+ - name: sys
+ hostPath:
+ path: /sys
diff --git a/packages/base/any/mgmt/builds/manifests/south-sonic.yaml b/packages/base/any/mgmt/builds/manifests/south-sonic.yaml
new file mode 100644
index 0000000..fbd9754
--- /dev/null
+++ b/packages/base/any/mgmt/builds/manifests/south-sonic.yaml
@@ -0,0 +1,116 @@
+apiVersion: v1
+kind: ServiceAccount
+metadata:
+ name: south-sonic-svc
+ labels:
+ gs-mgmt: south-sonic
+
+---
+
+apiVersion: rbac.authorization.k8s.io/v1
+kind: ClusterRoleBinding
+metadata:
+ name: south-sonic-svc
+ labels:
+ gs-mgmt: south-sonic
+roleRef:
+ kind: ClusterRole
+ name: usonic-manage
+ apiGroup: rbac.authorization.k8s.io
+subjects:
+ - kind: ServiceAccount
+ name: south-sonic-svc
+ namespace: default
+
+---
+
+apiVersion: rbac.authorization.k8s.io/v1
+kind: ClusterRole
+metadata:
+ name: usonic-manage
+ labels:
+ gs-mgmt: south-sonic
+rules:
+- apiGroups: [""]
+ resources: ["configmaps"]
+ verbs: ["get","update","patch"]
+- apiGroups: [""]
+ resources: ["pods"]
+ verbs: ["get","list","watch"]
+- apiGroups: [""]
+ resources: ["pods/exec"]
+ verbs: ["get","list","watch"]
+- apiGroups: ["extensions", "apps"]
+ resources: ["deployments"]
+ verbs: ["*"]
+- apiGroups: ["batch", "extensions"]
+ resources: ["jobs"]
+ verbs: ["*"]
+
+---
+
+apiVersion: apps/v1
+kind: DaemonSet
+metadata:
+ name: south-sonic
+ labels:
+ app: gs-mgmt
+ gs-mgmt: south-sonic
+spec:
+ selector:
+ matchLabels:
+ app: south-sonic
+ template:
+ metadata:
+ labels:
+ app: south-sonic
+ spec:
+ serviceAccountName: south-sonic-svc
+ containers:
+ - name: sonic
+ image: ghcr.io/oopt-goldstone/mgmt/south-sonic:latest
+ imagePullPolicy: IfNotPresent
+ command: ['gssouthd-sonic']
+ args: ['--verbose', "$(PLATFORM_FILE)"]
+ env:
+ - name: USONIC_TEMPLATE_DIR
+ value: /var/lib/current/usonic
+ - name: PLATFORM_FILE
+ value: /var/lib/current/platform.json
+ volumeMounts:
+ - name: shm
+ mountPath: /dev/shm
+ - name: sysrepo
+ mountPath: /var/lib/sysrepo
+ - name: sonic-db-config
+ mountPath: /var/run/redis/sonic-db/
+ - name: current
+ mountPath: /var/lib/current
+ livenessProbe:
+ httpGet:
+ path: /healthz
+ port: liveness-port
+ failureThreshold: 2
+ periodSeconds: 10
+ startupProbe:
+ httpGet:
+ path: /healthz
+ port: liveness-port
+ failureThreshold: 120
+ periodSeconds: 1
+ ports:
+ - name: liveness-port
+ containerPort: 8080
+ volumes:
+ - name: shm
+ hostPath:
+ path: /dev/shm
+ - name: sysrepo
+ hostPath:
+ path: /var/lib/sysrepo
+ - name: sonic-db-config
+ configMap:
+ name: sonic-db-config
+ - name: current
+ hostPath:
+ path: /var/lib/goldstone/device/current
diff --git a/packages/base/any/mgmt/builds/manifests/south-tai.yaml b/packages/base/any/mgmt/builds/manifests/south-tai.yaml
new file mode 100644
index 0000000..8c0c7a4
--- /dev/null
+++ b/packages/base/any/mgmt/builds/manifests/south-tai.yaml
@@ -0,0 +1,87 @@
+apiVersion: v1
+kind: ServiceAccount
+metadata:
+ name: south-tai
+ labels:
+ gs-mgmt: south-tai
+
+---
+apiVersion: rbac.authorization.k8s.io/v1
+kind: ClusterRoleBinding
+metadata:
+ name: south-tai
+ labels:
+ gs-mgmt: south-tai
+roleRef:
+ apiGroup: rbac.authorization.k8s.io
+ kind: ClusterRole
+ name: view
+subjects:
+- kind: ServiceAccount
+ name: south-tai
+ namespace: default
+
+---
+apiVersion: apps/v1
+kind: DaemonSet
+metadata:
+ name: south-tai
+ labels:
+ app: gs-mgmt
+ gs-mgmt: south-tai
+spec:
+ selector:
+ matchLabels:
+ app: south-tai
+ template:
+ metadata:
+ labels:
+ app: south-tai
+ spec:
+ serviceAccountName: south-tai
+ initContainers:
+ - name: wait-onlp
+ image: docker.io/lachlanevenson/k8s-kubectl:latest
+ imagePullPolicy: IfNotPresent
+ command: ['sh', '-c', "kubectl wait --for=condition=ready pods/$(kubectl get pods -l app=south-onlp -o jsonpath='{.items[0].metadata.name}')"]
+ containers:
+ - name: tai
+ image: ghcr.io/oopt-goldstone/mgmt/south-tai:latest
+ imagePullPolicy: IfNotPresent
+ command: ['gssouthd-tai']
+ args: ['--taish-server', "$(TAISH_SERVER_SERVICE_HOST):$(TAISH_SERVER_SERVICE_PORT)", "--verbose", "$(PLATFORM_FILE)"]
+ env:
+ - name: PLATFORM_FILE
+ value: /current/platform.json
+ volumeMounts:
+ - name: shm
+ mountPath: /dev/shm
+ - name: sysrepo
+ mountPath: /var/lib/sysrepo
+ - name: current
+ mountPath: /current
+ livenessProbe:
+ httpGet:
+ path: /healthz
+ port: liveness-port
+ failureThreshold: 2
+ periodSeconds: 10
+ startupProbe:
+ httpGet:
+ path: /healthz
+ port: liveness-port
+ failureThreshold: 120
+ periodSeconds: 1
+ ports:
+ - name: liveness-port
+ containerPort: 8080
+ volumes:
+ - name: shm
+ hostPath:
+ path: /dev/shm
+ - name: sysrepo
+ hostPath:
+ path: /var/lib/sysrepo
+ - name: current
+ hostPath:
+ path: /var/lib/goldstone/device/current
diff --git a/packages/base/any/mgmt/builds/units/gs-mgmt-north.target b/packages/base/any/mgmt/builds/units/gs-mgmt-north.target
new file mode 100644
index 0000000..9aa8616
--- /dev/null
+++ b/packages/base/any/mgmt/builds/units/gs-mgmt-north.target
@@ -0,0 +1,5 @@
+[Unit]
+Description=Goldstone Management North Daemons
+
+[Install]
+WantedBy=gs-mgmt.target
diff --git a/packages/base/any/mgmt/builds/units/gs-mgmt-south.target b/packages/base/any/mgmt/builds/units/gs-mgmt-south.target
new file mode 100644
index 0000000..d902a9b
--- /dev/null
+++ b/packages/base/any/mgmt/builds/units/gs-mgmt-south.target
@@ -0,0 +1,5 @@
+[Unit]
+Description=Goldstone Management South Daemons
+
+[Install]
+WantedBy=gs-mgmt.target
diff --git a/packages/base/any/mgmt/builds/units/gs-mgmt-xlate.target b/packages/base/any/mgmt/builds/units/gs-mgmt-xlate.target
new file mode 100644
index 0000000..092748c
--- /dev/null
+++ b/packages/base/any/mgmt/builds/units/gs-mgmt-xlate.target
@@ -0,0 +1,5 @@
+[Unit]
+Description=Goldstone Management Translate Daemons
+
+[Install]
+WantedBy=gs-mgmt.target
diff --git a/packages/base/any/mgmt/builds/units/gs-mgmt.target b/packages/base/any/mgmt/builds/units/gs-mgmt.target
new file mode 100644
index 0000000..03f0e70
--- /dev/null
+++ b/packages/base/any/mgmt/builds/units/gs-mgmt.target
@@ -0,0 +1,6 @@
+[Unit]
+Description=Goldstone Management Daemons
+Before=systemd-user-sessions.service
+
+[Install]
+WantedBy=multi-user.target
diff --git a/packages/base/any/mgmt/builds/units/gs-north-notif.service b/packages/base/any/mgmt/builds/units/gs-north-notif.service
new file mode 100644
index 0000000..fce66d2
--- /dev/null
+++ b/packages/base/any/mgmt/builds/units/gs-north-notif.service
@@ -0,0 +1,16 @@
+[Unit]
+Description=Goldstone Management North Notification Daemon
+After=gs-yang.service gs-mgmt-south.target
+Requires=gs-yang.service
+PartOf=gs-mgmt-north.target gs-mgmt.target
+
+[Service]
+Type=oneshot
+ExecStartPre=/bin/sh -c 'while [ true ]; do ( kubectl get nodes | grep " Ready" ) && exit 0; sleep 1; done'
+ExecStart=/usr/bin/gs-mgmt.py start north-notif
+ExecStop=-/usr/bin/gs-mgmt.py stop north-notif
+RemainAfterExit=true
+StandardOutput=journal
+
+[Install]
+WantedBy=gs-mgmt-north.target
diff --git a/packages/base/any/mgmt/builds/units/gs-south-dpll-yang.service b/packages/base/any/mgmt/builds/units/gs-south-dpll-yang.service
new file mode 100644
index 0000000..c24ce3c
--- /dev/null
+++ b/packages/base/any/mgmt/builds/units/gs-south-dpll-yang.service
@@ -0,0 +1,12 @@
+[Unit]
+Description=Goldstone Management South DPLL Daemon YANG model setup
+Before=gs-yang.service
+
+[Service]
+Type=oneshot
+ExecStart=/usr/bin/gs-yang.py --install south-dpll
+RemainAfterExit=true
+StandardOutput=journal
+
+[Install]
+WantedBy=multi-user.target
diff --git a/packages/base/any/mgmt/builds/units/gs-south-dpll.service b/packages/base/any/mgmt/builds/units/gs-south-dpll.service
new file mode 100644
index 0000000..32de864
--- /dev/null
+++ b/packages/base/any/mgmt/builds/units/gs-south-dpll.service
@@ -0,0 +1,17 @@
+[Unit]
+Description=Goldstone Management South DPLL Daemon
+After=gs-yang.service tai-dpll.service
+Requires=gs-yang.service tai-dpll.service
+PartOf=gs-mgmt-south.target gs-mgmt.target
+
+[Service]
+Type=oneshot
+ExecStartPre=/bin/sh -c 'while [ true ]; do ( kubectl get nodes | grep " Ready" ) && exit 0; sleep 1; done'
+ExecStart=/usr/bin/gs-mgmt.py start south-dpll
+ExecStop=-/usr/bin/gs-mgmt.py stop south-dpll
+RemainAfterExit=true
+StandardOutput=journal
+
+[Install]
+WantedBy=gs-mgmt-south.target
+Also=gs-south-dpll-yang.service
diff --git a/packages/base/any/mgmt/builds/units/gs-south-gearbox-yang.service b/packages/base/any/mgmt/builds/units/gs-south-gearbox-yang.service
new file mode 100644
index 0000000..8b15eb5
--- /dev/null
+++ b/packages/base/any/mgmt/builds/units/gs-south-gearbox-yang.service
@@ -0,0 +1,12 @@
+[Unit]
+Description=Goldstone Management South Gearbox Daemon YANG model setup
+Before=gs-yang.service
+
+[Service]
+Type=oneshot
+ExecStart=/usr/bin/gs-yang.py --install south-gearbox
+RemainAfterExit=true
+StandardOutput=journal
+
+[Install]
+WantedBy=multi-user.target
diff --git a/packages/base/any/mgmt/builds/units/gs-south-gearbox.service b/packages/base/any/mgmt/builds/units/gs-south-gearbox.service
new file mode 100644
index 0000000..2ccb6a0
--- /dev/null
+++ b/packages/base/any/mgmt/builds/units/gs-south-gearbox.service
@@ -0,0 +1,17 @@
+[Unit]
+Description=Goldstone Management South Gearbox Daemon
+After=gs-yang.service tai-gearbox.service
+Requires=gs-yang.service tai-gearbox.service
+PartOf=gs-mgmt-south.target gs-mgmt.target
+
+[Service]
+Type=oneshot
+ExecStartPre=/bin/sh -c 'while [ true ]; do ( kubectl get nodes | grep " Ready" ) && exit 0; sleep 1; done'
+ExecStart=/usr/bin/gs-mgmt.py start south-gearbox
+ExecStop=-/usr/bin/gs-mgmt.py stop south-gearbox
+RemainAfterExit=true
+StandardOutput=journal
+
+[Install]
+WantedBy=gs-mgmt-south.target
+Also=gs-south-gearbox-yang.service
diff --git a/packages/base/any/mgmt/builds/units/gs-south-onlp-yang.service b/packages/base/any/mgmt/builds/units/gs-south-onlp-yang.service
new file mode 100644
index 0000000..6917973
--- /dev/null
+++ b/packages/base/any/mgmt/builds/units/gs-south-onlp-yang.service
@@ -0,0 +1,12 @@
+[Unit]
+Description=Goldstone Management South ONLP Daemon YANG model setup
+Before=gs-yang.service
+
+[Service]
+Type=oneshot
+ExecStart=/usr/bin/gs-yang.py --install south-onlp
+RemainAfterExit=true
+StandardOutput=journal
+
+[Install]
+WantedBy=multi-user.target
diff --git a/packages/base/any/mgmt/builds/units/gs-south-onlp.service b/packages/base/any/mgmt/builds/units/gs-south-onlp.service
new file mode 100644
index 0000000..eeb4837
--- /dev/null
+++ b/packages/base/any/mgmt/builds/units/gs-south-onlp.service
@@ -0,0 +1,17 @@
+[Unit]
+Description=Goldstone Management South ONLP Daemon
+After=gs-yang.service
+Requires=gs-yang.service
+PartOf=gs-mgmt-south.target gs-mgmt.target
+
+[Service]
+Type=oneshot
+ExecStartPre=/bin/sh -c 'while [ true ]; do ( kubectl get nodes | grep " Ready" ) && exit 0; sleep 1; done'
+ExecStart=/usr/bin/gs-mgmt.py start south-onlp
+ExecStop=-/usr/bin/gs-mgmt.py stop south-onlp
+RemainAfterExit=true
+StandardOutput=journal
+
+[Install]
+WantedBy=gs-mgmt-south.target
+Also=gs-south-onlp-yang.service
diff --git a/packages/base/any/mgmt/builds/units/gs-south-sonic-yang.service b/packages/base/any/mgmt/builds/units/gs-south-sonic-yang.service
new file mode 100644
index 0000000..e38b6a9
--- /dev/null
+++ b/packages/base/any/mgmt/builds/units/gs-south-sonic-yang.service
@@ -0,0 +1,12 @@
+[Unit]
+Description=Goldstone Management South SONiC Daemon YANG model setup
+Before=gs-yang.service
+
+[Service]
+Type=oneshot
+ExecStart=/usr/bin/gs-yang.py --install south-sonic
+RemainAfterExit=true
+StandardOutput=journal
+
+[Install]
+WantedBy=multi-user.target
diff --git a/packages/base/any/mgmt/builds/units/gs-south-sonic.service b/packages/base/any/mgmt/builds/units/gs-south-sonic.service
new file mode 100644
index 0000000..43f2951
--- /dev/null
+++ b/packages/base/any/mgmt/builds/units/gs-south-sonic.service
@@ -0,0 +1,17 @@
+[Unit]
+Description=Goldstone Management South SONiC daemon
+After=gs-yang.service usonic.service
+Requires=gs-yang.service usonic.service
+PartOf=gs-mgmt-south.target gs-mgmt.target
+
+[Service]
+Type=oneshot
+ExecStartPre=/bin/sh -c 'while [ true ]; do ( kubectl get nodes | grep " Ready" ) && exit 0; sleep 1; done'
+ExecStart=/usr/bin/gs-mgmt.py start south-sonic
+ExecStop=-/usr/bin/gs-mgmt.py stop south-sonic
+RemainAfterExit=true
+StandardOutput=journal
+
+[Install]
+WantedBy=gs-mgmt-south.target
+Also=gs-south-sonic-yang.service
diff --git a/packages/base/any/mgmt/builds/units/gs-south-system-yang.service b/packages/base/any/mgmt/builds/units/gs-south-system-yang.service
new file mode 100644
index 0000000..5c86b84
--- /dev/null
+++ b/packages/base/any/mgmt/builds/units/gs-south-system-yang.service
@@ -0,0 +1,12 @@
+[Unit]
+Description=Goldstone Management South System Daemon YANG model setup
+Before=gs-yang.service
+
+[Service]
+Type=oneshot
+ExecStart=/usr/bin/gs-yang.py --install south-system
+RemainAfterExit=true
+StandardOutput=journal
+
+[Install]
+WantedBy=multi-user.target
diff --git a/packages/base/any/mgmt/builds/units/gs-south-system.service b/packages/base/any/mgmt/builds/units/gs-south-system.service
new file mode 100644
index 0000000..6c646ee
--- /dev/null
+++ b/packages/base/any/mgmt/builds/units/gs-south-system.service
@@ -0,0 +1,14 @@
+[Unit]
+Description=Goldstone System South Daemon
+After=gs-yang.service
+Requires=gs-yang.service
+PartOf=gs-mgmt-south.target gs-mgmt.target
+
+[Service]
+Type=simple
+ExecStart=/usr/local/bin/gssouthd-system -v
+StandardOutput=journal
+
+[Install]
+WantedBy=gs-mgmt-south.target
+Also=gs-south-system-yang.service
diff --git a/packages/base/any/mgmt/builds/units/gs-south-tai-yang.service b/packages/base/any/mgmt/builds/units/gs-south-tai-yang.service
new file mode 100644
index 0000000..42c993b
--- /dev/null
+++ b/packages/base/any/mgmt/builds/units/gs-south-tai-yang.service
@@ -0,0 +1,12 @@
+[Unit]
+Description=Goldstone Management South TAI Daemon YANG model setup
+Before=gs-yang.service
+
+[Service]
+Type=oneshot
+ExecStart=/usr/bin/gs-yang.py --install south-tai
+RemainAfterExit=true
+StandardOutput=journal
+
+[Install]
+WantedBy=multi-user.target
diff --git a/packages/base/any/mgmt/builds/units/gs-south-tai.service b/packages/base/any/mgmt/builds/units/gs-south-tai.service
new file mode 100644
index 0000000..0083990
--- /dev/null
+++ b/packages/base/any/mgmt/builds/units/gs-south-tai.service
@@ -0,0 +1,17 @@
+[Unit]
+Description=Goldstone Management South TAI Daemon
+After=gs-yang.service tai.service
+Requires=gs-yang.service tai.service
+PartOf=gs-mgmt-south.target gs-mgmt.target
+
+[Service]
+Type=oneshot
+ExecStartPre=/bin/sh -c 'while [ true ]; do ( kubectl get nodes | grep " Ready" ) && exit 0; sleep 1; done'
+ExecStart=/usr/bin/gs-mgmt.py start south-tai
+ExecStop=-/usr/bin/gs-mgmt.py stop south-tai
+RemainAfterExit=true
+StandardOutput=journal
+
+[Install]
+WantedBy=gs-mgmt-south.target
+Also=gs-south-tai-yang.service
diff --git a/packages/base/any/mgmt/builds/units/gs-yang.service b/packages/base/any/mgmt/builds/units/gs-yang.service
new file mode 100644
index 0000000..aa3a898
--- /dev/null
+++ b/packages/base/any/mgmt/builds/units/gs-yang.service
@@ -0,0 +1,11 @@
+[Unit]
+Description=setup Goldstone YANG models
+
+[Service]
+Type=oneshot
+ExecStart=/usr/bin/gs-yang.py --install-platform
+RemainAfterExit=true
+StandardOutput=journal
+
+[Install]
+WantedBy=gs-mgmt-south.target gs-mgmt-north.target
diff --git a/packages/base/any/mgmt/gscli-after-install.sh b/packages/base/any/mgmt/gscli-after-install.sh
new file mode 100644
index 0000000..97f4bd9
--- /dev/null
+++ b/packages/base/any/mgmt/gscli-after-install.sh
@@ -0,0 +1,6 @@
+#!/bin/sh
+
+set -eux
+
+cd /var/lib/goldstone/wheels/cli && python -m pip install *.whl
+cd /var/lib/goldstone/wheels/lib && python -m pip install *.whl
diff --git a/packages/base/any/mgmt/gscli-before-remove.sh b/packages/base/any/mgmt/gscli-before-remove.sh
new file mode 100644
index 0000000..3a07335
--- /dev/null
+++ b/packages/base/any/mgmt/gscli-before-remove.sh
@@ -0,0 +1,6 @@
+#!/bin/sh
+
+set -eux
+
+python -m pip uninstall --yes gscli
+python -m pip uninstall --yes goldstone-lib
diff --git a/packages/base/any/mgmt/gsmgmt-after-install.sh b/packages/base/any/mgmt/gsmgmt-after-install.sh
new file mode 100644
index 0000000..c2a0bb5
--- /dev/null
+++ b/packages/base/any/mgmt/gsmgmt-after-install.sh
@@ -0,0 +1,5 @@
+#!/bin/sh
+
+set -eux
+
+systemctl enable gs-mgmt.target gs-mgmt-south.target gs-mgmt-north.target gs-mgmt-xlate.target gs-north-notif.service
diff --git a/packages/base/any/mgmt/gsmgmt-before-remove.sh b/packages/base/any/mgmt/gsmgmt-before-remove.sh
new file mode 100644
index 0000000..4df5683
--- /dev/null
+++ b/packages/base/any/mgmt/gsmgmt-before-remove.sh
@@ -0,0 +1,6 @@
+#!/bin/sh
+
+set -eux
+
+systemctl disable gs-mgmt.target gs-mgmt-south.target gs-mgmt-north.target gs-mgmt-xlate.target gs-north-notif.service
+systemctl stop gs-mgmt.target gs-mgmt-south.target gs-mgmt-north.target gs-mgmt-xlate.target gs-north-notif.service
diff --git a/packages/base/any/mgmt/gssouth-systemd-after-install.sh b/packages/base/any/mgmt/gssouth-systemd-after-install.sh
new file mode 100644
index 0000000..ed7c5b7
--- /dev/null
+++ b/packages/base/any/mgmt/gssouth-systemd-after-install.sh
@@ -0,0 +1,5 @@
+#!/bin/sh
+
+set -eux
+
+cd /var/lib/goldstone/wheels/system && python -m pip install *.whl
diff --git a/packages/base/any/mgmt/gssouth-systemd-before-remove.sh b/packages/base/any/mgmt/gssouth-systemd-before-remove.sh
new file mode 100644
index 0000000..89f7d8e
--- /dev/null
+++ b/packages/base/any/mgmt/gssouth-systemd-before-remove.sh
@@ -0,0 +1,7 @@
+#!/bin/sh
+
+set -eux
+
+systemctl disable gs-south-system.service
+
+python -m pip uninstall --yes gssystem
diff --git a/packages/base/any/mgmt/gsyang-after-install.sh b/packages/base/any/mgmt/gsyang-after-install.sh
new file mode 100644
index 0000000..3976857
--- /dev/null
+++ b/packages/base/any/mgmt/gsyang-after-install.sh
@@ -0,0 +1,7 @@
+#!/bin/sh
+
+set -eux
+
+groupadd -f gsmgmt
+
+systemctl enable gs-yang.service
diff --git a/packages/base/any/mgmt/gsyang-before-remove.sh b/packages/base/any/mgmt/gsyang-before-remove.sh
new file mode 100644
index 0000000..03907a1
--- /dev/null
+++ b/packages/base/any/mgmt/gsyang-before-remove.sh
@@ -0,0 +1,8 @@
+#!/bin/sh
+
+set -eux
+
+systemctl disable gs-yang.service
+systemctl stop gs-yang.service
+
+groupdel gsmgmt
diff --git a/packages/base/any/mgmt/libyang-python-after-install.sh b/packages/base/any/mgmt/libyang-python-after-install.sh
new file mode 100644
index 0000000..b26e9db
--- /dev/null
+++ b/packages/base/any/mgmt/libyang-python-after-install.sh
@@ -0,0 +1,5 @@
+#!/bin/sh
+
+set -eux
+
+cd /var/lib/goldstone/wheels/libyang && python -m pip install --only-binary :all: *.whl
diff --git a/packages/base/any/mgmt/libyang-python-before-remove.sh b/packages/base/any/mgmt/libyang-python-before-remove.sh
new file mode 100644
index 0000000..f06d67a
--- /dev/null
+++ b/packages/base/any/mgmt/libyang-python-before-remove.sh
@@ -0,0 +1,5 @@
+#!/bin/sh
+
+set -eux
+
+python -m pip uninstall --yes libyang
diff --git a/packages/base/any/mgmt/sysrepo-python-after-install.sh b/packages/base/any/mgmt/sysrepo-python-after-install.sh
new file mode 100644
index 0000000..5af8cfb
--- /dev/null
+++ b/packages/base/any/mgmt/sysrepo-python-after-install.sh
@@ -0,0 +1,5 @@
+#!/bin/sh
+
+set -eux
+
+cd /var/lib/goldstone/wheels/sysrepo && python -m pip install --only-binary :all: *.whl
diff --git a/packages/base/any/mgmt/sysrepo-python-before-remove.sh b/packages/base/any/mgmt/sysrepo-python-before-remove.sh
new file mode 100644
index 0000000..dfb6f63
--- /dev/null
+++ b/packages/base/any/mgmt/sysrepo-python-before-remove.sh
@@ -0,0 +1,5 @@
+#!/bin/sh
+
+set -eux
+
+python -m pip uninstall --yes sysrepo
diff --git a/packages/base/any/netopeer2/APKG.yml b/packages/base/any/netopeer2/APKG.yml
new file mode 100644
index 0000000..da4eb60
--- /dev/null
+++ b/packages/base/any/netopeer2/APKG.yml
@@ -0,0 +1,20 @@
+packages:
+ - name: netopeer2
+ arch: $ARCH
+ version: 1.0.0
+ maintainer: goldstone-nos@googlegroups.com
+ summary: NETCONF server
+ after-install: $X1/packages/base/any/netopeer2/after-install.sh
+ before-remove: $X1/packages/base/any/netopeer2/before-remove.sh
+ depends:
+ - sysrepo
+ - gssystem
+ - k3s
+ - gs-mgmt
+ files:
+ builds/manifests: /var/lib/netopeer2/k8s
+ builds/netopeer2-$ARCH.tar: /var/lib/rancher/k3s/agent/images/
+ builds/yang: /var/lib/netopeer2/yang
+ builds/scripts: /var/lib/netopeer2/scripts
+ $X1/packages/base/any/netopeer2/builds/gs-north-netconf.service: /etc/systemd/system/
+ $X1/packages/base/any/netopeer2/builds/netopeer2.sh: /usr/bin/
diff --git a/packages/base/any/netopeer2/Makefile b/packages/base/any/netopeer2/Makefile
new file mode 100644
index 0000000..dc1e7b8
--- /dev/null
+++ b/packages/base/any/netopeer2/Makefile
@@ -0,0 +1 @@
+include $(ONL)/make/pkg.mk
diff --git a/packages/base/any/netopeer2/after-install.sh b/packages/base/any/netopeer2/after-install.sh
new file mode 100644
index 0000000..e21c9bd
--- /dev/null
+++ b/packages/base/any/netopeer2/after-install.sh
@@ -0,0 +1,9 @@
+#!/bin/sh
+
+set -eux
+
+rm -rf /dev/shm/*
+
+/usr/bin/netopeer2.sh install
+
+systemctl enable gs-north-netconf.service
diff --git a/packages/base/any/netopeer2/before-remove.sh b/packages/base/any/netopeer2/before-remove.sh
new file mode 100644
index 0000000..276168a
--- /dev/null
+++ b/packages/base/any/netopeer2/before-remove.sh
@@ -0,0 +1,8 @@
+#!/bin/sh
+
+set -eux
+
+systemctl disable gs-north-netconf.service
+netopeer2.sh stop || true
+
+/usr/bin/netopeer2.sh remove
diff --git a/packages/base/any/netopeer2/builds/.gitignore b/packages/base/any/netopeer2/builds/.gitignore
new file mode 100644
index 0000000..63c978d
--- /dev/null
+++ b/packages/base/any/netopeer2/builds/.gitignore
@@ -0,0 +1,3 @@
+*.tar
+scripts
+yang
diff --git a/packages/base/any/netopeer2/builds/Makefile b/packages/base/any/netopeer2/builds/Makefile
new file mode 100644
index 0000000..b1c8317
--- /dev/null
+++ b/packages/base/any/netopeer2/builds/Makefile
@@ -0,0 +1,27 @@
+include $(X1)/make/mgmt.mk
+
+TEMPLATE_DIR ?= $(X1)/packages/base/any/netopeer2/builds/templates
+
+IMAGE_TAG ?= $(GS_MGMT_VERSION)
+NETOPEER2_IMAGE ?= $(GS_MGMT_IMAGE_REPO)/north-netconf:$(IMAGE_TAG)
+
+.PHONY: yang image scripts
+
+.DEFAULT_GOAL := all
+
+all: netopeer2-$(ARCH).tar yang scripts manifests
+
+image:
+ docker pull --platform=linux/$(ARCH) $(NETOPEER2_IMAGE)
+
+netopeer2-$(ARCH).tar: image
+ docker save $(NETOPEER2_IMAGE) > $@
+
+yang: image
+ echo `pwd`
+ $(RM) -r $@ && mkdir $@
+ docker run -v `pwd`/yang:/yang -w /yang --rm $(NETOPEER2_IMAGE) sh -c "cp /usr/local/share/yang/modules/netopeer2/*.yang /yang"
+
+scripts: image
+ $(RM) -r $@ && mkdir $@
+ docker run -v `pwd`/scripts:/scripts -w /scripts --rm $(NETOPEER2_IMAGE) sh -c "cp /usr/local/share/netopeer2/scripts/*.sh /scripts"
diff --git a/packages/base/any/netopeer2/builds/gs-north-netconf.service b/packages/base/any/netopeer2/builds/gs-north-netconf.service
new file mode 100644
index 0000000..b68319b
--- /dev/null
+++ b/packages/base/any/netopeer2/builds/gs-north-netconf.service
@@ -0,0 +1,15 @@
+[Unit]
+Description=Goldstone Management North NETCONF Daemon
+After=gs-mgmt-south.target
+PartOf=gs-mgmt-north.target gs-mgmt.target
+
+[Service]
+Type=oneshot
+ExecStartPre=/bin/sh -c 'while [ true ]; do ( kubectl get nodes | grep " Ready" ) && exit 0; sleep 1; done'
+ExecStart=/usr/bin/netopeer2.sh start
+ExecStop=-/usr/bin/netopeer2.sh stop
+RemainAfterExit=true
+StandardOutput=journal
+
+[Install]
+WantedBy=gs-mgmt-north.target
diff --git a/packages/base/any/netopeer2/builds/netopeer2.sh b/packages/base/any/netopeer2/builds/netopeer2.sh
new file mode 100755
index 0000000..1e95226
--- /dev/null
+++ b/packages/base/any/netopeer2/builds/netopeer2.sh
@@ -0,0 +1,35 @@
+#!/bin/bash
+
+set -eux
+
+NP2=/var/lib/netopeer2/scripts
+export NP2_MODULE_OWNER=root
+export NP2_MODULE_GROUP=gsmgmt
+export NP2_MODULE_PERMS="664"
+export NP2_MODULE_DIR=/var/lib/netopeer2/yang
+
+install() {
+ $NP2/setup.sh && $NP2/merge_hostkey.sh && $NP2/merge_config.sh
+}
+
+remove() {
+ echo remove
+}
+
+start() {
+ gs-mgmt.py start north-netconf --manifest-dir /var/lib/netopeer2/k8s
+}
+
+stop() {
+ gs-mgmt.py stop north-netconf --manifest-dir /var/lib/netopeer2/k8s
+}
+
+case "$1" in
+ install|remove|start|stop)
+ $1
+ ;;
+ *)
+ echo "Usage: $0 {install|remove|start|stop}"
+ exit 1
+ ;;
+esac
diff --git a/packages/base/any/netopeer2/builds/templates/netopeer2.yaml b/packages/base/any/netopeer2/builds/templates/netopeer2.yaml
new file mode 100644
index 0000000..8fc5591
--- /dev/null
+++ b/packages/base/any/netopeer2/builds/templates/netopeer2.yaml
@@ -0,0 +1,70 @@
+apiVersion: v1
+kind: Service
+metadata:
+ name: north-netconf
+ labels:
+ gs-mgmt: north-netconf
+spec:
+ type: LoadBalancer
+ selector:
+ app: north-netconf
+ ports:
+ - protocol: TCP
+ port: 830
+ targetPort: 830
+ name: netconf
+
+---
+
+apiVersion: apps/v1
+kind: DaemonSet
+metadata:
+ name: north-netconf
+ labels:
+ app: gs-mgmt
+ gs-mgmt: north-netconf
+spec:
+ selector:
+ matchLabels:
+ app: north-netconf
+ template:
+ metadata:
+ labels:
+ app: north-netconf
+ spec:
+ containers:
+ - name: netopeer2
+ image: MGMT_IMAGE_REPO/north-netconf:IMAGE_TAG
+ imagePullPolicy: IfNotPresent
+ command: ['netopeer2-server']
+ args: ['-d', '-v', '2', '-t', '60']
+ volumeMounts:
+ - name: shm
+ mountPath: /dev/shm
+ - name: sysrepo
+ mountPath: /var/lib/sysrepo
+ - name: home
+ mountPath: /home
+ readOnly: true
+ - name: passwd
+ mountPath: /etc/passwd
+ readOnly: true
+ - name: shadow
+ mountPath: /etc/shadow
+ readOnly: true
+ volumes:
+ - name: shm
+ hostPath:
+ path: /dev/shm
+ - name: sysrepo
+ hostPath:
+ path: /var/lib/sysrepo
+ - name: home
+ hostPath:
+ path: /home
+ - name: passwd
+ hostPath:
+ path: /etc/passwd
+ - name: shadow
+ hostPath:
+ path: /etc/shadow
diff --git a/packages/base/any/piu/APKG.yml b/packages/base/any/piu/APKG.yml
index 95f0cf5..db75bd0 100644
--- a/packages/base/any/piu/APKG.yml
+++ b/packages/base/any/piu/APKG.yml
@@ -6,9 +6,6 @@ packages:
summary: CFP2 PIU kernel module
arch: $ARCH
version: 0.1
- copyright: Copyright 2020 NTT Electronics America
- maintainer: ishida@nel-america.com
- changelog: None
-
+ maintainer: goldstone-nos@googlegroups.com
files:
builds/lib: lib
diff --git a/packages/base/any/piu/include/piu.h b/packages/base/any/piu/include/piu.h
index 68b966d..d5df899 100644
--- a/packages/base/any/piu/include/piu.h
+++ b/packages/base/any/piu/include/piu.h
@@ -10,3 +10,4 @@ struct piu_cmd {
#define PIU_READ _IOWR(IOC_MAGIC, 1, struct piu_cmd)
#define PIU_WRITE _IOWR(IOC_MAGIC, 2, struct piu_cmd)
+#define PIU_INIT _IOWR(IOC_MAGIC, 3, struct piu_cmd)
diff --git a/packages/base/any/piu/kbuilds/Kbuild b/packages/base/any/piu/kbuilds/Kbuild
index 25a36ef..48a4b63 100644
--- a/packages/base/any/piu/kbuilds/Kbuild
+++ b/packages/base/any/piu/kbuilds/Kbuild
@@ -7,7 +7,7 @@ obj-m := $(LINUX_KERNEL_PIU_NAME).o
#
# These are the sources that must be built into this module
#
-SOURCES := $(THIS_DIR)/piu.c
+SOURCES := $(addprefix $(THIS_DIR)/,piu.c aco.c dco.c)
#
# The kernel build system requires paths relative to the module build directory.
diff --git a/packages/base/any/piu/kbuilds/aco.c b/packages/base/any/piu/kbuilds/aco.c
new file mode 100644
index 0000000..2dc6da4
--- /dev/null
+++ b/packages/base/any/piu/kbuilds/aco.c
@@ -0,0 +1,94 @@
+#include
+
+#include "aco.h"
+
+#define I2C_ADDRESS_SIZE 4
+
+static int I2C_ADDRESS_ADDRESS[] = {0x10, 0x11, 0x12, 0x13};
+static int I2C_DATA_ADDRESS[] = {0x20, 0x21, 0x22, 0x23};
+
+#define I2C_TRIGGER_ADDRESS 0x01
+#define I2C_TRIGGER_WRITE 0x01
+#define I2C_TRIGGER_READ 0x02
+
+#define I2C_READY_ADDRESS 0x02
+#define I2C_READY_VALUE 0x00
+
+#define I2C_POLL_TIMEOUT 50
+#define I2C_POLL_INTERVAL_US 100
+
+static int piu_i2c_wait_ready(struct i2c_client *client) {
+ int i, ret;
+ for (i = 0; i < I2C_POLL_TIMEOUT; i++) {
+ ret = i2c_smbus_read_byte_data(client, I2C_READY_ADDRESS);
+ if ( ret < 0 ){
+ return ret;
+ }
+ if ( ret == I2C_READY_VALUE ) {
+ return 0;
+ }
+ msleep(I2C_POLL_INTERVAL_US);
+ }
+ return -1;
+}
+
+int aco_piu_i2c_read(struct i2c_client *client, uint32_t addr, uint32_t *value) {
+ int i, ret;
+ if ( client == NULL || value == NULL ) {
+ return -1;
+ }
+ *value = 0;
+ for (i = 0; i < I2C_ADDRESS_SIZE; i++) {
+ if ((ret = i2c_smbus_write_byte_data(client, I2C_ADDRESS_ADDRESS[i], (addr >> ((I2C_ADDRESS_SIZE - 1 - i)*8)) & 0xff)) < 0) {
+ return ret;
+ }
+ }
+ if ((ret = i2c_smbus_write_byte_data(client, I2C_TRIGGER_ADDRESS, I2C_TRIGGER_READ)) < 0) {
+ return ret;
+ }
+ if ( piu_i2c_wait_ready(client) < 0 ){
+ return -1;
+ }
+ for (i = 0; i < I2C_ADDRESS_SIZE; i++) {
+ ret = i2c_smbus_read_byte_data(client, I2C_DATA_ADDRESS[i]);
+ if ( ret < 0 ){
+ return -1;
+ }
+ *value |= (ret << ((I2C_ADDRESS_SIZE - 1 - i)*8));
+ }
+ return 0;
+}
+
+int aco_piu_i2c_write(struct i2c_client *client, uint32_t addr, uint32_t value) {
+ int i, ret;
+ if ( client == NULL ) {
+ return -1;
+ }
+ for (i = 0; i < I2C_ADDRESS_SIZE; i++) {
+ if ((ret = i2c_smbus_write_byte_data(client, I2C_ADDRESS_ADDRESS[i], (addr >> ((I2C_ADDRESS_SIZE - 1 - i)*8)) & 0xff)) < 0) {
+ return ret;
+ }
+ }
+ for (i = 0; i < I2C_ADDRESS_SIZE; i++) {
+ if ((ret = i2c_smbus_write_byte_data(client, I2C_DATA_ADDRESS[i], (value >> ((I2C_ADDRESS_SIZE - 1 - i)*8)) & 0xff)) < 0) {
+ return ret;
+ }
+ }
+ if ((ret = i2c_smbus_write_byte_data(client, I2C_TRIGGER_ADDRESS, I2C_TRIGGER_WRITE)) < 0) {
+ return ret;
+ }
+ return piu_i2c_wait_ready(client);
+}
+
+int aco_cfp2_exists(struct i2c_client *client) {
+ int ret;
+ uint32_t value;
+ ret = aco_piu_i2c_read(client, 0x30091004, &value);
+ if ( ret ) {
+ return 0;
+ }
+ if ( (value & 0x1) == 0 ) {
+ return 1;
+ }
+ return 0;
+}
diff --git a/packages/base/any/piu/kbuilds/aco.h b/packages/base/any/piu/kbuilds/aco.h
new file mode 100644
index 0000000..3672838
--- /dev/null
+++ b/packages/base/any/piu/kbuilds/aco.h
@@ -0,0 +1,12 @@
+#include
+
+#define ACO_PIU_THERMAL_ENABLED 0x23c0
+#define ACO_PIU_THERMAL_VALUE 0x23c4
+
+#define ACO_PIU_CFP2_OFFSET 0x40000000
+
+#define ACO_PIU_FPGA_VERSION 0x30090000
+
+int aco_piu_i2c_read(struct i2c_client *client, uint32_t addr, uint32_t *value);
+int aco_piu_i2c_write(struct i2c_client *client, uint32_t addr, uint32_t value);
+int aco_cfp2_exists(struct i2c_client *client);
diff --git a/packages/base/any/piu/kbuilds/dco.c b/packages/base/any/piu/kbuilds/dco.c
new file mode 100644
index 0000000..45456f1
--- /dev/null
+++ b/packages/base/any/piu/kbuilds/dco.c
@@ -0,0 +1,101 @@
+#include
+
+#include "dco.h"
+
+#define I2C_POLL_TIMEOUT 1
+#define I2C_POLL_INTERVAL_MS 70
+
+//for PIU-DCO MCU
+static int m487_write_block(struct i2c_client *client, uint16_t size, uint8_t *values) {
+ return i2c_smbus_write_i2c_block_data(client, values[0], (size-1), &values[1]);
+}
+
+//for PIU-DCO MCU
+static int m487_read_block(struct i2c_client *client, uint16_t size, uint8_t *values) {
+ return i2c_smbus_read_i2c_block_data(client, 0xff, size, values); //PIU-DCO MCU will ignore the 0xff command.
+}
+
+//for PIU-DCO MCU
+static int read_from_mcu_device(struct i2c_client *client, uint8_t dev_addr, uint16_t addr, uint16_t *value)
+{
+ uint8_t buf[3];
+ int ret = 0, retry = 0;
+ int size = dev_addr == DCO_DEV_ADDR ? 3 : 2;
+
+ /*write device address and register address*/
+ buf[0] = dev_addr;
+ buf[1] = (addr >> 8) & 0x00ff;
+ buf[2] = addr & 0x00ff;
+
+ ret = m487_write_block(client, 3, buf);
+ if (ret) {
+ return ret;
+ }
+ memset(buf, 0, 3);
+
+ /*read status and data*/
+ do {
+ ret = m487_read_block(client, size, buf);
+ if ((ret < 0) || (buf[0] != 0)) {
+ printk(" retry %d, status=0x%x, ret %d\n", retry, buf[0], ret);
+ msleep(I2C_POLL_INTERVAL_MS); //waiting for MCU to prepare data
+ }
+ } while (((ret < 0) || (buf[0] != 0)) && (retry++> 8) & 0x00ff;
+ data_w[2] = addr & 0x00ff;
+
+ if ( dev_addr == DCO_DEV_ADDR ) {
+ size_w = 5;
+ data_w[3] = value & 0x00ff;
+ data_w[4] = (value >> 8) & 0x00ff;
+ } else {
+ size_w = 4;
+ data_w[3] = value & 0xff;
+ }
+
+ return m487_write_block(client, size_w, data_w);
+}
+
+int dco_piu_i2c_read(struct i2c_client *client, uint32_t addr, uint32_t *value) {
+ int ret;
+ uint16_t v = 0;
+ ret = read_from_mcu_device(client, addr >> 16, addr & 0xffff, &v);
+ *value = v;
+ return ret;
+}
+
+int dco_piu_i2c_write(struct i2c_client *client, uint32_t addr, uint32_t value) {
+ return write_to_mcu_device(client, addr >> 16, addr & 0xffff, value);
+}
+
+int dco_cfp2_exists(struct i2c_client *client) {
+ int ret;
+ uint32_t value;
+ ret = dco_piu_i2c_read(client, 0x5, &value);
+ if ( ret ) {
+ return 0;
+ }
+ if ( (value & 0x8) == 0 ) {
+ return 1;
+ }
+ return 0;
+}
diff --git a/packages/base/any/piu/kbuilds/dco.h b/packages/base/any/piu/kbuilds/dco.h
new file mode 100644
index 0000000..51d8e2b
--- /dev/null
+++ b/packages/base/any/piu/kbuilds/dco.h
@@ -0,0 +1,20 @@
+#include
+
+#define DCO_PIU_CFP2_OFFSET 0x00300000
+
+#define MCU_DEV_ADDR 0x00
+
+#define DCO_DEV_ADDR 0x30
+#define QSFP28_1_DEV_ADDR_OFFSET 0x00310000
+#define QSFP28_2_DEV_ADDR_OFFSET 0x00320000
+#define QSFP28_EEPROM_SIZE 256
+
+#define RETIMER_1_DEV_ADDR 0x40
+#define RETIMER_2_DEV_ADDR 0x41
+#define EEPROM_DEV_ADDR 0x50
+
+
+
+int dco_piu_i2c_read(struct i2c_client *client, uint32_t addr, uint32_t *value);
+int dco_piu_i2c_write(struct i2c_client *client, uint32_t addr, uint32_t value);
+int dco_cfp2_exists(struct i2c_client *client);
diff --git a/packages/base/any/piu/kbuilds/piu.c b/packages/base/any/piu/kbuilds/piu.c
index a0612ab..1063537 100644
--- a/packages/base/any/piu/kbuilds/piu.c
+++ b/packages/base/any/piu/kbuilds/piu.c
@@ -5,9 +5,10 @@
#include
#include
#include
-#include
#include "piu.h"
+#include "aco.h"
+#include "dco.h"
#define DRIVER_NAME "piu"
@@ -17,130 +18,437 @@ static dev_t piu_devt;
#define PIU_I2C_ADDR 0x6A
#define PIU_NUM 8
+#define CFP2_MODULE_TEMP 0xb02f
+#define CFP2_TX_LASER_TEMP 0xb340
+#define CFP2_RX_LASER_TEMP 0xb380
+#define CFP2_VENDOR_NAME 0x8021
+#define CFP2_PART_NUMBER 0x8034
+#define CFP2_SERIAL_NUMBER 0x8044
-struct piu_data {
+enum piu_type {
+ PIU_TYPE_UNKNOWN,
+ PIU_TYPE_UNPLUGGED,
+ PIU_TYPE_ACO,
+ PIU_TYPE_DCO,
+ PIU_TYPE_QSFP28
+};
+
+struct piu_dev {
struct mutex lock;
struct i2c_client *client;
+ struct i2c_client *dco_client;
int port;
struct cdev cdev;
struct device *dev;
+ struct bin_attribute eeprom[2];
+ enum piu_type type;
+ bool simulate_plug_out;
+ bool simulate_cfp2_plug_out;
};
+static int piu_i2c_read(struct piu_dev *dev, uint32_t addr, uint32_t *value);
+
+static enum piu_type get_piu_type(struct piu_dev *piu, int *value) {
+ enum piu_type ret;
+ int type;
+ mutex_lock(&piu->lock);
+
+ if (piu->simulate_plug_out) {
+ ret = PIU_TYPE_UNPLUGGED;
+ goto out;
+ }
+
+ type = i2c_smbus_read_byte_data(piu->client, 0);
+ if ( type >= 0 ) {
+ if (value) *value = type;
+ if ( type == 0x10 || type == 0x11 || type == 0x12 ) {
+ ret = PIU_TYPE_DCO;
+ } else if ( type == 0xff ) {
+ ret = PIU_TYPE_ACO;
+ } else if ( type == 0x00 || type == 0x01 || type == 0x02 ) {
+ ret = PIU_TYPE_QSFP28;
+ } else {
+ ret = PIU_TYPE_UNKNOWN;
+ }
+ } else {
+ if ( dco_piu_i2c_read(piu->dco_client, 1, &type) < 0 ) {
+ ret = PIU_TYPE_UNPLUGGED;
+ } else if ( type == 0x0 ) {
+ ret = PIU_TYPE_DCO;
+ } else if ( type == 0x1 ) {
+ ret = PIU_TYPE_QSFP28;
+ } else {
+ ret = PIU_TYPE_UNKNOWN;
+ }
+ if (value) *value = type;
+ }
+out:
+ piu->type = ret;
+ mutex_unlock(&piu->lock);
+ return ret;
+}
+
+static int cfp2_exists(struct piu_dev *piu, enum piu_type type) {
+ int ret;
+ mutex_lock(&piu->lock);
+
+ if (piu->simulate_plug_out || piu->simulate_cfp2_plug_out) {
+ ret = 0;
+ goto out;
+ }
+
+ switch (type) {
+ case PIU_TYPE_ACO:
+ ret = aco_cfp2_exists(piu->client);
+ break;
+ case PIU_TYPE_DCO:
+ ret = dco_cfp2_exists(piu->dco_client);
+ break;
+ default:
+ ret = 1;
+ }
+out:
+ mutex_unlock(&piu->lock);
+ return ret;
+}
+
static ssize_t piu_index_show(struct device *dev, struct device_attribute *da, char *buf) {
- struct piu_data *priv = dev_get_drvdata(dev);
+ struct piu_dev *priv = dev_get_drvdata(dev);
return scnprintf(buf, PAGE_SIZE, "%d\n", priv->port);
}
static DEVICE_ATTR_RO(piu_index);
static ssize_t piu_type_show(struct device *dev, struct device_attribute *da, char *buf) {
- int type, ret;
- struct piu_data *priv = dev_get_drvdata(dev);
- mutex_lock(&priv->lock);
- type = i2c_smbus_read_byte_data(priv->client, 0);
- if ( type < 0 ) {
- ret = scnprintf(buf, PAGE_SIZE, "\n");
- } else if ( type == 0x10 || type == 0x11 || type == 0x12 ) {
- ret = scnprintf(buf, PAGE_SIZE, "DCO\n");
- } else if ( type == 0xff ) {
- ret = scnprintf(buf, PAGE_SIZE, "ACO\n");
- } else if ( type == 0x00 || type == 0x01 || type == 0x02 ) {
- ret = scnprintf(buf, PAGE_SIZE, "QSFP28\n");
- } else {
- ret = scnprintf(buf, PAGE_SIZE, "UNKNOWN(0x%x)\n", type);
+ int value;
+ enum piu_type type;
+ struct piu_dev *priv = dev_get_drvdata(dev);
+ type = get_piu_type(priv, &value);
+ switch (type) {
+ case PIU_TYPE_UNPLUGGED:
+ return scnprintf(buf, PAGE_SIZE, "\n");
+ case PIU_TYPE_ACO:
+ return scnprintf(buf, PAGE_SIZE, "ACO\n");
+ case PIU_TYPE_DCO:
+ return scnprintf(buf, PAGE_SIZE, "DCO\n");
+ case PIU_TYPE_QSFP28:
+ return scnprintf(buf, PAGE_SIZE, "QSFP28\n");
+ default:
+ return scnprintf(buf, PAGE_SIZE, "UNKNOWN(0x%x)\n", value);
}
- mutex_unlock(&priv->lock);
- return ret;
}
static DEVICE_ATTR_RO(piu_type);
+static ssize_t piu_mcu_version_show(struct device *dev, struct device_attribute *da, char *buf) {
+ int value;
+ enum piu_type type;
+ struct piu_dev *priv = dev_get_drvdata(dev);
+ uint32_t version[2];
+ type = get_piu_type(priv, &value);
+ switch (type) {
+ case PIU_TYPE_DCO:
+ case PIU_TYPE_QSFP28:
+ piu_i2c_read(priv, 2, &version[0]);
+ piu_i2c_read(priv, 3, &version[1]);
+ return scnprintf(buf, PAGE_SIZE, "%u.%u.%u\n", (version[0] >> 4) & 15, version[0] & 15, (version[1] >> 4) & 15);
+ case PIU_TYPE_ACO:
+ piu_i2c_read(priv, ACO_PIU_FPGA_VERSION, &version[0]);
+ return scnprintf(buf, PAGE_SIZE, "%u.%u.%u\n", (version[0] >> 24) & 15, (version[0] >> 20) & 15, (version[0] >> 16) & 15);
+ default:
+ return scnprintf(buf, PAGE_SIZE, "\n");
+ }
+}
+static DEVICE_ATTR_RO(piu_mcu_version);
+
+static ssize_t piu_temp_show(struct device *dev, struct device_attribute *da, char *buf) {
+ int value;
+ enum piu_type type;
+ struct piu_dev *priv = dev_get_drvdata(dev);
+ type = get_piu_type(priv, &value);
+ switch (type) {
+ case PIU_TYPE_ACO:
+ {
+ uint32_t thermal = 0;
+ piu_i2c_read(priv, ACO_PIU_THERMAL_ENABLED, &thermal);
+ if ( thermal != 1 ) {
+ return scnprintf(buf, PAGE_SIZE, "\n");
+ }
+ thermal = 0;
+ piu_i2c_read(priv, ACO_PIU_THERMAL_VALUE, &thermal);
+ return scnprintf(buf, PAGE_SIZE, "%d\n", thermal);
+ }
+ default:
+ return scnprintf(buf, PAGE_SIZE, "\n");
+ }
+}
+
+static DEVICE_ATTR_RO(piu_temp);
+
+static ssize_t cfp2_temp_show(struct device *dev, uint32_t addr, struct device_attribute *da, char *buf) {
+ int value;
+ enum piu_type type;
+ struct piu_dev *priv = dev_get_drvdata(dev);
+ type = get_piu_type(priv, &value);
+ switch (type) {
+ case PIU_TYPE_ACO:
+ case PIU_TYPE_DCO:
+ if ( cfp2_exists(priv, type) ) {
+ uint32_t offset = type == PIU_TYPE_ACO ? ACO_PIU_CFP2_OFFSET : DCO_PIU_CFP2_OFFSET;
+ int32_t temp = 0;
+ piu_i2c_read(priv, offset | addr, (uint32_t*)&temp);
+ return scnprintf(buf, PAGE_SIZE, "%d.%d\n", temp/256, temp%256);
+ }
+ return scnprintf(buf, PAGE_SIZE, "\n");
+ default:
+ return scnprintf(buf, PAGE_SIZE, "\n");
+ }
+}
+
+static ssize_t cfp2_exists_show(struct device *dev, struct device_attribute *da, char *buf) {
+ int value;
+ enum piu_type type;
+ struct piu_dev *priv = dev_get_drvdata(dev);
+ type = get_piu_type(priv, &value);
+ return scnprintf(buf, PAGE_SIZE, "%d\n", cfp2_exists(priv, type));
+}
+static DEVICE_ATTR_RO(cfp2_exists);
+
+static ssize_t cfp2_cage_temp_show(struct device *dev, struct device_attribute *da, char *buf) {
+ return cfp2_temp_show(dev, CFP2_MODULE_TEMP, da, buf);
+}
+static DEVICE_ATTR_RO(cfp2_cage_temp);
+
+static ssize_t cfp2_tx_laser_temp_show(struct device *dev, struct device_attribute *da, char *buf) {
+ return cfp2_temp_show(dev, CFP2_TX_LASER_TEMP, da, buf);
+}
+static DEVICE_ATTR_RO(cfp2_tx_laser_temp);
+
+static ssize_t cfp2_rx_laser_temp_show(struct device *dev, struct device_attribute *da, char *buf) {
+ return cfp2_temp_show(dev, CFP2_RX_LASER_TEMP, da, buf);
+}
+static DEVICE_ATTR_RO(cfp2_rx_laser_temp);
+
+static ssize_t cfp2_string_show(struct device *dev, uint32_t addr, ssize_t size, struct device_attribute *da, char *buf) {
+ int value;
+ enum piu_type type;
+ struct piu_dev *priv = dev_get_drvdata(dev);
+ type = get_piu_type(priv, &value);
+ switch (type) {
+ case PIU_TYPE_ACO:
+ case PIU_TYPE_DCO:
+ if ( cfp2_exists(priv, type) ) {
+ int i;
+ uint32_t offset = type == PIU_TYPE_ACO ? ACO_PIU_CFP2_OFFSET : DCO_PIU_CFP2_OFFSET;
+ for ( i = 0; i < size; i++ ) {
+ piu_i2c_read(priv, (offset | addr) + i, (uint32_t*)&buf[i]);
+ }
+ while ( isspace(buf[i]) || buf[i] == 0 ) {
+ buf[i--] = 0;
+ }
+ buf[i+1] = '\n';
+ return i+2;
+ }
+ default:
+ return scnprintf(buf, PAGE_SIZE, "\n");
+ }
+}
+
+static ssize_t cfp2_vendor_show(struct device *dev, struct device_attribute *da, char *buf) {
+ return cfp2_string_show(dev, CFP2_VENDOR_NAME, 16, da, buf);
+}
+static DEVICE_ATTR_RO(cfp2_vendor);
+
+static ssize_t cfp2_part_number_show(struct device *dev, struct device_attribute *da, char *buf) {
+ return cfp2_string_show(dev, CFP2_PART_NUMBER, 16, da, buf);
+}
+static DEVICE_ATTR_RO(cfp2_part_number);
+
+static ssize_t cfp2_serial_number_show(struct device *dev, struct device_attribute *da, char *buf) {
+ return cfp2_string_show(dev, CFP2_SERIAL_NUMBER, 16, da, buf);
+}
+static DEVICE_ATTR_RO(cfp2_serial_number);
+
+static ssize_t cfp2_oui_show(struct device *dev, struct device_attribute *da, char *buf) {
+ int value;
+ enum piu_type type;
+ struct piu_dev *priv = dev_get_drvdata(dev);
+ type = get_piu_type(priv, &value);
+ switch (type) {
+ case PIU_TYPE_ACO:
+ case PIU_TYPE_DCO:
+ if ( cfp2_exists(priv, type) ) {
+ uint32_t offset = type == PIU_TYPE_ACO ? ACO_PIU_CFP2_OFFSET : DCO_PIU_CFP2_OFFSET;
+ uint32_t oui, data;
+ piu_i2c_read(priv, offset | 0x8031, (uint32_t*)&data);
+ oui = (data &= 0xff) << 8;
+ piu_i2c_read(priv, offset | 0x8032, (uint32_t*)&data);
+ oui = (oui | (data &= 0xff)) << 8;
+ piu_i2c_read(priv, offset | 0x8033, (uint32_t*)&data);
+ oui = (oui | (data &= 0xff));
+ return scnprintf(buf, PAGE_SIZE, "%d\n", oui);
+ }
+ default:
+ return scnprintf(buf, PAGE_SIZE, "\n");
+ }
+}
+static DEVICE_ATTR_RO(cfp2_oui);
+
+static ssize_t cfp2_firmware_version_show(struct device *dev, struct device_attribute *da, char *buf) {
+ int value;
+ enum piu_type type;
+ struct piu_dev *priv = dev_get_drvdata(dev);
+ type = get_piu_type(priv, &value);
+ switch (type) {
+ case PIU_TYPE_ACO:
+ case PIU_TYPE_DCO:
+ if ( cfp2_exists(priv, type) ) {
+ uint32_t offset = type == PIU_TYPE_ACO ? ACO_PIU_CFP2_OFFSET : DCO_PIU_CFP2_OFFSET;
+ uint32_t data[2];
+ piu_i2c_read(priv, offset | 0x806C, &data[0]);
+ piu_i2c_read(priv, offset | 0x806D, &data[1]);
+ return scnprintf(buf, PAGE_SIZE, "%d.%d\n", data[0] & 0xff, data[1] & 0xff);
+ }
+ default:
+ return scnprintf(buf, PAGE_SIZE, "\n");
+ }
+}
+static DEVICE_ATTR_RO(cfp2_firmware_version);
+
+static ssize_t piu_simulate_plug_out_show(struct device *dev, struct device_attribute *da, char *buf) {
+ struct piu_dev *priv = dev_get_drvdata(dev);
+ if ( priv != NULL && priv->simulate_plug_out ) {
+ return scnprintf(buf, PAGE_SIZE, "1");
+ }
+ return scnprintf(buf, PAGE_SIZE, "0");
+}
+
+static ssize_t piu_simulate_plug_out_store(struct device *dev, struct device_attribute *da, const char *buf, size_t count) {
+ struct piu_dev *priv = dev_get_drvdata(dev);
+ long value;
+
+ if (kstrtoul(buf, 0, &value))
+ return -EINVAL;
+
+ mutex_lock(&priv->lock);
+ priv->simulate_plug_out = value > 0;
+ mutex_unlock(&priv->lock);
+ return count;
+}
+static DEVICE_ATTR_RW(piu_simulate_plug_out);
+
+static ssize_t cfp2_simulate_plug_out_show(struct device *dev, struct device_attribute *da, char *buf) {
+ struct piu_dev *priv = dev_get_drvdata(dev);
+ if ( priv != NULL && priv->simulate_cfp2_plug_out ) {
+ return scnprintf(buf, PAGE_SIZE, "1");
+ }
+ return scnprintf(buf, PAGE_SIZE, "0");
+}
+
+static ssize_t cfp2_simulate_plug_out_store(struct device *dev, struct device_attribute *da, const char *buf, size_t count) {
+ struct piu_dev *priv = dev_get_drvdata(dev);
+ long value;
+
+ if (kstrtoul(buf, 0, &value))
+ return -EINVAL;
+
+ mutex_lock(&priv->lock);
+ priv->simulate_cfp2_plug_out = value > 0;
+ mutex_unlock(&priv->lock);
+ return count;
+}
+static DEVICE_ATTR_RW(cfp2_simulate_plug_out);
+
static struct attribute *piu_dev_attrs[] = {
&dev_attr_piu_index.attr,
&dev_attr_piu_type.attr,
+ &dev_attr_piu_mcu_version.attr,
+ &dev_attr_piu_temp.attr,
+ &dev_attr_piu_simulate_plug_out.attr,
+ &dev_attr_cfp2_exists.attr,
+ &dev_attr_cfp2_cage_temp.attr,
+ &dev_attr_cfp2_tx_laser_temp.attr,
+ &dev_attr_cfp2_rx_laser_temp.attr,
+ &dev_attr_cfp2_vendor.attr,
+ &dev_attr_cfp2_part_number.attr,
+ &dev_attr_cfp2_serial_number.attr,
+ &dev_attr_cfp2_oui.attr,
+ &dev_attr_cfp2_firmware_version.attr,
+ &dev_attr_cfp2_simulate_plug_out.attr,
NULL
};
ATTRIBUTE_GROUPS(piu_dev);
-#define I2C_ADDRESS_SIZE 4
+static int piu_i2c_read(struct piu_dev *dev, uint32_t addr, uint32_t *value) {
+ int ret;
+ mutex_lock(&dev->lock);
-static int I2C_ADDRESS_ADDRESS[] = {0x10, 0x11, 0x12, 0x13};
-static int I2C_DATA_ADDRESS[] = {0x20, 0x21, 0x22, 0x23};
-
-#define I2C_TRIGGER_ADDRESS 0x01
-#define I2C_TRIGGER_WRITE 0x01
-#define I2C_TRIGGER_READ 0x02
-
-#define I2C_READY_ADDRESS 0x02
-#define I2C_READY_VALUE 0x00
-
-#define I2C_POLL_TIMEOUT 50
-#define I2C_POLL_INTERVAL_US 100
-
-static int piu_i2c_wait_ready(struct i2c_client *client) {
- int i, ret;
- for (i = 0; i < I2C_POLL_TIMEOUT; i++) {
- ret = i2c_smbus_read_byte_data(client, I2C_READY_ADDRESS);
- if ( ret < 0 ){
- return ret;
- }
- if ( ret == I2C_READY_VALUE ) {
- return 0;
- }
- msleep(I2C_POLL_INTERVAL_US);
+ if (dev->simulate_plug_out) {
+ ret = -1;
+ goto out;
}
- printk("PIU I/O timeout\n");
- return -1;
+
+ switch (dev->type) {
+ case PIU_TYPE_ACO:
+ if (dev->simulate_cfp2_plug_out && (addr & ACO_PIU_CFP2_OFFSET)) {
+ ret = -1;
+ goto out;
+ }
+ ret = aco_piu_i2c_read(dev->client, addr, value);
+ break;
+ case PIU_TYPE_DCO:
+ if (dev->simulate_cfp2_plug_out && (addr & DCO_PIU_CFP2_OFFSET)) {
+ ret = -1;
+ goto out;
+ }
+ case PIU_TYPE_QSFP28:
+ ret = dco_piu_i2c_read(dev->dco_client, addr, value);
+ break;
+ default:
+ printk("read for type 0x%x is not supported\n", dev->type);
+ ret = -1;
+ }
+
+out:
+ mutex_unlock(&dev->lock);
+ return ret;
}
-static int piu_i2c_read(struct i2c_client *client, uint32_t addr, uint32_t *value) {
- int i, ret;
- if ( client == NULL || value == NULL ) {
- return -1;
- }
- *value = 0;
- for (i = 0; i < I2C_ADDRESS_SIZE; i++) {
- if ((ret = i2c_smbus_write_byte_data(client, I2C_ADDRESS_ADDRESS[i], (addr >> ((I2C_ADDRESS_SIZE - 1 - i)*8)) & 0xff)) < 0) {
- return ret;
- }
- }
- if ((ret = i2c_smbus_write_byte_data(client, I2C_TRIGGER_ADDRESS, I2C_TRIGGER_READ)) < 0) {
- return ret;
- }
- if ( piu_i2c_wait_ready(client) < 0 ){
- return -1;
- }
- for (i = 0; i < I2C_ADDRESS_SIZE; i++) {
- ret = i2c_smbus_read_byte_data(client, I2C_DATA_ADDRESS[i]);
- if ( ret < 0 ){
- return -1;
- }
- *value |= (ret << ((I2C_ADDRESS_SIZE - 1 - i)*8));
- }
- return 0;
-}
+static int piu_i2c_write(struct piu_dev *dev, uint32_t addr, uint32_t value) {
+ int ret;
+ mutex_lock(&dev->lock);
-static int piu_i2c_write(struct i2c_client *client, uint32_t addr, uint32_t value) {
- int i, ret;
- if ( client == NULL ) {
- return -1;
+ if (dev->simulate_plug_out) {
+ ret = -1;
+ goto out;
}
- for (i = 0; i < I2C_ADDRESS_SIZE; i++) {
- if ((ret = i2c_smbus_write_byte_data(client, I2C_ADDRESS_ADDRESS[i], (addr >> ((I2C_ADDRESS_SIZE - 1 - i)*8)) & 0xff)) < 0) {
- return ret;
+
+ switch (dev->type) {
+ case PIU_TYPE_ACO:
+ if (dev->simulate_cfp2_plug_out && (addr & ACO_PIU_CFP2_OFFSET)) {
+ ret = -1;
+ goto out;
}
- }
- for (i = 0; i < I2C_ADDRESS_SIZE; i++) {
- if ((ret = i2c_smbus_write_byte_data(client, I2C_DATA_ADDRESS[i], (value >> ((I2C_ADDRESS_SIZE - 1 - i)*8)) & 0xff)) < 0) {
- return ret;
+ ret = aco_piu_i2c_write(dev->client, addr, value);
+ break;
+ case PIU_TYPE_DCO:
+ if (dev->simulate_cfp2_plug_out && (addr & DCO_PIU_CFP2_OFFSET)) {
+ ret = -1;
+ goto out;
}
+ case PIU_TYPE_QSFP28:
+ ret = dco_piu_i2c_write(dev->dco_client, addr, value);
+ break;
+ default:
+ printk("write for type 0x%x is not supported\n", dev->type);
+ ret = -1;
}
- if ((ret = i2c_smbus_write_byte_data(client, I2C_TRIGGER_ADDRESS, I2C_TRIGGER_WRITE)) < 0) {
- return ret;
- }
- return piu_i2c_wait_ready(client);
+
+out:
+ mutex_unlock(&dev->lock);
+ return ret;
}
long piu_ioctl(struct file *filp, unsigned int cmd, unsigned long arg) {
- struct piu_data *dev = filp->private_data;
+ struct piu_dev *dev = filp->private_data;
long retval = 0;
struct piu_cmd data;
@@ -165,31 +473,31 @@ long piu_ioctl(struct file *filp, unsigned int cmd, unsigned long arg) {
goto done;
}
- mutex_lock(&dev->lock);
-
switch (cmd) {
case PIU_READ:
- if (piu_i2c_read(dev->client, data.reg, &data.val)) {
+ if (piu_i2c_read(dev, data.reg, &data.val)) {
retval = -EFAULT;
- goto err;
+ goto done;
}
if ( copy_to_user((int __user *)arg, &data, sizeof(data)) ) {
retval = -EFAULT;
- goto err;
+ goto done;
}
break;
case PIU_WRITE:
- if (piu_i2c_write(dev->client, data.reg, data.val)) {
+ if (piu_i2c_write(dev, data.reg, data.val)) {
retval = -EFAULT;
- goto err;
+ goto done;
}
break;
+ case PIU_INIT:
+ // update the piu type
+ get_piu_type(dev, NULL);
+ break;
default:
retval = -ENOTTY;
break;
}
-err:
- mutex_unlock(&dev->lock);
done:
return retval;
@@ -201,8 +509,9 @@ int piu_close(struct inode *inode, struct file *filp) {
}
int piu_open(struct inode *inode, struct file *filp) {
- struct piu_data *priv = container_of(inode->i_cdev, struct piu_data, cdev);
- printk("open\n");
+ struct piu_dev *priv = container_of(inode->i_cdev, struct piu_dev, cdev);
+ enum piu_type type = get_piu_type(priv, NULL);
+ printk("open: piu-type: 0x%x\n", type);
filp->private_data = priv;
return 0;
}
@@ -239,10 +548,35 @@ I2C_DEV_ID(piu8),
{ /* LIST END */ }
};
+static ssize_t eeprom_bin_read(struct file *filp, struct kobject *kobj,
+ struct bin_attribute *attr, char *buf, loff_t off,
+ size_t count) {
+ struct device *dev = container_of(kobj, struct device, kobj);
+ struct piu_dev *piu = dev->driver_data;
+ int value, i;
+ uint32_t offset;
+ enum piu_type type;
+ type = get_piu_type(piu, &value);
+ offset = &piu->eeprom[0] == attr ? QSFP28_1_DEV_ADDR_OFFSET : QSFP28_2_DEV_ADDR_OFFSET;
+ if ( type != PIU_TYPE_QSFP28 ) {
+ return -EIO;
+ }
+
+ for ( i = off; i < off + count; i++ ) {
+ uint32_t v;
+ if ( piu_i2c_read(piu, offset | i, &v) < 0 ) {
+ return -EIO;
+ }
+ buf[i] = v;
+ }
+
+ return count;
+}
+
/* Platform dependent +++ */
static int piu_device_probe(struct i2c_client *client, const struct i2c_device_id *dev_id) {
int ret = 0;
- struct piu_data *data = NULL;
+ struct piu_dev *data = NULL;
printk("addr: 0x%x\n", client->addr);
@@ -264,6 +598,9 @@ static int piu_device_probe(struct i2c_client *client, const struct i2c_device_i
mutex_init(&data->lock);
data->port = dev_id->driver_data;
data->client = client;
+ data->dco_client = i2c_new_dummy_device(client->adapter, client->addr + 1);
+ data->simulate_plug_out = false;
+ data->simulate_cfp2_plug_out = false;
cdev_init(&data->cdev, &piu_fops);
data->cdev.owner = THIS_MODULE;
@@ -279,6 +616,21 @@ static int piu_device_probe(struct i2c_client *client, const struct i2c_device_i
goto err_dev_create;
}
+ {
+ char buf[32];
+ int i;
+
+ for ( i = 0; i < 2; i++ ) {
+ sysfs_bin_attr_init(data->eeprom[i]);
+ scnprintf(buf, 32, "qsfp28_%d_eeprom", i+1);
+ data->eeprom[i].attr.name = buf;
+ data->eeprom[i].attr.mode = S_IRUGO;
+ data->eeprom[i].read = eeprom_bin_read;
+ data->eeprom[i].size = QSFP28_EEPROM_SIZE;
+ sysfs_create_bin_file(&data->dev->kobj, &data->eeprom[i]);
+ }
+ }
+
printk("piu driver(major: %d, minor: %d) installed.\n", MAJOR(piu_devt), data->port);
return ret;
@@ -294,10 +646,11 @@ err_sysfs_create:
static int piu_device_remove(struct i2c_client *client) {
int ret = 0;
- struct piu_data *data = i2c_get_clientdata(client);
+ struct piu_dev *data = i2c_get_clientdata(client);
device_destroy(piu_sysfs_class, data->dev->devt);
cdev_del(&data->cdev);
sysfs_remove_group(&client->dev.kobj, &piu_dev_group);
+ i2c_unregister_device(data->dco_client);
kfree(data);
return ret;
}
diff --git a/packages/base/any/python3.10/APKG.yml b/packages/base/any/python3.10/APKG.yml
new file mode 100644
index 0000000..dc760aa
--- /dev/null
+++ b/packages/base/any/python3.10/APKG.yml
@@ -0,0 +1,12 @@
+packages:
+ - name: python3.10
+ arch: $ARCH
+ version: 3.10.0
+ maintainer: goldstone-nos@googlegroups.com
+ summary: Python3.10
+ after-install: $X1/packages/base/any/python3.10/after-install.sh
+ files:
+ builds/python: /usr/local/bin/python
+ builds/pip: /usr/local/bin/pip
+ builds/python3.10: /usr/local/lib/python3.10
+ builds/libpython3.10.so.1.0: /usr/local/lib/libpython3.10.so.1.0
diff --git a/packages/base/any/python3.10/Makefile b/packages/base/any/python3.10/Makefile
new file mode 100644
index 0000000..dc1e7b8
--- /dev/null
+++ b/packages/base/any/python3.10/Makefile
@@ -0,0 +1 @@
+include $(ONL)/make/pkg.mk
diff --git a/packages/base/any/python3.10/after-install.sh b/packages/base/any/python3.10/after-install.sh
new file mode 100644
index 0000000..1365705
--- /dev/null
+++ b/packages/base/any/python3.10/after-install.sh
@@ -0,0 +1,5 @@
+#!/bin/sh
+
+set -eux
+
+python -m pip install --upgrade pip
diff --git a/packages/base/any/python3.10/builds/Makefile b/packages/base/any/python3.10/builds/Makefile
new file mode 100644
index 0000000..20a8d13
--- /dev/null
+++ b/packages/base/any/python3.10/builds/Makefile
@@ -0,0 +1,15 @@
+IMAGE_NAME ?= python:3-slim-buster
+
+all: python pip python3.10 libpython3.10.so.1.0
+
+python:
+ docker run --rm -v `pwd`:/data -w /data --platform linux/$(ARCH) $(IMAGE_NAME) cp /usr/local/bin/$@ $@
+
+pip:
+ docker run --rm -v `pwd`:/data -w /data --platform linux/$(ARCH) $(IMAGE_NAME) cp /usr/local/bin/$@ $@
+
+python3.10:
+ docker run --rm -v `pwd`:/data -w /data --platform linux/$(ARCH) $(IMAGE_NAME) cp -r /usr/local/lib/$@ $@
+
+libpython3.10.so.1.0:
+ docker run --rm -v `pwd`:/data -w /data --platform linux/$(ARCH) $(IMAGE_NAME) cp -r /usr/local/lib/$@ $@
diff --git a/packages/base/any/snmp/APKG.yml b/packages/base/any/snmp/APKG.yml
new file mode 100644
index 0000000..2d0a2d9
--- /dev/null
+++ b/packages/base/any/snmp/APKG.yml
@@ -0,0 +1,15 @@
+packages:
+ - name: gs-snmp
+ arch: $ARCH
+ version: 1.0.0
+ maintainer: goldstone-nos@googlegroups.com
+ summary: Goldstone SNMP server
+ after-install: $X1/packages/base/any/snmp/after-install.sh
+ before-remove: $X1/packages/base/any/snmp/before-remove.sh
+ depends:
+ - k3s
+ - gs-mgmt
+ files:
+ builds/manifests: /var/lib/gs-snmp/k8s
+ builds/gs-snmp-$ARCH.tar: /var/lib/rancher/k3s/agent/images/
+ $X1/packages/base/any/snmp/builds/gs-north-snmp.service: /etc/systemd/system/
diff --git a/packages/base/any/snmp/Makefile b/packages/base/any/snmp/Makefile
new file mode 100644
index 0000000..dc1e7b8
--- /dev/null
+++ b/packages/base/any/snmp/Makefile
@@ -0,0 +1 @@
+include $(ONL)/make/pkg.mk
diff --git a/packages/base/any/snmp/after-install.sh b/packages/base/any/snmp/after-install.sh
new file mode 100644
index 0000000..31e9eb1
--- /dev/null
+++ b/packages/base/any/snmp/after-install.sh
@@ -0,0 +1,5 @@
+#!/bin/sh
+
+set -eux
+
+systemctl enable gs-north-snmp.service
diff --git a/packages/base/any/snmp/before-remove.sh b/packages/base/any/snmp/before-remove.sh
new file mode 100644
index 0000000..966d09c
--- /dev/null
+++ b/packages/base/any/snmp/before-remove.sh
@@ -0,0 +1,6 @@
+#!/bin/sh
+
+set -eux
+
+systemctl disable gs-north-snmp.service
+systemctl stop gs-north-snmp.service
diff --git a/packages/base/any/snmp/builds/.gitignore b/packages/base/any/snmp/builds/.gitignore
new file mode 100644
index 0000000..d874ad6
--- /dev/null
+++ b/packages/base/any/snmp/builds/.gitignore
@@ -0,0 +1 @@
+*.tar
diff --git a/packages/base/any/snmp/builds/Makefile b/packages/base/any/snmp/builds/Makefile
new file mode 100644
index 0000000..ca88523
--- /dev/null
+++ b/packages/base/any/snmp/builds/Makefile
@@ -0,0 +1,18 @@
+include $(X1)/make/mgmt.mk
+
+TEMPLATE_DIR ?= $(X1)/packages/base/any/snmp/builds/templates
+
+IMAGE_TAG ?= $(GS_MGMT_VERSION)
+IMAGES ?= snmpd north-snmp
+SNMP_IMAGES ?= $(addsuffix :$(IMAGE_TAG),$(addprefix $(GS_MGMT_IMAGE_REPO)/,$(IMAGES)))
+
+.PHONY: gs-snmp-$(ARCH).tar
+
+.DEFAULT_GOAL := all
+
+all: gs-snmp-$(ARCH).tar manifests
+
+gs-snmp-$(ARCH).tar:
+ echo $(SNMP_IMAGES)
+ for image in $(SNMP_IMAGES); do docker pull --platform=linux/$(ARCH) $$image; done
+ docker save $(SNMP_IMAGES) > $@
diff --git a/packages/base/any/snmp/builds/gs-north-snmp.service b/packages/base/any/snmp/builds/gs-north-snmp.service
new file mode 100644
index 0000000..086c607
--- /dev/null
+++ b/packages/base/any/snmp/builds/gs-north-snmp.service
@@ -0,0 +1,15 @@
+[Unit]
+Description=Goldstone Management North SNMP Daemon
+After=gs-mgmt-south.target
+PartOf=gs-mgmt-north.target gs-mgmt.target
+
+[Service]
+Type=oneshot
+ExecStartPre=/bin/sh -c 'while [ true ]; do ( kubectl get nodes | grep " Ready" ) && exit 0; sleep 1; done'
+ExecStart=/usr/bin/gs-mgmt.py start north-snmp --manifest-dir /var/lib/gs-snmp/k8s
+ExecStop=-/usr/bin/gs-mgmt.py stop north-snmp --manifest-dir /var/lib/gs-snmp/k8s
+RemainAfterExit=true
+StandardOutput=journal
+
+[Install]
+WantedBy=gs-mgmt-north.target
diff --git a/packages/base/any/snmp/builds/templates/snmp.yaml b/packages/base/any/snmp/builds/templates/snmp.yaml
new file mode 100644
index 0000000..713ec78
--- /dev/null
+++ b/packages/base/any/snmp/builds/templates/snmp.yaml
@@ -0,0 +1,79 @@
+apiVersion: v1
+kind: ConfigMap
+metadata:
+ name: snmpd-config
+ labels:
+ gs-mgmt: north-snmp
+data:
+ snmpd.conf: |
+ rwuser admin noauth
+ rouser user noauth
+ rwcommunity admin
+ rocommunity user
+ master agentx
+ agentxsocket tcp:localhost:3161
+
+---
+apiVersion: v1
+kind: Service
+metadata:
+ name: north-snmp
+ labels:
+ gs-mgmt: north-snmp
+spec:
+ type: LoadBalancer
+ selector:
+ app: north-snmp
+ ports:
+ - port: 161
+ targetPort: 161
+ protocol: UDP
+ name: snmp
+
+---
+
+apiVersion: apps/v1
+kind: DaemonSet
+metadata:
+ name: north-snmp
+ labels:
+ app: gs-mgmt
+ gs-mgmt: north-snmp
+spec:
+ selector:
+ matchLabels:
+ app: north-snmp
+ template:
+ metadata:
+ labels:
+ app: north-snmp
+ spec:
+ containers:
+ - name: snmpd
+ image: MGMT_IMAGE_REPO/snmpd:IMAGE_TAG
+ imagePullPolicy: IfNotPresent
+ ports:
+ - containerPort: 161
+ command: ['snmpd', '-f', '-C', '-c', '/etc/snmp/snmpd.conf']
+ volumeMounts:
+ - name: snmpd-config
+ mountPath: /etc/snmp
+ - name: agentx
+ image: MGMT_IMAGE_REPO/north-snmp:IMAGE_TAG
+ imagePullPolicy: IfNotPresent
+ command: ['gsnorthd-snmp', '-v']
+ volumeMounts:
+ - name: shm
+ mountPath: /dev/shm
+ - name: sysrepo
+ mountPath: /var/lib/sysrepo
+ volumes:
+ - name: shm
+ hostPath:
+ path: /dev/shm
+ - name: sysrepo
+ hostPath:
+ path: /var/lib/sysrepo
+ - name: snmpd-config
+ configMap:
+ name: snmpd-config
diff --git a/packages/base/any/stern/APKG.yml b/packages/base/any/stern/APKG.yml
new file mode 100644
index 0000000..4706307
--- /dev/null
+++ b/packages/base/any/stern/APKG.yml
@@ -0,0 +1,10 @@
+packages:
+ - name: stern
+ arch: $ARCH
+ version: 1.0.0
+ maintainer: goldstone-nos@googlegroups.com
+ summary: stern
+ depends:
+ - k3s
+ files:
+ builds/stern: /usr/local/bin/stern
diff --git a/packages/base/any/stern/Makefile b/packages/base/any/stern/Makefile
new file mode 100644
index 0000000..dc1e7b8
--- /dev/null
+++ b/packages/base/any/stern/Makefile
@@ -0,0 +1 @@
+include $(ONL)/make/pkg.mk
diff --git a/packages/base/any/stern/builds/.gitignore b/packages/base/any/stern/builds/.gitignore
new file mode 100644
index 0000000..574b945
--- /dev/null
+++ b/packages/base/any/stern/builds/.gitignore
@@ -0,0 +1 @@
+stern
diff --git a/packages/base/any/stern/builds/Makefile b/packages/base/any/stern/builds/Makefile
new file mode 100644
index 0000000..dcdc1ec
--- /dev/null
+++ b/packages/base/any/stern/builds/Makefile
@@ -0,0 +1,11 @@
+STERN_VERSION = 1.20.0
+
+ifndef ARCH
+$(error $$ARCH not set)
+endif
+
+stern:
+ wget -O tmp.tar.gz https://github.com/stern/stern/releases/download/v1.20.0/stern_$(STERN_VERSION)_linux_$(ARCH).tar.gz
+ tar xf tmp.tar.gz --strip-components 1
+ chmod +x $@
+ rm -rf LICENSE tmp.tar.gz
diff --git a/packages/base/any/tai/APKG.yml b/packages/base/any/tai/APKG.yml
new file mode 100644
index 0000000..51c7ed4
--- /dev/null
+++ b/packages/base/any/tai/APKG.yml
@@ -0,0 +1,19 @@
+packages:
+ - name: gs-tai
+ arch: $ARCH
+ version: 1.0.0
+ maintainer: goldstone-nos@googlegroups.com
+ summary: Goldstone TAI package
+ after-install: $X1/packages/base/any/tai/after-install.sh
+ before-remove: $X1/packages/base/any/tai/before-remove.sh
+ depends:
+ - k3s
+ files:
+ builds/tai-$ARCH.tar: /var/lib/rancher/k3s/agent/images/
+ builds/manifests: /var/lib/tai/k8s
+ $X1/packages/base/any/tai/builds/manifests: /var/lib/tai/k8s/base
+ $X1/packages/base/any/tai/builds/tai.service: /etc/systemd/system/
+ $X1/packages/base/any/tai/builds/tai.sh: /usr/bin/
+ builds/bin: /var/lib/tai/lib
+ links:
+ /var/lib/tai/lib/libtai.so: $DEFAULT_LIBTAI
diff --git a/packages/base/any/tai/Makefile b/packages/base/any/tai/Makefile
new file mode 100644
index 0000000..dc1e7b8
--- /dev/null
+++ b/packages/base/any/tai/Makefile
@@ -0,0 +1 @@
+include $(ONL)/make/pkg.mk
diff --git a/packages/base/any/tai/after-install.sh b/packages/base/any/tai/after-install.sh
new file mode 100644
index 0000000..5e5f490
--- /dev/null
+++ b/packages/base/any/tai/after-install.sh
@@ -0,0 +1,6 @@
+#!/bin/sh
+
+set -eux
+
+systemctl enable tai.service
+ldconfig -n /var/lib/tai/lib
diff --git a/packages/base/any/tai/before-remove.sh b/packages/base/any/tai/before-remove.sh
new file mode 100644
index 0000000..89f4164
--- /dev/null
+++ b/packages/base/any/tai/before-remove.sh
@@ -0,0 +1,6 @@
+#!/bin/sh
+
+set -eux
+
+systemctl disable tai.service
+systemctl stop tai.service
diff --git a/packages/base/any/tai/builds/.dockerignore b/packages/base/any/tai/builds/.dockerignore
new file mode 100644
index 0000000..72e8ffc
--- /dev/null
+++ b/packages/base/any/tai/builds/.dockerignore
@@ -0,0 +1 @@
+*
diff --git a/packages/base/any/tai/builds/.gitignore b/packages/base/any/tai/builds/.gitignore
new file mode 100644
index 0000000..d874ad6
--- /dev/null
+++ b/packages/base/any/tai/builds/.gitignore
@@ -0,0 +1 @@
+*.tar
diff --git a/packages/base/any/tai/builds/Dockerfile b/packages/base/any/tai/builds/Dockerfile
new file mode 100644
index 0000000..99bf31d
--- /dev/null
+++ b/packages/base/any/tai/builds/Dockerfile
@@ -0,0 +1,9 @@
+# syntax=docker/dockerfile:experimental
+ARG BASE
+
+FROM ${BASE}
+
+ARG TARGETARCH
+
+RUN --mount=type=cache,target=/var/cache/apt --mount=type=cache,target=/var/lib/apt,sharing=private \
+ if [ $TARGETARCH = amd64 ]; then apt update && DEBIAN_FRONTEND=noninteractive apt install -qy --no-install-recommends libi2c0; fi
diff --git a/packages/base/any/tai/builds/Makefile b/packages/base/any/tai/builds/Makefile
new file mode 100644
index 0000000..0f9c4de
--- /dev/null
+++ b/packages/base/any/tai/builds/Makefile
@@ -0,0 +1,31 @@
+IMAGE_REPO=docker.io/microsonic
+IMAGE_NAME ?= tai
+TAG=latest
+
+ANY_DIR ?= $(X1)/packages/base/any/tai/builds
+DOCKER_FILE ?= $(ANY_DIR)/Dockerfile
+
+ifndef ARCH
+$(error $$ARCH is not defined)
+endif
+
+ifndef TAI_LIBS
+$(error $$TAI_LIBS is not defined)
+endif
+
+LIB_DIR ?= lib
+LIBS := $(addprefix $(LIB_DIR)/,$(TAI_LIBS))
+
+BIN_DIR ?= bin
+
+all: $(LIBS) tai-$(ARCH).tar
+ rm -rf $(BIN_DIR)
+ mkdir $(BIN_DIR)
+ cp $(LIBS) $(BIN_DIR)
+
+tai-$(ARCH).tar: FORCE
+ docker pull --platform=linux/$(ARCH) $(IMAGE_REPO)/$(IMAGE_NAME):$(TAG)
+ DOCKER_BUILDKIT=1 docker build --build-arg BASE=$(IMAGE_REPO)/$(IMAGE_NAME):$(TAG) --platform linux/$(ARCH) -t $(IMAGE_NAME)-$(ARCH):$(TAG) -f $(DOCKER_FILE) .
+ docker save $(IMAGE_NAME)-$(ARCH):$(TAG) > $@
+
+FORCE:
diff --git a/packages/base/any/tai/builds/manifests/kustomization.yaml b/packages/base/any/tai/builds/manifests/kustomization.yaml
new file mode 100644
index 0000000..820f05d
--- /dev/null
+++ b/packages/base/any/tai/builds/manifests/kustomization.yaml
@@ -0,0 +1,3 @@
+resources:
+- tai.yaml
+- tai-service.yaml
diff --git a/packages/base/any/tai/builds/manifests/tai-service.yaml b/packages/base/any/tai/builds/manifests/tai-service.yaml
new file mode 100644
index 0000000..51b6354
--- /dev/null
+++ b/packages/base/any/tai/builds/manifests/tai-service.yaml
@@ -0,0 +1,10 @@
+apiVersion: v1
+kind: Service
+metadata:
+ name: taish-server
+spec:
+ selector:
+ app: tai
+ ports:
+ - protocol: TCP
+ port: 50051
diff --git a/packages/base/any/tai/builds/manifests/tai.yaml b/packages/base/any/tai/builds/manifests/tai.yaml
new file mode 100644
index 0000000..d215664
--- /dev/null
+++ b/packages/base/any/tai/builds/manifests/tai.yaml
@@ -0,0 +1,39 @@
+apiVersion: apps/v1
+kind: Deployment
+metadata:
+ name: tai
+spec:
+ replicas: 1
+ selector:
+ matchLabels:
+ app: tai
+ strategy:
+ type: Recreate
+ template:
+ metadata:
+ labels:
+ app: tai
+ spec:
+ containers:
+ - name: taish-server
+ image: tai:latest
+ imagePullPolicy: IfNotPresent
+ command: ['taish_server']
+ args: ['-v', '-n']
+ env:
+ - name: LD_LIBRARY_PATH
+ value: "/var/lib/tai"
+ volumeMounts:
+ - name: host-libtai
+ mountPath: /var/lib/tai
+ - name: tai-config
+ mountPath: /etc/tai
+ securityContext:
+ privileged: true
+ volumes:
+ - name: host-libtai
+ hostPath:
+ path: /var/lib/tai/lib
+ - name: tai-config
+ hostPath:
+ path: /var/lib/goldstone/device/current/tai
diff --git a/packages/base/any/tai/builds/tai.service b/packages/base/any/tai/builds/tai.service
new file mode 100644
index 0000000..a648be8
--- /dev/null
+++ b/packages/base/any/tai/builds/tai.service
@@ -0,0 +1,13 @@
+[Unit]
+Description=TAI shell service
+
+[Service]
+Type=oneshot
+ExecStartPre=/bin/sh -c 'while [ true ]; do ( kubectl get nodes | grep " Ready" ) && exit 0; sleep 1; done'
+ExecStart=/usr/bin/tai.sh start
+ExecStop=-/usr/bin/tai.sh stop
+RemainAfterExit=true
+StandardOutput=journal
+
+[Install]
+WantedBy=multi-user.target
diff --git a/packages/base/any/tai/builds/tai.sh b/packages/base/any/tai/builds/tai.sh
new file mode 100755
index 0000000..8c39b58
--- /dev/null
+++ b/packages/base/any/tai/builds/tai.sh
@@ -0,0 +1,26 @@
+#!/bin/bash
+
+set -eux
+
+start() {
+ kubectl apply -k /var/lib/tai/k8s
+ kubectl wait --for=condition=available deploy/tai
+ kubectl wait --for=condition=ready pod/$(kubectl get pod -l app=tai -o jsonpath='{.items[0].metadata.name}')
+}
+
+
+stop() {
+ pod=$(kubectl get pod -l app=tai -o jsonpath='{.items[0].metadata.name}' 2>/dev/null || echo 'dummy' )
+ kubectl delete --ignore-not-found -k /var/lib/tai/k8s
+ kubectl delete --ignore-not-found pods/$pod
+}
+
+case "$1" in
+ start|stop)
+ $1
+ ;;
+ *)
+ echo "Usage: $0 {start|stop}"
+ exit 1
+ ;;
+esac
diff --git a/packages/base/any/templates/goldstone-platform-config.yml b/packages/base/any/templates/goldstone-platform-config.yml
index 50366ec..9cd9a92 100644
--- a/packages/base/any/templates/goldstone-platform-config.yml
+++ b/packages/base/any/templates/goldstone-platform-config.yml
@@ -5,10 +5,7 @@ packages:
- name: goldstone-platform-config-$PLATFORM
arch: $ARCH
version: 1.0.0
- copyright: Copyright 2020 Wataru Ishida
- maintainer: wataru.ishid@gmail.com
- changelog: Initial
- support: wataru.ishid@gmail.com
+ maintainer: goldstone-nos@googlegroups.com
summary: Goldstone config file for $PLATFORM
files:
builds/sai.profile: /var/lib/goldstone/device/$PLATFORM/usonic/sai.profile
diff --git a/packages/base/any/xlate-oc/APKG.yml b/packages/base/any/xlate-oc/APKG.yml
new file mode 100644
index 0000000..de658dc
--- /dev/null
+++ b/packages/base/any/xlate-oc/APKG.yml
@@ -0,0 +1,16 @@
+packages:
+ - name: gs-xlate-oc
+ arch: $ARCH
+ version: 1.0.0
+ maintainer: goldstone-nos@googlegroups.com
+ summary: Goldstone OpenConfig Translator
+ after-install: $X1/packages/base/any/xlate-oc/after-install.sh
+ before-remove: $X1/packages/base/any/xlate-oc/before-remove.sh
+ depends:
+ - k3s
+ - gs-mgmt
+ files:
+ builds/gs-xlate-oc-$ARCH.tar: /var/lib/rancher/k3s/agent/images/
+ builds/manifests: /var/lib/gs-xlate-oc/k8s
+ $X1/packages/base/any/xlate-oc/builds/gs-xlate-oc.service: /etc/systemd/system/
+ $X1/packages/base/any/xlate-oc/builds/gs-xlate-oc-yang.service: /etc/systemd/system/
diff --git a/packages/base/any/xlate-oc/Makefile b/packages/base/any/xlate-oc/Makefile
new file mode 100644
index 0000000..dc1e7b8
--- /dev/null
+++ b/packages/base/any/xlate-oc/Makefile
@@ -0,0 +1 @@
+include $(ONL)/make/pkg.mk
diff --git a/packages/base/any/xlate-oc/after-install.sh b/packages/base/any/xlate-oc/after-install.sh
new file mode 100644
index 0000000..e7376ad
--- /dev/null
+++ b/packages/base/any/xlate-oc/after-install.sh
@@ -0,0 +1,5 @@
+#!/bin/sh
+
+set -eux
+
+systemctl enable gs-xlate-oc.service
diff --git a/packages/base/any/xlate-oc/before-remove.sh b/packages/base/any/xlate-oc/before-remove.sh
new file mode 100644
index 0000000..079e5e7
--- /dev/null
+++ b/packages/base/any/xlate-oc/before-remove.sh
@@ -0,0 +1,6 @@
+#!/bin/sh
+
+set -eux
+
+systemctl disable gs-xlate-oc.service
+systemctl stop gs-xlate-oc.service
diff --git a/packages/base/any/xlate-oc/builds/.gitignore b/packages/base/any/xlate-oc/builds/.gitignore
new file mode 100644
index 0000000..d874ad6
--- /dev/null
+++ b/packages/base/any/xlate-oc/builds/.gitignore
@@ -0,0 +1 @@
+*.tar
diff --git a/packages/base/any/xlate-oc/builds/Makefile b/packages/base/any/xlate-oc/builds/Makefile
new file mode 100644
index 0000000..ea25929
--- /dev/null
+++ b/packages/base/any/xlate-oc/builds/Makefile
@@ -0,0 +1,17 @@
+include $(X1)/make/mgmt.mk
+
+TEMPLATE_DIR ?= $(X1)/packages/base/any/xlate-oc/builds/templates
+
+IMAGE_TAG ?= $(GS_MGMT_VERSION)
+IMAGES ?= xlate-oc
+XLATE_OC_IMAGES ?= $(addsuffix :$(IMAGE_TAG),$(addprefix $(GS_MGMT_IMAGE_REPO)/,$(IMAGES)))
+
+.PHONY: gs-xlate-oc-$(ARCH).tar
+
+.DEFAULT_GOAL := all
+
+all: gs-xlate-oc-$(ARCH).tar manifests
+
+gs-xlate-oc-$(ARCH).tar:
+ for image in $(XLATE_OC_IMAGES); do docker pull --platform=linux/$(ARCH) $$image; done
+ docker save $(XLATE_OC_IMAGES) > $@
diff --git a/packages/base/any/xlate-oc/builds/gs-xlate-oc-yang.service b/packages/base/any/xlate-oc/builds/gs-xlate-oc-yang.service
new file mode 100644
index 0000000..1d31378
--- /dev/null
+++ b/packages/base/any/xlate-oc/builds/gs-xlate-oc-yang.service
@@ -0,0 +1,12 @@
+[Unit]
+Description=Goldstone Management Translate OpenConfig Daemon YANG model setup
+Before=gs-yang.service
+
+[Service]
+Type=oneshot
+ExecStart=/usr/bin/gs-yang.py --install xlate-oc
+RemainAfterExit=true
+StandardOutput=journal
+
+[Install]
+WantedBy=multi-user.target
diff --git a/packages/base/any/xlate-oc/builds/gs-xlate-oc.service b/packages/base/any/xlate-oc/builds/gs-xlate-oc.service
new file mode 100644
index 0000000..a5572c4
--- /dev/null
+++ b/packages/base/any/xlate-oc/builds/gs-xlate-oc.service
@@ -0,0 +1,16 @@
+[Unit]
+Description=Goldstone Management Translate OpenConfig Daemon
+After=gs-mgmt-south.target
+PartOf=gs-mgmt-xlate.target gs-mgmt.target
+
+[Service]
+Type=oneshot
+ExecStartPre=/bin/sh -c 'while [ true ]; do ( kubectl get nodes | grep " Ready" ) && exit 0; sleep 1; done'
+ExecStart=/usr/bin/gs-mgmt.py start xlate-oc --manifest-dir /var/lib/gs-xlate-oc/k8s
+ExecStop=-/usr/bin/gs-mgmt.py stop xlate-oc --manifest-dir /var/lib/gs-xlate-oc/k8s
+RemainAfterExit=true
+StandardOutput=journal
+
+[Install]
+WantedBy=gs-mgmt-xlate.target
+Also=gs-xlate-oc-yang.service
diff --git a/packages/base/any/xlate-oc/builds/templates/xlate-oc.yaml b/packages/base/any/xlate-oc/builds/templates/xlate-oc.yaml
new file mode 100644
index 0000000..620b1ae
--- /dev/null
+++ b/packages/base/any/xlate-oc/builds/templates/xlate-oc.yaml
@@ -0,0 +1,33 @@
+apiVersion: apps/v1
+kind: DaemonSet
+metadata:
+ name: xlate-oc
+ labels:
+ app: gs-mgmt
+ gs-mgmt: xlate-oc
+spec:
+ selector:
+ matchLabels:
+ app: xlate-oc
+ template:
+ metadata:
+ labels:
+ app: xlate-oc
+ spec:
+ containers:
+ - name: xlate-oc
+ image: MGMT_IMAGE_REPO/xlate-oc:IMAGE_TAG
+ imagePullPolicy: IfNotPresent
+ command: ['gsxlated-openconfig', '-v']
+ volumeMounts:
+ - name: shm
+ mountPath: /dev/shm
+ - name: sysrepo
+ mountPath: /var/lib/sysrepo
+ volumes:
+ - name: shm
+ hostPath:
+ path: /dev/shm
+ - name: sysrepo
+ hostPath:
+ path: /var/lib/sysrepo
diff --git a/packages/base/arm64/Makefile b/packages/base/arm64/Makefile
new file mode 100644
index 0000000..dc1e7b8
--- /dev/null
+++ b/packages/base/arm64/Makefile
@@ -0,0 +1 @@
+include $(ONL)/make/pkg.mk
diff --git a/packages/base/arm64/fit/Makefile b/packages/base/arm64/fit/Makefile
new file mode 100644
index 0000000..003238c
--- /dev/null
+++ b/packages/base/arm64/fit/Makefile
@@ -0,0 +1 @@
+include $(ONL)/make/pkg.mk
\ No newline at end of file
diff --git a/packages/base/arm64/fit/loader/Makefile b/packages/base/arm64/fit/loader/Makefile
new file mode 100644
index 0000000..003238c
--- /dev/null
+++ b/packages/base/arm64/fit/loader/Makefile
@@ -0,0 +1 @@
+include $(ONL)/make/pkg.mk
\ No newline at end of file
diff --git a/packages/base/arm64/fit/loader/PKG.yml b/packages/base/arm64/fit/loader/PKG.yml
new file mode 100644
index 0000000..1591d72
--- /dev/null
+++ b/packages/base/arm64/fit/loader/PKG.yml
@@ -0,0 +1 @@
+!include $X1/packages/base/any/fit/loader/APKG.yml ARCH=arm64
diff --git a/packages/base/arm64/fit/loader/builds/.gitignore b/packages/base/arm64/fit/loader/builds/.gitignore
new file mode 100644
index 0000000..bc29a25
--- /dev/null
+++ b/packages/base/arm64/fit/loader/builds/.gitignore
@@ -0,0 +1,5 @@
+kernel-*
+*.itb
+*.its
+loader-initrd-arm64
+manifest.json
diff --git a/packages/base/arm64/fit/loader/builds/Makefile b/packages/base/arm64/fit/loader/builds/Makefile
new file mode 100644
index 0000000..f16efec
--- /dev/null
+++ b/packages/base/arm64/fit/loader/builds/Makefile
@@ -0,0 +1,2 @@
+include $(X1)/make/config.arm64.mk
+include $(X1)/packages/base/any/fit/loader/builds/Makefile
diff --git a/packages/base/arm64/initrd/Makefile b/packages/base/arm64/initrd/Makefile
new file mode 100644
index 0000000..dc1e7b8
--- /dev/null
+++ b/packages/base/arm64/initrd/Makefile
@@ -0,0 +1 @@
+include $(ONL)/make/pkg.mk
diff --git a/packages/base/arm64/initrd/loader/Makefile b/packages/base/arm64/initrd/loader/Makefile
new file mode 100644
index 0000000..dc1e7b8
--- /dev/null
+++ b/packages/base/arm64/initrd/loader/Makefile
@@ -0,0 +1 @@
+include $(ONL)/make/pkg.mk
diff --git a/packages/base/arm64/initrd/loader/PKG.yml b/packages/base/arm64/initrd/loader/PKG.yml
new file mode 100644
index 0000000..f0e81e1
--- /dev/null
+++ b/packages/base/arm64/initrd/loader/PKG.yml
@@ -0,0 +1 @@
+!include $X1/packages/base/any/initrd/loader/APKG.yml ARCH=arm64
diff --git a/packages/base/arm64/initrd/loader/builds/.gitignore b/packages/base/arm64/initrd/loader/builds/.gitignore
new file mode 100644
index 0000000..bcaee90
--- /dev/null
+++ b/packages/base/arm64/initrd/loader/builds/.gitignore
@@ -0,0 +1,2 @@
+manifest.json
+zerotouch.json
diff --git a/packages/base/arm64/initrd/loader/builds/Makefile b/packages/base/arm64/initrd/loader/builds/Makefile
new file mode 100644
index 0000000..47c39d3
--- /dev/null
+++ b/packages/base/arm64/initrd/loader/builds/Makefile
@@ -0,0 +1,2 @@
+include $(X1)/make/config.arm64.mk
+include $(X1)/packages/base/any/initrd/loader/builds/Makefile
diff --git a/packages/base/arm64/k3s/Makefile b/packages/base/arm64/k3s/Makefile
new file mode 100644
index 0000000..dc1e7b8
--- /dev/null
+++ b/packages/base/arm64/k3s/Makefile
@@ -0,0 +1 @@
+include $(ONL)/make/pkg.mk
diff --git a/packages/base/arm64/k3s/PKG.yml b/packages/base/arm64/k3s/PKG.yml
new file mode 100644
index 0000000..3112030
--- /dev/null
+++ b/packages/base/arm64/k3s/PKG.yml
@@ -0,0 +1 @@
+!include $X1/packages/base/any/k3s/APKG.yml ARCH=arm64
diff --git a/packages/base/arm64/k3s/builds/Makefile b/packages/base/arm64/k3s/builds/Makefile
new file mode 100644
index 0000000..79e2af0
--- /dev/null
+++ b/packages/base/arm64/k3s/builds/Makefile
@@ -0,0 +1,4 @@
+K3S_DIGEST := 45677b6b9148737b517f3ab24b0c51510b9b2de1a7bd4d99374bc6053e15b7ac
+
+include $(X1)/make/config.arm64.mk
+include $(X1)/packages/base/any/k3s/builds/Makefile
diff --git a/packages/base/arm64/kernels/Makefile b/packages/base/arm64/kernels/Makefile
new file mode 100644
index 0000000..dc1e7b8
--- /dev/null
+++ b/packages/base/arm64/kernels/Makefile
@@ -0,0 +1 @@
+include $(ONL)/make/pkg.mk
diff --git a/packages/base/arm64/kernels/kernel-5.4-lts-arm64-all/Makefile b/packages/base/arm64/kernels/kernel-5.4-lts-arm64-all/Makefile
new file mode 100644
index 0000000..003238c
--- /dev/null
+++ b/packages/base/arm64/kernels/kernel-5.4-lts-arm64-all/Makefile
@@ -0,0 +1 @@
+include $(ONL)/make/pkg.mk
\ No newline at end of file
diff --git a/packages/base/arm64/kernels/kernel-5.4-lts-arm64-all/PKG.yml b/packages/base/arm64/kernels/kernel-5.4-lts-arm64-all/PKG.yml
new file mode 100644
index 0000000..9d36f5e
--- /dev/null
+++ b/packages/base/arm64/kernels/kernel-5.4-lts-arm64-all/PKG.yml
@@ -0,0 +1,29 @@
+variables:
+ basename: goldstone-kernel-5.4-lts-arm64-all
+
+common:
+ arch: arm64
+ version: 1.0.0
+ maintainer: goldstone-nos@googlegroups.com
+
+packages:
+ - name: $basename
+ version: 1.0.0
+ summary: Goldstone Kernel 5.4 for ARM64 Integrated Processor Platforms.
+ symlinks: True
+
+ files:
+ builds/kernel-5.4* : $$PKG_INSTALL/
+ builds/linux-5.4*-mbuild : $$PKG_INSTALL/mbuilds
+ builds/linux-5.4*-dtbs : $$PKG_INSTALL/dtbs
+
+ changelog: Change changes changes.,
+
+ - name: $basename-modules
+ version: 1.0.0
+ summary: Goldstone Kernel 5.4 LTS Kernel Modules for ARM64 Platforms
+
+ files:
+ builds/lib: /lib
+
+ changelog: Change changes changes.,
diff --git a/packages/base/arm64/kernels/kernel-5.4-lts-arm64-all/builds/.gitignore b/packages/base/arm64/kernels/kernel-5.4-lts-arm64-all/builds/.gitignore
new file mode 100644
index 0000000..90943b0
--- /dev/null
+++ b/packages/base/arm64/kernels/kernel-5.4-lts-arm64-all/builds/.gitignore
@@ -0,0 +1,3 @@
+kernel*
+linux*
+lib
diff --git a/packages/base/arm64/kernels/kernel-5.4-lts-arm64-all/builds/Makefile b/packages/base/arm64/kernels/kernel-5.4-lts-arm64-all/builds/Makefile
new file mode 100644
index 0000000..63d6020
--- /dev/null
+++ b/packages/base/arm64/kernels/kernel-5.4-lts-arm64-all/builds/Makefile
@@ -0,0 +1,15 @@
+# -*- Makefile -*-
+THIS_DIR := $(abspath $(dir $(lastword $(MAKEFILE_LIST))))
+
+include $(ONL)/make/config.arm64.mk
+
+K_TARGET_DIR := $(THIS_DIR)
+
+KERNEL_DIR ?= $(X1)/sm/linux-gft
+
+kernel:
+ $(MAKE) -C $(X1)/packages/base/any/kernels/5.4-lts/configs/arm64-all K_TARGET_DIR=$(K_TARGET_DIR) K_SOURCE_DIR=$(KERNEL_DIR) K_MBUILD_DIR=$(THIS_DIR)/linux-5.4-mbuild K_DTBS_DIR=$(THIS_DIR)/linux-5.4-dtbs $(ONL_MAKE_PARALLEL)
+ ARCH=$(ARCH) $(ONL)/tools/scripts/kmodbuild.sh $(KERNEL_DIR) "$(wildcard $(ONL)/packages/base/any/kernels/modules/optoe.c)" onl/onl/common
+
+clean:
+ rm -rf linux-5.4* kernel-* lib
diff --git a/packages/base/arm64/mgmt/Makefile b/packages/base/arm64/mgmt/Makefile
new file mode 100644
index 0000000..dc1e7b8
--- /dev/null
+++ b/packages/base/arm64/mgmt/Makefile
@@ -0,0 +1 @@
+include $(ONL)/make/pkg.mk
diff --git a/packages/base/arm64/mgmt/PKG.yml b/packages/base/arm64/mgmt/PKG.yml
new file mode 100644
index 0000000..bd39bf7
--- /dev/null
+++ b/packages/base/arm64/mgmt/PKG.yml
@@ -0,0 +1 @@
+!include $X1/packages/base/any/mgmt/APKG.yml ARCH=arm64
diff --git a/packages/base/arm64/mgmt/builds/.dockerignore b/packages/base/arm64/mgmt/builds/.dockerignore
new file mode 100644
index 0000000..72e8ffc
--- /dev/null
+++ b/packages/base/arm64/mgmt/builds/.dockerignore
@@ -0,0 +1 @@
+*
diff --git a/packages/base/arm64/mgmt/builds/.gitignore b/packages/base/arm64/mgmt/builds/.gitignore
new file mode 100644
index 0000000..88529a2
--- /dev/null
+++ b/packages/base/arm64/mgmt/builds/.gitignore
@@ -0,0 +1,5 @@
+*.tar
+*.deb
+*.whl
+*.yang
+manifests
diff --git a/packages/base/arm64/mgmt/builds/Makefile b/packages/base/arm64/mgmt/builds/Makefile
new file mode 100644
index 0000000..190d841
--- /dev/null
+++ b/packages/base/arm64/mgmt/builds/Makefile
@@ -0,0 +1,2 @@
+include $(X1)/make/config.arm64.mk
+include $(X1)/packages/base/any/mgmt/builds/Makefile
diff --git a/packages/base/arm64/mgmt/builds/templates/kustomization.yaml b/packages/base/arm64/mgmt/builds/templates/kustomization.yaml
new file mode 100644
index 0000000..2085b32
--- /dev/null
+++ b/packages/base/arm64/mgmt/builds/templates/kustomization.yaml
@@ -0,0 +1,9 @@
+bases:
+- base
+
+patches:
+- north-notif.yaml
+- south-onlp.yaml
+- south-gearbox.yaml
+- south-dpll.yaml
+- south-tai.yaml
diff --git a/packages/base/arm64/mgmt/builds/templates/north-notif.yaml b/packages/base/arm64/mgmt/builds/templates/north-notif.yaml
new file mode 100644
index 0000000..429d9bd
--- /dev/null
+++ b/packages/base/arm64/mgmt/builds/templates/north-notif.yaml
@@ -0,0 +1,10 @@
+apiVersion: apps/v1
+kind: DaemonSet
+metadata:
+ name: north-notif
+spec:
+ template:
+ spec:
+ containers:
+ - name: notif
+ image: MGMT_IMAGE_REPO/north-notif:IMAGE_TAG
diff --git a/packages/base/arm64/mgmt/builds/templates/south-dpll.yaml b/packages/base/arm64/mgmt/builds/templates/south-dpll.yaml
new file mode 100644
index 0000000..d5cb471
--- /dev/null
+++ b/packages/base/arm64/mgmt/builds/templates/south-dpll.yaml
@@ -0,0 +1,10 @@
+apiVersion: apps/v1
+kind: DaemonSet
+metadata:
+ name: south-dpll
+spec:
+ template:
+ spec:
+ containers:
+ - name: dpll
+ image: MGMT_IMAGE_REPO/south-dpll:IMAGE_TAG
diff --git a/packages/base/arm64/mgmt/builds/templates/south-gearbox.yaml b/packages/base/arm64/mgmt/builds/templates/south-gearbox.yaml
new file mode 100644
index 0000000..f18a5c8
--- /dev/null
+++ b/packages/base/arm64/mgmt/builds/templates/south-gearbox.yaml
@@ -0,0 +1,10 @@
+apiVersion: apps/v1
+kind: DaemonSet
+metadata:
+ name: south-gearbox
+spec:
+ template:
+ spec:
+ containers:
+ - name: gearbox
+ image: MGMT_IMAGE_REPO/south-gearbox:IMAGE_TAG
diff --git a/packages/base/arm64/mgmt/builds/templates/south-onlp.yaml b/packages/base/arm64/mgmt/builds/templates/south-onlp.yaml
new file mode 100644
index 0000000..7b085ad
--- /dev/null
+++ b/packages/base/arm64/mgmt/builds/templates/south-onlp.yaml
@@ -0,0 +1,23 @@
+apiVersion: apps/v1
+kind: DaemonSet
+metadata:
+ name: south-onlp
+spec:
+ template:
+ spec:
+ hostNetwork: true
+ containers:
+ - name: onlp
+ image: MGMT_IMAGE_REPO/south-onlp:IMAGE_TAG
+ volumeMounts:
+ - name: host-lib
+ mountPath: /lib/aarch64-linux-gnu/libonlp-platform.so
+ - name: host-i2c-lib
+ mountPath: /lib/aarch64-linux-gnu/libi2c.so.0
+ volumes:
+ - name: host-lib
+ hostPath:
+ path: /lib/aarch64-linux-gnu/libonlp-platform.so
+ - name: host-i2c-lib
+ hostPath:
+ path: /usr/lib/aarch64-linux-gnu/libi2c.so.0
diff --git a/packages/base/arm64/mgmt/builds/templates/south-tai.yaml b/packages/base/arm64/mgmt/builds/templates/south-tai.yaml
new file mode 100644
index 0000000..36eb990
--- /dev/null
+++ b/packages/base/arm64/mgmt/builds/templates/south-tai.yaml
@@ -0,0 +1,10 @@
+apiVersion: apps/v1
+kind: DaemonSet
+metadata:
+ name: south-tai
+spec:
+ template:
+ spec:
+ containers:
+ - name: tai
+ image: MGMT_IMAGE_REPO/south-tai:IMAGE_TAG
diff --git a/packages/base/arm64/netopeer2/Makefile b/packages/base/arm64/netopeer2/Makefile
new file mode 100644
index 0000000..dc1e7b8
--- /dev/null
+++ b/packages/base/arm64/netopeer2/Makefile
@@ -0,0 +1 @@
+include $(ONL)/make/pkg.mk
diff --git a/packages/base/arm64/netopeer2/PKG.yml b/packages/base/arm64/netopeer2/PKG.yml
new file mode 100644
index 0000000..343ce61
--- /dev/null
+++ b/packages/base/arm64/netopeer2/PKG.yml
@@ -0,0 +1 @@
+!include $X1/packages/base/any/netopeer2/APKG.yml ARCH=arm64
diff --git a/packages/base/arm64/netopeer2/builds/.gitignore b/packages/base/arm64/netopeer2/builds/.gitignore
new file mode 100644
index 0000000..0ba4042
--- /dev/null
+++ b/packages/base/arm64/netopeer2/builds/.gitignore
@@ -0,0 +1,4 @@
+*.tar
+scripts
+yang
+manifests
diff --git a/packages/base/arm64/netopeer2/builds/Makefile b/packages/base/arm64/netopeer2/builds/Makefile
new file mode 100644
index 0000000..e050adb
--- /dev/null
+++ b/packages/base/arm64/netopeer2/builds/Makefile
@@ -0,0 +1,2 @@
+include $(X1)/make/config.arm64.mk
+include $(X1)/packages/base/any/netopeer2/builds/Makefile
diff --git a/packages/base/arm64/python3.10/Makefile b/packages/base/arm64/python3.10/Makefile
new file mode 100644
index 0000000..dc1e7b8
--- /dev/null
+++ b/packages/base/arm64/python3.10/Makefile
@@ -0,0 +1 @@
+include $(ONL)/make/pkg.mk
diff --git a/packages/base/arm64/python3.10/PKG.yml b/packages/base/arm64/python3.10/PKG.yml
new file mode 100644
index 0000000..48b12ec
--- /dev/null
+++ b/packages/base/arm64/python3.10/PKG.yml
@@ -0,0 +1 @@
+!include $X1/packages/base/any/python3.10/APKG.yml ARCH=arm64
diff --git a/packages/base/arm64/python3.10/builds/.gitignore b/packages/base/arm64/python3.10/builds/.gitignore
new file mode 100644
index 0000000..e801f2b
--- /dev/null
+++ b/packages/base/arm64/python3.10/builds/.gitignore
@@ -0,0 +1,4 @@
+libpython3.10.so.1.0
+pip
+python
+python3.10
diff --git a/packages/base/arm64/python3.10/builds/Makefile b/packages/base/arm64/python3.10/builds/Makefile
new file mode 100644
index 0000000..e3a4b7f
--- /dev/null
+++ b/packages/base/arm64/python3.10/builds/Makefile
@@ -0,0 +1,2 @@
+include $(X1)/make/config.arm64.mk
+include $(X1)/packages/base/any/python3.10/builds/Makefile
diff --git a/packages/base/arm64/snmp/Makefile b/packages/base/arm64/snmp/Makefile
new file mode 100644
index 0000000..dc1e7b8
--- /dev/null
+++ b/packages/base/arm64/snmp/Makefile
@@ -0,0 +1 @@
+include $(ONL)/make/pkg.mk
diff --git a/packages/base/arm64/snmp/PKG.yml b/packages/base/arm64/snmp/PKG.yml
new file mode 100644
index 0000000..bc0123a
--- /dev/null
+++ b/packages/base/arm64/snmp/PKG.yml
@@ -0,0 +1 @@
+!include $X1/packages/base/any/snmp/APKG.yml ARCH=arm64
diff --git a/packages/base/arm64/snmp/builds/.gitignore b/packages/base/arm64/snmp/builds/.gitignore
new file mode 100644
index 0000000..8e3b1b3
--- /dev/null
+++ b/packages/base/arm64/snmp/builds/.gitignore
@@ -0,0 +1,2 @@
+*.tar
+manifests
diff --git a/packages/base/arm64/snmp/builds/Makefile b/packages/base/arm64/snmp/builds/Makefile
new file mode 100644
index 0000000..7b5b26d
--- /dev/null
+++ b/packages/base/arm64/snmp/builds/Makefile
@@ -0,0 +1,2 @@
+include $(X1)/make/config.arm64.mk
+include $(X1)/packages/base/any/snmp/builds/Makefile
diff --git a/packages/base/arm64/stern/Makefile b/packages/base/arm64/stern/Makefile
new file mode 100644
index 0000000..dc1e7b8
--- /dev/null
+++ b/packages/base/arm64/stern/Makefile
@@ -0,0 +1 @@
+include $(ONL)/make/pkg.mk
diff --git a/packages/base/arm64/stern/PKG.yml b/packages/base/arm64/stern/PKG.yml
new file mode 100644
index 0000000..3d679b1
--- /dev/null
+++ b/packages/base/arm64/stern/PKG.yml
@@ -0,0 +1 @@
+!include $X1/packages/base/any/stern/APKG.yml ARCH=arm64
diff --git a/packages/base/arm64/stern/builds/.gitignore b/packages/base/arm64/stern/builds/.gitignore
new file mode 100644
index 0000000..c8b7006
--- /dev/null
+++ b/packages/base/arm64/stern/builds/.gitignore
@@ -0,0 +1,3 @@
+stern
+LICENSE
+*.tar.gz
diff --git a/packages/base/arm64/stern/builds/Makefile b/packages/base/arm64/stern/builds/Makefile
new file mode 100644
index 0000000..4a33176
--- /dev/null
+++ b/packages/base/arm64/stern/builds/Makefile
@@ -0,0 +1,2 @@
+include $(X1)/make/config.arm64.mk
+include $(X1)/packages/base/any/stern/builds/Makefile
diff --git a/packages/base/arm64/tai-dpll/Makefile b/packages/base/arm64/tai-dpll/Makefile
new file mode 100644
index 0000000..dc1e7b8
--- /dev/null
+++ b/packages/base/arm64/tai-dpll/Makefile
@@ -0,0 +1 @@
+include $(ONL)/make/pkg.mk
diff --git a/packages/base/arm64/tai-dpll/PKG.yml b/packages/base/arm64/tai-dpll/PKG.yml
new file mode 100644
index 0000000..ba9b1b7
--- /dev/null
+++ b/packages/base/arm64/tai-dpll/PKG.yml
@@ -0,0 +1,21 @@
+variables:
+ VERSION: 0.4.0
+
+packages:
+ - name: gs-tai-dpll
+ arch: arm64
+ version: $VERSION
+ maintainer: goldstone-nos@googlegroups.com
+ summary: TAI for DPLL
+ before-remove: $__DIR__/before-remove.sh
+ depends:
+ - k3s
+ - gs-tai
+ files:
+ builds/manifests: /var/lib/tai-dpll/k8s
+ builds/tai-dpll.service: /etc/systemd/system/
+ builds/tai-dpll.sh: /usr/bin/
+ builds/libtai-dpll.so.$VERSION: /var/lib/tai-dpll/
+ links:
+ /var/lib/tai-dpll/libtai-dpll.so: libtai-dpll.so.$VERSION
+ /var/lib/tai-dpll/libtai.so: libtai-dpll.so
diff --git a/packages/base/arm64/tai-dpll/before-remove.sh b/packages/base/arm64/tai-dpll/before-remove.sh
new file mode 100644
index 0000000..68d6257
--- /dev/null
+++ b/packages/base/arm64/tai-dpll/before-remove.sh
@@ -0,0 +1,6 @@
+#!/bin/sh
+
+set -eux
+
+systemctl disable tai-dpll.service
+systemctl stop tai-dpll.service
diff --git a/packages/base/arm64/tai-dpll/builds/.gitignore b/packages/base/arm64/tai-dpll/builds/.gitignore
new file mode 100644
index 0000000..d874ad6
--- /dev/null
+++ b/packages/base/arm64/tai-dpll/builds/.gitignore
@@ -0,0 +1 @@
+*.tar
diff --git a/packages/base/arm64/tai-dpll/builds/Makefile b/packages/base/arm64/tai-dpll/builds/Makefile
new file mode 100644
index 0000000..c5d094c
--- /dev/null
+++ b/packages/base/arm64/tai-dpll/builds/Makefile
@@ -0,0 +1,8 @@
+VERSION := 0.4.0
+
+LIBS := libtai-dpll.so.$(VERSION)
+
+all: $(LIBS)
+
+$(LIBS):
+ oras pull ghcr.io/oopt-goldstone/libtai-dpll:0.4.0@sha256:a269786fcf5e95141867ebea697eaafac7aeb513975d2aed7ee2c6a9b729f2de
diff --git a/packages/base/arm64/tai-dpll/builds/manifests/kustomization.yaml b/packages/base/arm64/tai-dpll/builds/manifests/kustomization.yaml
new file mode 100644
index 0000000..820f05d
--- /dev/null
+++ b/packages/base/arm64/tai-dpll/builds/manifests/kustomization.yaml
@@ -0,0 +1,3 @@
+resources:
+- tai.yaml
+- tai-service.yaml
diff --git a/packages/base/arm64/tai-dpll/builds/manifests/tai-service.yaml b/packages/base/arm64/tai-dpll/builds/manifests/tai-service.yaml
new file mode 100644
index 0000000..a67186c
--- /dev/null
+++ b/packages/base/arm64/tai-dpll/builds/manifests/tai-service.yaml
@@ -0,0 +1,10 @@
+apiVersion: v1
+kind: Service
+metadata:
+ name: tai-dpll
+spec:
+ selector:
+ app: tai-dpll
+ ports:
+ - protocol: TCP
+ port: 50051
diff --git a/packages/base/arm64/tai-dpll/builds/manifests/tai.yaml b/packages/base/arm64/tai-dpll/builds/manifests/tai.yaml
new file mode 100644
index 0000000..2b7dbae
--- /dev/null
+++ b/packages/base/arm64/tai-dpll/builds/manifests/tai.yaml
@@ -0,0 +1,34 @@
+apiVersion: apps/v1
+kind: Deployment
+metadata:
+ name: tai-dpll
+spec:
+ replicas: 1
+ selector:
+ matchLabels:
+ app: tai-dpll
+ strategy:
+ type: Recreate
+ template:
+ metadata:
+ labels:
+ app: tai-dpll
+ spec:
+ containers:
+ - name: taish-server
+ image: tai-arm64:latest
+ imagePullPolicy: IfNotPresent
+ command: ['taish_server']
+ args: ['-v']
+ env:
+ - name: LD_LIBRARY_PATH
+ value: "/var/lib/tai"
+ volumeMounts:
+ - name: host-libtai
+ mountPath: /var/lib/tai
+ securityContext:
+ privileged: true
+ volumes:
+ - name: host-libtai
+ hostPath:
+ path: /var/lib/tai-dpll/
diff --git a/packages/base/arm64/tai-dpll/builds/tai-dpll.service b/packages/base/arm64/tai-dpll/builds/tai-dpll.service
new file mode 100644
index 0000000..55b2ec1
--- /dev/null
+++ b/packages/base/arm64/tai-dpll/builds/tai-dpll.service
@@ -0,0 +1,13 @@
+[Unit]
+Description=TAI DPLL shell service
+
+[Service]
+Type=oneshot
+ExecStartPre=/bin/sh -c 'while [ true ]; do ( kubectl get nodes | grep " Ready" ) && exit 0; sleep 1; done'
+ExecStart=/usr/bin/tai-dpll.sh start
+ExecStop=-/usr/bin/tai-dpll.sh stop
+RemainAfterExit=true
+StandardOutput=journal
+
+[Install]
+WantedBy=multi-user.target
diff --git a/packages/base/arm64/tai-dpll/builds/tai-dpll.sh b/packages/base/arm64/tai-dpll/builds/tai-dpll.sh
new file mode 100755
index 0000000..78973ae
--- /dev/null
+++ b/packages/base/arm64/tai-dpll/builds/tai-dpll.sh
@@ -0,0 +1,25 @@
+#!/bin/bash
+
+set -eux
+
+start() {
+ kubectl apply -k /var/lib/tai-dpll/k8s
+ kubectl wait --for=condition=ready pod/$(kubectl get pod -l app=tai-dpll -o jsonpath='{.items[0].metadata.name}')
+}
+
+
+stop() {
+ pod=$(kubectl get pod -l app=tai-dpll -o jsonpath='{.items[0].metadata.name}' 2>/dev/null || echo 'dummy' )
+ kubectl delete --ignore-not-found -k /var/lib/tai-dpll/k8s
+ kubectl delete --ignore-not-found pods/$pod
+}
+
+case "$1" in
+ start|stop)
+ $1
+ ;;
+ *)
+ echo "Usage: $0 {start|stop}"
+ exit 1
+ ;;
+esac
diff --git a/packages/base/arm64/tai-gearbox/Makefile b/packages/base/arm64/tai-gearbox/Makefile
new file mode 100644
index 0000000..dc1e7b8
--- /dev/null
+++ b/packages/base/arm64/tai-gearbox/Makefile
@@ -0,0 +1 @@
+include $(ONL)/make/pkg.mk
diff --git a/packages/base/arm64/tai-gearbox/PKG.yml b/packages/base/arm64/tai-gearbox/PKG.yml
new file mode 100644
index 0000000..bfacfbe
--- /dev/null
+++ b/packages/base/arm64/tai-gearbox/PKG.yml
@@ -0,0 +1,24 @@
+variables:
+ VERSION: 0.5.0
+
+packages:
+ - name: gs-tai-gearbox
+ arch: arm64
+ version: $VERSION
+ maintainer: goldstone-nos@googlegroups.com
+ summary: TAI shell server
+ after-install: $__DIR__/after-install.sh
+ before-remove: $__DIR__/before-remove.sh
+ depends:
+ - k3s
+ - gs-tai
+ files:
+ builds/manifests: /var/lib/tai-gearbox/k8s
+ builds/tai-gearbox.service: /etc/systemd/system/
+ builds/tai-gearbox.sh: /usr/bin/
+ builds/libtai-mdx1.so.$VERSION: /var/lib/tai-gearbox/
+ builds/mdx1_fw_app_revb.mem.$VERSION: /var/lib/tai-gearbox/
+ links:
+ /var/lib/tai-gearbox/libtai-mdx1.so: libtai-mdx1.so.$VERSION
+ /var/lib/tai-gearbox/libtai.so: libtai-mdx1.so
+ /var/lib/tai-gearbox/mdx1_fw_app_revb.mem: mdx1_fw_app_revb.mem.$VERSION
diff --git a/packages/base/arm64/tai-gearbox/after-install.sh b/packages/base/arm64/tai-gearbox/after-install.sh
new file mode 100644
index 0000000..28f51bf
--- /dev/null
+++ b/packages/base/arm64/tai-gearbox/after-install.sh
@@ -0,0 +1,5 @@
+#!/bin/sh
+
+set -eux
+
+systemctl enable tai-gearbox.service
diff --git a/packages/base/arm64/tai-gearbox/before-remove.sh b/packages/base/arm64/tai-gearbox/before-remove.sh
new file mode 100644
index 0000000..8e47fa6
--- /dev/null
+++ b/packages/base/arm64/tai-gearbox/before-remove.sh
@@ -0,0 +1,6 @@
+#!/bin/sh
+
+set -eux
+
+systemctl disable tai-gearbox.service
+systemctl stop tai-gearbox.service
diff --git a/packages/base/arm64/tai-gearbox/builds/.gitignore b/packages/base/arm64/tai-gearbox/builds/.gitignore
new file mode 100644
index 0000000..d874ad6
--- /dev/null
+++ b/packages/base/arm64/tai-gearbox/builds/.gitignore
@@ -0,0 +1 @@
+*.tar
diff --git a/packages/base/arm64/tai-gearbox/builds/Makefile b/packages/base/arm64/tai-gearbox/builds/Makefile
new file mode 100644
index 0000000..08e90dd
--- /dev/null
+++ b/packages/base/arm64/tai-gearbox/builds/Makefile
@@ -0,0 +1,10 @@
+VERSION := 0.5.0
+DIGEST := 3987ada8df076e6d7352c8d5212dbd2131b4e3f3c8d9cc79d6600a0fcee87cb2
+
+LIBS := libtai-mdx1.so.$(VERSION) mdx1_fw_app_revb.mem.$(VERSION)
+
+all: $(LIBS)
+
+$(LIBS):
+ oras pull ghcr.io/oopt-goldstone/libtai-mdx1:$(VERSION)@sha256:$(DIGEST)
+ tar xvf libtai-mdx1_$(VERSION)_linux_arm64.tar
diff --git a/packages/base/arm64/tai-gearbox/builds/manifests/kustomization.yaml b/packages/base/arm64/tai-gearbox/builds/manifests/kustomization.yaml
new file mode 100644
index 0000000..820f05d
--- /dev/null
+++ b/packages/base/arm64/tai-gearbox/builds/manifests/kustomization.yaml
@@ -0,0 +1,3 @@
+resources:
+- tai.yaml
+- tai-service.yaml
diff --git a/packages/base/arm64/tai-gearbox/builds/manifests/tai-service.yaml b/packages/base/arm64/tai-gearbox/builds/manifests/tai-service.yaml
new file mode 100644
index 0000000..609ea8d
--- /dev/null
+++ b/packages/base/arm64/tai-gearbox/builds/manifests/tai-service.yaml
@@ -0,0 +1,10 @@
+apiVersion: v1
+kind: Service
+metadata:
+ name: tai-gearbox
+spec:
+ selector:
+ app: tai-gearbox
+ ports:
+ - protocol: TCP
+ port: 50051
diff --git a/packages/base/arm64/tai-gearbox/builds/manifests/tai.yaml b/packages/base/arm64/tai-gearbox/builds/manifests/tai.yaml
new file mode 100644
index 0000000..d65b90d
--- /dev/null
+++ b/packages/base/arm64/tai-gearbox/builds/manifests/tai.yaml
@@ -0,0 +1,39 @@
+apiVersion: apps/v1
+kind: Deployment
+metadata:
+ name: tai-gearbox
+spec:
+ replicas: 1
+ selector:
+ matchLabels:
+ app: tai-gearbox
+ strategy:
+ type: Recreate
+ template:
+ metadata:
+ labels:
+ app: tai-gearbox
+ spec:
+ containers:
+ - name: taish-server
+ image: tai-arm64:latest
+ imagePullPolicy: IfNotPresent
+ command: ['taish_server']
+ args: ['-v']
+ env:
+ - name: LD_LIBRARY_PATH
+ value: "/var/lib/tai"
+ volumeMounts:
+ - name: host-libtai
+ mountPath: /var/lib/tai
+ - name: tai-config
+ mountPath: /etc/tai
+ securityContext:
+ privileged: true
+ volumes:
+ - name: host-libtai
+ hostPath:
+ path: /var/lib/tai-gearbox/
+ - name: tai-config
+ hostPath:
+ path: /var/lib/goldstone/device/current/tai-gearbox
diff --git a/packages/base/arm64/tai-gearbox/builds/tai-gearbox.service b/packages/base/arm64/tai-gearbox/builds/tai-gearbox.service
new file mode 100644
index 0000000..55ccf4a
--- /dev/null
+++ b/packages/base/arm64/tai-gearbox/builds/tai-gearbox.service
@@ -0,0 +1,13 @@
+[Unit]
+Description=TAI Gearbox shell service
+
+[Service]
+Type=oneshot
+ExecStartPre=/bin/sh -c 'while [ true ]; do ( kubectl get nodes | grep " Ready" ) && exit 0; sleep 1; done'
+ExecStart=/usr/bin/tai-gearbox.sh start
+ExecStop=-/usr/bin/tai-gearbox.sh stop
+RemainAfterExit=true
+StandardOutput=journal
+
+[Install]
+WantedBy=multi-user.target
diff --git a/packages/base/arm64/tai-gearbox/builds/tai-gearbox.sh b/packages/base/arm64/tai-gearbox/builds/tai-gearbox.sh
new file mode 100755
index 0000000..995f6ae
--- /dev/null
+++ b/packages/base/arm64/tai-gearbox/builds/tai-gearbox.sh
@@ -0,0 +1,25 @@
+#!/bin/bash
+
+set -eux
+
+start() {
+ kubectl apply -k /var/lib/tai-gearbox/k8s
+ kubectl wait --for=condition=ready pod/$(kubectl get pod -l app=tai-gearbox -o jsonpath='{.items[0].metadata.name}')
+}
+
+
+stop() {
+ pod=$(kubectl get pod -l app=tai-gearbox -o jsonpath='{.items[0].metadata.name}' 2>/dev/null || echo 'dummy' )
+ kubectl delete --ignore-not-found -k /var/lib/tai-gearbox/k8s
+ kubectl delete --ignore-not-found pods/$pod
+}
+
+case "$1" in
+ start|stop)
+ $1
+ ;;
+ *)
+ echo "Usage: $0 {start|stop}"
+ exit 1
+ ;;
+esac
diff --git a/packages/base/arm64/tai/Makefile b/packages/base/arm64/tai/Makefile
new file mode 100644
index 0000000..dc1e7b8
--- /dev/null
+++ b/packages/base/arm64/tai/Makefile
@@ -0,0 +1 @@
+include $(ONL)/make/pkg.mk
diff --git a/packages/base/arm64/tai/PKG.yml b/packages/base/arm64/tai/PKG.yml
new file mode 100644
index 0000000..c528c22
--- /dev/null
+++ b/packages/base/arm64/tai/PKG.yml
@@ -0,0 +1 @@
+!include $X1/packages/base/any/tai/APKG.yml ARCH=arm64 DEFAULT_LIBTAI=libtai-mux.so.0.5.0
diff --git a/packages/base/arm64/tai/builds/.gitignore b/packages/base/arm64/tai/builds/.gitignore
new file mode 100644
index 0000000..d874ad6
--- /dev/null
+++ b/packages/base/arm64/tai/builds/.gitignore
@@ -0,0 +1 @@
+*.tar
diff --git a/packages/base/arm64/tai/builds/Makefile b/packages/base/arm64/tai/builds/Makefile
new file mode 100644
index 0000000..58a925c
--- /dev/null
+++ b/packages/base/arm64/tai/builds/Makefile
@@ -0,0 +1,16 @@
+TAI_LIBS := libtai-ldc.so.0.5.0 libtai-menara.so.0.5.0 libtai-lumentum.so.0.5.0 libtai-mux.so.0.5.0
+
+include $(X1)/make/config.arm64.mk
+include $(X1)/packages/base/any/tai/builds/Makefile
+
+$(LIB_DIR)/libtai-ldc.so.0.5.0:
+ oras pull -o $(LIB_DIR) ghcr.io/oopt-goldstone/libtai-ldc:0.5.0@sha256:b9c8614170fe777574d02827a043b89cb30a292141440513cb74be3dc028c578
+
+$(LIB_DIR)/libtai-menara.so.0.5.0:
+ oras pull -o $(LIB_DIR) ghcr.io/oopt-goldstone/libtai-menara:0.5.0@sha256:d17c36374ecd510f589289729d93f9d71e4966e0f7e7f8fb2edf9f2cfe9ca37f
+
+$(LIB_DIR)/libtai-lumentum.so.0.5.0:
+ oras pull -o $(LIB_DIR) ghcr.io/oopt-goldstone/libtai-lumentum:0.5.0@sha256:38940e833c76eb8765555e32cf3fd97c0afd83097ca25b3dd544878e7b875c80
+
+$(LIB_DIR)/libtai-mux.so.0.5.0:
+ oras pull -o $(LIB_DIR) ghcr.io/oopt-goldstone/libtai-mux:0.5.0@sha256:083dea313596db52b7485fdb62d690d23b8f87817957d970a7037341292f455b
diff --git a/packages/base/arm64/tai/builds/manifests/kustomization.yaml b/packages/base/arm64/tai/builds/manifests/kustomization.yaml
new file mode 100644
index 0000000..da10e6f
--- /dev/null
+++ b/packages/base/arm64/tai/builds/manifests/kustomization.yaml
@@ -0,0 +1,5 @@
+bases:
+- base
+
+patches:
+- tai.yaml
diff --git a/packages/base/arm64/tai/builds/manifests/tai.yaml b/packages/base/arm64/tai/builds/manifests/tai.yaml
new file mode 100644
index 0000000..fefa130
--- /dev/null
+++ b/packages/base/arm64/tai/builds/manifests/tai.yaml
@@ -0,0 +1,22 @@
+apiVersion: apps/v1
+kind: Deployment
+metadata:
+ name: tai
+spec:
+ template:
+ spec:
+ containers:
+ - name: taish-server
+ image: tai-arm64:latest
+ env:
+ - name: TAI_MUX_PLATFORM_ADAPTER
+ value: "exec"
+ - name: TAI_MUX_EXEC_SCRIPT
+ value: "/etc/tai/mux/exec.py"
+ volumeMounts:
+ - name: sys
+ mountPath: /sys
+ volumes:
+ - name: sys
+ hostPath:
+ path: /sys
diff --git a/packages/base/arm64/xlate-oc/Makefile b/packages/base/arm64/xlate-oc/Makefile
new file mode 100644
index 0000000..dc1e7b8
--- /dev/null
+++ b/packages/base/arm64/xlate-oc/Makefile
@@ -0,0 +1 @@
+include $(ONL)/make/pkg.mk
diff --git a/packages/base/arm64/xlate-oc/PKG.yml b/packages/base/arm64/xlate-oc/PKG.yml
new file mode 100644
index 0000000..0b686c3
--- /dev/null
+++ b/packages/base/arm64/xlate-oc/PKG.yml
@@ -0,0 +1 @@
+!include $X1/packages/base/any/xlate-oc/APKG.yml ARCH=arm64
diff --git a/packages/base/arm64/xlate-oc/builds/.gitignore b/packages/base/arm64/xlate-oc/builds/.gitignore
new file mode 100644
index 0000000..8e3b1b3
--- /dev/null
+++ b/packages/base/arm64/xlate-oc/builds/.gitignore
@@ -0,0 +1,2 @@
+*.tar
+manifests
diff --git a/packages/base/arm64/xlate-oc/builds/Makefile b/packages/base/arm64/xlate-oc/builds/Makefile
new file mode 100644
index 0000000..9d0b7e5
--- /dev/null
+++ b/packages/base/arm64/xlate-oc/builds/Makefile
@@ -0,0 +1,2 @@
+include $(X1)/make/config.arm64.mk
+include $(X1)/packages/base/any/xlate-oc/builds/Makefile
diff --git a/packages/platforms/accton/x86-64/as7716-24sc/goldstone-module/Makefile b/packages/platforms/accton/x86-64/as7716-24sc/goldstone-module/Makefile
new file mode 100644
index 0000000..dc1e7b8
--- /dev/null
+++ b/packages/platforms/accton/x86-64/as7716-24sc/goldstone-module/Makefile
@@ -0,0 +1 @@
+include $(ONL)/make/pkg.mk
diff --git a/packages/platforms/accton/x86-64/as7716-24sc/goldstone-module/PKG.yml b/packages/platforms/accton/x86-64/as7716-24sc/goldstone-module/PKG.yml
new file mode 100644
index 0000000..2f7c475
--- /dev/null
+++ b/packages/platforms/accton/x86-64/as7716-24sc/goldstone-module/PKG.yml
@@ -0,0 +1,12 @@
+variables:
+ ARCH: amd64
+ BASENAME: x86-64-accton-as7716-24sc
+ REVISION: r0
+ PLATFORM: $BASENAME-$REVISION
+
+packages:
+ - name: goldstone-module-$PLATFORM
+ arch: $ARCH
+ version: 1.0.0
+ maintainer: goldstone-nos@googlegroups.com
+ summary: Goldstone module for $PLATFORM
diff --git a/packages/platforms/accton/x86-64/as7716-24xc/goldstone-module/Makefile b/packages/platforms/accton/x86-64/as7716-24xc/goldstone-module/Makefile
new file mode 100644
index 0000000..dc1e7b8
--- /dev/null
+++ b/packages/platforms/accton/x86-64/as7716-24xc/goldstone-module/Makefile
@@ -0,0 +1 @@
+include $(ONL)/make/pkg.mk
diff --git a/packages/platforms/accton/x86-64/as7716-24xc/goldstone-module/PKG.yml b/packages/platforms/accton/x86-64/as7716-24xc/goldstone-module/PKG.yml
new file mode 100644
index 0000000..f79c5d1
--- /dev/null
+++ b/packages/platforms/accton/x86-64/as7716-24xc/goldstone-module/PKG.yml
@@ -0,0 +1,12 @@
+variables:
+ ARCH: amd64
+ BASENAME: x86-64-accton-as7716-24xc
+ REVISION: r0
+ PLATFORM: $BASENAME-$REVISION
+
+packages:
+ - name: goldstone-module-$PLATFORM
+ arch: $ARCH
+ version: 1.0.0
+ maintainer: goldstone-nos@googlegroups.com
+ summary: Goldstone module for $PLATFORM
diff --git a/packages/platforms/vs/goldstone-module/Makefile b/packages/platforms/vs/goldstone-module/Makefile
new file mode 100644
index 0000000..dc1e7b8
--- /dev/null
+++ b/packages/platforms/vs/goldstone-module/Makefile
@@ -0,0 +1 @@
+include $(ONL)/make/pkg.mk
diff --git a/packages/platforms/vs/goldstone-module/PKG.yml b/packages/platforms/vs/goldstone-module/PKG.yml
new file mode 100644
index 0000000..0b5353b
--- /dev/null
+++ b/packages/platforms/vs/goldstone-module/PKG.yml
@@ -0,0 +1,9 @@
+variables:
+ PLATFORM: vs
+
+packages:
+ - name: goldstone-module-$PLATFORM
+ arch: all
+ version: 1.0.0
+ maintainer: goldstone-nos@googlegroups.com
+ summary: Goldstone module for $PLATFORM
diff --git a/packages/platforms/vs/goldstone-platform-config/PKG.yml b/packages/platforms/vs/goldstone-platform-config/PKG.yml
index fea1a0c..b8a46db 100644
--- a/packages/platforms/vs/goldstone-platform-config/PKG.yml
+++ b/packages/platforms/vs/goldstone-platform-config/PKG.yml
@@ -3,12 +3,9 @@ variables:
packages:
- name: goldstone-platform-config-vs
- arch: amd64
+ arch: all
version: 1.0.0
- copyright: Copyright 2020 Wataru Ishida
- maintainer: wataru.ishid@gmail.com
- changelog: Initial
- support: wataru.ishid@gmail.com
+ maintainer: goldstone-nos@googlegroups.com
summary: Goldstone config file for virtual switch
files:
builds/sai.profile: /var/lib/goldstone/device/$PLATFORM/usonic/sai.profile
diff --git a/packages/platforms/wistron/Makefile b/packages/platforms/wistron/Makefile
new file mode 100644
index 0000000..dc1e7b8
--- /dev/null
+++ b/packages/platforms/wistron/Makefile
@@ -0,0 +1 @@
+include $(ONL)/make/pkg.mk
diff --git a/packages/platforms/wistron/arm64/Makefile b/packages/platforms/wistron/arm64/Makefile
new file mode 100644
index 0000000..dc1e7b8
--- /dev/null
+++ b/packages/platforms/wistron/arm64/Makefile
@@ -0,0 +1 @@
+include $(ONL)/make/pkg.mk
diff --git a/packages/platforms/wistron/arm64/wtp-01-c1-00/Makefile b/packages/platforms/wistron/arm64/wtp-01-c1-00/Makefile
new file mode 100644
index 0000000..003238c
--- /dev/null
+++ b/packages/platforms/wistron/arm64/wtp-01-c1-00/Makefile
@@ -0,0 +1 @@
+include $(ONL)/make/pkg.mk
\ No newline at end of file
diff --git a/packages/platforms/wistron/arm64/wtp-01-c1-00/goldstone-module/Makefile b/packages/platforms/wistron/arm64/wtp-01-c1-00/goldstone-module/Makefile
new file mode 100644
index 0000000..dc1e7b8
--- /dev/null
+++ b/packages/platforms/wistron/arm64/wtp-01-c1-00/goldstone-module/Makefile
@@ -0,0 +1 @@
+include $(ONL)/make/pkg.mk
diff --git a/packages/platforms/wistron/arm64/wtp-01-c1-00/goldstone-module/PKG.yml b/packages/platforms/wistron/arm64/wtp-01-c1-00/goldstone-module/PKG.yml
new file mode 100644
index 0000000..5a1ad91
--- /dev/null
+++ b/packages/platforms/wistron/arm64/wtp-01-c1-00/goldstone-module/PKG.yml
@@ -0,0 +1,18 @@
+prerequisites:
+ packages:
+ - goldstone-kernel-5.4-lts-arm64-all:arm64
+
+variables:
+ ARCH: arm64
+ BASENAME: arm64-wistron-wtp-01-c1-00
+ REVISION: r0
+ PLATFORM: $BASENAME-$REVISION
+
+packages:
+ - name: goldstone-module-$PLATFORM
+ arch: $ARCH
+ version: 1.0.0
+ maintainer: goldstone-nos@googlegroups.com
+ summary: Goldstone module for $PLATFORM
+ files:
+ builds/lib: lib
diff --git a/packages/platforms/wistron/arm64/wtp-01-c1-00/goldstone-module/builds/Makefile b/packages/platforms/wistron/arm64/wtp-01-c1-00/goldstone-module/builds/Makefile
new file mode 100644
index 0000000..c335694
--- /dev/null
+++ b/packages/platforms/wistron/arm64/wtp-01-c1-00/goldstone-module/builds/Makefile
@@ -0,0 +1,6 @@
+all:
+ $(RM) -r lib
+ $(MAKE) -C cfp2
+ cp -r cfp2/lib .
+ $(MAKE) -C dpll
+ cp -r dpll/lib .
diff --git a/packages/platforms/wistron/arm64/wtp-01-c1-00/goldstone-module/builds/cfp2/Kbuild b/packages/platforms/wistron/arm64/wtp-01-c1-00/goldstone-module/builds/cfp2/Kbuild
new file mode 100644
index 0000000..5268b41
--- /dev/null
+++ b/packages/platforms/wistron/arm64/wtp-01-c1-00/goldstone-module/builds/cfp2/Kbuild
@@ -0,0 +1,13 @@
+THIS_DIR := $(abspath $(dir $(lastword $(MAKEFILE_LIST))))
+
+NAME ?= arm64-wistron-wtp-01-c1-00-cfp2
+
+SOURCES := main.c
+
+obj-m := $(NAME).o
+
+$(NAME)-y := $(SOURCES:.c=.o)
+
+ccflags-y := -I$(X1)/sm/linux-gft/drivers/net/ethernet
+
+# vim: ft=make
diff --git a/packages/platforms/wistron/arm64/wtp-01-c1-00/goldstone-module/builds/cfp2/Makefile b/packages/platforms/wistron/arm64/wtp-01-c1-00/goldstone-module/builds/cfp2/Makefile
new file mode 100644
index 0000000..8eb8b32
--- /dev/null
+++ b/packages/platforms/wistron/arm64/wtp-01-c1-00/goldstone-module/builds/cfp2/Makefile
@@ -0,0 +1,24 @@
+# -*- Makefile -*-
+############################################################
+export OUTPUT_DIR := $(abspath $(dir $(lastword $(MAKEFILE_LIST))))
+export KERNEL := goldstone-kernel-5.4-lts-arm64-all:arm64
+
+include $(X1)/make/config.arm64.mk
+
+MODULE_DIR ?= $(OUTPUT_DIR)
+
+KBUILD ?= $(shell $(ONL)/tools/onlpm.py --find-dir $(KERNEL) mbuilds)
+
+ifndef INSTALL_MOD_PATH
+INSTALL_MOD_PATH := $(OUTPUT_DIR)
+endif
+
+all:
+ $(RM) -r $(OUTPUT_DIR)/lib
+ test -d $(KBUILD)
+ $(MAKE) -C $(KBUILD) M=$(MODULE_DIR) modules
+ $(MAKE) -C $(KBUILD) M=$(MODULE_DIR) INSTALL_MOD_PATH=$(INSTALL_MOD_PATH) INSTALL_MOD_DIR=$(INSTALL_MOD_DIR) modules_install
+ sudo $(RM) $(shell find $(OUTPUT_DIR)/lib -name \*modules\* -type f)
+
+clean:
+ $(MAKE) -C $(KBUILD) M=$(MODULE_DIR) clean
diff --git a/packages/platforms/wistron/arm64/wtp-01-c1-00/goldstone-module/builds/cfp2/main.c b/packages/platforms/wistron/arm64/wtp-01-c1-00/goldstone-module/builds/cfp2/main.c
new file mode 100644
index 0000000..fa23546
--- /dev/null
+++ b/packages/platforms/wistron/arm64/wtp-01-c1-00/goldstone-module/builds/cfp2/main.c
@@ -0,0 +1,327 @@
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include "freescale/enetc/enetc.h"
+
+#include
+
+struct cfp2dco_cmd {
+ unsigned int reg;
+ unsigned int offset;
+ unsigned int val;
+};
+
+#define IOC_MAGIC 'p'
+
+#define CFP2DCO_READ _IOWR(IOC_MAGIC, 1, struct cfp2dco_cmd)
+#define CFP2DCO_WRITE _IOWR(IOC_MAGIC, 2, struct cfp2dco_cmd)
+
+static struct class *cfp2dco_sysfs_class = NULL;
+static dev_t cfp2dco_devt;
+
+#define CFP2DCO_NUM 4
+
+#define CFP2_MODULE_TEMP 0xb02f
+#define CFP2_TX_LASER_TEMP 0xb340
+#define CFP2_RX_LASER_TEMP 0xb380
+#define CFP2_VENDOR_NAME 0x8021
+#define CFP2_PART_NUMBER 0x8034
+#define CFP2_SERIAL_NUMBER 0x8044
+
+struct cfp2dco_dev {
+ int port;
+ bool simulate_plug_out;
+ struct cdev cdev;
+ struct device *dev;
+};
+
+static struct cfp2dco_dev cfp2dco_devs[CFP2DCO_NUM];
+
+static int cfp2dco_read(struct cfp2dco_dev *dev, uint32_t addr, uint32_t *value) {
+ int regnum = MII_ADDR_C45 | (1 << 16) | addr;
+
+ if (dev->simulate_plug_out) {
+ return -1;
+ }
+ mutex_lock(&mdio_demo->mdio_lock);
+ *value = mdio_demo->read(mdio_demo, dev->port-1, regnum);
+ mutex_unlock(&mdio_demo->mdio_lock);
+ return 0;
+}
+
+static int cfp2dco_write(struct cfp2dco_dev *dev, uint32_t addr, uint32_t value) {
+ int regnum = MII_ADDR_C45 | (1 << 16) | addr;
+ int ret;
+
+ if (dev->simulate_plug_out) {
+ return -1;
+ }
+ mutex_lock(&mdio_demo->mdio_lock);
+ ret = mdio_demo->write(mdio_demo, dev->port-1, regnum, value);
+ mutex_unlock(&mdio_demo->mdio_lock);
+ return ret;
+}
+
+static ssize_t index_show(struct device *dev, struct device_attribute *da, char *buf) {
+ struct cfp2dco_dev *priv = dev_get_drvdata(dev);
+ return scnprintf(buf, PAGE_SIZE, "%d\n", priv->port);
+}
+static DEVICE_ATTR_RO(index);
+
+static ssize_t cfp2_string_show(struct device *dev, uint32_t addr, ssize_t size, struct device_attribute *da, char *buf) {
+ struct cfp2dco_dev *priv = dev_get_drvdata(dev);
+ int i;
+ for ( i = 0; i < size; i++ ) {
+ cfp2dco_read(priv, addr + i, (uint32_t*)&buf[i]);
+ }
+ while (i >= 0 && (isspace(buf[i]) || buf[i] == 0 || buf[i] == 0xff)) {
+ buf[i--] = 0;
+ }
+ if (i < 0) {
+ return 0;
+ }
+ buf[i+1] = '\n';
+ return i+2;
+}
+
+static ssize_t vendor_show(struct device *dev, struct device_attribute *da, char *buf) {
+ return cfp2_string_show(dev, CFP2_VENDOR_NAME, 16, da, buf);
+}
+static DEVICE_ATTR_RO(vendor);
+
+static ssize_t part_number_show(struct device *dev, struct device_attribute *da, char *buf) {
+ return cfp2_string_show(dev, CFP2_PART_NUMBER, 16, da, buf);
+}
+static DEVICE_ATTR_RO(part_number);
+
+static ssize_t serial_number_show(struct device *dev, struct device_attribute *da, char *buf) {
+ return cfp2_string_show(dev, CFP2_SERIAL_NUMBER, 16, da, buf);
+}
+static DEVICE_ATTR_RO(serial_number);
+
+static ssize_t oui_show(struct device *dev, struct device_attribute *da, char *buf) {
+ struct cfp2dco_dev *priv = dev_get_drvdata(dev);
+ uint32_t oui, data;
+ cfp2dco_read(priv, 0x8031, (uint32_t*)&data);
+ oui = (data &= 0xff) << 8;
+ cfp2dco_read(priv, 0x8032, (uint32_t*)&data);
+ oui = (oui | (data &= 0xff)) << 8;
+ cfp2dco_read(priv, 0x8033, (uint32_t*)&data);
+ oui = (oui | (data &= 0xff));
+ return scnprintf(buf, PAGE_SIZE, "%d\n", oui);
+}
+static DEVICE_ATTR_RO(oui);
+
+static ssize_t firmware_version_show(struct device *dev, struct device_attribute *da, char *buf) {
+ struct cfp2dco_dev *priv = dev_get_drvdata(dev);
+ uint32_t data[2];
+ cfp2dco_read(priv, 0x806C, &data[0]);
+ cfp2dco_read(priv, 0x806D, &data[1]);
+ return scnprintf(buf, PAGE_SIZE, "%d.%d\n", data[0] & 0xff, data[1] & 0xff);
+}
+static DEVICE_ATTR_RO(firmware_version);
+
+static ssize_t cfp2_temp_show(struct device *dev, uint32_t addr, struct device_attribute *da, char *buf) {
+ struct cfp2dco_dev *priv = dev_get_drvdata(dev);
+ int32_t temp = 0;
+ cfp2dco_read(priv, addr, (uint32_t*)&temp);
+ return scnprintf(buf, PAGE_SIZE, "%d.%d\n", temp/256, temp%256);
+}
+
+static ssize_t cage_temp_show(struct device *dev, struct device_attribute *da, char *buf) {
+ return cfp2_temp_show(dev, CFP2_MODULE_TEMP, da, buf);
+}
+static DEVICE_ATTR_RO(cage_temp);
+
+static ssize_t tx_laser_temp_show(struct device *dev, struct device_attribute *da, char *buf) {
+ return cfp2_temp_show(dev, CFP2_TX_LASER_TEMP, da, buf);
+}
+static DEVICE_ATTR_RO(tx_laser_temp);
+
+static ssize_t rx_laser_temp_show(struct device *dev, struct device_attribute *da, char *buf) {
+ return cfp2_temp_show(dev, CFP2_RX_LASER_TEMP, da, buf);
+}
+static DEVICE_ATTR_RO(rx_laser_temp);
+
+static ssize_t simulate_plug_out_show(struct device *dev, struct device_attribute *da, char *buf) {
+ struct cfp2dco_dev *priv = dev_get_drvdata(dev);
+ if ( priv != NULL && priv->simulate_plug_out ) {
+ return scnprintf(buf, PAGE_SIZE, "1");
+ }
+ return scnprintf(buf, PAGE_SIZE, "0");
+}
+
+static ssize_t simulate_plug_out_store(struct device *dev, struct device_attribute *da, const char *buf, size_t count) {
+ struct cfp2dco_dev *priv = dev_get_drvdata(dev);
+ long value;
+
+ if (kstrtoul(buf, 0, &value))
+ return -EINVAL;
+
+ priv->simulate_plug_out = value > 0;
+ return count;
+}
+static DEVICE_ATTR_RW(simulate_plug_out);
+
+static struct attribute *cfp2dco_dev_attrs[] = {
+ &dev_attr_index.attr,
+ &dev_attr_vendor.attr,
+ &dev_attr_part_number.attr,
+ &dev_attr_serial_number.attr,
+ &dev_attr_oui.attr,
+ &dev_attr_firmware_version.attr,
+ &dev_attr_cage_temp.attr,
+ &dev_attr_tx_laser_temp.attr,
+ &dev_attr_rx_laser_temp.attr,
+ &dev_attr_simulate_plug_out.attr,
+ NULL
+};
+
+ATTRIBUTE_GROUPS(cfp2dco_dev);
+
+long cfp2dco_ioctl(struct file *filp, unsigned int cmd, unsigned long arg) {
+ struct cfp2dco_dev *dev = filp->private_data;
+ long retval = 0;
+ struct cfp2dco_cmd data;
+
+ if ( dev == NULL ) {
+ printk("dev is NULL\n");
+ return -EFAULT;
+ }
+ memset(&data, 0, sizeof(data));
+
+ if (!capable(CAP_SYS_ADMIN)) {
+ retval = -EPERM;
+ goto done;
+ }
+
+ if (!access_ok((void __user *)arg, _IOC_SIZE(cmd))) {
+ retval = -EFAULT;
+ goto done;
+ }
+
+ if (copy_from_user(&data, (int __user *)arg, sizeof(data))) {
+ retval = -EFAULT;
+ goto done;
+ }
+
+ switch (cmd) {
+ case CFP2DCO_READ:
+ if (cfp2dco_read(dev, data.reg, &data.val)) {
+ retval = -EFAULT;
+ goto done;
+ }
+ if ( copy_to_user((int __user *)arg, &data, sizeof(data)) ) {
+ retval = -EFAULT;
+ goto done;
+ }
+ break;
+ case CFP2DCO_WRITE:
+ if (cfp2dco_write(dev, data.reg, data.val)) {
+ retval = -EFAULT;
+ goto done;
+ }
+ break;
+ default:
+ retval = -ENOTTY;
+ break;
+ }
+
+done:
+ return retval;
+}
+
+int cfp2dco_close(struct inode *inode, struct file *filp) {
+ printk("cfp2dco close\n");
+ return 0;
+}
+
+int cfp2dco_open(struct inode *inode, struct file *filp) {
+ struct cfp2dco_dev *priv = container_of(inode->i_cdev, struct cfp2dco_dev, cdev);
+ printk("cfp2dco open: port %d\n", priv->port);
+ filp->private_data = priv;
+ return 0;
+}
+
+struct file_operations cfp2dco_fops = {
+ .owner = THIS_MODULE,
+ .open = cfp2dco_open,
+ .release = cfp2dco_close,
+ .unlocked_ioctl = cfp2dco_ioctl,
+};
+
+static int __init cfp2dco_init(void)
+{
+ int i;
+ int rc = alloc_chrdev_region(&cfp2dco_devt, 0, CFP2DCO_NUM, "cfp2dco");
+ if (rc) {
+ return rc;
+ }
+
+ cfp2dco_sysfs_class = class_create(THIS_MODULE, "cfp2dco");
+ if (IS_ERR(cfp2dco_sysfs_class)) {
+ printk("failed to create class CFP2DCO\n");
+ rc = PTR_ERR(cfp2dco_sysfs_class);
+ goto err_class_create;
+ }
+
+ for (i = 0; i < CFP2DCO_NUM; i++) {
+ struct cfp2dco_dev *dev = &cfp2dco_devs[i];
+ dev->simulate_plug_out = false;
+ cdev_init(&dev->cdev, &cfp2dco_fops);
+ dev->cdev.owner = THIS_MODULE;
+ dev->cdev.ops = &cfp2dco_fops;
+ dev->port = i+1;
+
+ rc = cdev_add(&dev->cdev, MKDEV(MAJOR(cfp2dco_devt), i), 1);
+ if (rc) {
+ goto err_cdev_add;
+ }
+
+ dev->dev = device_create_with_groups(cfp2dco_sysfs_class, NULL, MKDEV(MAJOR(cfp2dco_devt), i), dev, cfp2dco_dev_groups, "cfp2dco%d", dev->port);
+ if (IS_ERR(dev->dev)) {
+ rc = PTR_ERR(dev->dev);
+ goto err_dev_create;
+ }
+ printk("cfp2dco driver(major: %d, minor: %d) installed.\n", MAJOR(cfp2dco_devt), dev->port);
+ }
+
+ return rc;
+
+err_dev_create:
+ cdev_del(&cfp2dco_devs[i].cdev);
+err_cdev_add:
+ i--;
+ for (; i >= 0; i--) {
+ device_destroy(cfp2dco_sysfs_class, cfp2dco_devs[i].dev->devt);
+ cdev_del(&cfp2dco_devs[i].cdev);
+ }
+err_class_create:
+ unregister_chrdev_region(cfp2dco_devt, CFP2DCO_NUM);
+ return rc;
+}
+
+static void __exit cfp2dco_exit(void)
+{
+ int i;
+ for (i = 0; i < CFP2DCO_NUM; i++) {
+ struct cfp2dco_dev *dev = &cfp2dco_devs[i];
+ printk("cfp2dco deleting port: %d\n", dev->port);
+ device_destroy(cfp2dco_sysfs_class, dev->dev->devt);
+ cdev_del(&dev->cdev);
+ }
+ class_destroy(cfp2dco_sysfs_class);
+ unregister_chrdev_region(cfp2dco_devt, CFP2DCO_NUM);
+}
+
+MODULE_AUTHOR("Wataru Ishida ");
+MODULE_DESCRIPTION("Galileo FlexT CFP2DCO transceiver driver");
+MODULE_LICENSE("GPL");
+
+module_init(cfp2dco_init);
+module_exit(cfp2dco_exit);
diff --git a/packages/platforms/wistron/arm64/wtp-01-c1-00/goldstone-module/builds/dpll/Kbuild b/packages/platforms/wistron/arm64/wtp-01-c1-00/goldstone-module/builds/dpll/Kbuild
new file mode 100644
index 0000000..855fe94
--- /dev/null
+++ b/packages/platforms/wistron/arm64/wtp-01-c1-00/goldstone-module/builds/dpll/Kbuild
@@ -0,0 +1,13 @@
+THIS_DIR := $(abspath $(dir $(lastword $(MAKEFILE_LIST))))
+
+NAME ?= arm64-wistron-wtp-01-c1-00-dpll
+
+SOURCES := main.c
+
+obj-m := $(NAME).o
+
+$(NAME)-y := $(SOURCES:.c=.o)
+
+ccflags-y := -I$(X1)/sm/linux-gft/drivers/net/ethernet
+
+# vim: ft=make
diff --git a/packages/platforms/wistron/arm64/wtp-01-c1-00/goldstone-module/builds/dpll/Makefile b/packages/platforms/wistron/arm64/wtp-01-c1-00/goldstone-module/builds/dpll/Makefile
new file mode 100644
index 0000000..6d0276b
--- /dev/null
+++ b/packages/platforms/wistron/arm64/wtp-01-c1-00/goldstone-module/builds/dpll/Makefile
@@ -0,0 +1,25 @@
+# -*- Makefile -*-
+############################################################
+export OUTPUT_DIR := $(abspath $(dir $(lastword $(MAKEFILE_LIST))))
+export KERNEL := goldstone-kernel-5.4-lts-arm64-all:arm64
+$(info $(MAKEFILE_LIST), $(OUTPUT_DIR), $(KERNEL))
+
+include $(X1)/make/config.arm64.mk
+
+MODULE_DIR ?= $(OUTPUT_DIR)
+
+KBUILD ?= $(shell $(ONL)/tools/onlpm.py --find-dir $(KERNEL) mbuilds)
+
+ifndef INSTALL_MOD_PATH
+INSTALL_MOD_PATH := $(OUTPUT_DIR)
+endif
+
+all:
+ $(RM) -r $(OUTPUT_DIR)/lib
+ test -d $(KBUILD)
+ $(MAKE) -C $(KBUILD) M=$(MODULE_DIR) modules
+ $(MAKE) -C $(KBUILD) M=$(MODULE_DIR) INSTALL_MOD_PATH=$(INSTALL_MOD_PATH) INSTALL_MOD_DIR=$(INSTALL_MOD_DIR) modules_install
+ sudo $(RM) $(shell find $(OUTPUT_DIR)/lib -name \*modules\* -type f)
+
+clean:
+ $(MAKE) -C $(KBUILD) M=$(MODULE_DIR) clean
diff --git a/packages/platforms/wistron/arm64/wtp-01-c1-00/goldstone-module/builds/dpll/main.c b/packages/platforms/wistron/arm64/wtp-01-c1-00/goldstone-module/builds/dpll/main.c
new file mode 100644
index 0000000..60c0480
--- /dev/null
+++ b/packages/platforms/wistron/arm64/wtp-01-c1-00/goldstone-module/builds/dpll/main.c
@@ -0,0 +1,491 @@
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define DRIVER_NAME "dpll"
+
+struct dpll_cmd {
+ unsigned int reg;
+ unsigned int offset;
+ unsigned int val;
+};
+
+#define IOC_MAGIC 'd'
+
+#define DPLL_READ _IOWR(IOC_MAGIC, 1, struct dpll_cmd)
+#define DPLL_WRITE _IOWR(IOC_MAGIC, 2, struct dpll_cmd)
+
+static dev_t dpll_devt;
+
+static struct class *dpll_sysfs_class = NULL;
+#define DPLL_I2C_ADDR 0x24
+#define DPLL_NUM 1
+
+#define PAGE_OFFSET_ADDR 0x7F
+
+#define MODE_FREERUN 0x0
+#define MODE_AUTOMATIC 0x3
+
+#define DPLL1_MAILBOX 0x02 // Bit 1 for DPLL1
+
+#define DPLL_MODE_REFSEL_1 0x0214
+#define DPLL_MON_STATUS_1 0x0119
+#define DPLL_STATE_REFSEL_1 0x0120
+#define DPLL_MB_MASK 0x0603
+#define DPLL_MB_SEM 0x0604
+#define DPLL_REF_PRIO_0 0x0614
+
+struct dpll_dev {
+ struct mutex lock;
+ int port;
+ bool simulate_plug_out;
+ struct device *dev;
+ struct i2c_client *client;
+ struct cdev cdev;
+ int current_page;
+};
+
+static int dpll_read(struct dpll_dev *dev, uint32_t addr, uint32_t *value) {
+ int high = ((addr & 0xff) < 0x80) ? 0 : 1;
+ int page = ((addr >> 8) & 0xf) * 2 + high;
+ int offset = high ? ((addr & 0xff) - 0x80) : (addr & 0xff);
+ int rc;
+ if (dev->current_page != page) {
+ rc = i2c_smbus_write_byte_data(dev->client, PAGE_OFFSET_ADDR, page);
+ if (rc)
+ return -1;
+ dev->current_page = page;
+ }
+ rc = i2c_smbus_read_byte_data(dev->client, offset);
+ if (rc < 0)
+ return -1;
+ *value = rc;
+ return 0;
+}
+
+static int dpll_write(struct dpll_dev *dev, uint32_t addr, uint32_t value) {
+ int high = ((addr & 0xff) < 0x80) ? 0 : 1;
+ int page = ((addr >> 8) & 0xf) * 2 + high;
+ int offset = high ? ((addr & 0xff) - 0x80) : (addr & 0xff);
+ int rc;
+ if (dev->current_page != page) {
+ rc = i2c_smbus_write_byte_data(dev->client, PAGE_OFFSET_ADDR, page);
+ if (rc)
+ return -1;
+ dev->current_page = page;
+ }
+ rc = i2c_smbus_write_byte_data(dev->client, offset, value);
+ msleep(25);
+ return rc;
+}
+
+static ssize_t index_show(struct device *dev, struct device_attribute *da, char *buf) {
+ struct dpll_dev *priv = dev_get_drvdata(dev);
+ return scnprintf(buf, PAGE_SIZE, "%d\n", priv->port);
+}
+static DEVICE_ATTR_RO(index);
+
+static int get_mode(struct dpll_dev *dev) {
+ int rc, v;
+ rc = dpll_read(dev, DPLL_MODE_REFSEL_1, &v);
+ if (rc)
+ return -1;
+ return v;
+}
+
+static int set_mode(struct dpll_dev *dev, int mode) {
+ int current_mode;
+ current_mode = get_mode(dev);
+ if (current_mode < 0)
+ return -1;
+ if ((current_mode&0x7) == mode) {
+ return 0;
+ }
+ current_mode &= ~(0x7);
+ current_mode |= mode;
+ return dpll_write(dev, DPLL_MODE_REFSEL_1, current_mode);
+}
+
+static int get_automatic_mode_status(struct dpll_dev *dev) {
+ int rc, v;
+ rc = dpll_read(dev, DPLL_MON_STATUS_1, &v);
+ if (rc)
+ return rc;
+ return v;
+}
+
+static int get_prio(struct dpll_dev *dev, int pin) {
+ int rc, value, offset = DPLL_REF_PRIO_0 + (pin/2);
+ rc = dpll_write(dev, DPLL_MB_MASK, DPLL1_MAILBOX);
+ if (rc)
+ return -1;
+
+ rc = dpll_write(dev, DPLL_MB_SEM, 0x1<<1); // bit 1 for read
+ if (rc)
+ return -1;
+
+ rc = dpll_read(dev, offset, &value);
+ if (rc)
+ return -1;
+
+ if (pin%2) {
+ return value & 0xf;
+ } else {
+ return (value >> 4) & 0xf;
+ }
+}
+
+static int set_prio(struct dpll_dev *dev, int pin, int prio) {
+ int rc, value, offset = DPLL_REF_PRIO_0 + (pin/2);
+ rc = dpll_write(dev, DPLL_MB_MASK, DPLL1_MAILBOX);
+ if (rc)
+ return -1;
+
+ rc = dpll_write(dev, DPLL_MB_SEM, 0x1<<1); // bit 1 for read
+ if (rc)
+ return -1;
+
+ rc = dpll_read(dev, offset, &value);
+ if (rc)
+ return -1;
+
+ if (pin%2) {
+ value &= ~(0xf);
+ value |= prio;
+ } else {
+ value &= ~(0xf0);
+ value |= (prio << 4);
+ }
+ rc = dpll_write(dev, offset, value);
+ if (rc)
+ return -1;
+ return dpll_write(dev, DPLL_MB_SEM, 0x1);
+}
+
+static ssize_t mode_show(struct device *dev, struct device_attribute *da, char *buf) {
+ int value;
+ struct dpll_dev *priv = dev_get_drvdata(dev);
+
+ mutex_lock(&priv->lock);
+ value = get_mode(priv);
+ mutex_unlock(&priv->lock);
+
+ switch (value&0x7) {
+ case 0:
+ return scnprintf(buf, PAGE_SIZE, "Freerun\n");
+ case 1:
+ return scnprintf(buf, PAGE_SIZE, "Forced holdover\n");
+ case 2:
+ return scnprintf(buf, PAGE_SIZE, "Forced reference lock\n");
+ case 3:
+ return scnprintf(buf, PAGE_SIZE, "Automatic\n");
+ case 4:
+ return scnprintf(buf, PAGE_SIZE, "NCO\n");
+ default:
+ return scnprintf(buf, PAGE_SIZE, "Invalid\n");
+ }
+}
+
+static ssize_t mode_store(struct device *dev, struct device_attribute *da, const char *buf, size_t count) {
+ struct dpll_dev *priv = dev_get_drvdata(dev);
+ long value;
+
+ if (kstrtoul(buf, 0, &value))
+ return -EINVAL;
+ if (value != 1 && value != 2) {
+ printk("dpll valid modes are freerun: 1, automatic: 2\n");
+ return -EINVAL;
+ }
+
+ mutex_lock(&priv->lock);
+ if (set_mode(priv, (value == 1) ? MODE_FREERUN : MODE_AUTOMATIC) < 0) {
+ return -1;
+ }
+ mutex_unlock(&priv->lock);
+ return count;
+}
+static DEVICE_ATTR_RW(mode);
+
+static ssize_t automatic_mode_status_show(struct device *dev, struct device_attribute *da, char *buf) {
+ int value;
+ struct dpll_dev *priv = dev_get_drvdata(dev);
+ mutex_lock(&priv->lock);
+ value = get_mode(priv);
+ if ((value&0x7) != MODE_AUTOMATIC) {
+ mutex_unlock(&priv->lock);
+ return scnprintf(buf, PAGE_SIZE, "\n");
+ }
+
+ value = get_automatic_mode_status(priv);
+ mutex_unlock(&priv->lock);
+
+ return scnprintf(buf, PAGE_SIZE,
+ "Locked: %s\n" \
+ "Holdover: %s\n" \
+ "Step-Time in Progress: %s\n" \
+ "Holdover Ready: %s\n" \
+ "At Freq Offset limit: %s\n" \
+ "At PSL limit: %s\n",
+ (((value>>0)&1) == 1 ? "Yes" : "No"),
+ (((value>>1)&1) == 1 ? "Yes" : "No"),
+ (((value>>3)&1) == 1 ? "Yes" : "No"),
+ (((value>>2)&1) == 1 ? "Yes" : "No"),
+ (((value>>5)&1) == 1 ? "Yes" : "No"),
+ (((value>>7)&1) == 1 ? "Yes" : "No"));
+}
+
+static DEVICE_ATTR_RO(automatic_mode_status);
+
+#define DEFINE_PRIO(name, pin) \
+ static ssize_t name ## _prio_show(struct device *dev, struct device_attribute *da, char *buf) { \
+ int value; \
+ struct dpll_dev *priv = dev_get_drvdata(dev); \
+ mutex_lock(&priv->lock); \
+ value = get_prio(priv, pin); \
+ mutex_unlock(&priv->lock); \
+ return scnprintf(buf, PAGE_SIZE, "%d\n", value); \
+ } \
+ \
+ static ssize_t name ## _prio_store(struct device *dev, struct device_attribute *da, const char *buf, size_t count) { \
+ struct dpll_dev *priv = dev_get_drvdata(dev); \
+ long value; \
+ if (kstrtoul(buf, 0, &value)) \
+ return -EINVAL; \
+ if (value < 0 || value > 15) { \
+ printk("dpll valid prio = 0 <= prio <= 15\n"); \
+ return -EINVAL; \
+ } \
+ mutex_lock(&priv->lock); \
+ if (set_prio(priv, pin, value))\
+ return -EINVAL; \
+ mutex_unlock(&priv->lock); \
+ return count; \
+ } \
+ static DEVICE_ATTR_RW(name ## _prio);
+
+DEFINE_PRIO(ref0p, 0)
+DEFINE_PRIO(ref0n, 1)
+DEFINE_PRIO(ref1p, 2)
+DEFINE_PRIO(ref1n, 3)
+DEFINE_PRIO(ref2p, 4)
+DEFINE_PRIO(ref2n, 5)
+DEFINE_PRIO(ref3p, 6)
+DEFINE_PRIO(ref3n, 7)
+
+static struct attribute *dpll_dev_attrs[] = {
+ &dev_attr_index.attr,
+ &dev_attr_mode.attr,
+ &dev_attr_automatic_mode_status.attr,
+ &dev_attr_ref0p_prio.attr,
+ &dev_attr_ref0n_prio.attr,
+ &dev_attr_ref1p_prio.attr,
+ &dev_attr_ref1n_prio.attr,
+ &dev_attr_ref2p_prio.attr,
+ &dev_attr_ref2n_prio.attr,
+ &dev_attr_ref3p_prio.attr,
+ &dev_attr_ref3n_prio.attr,
+ NULL
+};
+
+ATTRIBUTE_GROUPS(dpll_dev);
+
+long dpll_ioctl(struct file *filp, unsigned int cmd, unsigned long arg) {
+ struct dpll_dev *dev = filp->private_data;
+ long retval = 0;
+ struct dpll_cmd data;
+
+ if ( dev == NULL ) {
+ printk("dev is NULL\n");
+ return -EFAULT;
+ }
+ memset(&data, 0, sizeof(data));
+
+ if (!capable(CAP_SYS_ADMIN)) {
+ retval = -EPERM;
+ goto done;
+ }
+
+ if (!access_ok((void __user *)arg, _IOC_SIZE(cmd))) {
+ retval = -EFAULT;
+ goto done;
+ }
+
+ if (copy_from_user(&data, (int __user *)arg, sizeof(data))) {
+ retval = -EFAULT;
+ goto done;
+ }
+
+ mutex_lock(&dev->lock);
+ switch (cmd) {
+ case DPLL_READ:
+ if (dpll_read(dev, data.reg, &data.val)) {
+ retval = -EFAULT;
+ goto done;
+ }
+ if (copy_to_user((int __user *)arg, &data, sizeof(data))) {
+ retval = -EFAULT;
+ goto done;
+ }
+ break;
+ case DPLL_WRITE:
+ if (dpll_write(dev, data.reg, data.val)) {
+ retval = -EFAULT;
+ goto done;
+ }
+ break;
+ default:
+ retval = -ENOTTY;
+ break;
+ }
+
+done:
+ mutex_unlock(&dev->lock);
+ return retval;
+}
+
+
+int dpll_close(struct inode *inode, struct file *filp) {
+ printk("dpll close\n");
+ return 0;
+}
+
+int dpll_open(struct inode *inode, struct file *filp) {
+ struct dpll_dev *priv = container_of(inode->i_cdev, struct dpll_dev, cdev);
+ printk("dpll open: port %d\n", priv->port);
+ filp->private_data = priv;
+ return 0;
+}
+
+struct file_operations dpll_fops = {
+ .owner = THIS_MODULE,
+ .open = dpll_open,
+ .release = dpll_close,
+ .unlocked_ioctl = dpll_ioctl,
+};
+
+
+static int dpll_device_probe(struct i2c_client *client, const struct i2c_device_id *dev_id) {
+ int ret = 0;
+ struct dpll_dev *data = NULL;
+
+ if (client->addr != DPLL_I2C_ADDR) {
+ return -ENODEV;
+ }
+
+ data = kzalloc(sizeof(*data), GFP_KERNEL);
+ if (!data) {
+ return -ENOMEM;
+ }
+
+ ret = sysfs_create_group(&client->dev.kobj, &dpll_dev_group);
+ if (ret) {
+ goto err_sysfs_create;
+ }
+
+ i2c_set_clientdata(client, data);
+ mutex_init(&data->lock);
+ data->port = dev_id->driver_data;
+ data->client = client;
+
+ cdev_init(&data->cdev, &dpll_fops);
+ data->cdev.owner = THIS_MODULE;
+ data->cdev.ops = &dpll_fops;
+ ret = cdev_add(&data->cdev, MKDEV(MAJOR(dpll_devt), data->port), 1);
+ if (ret) {
+ goto err_cdev_add;
+ }
+
+ data->dev = device_create_with_groups(dpll_sysfs_class, NULL, MKDEV(MAJOR(dpll_devt), 1), data, dpll_dev_groups, "dpll%d", data->port);
+ if (IS_ERR(data->dev)) {
+ ret = PTR_ERR(data->dev);
+ goto err_dev_create;
+ }
+
+ return ret;
+
+err_dev_create:
+ cdev_del(&data->cdev);
+err_cdev_add:
+ sysfs_remove_group(&client->dev.kobj, &dpll_dev_group);
+err_sysfs_create:
+ kfree(data);
+ return ret;
+}
+
+static int dpll_device_remove(struct i2c_client *client) {
+ int ret = 0;
+ struct dpll_dev *data = i2c_get_clientdata(client);
+ device_destroy(dpll_sysfs_class, data->dev->devt);
+ cdev_del(&data->cdev);
+ sysfs_remove_group(&client->dev.kobj, &dpll_dev_group);
+ kfree(data);
+ return ret;
+}
+
+enum dpll_numbers {
+ dpll1 = 1,
+};
+
+#define I2C_DEV_ID(x) { #x, x}
+
+static const struct i2c_device_id dpll_device_id[] = {
+I2C_DEV_ID(dpll1),
+{ /* LIST END */ }
+};
+
+static struct i2c_driver dpll_driver = {
+ .driver = {
+ .name = DRIVER_NAME,
+ },
+ .probe = dpll_device_probe,
+ .remove = dpll_device_remove,
+ .id_table = dpll_device_id,
+};
+
+static int __init dpll_init(void)
+{
+ int rc;
+
+ rc = alloc_chrdev_region(&dpll_devt, 0, DPLL_NUM, "dpll");
+ if (rc) {
+ return rc;
+ }
+
+ dpll_sysfs_class = class_create(THIS_MODULE, "dpll");
+ if (IS_ERR(dpll_sysfs_class)) {
+ printk("failed to create class DPLL\n");
+ rc = PTR_ERR(dpll_sysfs_class);
+ goto err_class_create;
+ }
+
+ rc = i2c_add_driver(&dpll_driver);
+ if (rc) {
+ goto err_add_driver;
+ }
+ return rc;
+
+err_add_driver:
+ class_destroy(dpll_sysfs_class);
+err_class_create:
+ unregister_chrdev_region(dpll_devt, DPLL_NUM);
+ return rc;
+}
+
+static void __exit dpll_exit(void)
+{
+ i2c_del_driver(&dpll_driver);
+ class_destroy(dpll_sysfs_class);
+ unregister_chrdev_region(dpll_devt, DPLL_NUM);
+}
+
+MODULE_AUTHOR("Wataru Ishida ");
+MODULE_DESCRIPTION("Galileo FlexT DPLL driver");
+MODULE_LICENSE("GPL");
+
+module_init(dpll_init);
+module_exit(dpll_exit);
diff --git a/packages/platforms/wistron/arm64/wtp-01-c1-00/goldstone-platform-config/Makefile b/packages/platforms/wistron/arm64/wtp-01-c1-00/goldstone-platform-config/Makefile
new file mode 100644
index 0000000..dc1e7b8
--- /dev/null
+++ b/packages/platforms/wistron/arm64/wtp-01-c1-00/goldstone-platform-config/Makefile
@@ -0,0 +1 @@
+include $(ONL)/make/pkg.mk
diff --git a/packages/platforms/wistron/arm64/wtp-01-c1-00/goldstone-platform-config/PKG.yml b/packages/platforms/wistron/arm64/wtp-01-c1-00/goldstone-platform-config/PKG.yml
new file mode 100644
index 0000000..77f01fe
--- /dev/null
+++ b/packages/platforms/wistron/arm64/wtp-01-c1-00/goldstone-platform-config/PKG.yml
@@ -0,0 +1,22 @@
+variables:
+ ARCH: arm64
+ BASENAME: arm64-wistron-wtp-01-c1-00
+ REVISION: r0
+ PLATFORM: $BASENAME-$REVISION
+
+packages:
+ - name: goldstone-platform-config-$PLATFORM
+ arch: $ARCH
+ version: 1.0.0
+ maintainer: goldstone-nos@googlegroups.com
+ summary: Goldstone config file for $PLATFORM
+ depends:
+ - usbutils
+ - smartmontools
+ files:
+ builds/blacklist.conf: /etc/modprobe.d/$PLATFORM.conf
+ builds/tai: /var/lib/goldstone/device/$PLATFORM/tai
+ builds/platform.json: /var/lib/goldstone/device/$PLATFORM/platform.json
+ builds/init.sh: /var/lib/goldstone/device/$PLATFORM/init.sh
+ builds/tai-gearbox: /var/lib/goldstone/device/$PLATFORM/tai-gearbox
+ builds/30.eeprom: /etc/boot.d/30.eeprom
diff --git a/packages/platforms/wistron/arm64/wtp-01-c1-00/goldstone-platform-config/builds/30.eeprom b/packages/platforms/wistron/arm64/wtp-01-c1-00/goldstone-platform-config/builds/30.eeprom
new file mode 100755
index 0000000..ce99631
--- /dev/null
+++ b/packages/platforms/wistron/arm64/wtp-01-c1-00/goldstone-platform-config/builds/30.eeprom
@@ -0,0 +1,7 @@
+REG=$(i2cget -y 2000000.i2c 0x38 0)
+
+if [ $(( REG & 0x0C )) = 0 ]; then
+ echo 24c02 0x53 > /sys/devices/platform/soc/2000000.i2c/i2c-0/new_device
+else
+ echo 24c64 0x53 > /sys/devices/platform/soc/2000000.i2c/i2c-0/new_device
+fi
diff --git a/packages/platforms/wistron/arm64/wtp-01-c1-00/goldstone-platform-config/builds/Makefile b/packages/platforms/wistron/arm64/wtp-01-c1-00/goldstone-platform-config/builds/Makefile
new file mode 100644
index 0000000..4ab548c
--- /dev/null
+++ b/packages/platforms/wistron/arm64/wtp-01-c1-00/goldstone-platform-config/builds/Makefile
@@ -0,0 +1,2 @@
+all:
+ # nothing to do
diff --git a/packages/platforms/wistron/arm64/wtp-01-c1-00/goldstone-platform-config/builds/blacklist.conf b/packages/platforms/wistron/arm64/wtp-01-c1-00/goldstone-platform-config/builds/blacklist.conf
new file mode 100644
index 0000000..e69de29
diff --git a/packages/platforms/wistron/arm64/wtp-01-c1-00/goldstone-platform-config/builds/init.sh b/packages/platforms/wistron/arm64/wtp-01-c1-00/goldstone-platform-config/builds/init.sh
new file mode 100755
index 0000000..7e29500
--- /dev/null
+++ b/packages/platforms/wistron/arm64/wtp-01-c1-00/goldstone-platform-config/builds/init.sh
@@ -0,0 +1,17 @@
+#!/bin/sh
+
+set -eux
+
+modprobe fsl-enetc-chardev-mdio
+modprobe arm64-wistron-wtp-01-c1-00-cfp2
+modprobe arm64-wistron-wtp-01-c1-00-dpll
+modprobe arm64-wistron-wtp-01-c1-00-psu
+modprobe arm64-wistron-wtp-01-c1-00-led
+
+echo dpll1 0x24 > /sys/bus/i2c/devices/i2c-0/new_device
+
+systemctl enable gs-south-onlp
+systemctl enable gs-south-tai
+systemctl enable gs-south-system
+systemctl enable gs-south-gearbox
+systemctl enable gs-south-dpll
diff --git a/packages/platforms/wistron/arm64/wtp-01-c1-00/goldstone-platform-config/builds/platform.json b/packages/platforms/wistron/arm64/wtp-01-c1-00/goldstone-platform-config/builds/platform.json
new file mode 100644
index 0000000..cfdf72f
--- /dev/null
+++ b/packages/platforms/wistron/arm64/wtp-01-c1-00/goldstone-platform-config/builds/platform.json
@@ -0,0 +1,54 @@
+[
+ {"interface": {"name": "Interface1/0/1", "pin-mode": "nrz"}, "component": {"name": "port1"}},
+ {"interface": {"name": "Interface1/0/2", "pin-mode": "nrz"}, "component": {"name": "port2"}},
+ {"interface": {"name": "Interface1/0/3", "pin-mode": "nrz"}, "component": {"name": "port3"}},
+ {"interface": {"name": "Interface1/0/4", "pin-mode": "nrz"}, "component": {"name": "port4"}},
+ {"interface": {"name": "Interface1/0/5", "pin-mode": "nrz"}, "component": {"name": "port5"}},
+ {"interface": {"name": "Interface1/0/6", "pin-mode": "nrz"}, "component": {"name": "port6"}},
+ {"interface": {"name": "Interface1/0/7", "pin-mode": "nrz"}, "component": {"name": "port7"}},
+ {"interface": {"name": "Interface1/0/8", "pin-mode": "nrz"}, "component": {"name": "port8"}},
+ {"interface": {"name": "Interface1/1/1", "default": true, "pin-mode": "pam4"}, "tai": {"module": {"name": "piu1", "location": "1"}, "hostif": {"name": "0", "index": 0}}},
+ {"interface": {"name": "Interface1/1/2", "default": true, "pin-mode": "pam4"}, "tai": {"module": {"name": "piu1", "location": "1"}, "hostif": {"name": "1", "index": 1}}},
+ {"interface": {"name": "Interface1/1/3", "default": true, "pin-mode": "pam4"}, "tai": {"module": {"name": "piu1", "location": "1"}, "hostif": {"name": "2", "index": 2}}},
+ {"interface": {"name": "Interface1/1/4", "default": true, "pin-mode": "pam4"}, "tai": {"module": {"name": "piu1", "location": "1"}, "hostif": {"name": "3", "index": 3}}},
+ {"interface": {"name": "Interface1/1/5", "default": true, "pin-mode": "pam4"}, "tai": {"module": {"name": "piu2", "location": "2"}, "hostif": {"name": "0", "index": 0}}},
+ {"interface": {"name": "Interface1/1/6", "default": true, "pin-mode": "pam4"}, "tai": {"module": {"name": "piu2", "location": "2"}, "hostif": {"name": "1", "index": 1}}},
+ {"interface": {"name": "Interface1/1/7", "default": true, "pin-mode": "pam4"}, "tai": {"module": {"name": "piu2", "location": "2"}, "hostif": {"name": "2", "index": 2}}},
+ {"interface": {"name": "Interface1/1/8", "default": true, "pin-mode": "pam4"}, "tai": {"module": {"name": "piu2", "location": "2"}, "hostif": {"name": "3", "index": 3}}},
+ {"interface": {"name": "Interface1/1/1", "default": false, "pin-mode": "nrz", "conflicts-with": ["Interface1/1/2"]}, "tai": {"module": {"name": "piu1", "location": "1"}, "hostif": {"name": "0", "index": 0}}},
+ {"interface": {"name": "Interface1/1/3", "default": false, "pin-mode": "nrz", "conflicts-with": ["Interface1/1/4"]}, "tai": {"module": {"name": "piu1", "location": "1"}, "hostif": {"name": "1", "index": 1}}},
+ {"interface": {"name": "Interface1/1/5", "default": false, "pin-mode": "nrz", "conflicts-with": ["Interface1/1/6"]}, "tai": {"module": {"name": "piu2", "location": "2"}, "hostif": {"name": "0", "index": 0}}},
+ {"interface": {"name": "Interface1/1/7", "default": false, "pin-mode": "nrz", "conflicts-with": ["Interface1/1/8"]}, "tai": {"module": {"name": "piu2", "location": "2"}, "hostif": {"name": "1", "index": 1}}},
+ {"interface": {"name": "Interface2/0/1", "pin-mode": "nrz"}, "component": {"name": "port9"}},
+ {"interface": {"name": "Interface2/0/2", "pin-mode": "nrz"}, "component": {"name": "port10"}},
+ {"interface": {"name": "Interface2/0/3", "pin-mode": "nrz"}, "component": {"name": "port11"}},
+ {"interface": {"name": "Interface2/0/4", "pin-mode": "nrz"}, "component": {"name": "port12"}},
+ {"interface": {"name": "Interface2/0/5", "pin-mode": "nrz"}, "component": {"name": "port13"}},
+ {"interface": {"name": "Interface2/0/6", "pin-mode": "nrz"}, "component": {"name": "port14"}},
+ {"interface": {"name": "Interface2/0/7", "pin-mode": "nrz"}, "component": {"name": "port15"}},
+ {"interface": {"name": "Interface2/0/8", "pin-mode": "nrz"}, "component": {"name": "port16"}},
+ {"interface": {"name": "Interface2/1/1", "default": true, "pin-mode": "pam4"}, "tai": {"module": {"name": "piu3", "location": "3"}, "hostif": {"name": "0", "index": 0}}},
+ {"interface": {"name": "Interface2/1/2", "default": true, "pin-mode": "pam4"}, "tai": {"module": {"name": "piu3", "location": "3"}, "hostif": {"name": "1", "index": 1}}},
+ {"interface": {"name": "Interface2/1/3", "default": true, "pin-mode": "pam4"}, "tai": {"module": {"name": "piu3", "location": "3"}, "hostif": {"name": "2", "index": 2}}},
+ {"interface": {"name": "Interface2/1/4", "default": true, "pin-mode": "pam4"}, "tai": {"module": {"name": "piu3", "location": "3"}, "hostif": {"name": "3", "index": 3}}},
+ {"interface": {"name": "Interface2/1/5", "default": true, "pin-mode": "pam4"}, "tai": {"module": {"name": "piu4", "location": "4"}, "hostif": {"name": "0", "index": 0}}},
+ {"interface": {"name": "Interface2/1/6", "default": true, "pin-mode": "pam4"}, "tai": {"module": {"name": "piu4", "location": "4"}, "hostif": {"name": "1", "index": 1}}},
+ {"interface": {"name": "Interface2/1/7", "default": true, "pin-mode": "pam4"}, "tai": {"module": {"name": "piu4", "location": "4"}, "hostif": {"name": "2", "index": 2}}},
+ {"interface": {"name": "Interface2/1/8", "default": true, "pin-mode": "pam4"}, "tai": {"module": {"name": "piu4", "location": "4"}, "hostif": {"name": "3", "index": 3}}},
+ {"interface": {"name": "Interface2/1/1", "default": false, "pin-mode": "nrz", "conflicts-with": ["Interface2/1/2"]}, "tai": {"module": {"name": "piu3", "location": "3"}, "hostif": {"name": "0", "index": 0}}},
+ {"interface": {"name": "Interface2/1/3", "default": false, "pin-mode": "nrz", "conflicts-with": ["Interface2/1/4"]}, "tai": {"module": {"name": "piu3", "location": "3"}, "hostif": {"name": "1", "index": 1}}},
+ {"interface": {"name": "Interface2/1/5", "default": false, "pin-mode": "nrz", "conflicts-with": ["Interface2/1/6"]}, "tai": {"module": {"name": "piu4", "location": "4"}, "hostif": {"name": "0", "index": 0}}},
+ {"interface": {"name": "Interface2/1/7", "default": false, "pin-mode": "nrz", "conflicts-with": ["Interface2/1/8"]}, "tai": {"module": {"name": "piu4", "location": "4"}, "hostif": {"name": "1", "index": 1}}},
+ {"component": {"name": "piu1"}, "tai": {"module": {"name": "piu1", "location": "1"}, "netif": {"name": "0", "index": 0}}},
+ {"component": {"name": "piu2"}, "tai": {"module": {"name": "piu2", "location": "2"}, "netif": {"name": "0", "index": 0}}},
+ {"component": {"name": "piu3"}, "tai": {"module": {"name": "piu3", "location": "3"}, "netif": {"name": "0", "index": 0}}},
+ {"component": {"name": "piu4"}, "tai": {"module": {"name": "piu4", "location": "4"}, "netif": {"name": "0", "index": 0}}},
+ {"synce-reference-clock": {"name": "0", "index": 0, "gearbox": {"name": "1"}}, "input-reference": {"name": "0", "index": 0, "dpll": {"name": "1"}}},
+ {"synce-reference-clock": {"name": "1", "index": 1, "gearbox": {"name": "1"}}, "input-reference": {"name": "1", "index": 1, "dpll": {"name": "1"}}},
+ {"synce-reference-clock": {"name": "2", "index": 2, "gearbox": {"name": "1"}}, "input-reference": {"name": "2", "index": 2, "dpll": {"name": "1"}}},
+ {"synce-reference-clock": {"name": "3", "index": 3, "gearbox": {"name": "1"}}, "input-reference": {"name": "3", "index": 3, "dpll": {"name": "1"}}},
+ {"synce-reference-clock": {"name": "0", "index": 0, "gearbox": {"name": "2"}}, "input-reference": {"name": "4", "index": 4, "dpll": {"name": "1"}}},
+ {"synce-reference-clock": {"name": "1", "index": 1, "gearbox": {"name": "2"}}, "input-reference": {"name": "5", "index": 5, "dpll": {"name": "1"}}},
+ {"synce-reference-clock": {"name": "2", "index": 2, "gearbox": {"name": "2"}}, "input-reference": {"name": "6", "index": 6, "dpll": {"name": "1"}}},
+ {"synce-reference-clock": {"name": "3", "index": 3, "gearbox": {"name": "2"}}, "input-reference": {"name": "7", "index": 7, "dpll": {"name": "1"}}}
+]
diff --git a/packages/platforms/wistron/arm64/wtp-01-c1-00/goldstone-platform-config/builds/tai-gearbox/mdx1/config.json b/packages/platforms/wistron/arm64/wtp-01-c1-00/goldstone-platform-config/builds/tai-gearbox/mdx1/config.json
new file mode 100644
index 0000000..47701ab
--- /dev/null
+++ b/packages/platforms/wistron/arm64/wtp-01-c1-00/goldstone-platform-config/builds/tai-gearbox/mdx1/config.json
@@ -0,0 +1,8 @@
+{
+ "module": {
+ "attrs": {
+ "firmware-location": "/var/lib/tai/mdx1_fw_app_revb.mem",
+ "boot-mode": "cold"
+ }
+ }
+}
diff --git a/packages/platforms/wistron/arm64/wtp-01-c1-00/goldstone-platform-config/builds/tai/mux/exec.py b/packages/platforms/wistron/arm64/wtp-01-c1-00/goldstone-platform-config/builds/tai/mux/exec.py
new file mode 100755
index 0000000..a37a417
--- /dev/null
+++ b/packages/platforms/wistron/arm64/wtp-01-c1-00/goldstone-platform-config/builds/tai/mux/exec.py
@@ -0,0 +1,38 @@
+#!/usr/bin/env python3
+
+import sys
+from pathlib import Path
+
+
+def main():
+ if len(sys.argv) != 2:
+ sys.exit(1)
+
+ arg = sys.argv[1]
+
+ if arg == "list":
+ dev = Path("/dev")
+ l = "\n".join(str(v).replace("/dev/cfp2dco", "") for v in dev.glob("cfp2dco*"))
+ print(f"list: {l}", file=sys.stderr)
+ print(l)
+ return
+
+ dev = arg.split("/")[-1]
+
+ with open(f"/sys/class/cfp2dco/cfp2dco{dev}/part_number") as f:
+ try:
+ part = f.read().strip()
+ except Exception as e:
+ print(f"failed to read part_number: {e}")
+ return
+
+ print(f"dev: {dev}, part: {part}", file=sys.stderr)
+
+ if part == "LDC040-DO":
+ print("libtai-ldc.so")
+ elif part == "TRB100DAA-01" or part == "TRB200DAA-01":
+ print("libtai-lumentum.so")
+
+
+if __name__ == "__main__":
+ main()
diff --git a/packages/platforms/wistron/arm64/wtp-01-c1-00/modules/Makefile b/packages/platforms/wistron/arm64/wtp-01-c1-00/modules/Makefile
new file mode 100644
index 0000000..003238c
--- /dev/null
+++ b/packages/platforms/wistron/arm64/wtp-01-c1-00/modules/Makefile
@@ -0,0 +1 @@
+include $(ONL)/make/pkg.mk
\ No newline at end of file
diff --git a/packages/platforms/wistron/arm64/wtp-01-c1-00/modules/PKG.yml b/packages/platforms/wistron/arm64/wtp-01-c1-00/modules/PKG.yml
new file mode 100644
index 0000000..1b32f04
--- /dev/null
+++ b/packages/platforms/wistron/arm64/wtp-01-c1-00/modules/PKG.yml
@@ -0,0 +1,18 @@
+prerequisites:
+ packages:
+ - goldstone-kernel-5.4-lts-arm64-all:arm64
+
+variables:
+ ARCH: arm64
+ BASENAME: arm64-wistron-wtp-01-c1-00
+ REVISION: r0
+ PLATFORM: $BASENAME
+
+packages:
+ - name: onl-platform-modules-$PLATFORM
+ arch: $ARCH
+ version: 1.0.0
+ maintainer: goldstone-nos@googlegroups.com
+ summary: onl platform modules for $PLATFORM
+ files:
+ builds/lib: lib
diff --git a/packages/platforms/wistron/arm64/wtp-01-c1-00/modules/builds/Kbuild b/packages/platforms/wistron/arm64/wtp-01-c1-00/modules/builds/Kbuild
new file mode 100644
index 0000000..1db1186
--- /dev/null
+++ b/packages/platforms/wistron/arm64/wtp-01-c1-00/modules/builds/Kbuild
@@ -0,0 +1,13 @@
+THIS_DIR := $(abspath $(dir $(lastword $(MAKEFILE_LIST))))
+
+ARCH := arm64
+BASENAME := arm64-wistron-wtp-01-c1-00
+NAME := led psu
+
+SOURCES := $(foreach a,$(NAME),$(BASENAME)-$(a).c)
+
+obj-m := $(foreach a,$(NAME),$(BASENAME)-$(a).o)
+
+ccflags-y := -I$(X1)/sm/linux/drivers/net/ethernet
+
+# vim: ft=make
diff --git a/packages/platforms/wistron/arm64/wtp-01-c1-00/modules/builds/Makefile b/packages/platforms/wistron/arm64/wtp-01-c1-00/modules/builds/Makefile
new file mode 100644
index 0000000..3d2f9bb
--- /dev/null
+++ b/packages/platforms/wistron/arm64/wtp-01-c1-00/modules/builds/Makefile
@@ -0,0 +1,25 @@
+# -*- Makefile -*-
+# ############################################################
+export OUTPUT_DIR := $(abspath $(dir $(lastword $(MAKEFILE_LIST))))
+export KERNEL := goldstone-kernel-5.4-lts-arm64-all:arm64
+
+include $(X1)/make/config.arm64.mk
+
+MODULE_DIR ?= $(OUTPUT_DIR)
+
+KBUILD ?= $(shell $(ONL)/tools/onlpm.py --find-dir $(KERNEL) mbuilds)
+
+ifndef INSTALL_MOD_PATH
+INSTALL_MOD_PATH := $(OUTPUT_DIR)
+endif
+
+all:
+ $(RM) -r $(OUTPUT_DIR)/lib
+ test -d $(KBUILD)
+ $(MAKE) -C $(KBUILD) M=$(MODULE_DIR) modules
+ $(MAKE) -C $(KBUILD) M=$(MODULE_DIR) INSTALL_MOD_PATH=$(INSTALL_MOD_PATH) INSTALL_MOD_DIR=$(INSTALL_MOD_DIR) modules_install
+ sudo $(RM) $(shell find $(OUTPUT_DIR)/lib -name \*modules\* -type f)
+
+clean:
+ $(MAKE) -C $(KBUILD) M=$(MODULE_DIR) clean
+
diff --git a/packages/platforms/wistron/arm64/wtp-01-c1-00/modules/builds/arm64-wistron-wtp-01-c1-00-led.c b/packages/platforms/wistron/arm64/wtp-01-c1-00/modules/builds/arm64-wistron-wtp-01-c1-00-led.c
new file mode 100644
index 0000000..4285111
--- /dev/null
+++ b/packages/platforms/wistron/arm64/wtp-01-c1-00/modules/builds/arm64-wistron-wtp-01-c1-00-led.c
@@ -0,0 +1,717 @@
+/*
+ * Based on:
+ * pca954x.c from Kumar Gala
+ * Copyright (C) 2006
+ *
+ * Based on:
+ * pca954x.c from Ken Harrenstien
+ * Copyright (C) 2004 Google, Inc. (Ken Harrenstien)
+ *
+ * Based on:
+ * i2c-virtual_cb.c from Brian Kuschak
+ * and
+ * pca9540.c from Jean Delvare .
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define DRVNAME "wtp_01_c1_00_led"
+
+#define SET_FPGA_BIT(_reg, _mode, _bit) \
+ fpga_read(_reg, &_value); \
+ fpga_write(_reg, (_value | ((_mode&0x3) << _bit)))
+
+#define CLEAR_FPGA_BITS(_reg, _bit) \
+ fpga_read(_reg, &_value); \
+ fpga_write(_reg, (_value & ~(0x3 << _bit)))
+
+#define SET_QSFP_FPGA_BIT(_reg, _mode, _bit) \
+ fpga_read(_reg, &_value); \
+ fpga_write(_reg, (_value & ~((_mode&0x3) << _bit)))
+
+#define CLEAR_QSFP_FPGA_BITS(_reg, _bit) \
+ fpga_read(_reg, &_value); \
+ fpga_write(_reg, (_value | (0x3 << _bit)))
+
+
+
+#define PCI_VENDOR_ID_ACTEL 0x11aa
+#define PCI_DEVICE_ID_ACTEL 0x1556
+#define FPGA_PCIE_ADDRESS 0x8040000000
+#define FPGA_PAGE_MASK 0xFFFFFFFFFFFFF000
+
+
+#define SYS_LED_REG_ADDRESS 0x090000a8
+#define PSU_LED_REG_ADDRESS 0x090000b8
+
+
+
+
+
+static ssize_t set_led(struct device *dev, struct device_attribute *da,
+ const char *buf, size_t count);
+static ssize_t show_led(struct device *dev, struct device_attribute *attr,
+ char *buf);
+static int wistron_wtp_01_c1_00_led_probe(struct platform_device *pdev);
+static int wistron_wtp_01_c1_00_led_remove(struct platform_device *pdev);
+
+
+struct system_led_data {
+ unsigned int led_reg_A8;
+ unsigned int led_reg_B8;
+ unsigned int led_reg_B0;
+ unsigned int led_reg_C0;
+};
+
+struct wistron_wtp_01_c1_00_led_data {
+ struct platform_device *pdev;
+ struct mutex update_lock;
+ char valid; /* != 0 if registers are valid */
+ unsigned long last_updated; /* In jiffies */
+ struct system_led_data led_data;
+ };
+
+struct wistron_wtp_01_c1_00_led_data *data = NULL;
+
+static struct platform_driver wistron_wtp_01_c1_00_led_driver = {
+ .probe = wistron_wtp_01_c1_00_led_probe,
+ .remove = wistron_wtp_01_c1_00_led_remove,
+ .driver =
+ {
+ .name = DRVNAME,
+ .owner = THIS_MODULE,
+ },
+};
+
+/* Note: Keep the enum values same as the ones defined in
+ * onlp_led_mode_t (packages/base/any/onlp/src/onlp/module/inc/onlp/led.h)
+ * */
+enum led_light_mode {
+ LED_MODE_OFF,
+ LED_MODE_RED = 10,
+ LED_MODE_RED_BLINKING = 11,
+ LED_MODE_ORANGE_BLINKING = 13,
+ LED_MODE_YELLOW = 14,
+ LED_MODE_YELLOW_BLINKING = 15,
+ LED_MODE_GREEN = 16,
+ LED_MODE_GREEN_BLINKING = 17,
+ LED_MODE_BLUE = 18,
+ LED_MODE_BLUE_BLINKING = 19,
+ LED_MODE_PURPLE = 20,
+ LED_MODE_PURPLE_BLINKING = 21,
+ LED_MODE_AUTO = 22,
+ LED_MODE_AUTO_BLINKING = 23,
+ LED_MODE_WHITE = 24,
+ LED_MODE_WHITE_BLINKING = 25,
+ LED_MODE_CYAN = 26,
+ LED_MODE_CYAN_BLINKING = 27,
+ LED_MODE_UNKNOWN = 99
+};
+
+enum wistron_wtp_01_c1_00_led_sysfs_attrs {
+ LED_SYS,
+ LED_PSU,
+// LED_SFP1,
+// LED_SFP2,
+ LED_QSFP1,
+ LED_QSFP2,
+ LED_QSFP3,
+ LED_QSFP4,
+ LED_QSFP5,
+ LED_QSFP6,
+ LED_QSFP7,
+ LED_QSFP8,
+ LED_QSFP9,
+ LED_QSFP10,
+ LED_QSFP11,
+ LED_QSFP12,
+ LED_QSFP13,
+ LED_QSFP14,
+ LED_QSFP15,
+ LED_QSFP16,
+ LED_CFP1,
+ LED_CFP2,
+ LED_CFP3,
+ LED_CFP4
+};
+
+static SENSOR_DEVICE_ATTR(led_sys, S_IWUSR | S_IRUGO, show_led, set_led, LED_SYS);
+static SENSOR_DEVICE_ATTR(led_psu, S_IWUSR | S_IRUGO, show_led, set_led, LED_PSU);
+//static SENSOR_DEVICE_ATTR(led_sfp1, S_IWUSR | S_IRUGO, show_led, set_led, LED_QSFP1);
+//static SENSOR_DEVICE_ATTR(led_sfp2, S_IWUSR | S_IRUGO, show_led, set_led, LED_QSFP2);
+static SENSOR_DEVICE_ATTR(led_qsfp1, S_IWUSR | S_IRUGO, show_led, set_led, LED_QSFP1);
+static SENSOR_DEVICE_ATTR(led_qsfp2, S_IWUSR | S_IRUGO, show_led, set_led, LED_QSFP2);
+static SENSOR_DEVICE_ATTR(led_qsfp3, S_IWUSR | S_IRUGO, show_led, set_led, LED_QSFP3);
+static SENSOR_DEVICE_ATTR(led_qsfp4, S_IWUSR | S_IRUGO, show_led, set_led, LED_QSFP4);
+static SENSOR_DEVICE_ATTR(led_qsfp5, S_IWUSR | S_IRUGO, show_led, set_led, LED_QSFP5);
+static SENSOR_DEVICE_ATTR(led_qsfp6, S_IWUSR | S_IRUGO, show_led, set_led, LED_QSFP6);
+static SENSOR_DEVICE_ATTR(led_qsfp7, S_IWUSR | S_IRUGO, show_led, set_led, LED_QSFP7);
+static SENSOR_DEVICE_ATTR(led_qsfp8, S_IWUSR | S_IRUGO, show_led, set_led, LED_QSFP8);
+static SENSOR_DEVICE_ATTR(led_qsfp9, S_IWUSR | S_IRUGO, show_led, set_led, LED_QSFP9);
+static SENSOR_DEVICE_ATTR(led_qsfp10, S_IWUSR | S_IRUGO, show_led, set_led, LED_QSFP10);
+static SENSOR_DEVICE_ATTR(led_qsfp11, S_IWUSR | S_IRUGO, show_led, set_led, LED_QSFP11);
+static SENSOR_DEVICE_ATTR(led_qsfp12, S_IWUSR | S_IRUGO, show_led, set_led, LED_QSFP12);
+static SENSOR_DEVICE_ATTR(led_qsfp13, S_IWUSR | S_IRUGO, show_led, set_led, LED_QSFP13);
+static SENSOR_DEVICE_ATTR(led_qsfp14, S_IWUSR | S_IRUGO, show_led, set_led, LED_QSFP14);
+static SENSOR_DEVICE_ATTR(led_qsfp15, S_IWUSR | S_IRUGO, show_led, set_led, LED_QSFP15);
+static SENSOR_DEVICE_ATTR(led_qsfp16, S_IWUSR | S_IRUGO, show_led, set_led, LED_QSFP16);
+static SENSOR_DEVICE_ATTR(led_cfp1, S_IWUSR | S_IRUGO, show_led, set_led, LED_CFP1);
+static SENSOR_DEVICE_ATTR(led_cfp2, S_IWUSR | S_IRUGO, show_led, set_led, LED_CFP2);
+static SENSOR_DEVICE_ATTR(led_cfp3, S_IWUSR | S_IRUGO, show_led, set_led, LED_CFP3);
+static SENSOR_DEVICE_ATTR(led_cfp4, S_IWUSR | S_IRUGO, show_led, set_led, LED_CFP4);
+
+
+static struct attribute *wistron_wtp_01_c1_00_led_attributes[] = {
+ &sensor_dev_attr_led_sys.dev_attr.attr,
+ &sensor_dev_attr_led_psu.dev_attr.attr,
+// &sensor_dev_attr_led_sfp1.dev_attr.attr,
+// &sensor_dev_attr_led_sfp2.dev_attr.attr,
+ &sensor_dev_attr_led_qsfp1.dev_attr.attr,
+ &sensor_dev_attr_led_qsfp2.dev_attr.attr,
+ &sensor_dev_attr_led_qsfp3.dev_attr.attr,
+ &sensor_dev_attr_led_qsfp4.dev_attr.attr,
+ &sensor_dev_attr_led_qsfp5.dev_attr.attr,
+ &sensor_dev_attr_led_qsfp6.dev_attr.attr,
+ &sensor_dev_attr_led_qsfp7.dev_attr.attr,
+ &sensor_dev_attr_led_qsfp8.dev_attr.attr,
+ &sensor_dev_attr_led_qsfp9.dev_attr.attr,
+ &sensor_dev_attr_led_qsfp10.dev_attr.attr,
+ &sensor_dev_attr_led_qsfp11.dev_attr.attr,
+ &sensor_dev_attr_led_qsfp12.dev_attr.attr,
+ &sensor_dev_attr_led_qsfp13.dev_attr.attr,
+ &sensor_dev_attr_led_qsfp14.dev_attr.attr,
+ &sensor_dev_attr_led_qsfp15.dev_attr.attr,
+ &sensor_dev_attr_led_qsfp16.dev_attr.attr,
+ &sensor_dev_attr_led_cfp1.dev_attr.attr,
+ &sensor_dev_attr_led_cfp2.dev_attr.attr,
+ &sensor_dev_attr_led_cfp3.dev_attr.attr,
+ &sensor_dev_attr_led_cfp4.dev_attr.attr,NULL};
+
+static const struct attribute_group wistron_wtp_01_c1_00_led_group = {
+ .attrs = wistron_wtp_01_c1_00_led_attributes,
+};
+
+typedef struct _fpga_context_t {
+ void* map_base;
+ int map_size;
+ off_t target;
+ off_t target_base;
+ int type_width;
+ int items_count;
+} fpga_context_t;
+
+int fpga_open(fpga_context_t* fpga, off_t target, int type_width, int items_count)
+{
+ int map_size = 4096UL;
+ off_t target_base;
+
+ if ( fpga == NULL ) {
+ return -1;
+ }
+
+ target_base = target & FPGA_PAGE_MASK;
+ if (target + items_count*type_width - target_base > map_size)
+ map_size = target + items_count*type_width - target_base;
+
+ fpga->map_base = ioremap(FPGA_PCIE_ADDRESS+target_base, map_size);
+ if(fpga->map_base==NULL)
+ {
+ return -ENOMEM;
+ }
+ fpga->map_size = map_size;
+ fpga->target = target;
+ fpga->target_base = target_base;
+ fpga->type_width = type_width;
+ fpga->items_count = items_count;
+
+ return 0;
+}
+
+int fpga_close(fpga_context_t* fpga) {
+ if (fpga == NULL ) {
+ return 0;
+ }
+
+ iounmap(fpga->map_base);
+ fpga->map_base = NULL;
+ fpga->map_size = 0;
+
+ return 0;
+}
+
+int fpga_read(int offset, int *value)
+{
+ fpga_context_t ctx;
+ int rv;
+ void *virt_addr;
+
+ rv = fpga_open(&ctx, offset, 4, 1);
+ if ( rv < 0 ) return rv;
+
+ virt_addr = ctx.map_base + ctx.target - ctx.target_base;
+ *value = *((uint32_t *) virt_addr);
+
+ return fpga_close(&ctx);
+}
+
+int fpga_write(int offset, int value)
+{
+ fpga_context_t ctx;
+ int rv;
+ void *virt_addr;
+
+ rv = fpga_open(&ctx, offset, 4, 1);
+ if ( rv < 0 ) return rv;
+ virt_addr = ctx.map_base + ctx.target - ctx.target_base;
+ *((uint32_t *) virt_addr) = value;
+
+ return fpga_close(&ctx);
+}
+
+
+
+static struct wistron_wtp_01_c1_00_led_data *
+wistron_wtp_01_c1_00_led_update_device(void) {
+ int status = 0;
+ int value1, value2;
+
+ if (time_before(jiffies, data->last_updated + HZ * 5) && data->valid) {
+ return data;
+ }
+
+ data->valid = 0;
+
+ fpga_read(0x090000B0, &value1);
+ fpga_read(0x090000C0, &value2);
+
+ data->led_data.led_reg_B0 = value1;
+ data->led_data.led_reg_C0 = value2;
+
+ fpga_read(0x090000A8, &value1);
+ fpga_read(0x090000B8, &value2);
+
+ data->led_data.led_reg_A8 = value1;
+ data->led_data.led_reg_B8 = value2;
+
+ if (unlikely(status != 0)) {
+ goto exit;
+ }
+
+ data->last_updated = jiffies;
+ data->valid = 1;
+
+exit:
+ return data;
+}
+
+static ssize_t show_led(struct device *dev, struct device_attribute *da,
+ char *buf) {
+ struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+ int mode = 0, tmp_val, lid=attr->index;
+ int value1 = 0, value2 = 0, error = 0;
+
+ mutex_lock(&data->update_lock);
+
+ data = wistron_wtp_01_c1_00_led_update_device();
+ if (!data->valid) {
+ error = -EIO;
+ goto exit;
+ }
+
+ if ((lid >= LED_QSFP1) && (lid <= LED_QSFP8))
+ {
+ value1 = data->led_data.led_reg_B0;
+ value2 = data->led_data.led_reg_C0;
+
+ value1 = ~(value1 >> ((LED_QSFP8-lid)*2)) & 0x03;
+ value2 = (value2 >> ((LED_QSFP8-lid)*2)) & 0x03;
+
+ //printk("[DRV_GET_LED] lid[%x], B0[%x], C0[%x], value1[%x], value2[%x]\n", lid, data->led_data.led_reg_B0, data->led_data.led_reg_C0, value1, value2);
+ // normal mode priority higher than blinking mode, clear blinking mode if normal
+ if (value1)
+ {
+ if (value1 == 0x2)
+ mode = LED_MODE_GREEN;
+ else if (value1 == 0x1)
+ mode = LED_MODE_YELLOW;
+ else
+ mode = LED_MODE_OFF;
+ } else {
+ if (value2 == 0x2)
+ mode = LED_MODE_GREEN_BLINKING;
+ else if (value2 == 0x1)
+ mode = LED_MODE_YELLOW_BLINKING;
+ else
+ mode = LED_MODE_OFF;
+ }
+ }
+ else if ((lid >= LED_QSFP9) && (lid <= LED_QSFP16))
+ {
+ value1 = data->led_data.led_reg_A8;
+ value2 = data->led_data.led_reg_B8;
+
+ value1 = ~(value1 >> ((LED_QSFP16-lid)*2+16)) & 0x03;
+ value2 = (value2 >> ((LED_QSFP16-lid)*2+16)) & 0x03;
+
+ // normal mode priority higher than blinking mode, clear blinking mode if normal
+ if (value1)
+ {
+ if (value1 == 0x2)
+ mode = LED_MODE_GREEN;
+ else if (value1 == 0x1)
+ mode = LED_MODE_YELLOW;
+ else
+ mode = LED_MODE_OFF;
+ } else {
+ if (value2 == 0x2)
+ mode = LED_MODE_GREEN_BLINKING;
+ else if (value2 == 0x1)
+ mode = LED_MODE_YELLOW_BLINKING;
+ else
+ mode = LED_MODE_OFF;
+ }
+ }
+ else if ((lid >= LED_CFP1) && (lid <= LED_CFP4))
+ {
+ value1 = data->led_data.led_reg_A8;
+ value2 = data->led_data.led_reg_B8;
+
+ value1 = (value1 >> ((LED_CFP4-lid)*2+8)) & 0x03;
+ value2 = (value2 >> ((LED_CFP4-lid)*2+8)) & 0x03;
+
+ // normal mode priority higher than blinking mode, clear blinking mode if normal
+ if (value1)
+ {
+ if (value1 == 0x2)
+ mode = LED_MODE_BLUE;
+ else if (value1 == 0x1)
+ mode = LED_MODE_GREEN;
+ else
+ mode = LED_MODE_OFF;
+ } else {
+ if (value2 == 0x2)
+ mode = LED_MODE_BLUE_BLINKING;
+ else if (value2 == 0x1)
+ mode = LED_MODE_GREEN_BLINKING;
+ else
+ mode = LED_MODE_OFF;
+ }
+ }
+ else
+ {
+ switch (lid) {
+ case LED_SYS:
+ value1 = (data->led_data.led_reg_A8 >> 4);
+ value2 = (data->led_data.led_reg_B8 >> 4);
+
+ // blinking priority > normal for sys led
+ tmp_val = value2 & 0x3;
+ if (tmp_val) {
+ if (tmp_val == 0x02)
+ mode = LED_MODE_RED_BLINKING;
+ else if (tmp_val == 0x01)
+ mode = LED_MODE_GREEN_BLINKING;
+ else
+ mode = LED_MODE_OFF;
+ } else {
+ tmp_val = value1 & 0x3;
+ if (tmp_val == 0x02)
+ mode = LED_MODE_RED;
+ else if (tmp_val == 0x01)
+ mode = LED_MODE_GREEN;
+ else
+ mode = LED_MODE_OFF;
+ }
+
+ break;
+
+ case LED_PSU:
+ value1 = (data->led_data.led_reg_A8 >> 6);
+ value2 = (data->led_data.led_reg_B8 >> 6);
+
+ // blinking priority > normal for psu led
+ tmp_val = value2 & 0x3;
+
+ if (tmp_val) {
+ if (tmp_val == 0x02)
+ mode = LED_MODE_RED_BLINKING;
+ else if (tmp_val == 0x01)
+ mode = LED_MODE_GREEN_BLINKING;
+ else
+ mode = LED_MODE_OFF;
+ } else {
+ tmp_val = value1 & 0x3;
+ if (tmp_val == 0x02)
+ mode = LED_MODE_RED;
+ else if (tmp_val == 0x01)
+ mode = LED_MODE_GREEN;
+ else
+ mode = LED_MODE_OFF;
+ }
+
+ break;
+
+
+ default:
+ error = -EINVAL;
+ goto exit;
+ }
+ }
+
+ mutex_unlock(&data->update_lock);
+ return sprintf(buf, "%d\n", mode);
+
+exit:
+ mutex_unlock(&data->update_lock);
+ return error;
+}
+
+static ssize_t set_led(struct device *dev, struct device_attribute *da,
+ const char *buf, size_t count) {
+ long mode;
+ int rv, _value;
+ int status, value, lid;
+ struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+
+ status = kstrtol(buf, 10, &mode);
+
+ //printk("[DRV_SET_LED] index[%x], mode[%lx], status[%x], buf[%s]\n", attr->index, mode, status, buf);
+ if (status) {
+ return status;
+ }
+
+ mutex_lock(&data->update_lock);
+
+ data = wistron_wtp_01_c1_00_led_update_device();
+ if (!data->valid) {
+ status = -EIO;
+ goto exit;
+ }
+
+ //printk("[DRV_SET_LED] index[%x], mode[%lx], A8[%x], B8[%x]\n", attr->index, mode, data->led_data.led_reg_A8, data->led_data.led_reg_B8);
+
+ lid = attr->index;
+
+ if ((lid >= LED_QSFP1) && (lid <= LED_QSFP8))
+ {
+ if (mode == LED_MODE_GREEN)
+ value = 0x00002;
+ else if (mode == LED_MODE_YELLOW)
+ value = 0x00001;
+ else if (mode == LED_MODE_GREEN_BLINKING)
+ value = 0x10002;
+ else if (mode == LED_MODE_YELLOW_BLINKING)
+ value = 0x10001;
+ else
+ value = 0x00000;
+
+ if (value & 0x10000) // blinking mode
+ {
+ rv = CLEAR_QSFP_FPGA_BITS (0x090000B0, ((LED_QSFP8-lid)*2));
+ rv = SET_FPGA_BIT (0x090000C0, value, ((LED_QSFP8-lid)*2));
+ } else if ((value & 0x3) != LED_MODE_OFF) {
+ rv = SET_QSFP_FPGA_BIT (0x090000B0, value, ((LED_QSFP8-lid)*2));
+ rv = CLEAR_FPGA_BITS (0x090000C0, ((LED_QSFP8-lid)*2));
+ } else { // led off
+ rv = CLEAR_QSFP_FPGA_BITS (0x090000B0, ((LED_QSFP8-lid)*2));
+ rv = CLEAR_FPGA_BITS (0x090000C0, ((LED_QSFP8-lid)*2));
+ }
+
+ }
+ else if ((lid >= LED_QSFP9) && (lid <= LED_QSFP16))
+ {
+ if (mode == LED_MODE_GREEN)
+ value = 0x00002;
+ else if (mode == LED_MODE_YELLOW)
+ value = 0x00001;
+ else if (mode == LED_MODE_GREEN_BLINKING)
+ value = 0x10002;
+ else if (mode == LED_MODE_YELLOW_BLINKING)
+ value = 0x10001;
+ else
+ value = 0x00000;
+
+ if (value & 0x10000) // blinking mode
+ {
+ rv = CLEAR_QSFP_FPGA_BITS (0x090000A8, ((LED_QSFP16-lid)*2+16));
+ rv = SET_FPGA_BIT (0x090000B8, value, ((LED_QSFP16-lid)*2+16));
+ } else if ((value & 0x3) != LED_MODE_OFF) {
+ rv = SET_QSFP_FPGA_BIT (0x090000A8, value, ((LED_QSFP16-lid)*2+16));
+ rv = CLEAR_FPGA_BITS (0x090000B8, ((LED_QSFP16-lid)*2+16));
+ } else { // led off
+ rv = CLEAR_QSFP_FPGA_BITS (0x090000A8, ((LED_QSFP16-lid)*2+16));
+ rv = CLEAR_FPGA_BITS (0x090000B8, ((LED_QSFP16-lid)*2+16));
+ }
+
+ }
+ else if ((lid >= LED_CFP1) && (lid <= LED_CFP4))
+ {
+ if (mode == LED_MODE_BLUE)
+ value = 0x00002;
+ else if (mode == LED_MODE_GREEN)
+ value = 0x00001;
+ else if (mode == LED_MODE_BLUE_BLINKING)
+ value = 0x10002;
+ else if (mode == LED_MODE_GREEN_BLINKING)
+ value = 0x10001;
+ else
+ value = 0x00000;
+
+ if (value & 0x10000) // blinking mode
+ {
+ rv = CLEAR_FPGA_BITS (0x090000A8, ((LED_CFP4-lid)*2+8));
+ rv = SET_FPGA_BIT (0x090000B8, value, ((LED_CFP4-lid)*2+8));
+ } else if (value & 0x3) {
+ rv = SET_FPGA_BIT (0x090000A8, value, ((LED_CFP4-lid)*2+8));
+ rv = CLEAR_FPGA_BITS (0x090000B8, ((LED_CFP4-lid)*2+8));
+ } else { // led off
+ rv = CLEAR_FPGA_BITS (0x090000A8, ((LED_CFP4-lid)*2+8));
+ rv = CLEAR_FPGA_BITS (0x090000B8, ((LED_CFP4-lid)*2+8));
+ }
+
+ }
+ else
+ {
+ switch (attr->index) {
+ case LED_SYS:
+ if (mode == LED_MODE_RED_BLINKING)
+ value = 0x10002;
+ else if (mode == LED_MODE_GREEN_BLINKING)
+ value = 0x10001;
+ else if (mode == LED_MODE_GREEN)
+ value = 0x00001;
+ else
+ value = 0x00000;
+
+ if (value & 0x10000) // blinking mode
+ {
+ rv = CLEAR_FPGA_BITS (0x090000A8, 4);
+ rv = SET_FPGA_BIT (0x090000B8, value, 4);
+ } else {
+ rv = SET_FPGA_BIT (0x090000A8, value, 4);
+ rv = CLEAR_FPGA_BITS (0x090000B8, 4);
+ }
+
+ break;
+
+ case LED_PSU:
+ if (mode == LED_MODE_RED_BLINKING)
+ value = 0x10002;
+ else if (mode == LED_MODE_RED)
+ value = 0x00002;
+ else if (mode == LED_MODE_GREEN)
+ value = 0x00001;
+ else
+ value = 0x00000;
+
+ if (value & 0x10000) // blinking mode
+ {
+ rv = CLEAR_FPGA_BITS (0x090000A8, 6);
+ rv = SET_FPGA_BIT (0x090000B8, value, 6);
+ } else {
+ rv = SET_FPGA_BIT (0x090000A8, value, 6);
+ rv = CLEAR_FPGA_BITS (0x090000B8, 6);
+ }
+ break;
+
+ default:
+ status = -EINVAL;
+ goto exit;
+ }
+ }
+
+ if (unlikely(status != 0)) {
+ goto exit;
+ }
+
+ status = count;
+
+exit:
+ mutex_unlock(&data->update_lock);
+ return status;
+}
+
+static int wistron_wtp_01_c1_00_led_probe(struct platform_device *pdev) {
+ int status = -1;
+
+ /* Register sysfs hooks */
+ status = sysfs_create_group(&pdev->dev.kobj, &wistron_wtp_01_c1_00_led_group);
+ if (status) {
+ goto exit;
+ }
+
+ dev_info(&pdev->dev, "device created\n");
+
+ return 0;
+
+exit:
+ return status;
+}
+
+static int wistron_wtp_01_c1_00_led_remove(struct platform_device *pdev) {
+ sysfs_remove_group(&pdev->dev.kobj, &wistron_wtp_01_c1_00_led_group);
+
+ return 0;
+}
+
+static int __init wistron_wtp_01_c1_00_led_init(void) {
+ int ret;
+
+ data = kzalloc(sizeof(struct wistron_wtp_01_c1_00_led_data), GFP_KERNEL);
+ if (!data) {
+ ret = -ENOMEM;
+ goto alloc_err;
+ }
+
+ mutex_init(&data->update_lock);
+ data->valid = 0;
+
+ ret = platform_driver_register(&wistron_wtp_01_c1_00_led_driver);
+ if (ret < 0) {
+ goto dri_reg_err;
+ }
+
+ data->pdev = platform_device_register_simple(DRVNAME, -1, NULL, 0);
+ if (IS_ERR(data->pdev)) {
+ ret = PTR_ERR(data->pdev);
+ goto dev_reg_err;
+ }
+
+
+ return 0;
+
+dev_reg_err:
+ platform_driver_unregister(&wistron_wtp_01_c1_00_led_driver);
+dri_reg_err:
+ kfree(data);
+alloc_err:
+ return ret;
+}
+
+static void __exit wistron_wtp_01_c1_00_led_exit(void) {
+ platform_device_unregister(data->pdev);
+ platform_driver_unregister(&wistron_wtp_01_c1_00_led_driver);
+ kfree(data);
+}
+
+MODULE_AUTHOR("HarshaF1");
+MODULE_DESCRIPTION("Wistron WTP-01-c1-00 LED driver");
+MODULE_LICENSE("GPL");
+
+module_init(wistron_wtp_01_c1_00_led_init);
+module_exit(wistron_wtp_01_c1_00_led_exit);
diff --git a/packages/platforms/wistron/arm64/wtp-01-c1-00/modules/builds/arm64-wistron-wtp-01-c1-00-psu.c b/packages/platforms/wistron/arm64/wtp-01-c1-00/modules/builds/arm64-wistron-wtp-01-c1-00-psu.c
new file mode 100644
index 0000000..bb6b6e6
--- /dev/null
+++ b/packages/platforms/wistron/arm64/wtp-01-c1-00/modules/builds/arm64-wistron-wtp-01-c1-00-psu.c
@@ -0,0 +1,864 @@
+/*
+ * Based on:
+ * pca954x.c from Kumar Gala
+ * Copyright (C) 2006
+ *
+ * Based on:
+ * pca954x.c from Ken Harrenstien
+ * Copyright (C) 2004 Google, Inc. (Ken Harrenstien)
+ *
+ * Based on:
+ * i2c-virtual_cb.c from Brian Kuschak
+ * and
+ * pca9540.c from Jean Delvare .
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+/* Some of the psu-info is missing in Hw specs from Wistron,
+ * hence some part of the code is commented out */
+#define DRVNAME "wtp_01_c1_00_psu"
+
+#define CAN_BUFFER_SIZE 8
+
+static ssize_t show_psu(struct device *dev, struct device_attribute *attr,
+ char *buf);
+static ssize_t set_psu(struct device *dev, struct device_attribute *da,
+ const char *buf, size_t count);
+ static int wistron_wtp_01_c1_00_psu_probe(struct platform_device *pdev);
+static int wistron_wtp_01_c1_00_psu_remove(struct platform_device *pdev);
+
+static const char * PSU_TYPE_NOT_PRESENT = "not-present";
+static const char * PSU_TYPE_AC = "AC PSU";
+static const char * PSU_TYPE_DC48V = "DC12V PSU";
+static const char * PSU_TYPE_UNKNOWN = "unknown";
+
+enum psu_id { PSU_1, PSU_2, NUM_OF_PSU };
+
+
+struct psu_sensor_data {
+// unsigned int pout_reading;
+// unsigned int pin_reading;
+ unsigned int vout_reading;
+ unsigned int vin_reading;
+ unsigned int iout_reading;
+ unsigned int iin_reading;
+ unsigned char psu_temp;
+// unsigned char psu_temp_thresh_caps;
+// unsigned char psu_temp_thresholds[6];
+ int psu_fan1_rpm;
+ int psu_fan2_rpm;
+ int psu_fan3_rpm;
+ int psu_fan_pwm;
+ unsigned char status;
+ char serial[32];
+ const char *type;
+};
+
+struct wistron_wtp_01_c1_00_psu_data {
+ struct platform_device *pdev;
+ struct mutex update_lock;
+ char valid[2]; /* != 0 if registers are valid */
+ unsigned long last_updated[2]; /* In jiffies */
+ struct psu_sensor_data psu_data[2];
+};
+
+struct wistron_wtp_01_c1_00_psu_data *data = NULL;
+
+static struct platform_driver wistron_wtp_01_c1_00_psu_driver = {
+ .probe = wistron_wtp_01_c1_00_psu_probe,
+ .remove = wistron_wtp_01_c1_00_psu_remove,
+ .driver =
+ {
+ .name = DRVNAME,
+ .owner = THIS_MODULE,
+ },
+};
+
+#define PSU_STATUS_ATTR_ID(index) PSU##index##_STATUS
+#define PSU_VIN_ATTR_ID(index) PSU##index##_VIN
+#define PSU_VOUT_ATTR_ID(index) PSU##index##_VOUT
+//#define PSU_PIN_ATTR_ID(index) PSU##index##_PIN
+//#define PSU_POUT_ATTR_ID(index) PSU##index##_POUT
+#define PSU_IOUT_ATTR_ID(index) PSU##index##_IOUT
+#define PSU_IIN_ATTR_ID(index) PSU##index##_IIN
+#define PSU_MODEL_ATTR_ID(index) PSU##index##_MODEL
+#define PSU_TEMP_ATTR_ID(index) PSU##index##_TEMP
+//#define PSU_TEMP_THRESH_CAPS_ATTR_ID(index) PSU##index##_TEMP_THRESH_CAPS
+//#define PSU_TEMP_THRESH_ATTR_ID(index) PSU##index##_TEMP_THRESH
+#define PSU_FAN1_RPM_ATTR_ID(index) PSU##index##_FAN1_RPM
+#define PSU_FAN2_RPM_ATTR_ID(index) PSU##index##_FAN2_RPM
+#define PSU_FAN3_RPM_ATTR_ID(index) PSU##index##_FAN3_RPM
+#define PSU_FAN_PWM_ATTR_ID(index) PSU##index##_FAN_PWM
+#define PSU_TYPE_ATTR_ID(index) PSU##index##_TYPE
+
+#define PSU_ATTR(psu_id) \
+ PSU_STATUS_ATTR_ID(psu_id), PSU_VOUT_ATTR_ID(psu_id), \
+ PSU_VIN_ATTR_ID(psu_id), PSU_IOUT_ATTR_ID(psu_id), \
+ PSU_IIN_ATTR_ID(psu_id), PSU_TEMP_ATTR_ID(psu_id), \
+ PSU_FAN1_RPM_ATTR_ID(psu_id), PSU_FAN2_RPM_ATTR_ID(psu_id), \
+ PSU_FAN3_RPM_ATTR_ID(psu_id), PSU_FAN_PWM_ATTR_ID(psu_id), \
+ PSU_TYPE_ATTR_ID(psu_id)
+/* PSU_PIN_ATTR_ID(psu_id), PSU_POUT_ATTR_ID(psu_id), \ */
+/* PSU_TEMP_THRESH_CAPS_ATTR_ID(psu_id), PSU_TEMP_THRESH_ATTR_ID(psu_id), \ */
+
+enum wistron_wtp_01_c1_00_psu_sysfs_attrs {
+ /* psu attributes */
+ PSU_ATTR(1),
+ PSU_ATTR(2),
+ NUM_OF_PSU_ATTR,
+ NUM_OF_PER_PSU_ATTR = (NUM_OF_PSU_ATTR / NUM_OF_PSU)
+};
+
+/* psu attributes */
+#define DECLARE_PSU_SENSOR_DEVICE_ATTR(index) \
+ static SENSOR_DEVICE_ATTR(psu##index##_status, S_IRUGO, show_psu, NULL, \
+ PSU##index##_STATUS); \
+ static SENSOR_DEVICE_ATTR(psu##index##_vin, S_IRUGO, show_psu, NULL, \
+ PSU##index##_VIN); \
+ static SENSOR_DEVICE_ATTR(psu##index##_vout, S_IRUGO, show_psu, NULL, \
+ PSU##index##_VOUT); \
+ static SENSOR_DEVICE_ATTR(psu##index##_iin, S_IRUGO, show_psu, NULL, \
+ PSU##index##_IIN); \
+ static SENSOR_DEVICE_ATTR(psu##index##_iout, S_IRUGO, show_psu, NULL, \
+ PSU##index##_IOUT); \
+ static SENSOR_DEVICE_ATTR(psu##index##_temp, S_IRUGO, show_psu, NULL, \
+ PSU##index##_TEMP); \
+ static SENSOR_DEVICE_ATTR(psu##index##_fan1_rpm, S_IRUGO, show_psu, set_psu, \
+ PSU##index##_FAN1_RPM); \
+ static SENSOR_DEVICE_ATTR(psu##index##_fan2_rpm, S_IRUGO, show_psu, set_psu, \
+ PSU##index##_FAN2_RPM); \
+ static SENSOR_DEVICE_ATTR(psu##index##_fan3_rpm, S_IRUGO, show_psu, set_psu, \
+ PSU##index##_FAN3_RPM); \
+ static SENSOR_DEVICE_ATTR(psu##index##_fan_pwm, S_IWUSR | S_IRUGO, show_psu, set_psu, \
+ PSU##index##_FAN_PWM); \
+ static SENSOR_DEVICE_ATTR(psu##index##_type, S_IRUGO, show_psu, NULL, \
+ PSU##index##_TYPE)
+/* static SENSOR_DEVICE_ATTR(psu##index##_pin, S_IRUGO, show_psu, NULL, \
+ PSU##index##_PIN); \
+ static SENSOR_DEVICE_ATTR(psu##index##_pout, S_IRUGO, show_psu, NULL, \
+ PSU##index##_POUT); \
+ static SENSOR_DEVICE_ATTR(psu##index##_temp_thresh_caps, S_IRUGO, show_psu, \
+ NULL, PSU##index##_TEMP_THRESH_CAPS); \
+ static SENSOR_DEVICE_ATTR(psu##index##_temp_thresh, S_IRUGO, show_psu, NULL, \
+ PSU##index##_TEMP_THRESH); \ */
+
+#define DECLARE_PSU_ATTR(index) \
+ &sensor_dev_attr_psu##index##_status.dev_attr.attr, \
+ &sensor_dev_attr_psu##index##_vin.dev_attr.attr, \
+ &sensor_dev_attr_psu##index##_vout.dev_attr.attr, \
+ &sensor_dev_attr_psu##index##_iin.dev_attr.attr, \
+ &sensor_dev_attr_psu##index##_iout.dev_attr.attr, \
+ &sensor_dev_attr_psu##index##_temp.dev_attr.attr, \
+ &sensor_dev_attr_psu##index##_fan1_rpm.dev_attr.attr, \
+ &sensor_dev_attr_psu##index##_fan2_rpm.dev_attr.attr, \
+ &sensor_dev_attr_psu##index##_fan3_rpm.dev_attr.attr, \
+ &sensor_dev_attr_psu##index##_fan_pwm.dev_attr.attr, \
+ &sensor_dev_attr_psu##index##_type.dev_attr.attr \
+/* &sensor_dev_attr_psu##index##_pin.dev_attr.attr, \
+ &sensor_dev_attr_psu##index##_pout.dev_attr.attr, \
+ &sensor_dev_attr_psu##index##_temp_thresh_caps.dev_attr.attr, \
+ &sensor_dev_attr_psu##index##_temp_thresh.dev_attr.attr, \ */
+
+DECLARE_PSU_SENSOR_DEVICE_ATTR(1);
+DECLARE_PSU_SENSOR_DEVICE_ATTR(2);
+
+static struct attribute *wistron_wtp_01_c1_00_psu_attributes[] = {
+ /* psu attributes */
+ DECLARE_PSU_ATTR(1), DECLARE_PSU_ATTR(2), NULL
+};
+
+static const struct attribute_group wistron_wtp_01_c1_00_psu_group = {
+ .attrs = wistron_wtp_01_c1_00_psu_attributes,
+};
+
+
+int CANID[] = { 0x200, // RX_PDO1
+ 0x180, // TX_PDO1
+ 0x280, // TX_PDO2
+ 0x380, // TX_PDO3
+ 0x480}; // TX_PDO4
+
+struct socket
+*onlp_can_open(int psu_id, uint8_t cob)
+{
+ int rv;
+ struct ifreq ifr;
+ struct can_filter rfilter[1];
+ struct sockaddr_can addr;
+ int can_id;
+ struct socket *sock;
+ struct timeval timeout;
+
+ if (sock_create_kern(&init_net, PF_CAN, SOCK_RAW, CAN_RAW, &sock) < 0)
+ {
+ dev_err(&data->pdev->dev, "sock_create_kern failed");
+ goto error;
+ }
+
+
+ /* Set SLAVE or SLAVE_FORCE address */
+ strcpy(ifr.ifr_name, "can0" );
+ //ioctl(fd, SIOCGIFINDEX, &ifr);
+
+ ifr.ifr_ifindex = 2;
+ memset(&addr, 0, sizeof(addr));
+ addr.can_family = AF_CAN;
+ addr.can_ifindex = ifr.ifr_ifindex;
+
+ if ((rv=kernel_bind(sock, (struct sockaddr *)&addr, sizeof(addr))) < 0) {
+ dev_err(&data->pdev->dev, "CanBus %d: bind failed rv[%x]", psu_id, rv);
+ goto error;
+ }
+
+
+ // set timeout to 0.3 second (300,000)
+ timeout.tv_sec = 0;
+ timeout.tv_usec = 300000;
+
+ if (kernel_setsockopt (sock, SOL_SOCKET, /*SO_REUSEADDR*/SO_RCVTIMEO_OLD, (char *)&timeout, sizeof(timeout)) < 0)
+ {
+ dev_err(&data->pdev->dev, "setsockopt set timeout failed\n");
+ goto error;
+ }
+
+ can_id = CANID[cob] + psu_id ;
+ rfilter[0].can_id = can_id;
+ rfilter[0].can_mask = CAN_SFF_MASK;
+ //rfilter[0].can_mask = 0xFFF;
+
+ rv = kernel_setsockopt(sock, SOL_CAN_RAW, CAN_RAW_FILTER, (char *)&rfilter, sizeof(rfilter));
+
+ if(rv < 0) {
+ dev_err(&data->pdev->dev, "CabBus %d: socket operation failed %x", psu_id, rv);
+ goto error;
+ }
+
+ return sock;
+
+ error:
+
+ kernel_sock_shutdown(sock, SHUT_RDWR);
+ sock_release(sock);
+
+ return 0;
+}
+
+int
+onlp_can_read(int fid, int size, uint8_t* rdata, uint32_t flags)
+{
+ struct socket *sock;
+ int nbytes, error_count=1;
+ int can_id;
+ struct can_frame frame;
+ struct kvec can_vec;
+ struct msghdr can_msg;
+
+ struct sockaddr_can addr;
+ struct ifreq ifr;
+ // fid is 0 base, psu_id is 1 base
+ int psu_id = fid+1;
+
+ sock = onlp_can_open(psu_id, flags);
+ if (sock == 0) {
+ //dev_err(&data->pdev->dev, "CANBus-%d: open failed", psu_id);
+ goto error;
+ }
+
+ memset(&frame, 0, sizeof(frame));
+ can_id = CANID[flags] + psu_id ;
+
+ frame.can_id = can_id;
+ frame.can_dlc = 0;
+
+ memset(&can_vec, 0, sizeof(can_vec));
+ memset(&can_msg, 0, sizeof(can_msg));
+
+ can_vec.iov_base = &frame; //can_buf;
+ can_vec.iov_len = sizeof(struct can_frame);
+
+ //can_msg.msg_iov =
+ strcpy(ifr.ifr_name, "can0");
+ ifr.ifr_ifindex = 2;
+ addr.can_ifindex = ifr.ifr_ifindex;
+ addr.can_family = AF_CAN;
+
+
+ if((nbytes = kernel_sendmsg(sock, &can_msg, &can_vec, 1, sizeof(struct can_frame))) < sizeof(struct can_frame))
+ {
+ dev_err(&data->pdev->dev, "CANBus-%d[can_id:0x%x]: sendmsg failed, rv=%x", psu_id, can_id, nbytes);
+ goto error;
+ }
+
+ do {
+ msleep(10*error_count);
+
+ memset(&frame, 0, sizeof(frame));
+ memset(&can_vec, 0, sizeof(can_vec));
+ memset(&can_msg, 0, sizeof(can_msg));
+
+ can_vec.iov_base = &frame;
+ can_vec.iov_len = sizeof(frame);
+
+ nbytes = kernel_recvmsg(sock, &can_msg, &can_vec, 1, sizeof(frame), MSG_DONTWAIT);
+
+ if (frame.can_dlc != CAN_BUFFER_SIZE) {
+ error_count++;
+ }
+ else if (frame.can_id != can_id)
+ {
+ error_count++;
+ }
+ else
+ {
+ // succeed to receiver message from PSU
+ break;
+ }
+ if (error_count >= 5)
+ {
+ goto error;
+ }
+ } while (1);
+
+ memcpy (rdata, frame.data, frame.can_dlc);
+
+ kernel_sock_shutdown(sock, SHUT_RDWR);
+ sock_release (sock);
+
+ return frame.can_dlc;
+
+ error:
+ if (sock != 0)
+ {
+ kernel_sock_shutdown(sock, SHUT_RDWR);
+ sock_release(sock);
+ }
+
+ return -1;
+}
+
+int
+onlp_can_write(int fid, int size, uint8_t* rdata, uint32_t flags)
+{
+ struct socket *sock;
+ int nbytes;
+ int can_id;
+ struct can_frame frame;
+ struct kvec can_vec;
+ struct msghdr can_msg;
+
+ struct sockaddr_can addr;
+ struct ifreq ifr;
+ // fid is 0 base, psu_id is 1 base
+ int psu_id = fid+1;
+
+
+ sock = onlp_can_open(psu_id, flags);
+ if (sock == 0) {
+ //dev_err(&data->pdev->dev, "CANBus-%d: open failed", psu_id);
+ goto error;
+ }
+
+ can_id = CANID[flags] + psu_id ;
+
+ // Can't exceed maximum can bus data length : CAN_MAX_DLC (8)
+ size = (size > CAN_MAX_DLC) ? CAN_MAX_DLC : size;
+
+ memset(&frame, 0, sizeof(frame));
+ can_id = CANID[flags] + psu_id ;
+
+ frame.can_id = can_id;
+ frame.can_dlc = size;
+ memcpy (frame.data, rdata, size);
+
+
+ memset(&can_vec, 0, sizeof(can_vec));
+ memset(&can_msg, 0, sizeof(can_msg));
+
+ can_vec.iov_base = &frame; //can_buf;
+ can_vec.iov_len = sizeof(struct can_frame);
+
+ strcpy(ifr.ifr_name, "can0");
+ ifr.ifr_ifindex = 2;
+ addr.can_ifindex = ifr.ifr_ifindex;
+ addr.can_family = AF_CAN;
+
+
+ if((nbytes = kernel_sendmsg(sock, &can_msg, &can_vec, 1, sizeof(struct can_frame))) < sizeof(struct can_frame))
+ {
+ dev_err(&data->pdev->dev, "CANBus-%d[can_id:0x%x]: sendmsg failed, rv=%x", psu_id, can_id, nbytes);
+
+ goto error;
+ }
+
+
+ kernel_sock_shutdown(sock, SHUT_RDWR);
+ sock_release (sock);
+
+ return frame.can_dlc;
+
+ error:
+ if (sock != 0)
+ {
+ kernel_sock_shutdown(sock, SHUT_RDWR);
+ sock_release(sock);
+ }
+
+ return -1;
+}
+
+
+
+
+
+
+static int two_complement_to_int(u16 data, u8 valid_bit, int mask) {
+ u16 valid_data = data & mask;
+ bool is_negative = valid_data >> (valid_bit - 1);
+
+ return is_negative ? (-(((~valid_data) & mask) + 1)) : valid_data;
+}
+
+int
+pus_fan_pwm_set(int pid, int p)
+{
+ int ret=0;
+ unsigned char buffer[9];
+ int flags=1;
+ int error=0;
+
+ /* reject p=0 (p=0, stop fan) */
+ if (p == 0){
+ error = -EINVAL;
+ goto err;
+ }
+
+ // minimum PWM will be 30%
+ if (p < 30) {
+ p = 30;
+ }
+
+ /* Get the PSU present state */
+ data->valid[pid] = 0;
+ msleep(20);
+
+ ret = onlp_can_read(pid, CAN_BUFFER_SIZE, buffer, flags);
+ if (ret < 0) {
+ dev_err(&data->pdev->dev, "Unable to read status from (""psu%d_fan_pwm)\r\n", pid+1);
+
+ error = -EINVAL;
+ goto err;
+ }
+
+ if (buffer[0] != p)
+ {
+ dev_dbg(&data->pdev->dev, "[ONLP] PSU%d_FAN speed changed - pwm[%d]\n", (pid+1), p);
+
+ msleep(20);
+ buffer[1] = buffer[0];
+ buffer[0] = p;
+
+ // write data set flags to 0
+ flags = 0;
+ if ((ret=onlp_can_write(pid, CAN_BUFFER_SIZE, buffer, flags)) < 0) {
+ dev_err(&data->pdev->dev, "Unable to write data to fan%d_pwm [%x]", pid+1, ret);
+
+ error = -EINVAL;
+ goto err;
+ }
+
+ // need sleep to make write pwm take effect
+ msleep(80);
+ }
+
+ data->last_updated[pid] = jiffies;
+ data->valid[pid] = 1;
+
+ data->psu_data[pid].psu_fan_pwm = p;
+
+err:
+ return error;
+}
+
+static struct wistron_wtp_01_c1_00_psu_data *
+wistron_wtp_01_c1_00_psu_update_device(unsigned char fid) {
+ unsigned char temp = 0;
+// unsigned char caps = 0, thresholds[6] = {0};
+ char *type = (char *)PSU_TYPE_NOT_PRESENT;
+ int pres_status = 0, psu_fan_pwm = -1, psu_type = -1;
+ int psu_fan1_rpm = -1, psu_fan2_rpm = -1, psu_fan3_rpm = -1;
+ int vin = -1, vout = -1, iin = -1, iout = -1;
+ unsigned char buffer[80];
+ int ret = 0, flags = 1, tmp, exponent = 0, mantissa = 0;
+
+
+ if (time_before(jiffies, data->last_updated[fid] + HZ * 5) && data->valid[fid]) {
+ return data;
+ }
+
+ data->valid[fid] = 0;
+
+ ret = onlp_can_read(fid, CAN_BUFFER_SIZE, buffer, flags);
+ if (ret < 0) {
+ // psu not present
+
+ goto err;
+ }
+
+ pres_status = 1; //ONLP_PSU_STATUS_PRESENT;
+ psu_type = (buffer[5] & 0x03);
+ psu_fan_pwm = buffer[0];
+
+ if ( (psu_type == 0) || (psu_type ==1))
+ {
+ type = (char *)PSU_TYPE_DC48V;
+ // Read DC power data from PDO4
+ flags = 4;
+
+ if (onlp_can_read (fid, CAN_BUFFER_SIZE, buffer, flags) > 0)
+ {
+ // READ_VIN
+ tmp = ((buffer[1] << 8) | buffer[0]);
+
+ exponent = two_complement_to_int(tmp >> 11, 5, 0x1f);
+ mantissa = two_complement_to_int(tmp & 0x7ff, 11, 0x7ff);
+
+ if (exponent >= 0) {
+ tmp = (mantissa << exponent) * 1000;
+ } else {
+ tmp = ((mantissa * 1000) / (1 << -exponent));
+ }
+
+ vin = tmp;
+
+ // READ_VOUT
+ tmp = ((buffer[3] << 8) | buffer[2]);
+
+ exponent = two_complement_to_int(tmp >> 11, 5, 0x1f);
+ mantissa = two_complement_to_int(tmp & 0x7ff, 11, 0x7ff);
+
+ if (exponent >= 0) {
+ tmp = (mantissa << exponent) * 1000;
+ } else {
+ tmp = ((mantissa * 1000) / (1 << -exponent));
+ }
+ tmp = ((buffer[3] << 8) | buffer[2]);
+ vout = tmp;
+
+ // MFR_READ_IOUT
+ tmp = ((buffer[5] << 8) | buffer[4]);
+
+ exponent = two_complement_to_int(tmp >> 11, 5, 0x1f);
+ mantissa = two_complement_to_int(tmp & 0x7ff, 11, 0x7ff);
+
+ if (exponent >= 0) {
+ tmp = (mantissa << exponent) * 1000;
+ } else {
+ tmp = ((mantissa * 1000) / (1 << -exponent));
+ }
+ iout = tmp;
+ }
+ } else if ( (psu_type == 2) || (psu_type ==3)) {
+ type = (char *)PSU_TYPE_AC;
+
+ // Read LM25066A(AC Power) data from PDO3
+ flags = 3;
+
+ if (onlp_can_read (fid, CAN_BUFFER_SIZE, buffer, flags) > 0)
+ {
+ // READ_VIN
+ tmp = ((buffer[1] << 8) | buffer[0]);
+ vin = (tmp*10000+180000)/2207;
+
+ // READ_VOUT
+ tmp = ((buffer[3] << 8) | buffer[2]);
+ vout = (tmp*10000+180000)/2207;
+
+ // MFR_READ_IIN
+ tmp = (((buffer[7] << 8) | buffer[6])*1000000+31000000)/51405;
+ iin = tmp;
+
+ // READ_TEMPERTURE
+ //temp = (((buffer[5] << 8) | buffer[4])*1000)/16000;
+ }
+ } else {
+ type = (char *)PSU_TYPE_UNKNOWN;
+
+ }
+
+ // read rpm information , set flags = 2
+ flags = 2;
+ ret = onlp_can_read(fid, CAN_BUFFER_SIZE, buffer, flags);
+ if (ret < 0) {
+ dev_err(&data->pdev->dev, "Unable to read fan speed from (""psu%d)[%x]\r\n", fid+1, ret);
+
+ goto err;
+ }
+
+ psu_fan1_rpm = ((buffer[1] << 8) | buffer[0]);
+ psu_fan2_rpm = ((buffer[3] << 8) | buffer[2]);
+ psu_fan3_rpm = ((buffer[5] << 8) | buffer[4]);
+
+
+//exit:
+ data->last_updated[fid] = jiffies;
+ data->valid[fid] = 1;
+
+err:
+ data->psu_data[fid].vout_reading = vout;
+ data->psu_data[fid].vin_reading = vin;
+/* data->psu_data[fid].pout_reading = pout;
+ data->psu_data[fid].pin_reading = pin;*/
+ data->psu_data[fid].iout_reading = iout;
+ data->psu_data[fid].iin_reading = iin;
+ data->psu_data[fid].status = pres_status;
+ data->psu_data[fid].psu_temp = temp;
+ //data->psu_data[fid].psu_temp_thresh_caps = caps;
+ data->psu_data[fid].type = type;
+ //memcpy(&data->psu_data[fid].psu_temp_thresholds[0], &thresholds[0], 6);
+ data->psu_data[fid].psu_fan1_rpm = psu_fan1_rpm;
+ data->psu_data[fid].psu_fan2_rpm = psu_fan2_rpm;
+ data->psu_data[fid].psu_fan3_rpm = psu_fan3_rpm;
+ data->psu_data[fid].psu_fan_pwm = psu_fan_pwm;
+
+ return data;
+}
+
+static ssize_t show_psu(struct device *dev, struct device_attribute *da,
+ char *buf) {
+ struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+ unsigned char fid = (attr->index / NUM_OF_PER_PSU_ATTR);
+ int value = 0;
+ int error = 0;
+ char *str = NULL;//, tmpbuf[64] = {0};
+ bool print_str = 0;
+
+ mutex_lock(&data->update_lock);
+
+ data = wistron_wtp_01_c1_00_psu_update_device(fid);
+ if (!data->valid) {
+ error = -EIO;
+ goto exit;
+ }
+
+ switch (attr->index) {
+ case PSU1_STATUS:
+ case PSU2_STATUS:
+ value = data->psu_data[fid].status;
+ break;
+ case PSU1_VOUT:
+ case PSU2_VOUT:
+ value = data->psu_data[fid].vout_reading;
+ break;
+ case PSU1_VIN:
+ case PSU2_VIN:
+ value = data->psu_data[fid].vin_reading;
+ break;
+/*
+ case PSU1_POUT:
+ case PSU2_POUT:
+ value = data->psu_data[fid].pout_reading;
+ break;
+ case PSU1_PIN:
+ case PSU2_PIN:
+ value = data->psu_data[fid].pin_reading;
+ break;
+ case PSU1_IOUT:
+ case PSU2_IOUT:
+ value = data->psu_data[fid].iout_reading;
+ break;
+*/
+ case PSU1_IIN:
+ case PSU2_IIN:
+ value = data->psu_data[fid].iin_reading;
+ break;
+ case PSU1_FAN1_RPM:
+ case PSU2_FAN1_RPM:
+ value = data->psu_data[fid].psu_fan1_rpm;
+ break;
+ case PSU1_FAN2_RPM:
+ case PSU2_FAN2_RPM:
+ value = data->psu_data[fid].psu_fan2_rpm;
+ break;
+ case PSU1_FAN3_RPM:
+ case PSU2_FAN3_RPM:
+ value = data->psu_data[fid].psu_fan3_rpm;
+ break;
+ case PSU1_FAN_PWM:
+ case PSU2_FAN_PWM:
+ value = data->psu_data[fid].psu_fan_pwm;
+ break;
+ case PSU1_TEMP:
+ case PSU2_TEMP:
+ value = data->psu_data[fid].psu_temp;
+ break;
+/*
+ case PSU1_TEMP_THRESH_CAPS:
+ case PSU2_TEMP_THRESH_CAPS:
+ value = data->psu_data[fid].psu_temp_thresh_caps;
+ break;
+ case PSU1_TEMP_THRESH:
+ case PSU2_TEMP_THRESH:
+ str = &tmpbuf[0];
+ sprintf(str, "%d\n%d\n%d\n%d\n%d\n%d",
+ data->psu_data[fid].psu_temp_thresholds[0],
+ data->psu_data[fid].psu_temp_thresholds[1],
+ data->psu_data[fid].psu_temp_thresholds[2],
+ data->psu_data[fid].psu_temp_thresholds[3],
+ data->psu_data[fid].psu_temp_thresholds[4],
+ data->psu_data[fid].psu_temp_thresholds[5]);
+ print_str = 1;
+ break;
+*/
+ case PSU1_TYPE:
+ case PSU2_TYPE:
+ str = (char *)data->psu_data[fid].type;
+ print_str = 1;
+ break;
+ default:
+ error = -EINVAL;
+ goto exit;
+ }
+
+ mutex_unlock(&data->update_lock);
+ if (print_str) {
+ return sprintf(buf, "%s\n", str);
+ } else {
+ if ( value < 0 ) {
+ error = -EINVAL;
+
+ return error;
+ }
+ return sprintf(buf, "%d\n", value);
+ }
+
+exit:
+ mutex_unlock(&data->update_lock);
+ return error;
+}
+
+static ssize_t set_psu(struct device *dev, struct device_attribute *da,
+ const char *buf, size_t count) {
+ long fan_pwm;
+ int status, ret=0;
+ struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+ unsigned char fid = (attr->index / NUM_OF_PER_PSU_ATTR);
+
+ status = kstrtol(buf, 10, &fan_pwm);
+ if (status) {
+ return status;
+ }
+
+ mutex_lock(&data->update_lock);
+
+ data = wistron_wtp_01_c1_00_psu_update_device(fid);
+ if (!data->valid) {
+ status = -EIO;
+ goto exit;
+ }
+
+ ret = pus_fan_pwm_set(fid, fan_pwm);
+ if (ret < 0) {
+ dev_err(&data->pdev->dev, "Unable to set fan pwm from (""psu%d_fan_pwm)\r\n", fid+1);
+
+ goto exit;
+ }
+
+ status = count;
+
+exit:
+ mutex_unlock(&data->update_lock);
+ return status;
+}
+
+static int wistron_wtp_01_c1_00_psu_probe(struct platform_device *pdev) {
+ int status = -1;
+
+ /* Register sysfs hooks */
+ status = sysfs_create_group(&pdev->dev.kobj, &wistron_wtp_01_c1_00_psu_group);
+ if (status) {
+ goto exit;
+ }
+
+ dev_info(&pdev->dev, "device created\n");
+
+ return 0;
+
+exit:
+ return status;
+}
+
+static int wistron_wtp_01_c1_00_psu_remove(struct platform_device *pdev) {
+ sysfs_remove_group(&pdev->dev.kobj, &wistron_wtp_01_c1_00_psu_group);
+ return 0;
+}
+
+static int __init wistron_wtp_01_c1_00_psu_init(void) {
+ int ret;
+
+ data = kzalloc(sizeof(struct wistron_wtp_01_c1_00_psu_data), GFP_KERNEL);
+ if (!data) {
+ ret = -ENOMEM;
+ goto alloc_err;
+ }
+
+ mutex_init(&data->update_lock);
+
+ ret = platform_driver_register(&wistron_wtp_01_c1_00_psu_driver);
+ if (ret < 0) {
+ goto dri_reg_err;
+ }
+
+ data->pdev = platform_device_register_simple(DRVNAME, -1, NULL, 0);
+ if (IS_ERR(data->pdev)) {
+ ret = PTR_ERR(data->pdev);
+ goto dev_reg_err;
+ }
+
+ return 0;
+
+dev_reg_err:
+ platform_driver_unregister(&wistron_wtp_01_c1_00_psu_driver);
+dri_reg_err:
+ kfree(data);
+alloc_err:
+ return ret;
+}
+
+static void __exit wistron_wtp_01_c1_00_psu_exit(void) {
+ platform_device_unregister(data->pdev);
+ platform_driver_unregister(&wistron_wtp_01_c1_00_psu_driver);
+ kfree(data);
+}
+
+MODULE_AUTHOR("HarshaF1");
+MODULE_DESCRIPTION("WISTRON WTP-01-c1-00 PSU driver");
+MODULE_LICENSE("GPL");
+
+module_init(wistron_wtp_01_c1_00_psu_init);
+module_exit(wistron_wtp_01_c1_00_psu_exit);
diff --git a/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/Makefile b/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/Makefile
new file mode 100644
index 0000000..003238c
--- /dev/null
+++ b/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/Makefile
@@ -0,0 +1 @@
+include $(ONL)/make/pkg.mk
\ No newline at end of file
diff --git a/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/PKG.yml b/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/PKG.yml
new file mode 100644
index 0000000..b74ad60
--- /dev/null
+++ b/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/PKG.yml
@@ -0,0 +1 @@
+!include $ONL_TEMPLATES/onlp-platform-any.yml PLATFORM=arm64-wistron-wtp-01-c1-00 ARCH=arm64 TOOLCHAIN=aarch64-linux-gnu
diff --git a/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/Makefile b/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/Makefile
new file mode 100644
index 0000000..e7437cb
--- /dev/null
+++ b/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/Makefile
@@ -0,0 +1,2 @@
+FILTER=src
+include $(ONL)/make/subdirs.mk
diff --git a/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/.module b/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/.module
new file mode 100644
index 0000000..e7d74b8
--- /dev/null
+++ b/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/.module
@@ -0,0 +1 @@
+name: arm64_wistron_wtp_01_c1_00
diff --git a/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/Makefile b/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/Makefile
new file mode 100644
index 0000000..1f0db74
--- /dev/null
+++ b/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/Makefile
@@ -0,0 +1,9 @@
+###############################################################################
+#
+#
+#
+###############################################################################
+include $(ONL)/make/config.mk
+MODULE := arm64_wistron_wtp_01_c1_00
+AUTOMODULE := arm64_wistron_wtp_01_c1_00
+include $(BUILDER)/definemodule.mk
diff --git a/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/auto/arm64_wistron_wtp_01_c1_00.yml b/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/auto/arm64_wistron_wtp_01_c1_00.yml
new file mode 100644
index 0000000..ca74ffa
--- /dev/null
+++ b/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/auto/arm64_wistron_wtp_01_c1_00.yml
@@ -0,0 +1,47 @@
+###############################################################################
+#
+# arm64_wistron_wtp_01_c1_00 Autogeneration Definitions.
+#
+###############################################################################
+
+cdefs: &cdefs
+- ARM64_WISTRON_WTP_01_C1_00_CONFIG_INCLUDE_LOGGING:
+ doc: "Include or exclude logging."
+ default: 1
+- ARM64_WISTRON_WTP_01_C1_00_CONFIG_LOG_OPTIONS_DEFAULT:
+ doc: "Default enabled log options."
+ default: AIM_LOG_OPTIONS_DEFAULT
+- ARM64_WISTRON_WTP_01_C1_00_CONFIG_LOG_BITS_DEFAULT:
+ doc: "Default enabled log bits."
+ default: AIM_LOG_BITS_DEFAULT
+- ARM64_WISTRON_WTP_01_C1_00_CONFIG_LOG_CUSTOM_BITS_DEFAULT:
+ doc: "Default enabled custom log bits."
+ default: 0
+- ARM64_WISTRON_WTP_01_C1_00_CONFIG_PORTING_STDLIB:
+ doc: "Default all porting macros to use the C standard libraries."
+ default: 1
+- ARM64_WISTRON_WTP_01_C1_00_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS:
+ doc: "Include standard library headers for stdlib porting macros."
+ default: ARM64_WISTRON_WTP_01_C1_00_CONFIG_PORTING_STDLIB
+- ARM64_WISTRON_WTP_01_C1_00_CONFIG_INCLUDE_UCLI:
+ doc: "Include generic uCli support."
+ default: 0
+
+
+definitions:
+ cdefs:
+ ARM64_WISTRON_WTP_01_C1_00_CONFIG_HEADER:
+ defs: *cdefs
+ basename: arm64_wistron_wtp_01_c1_00_config
+
+ portingmacro:
+ arm64_wistron_wtp_01_c1_00:
+ macros:
+ - malloc
+ - free
+ - memset
+ - memcpy
+ - strncpy
+ - vsnprintf
+ - snprintf
+ - strlen
diff --git a/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/auto/make.mk b/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/auto/make.mk
new file mode 100644
index 0000000..87e3f9c
--- /dev/null
+++ b/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/auto/make.mk
@@ -0,0 +1,9 @@
+###############################################################################
+#
+# arm64_wistron_wtp_01_c1_00 Autogeneration
+#
+###############################################################################
+arm64_wistron_wtp_01_c1_00_AUTO_DEFS := module/auto/arm64_wistron_wtp_01_c1_00.yml
+arm64_wistron_wtp_01_c1_00_AUTO_DIRS := module/inc/arm64_wistron_wtp_01_c1_00 module/src
+include $(BUILDER)/auto.mk
+
diff --git a/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/inc/arm64_wistron_wtp_01_c1_00/arm64_wistron_wtp_01_c1_00.x b/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/inc/arm64_wistron_wtp_01_c1_00/arm64_wistron_wtp_01_c1_00.x
new file mode 100644
index 0000000..9b941e3
--- /dev/null
+++ b/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/inc/arm64_wistron_wtp_01_c1_00/arm64_wistron_wtp_01_c1_00.x
@@ -0,0 +1,14 @@
+/**************************************************************************//**
+ *
+ *
+ *
+ *****************************************************************************/
+#include
+
+/* <--auto.start.xmacro(ALL).define> */
+/* */
+
+/* <--auto.start.xenum(ALL).define> */
+/* */
+
+
diff --git a/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/inc/arm64_wistron_wtp_01_c1_00/arm64_wistron_wtp_01_c1_00_config.h b/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/inc/arm64_wistron_wtp_01_c1_00/arm64_wistron_wtp_01_c1_00_config.h
new file mode 100644
index 0000000..2fde3a2
--- /dev/null
+++ b/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/inc/arm64_wistron_wtp_01_c1_00/arm64_wistron_wtp_01_c1_00_config.h
@@ -0,0 +1,127 @@
+/**************************************************************************//**
+ *
+ * @file
+ * @brief arm64_wistron_wtp_01_c1_00 Configuration Header
+ *
+ * @addtogroup arm64_wistron_wtp_01_c1_00-config
+ * @{
+ *
+ *****************************************************************************/
+#ifndef __ARM64_WISTRON_WTP_01_C1_00_CONFIG_H__
+#define __ARM64_WISTRON_WTP_01_C1_00_CONFIG_H__
+
+#ifdef GLOBAL_INCLUDE_CUSTOM_CONFIG
+#include
+#endif
+#ifdef ARM64_WISTRON_WTP_01_C1_00_INCLUDE_CUSTOM_CONFIG
+#include
+#endif
+
+/* */
+#include
+/**
+ * ARM64_WISTRON_WTP_01_C1_00_CONFIG_INCLUDE_LOGGING
+ *
+ * Include or exclude logging. */
+
+
+#ifndef ARM64_WISTRON_WTP_01_C1_00_CONFIG_INCLUDE_LOGGING
+#define ARM64_WISTRON_WTP_01_C1_00_CONFIG_INCLUDE_LOGGING 1
+#endif
+
+/**
+ *ARM64_WISTRON_WTP_01_C1_00_CONFIG_LOG_OPTIONS_DEFAULT
+ *
+ * Default enabled log options. */
+
+
+#ifndef ARM64_WISTRON_WTP_01_C1_00_CONFIG_LOG_OPTIONS_DEFAULT
+#define ARM64_WISTRON_WTP_01_C1_00_CONFIG_LOG_OPTIONS_DEFAULT AIM_LOG_OPTIONS_DEFAULT
+#endif
+
+/**
+ * ARM64_WISTRON_WTP_01_C1_00_CONFIG_LOG_BITS_DEFAULT
+ *
+ * Default enabled log bits. */
+
+
+#ifndef ARM64_WISTRON_WTP_01_C1_00_CONFIG_LOG_BITS_DEFAULT
+#define ARM64_WISTRON_WTP_01_C1_00_CONFIG_LOG_BITS_DEFAULT AIM_LOG_BITS_DEFAULT
+#endif
+
+/**
+ * ARM64_WISTRON_WTP_01_C1_00_CONFIG_LOG_CUSTOM_BITS_DEFAULT
+ *
+ * Default enabled custom log bits. */
+
+
+#ifndef ARM64_WISTRON_WTP_01_C1_00_CONFIG_LOG_CUSTOM_BITS_DEFAULT
+#define ARM64_WISTRON_WTP_01_C1_00_CONFIG_LOG_CUSTOM_BITS_DEFAULT 0
+#endif
+
+/**
+ * ARM64_WISTRON_WTP_01_C1_00_CONFIG_PORTING_STDLIB
+ *
+ * Default all porting macros to use the C standard libraries. */
+
+
+#ifndef ARM64_WISTRON_WTP_01_C1_00_CONFIG_PORTING_STDLIB
+#define ARM64_WISTRON_WTP_01_C1_00_CONFIG_PORTING_STDLIB 1
+#endif
+
+/**
+ * ARM64_WISTRON_WTP_01_C1_00_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS
+ *
+ * Include standard library headers for stdlib porting macros. */
+
+
+#ifndef ARM64_WISTRON_WTP_01_C1_00_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS
+#define ARM64_WISTRON_WTP_01_C1_00_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS ARM64_WISTRON_WTP_01_C1_00_CONFIG_PORTING_STDLIB
+#endif
+
+/**
+ * ARM64_WISTRON_WTP_01_C1_00_CONFIG_INCLUDE_UCLI
+ *
+ * Include generic uCli support. */
+
+
+#ifndef ARM64_WISTRON_WTP_01_C1_00_CONFIG_INCLUDE_UCLI
+#define ARM64_WISTRON_WTP_01_C1_00_CONFIG_INCLUDE_UCLI 0
+#endif
+
+
+
+/**
+ * All compile time options can be queried or displayed
+ */
+
+/** Configuration settings structure. */
+typedef struct arm64_wistron_wtp_01_c1_00_config_settings_s {
+ /** name */
+ const char* name;
+ /** value */
+ const char* value;
+} arm64_wistron_wtp_01_c1_00_config_settings_t;
+
+/** Configuration settings table. */
+/** arm64_wistron_wtp_01_c1_00_config_settings table. */
+extern arm64_wistron_wtp_01_c1_00_config_settings_t arm64_wistron_wtp_01_c1_00_config_settings[];
+
+/**
+ * @brief Lookup a configuration setting.
+ * @param setting The name of the configuration option to lookup.
+ */
+const char* arm64_wistron_wtp_01_c1_00_config_lookup(const char* setting);
+
+/**
+ * @brief Show the compile-time configuration.
+ * @param pvs The output stream.
+ */
+int arm64_wistron_wtp_01_c1_00_config_show(struct aim_pvs_s* pvs);
+
+/* */
+
+#include "arm64_wistron_wtp_01_c1_00_porting.h"
+
+#endif /* __ARM64_WISTRON_WTP_01_C1_00_CONFIG_H__ */
+/* @} */
diff --git a/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/inc/arm64_wistron_wtp_01_c1_00/arm64_wistron_wtp_01_c1_00_dox.h b/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/inc/arm64_wistron_wtp_01_c1_00/arm64_wistron_wtp_01_c1_00_dox.h
new file mode 100644
index 0000000..d8479f0
--- /dev/null
+++ b/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/inc/arm64_wistron_wtp_01_c1_00/arm64_wistron_wtp_01_c1_00_dox.h
@@ -0,0 +1,26 @@
+/**************************************************************************//**
+ *
+ * arm64_wistron_wtp_01_c1_00 Doxygen Header
+ *
+ *****************************************************************************/
+#ifndef __ARM64_WISTRON_WTP_01_C1_00_DOX_H__
+#define __ARM64_WISTRON_WTP_01_C1_00_DOX_H__
+
+/**
+ * @defgroup arm64_wistron_wtp_01_c1_00 arm64_wistron_wtp_01_c1_00 - arm64_wistron_wtp_01_c1_00 Description
+ *
+
+The documentation overview for this module should go here.
+
+ *
+ * @{
+ *
+ * @defgroup arm64_wistron_wtp_01_c1_00-arm64_wistron_wtp_01_c1_00 Public Interface
+ * @defgroup arm64_wistron_wtp_01_c1_00-config Compile Time Configuration
+ * @defgroup arm64_wistron_wtp_01_c1_00-porting Porting Macros
+ *
+ * @}
+ *
+ */
+
+#endif /* __ARM64_WISTRON_WTP_01_C1_00_DOX_H__ */
diff --git a/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/inc/arm64_wistron_wtp_01_c1_00/arm64_wistron_wtp_01_c1_00_porting.h b/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/inc/arm64_wistron_wtp_01_c1_00/arm64_wistron_wtp_01_c1_00_porting.h
new file mode 100644
index 0000000..8e553e3
--- /dev/null
+++ b/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/inc/arm64_wistron_wtp_01_c1_00/arm64_wistron_wtp_01_c1_00_porting.h
@@ -0,0 +1,107 @@
+/**************************************************************************//**
+ *
+ * @file
+ * @brief arm64_wistron_wtp_01_c1_00 Porting Macros.
+ *
+ * @addtogroup arm64_wistron_wtp_01_c1_00-porting
+ * @{
+ *
+ *****************************************************************************/
+#ifndef __ARM64_WISTRON_WTP_01_C1_00_PORTING_H__
+#define __ARM64_WISTRON_WTP_01_C1_00_PORTING_H__
+
+
+/* */
+#if ARM64_WISTRON_WTP_01_C1_00_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS == 1
+#include
+#include
+#include
+#include
+#include
+#endif
+
+#ifndef ARM64_WISTRON_WTP_01_C1_00_MALLOC
+ #if defined(GLOBAL_MALLOC)
+ #define ARM64_WISTRON_WTP_01_C1_00_MALLOC GLOBAL_MALLOC
+ #elif ARM64_WISTRON_WTP_01_C1_00_CONFIG_PORTING_STDLIB == 1
+ #define ARM64_WISTRON_WTP_01_C1_00_MALLOC malloc
+ #else
+ #error The macro ARM64_WISTRON_WTP_01_C1_00_MALLOC is required but cannot be defined.
+ #endif
+#endif
+
+#ifndef ARM64_WISTRON_WTP_01_C1_00_FREE
+ #if defined(GLOBAL_FREE)
+ #define ARM64_WISTRON_WTP_01_C1_00_FREE GLOBAL_FREE
+ #elif ARM64_WISTRON_WTP_01_C1_00_CONFIG_PORTING_STDLIB == 1
+ #define ARM64_WISTRON_WTP_01_C1_00_FREE free
+ #else
+ #error The macro ARM64_WISTRON_WTP_01_C1_00_FREE is required but cannot be defined.
+ #endif
+#endif
+
+#ifndef ARM64_WISTRON_WTP_01_C1_00_MEMSET
+ #if defined(GLOBAL_MEMSET)
+ #define ARM64_WISTRON_WTP_01_C1_00_MEMSET GLOBAL_MEMSET
+ #elif ARM64_WISTRON_WTP_01_C1_00_CONFIG_PORTING_STDLIB == 1
+ #define ARM64_WISTRON_WTP_01_C1_00_MEMSET memset
+ #else
+ #error The macro ARM64_WISTRON_WTP_01_C1_00_MEMSET is required but cannot be defined.
+ #endif
+#endif
+
+#ifndef ARM64_WISTRON_WTP_01_C1_00_MEMCPY
+ #if defined(GLOBAL_MEMCPY)
+ #define ARM64_WISTRON_WTP_01_C1_00_MEMCPY GLOBAL_MEMCPY
+ #elif ARM64_WISTRON_WTP_01_C1_00_CONFIG_PORTING_STDLIB == 1
+ #define ARM64_WISTRON_WTP_01_C1_00_MEMCPY memcpy
+ #else
+ #error The macro ARM64_WISTRON_WTP_01_C1_00_MEMCPY is required but cannot be defined.
+ #endif
+#endif
+
+#ifndef ARM64_WISTRON_WTP_01_C1_00_STRNCPY
+ #if defined(GLOBAL_STRNCPY)
+ #define ARM64_WISTRON_WTP_01_C1_00_STRNCPY GLOBAL_STRNCPY
+ #elif ARM64_WISTRON_WTP_01_C1_00_CONFIG_PORTING_STDLIB == 1
+ #define ARM64_WISTRON_WTP_01_C1_00_STRNCPY strncpy
+ #else
+ #error The macro ARM64_WISTRON_WTP_01_C1_00_STRNCPY is required but cannot be defined.
+ #endif
+#endif
+
+#ifndef ARM64_WISTRON_WTP_01_C1_00_VSNPRINTF
+ #if defined(GLOBAL_VSNPRINTF)
+ #define ARM64_WISTRON_WTP_01_C1_00_VSNPRINTF GLOBAL_VSNPRINTF
+ #elif ARM64_WISTRON_WTP_01_C1_00_CONFIG_PORTING_STDLIB == 1
+ #define ARM64_WISTRON_WTP_01_C1_00_VSNPRINTF vsnprintf
+ #else
+ #error The macro ARM64_WISTRON_WTP_01_C1_00_VSNPRINTF is required but cannot be defined.
+ #endif
+#endif
+
+#ifndef ARM64_WISTRON_WTP_01_C1_00_SNPRINTF
+ #if defined(GLOBAL_SNPRINTF)
+ #define ARM64_WISTRON_WTP_01_C1_00_SNPRINTF GLOBAL_SNPRINTF
+ #elif ARM64_WISTRON_WTP_01_C1_00_CONFIG_PORTING_STDLIB == 1
+ #define ARM64_WISTRON_WTP_01_C1_00_SNPRINTF snprintf
+ #else
+ #error The macro ARM64_WISTRON_WTP_01_C1_00_SNPRINTF is required but cannot be defined.
+ #endif
+#endif
+
+#ifndef ARM64_WISTRON_WTP_01_C1_00_STRLEN
+ #if defined(GLOBAL_STRLEN)
+ #define ARM64_WISTRON_WTP_01_C1_00_STRLEN GLOBAL_STRLEN
+ #elif ARM64_WISTRON_WTP_01_C1_00_CONFIG_PORTING_STDLIB == 1
+ #define ARM64_WISTRON_WTP_01_C1_00_STRLEN strlen
+ #else
+ #error The macro ARM64_WISTRON_WTP_01_C1_00_STRLEN is required but cannot be defined.
+ #endif
+#endif
+
+/* */
+
+
+#endif /* __ARM64_WISTRON_WTP_01_C1_00_PORTING_H__ */
+/* @} */
diff --git a/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/make.mk b/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/make.mk
new file mode 100644
index 0000000..4bd0a1e
--- /dev/null
+++ b/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/make.mk
@@ -0,0 +1,10 @@
+###############################################################################
+#
+#
+#
+###############################################################################
+THIS_DIR := $(dir $(lastword $(MAKEFILE_LIST)))
+arm64_wistron_wtp_01_c1_00_INCLUDES := -I $(THIS_DIR)inc
+arm64_wistron_wtp_01_c1_00_INTERNAL_INCLUDES := -I $(THIS_DIR)src
+arm64_wistron_wtp_01_c1_00_DEPENDMODULE_ENTRIES := init:arm64_wistron_wtp_01_c1_00 ucli:arm64_wistron_wtp_01_c1_00
+
diff --git a/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/src/Makefile b/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/src/Makefile
new file mode 100644
index 0000000..a117b3b
--- /dev/null
+++ b/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/src/Makefile
@@ -0,0 +1,9 @@
+###############################################################################
+#
+# Local source generation targets.
+#
+###############################################################################
+
+ucli:
+ @../../../../tools/uclihandlers.py arm64_wistron_wtp_01_c1_00_ucli.c
+
diff --git a/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/src/arm64_wistron_wtp_01_c1_00_config.c b/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/src/arm64_wistron_wtp_01_c1_00_config.c
new file mode 100644
index 0000000..9e8394f
--- /dev/null
+++ b/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/src/arm64_wistron_wtp_01_c1_00_config.c
@@ -0,0 +1,76 @@
+/**************************************************************************//**
+ *
+ *
+ *
+ *****************************************************************************/
+#include
+
+/* */
+#define __arm64_wistron_wtp_01_c1_00_config_STRINGIFY_NAME(_x) #_x
+#define __arm64_wistron_wtp_01_c1_00_config_STRINGIFY_VALUE(_x) __arm64_wistron_wtp_01_c1_00_config_STRINGIFY_NAME(_x)
+arm64_wistron_wtp_01_c1_00_config_settings_t arm64_wistron_wtp_01_c1_00_config_settings[] =
+{
+#ifdef ARM64_WISTRON_WTP_01_C1_00_CONFIG_INCLUDE_LOGGING
+ { __arm64_wistron_wtp_01_c1_00_config_STRINGIFY_NAME(ARM64_WISTRON_WTP_01_C1_00_CONFIG_INCLUDE_LOGGING), __arm64_wistron_wtp_01_c1_00_config_STRINGIFY_VALUE(ARM64_wistron_wtp_01_c1_00_CONFIG_INCLUDE_LOGGING) },
+#else
+{ ARM64_WISTRON_WTP_01_C1_00_CONFIG_INCLUDE_LOGGING(__arm64_wistron_wtp_01_c1_00_config_STRINGIFY_NAME), "__undefined__" },
+#endif
+#ifdef ARM64_WISTRON_WTP_01_C1_00_CONFIG_LOG_OPTIONS_DEFAULT
+ { __arm64_wistron_wtp_01_c1_00_config_STRINGIFY_NAME(ARM64_WISTRON_WTP_01_C1_00_CONFIG_LOG_OPTIONS_DEFAULT), __arm64_wistron_wtp_01_c1_00_config_STRINGIFY_VALUE(ARM64_wistron_wtp_01_c1_00_CONFIG_LOG_OPTIONS_DEFAULT) },
+#else
+{ ARM64_WISTRON_WTP_01_C1_00_CONFIG_LOG_OPTIONS_DEFAULT(__arm64_wistron_wtp_01_c1_00_config_STRINGIFY_NAME), "__undefined__" },
+#endif
+#ifdef ARM64_WISTRON_WTP_01_C1_00_CONFIG_LOG_BITS_DEFAULT
+ { __arm64_wistron_wtp_01_c1_00_config_STRINGIFY_NAME(ARM64_WISTRON_WTP_01_C1_00_CONFIG_LOG_BITS_DEFAULT), __arm64_wistron_wtp_01_c1_00_config_STRINGIFY_VALUE(ARM64_wistron_wtp_01_c1_00_CONFIG_LOG_BITS_DEFAULT) },
+#else
+{ ARM64_WISTRON_WTP_01_C1_00_CONFIG_LOG_BITS_DEFAULT(__arm64_wistron_wtp_01_c1_00_config_STRINGIFY_NAME), "__undefined__" },
+#endif
+#ifdef ARM64_WISTRON_WTP_01_C1_00_CONFIG_LOG_CUSTOM_BITS_DEFAULT
+ { __arm64_wistron_wtp_01_c1_00_config_STRINGIFY_NAME(ARM64_WISTRON_WTP_01_C1_00_CONFIG_LOG_CUSTOM_BITS_DEFAULT), __arm64_wistron_wtp_01_c1_00_config_STRINGIFY_VALUE(ARM64_wistron_wtp_01_c1_00_CONFIG_LOG_CUSTOM_BITS_DEFAULT) },
+#else
+{ ARM64_WISTRON_WTP_01_C1_00_CONFIG_LOG_CUSTOM_BITS_DEFAULT(__arm64_wistron_wtp_01_c1_00_config_STRINGIFY_NAME), "__undefined__" },
+#endif
+#ifdef ARM64_WISTRON_WTP_01_C1_00_CONFIG_PORTING_STDLIB
+ { __arm64_wistron_wtp_01_c1_00_config_STRINGIFY_NAME(ARM64_WISTRON_WTP_01_C1_00_CONFIG_PORTING_STDLIB), __arm64_wistron_wtp_01_c1_00_config_STRINGIFY_VALUE(ARM64_wistron_wtp_01_c1_00_CONFIG_PORTING_STDLIB) },
+#else
+{ ARM64_WISTRON_WTP_01_C1_00_CONFIG_PORTING_STDLIB(__arm64_wistron_wtp_01_c1_00_config_STRINGIFY_NAME), "__undefined__" },
+#endif
+#ifdef ARM64_WISTRON_WTP_01_C1_00_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS
+ { __arm64_wistron_wtp_01_c1_00_config_STRINGIFY_NAME(ARM64_WISTRON_WTP_01_C1_00_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS), __arm64_wistron_wtp_01_c1_00_config_STRINGIFY_VALUE(ARM64_wistron_wtp_01_c1_00_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS) },
+#else
+{ ARM64_WISTRON_WTP_01_C1_00_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS(__arm64_wistron_wtp_01_c1_00_config_STRINGIFY_NAME), "__undefined__" },
+#endif
+#ifdef ARM64_WISTRON_WTP_01_C1_00_CONFIG_INCLUDE_UCLI
+ { __arm64_wistron_wtp_01_c1_00_config_STRINGIFY_NAME(ARM64_WISTRON_WTP_01_C1_00_CONFIG_INCLUDE_UCLI), __arm64_wistron_wtp_01_c1_00_config_STRINGIFY_VALUE(ARM64_wistron_wtp_01_c1_00_CONFIG_INCLUDE_UCLI) },
+#else
+{ ARM64_WISTRON_WTP_01_C1_00_CONFIG_INCLUDE_UCLI(__arm64_wistron_wtp_01_c1_00_config_STRINGIFY_NAME), "__undefined__" },
+#endif
+ { NULL, NULL }
+};
+#undef __arm64_wistron_wtp_01_c1_00_config_STRINGIFY_VALUE
+#undef __arm64_wistron_wtp_01_c1_00_config_STRINGIFY_NAME
+
+const char*
+arm64_wistron_wtp_01_c1_00_config_lookup(const char* setting)
+{
+ int i;
+ for(i = 0; arm64_wistron_wtp_01_c1_00_config_settings[i].name; i++) {
+ if(strcmp(arm64_wistron_wtp_01_c1_00_config_settings[i].name, setting)) {
+ return arm64_wistron_wtp_01_c1_00_config_settings[i].value;
+ }
+ }
+ return NULL;
+}
+
+int
+arm64_wistron_wtp_01_c1_00_config_show(struct aim_pvs_s* pvs)
+{
+ int i;
+ for(i = 0; arm64_wistron_wtp_01_c1_00_config_settings[i].name; i++) {
+ aim_printf(pvs, "%s = %s\n", arm64_wistron_wtp_01_c1_00_config_settings[i].name, arm64_wistron_wtp_01_c1_00_config_settings[i].value);
+ }
+ return i;
+}
+
+/* */
+
diff --git a/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/src/arm64_wistron_wtp_01_c1_00_enums.c b/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/src/arm64_wistron_wtp_01_c1_00_enums.c
new file mode 100644
index 0000000..f5531a4
--- /dev/null
+++ b/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/src/arm64_wistron_wtp_01_c1_00_enums.c
@@ -0,0 +1,10 @@
+/**************************************************************************//**
+ *
+ *
+ *
+ *****************************************************************************/
+#include
+
+/* <--auto.start.enum(ALL).source> */
+/* */
+
diff --git a/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/src/arm64_wistron_wtp_01_c1_00_int.h b/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/src/arm64_wistron_wtp_01_c1_00_int.h
new file mode 100644
index 0000000..bdb6ef6
--- /dev/null
+++ b/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/src/arm64_wistron_wtp_01_c1_00_int.h
@@ -0,0 +1,12 @@
+/**************************************************************************//**
+ *
+ * arm64_wistron_wtp_01_c1_00 Internal Header
+ *
+ *****************************************************************************/
+#ifndef __ARM64_WISTRON_WTP_01_C1_00_INT_H__
+#define __ARM64_WISTRON_WTP_01_C1_00_INT_H__
+
+#include
+
+
+#endif /* __ARM64_wistron_wtp_01_c1_00_INT_H__ */
diff --git a/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/src/arm64_wistron_wtp_01_c1_00_log.c b/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/src/arm64_wistron_wtp_01_c1_00_log.c
new file mode 100644
index 0000000..eb68926
--- /dev/null
+++ b/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/src/arm64_wistron_wtp_01_c1_00_log.c
@@ -0,0 +1,18 @@
+/**************************************************************************//**
+ *
+ *
+ *
+ *****************************************************************************/
+#include
+
+#include "arm64_wistron_wtp_01_c1_00_log.h"
+/*
+ * arm64_wistron_wtp_01_c1_00 log struct.
+ */
+AIM_LOG_STRUCT_DEFINE(
+ ARM64_WISTRON_WTP_01_C1_00_CONFIG_LOG_OPTIONS_DEFAULT,
+ ARM64_WISTRON_WTP_01_C1_00_CONFIG_LOG_BITS_DEFAULT,
+ NULL, /* Custom log map */
+ ARM64_WISTRON_WTP_01_C1_00_CONFIG_LOG_CUSTOM_BITS_DEFAULT
+ );
+
diff --git a/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/src/arm64_wistron_wtp_01_c1_00_log.h b/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/src/arm64_wistron_wtp_01_c1_00_log.h
new file mode 100644
index 0000000..01153c5
--- /dev/null
+++ b/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/src/arm64_wistron_wtp_01_c1_00_log.h
@@ -0,0 +1,12 @@
+/**************************************************************************//**
+ *
+ *
+ *
+ *****************************************************************************/
+#ifndef __ARM64_WISTRON_WTP_01_C1_00_LOG_H__
+#define __ARM64_WISTRON_WTP_01_C1_00_LOG_H__
+
+#define AIM_LOG_MODULE_NAME arm64_wistron_wtp_01_c1_00
+#include
+
+#endif /* __ARM64_wistron_wtp_01_c1_00_LOG_H__ */
diff --git a/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/src/arm64_wistron_wtp_01_c1_00_module.c b/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/src/arm64_wistron_wtp_01_c1_00_module.c
new file mode 100644
index 0000000..d05efcc
--- /dev/null
+++ b/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/src/arm64_wistron_wtp_01_c1_00_module.c
@@ -0,0 +1,24 @@
+/**************************************************************************//**
+ *
+ *
+ *
+ *****************************************************************************/
+#include
+
+#include "arm64_wistron_wtp_01_c1_00_log.h"
+
+static int
+datatypes_init__(void)
+{
+#define ARM64_WISTRON_WTP_01_C1_00_ENUMERATION_ENTRY(_enum_name, _desc) AIM_DATATYPE_MAP_REGISTER(_enum_name, _enum_name##_map, _desc, AIM_LOG_INTERNAL);
+#include
+ return 0;
+}
+
+void __arm64_wistron_wtp_01_c1_00_module_init__(void)
+{
+ AIM_LOG_STRUCT_REGISTER();
+ datatypes_init__();
+}
+
+int __onlp_platform_version__ = 1;
diff --git a/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/src/arm64_wistron_wtp_01_c1_00_ucli.c b/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/src/arm64_wistron_wtp_01_c1_00_ucli.c
new file mode 100644
index 0000000..ee9595a
--- /dev/null
+++ b/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/src/arm64_wistron_wtp_01_c1_00_ucli.c
@@ -0,0 +1,50 @@
+/**************************************************************************//**
+ *
+ *
+ *
+ *****************************************************************************/
+#include
+
+#if ARM64_WISTRON_WTP_01_C1_00_CONFIG_INCLUDE_UCLI == 1
+
+#include
+#include
+#include
+
+static ucli_status_t
+arm64_wistron_wtp_01_c1_00_ucli_ucli__config__(ucli_context_t* uc)
+{
+ UCLI_HANDLER_MACRO_MODULE_CONFIG(arm64_wistron_wtp_01_c1_00)
+}
+
+/* */
+/* */
+
+static ucli_module_t
+arm64_wistron_wtp_01_c1_00_ucli_module__ =
+ {
+ "arm64_wistron_wtp_01_c1_00_ucli",
+ NULL,
+ arm64_wistron_wtp_01_c1_00_ucli_ucli_handlers__,
+ NULL,
+ NULL,
+ };
+
+ucli_node_t*
+arm64_wistron_wtp_01_c1_00_ucli_node_create(void)
+{
+ ucli_node_t* n;
+ ucli_module_init(&arm64_wistron_wtp_01_c1_00_ucli_module__);
+ n = ucli_node_create("arm64_wistron_wtp_01_c1_00", NULL, &arm64_wistron_wtp_01_c1_00_ucli_module__);
+ ucli_node_subnode_add(n, ucli_module_log_node_create("arm64_wistron_wtp_01_c1_00"));
+ return n;
+}
+
+#else
+void*
+arm64_wistron_wtp_01_c1_00_ucli_node_create(void)
+{
+ return NULL;
+}
+#endif
+
diff --git a/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/src/fani.c b/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/src/fani.c
new file mode 100644
index 0000000..f63d4a0
--- /dev/null
+++ b/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/src/fani.c
@@ -0,0 +1,341 @@
+/************************************************************
+ *
+ *
+ * Copyright 2014 Big Switch Networks, Inc.
+ *
+ * Licensed under the Eclipse Public License, Version 1.0 (the
+ * "License"); you may not use this file except in compliance
+ * with the License. You may obtain a copy of the License at
+ *
+ * http://www.eclipse.org/legal/epl-v10.html
+ *
+ * Unless required by applicable law or agreed to in writing,
+ * software distributed under the License is distributed on an
+ * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+ * either express or implied. See the License for the specific
+ * language governing permissions and limitations under the
+ * License.
+ *
+ *
+ ************************************************************
+ *
+ * Fan Platform Implementation Defaults.
+ *
+ ***********************************************************/
+#include
+#include
+#include "platform_lib.h"
+#include
+
+/* Average of front and rear max speeds */
+#define MAX_FAN_SPEED ((24200 + 22000)/2)
+/* Need to check the PSU data-sheet for the exact value */
+#define MAX_PSU_FAN_SPEED 18000
+
+#define PSU_FAN_INFO(pid, fid) \
+ { \
+ { ONLP_FAN_ID_CREATE(FAN##fid##_ON_PSU##pid), "PSU "#pid" - Fan "#fid, ONLP_PSU_ID_CREATE(pid) },\
+ 0x0,\
+ ONLP_FAN_CAPS_GET_RPM | ONLP_FAN_CAPS_GET_PERCENTAGE | ONLP_FAN_CAPS_SET_PERCENTAGE,\
+ 0,\
+ 0,\
+ ONLP_FAN_MODE_INVALID,\
+ }
+
+/* Static fan information */
+onlp_fan_info_t finfo[] = {
+ { }, /* Not used */
+ PSU_FAN_INFO(1, 1),
+ PSU_FAN_INFO(1, 2),
+ PSU_FAN_INFO(1, 3),
+ PSU_FAN_INFO(2, 1),
+ PSU_FAN_INFO(2, 2),
+ PSU_FAN_INFO(2, 3)
+};
+
+#define VALIDATE(_id) \
+ do { \
+ if(!ONLP_OID_IS_FAN(_id)) { \
+ return ONLP_STATUS_E_INVALID; \
+ } \
+ } while(0)
+ /*
+static int
+_onlp_fani_info_get_fan_on_psu(int pid, int fid, onlp_fan_info_t* info)
+{
+ int ret = ONLP_STATUS_OK;
+ uint8_t buffer[9];
+ int size=8, flags=1;
+ uint32_t status;
+
+ // Get the PSU present state
+ ret = onlp_file_read_int(&val, "%s""psu%d_status", PSU_SYSFS_PATH, index);
+ if (ret < 0) {
+ AIM_LOG_ERROR("Unable to read status from (%s""psu%d_status)\r\n", PSU_SYSFS_PATH, index);
+ return ONLP_STATUS_E_INTERNAL;
+ } else if (val == 0) {
+ info->status |= ONLP_FAN_STATUS_FAILED;
+
+ return ONLP_STATUS_OK;
+ }
+
+ info->percentage = buffer[0];
+ info->status |= ONLP_FAN_STATUS_PRESENT;
+
+ // get fan RPM
+ flags = 2;
+
+ ret = onlp_can_read(pid, size, buffer, flags);
+ if (ret < 0) {
+ AIM_LOG_ERROR("Unable to read fan status from psu[%d][%x]\r\n", pid, ret);
+
+ SEM_UNLOCK;
+ return ONLP_STATUS_OK;
+ //return ONLP_STATUS_E_INTERNAL;
+ }
+
+ // get fan speed
+ switch (fid) {
+ case 1:
+ info->rpm = ((buffer[1] << 8) | buffer[0]);
+ break;
+
+ case 2:
+ info->rpm = ((buffer[3] << 8) | buffer[2]);
+ break;
+
+ case 3:
+ info->rpm = ((buffer[5] << 8) | buffer[4]);
+ break;
+ }
+
+ info->status |= (info->rpm == 0) ? ONLP_FAN_STATUS_FAILED : 0;
+
+ SEM_UNLOCK;
+
+ return ONLP_STATUS_OK;
+}
+*/
+
+/*
+ * This function will be called prior to all of onlp_fani_* functions.
+ */
+int
+onlp_fani_init(void)
+{
+ return ONLP_STATUS_OK;
+}
+
+int
+onlp_fani_info_get(onlp_oid_t id, onlp_fan_info_t* info)
+{
+ int val = 0;
+ int ret = ONLP_STATUS_OK;
+ int fid = ONLP_OID_ID_GET(id);
+ int pid = PSU1_ID;
+ //uint32_t status;
+
+ VALIDATE(id);
+
+ memset(info, 0, sizeof(onlp_fan_info_t));
+
+ switch (fid)
+ {
+ case FAN1_ON_PSU1:
+ case FAN2_ON_PSU1:
+ case FAN3_ON_PSU1:
+ /* Get the present state */
+ pid = PSU1_ID;
+
+ *info = finfo[(pid-1)*3+fid]; /* Set the onlp_oid_hdr_t */
+
+ /* Get the PSU present state */
+ ret = onlp_file_read_int(&val, "%s""psu%d_status", PSU_SYSFS_PATH, pid);
+ if (ret < 0) {
+ AIM_LOG_ERROR("Unable to read status from (%s""psu%d_status)\r\n", PSU_SYSFS_PATH, pid);
+
+ return ONLP_STATUS_E_INTERNAL;
+ } else if (val == 0) {
+ info->status |= ONLP_FAN_STATUS_FAILED;
+
+ return ONLP_STATUS_OK;
+ }
+
+ info->status |= ONLP_FAN_STATUS_PRESENT;
+
+ /* Get the FAN RPM */
+ ret = onlp_file_read_int(&val, "%s""psu%d_fan%d_rpm", PSU_SYSFS_PATH, pid, fid);
+ if (ret == 0) {
+ info->rpm = val; /* values read from the file are in milli */
+ }
+
+ /* Get the FAN PWM */
+ ret = onlp_file_read_int(&val, "%s""psu%d_fan_pwm", PSU_SYSFS_PATH, pid);
+ if (ret == 0) {
+ info->percentage = val; /* values read from the file are in milli */
+ }
+
+ break;
+ case FAN1_ON_PSU2:
+ case FAN2_ON_PSU2:
+ case FAN3_ON_PSU2:
+ /* Get the present state */
+ pid = PSU2_ID;
+
+ *info = finfo[(pid-1)*3+fid-FAN1_ON_PSU2+1]; /* Set the onlp_oid_hdr_t */
+
+ /* Get the PSU present state */
+ ret = onlp_file_read_int(&val, "%s""psu%d_status", PSU_SYSFS_PATH, pid);
+ if (ret < 0) {
+ AIM_LOG_ERROR("Unable to read status from (%s""psu%d_status)\r\n", PSU_SYSFS_PATH, pid);
+
+ return ONLP_STATUS_E_INTERNAL;
+ } else if (val == 0) {
+ info->status |= ONLP_FAN_STATUS_FAILED;
+
+ return ONLP_STATUS_OK;
+ }
+
+ info->status |= ONLP_FAN_STATUS_PRESENT;
+
+ /* Get the FAN RPM */
+ ret = onlp_file_read_int(&val, "%s""psu%d_fan%d_rpm", PSU_SYSFS_PATH, pid, (fid-FAN1_ON_PSU2+1));
+ if (ret == 0) {
+ info->rpm = val; /* values read from the file are in milli */
+ }
+
+ /* Get the FAN PWM */
+ ret = onlp_file_read_int(&val, "%s""psu%d_fan_pwm", PSU_SYSFS_PATH, pid);
+ if (ret == 0) {
+ info->percentage = val; /* values read from the file are in milli */
+ }
+
+ break;
+ default:
+ ret = ONLP_STATUS_E_INVALID;
+ break;
+ }
+
+ return ret;
+}
+
+/*
+ * This function sets the speed of the given fan in RPM.
+ *
+ * This function will only be called if the fan supprots the RPM_SET
+ * capability.
+ *
+ * It is optional if you have no fans at all with this feature.
+ */
+int
+onlp_fani_rpm_set(onlp_oid_t id, int rpm)
+{
+ return ONLP_STATUS_E_UNSUPPORTED;
+}
+
+/*
+ * This function sets the fan speed of the given OID as a percentage.
+ *
+ * This will only be called if the OID has the PERCENTAGE_SET
+ * capability.
+ *
+ * It is optional if you have no fans at all with this feature.
+ */
+int
+onlp_fani_percentage_set(onlp_oid_t id, int p)
+{
+ int fid, pid=0, val=0;
+ int ret = ONLP_STATUS_OK;
+
+ VALIDATE(id);
+
+ fid = ONLP_OID_ID_GET(id);
+
+ /* reject p=0 (p=0, stop fan) */
+ if (p == 0) {
+ return ONLP_STATUS_E_INVALID;
+ }
+
+ switch (fid)
+ {
+ case FAN1_ON_PSU1:
+ case FAN2_ON_PSU1:
+ case FAN3_ON_PSU1:
+ pid = PSU1_ID;
+ break;
+ case FAN1_ON_PSU2:
+ case FAN2_ON_PSU2:
+ case FAN3_ON_PSU2:
+ pid = PSU2_ID;
+ break;
+ default:
+ ret = ONLP_STATUS_E_INVALID;
+ goto exit;
+ }
+
+ /* Get the PSU present state */
+ ret = onlp_file_read_int(&val, "%s""psu%d_status", PSU_SYSFS_PATH, pid);
+ if (ret < 0) {
+ AIM_LOG_ERROR("Unable to read status from (%s""psu%d_status), ret[%x]\r\n", PSU_SYSFS_PATH, pid, ret);
+
+ ret = ONLP_STATUS_E_INTERNAL;
+ goto exit;
+ } else if (val == 0) {
+ // PIU not present
+ ret = ONLP_STATUS_OK;
+ goto exit;
+ }
+
+ if (onlp_file_write_int(p,
+ "%s"
+ "psu%d_fan_pwm",
+ PSU_SYSFS_PATH, pid) < 0) {
+ AIM_LOG_ERROR(
+ "Unable to write data to file %s"
+ "psu%d_fan_pwm",
+ PSU_SYSFS_PATH, pid);
+ return ONLP_STATUS_E_INTERNAL;
+ }
+
+exit:
+
+ return ret;
+}
+
+
+/*
+ * This function sets the fan speed of the given OID as per
+ * the predefined ONLP fan speed modes: off, slow, normal, fast, max.
+ *
+ * Interpretation of these modes is up to the platform.
+ *
+ */
+int
+onlp_fani_mode_set(onlp_oid_t id, onlp_fan_mode_t mode)
+{
+ return ONLP_STATUS_E_UNSUPPORTED;
+}
+
+/*
+ * This function sets the fan direction of the given OID.
+ *
+ * This function is only relevant if the fan OID supports both direction
+ * capabilities.
+ *
+ * This function is optional unless the functionality is available.
+ */
+int
+onlp_fani_dir_set(onlp_oid_t id, onlp_fan_dir_t dir)
+{
+ return ONLP_STATUS_E_UNSUPPORTED;
+}
+
+/*
+ * Generic fan ioctl. Optional.
+ */
+int
+onlp_fani_ioctl(onlp_oid_t id, va_list vargs)
+{
+ return ONLP_STATUS_E_UNSUPPORTED;
+}
+
diff --git a/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/src/ledi.c b/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/src/ledi.c
new file mode 100644
index 0000000..59476bb
--- /dev/null
+++ b/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/src/ledi.c
@@ -0,0 +1,581 @@
+/************************************************************
+ *
+ *
+ * Copyright 2014 Big Switch Networks, Inc.
+ * Copyright 2013 Accton Technology Corporation.
+ *
+ * Licensed under the Eclipse Public License, Version 1.0 (the
+ * "License"); you may not use this file except in compliance
+ * with the License. You may obtain a copy of the License at
+ *
+ * http://www.eclipse.org/legal/epl-v10.html
+ *
+ * Unless required by applicable law or agreed to in writing,
+ * software distributed under the License is distributed on an
+ * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+ * either express or implied. See the License for the specific
+ * language governing permissions and limitations under the
+ * License.
+ *
+ *
+ ************************************************************
+ *
+ *
+ *
+ ***********************************************************/
+#include
+#include
+#include "onlp_mdio.h"
+#include "platform_lib.h"
+
+#define LED_FORMAT "/sys/devices/platform/wtp_01_c1_00_led/%s"
+
+#define SET_FPGA_BIT(_reg, _mode, _bit) \
+ fpga_read(_reg, &_value); \
+ fpga_write(_reg, (_value | ((_mode&0x3) << _bit)))
+
+#define CLEAR_FPGA_BITS(_reg, _bit) \
+ fpga_read(_reg, &_value); \
+ fpga_write(_reg, (_value & ~(0x3 << _bit)))
+
+#define SET_QSFP_FPGA_BIT(_reg, _mode, _bit) \
+ fpga_read(_reg, &_value); \
+ fpga_write(_reg, (_value & ~((_mode&0x3) << _bit)))
+
+#define CLEAR_QSFP_FPGA_BITS(_reg, _bit) \
+ fpga_read(_reg, &_value); \
+ fpga_write(_reg, (_value | (0x3 << _bit)))
+
+
+#define VALIDATE(_id) \
+ do { \
+ if(!ONLP_OID_IS_LED(_id)) { \
+ return ONLP_STATUS_E_INVALID; \
+ } \
+ } while(0)
+
+/* LED related data
+ */
+/*
+enum onlp_led_id
+{
+ LED_RESERVED = 0,
+ LED_SYS,
+ LED_PSU,
+ LED_SFP1,
+ LED_SFP2
+};
+*/
+
+/*
+enum led_light_mode {
+ LED_MODE_OFF,
+ LED_MODE_SYS_GREEN = 0x00001,
+ LED_MODE_SYS_RED = 0x00002,
+ LED_MODE_PSU_GREEN = 0x00001,
+ LED_MODE_PSU_RED = 0x00002,
+ LED_MODE_SYS_GREEN_BLINKING = 0x10001,
+ LED_MODE_SYS_RED_BLINKING = 0x10002,
+ LED_MODE_PSU_GREEN_BLINKING = 0x10001,
+ LED_MODE_PSU_RED_BLINKING = 0x10002,
+ LED_MODE_UNKNOWN = 9999
+};
+*/
+
+enum piu_led_light_mode {
+ LED_MODE_PIU_OFF,
+ LED_MODE_PIU_GREEN = 0x00001,
+ LED_MODE_PIU_BLUE = 0x00002,
+ LED_MODE_PIU_GREEN_BLINKING = 0x10001,
+ LED_MODE_PIU_BLUE_BLINKING = 0x10002,
+ LED_MODE_PIU_UNKNOWN = 9999
+};
+
+
+enum qsfp_light_mode {
+ LED_MODE_QSFP_OFF = 0x00003,
+ LED_MODE_QSFP_YELLOW = 0x00001,
+ LED_MODE_QSFP_GREEN = 0x00002,
+ LED_MODE_QSFP_YELLOW_BLINKING = 0x10001,
+ LED_MODE_QSFP_GREEN_BLINKING = 0x10002,
+ LED_MODE_QSFP_UNKNOWN = 9999
+};
+
+
+
+typedef struct led_light_mode_map {
+ enum onlp_led_id id;
+ enum led_light_mode driver_led_mode;
+ enum onlp_led_mode_e onlp_led_mode;
+} led_light_mode_map_t;
+
+led_light_mode_map_t led_map[] = {
+{LED_SYS, LED_MODE_OFF, ONLP_LED_MODE_OFF},
+{LED_SYS, LED_MODE_SYS_RED, ONLP_LED_MODE_RED},
+{LED_SYS, LED_MODE_SYS_RED_BLINKING, ONLP_LED_MODE_RED_BLINKING},
+{LED_SYS, LED_MODE_SYS_GREEN, ONLP_LED_MODE_GREEN},
+{LED_SYS, LED_MODE_SYS_GREEN_BLINKING, ONLP_LED_MODE_GREEN_BLINKING},
+{LED_PSU, LED_MODE_OFF, ONLP_LED_MODE_OFF},
+{LED_PSU, LED_MODE_PSU_RED, ONLP_LED_MODE_RED},
+{LED_PSU, LED_MODE_PSU_RED_BLINKING, ONLP_LED_MODE_RED_BLINKING},
+{LED_PSU, LED_MODE_PSU_GREEN, ONLP_LED_MODE_GREEN},
+{LED_PSU, LED_MODE_PSU_GREEN_BLINKING, ONLP_LED_MODE_GREEN_BLINKING},
+/*
+{LED_SFP1, LED_MODE_OFF, ONLP_LED_MODE_OFF},
+{LED_SFP1, LED_MODE_SFP_YELLOW, ONLP_LED_MODE_YELLOW},
+{LED_SFP1, LED_MODE_SFP_YELLOW_BLINKING, ONLP_LED_MODE_YELLOW_BLINKING},
+{LED_SFP1, LED_MODE_SFP_GREEN, ONLP_LED_MODE_GREEN},
+{LED_SFP1, LED_MODE_SFP_GREEN_BLINKING, ONLP_LED_MODE_GREEN_BLINKING},
+{LED_SFP2, LED_MODE_OFF, ONLP_LED_MODE_OFF},
+{LED_SFP2, LED_MODE_SFP_YELLOW, ONLP_LED_MODE_YELLOW},
+{LED_SFP2, LED_MODE_SFP_YELLOW_BLINKING, ONLP_LED_MODE_YELLOW_BLINKING},
+{LED_SFP2, LED_MODE_SFP_GREEN, ONLP_LED_MODE_GREEN},
+{LED_SFP2, LED_MODE_SFP_GREEN_BLINKING, ONLP_LED_MODE_GREEN_BLINKING},
+*/
+{LED_QSFP1, LED_MODE_QSFP_OFF, ONLP_LED_MODE_OFF},
+{LED_QSFP1, LED_MODE_QSFP_YELLOW, ONLP_LED_MODE_YELLOW},
+{LED_QSFP1, LED_MODE_QSFP_YELLOW_BLINKING, ONLP_LED_MODE_YELLOW_BLINKING},
+{LED_QSFP1, LED_MODE_QSFP_GREEN, ONLP_LED_MODE_GREEN},
+{LED_QSFP1, LED_MODE_QSFP_GREEN_BLINKING, ONLP_LED_MODE_GREEN_BLINKING},
+{LED_QSFP2, LED_MODE_QSFP_OFF, ONLP_LED_MODE_OFF},
+{LED_QSFP2, LED_MODE_QSFP_YELLOW, ONLP_LED_MODE_YELLOW},
+{LED_QSFP2, LED_MODE_QSFP_YELLOW_BLINKING, ONLP_LED_MODE_YELLOW_BLINKING},
+{LED_QSFP2, LED_MODE_QSFP_GREEN, ONLP_LED_MODE_GREEN},
+{LED_QSFP2, LED_MODE_QSFP_GREEN_BLINKING, ONLP_LED_MODE_GREEN_BLINKING},
+{LED_QSFP3, LED_MODE_QSFP_OFF, ONLP_LED_MODE_OFF},
+{LED_QSFP3, LED_MODE_QSFP_YELLOW, ONLP_LED_MODE_YELLOW},
+{LED_QSFP3, LED_MODE_QSFP_YELLOW_BLINKING, ONLP_LED_MODE_YELLOW_BLINKING},
+{LED_QSFP3, LED_MODE_QSFP_GREEN, ONLP_LED_MODE_GREEN},
+{LED_QSFP3, LED_MODE_QSFP_GREEN_BLINKING, ONLP_LED_MODE_GREEN_BLINKING},
+{LED_QSFP4, LED_MODE_QSFP_OFF, ONLP_LED_MODE_OFF},
+{LED_QSFP4, LED_MODE_QSFP_YELLOW, ONLP_LED_MODE_YELLOW},
+{LED_QSFP4, LED_MODE_QSFP_YELLOW_BLINKING, ONLP_LED_MODE_YELLOW_BLINKING},
+{LED_QSFP4, LED_MODE_QSFP_GREEN, ONLP_LED_MODE_GREEN},
+{LED_QSFP4, LED_MODE_QSFP_GREEN_BLINKING, ONLP_LED_MODE_GREEN_BLINKING},
+{LED_QSFP5, LED_MODE_QSFP_OFF, ONLP_LED_MODE_OFF},
+{LED_QSFP5, LED_MODE_QSFP_YELLOW, ONLP_LED_MODE_YELLOW},
+{LED_QSFP5, LED_MODE_QSFP_YELLOW_BLINKING, ONLP_LED_MODE_YELLOW_BLINKING},
+{LED_QSFP5, LED_MODE_QSFP_GREEN, ONLP_LED_MODE_GREEN},
+{LED_QSFP5, LED_MODE_QSFP_GREEN_BLINKING, ONLP_LED_MODE_GREEN_BLINKING},
+{LED_QSFP6, LED_MODE_QSFP_OFF, ONLP_LED_MODE_OFF},
+{LED_QSFP6, LED_MODE_QSFP_YELLOW, ONLP_LED_MODE_YELLOW},
+{LED_QSFP6, LED_MODE_QSFP_YELLOW_BLINKING, ONLP_LED_MODE_YELLOW_BLINKING},
+{LED_QSFP6, LED_MODE_QSFP_GREEN, ONLP_LED_MODE_GREEN},
+{LED_QSFP6, LED_MODE_QSFP_GREEN_BLINKING, ONLP_LED_MODE_GREEN_BLINKING},
+{LED_QSFP7, LED_MODE_QSFP_OFF, ONLP_LED_MODE_OFF},
+{LED_QSFP7, LED_MODE_QSFP_YELLOW, ONLP_LED_MODE_YELLOW},
+{LED_QSFP7, LED_MODE_QSFP_YELLOW_BLINKING, ONLP_LED_MODE_YELLOW_BLINKING},
+{LED_QSFP7, LED_MODE_QSFP_GREEN, ONLP_LED_MODE_GREEN},
+{LED_QSFP7, LED_MODE_QSFP_GREEN_BLINKING, ONLP_LED_MODE_GREEN_BLINKING},
+{LED_QSFP8, LED_MODE_QSFP_OFF, ONLP_LED_MODE_OFF},
+{LED_QSFP8, LED_MODE_QSFP_YELLOW, ONLP_LED_MODE_YELLOW},
+{LED_QSFP8, LED_MODE_QSFP_YELLOW_BLINKING, ONLP_LED_MODE_YELLOW_BLINKING},
+{LED_QSFP8, LED_MODE_QSFP_GREEN, ONLP_LED_MODE_GREEN},
+{LED_QSFP8, LED_MODE_QSFP_GREEN_BLINKING, ONLP_LED_MODE_GREEN_BLINKING},
+{LED_QSFP9, LED_MODE_QSFP_OFF, ONLP_LED_MODE_OFF},
+{LED_QSFP9, LED_MODE_QSFP_YELLOW, ONLP_LED_MODE_YELLOW},
+{LED_QSFP9, LED_MODE_QSFP_YELLOW_BLINKING, ONLP_LED_MODE_YELLOW_BLINKING},
+{LED_QSFP9, LED_MODE_QSFP_GREEN, ONLP_LED_MODE_GREEN},
+{LED_QSFP9, LED_MODE_QSFP_GREEN_BLINKING, ONLP_LED_MODE_GREEN_BLINKING},
+{LED_QSFP10, LED_MODE_QSFP_OFF, ONLP_LED_MODE_OFF},
+{LED_QSFP10, LED_MODE_QSFP_YELLOW, ONLP_LED_MODE_YELLOW},
+{LED_QSFP10, LED_MODE_QSFP_YELLOW_BLINKING, ONLP_LED_MODE_YELLOW_BLINKING},
+{LED_QSFP10, LED_MODE_QSFP_GREEN, ONLP_LED_MODE_GREEN},
+{LED_QSFP10, LED_MODE_QSFP_GREEN_BLINKING, ONLP_LED_MODE_GREEN_BLINKING},
+{LED_QSFP11, LED_MODE_QSFP_OFF, ONLP_LED_MODE_OFF},
+{LED_QSFP11, LED_MODE_QSFP_YELLOW, ONLP_LED_MODE_YELLOW},
+{LED_QSFP11, LED_MODE_QSFP_YELLOW_BLINKING, ONLP_LED_MODE_YELLOW_BLINKING},
+{LED_QSFP11, LED_MODE_QSFP_GREEN, ONLP_LED_MODE_GREEN},
+{LED_QSFP11, LED_MODE_QSFP_GREEN_BLINKING, ONLP_LED_MODE_GREEN_BLINKING},
+{LED_QSFP12, LED_MODE_QSFP_OFF, ONLP_LED_MODE_OFF},
+{LED_QSFP12, LED_MODE_QSFP_YELLOW, ONLP_LED_MODE_YELLOW},
+{LED_QSFP12, LED_MODE_QSFP_YELLOW_BLINKING, ONLP_LED_MODE_YELLOW_BLINKING},
+{LED_QSFP12, LED_MODE_QSFP_GREEN, ONLP_LED_MODE_GREEN},
+{LED_QSFP12, LED_MODE_QSFP_GREEN_BLINKING, ONLP_LED_MODE_GREEN_BLINKING},
+{LED_QSFP13, LED_MODE_QSFP_OFF, ONLP_LED_MODE_OFF},
+{LED_QSFP13, LED_MODE_QSFP_YELLOW, ONLP_LED_MODE_YELLOW},
+{LED_QSFP13, LED_MODE_QSFP_YELLOW_BLINKING, ONLP_LED_MODE_YELLOW_BLINKING},
+{LED_QSFP13, LED_MODE_QSFP_GREEN, ONLP_LED_MODE_GREEN},
+{LED_QSFP13, LED_MODE_QSFP_GREEN_BLINKING, ONLP_LED_MODE_GREEN_BLINKING},
+{LED_QSFP14, LED_MODE_QSFP_OFF, ONLP_LED_MODE_OFF},
+{LED_QSFP14, LED_MODE_QSFP_YELLOW, ONLP_LED_MODE_YELLOW},
+{LED_QSFP14, LED_MODE_QSFP_YELLOW_BLINKING, ONLP_LED_MODE_YELLOW_BLINKING},
+{LED_QSFP14, LED_MODE_QSFP_GREEN, ONLP_LED_MODE_GREEN},
+{LED_QSFP14, LED_MODE_QSFP_GREEN_BLINKING, ONLP_LED_MODE_GREEN_BLINKING},
+{LED_QSFP15, LED_MODE_QSFP_OFF, ONLP_LED_MODE_OFF},
+{LED_QSFP15, LED_MODE_QSFP_YELLOW, ONLP_LED_MODE_YELLOW},
+{LED_QSFP15, LED_MODE_QSFP_YELLOW_BLINKING, ONLP_LED_MODE_YELLOW_BLINKING},
+{LED_QSFP15, LED_MODE_QSFP_GREEN, ONLP_LED_MODE_GREEN},
+{LED_QSFP15, LED_MODE_QSFP_GREEN_BLINKING, ONLP_LED_MODE_GREEN_BLINKING},
+{LED_QSFP16, LED_MODE_QSFP_OFF, ONLP_LED_MODE_OFF},
+{LED_QSFP16, LED_MODE_QSFP_YELLOW, ONLP_LED_MODE_YELLOW},
+{LED_QSFP16, LED_MODE_QSFP_YELLOW_BLINKING, ONLP_LED_MODE_YELLOW_BLINKING},
+{LED_QSFP16, LED_MODE_QSFP_GREEN, ONLP_LED_MODE_GREEN},
+{LED_QSFP16, LED_MODE_QSFP_GREEN_BLINKING, ONLP_LED_MODE_GREEN_BLINKING},
+
+{LED_CFP1, LED_MODE_OFF, ONLP_LED_MODE_OFF},
+{LED_CFP1, LED_MODE_PIU_BLUE, ONLP_LED_MODE_BLUE},
+{LED_CFP1, LED_MODE_PIU_BLUE_BLINKING, ONLP_LED_MODE_BLUE_BLINKING},
+{LED_CFP1, LED_MODE_PIU_GREEN, ONLP_LED_MODE_GREEN},
+{LED_CFP1, LED_MODE_PIU_GREEN_BLINKING, ONLP_LED_MODE_GREEN_BLINKING},
+{LED_CFP2, LED_MODE_OFF, ONLP_LED_MODE_OFF},
+{LED_CFP2, LED_MODE_PIU_BLUE, ONLP_LED_MODE_BLUE},
+{LED_CFP2, LED_MODE_PIU_BLUE_BLINKING, ONLP_LED_MODE_BLUE_BLINKING},
+{LED_CFP2, LED_MODE_PIU_GREEN, ONLP_LED_MODE_GREEN},
+{LED_CFP2, LED_MODE_PIU_GREEN_BLINKING, ONLP_LED_MODE_GREEN_BLINKING},
+{LED_CFP3, LED_MODE_OFF, ONLP_LED_MODE_OFF},
+{LED_CFP3, LED_MODE_PIU_BLUE, ONLP_LED_MODE_BLUE},
+{LED_CFP3, LED_MODE_PIU_BLUE_BLINKING, ONLP_LED_MODE_BLUE_BLINKING},
+{LED_CFP3, LED_MODE_PIU_GREEN, ONLP_LED_MODE_GREEN},
+{LED_CFP3, LED_MODE_PIU_GREEN_BLINKING, ONLP_LED_MODE_GREEN_BLINKING},
+{LED_CFP4, LED_MODE_OFF, ONLP_LED_MODE_OFF},
+{LED_CFP4, LED_MODE_PIU_BLUE, ONLP_LED_MODE_BLUE},
+{LED_CFP4, LED_MODE_PIU_BLUE_BLINKING, ONLP_LED_MODE_BLUE_BLINKING},
+{LED_CFP4, LED_MODE_PIU_GREEN, ONLP_LED_MODE_GREEN},
+{LED_CFP4, LED_MODE_PIU_GREEN_BLINKING, ONLP_LED_MODE_GREEN_BLINKING},
+
+};
+
+/* must map with onlp_led_id */
+static char *leds[] =
+{
+ NULL,
+ "led_sys",
+ "led_psu",
+// "led_sfp1",
+// "led_sfp2",
+ "led_qsfp1",
+ "led_qsfp2",
+ "led_qsfp3",
+ "led_qsfp4",
+ "led_qsfp5",
+ "led_qsfp6",
+ "led_qsfp7",
+ "led_qsfp8",
+ "led_qsfp9",
+ "led_qsfp10",
+ "led_qsfp11",
+ "led_qsfp12",
+ "led_qsfp13",
+ "led_qsfp14",
+ "led_qsfp15",
+ "led_qsfp16",
+ "led_cfp1",
+ "led_cfp2",
+ "led_cfp3",
+ "led_cfp4"
+};
+
+/*
+ * Get the information for the given LED OID.
+ */
+static onlp_led_info_t linfo[] =
+{
+ { }, /* Not used */
+ {
+ { ONLP_LED_ID_CREATE(LED_SYS), "Chassis LED 1 (SYSTEM LED)", 0 },
+ ONLP_LED_STATUS_PRESENT,
+ ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_RED_BLINKING | ONLP_LED_CAPS_GREEN | ONLP_LED_CAPS_GREEN_BLINKING,
+ },
+ {
+ { ONLP_LED_ID_CREATE(LED_PSU), "Chassis LED 2 (PSU LED)", 0 },
+ ONLP_LED_STATUS_PRESENT,
+ ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_RED | ONLP_LED_CAPS_RED_BLINKING | ONLP_LED_CAPS_GREEN,
+ },
+ /*
+ {
+ { ONLP_LED_ID_CREATE(LED_SFP1), "Chassis LED 3 (SFP1 LED)", 0 },
+ ONLP_LED_STATUS_PRESENT,
+ ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_YELLOW | ONLP_LED_CAPS_YELLOW_BLINKING | ONLP_LED_CAPS_GREEN | ONLP_LED_CAPS_GREEN_BLINKING,
+ },
+ {
+ { ONLP_LED_ID_CREATE(LED_SFP2), "Chassis LED 4 (SFP2 LED)", 0 },
+ ONLP_LED_STATUS_PRESENT,
+ ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_YELLOW | ONLP_LED_CAPS_YELLOW_BLINKING | ONLP_LED_CAPS_GREEN | ONLP_LED_CAPS_GREEN_BLINKING,
+ },
+ */
+ {
+ { ONLP_LED_ID_CREATE(LED_QSFP1), "QSFP28 LED 1", 0 },
+ ONLP_LED_STATUS_PRESENT,
+ ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_YELLOW | ONLP_LED_CAPS_YELLOW_BLINKING | ONLP_LED_CAPS_GREEN | ONLP_LED_CAPS_GREEN_BLINKING,
+ },
+ {
+ { ONLP_LED_ID_CREATE(LED_QSFP2), "QSFP28 LED 2", 0 },
+ ONLP_LED_STATUS_PRESENT,
+ ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_YELLOW | ONLP_LED_CAPS_YELLOW_BLINKING | ONLP_LED_CAPS_GREEN | ONLP_LED_CAPS_GREEN_BLINKING,
+ },
+ {
+ { ONLP_LED_ID_CREATE(LED_QSFP3), "QSFP28 LED 3", 0 },
+ ONLP_LED_STATUS_PRESENT,
+ ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_YELLOW | ONLP_LED_CAPS_YELLOW_BLINKING | ONLP_LED_CAPS_GREEN | ONLP_LED_CAPS_GREEN_BLINKING,
+ },
+ {
+ { ONLP_LED_ID_CREATE(LED_QSFP4), "QSFP28 LED 4", 0 },
+ ONLP_LED_STATUS_PRESENT,
+ ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_YELLOW | ONLP_LED_CAPS_YELLOW_BLINKING | ONLP_LED_CAPS_GREEN | ONLP_LED_CAPS_GREEN_BLINKING,
+ },
+ {
+ { ONLP_LED_ID_CREATE(LED_QSFP5), "QSFP28 LED 5", 0 },
+ ONLP_LED_STATUS_PRESENT,
+ ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_YELLOW | ONLP_LED_CAPS_YELLOW_BLINKING | ONLP_LED_CAPS_GREEN | ONLP_LED_CAPS_GREEN_BLINKING,
+ },
+ {
+ { ONLP_LED_ID_CREATE(LED_QSFP6), "QSFP28 LED 6", 0 },
+ ONLP_LED_STATUS_PRESENT,
+ ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_YELLOW | ONLP_LED_CAPS_YELLOW_BLINKING | ONLP_LED_CAPS_GREEN | ONLP_LED_CAPS_GREEN_BLINKING,
+ },
+ {
+ { ONLP_LED_ID_CREATE(LED_QSFP7), "QSFP28 LED 7", 0 },
+ ONLP_LED_STATUS_PRESENT,
+ ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_YELLOW | ONLP_LED_CAPS_YELLOW_BLINKING | ONLP_LED_CAPS_GREEN | ONLP_LED_CAPS_GREEN_BLINKING,
+ },
+ {
+ { ONLP_LED_ID_CREATE(LED_QSFP8), "QSFP28 LED 8", 0 },
+ ONLP_LED_STATUS_PRESENT,
+ ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_YELLOW | ONLP_LED_CAPS_YELLOW_BLINKING | ONLP_LED_CAPS_GREEN | ONLP_LED_CAPS_GREEN_BLINKING,
+ },
+ {
+ { ONLP_LED_ID_CREATE(LED_QSFP9), "QSFP28 LED 9", 0 },
+ ONLP_LED_STATUS_PRESENT,
+ ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_YELLOW | ONLP_LED_CAPS_YELLOW_BLINKING | ONLP_LED_CAPS_GREEN | ONLP_LED_CAPS_GREEN_BLINKING,
+ },
+ {
+ { ONLP_LED_ID_CREATE(LED_QSFP10), "QSFP28 LED 10", 0 },
+ ONLP_LED_STATUS_PRESENT,
+ ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_YELLOW | ONLP_LED_CAPS_YELLOW_BLINKING | ONLP_LED_CAPS_GREEN | ONLP_LED_CAPS_GREEN_BLINKING,
+ },
+ {
+ { ONLP_LED_ID_CREATE(LED_QSFP11), "QSFP28 LED 11", 0 },
+ ONLP_LED_STATUS_PRESENT,
+ ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_YELLOW | ONLP_LED_CAPS_YELLOW_BLINKING | ONLP_LED_CAPS_GREEN | ONLP_LED_CAPS_GREEN_BLINKING,
+ },
+ {
+ { ONLP_LED_ID_CREATE(LED_QSFP12), "QSFP28 LED 12", 0 },
+ ONLP_LED_STATUS_PRESENT,
+ ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_YELLOW | ONLP_LED_CAPS_YELLOW_BLINKING | ONLP_LED_CAPS_GREEN | ONLP_LED_CAPS_GREEN_BLINKING,
+ },
+ {
+ { ONLP_LED_ID_CREATE(LED_QSFP13), "QSFP28 LED 13", 0 },
+ ONLP_LED_STATUS_PRESENT,
+ ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_YELLOW | ONLP_LED_CAPS_YELLOW_BLINKING | ONLP_LED_CAPS_GREEN | ONLP_LED_CAPS_GREEN_BLINKING,
+ },
+ {
+ { ONLP_LED_ID_CREATE(LED_QSFP14), "QSFP28 LED 14", 0 },
+ ONLP_LED_STATUS_PRESENT,
+ ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_YELLOW | ONLP_LED_CAPS_YELLOW_BLINKING | ONLP_LED_CAPS_GREEN | ONLP_LED_CAPS_GREEN_BLINKING,
+ },
+ {
+ { ONLP_LED_ID_CREATE(LED_QSFP15), "QSFP28 LED 15", 0 },
+ ONLP_LED_STATUS_PRESENT,
+ ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_YELLOW | ONLP_LED_CAPS_YELLOW_BLINKING | ONLP_LED_CAPS_GREEN | ONLP_LED_CAPS_GREEN_BLINKING,
+ },
+ {
+ { ONLP_LED_ID_CREATE(LED_QSFP16), "QSFP28 LED 16", 0 },
+ ONLP_LED_STATUS_PRESENT,
+ ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_YELLOW | ONLP_LED_CAPS_YELLOW_BLINKING | ONLP_LED_CAPS_GREEN | ONLP_LED_CAPS_GREEN_BLINKING,
+ },
+
+ {
+ { ONLP_LED_ID_CREATE(LED_CFP1), "CFP2 LED 1 (CFP2-1 LED)", 0 },
+ ONLP_LED_STATUS_PRESENT,
+ ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_BLUE | ONLP_LED_CAPS_BLUE_BLINKING | ONLP_LED_CAPS_GREEN | ONLP_LED_CAPS_GREEN_BLINKING,
+ },
+ {
+ { ONLP_LED_ID_CREATE(LED_CFP2), "CFP2 LED 2 (CFP2-2 LED)", 0 },
+ ONLP_LED_STATUS_PRESENT,
+ ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_BLUE | ONLP_LED_CAPS_BLUE_BLINKING | ONLP_LED_CAPS_GREEN | ONLP_LED_CAPS_GREEN_BLINKING,
+ },
+ {
+ { ONLP_LED_ID_CREATE(LED_CFP3), "CFP2 LED 3 (CFP2-3 LED)", 0 },
+ ONLP_LED_STATUS_PRESENT,
+ ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_BLUE | ONLP_LED_CAPS_BLUE_BLINKING | ONLP_LED_CAPS_GREEN | ONLP_LED_CAPS_GREEN_BLINKING,
+ },
+ {
+ { ONLP_LED_ID_CREATE(LED_CFP4), "CFP2 LED 4 (CFP2-4 LED)", 0 },
+ ONLP_LED_STATUS_PRESENT,
+ ONLP_LED_CAPS_ON_OFF | ONLP_LED_CAPS_BLUE | ONLP_LED_CAPS_BLUE_BLINKING | ONLP_LED_CAPS_GREEN | ONLP_LED_CAPS_GREEN_BLINKING,
+ },
+
+
+};
+/*
+static int driver_to_onlp_led_mode(enum onlp_led_id id, enum led_light_mode driver_led_mode)
+{
+ int i, nsize = sizeof(led_map)/sizeof(led_map[0]);
+
+ for (i = 0; i < nsize; i++)
+ {
+ if (id == led_map[i].id && driver_led_mode == led_map[i].driver_led_mode)
+ {
+ return led_map[i].onlp_led_mode;
+ }
+ }
+
+ return 0;
+}
+
+static int onlp_to_driver_led_mode(enum onlp_led_id id, onlp_led_mode_t onlp_led_mode)
+{
+ int i, nsize = sizeof(led_map)/sizeof(led_map[0]);
+
+ for(i = 0; i < nsize; i++)
+ {
+ if (id == led_map[i].id && onlp_led_mode == led_map[i].onlp_led_mode)
+ {
+ return led_map[i].driver_led_mode;
+ }
+ }
+
+ return 0;
+}
+*/
+int
+turn_on_phy_led(uint32_t addr, uint32_t reg, uint16_t bit)
+{
+ uint16_t value=0;
+
+ onlp_mdio_read_c22(addr, reg, &value);
+ value = value | (0xf << bit);
+ return onlp_mdio_write_c22(addr, reg, value);
+ return value;
+}
+
+int
+turn_off_phy_led(uint32_t addr, uint32_t reg, uint16_t bit)
+{
+ uint16_t value=0;
+
+ onlp_mdio_read_c22(addr, reg, &value);
+ value = value | (0xe << bit);
+ value = value & ~(0x1 << bit);
+ return onlp_mdio_write_c22(addr, reg, value);
+ //return value;
+}
+
+
+/*
+ * This function will be called prior to any other onlp_ledi_* functions.
+ */
+int
+onlp_ledi_init(void)
+{
+ return ONLP_STATUS_OK;
+}
+
+int
+onlp_ledi_info_get(onlp_oid_t id, onlp_led_info_t* info)
+{
+ int lid, mode, value;
+ //int value1, value2;
+ //uint32_t addr;
+ //uint16_t value16 = 0;
+
+ VALIDATE(id);
+
+ lid = ONLP_OID_ID_GET(id);
+
+ /* Set the onlp_oid_hdr_t and capabilities */
+ *info = linfo[ONLP_OID_ID_GET(id)];
+
+ /* Get LED mode */
+ switch (lid) {
+ /*
+ case LED_SFP1:
+ case LED_SFP2:
+ addr = (lid == LED_SFP1) ? SFP1_PHYADDRESS : SFP2_PHYADDRESS;
+
+ onlp_mdio_read_c22(addr, SFP_LED_REGISTER, &value16);
+ value1 = 0xf << SFP_LED_BIT_GREEN;
+ value2 = 0xf << SFP_LED_BIT_YELLOW;
+
+ if ( (value16 & value1) == value1 )
+ {
+ mode = LED_MODE_SFP_GREEN;
+ }
+ else if ( (value16 & value2) == value2 )
+ {
+ mode = LED_MODE_SFP_YELLOW;
+ }
+ else
+ {
+ mode = LED_MODE_OFF;
+ }
+ break;
+ */
+
+ default:
+ /* Get LED mode */
+ if (lid > LED_CFP4)
+ {
+ DEBUG_PRINT("Unable to read status from file " LED_FORMAT);
+ mode = LED_MODE_OFF;
+ return ONLP_STATUS_E_INTERNAL;
+ }
+
+ if ((onlp_file_read_int(&value, LED_FORMAT, leds[lid]) < 0))
+ {
+ DEBUG_PRINT("Unable to read status from file " LED_FORMAT, leds[lid]);
+ return ONLP_STATUS_E_INTERNAL;
+ }
+
+ mode = value;
+ break;
+ }
+
+ info->mode = mode;//driver_to_onlp_led_mode(lid, mode);
+
+ return ONLP_STATUS_OK;
+}
+
+/*
+ * Turn an LED on or off.
+ *
+ * This function will only be called if the LED OID supports the ONOFF
+ * capability.
+ *
+ * What 'on' means in terms of colors or modes for multimode LEDs is
+ * up to the platform to decide. This is intended as baseline toggle mechanism.
+ * Wistron : Currenlty we dont see any use-case for ON and also the color is not known
+ * and hence is not supported.
+ */
+int
+onlp_ledi_set(onlp_oid_t id, int on_or_off)
+{
+ VALIDATE(id);
+
+ if (!on_or_off) {
+ return onlp_ledi_mode_set(id, ONLP_LED_MODE_OFF);
+ }
+
+ return ONLP_STATUS_E_UNSUPPORTED;
+}
+
+/*
+ * This function puts the LED into the given mode. It is a more functional
+ * interface for multimode LEDs.
+ *
+ * Only modes reported in the LED's capabilities will be attempted.
+ */
+int
+onlp_ledi_mode_set(onlp_oid_t id, onlp_led_mode_t onlp_mode)
+{
+ int lid;//, _value;
+ //uint32_t addr;
+ //int rv = ONLP_STATUS_OK;
+ VALIDATE(id);
+
+ lid = ONLP_OID_ID_GET(id);
+
+ if (lid > LED_CFP4)
+ {
+ return ONLP_STATUS_E_INTERNAL;
+ }
+
+ if (onlp_file_write_int(onlp_mode, LED_FORMAT, leds[lid]) < 0)
+ {
+ return ONLP_STATUS_E_INTERNAL;
+ }
+
+ return ONLP_STATUS_OK;
+}
+
diff --git a/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/src/linux/nvme.h b/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/src/linux/nvme.h
new file mode 100644
index 0000000..aa678c9
--- /dev/null
+++ b/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/src/linux/nvme.h
@@ -0,0 +1,1855 @@
+/*
+ * Definitions for the NVM Express interface
+ * Copyright (c) 2011-2014, Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ */
+
+#ifndef _LINUX_NVME_H
+#define _LINUX_NVME_H
+
+#include
+
+#ifdef LIBUUID
+#include
+#else
+typedef struct {
+ uint8_t b[16];
+} uuid_t;
+#endif
+
+#ifdef __CHECKER__
+#define __force __attribute__((force))
+#else
+#define __force
+#endif
+
+static inline __le16 cpu_to_le16(uint16_t x)
+{
+ return (__force __le16)htole16(x);
+}
+static inline __le32 cpu_to_le32(uint32_t x)
+{
+ return (__force __le32)htole32(x);
+}
+static inline __le64 cpu_to_le64(uint64_t x)
+{
+ return (__force __le64)htole64(x);
+}
+
+static inline uint16_t le16_to_cpu(__le16 x)
+{
+ return le16toh((__force __u16)x);
+}
+static inline uint32_t le32_to_cpu(__le32 x)
+{
+ return le32toh((__force __u32)x);
+}
+static inline uint64_t le64_to_cpu(__le64 x)
+{
+ return le64toh((__force __u64)x);
+}
+
+/* NQN names in commands fields specified one size */
+#define NVMF_NQN_FIELD_LEN 256
+
+/* However the max length of a qualified name is another size */
+#define NVMF_NQN_SIZE 223
+
+#define NVMF_TRSVCID_SIZE 32
+#define NVMF_TRADDR_SIZE 256
+#define NVMF_TSAS_SIZE 256
+
+#define NVME_DISC_SUBSYS_NAME "nqn.2014-08.org.nvmexpress.discovery"
+
+#define NVME_RDMA_IP_PORT 4420
+#define NVME_DISC_IP_PORT 8009
+
+#define NVME_NSID_ALL 0xffffffff
+
+enum nvme_subsys_type {
+ NVME_NQN_DISC = 1, /* Discovery type target subsystem */
+ NVME_NQN_NVME = 2, /* NVME type target subsystem */
+};
+
+/* Address Family codes for Discovery Log Page entry ADRFAM field */
+enum {
+ NVMF_ADDR_FAMILY_PCI = 0, /* PCIe */
+ NVMF_ADDR_FAMILY_IP4 = 1, /* IP4 */
+ NVMF_ADDR_FAMILY_IP6 = 2, /* IP6 */
+ NVMF_ADDR_FAMILY_IB = 3, /* InfiniBand */
+ NVMF_ADDR_FAMILY_FC = 4, /* Fibre Channel */
+ NVMF_ADDR_FAMILY_LOOP = 254, /* Reserved for host usage */
+ NVMF_ADDR_FAMILY_MAX,
+};
+
+/* Transport Type codes for Discovery Log Page entry TRTYPE field */
+enum {
+ NVMF_TRTYPE_RDMA = 1, /* RDMA */
+ NVMF_TRTYPE_FC = 2, /* Fibre Channel */
+ NVMF_TRTYPE_TCP = 3, /* TCP */
+ NVMF_TRTYPE_LOOP = 254, /* Reserved for host usage */
+ NVMF_TRTYPE_MAX,
+};
+
+/* Transport Requirements codes for Discovery Log Page entry TREQ field */
+enum {
+ NVMF_TREQ_NOT_SPECIFIED = 0, /* Not specified */
+ NVMF_TREQ_REQUIRED = 1, /* Required */
+ NVMF_TREQ_NOT_REQUIRED = 2, /* Not Required */
+ NVMF_TREQ_DISABLE_SQFLOW = (1 << 2), /* SQ flow control disable supported */
+};
+
+/* RDMA QP Service Type codes for Discovery Log Page entry TSAS
+ * RDMA_QPTYPE field
+ */
+enum {
+ NVMF_RDMA_QPTYPE_CONNECTED = 1, /* Reliable Connected */
+ NVMF_RDMA_QPTYPE_DATAGRAM = 2, /* Reliable Datagram */
+};
+
+/* RDMA QP Service Type codes for Discovery Log Page entry TSAS
+ * RDMA_QPTYPE field
+ */
+enum {
+ NVMF_RDMA_PRTYPE_NOT_SPECIFIED = 1, /* No Provider Specified */
+ NVMF_RDMA_PRTYPE_IB = 2, /* InfiniBand */
+ NVMF_RDMA_PRTYPE_ROCE = 3, /* InfiniBand RoCE */
+ NVMF_RDMA_PRTYPE_ROCEV2 = 4, /* InfiniBand RoCEV2 */
+ NVMF_RDMA_PRTYPE_IWARP = 5, /* IWARP */
+};
+
+/* RDMA Connection Management Service Type codes for Discovery Log Page
+ * entry TSAS RDMA_CMS field
+ */
+enum {
+ NVMF_RDMA_CMS_RDMA_CM = 1, /* Sockets based endpoint addressing */
+};
+
+/* TCP port security type for Discovery Log Page entry TSAS
+ */
+enum {
+ NVMF_TCP_SECTYPE_NONE = 0, /* No Security */
+ NVMF_TCP_SECTYPE_TLS = 1, /* Transport Layer Security */
+};
+
+/* I/O Command Sets
+ */
+enum {
+ NVME_IOCS_NVM = 0x00,
+ NVME_IOCS_ZONED = 0x02,
+};
+
+#define NVME_AQ_DEPTH 32
+#define NVME_NR_AEN_COMMANDS 1
+#define NVME_AQ_BLK_MQ_DEPTH (NVME_AQ_DEPTH - NVME_NR_AEN_COMMANDS)
+
+/*
+ * Subtract one to leave an empty queue entry for 'Full Queue' condition. See
+ * NVM-Express 1.2 specification, section 4.1.2.
+ */
+#define NVME_AQ_MQ_TAG_DEPTH (NVME_AQ_BLK_MQ_DEPTH - 1)
+
+enum {
+ NVME_REG_CAP = 0x0000, /* Controller Capabilities */
+ NVME_REG_VS = 0x0008, /* Version */
+ NVME_REG_INTMS = 0x000c, /* Interrupt Mask Set */
+ NVME_REG_INTMC = 0x0010, /* Interrupt Mask Clear */
+ NVME_REG_CC = 0x0014, /* Controller Configuration */
+ NVME_REG_CSTS = 0x001c, /* Controller Status */
+ NVME_REG_NSSR = 0x0020, /* NVM Subsystem Reset */
+ NVME_REG_AQA = 0x0024, /* Admin Queue Attributes */
+ NVME_REG_ASQ = 0x0028, /* Admin SQ Base Address */
+ NVME_REG_ACQ = 0x0030, /* Admin CQ Base Address */
+ NVME_REG_CMBLOC = 0x0038, /* Controller Memory Buffer Location */
+ NVME_REG_CMBSZ = 0x003c, /* Controller Memory Buffer Size */
+ NVME_REG_BPINFO = 0x0040, /* Boot Partition Information */
+ NVME_REG_BPRSEL = 0x0044, /* Boot Partition Read Select */
+ NVME_REG_BPMBL = 0x0048, /* Boot Partition Memory Buffer Location */
+ NVME_REG_CMBMSC = 0x0050, /* Controller Memory Buffer Memory Space Control */
+ NVME_REG_CMBSTS = 0x0058, /* Controller Memory Buffer Status */
+ NVME_REG_PMRCAP = 0x0e00, /* Persistent Memory Capabilities */
+ NVME_REG_PMRCTL = 0x0e04, /* Persistent Memory Region Control */
+ NVME_REG_PMRSTS = 0x0e08, /* Persistent Memory Region Status */
+ NVME_REG_PMREBS = 0x0e0c, /* Persistent Memory Region Elasticity Buffer Size */
+ NVME_REG_PMRSWTP= 0x0e10, /* Persistent Memory Region Sustained Write Throughput */
+ NVME_REG_PMRMSCL= 0x0e14, /* Persistent Memory Region Controller Memory Space Control Lower */
+ NVME_REG_PMRMSCU= 0x0e18, /* Persistent Memory Region Controller Memory Space Control Upper*/
+ NVME_REG_DBS = 0x1000, /* SQ 0 Tail Doorbell */
+};
+
+#define NVME_CAP_MQES(cap) ((cap) & 0xffff)
+#define NVME_CAP_TIMEOUT(cap) (((cap) >> 24) & 0xff)
+#define NVME_CAP_STRIDE(cap) (((cap) >> 32) & 0xf)
+#define NVME_CAP_NSSRC(cap) (((cap) >> 36) & 0x1)
+#define NVME_CAP_MPSMIN(cap) (((cap) >> 48) & 0xf)
+#define NVME_CAP_MPSMAX(cap) (((cap) >> 52) & 0xf)
+
+#define NVME_CMB_BIR(cmbloc) ((cmbloc) & 0x7)
+#define NVME_CMB_OFST(cmbloc) (((cmbloc) >> 12) & 0xfffff)
+#define NVME_CMB_SZ(cmbsz) (((cmbsz) >> 12) & 0xfffff)
+#define NVME_CMB_SZU(cmbsz) (((cmbsz) >> 8) & 0xf)
+
+#define NVME_CMB_WDS(cmbsz) ((cmbsz) & 0x10)
+#define NVME_CMB_RDS(cmbsz) ((cmbsz) & 0x8)
+#define NVME_CMB_LISTS(cmbsz) ((cmbsz) & 0x4)
+#define NVME_CMB_CQS(cmbsz) ((cmbsz) & 0x2)
+#define NVME_CMB_SQS(cmbsz) ((cmbsz) & 0x1)
+
+/*
+ * Submission and Completion Queue Entry Sizes for the NVM command set.
+ * (In bytes and specified as a power of two (2^n)).
+ */
+#define NVME_NVM_IOSQES 6
+#define NVME_NVM_IOCQES 4
+
+enum {
+ NVME_CC_ENABLE = 1 << 0,
+ NVME_CC_CSS_NVM = 0 << 4,
+ NVME_CC_EN_SHIFT = 0,
+ NVME_CC_CSS_SHIFT = 4,
+ NVME_CC_MPS_SHIFT = 7,
+ NVME_CC_AMS_SHIFT = 11,
+ NVME_CC_SHN_SHIFT = 14,
+ NVME_CC_IOSQES_SHIFT = 16,
+ NVME_CC_IOCQES_SHIFT = 20,
+ NVME_CC_AMS_RR = 0 << NVME_CC_AMS_SHIFT,
+ NVME_CC_AMS_WRRU = 1 << NVME_CC_AMS_SHIFT,
+ NVME_CC_AMS_VS = 7 << NVME_CC_AMS_SHIFT,
+ NVME_CC_SHN_NONE = 0 << NVME_CC_SHN_SHIFT,
+ NVME_CC_SHN_NORMAL = 1 << NVME_CC_SHN_SHIFT,
+ NVME_CC_SHN_ABRUPT = 2 << NVME_CC_SHN_SHIFT,
+ NVME_CC_SHN_MASK = 3 << NVME_CC_SHN_SHIFT,
+ NVME_CC_IOSQES = NVME_NVM_IOSQES << NVME_CC_IOSQES_SHIFT,
+ NVME_CC_IOCQES = NVME_NVM_IOCQES << NVME_CC_IOCQES_SHIFT,
+ NVME_CSTS_RDY = 1 << 0,
+ NVME_CSTS_CFS = 1 << 1,
+ NVME_CSTS_NSSRO = 1 << 4,
+ NVME_CSTS_PP = 1 << 5,
+ NVME_CSTS_SHST_NORMAL = 0 << 2,
+ NVME_CSTS_SHST_OCCUR = 1 << 2,
+ NVME_CSTS_SHST_CMPLT = 2 << 2,
+ NVME_CSTS_SHST_MASK = 3 << 2,
+};
+
+struct nvme_id_power_state {
+ __le16 max_power; /* centiwatts */
+ __u8 rsvd2;
+ __u8 flags;
+ __le32 entry_lat; /* microseconds */
+ __le32 exit_lat; /* microseconds */
+ __u8 read_tput;
+ __u8 read_lat;
+ __u8 write_tput;
+ __u8 write_lat;
+ __le16 idle_power;
+ __u8 idle_scale;
+ __u8 rsvd19;
+ __le16 active_power;
+ __u8 active_work_scale;
+ __u8 rsvd23[9];
+};
+
+/* idle and active power scales occupy the last 2 bits of the field */
+#define POWER_SCALE(s) ((s) >> 6)
+
+enum {
+ NVME_PS_FLAGS_MAX_POWER_SCALE = 1 << 0,
+ NVME_PS_FLAGS_NON_OP_STATE = 1 << 1,
+};
+
+struct nvme_id_ctrl {
+ __le16 vid;
+ __le16 ssvid;
+ char sn[20];
+ char mn[40];
+ char fr[8];
+ __u8 rab;
+ __u8 ieee[3];
+ __u8 cmic;
+ __u8 mdts;
+ __le16 cntlid;
+ __le32 ver;
+ __le32 rtd3r;
+ __le32 rtd3e;
+ __le32 oaes;
+ __le32 ctratt;
+ __le16 rrls;
+ __u8 rsvd102[9];
+ __u8 cntrltype;
+ char fguid[16];
+ __le16 crdt1;
+ __le16 crdt2;
+ __le16 crdt3;
+ __u8 rsvd134[122];
+ __le16 oacs;
+ __u8 acl;
+ __u8 aerl;
+ __u8 frmw;
+ __u8 lpa;
+ __u8 elpe;
+ __u8 npss;
+ __u8 avscc;
+ __u8 apsta;
+ __le16 wctemp;
+ __le16 cctemp;
+ __le16 mtfa;
+ __le32 hmpre;
+ __le32 hmmin;
+ __u8 tnvmcap[16];
+ __u8 unvmcap[16];
+ __le32 rpmbs;
+ __le16 edstt;
+ __u8 dsto;
+ __u8 fwug;
+ __le16 kas;
+ __le16 hctma;
+ __le16 mntmt;
+ __le16 mxtmt;
+ __le32 sanicap;
+ __le32 hmminds;
+ __le16 hmmaxd;
+ __le16 nsetidmax;
+ __le16 endgidmax;
+ __u8 anatt;
+ __u8 anacap;
+ __le32 anagrpmax;
+ __le32 nanagrpid;
+ __le32 pels;
+ __u8 rsvd356[156];
+ __u8 sqes;
+ __u8 cqes;
+ __le16 maxcmd;
+ __le32 nn;
+ __le16 oncs;
+ __le16 fuses;
+ __u8 fna;
+ __u8 vwc;
+ __le16 awun;
+ __le16 awupf;
+ __u8 icsvscc;
+ __u8 nwpc;
+ __le16 acwu;
+ __u8 rsvd534[2];
+ __le32 sgls;
+ __le32 mnan;
+ __u8 rsvd544[224];
+ char subnqn[256];
+ __u8 rsvd1024[768];
+ __le32 ioccsz;
+ __le32 iorcsz;
+ __le16 icdoff;
+ __u8 fcatt;
+ __u8 msdbd;
+ __le16 ofcs;
+ __u8 rsvd1806[242];
+ struct nvme_id_power_state psd[32];
+ __u8 vs[1024];
+};
+
+enum {
+ NVME_CTRL_ONCS_COMPARE = 1 << 0,
+ NVME_CTRL_ONCS_WRITE_UNCORRECTABLE = 1 << 1,
+ NVME_CTRL_ONCS_DSM = 1 << 2,
+ NVME_CTRL_ONCS_WRITE_ZEROES = 1 << 3,
+ NVME_CTRL_ONCS_TIMESTAMP = 1 << 6,
+ NVME_CTRL_VWC_PRESENT = 1 << 0,
+ NVME_CTRL_OACS_SEC_SUPP = 1 << 0,
+ NVME_CTRL_OACS_DIRECTIVES = 1 << 5,
+ NVME_CTRL_OACS_DBBUF_SUPP = 1 << 8,
+ NVME_CTRL_LPA_CMD_EFFECTS_LOG = 1 << 1,
+ NVME_CTRL_CTRATT_128_ID = 1 << 0,
+ NVME_CTRL_CTRATT_NON_OP_PSP = 1 << 1,
+ NVME_CTRL_CTRATT_NVM_SETS = 1 << 2,
+ NVME_CTRL_CTRATT_READ_RECV_LVLS = 1 << 3,
+ NVME_CTRL_CTRATT_ENDURANCE_GROUPS = 1 << 4,
+ NVME_CTRL_CTRATT_PREDICTABLE_LAT = 1 << 5,
+ NVME_CTRL_CTRATT_NAMESPACE_GRANULARITY = 1 << 7,
+ NVME_CTRL_CTRATT_UUID_LIST = 1 << 9,
+};
+
+struct nvme_lbaf {
+ __le16 ms;
+ __u8 ds;
+ __u8 rp;
+};
+
+struct nvme_id_ns {
+ __le64 nsze;
+ __le64 ncap;
+ __le64 nuse;
+ __u8 nsfeat;
+ __u8 nlbaf;
+ __u8 flbas;
+ __u8 mc;
+ __u8 dpc;
+ __u8 dps;
+ __u8 nmic;
+ __u8 rescap;
+ __u8 fpi;
+ __u8 dlfeat;
+ __le16 nawun;
+ __le16 nawupf;
+ __le16 nacwu;
+ __le16 nabsn;
+ __le16 nabo;
+ __le16 nabspf;
+ __le16 noiob;
+ __u8 nvmcap[16];
+ __le16 npwg;
+ __le16 npwa;
+ __le16 npdg;
+ __le16 npda;
+ __le16 nows;
+ __le16 mssrl;
+ __le32 mcl;
+ __u8 msrc;
+ __u8 rsvd81[11];
+ __le32 anagrpid;
+ __u8 rsvd96[3];
+ __u8 nsattr;
+ __le16 nvmsetid;
+ __le16 endgid;
+ __u8 nguid[16];
+ __u8 eui64[8];
+ struct nvme_lbaf lbaf[16];
+ __u8 rsvd192[192];
+ __u8 vs[3712];
+};
+
+struct nvme_id_iocs {
+ __le64 iocs[512];
+};
+
+enum {
+ NVME_ID_CNS_NS = 0x00,
+ NVME_ID_CNS_CTRL = 0x01,
+ NVME_ID_CNS_NS_ACTIVE_LIST = 0x02,
+ NVME_ID_CNS_NS_DESC_LIST = 0x03,
+ NVME_ID_CNS_NVMSET_LIST = 0x04,
+ NVME_ID_CNS_CSI_ID_NS = 0x05,
+ NVME_ID_CNS_CSI_ID_CTRL = 0x06,
+ NVME_ID_CNS_CSI_NS_ACTIVE_LIST = 0x07,
+ NVME_ID_CNS_NS_PRESENT_LIST = 0x10,
+ NVME_ID_CNS_NS_PRESENT = 0x11,
+ NVME_ID_CNS_CTRL_NS_LIST = 0x12,
+ NVME_ID_CNS_CTRL_LIST = 0x13,
+ NVME_ID_CNS_SCNDRY_CTRL_LIST = 0x15,
+ NVME_ID_CNS_NS_GRANULARITY = 0x16,
+ NVME_ID_CNS_UUID_LIST = 0x17,
+ NVME_ID_CNS_CSI_NS_PRESENT_LIST = 0x1a,
+ NVME_ID_CNS_CSI_NS_PRESENT = 0x1b,
+ NVME_ID_CNS_CSI = 0x1c,
+};
+
+enum {
+ NVME_DIR_IDENTIFY = 0x00,
+ NVME_DIR_STREAMS = 0x01,
+ NVME_DIR_SND_ID_OP_ENABLE = 0x01,
+ NVME_DIR_SND_ST_OP_REL_ID = 0x01,
+ NVME_DIR_SND_ST_OP_REL_RSC = 0x02,
+ NVME_DIR_RCV_ID_OP_PARAM = 0x01,
+ NVME_DIR_RCV_ST_OP_PARAM = 0x01,
+ NVME_DIR_RCV_ST_OP_STATUS = 0x02,
+ NVME_DIR_RCV_ST_OP_RESOURCE = 0x03,
+ NVME_DIR_ENDIR = 0x01,
+};
+
+enum {
+ NVME_NS_FEAT_THIN = 1 << 0,
+ NVME_NS_FLBAS_LBA_MASK = 0xf,
+ NVME_NS_FLBAS_META_EXT = 0x10,
+ NVME_LBAF_RP_BEST = 0,
+ NVME_LBAF_RP_BETTER = 1,
+ NVME_LBAF_RP_GOOD = 2,
+ NVME_LBAF_RP_DEGRADED = 3,
+ NVME_NS_DPC_PI_LAST = 1 << 4,
+ NVME_NS_DPC_PI_FIRST = 1 << 3,
+ NVME_NS_DPC_PI_TYPE3 = 1 << 2,
+ NVME_NS_DPC_PI_TYPE2 = 1 << 1,
+ NVME_NS_DPC_PI_TYPE1 = 1 << 0,
+ NVME_NS_DPS_PI_FIRST = 1 << 3,
+ NVME_NS_DPS_PI_MASK = 0x7,
+ NVME_NS_DPS_PI_TYPE1 = 1,
+ NVME_NS_DPS_PI_TYPE2 = 2,
+ NVME_NS_DPS_PI_TYPE3 = 3,
+};
+
+struct nvme_ns_id_desc {
+ __u8 nidt;
+ __u8 nidl;
+ __le16 reserved;
+};
+
+#define NVME_NIDT_EUI64_LEN 8
+#define NVME_NIDT_NGUID_LEN 16
+#define NVME_NIDT_UUID_LEN 16
+#define NVME_NIDT_CSI_LEN 1
+
+enum {
+ NVME_NIDT_EUI64 = 0x01,
+ NVME_NIDT_NGUID = 0x02,
+ NVME_NIDT_UUID = 0x03,
+ NVME_NIDT_CSI = 0x04,
+};
+
+#define NVME_MAX_NVMSET 31
+
+struct nvme_nvmset_attr_entry {
+ __le16 id;
+ __le16 endurance_group_id;
+ __u8 rsvd4[4];
+ __le32 random_4k_read_typical;
+ __le32 opt_write_size;
+ __u8 total_nvmset_cap[16];
+ __u8 unalloc_nvmset_cap[16];
+ __u8 rsvd48[80];
+};
+
+struct nvme_id_nvmset {
+ __u8 nid;
+ __u8 rsvd1[127];
+ struct nvme_nvmset_attr_entry ent[NVME_MAX_NVMSET];
+};
+
+struct nvme_id_ns_granularity_list_entry {
+ __le64 namespace_size_granularity;
+ __le64 namespace_capacity_granularity;
+};
+
+struct nvme_id_ns_granularity_list {
+ __le32 attributes;
+ __u8 num_descriptors;
+ __u8 rsvd[27];
+ struct nvme_id_ns_granularity_list_entry entry[16];
+};
+
+#define NVME_MAX_UUID_ENTRIES 128
+struct nvme_id_uuid_list_entry {
+ __u8 header;
+ __u8 rsvd1[15];
+ __u8 uuid[16];
+};
+
+struct nvme_id_uuid_list {
+ struct nvme_id_uuid_list_entry entry[NVME_MAX_UUID_ENTRIES];
+};
+
+/**
+ * struct nvme_telemetry_log_page_hdr - structure for telemetry log page
+ * @lpi: Log page identifier
+ * @iee_oui: IEEE OUI Identifier
+ * @dalb1: Data area 1 last block
+ * @dalb2: Data area 2 last block
+ * @dalb3: Data area 3 last block
+ * @ctrlavail: Controller initiated data available
+ * @ctrldgn: Controller initiated telemetry Data Generation Number
+ * @rsnident: Reason Identifier
+ * @telemetry_dataarea: Contains telemetry data block
+ *
+ * This structure can be used for both telemetry host-initiated log page
+ * and controller-initiated log page.
+ */
+struct nvme_telemetry_log_page_hdr {
+ __u8 lpi;
+ __u8 rsvd[4];
+ __u8 iee_oui[3];
+ __le16 dalb1;
+ __le16 dalb2;
+ __le16 dalb3;
+ __u8 rsvd1[368];
+ __u8 ctrlavail;
+ __u8 ctrldgn;
+ __u8 rsnident[128];
+ __u8 telemetry_dataarea[0];
+};
+
+struct nvme_endurance_group_log {
+ __u8 critical_warning;
+ __u8 rsvd1[2];
+ __u8 avl_spare;
+ __u8 avl_spare_threshold;
+ __u8 percent_used;
+ __u8 rsvd6[26];
+ __u8 endurance_estimate[16];
+ __u8 data_units_read[16];
+ __u8 data_units_written[16];
+ __u8 media_units_written[16];
+ __u8 host_read_cmds[16];
+ __u8 host_write_cmds[16];
+ __u8 media_data_integrity_err[16];
+ __u8 num_err_info_log_entries[16];
+ __u8 rsvd160[352];
+};
+
+struct nvme_smart_log {
+ __u8 critical_warning;
+ __u8 temperature[2];
+ __u8 avail_spare;
+ __u8 spare_thresh;
+ __u8 percent_used;
+ __u8 endu_grp_crit_warn_sumry;
+ __u8 rsvd7[25];
+ __u8 data_units_read[16];
+ __u8 data_units_written[16];
+ __u8 host_reads[16];
+ __u8 host_writes[16];
+ __u8 ctrl_busy_time[16];
+ __u8 power_cycles[16];
+ __u8 power_on_hours[16];
+ __u8 unsafe_shutdowns[16];
+ __u8 media_errors[16];
+ __u8 num_err_log_entries[16];
+ __le32 warning_temp_time;
+ __le32 critical_comp_time;
+ __le16 temp_sensor[8];
+ __le32 thm_temp1_trans_count;
+ __le32 thm_temp2_trans_count;
+ __le32 thm_temp1_total_time;
+ __le32 thm_temp2_total_time;
+ __u8 rsvd232[280];
+};
+
+struct nvme_self_test_res {
+ __u8 dsts;
+ __u8 seg;
+ __u8 vdi;
+ __u8 rsvd3;
+ __le64 poh;
+ __le32 nsid;
+ __le64 flba;
+ __u8 sct;
+ __u8 sc;
+ __u8 vs[2];
+} __attribute__((packed));
+
+enum {
+ NVME_ST_CODE_SHIFT = 4,
+ NVME_ST_CODE_SHORT_OP = 0x1,
+ NVME_ST_CODE_EXT_OP = 0x2,
+ NVME_ST_CODE_VS = 0xe,
+ NVME_ST_RES_MASK = 0xf,
+ NVME_ST_RES_NO_ERR = 0x0,
+ NVME_ST_RES_ABORTED = 0x1,
+ NVME_ST_RES_CLR = 0x2,
+ NVME_ST_RES_NS_REMOVED = 0x3,
+ NVME_ST_RES_ABORTED_FORMAT = 0x4,
+ NVME_ST_RES_FATAL_ERR = 0x5,
+ NVME_ST_RES_UNKNOWN_SEG_FAIL = 0x6,
+ NVME_ST_RES_KNOWN_SEG_FAIL = 0x7,
+ NVME_ST_RES_ABORTED_UNKNOWN = 0x8,
+ NVME_ST_RES_ABORTED_SANITIZE = 0x9,
+ NVME_ST_RES_NOT_USED = 0xf,
+ NVME_ST_VALID_NSID = 1 << 0,
+ NVME_ST_VALID_FLBA = 1 << 1,
+ NVME_ST_VALID_SCT = 1 << 2,
+ NVME_ST_VALID_SC = 1 << 3,
+ NVME_ST_REPORTS = 20,
+ NVME_ST_LOG_ENTRY_SIZE = 28,
+ NVME_ST_LOG_HEAD_SIZE = 4,
+};
+
+struct nvme_self_test_log {
+ __u8 crnt_dev_selftest_oprn;
+ __u8 crnt_dev_selftest_compln;
+ __u8 rsvd2[2];
+ struct nvme_self_test_res result[20];
+} __attribute__((packed));
+
+struct nvme_fw_slot_info_log {
+ __u8 afi;
+ __u8 rsvd1[7];
+ __le64 frs[7];
+ __u8 rsvd64[448];
+};
+
+struct nvme_lba_status_desc {
+ __u64 dslba;
+ __u32 nlb;
+ __u8 rsvd_12;
+ __u8 status;
+ __u8 rsvd_15_14[2];
+};
+
+struct nvme_lba_status {
+ __u32 nlsd;
+ __u8 cmpc;
+ __u8 rsvd_7_5[3];
+ struct nvme_lba_status_desc descs[0];
+};
+
+/* NVMe Namespace Write Protect State */
+enum {
+ NVME_NS_NO_WRITE_PROTECT = 0,
+ NVME_NS_WRITE_PROTECT,
+ NVME_NS_WRITE_PROTECT_POWER_CYCLE,
+ NVME_NS_WRITE_PROTECT_PERMANENT,
+};
+
+#define NVME_MAX_CHANGED_NAMESPACES 1024
+
+struct nvme_changed_ns_list_log {
+ __le32 log[NVME_MAX_CHANGED_NAMESPACES];
+};
+
+enum {
+ NVME_CMD_EFFECTS_CSUPP = 1 << 0,
+ NVME_CMD_EFFECTS_LBCC = 1 << 1,
+ NVME_CMD_EFFECTS_NCC = 1 << 2,
+ NVME_CMD_EFFECTS_NIC = 1 << 3,
+ NVME_CMD_EFFECTS_CCC = 1 << 4,
+ NVME_CMD_EFFECTS_CSE_MASK = 3 << 16,
+ NVME_CMD_EFFECTS_UUID_SEL = 1 << 19,
+};
+
+struct nvme_effects_log {
+ __le32 acs[256];
+ __le32 iocs[256];
+ __u8 resv[2048];
+};
+
+enum nvme_ana_state {
+ NVME_ANA_OPTIMIZED = 0x01,
+ NVME_ANA_NONOPTIMIZED = 0x02,
+ NVME_ANA_INACCESSIBLE = 0x03,
+ NVME_ANA_PERSISTENT_LOSS = 0x04,
+ NVME_ANA_CHANGE = 0x0f,
+};
+
+struct nvme_ana_group_desc {
+ __le32 grpid;
+ __le32 nnsids;
+ __le64 chgcnt;
+ __u8 state;
+ __u8 rsvd17[15];
+ __le32 nsids[];
+};
+
+/* flag for the log specific field of the ANA log */
+#define NVME_ANA_LOG_RGO (1 << 0)
+
+struct nvme_ana_rsp_hdr {
+ __le64 chgcnt;
+ __le16 ngrps;
+ __le16 rsvd10[3];
+};
+
+/* persistent event type 02h */
+struct nvme_fw_commit_event {
+ __le64 old_fw_rev;
+ __le64 new_fw_rev;
+ __u8 fw_commit_action;
+ __u8 fw_slot;
+ __u8 sct_fw;
+ __u8 sc_fw;
+ __le16 vndr_assign_fw_commit_rc;
+} __attribute__((packed));
+
+/* persistent event type 03h */
+struct nvme_time_stamp_change_event {
+ __le64 previous_timestamp;
+ __le64 ml_secs_since_reset;
+};
+
+/* persistent event type 04h */
+struct nvme_power_on_reset_info_list {
+ __le16 cid;
+ __u8 fw_act;
+ __u8 op_in_prog;
+ __u8 rsvd4[12];
+ __le32 ctrl_power_cycle;
+ __le64 power_on_ml_seconds;
+ __le64 ctrl_time_stamp;
+} __attribute__((packed));
+
+/* persistent event type 05h */
+struct nvme_nss_hw_err_event {
+ __le16 nss_hw_err_event_code;
+ __u8 rsvd2[2];
+ __u8 *add_hw_err_info;
+};
+
+/* persistent event type 06h */
+struct nvme_change_ns_event {
+ __le32 nsmgt_cdw10;
+ __u8 rsvd4[4];
+ __le64 nsze;
+ __u8 rsvd16[8];
+ __le64 nscap;
+ __u8 flbas;
+ __u8 dps;
+ __u8 nmic;
+ __u8 rsvd35;
+ __le32 ana_grp_id;
+ __le16 nvmset_id;
+ __le16 rsvd42;
+ __le32 nsid;
+};
+
+/* persistent event type 07h */
+struct nvme_format_nvm_start_event {
+ __le32 nsid;
+ __u8 fna;
+ __u8 rsvd5[3];
+ __le32 format_nvm_cdw10;
+};
+
+/* persistent event type 08h */
+struct nvme_format_nvm_compln_event {
+ __le32 nsid;
+ __u8 smallest_fpi;
+ __u8 format_nvm_status;
+ __le16 compln_info;
+ __le32 status_field;
+};
+
+/* persistent event type 09h */
+struct nvme_sanitize_start_event {
+ __le32 sani_cap;
+ __le32 sani_cdw10;
+ __le32 sani_cdw11;
+};
+
+/* persistent event type 0Ah */
+struct nvme_sanitize_compln_event {
+ __le16 sani_prog;
+ __le16 sani_status;
+ __le16 cmpln_info;
+ __u8 rsvd6[2];
+};
+
+/* persistent event type 0Dh */
+struct nvme_thermal_exc_event {
+ __u8 over_temp;
+ __u8 threshold;
+};
+
+/* persistent event entry head */
+struct nvme_persistent_event_entry_head {
+ __u8 etype;
+ __u8 etype_rev;
+ __u8 ehl;
+ __u8 rsvd3;
+ __le16 ctrl_id;
+ __le64 etimestamp;
+ __u8 rsvd14[6];
+ __le16 vsil;
+ __le16 el;
+} __attribute__((packed));
+
+/* persistent event log head */
+struct nvme_persistent_event_log_head {
+ __u8 log_id;
+ __u8 rsvd1[3];
+ __le32 tnev;
+ __le64 tll;
+ __u8 log_rev;
+ __u8 rsvd17;
+ __le16 head_len;
+ __le64 timestamp;
+ __u8 poh[16];
+ __le64 pcc;
+ __le16 vid;
+ __le16 ssvid;
+ __u8 sn[20];
+ __u8 mn[40];
+ __u8 subnqn[256];
+ __u8 rsvd372[108];
+ __u8 supp_event_bm[32];
+} __attribute__((packed));
+
+enum nvme_persistent_event_types {
+ NVME_SMART_HEALTH_EVENT = 0x01,
+ NVME_FW_COMMIT_EVENT = 0x02,
+ NVME_TIMESTAMP_EVENT = 0x03,
+ NVME_POWER_ON_RESET_EVENT = 0x04,
+ NVME_NSS_HW_ERROR_EVENT = 0x05,
+ NVME_CHANGE_NS_EVENT = 0x06,
+ NVME_FORMAT_START_EVENT = 0x07,
+ NVME_FORMAT_COMPLETION_EVENT = 0x08,
+ NVME_SANITIZE_START_EVENT = 0x09,
+ NVME_SANITIZE_COMPLETION_EVENT = 0x0a,
+ NVME_THERMAL_EXCURSION_EVENT = 0x0d
+};
+
+enum nvme_persistent_event_log_actions {
+ NVME_PEVENT_LOG_READ = 0x0,
+ NVME_PEVENT_LOG_EST_CTX_AND_READ = 0x1,
+ NVME_PEVENT_LOG_RELEASE_CTX = 0x2,
+};
+
+/**
+ * struct nvme_event_agg_log_page - is common for both
+ * predictable latency event aggregate log and endurance
+ * group event aggregate log
+ * @num_entries: indicates the number of entries in the list.
+ * @entries: indicates NVMSET ID or ENDURANCE Group ID entries
+ */
+struct nvme_event_agg_log_page {
+ __le64 num_entries;
+ __le16 entries[];
+};
+
+struct nvme_predlat_per_nvmset_log_page {
+ __u8 status;
+ __u8 rsvd1;
+ __le16 event_type;
+ __u8 rsvd4[28];
+ __le64 dtwin_rtyp;
+ __le64 dtwin_wtyp;
+ __le64 dtwin_timemax;
+ __le64 ndwin_timemin_high;
+ __le64 ndwin_timemin_low;
+ __u8 rsvd72[56];
+ __le64 dtwin_restimate;
+ __le64 dtwin_westimate;
+ __le64 dtwin_testimate;
+ __u8 rsvd152[360];
+};
+
+struct nvme_lba_status_range_desc {
+ __le64 rslba;
+ __le32 rnlb;
+ __u8 rsvd12[4];
+};
+
+struct nvme_lba_status_ns_element {
+ __le32 neid;
+ __le32 nlrd;
+ __u8 ratype;
+ __u8 rsvd9[7];
+};
+
+struct nvme_lba_status_hdr {
+ __le32 lslplen;
+ __le32 nlslne;
+ __le32 estulb;
+ __u8 rsvd12[2];
+ __le16 lsgc;
+};
+
+struct nvme_resv_notif_log {
+ __le64 log_page_count;
+ __u8 resv_notif_log_type;
+ __u8 num_logs;
+ __u8 rsvd10[2];
+ __le32 nsid;
+ __u8 rsvd16[48];
+};
+
+enum {
+ NVME_SMART_CRIT_SPARE = 1 << 0,
+ NVME_SMART_CRIT_TEMPERATURE = 1 << 1,
+ NVME_SMART_CRIT_RELIABILITY = 1 << 2,
+ NVME_SMART_CRIT_MEDIA = 1 << 3,
+ NVME_SMART_CRIT_VOLATILE_MEMORY = 1 << 4,
+};
+
+enum {
+ NVME_AER_ERROR = 0,
+ NVME_AER_SMART = 1,
+ NVME_AER_CSS = 6,
+ NVME_AER_VS = 7,
+};
+
+struct nvme_lba_range_type {
+ __u8 type;
+ __u8 attributes;
+ __u8 rsvd2[14];
+ __u64 slba;
+ __u64 nlb;
+ __u8 guid[16];
+ __u8 rsvd48[16];
+};
+
+enum {
+ NVME_LBART_TYPE_FS = 0x01,
+ NVME_LBART_TYPE_RAID = 0x02,
+ NVME_LBART_TYPE_CACHE = 0x03,
+ NVME_LBART_TYPE_SWAP = 0x04,
+
+ NVME_LBART_ATTRIB_TEMP = 1 << 0,
+ NVME_LBART_ATTRIB_HIDE = 1 << 1,
+};
+
+/* Predictable Latency Mode - Deterministic Threshold Configuration Data */
+struct nvme_plm_config {
+ __le16 enable_event;
+ __u8 rsvd2[30];
+ __le64 dtwin_reads_thresh;
+ __le64 dtwin_writes_thresh;
+ __le64 dtwin_time_thresh;
+ __u8 rsvd56[456];
+};
+
+struct nvme_reservation_status {
+ __le32 gen;
+ __u8 rtype;
+ __u8 regctl[2];
+ __u8 resv5[2];
+ __u8 ptpls;
+ __u8 resv10[13];
+ struct {
+ __le16 cntlid;
+ __u8 rcsts;
+ __u8 resv3[5];
+ __le64 hostid;
+ __le64 rkey;
+ } regctl_ds[];
+};
+
+struct nvme_reservation_status_ext {
+ __le32 gen;
+ __u8 rtype;
+ __u8 regctl[2];
+ __u8 resv5[2];
+ __u8 ptpls;
+ __u8 resv10[14];
+ __u8 resv24[40];
+ struct {
+ __le16 cntlid;
+ __u8 rcsts;
+ __u8 resv3[5];
+ __le64 rkey;
+ __u8 hostid[16];
+ __u8 resv32[32];
+ } regctl_eds[];
+};
+
+enum nvme_async_event_type {
+ NVME_AER_TYPE_ERROR = 0,
+ NVME_AER_TYPE_SMART = 1,
+ NVME_AER_TYPE_NOTICE = 2,
+};
+
+/* I/O commands */
+
+enum nvme_opcode {
+ nvme_cmd_flush = 0x00,
+ nvme_cmd_write = 0x01,
+ nvme_cmd_read = 0x02,
+ nvme_cmd_write_uncor = 0x04,
+ nvme_cmd_compare = 0x05,
+ nvme_cmd_write_zeroes = 0x08,
+ nvme_cmd_dsm = 0x09,
+ nvme_cmd_verify = 0x0c,
+ nvme_cmd_resv_register = 0x0d,
+ nvme_cmd_resv_report = 0x0e,
+ nvme_cmd_resv_acquire = 0x11,
+ nvme_cmd_resv_release = 0x15,
+ nvme_cmd_copy = 0x19,
+ nvme_zns_cmd_mgmt_send = 0x79,
+ nvme_zns_cmd_mgmt_recv = 0x7a,
+ nvme_zns_cmd_append = 0x7d,
+};
+
+/*
+ * Descriptor subtype - lower 4 bits of nvme_(keyed_)sgl_desc identifier
+ *
+ * @NVME_SGL_FMT_ADDRESS: absolute address of the data block
+ * @NVME_SGL_FMT_OFFSET: relative offset of the in-capsule data block
+ * @NVME_SGL_FMT_TRANSPORT_A: transport defined format, value 0xA
+ * @NVME_SGL_FMT_INVALIDATE: RDMA transport specific remote invalidation
+ * request subtype
+ */
+enum {
+ NVME_SGL_FMT_ADDRESS = 0x00,
+ NVME_SGL_FMT_OFFSET = 0x01,
+ NVME_SGL_FMT_TRANSPORT_A = 0x0A,
+ NVME_SGL_FMT_INVALIDATE = 0x0f,
+};
+
+/*
+ * Descriptor type - upper 4 bits of nvme_(keyed_)sgl_desc identifier
+ *
+ * For struct nvme_sgl_desc:
+ * @NVME_SGL_FMT_DATA_DESC: data block descriptor
+ * @NVME_SGL_FMT_SEG_DESC: sgl segment descriptor
+ * @NVME_SGL_FMT_LAST_SEG_DESC: last sgl segment descriptor
+ *
+ * For struct nvme_keyed_sgl_desc:
+ * @NVME_KEY_SGL_FMT_DATA_DESC: keyed data block descriptor
+ *
+ * Transport-specific SGL types:
+ * @NVME_TRANSPORT_SGL_DATA_DESC: Transport SGL data dlock descriptor
+ */
+enum {
+ NVME_SGL_FMT_DATA_DESC = 0x00,
+ NVME_SGL_FMT_SEG_DESC = 0x02,
+ NVME_SGL_FMT_LAST_SEG_DESC = 0x03,
+ NVME_KEY_SGL_FMT_DATA_DESC = 0x04,
+ NVME_TRANSPORT_SGL_DATA_DESC = 0x05,
+};
+
+struct nvme_sgl_desc {
+ __le64 addr;
+ __le32 length;
+ __u8 rsvd[3];
+ __u8 type;
+};
+
+struct nvme_keyed_sgl_desc {
+ __le64 addr;
+ __u8 length[3];
+ __u8 key[4];
+ __u8 type;
+};
+
+union nvme_data_ptr {
+ struct {
+ __le64 prp1;
+ __le64 prp2;
+ };
+ struct nvme_sgl_desc sgl;
+ struct nvme_keyed_sgl_desc ksgl;
+};
+
+/*
+ * Lowest two bits of our flags field (FUSE field in the spec):
+ *
+ * @NVME_CMD_FUSE_FIRST: Fused Operation, first command
+ * @NVME_CMD_FUSE_SECOND: Fused Operation, second command
+ *
+ * Highest two bits in our flags field (PSDT field in the spec):
+ *
+ * @NVME_CMD_PSDT_SGL_METABUF: Use SGLS for this transfer,
+ * If used, MPTR contains addr of single physical buffer (byte aligned).
+ * @NVME_CMD_PSDT_SGL_METASEG: Use SGLS for this transfer,
+ * If used, MPTR contains an address of an SGL segment containing
+ * exactly 1 SGL descriptor (qword aligned).
+ */
+enum {
+ NVME_CMD_FUSE_FIRST = (1 << 0),
+ NVME_CMD_FUSE_SECOND = (1 << 1),
+
+ NVME_CMD_SGL_METABUF = (1 << 6),
+ NVME_CMD_SGL_METASEG = (1 << 7),
+ NVME_CMD_SGL_ALL = NVME_CMD_SGL_METABUF | NVME_CMD_SGL_METASEG,
+};
+
+enum {
+ NVME_RW_LR = 1 << 15,
+ NVME_RW_FUA = 1 << 14,
+ NVME_RW_DEAC = 1 << 9,
+ NVME_RW_DSM_FREQ_UNSPEC = 0,
+ NVME_RW_DSM_FREQ_TYPICAL = 1,
+ NVME_RW_DSM_FREQ_RARE = 2,
+ NVME_RW_DSM_FREQ_READS = 3,
+ NVME_RW_DSM_FREQ_WRITES = 4,
+ NVME_RW_DSM_FREQ_RW = 5,
+ NVME_RW_DSM_FREQ_ONCE = 6,
+ NVME_RW_DSM_FREQ_PREFETCH = 7,
+ NVME_RW_DSM_FREQ_TEMP = 8,
+ NVME_RW_DSM_LATENCY_NONE = 0 << 4,
+ NVME_RW_DSM_LATENCY_IDLE = 1 << 4,
+ NVME_RW_DSM_LATENCY_NORM = 2 << 4,
+ NVME_RW_DSM_LATENCY_LOW = 3 << 4,
+ NVME_RW_DSM_SEQ_REQ = 1 << 6,
+ NVME_RW_DSM_COMPRESSED = 1 << 7,
+ NVME_RW_PIREMAP = 1 << 9,
+ NVME_RW_PRINFO_PRCHK_REF = 1 << 10,
+ NVME_RW_PRINFO_PRCHK_APP = 1 << 11,
+ NVME_RW_PRINFO_PRCHK_GUARD = 1 << 12,
+ NVME_RW_PRINFO_PRACT = 1 << 13,
+ NVME_RW_DTYPE_STREAMS = 1 << 4,
+};
+
+enum {
+ NVME_DSMGMT_IDR = 1 << 0,
+ NVME_DSMGMT_IDW = 1 << 1,
+ NVME_DSMGMT_AD = 1 << 2,
+};
+
+#define NVME_DSM_MAX_RANGES 256
+
+struct nvme_dsm_range {
+ __le32 cattr;
+ __le32 nlb;
+ __le64 slba;
+};
+
+struct nvme_copy_range {
+ __u8 rsvd0[8];
+ __le64 slba;
+ __le16 nlb;
+ __u8 rsvd18[6];
+ __le32 eilbrt;
+ __le16 elbatm;
+ __le16 elbat;
+};
+
+/* Features */
+struct nvme_feat_auto_pst {
+ __le64 entries[32];
+};
+
+enum {
+ NVME_HOST_MEM_ENABLE = (1 << 0),
+ NVME_HOST_MEM_RETURN = (1 << 1),
+};
+
+/* Admin commands */
+
+enum nvme_admin_opcode {
+ nvme_admin_delete_sq = 0x00,
+ nvme_admin_create_sq = 0x01,
+ nvme_admin_get_log_page = 0x02,
+ nvme_admin_delete_cq = 0x04,
+ nvme_admin_create_cq = 0x05,
+ nvme_admin_identify = 0x06,
+ nvme_admin_abort_cmd = 0x08,
+ nvme_admin_set_features = 0x09,
+ nvme_admin_get_features = 0x0a,
+ nvme_admin_async_event = 0x0c,
+ nvme_admin_ns_mgmt = 0x0d,
+ nvme_admin_activate_fw = 0x10,
+ nvme_admin_download_fw = 0x11,
+ nvme_admin_dev_self_test = 0x14,
+ nvme_admin_ns_attach = 0x15,
+ nvme_admin_keep_alive = 0x18,
+ nvme_admin_directive_send = 0x19,
+ nvme_admin_directive_recv = 0x1a,
+ nvme_admin_virtual_mgmt = 0x1c,
+ nvme_admin_nvme_mi_send = 0x1d,
+ nvme_admin_nvme_mi_recv = 0x1e,
+ nvme_admin_dbbuf = 0x7C,
+ nvme_admin_format_nvm = 0x80,
+ nvme_admin_security_send = 0x81,
+ nvme_admin_security_recv = 0x82,
+ nvme_admin_sanitize_nvm = 0x84,
+ nvme_admin_get_lba_status = 0x86,
+};
+
+enum {
+ NVME_QUEUE_PHYS_CONTIG = (1 << 0),
+ NVME_CQ_IRQ_ENABLED = (1 << 1),
+ NVME_SQ_PRIO_URGENT = (0 << 1),
+ NVME_SQ_PRIO_HIGH = (1 << 1),
+ NVME_SQ_PRIO_MEDIUM = (2 << 1),
+ NVME_SQ_PRIO_LOW = (3 << 1),
+ NVME_LOG_ERROR = 0x01,
+ NVME_LOG_SMART = 0x02,
+ NVME_LOG_FW_SLOT = 0x03,
+ NVME_LOG_CHANGED_NS = 0x04,
+ NVME_LOG_CMD_EFFECTS = 0x05,
+ NVME_LOG_DEVICE_SELF_TEST = 0x06,
+ NVME_LOG_TELEMETRY_HOST = 0x07,
+ NVME_LOG_TELEMETRY_CTRL = 0x08,
+ NVME_LOG_ENDURANCE_GROUP = 0x09,
+ NVME_LOG_PRELAT_PER_NVMSET = 0x0a,
+ NVME_LOG_ANA = 0x0c,
+ NVME_LOG_PRELAT_EVENT_AGG = 0x0b,
+ NVME_LOG_PERSISTENT_EVENT = 0x0d,
+ NVME_LOG_LBA_STATUS = 0x0e,
+ NVME_LOG_ENDURANCE_GROUP_EVENT_AGG = 0x0f,
+ NVME_LOG_DISC = 0x70,
+ NVME_LOG_RESERVATION = 0x80,
+ NVME_LOG_SANITIZE = 0x81,
+ NVME_LOG_ZONE_CHANGED_LIST = 0xbf,
+ NVME_FWACT_REPL = (0 << 3),
+ NVME_FWACT_REPL_ACTV = (1 << 3),
+ NVME_FWACT_ACTV = (2 << 3),
+};
+
+enum nvme_feat {
+ NVME_FEAT_NONE = 0x0,
+ NVME_FEAT_ARBITRATION = 0x01,
+ NVME_FEAT_POWER_MGMT = 0x02,
+ NVME_FEAT_LBA_RANGE = 0x03,
+ NVME_FEAT_TEMP_THRESH = 0x04,
+ NVME_FEAT_ERR_RECOVERY = 0x05,
+ NVME_FEAT_VOLATILE_WC = 0x06,
+ NVME_FEAT_NUM_QUEUES = 0x07,
+ NVME_FEAT_IRQ_COALESCE = 0x08,
+ NVME_FEAT_IRQ_CONFIG = 0x09,
+ NVME_FEAT_WRITE_ATOMIC = 0x0a,
+ NVME_FEAT_ASYNC_EVENT = 0x0b,
+ NVME_FEAT_AUTO_PST = 0x0c,
+ NVME_FEAT_HOST_MEM_BUF = 0x0d,
+ NVME_FEAT_TIMESTAMP = 0x0e,
+ NVME_FEAT_KATO = 0x0f,
+ NVME_FEAT_HCTM = 0X10,
+ NVME_FEAT_NOPSC = 0X11,
+ NVME_FEAT_RRL = 0x12,
+ NVME_FEAT_PLM_CONFIG = 0x13,
+ NVME_FEAT_PLM_WINDOW = 0x14,
+ NVME_LBA_STATUS_INFO = 0x15,
+ NVME_FEAT_HOST_BEHAVIOR = 0x16,
+ NVME_FEAT_SANITIZE = 0x17,
+ NVME_FEAT_ENDURANCE = 0x18,
+ NVME_FEAT_IOCS_PROFILE = 0x19,
+ NVME_FEAT_SW_PROGRESS = 0x80,
+ NVME_FEAT_HOST_ID = 0x81,
+ NVME_FEAT_RESV_MASK = 0x82,
+ NVME_FEAT_RESV_PERSIST = 0x83,
+ NVME_FEAT_WRITE_PROTECT = 0x84,
+} __attribute__ ((__packed__));
+
+enum {
+ NVME_NO_LOG_LSP = 0x0,
+ NVME_NO_LOG_LPO = 0x0,
+ NVME_LOG_ANA_LSP_RGO = 0x1,
+ NVME_TELEM_LSP_CREATE = 0x1,
+};
+
+/* Sanitize and Sanitize Monitor/Log */
+enum {
+ /* Sanitize */
+ NVME_SANITIZE_NO_DEALLOC = 0x00000200,
+ NVME_SANITIZE_OIPBP = 0x00000100,
+ NVME_SANITIZE_OWPASS_SHIFT = 0x00000004,
+ NVME_SANITIZE_AUSE = 0x00000008,
+ NVME_SANITIZE_ACT_CRYPTO_ERASE = 0x00000004,
+ NVME_SANITIZE_ACT_OVERWRITE = 0x00000003,
+ NVME_SANITIZE_ACT_BLOCK_ERASE = 0x00000002,
+ NVME_SANITIZE_ACT_EXIT = 0x00000001,
+
+ /* Sanitize Monitor/Log */
+ NVME_SANITIZE_LOG_DATA_LEN = 0x0014,
+ NVME_SANITIZE_LOG_GLOBAL_DATA_ERASED = 0x0100,
+ NVME_SANITIZE_LOG_NUM_CMPLTED_PASS_MASK = 0x00F8,
+ NVME_SANITIZE_LOG_STATUS_MASK = 0x0007,
+ NVME_SANITIZE_LOG_NEVER_SANITIZED = 0x0000,
+ NVME_SANITIZE_LOG_COMPLETED_SUCCESS = 0x0001,
+ NVME_SANITIZE_LOG_IN_PROGESS = 0x0002,
+ NVME_SANITIZE_LOG_COMPLETED_FAILED = 0x0003,
+ NVME_SANITIZE_LOG_ND_COMPLETED_SUCCESS = 0x0004,
+};
+
+#define NVME_IDENTIFY_DATA_SIZE 4096
+
+struct nvme_host_mem_buf_desc {
+ __le64 addr;
+ __le32 size;
+ __u32 rsvd;
+};
+
+/* Sanitize Log Page */
+struct nvme_sanitize_log_page {
+ __le16 progress;
+ __le16 status;
+ __le32 cdw10_info;
+ __le32 est_ovrwrt_time;
+ __le32 est_blk_erase_time;
+ __le32 est_crypto_erase_time;
+ __le32 est_ovrwrt_time_with_no_deallocate;
+ __le32 est_blk_erase_time_with_no_deallocate;
+ __le32 est_crypto_erase_time_with_no_deallocate;
+ __u8 rsvd32[480];
+};
+
+/*
+ * Fabrics subcommands.
+ */
+enum nvmf_fabrics_opcode {
+ nvme_fabrics_command = 0x7f,
+};
+
+enum nvmf_capsule_command {
+ nvme_fabrics_type_property_set = 0x00,
+ nvme_fabrics_type_connect = 0x01,
+ nvme_fabrics_type_property_get = 0x04,
+};
+
+/*
+ * The legal cntlid range a NVMe Target will provide.
+ * Note that cntlid of value 0 is considered illegal in the fabrics world.
+ * Devices based on earlier specs did not have the subsystem concept;
+ * therefore, those devices had their cntlid value set to 0 as a result.
+ */
+#define NVME_CNTLID_MIN 1
+#define NVME_CNTLID_MAX 0xffef
+#define NVME_CNTLID_DYNAMIC 0xffff
+
+#define MAX_DISC_LOGS 255
+
+/* Discovery log page entry */
+struct nvmf_disc_rsp_page_entry {
+ __u8 trtype;
+ __u8 adrfam;
+ __u8 subtype;
+ __u8 treq;
+ __le16 portid;
+ __le16 cntlid;
+ __le16 asqsz;
+ __u8 resv8[22];
+ char trsvcid[NVMF_TRSVCID_SIZE];
+ __u8 resv64[192];
+ char subnqn[NVMF_NQN_FIELD_LEN];
+ char traddr[NVMF_TRADDR_SIZE];
+ union tsas {
+ char common[NVMF_TSAS_SIZE];
+ struct rdma {
+ __u8 qptype;
+ __u8 prtype;
+ __u8 cms;
+ __u8 resv3[5];
+ __u16 pkey;
+ __u8 resv10[246];
+ } rdma;
+ struct tcp {
+ __u8 sectype;
+ } tcp;
+ } tsas;
+};
+
+/* Discovery log page header */
+struct nvmf_disc_rsp_page_hdr {
+ __le64 genctr;
+ __le64 numrec;
+ __le16 recfmt;
+ __u8 resv14[1006];
+ struct nvmf_disc_rsp_page_entry entries[0];
+};
+
+struct nvmf_connect_data {
+ uuid_t hostid;
+ __le16 cntlid;
+ char resv4[238];
+ char subsysnqn[NVMF_NQN_FIELD_LEN];
+ char hostnqn[NVMF_NQN_FIELD_LEN];
+ char resv5[256];
+};
+
+struct streams_directive_params {
+ __le16 msl;
+ __le16 nssa;
+ __le16 nsso;
+ __u8 rsvd[10];
+ __le32 sws;
+ __le16 sgs;
+ __le16 nsa;
+ __le16 nso;
+ __u8 rsvd2[6];
+};
+
+struct nvme_effects_log_page {
+ __le32 acs[256];
+ __le32 iocs[256];
+ __u8 resv[2048];
+};
+
+struct nvme_error_log_page {
+ __le64 error_count;
+ __le16 sqid;
+ __le16 cmdid;
+ __le16 status_field;
+ __le16 parm_error_location;
+ __le64 lba;
+ __le32 nsid;
+ __u8 vs;
+ __u8 trtype;
+ __u8 resv[2];
+ __le64 cs;
+ __le16 trtype_spec_info;
+ __u8 resv2[22];
+};
+
+struct nvme_firmware_log_page {
+ __u8 afi;
+ __u8 resv[7];
+ __u64 frs[7];
+ __u8 resv2[448];
+};
+
+struct nvme_host_mem_buffer {
+ __u32 hsize;
+ __u32 hmdlal;
+ __u32 hmdlau;
+ __u32 hmdlec;
+ __u8 rsvd16[4080];
+};
+
+struct nvme_auto_pst {
+ __u32 data;
+ __u32 rsvd32;
+};
+
+struct nvme_timestamp {
+ __u8 timestamp[6];
+ __u8 attr;
+ __u8 rsvd;
+};
+
+struct nvme_controller_list {
+ __le16 num;
+ __le16 identifier[2047];
+};
+
+struct nvme_secondary_controller_entry {
+ __le16 scid; /* Secondary Controller Identifier */
+ __le16 pcid; /* Primary Controller Identifier */
+ __u8 scs; /* Secondary Controller State */
+ __u8 rsvd5[3];
+ __le16 vfn; /* Virtual Function Number */
+ __le16 nvq; /* Number of VQ Flexible Resources Assigned */
+ __le16 nvi; /* Number of VI Flexible Resources Assigned */
+ __u8 rsvd14[18];
+};
+
+struct nvme_secondary_controllers_list {
+ __u8 num;
+ __u8 rsvd[31];
+ struct nvme_secondary_controller_entry sc_entry[127];
+};
+
+struct nvme_bar_cap {
+ __u16 mqes;
+ __u8 ams_cqr;
+ __u8 to;
+ __u16 bps_css_nssrs_dstrd;
+ __u8 mpsmax_mpsmin;
+ __u8 rsvd_cmbs_pmrs;
+};
+
+/*
+ * is_64bit_reg - It checks whether given offset of the controller register is
+ * 64bit or not.
+ * @offset: offset of controller register field in bytes
+ *
+ * It gives true if given offset is 64bit register, otherwise it returns false.
+ *
+ * Notes: This function does not care about transport so that the offset is
+ * not going to be checked inside of this function for the unsupported fields
+ * in a specific transport. For example, BPMBL(Boot Partition Memory Buffer
+ * Location) register is not supported by fabrics, but it can be chcked here.
+ */
+static inline bool is_64bit_reg(__u32 offset)
+{
+ if (offset == NVME_REG_CAP ||
+ offset == NVME_REG_ASQ ||
+ offset == NVME_REG_ACQ ||
+ offset == NVME_REG_BPMBL)
+ return true;
+
+ return false;
+}
+
+enum {
+ NVME_SCT_GENERIC = 0x0,
+ NVME_SCT_CMD_SPECIFIC = 0x1,
+ NVME_SCT_MEDIA = 0x2,
+ NVME_SCT_PATH = 0x3,
+};
+
+enum {
+ /*
+ * Generic Command Status:
+ */
+ NVME_SC_SUCCESS = 0x0,
+ NVME_SC_INVALID_OPCODE = 0x1,
+ NVME_SC_INVALID_FIELD = 0x2,
+ NVME_SC_CMDID_CONFLICT = 0x3,
+ NVME_SC_DATA_XFER_ERROR = 0x4,
+ NVME_SC_POWER_LOSS = 0x5,
+ NVME_SC_INTERNAL = 0x6,
+ NVME_SC_ABORT_REQ = 0x7,
+ NVME_SC_ABORT_QUEUE = 0x8,
+ NVME_SC_FUSED_FAIL = 0x9,
+ NVME_SC_FUSED_MISSING = 0xa,
+ NVME_SC_INVALID_NS = 0xb,
+ NVME_SC_CMD_SEQ_ERROR = 0xc,
+ NVME_SC_SGL_INVALID_LAST = 0xd,
+ NVME_SC_SGL_INVALID_COUNT = 0xe,
+ NVME_SC_SGL_INVALID_DATA = 0xf,
+ NVME_SC_SGL_INVALID_METADATA = 0x10,
+ NVME_SC_SGL_INVALID_TYPE = 0x11,
+ NVME_SC_CMB_INVALID_USE = 0x12,
+ NVME_SC_PRP_INVALID_OFFSET = 0x13,
+ NVME_SC_ATOMIC_WRITE_UNIT_EXCEEDED= 0x14,
+ NVME_SC_OPERATION_DENIED = 0x15,
+ NVME_SC_SGL_INVALID_OFFSET = 0x16,
+
+ NVME_SC_INCONSISTENT_HOST_ID= 0x18,
+ NVME_SC_KEEP_ALIVE_EXPIRED = 0x19,
+ NVME_SC_KEEP_ALIVE_INVALID = 0x1A,
+ NVME_SC_PREEMPT_ABORT = 0x1B,
+ NVME_SC_SANITIZE_FAILED = 0x1C,
+ NVME_SC_SANITIZE_IN_PROGRESS = 0x1D,
+
+ NVME_SC_NS_WRITE_PROTECTED = 0x20,
+ NVME_SC_CMD_INTERRUPTED = 0x21,
+ NVME_SC_TRANSIENT_TRANSPORT = 0x22,
+
+ NVME_SC_LBA_RANGE = 0x80,
+ NVME_SC_CAP_EXCEEDED = 0x81,
+ NVME_SC_NS_NOT_READY = 0x82,
+ NVME_SC_RESERVATION_CONFLICT = 0x83,
+ NVME_SC_FORMAT_IN_PROGRESS = 0x84,
+
+ /*
+ * Command Specific Status:
+ */
+ NVME_SC_CQ_INVALID = 0x100,
+ NVME_SC_QID_INVALID = 0x101,
+ NVME_SC_QUEUE_SIZE = 0x102,
+ NVME_SC_ABORT_LIMIT = 0x103,
+ NVME_SC_ABORT_MISSING = 0x104,
+ NVME_SC_ASYNC_LIMIT = 0x105,
+ NVME_SC_FIRMWARE_SLOT = 0x106,
+ NVME_SC_FIRMWARE_IMAGE = 0x107,
+ NVME_SC_INVALID_VECTOR = 0x108,
+ NVME_SC_INVALID_LOG_PAGE = 0x109,
+ NVME_SC_INVALID_FORMAT = 0x10a,
+ NVME_SC_FW_NEEDS_CONV_RESET = 0x10b,
+ NVME_SC_INVALID_QUEUE = 0x10c,
+ NVME_SC_FEATURE_NOT_SAVEABLE = 0x10d,
+ NVME_SC_FEATURE_NOT_CHANGEABLE = 0x10e,
+ NVME_SC_FEATURE_NOT_PER_NS = 0x10f,
+ NVME_SC_FW_NEEDS_SUBSYS_RESET = 0x110,
+ NVME_SC_FW_NEEDS_RESET = 0x111,
+ NVME_SC_FW_NEEDS_MAX_TIME = 0x112,
+ NVME_SC_FW_ACTIVATE_PROHIBITED = 0x113,
+ NVME_SC_OVERLAPPING_RANGE = 0x114,
+ NVME_SC_NS_INSUFFICIENT_CAP = 0x115,
+ NVME_SC_NS_ID_UNAVAILABLE = 0x116,
+ NVME_SC_NS_ALREADY_ATTACHED = 0x118,
+ NVME_SC_NS_IS_PRIVATE = 0x119,
+ NVME_SC_NS_NOT_ATTACHED = 0x11a,
+ NVME_SC_THIN_PROV_NOT_SUPP = 0x11b,
+ NVME_SC_CTRL_LIST_INVALID = 0x11c,
+ NVME_SC_DEVICE_SELF_TEST_IN_PROGRESS= 0x11d,
+ NVME_SC_BP_WRITE_PROHIBITED = 0x11e,
+ NVME_SC_INVALID_CTRL_ID = 0x11f,
+ NVME_SC_INVALID_SECONDARY_CTRL_STATE= 0x120,
+ NVME_SC_INVALID_NUM_CTRL_RESOURCE = 0x121,
+ NVME_SC_INVALID_RESOURCE_ID = 0x122,
+ NVME_SC_PMR_SAN_PROHIBITED = 0x123,
+ NVME_SC_ANA_INVALID_GROUP_ID= 0x124,
+ NVME_SC_ANA_ATTACH_FAIL = 0x125,
+
+ /*
+ * Command Set Specific - Namespace Types commands:
+ */
+ NVME_SC_IOCS_NOT_SUPPORTED = 0x129,
+ NVME_SC_IOCS_NOT_ENABLED = 0x12A,
+ NVME_SC_IOCS_COMBINATION_REJECTED = 0x12B,
+ NVME_SC_INVALID_IOCS = 0x12C,
+
+ /*
+ * I/O Command Set Specific - NVM commands:
+ */
+ NVME_SC_BAD_ATTRIBUTES = 0x180,
+ NVME_SC_INVALID_PI = 0x181,
+ NVME_SC_READ_ONLY = 0x182,
+ NVME_SC_CMD_SIZE_LIMIT_EXCEEDED = 0x183,
+
+ /*
+ * I/O Command Set Specific - Fabrics commands:
+ */
+ NVME_SC_CONNECT_FORMAT = 0x180,
+ NVME_SC_CONNECT_CTRL_BUSY = 0x181,
+ NVME_SC_CONNECT_INVALID_PARAM = 0x182,
+ NVME_SC_CONNECT_RESTART_DISC = 0x183,
+ NVME_SC_CONNECT_INVALID_HOST = 0x184,
+
+ NVME_SC_DISCOVERY_RESTART = 0x190,
+ NVME_SC_AUTH_REQUIRED = 0x191,
+
+ /*
+ * I/O Command Set Specific - Zoned Namespace commands:
+ */
+ NVME_SC_ZONE_BOUNDARY_ERROR = 0x1B8,
+ NVME_SC_ZONE_IS_FULL = 0x1B9,
+ NVME_SC_ZONE_IS_READ_ONLY = 0x1BA,
+ NVME_SC_ZONE_IS_OFFLINE = 0x1BB,
+ NVME_SC_ZONE_INVALID_WRITE = 0x1BC,
+ NVME_SC_TOO_MANY_ACTIVE_ZONES = 0x1BD,
+ NVME_SC_TOO_MANY_OPEN_ZONES = 0x1BE,
+ NVME_SC_ZONE_INVALID_STATE_TRANSITION = 0x1BF,
+
+ /*
+ * Media and Data Integrity Errors:
+ */
+ NVME_SC_WRITE_FAULT = 0x280,
+ NVME_SC_READ_ERROR = 0x281,
+ NVME_SC_GUARD_CHECK = 0x282,
+ NVME_SC_APPTAG_CHECK = 0x283,
+ NVME_SC_REFTAG_CHECK = 0x284,
+ NVME_SC_COMPARE_FAILED = 0x285,
+ NVME_SC_ACCESS_DENIED = 0x286,
+ NVME_SC_UNWRITTEN_BLOCK = 0x287,
+
+ /*
+ * Path-related Errors:
+ */
+ NVME_SC_INTERNAL_PATH_ERROR = 0x300,
+ NVME_SC_ANA_PERSISTENT_LOSS = 0x301,
+ NVME_SC_ANA_INACCESSIBLE = 0x302,
+ NVME_SC_ANA_TRANSITION = 0x303,
+
+ /*
+ * Controller Detected Path errors
+ */
+ NVME_SC_CTRL_PATHING_ERROR = 0x360,
+
+ /*
+ * Host Detected Path Errors
+ */
+ NVME_SC_HOST_PATHING_ERROR = 0x370,
+ NVME_SC_HOST_CMD_ABORT = 0x371,
+
+ NVME_SC_CRD = 0x1800,
+ NVME_SC_DNR = 0x4000,
+};
+
+#define NVME_VS(major, minor, tertiary) \
+ (((major) << 16) | ((minor) << 8) | (tertiary))
+
+#define NVME_MAJOR(ver) ((ver) >> 16)
+#define NVME_MINOR(ver) (((ver) >> 8) & 0xff)
+#define NVME_TERTIARY(ver) ((ver) & 0xff)
+
+
+/**
+ * struct nvme_zns_lbafe -
+ * zsze:
+ * zdes:
+ */
+struct nvme_zns_lbafe {
+ __le64 zsze;
+ __u8 zdes;
+ __u8 rsvd9[7];
+};
+
+/**
+ * struct nvme_zns_id_ns -
+ * @zoc:
+ * @ozcs:
+ * @mar:
+ * @mor:
+ * @rrl:
+ * @frl:
+ * @lbafe:
+ * @vs:
+ */
+struct nvme_zns_id_ns {
+ __le16 zoc;
+ __le16 ozcs;
+ __le32 mar;
+ __le32 mor;
+ __le32 rrl;
+ __le32 frl;
+ __u8 rsvd20[2796];
+ struct nvme_zns_lbafe lbafe[16];
+ __u8 rsvd3072[768];
+ __u8 vs[256];
+};
+
+struct nvme_id_ctrl_nvm {
+ __u8 vsl;
+ __u8 wzsl;
+ __u8 wusl;
+ __u8 dmrl;
+ __u32 dmrsl;
+ __u64 dmsl;
+ __u8 rsvd16[4080];
+};
+
+/**
+ * struct nvme_zns_id_ctrl -
+ * @zasl:
+ */
+struct nvme_zns_id_ctrl {
+ __u8 zasl;
+ __u8 rsvd1[4095];
+};
+
+#define NVME_ZNS_CHANGED_ZONES_MAX 511
+
+/**
+ * struct nvme_zns_changed_zone_log - ZNS Changed Zone List log
+ * @nrzid:
+ * @zid:
+ */
+struct nvme_zns_changed_zone_log {
+ __le16 nrzid;
+ __u8 rsvd2[6];
+ __le64 zid[NVME_ZNS_CHANGED_ZONES_MAX];
+};
+
+/**
+ * enum nvme_zns_zt -
+ */
+enum nvme_zns_zt {
+ NVME_ZONE_TYPE_SEQWRITE_REQ = 0x2,
+};
+
+/**
+ * enum nvme_zns_za -
+ */
+enum nvme_zns_za {
+ NVME_ZNS_ZA_ZFC = 1 << 0,
+ NVME_ZNS_ZA_FZR = 1 << 1,
+ NVME_ZNS_ZA_RZR = 1 << 2,
+ NVME_ZNS_ZA_ZDEV = 1 << 7,
+};
+
+/**
+ * enum nvme_zns_zs -
+ */
+enum nvme_zns_zs {
+ NVME_ZNS_ZS_EMPTY = 0x1,
+ NVME_ZNS_ZS_IMPL_OPEN = 0x2,
+ NVME_ZNS_ZS_EXPL_OPEN = 0x3,
+ NVME_ZNS_ZS_CLOSED = 0x4,
+ NVME_ZNS_ZS_READ_ONLY = 0xd,
+ NVME_ZNS_ZS_FULL = 0xe,
+ NVME_ZNS_ZS_OFFLINE = 0xf,
+};
+
+/**
+ * struct nvme_zns_desc -
+ */
+struct nvme_zns_desc {
+ __u8 zt;
+ __u8 zs;
+ __u8 za;
+ __u8 rsvd3[5];
+ __le64 zcap;
+ __le64 zslba;
+ __le64 wp;
+ __u8 rsvd32[32];
+};
+
+/**
+ * struct nvme_zone_report -
+ */
+struct nvme_zone_report {
+ __le64 nr_zones;
+ __u8 resv8[56];
+ struct nvme_zns_desc entries[];
+};
+
+enum nvme_zns_send_action {
+ NVME_ZNS_ZSA_CLOSE = 0x1,
+ NVME_ZNS_ZSA_FINISH = 0x2,
+ NVME_ZNS_ZSA_OPEN = 0x3,
+ NVME_ZNS_ZSA_RESET = 0x4,
+ NVME_ZNS_ZSA_OFFLINE = 0x5,
+ NVME_ZNS_ZSA_SET_DESC_EXT = 0x10,
+};
+
+enum nvme_zns_recv_action {
+ NVME_ZNS_ZRA_REPORT_ZONES = 0x0,
+ NVME_ZNS_ZRA_EXTENDED_REPORT_ZONES = 0x1,
+};
+
+enum nvme_zns_report_options {
+ NVME_ZNS_ZRAS_REPORT_ALL = 0x0,
+ NVME_ZNS_ZRAS_REPORT_EMPTY = 0x1,
+ NVME_ZNS_ZRAS_REPORT_IMPL_OPENED = 0x2,
+ NVME_ZNS_ZRAS_REPORT_EXPL_OPENED = 0x3,
+ NVME_ZNS_ZRAS_REPORT_CLOSED = 0x4,
+ NVME_ZNS_ZRAS_REPORT_FULL = 0x5,
+ NVME_ZNS_ZRAS_REPORT_READ_ONLY = 0x6,
+ NVME_ZNS_ZRAS_REPORT_OFFLINE = 0x7,
+};
+#endif /* _LINUX_NVME_H */
diff --git a/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/src/linux/nvme_ioctl.h b/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/src/linux/nvme_ioctl.h
new file mode 100644
index 0000000..d569414
--- /dev/null
+++ b/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/src/linux/nvme_ioctl.h
@@ -0,0 +1,91 @@
+/*
+ * Definitions for the NVM Express ioctl interface
+ * Copyright (c) 2011-2014, Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ */
+
+#ifndef _UAPI_LINUX_NVME_IOCTL_H
+#define _UAPI_LINUX_NVME_IOCTL_H
+
+#include
+#include
+
+struct nvme_user_io {
+ __u8 opcode;
+ __u8 flags;
+ __u16 control;
+ __u16 nblocks;
+ __u16 rsvd;
+ __u64 metadata;
+ __u64 addr;
+ __u64 slba;
+ __u32 dsmgmt;
+ __u32 reftag;
+ __u16 apptag;
+ __u16 appmask;
+};
+
+struct nvme_passthru_cmd {
+ __u8 opcode;
+ __u8 flags;
+ __u16 rsvd1;
+ __u32 nsid;
+ __u32 cdw2;
+ __u32 cdw3;
+ __u64 metadata;
+ __u64 addr;
+ __u32 metadata_len;
+ __u32 data_len;
+ __u32 cdw10;
+ __u32 cdw11;
+ __u32 cdw12;
+ __u32 cdw13;
+ __u32 cdw14;
+ __u32 cdw15;
+ __u32 timeout_ms;
+ __u32 result;
+};
+
+struct nvme_passthru_cmd64 {
+ __u8 opcode;
+ __u8 flags;
+ __u16 rsvd1;
+ __u32 nsid;
+ __u32 cdw2;
+ __u32 cdw3;
+ __u64 metadata;
+ __u64 addr;
+ __u32 metadata_len;
+ __u32 data_len;
+ __u32 cdw10;
+ __u32 cdw11;
+ __u32 cdw12;
+ __u32 cdw13;
+ __u32 cdw14;
+ __u32 cdw15;
+ __u32 timeout_ms;
+ __u32 rsvd2;
+ __u64 result;
+};
+
+#define nvme_admin_cmd nvme_passthru_cmd
+
+#define NVME_IOCTL_ID _IO('N', 0x40)
+#define NVME_IOCTL_ADMIN_CMD _IOWR('N', 0x41, struct nvme_admin_cmd)
+#define NVME_IOCTL_SUBMIT_IO _IOW('N', 0x42, struct nvme_user_io)
+#define NVME_IOCTL_IO_CMD _IOWR('N', 0x43, struct nvme_passthru_cmd)
+#define NVME_IOCTL_RESET _IO('N', 0x44)
+#define NVME_IOCTL_SUBSYS_RESET _IO('N', 0x45)
+#define NVME_IOCTL_RESCAN _IO('N', 0x46)
+#define NVME_IOCTL_ADMIN64_CMD _IOWR('N', 0x47, struct nvme_passthru_cmd64)
+#define NVME_IOCTL_IO64_CMD _IOWR('N', 0x48, struct nvme_passthru_cmd64)
+
+#endif /* _UAPI_LINUX_NVME_IOCTL_H */
diff --git a/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/src/make.mk b/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/src/make.mk
new file mode 100644
index 0000000..3f41df9
--- /dev/null
+++ b/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/src/make.mk
@@ -0,0 +1,9 @@
+###############################################################################
+#
+#
+#
+###############################################################################
+
+LIBRARY := arm64_wistron_wtp_01_c1_00
+$(LIBRARY)_SUBDIR := $(dir $(lastword $(MAKEFILE_LIST)))
+include $(BUILDER)/lib.mk
diff --git a/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/src/modulei.c b/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/src/modulei.c
new file mode 100644
index 0000000..9094614
--- /dev/null
+++ b/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/src/modulei.c
@@ -0,0 +1,72 @@
+/************************************************************
+ *
+ *
+ * Copyright 2014 Big Switch Networks, Inc.
+ *
+ * Licensed under the Eclipse Public License, Version 1.0 (the
+ * "License"); you may not use this file except in compliance
+ * with the License. You may obtain a copy of the License at
+ *
+ * http://www.eclipse.org/legal/epl-v10.html
+ *
+ * Unless required by applicable law or agreed to in writing,
+ * software distributed under the License is distributed on an
+ * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+ * either express or implied. See the License for the specific
+ * language governing permissions and limitations under the
+ * License.
+ *
+ *
+ ************************************************************
+ *
+ *
+ *
+ ***********************************************************/
+#include
+#include
+#include "platform_lib.h"
+
+#define MODULE1_ID 1
+#define MODULE2_ID 2
+#define MODULE3_ID 3
+#define MODULE4_ID 4
+
+#define CFP2DCO_SYSFS_PATH "/sys/class/cfp2dco/"
+
+static onlp_module_info_t minfo[] = {
+ {}, /* not used */
+ {
+ {ONLP_MODULE_ID_CREATE(MODULE1_ID), "CFP2DCO-1", 0},
+ 0,
+ },
+ {
+ {ONLP_MODULE_ID_CREATE(MODULE2_ID), "CFP2DCO-2", 0},
+ 0,
+ },
+ {
+ {ONLP_MODULE_ID_CREATE(MODULE3_ID), "CFP2DCO-3", 0},
+ 0,
+ },
+ {
+ {ONLP_MODULE_ID_CREATE(MODULE4_ID), "CFP2DCO-4", 0},
+ 0,
+ }
+};
+
+int onlp_modulei_info_get(onlp_oid_t id, onlp_module_info_t *info) {
+ uint32_t status = 0;
+ *info = minfo[ONLP_OID_ID_GET(id)];
+ onlp_modulei_status_get(id, &status);
+ info->status = status;
+ return ONLP_STATUS_OK;
+}
+
+int onlp_modulei_status_get(onlp_oid_t id, uint32_t* status) {
+ /* Here ID can be used to identify the slotno */
+ char *s = NULL;
+ int slot = ONLP_OID_ID_GET(id);
+ int rv = onlp_file_read_str(&s, "%scfp2dco%d/part_number", CFP2DCO_SYSFS_PATH, slot);
+ aim_free(s);
+ *status = rv > 0 ? (ONLP_MODULE_STATUS_PIU_DCO_PRESENT | ONLP_MODULE_STATUS_PIU_CFP2_PRESENT) : ONLP_MODULE_STATUS_UNPLUGGED;
+ return ONLP_STATUS_OK;
+}
diff --git a/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/src/nvme-ioctl.c b/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/src/nvme-ioctl.c
new file mode 100644
index 0000000..7183cab
--- /dev/null
+++ b/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/src/nvme-ioctl.c
@@ -0,0 +1,1065 @@
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include "nvme-ioctl.h"
+
+static int nvme_verify_chr(int fd)
+{
+ static struct stat nvme_stat;
+ int err = fstat(fd, &nvme_stat);
+
+ if (err < 0) {
+ perror("fstat");
+ return errno;
+ }
+ if (!S_ISCHR(nvme_stat.st_mode)) {
+ fprintf(stderr,
+ "Error: requesting reset on non-controller handle\n");
+ return ENOTBLK;
+ }
+ return 0;
+}
+
+int nvme_subsystem_reset(int fd)
+{
+ int ret;
+
+ ret = nvme_verify_chr(fd);
+ if (ret)
+ return ret;
+ return ioctl(fd, NVME_IOCTL_SUBSYS_RESET);
+}
+
+int nvme_reset_controller(int fd)
+{
+ int ret;
+
+ ret = nvme_verify_chr(fd);
+ if (ret)
+ return ret;
+ return ioctl(fd, NVME_IOCTL_RESET);
+}
+
+int nvme_ns_rescan(int fd)
+{
+ int ret;
+
+ ret = nvme_verify_chr(fd);
+ if (ret)
+ return ret;
+ return ioctl(fd, NVME_IOCTL_RESCAN);
+}
+
+int nvme_get_nsid(int fd)
+{
+ static struct stat nvme_stat;
+ int err = fstat(fd, &nvme_stat);
+
+ if (err < 0)
+ return -errno;
+
+ return ioctl(fd, NVME_IOCTL_ID);
+}
+
+int nvme_submit_passthru(int fd, unsigned long ioctl_cmd,
+ struct nvme_passthru_cmd *cmd)
+{
+ return ioctl(fd, ioctl_cmd, cmd);
+}
+
+int nvme_submit_admin_passthru(int fd, struct nvme_passthru_cmd *cmd)
+{
+ return ioctl(fd, NVME_IOCTL_ADMIN_CMD, cmd);
+}
+
+int nvme_submit_io_passthru(int fd, struct nvme_passthru_cmd *cmd)
+{
+ return ioctl(fd, NVME_IOCTL_IO_CMD, cmd);
+}
+
+int nvme_passthru(int fd, unsigned long ioctl_cmd, __u8 opcode,
+ __u8 flags, __u16 rsvd,
+ __u32 nsid, __u32 cdw2, __u32 cdw3, __u32 cdw10, __u32 cdw11,
+ __u32 cdw12, __u32 cdw13, __u32 cdw14, __u32 cdw15,
+ __u32 data_len, void *data, __u32 metadata_len,
+ void *metadata, __u32 timeout_ms, __u32 *result)
+{
+ struct nvme_passthru_cmd cmd = {
+ .opcode = opcode,
+ .flags = flags,
+ .rsvd1 = rsvd,
+ .nsid = nsid,
+ .cdw2 = cdw2,
+ .cdw3 = cdw3,
+ .metadata = (__u64)(uintptr_t) metadata,
+ .addr = (__u64)(uintptr_t) data,
+ .metadata_len = metadata_len,
+ .data_len = data_len,
+ .cdw10 = cdw10,
+ .cdw11 = cdw11,
+ .cdw12 = cdw12,
+ .cdw13 = cdw13,
+ .cdw14 = cdw14,
+ .cdw15 = cdw15,
+ .timeout_ms = timeout_ms,
+ .result = 0,
+ };
+ int err;
+
+ err = nvme_submit_passthru(fd, ioctl_cmd, &cmd);
+ if (!err && result)
+ *result = cmd.result;
+ return err;
+}
+
+int nvme_io(int fd, __u8 opcode, __u64 slba, __u16 nblocks, __u16 control,
+ __u32 dsmgmt, __u32 reftag, __u16 apptag, __u16 appmask, void *data,
+ void *metadata)
+{
+ struct nvme_user_io io = {
+ .opcode = opcode,
+ .flags = 0,
+ .control = control,
+ .nblocks = nblocks,
+ .rsvd = 0,
+ .metadata = (__u64)(uintptr_t) metadata,
+ .addr = (__u64)(uintptr_t) data,
+ .slba = slba,
+ .dsmgmt = dsmgmt,
+ .reftag = reftag,
+ .appmask = appmask,
+ .apptag = apptag,
+ };
+ return ioctl(fd, NVME_IOCTL_SUBMIT_IO, &io);
+}
+
+int nvme_verify(int fd, __u32 nsid, __u64 slba, __u16 nblocks,
+ __u16 control, __u32 reftag, __u16 apptag, __u16 appmask)
+{
+ struct nvme_passthru_cmd cmd = {
+ .opcode = nvme_cmd_verify,
+ .nsid = nsid,
+ .cdw10 = slba & 0xffffffff,
+ .cdw11 = slba >> 32,
+ .cdw12 = nblocks | (control << 16),
+ .cdw14 = reftag,
+ .cdw15 = apptag | (appmask << 16),
+ };
+
+ return nvme_submit_io_passthru(fd, &cmd);
+}
+
+int nvme_passthru_io(int fd, __u8 opcode, __u8 flags, __u16 rsvd,
+ __u32 nsid, __u32 cdw2, __u32 cdw3, __u32 cdw10,
+ __u32 cdw11, __u32 cdw12, __u32 cdw13, __u32 cdw14,
+ __u32 cdw15, __u32 data_len, void *data,
+ __u32 metadata_len, void *metadata, __u32 timeout_ms)
+{
+ return nvme_passthru(fd, NVME_IOCTL_IO_CMD, opcode, flags, rsvd, nsid,
+ cdw2, cdw3, cdw10, cdw11, cdw12, cdw13, cdw14,
+ cdw15, data_len, data, metadata_len, metadata,
+ timeout_ms, NULL);
+}
+
+int nvme_write_zeros(int fd, __u32 nsid, __u64 slba, __u16 nlb,
+ __u16 control, __u32 reftag, __u16 apptag, __u16 appmask)
+{
+ struct nvme_passthru_cmd cmd = {
+ .opcode = nvme_cmd_write_zeroes,
+ .nsid = nsid,
+ .cdw10 = slba & 0xffffffff,
+ .cdw11 = slba >> 32,
+ .cdw12 = nlb | (control << 16),
+ .cdw14 = reftag,
+ .cdw15 = apptag | (appmask << 16),
+ };
+
+ return nvme_submit_io_passthru(fd, &cmd);
+}
+
+int nvme_write_uncorrectable(int fd, __u32 nsid, __u64 slba, __u16 nlb)
+{
+ struct nvme_passthru_cmd cmd = {
+ .opcode = nvme_cmd_write_uncor,
+ .nsid = nsid,
+ .cdw10 = slba & 0xffffffff,
+ .cdw11 = slba >> 32,
+ .cdw12 = nlb,
+ };
+
+ return nvme_submit_io_passthru(fd, &cmd);
+}
+
+int nvme_flush(int fd, __u32 nsid)
+{
+ struct nvme_passthru_cmd cmd = {
+ .opcode = nvme_cmd_flush,
+ .nsid = nsid,
+ };
+
+ return nvme_submit_io_passthru(fd, &cmd);
+}
+
+int nvme_dsm(int fd, __u32 nsid, __u32 cdw11, struct nvme_dsm_range *dsm,
+ __u16 nr_ranges)
+{
+ struct nvme_passthru_cmd cmd = {
+ .opcode = nvme_cmd_dsm,
+ .nsid = nsid,
+ .addr = (__u64)(uintptr_t) dsm,
+ .data_len = nr_ranges * sizeof(*dsm),
+ .cdw10 = nr_ranges - 1,
+ .cdw11 = cdw11,
+ };
+
+ return nvme_submit_io_passthru(fd, &cmd);
+}
+
+struct nvme_dsm_range *nvme_setup_dsm_range(int *ctx_attrs, int *llbas,
+ unsigned long long *slbas,
+ __u16 nr_ranges)
+{
+ int i;
+ struct nvme_dsm_range *dsm = malloc(nr_ranges * sizeof(*dsm));
+
+ if (!dsm) {
+ fprintf(stderr, "malloc: %s\n", strerror(errno));
+ return NULL;
+ }
+ for (i = 0; i < nr_ranges; i++) {
+ dsm[i].cattr = cpu_to_le32(ctx_attrs[i]);
+ dsm[i].nlb = cpu_to_le32(llbas[i]);
+ dsm[i].slba = cpu_to_le64(slbas[i]);
+ }
+ return dsm;
+}
+
+int nvme_copy(int fd, __u32 nsid, struct nvme_copy_range *copy, __u64 sdlba,
+ __u16 nr, __u8 prinfor, __u8 prinfow, __u8 dtype, __u16 dspec,
+ __u8 format, int lr, int fua, __u32 ilbrt, __u16 lbatm,
+ __u16 lbat)
+{
+ __u32 cdw12 = ((nr - 1) & 0xff) | ((format & 0xf) << 8) |
+ ((prinfor & 0xf) << 12) | ((dtype & 0xf) << 20) |
+ ((prinfow & 0xf) << 26) | ((fua & 0x1) << 30) |
+ ((lr & 0x1) << 31);
+
+ struct nvme_passthru_cmd cmd = {
+ .opcode = nvme_cmd_copy,
+ .nsid = nsid,
+ .addr = (__u64)(uintptr_t)copy,
+ .data_len = nr * sizeof(*copy),
+ .cdw10 = sdlba & 0xffffffff,
+ .cdw11 = sdlba >> 32,
+ .cdw12 = cdw12,
+ .cdw13 = (dspec & 0xffff) << 16,
+ .cdw14 = ilbrt,
+ .cdw15 = (lbatm << 16) | lbat,
+ };
+
+ return nvme_submit_io_passthru(fd, &cmd);
+}
+
+struct nvme_copy_range *nvme_setup_copy_range(int *nlbs, unsigned long long *slbas,
+ int *eilbrts, int *elbatms, int *elbats, __u16 nr)
+{
+ struct nvme_copy_range *copy = malloc(nr * sizeof(*copy));
+ if (!copy) {
+ fprintf(stderr, "malloc: %s\n", strerror(errno));
+ return NULL;
+ }
+
+ for (int i = 0; i < nr; i++) {
+ copy[i].nlb = cpu_to_le16(nlbs[i]);
+ copy[i].slba = cpu_to_le64(slbas[i]);
+ copy[i].eilbrt = cpu_to_le32(eilbrts[i]);
+ copy[i].elbatm = cpu_to_le16(elbatms[i]);
+ copy[i].elbat = cpu_to_le16(elbats[i]);
+ }
+
+ return copy;
+}
+
+int nvme_resv_acquire(int fd, __u32 nsid, __u8 rtype, __u8 racqa,
+ bool iekey, __u64 crkey, __u64 nrkey)
+{
+ __le64 payload[2] = { cpu_to_le64(crkey), cpu_to_le64(nrkey) };
+ __u32 cdw10 = (racqa & 0x7) | (iekey ? 1 << 3 : 0) | rtype << 8;
+ struct nvme_passthru_cmd cmd = {
+ .opcode = nvme_cmd_resv_acquire,
+ .nsid = nsid,
+ .cdw10 = cdw10,
+ .addr = (__u64)(uintptr_t) (payload),
+ .data_len = sizeof(payload),
+ };
+
+ return nvme_submit_io_passthru(fd, &cmd);
+}
+
+int nvme_resv_register(int fd, __u32 nsid, __u8 rrega, __u8 cptpl,
+ bool iekey, __u64 crkey, __u64 nrkey)
+{
+ __le64 payload[2] = { cpu_to_le64(crkey), cpu_to_le64(nrkey) };
+ __u32 cdw10 = (rrega & 0x7) | (iekey ? 1 << 3 : 0) | cptpl << 30;
+
+ struct nvme_passthru_cmd cmd = {
+ .opcode = nvme_cmd_resv_register,
+ .nsid = nsid,
+ .cdw10 = cdw10,
+ .addr = (__u64)(uintptr_t) (payload),
+ .data_len = sizeof(payload),
+ };
+
+ return nvme_submit_io_passthru(fd, &cmd);
+}
+
+int nvme_resv_release(int fd, __u32 nsid, __u8 rtype, __u8 rrela,
+ bool iekey, __u64 crkey)
+{
+ __le64 payload[1] = { cpu_to_le64(crkey) };
+ __u32 cdw10 = (rrela & 0x7) | (iekey ? 1 << 3 : 0) | rtype << 8;
+
+ struct nvme_passthru_cmd cmd = {
+ .opcode = nvme_cmd_resv_release,
+ .nsid = nsid,
+ .cdw10 = cdw10,
+ .addr = (__u64)(uintptr_t) (payload),
+ .data_len = sizeof(payload),
+ };
+
+ return nvme_submit_io_passthru(fd, &cmd);
+}
+
+int nvme_resv_report(int fd, __u32 nsid, __u32 numd, __u32 cdw11, void *data)
+{
+ struct nvme_passthru_cmd cmd = {
+ .opcode = nvme_cmd_resv_report,
+ .nsid = nsid,
+ .cdw10 = numd,
+ .cdw11 = cdw11,
+ .addr = (__u64)(uintptr_t) data,
+ .data_len = (numd + 1) << 2,
+ };
+
+ return nvme_submit_io_passthru(fd, &cmd);
+}
+
+int nvme_identify13(int fd, __u32 nsid, __u32 cdw10, __u32 cdw11, void *data)
+{
+ struct nvme_admin_cmd cmd = {
+ .opcode = nvme_admin_identify,
+ .nsid = nsid,
+ .addr = (__u64)(uintptr_t) data,
+ .data_len = NVME_IDENTIFY_DATA_SIZE,
+ .cdw10 = cdw10,
+ .cdw11 = cdw11,
+ };
+
+ return nvme_submit_admin_passthru(fd, &cmd);
+}
+
+int nvme_identify(int fd, __u32 nsid, __u32 cdw10, void *data)
+{
+ return nvme_identify13(fd, nsid, cdw10, 0, data);
+}
+
+int nvme_identify_ctrl(int fd, void *data)
+{
+ memset(data, 0, sizeof(struct nvme_id_ctrl));
+ return nvme_identify(fd, 0, 1, data);
+}
+
+int nvme_identify_ns(int fd, __u32 nsid, bool present, void *data)
+{
+ int cns = present ? NVME_ID_CNS_NS_PRESENT : NVME_ID_CNS_NS;
+
+ return nvme_identify(fd, nsid, cns, data);
+}
+
+int nvme_identify_ns_list_csi(int fd, __u32 nsid, __u8 csi, bool all, void *data)
+{
+ int cns;
+
+ if (csi) {
+ cns = all ? NVME_ID_CNS_CSI_NS_PRESENT_LIST : NVME_ID_CNS_CSI_NS_ACTIVE_LIST;
+ } else {
+ cns = all ? NVME_ID_CNS_NS_PRESENT_LIST : NVME_ID_CNS_NS_ACTIVE_LIST;
+ }
+
+ return nvme_identify13(fd, nsid, cns, csi << 24, data);
+}
+
+int nvme_identify_ns_list(int fd, __u32 nsid, bool all, void *data)
+{
+ return nvme_identify_ns_list_csi(fd, nsid, 0x0, all, data);
+}
+
+int nvme_identify_ctrl_list(int fd, __u32 nsid, __u16 cntid, void *data)
+{
+ int cns = nsid ? NVME_ID_CNS_CTRL_NS_LIST : NVME_ID_CNS_CTRL_LIST;
+
+ return nvme_identify(fd, nsid, (cntid << 16) | cns, data);
+}
+
+int nvme_identify_secondary_ctrl_list(int fd, __u32 nsid, __u16 cntid, void *data)
+{
+ return nvme_identify(fd, nsid, (cntid << 16) | NVME_ID_CNS_SCNDRY_CTRL_LIST, data);
+}
+
+int nvme_identify_ns_descs(int fd, __u32 nsid, void *data)
+{
+
+ return nvme_identify(fd, nsid, NVME_ID_CNS_NS_DESC_LIST, data);
+}
+
+int nvme_identify_nvmset(int fd, __u16 nvmset_id, void *data)
+{
+ return nvme_identify13(fd, 0, NVME_ID_CNS_NVMSET_LIST, nvmset_id, data);
+}
+
+int nvme_identify_ns_granularity(int fd, void *data)
+{
+ return nvme_identify13(fd, 0, NVME_ID_CNS_NS_GRANULARITY, 0, data);
+}
+
+int nvme_identify_uuid(int fd, void *data)
+{
+ return nvme_identify(fd, 0, NVME_ID_CNS_UUID_LIST, data);
+}
+
+int nvme_identify_ctrl_nvm(int fd, void *data)
+{
+ return nvme_identify13(fd, 0, NVME_ID_CNS_CSI_ID_CTRL, 0, data);
+}
+
+int nvme_zns_identify_ns(int fd, __u32 nsid, void *data)
+{
+ return nvme_identify13(fd, nsid, NVME_ID_CNS_CSI_ID_NS, 2 << 24, data);
+}
+
+int nvme_zns_identify_ctrl(int fd, void *data)
+{
+ return nvme_identify13(fd, 0, NVME_ID_CNS_CSI_ID_CTRL, 2 << 24, data);
+}
+
+int nvme_identify_iocs(int fd, __u16 cntid, void *data)
+{
+ return nvme_identify(fd, 0, (cntid << 16) | NVME_ID_CNS_CSI, data);
+}
+
+int nvme_get_log14(int fd, __u32 nsid, __u8 log_id, __u8 lsp, __u64 lpo,
+ __u16 lsi, bool rae, __u8 uuid_ix, __u32 data_len, void *data)
+{
+ __u32 numd = (data_len >> 2) - 1;
+ __u16 numdu = numd >> 16, numdl = numd & 0xffff;
+ __u32 cdw10 = log_id | (numdl << 16) | (rae ? 1 << 15 : 0) | lsp << 8;
+
+ struct nvme_admin_cmd cmd = {
+ .opcode = nvme_admin_get_log_page,
+ .nsid = nsid,
+ .addr = (__u64)(uintptr_t) data,
+ .data_len = data_len,
+ .cdw10 = cdw10,
+ .cdw11 = numdu | (lsi << 16),
+ .cdw12 = lpo & 0xffffffff,
+ .cdw13 = lpo >> 32,
+ .cdw14 = uuid_ix,
+ };
+
+ return nvme_submit_admin_passthru(fd, &cmd);
+}
+
+int nvme_get_log13(int fd, __u32 nsid, __u8 log_id, __u8 lsp,
+ __u64 lpo, __u16 lsi, bool rae, __u32 data_len,
+ void *data)
+{
+ return nvme_get_log14(fd, nsid, log_id, lsp, lpo, lsi, rae, 0,
+ data_len, data);
+}
+
+int nvme_get_log(int fd, __u32 nsid, __u8 log_id, bool rae,
+ __u8 lsp, __u32 data_len, void *data)
+{
+ __u32 offset = 0, xfer_len = data_len;
+ void *ptr = data;
+ int ret;
+
+ /*
+ * 4k is the smallest possible transfer unit, so by
+ * restricting ourselves for 4k transfers we avoid having
+ * to check the MDTS value of the controller.
+ */
+ do {
+ xfer_len = data_len - offset;
+ if (xfer_len > 4096)
+ xfer_len = 4096;
+
+ ret = nvme_get_log13(fd, nsid, log_id, lsp,
+ offset, 0, rae, xfer_len, ptr);
+ if (ret)
+ return ret;
+
+ offset += xfer_len;
+ ptr += xfer_len;
+ } while (offset < data_len);
+
+ return 0;
+}
+
+int nvme_get_telemetry_log(int fd, void *lp, int generate_report,
+ int ctrl_init, size_t log_page_size, __u64 offset)
+{
+ if (ctrl_init)
+ return nvme_get_log13(fd, NVME_NSID_ALL, NVME_LOG_TELEMETRY_CTRL,
+ NVME_NO_LOG_LSP, offset,
+ 0, 1, log_page_size, lp);
+ if (generate_report)
+ return nvme_get_log13(fd, NVME_NSID_ALL, NVME_LOG_TELEMETRY_HOST,
+ NVME_TELEM_LSP_CREATE, offset,
+ 0, 1, log_page_size, lp);
+ else
+ return nvme_get_log13(fd, NVME_NSID_ALL, NVME_LOG_TELEMETRY_HOST,
+ NVME_NO_LOG_LSP, offset,
+ 0, 1, log_page_size, lp);
+}
+
+int nvme_fw_log(int fd, struct nvme_firmware_log_page *fw_log)
+{
+ return nvme_get_log(fd, NVME_NSID_ALL, NVME_LOG_FW_SLOT, true,
+ NVME_NO_LOG_LSP, sizeof(*fw_log), fw_log);
+}
+
+int nvme_changed_ns_list_log(int fd, struct nvme_changed_ns_list_log *changed_ns_list_log)
+{
+ return nvme_get_log(fd, 0, NVME_LOG_CHANGED_NS, true,
+ NVME_NO_LOG_LSP, sizeof(changed_ns_list_log->log),
+ changed_ns_list_log->log);
+}
+
+int nvme_error_log(int fd, int entries, struct nvme_error_log_page *err_log)
+{
+ return nvme_get_log(fd, NVME_NSID_ALL, NVME_LOG_ERROR, false,
+ NVME_NO_LOG_LSP, entries * sizeof(*err_log), err_log);
+}
+
+int nvme_endurance_log(int fd, __u16 group_id, struct nvme_endurance_group_log *endurance_log)
+{
+ return nvme_get_log13(fd, 0, NVME_LOG_ENDURANCE_GROUP, 0, 0, group_id, 0,
+ sizeof(*endurance_log), endurance_log);
+}
+
+int nvme_smart_log(int fd, __u32 nsid, struct nvme_smart_log *smart_log)
+{
+ return nvme_get_log(fd, nsid, NVME_LOG_SMART, false,
+ NVME_NO_LOG_LSP, sizeof(*smart_log), smart_log);
+}
+
+int nvme_ana_log(int fd, void *ana_log, size_t ana_log_len, int rgo)
+{
+ return nvme_get_log13(fd, NVME_NSID_ALL, NVME_LOG_ANA, rgo, 0, 0,
+ true, ana_log_len, ana_log);
+}
+
+int nvme_self_test_log(int fd, __u32 size, struct nvme_self_test_log *self_test_log)
+{
+ return nvme_get_log(fd, NVME_NSID_ALL, NVME_LOG_DEVICE_SELF_TEST, false,
+ NVME_NO_LOG_LSP, size, self_test_log);
+}
+
+int nvme_effects_log(int fd, struct nvme_effects_log_page *effects_log)
+{
+ return nvme_get_log(fd, NVME_NSID_ALL, NVME_LOG_CMD_EFFECTS, false,
+ NVME_NO_LOG_LSP, sizeof(*effects_log), effects_log);
+}
+
+int nvme_discovery_log(int fd, struct nvmf_disc_rsp_page_hdr *log, __u32 size)
+{
+ return nvme_get_log(fd, 0, NVME_LOG_DISC, false, NVME_NO_LOG_LSP, size, log);
+}
+
+int nvme_sanitize_log(int fd, struct nvme_sanitize_log_page *sanitize_log)
+{
+ return nvme_get_log(fd, 0, NVME_LOG_SANITIZE, false,
+ NVME_NO_LOG_LSP, sizeof(*sanitize_log), sanitize_log);
+}
+
+int nvme_predictable_latency_per_nvmset_log(int fd,
+ __u16 nvmset_id,
+ struct nvme_predlat_per_nvmset_log_page *plpns_log)
+{
+ return nvme_get_log13(fd, NVME_NSID_ALL,
+ NVME_LOG_PRELAT_PER_NVMSET, 0, 0, nvmset_id,
+ false, sizeof(*plpns_log), plpns_log);
+}
+
+int nvme_predictable_latency_event_agg_log(int fd,
+ void *pea_log, bool rae, __u32 size)
+{
+ return nvme_get_log(fd, NVME_NSID_ALL,
+ NVME_LOG_PRELAT_EVENT_AGG, rae, NVME_NO_LOG_LSP,
+ size, pea_log);
+}
+
+int nvme_persistent_event_log(int fd, __u8 action, __u32 size,
+ void *pevent_log_info)
+{
+ return nvme_get_log(fd, NVME_NSID_ALL, NVME_LOG_PERSISTENT_EVENT,
+ false, action, size, pevent_log_info);
+}
+
+int nvme_endurance_group_event_agg_log(int fd,
+ void *endurance_log, bool rae, __u32 size)
+{
+ return nvme_get_log(fd, NVME_NSID_ALL,
+ NVME_LOG_ENDURANCE_GROUP_EVENT_AGG, rae, NVME_NO_LOG_LSP,
+ size, endurance_log);
+}
+
+int nvme_lba_status_log(int fd, void *lba_status, bool rae,
+ __u32 size)
+{
+ return nvme_get_log(fd, NVME_NSID_ALL, NVME_LOG_LBA_STATUS,
+ rae, NVME_NO_LOG_LSP, size, lba_status);
+}
+
+int nvme_resv_notif_log(int fd, struct nvme_resv_notif_log *resv)
+{
+ return nvme_get_log(fd, 0, NVME_LOG_RESERVATION, false,
+ NVME_NO_LOG_LSP, sizeof(*resv), resv);
+}
+
+int nvme_feature(int fd, __u8 opcode, __u32 nsid, __u32 cdw10, __u32 cdw11,
+ __u32 cdw12, __u32 data_len, void *data, __u32 *result)
+{
+ struct nvme_admin_cmd cmd = {
+ .opcode = opcode,
+ .nsid = nsid,
+ .cdw10 = cdw10,
+ .cdw11 = cdw11,
+ .cdw12 = cdw12,
+ .addr = (__u64)(uintptr_t) data,
+ .data_len = data_len,
+ };
+ int err;
+
+ err = nvme_submit_admin_passthru(fd, &cmd);
+ if (!err && result)
+ *result = cmd.result;
+ return err;
+}
+
+int nvme_set_feature(int fd, __u32 nsid, __u8 fid, __u32 value, __u32 cdw12,
+ bool save, __u32 data_len, void *data, __u32 *result)
+{
+ __u32 cdw10 = fid | (save ? 1 << 31 : 0);
+
+ return nvme_feature(fd, nvme_admin_set_features, nsid, cdw10, value,
+ cdw12, data_len, data, result);
+}
+
+
+int nvme_get_property(int fd, int offset, uint64_t *value)
+{
+ struct nvme_passthru_cmd cmd = {
+ .opcode = nvme_fabrics_command,
+ .nsid = nvme_fabrics_type_property_get,
+ .cdw10 = is_64bit_reg(offset),
+ .cdw11 = offset,
+ };
+ int err;
+
+ err = nvme_submit_admin_passthru(fd, &cmd);
+ if (!err && value)
+ *value = cmd.result;
+ return err;
+}
+
+int nvme_get_properties(int fd, void **pbar)
+{
+ int offset;
+ uint64_t value;
+ int err, size = getpagesize();
+
+ *pbar = malloc(size);
+ if (!*pbar) {
+ fprintf(stderr, "malloc: %s\n", strerror(errno));
+ return -ENOMEM;
+ }
+
+ memset(*pbar, 0xff, size);
+ for (offset = NVME_REG_CAP; offset <= NVME_REG_CMBSZ;) {
+ err = nvme_get_property(fd, offset, &value);
+ if (err > 0 && (err & 0xff) == NVME_SC_INVALID_FIELD) {
+ err = 0;
+ value = -1;
+ } else if (err) {
+ free(*pbar);
+ break;
+ }
+ if (is_64bit_reg(offset)) {
+ *(uint64_t *)(*pbar + offset) = value;
+ offset += 8;
+ } else {
+ *(uint32_t *)(*pbar + offset) = value;
+ offset += 4;
+ }
+ }
+
+ return err;
+}
+
+int nvme_set_property(int fd, int offset, uint64_t value)
+{
+ struct nvme_passthru_cmd cmd = {
+ .opcode = nvme_fabrics_command,
+ .nsid = nvme_fabrics_type_property_set,
+ .cdw10 = is_64bit_reg(offset),
+ .cdw11 = offset,
+ .cdw12 = value & 0xffffffff,
+ .cdw13 = value >> 32,
+ };
+
+ return nvme_submit_admin_passthru(fd, &cmd);
+}
+
+int nvme_get_feature(int fd, __u32 nsid, __u8 fid, __u8 sel, __u32 cdw11,
+ __u32 data_len, void *data, __u32 *result)
+{
+ __u32 cdw10 = fid | sel << 8;
+
+ return nvme_feature(fd, nvme_admin_get_features, nsid, cdw10, cdw11,
+ 0, data_len, data, result);
+}
+
+int nvme_format(int fd, __u32 nsid, __u8 lbaf, __u8 ses, __u8 pi,
+ __u8 pil, __u8 ms, __u32 timeout)
+{
+ __u32 cdw10 = lbaf | ms << 4 | pi << 5 | pil << 8 | ses << 9;
+ struct nvme_admin_cmd cmd = {
+ .opcode = nvme_admin_format_nvm,
+ .nsid = nsid,
+ .cdw10 = cdw10,
+ .timeout_ms = timeout,
+ };
+
+ return nvme_submit_admin_passthru(fd, &cmd);
+}
+
+int nvme_ns_create(int fd, __u64 nsze, __u64 ncap, __u8 flbas, __u8 dps,
+ __u8 nmic, __u32 anagrpid, __u16 nvmsetid, __u8 csi,
+ __u32 timeout, __u32 *result)
+{
+ struct nvme_id_ns ns = {
+ .nsze = cpu_to_le64(nsze),
+ .ncap = cpu_to_le64(ncap),
+ .flbas = flbas,
+ .dps = dps,
+ .nmic = nmic,
+ .anagrpid = anagrpid,
+ .nvmsetid = nvmsetid,
+ };
+
+ struct nvme_admin_cmd cmd = {
+ .opcode = nvme_admin_ns_mgmt,
+ .addr = (__u64)(uintptr_t) ((void *)&ns),
+ .cdw10 = 0,
+ .cdw11 = csi << 24,
+ .data_len = 0x1000,
+ .timeout_ms = timeout,
+ };
+ int err;
+
+ err = nvme_submit_admin_passthru(fd, &cmd);
+ if (!err && result)
+ *result = cmd.result;
+ return err;
+}
+
+int nvme_ns_delete(int fd, __u32 nsid, __u32 timeout)
+{
+ struct nvme_admin_cmd cmd = {
+ .opcode = nvme_admin_ns_mgmt,
+ .nsid = nsid,
+ .cdw10 = 1,
+ .timeout_ms = timeout,
+ };
+
+ return nvme_submit_admin_passthru(fd, &cmd);
+}
+
+int nvme_ns_attachment(int fd, __u32 nsid, __u16 num_ctrls, __u16 *ctrlist,
+ bool attach)
+{
+ struct nvme_controller_list cntlist = {
+ .num = cpu_to_le16(num_ctrls),
+ };
+
+ struct nvme_admin_cmd cmd = {
+ .opcode = nvme_admin_ns_attach,
+ .nsid = nsid,
+ .addr = (__u64)(uintptr_t)&cntlist,
+ .cdw10 = attach ? 0 : 1,
+ .data_len = 0x1000,
+ };
+ int i;
+
+ for (i = 0; i < num_ctrls; i++)
+ cntlist.identifier[i] = cpu_to_le16(ctrlist[i]);
+
+ return nvme_submit_admin_passthru(fd, &cmd);
+}
+
+int nvme_fw_download(int fd, __u32 offset, __u32 data_len, void *data)
+{
+ struct nvme_admin_cmd cmd = {
+ .opcode = nvme_admin_download_fw,
+ .addr = (__u64)(uintptr_t) data,
+ .data_len = data_len,
+ .cdw10 = (data_len >> 2) - 1,
+ .cdw11 = offset >> 2,
+ };
+
+ return nvme_submit_admin_passthru(fd, &cmd);
+}
+
+int nvme_fw_commit(int fd, __u8 slot, __u8 action, __u8 bpid)
+{
+ struct nvme_admin_cmd cmd = {
+ .opcode = nvme_admin_activate_fw,
+ .cdw10 = (bpid << 31) | (action << 3) | slot,
+ };
+
+ return nvme_submit_admin_passthru(fd, &cmd);
+}
+
+int nvme_sec_send(int fd, __u32 nsid, __u8 nssf, __u16 spsp,
+ __u8 secp, __u32 tl, __u32 data_len, void *data)
+{
+ struct nvme_admin_cmd cmd = {
+ .opcode = nvme_admin_security_send,
+ .addr = (__u64)(uintptr_t) data,
+ .data_len = data_len,
+ .nsid = nsid,
+ .cdw10 = secp << 24 | spsp << 8 | nssf,
+ .cdw11 = tl,
+ };
+
+ return nvme_submit_admin_passthru(fd, &cmd);
+}
+
+int nvme_sec_recv(int fd, __u32 nsid, __u8 nssf, __u16 spsp,
+ __u8 secp, __u32 al, __u32 data_len, void *data)
+{
+ struct nvme_admin_cmd cmd = {
+ .opcode = nvme_admin_security_recv,
+ .nsid = nsid,
+ .cdw10 = secp << 24 | spsp << 8 | nssf,
+ .cdw11 = al,
+ .addr = (__u64)(uintptr_t) data,
+ .data_len = data_len,
+ };
+
+ return nvme_submit_admin_passthru(fd, &cmd);
+}
+
+int nvme_get_lba_status(int fd, __u32 namespace_id, __u64 slba, __u32 mndw,
+ __u8 atype, __u16 rl, void *data)
+{
+ struct nvme_admin_cmd cmd = {
+ .opcode = nvme_admin_get_lba_status,
+ .nsid = namespace_id,
+ .addr = (__u64)(uintptr_t) data,
+ .data_len = (mndw + 1) * 4,
+ .cdw10 = slba & 0xffffffff,
+ .cdw11 = slba >> 32,
+ .cdw12 = mndw,
+ .cdw13 = (atype << 24) | rl,
+ };
+
+ return nvme_submit_admin_passthru(fd, &cmd);
+}
+
+int nvme_dir_send(int fd, __u32 nsid, __u16 dspec, __u8 dtype, __u8 doper,
+ __u32 data_len, __u32 dw12, void *data, __u32 *result)
+{
+ struct nvme_admin_cmd cmd = {
+ .opcode = nvme_admin_directive_send,
+ .addr = (__u64)(uintptr_t) data,
+ .data_len = data_len,
+ .nsid = nsid,
+ .cdw10 = data_len? (data_len >> 2) - 1 : 0,
+ .cdw11 = dspec << 16 | dtype << 8 | doper,
+ .cdw12 = dw12,
+ };
+ int err;
+
+ err = nvme_submit_admin_passthru(fd, &cmd);
+ if (!err && result)
+ *result = cmd.result;
+ return err;
+}
+
+int nvme_dir_recv(int fd, __u32 nsid, __u16 dspec, __u8 dtype, __u8 doper,
+ __u32 data_len, __u32 dw12, void *data, __u32 *result)
+{
+ struct nvme_admin_cmd cmd = {
+ .opcode = nvme_admin_directive_recv,
+ .addr = (__u64)(uintptr_t) data,
+ .data_len = data_len,
+ .nsid = nsid,
+ .cdw10 = data_len? (data_len >> 2) - 1 : 0,
+ .cdw11 = dspec << 16 | dtype << 8 | doper,
+ .cdw12 = dw12,
+ };
+ int err;
+
+ err = nvme_submit_admin_passthru(fd, &cmd);
+ if (!err && result)
+ *result = cmd.result;
+ return err;
+}
+
+int nvme_sanitize(int fd, __u8 sanact, __u8 ause, __u8 owpass, __u8 oipbp,
+ __u8 no_dealloc, __u32 ovrpat)
+{
+ struct nvme_admin_cmd cmd = {
+ .opcode = nvme_admin_sanitize_nvm,
+ .cdw10 = no_dealloc << 9 | oipbp << 8 |
+ owpass << NVME_SANITIZE_OWPASS_SHIFT |
+ ause << 3 | sanact,
+ .cdw11 = ovrpat,
+ };
+
+ return nvme_submit_admin_passthru(fd, &cmd);
+}
+
+int nvme_self_test_start(int fd, __u32 nsid, __u8 stc)
+{
+ struct nvme_admin_cmd cmd = {
+ .opcode = nvme_admin_dev_self_test,
+ .nsid = nsid,
+ .cdw10 = stc,
+ };
+
+ return nvme_submit_admin_passthru(fd, &cmd);
+}
+
+int nvme_virtual_mgmt(int fd, __u32 cdw10, __u32 cdw11, __u32 *result)
+{
+ struct nvme_admin_cmd cmd = {
+ .opcode = nvme_admin_virtual_mgmt,
+ .cdw10 = cdw10,
+ .cdw11 = cdw11,
+ };
+ int err;
+
+ err = nvme_submit_admin_passthru(fd, &cmd);
+ if (!err && result)
+ *result = cmd.result;
+
+ return err;
+}
+
+int nvme_zns_mgmt_send(int fd, __u32 nsid, __u64 slba, bool select_all,
+ enum nvme_zns_send_action zsa, __u32 data_len,
+ void *data)
+{
+ __u32 cdw10 = slba & 0xffffffff;
+ __u32 cdw11 = slba >> 32;
+ __u32 cdw13 = zsa | (!!select_all) << 8;
+
+ struct nvme_passthru_cmd cmd = {
+ .opcode = nvme_zns_cmd_mgmt_send,
+ .nsid = nsid,
+ .cdw10 = cdw10,
+ .cdw11 = cdw11,
+ .cdw13 = cdw13,
+ .addr = (__u64)(uintptr_t)data,
+ .data_len = data_len,
+ };
+
+ return nvme_submit_io_passthru(fd, &cmd);
+}
+
+int nvme_zns_mgmt_recv(int fd, __u32 nsid, __u64 slba,
+ enum nvme_zns_recv_action zra, __u8 zrasf,
+ bool zras_feat, __u32 data_len, void *data)
+{
+ __u32 cdw10 = slba & 0xffffffff;
+ __u32 cdw11 = slba >> 32;
+ __u32 cdw12 = (data_len >> 2) - 1;
+ __u32 cdw13 = zra | zrasf << 8 | zras_feat << 16;
+
+ struct nvme_passthru_cmd cmd = {
+ .opcode = nvme_zns_cmd_mgmt_recv,
+ .nsid = nsid,
+ .cdw10 = cdw10,
+ .cdw11 = cdw11,
+ .cdw12 = cdw12,
+ .cdw13 = cdw13,
+ .addr = (__u64)(uintptr_t)data,
+ .data_len = data_len,
+ };
+
+ return nvme_submit_io_passthru(fd, &cmd);
+}
+
+int nvme_zns_report_zones(int fd, __u32 nsid, __u64 slba, bool extended,
+ enum nvme_zns_report_options opts, bool partial,
+ __u32 data_len, void *data)
+{
+ enum nvme_zns_recv_action zra;
+
+ if (extended)
+ zra = NVME_ZNS_ZRA_EXTENDED_REPORT_ZONES;
+ else
+ zra = NVME_ZNS_ZRA_REPORT_ZONES;
+
+ return nvme_zns_mgmt_recv(fd, nsid, slba, zra, opts, partial,
+ data_len, data);
+}
+
+int nvme_zns_append(int fd, __u32 nsid, __u64 zslba, __u16 nlb, __u16 control,
+ __u32 ilbrt, __u16 lbat, __u16 lbatm, __u32 data_len,
+ void *data, __u32 metadata_len, void *metadata,
+ __u64 *result)
+{
+ __u32 cdw10 = zslba & 0xffffffff;
+ __u32 cdw11 = zslba >> 32;
+ __u32 cdw12 = nlb | (control << 16);
+ __u32 cdw14 = ilbrt;
+ __u32 cdw15 = lbat | (lbatm << 16);
+
+ struct nvme_passthru_cmd64 cmd = {
+ .opcode = nvme_zns_cmd_append,
+ .nsid = nsid,
+ .cdw10 = cdw10,
+ .cdw11 = cdw11,
+ .cdw12 = cdw12,
+ .cdw14 = cdw14,
+ .cdw15 = cdw15,
+ .metadata = (__u64)(uintptr_t)metadata,
+ .addr = (__u64)(uintptr_t)data,
+ .metadata_len = metadata_len,
+ .data_len = data_len,
+ };
+
+ int err;
+
+ err = ioctl(fd, NVME_IOCTL_IO64_CMD, &cmd);
+ if (!err && result)
+ *result = cmd.result;
+ return err;
+}
diff --git a/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/src/nvme-ioctl.h b/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/src/nvme-ioctl.h
new file mode 100644
index 0000000..830a1c8
--- /dev/null
+++ b/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/src/nvme-ioctl.h
@@ -0,0 +1,180 @@
+#ifndef _NVME_LIB_H
+#define _NVME_LIB_H
+
+#include
+#include
+#include "linux/nvme_ioctl.h"
+#include "nvme.h"
+
+#define NVME_IOCTL_TIMEOUT 120000 /* in milliseconds */
+
+int nvme_get_nsid(int fd);
+
+/* Generic passthrough */
+int nvme_submit_passthru(int fd, unsigned long ioctl_cmd,
+ struct nvme_passthru_cmd *cmd);
+int nvme_submit_admin_passthru(int fd, struct nvme_passthru_cmd *cmd);
+int nvme_submit_io_passthru(int fd, struct nvme_passthru_cmd *cmd);
+
+int nvme_passthru(int fd, unsigned long ioctl_cmd, __u8 opcode, __u8 flags,
+ __u16 rsvd, __u32 nsid, __u32 cdw2, __u32 cdw3,
+ __u32 cdw10, __u32 cdw11, __u32 cdw12,
+ __u32 cdw13, __u32 cdw14, __u32 cdw15,
+ __u32 data_len, void *data, __u32 metadata_len,
+ void *metadata, __u32 timeout_ms, __u32 *result);
+
+
+/* NVME_SUBMIT_IO */
+int nvme_io(int fd, __u8 opcode, __u64 slba, __u16 nblocks, __u16 control,
+ __u32 dsmgmt, __u32 reftag, __u16 apptag,
+ __u16 appmask, void *data, void *metadata);
+
+/* NVME_IO_CMD */
+int nvme_passthru_io(int fd, __u8 opcode, __u8 flags, __u16 rsvd,
+ __u32 nsid, __u32 cdw2, __u32 cdw3,
+ __u32 cdw10, __u32 cdw11, __u32 cdw12,
+ __u32 cdw13, __u32 cdw14, __u32 cdw15,
+ __u32 data_len, void *data, __u32 metadata_len,
+ void *metadata, __u32 timeout);
+
+int nvme_write_zeros(int fd, __u32 nsid, __u64 slba, __u16 nlb,
+ __u16 control, __u32 reftag, __u16 apptag, __u16 appmask);
+
+int nvme_write_uncorrectable(int fd, __u32 nsid, __u64 slba, __u16 nlb);
+
+int nvme_verify(int fd, __u32 nsid, __u64 slba, __u16 nblocks,
+ __u16 control, __u32 reftag, __u16 apptag, __u16 appmask);
+
+int nvme_flush(int fd, __u32 nsid);
+
+int nvme_dsm(int fd, __u32 nsid, __u32 cdw11, struct nvme_dsm_range *dsm,
+ __u16 nr_ranges);
+struct nvme_dsm_range *nvme_setup_dsm_range(int *ctx_attrs, int *llbas,
+ unsigned long long *slbas,
+ __u16 nr_ranges);
+
+int nvme_copy(int fd, __u32 nsid, struct nvme_copy_range *copy, __u64 sdlba,
+ __u16 nr, __u8 prinfor, __u8 prinfow, __u8 dtype, __u16 dspec,
+ __u8 format, int lr, int fua, __u32 ilbrt, __u16 lbatm,
+ __u16 lbat);
+struct nvme_copy_range *nvme_setup_copy_range(int *nlbs, unsigned long long *slbas,
+ int *eilbrts, int *elbatms, int *elbats, __u16 nr);
+
+int nvme_resv_acquire(int fd, __u32 nsid, __u8 rtype, __u8 racqa,
+ bool iekey, __u64 crkey, __u64 nrkey);
+int nvme_resv_register(int fd, __u32 nsid, __u8 rrega, __u8 cptpl,
+ bool iekey, __u64 crkey, __u64 nrkey);
+int nvme_resv_release(int fd, __u32 nsid, __u8 rtype, __u8 rrela,
+ bool iekey, __u64 crkey);
+int nvme_resv_report(int fd, __u32 nsid, __u32 numd, __u32 cdw11, void *data);
+
+/* NVME_ADMIN_CMD */
+int nvme_identify13(int fd, __u32 nsid, __u32 cdw10, __u32 cdw11, void *data);
+int nvme_identify(int fd, __u32 nsid, __u32 cdw10, void *data);
+int nvme_identify_ctrl(int fd, void *data);
+int nvme_identify_ns(int fd, __u32 nsid, bool present, void *data);
+int nvme_identify_ns_list(int fd, __u32 nsid, bool all, void *data);
+int nvme_identify_ns_list_csi(int fd, __u32 nsid, __u8 csi, bool all, void *data);
+int nvme_identify_ctrl_list(int fd, __u32 nsid, __u16 cntid, void *data);
+int nvme_identify_ns_descs(int fd, __u32 nsid, void *data);
+int nvme_identify_nvmset(int fd, __u16 nvmset_id, void *data);
+int nvme_identify_uuid(int fd, void *data);
+int nvme_identify_secondary_ctrl_list(int fd, __u32 nsid, __u16 cntid, void *data);
+int nvme_identify_ns_granularity(int fd, void *data);
+int nvme_identify_ctrl_nvm(int fd, void *data);
+int nvme_zns_identify_ctrl(int fd, void *data);
+int nvme_zns_identify_ns(int fd, __u32 nsid, void *data);
+int nvme_identify_iocs(int fd, __u16 cntid, void *data);
+int nvme_get_log(int fd, __u32 nsid, __u8 log_id, bool rae,
+ __u8 lsp, __u32 data_len, void *data);
+int nvme_get_log14(int fd, __u32 nsid, __u8 log_id, __u8 lsp, __u64 lpo,
+ __u16 group_id, bool rae, __u8 uuid_ix,
+ __u32 data_len, void *data);
+int nvme_get_log13(int fd, __u32 nsid, __u8 log_id, __u8 lsp,
+ __u64 lpo, __u16 lsi, bool rae, __u32 data_len,
+ void *data);
+int nvme_get_telemetry_log(int fd, void *lp, int generate_report,
+ int ctrl_gen, size_t log_page_size, __u64 offset);
+int nvme_fw_log(int fd, struct nvme_firmware_log_page *fw_log);
+int nvme_changed_ns_list_log(int fd,
+ struct nvme_changed_ns_list_log *changed_ns_list_log);
+int nvme_error_log(int fd, int entries, struct nvme_error_log_page *err_log);
+int nvme_smart_log(int fd, __u32 nsid, struct nvme_smart_log *smart_log);
+int nvme_ana_log(int fd, void *ana_log, size_t ana_log_len, int rgo);
+int nvme_effects_log(int fd, struct nvme_effects_log_page *effects_log);
+int nvme_discovery_log(int fd, struct nvmf_disc_rsp_page_hdr *log, __u32 size);
+int nvme_sanitize_log(int fd, struct nvme_sanitize_log_page *sanitize_log);
+int nvme_predictable_latency_per_nvmset_log(int fd,
+ __u16 nvmset_id, struct nvme_predlat_per_nvmset_log_page *plpns_log);
+int nvme_predictable_latency_event_agg_log(int fd, void *pea_log,
+ bool rae, __u32 size);
+int nvme_persistent_event_log(int fd, __u8 action, __u32 size,
+ void *pevent_log_info);
+int nvme_endurance_group_event_agg_log(int fd, void *endurance_log,
+ bool rae, __u32 size);
+int nvme_endurance_log(int fd, __u16 group_id,
+ struct nvme_endurance_group_log *endurance_log);
+int nvme_lba_status_log(int fd, void *lba_status, bool rae,
+ __u32 size);
+int nvme_resv_notif_log(int fd, struct nvme_resv_notif_log *resv);
+int nvme_feature(int fd, __u8 opcode, __u32 nsid, __u32 cdw10,
+ __u32 cdw11, __u32 cdw12, __u32 data_len, void *data,
+ __u32 *result);
+int nvme_set_feature(int fd, __u32 nsid, __u8 fid, __u32 value, __u32 cdw12,
+ bool save, __u32 data_len, void *data, __u32 *result);
+int nvme_get_feature(int fd, __u32 nsid, __u8 fid, __u8 sel,
+ __u32 cdw11, __u32 data_len, void *data, __u32 *result);
+
+int nvme_format(int fd, __u32 nsid, __u8 lbaf, __u8 ses, __u8 pi,
+ __u8 pil, __u8 ms, __u32 timeout);
+
+int nvme_ns_create(int fd, __u64 nsze, __u64 ncap, __u8 flbas, __u8 dps,
+ __u8 nmic, __u32 anagrpid, __u16 nvmsetid, __u8 csi,
+ __u32 timeout, __u32 *result);
+int nvme_ns_delete(int fd, __u32 nsid, __u32 timeout);
+
+int nvme_ns_attachment(int fd, __u32 nsid, __u16 num_ctrls,
+ __u16 *ctrlist, bool attach);
+
+int nvme_fw_download(int fd, __u32 offset, __u32 data_len, void *data);
+int nvme_fw_commit(int fd, __u8 slot, __u8 action, __u8 bpid);
+
+int nvme_sec_send(int fd, __u32 nsid, __u8 nssf, __u16 spsp,
+ __u8 secp, __u32 tl, __u32 data_len, void *data);
+int nvme_sec_recv(int fd, __u32 nsid, __u8 nssf, __u16 spsp,
+ __u8 secp, __u32 al, __u32 data_len, void *data);
+
+int nvme_subsystem_reset(int fd);
+int nvme_reset_controller(int fd);
+int nvme_ns_rescan(int fd);
+
+int nvme_get_lba_status(int fd, __u32 namespace_id, __u64 slba, __u32 mndw,
+ __u8 atype, __u16 rl, void *data);
+int nvme_dir_send(int fd, __u32 nsid, __u16 dspec, __u8 dtype, __u8 doper,
+ __u32 data_len, __u32 dw12, void *data, __u32 *result);
+int nvme_dir_recv(int fd, __u32 nsid, __u16 dspec, __u8 dtype, __u8 doper,
+ __u32 data_len, __u32 dw12, void *data, __u32 *result);
+int nvme_get_properties(int fd, void **pbar);
+int nvme_set_property(int fd, int offset, uint64_t value);
+int nvme_get_property(int fd, int offset, uint64_t *value);
+int nvme_sanitize(int fd, __u8 sanact, __u8 ause, __u8 owpass, __u8 oipbp,
+ __u8 no_dealloc, __u32 ovrpat);
+int nvme_self_test_start(int fd, __u32 nsid, __u8 stc);
+int nvme_self_test_log(int fd, __u32 nsid, struct nvme_self_test_log *self_test_log);
+int nvme_virtual_mgmt(int fd, __u32 cdw10, __u32 cdw11, __u32 *result);
+
+int nvme_zns_mgmt_send(int fd, __u32 nsid, __u64 slba, bool select_all,
+ enum nvme_zns_send_action zsa, __u32 data_len,
+ void *data);
+int nvme_zns_mgmt_recv(int fd, __u32 nsid, __u64 slba,
+ enum nvme_zns_recv_action zra, __u8 zrasf,
+ bool zras_feat, __u32 data_len, void *data);
+int nvme_zns_report_zones(int fd, __u32 nsid, __u64 slba, bool extended,
+ enum nvme_zns_report_options opts, bool partial,
+ __u32 data_len, void *data);
+int nvme_zns_append(int fd, __u32 nsid, __u64 zslba, __u16 nlb, __u16 control,
+ __u32 ilbrt, __u16 lbat, __u16 lbatm, __u32 data_len,
+ void *data, __u32 metadata_len, void *metadata,
+ __u64 *result);
+
+#endif /* _NVME_LIB_H */
diff --git a/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/src/nvme.h b/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/src/nvme.h
new file mode 100644
index 0000000..9b7da32
--- /dev/null
+++ b/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/src/nvme.h
@@ -0,0 +1,101 @@
+/*
+ * Definitions for the NVM Express interface
+ * Copyright (c) 2011-2014, Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ */
+
+#ifndef _NVME_H
+#define _NVME_H
+
+#include
+#include
+#include
+#include
+#include
+
+#include "linux/nvme.h"
+
+struct nvme_subsystem;
+struct nvme_ctrl;
+
+struct nvme_namespace {
+ char *name;
+ struct nvme_ctrl *ctrl;
+
+ unsigned nsid;
+ struct nvme_id_ns ns;
+};
+
+struct nvme_ctrl {
+ char *name;
+ char *path;
+ struct nvme_subsystem *subsys;
+
+ char *address;
+ char *transport;
+ char *state;
+ char *ana_state;
+ char *traddr;
+ char *trsvcid;
+ char *host_traddr;
+ char *hostnqn;
+ char *hostid;
+
+ struct nvme_id_ctrl id;
+
+ int nr_namespaces;
+ struct nvme_namespace *namespaces;
+};
+
+struct nvme_subsystem {
+ char *name;
+ char *subsysnqn;
+
+ int nr_ctrls;
+ struct nvme_ctrl *ctrls;
+
+ int nr_namespaces;
+ struct nvme_namespace *namespaces;
+};
+
+struct nvme_topology {
+ int nr_subsystems;
+ struct nvme_subsystem *subsystems;
+};
+
+#define SYS_NVME "/sys/class/nvme"
+
+extern const char *devicename;
+extern const char *output_format;
+
+char *nvme_char_from_block(char *block);
+void *mmap_registers(const char *dev);
+
+extern int current_index;
+int scan_ctrl_namespace_filter(const struct dirent *d);
+int scan_namespace_filter(const struct dirent *d);
+int scan_ctrl_paths_filter(const struct dirent *d);
+int scan_ctrls_filter(const struct dirent *d);
+int scan_subsys_filter(const struct dirent *d);
+int scan_dev_filter(const struct dirent *d);
+
+int scan_subsystems(struct nvme_topology *t, const char *subsysnqn,
+ __u32 ns_instance, int nsid, char *dev_dir);
+void free_topology(struct nvme_topology *t);
+char *get_nvme_subsnqn(char *path);
+char *nvme_get_ctrl_attr(char *path, const char *attr);
+
+void *nvme_alloc(size_t len, bool *huge);
+void nvme_free(void *p, bool huge);
+
+unsigned long long elapsed_utime(struct timeval start_time,
+ struct timeval end_time);
+#endif /* _NVME_H */
diff --git a/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/src/onlp_mdio.c b/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/src/onlp_mdio.c
new file mode 100644
index 0000000..22c2cc7
--- /dev/null
+++ b/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/src/onlp_mdio.c
@@ -0,0 +1,260 @@
+/************************************************************
+ *
+ *
+ * Copyright 2014, 2015 Big Switch Networks, Inc.
+ *
+ * Licensed under the Eclipse Public License, Version 1.0 (the
+ * "License"); you may not use this file except in compliance
+ * with the License. You may obtain a copy of the License at
+ *
+ * http://www.eclipse.org/legal/epl-v10.html
+ *
+ * Unless required by applicable law or agreed to in writing,
+ * software distributed under the License is distributed on an
+ * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+ * either express or implied. See the License for the specific
+ * language governing permissions and limitations under the
+ * License.
+ *
+ *
+ ************************************************************
+ *
+ *
+ *
+ ***********************************************************/
+#include "onlp_mdio.h"
+
+//#if ONLPLIB_CONFIG_INCLUDE_MDIO == 1
+
+#include
+#include
+#include
+
+#include
+#include
+#include
+#include
+#include "arm64_wistron_wtp_01_c1_00_log.h"
+
+/*
+int
+onlp_mdio_open(int psu_id, uint8_t cob)
+{
+ return ONLP_STATUS_E_MDIO;
+}
+*/
+
+/*
+static int parse_phyaddr_devtype(char *text, config_mdio *loc_config)
+{
+ unsigned long port, dev;
+ char *end;
+
+ //port = strtoul(text, &end, 0);
+ if (!end[0]) {
+ // simple phy address
+ loc_config->phy_addr = port;
+ loc_config->is_C45 = 0; //is C22
+ return 0;
+ }
+
+ if (end[0] != ':') {
+ // not clause 45 either
+ return 1;
+ }
+
+ dev = strtoul(end + 1, &end, 0);
+ if (end[0])
+ return 1;
+
+ loc_config->phy_addr = port;
+ loc_config->dev_addr = dev;
+ loc_config->is_C45 = 1; //is C45
+
+ return 0;
+}
+*/
+
+int
+onlp_mdio_read_c22(uint32_t addr, uint32_t reg, uint16_t *value)
+{
+ int fd;
+ config_mdio loc_config;
+
+ fd = open("/dev/ENETC_MDIO_DEV", O_RDWR);
+
+ if( fd < 0 ) {
+ AIM_LOG_ERROR("Character Device[/dev/ENETC_MDIO_DEV] not opened [%d] ::: Device Driver Not Inserted\n",fd);
+ return -1;
+ }
+/*
+ ret = parse_phyaddr_devtype(addr, &loc_config);
+ if (ret) {
+ goto error;
+ }
+ */
+ loc_config.phy_addr = addr;
+ loc_config.dev_addr = addr;
+ loc_config.reg_addr = reg;
+ loc_config.is_C45 = 0; //is C22
+ //loc_config.reg_addr = strtoul(reg, NULL, 0);
+
+
+ if (ioctl(fd, ENETC_MDIO_READ,&loc_config) == -1)
+ {
+ //clean_stdin();
+ AIM_LOG_ERROR("MDIO address[%x] read failed\n", loc_config.phy_addr);
+ goto error;
+ }
+
+ *value = loc_config.value;
+
+ close (fd);
+
+ return loc_config.value;
+
+ error:
+ close(fd);
+
+ return ONLP_STATUS_E_INVALID;
+}
+
+
+int
+onlp_mdio_write_c22(uint32_t addr, uint32_t reg, uint16_t value)
+{
+ int fd;
+ config_mdio loc_config;
+
+ fd = open("/dev/ENETC_MDIO_DEV", O_RDWR);
+
+ if( fd < 0 ) {
+ AIM_LOG_ERROR("Character Device[/dev/ENETC_MDIO_DEV] not opened [%d] ::: Device Driver Not Inserted\n",fd);
+ return -1;
+ }
+/*
+ ret = parse_phyaddr_devtype(addr, &loc_config);
+ if (ret) {
+ goto error;
+ }
+*/
+
+ loc_config.phy_addr = addr;
+ loc_config.dev_addr = addr;
+ loc_config.reg_addr = reg;
+ loc_config.is_C45 = 0; //is C22
+ //loc_config.reg_addr = strtoul(reg, NULL, 0);
+ loc_config.value = value;
+
+ if (ioctl(fd, ENETC_MDIO_WRITE,&loc_config) == -1)
+ {
+ //clean_stdin();
+ AIM_LOG_ERROR("MDIO address[%x] write failed\n", loc_config.phy_addr);
+ goto error;
+ }
+
+
+ close (fd);
+
+ return loc_config.value;
+
+ error:
+ close(fd);
+
+ return ONLP_STATUS_E_INVALID;
+}
+
+
+int
+onlp_mdio_read_c45(uint32_t addr, uint32_t reg, uint16_t *value)
+{
+ int fd;
+ config_mdio loc_config;
+
+ fd = open("/dev/ENETC_MDIO_DEV", O_RDWR);
+
+ if( fd < 0 ) {
+ AIM_LOG_ERROR("Character Device[/dev/ENETC_MDIO_DEV] not opened [%d] ::: Device Driver Not Inserted\n",fd);
+ //printf("Character Device[/dev/ENETC_MDIO_DEV] not opened [%d] ::: Device Driver Not Inserted\n",fd);
+ return -1;
+ }
+/*
+ ret = parse_phyaddr_devtype(addr, &loc_config);
+ if (ret) {
+ goto error;
+ }
+ */
+ loc_config.phy_addr = addr;
+ loc_config.dev_addr = 1;
+ loc_config.reg_addr = reg;
+ loc_config.is_C45 = 1;
+ //loc_config.reg_addr = strtoul(reg, NULL, 0);
+
+
+ if (ioctl(fd, ENETC_MDIO_READ,&loc_config) == -1)
+ {
+ //clean_stdin();
+ AIM_LOG_ERROR("MDIO address[%x] read failed\n", loc_config.phy_addr);
+ //printf("MDIO address[%x] read failed\n", loc_config.phy_addr);
+ goto error;
+ }
+
+ //printf("[MDIO_READ] addr[%x]: reg[%x], value[%x]\n", addr, reg, loc_config.value);
+ *value = loc_config.value;
+
+ close (fd);
+
+ return loc_config.value;
+
+ error:
+ close(fd);
+
+ return ONLP_STATUS_E_INVALID;
+}
+
+
+int
+onlp_mdio_write_c45(uint32_t addr, uint32_t reg, uint16_t value)
+{
+ int fd;
+ config_mdio loc_config;
+
+ fd = open("/dev/ENETC_MDIO_DEV", O_RDWR);
+
+ if( fd < 0 ) {
+ AIM_LOG_ERROR("Character Device[/dev/ENETC_MDIO_DEV] not opened [%d] ::: Device Driver Not Inserted\n",fd);
+ return -1;
+ }
+/*
+ ret = parse_phyaddr_devtype(addr, &loc_config);
+ if (ret) {
+ goto error;
+ }
+*/
+
+ loc_config.phy_addr = addr;
+ loc_config.dev_addr = 1;
+ loc_config.reg_addr = reg;
+ loc_config.is_C45 = 1;
+ //loc_config.reg_addr = strtoul(reg, NULL, 0);
+ loc_config.value = value;
+
+ if (ioctl(fd, ENETC_MDIO_WRITE,&loc_config) == -1)
+ {
+ //clean_stdin();
+ AIM_LOG_ERROR("MDIO address[%x] write failed\n", loc_config.phy_addr);
+ goto error;
+ }
+
+
+ close (fd);
+
+ return loc_config.value;
+
+ error:
+ close(fd);
+
+ return ONLP_STATUS_E_INVALID;
+}
+
+//#endif /* ONLPLIB_CONFIG_INCLUDE_MDIO */
diff --git a/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/src/onlp_mdio.h b/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/src/onlp_mdio.h
new file mode 100644
index 0000000..2a9599d
--- /dev/null
+++ b/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/src/onlp_mdio.h
@@ -0,0 +1,90 @@
+/************************************************************
+ *
+ *
+ * Copyright 2015 Big Switch Networks, Inc.
+ *
+ * Licensed under the Eclipse Public License, Version 1.0 (the
+ * "License"); you may not use this file except in compliance
+ * with the License. You may obtain a copy of the License at
+ *
+ * http://www.eclipse.org/legal/epl-v10.html
+ *
+ * Unless required by applicable law or agreed to in writing,
+ * software distributed under the License is distributed on an
+ * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+ * either express or implied. See the License for the specific
+ * language governing permissions and limitations under the
+ * License.
+ *
+ *
+ ************************************************************
+ *
+ * Common MDIO processing for all platform implementations.
+ *
+ ***********************************************************/
+#ifndef __ONLP_MDIO_H__
+#define __ONLP_MDIO_H__
+
+#include
+#include
+#include
+
+#include
+#include
+#include
+
+
+
+//#if ONLPLIB_CONFIG_INCLUDE_MDIO == 1
+
+#define MPCI_IOC_MAGIC 'm'
+
+typedef struct {
+
+ bool is_C45;
+ bool is_disable_mdio;
+ uint32_t phy_addr;
+ uint32_t dev_addr;
+ uint32_t reg_addr;
+ uint16_t value;
+
+}config_mdio;
+
+#define ENETC_MDIO_WRITE _IOWR(MPCI_IOC_MAGIC, 0, config_mdio)
+#define ENETC_MDIO_READ _IOWR(MPCI_IOC_MAGIC, 1, config_mdio)
+#define ENETC_MDIO_CONFIG _IOWR(MPCI_IOC_MAGIC, 2, config_mdio)
+
+#define SFP1_PHYADDRESS 9
+#define SFP2_PHYADDRESS 8
+#define SFP_LED_REGISTER 0x1D
+#define SFP_LED_BIT_GREEN 0
+#define SFP_LED_BIT_YELLOW 12
+
+#define CFP2_1_PHYADDRESS 0
+#define CFP2_2_PHYADDRESS 1
+#define CFP2_3_PHYADDRESS 2
+#define CFP2_4_PHYADDRESS 3
+
+/**
+ * @brief Read i2c data.
+ * @param bus The i2c bus number.
+ * @param addr The slave address.
+ * @param offset The byte offset.
+ * @param size The byte count.
+ * @param rdata [out] Receives the data.
+ * @param flags See ONLP_I2C_F_*
+ * @note This function reads a byte at a time.
+ * See onlp_i2c_read_block() for block reads.
+ */
+
+
+int onlp_mdio_read_c22(uint32_t addr, uint32_t reg_addr, uint16_t* value);
+int onlp_mdio_write_c22(uint32_t addr, uint32_t reg_addr, uint16_t value);
+
+int onlp_mdio_read_c45(uint32_t addr, uint32_t reg_addr, uint16_t* value);
+int onlp_mdio_write_c45(uint32_t addr, uint32_t reg_addr, uint16_t value);
+
+
+//#endif /* ONLPLIB_CONFIG_INCLUDE_MDIO */
+
+#endif /* __ONLP_MDIO_H__ */
diff --git a/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/src/platform_lib.c b/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/src/platform_lib.c
new file mode 100644
index 0000000..aa05f0f
--- /dev/null
+++ b/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/src/platform_lib.c
@@ -0,0 +1,417 @@
+/************************************************************
+ *
+ *
+ * Copyright 2014 Big Switch Networks, Inc.
+ *
+ * Licensed under the Eclipse Public License, Version 1.0 (the
+ * "License"); you may not use this file except in compliance
+ * with the License. You may obtain a copy of the License at
+ *
+ * http://www.eclipse.org/legal/epl-v10.html
+ *
+ * Unless required by applicable law or agreed to in writing,
+ * software distributed under the License is distributed on an
+ * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+ * either express or implied. See the License for the specific
+ * language governing permissions and limitations under the
+ * License.
+ *
+ *
+ ************************************************************
+ *
+ *
+ *
+ ***********************************************************/
+#include "platform_lib.h"
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define PSU_MODEL_NAME_LEN 14
+#define PSU_SERIAL_NUMBER_LEN 14
+#define PSU_NODE_MAX_PATH_LEN 64
+
+#define FPGA_PCI_PATH "/sys/bus/pci/devices/0001:01:00.0/resource0"
+
+#define DSP_ADDR 0x6a
+#define DSP_READ_MAX_RETRY 50000
+#define DSP_WRITE_MAX_RETRY 10
+#define DSP_BUSY_VALUE 1
+#define DSP_NOBUSY_VALUE 0
+#define NTT_I2C_CMD_WAIT_US 100000
+
+int dsp_exec_read(int bus, struct dsp_ctrl_s* dsp_ctrl, int *ret_val)
+{
+ int i = 0, ret = 0;
+ uint8_t value = 0, offset = 0;
+
+ if (ret_val) {
+ *ret_val = 0;
+ }
+
+ /* Set the address to be read into register 0x10 ~ 0x13
+ */
+ for (i = 0; i <= 3; i++) {
+ offset = 0x10 + i;
+ value = (dsp_ctrl->value1 >> (8 * (3-i))) & 0xff;
+
+ ret = onlp_i2c_writeb(bus, DSP_ADDR, offset, value, ONLP_I2C_F_FORCE);
+ if (ret < 0) {
+ DEBUG_PRINT("%s(%d): Failed to write data into bus(%d), addr(0x%x), offset(0x%x), value(0x%x), error code(%d)\r\n",
+ __FUNCTION__, __LINE__, bus, DSP_ADDR, offset, value, ret);
+ return ret;
+ }
+ }
+
+ // Trigger the read operation : write 0x2 to Reg0x1 of dsp controller
+ offset = 0x01;
+ value = 0x02;
+ ret = onlp_i2c_writeb(bus, DSP_ADDR, offset, value, ONLP_I2C_F_FORCE);
+ if (ret < 0) {
+ DEBUG_PRINT("%s(%d): Failed to write data into bus(%d), addr(0x%x), offset(0x%x), value(0x%x), error code(%d)\r\n",
+ __FUNCTION__, __LINE__, bus, DSP_ADDR, offset, value, ret);
+ return ret;
+ }
+
+
+ // Check Reg0x02 is changed to 0x0(Busy:0x01, no-busy:0x00)
+ offset = 0x02;
+ i = DSP_READ_MAX_RETRY;
+ while(i--) {
+ ret = onlp_i2c_readb(bus, DSP_ADDR, offset, ONLP_I2C_F_FORCE);
+ if (ret < 0) {
+ DEBUG_PRINT("%s(%d): Failed to read data from bus(%d), addr(0x%x), offset(0x%x), value(0x%x), error code(%d)\r\n",
+ __FUNCTION__, __LINE__, bus, DSP_ADDR, offset, value, ret);
+ return ret;
+ }
+
+ if (ret == DSP_BUSY_VALUE) {
+ usleep(NTT_I2C_CMD_WAIT_US);
+ continue;
+ }
+
+ break;
+ }
+
+ if (ret == DSP_BUSY_VALUE) {
+ DEBUG_PRINT("%s(%d): Device is busy!! Not change to Idle\r\n", __FUNCTION__, __LINE__);
+ return ONLP_STATUS_E_INTERNAL;
+ }
+
+
+ /* Read the output data from register 0x20 ~ 0x23
+ */
+ for (i = 0; i <= 3; i++) {
+ offset = 0x20 + i;
+
+ ret = onlp_i2c_readb(bus, DSP_ADDR, offset, ONLP_I2C_F_FORCE);
+ if (ret < 0) {
+ DEBUG_PRINT("%s(%d): Failed to read data from bus(%d), addr(0x%x), offset(0x%x), value(0x%x), error code(%d)\r\n",
+ __FUNCTION__, __LINE__, bus, DSP_ADDR, offset, value, ret);
+ return ret;
+ }
+
+ if (ret_val) {
+ *ret_val <<= 8;
+ *ret_val |= (ret & 0xff);
+ }
+ }
+
+ return ret;
+}
+
+int cfp_eeprom_read(int port, uint8_t data[256])
+{
+ int i, bus, ret = 0, value = 0;
+ struct dsp_ctrl_s eeprom_cmd = {"R", 0x40008000};
+ int i2c_bus[] = {41, 43, 45, 47, 49, 51, 53, 55};
+
+ /* init dsp card */
+ bus = i2c_bus[port % 8];
+
+ /* read eeprom */
+ for (i = 0; i < 256; i++) {
+ ret = dsp_exec_read(bus, &eeprom_cmd, &value);
+
+ if (ret < 0) {
+ AIM_LOG_ERROR("Unable to read the eeprom of port (%d), check if it has been initialized properly by dsp_ctrl ", port);
+ return ret;
+ }
+
+ DEBUG_PRINT("%s(%d): command:(%s0x%x), Value(0x%x)\r\n", __FUNCTION__, __LINE__, eeprom_cmd.type, eeprom_cmd.value1, value);
+ data[i] = (value & 0xff);
+ eeprom_cmd.value1++;
+ }
+
+ return 0;
+}
+
+card_type_t
+get_card_type_by_slot(int slot)
+{
+ int type = CARD_TYPE_UNKNOWN;
+
+ if (get_piu_presence (slot)) {
+ /* Read PIU type */
+ char *string = NULL;
+ int len = onlp_file_read_str(&string, "%s""piu%d/piu_type", PIU_SYSFS_PATH, slot);
+ if (string && len) {
+ if (strncmp (string, "ACO", 3) == 0) {
+ type = CARD_TYPE_ACO;
+ }
+ else if (strncmp (string, "DCO", 3) == 0) {
+ type = CARD_TYPE_DCO;
+ }
+ else if (strncmp (string, "QSFP", 4) == 0) {
+ type = CARD_TYPE_Q28;
+ }
+ else {
+ type = CARD_TYPE_UNKNOWN;
+ }
+ }
+ else {
+ type = CARD_TYPE_UNKNOWN;
+ }
+ }
+ else {
+ type = CARD_TYPE_NOT_PRESENT;
+ }
+
+ return type;
+}
+
+card_type_t
+get_card_type_by_port(int port)
+{
+ int slotno = 0;
+ /* Get card slot of this port */
+ slotno = GET_SLOTNO_FROM_PORT(port);
+
+ return get_card_type_by_slot(slotno);
+}
+
+port_type_t
+get_port_type (int port)
+{
+ card_type_t card_type;
+ port_type_t port_type;
+
+ if (port >= QSFP_PORT_BEGIN && port <= QSFP_PORT_END) {
+ return PORT_TYPE_Q28;
+ }
+
+ /* Get card type to get correct port mapping table */
+ card_type = get_card_type_by_port(port);
+ switch (card_type) {
+ case CARD_TYPE_Q28: port_type = PORT_TYPE_PIU_Q28; break;
+ case CARD_TYPE_ACO: port_type = PORT_TYPE_PIU_ACO_200G; break;
+ case CARD_TYPE_DCO: port_type = PORT_TYPE_PIU_DCO_200G; break;
+ default: port_type = PORT_TYPE_UNKNOWN; break;
+ }
+
+ return port_type;
+}
+
+int fpga_open(fpga_context_t* fpga, off_t target, int type_width, int items_count)
+{
+ int map_size = 4096UL;
+ off_t target_base;
+ if ( fpga == NULL ) {
+ return -1;
+ }
+ fpga->fd = open(FPGA_PCI_PATH, O_RDWR | O_SYNC);
+ if ( fpga->fd < 0 ) {
+ return -1;
+ }
+ target_base = target & ~(sysconf(_SC_PAGE_SIZE)-1);
+
+ if (target + items_count*type_width - target_base > map_size)
+ map_size = target + items_count*type_width - target_base;
+
+ fpga->map_base = mmap(0, map_size, PROT_READ | PROT_WRITE, MAP_SHARED, fpga->fd, target_base);
+ //printf("[FPGA READ] target_base[%lx], target[%lx], type_width[%x], items_count[%x]\n", target_base, target, type_width, items_count);
+ if ( fpga->map_base == (void*)-1 ) {
+ close(fpga->fd);
+ fpga->fd = 0;
+ return -1;
+ }
+ fpga->map_size = map_size;
+ fpga->target = target;
+ fpga->target_base = target_base;
+ fpga->type_width = type_width;
+ fpga->items_count = items_count;
+ return 0;
+}
+
+int fpga_close(fpga_context_t* fpga) {
+ if (fpga == NULL ) {
+ return 0;
+ }
+ munmap(fpga->map_base, fpga->map_size);
+ close(fpga->fd);
+ fpga->fd = 0;
+ fpga->map_base = NULL;
+ fpga->map_size = 0;
+ return 0;
+}
+
+int fpga_read(int offset, int *value)
+{
+ fpga_context_t ctx;
+ int rv;
+ void *virt_addr;
+ rv = fpga_open(&ctx, offset, 4, 1);
+ if ( rv < 0 ) return rv;
+ virt_addr = ctx.map_base + ctx.target - ctx.target_base;
+ *value = *((uint32_t *) virt_addr);
+ //printf("[FPGA READ] map_base[%p], value[%x]\n", ctx.map_base, *value);
+ return fpga_close(&ctx);
+}
+
+int fpga_write(int offset, int value)
+{
+ fpga_context_t ctx;
+ int rv;
+ void *virt_addr;
+ rv = fpga_open(&ctx, offset, 4, 1);
+ if ( rv < 0 ) return rv;
+ virt_addr = ctx.map_base + ctx.target - ctx.target_base;
+ *((uint32_t *) virt_addr) = value;
+ return fpga_close(&ctx);
+}
+
+int fpga_set_bit_low(uint16_t offset, uint16_t bit)
+{
+ fpga_context_t ctx;
+ int rv;
+ void *virt_addr;
+ uint32_t value;
+ rv = fpga_open(&ctx, offset, 4, 1);
+ if ( rv < 0 ) return rv;
+ virt_addr = ctx.map_base + ctx.target - ctx.target_base;
+ value = *((uint32_t *) virt_addr);
+ value = value & ~(1 << bit);
+ *((uint32_t *) virt_addr) = value;
+ return fpga_close(&ctx);
+}
+
+int fpga_set_bit_high(uint16_t offset, uint16_t bit)
+{
+ fpga_context_t ctx;
+ int rv;
+ void *virt_addr;
+ uint32_t value;
+ rv = fpga_open(&ctx, offset, 4, 1);
+ if ( rv < 0 ) return rv;
+ virt_addr = ctx.map_base + ctx.target - ctx.target_base;
+ value = *((uint32_t *) virt_addr);
+ value = value | (1 << bit);
+ *((uint32_t *) virt_addr) = value;
+ return fpga_close(&ctx);
+}
+
+int
+fpga_get_offset_for_xvr_presence (int port, int *register_offset,
+ int *presence_offset)
+{
+ if (port >= QSFP_PORT_BEGIN && port <= QSFP_PORT_BEGIN + 7) {
+ *register_offset = QSFP_PRES_OFFSET1;
+ *presence_offset = 1;
+ }
+ else if (port >= (QSFP_PORT_BEGIN + 8) && port <= QSFP_PORT_END) {
+ *register_offset = QSFP_PRES_OFFSET2;
+ *presence_offset = 1;
+ }
+ else if (port >= PIU_PORT_BEGIN && port <= PIU_PORT_END) {
+ *register_offset = PIU_MOD_PRES_OFFSET;
+ *presence_offset = PIU_PORT_BEGIN;
+ }
+ else {
+ return ONLP_STATUS_E_INTERNAL;
+ }
+
+ return ONLP_STATUS_OK;
+}
+
+int
+get_piu_presence (int slotno)
+{
+ int rv, pres_val, is_present;
+
+ rv = onlp_file_read_int(&pres_val, "%s/piu%d/piu_simulate_plug_out", PIU_SYSFS_PATH, slotno);
+ if (rv == ONLP_STATUS_OK && pres_val != 0 ) {
+ return 0;
+ }
+
+ rv = fpga_read (PIU_PRES_OFFSET, &pres_val);
+ if (rv != ONLP_STATUS_OK) {
+ return ONLP_STATUS_E_INTERNAL;
+ }
+
+ is_present = (((pres_val & (1 << (slotno - 1))) != 0)? 0 : 1);
+
+ return is_present;
+}
+
+int
+get_module_status (int slotno)
+{
+ int rv, pres_val, bit_pos;
+ if (slotno == 1 || slotno == 2) {
+ rv = fpga_read(0x1100090, &pres_val);
+ if ( rv != ONLP_STATUS_OK ) {
+ return ONLP_STATUS_E_INTERNAL;
+ }
+ bit_pos = slotno == 1 ? 8 : 5;
+ } else if (slotno == 3 || slotno == 4) {
+ rv = fpga_read(0x5100090, &pres_val);
+ if ( rv != ONLP_STATUS_OK ) {
+ return ONLP_STATUS_E_INTERNAL;
+ }
+ bit_pos = slotno == 3 ? 5 : 9;
+ } else {
+ return ONLP_STATUS_E_INVALID;
+ }
+
+ if ( (pres_val & (1 << bit_pos)) == 0 ) {
+ return ONLP_MODULE_STATUS_PIU_DCO_PRESENT | ONLP_MODULE_STATUS_PIU_CFP2_PRESENT;
+ }
+ return ONLP_MODULE_STATUS_UNPLUGGED;
+}
+
+
+int get_psu_presence(int idx)
+{
+ int rv, pres_val, is_present;
+
+ rv = onlp_file_read_int(&pres_val, "%s/psu%d_status", PSU_SYSFS_PATH, idx);
+ if ((rv == ONLP_STATUS_OK) && (pres_val != 0)) {
+ return 0;
+ }
+
+ is_present = pres_val;
+
+ return is_present;
+
+/* hardware present pin can't reflect real PSU status
+ int v;
+ if ( fpga_read(0x8000090, &v) != ONLP_STATUS_OK ) {
+ return -1;
+ }
+ if ( idx == 1 ) {
+ return (v & (1 << 23)) == 0;
+ } else if ( idx == 2 ) {
+ return (v & (1 << 15)) == 0;
+ }
+ return -1;
+ */
+}
+
diff --git a/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/src/platform_lib.h b/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/src/platform_lib.h
new file mode 100644
index 0000000..de6c11d
--- /dev/null
+++ b/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/src/platform_lib.h
@@ -0,0 +1,237 @@
+/************************************************************
+ *
+ *
+ * Copyright 2014 Big Switch Networks, Inc.
+ *
+ * Licensed under the Eclipse Public License, Version 1.0 (the
+ * "License"); you may not use this file except in compliance
+ * with the License. You may obtain a copy of the License at
+ *
+ * http://www.eclipse.org/legal/epl-v10.html
+ *
+ * Unless required by applicable law or agreed to in writing,
+ * software distributed under the License is distributed on an
+ * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+ * either express or implied. See the License for the specific
+ * language governing permissions and limitations under the
+ * License.
+ *
+ *
+ ************************************************************
+ *
+ *
+ *
+ ***********************************************************/
+#ifndef __PLATFORM_LIB_H__
+#define __PLATFORM_LIB_H__
+
+#include
+#include
+#include "arm64_wistron_wtp_01_c1_00_log.h"
+
+#define CHASSIS_FAN_COUNT 6
+#define CHASSIS_THERMAL_COUNT 9
+//#define CHASSIS_LED_COUNT 4
+// not count SFP1 /SFP2
+#define CHASSIS_LED_COUNT 2
+#define CHASSIS_PSU_COUNT 2
+#define CHASSIS_MODULE_COUNT 4
+
+#define CFP2_LED_COUNT 4
+#define QSFP28_LED_COUNT 16
+
+#define NUM_OF_PSU_ON_MAIN_BROAD 2
+#define NUM_OF_FAN_ON_PSU_BROAD 3
+
+
+
+#define PSU1_ID 1
+#define PSU2_ID 2
+
+#define PSU1_AC_PMBUS_PREFIX "/sys/bus/i2c/devices/18-0058/"
+#define PSU2_AC_PMBUS_PREFIX "/sys/bus/i2c/devices/17-0059/"
+
+#define PSU1_AC_PMBUS_NODE(node) PSU1_AC_PMBUS_PREFIX#node
+#define PSU2_AC_PMBUS_NODE(node) PSU2_AC_PMBUS_PREFIX#node
+
+#define PSU1_AC_EEPROM_PREFIX "/sys/bus/i2c/devices/18-0050/"
+#define PSU2_AC_EEPROM_PREFIX "/sys/bus/i2c/devices/17-0051/"
+
+#define PSU1_AC_EEPROM_NODE(node) PSU1_AC_EEPROM_PREFIX#node
+#define PSU2_AC_EEPROM_NODE(node) PSU2_AC_EEPROM_PREFIX#node
+
+#define FAN_SYSFS_PATH "/sys/devices/platform/wtp_01_c1_00_fan/"
+#define FAN_NODE(node) FAN_SYSFS_PATH#node
+
+#define PSU_SYSFS_PATH "/sys/devices/platform/wtp_01_c1_00_psu/"
+
+#define IDPROM_PATH "/sys/bus/i2c/devices/0-0053/eeprom"
+
+#define PIU_SYSFS_PATH "/sys/class/piu/"
+
+#define I2C_BUS_0 0
+
+#define FPGA_ADDR 0x30
+
+#define QSFP_PRES_OFFSET1 0x14
+#define QSFP_PRES_OFFSET2 0x15
+#define PIU_PRES_OFFSET 0x07
+#define PIU_MOD_PRES_OFFSET 0x10
+
+#define QSFP_PORT_BEGIN 1
+#define QSFP_PORT_END 12
+
+#define PIU_PORT_BEGIN 13
+#define PIU_PORT_END 20
+
+#define GET_SLOTNO_FROM_PORT(port) (((port - PIU_PORT_BEGIN)/2) + 1)
+
+#define ONLP_PSUI_SHM_KEY (0xF001100 | ONLP_OID_TYPE_PSU)
+#define SEM_LOCK do {sem_wait(&global_psui_st->mutex);} while(0)
+#define SEM_UNLOCK do {sem_post(&global_psui_st->mutex);} while(0)
+
+
+typedef enum card_type {
+ CARD_TYPE_Q28,
+ CARD_TYPE_DCO,
+ CARD_TYPE_ACO,
+ CARD_TYPE_NOT_PRESENT,
+ CARD_TYPE_UNKNOWN
+} card_type_t;
+
+typedef enum psu_type {
+ PSU_TYPE_UNKNOWN,
+ PSU_TYPE_AC,
+ PSU_TYPE_DC48V
+} psu_type_t;
+
+typedef enum port_type {
+ PORT_TYPE_Q28,
+ PORT_TYPE_PIU_Q28,
+ PORT_TYPE_PIU_ACO_200G,
+ PORT_TYPE_PIU_DCO_200G,
+ PORT_TYPE_UNKNOWN
+} port_type_t;
+
+enum onlp_thermal_id
+{
+ THERMAL_RESERVED = 0,
+ THERMAL_1_ON_SA56004,
+ THERMAL_2_ON_SA56004,
+ THERMAL_1_ON_TMP75,
+ THERMAL_2_ON_TMP75,
+ THERMAL_3_ON_TMP75,
+ THERMAL_1_ON_LM95245,
+ THERMAL_2_ON_LM95245,
+ THERMAL_3_ON_LM95245,
+ THERMAL_4_ON_LM95245,
+};
+
+enum fan_id {
+ FAN1_ON_PSU1 = 1,
+ FAN2_ON_PSU1,
+ FAN3_ON_PSU1,
+ FAN1_ON_PSU2,
+ FAN2_ON_PSU2,
+ FAN3_ON_PSU2
+};
+
+enum onlp_led_id
+{
+ LED_RESERVED = 0,
+ LED_SYS,
+ LED_PSU,
+// LED_SFP1,
+// LED_SFP2,
+ LED_QSFP1,
+ LED_QSFP2,
+ LED_QSFP3,
+ LED_QSFP4,
+ LED_QSFP5,
+ LED_QSFP6,
+ LED_QSFP7,
+ LED_QSFP8,
+ LED_QSFP9,
+ LED_QSFP10,
+ LED_QSFP11,
+ LED_QSFP12,
+ LED_QSFP13,
+ LED_QSFP14,
+ LED_QSFP15,
+ LED_QSFP16,
+ LED_CFP1,
+ LED_CFP2,
+ LED_CFP3,
+ LED_CFP4
+};
+
+enum led_light_mode {
+ LED_MODE_OFF,
+ LED_MODE_SFP_GREEN = 0x00001,
+ LED_MODE_SFP_YELLOW = 0x00002,
+ LED_MODE_SFP_GREEN_BLINKING = 0x10001,
+ LED_MODE_SFP_YELLOW_BLINKING = 0x10002,
+ LED_MODE_PSU_GREEN = 0x00001,
+ LED_MODE_PSU_RED = 0x00002,
+ LED_MODE_SYS_GREEN = 0x00001,
+ LED_MODE_SYS_RED = 0x00002,
+ LED_MODE_PSU_GREEN_BLINKING = 0x10001,
+ LED_MODE_PSU_RED_BLINKING = 0x10002,
+ LED_MODE_SYS_GREEN_BLINKING = 0x10001,
+ LED_MODE_SYS_RED_BLINKING = 0x10002,
+ LED_MODE_PSU_UNKNOWN = 9999
+};
+
+//int get_port_number(void);
+port_type_t get_port_type(int port);
+
+struct dsp_ctrl_s
+{
+ char *type;
+ unsigned int value1;
+ unsigned int value2;
+ unsigned int value3;
+ unsigned int value4;
+};
+
+int dsp_initialize(int dsp_bus);
+int dsp_exec_read(int bus, struct dsp_ctrl_s* dsp_ctrl, int *ret_val);
+int cfp_eeprom_read(int port, uint8_t data[256]);
+int
+fpga_get_offset_for_xvr_presence (int port, int *register_offset,
+ int *presence_offset);
+
+typedef struct _fpga_context_t {
+ int fd;
+ void* map_base;
+ int map_size;
+ off_t target;
+ off_t target_base;
+ int type_width;
+ int items_count;
+} fpga_context_t;
+
+int fpga_open(fpga_context_t* fpga, off_t offset, int type_width, int items_count);
+int fpga_close(fpga_context_t* fpga);
+
+int fpga_read(int offset, int *value);
+int fpga_write(int offset, int value);
+
+int fpga_set_bit_low(uint16_t offset, uint16_t bit);
+int fpga_set_bit_high(uint16_t offset, uint16_t bit);
+
+int get_module_status (int slotno);
+int get_piu_presence (int slotno);
+int onlp_sfpi_is_present(int port);
+
+#define DEBUG_MODE 0
+
+#if (DEBUG_MODE == 1)
+ #define DEBUG_PRINT(fmt, args...) \
+ printf("%s:%s[%d]: " fmt "\r\n", __FILE__, __FUNCTION__, __LINE__, ##args)
+#else
+ #define DEBUG_PRINT(fmt, args...)
+#endif
+
+#endif /* __PLATFORM_LIB_H__ */
+
diff --git a/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/src/psui.c b/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/src/psui.c
new file mode 100644
index 0000000..1eb12bb
--- /dev/null
+++ b/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/src/psui.c
@@ -0,0 +1,180 @@
+/************************************************************
+ *
+ *
+ * Copyright 2014 Big Switch Networks, Inc.
+ *
+ * Licensed under the Eclipse Public License, Version 1.0 (the
+ * "License"); you may not use this file except in compliance
+ * with the License. You may obtain a copy of the License at
+ *
+ * http://www.eclipse.org/legal/epl-v10.html
+ *
+ * Unless required by applicable law or agreed to in writing,
+ * software distributed under the License is distributed on an
+ * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+ * either express or implied. See the License for the specific
+ * language governing permissions and limitations under the
+ * License.
+ *
+ *
+ ************************************************************
+ *
+ *
+ *
+ ***********************************************************/
+#include
+#include
+#include "platform_lib.h"
+
+/*---------------------------------------------------------*/
+#define PSU_FORMAT "/sys/devices/platform/wtp_01_c1_00_psu/%s"
+
+#define VALIDATE(_id) \
+ do { \
+ if(!ONLP_OID_IS_PSU(_id)) { \
+ return ONLP_STATUS_E_INVALID; \
+ } \
+ } while(0)
+
+
+
+char POWER_MODEL[4][10] = { "DC48V PSU", "DC48V PSU", "AC PSU", "AC PSU" };
+char POWER_STATUS[2][11] = {"Power Fail","Power Good"};
+char EVENT_STATUS[2][12] = {"No Occurred","Occurred"};
+
+
+int
+onlp_psui_init(void)
+{
+ return ONLP_STATUS_OK;
+}
+
+/*
+ * Get all information about the given PSU oid.
+ */
+static onlp_psu_info_t pinfo[] =
+{
+ { }, /* Not used */
+ {
+ { ONLP_PSU_ID_CREATE(PSU1_ID), "PSU-1", 0 },
+ },
+ {
+ { ONLP_PSU_ID_CREATE(PSU2_ID), "PSU-2", 0 },
+ }
+};
+
+/*
+int onlp_psui_status_get (onlp_oid_t id, uint32_t* rv)
+{
+ int pid = ONLP_OID_ID_GET(id);
+
+ return psu_status_get (pid, rv);
+}
+*/
+
+int
+onlp_psui_info_get(onlp_oid_t id, onlp_psu_info_t* info)
+{
+ int val = 0, len = 0;
+ int ret = ONLP_STATUS_OK;
+ int index = ONLP_OID_ID_GET(id);
+ //uint32_t status;
+
+ VALIDATE(id);
+
+ memset(info, 0, sizeof(onlp_psu_info_t));
+ *info = pinfo[index]; /* Set the onlp_oid_hdr_t */
+
+ /* Get the present state */
+ ret = onlp_file_read_int(&val, "%s""psu%d_status", PSU_SYSFS_PATH, index);
+ if (ret < 0) {
+ AIM_LOG_ERROR("Unable to read status from (%s""psu%d_status)\r\n", PSU_SYSFS_PATH, index);
+
+ return ONLP_STATUS_E_INTERNAL;
+ } else if (val == 0) {
+ info->status |= ONLP_PSU_STATUS_UNPLUGGED;
+
+ return ONLP_STATUS_OK;
+ }
+
+ info->status |= ONLP_PSU_STATUS_PRESENT;
+
+ /* Read psu type */
+ char *string = NULL;
+
+ len = onlp_file_read_str(&string, "%s""psu%d_type", PSU_SYSFS_PATH, index);
+ if (string && len) {
+ aim_strlcpy(info->model, string, len+1);
+ aim_free(string);
+ }
+
+ /* Get the PSU pout */
+/*
+ ret = onlp_file_read_int(&val, "%s""psu%d_pout", PSU_SYSFS_PATH, index);
+ if (ret == 0) {
+ info->caps |= ONLP_PSU_CAPS_POUT;
+ info->mpout = val;
+ }
+*/
+ /* Get the PSU pin */
+ /*
+ ret = onlp_file_read_int(&val, "%s""psu%d_pin", PSU_SYSFS_PATH, index);
+ if (ret == 0) {
+ info->caps |= ONLP_PSU_CAPS_PIN;
+ info->mpin = val;
+ }
+*/
+
+ /* Get the PSU vout */
+ ret = onlp_file_read_int(&val, "%s""psu%d_vout", PSU_SYSFS_PATH, index);
+ if (ret == 0) {
+ info->caps |= ONLP_PSU_CAPS_VOUT;
+ info->mvout = val; /* values read from the file are in milli */
+ }
+
+ /* Get the PSU vin */
+ ret = onlp_file_read_int(&val, "%s""psu%d_vin", PSU_SYSFS_PATH, index);
+ if (ret == 0) {
+ info->caps |= ONLP_PSU_CAPS_VIN;
+ info->mvin = val; /* values read from the file are in milli */
+ }
+
+ /* Get the PSU iout */
+ if (strcmp(info->model, POWER_MODEL[0]) == 0)
+ {
+ /* DC PSU Get the PSU iout */
+ ret = onlp_file_read_int(&val, "%s""psu%d_iout", PSU_SYSFS_PATH, index);
+ if (ret == 0) {
+ info->caps |= ONLP_PSU_CAPS_IOUT;
+ info->miout = val; /* values read from the file are in milli*/
+ }
+ } else if (strcmp(info->model, POWER_MODEL[2]) == 0) {
+ /* AC PSU Get the PSU iin */
+ ret = onlp_file_read_int(&val, "%s""psu%d_iin", PSU_SYSFS_PATH, index);
+ if (ret == 0) {
+ info->caps |= ONLP_PSU_CAPS_IIN;
+ info->miin = val; /* values read from the file are in milli */
+ }
+ }
+
+
+ /* Set the associated oid_table */
+ val = 0;
+ if (onlp_file_read_int(&val, "%s""psu%d_fan_rpm", PSU_SYSFS_PATH, index) == 0 && val) {
+ info->hdr.coids[0] = ONLP_FAN_ID_CREATE(index + CHASSIS_FAN_COUNT);
+ }
+
+ val = 0;
+ if (onlp_file_read_int(&val, "%s""psu%d_temp", PSU_SYSFS_PATH, index) == 0 && val) {
+ info->hdr.coids[1] = ONLP_THERMAL_ID_CREATE(index + CHASSIS_THERMAL_COUNT);
+ }
+
+ return ONLP_STATUS_OK;
+}
+
+int
+onlp_psui_ioctl(onlp_oid_t pid, va_list vargs)
+{
+ return ONLP_STATUS_E_UNSUPPORTED;
+}
+
diff --git a/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/src/sfpi.c b/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/src/sfpi.c
new file mode 100644
index 0000000..cbaef2a
--- /dev/null
+++ b/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/src/sfpi.c
@@ -0,0 +1,110 @@
+/************************************************************
+ *
+ *
+ * Copyright 2014 Big Switch Networks, Inc.
+ *
+ * Licensed under the Eclipse Public License, Version 1.0 (the
+ * "License"); you may not use this file except in compliance
+ * with the License. You may obtain a copy of the License at
+ *
+ * http://www.eclipse.org/legal/epl-v10.html
+ *
+ * Unless required by applicable law or agreed to in writing,
+ * software distributed under the License is distributed on an
+ * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+ * either express or implied. See the License for the specific
+ * language governing permissions and limitations under the
+ * License.
+ *
+ *
+ ************************************************************
+ *
+ *
+ *
+ ***********************************************************/
+#include
+#include
+#include
+#include
+#include "platform_lib.h"
+
+#define NUM_OF_PORT 16
+#define QSFP28_PORT_FORMAT "/sys/bus/i2c/devices/%d-0050/eeprom"
+
+/************************************************************
+ *
+ * SFPI Entry Points
+ *
+ ***********************************************************/
+int
+onlp_sfpi_init(void)
+{
+ /* Called at initialization time */
+ return ONLP_STATUS_OK;
+}
+
+int
+onlp_sfpi_bitmap_get(onlp_sfp_bitmap_t* bmap)
+{
+ int p;
+ AIM_BITMAP_CLR_ALL(bmap);
+
+ for(p = 1; p <= NUM_OF_PORT; p++) {
+ AIM_BITMAP_SET(bmap, p);
+ }
+
+ return ONLP_STATUS_OK;
+}
+
+int
+onlp_sfpi_is_present(int port)
+{
+ if ( port < 1 || port > NUM_OF_PORT ) {
+ return ONLP_STATUS_E_INVALID;
+ }
+ int value, rv;
+ rv = fpga_read(0x09000110, &value);
+ if ( rv < 0 ) {
+ return ONLP_STATUS_E_INTERNAL;
+ }
+ return !(value & (1 << (port-1)));
+}
+
+int
+onlp_sfpi_presence_bitmap_get(onlp_sfp_bitmap_t* dst)
+{
+ int value, rv, i;
+ rv = fpga_read(0x09000110, &value);
+ if ( rv < 0 ) {
+ return ONLP_STATUS_E_INTERNAL;
+ }
+
+ for(i = 1; i <= NUM_OF_PORT; i++) {
+ AIM_BITMAP_MOD(dst, i, !(value & (1 << (i-1))));
+ }
+
+ return ONLP_STATUS_OK;
+}
+
+int
+onlp_sfpi_eeprom_read(int port, uint8_t data[256])
+{
+ if (!onlp_sfpi_is_present(port)) {
+ return ONLP_STATUS_E_INTERNAL;
+ }
+ char eeprom_path[512];
+ snprintf(eeprom_path, sizeof(eeprom_path), QSFP28_PORT_FORMAT, port+1);
+
+ if (onlplib_sfp_eeprom_read_file(eeprom_path, data) != 0) {
+ AIM_LOG_INFO("Unable to read eeprom from port(%d)\r\n", port);
+ return ONLP_STATUS_E_INTERNAL;
+ }
+
+ return ONLP_STATUS_OK;
+}
+
+int
+onlp_sfpi_denit(void)
+{
+ return ONLP_STATUS_OK;
+}
diff --git a/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/src/sysi.c b/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/src/sysi.c
new file mode 100644
index 0000000..f72249f
--- /dev/null
+++ b/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/src/sysi.c
@@ -0,0 +1,679 @@
+/************************************************************
+ *
+ *
+ * Copyright 2014 Big Switch Networks, Inc.
+ * Copyright 2017 Accton Technology Corporation.
+ *
+ * Licensed under the Eclipse Public License, Version 1.0 (the
+ * "License"); you may not use this file except in compliance
+ * with the License. You may obtain a copy of the License at
+ *
+ * http://www.eclipse.org/legal/epl-v10.html
+ *
+ * Unless required by applicable law or agreed to in writing,
+ * software distributed under the License is distributed on an
+ * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+ * either express or implied. See the License for the specific
+ * language governing permissions and limitations under the
+ * License.
+ *
+ *
+ ************************************************************
+ *
+ *
+ *
+ ***********************************************************/
+#include
+#include
+#include
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include "platform_lib.h"
+
+#include "arm64_wistron_wtp_01_c1_00_int.h"
+#include "arm64_wistron_wtp_01_c1_00_log.h"
+#include "onlp_mdio.h"
+
+#include "nvme-ioctl.h"
+
+#define NVME_DEV "/dev/nvme0n1"
+
+#define SPEED_100_PERCENTAGE 100
+#define FAN_SPEED_MAX_PERCENTAGE 100
+#define FAN_SPEED_MIN_PERCENTAGE 30
+#define FAN_MIN_RPM 5000
+#define QSFP28_WARNING_THRESHOLD 90000
+#define QSFP28_ERROR_THRESHOLD 100000
+#define QSFP28_SHUTDOWN_THRESHOLD 105000
+#define CFP2_WARNING_THRESHOLD 90000
+#define CFP2_ERROR_THRESHOLD 100000
+#define CFP2_SHUTDOWN_THRESHOLD 105000
+
+#define FAN_SLOWDOWN_COUNTER 5
+
+
+//#define THERMAL_VERSION 1
+
+
+//static uint16_t Ka = 6, Kb = 100;
+// actual value is Ka/100, Kb/10
+// 9 thermal sensors for M.2 SSD
+// 10 thermal sensors for CFP2
+// 11 thermal sensors for QSFP28
+// FAN TABLE V0.1
+static int Ka[CHASSIS_THERMAL_COUNT+3] = {300,300,140,500,666,680,750,680,750,285,500,660};
+static int Kb[CHASSIS_THERMAL_COUNT+3] = {-1520,-1520,30,-2579,-3600,-4220,-4707,-4220,-4707,-914,-2550,-3600};
+
+// default fan PWM 30%
+static int old_pct = 30;
+static int fan_counter = 0;
+static int fan_index = -1;
+static int fan_offset = 0;
+
+const char*
+onlp_sysi_platform_get(void)
+{
+ // TODO get this info from system EEPROM
+ return "arm64-wistron-wtp-01-c1-00-r0";
+}
+
+int
+onlp_sysi_onie_data_get(uint8_t** data, int* size)
+{
+ uint8_t* rdata = aim_zmalloc(256);
+
+ if(onlp_file_read(rdata, 256, size, IDPROM_PATH) == ONLP_STATUS_OK) {
+ if(*size == 256) {
+ *data = rdata;
+ return ONLP_STATUS_OK;
+ }
+ }
+
+ aim_free(rdata);
+ *size = 0;
+ return ONLP_STATUS_E_INTERNAL;
+}
+
+int
+onlp_sysi_oids_get(onlp_oid_t* table, int max)
+{
+ int i;
+ onlp_oid_t* e = table;
+ memset(table, 0, max*sizeof(onlp_oid_t));
+
+ /* Thermal sensors on the chassis */
+ for (i = 1; i <= CHASSIS_THERMAL_COUNT; i++) {
+ *e++ = ONLP_THERMAL_ID_CREATE(i);
+ }
+
+ /* PSUs on the chassis */
+ for (i = 1; i <= CHASSIS_PSU_COUNT; i++) {
+ *e++ = ONLP_PSU_ID_CREATE(i);
+ }
+
+ /* LEDs on the chassis */
+ for (i = 1; i <= CHASSIS_LED_COUNT+CFP2_LED_COUNT+QSFP28_LED_COUNT; i++) {
+ *e++ = ONLP_LED_ID_CREATE(i);
+ }
+
+ /* Fans on the chassis */
+ for (i = 1; i <= CHASSIS_FAN_COUNT; i++) {
+ *e++ = ONLP_FAN_ID_CREATE(i);
+ }
+
+ /* Modules[PIUs] on the chassis */
+ for (i = 1; i <= CHASSIS_MODULE_COUNT; i++) {
+ *e++ = ONLP_MODULE_ID_CREATE(i);
+ }
+
+ return 0;
+}
+
+int
+onlp_sysi_platform_info_get(onlp_platform_info_t* pi)
+{
+ return ONLP_STATUS_OK;
+}
+
+void
+onlp_sysi_platform_info_free(onlp_platform_info_t* pi)
+{
+ aim_free(pi->cpld_versions);
+}
+
+static int get_nvme_temp(const char *dev)
+{
+ int fd, ret;
+ struct nvme_smart_log log;
+ fd = open(dev, O_RDONLY);
+ ret = nvme_smart_log(fd, NVME_NSID_ALL, &log);
+ close(fd);
+ if (ret) {
+ return 0;
+ }
+ return log.temperature[1] << 8 | log.temperature[0];
+}
+
+int
+onlp_sysi_platform_set_fans(int index, int ka, int kb, int offset)
+{
+ printf("%s: index[%d], ka[%d.%d], kb[%d.%d], offset[%3d.%3d]\n", __FUNCTION__, index, ka/100, ka%100, kb/10, kb%10, offset/1000, offset%1000);
+ if (index > CHASSIS_THERMAL_COUNT)
+ return ONLP_STATUS_E_INVALID;
+
+ // Ka, kb value too high
+ if ((ka/2+kb/10) > 150)
+ return ONLP_STATUS_E_INVALID;
+
+ Ka[index] = ka;
+ Kb[index] = kb;
+
+ if ( offset != 0 )
+ {
+ fan_index = index;
+ fan_offset = offset;
+ }
+ else
+ {
+ fan_index = -1;
+ fan_offset = 0;
+ }
+
+ return ONLP_STATUS_OK;
+}
+
+int
+onlp_sysi_platform_manage_fans(void)
+{
+ int i = 0, port;
+ int new_pct, temp_pct, thermal_temp;
+ int highest_temp = 0, highest_pct = 0;
+ int qsfp_temp = 0;
+ int rv = 0;
+ onlp_thermal_info_t thermal[CHASSIS_THERMAL_COUNT+2];
+#ifdef THERMAL_VERSION
+ time_t timep;
+#endif
+ uint8_t data[256];
+ uint16_t data16;
+
+ int pid, fid;
+ onlp_fan_info_t fan_info;
+ onlp_psu_info_t psu_info[NUM_OF_PSU_ON_MAIN_BROAD];
+
+ // PSU / FAN failed control
+ // PSU Status
+ for(pid = 0; pid < NUM_OF_PSU_ON_MAIN_BROAD; pid++)
+ {
+ rv = onlp_psui_info_get(ONLP_PSU_ID_CREATE(pid+1), &psu_info[pid]);
+
+ if ( (rv == ONLP_STATUS_OK) && !(psu_info[pid].status & ONLP_PSU_STATUS_PRESENT) )
+ {
+ new_pct = FAN_SPEED_MAX_PERCENTAGE;
+
+ AIM_LOG_ERROR("PSU %d failed!! status[%x]", pid+1, psu_info[pid].status);
+ goto set_temp;
+ }
+ }
+
+ // FAN status
+ for(pid = 0; pid < NUM_OF_PSU_ON_MAIN_BROAD; pid++)
+ {
+ for (fid = 0; fid < NUM_OF_FAN_ON_PSU_BROAD; fid++)
+ {
+ if (psu_info[pid].status & ONLP_PSU_STATUS_PRESENT)
+ {
+ rv = onlp_fani_info_get(ONLP_FAN_ID_CREATE(pid*NUM_OF_FAN_ON_PSU_BROAD+fid+1), &fan_info);
+
+ if (rv == ONLP_STATUS_OK)
+ {
+ if ( !(fan_info.status & ONLP_FAN_STATUS_PRESENT) || (fan_info.rpm <= FAN_MIN_RPM) )
+ {
+ new_pct = FAN_SPEED_MAX_PERCENTAGE;
+ AIM_LOG_ERROR("PSU %d - FAN %d failed!! status[%x], rmp[%d]", pid+1, fid+1, fan_info.status, fan_info.rpm);
+
+ goto set_temp;
+ }
+ }
+ }
+ }
+ }
+
+ /* Get current temperature */
+ if (onlp_thermali_info_get(ONLP_THERMAL_ID_CREATE(THERMAL_1_ON_SA56004), &thermal[0]) != ONLP_STATUS_OK ||
+ onlp_thermali_info_get(ONLP_THERMAL_ID_CREATE(THERMAL_2_ON_SA56004), &thermal[1]) != ONLP_STATUS_OK ||
+ onlp_thermali_info_get(ONLP_THERMAL_ID_CREATE(THERMAL_1_ON_TMP75), &thermal[2]) != ONLP_STATUS_OK ||
+ onlp_thermali_info_get(ONLP_THERMAL_ID_CREATE(THERMAL_2_ON_TMP75), &thermal[3]) != ONLP_STATUS_OK ||
+ onlp_thermali_info_get(ONLP_THERMAL_ID_CREATE(THERMAL_3_ON_TMP75), &thermal[4]) != ONLP_STATUS_OK ||
+ onlp_thermali_info_get(ONLP_THERMAL_ID_CREATE(THERMAL_1_ON_LM95245), &thermal[5]) != ONLP_STATUS_OK ||
+ onlp_thermali_info_get(ONLP_THERMAL_ID_CREATE(THERMAL_2_ON_LM95245), &thermal[6]) != ONLP_STATUS_OK ||
+ onlp_thermali_info_get(ONLP_THERMAL_ID_CREATE(THERMAL_3_ON_LM95245), &thermal[7]) != ONLP_STATUS_OK ||
+ onlp_thermali_info_get(ONLP_THERMAL_ID_CREATE(THERMAL_4_ON_LM95245), &thermal[8]) != ONLP_STATUS_OK
+ )
+ {
+ /* Setting all fans speed to maximum */
+ new_pct = FAN_SPEED_MAX_PERCENTAGE;
+ AIM_LOG_ERROR("Unable to read thermal status");
+
+ goto set_temp;
+ }
+
+ // M.2 temperature
+ thermal[CHASSIS_THERMAL_COUNT].mcelsius = get_nvme_temp(NVME_DEV)*100;
+ thermal[CHASSIS_THERMAL_COUNT].thresholds.warning = 85000;
+ thermal[CHASSIS_THERMAL_COUNT].thresholds.error = 90000;
+ thermal[CHASSIS_THERMAL_COUNT].thresholds.shutdown = 95000;
+
+#ifdef THERMAL_VERSION
+ // print current time
+ time(&timep);
+ printf("\n%s",ctime(&timep));
+#endif
+
+ // The actual temperature is thermal_temp/1000
+ // calculate fan speed by each Ka/100*temp+Kb/10
+ for (i = 0; i < CHASSIS_THERMAL_COUNT+1 ; i++)
+ {
+ thermal_temp = thermal[i].mcelsius;
+ temp_pct = (thermal_temp * Ka[i])/100000 + (Kb[i]/10);
+
+ // add for thermal test, manual add offset to specific sensor (fan_index)
+ if ( i == fan_index )
+ {
+ thermal_temp += fan_offset;
+ }
+
+ // if temperature larger than warning threshold, set fan speed to maximun
+ if ((i <= CHASSIS_THERMAL_COUNT) && (thermal_temp >= thermal[i].thresholds.warning))
+ {
+ highest_pct = FAN_SPEED_MAX_PERCENTAGE;
+#ifndef THERMAL_VERSION
+ AIM_LOG_ERROR("[WARNING] sensor [%d] temperature[%d] exceed warning temperature [%d]\n", i, thermal_temp, thermal[i].thresholds.warning);
+#endif
+ //break;
+ }
+
+ if (temp_pct > highest_pct)
+ {
+ highest_pct = temp_pct;
+ }
+
+ if (thermal_temp > highest_temp)
+ {
+ highest_temp = thermal_temp;
+ }
+
+#ifdef THERMAL_VERSION
+ printf("[FAN_LOG]:sensors[%2d] temp[%3d.%3d], threshold[%3d/%3d/%3d], [Ka:%2d.%2d] [Kb:%4d.%d], speed[%4d], highest[%3d]\n", i, thermal_temp/1000, thermal_temp%1000, thermal[i].thresholds.warning/1000, thermal[i].thresholds.error/1000, thermal[i].thresholds.shutdown/1000, Ka[i]/100, Ka[i]%100, Kb[i]/10, abs(Kb[i]%10), temp_pct, highest_pct);
+#endif
+ }
+
+ // read cfp2 temperature
+ for (port = 0; port < CFP2_LED_COUNT; port++)
+ {
+ //rv = cfp_is_present(port);
+
+ // cfp2 not present or incorrect
+ //if(rv <= 0) {
+ // continue;
+ //}
+
+ // 0xB02F read temperature of CFP2
+ /*
+ rv = onlp_mdio_read_c45(port, 0x9B07, &data16);
+ printf ("[CFP2 DEBUG] Read CFP2[%d] 0x9B07: %x, rv=%x\n", port, data16, rv);
+
+ rv = onlp_mdio_read_c45(port, 0x9B09, &data16);
+ printf ("[CFP2 DEBUG] Read CFP2[%d] 0x9B09: %x, rv=%x\n", port, data16, rv);
+
+ rv = onlp_mdio_read_c45(port, 0x9B0A, &data16);
+ printf ("[CFP2 DEBUG] Read CFP2[%d] 0x9B0A: %x, rv=%x\n", port, data16, rv);
+
+ rv = onlp_mdio_read_c45(port, 0x98A2, &data16);
+ printf ("[CFP2 DEBUG] Read CFP2[%d] 098A2: %x, rv=%x\n", port, data16, rv);
+ */
+ rv = onlp_mdio_read_c45(port, 0xB02F, &data16);
+ //printf ("[CFP2 DEBUG] Read CFP2[%d] 0xB02F: [%x], rv=[%x]\n", port, data16, rv);
+
+
+ if ((rv == ONLP_STATUS_E_INVALID) || (data16 == 0xffff)) {
+#ifdef THERMAL_VERSION
+ qsfp_temp = 0;
+#else
+ continue;
+#endif
+ }
+ else
+ {
+ // cfp2 temperature = (data[1]*256+data[0])/256
+ qsfp_temp = data16*1000/256;
+
+ // add for thermal test, manual add offset to specific sensor (fan_index)
+ if ( i == (fan_index-CHASSIS_THERMAL_COUNT) )
+ {
+ qsfp_temp += fan_offset;
+ }
+ }
+
+ temp_pct = (qsfp_temp * Ka[i])/(100000) + (Kb[i]/10);
+
+ // if temperature larger than warning threshold (cfp2/qsfp28 is 90 degree), set fan speed to maximun
+ if ((qsfp_temp >= CFP2_WARNING_THRESHOLD) || (temp_pct > FAN_SPEED_MAX_PERCENTAGE))
+ {
+ highest_pct = FAN_SPEED_MAX_PERCENTAGE;
+#ifndef THERMAL_VERSION
+ AIM_LOG_ERROR("[WARNING] sensor cfp2 port[%d] temperature[%d] exceed warning temperature [%d]\n", port, qsfp_temp, CFP2_WARNING_THRESHOLD);
+#endif
+ //break;
+ }
+
+ if (temp_pct > highest_pct)
+ {
+ highest_pct = temp_pct;
+ }
+
+ if (thermal_temp > highest_temp)
+ {
+ highest_temp = thermal_temp;
+ }
+
+#ifdef THERMAL_VERSION
+ printf("[FAN_LOG]: CFP2[%2d] temp[%3d.%3d], threshold[%3d/%3d/%3d], [Ka:%2d.%2d] [Kb:%4d.%d], speed[%4d], highest[%3d]\n", port, qsfp_temp/1000, qsfp_temp%1000, CFP2_WARNING_THRESHOLD/1000, CFP2_ERROR_THRESHOLD/1000, CFP2_SHUTDOWN_THRESHOLD/1000, Ka[10]/100, Ka[10]%100, Kb[10]/10, abs(Kb[10]%10), temp_pct, highest_pct);
+#endif
+ }
+
+ // Ka/Kb need take next index for QSFP28
+ i++;
+
+ // read qsfp28 temperature
+ for (port = 1; port <= QSFP28_LED_COUNT; port++)
+ {
+ rv = onlp_sfp_is_present(port);
+
+ // qsfp28 not present or incorrect
+ if(rv <= 0) {
+#ifdef THERMAL_VERSION
+ qsfp_temp = 0;
+#else
+ continue;
+#endif
+ }
+
+ rv = onlp_sfpi_eeprom_read(port, data);
+
+ if (rv < 0) {
+#ifdef THERMAL_VERSION
+ qsfp_temp = 0;
+#else
+ continue;
+#endif
+ }
+ else
+ {
+
+ // qsfp28 temperature = (data[22]*256+data[23])/256
+ qsfp_temp = (data[22]*256+data[23])*1000/256;
+
+ // add for thermal test, manual add offset to specific sensor (fan_index)
+ if ( i == (fan_index-CHASSIS_THERMAL_COUNT-CFP2_LED_COUNT) )
+ {
+ qsfp_temp += fan_offset;
+ }
+ }
+
+ temp_pct = (qsfp_temp*Ka[i])/(100000) + (Kb[i]/10);
+
+ // if temperature larger than warning threshold (qsfp28 is 90 degree), set fan speed to maximun
+ if (qsfp_temp >= QSFP28_WARNING_THRESHOLD)
+ {
+ highest_pct = FAN_SPEED_MAX_PERCENTAGE;
+#ifndef THERMAL_VERSION
+ AIM_LOG_ERROR("[WARNING] sensor qsfp28 port[%d] temperature[%d] exceed warning temperature [%d]\n", port, qsfp_temp, QSFP28_WARNING_THRESHOLD);
+#endif
+ //break;
+ }
+
+ if (temp_pct > highest_pct)
+ {
+ highest_pct = temp_pct;
+ }
+
+ if (thermal_temp > highest_temp)
+ {
+ highest_temp = thermal_temp;
+ }
+
+#ifdef THERMAL_VERSION
+ printf("[FAN_LOG]: QSFP28[%2d] temp[%3d.%3d], threshold[%3d/%3d/%3d], [Ka:%2d.%2d] [Kb:%4d.%d], speed[%4d], highest[%3d]\n", port, qsfp_temp/1000, qsfp_temp%1000, QSFP28_WARNING_THRESHOLD/1000, QSFP28_ERROR_THRESHOLD/1000, QSFP28_SHUTDOWN_THRESHOLD/1000, Ka[i]/100, Ka[i]%100, Kb[i]/10, abs(Kb[i]%10), temp_pct, highest_pct);
+#endif
+ }
+
+ // step the fan speed by 5%
+ new_pct = (highest_pct / 5) *5;
+
+ if ( new_pct >= FAN_SPEED_MAX_PERCENTAGE )
+ new_pct = FAN_SPEED_MAX_PERCENTAGE;
+
+ /* Default to full dump */
+ //onlp_platform_dump(&aim_pvs_stdout,
+ // ONLP_OID_DUMP_RECURSE | ONLP_OID_DUMP_EVEN_IF_ABSENT);
+ //onlp_platform_dump(&aim_pvs_stdout, ONLP_OID_TYPE_THERMAL);
+
+set_temp:
+
+#ifdef THERMAL_VERSION
+ printf("[FAN_CONTROL] highest temp: %d; FAN PWM: %d\n", highest_temp, new_pct);
+#endif
+
+ if ( new_pct < old_pct )
+ {
+ fan_counter++;
+
+ if ( fan_counter <= FAN_SLOWDOWN_COUNTER )
+ {
+ goto exit;
+ }
+ else
+ {
+ old_pct = new_pct;
+ fan_counter = 0;
+ }
+ }
+ else
+ {
+ fan_counter = 0;
+ if ( new_pct > old_pct)
+ old_pct = new_pct;
+ else // fan speed not changed
+ goto exit;
+ }
+
+ onlp_fani_percentage_set(ONLP_FAN_ID_CREATE(FAN1_ON_PSU1) , old_pct);
+ onlp_fani_percentage_set(ONLP_FAN_ID_CREATE(FAN1_ON_PSU2) , old_pct);
+
+exit:
+ return ONLP_STATUS_OK;
+}
+
+int
+onlp_sysi_platform_manage_leds(void)
+{
+ int i = 0, rc = ONLP_STATUS_OK;
+ int pid, fid;
+ onlp_fan_info_t fan_info;
+ onlp_psu_info_t psu_info[NUM_OF_PSU_ON_MAIN_BROAD];
+ onlp_led_mode_t psu_new_mode = ONLP_LED_MODE_GREEN;
+ onlp_led_mode_t sys_new_mode = ONLP_LED_MODE_GREEN;
+ onlp_led_mode_t qsfp_new_mode = ONLP_LED_MODE_GREEN;
+ onlp_led_mode_t piu_new_mode = ONLP_LED_MODE_BLUE;
+
+ // PSU Status
+ for(pid = 0; pid < NUM_OF_PSU_ON_MAIN_BROAD; pid++)
+ {
+ rc = onlp_psui_info_get(ONLP_PSU_ID_CREATE(pid+1), &psu_info[i]);
+
+ if ( (rc != ONLP_STATUS_OK) || !(psu_info[i].status & ONLP_PSU_STATUS_PRESENT) )
+ {
+ psu_new_mode = ONLP_LED_MODE_RED;
+ }
+ }
+
+ // FAN status
+ for(pid = 0; pid < NUM_OF_PSU_ON_MAIN_BROAD; pid++)
+ {
+ for (fid = 0; fid < NUM_OF_FAN_ON_PSU_BROAD; fid++)
+ {
+ if (psu_info[pid].status & ONLP_PSU_STATUS_PRESENT)
+ {
+ rc = onlp_fani_info_get(ONLP_FAN_ID_CREATE(pid*NUM_OF_FAN_ON_PSU_BROAD+fid+1), &fan_info);
+
+ if ( (rc != ONLP_STATUS_OK) || !(fan_info.status & ONLP_FAN_STATUS_PRESENT) )
+ {
+ psu_new_mode = ONLP_LED_MODE_RED_BLINKING;
+ goto SET_LED;
+ }
+ }
+ }
+ }
+
+
+SET_LED:
+ /// SYS LED
+ onlp_ledi_mode_set(ONLP_LED_ID_CREATE(LED_SYS), sys_new_mode);
+ // PSU LED
+ onlp_ledi_mode_set(ONLP_LED_ID_CREATE(LED_PSU), psu_new_mode);
+
+ // SFP LED
+
+
+ for ( i = 0; i < QSFP28_LED_COUNT; i++ )
+ {
+ if ((rc = onlp_sfpi_is_present (i+1)))
+ {
+ // not suppot speed status, set to BLUE (400G)
+ qsfp_new_mode = ONLP_LED_MODE_GREEN;
+ }
+ else
+ {
+ qsfp_new_mode = ONLP_LED_MODE_OFF;
+ }
+
+ onlp_ledi_mode_set(ONLP_LED_ID_CREATE(LED_QSFP1+i), qsfp_new_mode);
+ }
+
+ for ( i = 0; i < CFP2_LED_COUNT; i++ )
+ {
+ rc = get_module_status (i+1);
+
+ if ( (rc & (ONLP_MODULE_STATUS_PIU_DCO_PRESENT | ONLP_MODULE_STATUS_PIU_CFP2_PRESENT)) )
+ {
+ // not suppot speed status, set to BLUE (400G)
+ piu_new_mode = ONLP_LED_MODE_BLUE;
+ }
+ else
+ {
+ piu_new_mode = ONLP_LED_MODE_OFF;
+ }
+
+ onlp_ledi_mode_set(ONLP_LED_ID_CREATE(LED_CFP1+i), piu_new_mode);
+ }
+
+ return ONLP_STATUS_OK;
+}
+
+//#define LED_UNIT_TEST 1
+
+#ifdef LED_UNIT_TEST
+int
+onlp_sysi_platform_manage_leds(void)
+{
+ int i = 0;
+
+
+
+
+ // unit test to set LED
+
+ /* GGGG
+ onlp_ledi_mode_set(ONLP_LED_ID_CREATE(LED_SYS), ONLP_LED_MODE_GREEN);
+ onlp_ledi_mode_set(ONLP_LED_ID_CREATE(LED_PSU), ONLP_LED_MODE_GREEN);
+ for ( i = 0; i < QSFP28_LED_COUNT; i++ )
+ {
+ onlp_ledi_mode_set(ONLP_LED_ID_CREATE(LED_QSFP1+i), ONLP_LED_MODE_GREEN);
+ }
+
+ for ( i = 0; i < CFP2_LED_COUNT; i++ )
+ {
+ onlp_ledi_mode_set(ONLP_LED_ID_CREATE(LED_CFP1+i), ONLP_LED_MODE_GREEN);
+ }
+ */
+
+ /* GGGG BLINKING
+ onlp_ledi_mode_set(ONLP_LED_ID_CREATE(LED_SYS), ONLP_LED_MODE_GREEN_BLINKING);
+ onlp_ledi_mode_set(ONLP_LED_ID_CREATE(LED_PSU), ONLP_LED_MODE_GREEN_BLINKING);
+ for ( i = 0; i < QSFP28_LED_COUNT; i++ )
+ {
+ onlp_ledi_mode_set(ONLP_LED_ID_CREATE(LED_QSFP1+i), ONLP_LED_MODE_GREEN_BLINKING);
+ }
+
+ for ( i = 0; i < CFP2_LED_COUNT; i++ )
+ {
+ onlp_ledi_mode_set(ONLP_LED_ID_CREATE(LED_CFP1+i), ONLP_LED_MODE_GREEN_BLINKING);
+ }
+ */
+
+ /* RRYB
+ onlp_ledi_mode_set(ONLP_LED_ID_CREATE(LED_SYS), ONLP_LED_MODE_RED);
+ onlp_ledi_mode_set(ONLP_LED_ID_CREATE(LED_PSU), ONLP_LED_MODE_RED);
+ for ( i = 0; i < QSFP28_LED_COUNT; i++ )
+ {
+ onlp_ledi_mode_set(ONLP_LED_ID_CREATE(LED_QSFP1+i), ONLP_LED_MODE_YELLOW);
+ }
+
+ for ( i = 0; i < CFP2_LED_COUNT; i++ )
+ {
+ onlp_ledi_mode_set(ONLP_LED_ID_CREATE(LED_CFP1+i), ONLP_LED_MODE_BLUE);
+ }
+ */
+
+ /* RRYB BLINKING
+ onlp_ledi_mode_set(ONLP_LED_ID_CREATE(LED_SYS), ONLP_LED_MODE_RED_BLINKING);
+ onlp_ledi_mode_set(ONLP_LED_ID_CREATE(LED_PSU), ONLP_LED_MODE_RED_BLINKING);
+ for ( i = 0; i < QSFP28_LED_COUNT; i++ )
+ {
+ onlp_ledi_mode_set(ONLP_LED_ID_CREATE(LED_QSFP1+i), ONLP_LED_MODE_YELLOW_BLINKING);
+ }
+
+ for ( i = 0; i < CFP2_LED_COUNT; i++ )
+ {
+ onlp_ledi_mode_set(ONLP_LED_ID_CREATE(LED_CFP1+i), ONLP_LED_MODE_BLUE_BLINKING);
+ }
+ */
+
+ /* All OFF */
+ onlp_ledi_mode_set(ONLP_LED_ID_CREATE(LED_SYS), ONLP_LED_MODE_OFF);
+ onlp_ledi_mode_set(ONLP_LED_ID_CREATE(LED_PSU), ONLP_LED_MODE_OFF);
+ for ( i = 0; i < QSFP28_LED_COUNT; i++ )
+ {
+ onlp_ledi_mode_set(ONLP_LED_ID_CREATE(LED_QSFP1+i), ONLP_LED_MODE_OFF);
+ }
+
+ for ( i = 0; i < CFP2_LED_COUNT; i++ )
+ {
+ onlp_ledi_mode_set(ONLP_LED_ID_CREATE(LED_CFP1+i), ONLP_LED_MODE_OFF);
+ }
+ /**/
+
+ return ONLP_STATUS_OK;
+}
+#endif
+
+
diff --git a/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/src/thermali.c b/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/src/thermali.c
new file mode 100644
index 0000000..5b0b827
--- /dev/null
+++ b/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/arm64_wistron_wtp_01_c1_00/module/src/thermali.c
@@ -0,0 +1,199 @@
+/************************************************************
+ *
+ *
+ * Copyright 2014 Big Switch Networks, Inc.
+ * Copyright 2014 Accton Technology Corporation.
+ *
+ * Licensed under the Eclipse Public License, Version 1.0 (the
+ * "License"); you may not use this file except in compliance
+ * with the License. You may obtain a copy of the License at
+ *
+ * http://www.eclipse.org/legal/epl-v10.html
+ *
+ * Unless required by applicable law or agreed to in writing,
+ * software distributed under the License is distributed on an
+ * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+ * either express or implied. See the License for the specific
+ * language governing permissions and limitations under the
+ * License.
+ *
+ *
+ ************************************************************
+ *
+ * Thermal Sensor Platform Implementation.
+ *
+ ***********************************************************/
+#include
+#include
+#include "platform_lib.h"
+
+#define VALIDATE(_id) \
+ do { \
+ if(!ONLP_OID_IS_THERMAL(_id)) { \
+ return ONLP_STATUS_E_INVALID; \
+ } \
+ } while(0)
+/*
+enum onlp_thermal_id
+{
+ THERMAL_RESERVED = 0,
+ THERMAL_1_ON_SA56004,
+ THERMAL_2_ON_SA56004,
+ THERMAL_1_ON_TMP75,
+ THERMAL_2_ON_TMP75,
+ THERMAL_3_ON_TMP75,
+ THERMAL_1_ON_LM95245,
+ THERMAL_2_ON_LM95245,
+ THERMAL_3_ON_LM95245,
+ THERMAL_4_ON_LM95245,
+};
+*/
+
+static char* devfiles__[] = /* must map with onlp_thermal_id */
+{
+ NULL,
+ "/sys/bus/i2c/devices/0-004c/hwmon/hwmon3/temp1_input",
+ "/sys/bus/i2c/devices/0-004c/hwmon/hwmon3/temp2_input",
+ "/sys/bus/i2c/devices/0-0048/hwmon/hwmon0/temp1_input",
+ "/sys/bus/i2c/devices/0-0049/hwmon/hwmon1/temp1_input",
+ "/sys/bus/i2c/devices/0-004a/hwmon/hwmon2/temp1_input",
+ "/sys/bus/i2c/devices/0-0018/hwmon/hwmon4/temp1_input",
+ "/sys/bus/i2c/devices/0-0018/hwmon/hwmon4/temp2_input",
+ "/sys/bus/i2c/devices/0-0029/hwmon/hwmon5/temp1_input",
+ "/sys/bus/i2c/devices/0-0029/hwmon/hwmon5/temp2_input",
+};
+
+
+/* Static values */
+static onlp_thermal_info_t linfo[] = {
+ { }, /* Not used */
+ { { ONLP_THERMAL_ID_CREATE(THERMAL_1_ON_SA56004), "SA56004 1", 0},
+ ONLP_THERMAL_STATUS_PRESENT,
+ ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS
+ },
+ { { ONLP_THERMAL_ID_CREATE(THERMAL_2_ON_SA56004), "SA56004 2", 0},
+ ONLP_THERMAL_STATUS_PRESENT,
+ ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS
+ },
+ { { ONLP_THERMAL_ID_CREATE(THERMAL_1_ON_TMP75), "TMP75 1", 0},
+ ONLP_THERMAL_STATUS_PRESENT,
+ ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS
+ },
+ { { ONLP_THERMAL_ID_CREATE(THERMAL_2_ON_TMP75), "TMP75 2", 0},
+ ONLP_THERMAL_STATUS_PRESENT,
+ ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS
+ },
+ { { ONLP_THERMAL_ID_CREATE(THERMAL_3_ON_TMP75), "TMP75 3", 0},
+ ONLP_THERMAL_STATUS_PRESENT,
+ ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS
+ },
+ { { ONLP_THERMAL_ID_CREATE(THERMAL_1_ON_LM95245), "LM95245 1", 0},
+ ONLP_THERMAL_STATUS_PRESENT,
+ ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS
+ },
+ { { ONLP_THERMAL_ID_CREATE(THERMAL_2_ON_LM95245), "LM95245 2", 0},
+ ONLP_THERMAL_STATUS_PRESENT,
+ ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS
+ },
+ { { ONLP_THERMAL_ID_CREATE(THERMAL_3_ON_LM95245), "LM95245 3", 0},
+ ONLP_THERMAL_STATUS_PRESENT,
+ ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS
+ },
+ { { ONLP_THERMAL_ID_CREATE(THERMAL_4_ON_LM95245), "LM95245 4", 0},
+ ONLP_THERMAL_STATUS_PRESENT,
+ ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS
+ },
+};
+
+// Warning / error / shutdown temperature for each sensor, +2 for M.2 SSD & QSFP28
+// EA Team update 5/6/2022
+static int tcaution[CHASSIS_THERMAL_COUNT+2][3] = { {80000, 82000, 84000}, // SA56004
+ {80000, 82000, 84000}, // SA56004
+ {60000, 62000, 65000}, // U37-tmp75-1
+ {80000, 82000, 84000}, // U38-tmp75-1
+ {80000, 82000, 84000}, // U39-tmp75-1
+ {80000, 82000, 84000}, // U30-Im925245
+ {80000, 82000, 84000}, // U30-Im925245
+ {80000, 82000, 84000}, // U30-Im925245
+ {80000, 82000, 84000}, // U30-Im925245
+ {85000, 90000, 95000}, // M.2 SSD
+ {90000, 100000, 105000}}; // CFP2
+
+// 3/17/2022
+/*
+static int tcaution[CHASSIS_THERMAL_COUNT+2][3] = { {85000, 87000, 88000},
+ {85000, 87000, 88000},
+ {60000, 62000, 65000},
+ {90000, 92000, 94000},
+ {90000, 92000, 94000},
+ {110000, 112000, 114000},
+ {110000, 112000, 114000},
+ {110000, 112000, 114000},
+ {110000, 112000, 114000},
+ {85000, 90000, 95000},
+ {90000, 100000, 105000}};
+*/
+
+/*
+ * This will be called to intiialize the thermali subsystem.
+ */
+int
+onlp_thermali_init(void)
+{
+ return ONLP_STATUS_OK;
+}
+
+/*
+ * Retrieve the information structure for the given thermal OID.
+ *
+ * If the OID is invalid, return ONLP_E_STATUS_INVALID.
+ * If an unexpected error occurs, return ONLP_E_STATUS_INTERNAL.
+ * Otherwise, return ONLP_STATUS_OK with the OID's information.
+ *
+ * Note -- it is expected that you fill out the information
+ * structure even if the sensor described by the OID is not present.
+ */
+int
+onlp_thermali_info_get(onlp_oid_t id, onlp_thermal_info_t* info)
+{
+ int rt;
+ int local_id, index;
+ VALIDATE(id);
+
+ local_id = ONLP_OID_ID_GET(id);
+
+ /* Set the onlp_oid_hdr_t and capabilities */
+ *info = linfo[local_id];
+
+ rt = onlp_file_read_int(&info->mcelsius, devfiles__[local_id]);
+
+ // local_id start from 1
+ index = local_id-1;
+ switch (index)
+ {
+ case 0: // THERMAL_1_ON_SA56004
+ case 1: // THERMAL_2_ON_SA56004
+ case 2: // THERMAL_1_ON_TMP75
+ case 3: // THERMAL_2_ON_TMP75
+ case 4: // THERMAL_3_ON_TMP75
+ case 5: // THERMAL1_ON_LM95245
+ case 6: // THERMAL2_ON_LM95245
+ case 7: // THERMAL3_ON_LM95245
+ case 8: // THERMAL4_ON_LM95245
+ info->thresholds.warning = tcaution[index][0];
+ info->thresholds.error = tcaution[index][1];
+ info->thresholds.shutdown = tcaution[index][2];
+ break;
+ case 9: // M.2 SSD
+ info->thresholds.warning = tcaution[index][0];
+ info->thresholds.error = tcaution[index][1];
+ info->thresholds.shutdown = tcaution[index][2];
+ default: // QSFP28
+ info->thresholds.warning = tcaution[CHASSIS_THERMAL_COUNT+1][0];
+ info->thresholds.error = tcaution[CHASSIS_THERMAL_COUNT+1][1];
+ info->thresholds.shutdown = tcaution[CHASSIS_THERMAL_COUNT+1][2];
+ break;
+ }
+
+ return rt;
+}
diff --git a/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/lib/Makefile b/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/lib/Makefile
new file mode 100644
index 0000000..cd26156
--- /dev/null
+++ b/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/lib/Makefile
@@ -0,0 +1,2 @@
+PLATFORM := arm64-wistron-wtp-01-c1-00
+include $(ONL)/packages/base/any/onlp/builds/platform/libonlp-platform.mk
diff --git a/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/lib/libonlp-arm64-wistron-wtp-01-c1-00.mk b/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/lib/libonlp-arm64-wistron-wtp-01-c1-00.mk
new file mode 100644
index 0000000..5a9e44d
--- /dev/null
+++ b/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/lib/libonlp-arm64-wistron-wtp-01-c1-00.mk
@@ -0,0 +1,10 @@
+
+###############################################################################
+#
+# Inclusive Makefile for the libonlp-arm64-wistron-wtp-01-c1-00 module.
+#
+# Autogenerated 2022-03-22 18:34:39.751422
+#
+###############################################################################
+libonlp-arm64-wistron-wtp-01-c1-00_BASEDIR := $(dir $(abspath $(lastword $(MAKEFILE_LIST))))
+
diff --git a/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/onlpdump/.gitignore b/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/onlpdump/.gitignore
new file mode 100644
index 0000000..42a2c50
--- /dev/null
+++ b/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/onlpdump/.gitignore
@@ -0,0 +1,3 @@
+BUILD
+dependmodules.x
+onlps.mk
diff --git a/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/onlpdump/Makefile b/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/onlpdump/Makefile
new file mode 100644
index 0000000..519b0bc
--- /dev/null
+++ b/packages/platforms/wistron/arm64/wtp-01-c1-00/onlp/builds/onlpdump/Makefile
@@ -0,0 +1,2 @@
+PLATFORM := arm64-wistron-wtp-01-c1-00
+include $(ONL)/packages/base/any/onlp/builds/platform/onlps.mk
diff --git a/packages/platforms/wistron/arm64/wtp-01-c1-00/platform-config/Makefile b/packages/platforms/wistron/arm64/wtp-01-c1-00/platform-config/Makefile
new file mode 100644
index 0000000..003238c
--- /dev/null
+++ b/packages/platforms/wistron/arm64/wtp-01-c1-00/platform-config/Makefile
@@ -0,0 +1 @@
+include $(ONL)/make/pkg.mk
\ No newline at end of file
diff --git a/packages/platforms/wistron/arm64/wtp-01-c1-00/platform-config/r0/Makefile b/packages/platforms/wistron/arm64/wtp-01-c1-00/platform-config/r0/Makefile
new file mode 100644
index 0000000..003238c
--- /dev/null
+++ b/packages/platforms/wistron/arm64/wtp-01-c1-00/platform-config/r0/Makefile
@@ -0,0 +1 @@
+include $(ONL)/make/pkg.mk
\ No newline at end of file
diff --git a/packages/platforms/wistron/arm64/wtp-01-c1-00/platform-config/r0/PKG.yml b/packages/platforms/wistron/arm64/wtp-01-c1-00/platform-config/r0/PKG.yml
new file mode 100644
index 0000000..2af2f57
--- /dev/null
+++ b/packages/platforms/wistron/arm64/wtp-01-c1-00/platform-config/r0/PKG.yml
@@ -0,0 +1 @@
+!include $ONL_TEMPLATES/platform-config-platform.yml ARCH=arm64 VENDOR=wistron BASENAME=arm64-wistron-wtp-01-c1-00 REVISION=r0
diff --git a/packages/platforms/wistron/arm64/wtp-01-c1-00/platform-config/r0/src/lib/arm64-wistron-wtp-01-c1-00-r0.yml b/packages/platforms/wistron/arm64/wtp-01-c1-00/platform-config/r0/src/lib/arm64-wistron-wtp-01-c1-00-r0.yml
new file mode 100644
index 0000000..70b1e98
--- /dev/null
+++ b/packages/platforms/wistron/arm64/wtp-01-c1-00/platform-config/r0/src/lib/arm64-wistron-wtp-01-c1-00-r0.yml
@@ -0,0 +1,60 @@
+---
+
+######################################################################
+#
+# platform-config for WTP-01-C1-00
+#
+######################################################################
+
+arm64-wistron-wtp-01-c1-00-r0:
+
+ flat_image_tree:
+ kernel:
+ =: kernel-5.4-lts-arm64-all.bin.gz
+ package: goldstone-kernel-5.4-lts-arm64-all:arm64
+ dtb:
+ =: wtp-01-c1-00.dtb
+ package: goldstone-kernel-5.4-lts-arm64-all:arm64
+ itb:
+ <<: *arm64-itb
+
+ loader:
+ device: /dev/nvme0n1
+ nos_bootcmds:
+ - nvme scan
+ # TODO fix hardcoding 0:2
+ - load nvme 0:2 $load_addr $onl_itb
+ # boot_onie env is set by onl-onie-boot-mode
+ - "env exists boot_onie || bootm $load_addr#$onl_platform"
+ # clear boot_onie env so that we can boot into NOS
+ - setenv boot_onie
+ - saveenv
+
+ label: gpt
+
+ setenv:
+ # preset bootargs
+ # console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256 video=1920x1080-32@60 cma=256M
+ - bootargs: >-
+ console=ttyS0,115200
+ onl_platform=$onl_platform
+
+ environment:
+ - device: /dev/mmcblk0
+ env_offset: 0x500000
+ env_size: 0x2000
+ sector_size: 0x40000
+
+ installer:
+ - ONL-BOOT:
+ =: 128MiB
+ format: ext4
+ - ONL-CONFIG:
+ =: 128MiB
+ format: ext4
+ - ONL-IMAGES:
+ =: 2GiB
+ format: ext4
+ - ONL-DATA:
+ =: 100%
+ format: ext4
diff --git a/packages/platforms/wistron/arm64/wtp-01-c1-00/platform-config/r0/src/python/arm64_wistron_wtp_01_c1_00_r0/__init__.py b/packages/platforms/wistron/arm64/wtp-01-c1-00/platform-config/r0/src/python/arm64_wistron_wtp_01_c1_00_r0/__init__.py
new file mode 100644
index 0000000..b628f3b
--- /dev/null
+++ b/packages/platforms/wistron/arm64/wtp-01-c1-00/platform-config/r0/src/python/arm64_wistron_wtp_01_c1_00_r0/__init__.py
@@ -0,0 +1,35 @@
+from onl.platform.base import *
+from onl.platform.wistron import *
+
+import subprocess
+
+class OnlPlatform_arm64_wistron_wtp_01_c1_00_r0(OnlPlatformWistron,
+ OnlPlatformPortConfig_32x100):
+ PLATFORM='arm64-wistron-wtp-01-c1-00-r0'
+ MODEL="WTP-01-C1-00"
+ SYS_OBJECT_ID=".1.1"
+
+ def baseconfig(self):
+
+ self.insmod("optoe")
+
+ # initialize QSFP28 ports 1-16
+ self.new_i2c_devices(
+ [("optoe1", 0x50, i) for i in range(2,18)]
+ )
+
+ self.set_onie_mac_address(["eth0", "swp0", "swp1", "swp2"])
+
+ command = 'ip link set can0 type can bitrate 1000000'
+ subprocess.check_call(command.split())
+
+ command = 'ifconfig can0 up'
+ subprocess.check_call(command.split())
+
+ return True
+
+ def onie_boot_mode_set(self, mode):
+ subprocess.check_call(["fw_setenv", "onie_boot_reason", mode])
+
+ def boot_onie(self):
+ subprocess.check_call(["fw_setenv", "boot_onie", "1"])
diff --git a/packages/platforms/wistron/vendor-config/Makefile b/packages/platforms/wistron/vendor-config/Makefile
new file mode 100644
index 0000000..003238c
--- /dev/null
+++ b/packages/platforms/wistron/vendor-config/Makefile
@@ -0,0 +1 @@
+include $(ONL)/make/pkg.mk
\ No newline at end of file
diff --git a/packages/platforms/wistron/vendor-config/PKG.yml b/packages/platforms/wistron/vendor-config/PKG.yml
new file mode 100644
index 0000000..2cbde02
--- /dev/null
+++ b/packages/platforms/wistron/vendor-config/PKG.yml
@@ -0,0 +1 @@
+!include $ONL_TEMPLATES/platform-config-vendor.yml VENDOR=wistron Vendor=Wistron
diff --git a/packages/platforms/wistron/vendor-config/src/python/wistron/__init__.py b/packages/platforms/wistron/vendor-config/src/python/wistron/__init__.py
new file mode 100644
index 0000000..58aba1c
--- /dev/null
+++ b/packages/platforms/wistron/vendor-config/src/python/wistron/__init__.py
@@ -0,0 +1,25 @@
+#!/usr/bin/python
+
+from onl.platform.base import *
+class OnlPlatformWistron(OnlPlatformBase):
+ MANUFACTURER='Wistron'
+ PRIVATE_ENTERPRISE_NUMBER=11161
+
+ def set_onie_mac_address(self, intfs):
+
+ import onlp.onlp
+ import ctypes
+ import subprocess
+ import logging
+
+ libonlp = onlp.onlp.libonlp
+
+ sys = onlp.onlp.onlp_sys_info()
+ libonlp.onlp_sys_info_get(ctypes.byref(sys))
+ mac = ":".join("{:02x}".format(v) for v in sys.onie_info.mac)
+
+ for intf in intfs:
+ try:
+ subprocess.check_call(["ip", "link", "set", "dev", intf, "address", mac])
+ except Exception as e:
+ logging.warning("failed to set MAC address '{}' to {}: {}".format(mac, intf, e))
diff --git a/packages/platforms/wistron/x86-64/Makefile b/packages/platforms/wistron/x86-64/Makefile
new file mode 100644
index 0000000..dc1e7b8
--- /dev/null
+++ b/packages/platforms/wistron/x86-64/Makefile
@@ -0,0 +1 @@
+include $(ONL)/make/pkg.mk
diff --git a/packages/platforms/wistron/x86-64/modules/Makefile b/packages/platforms/wistron/x86-64/modules/Makefile
new file mode 100644
index 0000000..003238c
--- /dev/null
+++ b/packages/platforms/wistron/x86-64/modules/Makefile
@@ -0,0 +1 @@
+include $(ONL)/make/pkg.mk
\ No newline at end of file
diff --git a/packages/platforms/wistron/x86-64/modules/PKG.yml b/packages/platforms/wistron/x86-64/modules/PKG.yml
new file mode 100644
index 0000000..3524d6c
--- /dev/null
+++ b/packages/platforms/wistron/x86-64/modules/PKG.yml
@@ -0,0 +1 @@
+!include $ONL_TEMPLATES/no-arch-vendor-modules.yml ARCH=amd64 VENDOR=wistron
diff --git a/packages/platforms/wistron/x86-64/wtp-01-02-00/Makefile b/packages/platforms/wistron/x86-64/wtp-01-02-00/Makefile
new file mode 100644
index 0000000..003238c
--- /dev/null
+++ b/packages/platforms/wistron/x86-64/wtp-01-02-00/Makefile
@@ -0,0 +1 @@
+include $(ONL)/make/pkg.mk
\ No newline at end of file
diff --git a/packages/platforms/wistron/x86-64/wtp-01-02-00/goldstone-module/Makefile b/packages/platforms/wistron/x86-64/wtp-01-02-00/goldstone-module/Makefile
new file mode 100644
index 0000000..dc1e7b8
--- /dev/null
+++ b/packages/platforms/wistron/x86-64/wtp-01-02-00/goldstone-module/Makefile
@@ -0,0 +1 @@
+include $(ONL)/make/pkg.mk
diff --git a/packages/platforms/wistron/x86-64/wtp-01-02-00/goldstone-module/PKG.yml b/packages/platforms/wistron/x86-64/wtp-01-02-00/goldstone-module/PKG.yml
new file mode 100644
index 0000000..9347b15
--- /dev/null
+++ b/packages/platforms/wistron/x86-64/wtp-01-02-00/goldstone-module/PKG.yml
@@ -0,0 +1,12 @@
+variables:
+ ARCH: amd64
+ BASENAME: x86-64-wistron-wtp-01-02-00
+ REVISION: r0
+ PLATFORM: $BASENAME-$REVISION
+
+packages:
+ - name: goldstone-module-$PLATFORM
+ arch: $ARCH
+ version: 1.0.0
+ maintainer: goldstone-nos@googlegroups.com
+ summary: Goldstone module for $PLATFORM
diff --git a/packages/platforms/wistron/x86-64/wtp-01-02-00/goldstone-platform-config/Makefile b/packages/platforms/wistron/x86-64/wtp-01-02-00/goldstone-platform-config/Makefile
new file mode 100644
index 0000000..dc1e7b8
--- /dev/null
+++ b/packages/platforms/wistron/x86-64/wtp-01-02-00/goldstone-platform-config/Makefile
@@ -0,0 +1 @@
+include $(ONL)/make/pkg.mk
diff --git a/packages/platforms/wistron/x86-64/wtp-01-02-00/goldstone-platform-config/PKG.yml b/packages/platforms/wistron/x86-64/wtp-01-02-00/goldstone-platform-config/PKG.yml
new file mode 100644
index 0000000..618522a
--- /dev/null
+++ b/packages/platforms/wistron/x86-64/wtp-01-02-00/goldstone-platform-config/PKG.yml
@@ -0,0 +1,22 @@
+variables:
+ ARCH: amd64
+ BASENAME: x86-64-wistron-wtp-01-02-00
+ REVISION: r0
+ PLATFORM: $BASENAME-$REVISION
+
+packages:
+ - name: goldstone-platform-config-$PLATFORM
+ arch: $ARCH
+ version: 1.0.0
+ maintainer: goldstone-nos@googlegroups.com
+ summary: Goldstone config file for $PLATFORM
+ files:
+ builds/usonic: /var/lib/goldstone/device/$PLATFORM/usonic
+ builds/tai: /var/lib/goldstone/device/$PLATFORM/tai
+ builds/platform.json: /var/lib/goldstone/device/$PLATFORM/platform.json
+ builds/init.sh: /var/lib/goldstone/device/$PLATFORM/init.sh
+ builds/blacklist.conf: /etc/modprobe.d/$PLATFORM.conf
+ builds/diag/dist: /var/lib/galileo/wheels/
+ builds/diag/galileo1_cfp2piu_driver_manage.sh: /usr/bin/galileo1_cfp2piu_driver_manage.sh
+ after-install: $__DIR__/after-install.sh
+ before-remove: $__DIR__/before-remove.sh
diff --git a/packages/platforms/wistron/x86-64/wtp-01-02-00/goldstone-platform-config/after-install.sh b/packages/platforms/wistron/x86-64/wtp-01-02-00/goldstone-platform-config/after-install.sh
new file mode 100644
index 0000000..405422e
--- /dev/null
+++ b/packages/platforms/wistron/x86-64/wtp-01-02-00/goldstone-platform-config/after-install.sh
@@ -0,0 +1,5 @@
+#!/bin/sh
+
+set -eux
+
+cd /var/lib/galileo/wheels && python -m pip install --no-deps *.whl
diff --git a/packages/platforms/wistron/x86-64/wtp-01-02-00/goldstone-platform-config/before-remove.sh b/packages/platforms/wistron/x86-64/wtp-01-02-00/goldstone-platform-config/before-remove.sh
new file mode 100644
index 0000000..2e00134
--- /dev/null
+++ b/packages/platforms/wistron/x86-64/wtp-01-02-00/goldstone-platform-config/before-remove.sh
@@ -0,0 +1,3 @@
+set -eux
+
+python -m pip uninstall -y galileo
diff --git a/packages/platforms/wistron/x86-64/wtp-01-02-00/goldstone-platform-config/builds/Makefile b/packages/platforms/wistron/x86-64/wtp-01-02-00/goldstone-platform-config/builds/Makefile
new file mode 100644
index 0000000..5e6d43c
--- /dev/null
+++ b/packages/platforms/wistron/x86-64/wtp-01-02-00/goldstone-platform-config/builds/Makefile
@@ -0,0 +1,2 @@
+all:
+ $(MAKE) -C diag
diff --git a/packages/platforms/wistron/x86-64/wtp-01-02-00/goldstone-platform-config/builds/blacklist.conf b/packages/platforms/wistron/x86-64/wtp-01-02-00/goldstone-platform-config/builds/blacklist.conf
new file mode 100644
index 0000000..e69de29
diff --git a/packages/platforms/wistron/x86-64/wtp-01-02-00/goldstone-platform-config/builds/diag/.gitignore b/packages/platforms/wistron/x86-64/wtp-01-02-00/goldstone-platform-config/builds/diag/.gitignore
new file mode 100644
index 0000000..2fc8ce3
--- /dev/null
+++ b/packages/platforms/wistron/x86-64/wtp-01-02-00/goldstone-platform-config/builds/diag/.gitignore
@@ -0,0 +1,3 @@
+build
+dist
+*.egg-info
diff --git a/packages/platforms/wistron/x86-64/wtp-01-02-00/goldstone-platform-config/builds/diag/Makefile b/packages/platforms/wistron/x86-64/wtp-01-02-00/goldstone-platform-config/builds/diag/Makefile
new file mode 100644
index 0000000..b879178
--- /dev/null
+++ b/packages/platforms/wistron/x86-64/wtp-01-02-00/goldstone-platform-config/builds/diag/Makefile
@@ -0,0 +1,4 @@
+all:
+ python3 setup.py bdist_wheel
+ python3 -m pip wheel -r requirements.txt -w dist
+
diff --git a/packages/platforms/wistron/x86-64/wtp-01-02-00/goldstone-platform-config/builds/diag/galileo/__init__.py b/packages/platforms/wistron/x86-64/wtp-01-02-00/goldstone-platform-config/builds/diag/galileo/__init__.py
new file mode 100644
index 0000000..e69de29
diff --git a/packages/platforms/wistron/x86-64/wtp-01-02-00/goldstone-platform-config/builds/diag/galileo/base.py b/packages/platforms/wistron/x86-64/wtp-01-02-00/goldstone-platform-config/builds/diag/galileo/base.py
new file mode 100644
index 0000000..a7929b6
--- /dev/null
+++ b/packages/platforms/wistron/x86-64/wtp-01-02-00/goldstone-platform-config/builds/diag/galileo/base.py
@@ -0,0 +1,5 @@
+import click
+
+@click.group()
+def cli():
+ pass
diff --git a/packages/platforms/wistron/x86-64/wtp-01-02-00/goldstone-platform-config/builds/diag/galileo/fpga.py b/packages/platforms/wistron/x86-64/wtp-01-02-00/goldstone-platform-config/builds/diag/galileo/fpga.py
new file mode 100644
index 0000000..10f2131
--- /dev/null
+++ b/packages/platforms/wistron/x86-64/wtp-01-02-00/goldstone-platform-config/builds/diag/galileo/fpga.py
@@ -0,0 +1,262 @@
+import click
+from click import echo
+import smbus
+from .base import cli
+
+FPGA_I2C_ADDR = 0x30
+FPGA_REG_SCRATCH = 0x0
+FPGA_REG_BRD_ID_VER = 0x1
+FPGA_REG_FPGA_VER1 = 0x2
+FPGA_REG_FPGA_VER2 = 0x3
+FPGA_REG_BCM56960_ROV = 0x4
+FPGA_REG_BCM82391_INT1 = 0x5
+FPGA_REG_PHY_RESET = 0x6
+FPGA_REG_PIU_PRESENT = 0x7
+FPGA_REG_PSU_STATUS = 0x8
+FPGA_REG_CPLD_STATUS = 0x9
+FPGA_REG_CPU_CONTROL1 = 0xa
+FPGA_REG_CPU_CONTROL2 = 0xb
+FPGA_REG_CPU_CONTROL3 = 0xc
+FPGA_REG_PIU_CONTROL1 = 0xd
+FPGA_REG_PIU_CONTROL2 = 0xe
+FPGA_REG_MOD_INT = 0xf
+FPGA_REG_MOD_PRESENT = 0x10
+FPGA_REG_MOD_RESET = 0x11
+FPGA_REG_Q28_INT1 = 0x12
+FPGA_REG_Q28_INT2 = 0x13
+FPGA_REG_Q28_PRESENT1 = 0x14
+FPGA_REG_Q28_PRESENT2 = 0x15
+FPGA_REG_Q28_RESET1 = 0x16
+FPGA_REG_Q28_RESET2 = 0x17
+FPGA_REG_PG1 = 0x18
+FPGA_REG_PG2 = 0x19
+FPGA_REG_PG3 = 0x1a
+FPGA_REG_POWER_RAIL_LED = 0x1b
+FPGA_REG_PIU_LED = 0x1c
+FPGA_REG_FPGA_ALARM = 0x1d
+FPGA_REG_SYS_LED_CONTROL1 = 0x1e
+FPGA_REG_SYS_LED_CONTROL2 = 0x1f
+FPGA_REG_P12V_HOTSWAP_PIU = 0x20
+
+@cli.group()
+def fpga():
+ pass
+
+RESET_BITS = {
+ 'dpll': (FPGA_REG_PHY_RESET, 0x40),
+ '88e6320': (FPGA_REG_PHY_RESET, 0x20),
+ '5696x': (FPGA_REG_PHY_RESET, 0x10),
+ 'phy4': (FPGA_REG_PHY_RESET, 0x08),
+ 'phy3': (FPGA_REG_PHY_RESET, 0x04),
+ 'phy2': (FPGA_REG_PHY_RESET, 0x02),
+ 'phy1': (FPGA_REG_PHY_RESET, 0x01),
+ 'm.2-pcie': (FPGA_REG_CPU_CONTROL1, 0x40),
+ '5696x-pcie': (FPGA_REG_CPU_CONTROL1, 0x20),
+ 'pca9548-1': (FPGA_REG_CPU_CONTROL1, 0x4),
+ 'pca9548-2': (FPGA_REG_CPU_CONTROL1, 0x10),
+ 'pca9548-3': (FPGA_REG_CPU_CONTROL1, 0x8),
+ 'cpld': (FPGA_REG_CPU_CONTROL1, 0x2),
+ 'com-e': (FPGA_REG_CPU_CONTROL2, 0x80),
+ 'lpc': (FPGA_REG_CPU_CONTROL2, 0x20),
+}
+
+
+@fpga.command()
+@click.argument('device', type=click.Choice(RESET_BITS.keys(), case_sensitive=False))
+def reset(device):
+ device = device.lower()
+ mask = 0
+ if device == 'dpll':
+ mask |= 0x40
+ elif device == '88e6320':
+ mask |= 0x20
+ elif device == '5696x':
+ mask |= 0x10
+ elif device == 'phy4':
+ mask |= 0x08
+ elif device == 'phy3':
+ mask |= 0x04
+ elif device == 'phy2':
+ mask |= 0x02
+ elif device == 'phy1':
+ mask |= 0x01
+ else:
+ raise click.BadParameter("Invalid device")
+ try:
+ i2c = smbus.SMBus(0)
+ i2c.write_byte_data(FPGA_I2C_ADDR, 0x6, mask)
+ except OSError:
+ click.echo("Write to FPGA register failed")
+
+
+@fpga.command()
+@click.argument('device', type=click.Choice(['sys1', 'sys2', 'sys3', 'sys4', 'piu1', 'piu2', 'piu3', 'piu4',
+ 'piu5', 'piu6', 'piu7', 'piu8']))
+@click.argument('color', type=click.Choice(['green', 'red']))
+@click.argument('status', type=click.Choice(['on', 'blink', 'off']))
+def led(device, color, status):
+ SYS_LED_TABLE = {
+ 'sys1': (FPGA_REG_SYS_LED_CONTROL1, 2, 0), # sys
+ 'sys2': (FPGA_REG_SYS_LED_CONTROL1, 6, 4), # bmc
+ 'sys3': (FPGA_REG_SYS_LED_CONTROL2, 2, 0), # fan
+ 'sys4': (FPGA_REG_SYS_LED_CONTROL2, 6, 4), # power
+
+ }
+ i2c = smbus.SMBus(0)
+ if device.startswith('sys'):
+ reg, r_offset, g_offset = SYS_LED_TABLE[device]
+ offset = g_offset if color == 'green' else r_offset
+ if status == 'on':
+ pattern = 0x3
+ elif status == 'blink':
+ pattern = 0x1
+ else:
+ pattern = 0x0
+
+ cur = i2c.read_byte_data(FPGA_I2C_ADDR, reg)
+ cur &= ~(0x3 << offset)
+ cur |= (pattern << offset)
+ i2c.write_byte_data(FPGA_I2C_ADDR, reg, cur)
+ else:
+ piu_no = int(device[-1])
+ cur = i2c.read_byte_data(FPGA_I2C_ADDR, FPGA_REG_PIU_LED)
+ if status == 'off':
+ i2c.write_byte_data(FPGA_I2C_ADDR, FPGA_REG_PIU_LED, cur & ~(1 << (piu_no - 1)))
+ else:
+ i2c.write_byte_data(FPGA_I2C_ADDR, FPGA_REG_PIU_LED, cur | (1 << (piu_no - 1)))
+
+
+@fpga.command()
+def version():
+ i2c = smbus.SMBus(0)
+ fpga_ver1 = i2c.read_byte_data(FPGA_I2C_ADDR, 2)
+ fpga_ver2 = i2c.read_byte_data(FPGA_I2C_ADDR, 3)
+ echo("FPGA version:")
+ echo(" Major: 0x%01x" % int(((fpga_ver1 & 0xff) >> 0)))
+ echo(" Minor: 0x%01x" % int(((fpga_ver2 & 0xff) >> 0)))
+
+
+@fpga.command()
+def board():
+ i2c = smbus.SMBus(0)
+ brd_id_ver = i2c.read_byte_data(FPGA_I2C_ADDR, FPGA_REG_BRD_ID_VER)
+ echo("Board version:")
+ echo(" PCBA ID: 0x%01x" % int(((brd_id_ver & 0xc0) >> 6)))
+ echo(" CHIP ID: 0x%01x" % int(((brd_id_ver & 0x20) >> 5)))
+ echo(" BOARD ID: 0x%01x" % int(((brd_id_ver & 0x18) >> 3)))
+ echo(" reserved: 0x%01x" % int(((brd_id_ver & 0x04) >> 2)))
+ echo(" HW REV: 0x%01x" % int(((brd_id_ver & 0x03) >> 0)))
+
+
+@fpga.command()
+def psu():
+ def psu_bit_msg(fmt, bit, one_msg, zero_msg):
+ echo(fmt % (one_msg if (int(psu_status & (0x1 << bit)) > 0) else zero_msg))
+
+ i2c = smbus.SMBus(0)
+ psu_status = i2c.read_byte_data(FPGA_I2C_ADDR, FPGA_REG_PSU_STATUS)
+ echo("PSU status: 0x%02x" % psu_status)
+ psu_bit_msg(" PSU#1 PMBus Alert: %s", 0, "normal", "fail")
+ psu_bit_msg(" PSU#2 PMBus Alert: %s", 1, "normal", "fail")
+ psu_bit_msg(" PSU#1 SMB Alert: %s", 2, "normal", "alert")
+ psu_bit_msg(" PSU#1 Present: %s", 3, "absent", "present")
+ psu_bit_msg(" PSU#1 Power OK: %s", 4, "valid", "off/fail")
+ psu_bit_msg(" PSU#2 SMB Alert: %s", 5, "normal", "alert")
+ psu_bit_msg(" PSU#2 Present: %s", 6, "absent", "present")
+ psu_bit_msg(" PSU#2 Power OK: %s", 7, "valid", "off/fail")
+
+
+@fpga.command()
+def cpld():
+ def bit_msg(fmt, bit, one_msg, zero_msg):
+ echo(fmt % (one_msg if (int(cpld_status & (0x1 << bit)) > 0) else zero_msg))
+
+ i2c = smbus.SMBus(0)
+ cpld_status = i2c.read_byte_data(FPGA_I2C_ADDR, FPGA_REG_CPLD_STATUS)
+ echo("CPLD status: 0x%02x" % cpld_status)
+ bit_msg(" CPLD interrupt: %s", 0, "normal", "interrupt")
+ bit_msg(" PCIe interrupt: %s", 1, "normal", "interrupt")
+ bit_msg(" PCIe WAKE: %s", 2, "1", "0")
+ bit_msg(" Voltage Detector reset: %s", 3, "1", "0")
+ bit_msg(" Fan fail: %s", 4, "normal", "alert")
+ bit_msg(" TPM module present: %s", 5, "absent", "present")
+
+
+@fpga.group()
+def fan():
+ pass
+
+
+@fan.command()
+@click.argument('m', type=click.Choice(['max', 'norm', 'show']))
+def mode(m):
+ i2c = smbus.SMBus(0)
+ if m == 'max':
+ echo("Setting fan to 100% speed:")
+ i2c.write_byte_data(FPGA_I2C_ADDR, FPGA_REG_CPU_CONTROL3, 0x4)
+ elif m == 'norm':
+ echo("Setting fan to norm mode:")
+ i2c.write_byte_data(FPGA_I2C_ADDR, FPGA_REG_CPU_CONTROL3, 0x0)
+ else:
+ out = i2c.read_byte_data(FPGA_I2C_ADDR, FPGA_REG_CPU_CONTROL3)
+ if out & 0x4 > 0:
+ echo("Forced max speed")
+ else:
+ echo("Normal operation")
+
+
+@fan.command()
+def test():
+ import time
+ from .sysinfo import _parse_ipmitool_sdr_type_fan
+ i2c = smbus.SMBus(0)
+
+ echo("Setting fan to 100% speed:")
+ i2c.write_byte_data(FPGA_I2C_ADDR, FPGA_REG_CPU_CONTROL3, 0x4)
+
+ all_max = False
+ count = 1
+ while not all_max:
+ echo("=== Cycle %d ===:" % count)
+ all_max = True
+ fs = _parse_ipmitool_sdr_type_fan()
+ for f in range(1, 6):
+ for x in ['Front', 'Rear']:
+ try:
+ idx = "Fan%d %s" % (f, x)
+ fan_speed = int(fs[idx][3].split()[0])
+ if x == 'Front':
+ max_speed = 24200
+ else:
+ max_speed = 22000
+ if max_speed * 0.9 <= fan_speed <= max_speed * 1.1:
+ echo("%s %d RPM --- Max speed reached" % (idx, fan_speed))
+ else:
+ echo("%s %d RPM" % (idx, fan_speed))
+ all_max = False
+ except IndexError:
+ pass
+ time.sleep(1)
+ count += 1
+ if count > 60:
+ break
+
+ echo("Setting fan back to normal speed:")
+ i2c.write_byte_data(FPGA_I2C_ADDR, FPGA_REG_CPU_CONTROL3, 0x0)
+
+ if all_max:
+ echo("Test Passed")
+ else:
+ echo("Test failed (timed out)")
+
+@fpga.group()
+def piu():
+ pass
+
+
+@piu.command()
+def status():
+ i2c = smbus.SMBus(0)
+ piu_status = i2c.read_byte_data(FPGA_I2C_ADDR, FPGA_REG_PIU_PRESENT)
+ for x in range(1, 5):
+ echo("PIU %d: %s" % (x, "Not Present" if (piu_status & (0x1 << (x - 1))) > 0 else "Present"))
diff --git a/packages/platforms/wistron/x86-64/wtp-01-02-00/goldstone-platform-config/builds/diag/galileo/main.py b/packages/platforms/wistron/x86-64/wtp-01-02-00/goldstone-platform-config/builds/diag/galileo/main.py
new file mode 100644
index 0000000..b186da2
--- /dev/null
+++ b/packages/platforms/wistron/x86-64/wtp-01-02-00/goldstone-platform-config/builds/diag/galileo/main.py
@@ -0,0 +1,20 @@
+import sys
+import click
+from click_shell import make_click_shell
+
+from .base import cli
+
+from .fpga import fpga
+from .qsfp import qsfp
+from .piu import piu
+
+def main():
+ if '-c' in sys.argv:
+ sys.argv = [v for v in sys.argv if v != '-c']
+ cli()
+ else:
+ shell = make_click_shell(click.Context(cli), prompt='Galileo > ', intro='Starting Galileo Diagnostics...')
+ shell.cmdloop()
+
+if __name__ == '__main__':
+ main()
diff --git a/packages/platforms/wistron/x86-64/wtp-01-02-00/goldstone-platform-config/builds/diag/galileo/piu.py b/packages/platforms/wistron/x86-64/wtp-01-02-00/goldstone-platform-config/builds/diag/galileo/piu.py
new file mode 100644
index 0000000..c8b23b1
--- /dev/null
+++ b/packages/platforms/wistron/x86-64/wtp-01-02-00/goldstone-platform-config/builds/diag/galileo/piu.py
@@ -0,0 +1,74 @@
+import click
+import ioctl
+import ioctl.linux
+from ctypes import *
+import os
+from .base import cli
+import tabulate
+from click import echo
+from pathlib import Path
+import json as j
+
+
+class PIUCmd(Structure):
+ _fields_ = [("reg", c_uint), ("offset", c_uint), ("val", c_uint)]
+
+
+IOC_MAGIC = "p"
+
+PIU_READ = ioctl.linux.IOWR(IOC_MAGIC, 1, sizeof(PIUCmd))
+PIU_WRITE = ioctl.linux.IOWR(IOC_MAGIC, 2, sizeof(PIUCmd))
+PIU_INIT = ioctl.linux.IOWR(IOC_MAGIC, 3, sizeof(PIUCmd))
+
+
+@cli.group(invoke_without_command=True)
+@click.pass_context
+@click.option('--json', '-j', is_flag=True)
+def piu(ctx, json):
+
+ if ctx.invoked_subcommand:
+ return
+
+ p = Path('/sys/class/piu')
+ table = []
+
+ def r(path):
+ try:
+ with open(path, 'r') as f:
+ return f.read().strip()
+ except Exception:
+ return 'n/a'
+
+ for d in sorted(p.iterdir()):
+ row = [str(d).split('/')[-1], r(d/'piu_type'), r(d/'piu_mcu_version'), r(d/'piu_temp'), r(d/'cfp2_cage_temp'), r(d/'cfp2_tx_laser_temp'), r(d/'cfp2_rx_laser_temp')]
+ table.append(row)
+
+ if json:
+ echo(j.dumps({v[0]: {'type': v[1], 'mcu-version': v[2], 'piu-temp': v[3], 'cfp2-cage-temp': v[4], 'cfp2-tx-laser-temp': v[5], 'cfp2-rx-laser-temp': v[6]} for v in table}))
+ else:
+ echo(tabulate.tabulate(table, headers=['Name', 'Type', 'MCU Version', 'PIU Temp', 'CFP2 Cage Temp', 'CFP2 TX Laser Temp', 'CFP2 RX Laser Temp']))
+
+@piu.command()
+@click.argument("slot", type=click.IntRange(1, 4))
+@click.argument("addr")
+def read(slot, addr):
+ fd = os.open(f"/dev/piu{slot}", os.O_RDWR)
+ try:
+ cmd = PIUCmd(reg=int(addr, 0))
+ ioctl.ioctl(fd, PIU_READ, byref(cmd))
+ print(hex(cmd.val))
+ finally:
+ os.close(fd)
+
+
+@piu.command()
+@click.argument("slot", type=click.IntRange(1, 4))
+@click.argument("addr")
+@click.argument("value")
+def write(slot, addr, value):
+ fd = os.open(f"/dev/piu{slot}", os.O_RDWR)
+ try:
+ cmd = PIUCmd(reg=int(addr, 0), val=int(value, 0))
+ ioctl.ioctl(fd, PIU_WRITE, byref(cmd))
+ finally:
+ os.close(fd)
diff --git a/packages/platforms/wistron/x86-64/wtp-01-02-00/goldstone-platform-config/builds/diag/galileo/qsfp.py b/packages/platforms/wistron/x86-64/wtp-01-02-00/goldstone-platform-config/builds/diag/galileo/qsfp.py
new file mode 100644
index 0000000..cefc064
--- /dev/null
+++ b/packages/platforms/wistron/x86-64/wtp-01-02-00/goldstone-platform-config/builds/diag/galileo/qsfp.py
@@ -0,0 +1,122 @@
+import smbus
+import click
+from click import echo
+from .base import cli
+
+
+@cli.group()
+def qsfp():
+ pass
+
+
+@qsfp.command()
+@click.argument('port', type=click.IntRange(1, 12))
+def reset(port):
+ def q28_reset(port):
+ i2c_0 = smbus.SMBus(0)
+ if 1 <= port <= 8:
+ reset_bit = (0x1 << (port - 1))
+ i2c_0.write_byte_data(0x30, 0x16, reset_bit)
+ else:
+ reset_bit = (0x1 << (port - 9))
+ i2c_0.write_byte_data(0x30, 0x17, reset_bit)
+ print("Resetting QSFP on port %d..." % port)
+ q28_reset(port)
+
+
+@qsfp.command()
+def status():
+ def get_string(s): # copy the cbuffer into a string
+ result = ''
+ for c in s:
+ result += chr(c)
+ return result
+
+ def q28_present(port) -> bool:
+ i2c_0 = smbus.SMBus(0)
+ if 1 <= port <= 8:
+ present_bits = i2c_0.read_byte_data(0x30, 0x14)
+ return not ((present_bits & (0x1 << (port - 1))) > 0)
+ else:
+ present_bits = i2c_0.read_byte_data(0x30, 0x15)
+ return not ((present_bits & (0x1 << (port - 9))) > 0)
+
+ def q28_interrupt(port) -> bool:
+ i2c_0 = smbus.SMBus(0)
+ if 1 <= port <= 8:
+ present_bits = i2c_0.read_byte_data(0x30, 0x12)
+ return not ((present_bits & (0x1 << (port - 1))) > 0)
+ else:
+ present_bits = i2c_0.read_byte_data(0x30, 0x13)
+ return not ((present_bits & (0x1 << (port - 9))) > 0)
+
+ print("Port\tPresent\tInt\tVendor\t\t\tPart #\t\t\tSerial #")
+ for x in range(1, 13):
+ present = "Yes" if q28_present(x) else "No"
+ interrupt = "Yes" if q28_interrupt(x) else "No"
+ try:
+ i2c = smbus.SMBus(x + 8)
+ block = i2c.read_i2c_block_data(0x50, 148, (163-148+1))
+ vendor_name = get_string(block)
+ block = i2c.read_i2c_block_data(0x50, 168, (183-168+1))
+ vendor_pn = get_string(block)
+ block = i2c.read_i2c_block_data(0x50, 196, (211-196+1))
+ vendor_sn = get_string(block)
+
+ print("%d\t%s\t%s\t%s\t%s\t%s" % (x, present, interrupt, vendor_name, vendor_pn, vendor_sn))
+ i2c.close()
+ except OSError:
+ print("%d\t%s\t%s\tNo module" % (x, present, interrupt))
+
+
+@qsfp.command()
+def temp():
+ def q28_temp(port):
+ i2c = smbus.SMBus(port)
+ try:
+ block = i2c.read_i2c_block_data(0x50, 22, 2)
+ if block[0] >= 128:
+ reading = -(block[0] - 128 + block[1] / 256)
+ else:
+ reading = block[0] + block[1] / 256
+ except OSError:
+ return None
+ return reading
+
+ echo("Port\tTemperature (degC)")
+ for x in range(1, 13):
+ t = q28_temp(x + 8)
+ if t is None:
+ echo("%d\tNo module")
+ else:
+ print("%d\t%5.2f" % (x, t))
+
+
+@qsfp.group()
+def allbest():
+ pass
+
+
+@allbest.command()
+@click.argument('port', type=click.IntRange(1, 12))
+@click.argument('watt', type=click.Choice(['0.5', '5.0']))
+def power(port, watt):
+ i2c = smbus.SMBus(port + 8)
+ # set power without detecting LPMode pin
+ if watt == '0.5':
+ orig = i2c.read_byte_data(0x50, 93)
+ i2c.write_byte_data(0x50, 93, 0x3 | orig)
+ orig = i2c.read_byte_data(0x50, 110)
+ i2c.write_byte_data(0x50, 110, 0x30 | orig)
+ d1 = i2c.read_byte_data(0x50, 93)
+ d2 = i2c.read_byte_data(0x50, 110)
+ print(f"byte 93: 0x{d1:x} , byte 110: 0x{d2:x}")
+
+ else:
+ orig = i2c.read_byte_data(0x50, 93)
+ i2c.write_byte_data(0x50, 93, 0x5 | (orig & ~0x7))
+ orig = i2c.read_byte_data(0x50, 129)
+ i2c.write_byte_data(0x50, 129, 0x3 | orig)
+ d1 = i2c.read_byte_data(0x50, 93)
+ d2 = i2c.read_byte_data(0x50, 129)
+ print(f"byte 93: 0x{d1:x} , byte 129: 0x{d2:x}")
diff --git a/packages/platforms/wistron/x86-64/wtp-01-02-00/goldstone-platform-config/builds/diag/galileo1_cfp2piu_driver_manage.sh b/packages/platforms/wistron/x86-64/wtp-01-02-00/goldstone-platform-config/builds/diag/galileo1_cfp2piu_driver_manage.sh
new file mode 100755
index 0000000..340a896
--- /dev/null
+++ b/packages/platforms/wistron/x86-64/wtp-01-02-00/goldstone-platform-config/builds/diag/galileo1_cfp2piu_driver_manage.sh
@@ -0,0 +1,54 @@
+#!/bin/bash
+
+## Project: Galileo 1
+## File Name: galileo1_cfp2piu_driver_manage.sh
+## Description: To unload and load cfp2piu driver for running DCO-PIU MCU firmware upgrade tool or utility.
+## History: 2021/4/1 Created.
+
+stop() {
+ echo "Stop tai service, onlp service and cfp2piu driver."
+ ## Stop tai service
+ systemctl stop tai.service
+ ## Stop onlpd service
+ systemctl stop onlpd.service
+ ## unload cfp2piu driver
+ rmmod cfp2piu
+ echo "Done."
+}
+
+start() {
+ echo "Start tai service, onlp service and cfp2piu driver."
+ ## Load cfp2piu driver
+ modprobe cfp2piu
+ ## Start onlpd service
+ systemctl start onlpd.service
+ ## Start tai service
+ systemctl start tai.service
+ ## Start goldstone management service
+ systemctl start gs-mgmt.service
+ echo "Done."
+}
+
+check() {
+ echo "Check tai containers, onlp daemon and cfp2piu driver."
+ ## Check cfp2piu driver
+ lsmod | grep cfp2piu
+ ## Check onlp daemon
+ ps -aux | grep onlpd
+ ## Check tai container
+ kubectl get pods | grep tai
+}
+
+main() {
+ case "$1" in
+ start|stop|check)
+ $1
+ ;;
+ *)
+ echo "Usage: $0 {start|stop|check}"
+ exit 1
+ ;;
+ esac
+}
+
+main $*
diff --git a/packages/platforms/wistron/x86-64/wtp-01-02-00/goldstone-platform-config/builds/diag/requirements.txt b/packages/platforms/wistron/x86-64/wtp-01-02-00/goldstone-platform-config/builds/diag/requirements.txt
new file mode 100644
index 0000000..03c7767
--- /dev/null
+++ b/packages/platforms/wistron/x86-64/wtp-01-02-00/goldstone-platform-config/builds/diag/requirements.txt
@@ -0,0 +1,4 @@
+click==7.1.2
+click-shell==2.0
+smbus==1.1.post2
+ioctl@git+https://github.com/olavmrk/python-ioctl@master
diff --git a/packages/platforms/wistron/x86-64/wtp-01-02-00/goldstone-platform-config/builds/diag/setup.py b/packages/platforms/wistron/x86-64/wtp-01-02-00/goldstone-platform-config/builds/diag/setup.py
new file mode 100644
index 0000000..4bad8d0
--- /dev/null
+++ b/packages/platforms/wistron/x86-64/wtp-01-02-00/goldstone-platform-config/builds/diag/setup.py
@@ -0,0 +1,19 @@
+import setuptools
+
+with open("requirements.txt", "r") as f:
+ install_requires = f.read().split()
+
+setuptools.setup(
+ name='galileo',
+ version='0.2.0',
+ install_requires=install_requires,
+ description='Galileo Debug Tool',
+ python_requires='>=3.7',
+ entry_points={
+ 'console_scripts': [
+ 'galileo = galileo.main:main',
+ ],
+ },
+ packages=setuptools.find_packages(),
+ zip_safe = False,
+)
diff --git a/packages/platforms/wistron/x86-64/wtp-01-02-00/goldstone-platform-config/builds/init.sh b/packages/platforms/wistron/x86-64/wtp-01-02-00/goldstone-platform-config/builds/init.sh
new file mode 100755
index 0000000..2f3b3d1
--- /dev/null
+++ b/packages/platforms/wistron/x86-64/wtp-01-02-00/goldstone-platform-config/builds/init.sh
@@ -0,0 +1,8 @@
+#!/bin/sh
+
+set -eux
+
+systemctl enable gs-south-onlp
+systemctl enable gs-south-tai
+systemctl enable gs-south-system
+systemctl enable gs-south-sonic
diff --git a/packages/platforms/wistron/x86-64/wtp-01-02-00/goldstone-platform-config/builds/platform.json b/packages/platforms/wistron/x86-64/wtp-01-02-00/goldstone-platform-config/builds/platform.json
new file mode 100644
index 0000000..3ace8fa
--- /dev/null
+++ b/packages/platforms/wistron/x86-64/wtp-01-02-00/goldstone-platform-config/builds/platform.json
@@ -0,0 +1,26 @@
+[
+ {"interface": {"suffix": "1_1"}, "component": {"name": "port1"}},
+ {"interface": {"suffix": "2_1"}, "component": {"name": "port2"}},
+ {"interface": {"suffix": "3_1"}, "component": {"name": "port3"}},
+ {"interface": {"suffix": "4_1"}, "component": {"name": "port4"}},
+ {"interface": {"suffix": "5_1"}, "component": {"name": "port5"}},
+ {"interface": {"suffix": "6_1"}, "component": {"name": "port6"}},
+ {"interface": {"suffix": "7_1"}, "component": {"name": "port7"}},
+ {"interface": {"suffix": "8_1"}, "component": {"name": "port8"}},
+ {"interface": {"suffix": "9_1"}, "component": {"name": "port9"}},
+ {"interface": {"suffix": "10_1"}, "component": {"name": "port10"}},
+ {"interface": {"suffix": "11_1"}, "component": {"name": "port11"}},
+ {"interface": {"suffix": "12_1"}, "component": {"name": "port12"}},
+ {"interface": {"suffix": "13_1"}, "tai": {"module": {"name": "piu1", "location": "/dev/piu1"}, "hostif": {"name": "0", "index": 0}}},
+ {"interface": {"suffix": "14_1"}, "tai": {"module": {"name": "piu1", "location": "/dev/piu1"}, "hostif": {"name": "1", "index": 1}}},
+ {"interface": {"suffix": "15_1"}, "tai": {"module": {"name": "piu2", "location": "/dev/piu2"}, "hostif": {"name": "0", "index": 0}}},
+ {"interface": {"suffix": "16_1"}, "tai": {"module": {"name": "piu2", "location": "/dev/piu2"}, "hostif": {"name": "1", "index": 1}}},
+ {"interface": {"suffix": "17_1"}, "tai": {"module": {"name": "piu3", "location": "/dev/piu3"}, "hostif": {"name": "0", "index": 0}}},
+ {"interface": {"suffix": "18_1"}, "tai": {"module": {"name": "piu3", "location": "/dev/piu3"}, "hostif": {"name": "1", "index": 1}}},
+ {"interface": {"suffix": "19_1"}, "tai": {"module": {"name": "piu4", "location": "/dev/piu4"}, "hostif": {"name": "0", "index": 0}}},
+ {"interface": {"suffix": "20_1"}, "tai": {"module": {"name": "piu4", "location": "/dev/piu4"}, "hostif": {"name": "1", "index": 1}}},
+ {"component": {"name": "piu1"}, "tai": {"module": {"name": "piu1", "location": "/dev/piu1"}, "netif": {"name": "0", "index": 0}}},
+ {"component": {"name": "piu2"}, "tai": {"module": {"name": "piu2", "location": "/dev/piu2"}, "netif": {"name": "0", "index": 0}}},
+ {"component": {"name": "piu3"}, "tai": {"module": {"name": "piu3", "location": "/dev/piu3"}, "netif": {"name": "0", "index": 0}}},
+ {"component": {"name": "piu4"}, "tai": {"module": {"name": "piu4", "location": "/dev/piu4"}, "netif": {"name": "0", "index": 0}}}
+]
diff --git a/packages/platforms/wistron/x86-64/wtp-01-02-00/goldstone-platform-config/builds/tai/mux/exec.py b/packages/platforms/wistron/x86-64/wtp-01-02-00/goldstone-platform-config/builds/tai/mux/exec.py
new file mode 100755
index 0000000..d2acaf9
--- /dev/null
+++ b/packages/platforms/wistron/x86-64/wtp-01-02-00/goldstone-platform-config/builds/tai/mux/exec.py
@@ -0,0 +1,42 @@
+#!/usr/bin/env python3
+
+import sys
+from pathlib import Path
+import time
+
+def main():
+ if len(sys.argv) != 2:
+ sys.exit(1)
+
+ arg = sys.argv[1]
+
+ if arg == 'list':
+ dev = Path('/dev')
+ print('\n'.join(str(v) for v in dev.glob('piu*')))
+ return
+
+ piu = arg.split('/')[-1]
+
+ with open(f'/sys/class/piu/{piu}/piu_type') as f:
+ type_ = f.read().strip()
+
+ if type_ == 'ACO':
+ print('libtai-aco.so')
+ return
+ elif type_ == 'DCO':
+
+ try:
+ with open(f'/sys/class/piu/{piu}/cfp2_vendor') as f:
+ cfp2_vendor = f.read().strip()
+ except:
+ cfp2_vendor = None
+
+ time.sleep(1)
+
+ if cfp2_vendor == 'MENARA NETWORKS':
+ print('libtai-menara.so')
+ elif cfp2_vendor == 'LUMENTUM':
+ print('libtai-lumentum.so')
+
+if __name__ == '__main__':
+ main()
diff --git a/packages/platforms/wistron/x86-64/wtp-01-02-00/goldstone-platform-config/builds/tai/nel/config.json b/packages/platforms/wistron/x86-64/wtp-01-02-00/goldstone-platform-config/builds/tai/nel/config.json
new file mode 100644
index 0000000..979413b
--- /dev/null
+++ b/packages/platforms/wistron/x86-64/wtp-01-02-00/goldstone-platform-config/builds/tai/nel/config.json
@@ -0,0 +1,15 @@
+{
+ "netif": {
+ "attrs": {
+ "rx-coarse-skew": [0,1,2,2],
+ "rx-fine-skew" : [0,82,262,0],
+ "tx-coarse-skew" : [1,0,0,0],
+ "tx-fine-skew" : [0,30,0,55],
+ "tx-tap" : [[-0.02734375, 0.08203125, -0.1328125, -0.03125, 0.4453125, -0.03125, -0.1328125, 0.08203125, -0.03125],
+ [-0.02734375, 0.08203125, -0.1328125, -0.03125, 0.4453125, -0.03125, -0.1328125, 0.08203125, -0.02734375],
+ [-0.03125, 0.08203125, -0.1328125, -0.03125, 0.4453125, -0.03125, -0.1328125, 0.08203125, -0.03125],
+ [-0.02734375, 0.078125, -0.1328125, -0.03125, 0.4453125, -0.03125, -0.1328125, 0.08203125, -0.02734375]],
+ "tx-eql-amp" : [14,14,14,14]
+ }
+ }
+}
diff --git a/packages/platforms/wistron/x86-64/wtp-01-02-00/goldstone-platform-config/builds/usonic/config.bcm b/packages/platforms/wistron/x86-64/wtp-01-02-00/goldstone-platform-config/builds/usonic/config.bcm
new file mode 100644
index 0000000..a2bb668
--- /dev/null
+++ b/packages/platforms/wistron/x86-64/wtp-01-02-00/goldstone-platform-config/builds/usonic/config.bcm
@@ -0,0 +1,149 @@
+# wistron ploomtech 20x100G SDK config
+os=unix
+schan_intr_enable=0
+l2_mem_entries=40960
+l2xmsg_mode=1
+l3_mem_entries=40960
+parity_correction=0
+parity_enable=0
+mmu_lossless=1
+
+#pbmp_oversubscribe=0x444444441111111104444444422222222
+pbmp_xport_xe=0x444444451111111144444444422222222
+
+#
+phy_enable=1
+arl_clean_timeout_usec=15000000
+asf_mem_profile=2
+bcm_num_cos=8
+bcm_stat_flags=1
+bcm_stat_jumbo=9236
+cdma_timeout_usec=15000000
+dma_desc_timeout_usec=15000000
+ipv6_lpm_128b_enable=1
+l3_alpm_enable=2
+lpm_scaling_enable=0
+max_vp_lags=0
+miim_intr_enable=0
+oversubscribe_mode=1
+
+# portmap_0=x:xx
+#FC0
+portmap_1=1:100
+
+#FC1
+portmap_5=5:100
+
+#FC2
+portmap_9=9:100
+
+#FC3
+portmap_13=13:100
+
+#FC4
+#portmap_17=17:100
+
+#FC5
+#portmap_21=21:100
+
+#FC6
+#portmap_25=25:100
+
+#FC7
+portmap_29=29:100
+
+# Tile-1
+#FC8
+#portmap_34=33:100
+
+#FC9
+#portmap_38=37:100
+
+#FC10
+#portmap_42=41:100
+
+#FC11
+portmap_46=45:100
+
+#FC12
+portmap_54=53:100
+
+#FC13
+portmap_50=49:100
+
+#FC14
+portmap_62=61:100
+
+#FC15
+portmap_58=57:100
+
+#TSC-E Management port 1
+#portmap_66=129:10
+#portmap_67=133:10
+
+# Tile-2
+#FC16
+portmap_68=69:100
+
+#FC17
+portmap_72=65:100
+
+#FC18
+portmap_76=77:100
+
+#FC19
+portmap_80=73:100
+
+#FC20
+portmap_84=81:100
+
+#FC21
+#portmap_88=85:100
+
+#FC22
+#portmap_92=89:100
+
+#FC23
+#portmap_96=93:100
+
+#TSC-E Management port 2
+#portmap_100=131:10
+#portmap_101=134:10
+
+# Tile-3
+#FC24
+portmap_102=97:100
+
+#FC25
+#portmap_106=101:100
+
+#FC26
+#portmap_110=105:100
+
+#FC27
+#portmap_114=109:100
+
+#FC28
+portmap_118=113:100
+
+#FC29
+portmap_122=117:100
+
+#FC30
+portmap_126=121:100
+
+#FC31
+portmap_130=125:100
+
+serdes_fec_enable_29=2
+serdes_fec_enable_46=2
+serdes_fec_enable_50=2
+serdes_fec_enable_54=2
+serdes_fec_enable_58=2
+serdes_fec_enable_62=2
+serdes_fec_enable_68=2
+serdes_fec_enable_72=2
+serdes_fec_enable_76=2
+serdes_fec_enable_80=2
+serdes_fec_enable_84=2
+serdes_fec_enable_102=2
diff --git a/packages/platforms/wistron/x86-64/wtp-01-02-00/goldstone-platform-config/builds/usonic/config.bcm.j2 b/packages/platforms/wistron/x86-64/wtp-01-02-00/goldstone-platform-config/builds/usonic/config.bcm.j2
new file mode 100644
index 0000000..039c530
--- /dev/null
+++ b/packages/platforms/wistron/x86-64/wtp-01-02-00/goldstone-platform-config/builds/usonic/config.bcm.j2
@@ -0,0 +1,91 @@
+# Wistron WTP-01-02-00 20x100G SDK config
+os=unix
+schan_intr_enable=0
+l2_mem_entries=40960
+l2xmsg_mode=1
+l3_mem_entries=40960
+parity_correction=0
+parity_enable=0
+mmu_lossless=1
+
+#pbmp_oversubscribe=0x444444441111111104444444422222222
+pbmp_xport_xe=0x3ffffffffffffffffffffffffffffffffe
+
+#
+port_flex_enable=1
+phy_enable=1
+arl_clean_timeout_usec=15000000
+asf_mem_profile=2
+bcm_num_cos=8
+bcm_stat_flags=1
+bcm_stat_jumbo=9236
+cdma_timeout_usec=15000000
+dma_desc_timeout_usec=15000000
+ipv6_lpm_128b_enable=1
+l3_alpm_enable=2
+lpm_scaling_enable=0
+max_vp_lags=0
+miim_intr_enable=0
+oversubscribe_mode=1
+{% for i in interfaces -%}
+portmap_{{ i['port'] }}={{ i['lane'] }}:{{ i['speed'] }}
+{% endfor %}
+serdes_preemphasis_lane0_29=0x096205
+serdes_preemphasis_lane1_29=0x096205
+serdes_preemphasis_lane2_29=0x096205
+serdes_preemphasis_lane3_29=0x0b5f06
+
+serdes_preemphasis_lane0_46=0x096205
+serdes_preemphasis_lane1_46=0x096205
+serdes_preemphasis_lane2_46=0x096205
+serdes_preemphasis_lane3_46=0x096205
+
+serdes_preemphasis_lane0_50=0x096205
+serdes_preemphasis_lane1_50=0x096205
+serdes_preemphasis_lane2_50=0x096205
+serdes_preemphasis_lane3_50=0x096205
+
+serdes_preemphasis_lane0_54=0x096205
+serdes_preemphasis_lane1_54=0x096205
+serdes_preemphasis_lane2_54=0x096205
+serdes_preemphasis_lane3_54=0x096205
+
+serdes_preemphasis_lane0_58=0x096205
+serdes_preemphasis_lane1_58=0x096205
+serdes_preemphasis_lane2_58=0x096205
+serdes_preemphasis_lane3_58=0x096205
+
+serdes_preemphasis_lane0_62=0x096205
+serdes_preemphasis_lane1_62=0x096205
+serdes_preemphasis_lane2_62=0x096205
+serdes_preemphasis_lane3_62=0x096205
+
+serdes_preemphasis_lane0_68=0x096205
+serdes_preemphasis_lane1_68=0x096205
+serdes_preemphasis_lane2_68=0x096205
+serdes_preemphasis_lane3_68=0x096205
+
+serdes_preemphasis_lane0_72=0x096205
+serdes_preemphasis_lane1_72=0x096205
+serdes_preemphasis_lane2_72=0x096205
+serdes_preemphasis_lane3_72=0x096205
+
+serdes_preemphasis_lane0_76=0x096205
+serdes_preemphasis_lane1_76=0x096205
+serdes_preemphasis_lane2_76=0x096205
+serdes_preemphasis_lane3_76=0x096205
+
+serdes_preemphasis_lane0_80=0x096205
+serdes_preemphasis_lane1_80=0x096205
+serdes_preemphasis_lane2_80=0x096205
+serdes_preemphasis_lane3_80=0x096205
+
+serdes_preemphasis_lane0_84=0x096205
+serdes_preemphasis_lane1_84=0x096205
+serdes_preemphasis_lane2_84=0x096205
+serdes_preemphasis_lane3_84=0x096205
+
+serdes_preemphasis_lane0_102=0x096205
+serdes_preemphasis_lane1_102=0x096205
+serdes_preemphasis_lane2_102=0x096205
+serdes_preemphasis_lane3_102=0x096205
diff --git a/packages/platforms/wistron/x86-64/wtp-01-02-00/goldstone-platform-config/builds/usonic/interfaces.json b/packages/platforms/wistron/x86-64/wtp-01-02-00/goldstone-platform-config/builds/usonic/interfaces.json
new file mode 100644
index 0000000..4d8e177
--- /dev/null
+++ b/packages/platforms/wistron/x86-64/wtp-01-02-00/goldstone-platform-config/builds/usonic/interfaces.json
@@ -0,0 +1,24 @@
+[
+{"port": 46, "first_lane": 45, "lane_num": 4, "alias_prefix": "QSFP1", "index": 1, "speed": 100000, "interface-type": "cr"},
+{"port": 29, "first_lane": 29, "lane_num": 4, "alias_prefix": "QSFP2", "index": 5, "speed": 100000, "interface-type": "cr"},
+{"port": 54, "first_lane": 53, "lane_num": 4, "alias_prefix": "QSFP3", "index": 9, "speed": 100000, "interface-type": "cr"},
+{"port": 50, "first_lane": 49, "lane_num": 4, "alias_prefix": "QSFP4", "index": 13, "speed": 100000, "interface-type": "cr"},
+{"port": 62, "first_lane": 61, "lane_num": 4, "alias_prefix": "QSFP5", "index": 17, "speed": 100000, "interface-type": "cr"},
+{"port": 58, "first_lane": 57, "lane_num": 4, "alias_prefix": "QSFP6", "index": 21, "speed": 100000, "interface-type": "cr"},
+{"port": 68, "first_lane": 69, "lane_num": 4, "alias_prefix": "QSFP7", "index": 25, "speed": 100000, "interface-type": "cr"},
+{"port": 72, "first_lane": 65, "lane_num": 4, "alias_prefix": "QSFP8", "index": 29, "speed": 100000, "interface-type": "cr"},
+{"port": 76, "first_lane": 77, "lane_num": 4, "alias_prefix": "QSFP9", "index": 33, "speed": 100000, "interface-type": "cr"},
+{"port": 80, "first_lane": 73, "lane_num": 4, "alias_prefix": "QSFP10", "index": 37, "speed": 100000, "interface-type": "cr"},
+{"port": 102, "first_lane": 97, "lane_num": 4, "alias_prefix": "QSFP11", "index": 41, "speed": 100000, "interface-type": "cr"},
+{"port": 84, "first_lane": 81, "lane_num": 4, "alias_prefix": "QSFP12", "index": 45, "speed": 100000, "interface-type": "cr"},
+{"port": 1, "first_lane": 1, "lane_num": 4, "alias_prefix": "PIU1-1", "index": 49, "speed": 100000, "interface-type": "kr"},
+{"port": 5, "first_lane": 5, "lane_num": 4, "alias_prefix": "PIU1-2", "index": 53, "speed": 100000, "interface-type": "kr"},
+{"port": 9, "first_lane": 9, "lane_num": 4, "alias_prefix": "PIU2-1", "index": 57, "speed": 100000, "interface-type": "kr"},
+{"port": 13, "first_lane": 13, "lane_num": 4, "alias_prefix": "PIU2-2", "index": 61, "speed": 100000, "interface-type": "kr"},
+{"port": 118, "first_lane": 113, "lane_num": 4, "alias_prefix": "PIU3-1", "index": 65, "speed": 100000, "interface-type": "kr"},
+{"port": 122, "first_lane": 117, "lane_num": 4, "alias_prefix": "PIU3-2", "index": 69, "speed": 100000, "interface-type": "kr"},
+{"port": 126, "first_lane": 121, "lane_num": 4, "alias_prefix": "PIU4-1", "index": 73, "speed": 100000, "interface-type": "kr"},
+{"port": 130, "first_lane": 125, "lane_num": 4, "alias_prefix": "PIU4-2", "index": 77, "speed": 100000, "interface-type": "kr"},
+{"port": 100, "first_lane": 131, "lane_num": 2, "alias_prefix": "CPU1", "index": 81, "speed": 10000},
+{"port": 66, "first_lane": 129, "lane_num": 2, "alias_prefix": "CPU2", "index": 83, "speed": 10000}
+]
diff --git a/packages/platforms/wistron/x86-64/wtp-01-02-00/goldstone-platform-config/builds/usonic/led_proc_init.soc b/packages/platforms/wistron/x86-64/wtp-01-02-00/goldstone-platform-config/builds/usonic/led_proc_init.soc
new file mode 100644
index 0000000..577b1d1
--- /dev/null
+++ b/packages/platforms/wistron/x86-64/wtp-01-02-00/goldstone-platform-config/builds/usonic/led_proc_init.soc
@@ -0,0 +1,49 @@
+# LED microprocessor initialization for Galileo
+# revised history
+# version : 0.0.3, Add 10G/25G support, 10G/40G light yellow, 25G/100G light green
+# version : 0.0.2, fixed Q28 port should light green color issue
+# version: 0.0.1, led program for Galileo
+
+led 0 stop
+led 0 prog 02 00 28 60 E1 67 32 67 39 67 40 86 E1 06 E1 28 67 39 67 40 86 E1 06 E1 28 67 39 67 40 86 E1 06 E1 28 67 39 67 40 86 E1 06 E1 D2 28 74 02 86 E0 3A 64 67 47 71 5C 77 55 57 67 4E 75 63 77 67 57 32 00 32 01 B7 87 57 12 A0 F8 15 1A 06 57 12 A0 F8 15 1A 00 57 32 0F 87 32 0E 87 57 32 0E 87 32 0F 87 57 32 0E 87 57 32 0F 87 57
+modreg CMIC_LEDUP0_PORT_ORDER_REMAP_0_3 REMAP_PORT_3=0x00 REMAP_PORT_2=0x01 REMAP_PORT_1=0x02 REMAP_PORT_0=0x03
+modreg CMIC_LEDUP0_PORT_ORDER_REMAP_4_7 REMAP_PORT_7=0x3f REMAP_PORT_6=0x3f REMAP_PORT_5=0x3f REMAP_PORT_4=0x3f
+modreg CMIC_LEDUP0_PORT_ORDER_REMAP_8_11 REMAP_PORT_9=0x3f REMAP_PORT_8=0x3f REMAP_PORT_11=0x3f REMAP_PORT_10=0x3f
+modreg CMIC_LEDUP0_PORT_ORDER_REMAP_12_15 REMAP_PORT_15=0x3f REMAP_PORT_14=0x3f REMAP_PORT_13=0x3f REMAP_PORT_12=0x3f
+modreg CMIC_LEDUP0_PORT_ORDER_REMAP_16_19 REMAP_PORT_19=0x14 REMAP_PORT_18=0x15 REMAP_PORT_17=0x16 REMAP_PORT_16=0x17
+modreg CMIC_LEDUP0_PORT_ORDER_REMAP_20_23 REMAP_PORT_23=0x10 REMAP_PORT_22=0x11 REMAP_PORT_21=0x12 REMAP_PORT_20=0x13
+modreg CMIC_LEDUP0_PORT_ORDER_REMAP_24_27 REMAP_PORT_27=0x0c REMAP_PORT_26=0x0d REMAP_PORT_25=0x0e REMAP_PORT_24=0x0f
+modreg CMIC_LEDUP0_PORT_ORDER_REMAP_28_31 REMAP_PORT_31=0x08 REMAP_PORT_30=0x09 REMAP_PORT_29=0x0a REMAP_PORT_28=0x0b
+modreg CMIC_LEDUP0_PORT_ORDER_REMAP_32_35 REMAP_PORT_35=0x24 REMAP_PORT_34=0x25 REMAP_PORT_33=0x26 REMAP_PORT_32=0x27
+modreg CMIC_LEDUP0_PORT_ORDER_REMAP_36_39 REMAP_PORT_39=0x20 REMAP_PORT_38=0x21 REMAP_PORT_37=0x22 REMAP_PORT_36=0x23
+modreg CMIC_LEDUP0_PORT_ORDER_REMAP_40_43 REMAP_PORT_43=0x1c REMAP_PORT_42=0x1d REMAP_PORT_41=0x1e REMAP_PORT_40=0x1f
+modreg CMIC_LEDUP0_PORT_ORDER_REMAP_44_47 REMAP_PORT_47=0x18 REMAP_PORT_46=0x19 REMAP_PORT_45=0x1a REMAP_PORT_44=0x1b
+modreg CMIC_LEDUP0_PORT_ORDER_REMAP_48_51 REMAP_PORT_51=0x3f REMAP_PORT_50=0x3f REMAP_PORT_49=0x3f REMAP_PORT_48=0x3f
+modreg CMIC_LEDUP0_PORT_ORDER_REMAP_52_55 REMAP_PORT_55=0x3f REMAP_PORT_54=0x3f REMAP_PORT_53=0x3f REMAP_PORT_52=0x3f
+modreg CMIC_LEDUP0_PORT_ORDER_REMAP_56_59 REMAP_PORT_59=0x3f REMAP_PORT_58=0x3f REMAP_PORT_57=0x3f REMAP_PORT_56=0x3f
+modreg CMIC_LEDUP0_PORT_ORDER_REMAP_60_63 REMAP_PORT_63=0x04 REMAP_PORT_62=0x05 REMAP_PORT_61=0x06 REMAP_PORT_60=0x07
+led 0 auto on
+led 0 start
+
+led 1 stop
+led 1 prog 02 00 28 60 E1 67 32 67 39 67 40 86 E1 06 E1 28 67 39 67 40 86 E1 06 E1 28 67 39 67 40 86 E1 06 E1 28 67 39 67 40 86 E1 06 E1 D2 28 74 02 86 E0 3A 64 67 47 71 5C 77 55 57 67 4E 75 63 77 67 57 32 00 32 01 B7 87 57 12 A0 F8 15 1A 06 57 12 A0 F8 15 1A 00 57 32 0F 87 32 0E 87 57 32 0E 87 32 0F 87 57 32 0E 87 57 32 0F 87 57
+modreg CMIC_LEDUP1_PORT_ORDER_REMAP_0_3 REMAP_PORT_3=0x3f REMAP_PORT_2=0x3f REMAP_PORT_1=0x3f REMAP_PORT_0=0x3f
+modreg CMIC_LEDUP1_PORT_ORDER_REMAP_4_7 REMAP_PORT_7=0x3f REMAP_PORT_6=0x3f REMAP_PORT_5=0x3f REMAP_PORT_4=0x3f
+modreg CMIC_LEDUP1_PORT_ORDER_REMAP_8_11 REMAP_PORT_8=0x3f REMAP_PORT_9=0x3f REMAP_PORT_10=0x3f REMAP_PORT_11=0x3f
+modreg CMIC_LEDUP1_PORT_ORDER_REMAP_12_15 REMAP_PORT_15=0x00 REMAP_PORT_14=0x01 REMAP_PORT_13=0x02 REMAP_PORT_12=0x03
+modreg CMIC_LEDUP1_PORT_ORDER_REMAP_16_19 REMAP_PORT_19=0x08 REMAP_PORT_18=0x09 REMAP_PORT_17=0x0a REMAP_PORT_16=0x0b
+modreg CMIC_LEDUP1_PORT_ORDER_REMAP_20_23 REMAP_PORT_23=0x04 REMAP_PORT_22=0x05 REMAP_PORT_21=0x06 REMAP_PORT_20=0x07
+modreg CMIC_LEDUP1_PORT_ORDER_REMAP_24_27 REMAP_PORT_27=0x10 REMAP_PORT_26=0x11 REMAP_PORT_25=0x12 REMAP_PORT_24=0x13
+modreg CMIC_LEDUP1_PORT_ORDER_REMAP_28_31 REMAP_PORT_31=0x0c REMAP_PORT_30=0x0d REMAP_PORT_29=0x0e REMAP_PORT_28=0x0f
+modreg CMIC_LEDUP1_PORT_ORDER_REMAP_32_35 REMAP_PORT_35=0x18 REMAP_PORT_34=0x19 REMAP_PORT_33=0x1a REMAP_PORT_32=0x1b
+modreg CMIC_LEDUP1_PORT_ORDER_REMAP_36_39 REMAP_PORT_39=0x14 REMAP_PORT_38=0x15 REMAP_PORT_37=0x16 REMAP_PORT_36=0x17
+modreg CMIC_LEDUP1_PORT_ORDER_REMAP_40_43 REMAP_PORT_43=0x20 REMAP_PORT_42=0x21 REMAP_PORT_41=0x22 REMAP_PORT_40=0x23
+modreg CMIC_LEDUP1_PORT_ORDER_REMAP_44_47 REMAP_PORT_47=0x1c REMAP_PORT_46=0x1d REMAP_PORT_45=0x1e REMAP_PORT_44=0x1f
+modreg CMIC_LEDUP1_PORT_ORDER_REMAP_48_51 REMAP_PORT_51=0x24 REMAP_PORT_50=0x25 REMAP_PORT_49=0x26 REMAP_PORT_48=0x27
+modreg CMIC_LEDUP1_PORT_ORDER_REMAP_52_55 REMAP_PORT_55=0x3f REMAP_PORT_54=0x3f REMAP_PORT_53=0x3f REMAP_PORT_52=0x3f
+modreg CMIC_LEDUP1_PORT_ORDER_REMAP_56_59 REMAP_PORT_59=0x3f REMAP_PORT_58=0x3f REMAP_PORT_57=0x3f REMAP_PORT_56=0x3f
+modreg CMIC_LEDUP1_PORT_ORDER_REMAP_60_63 REMAP_PORT_63=0x3f REMAP_PORT_62=0x3f REMAP_PORT_61=0x3f REMAP_PORT_60=0x3f
+led 1 auto on
+led 1 start
+
+getreg CMIC_LEDUP1_DATA_RAM
diff --git a/packages/platforms/wistron/x86-64/wtp-01-02-00/goldstone-platform-config/builds/usonic/port_config.ini b/packages/platforms/wistron/x86-64/wtp-01-02-00/goldstone-platform-config/builds/usonic/port_config.ini
new file mode 100644
index 0000000..4874b9f
--- /dev/null
+++ b/packages/platforms/wistron/x86-64/wtp-01-02-00/goldstone-platform-config/builds/usonic/port_config.ini
@@ -0,0 +1,21 @@
+# name lanes alias index speed
+Ethernet1 45,46,47,48 QSPF1-E1/1 1 100000
+Ethernet2 29,30,31,32 QSFP2-E2/1 2 100000
+Ethernet3 53,54,55,56 QSFP3-E3/1 3 100000
+Ethernet4 49,50,51,52 QSFP4-E4/1 4 100000
+Ethernet5 61,62,63,64 QSFP5-E5/1 5 100000
+Ethernet6 57,58,59,60 QSFP6-E6/1 6 100000
+Ethernet7 69,70,71,72 QSFP7-E7/1 7 100000
+Ethernet8 65,66,67,68 QSFP8-E8/1 8 100000
+Ethernet9 77,78,79,80 QSFP9-E9/1 9 100000
+Ethernet10 73,74,75,76 QSFP10-E10/1 10 100000
+Ethernet11 97,98,99,100 QSFP11-E11/1 11 100000
+Ethernet12 81,82,83,84 QSFP12-E12/1 12 100000
+Ethernet13 1,2,3,4 PIU1-E1 13 100000
+Ethernet14 5,6,7,8 PIU1-E2 14 100000
+Ethernet15 9,10,11,12 PIU2-E3 15 100000
+Ethernet16 13,14,15,16 PIU2-E4 16 100000
+Ethernet17 113,114,115,116 PIU3-E5 17 100000
+Ethernet18 117,118,119,120 PIU3-E6 18 100000
+Ethernet19 121,122,123,124 PIU4-E7 19 100000
+Ethernet20 125,126,127,128 PIU4-E8 20 100000
diff --git a/packages/platforms/wistron/x86-64/wtp-01-02-00/goldstone-platform-config/builds/usonic/port_config.ini.j2 b/packages/platforms/wistron/x86-64/wtp-01-02-00/goldstone-platform-config/builds/usonic/port_config.ini.j2
new file mode 100644
index 0000000..2722735
--- /dev/null
+++ b/packages/platforms/wistron/x86-64/wtp-01-02-00/goldstone-platform-config/builds/usonic/port_config.ini.j2
@@ -0,0 +1,4 @@
+# name lanes alias index speed
+{% for i in interfaces -%}
+{{ '%-15s' | format(i['name']) }} {{ '%-15s' | format(i['lanes']) }} {{ '%-15s' | format(i['alias']) }} {{ '%-5s' | format(i['index']) }} {{ i['speed'] }}
+{% endfor %}
diff --git a/packages/platforms/wistron/x86-64/wtp-01-02-00/goldstone-platform-config/builds/usonic/sai.profile b/packages/platforms/wistron/x86-64/wtp-01-02-00/goldstone-platform-config/builds/usonic/sai.profile
new file mode 100644
index 0000000..4d4150d
--- /dev/null
+++ b/packages/platforms/wistron/x86-64/wtp-01-02-00/goldstone-platform-config/builds/usonic/sai.profile
@@ -0,0 +1 @@
+SAI_INIT_CONFIG_FILE=/etc/sonic/config.bcm
diff --git a/packages/platforms/wistron/x86-64/wtp-01-02-00/modules/Makefile b/packages/platforms/wistron/x86-64/wtp-01-02-00/modules/Makefile
new file mode 100644
index 0000000..003238c
--- /dev/null
+++ b/packages/platforms/wistron/x86-64/wtp-01-02-00/modules/Makefile
@@ -0,0 +1 @@
+include $(ONL)/make/pkg.mk
\ No newline at end of file
diff --git a/packages/platforms/wistron/x86-64/wtp-01-02-00/modules/PKG.yml b/packages/platforms/wistron/x86-64/wtp-01-02-00/modules/PKG.yml
new file mode 100644
index 0000000..aa22a9f
--- /dev/null
+++ b/packages/platforms/wistron/x86-64/wtp-01-02-00/modules/PKG.yml
@@ -0,0 +1 @@
+!include $ONL_TEMPLATES/platform-modules.yml VENDOR=wistron BASENAME=x86-64-wistron-wtp-01-02-00 ARCH=amd64 KERNELS="onl-kernel-5.4-lts-x86-64-all:amd64"
diff --git a/packages/platforms/wistron/x86-64/wtp-01-02-00/modules/builds/.gitignore b/packages/platforms/wistron/x86-64/wtp-01-02-00/modules/builds/.gitignore
new file mode 100644
index 0000000..a65b417
--- /dev/null
+++ b/packages/platforms/wistron/x86-64/wtp-01-02-00/modules/builds/.gitignore
@@ -0,0 +1 @@
+lib
diff --git a/packages/platforms/wistron/x86-64/wtp-01-02-00/modules/builds/Makefile b/packages/platforms/wistron/x86-64/wtp-01-02-00/modules/builds/Makefile
new file mode 100644
index 0000000..048d687
--- /dev/null
+++ b/packages/platforms/wistron/x86-64/wtp-01-02-00/modules/builds/Makefile
@@ -0,0 +1,6 @@
+KERNELS := onl-kernel-5.4-lts-x86-64-all:amd64
+KMODULES := $(wildcard *.c)
+VENDOR := wistron
+BASENAME := x86-64-wistron-wtp-01-02-00
+ARCH := x86_64
+include $(ONL)/make/kmodule.mk
diff --git a/packages/platforms/wistron/x86-64/wtp-01-02-00/modules/builds/i2c-imc.c b/packages/platforms/wistron/x86-64/wtp-01-02-00/modules/builds/i2c-imc.c
new file mode 100644
index 0000000..653684b
--- /dev/null
+++ b/packages/platforms/wistron/x86-64/wtp-01-02-00/modules/builds/i2c-imc.c
@@ -0,0 +1,515 @@
+// SPDX-License-Identifier: GPL-2.0
+
+/*
+ * Intel Memory Controller iMC SMBus Driver to DIMMs.
+ *
+ * Copyright (c) 2013-2016 Andrew Lutomirski
+ * Copyright (c) 2020 Stefan Schaeckeler , Cisco Systems
+ */
+
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+
+#include
+#include
+#include
+#include
+#include
+
+/* iMC Main, PCI dev 0x13, fn 0, 8086.6fa8 */
+#define PCI_DEVICE_ID_INTEL_BROADWELL_IMC_TA 0x6fa8
+
+/* Register offsets for channel pairs 0+1 and 2+3 */
+#define SMBSTAT(i) (0x180 + 0x10*(i))
+#define SMBCMD(i) (0x184 + 0x10*(i))
+#define SMBCNTL(i) (0x188 + 0x10*(i))
+
+/* SMBSTAT fields */
+#define SMBSTAT_RDO (1U << 31) /* Read Data Valid */
+#define SMBSTAT_WOD (1U << 30) /* Write Operation Done */
+#define SMBSTAT_SBE (1U << 29) /* SMBus Error */
+#define SMBSTAT_SMB_BUSY (1U << 28) /* SMBus Busy State */
+#define SMBSTAT_RDATA_MASK 0xffff /* Result of a read */
+
+/* SMBCMD fields */
+#define SMBCMD_TRIGGER (1U << 31) /* CMD Trigger */
+#define SMBCMD_WORD_ACCESS (1U << 29) /* Word (vs byte) access */
+#define SMBCMD_TYPE_READ (0U << 27) /* Read */
+#define SMBCMD_TYPE_WRITE (1U << 27) /* Write */
+#define SMBCMD_SA_SHIFT 24
+#define SMBCMD_BA_SHIFT 16
+
+/* SMBCNTL fields */
+#define SMBCNTL_DTI_MASK 0xf0000000 /* Slave Address low bits */
+#define SMBCNTL_DTI_SHIFT 28 /* Slave Address low bits */
+#define SMBCNTL_DIS_WRT (1U << 26) /* Disable Write */
+#define SMBCNTL_TSOD_PRES_MASK 0xff /* DIMM Present mask */
+
+/* For sanity check: bits that might randomly change if we race with firmware */
+#define SMBCMD_OUR_BITS (~(u32)SMBCMD_TRIGGER)
+#define SMBCNTL_OUR_BITS (SMBCNTL_DTI_MASK)
+
+
+/* System Address Decoder, PCI dev 0xf fn 5, 8086.6ffd */
+#define PCI_DEVICE_ID_INTEL_BROADWELL_IMC_SAD 0x6ffd
+
+/* Register offsets */
+#define SADCNTL 0xf4
+
+/* SADCNTL fields */
+#define SADCNTL_LOCAL_NODEID_MASK 0xf /* Local NodeID of socket */
+
+
+/* Power Control Unit, PCI dev 0x1e fn 1, 8086.6f99 */
+#define PCI_DEVICE_ID_INTEL_BROADWELL_IMC_PCU 0x6f99
+
+/* Register offsets */
+#define TSODCNTL 0xe0
+
+/* TSODCNTL fields */
+
+
+/* DIMMs hold jc42 thermal sensors starting at i2c address 0x18 */
+#define DIMM_SENSOR_DRV "jc42"
+#define DIMM_SENSOR_BASE_ADR 0x18
+
+
+#define sanitycheck 1
+
+struct imc_channelpair {
+ struct i2c_adapter adapter;
+ bool can_write, cltt;
+};
+
+struct imc_pcu {
+ struct pci_dev *pci_dev;
+ u32 tsod_polling_interval;
+ struct mutex mutex; /* see imc_channelpair_claim() */
+};
+
+struct imc_priv {
+ struct pci_dev *pci_dev;
+ struct imc_channelpair channelpair[2];
+ struct imc_pcu pcu;
+ bool suspended;
+};
+
+static int imc_channelpair_claim(struct imc_priv *priv, int i)
+{
+ if (priv->suspended)
+ return -EIO;
+
+ /*
+ * i2c controllers need exclusive access to a psu register and wait
+ * then for 10ms before starting their transaction.
+ *
+ * Possible optimization: Once an i2c controller modified the psu
+ * register and waits, the other controller does not need to wait for
+ * the whole 10ms, but then only this other controller has to clean up
+ * the psu register.
+ */
+ mutex_lock(&priv->pcu.mutex);
+
+ if (priv->channelpair[i].cltt) {
+ pci_write_config_dword(priv->pcu.pci_dev, TSODCNTL, 0);
+ usleep_range(10000, 10500);
+ }
+ return 0;
+}
+
+static void imc_channelpair_release(struct imc_priv *priv, int i)
+{
+ if (priv->channelpair[i].cltt) {
+ /* set tosd_control.tsod_polling_interval to previous value */
+ pci_write_config_dword(priv->pcu.pci_dev, TSODCNTL,
+ priv->pcu.tsod_polling_interval);
+ }
+ mutex_unlock(&priv->pcu.mutex);
+}
+
+static bool imc_wait_for_transaction(struct imc_priv *priv, int i, u32 *stat)
+{
+ int j;
+ static int busywaits = 1;
+
+ /*
+ * Distribution of transaction time from 10000 collected samples:
+ *
+ * 70us: 1, 80us: 12, 90us: 34, 100us: 132, 110us: 424, 120us: 1138,
+ * 130us: 5224, 140us: 3035.
+ *
+ */
+ usleep_range(131, 140);
+
+ /* Don't give up, yet */
+ for (j = 0; j < 20; j++) {
+ pci_read_config_dword(priv->pci_dev, SMBSTAT(i), stat);
+ if (!(*stat & SMBSTAT_SMB_BUSY)) {
+ if (j > busywaits) {
+ busywaits = j;
+ dev_warn(&priv->pci_dev->dev,
+ "Discovered surprisingly long transaction time (%d)\n",
+ busywaits);
+ }
+ return true;
+ }
+ udelay(9);
+ }
+ return false;
+}
+
+/*
+ * The iMC supports five access types. The terminology is rather inconsistent.
+ * These are the types:
+ *
+ * "Write to pointer register SMBus": I2C_SMBUS_WRITE, I2C_SMBUS_BYTE
+ *
+ * Read byte/word: I2C_SMBUS_READ, I2C_SMBUS_{BYTE|WORD}_DATA
+ *
+ * Write byte/word: I2C_SMBUS_WRITE, I2C_SMBUS_{BYTE|WORD}_DATA
+ */
+
+static u32 imc_func(struct i2c_adapter *adapter)
+{
+ int i;
+ struct imc_channelpair *cp;
+ struct imc_priv *priv = i2c_get_adapdata(adapter);
+
+ i = (adapter == &priv->channelpair[0].adapter ? 0 : 1);
+ cp = &priv->channelpair[i];
+
+ if (cp->can_write)
+ return I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA;
+ else
+ return I2C_FUNC_SMBUS_READ_BYTE_DATA |
+ I2C_FUNC_SMBUS_READ_WORD_DATA;
+}
+
+static s32 imc_smbus_xfer(struct i2c_adapter *adap, u16 addr,
+ unsigned short flags, char read_write, u8 command,
+ int size, union i2c_smbus_data *data)
+{
+ int ret, i;
+ u32 cmd = 0, cntl, stat;
+#ifdef sanitycheck
+ u32 final_cmd, final_cntl;
+#endif
+ struct imc_channelpair *cp;
+ struct imc_priv *priv = i2c_get_adapdata(adap);
+
+ i = (adap == &priv->channelpair[0].adapter ? 0 : 1);
+ cp = &priv->channelpair[i];
+
+ /* Encode CMD part of addresses and access size */
+ cmd |= ((u32)addr & 0x7) << SMBCMD_SA_SHIFT;
+ cmd |= ((u32)command) << SMBCMD_BA_SHIFT;
+ if (size == I2C_SMBUS_WORD_DATA)
+ cmd |= SMBCMD_WORD_ACCESS;
+
+ /* Encode read/write and data to write */
+ if (read_write == I2C_SMBUS_READ) {
+ cmd |= SMBCMD_TYPE_READ;
+ } else {
+ cmd |= SMBCMD_TYPE_WRITE;
+ cmd |= (size == I2C_SMBUS_WORD_DATA
+ ? swab16(data->word)
+ : data->byte);
+ }
+
+ ret = imc_channelpair_claim(priv, i);
+ if (ret)
+ return ret;
+
+ pci_read_config_dword(priv->pci_dev, SMBCNTL(i), &cntl);
+ cntl &= ~SMBCNTL_DTI_MASK;
+ cntl |= ((u32)addr >> 3) << SMBCNTL_DTI_SHIFT;
+ pci_write_config_dword(priv->pci_dev, SMBCNTL(i), cntl);
+
+ cmd |= SMBCMD_TRIGGER;
+ pci_write_config_dword(priv->pci_dev, SMBCMD(i), cmd);
+
+ if (!imc_wait_for_transaction(priv, i, &stat)) {
+ dev_warn(&priv->pci_dev->dev, "smbus transaction did not complete.\n");
+ ret = -ETIMEDOUT;
+ goto xfer_out_release;
+ }
+
+#ifdef sanitycheck /* This is a young driver. Keep the checks for now */
+ pci_read_config_dword(priv->pci_dev, SMBCMD(i), &final_cmd);
+ pci_read_config_dword(priv->pci_dev, SMBCNTL(i), &final_cntl);
+ if (((cmd ^ final_cmd) & SMBCMD_OUR_BITS) ||
+ ((cntl ^ final_cntl) & SMBCNTL_OUR_BITS)) {
+ dev_err(&priv->pci_dev->dev,
+ "Access to channel pair %d-%d raced with hardware: cmd 0x%08X->0x%08X, cntl 0x%08X->0x%08X\n",
+ 2*i, 2*i+1, cmd, final_cmd, cntl, final_cntl);
+ ret = -EIO;
+ goto xfer_out_release;
+ }
+#endif
+
+ if (stat & SMBSTAT_SBE) {
+ /*
+ * While SBE is set hardware TSOD polling is disabled. This is
+ * very bad as this bit is RO-V and will only be cleared after
+ * a further software initiated transaction finishes
+ * successfully.
+ */
+ dev_err(&priv->pci_dev->dev,
+ "smbus error: sbe is set 0x%x\n", stat);
+ ret = -ENXIO;
+ goto xfer_out_release;
+ }
+
+ if (read_write == I2C_SMBUS_READ) {
+ if (!(stat & SMBSTAT_RDO)) {
+ dev_warn(&priv->pci_dev->dev,
+ "Unexpected read status 0x%08X\n", stat);
+ ret = -EIO;
+ goto xfer_out_release;
+ }
+ /*
+ * The iMC SMBus controller thinks of SMBus words as being
+ * big-endian (MSB first). Linux treats them as little-endian,
+ * so we need to swap them.
+ */
+ if (size == I2C_SMBUS_WORD_DATA)
+ data->word = swab16(stat & SMBSTAT_RDATA_MASK);
+ else
+ data->byte = stat & 0xFF;
+ } else {
+ if (!(stat & SMBSTAT_WOD)) {
+ dev_warn(&priv->pci_dev->dev,
+ "Unexpected write status 0x%08X\n", stat);
+ ret = -EIO;
+ }
+ }
+
+xfer_out_release:
+ imc_channelpair_release(priv, i);
+
+ return ret;
+}
+
+static const struct i2c_algorithm imc_smbus_algorithm = {
+ .smbus_xfer = imc_smbus_xfer,
+ .functionality = imc_func,
+};
+
+static void imc_instantiate_sensors(struct i2c_adapter *adapter, u8 presence)
+{
+ struct i2c_board_info info = {};
+
+ strcpy(info.type, DIMM_SENSOR_DRV);
+ info.addr = DIMM_SENSOR_BASE_ADR;
+
+ /*
+ * Presence is a bit vector. Bits from right to left map into i2c slave
+ * addresses starting 0x18.
+ */
+ while (presence) {
+ if (presence & 0x1)
+ i2c_new_device(adapter, &info);
+ info.addr++;
+ presence >>= 1;
+ }
+}
+
+static int imc_init_channelpair(struct imc_priv *priv, int i, int socket)
+{
+ int err;
+ u32 val;
+ struct imc_channelpair *cp = &priv->channelpair[i];
+
+ i2c_set_adapdata(&cp->adapter, priv);
+ cp->adapter.owner = THIS_MODULE;
+ cp->adapter.algo = &imc_smbus_algorithm;
+ cp->adapter.dev.parent = &priv->pci_dev->dev;
+
+ pci_read_config_dword(priv->pci_dev, SMBCNTL(i), &val);
+ cp->can_write = !(val & SMBCNTL_DIS_WRT);
+
+ /*
+ * A TSOD polling interval of > 0 tells us if CLTT mode is enabled on
+ * some channel pair.
+ *
+ * Is there a better way to check for CLTT mode? In particular, is
+ * there a way to distingush the mode on a channel pair basis?
+ */
+ cp->cltt = (priv->pcu.tsod_polling_interval > 0);
+
+ snprintf(cp->adapter.name, sizeof(cp->adapter.name),
+ "iMC socket %d for channel pair %d-%d", socket, 2*i, 2*i+1);
+ err = i2c_add_adapter(&cp->adapter);
+ if (err)
+ return err;
+
+ /* For reasons unknown, TSOD_PRES_MASK is only set in CLTT mode. */
+ if (cp->cltt) {
+ dev_info(&priv->pci_dev->dev,
+ "CLTT is enabled on channel pair %d-%d. Thermal sensors will be automatically enabled\n",
+ 2*i, 2*i+1);
+ } else {
+ dev_info(&priv->pci_dev->dev,
+ "CLTT is disabled on channel pair %d-%d. Thermal sensors need to be manually enabled\n",
+ 2*i, 2*i+1);
+ }
+
+ imc_instantiate_sensors(&cp->adapter, val & SMBCNTL_TSOD_PRES_MASK);
+
+ return 0;
+}
+
+static void imc_free_channelpair(struct imc_priv *priv, int i)
+{
+ struct imc_channelpair *cp = &priv->channelpair[i];
+
+ i2c_del_adapter(&cp->adapter);
+}
+
+static struct pci_dev *imc_get_related_device(struct pci_bus *bus,
+ unsigned int devfn, u16 devid)
+{
+ struct pci_dev *dev = pci_get_slot(bus, devfn);
+
+ if (!dev)
+ return NULL;
+
+ if (dev->vendor != PCI_VENDOR_ID_INTEL || dev->device != devid) {
+ pci_dev_put(dev);
+ return NULL;
+ }
+ return dev;
+}
+
+static int imc_probe(struct pci_dev *dev, const struct pci_device_id *id)
+{
+ int i, j, err;
+ struct imc_priv *priv;
+ struct pci_dev *sad; /* System Address Decoder */
+ u32 sadcntl;
+
+ /* Sanity check. This device is always at 0x13.0 */
+ if (dev->devfn != PCI_DEVFN(0x13, 0))
+ return -ENODEV;
+
+ priv = devm_kzalloc(&dev->dev, sizeof(*priv), GFP_KERNEL);
+ if (!priv)
+ return -ENOMEM;
+ priv->pci_dev = dev;
+ pci_set_drvdata(dev, priv);
+
+ /*
+ * From sad, we learn the local node id of the socket.
+ *
+ * The socket will not change at runtime and so we throw away sad.
+ */
+ sad = imc_get_related_device(dev->bus, PCI_DEVFN(0x0f, 5),
+ PCI_DEVICE_ID_INTEL_BROADWELL_IMC_SAD);
+ if (!sad) {
+ err = -ENODEV;
+ goto probe_out_free;
+ }
+ pci_read_config_dword(sad, SADCNTL, &sadcntl);
+ pci_dev_put(sad);
+
+ /*
+ * From pcu, we access the CLTT polling interval.
+ *
+ * The polling interval is set by BIOS. We assume it will not change at
+ * runtime and cache the initial value.
+ */
+ priv->pcu.pci_dev = imc_get_related_device(dev->bus, PCI_DEVFN(0x1e, 1),
+ PCI_DEVICE_ID_INTEL_BROADWELL_IMC_PCU);
+ if (!priv->pcu.pci_dev) {
+ err = -ENODEV;
+ goto probe_out_free;
+ }
+ pci_read_config_dword(priv->pcu.pci_dev, TSODCNTL,
+ &priv->pcu.tsod_polling_interval);
+
+ mutex_init(&priv->pcu.mutex);
+
+ for (i = 0; i < 2; i++) {
+ err = imc_init_channelpair(priv, i,
+ sadcntl & SADCNTL_LOCAL_NODEID_MASK);
+ if (err)
+ goto probe_out_free_channelpair;
+ }
+
+ return 0;
+
+probe_out_free_channelpair:
+ for (j = 0; j < i; j++)
+ imc_free_channelpair(priv, j);
+
+ mutex_destroy(&priv->pcu.mutex);
+
+probe_out_free:
+ kfree(priv);
+ return err;
+}
+
+static void imc_remove(struct pci_dev *dev)
+{
+ int i;
+ struct imc_priv *priv = pci_get_drvdata(dev);
+
+ for (i = 0; i < 2; i++)
+ imc_free_channelpair(priv, i);
+
+ /* set tosd_control.tsod_polling_interval to initial value */
+ pci_write_config_dword(priv->pcu.pci_dev, TSODCNTL,
+ priv->pcu.tsod_polling_interval);
+
+ mutex_destroy(&priv->pcu.mutex);
+}
+
+static int imc_suspend(struct pci_dev *dev, pm_message_t mesg)
+{
+ struct imc_priv *priv = pci_get_drvdata(dev);
+
+ /* BIOS is in charge. We should finish any pending transaction */
+ priv->suspended = true;
+
+ return 0;
+}
+
+static int imc_resume(struct pci_dev *dev)
+{
+ struct imc_priv *priv = pci_get_drvdata(dev);
+
+ priv->suspended = false;
+
+ return 0;
+}
+
+static const struct pci_device_id imc_ids[] = {
+ { PCI_DEVICE(PCI_VENDOR_ID_INTEL,
+ PCI_DEVICE_ID_INTEL_BROADWELL_IMC_TA) },
+ { 0, }
+};
+MODULE_DEVICE_TABLE(pci, imc_ids);
+
+static struct pci_driver imc_pci_driver = {
+ .name = "imc_smbus",
+ .id_table = imc_ids,
+ .probe = imc_probe,
+ .remove = imc_remove,
+ .suspend = imc_suspend,
+ .resume = imc_resume,
+};
+
+static int __init i2c_imc_init(void)
+{
+ return pci_register_driver(&imc_pci_driver);
+}
+module_init(i2c_imc_init);
+
+static void __exit i2c_imc_exit(void)
+{
+ pci_unregister_driver(&imc_pci_driver);
+}
+module_exit(i2c_imc_exit);
+
+MODULE_AUTHOR("Stefan Schaeckeler ");
+MODULE_DESCRIPTION("iMC SMBus driver");
+MODULE_LICENSE("GPL v2");
diff --git a/packages/platforms/wistron/x86-64/wtp-01-02-00/modules/builds/x86-64-wistron-wtp-01-02-00-fan.c b/packages/platforms/wistron/x86-64/wtp-01-02-00/modules/builds/x86-64-wistron-wtp-01-02-00-fan.c
new file mode 100644
index 0000000..078e86f
--- /dev/null
+++ b/packages/platforms/wistron/x86-64/wtp-01-02-00/modules/builds/x86-64-wistron-wtp-01-02-00-fan.c
@@ -0,0 +1,490 @@
+/*
+ *
+ * Based on:
+ * pca954x.c from Kumar Gala
+ * Copyright (C) 2006
+ *
+ * Based on:
+ * pca954x.c from Ken Harrenstien
+ * Copyright (C) 2004 Google, Inc. (Ken Harrenstien)
+ *
+ * Based on:
+ * i2c-virtual_cb.c from Brian Kuschak
+ * and
+ * pca9540.c from Jean Delvare .
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define DRVNAME "wtp_01_02_00_fan"
+#define WISTRON_OEM_IPMI_NETFN 0x30
+#define WISTRON_IPMI_RW_CMD 0x2b
+#define IPMI_NETFN 0x04
+#define IPMI_FAN_READ_CMD 0x2d
+#define IPMI_FAN_WRITE_CMD 0x20
+#define IPMI_FAN_SDR_BASE 0x10
+#define IPMI_TIMEOUT (20 * HZ)
+
+static void ipmi_msg_handler(struct ipmi_recv_msg *msg, void *user_msg_data);
+static ssize_t set_fan(struct device *dev, struct device_attribute *da,
+ const char *buf, size_t count);
+static ssize_t show_fan(struct device *dev, struct device_attribute *attr,
+ char *buf);
+static int wistron_wtp_01_02_00_fan_probe(struct platform_device *pdev);
+static int wistron_wtp_01_02_00_fan_remove(struct platform_device *pdev);
+
+enum fan_id {
+ FAN_1, /* Fan-module-1 -Front*/
+ FAN_2, /* Fan-module-1 -Rear*/
+ FAN_3, /* Fan-module-2 -Front*/
+ FAN_4, /* Fan-module-2 -Rear*/
+ FAN_5, /* Fan-module-3 -Front*/
+ FAN_6, /* Fan-module-3 -Rear*/
+ FAN_7, /* Fan-module-4 -Front*/
+ FAN_8, /* Fan-module-4 -Rear*/
+ FAN_9, /* Fan-module-5 -Front*/
+ FAN_10, /* Fan-module-5 -Rear*/
+ NUM_OF_FAN
+};
+
+enum fan_data_index { FAN_RPM, FAN_STATUS, FAN_PWM };
+
+struct ipmi_data {
+ struct completion read_complete;
+ struct ipmi_addr address;
+ struct ipmi_user *user;
+ int interface;
+ struct kernel_ipmi_msg tx_message;
+ long tx_msgid;
+ void *rx_msg_data;
+ unsigned short rx_msg_len;
+ unsigned char rx_result;
+ int rx_recv_type;
+ struct ipmi_user_hndl ipmi_hndlrs;
+};
+
+struct ipmi_fan_sensor_data {
+ unsigned char sensor_reading;
+ unsigned char status;
+};
+
+struct wistron_wtp_01_02_00_fan_data {
+ struct platform_device *pdev;
+ struct mutex update_lock;
+ char valid[NUM_OF_FAN]; /* != 0 if registers are valid */
+ unsigned long last_updated[NUM_OF_FAN]; /* In jiffies */
+ struct ipmi_fan_sensor_data fan_data[NUM_OF_FAN];
+ struct ipmi_data ipmi;
+};
+
+struct wistron_wtp_01_02_00_fan_data *data = NULL;
+
+static struct platform_driver wistron_wtp_01_02_00_fan_driver = {
+ .probe = wistron_wtp_01_02_00_fan_probe,
+ .remove = wistron_wtp_01_02_00_fan_remove,
+ .driver =
+ {
+ .name = DRVNAME,
+ .owner = THIS_MODULE,
+ },
+};
+
+#define FAN_STATUS_ATTR_ID(index) FAN##index##_STATUS
+#define FAN_PWM_ATTR_ID(index) FAN##index##_PWM
+#define FAN_RPM_ATTR_ID(index) FAN##index##_RPM
+
+#define FAN_ATTR(fan_id) \
+ FAN_STATUS_ATTR_ID(fan_id), FAN_RPM_ATTR_ID(fan_id), FAN_PWM_ATTR_ID(fan_id)
+
+enum wistron_wtp_01_02_00_fan_sysfs_attrs {
+ FAN_ATTR(1),
+ FAN_ATTR(2),
+ FAN_ATTR(3),
+ FAN_ATTR(4),
+ FAN_ATTR(5),
+ FAN_ATTR(6),
+ FAN_ATTR(7),
+ FAN_ATTR(8),
+ FAN_ATTR(9),
+ FAN_ATTR(10),
+ NUM_OF_FAN_ATTR,
+ NUM_OF_PER_FAN_ATTR = (NUM_OF_FAN_ATTR / NUM_OF_FAN)
+};
+
+/* fan attributes */
+#define DECLARE_FAN_SENSOR_DEVICE_ATTR(index) \
+ static SENSOR_DEVICE_ATTR(fan##index##_rpm, S_IRUGO, show_fan, NULL, \
+ FAN##index##_RPM); \
+ static SENSOR_DEVICE_ATTR(fan##index##_status, S_IRUGO, show_fan, NULL, \
+ FAN##index##_STATUS); \
+ static SENSOR_DEVICE_ATTR(fan##index##_pwm, S_IWUSR | S_IRUGO, show_fan, \
+ set_fan, FAN##index##_PWM)
+#define DECLARE_FAN_ATTR(index) \
+ &sensor_dev_attr_fan##index##_rpm.dev_attr.attr, \
+ &sensor_dev_attr_fan##index##_status.dev_attr.attr, \
+ &sensor_dev_attr_fan##index##_pwm.dev_attr.attr
+
+DECLARE_FAN_SENSOR_DEVICE_ATTR(1);
+DECLARE_FAN_SENSOR_DEVICE_ATTR(2);
+DECLARE_FAN_SENSOR_DEVICE_ATTR(3);
+DECLARE_FAN_SENSOR_DEVICE_ATTR(4);
+DECLARE_FAN_SENSOR_DEVICE_ATTR(5);
+DECLARE_FAN_SENSOR_DEVICE_ATTR(6);
+DECLARE_FAN_SENSOR_DEVICE_ATTR(7);
+DECLARE_FAN_SENSOR_DEVICE_ATTR(8);
+DECLARE_FAN_SENSOR_DEVICE_ATTR(9);
+DECLARE_FAN_SENSOR_DEVICE_ATTR(10);
+
+static struct attribute *wistron_wtp_01_02_00_fan_attributes[] = {
+ /* fan attributes */
+ DECLARE_FAN_ATTR(1),
+ DECLARE_FAN_ATTR(2),
+ DECLARE_FAN_ATTR(3),
+ DECLARE_FAN_ATTR(4),
+ DECLARE_FAN_ATTR(5),
+ DECLARE_FAN_ATTR(6),
+ DECLARE_FAN_ATTR(7),
+ DECLARE_FAN_ATTR(8),
+ DECLARE_FAN_ATTR(9),
+ DECLARE_FAN_ATTR(10),
+ NULL};
+
+static const struct attribute_group wistron_wtp_01_02_00_fan_group = {
+ .attrs = wistron_wtp_01_02_00_fan_attributes,
+};
+
+/* Functions to talk to the IPMI layer */
+
+/* Initialize IPMI address, message buffers and user data */
+static int init_ipmi_data(struct ipmi_data *ipmi, int iface,
+ struct device *dev) {
+ int err;
+
+ init_completion(&ipmi->read_complete);
+
+ /* Initialize IPMI address */
+ ipmi->address.addr_type = IPMI_SYSTEM_INTERFACE_ADDR_TYPE;
+ ipmi->address.channel = IPMI_BMC_CHANNEL;
+ ipmi->address.data[0] = 0;
+ ipmi->interface = iface;
+
+ /* Initialize message buffers */
+ ipmi->tx_msgid = 0;
+
+ ipmi->ipmi_hndlrs.ipmi_recv_hndl = ipmi_msg_handler;
+
+ /* Create IPMI messaging interface user */
+ err =
+ ipmi_create_user(ipmi->interface, &ipmi->ipmi_hndlrs, ipmi, &ipmi->user);
+ if (err < 0) {
+ dev_err(dev,
+ "Unable to register user with IPMI "
+ "interface %d\n",
+ ipmi->interface);
+ return -EACCES;
+ }
+
+ return 0;
+}
+
+/* Send an IPMI command */
+static int ipmi_send_message(struct ipmi_data *ipmi, unsigned char cmd,
+ unsigned char *tx_data, unsigned short tx_len,
+ unsigned char *rx_data, unsigned short rx_len,
+ bool is_custom_cmd) {
+ int err;
+
+ if (is_custom_cmd) {
+ ipmi->tx_message.netfn = WISTRON_OEM_IPMI_NETFN;
+ } else
+ ipmi->tx_message.netfn = IPMI_NETFN;
+
+ ipmi->tx_message.cmd = cmd;
+ ipmi->tx_message.data = tx_data;
+ ipmi->tx_message.data_len = tx_len;
+ ipmi->rx_msg_data = rx_data;
+ ipmi->rx_msg_len = rx_len;
+
+ err = ipmi_validate_addr(&ipmi->address, sizeof(ipmi->address));
+ if (err) goto addr_err;
+
+ ipmi->tx_msgid++;
+ err = ipmi_request_settime(ipmi->user, &ipmi->address, ipmi->tx_msgid,
+ &ipmi->tx_message, ipmi, 0, 0, 0);
+ if (err) goto ipmi_req_err;
+
+ err = wait_for_completion_timeout(&ipmi->read_complete, IPMI_TIMEOUT);
+ if (!err) goto ipmi_timeout_err;
+
+ return 0;
+
+ipmi_timeout_err:
+ err = -ETIMEDOUT;
+ dev_err(&data->pdev->dev, "request_timeout=%x\n", err);
+ return err;
+ipmi_req_err:
+ dev_err(&data->pdev->dev, "request_settime=%x\n", err);
+ return err;
+addr_err:
+ dev_err(&data->pdev->dev, "validate_addr=%x\n", err);
+ return err;
+}
+
+/* Dispatch IPMI messages to callers */
+static void ipmi_msg_handler(struct ipmi_recv_msg *msg, void *user_msg_data) {
+ unsigned short rx_len;
+ struct ipmi_data *ipmi = user_msg_data;
+
+ if (msg->msgid != ipmi->tx_msgid) {
+ dev_err(&data->pdev->dev,
+ "Mismatch between received msgid "
+ "(%02x) and transmitted msgid (%02x)!\n",
+ (int)msg->msgid, (int)ipmi->tx_msgid);
+ ipmi_free_recv_msg(msg);
+ return;
+ }
+
+ ipmi->rx_recv_type = msg->recv_type;
+ if (msg->msg.data_len > 0)
+ ipmi->rx_result = msg->msg.data[0];
+ else
+ ipmi->rx_result = IPMI_UNKNOWN_ERR_COMPLETION_CODE;
+
+ if (msg->msg.data_len > 1) {
+ rx_len = msg->msg.data_len - 1;
+ if (ipmi->rx_msg_len < rx_len) rx_len = ipmi->rx_msg_len;
+ ipmi->rx_msg_len = rx_len;
+ memcpy(ipmi->rx_msg_data, msg->msg.data + 1, ipmi->rx_msg_len);
+ } else
+ ipmi->rx_msg_len = 0;
+
+ ipmi_free_recv_msg(msg);
+ complete(&ipmi->read_complete);
+}
+
+static struct wistron_wtp_01_02_00_fan_data *
+wistron_wtp_01_02_00_fan_update_device(unsigned char fid) {
+ int status = 0;
+ unsigned char ipmi_resp[4] = {0};
+ unsigned char ipmi_tx_data[4] = {0};
+
+ if (time_before(jiffies, data->last_updated[fid] + HZ * 5) &&
+ data->valid[fid]) {
+ return data;
+ }
+
+ data->valid[fid] = 0;
+ ipmi_tx_data[0] = IPMI_FAN_SDR_BASE + fid;
+ status = ipmi_send_message(&data->ipmi, IPMI_FAN_READ_CMD, &ipmi_tx_data[0],
+ 1, &ipmi_resp[0], sizeof(ipmi_resp), 0);
+ if (unlikely(status != 0)) {
+ goto exit;
+ }
+
+ if (unlikely(data->ipmi.rx_result != 0)) {
+ status = -EIO;
+ goto exit;
+ }
+
+ data->last_updated[fid] = jiffies;
+ data->valid[fid] = 1;
+
+exit:
+ data->fan_data[fid].sensor_reading = ipmi_resp[0];
+ data->fan_data[fid].status = ipmi_resp[2];
+ return data;
+}
+
+static ssize_t show_fan(struct device *dev, struct device_attribute *da,
+ char *buf) {
+ struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+ unsigned char fid = attr->index / NUM_OF_PER_FAN_ATTR;
+ int value = 0;
+ int error = 0;
+
+ mutex_lock(&data->update_lock);
+
+ data = wistron_wtp_01_02_00_fan_update_device(fid);
+ if (!data->valid[fid]) {
+ error = -EIO;
+ goto exit;
+ }
+
+ switch (attr->index) {
+ case FAN1_RPM:
+ case FAN2_RPM:
+ case FAN3_RPM:
+ case FAN4_RPM:
+ case FAN5_RPM:
+ case FAN6_RPM:
+ case FAN7_RPM:
+ case FAN8_RPM:
+ case FAN9_RPM:
+ case FAN10_RPM:
+ value = (int)data->fan_data[fid].sensor_reading;
+ break;
+ case FAN1_STATUS:
+ case FAN2_STATUS:
+ case FAN3_STATUS:
+ case FAN4_STATUS:
+ case FAN5_STATUS:
+ case FAN6_STATUS:
+ case FAN7_STATUS:
+ case FAN8_STATUS:
+ case FAN9_STATUS:
+ case FAN10_STATUS:
+ value = (int)data->fan_data[fid].status;
+ break;
+ case FAN1_PWM:
+ case FAN2_PWM:
+ case FAN3_PWM:
+ case FAN4_PWM:
+ case FAN5_PWM:
+ case FAN6_PWM:
+ case FAN7_PWM:
+ case FAN8_PWM:
+ case FAN9_PWM:
+ case FAN10_PWM:
+ /* Harsha - visit later for set action */
+ value = (int)data->fan_data[fid].sensor_reading;
+ break;
+ default:
+ error = -EINVAL;
+ goto exit;
+ }
+ mutex_unlock(&data->update_lock);
+
+ return sprintf(buf, "%d\n", value);
+
+exit:
+ mutex_unlock(&data->update_lock);
+ return error;
+}
+
+static ssize_t set_fan(struct device *dev, struct device_attribute *da,
+ const char *buf, size_t count) {
+ long pwm_percentage;
+ int status;
+ struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+ unsigned char fid = attr->index / NUM_OF_PER_FAN_ATTR;
+ unsigned char ipmi_tx_data[4] = {0};
+
+ status = kstrtol(buf, 10, &pwm_percentage);
+ if (status) {
+ return status;
+ }
+
+ mutex_lock(&data->update_lock);
+
+ /* Send IPMI write command */
+ ipmi_tx_data[0] =
+ 1; /* All FANs share the same PWM register, ALWAYS set 1 for each fan */
+ ipmi_tx_data[1] = pwm_percentage;
+ status = ipmi_send_message(&data->ipmi, IPMI_FAN_WRITE_CMD, &ipmi_tx_data[0],
+ sizeof(ipmi_tx_data), NULL, 0, 1);
+ if (unlikely(status != 0)) {
+ goto exit;
+ }
+
+ if (unlikely(data->ipmi.rx_result != 0)) {
+ status = -EIO;
+ goto exit;
+ }
+
+ /* Update pwm to ipmi_resp buffer to prevent from the impact of lazy update */
+ // data->ipmi_resp[fid] = pwm;
+ status = count;
+
+exit:
+ mutex_unlock(&data->update_lock);
+ return status;
+}
+
+static int wistron_wtp_01_02_00_fan_probe(struct platform_device *pdev) {
+ int status = -1;
+
+ /* Register sysfs hooks */
+ status = sysfs_create_group(&pdev->dev.kobj, &wistron_wtp_01_02_00_fan_group);
+ if (status) {
+ goto exit;
+ }
+
+ dev_info(&pdev->dev, "device created\n");
+
+ return 0;
+
+exit:
+ return status;
+}
+
+static int wistron_wtp_01_02_00_fan_remove(struct platform_device *pdev) {
+ sysfs_remove_group(&pdev->dev.kobj, &wistron_wtp_01_02_00_fan_group);
+
+ return 0;
+}
+
+static int __init wistron_wtp_01_02_00_fan_init(void) {
+ int ret;
+
+ data = kzalloc(sizeof(struct wistron_wtp_01_02_00_fan_data), GFP_KERNEL);
+ if (!data) {
+ ret = -ENOMEM;
+ goto alloc_err;
+ }
+
+ mutex_init(&data->update_lock);
+
+ ret = platform_driver_register(&wistron_wtp_01_02_00_fan_driver);
+ if (ret < 0) {
+ goto dri_reg_err;
+ }
+
+ data->pdev = platform_device_register_simple(DRVNAME, -1, NULL, 0);
+ if (IS_ERR(data->pdev)) {
+ ret = PTR_ERR(data->pdev);
+ goto dev_reg_err;
+ }
+
+ /* Set up IPMI interface */
+ ret = init_ipmi_data(&data->ipmi, 0, &data->pdev->dev);
+ if (ret) goto ipmi_err;
+
+ return 0;
+
+ipmi_err:
+ platform_device_unregister(data->pdev);
+dev_reg_err:
+ platform_driver_unregister(&wistron_wtp_01_02_00_fan_driver);
+dri_reg_err:
+ kfree(data);
+alloc_err:
+ return ret;
+}
+
+static void __exit wistron_wtp_01_02_00_fan_exit(void) {
+ ipmi_destroy_user(data->ipmi.user);
+ platform_device_unregister(data->pdev);
+ platform_driver_unregister(&wistron_wtp_01_02_00_fan_driver);
+ kfree(data);
+}
+
+MODULE_AUTHOR("HarshaF1");
+MODULE_DESCRIPTION("WISTRON-WTP_01_02_00 fan driver");
+MODULE_LICENSE("GPL");
+
+module_init(wistron_wtp_01_02_00_fan_init);
+module_exit(wistron_wtp_01_02_00_fan_exit);
diff --git a/packages/platforms/wistron/x86-64/wtp-01-02-00/modules/builds/x86-64-wistron-wtp-01-02-00-led.c b/packages/platforms/wistron/x86-64/wtp-01-02-00/modules/builds/x86-64-wistron-wtp-01-02-00-led.c
new file mode 100644
index 0000000..37ab2e0
--- /dev/null
+++ b/packages/platforms/wistron/x86-64/wtp-01-02-00/modules/builds/x86-64-wistron-wtp-01-02-00-led.c
@@ -0,0 +1,580 @@
+/*
+ * Based on:
+ * pca954x.c from Kumar Gala
+ * Copyright (C) 2006
+ *
+ * Based on:
+ * pca954x.c from Ken Harrenstien
+ * Copyright (C) 2004 Google, Inc. (Ken Harrenstien)
+ *
+ * Based on:
+ * i2c-virtual_cb.c from Brian Kuschak
+ * and
+ * pca9540.c from Jean Delvare .
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define DRVNAME "wtp_01_02_00_led"
+#define WISTRON_OEM_IPMI_NETFN 0x30
+#define WISTRON_IPMI_RW_CMD 0x2b
+#define IPMI_TIMEOUT (5 * HZ)
+
+static void ipmi_msg_handler(struct ipmi_recv_msg *msg, void *user_msg_data);
+static ssize_t set_led(struct device *dev, struct device_attribute *da,
+ const char *buf, size_t count);
+static ssize_t show_led(struct device *dev, struct device_attribute *attr,
+ char *buf);
+static int wistron_wtp_01_02_00_led_probe(struct platform_device *pdev);
+static int wistron_wtp_01_02_00_led_remove(struct platform_device *pdev);
+
+struct ipmi_data {
+ struct completion read_complete;
+ struct ipmi_addr address;
+ struct ipmi_user *user;
+ int interface;
+
+ struct kernel_ipmi_msg tx_message;
+ long tx_msgid;
+
+ void *rx_msg_data;
+ unsigned short rx_msg_len;
+ unsigned char rx_result;
+ int rx_recv_type;
+
+ struct ipmi_user_hndl ipmi_hndlrs;
+};
+
+struct ipmi_led_data {
+ unsigned char led_ctrl1;
+ unsigned char led_ctrl2;
+};
+
+struct wistron_wtp_01_02_00_led_data {
+ struct platform_device *pdev;
+ struct mutex update_lock;
+ char valid; /* != 0 if registers are valid */
+ unsigned long last_updated; /* In jiffies */
+ struct ipmi_led_data led_data;
+ struct ipmi_data ipmi;
+};
+
+struct wistron_wtp_01_02_00_led_data *data = NULL;
+
+static struct platform_driver wistron_wtp_01_02_00_led_driver = {
+ .probe = wistron_wtp_01_02_00_led_probe,
+ .remove = wistron_wtp_01_02_00_led_remove,
+ .driver =
+ {
+ .name = DRVNAME,
+ .owner = THIS_MODULE,
+ },
+};
+
+/* Note: Keep the enum values same as the ones defined in
+ * onlp_led_mode_t (packages/base/any/onlp/src/onlp/module/inc/onlp/led.h)
+ * */
+enum led_light_mode {
+ LED_MODE_OFF,
+ LED_MODE_RED = 10,
+ LED_MODE_RED_BLINKING = 11,
+ LED_MODE_ORANGE_BLINKING = 13,
+ LED_MODE_YELLOW = 14,
+ LED_MODE_YELLOW_BLINKING = 15,
+ LED_MODE_GREEN = 16,
+ LED_MODE_GREEN_BLINKING = 17,
+ LED_MODE_BLUE = 18,
+ LED_MODE_BLUE_BLINKING = 19,
+ LED_MODE_PURPLE = 20,
+ LED_MODE_PURPLE_BLINKING = 21,
+ LED_MODE_AUTO = 22,
+ LED_MODE_AUTO_BLINKING = 23,
+ LED_MODE_WHITE = 24,
+ LED_MODE_WHITE_BLINKING = 25,
+ LED_MODE_CYAN = 26,
+ LED_MODE_CYAN_BLINKING = 27,
+ LED_MODE_UNKNOWN = 99
+};
+
+enum wistron_wtp_01_02_00_led_sysfs_attrs {
+ LED_SYS,
+ LED_BMC,
+ LED_FAN,
+ LED_PSU
+};
+
+static SENSOR_DEVICE_ATTR(led_sys, S_IWUSR | S_IRUGO, show_led, set_led,
+ LED_SYS);
+static SENSOR_DEVICE_ATTR(led_bmc, S_IWUSR | S_IRUGO, show_led, set_led,
+ LED_BMC);
+static SENSOR_DEVICE_ATTR(led_fan, S_IWUSR | S_IRUGO, show_led, set_led,
+ LED_FAN);
+static SENSOR_DEVICE_ATTR(led_psu, S_IWUSR | S_IRUGO, show_led, set_led,
+ LED_PSU);
+
+static struct attribute *wistron_wtp_01_02_00_led_attributes[] = {
+ &sensor_dev_attr_led_sys.dev_attr.attr,
+ &sensor_dev_attr_led_bmc.dev_attr.attr,
+ &sensor_dev_attr_led_fan.dev_attr.attr,
+ &sensor_dev_attr_led_psu.dev_attr.attr, NULL};
+
+static const struct attribute_group wistron_wtp_01_02_00_led_group = {
+ .attrs = wistron_wtp_01_02_00_led_attributes,
+};
+
+/* Functions to talk to the IPMI layer */
+
+/* Initialize IPMI address, message buffers and user data */
+static int init_ipmi_data(struct ipmi_data *ipmi, int iface,
+ struct device *dev) {
+ int err;
+
+ init_completion(&ipmi->read_complete);
+
+ /* Initialize IPMI address */
+ ipmi->address.addr_type = IPMI_SYSTEM_INTERFACE_ADDR_TYPE;
+ ipmi->address.channel = IPMI_BMC_CHANNEL;
+ ipmi->address.data[0] = 0;
+ ipmi->interface = iface;
+
+ /* Initialize message buffers */
+ ipmi->tx_msgid = 0;
+ ipmi->tx_message.netfn = WISTRON_OEM_IPMI_NETFN;
+
+ ipmi->ipmi_hndlrs.ipmi_recv_hndl = ipmi_msg_handler;
+
+ /* Create IPMI messaging interface user */
+ err =
+ ipmi_create_user(ipmi->interface, &ipmi->ipmi_hndlrs, ipmi, &ipmi->user);
+ if (err < 0) {
+ dev_err(dev,
+ "Unable to register user with IPMI "
+ "interface %d\n",
+ ipmi->interface);
+ return -EACCES;
+ }
+
+ return 0;
+}
+
+/* Send an IPMI command */
+static int ipmi_send_message(struct ipmi_data *ipmi, unsigned char cmd,
+ unsigned char *tx_data, unsigned short tx_len,
+ unsigned char *rx_data, unsigned short rx_len) {
+ int err;
+
+ ipmi->tx_message.cmd = cmd;
+ ipmi->tx_message.data = tx_data;
+ ipmi->tx_message.data_len = tx_len;
+ ipmi->rx_msg_data = rx_data;
+ ipmi->rx_msg_len = rx_len;
+
+ err = ipmi_validate_addr(&ipmi->address, sizeof(ipmi->address));
+ if (err) goto addr_err;
+
+ ipmi->tx_msgid++;
+ err = ipmi_request_settime(ipmi->user, &ipmi->address, ipmi->tx_msgid,
+ &ipmi->tx_message, ipmi, 0, 0, 0);
+ if (err) goto ipmi_req_err;
+
+ err = wait_for_completion_timeout(&ipmi->read_complete, IPMI_TIMEOUT);
+ if (!err) goto ipmi_timeout_err;
+
+ return 0;
+
+ipmi_timeout_err:
+ err = -ETIMEDOUT;
+ dev_err(&data->pdev->dev, "request_timeout=%x\n", err);
+ return err;
+ipmi_req_err:
+ dev_err(&data->pdev->dev, "request_settime=%x\n", err);
+ return err;
+addr_err:
+ dev_err(&data->pdev->dev, "validate_addr=%x\n", err);
+ return err;
+}
+
+/* Dispatch IPMI messages to callers */
+static void ipmi_msg_handler(struct ipmi_recv_msg *msg, void *user_msg_data) {
+ unsigned short rx_len;
+ struct ipmi_data *ipmi = user_msg_data;
+
+ if (msg->msgid != ipmi->tx_msgid) {
+ dev_err(&data->pdev->dev,
+ "Mismatch between received msgid "
+ "(%02x) and transmitted msgid (%02x)!\n",
+ (int)msg->msgid, (int)ipmi->tx_msgid);
+ ipmi_free_recv_msg(msg);
+ return;
+ }
+
+ ipmi->rx_recv_type = msg->recv_type;
+ if (msg->msg.data_len > 0)
+ ipmi->rx_result = msg->msg.data[0];
+ else
+ ipmi->rx_result = IPMI_UNKNOWN_ERR_COMPLETION_CODE;
+
+ if (msg->msg.data_len > 1) {
+ rx_len = msg->msg.data_len - 1;
+ if (ipmi->rx_msg_len < rx_len) rx_len = ipmi->rx_msg_len;
+ ipmi->rx_msg_len = rx_len;
+ memcpy(ipmi->rx_msg_data, msg->msg.data + 1, ipmi->rx_msg_len);
+ } else
+ ipmi->rx_msg_len = 0;
+
+ ipmi_free_recv_msg(msg);
+ complete(&ipmi->read_complete);
+}
+
+static struct wistron_wtp_01_02_00_led_data *
+wistron_wtp_01_02_00_led_update_device(void) {
+ int status = 0;
+ unsigned char ipmi_resp[4] = {0}, ipmi_tx_data[4] = {0}, sys1_led, sys2_led;
+
+ if (time_before(jiffies, data->last_updated + HZ * 5) && data->valid) {
+ return data;
+ }
+
+ data->valid = 0;
+
+ /* Get sys1_led data from ipmi */
+ ipmi_resp[0] = '\0';
+ ipmi_tx_data[0] = 0x08; /* I2C Bus */
+ ipmi_tx_data[1] = 0x60; /* FPGA addr */
+ ipmi_tx_data[2] = 0x01; /* No of bytes to read */
+ ipmi_tx_data[3] = 0x1e; /* led_ctrl1 register*/
+
+ status = ipmi_send_message(&data->ipmi, WISTRON_IPMI_RW_CMD, &ipmi_tx_data[0],
+ 4, &ipmi_resp[0], sizeof(ipmi_resp));
+ if (unlikely(status != 0)) {
+ goto exit;
+ }
+
+ if (unlikely(data->ipmi.rx_result != 0)) {
+ status = -EIO;
+ goto exit;
+ }
+ sys1_led = ipmi_resp[0];
+
+ /* Get sys1_led data from ipmi */
+ ipmi_resp[0] = '\0';
+ ipmi_tx_data[0] = 0x08; /* I2C Bus */
+ ipmi_tx_data[1] = 0x60; /* FPGA addr */
+ ipmi_tx_data[2] = 0x01; /* No of bytes to read */
+ ipmi_tx_data[3] = 0x1f; /* led_ctrl1 register*/
+
+ status = ipmi_send_message(&data->ipmi, WISTRON_IPMI_RW_CMD, &ipmi_tx_data[0],
+ 4, &ipmi_resp[0], sizeof(ipmi_resp));
+ if (unlikely(status != 0)) {
+ goto exit;
+ }
+
+ if (unlikely(data->ipmi.rx_result != 0)) {
+ status = -EIO;
+ goto exit;
+ }
+ sys2_led = ipmi_resp[0];
+
+ data->last_updated = jiffies;
+ data->valid = 1;
+
+exit:
+ data->led_data.led_ctrl1 = sys1_led;
+ data->led_data.led_ctrl2 = sys2_led;
+ return data;
+}
+
+static ssize_t show_led(struct device *dev, struct device_attribute *da,
+ char *buf) {
+ struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+ int value = 0, tmp_val;
+ int error = 0;
+
+ mutex_lock(&data->update_lock);
+
+ data = wistron_wtp_01_02_00_led_update_device();
+ if (!data->valid) {
+ error = -EIO;
+ goto exit;
+ }
+
+ switch (attr->index) {
+ case LED_SYS:
+ if ((tmp_val = data->led_data.led_ctrl1 & 0x0C)) {
+ if (tmp_val == 0x0C)
+ value = LED_MODE_RED;
+ else if (tmp_val == 0x04)
+ value = LED_MODE_RED_BLINKING;
+ else
+ value = LED_MODE_OFF;
+ } else if ((tmp_val = data->led_data.led_ctrl1 & 0x03)) {
+ if (tmp_val == 0x03)
+ value = LED_MODE_GREEN;
+ else if (tmp_val == 0x01)
+ value = LED_MODE_GREEN_BLINKING;
+ else
+ value = LED_MODE_OFF;
+ } else
+ value = LED_MODE_OFF;
+ break;
+ case LED_BMC:
+ if ((tmp_val = data->led_data.led_ctrl1 & 0xC0)) {
+ if (tmp_val == 0xC0)
+ value = LED_MODE_RED;
+ else if (tmp_val == 0x40)
+ value = LED_MODE_RED_BLINKING;
+ else
+ value = LED_MODE_OFF;
+ } else if ((tmp_val = data->led_data.led_ctrl1 & 0x30)) {
+ if (tmp_val == 0x30)
+ value = LED_MODE_GREEN;
+ else if (tmp_val == 0x10)
+ value = LED_MODE_GREEN_BLINKING;
+ else
+ value = LED_MODE_OFF;
+ } else
+ value = LED_MODE_OFF;
+
+ break;
+ case LED_FAN:
+ if ((tmp_val = data->led_data.led_ctrl2 & 0x0C)) {
+ if (tmp_val == 0x0C)
+ value = LED_MODE_RED;
+ else if (tmp_val == 0x04)
+ value = LED_MODE_RED_BLINKING;
+ else
+ value = LED_MODE_OFF;
+ } else if ((tmp_val = data->led_data.led_ctrl2 & 0x03)) {
+ if (tmp_val == 0x03)
+ value = LED_MODE_GREEN;
+ else if (tmp_val == 0x01)
+ value = LED_MODE_GREEN_BLINKING;
+ else
+ value = LED_MODE_OFF;
+ } else
+ value = LED_MODE_OFF;
+ break;
+ case LED_PSU:
+ if ((tmp_val = data->led_data.led_ctrl2 & 0xC0)) {
+ if (tmp_val == 0xC0)
+ value = LED_MODE_RED;
+ else if (tmp_val == 0x40)
+ value = LED_MODE_RED_BLINKING;
+ else
+ value = LED_MODE_OFF;
+ } else if ((tmp_val = data->led_data.led_ctrl2 & 0x30)) {
+ if (tmp_val == 0x30)
+ value = LED_MODE_GREEN;
+ else if (tmp_val == 0x10)
+ value = LED_MODE_GREEN_BLINKING;
+ else
+ value = LED_MODE_OFF;
+ } else
+ value = LED_MODE_OFF;
+
+ break;
+
+ default:
+ error = -EINVAL;
+ goto exit;
+ }
+
+ mutex_unlock(&data->update_lock);
+ return sprintf(buf, "%d\n", value);
+
+exit:
+ mutex_unlock(&data->update_lock);
+ return error;
+}
+
+static ssize_t set_led(struct device *dev, struct device_attribute *da,
+ const char *buf, size_t count) {
+ long mode;
+ int status, value;
+ struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+ unsigned char ipmi_tx_data[5] = {0};
+
+ status = kstrtol(buf, 10, &mode);
+ if (status) {
+ return status;
+ }
+
+ mutex_lock(&data->update_lock);
+
+ data = wistron_wtp_01_02_00_led_update_device();
+ if (!data->valid) {
+ status = -EIO;
+ goto exit;
+ }
+
+ switch (attr->index) {
+ case LED_SYS:
+ if (mode == LED_MODE_RED)
+ value = (data->led_data.led_ctrl1 & 0xF0) | 0x0C;
+ else if (mode == LED_MODE_RED_BLINKING)
+ value = (data->led_data.led_ctrl1 & 0xF0) | 0x04;
+ if (mode == LED_MODE_GREEN)
+ value = (data->led_data.led_ctrl1 & 0xF0) | 0x03;
+ else if (mode == LED_MODE_RED_BLINKING)
+ value = (data->led_data.led_ctrl1 & 0xF0) | 0x01;
+ else
+ value = (data->led_data.led_ctrl1 & 0xF0) | 0x00;
+ break;
+ case LED_BMC:
+ if (mode == LED_MODE_RED)
+ value = (data->led_data.led_ctrl1 & 0x0F) | 0xC0;
+ else if (mode == LED_MODE_RED_BLINKING)
+ value = (data->led_data.led_ctrl1 & 0x0F) | 0x40;
+ if (mode == LED_MODE_GREEN)
+ value = (data->led_data.led_ctrl1 & 0x0F) | 0x30;
+ else if (mode == LED_MODE_RED_BLINKING)
+ value = (data->led_data.led_ctrl1 & 0x0F) | 0x10;
+ else
+ value = (data->led_data.led_ctrl1 & 0x0F) | 0x00;
+ break;
+ case LED_FAN:
+ if (mode == LED_MODE_RED)
+ value = (data->led_data.led_ctrl2 & 0xF0) | 0x0C;
+ else if (mode == LED_MODE_RED_BLINKING)
+ value = (data->led_data.led_ctrl2 & 0xF0) | 0x04;
+ if (mode == LED_MODE_GREEN)
+ value = (data->led_data.led_ctrl2 & 0xF0) | 0x03;
+ else if (mode == LED_MODE_RED_BLINKING)
+ value = (data->led_data.led_ctrl2 & 0xF0) | 0x01;
+ else
+ value = (data->led_data.led_ctrl2 & 0xF0) | 0x00;
+ break;
+ case LED_PSU:
+ if (mode == LED_MODE_RED)
+ value = (data->led_data.led_ctrl2 & 0x0F) | 0xC0;
+ else if (mode == LED_MODE_RED_BLINKING)
+ value = (data->led_data.led_ctrl2 & 0x0F) | 0x40;
+ if (mode == LED_MODE_GREEN)
+ value = (data->led_data.led_ctrl2 & 0x0F) | 0x30;
+ else if (mode == LED_MODE_RED_BLINKING)
+ value = (data->led_data.led_ctrl2 & 0x0F) | 0x10;
+ else
+ value = (data->led_data.led_ctrl2 & 0x0F) | 0x00;
+ break;
+ default:
+ status = -EINVAL;
+ goto exit;
+ }
+
+ /* Send IPMI write command */
+ ipmi_tx_data[0] = 0x08; /* I2C Bus */
+ ipmi_tx_data[1] = 0x60; /* FPGA addr */
+ ipmi_tx_data[2] = 0x01; /* No of bytes to read */
+ if ((attr->index == LED_SYS) || (attr->index == LED_BMC))
+ ipmi_tx_data[3] = 0x1e;
+ else
+ ipmi_tx_data[3] = 0x1f;
+ ipmi_tx_data[4] = value; /* register value*/
+
+ status = ipmi_send_message(&data->ipmi, WISTRON_IPMI_RW_CMD, &ipmi_tx_data[0],
+ 5, NULL, 0);
+ if (unlikely(status != 0)) {
+ goto exit;
+ }
+
+ if (unlikely(data->ipmi.rx_result != 0)) {
+ status = -EIO;
+ goto exit;
+ }
+
+ status = count;
+
+exit:
+ mutex_unlock(&data->update_lock);
+ return status;
+}
+
+static int wistron_wtp_01_02_00_led_probe(struct platform_device *pdev) {
+ int status = -1;
+
+ /* Register sysfs hooks */
+ status = sysfs_create_group(&pdev->dev.kobj, &wistron_wtp_01_02_00_led_group);
+ if (status) {
+ goto exit;
+ }
+
+ dev_info(&pdev->dev, "device created\n");
+
+ return 0;
+
+exit:
+ return status;
+}
+
+static int wistron_wtp_01_02_00_led_remove(struct platform_device *pdev) {
+ sysfs_remove_group(&pdev->dev.kobj, &wistron_wtp_01_02_00_led_group);
+
+ return 0;
+}
+
+static int __init wistron_wtp_01_02_00_led_init(void) {
+ int ret;
+
+ data = kzalloc(sizeof(struct wistron_wtp_01_02_00_led_data), GFP_KERNEL);
+ if (!data) {
+ ret = -ENOMEM;
+ goto alloc_err;
+ }
+
+ mutex_init(&data->update_lock);
+ data->valid = 0;
+
+ ret = platform_driver_register(&wistron_wtp_01_02_00_led_driver);
+ if (ret < 0) {
+ goto dri_reg_err;
+ }
+
+ data->pdev = platform_device_register_simple(DRVNAME, -1, NULL, 0);
+ if (IS_ERR(data->pdev)) {
+ ret = PTR_ERR(data->pdev);
+ goto dev_reg_err;
+ }
+
+ /* Set up IPMI interface */
+ ret = init_ipmi_data(&data->ipmi, 0, &data->pdev->dev);
+ if (ret) goto ipmi_err;
+
+ return 0;
+
+ipmi_err:
+ platform_device_unregister(data->pdev);
+dev_reg_err:
+ platform_driver_unregister(&wistron_wtp_01_02_00_led_driver);
+dri_reg_err:
+ kfree(data);
+alloc_err:
+ return ret;
+}
+
+static void __exit wistron_wtp_01_02_00_led_exit(void) {
+ ipmi_destroy_user(data->ipmi.user);
+ platform_device_unregister(data->pdev);
+ platform_driver_unregister(&wistron_wtp_01_02_00_led_driver);
+ kfree(data);
+}
+
+MODULE_AUTHOR("HarshaF1");
+MODULE_DESCRIPTION("Wistron WTP-01-02-00 LED driver");
+MODULE_LICENSE("GPL");
+
+module_init(wistron_wtp_01_02_00_led_init);
+module_exit(wistron_wtp_01_02_00_led_exit);
diff --git a/packages/platforms/wistron/x86-64/wtp-01-02-00/modules/builds/x86-64-wistron-wtp-01-02-00-psu.c b/packages/platforms/wistron/x86-64/wtp-01-02-00/modules/builds/x86-64-wistron-wtp-01-02-00-psu.c
new file mode 100644
index 0000000..ff0bc68
--- /dev/null
+++ b/packages/platforms/wistron/x86-64/wtp-01-02-00/modules/builds/x86-64-wistron-wtp-01-02-00-psu.c
@@ -0,0 +1,797 @@
+/*
+ * Based on:
+ * pca954x.c from Kumar Gala
+ * Copyright (C) 2006
+ *
+ * Based on:
+ * pca954x.c from Ken Harrenstien
+ * Copyright (C) 2004 Google, Inc. (Ken Harrenstien)
+ *
+ * Based on:
+ * i2c-virtual_cb.c from Brian Kuschak
+ * and
+ * pca9540.c from Jean Delvare .
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+/* Some of the psu-info is missing in Hw specs from Wistron,
+ * hence some part of the code is commented out */
+#define DRVNAME "wtp_01_02_00_psu"
+#define WISTRON_OEM_IPMI_NETFN 0x30
+#define WISTRON_IPMI_RW_CMD 0x2b
+#define WISTRON_IPMI_PSU_TYPE_CMD 0x35
+#define IPMI_NETFN 0x04
+#define IPMI_PSU_READ_CMD 0x2d
+#define IPMI_PSU_TH_READ_CMD 0x27
+#define IPMI_SDR_PSU_STATUS_BASE 0x06
+#define IPMI_SDR_PSU_POUT_BASE 0x53
+#define IPMI_SDR_PSU_TEMP_BASE 0x2E
+#define IPMI_TIMEOUT (20 * HZ)
+
+static void ipmi_msg_handler(struct ipmi_recv_msg *msg, void *user_msg_data);
+static ssize_t show_psu(struct device *dev, struct device_attribute *attr,
+ char *buf);
+static int wistron_wtp_01_02_00_psu_probe(struct platform_device *pdev);
+static int wistron_wtp_01_02_00_psu_remove(struct platform_device *pdev);
+
+static const char * PSU_TYPE_NOT_PRESENT = "not-present";
+static const char * PSU_TYPE_ACBEL_AC = "AcBel AC";
+static const char * PSU_TYPE_ACBEL_DC = "AcBel DC";
+static const char * PSU_TYPE_DELTA_AC = "Delta AC";
+static const char * PSU_TYPE_DELTA_DC = "Delta DC";
+static const char * PSU_TYPE_DC12V = "DC12V";
+static const char * PSU_TYPE_UNKNOWN = "unknown";
+
+enum psu_id { PSU_1, PSU_2, NUM_OF_PSU };
+
+struct ipmi_data {
+ struct completion read_complete;
+ struct ipmi_addr address;
+ struct ipmi_user *user;
+ int interface;
+ struct kernel_ipmi_msg tx_message;
+ long tx_msgid;
+ void *rx_msg_data;
+ unsigned short rx_msg_len;
+ unsigned char rx_result;
+ int rx_recv_type;
+ struct ipmi_user_hndl ipmi_hndlrs;
+};
+
+struct ipmi_psu_sensor_data {
+ unsigned int pout_reading;
+ unsigned int pin_reading;
+ unsigned int vout_reading;
+ unsigned int vin_reading;
+ unsigned int iout_reading;
+ unsigned int iin_reading;
+ unsigned char psu_temp;
+ unsigned char psu_temp_thresh_caps;
+ unsigned char psu_temp_thresholds[6];
+ int psu_fan_rpm;
+ unsigned char status;
+ char model[32];
+ char serial[32];
+ const char *type;
+};
+
+struct wistron_wtp_01_02_00_psu_data {
+ struct platform_device *pdev;
+ struct mutex update_lock;
+ char valid[2]; /* != 0 if registers are valid */
+ unsigned long last_updated[2]; /* In jiffies */
+ struct ipmi_data ipmi;
+ struct ipmi_psu_sensor_data psu_data[2];
+};
+
+struct wistron_wtp_01_02_00_psu_data *data = NULL;
+
+static struct platform_driver wistron_wtp_01_02_00_psu_driver = {
+ .probe = wistron_wtp_01_02_00_psu_probe,
+ .remove = wistron_wtp_01_02_00_psu_remove,
+ .driver =
+ {
+ .name = DRVNAME,
+ .owner = THIS_MODULE,
+ },
+};
+
+#define PSU_STATUS_ATTR_ID(index) PSU##index##_STATUS
+#define PSU_POUT_ATTR_ID(index) PSU##index##_POUT
+#define PSU_PIN_ATTR_ID(index) PSU##index##_PIN
+#define PSU_VOUT_ATTR_ID(index) PSU##index##_VOUT
+#define PSU_VIN_ATTR_ID(index) PSU##index##_VIN
+#define PSU_IOUT_ATTR_ID(index) PSU##index##_IOUT
+#define PSU_IIN_ATTR_ID(index) PSU##index##_IIN
+#define PSU_MODEL_ATTR_ID(index) PSU##index##_MODEL
+#define PSU_SERIAL_ATTR_ID(index) PSU##index##_SERIAL
+#define PSU_TEMP_ATTR_ID(index) PSU##index##_TEMP
+#define PSU_TEMP_THRESH_CAPS_ATTR_ID(index) PSU##index##_TEMP_THRESH_CAPS
+#define PSU_TEMP_THRESH_ATTR_ID(index) PSU##index##_TEMP_THRESH
+#define PSU_FAN_RPM_ATTR_ID(index) PSU##index##_FAN_RPM
+#define PSU_TYPE_ATTR_ID(index) PSU##index##_TYPE
+
+#define PSU_ATTR(psu_id) \
+ PSU_STATUS_ATTR_ID(psu_id), PSU_POUT_ATTR_ID(psu_id), \
+ PSU_PIN_ATTR_ID(psu_id), PSU_VOUT_ATTR_ID(psu_id), \
+ PSU_VIN_ATTR_ID(psu_id), PSU_IOUT_ATTR_ID(psu_id), \
+ PSU_IIN_ATTR_ID(psu_id), PSU_MODEL_ATTR_ID(psu_id), \
+ PSU_SERIAL_ATTR_ID(psu_id), PSU_TEMP_ATTR_ID(psu_id), \
+ PSU_TEMP_THRESH_CAPS_ATTR_ID(psu_id), PSU_TEMP_THRESH_ATTR_ID(psu_id), \
+ PSU_FAN_RPM_ATTR_ID(psu_id), PSU_TYPE_ATTR_ID(psu_id)
+
+enum wistron_wtp_01_02_00_psu_sysfs_attrs {
+ /* psu attributes */
+ PSU_ATTR(1),
+ PSU_ATTR(2),
+ NUM_OF_PSU_ATTR,
+ NUM_OF_PER_PSU_ATTR = (NUM_OF_PSU_ATTR / NUM_OF_PSU)
+};
+
+/* psu attributes */
+#define DECLARE_PSU_SENSOR_DEVICE_ATTR(index) \
+ static SENSOR_DEVICE_ATTR(psu##index##_status, S_IRUGO, show_psu, NULL, \
+ PSU##index##_STATUS); \
+ static SENSOR_DEVICE_ATTR(psu##index##_pout, S_IRUGO, show_psu, NULL, \
+ PSU##index##_POUT); \
+ static SENSOR_DEVICE_ATTR(psu##index##_pin, S_IRUGO, show_psu, NULL, \
+ PSU##index##_PIN); \
+ static SENSOR_DEVICE_ATTR(psu##index##_vout, S_IRUGO, show_psu, NULL, \
+ PSU##index##_VOUT); \
+ static SENSOR_DEVICE_ATTR(psu##index##_vin, S_IRUGO, show_psu, NULL, \
+ PSU##index##_VIN); \
+ static SENSOR_DEVICE_ATTR(psu##index##_iout, S_IRUGO, show_psu, NULL, \
+ PSU##index##_IOUT); \
+ static SENSOR_DEVICE_ATTR(psu##index##_iin, S_IRUGO, show_psu, NULL, \
+ PSU##index##_IIN); \
+ static SENSOR_DEVICE_ATTR(psu##index##_model, S_IRUGO, show_psu, NULL, \
+ PSU##index##_MODEL); \
+ static SENSOR_DEVICE_ATTR(psu##index##_serial, S_IRUGO, show_psu, NULL, \
+ PSU##index##_SERIAL); \
+ static SENSOR_DEVICE_ATTR(psu##index##_temp, S_IRUGO, show_psu, NULL, \
+ PSU##index##_TEMP); \
+ static SENSOR_DEVICE_ATTR(psu##index##_temp_thresh_caps, S_IRUGO, show_psu, \
+ NULL, PSU##index##_TEMP_THRESH_CAPS); \
+ static SENSOR_DEVICE_ATTR(psu##index##_temp_thresh, S_IRUGO, show_psu, NULL, \
+ PSU##index##_TEMP_THRESH); \
+ static SENSOR_DEVICE_ATTR(psu##index##_fan_rpm, S_IRUGO, show_psu, NULL, \
+ PSU##index##_FAN_RPM); \
+ static SENSOR_DEVICE_ATTR(psu##index##_type, S_IRUGO, show_psu, NULL, \
+ PSU##index##_TYPE)
+
+#define DECLARE_PSU_ATTR(index) \
+ &sensor_dev_attr_psu##index##_status.dev_attr.attr, \
+ &sensor_dev_attr_psu##index##_pout.dev_attr.attr, \
+ &sensor_dev_attr_psu##index##_pin.dev_attr.attr, \
+ &sensor_dev_attr_psu##index##_vout.dev_attr.attr, \
+ &sensor_dev_attr_psu##index##_vin.dev_attr.attr, \
+ &sensor_dev_attr_psu##index##_iout.dev_attr.attr, \
+ &sensor_dev_attr_psu##index##_iin.dev_attr.attr, \
+ &sensor_dev_attr_psu##index##_model.dev_attr.attr, \
+ &sensor_dev_attr_psu##index##_serial.dev_attr.attr, \
+ &sensor_dev_attr_psu##index##_temp.dev_attr.attr, \
+ &sensor_dev_attr_psu##index##_temp_thresh_caps.dev_attr.attr, \
+ &sensor_dev_attr_psu##index##_temp_thresh.dev_attr.attr, \
+ &sensor_dev_attr_psu##index##_fan_rpm.dev_attr.attr, \
+ &sensor_dev_attr_psu##index##_type.dev_attr.attr \
+
+DECLARE_PSU_SENSOR_DEVICE_ATTR(1);
+DECLARE_PSU_SENSOR_DEVICE_ATTR(2);
+
+static struct attribute *wistron_wtp_01_02_00_psu_attributes[] = {
+ /* psu attributes */
+ DECLARE_PSU_ATTR(1), DECLARE_PSU_ATTR(2), NULL
+};
+
+static const struct attribute_group wistron_wtp_01_02_00_psu_group = {
+ .attrs = wistron_wtp_01_02_00_psu_attributes,
+};
+
+/* Functions to talk to the IPMI layer */
+
+/* Initialize IPMI address, message buffers and user data */
+static int init_ipmi_data(struct ipmi_data *ipmi, int iface,
+ struct device *dev) {
+ int err;
+
+ init_completion(&ipmi->read_complete);
+
+ /* Initialize IPMI address */
+ ipmi->address.addr_type = IPMI_SYSTEM_INTERFACE_ADDR_TYPE;
+ ipmi->address.channel = IPMI_BMC_CHANNEL;
+ ipmi->address.data[0] = 0;
+ ipmi->interface = iface;
+
+ /* Initialize message buffers */
+ ipmi->tx_msgid = 0;
+
+ ipmi->ipmi_hndlrs.ipmi_recv_hndl = ipmi_msg_handler;
+
+ /* Create IPMI messaging interface user */
+ err =
+ ipmi_create_user(ipmi->interface, &ipmi->ipmi_hndlrs, ipmi, &ipmi->user);
+ if (err < 0) {
+ dev_err(dev,
+ "Unable to register user with IPMI "
+ "interface %d\n",
+ ipmi->interface);
+ return -EACCES;
+ }
+
+ return 0;
+}
+
+/* Send an IPMI command */
+static int ipmi_send_message(struct ipmi_data *ipmi, unsigned char cmd,
+ unsigned char *tx_data, unsigned short tx_len,
+ unsigned char *rx_data, unsigned short rx_len,
+ bool is_custom_cmd) {
+ int err;
+
+ if (is_custom_cmd) {
+ ipmi->tx_message.netfn = WISTRON_OEM_IPMI_NETFN;
+ } else
+ ipmi->tx_message.netfn = IPMI_NETFN;
+
+ ipmi->tx_message.cmd = cmd;
+ ipmi->tx_message.data = tx_data;
+ ipmi->tx_message.data_len = tx_len;
+ ipmi->rx_msg_data = rx_data;
+ ipmi->rx_msg_len = rx_len;
+
+ err = ipmi_validate_addr(&ipmi->address, sizeof(ipmi->address));
+ if (err) goto addr_err;
+
+ ipmi->tx_msgid++;
+ err = ipmi_request_settime(ipmi->user, &ipmi->address, ipmi->tx_msgid,
+ &ipmi->tx_message, ipmi, 0, 0, 0);
+ if (err) goto ipmi_req_err;
+
+ err = wait_for_completion_timeout(&ipmi->read_complete, IPMI_TIMEOUT);
+ if (!err) goto ipmi_timeout_err;
+
+ return 0;
+
+ipmi_timeout_err:
+ err = -ETIMEDOUT;
+ dev_err(&data->pdev->dev, "request_timeout=%x\n", err);
+ return err;
+ipmi_req_err:
+ dev_err(&data->pdev->dev, "request_settime=%x\n", err);
+ return err;
+addr_err:
+ dev_err(&data->pdev->dev, "validate_addr=%x\n", err);
+ return err;
+}
+
+/* Dispatch IPMI messages to callers */
+static void ipmi_msg_handler(struct ipmi_recv_msg *msg, void *user_msg_data) {
+ unsigned short rx_len;
+ struct ipmi_data *ipmi = user_msg_data;
+
+ if (msg->msgid != ipmi->tx_msgid) {
+ dev_err(&data->pdev->dev,
+ "Mismatch between received msgid "
+ "(%02x) and transmitted msgid (%02x)!\n",
+ (int)msg->msgid, (int)ipmi->tx_msgid);
+ ipmi_free_recv_msg(msg);
+ return;
+ }
+
+ ipmi->rx_recv_type = msg->recv_type;
+ if (msg->msg.data_len > 0)
+ ipmi->rx_result = msg->msg.data[0];
+ else
+ ipmi->rx_result = IPMI_UNKNOWN_ERR_COMPLETION_CODE;
+
+ if (msg->msg.data_len > 1) {
+ rx_len = msg->msg.data_len - 1;
+ if (ipmi->rx_msg_len < rx_len) rx_len = ipmi->rx_msg_len;
+ ipmi->rx_msg_len = rx_len;
+ memcpy(ipmi->rx_msg_data, msg->msg.data + 1, ipmi->rx_msg_len);
+ } else
+ ipmi->rx_msg_len = 0;
+
+ ipmi_free_recv_msg(msg);
+ complete(&ipmi->read_complete);
+}
+
+static int two_complement_to_int(u16 data, u8 valid_bit, int mask) {
+ u16 valid_data = data & mask;
+ bool is_negative = valid_data >> (valid_bit - 1);
+
+ return is_negative ? (-(((~valid_data) & mask) + 1)) : valid_data;
+}
+
+static int psu_param_get_linear_data(unsigned char fid, int *value,
+ int command_code) {
+ unsigned char ipmi_resp[32] = {0};
+ unsigned char ipmi_tx_data[4] = {0};
+ int exponent = 0, mantissa = 0, status;
+ int tmp_value;
+
+ ipmi_resp[0] = '\0';
+ ipmi_tx_data[0] = 0x05; /* I2C Bus */
+
+ if (fid == 0)
+ ipmi_tx_data[1] = 0xb4; /* PSU1 address */
+ else
+ ipmi_tx_data[1] = 0xb6; /* PSU2 address */
+ ipmi_tx_data[2] = 0x02; /* No of bytes to read */
+ ipmi_tx_data[3] = command_code;
+
+ status = ipmi_send_message(&data->ipmi, WISTRON_IPMI_RW_CMD, &ipmi_tx_data[0],
+ 4, &ipmi_resp[0], sizeof(ipmi_resp), 1);
+ if (unlikely(status != 0)) {
+ return status;
+ }
+
+ if (unlikely(data->ipmi.rx_result != 0)) {
+ status = -EIO;
+ return status;
+ }
+
+ tmp_value = (ipmi_resp[1] << 8) | (ipmi_resp[0]);
+
+ exponent = two_complement_to_int(tmp_value >> 11, 5, 0x1f);
+ mantissa = two_complement_to_int(tmp_value & 0x7ff, 11, 0x7ff);
+
+ if (exponent >= 0) {
+ tmp_value = (mantissa << exponent) * 1000;
+ } else {
+ tmp_value = ((mantissa * 1000) / (1 << -exponent));
+ }
+
+ *value = tmp_value;
+
+ return 0;
+}
+
+static struct wistron_wtp_01_02_00_psu_data *
+wistron_wtp_01_02_00_psu_update_device(unsigned char fid) {
+ int status = 0, dc12v = 0;
+ unsigned char ipmi_resp[32] = {0}, model_len, serial_len, temp;
+ unsigned char ipmi_tx_data[4] = {0}, caps = 0, thresholds[6] = {0};
+ char model[32], serial[32], *type = PSU_TYPE_NOT_PRESENT;
+ int pres_status = 0, psu_fan_rpm = -1;
+ int pin = -1, pout = -1, vin = -1, vout = -1, iin = -1, iout = -1;
+
+ if (time_before(jiffies, data->last_updated[fid] + HZ * 5) &&
+ data->valid[fid]) {
+ return data;
+ }
+
+ data->valid[fid] = 0;
+
+ /* Get PSU status from ipmi */
+ /* FPGA can also be read to get the presence status */
+ ipmi_tx_data[0] = IPMI_SDR_PSU_STATUS_BASE + fid;
+ status = ipmi_send_message(&data->ipmi, IPMI_PSU_READ_CMD, &ipmi_tx_data[0],
+ 1, &ipmi_resp[0], sizeof(ipmi_resp), 0);
+
+ if (unlikely(status != 0)) {
+ goto err;
+ }
+
+ if (unlikely(data->ipmi.rx_result != 0)) {
+ status = -EIO;
+ goto err;
+ }
+ pres_status = ipmi_resp[2];
+
+ /* Get PSU type from IPMI */
+ ipmi_tx_data[0] = fid;
+ status = ipmi_send_message(&data->ipmi, WISTRON_IPMI_PSU_TYPE_CMD, &ipmi_tx_data[0],
+ 1, &ipmi_resp[0], sizeof(ipmi_resp), 1);
+ if (unlikely(status != 0)) {
+ goto err;
+ }
+ if (unlikely(data->ipmi.rx_result != 0)) {
+ status = -EIO;
+ goto err;
+ }
+
+ switch (ipmi_resp[0]) {
+ case 0:
+ type = PSU_TYPE_NOT_PRESENT;
+ goto exit;
+ case 1:
+ type = PSU_TYPE_ACBEL_AC;
+ break;
+ case 2:
+ type = PSU_TYPE_ACBEL_DC;
+ break;
+ case 3:
+ type = PSU_TYPE_DELTA_AC;
+ break;
+ case 4:
+ type = PSU_TYPE_DELTA_DC;
+ break;
+ case 5:
+ type = PSU_TYPE_DC12V;
+ dc12v = 1;
+ break;
+ default:
+ type = PSU_TYPE_UNKNOWN;
+ break;
+ }
+
+ ipmi_resp[0] = '\0';
+ /* Get PSU pout from ipmi */
+ ipmi_tx_data[0] = IPMI_SDR_PSU_POUT_BASE + fid;
+ status = ipmi_send_message(&data->ipmi, IPMI_PSU_READ_CMD, &ipmi_tx_data[0],
+ 1, &ipmi_resp[0], sizeof(ipmi_resp), 0);
+ if (unlikely(status != 0)) {
+ goto err;
+ }
+
+ if (unlikely(data->ipmi.rx_result != 0)) {
+ status = -EIO;
+ goto err;
+ }
+
+ /* All the psu readings are written into the file in milli */
+ pout = ipmi_resp[0] * 10 * 1000;
+
+ if (dc12v) {
+ goto exit;
+ }
+
+ ipmi_resp[0] = '\0';
+ /* Get PSU temp from ipmi */
+ ipmi_tx_data[0] = IPMI_SDR_PSU_TEMP_BASE + fid;
+ status = ipmi_send_message(&data->ipmi, IPMI_PSU_READ_CMD, &ipmi_tx_data[0],
+ 1, &ipmi_resp[0], sizeof(ipmi_resp), 0);
+ if (unlikely(status != 0)) {
+ goto err;
+ }
+
+ if (unlikely(data->ipmi.rx_result != 0)) {
+ status = -EIO;
+ goto err;
+ }
+
+ temp = ipmi_resp[0];
+
+ ipmi_resp[0] = '\0';
+ /* Get PSU temp caps from ipmi */
+ ipmi_tx_data[0] = IPMI_SDR_PSU_TEMP_BASE + fid;
+ status =
+ ipmi_send_message(&data->ipmi, IPMI_PSU_TH_READ_CMD, &ipmi_tx_data[0], 1,
+ &ipmi_resp[0], sizeof(ipmi_resp), 0);
+ if (unlikely(status != 0)) {
+ goto err;
+ }
+
+ if (unlikely(data->ipmi.rx_result != 0)) {
+ status = -EIO;
+ goto err;
+ }
+
+ caps = ipmi_resp[0];
+ memcpy(&thresholds[0], &ipmi_resp[1], 6);
+
+ /* Get PSU pIN from ipmi */
+ /* PSU pIN command code = 0x97*/
+ status = psu_param_get_linear_data(fid, &pin, 0x97);
+
+ if (status != 0) {
+ goto err;
+ }
+
+ /* Get PSU vIN from ipmi */
+ /* PSU vIN command code = 0x88*/
+ status = psu_param_get_linear_data(fid, &vin, 0x88);
+
+ if (status != 0) {
+ goto err;
+ }
+
+ /* Get PSU vOUT from ipmi */
+ /* PSU vOUT command code = 0x8b*/
+ status = psu_param_get_linear_data(fid, &vout, 0x8b);
+
+ if (status != 0) {
+ goto err;
+ }
+
+ /* Get PSU iIN from ipmi */
+ /* PSU iIN command code = 0x89*/
+ status = psu_param_get_linear_data(fid, &iin, 0x89);
+
+ if (status != 0) {
+ goto err;
+ }
+
+ /* Get PSU iOUT from ipmi */
+ /* PSU iOUT command code = 0x8c*/
+ status = psu_param_get_linear_data(fid, &iout, 0x8c);
+
+ if (status != 0) {
+ goto err;
+ }
+
+ /* Get PSU fan-rpm from ipmi */
+ ipmi_resp[0] = '\0';
+ ipmi_tx_data[0] = 0x05; /* I2C Bus */
+ if (fid == 0)
+ ipmi_tx_data[1] = 0xb4; /* PSU1 address */
+ else
+ ipmi_tx_data[1] = 0xb6; /* PSU2 address */
+ ipmi_tx_data[2] = 0x02; /* No of bytes to read */
+ ipmi_tx_data[3] = 0x90; /* PSU fan command code*/
+
+ status = ipmi_send_message(&data->ipmi, WISTRON_IPMI_RW_CMD, &ipmi_tx_data[0],
+ 4, &ipmi_resp[0], sizeof(ipmi_resp), 1);
+ if (unlikely(status != 0)) {
+ goto err;
+ }
+
+ if (unlikely(data->ipmi.rx_result != 0)) {
+ status = -EIO;
+ goto err;
+ }
+ psu_fan_rpm = (ipmi_resp[1] << 8) | (ipmi_resp[0]);
+
+ /* Get PSU Model from ipmi */
+ ipmi_resp[0] = '\0';
+ ipmi_tx_data[0] = 0x05; /* I2C Bus */
+ if (fid == 0)
+ ipmi_tx_data[1] = 0xb4; /* PSU1 address */
+ else
+ ipmi_tx_data[1] = 0xb6; /* PSU2 address */
+ ipmi_tx_data[2] = 0x1f; /* No of bytes to read */
+ ipmi_tx_data[3] = 0x9a; /* PSU Model command code*/
+
+ status = ipmi_send_message(&data->ipmi, WISTRON_IPMI_RW_CMD, &ipmi_tx_data[0],
+ 4, &ipmi_resp[0], sizeof(ipmi_resp), 1);
+ if (unlikely(status != 0)) {
+ goto err;
+ }
+
+ if (unlikely(data->ipmi.rx_result != 0)) {
+ status = -EIO;
+ goto err;
+ }
+ model_len = ipmi_resp[0];
+ memcpy(&model[0], &ipmi_resp[1], model_len);
+
+ /* Get PSU Serial no from ipmi */
+ ipmi_resp[0] = '\0';
+ ipmi_tx_data[0] = 0x05; /* I2C Bus */
+ if (fid == 0)
+ ipmi_tx_data[1] = 0xb4; /* PSU1 address */
+ else
+ ipmi_tx_data[1] = 0xb6; /* PSU2 address */
+ ipmi_tx_data[2] = 0x1f; /* No of bytes to read */
+ ipmi_tx_data[3] = 0x9e; /* PSU Serial command code*/
+
+ status = ipmi_send_message(&data->ipmi, WISTRON_IPMI_RW_CMD, &ipmi_tx_data[0],
+ 4, &ipmi_resp[0], sizeof(ipmi_resp), 1);
+ if (unlikely(status != 0)) {
+ goto err;
+ }
+
+ if (unlikely(data->ipmi.rx_result != 0)) {
+ status = -EIO;
+ goto err;
+ }
+ serial_len = ipmi_resp[0];
+ memcpy(&serial[0], &ipmi_resp[1], serial_len);
+
+exit:
+ data->last_updated[fid] = jiffies;
+ data->valid[fid] = 1;
+
+err:
+ data->psu_data[fid].pout_reading = pout;
+ data->psu_data[fid].pin_reading = pin;
+ data->psu_data[fid].vout_reading = vout;
+ data->psu_data[fid].vin_reading = vin;
+ data->psu_data[fid].iout_reading = iout;
+ data->psu_data[fid].iin_reading = iin;
+ data->psu_data[fid].status = pres_status;
+ data->psu_data[fid].psu_temp = temp;
+ data->psu_data[fid].psu_temp_thresh_caps = caps;
+ data->psu_data[fid].type = type;
+ memcpy(&data->psu_data[fid].psu_temp_thresholds[0], &thresholds[0], 6);
+ data->psu_data[fid].psu_fan_rpm = psu_fan_rpm;
+ memcpy(&data->psu_data[fid].model[0], &model, model_len);
+ memcpy(&data->psu_data[fid].serial[0], &serial, serial_len);
+ return data;
+}
+
+static ssize_t show_psu(struct device *dev, struct device_attribute *da,
+ char *buf) {
+ struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+ unsigned char fid = attr->index / NUM_OF_PER_PSU_ATTR;
+ int value = 0;
+ int error = 0;
+ char *str = NULL, tmpbuf[64] = {0};
+ bool print_str = 0;
+
+ mutex_lock(&data->update_lock);
+
+ data = wistron_wtp_01_02_00_psu_update_device(fid);
+ if (!data->valid) {
+ error = -EIO;
+ goto exit;
+ }
+
+ switch (attr->index) {
+ case PSU1_STATUS:
+ case PSU2_STATUS:
+ value = data->psu_data[fid].status;
+ break;
+ case PSU1_POUT:
+ case PSU2_POUT:
+ value = data->psu_data[fid].pout_reading;
+ break;
+ case PSU1_PIN:
+ case PSU2_PIN:
+ value = data->psu_data[fid].pin_reading;
+ break;
+ case PSU1_VOUT:
+ case PSU2_VOUT:
+ value = data->psu_data[fid].vout_reading;
+ break;
+ case PSU1_VIN:
+ case PSU2_VIN:
+ value = data->psu_data[fid].vin_reading;
+ break;
+ case PSU1_IOUT:
+ case PSU2_IOUT:
+ value = data->psu_data[fid].iout_reading;
+ break;
+ case PSU1_IIN:
+ case PSU2_IIN:
+ value = data->psu_data[fid].iin_reading;
+ break;
+ case PSU1_FAN_RPM:
+ case PSU2_FAN_RPM:
+ value = data->psu_data[fid].psu_fan_rpm;
+ break;
+ case PSU1_TEMP:
+ case PSU2_TEMP:
+ value = data->psu_data[fid].psu_temp;
+ break;
+ case PSU1_TEMP_THRESH_CAPS:
+ case PSU2_TEMP_THRESH_CAPS:
+ value = data->psu_data[fid].psu_temp_thresh_caps;
+ break;
+ case PSU1_TEMP_THRESH:
+ case PSU2_TEMP_THRESH:
+ str = &tmpbuf[0];
+ sprintf(str, "%d\n%d\n%d\n%d\n%d\n%d",
+ data->psu_data[fid].psu_temp_thresholds[0],
+ data->psu_data[fid].psu_temp_thresholds[1],
+ data->psu_data[fid].psu_temp_thresholds[2],
+ data->psu_data[fid].psu_temp_thresholds[3],
+ data->psu_data[fid].psu_temp_thresholds[4],
+ data->psu_data[fid].psu_temp_thresholds[5]);
+ print_str = 1;
+ break;
+ case PSU1_MODEL:
+ case PSU2_MODEL:
+ str = data->psu_data[fid].model;
+ print_str = 1;
+ break;
+ case PSU1_SERIAL:
+ case PSU2_SERIAL:
+ str = data->psu_data[fid].serial;
+ print_str = 1;
+ break;
+ case PSU1_TYPE:
+ case PSU2_TYPE:
+ str = data->psu_data[fid].type;
+ print_str = 1;
+ break;
+ default:
+ error = -EINVAL;
+ goto exit;
+ }
+
+ mutex_unlock(&data->update_lock);
+ if (print_str) {
+ return sprintf(buf, "%s\n", str);
+ } else {
+ if ( value < 0 ) {
+ error = -EINVAL;
+ goto exit;
+ }
+ return sprintf(buf, "%d\n", value);
+ }
+
+exit:
+ mutex_unlock(&data->update_lock);
+ return error;
+}
+
+static int wistron_wtp_01_02_00_psu_probe(struct platform_device *pdev) {
+ int status = -1;
+
+ /* Register sysfs hooks */
+ status = sysfs_create_group(&pdev->dev.kobj, &wistron_wtp_01_02_00_psu_group);
+ if (status) {
+ goto exit;
+ }
+
+ dev_info(&pdev->dev, "device created\n");
+
+ return 0;
+
+exit:
+ return status;
+}
+
+static int wistron_wtp_01_02_00_psu_remove(struct platform_device *pdev) {
+ sysfs_remove_group(&pdev->dev.kobj, &wistron_wtp_01_02_00_psu_group);
+ return 0;
+}
+
+static int __init wistron_wtp_01_02_00_psu_init(void) {
+ int ret;
+
+ data = kzalloc(sizeof(struct wistron_wtp_01_02_00_psu_data), GFP_KERNEL);
+ if (!data) {
+ ret = -ENOMEM;
+ goto alloc_err;
+ }
+
+ mutex_init(&data->update_lock);
+
+ ret = platform_driver_register(&wistron_wtp_01_02_00_psu_driver);
+ if (ret < 0) {
+ goto dri_reg_err;
+ }
+
+ data->pdev = platform_device_register_simple(DRVNAME, -1, NULL, 0);
+ if (IS_ERR(data->pdev)) {
+ ret = PTR_ERR(data->pdev);
+ goto dev_reg_err;
+ }
+
+ /* Set up IPMI interface */
+ ret = init_ipmi_data(&data->ipmi, 0, &data->pdev->dev);
+ if (ret) goto ipmi_err;
+
+ return 0;
+
+ipmi_err:
+ platform_device_unregister(data->pdev);
+dev_reg_err:
+ platform_driver_unregister(&wistron_wtp_01_02_00_psu_driver);
+dri_reg_err:
+ kfree(data);
+alloc_err:
+ return ret;
+}
+
+static void __exit wistron_wtp_01_02_00_psu_exit(void) {
+ ipmi_destroy_user(data->ipmi.user);
+ platform_device_unregister(data->pdev);
+ platform_driver_unregister(&wistron_wtp_01_02_00_psu_driver);
+ kfree(data);
+}
+
+MODULE_AUTHOR("HarshaF1");
+MODULE_DESCRIPTION("WISTRON WTP-01-02-00 PSU driver");
+MODULE_LICENSE("GPL");
+
+module_init(wistron_wtp_01_02_00_psu_init);
+module_exit(wistron_wtp_01_02_00_psu_exit);
diff --git a/packages/platforms/wistron/x86-64/wtp-01-02-00/modules/builds/x86-64-wistron-wtp-01-02-00-sys.c b/packages/platforms/wistron/x86-64/wtp-01-02-00/modules/builds/x86-64-wistron-wtp-01-02-00-sys.c
new file mode 100644
index 0000000..96408af
--- /dev/null
+++ b/packages/platforms/wistron/x86-64/wtp-01-02-00/modules/builds/x86-64-wistron-wtp-01-02-00-sys.c
@@ -0,0 +1,490 @@
+/*
+ * Based on:
+ * pca954x.c from Kumar Gala
+ * Copyright (C) 2006
+ *
+ * Based on:
+ * pca954x.c from Ken Harrenstien
+ * Copyright (C) 2004 Google, Inc. (Ken Harrenstien)
+ *
+ * Based on:
+ * i2c-virtual_cb.c from Brian Kuschak
+ * and
+ * pca9540.c from Jean Delvare .
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define DRVNAME "wtp_01_02_00_sys"
+#define IPMI_NETFN 0x0A
+#define IPMI_SYSFRU_GET_CMD 0x11
+#define IPMI_TIMEOUT (5 * HZ)
+#define IPMI_READ_MAX_LEN 128
+
+#define EEPROM_NAME "eeprom"
+#define EEPROM_SIZE 256 /* 256 byte eeprom */
+
+#define FPGA_NAME "fpga"
+#define FPGA_SIZE 32 /* 32 byte memory space*/
+
+#define SYS_FPGA_I2C_ADDR 0x30
+
+static void ipmi_msg_handler(struct ipmi_recv_msg *msg, void *user_msg_data);
+static int wistron_wtp_01_02_00_sys_probe(struct platform_device *pdev);
+static int wistron_wtp_01_02_00_sys_remove(struct platform_device *pdev);
+
+struct ipmi_data {
+ struct completion read_complete;
+ struct ipmi_addr address;
+ struct ipmi_user *user;
+ int interface;
+
+ struct kernel_ipmi_msg tx_message;
+ long tx_msgid;
+
+ void *rx_msg_data;
+ unsigned short rx_msg_len;
+ unsigned char rx_result;
+ int rx_recv_type;
+
+ struct ipmi_user_hndl ipmi_hndlrs;
+};
+
+struct wistron_wtp_01_02_00_sys_data {
+ struct platform_device *pdev;
+ struct mutex update_lock;
+ char valid; /* != 0 if registers are valid */
+ unsigned long last_updated; /* In jiffies */
+ unsigned char ipmi_resp[256];
+ struct ipmi_data ipmi;
+ struct bin_attribute eeprom; /* eeprom data */
+ struct i2c_client *fpga_dev;
+};
+
+struct wistron_wtp_01_02_00_sys_data *data = NULL;
+
+static struct platform_driver wistron_wtp_01_02_00_sys_driver = {
+ .probe = wistron_wtp_01_02_00_sys_probe,
+ .remove = wistron_wtp_01_02_00_sys_remove,
+ .driver =
+ {
+ .name = DRVNAME,
+ .owner = THIS_MODULE,
+ },
+};
+
+struct sys_fpga {
+ struct mutex lock;
+ struct i2c_client *client;
+};
+
+/* Functions to talk to the IPMI layer */
+
+/* Initialize IPMI address, message buffers and user data */
+static int init_ipmi_data(struct ipmi_data *ipmi, int iface,
+ struct device *dev) {
+ int err;
+
+ init_completion(&ipmi->read_complete);
+
+ /* Initialize IPMI address */
+ ipmi->address.addr_type = IPMI_SYSTEM_INTERFACE_ADDR_TYPE;
+ ipmi->address.channel = IPMI_BMC_CHANNEL;
+ ipmi->address.data[0] = 0;
+ ipmi->interface = iface;
+
+ /* Initialize message buffers */
+ ipmi->tx_msgid = 0;
+ ipmi->tx_message.netfn = IPMI_NETFN;
+
+ ipmi->ipmi_hndlrs.ipmi_recv_hndl = ipmi_msg_handler;
+
+ /* Create IPMI messaging interface user */
+ err =
+ ipmi_create_user(ipmi->interface, &ipmi->ipmi_hndlrs, ipmi, &ipmi->user);
+ if (err < 0) {
+ dev_err(dev,
+ "Unable to register user with IPMI "
+ "interface %d\n",
+ ipmi->interface);
+ return -EACCES;
+ }
+
+ return 0;
+}
+
+/* Send an IPMI command */
+static int ipmi_send_message(struct ipmi_data *ipmi, unsigned char cmd,
+ unsigned char *tx_data, unsigned short tx_len,
+ unsigned char *rx_data, unsigned short rx_len) {
+ int err;
+
+ ipmi->tx_message.cmd = cmd;
+ ipmi->tx_message.data = tx_data;
+ ipmi->tx_message.data_len = tx_len;
+ ipmi->rx_msg_data = rx_data;
+ ipmi->rx_msg_len = rx_len;
+
+ err = ipmi_validate_addr(&ipmi->address, sizeof(ipmi->address));
+ if (err) goto addr_err;
+
+ ipmi->tx_msgid++;
+ err = ipmi_request_settime(ipmi->user, &ipmi->address, ipmi->tx_msgid,
+ &ipmi->tx_message, ipmi, 0, 0, 0);
+ if (err) goto ipmi_req_err;
+
+ err = wait_for_completion_timeout(&ipmi->read_complete, IPMI_TIMEOUT);
+ if (!err) goto ipmi_timeout_err;
+
+ return 0;
+
+ipmi_timeout_err:
+ err = -ETIMEDOUT;
+ dev_err(&data->pdev->dev, "request_timeout=%x\n", err);
+ return err;
+ipmi_req_err:
+ dev_err(&data->pdev->dev, "request_settime=%x\n", err);
+ return err;
+addr_err:
+ dev_err(&data->pdev->dev, "validate_addr=%x\n", err);
+ return err;
+}
+
+/* Dispatch IPMI messages to callers */
+static void ipmi_msg_handler(struct ipmi_recv_msg *msg, void *user_msg_data) {
+ unsigned short rx_len;
+ struct ipmi_data *ipmi = user_msg_data;
+
+ if (msg->msgid != ipmi->tx_msgid) {
+ dev_err(&data->pdev->dev,
+ "Mismatch between received msgid "
+ "(%02x) and transmitted msgid (%02x)!\n",
+ (int)msg->msgid, (int)ipmi->tx_msgid);
+ ipmi_free_recv_msg(msg);
+ return;
+ }
+
+ ipmi->rx_recv_type = msg->recv_type;
+ if (msg->msg.data_len > 0)
+ ipmi->rx_result = msg->msg.data[0];
+ else
+ ipmi->rx_result = IPMI_UNKNOWN_ERR_COMPLETION_CODE;
+
+ if (msg->msg.data_len > 1) {
+ rx_len = msg->msg.data_len - 1;
+ if (ipmi->rx_msg_len < rx_len) rx_len = ipmi->rx_msg_len;
+ ipmi->rx_msg_len = rx_len;
+ memcpy(ipmi->rx_msg_data, msg->msg.data + 1, ipmi->rx_msg_len);
+ } else
+ ipmi->rx_msg_len = 0;
+
+ ipmi_free_recv_msg(msg);
+ complete(&ipmi->read_complete);
+}
+
+static ssize_t sys_eeprom_read(loff_t off, char *buf, size_t count) {
+ int status = 0;
+ unsigned char ipmi_resp[35] = {0}, ipmi_tx_data[4] = {0};
+
+ if ((off + count) > EEPROM_SIZE) {
+ return -EINVAL;
+ }
+
+ ipmi_resp[0] = '\0';
+ ipmi_tx_data[0] = 0x00; /* FRUid */
+ ipmi_tx_data[1] = (uint8_t)(off & 0xff); /* offset */
+ ipmi_tx_data[2] = (uint8_t)(off >> 8);
+ ipmi_tx_data[3] = 32; /* No of bytes to read*/
+
+ status = ipmi_send_message(&data->ipmi, IPMI_SYSFRU_GET_CMD, &ipmi_tx_data[0],
+ 4, &ipmi_resp[0], sizeof(ipmi_resp));
+
+ if (unlikely(status != 0)) {
+ goto exit;
+ }
+
+ if (unlikely(data->ipmi.rx_result != 0)) {
+ status = -EIO;
+ goto exit;
+ }
+
+ status = ipmi_resp[0];
+ memcpy(buf, &ipmi_resp[1], 32);
+
+exit:
+ return status;
+}
+
+static ssize_t sysfs_bin_read(struct file *filp, struct kobject *kobj,
+ struct bin_attribute *attr, char *buf, loff_t off,
+ size_t count) {
+ ssize_t retval = 0;
+
+ if (unlikely(!count)) {
+ return count;
+ }
+
+ /*
+ * Read data from chip, protecting against concurrent updates
+ * from this host
+ */
+ mutex_lock(&data->update_lock);
+
+ while (count) {
+ ssize_t status;
+ status = sys_eeprom_read(off, buf, count);
+ if (status <= 0) {
+ if (retval == 0) {
+ retval = status;
+ }
+ break;
+ }
+
+ buf += status;
+ off += status;
+ count -= status;
+ retval += status;
+ }
+
+ mutex_unlock(&data->update_lock);
+ return retval;
+}
+
+static int sysfs_eeprom_init(struct kobject *kobj,
+ struct bin_attribute *eeprom) {
+ sysfs_bin_attr_init(eeprom);
+ eeprom->attr.name = EEPROM_NAME;
+ eeprom->attr.mode = S_IRUGO;
+ eeprom->read = sysfs_bin_read;
+ eeprom->write = NULL;
+ eeprom->size = EEPROM_SIZE;
+
+ /* Create eeprom file */
+ return sysfs_create_bin_file(kobj, eeprom);
+}
+
+static int sysfs_eeprom_cleanup(struct kobject *kobj,
+ struct bin_attribute *eeprom) {
+ sysfs_remove_bin_file(kobj, eeprom);
+ return 0;
+}
+
+static int wistron_wtp_01_02_00_sys_probe(struct platform_device *pdev) {
+ int status = -1;
+
+ /* Register sysfs hooks */
+ status = sysfs_eeprom_init(&pdev->dev.kobj, &data->eeprom);
+ if (status) {
+ goto exit;
+ }
+
+ dev_info(&pdev->dev, "device created\n");
+
+ return 0;
+
+exit:
+ return status;
+}
+
+static int wistron_wtp_01_02_00_sys_remove(struct platform_device *pdev) {
+ sysfs_eeprom_cleanup(&pdev->dev.kobj, &data->eeprom);
+
+ return 0;
+}
+
+static ssize_t show_piu_reset(int index, struct device *dev, struct device_attribute *attr, char *buf) {
+ int v;
+ mutex_lock(&data->update_lock);
+ v = i2c_smbus_read_byte_data(data->fpga_dev, 0x0e);
+ mutex_unlock(&data->update_lock);
+ return scnprintf(buf, PAGE_SIZE, "%d\n", (v & (1 << (index + 3))) > 0);
+}
+
+static ssize_t store_piu_reset(int index, struct device *dev, struct device_attribute *attr, const char *buf, size_t count) {
+ long value;
+
+ if (kstrtoul(buf, 0, &value))
+ return -EINVAL;
+
+ /*
+ * Read data from chip, protecting against concurrent updates
+ * from this host
+ */
+ mutex_lock(&data->update_lock);
+
+ if ( value > 0 ) {
+ int v = i2c_smbus_read_byte_data(data->fpga_dev, 0x0e);
+ v |= (1 << (index + 3));
+ i2c_smbus_write_byte_data(data->fpga_dev, 0x0e, v);
+ }
+
+ mutex_unlock(&data->update_lock);
+ return count;
+}
+
+static ssize_t show_piu1_reset(struct device *dev, struct device_attribute *attr, char *buf) { return show_piu_reset(1, dev, attr, buf); }
+static ssize_t show_piu2_reset(struct device *dev, struct device_attribute *attr, char *buf) { return show_piu_reset(2, dev, attr, buf); }
+static ssize_t show_piu3_reset(struct device *dev, struct device_attribute *attr, char *buf) { return show_piu_reset(3, dev, attr, buf); }
+static ssize_t show_piu4_reset(struct device *dev, struct device_attribute *attr, char *buf) { return show_piu_reset(4, dev, attr, buf); }
+
+static ssize_t store_piu1_reset(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) { return store_piu_reset(1, dev, attr, buf, count); }
+static ssize_t store_piu2_reset(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) { return store_piu_reset(2, dev, attr, buf, count); }
+static ssize_t store_piu3_reset(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) { return store_piu_reset(3, dev, attr, buf, count); }
+static ssize_t store_piu4_reset(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) { return store_piu_reset(4, dev, attr, buf, count); }
+
+static DEVICE_ATTR(piu1_reset, S_IRUGO|S_IWUSR|S_IWGRP, show_piu1_reset, store_piu1_reset);
+static DEVICE_ATTR(piu2_reset, S_IRUGO|S_IWUSR|S_IWGRP, show_piu2_reset, store_piu2_reset);
+static DEVICE_ATTR(piu3_reset, S_IRUGO|S_IWUSR|S_IWGRP, show_piu3_reset, store_piu3_reset);
+static DEVICE_ATTR(piu4_reset, S_IRUGO|S_IWUSR|S_IWGRP, show_piu4_reset, store_piu4_reset);
+
+static struct attribute *fpga_attrs[] = {
+ &dev_attr_piu1_reset.attr,
+ &dev_attr_piu2_reset.attr,
+ &dev_attr_piu3_reset.attr,
+ &dev_attr_piu4_reset.attr,
+ NULL
+};
+
+static ssize_t fpga_read(struct file *filp, struct kobject *kobj,
+ struct bin_attribute *attr, char *buf, loff_t off,
+ size_t count) {
+ ssize_t retval = 0;
+ int i;
+
+ if (unlikely(!count)) {
+ return count;
+ }
+
+ /*
+ * Read data from chip, protecting against concurrent updates
+ * from this host
+ */
+ mutex_lock(&data->update_lock);
+
+ for(i = 0; i < FPGA_SIZE && count; i++) {
+ buf[i] = i2c_smbus_read_byte_data(data->fpga_dev, i);
+ count--;
+ off++;
+ retval++;
+ }
+
+ mutex_unlock(&data->update_lock);
+ return retval;
+}
+
+static BIN_ATTR_RO(fpga, FPGA_SIZE);
+
+static struct bin_attribute *fpga_bin_attrs[] = {
+ &bin_attr_fpga,
+ NULL
+};
+
+static struct attribute_group fpga_group = {
+ .attrs = fpga_attrs,
+ .bin_attrs = fpga_bin_attrs,
+};
+
+static int wtp_01_02_00_sys_fpga_device_probe(struct i2c_client *client, const struct i2c_device_id *dev_id) {
+ int ret = 0;
+ if (client->addr != SYS_FPGA_I2C_ADDR) {
+ return -ENODEV;
+ }
+
+ ret = sysfs_create_group(&client->dev.kobj, &fpga_group);
+ if (ret) return ret;
+ data->fpga_dev = client;
+ return 0;
+}
+
+static int wtp_01_02_00_sys_fpga_device_remove(struct i2c_client *client) {
+ sysfs_remove_group(&client->dev.kobj, &fpga_group);
+ return 0;
+}
+
+static const struct i2c_device_id wtp_01_02_00_sys_fpga_device_id[] = {
+ { "sys_fpga", 0, },
+ { /* end of list */ },
+};
+
+static struct i2c_driver wtp_01_02_00_sys_fpga_driver = {
+ .driver = {
+ .name = "wtp_01_02_00_sys_fpga",
+ },
+ .probe = wtp_01_02_00_sys_fpga_device_probe,
+ .remove = wtp_01_02_00_sys_fpga_device_remove,
+ .id_table = wtp_01_02_00_sys_fpga_device_id,
+};
+
+static int __init wistron_wtp_01_02_00_sys_init(void) {
+ int ret;
+
+ data = kzalloc(sizeof(struct wistron_wtp_01_02_00_sys_data), GFP_KERNEL);
+ if (!data) {
+ ret = -ENOMEM;
+ goto alloc_err;
+ }
+
+ mutex_init(&data->update_lock);
+ data->valid = 0;
+
+ ret = platform_driver_register(&wistron_wtp_01_02_00_sys_driver);
+ if (ret < 0) {
+ goto dri_reg_err;
+ }
+
+ data->pdev = platform_device_register_simple(DRVNAME, -1, NULL, 0);
+ if (IS_ERR(data->pdev)) {
+ ret = PTR_ERR(data->pdev);
+ goto dev_reg_err;
+ }
+
+ /* Set up IPMI interface */
+ ret = init_ipmi_data(&data->ipmi, 0, &data->pdev->dev);
+ if (ret) goto ipmi_err;
+
+ ret = i2c_add_driver(&wtp_01_02_00_sys_fpga_driver);
+ if (ret) goto i2c_err;
+
+ return 0;
+
+i2c_err:
+ ipmi_destroy_user(data->ipmi.user);
+ipmi_err:
+ platform_device_unregister(data->pdev);
+dev_reg_err:
+ platform_driver_unregister(&wistron_wtp_01_02_00_sys_driver);
+dri_reg_err:
+ kfree(data);
+alloc_err:
+ return ret;
+}
+
+static void __exit wistron_wtp_01_02_00_sys_exit(void) {
+ i2c_del_driver(&wtp_01_02_00_sys_fpga_driver);
+ ipmi_destroy_user(data->ipmi.user);
+ platform_device_unregister(data->pdev);
+ platform_driver_unregister(&wistron_wtp_01_02_00_sys_driver);
+ kfree(data);
+}
+
+MODULE_AUTHOR("HarshaF1");
+MODULE_DESCRIPTION("WISTRON-WTP_01_02_00 SYS driver");
+MODULE_LICENSE("GPL");
+
+module_init(wistron_wtp_01_02_00_sys_init);
+module_exit(wistron_wtp_01_02_00_sys_exit);
diff --git a/packages/platforms/wistron/x86-64/wtp-01-02-00/modules/builds/x86-64-wistron-wtp-01-02-00-thermal.c b/packages/platforms/wistron/x86-64/wtp-01-02-00/modules/builds/x86-64-wistron-wtp-01-02-00-thermal.c
new file mode 100644
index 0000000..e636333
--- /dev/null
+++ b/packages/platforms/wistron/x86-64/wtp-01-02-00/modules/builds/x86-64-wistron-wtp-01-02-00-thermal.c
@@ -0,0 +1,602 @@
+/*
+ * Based on:
+ * pca954x.c from Kumar Gala
+ * Copyright (C) 2006
+ *
+ * Based on:
+ * pca954x.c from Ken Harrenstien
+ * Copyright (C) 2004 Google, Inc. (Ken Harrenstien)
+ *
+ * Based on:
+ * i2c-virtual_cb.c from Brian Kuschak
+ * and
+ * pca9540.c from Jean Delvare .
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include