mirror of
https://github.com/optim-enterprises-bv/openwrt-ipq.git
synced 2025-10-29 17:33:01 +00:00
Revert "ath11k_nss: Revert patch for 512M + 2KB RX header"
This reverts commit 08db8048d06b9a3e45bbcb7ab49463a21c769dc7.
This commit is contained in:
@@ -1,981 +0,0 @@
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reverted:
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--- a/drivers/net/wireless/ath/ath11k/debugfs.c
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+++ b/drivers/net/wireless/ath/ath11k/debugfs.c
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@@ -669,7 +669,6 @@ static ssize_t ath11k_write_extd_rx_stat
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}
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ar->debug.rx_filter = tlv_filter.rx_filter;
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- tlv_filter.offset_valid = false;
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for (i = 0; i < ab->hw_params.num_rxdma_per_pdev; i++) {
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ring_id = ar->dp.rx_mon_status_refill_ring[i].refill_buf_ring.ring_id;
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@@ -1230,7 +1229,6 @@ static ssize_t ath11k_write_pktlog_filte
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}
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/* Clear rx filter set for monitor mode and rx status */
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- tlv_filter.offset_valid = false;
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for (i = 0; i < ab->hw_params.num_rxdma_per_pdev; i++) {
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ring_id = ar->dp.rx_mon_status_refill_ring[i].refill_buf_ring.ring_id;
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ret = ath11k_dp_tx_htt_rx_filter_setup(ar->ab, ring_id, ar->dp.mac_id,
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--- a/drivers/net/wireless/ath/ath11k/dp.h
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+++ b/drivers/net/wireless/ath/ath11k/dp.h
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@@ -237,8 +237,7 @@ struct ath11k_pdev_dp {
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#define DP_REO_CMD_RING_SIZE 256
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#define DP_REO_STATUS_RING_SIZE 2048
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#define DP_RXDMA_BUF_RING_SIZE 4096
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-#define DP_RXDMA_REFILL_RING_SIZE ATH11K_DP_RXDMA_REFILL_RING_SIZE
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-#define DP_RXDMA_NSS_REFILL_RING_SIZE ATH11K_DP_RXDMA_NSS_REFILL_RING_SIZE
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+#define DP_RXDMA_REFILL_RING_SIZE 2048
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#define DP_RXDMA_ERR_DST_RING_SIZE 1024
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#define DP_RXDMA_MON_STATUS_RING_SIZE ATH11K_DP_RXDMA_MON_STATUS_RING_SIZE
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#define DP_RXDMA_MONITOR_BUF_RING_SIZE ATH11K_DP_RXDMA_MONITOR_BUF_RING_SIZE
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@@ -673,7 +672,7 @@ enum htt_stats_internal_ppdu_frametype {
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*
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* |31 26|25|24|23 16|15 8|7 0|
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* |-----------------+----------------+----------------+---------------|
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- * | rsvd1|OV|PS|SS| ring_id | pdev_id | msg_type |
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+ * | rsvd1 |PS|SS| ring_id | pdev_id | msg_type |
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* |-------------------------------------------------------------------|
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* | rsvd2 | ring_buffer_size |
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* |-------------------------------------------------------------------|
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@@ -687,14 +686,6 @@ enum htt_stats_internal_ppdu_frametype {
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* |-------------------------------------------------------------------|
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* | tlv_filter_in_flags |
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* |-------------------------------------------------------------------|
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- * | rx_header_offset | rx_packet_offset |
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- * |-------------------------------------------------------------------|
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- * | rx_mpdu_start_offset | rx_mpdu_end_offset |
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- * |-------------------------------------------------------------------|
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- * | rx_msdu_start_offset | rx_msdu_end_offset |
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- * |-------------------------------------------------------------------|
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- * | rsvd3 | rx_attention_offset |
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- * |-------------------------------------------------------------------|
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* Where:
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* PS = pkt_swap
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* SS = status_swap
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@@ -708,10 +699,7 @@ enum htt_stats_internal_ppdu_frametype {
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* More details can be got from enum htt_srng_ring_id
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* b'24 - status_swap: 1 is to swap status TLV
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* b'25 - pkt_swap: 1 is to swap packet TLV
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- * b'26 - rx_offset_valid (OV): flag to indicate rx offsets
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- * configuration fields are valid
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- *
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- * b'27:31 - rsvd1: reserved for future use
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+ * b'26:31 - rsvd1: reserved for future use
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* dword1 - b'0:16 - ring_buffer_size: size of buffers referenced by rx ring,
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* in byte units.
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* Valid only for HW_TO_SW_RING and SW_TO_HW_RING
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@@ -740,42 +728,6 @@ enum htt_stats_internal_ppdu_frametype {
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* dword6 - b'0:31 - tlv_filter_in_flags:
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* Filter in Attention/MPDU/PPDU/Header/User tlvs
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* Refer to CFG_TLV_FILTER_IN_FLAG defs
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- * dword7 - b'0:15 - rx_packet_offset: rx_packet_offset in byte units
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- * Valid only for HW_TO_SW_RING and SW_TO_HW_RING
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- * A value of 0 will be considered as ignore this config.
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- * Refer to BUF_RING_CFG_1 defs within HW .h files,
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- * e.g. wmac_top_reg_seq_hwioreg.h
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- * - b'16:31 - rx_header_offset: rx_header_offset in byte units
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- * Valid only for HW_TO_SW_RING and SW_TO_HW_RING
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- * A value of 0 will be considered as ignore this config.
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- * Refer to BUF_RING_CFG_1 defs within HW .h files,
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- * e.g. wmac_top_reg_seq_hwioreg.h
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- * dword8 - b'0:15 - rx_mpdu_end_offset: rx_mpdu_end_offset in byte units
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- * Valid only for HW_TO_SW_RING and SW_TO_HW_RING
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- * A value of 0 will be considered as ignore this config.
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- * Refer to BUF_RING_CFG_2 defs within HW .h files,
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- * e.g. wmac_top_reg_seq_hwioreg.h
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- * - b'16:31 - rx_mpdu_start_offset: rx_mpdu_start_offset in byte units
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- * Valid only for HW_TO_SW_RING and SW_TO_HW_RING
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- * A value of 0 will be considered as ignore this config.
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- * Refer to BUF_RING_CFG_2 defs within HW .h files,
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- * e.g. wmac_top_reg_seq_hwioreg.h
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- * dword9 - b'0:15 - rx_msdu_end_offset: rx_msdu_end_offset in byte units
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- * Valid only for HW_TO_SW_RING and SW_TO_HW_RING
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- * A value of 0 will be considered as ignore this config.
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- * Refer to BUF_RING_CFG_3 defs within HW .h files,
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- * e.g. wmac_top_reg_seq_hwioreg.h
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- * - b'16:31 - rx_msdu_start_offset: rx_msdu_start_offset in byte units
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- * Valid only for HW_TO_SW_RING and SW_TO_HW_RING
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- * A value of 0 will be considered as ignore this config.
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- * Refer to BUF_RING_CFG_3 defs within HW .h files,
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- * e.g. wmac_top_reg_seq_hwioreg.h
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- * dword10- b'0:15 - rx_attention_offset: rx_attention_offset in byte units
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- * Valid only for HW_TO_SW_RING and SW_TO_HW_RING
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- * A value of 0 will be considered as ignore this config.
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- * Refer to BUF_RING_CFG_4 defs within HW .h files,
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- * e.g. wmac_top_reg_seq_hwioreg.h
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- * - b'16:31 - rsvd3 for future use
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*/
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#define HTT_RX_RING_SELECTION_CFG_CMD_INFO0_MSG_TYPE GENMASK(7, 0)
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@@ -783,16 +735,8 @@ enum htt_stats_internal_ppdu_frametype {
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#define HTT_RX_RING_SELECTION_CFG_CMD_INFO0_RING_ID GENMASK(23, 16)
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#define HTT_RX_RING_SELECTION_CFG_CMD_INFO0_SS BIT(24)
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#define HTT_RX_RING_SELECTION_CFG_CMD_INFO0_PS BIT(25)
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-#define HTT_RX_RING_SELECTION_CFG_CMD_OFFSET_VALID BIT(26)
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#define HTT_RX_RING_SELECTION_CFG_CMD_INFO1_BUF_SIZE GENMASK(15, 0)
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-#define HTT_RX_RING_SELECTION_CFG_RX_PACKET_OFFSET GENMASK(15, 0)
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-#define HTT_RX_RING_SELECTION_CFG_RX_HEADER_OFFSET GENMASK(31, 16)
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-#define HTT_RX_RING_SELECTION_CFG_RX_MPDU_END_OFFSET GENMASK(15, 0)
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-#define HTT_RX_RING_SELECTION_CFG_RX_MPDU_START_OFFSET GENMASK(31, 16)
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-#define HTT_RX_RING_SELECTION_CFG_RX_MSDU_END_OFFSET GENMASK(15, 0)
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-#define HTT_RX_RING_SELECTION_CFG_RX_MSDU_START_OFFSET GENMASK(31, 16)
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-#define HTT_RX_RING_SELECTION_CFG_RX_ATTENTION_OFFSET GENMASK(15, 0)
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enum htt_rx_filter_tlv_flags {
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HTT_RX_FILTER_TLV_FLAGS_MPDU_START = BIT(0),
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@@ -1096,14 +1040,6 @@ enum htt_rx_data_pkt_filter_tlv_flasg3 {
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HTT_RX_FILTER_TLV_FLAGS_PER_MSDU_HEADER | \
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HTT_RX_FILTER_TLV_FLAGS_ATTENTION)
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-#define HTT_RX_RXDMA_FILTER_TLV_FLAGS_BUF_RING \
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- (HTT_RX_FILTER_TLV_FLAGS_MPDU_START | \
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- HTT_RX_FILTER_TLV_FLAGS_MSDU_START | \
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- HTT_RX_FILTER_TLV_FLAGS_RX_PACKET | \
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- HTT_RX_FILTER_TLV_FLAGS_MSDU_END | \
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- HTT_RX_FILTER_TLV_FLAGS_MPDU_END | \
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- HTT_RX_FILTER_TLV_FLAGS_ATTENTION)
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-
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struct htt_rx_ring_selection_cfg_cmd {
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u32 info0;
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u32 info1;
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@@ -1112,10 +1048,6 @@ struct htt_rx_ring_selection_cfg_cmd {
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u32 pkt_type_en_flags2;
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u32 pkt_type_en_flags3;
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u32 rx_filter_tlv;
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- u32 rx_packet_offset;
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- u32 rx_mpdu_offset;
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- u32 rx_msdu_offset;
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- u32 rx_attn_offset;
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} __packed;
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struct htt_rx_ring_tlv_filter {
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@@ -1124,14 +1056,6 @@ struct htt_rx_ring_tlv_filter {
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u32 pkt_filter_flags1; /* MGMT */
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u32 pkt_filter_flags2; /* CTRL */
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u32 pkt_filter_flags3; /* DATA */
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- bool offset_valid;
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- u16 rx_packet_offset;
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- u16 rx_header_offset;
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- u16 rx_mpdu_end_offset;
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- u16 rx_mpdu_start_offset;
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- u16 rx_msdu_end_offset;
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- u16 rx_msdu_start_offset;
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- u16 rx_attn_offset;
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};
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#define HTT_RX_FULL_MON_MODE_CFG_CMD_INFO0_MSG_TYPE GENMASK(7, 0)
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--- a/drivers/net/wireless/ath/ath11k/dp_rx.c
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+++ b/drivers/net/wireless/ath/ath11k/dp_rx.c
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@@ -74,12 +74,6 @@ static inline bool ath11k_dp_rx_h_mpdu_s
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return ab->hw_params.hw_ops->rx_desc_get_mpdu_fc_valid(desc);
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}
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-static u16 ath11k_dp_rxdesc_get_mpdu_frame_ctrl(struct ath11k_base *ab,
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- struct hal_rx_desc *desc)
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-{
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- return ab->hw_params.hw_ops->rx_desc_get_mpdu_frame_ctl(desc);
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-}
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-
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static inline bool ath11k_dp_rx_h_mpdu_start_more_frags(struct ath11k_base *ab,
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struct sk_buff *skb)
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{
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@@ -316,35 +310,6 @@ static u8 *ath11k_dp_rxdesc_mpdu_start_a
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return ab->hw_params.hw_ops->rx_desc_mpdu_start_addr2(desc);
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}
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-#ifdef CPTCFG_ATH11K_MEM_PROFILE_512M
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-static void ath11k_dp_get_rx_header_offset(struct ath11k_base *ab,
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- struct htt_rx_ring_tlv_filter *tlv_filter)
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-{
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- ab->hw_params.hw_ops->rx_desc_get_offset(tlv_filter);
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-}
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-#endif
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-
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-static bool ath11k_dp_rx_desc_dot11_hdr_fields_valid(struct ath11k_base *ab,
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- struct hal_rx_desc *desc)
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-{
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- return ab->hw_params.hw_ops->rx_desc_dot11_hdr_fields_valid(desc);
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-}
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-
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-static void ath11k_dp_rx_desc_get_dot11_hdr(struct ath11k_base *ab,
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- struct hal_rx_desc *desc,
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- struct ieee80211_hdr *hdr)
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-{
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- ab->hw_params.hw_ops->rx_desc_get_dot11_hdr(desc, hdr);
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-}
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-
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-static void ath11k_dp_rx_desc_get_crypto_header(struct ath11k_base *ab,
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- struct hal_rx_desc *desc,
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- u8 *crypto_hdr,
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- enum hal_encrypt_type enctype)
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-{
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- ab->hw_params.hw_ops->rx_desc_get_crypto_header(desc, crypto_hdr, enctype);
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-}
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-
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static void ath11k_dp_service_mon_ring(struct timer_list *t)
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{
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struct ath11k_base *ab = from_timer(ab, t, mon_reap_timer);
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@@ -2459,60 +2424,6 @@ int ath11k_dp_rx_crypto_icv_len(struct a
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return 0;
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}
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-static void ath11k_get_dot11_hdr_from_rx_desc(struct ath11k *ar,
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- struct sk_buff *msdu,
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- struct ath11k_skb_rxcb *rxcb,
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- struct ieee80211_rx_status *status,
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- enum hal_encrypt_type enctype)
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-{
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- struct hal_rx_desc *rx_desc = rxcb->rx_desc;
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- struct ath11k_base *ab = ar->ab;
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- size_t hdr_len, crypto_len;
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- struct ieee80211_hdr *hdr;
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- u16 fc, qos_ctl = 0;
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- int expand_by;
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- u8 *crypto_hdr;
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-
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- if (!(status->flag & RX_FLAG_IV_STRIPPED)) {
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- crypto_len = ath11k_dp_rx_crypto_param_len(ar, enctype);
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- if (skb_headroom(msdu) < crypto_len) {
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- expand_by = crypto_len - skb_headroom(msdu);
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- if (WARN_ON_ONCE(pskb_expand_head(msdu, expand_by, 0, GFP_ATOMIC)))
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- return;
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- }
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- crypto_hdr = skb_push(msdu, crypto_len);
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- ath11k_dp_rx_desc_get_crypto_header(ab, rx_desc, crypto_hdr, enctype);
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- }
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-
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- fc = ath11k_dp_rxdesc_get_mpdu_frame_ctrl(ab, rx_desc);
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- hdr_len = ieee80211_hdrlen(fc);
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- if (skb_headroom(msdu) < hdr_len) {
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- expand_by = hdr_len - skb_headroom(msdu);
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- if (WARN_ON_ONCE(pskb_expand_head(msdu, expand_by, 0, GFP_ATOMIC)))
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- return;
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- }
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- skb_push(msdu, hdr_len);
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- hdr = (struct ieee80211_hdr *)msdu->data;
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- hdr->frame_control = fc;
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-
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- /* Get wifi header from rx_desc */
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- ath11k_dp_rx_desc_get_dot11_hdr(ab, rx_desc, hdr);
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-
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- if (rxcb->is_mcbc)
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- status->flag &= ~RX_FLAG_PN_VALIDATED;
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-
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- /* Add QOS header */
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- if (ieee80211_is_data_qos(hdr->frame_control)) {
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- qos_ctl = rxcb->tid;
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- if (ath11k_dp_rx_h_msdu_start_mesh_ctl_present(ab, rx_desc))
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- qos_ctl |= IEEE80211_QOS_CTL_MESH_CONTROL_PRESENT;
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-
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- /* TODO Add other QoS ctl fields when required */
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- memcpy(msdu->data + (hdr_len - IEEE80211_QOS_CTL_LEN),
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- &qos_ctl, IEEE80211_QOS_CTL_LEN);
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- }
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-}
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-
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static void ath11k_dp_rx_h_undecap_nwifi(struct ath11k *ar,
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struct sk_buff *msdu,
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u8 *first_hdr,
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@@ -2527,8 +2438,7 @@ static void ath11k_dp_rx_h_undecap_nwifi
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u8 sa[ETH_ALEN];
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u16 qos_ctl = 0;
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int expand_by = 0;
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- u8 *qos, *crypto_hdr;
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- bool add_qos_ctrl = false;
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+ u8 *qos;
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/* copy SA & DA and pull decapped header */
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hdr = (struct ieee80211_hdr *)msdu->data;
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@@ -2537,7 +2447,7 @@ static void ath11k_dp_rx_h_undecap_nwifi
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ether_addr_copy(sa, ieee80211_get_SA(hdr));
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skb_pull(msdu, ieee80211_hdrlen(hdr->frame_control));
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- if (rxcb->is_first_msdu && first_hdr) {
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+ if (rxcb->is_first_msdu) {
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/* original 802.11 header is valid for the first msdu
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* hence we can reuse the same header
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*/
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@@ -2567,7 +2477,6 @@ static void ath11k_dp_rx_h_undecap_nwifi
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/* copy decap header before overwriting for reuse below */
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memcpy(decap_hdr, (uint8_t *)hdr, hdr_len);
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- add_qos_ctrl = true;
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}
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if (!(status->flag & RX_FLAG_IV_STRIPPED)) {
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@@ -2578,17 +2487,13 @@ static void ath11k_dp_rx_h_undecap_nwifi
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if (WARN_ON_ONCE(pskb_expand_head(msdu, expand_by, 0, GFP_ATOMIC)))
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return;
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}
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- if (first_hdr) {
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- memcpy(skb_push(msdu, crypto_param_len),
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- (void *)hdr + hdr_len, crypto_param_len);
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- } else {
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- crypto_hdr = skb_push(msdu, crypto_param_len);
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- ath11k_dp_rx_desc_get_crypto_header(ar->ab,
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- rxcb->rx_desc, crypto_hdr, enctype);
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- }
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+ memcpy(skb_push(msdu,
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+ ath11k_dp_rx_crypto_param_len(ar, enctype)),
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+ (void *)hdr + hdr_len,
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+ ath11k_dp_rx_crypto_param_len(ar, enctype));
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}
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- if (!rxcb->is_first_msdu || add_qos_ctrl) {
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+ if (!rxcb->is_first_msdu) {
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if (skb_headroom(msdu) < IEEE80211_QOS_CTL_LEN) {
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expand_by = IEEE80211_QOS_CTL_LEN - skb_headroom(msdu);
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if (WARN_ON_ONCE(pskb_expand_head(msdu, expand_by, 0, GFP_ATOMIC)))
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@@ -2720,25 +2625,6 @@ static void ath11k_dp_rx_h_undecap_eth(s
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u8 sa[ETH_ALEN];
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void *rfc1042;
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int expand_by;
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- struct ath11k_skb_rxcb *rxcb = ATH11K_SKB_RXCB(msdu);
|
||||
- struct ath11k_dp_rfc1042_hdr rfc = {0xaa, 0xaa, 0x03, {0x00, 0x00, 0x00}};
|
||||
-
|
||||
- if (!first_hdr) {
|
||||
- eth = (struct ethhdr *)msdu->data;
|
||||
- ether_addr_copy(da, eth->h_dest);
|
||||
- ether_addr_copy(sa, eth->h_source);
|
||||
- rfc.snap_type = eth->h_proto;
|
||||
- skb_pull(msdu, sizeof(struct ethhdr));
|
||||
- if (skb_headroom(msdu) < sizeof(struct ath11k_dp_rfc1042_hdr)) {
|
||||
- expand_by = sizeof(struct ath11k_dp_rfc1042_hdr) - skb_headroom(msdu);
|
||||
- if (WARN_ON_ONCE(pskb_expand_head(msdu, expand_by, 0, GFP_ATOMIC)))
|
||||
- return;
|
||||
- }
|
||||
- memcpy(skb_push(msdu, sizeof(struct ath11k_dp_rfc1042_hdr)), &rfc,
|
||||
- sizeof(struct ath11k_dp_rfc1042_hdr));
|
||||
- ath11k_get_dot11_hdr_from_rx_desc(ar, msdu, rxcb, status, enctype);
|
||||
- goto exit;
|
||||
- }
|
||||
|
||||
rfc1042 = ath11k_dp_rx_h_find_rfc1042(ar, msdu, enctype);
|
||||
if (WARN_ON_ONCE(!rfc1042))
|
||||
@@ -2782,7 +2668,6 @@ static void ath11k_dp_rx_h_undecap_eth(s
|
||||
}
|
||||
memcpy(skb_push(msdu, hdr_len), hdr, hdr_len);
|
||||
|
||||
-exit:
|
||||
/* original 802.11 header has a different DA and in
|
||||
* case of 4addr it may also have different SA
|
||||
*/
|
||||
@@ -2802,7 +2687,6 @@ static void ath11k_dp_rx_h_undecap_snap(
|
||||
u8 l3_pad_bytes;
|
||||
int expand_by;
|
||||
struct hal_rx_desc *rx_desc;
|
||||
- struct ath11k_skb_rxcb *rxcb = ATH11K_SKB_RXCB(msdu);
|
||||
|
||||
/* Delivered decapped frame:
|
||||
* [amsdu header] <-- replaced with 802.11 hdr
|
||||
@@ -2816,11 +2700,6 @@ static void ath11k_dp_rx_h_undecap_snap(
|
||||
skb_put(msdu, l3_pad_bytes);
|
||||
skb_pull(msdu, sizeof(struct ath11k_dp_amsdu_subframe_hdr) + l3_pad_bytes);
|
||||
|
||||
- if (!first_hdr) {
|
||||
- ath11k_get_dot11_hdr_from_rx_desc(ar, msdu, rxcb, status, enctype);
|
||||
- return;
|
||||
- }
|
||||
-
|
||||
hdr = (struct ieee80211_hdr *)first_hdr;
|
||||
hdr_len = ieee80211_hdrlen(hdr->frame_control);
|
||||
|
||||
@@ -3311,20 +3190,6 @@ static int ath11k_dp_rx_process_msdu(str
|
||||
goto free_out;
|
||||
}
|
||||
|
||||
- hdr_status = ath11k_dp_rx_h_80211_hdr(ab, rx_desc);
|
||||
- /* wifi hdr fields validation for 512M::
|
||||
- * Mcast packets in ethernet frame mode
|
||||
- * will need wifi hdr in msdu to validate PN.
|
||||
- * Header will be added in undecap routine.
|
||||
- * Validation on wifi hdr fields from rx_desc.
|
||||
- */
|
||||
- if (!hdr_status && ath11k_dp_rx_h_attn_is_mcbc(ab, rx_desc) &&
|
||||
- !ath11k_dp_rx_desc_dot11_hdr_fields_valid(ab, rx_desc)) {
|
||||
- ath11k_warn(ab, "One or more invalid dot11 header fields\n");
|
||||
- ret = -EIO;
|
||||
- goto free_out;
|
||||
- }
|
||||
-
|
||||
rxcb = ATH11K_SKB_RXCB(msdu);
|
||||
rxcb->rx_desc = rx_desc;
|
||||
msdu_len = ath11k_dp_rx_h_msdu_start_msdu_len(ab, rx_desc);
|
||||
@@ -3337,9 +3202,8 @@ static int ath11k_dp_rx_process_msdu(str
|
||||
hdr_status = ath11k_dp_rx_h_80211_hdr(ab, rx_desc);
|
||||
ret = -EINVAL;
|
||||
ath11k_warn(ab, "invalid msdu len %u\n", msdu_len);
|
||||
- if (hdr_status)
|
||||
- ath11k_dbg_dump(ab, ATH11K_DBG_DATA, NULL, "", hdr_status,
|
||||
- sizeof(struct ieee80211_hdr));
|
||||
+ ath11k_dbg_dump(ab, ATH11K_DBG_DATA, NULL, "", hdr_status,
|
||||
+ sizeof(struct ieee80211_hdr));
|
||||
ath11k_dbg_dump(ab, ATH11K_DBG_DATA, NULL, "", rx_desc,
|
||||
sizeof(struct hal_rx_desc));
|
||||
goto free_out;
|
||||
@@ -4308,7 +4172,6 @@ static int ath11k_dp_rx_h_verify_tkip_mi
|
||||
|
||||
hdr = (struct ieee80211_hdr *)(msdu->data + hal_rx_desc_sz);
|
||||
hdr_len = ieee80211_hdrlen(hdr->frame_control);
|
||||
-
|
||||
head_len = hdr_len + hal_rx_desc_sz + IEEE80211_TKIP_IV_LEN;
|
||||
tail_len = IEEE80211_CCMP_MIC_LEN + IEEE80211_TKIP_ICV_LEN + FCS_LEN;
|
||||
|
||||
@@ -4589,8 +4452,8 @@ static void ath11k_dp_rx_h_sort_frags(st
|
||||
|
||||
static u64 ath11k_dp_rx_h_get_pn(struct ath11k *ar, struct sk_buff *skb)
|
||||
{
|
||||
- u64 pn = 0;
|
||||
struct ieee80211_hdr *hdr;
|
||||
+ u64 pn = 0;
|
||||
u8 *ehdr;
|
||||
u32 hal_rx_desc_sz = ar->ab->hw_params.hal_desc_sz;
|
||||
|
||||
@@ -4817,9 +4680,8 @@ ath11k_dp_process_rx_err_buf(struct ath1
|
||||
if ((msdu_len + hal_rx_desc_sz) > DP_RX_BUFFER_SIZE) {
|
||||
hdr_status = ath11k_dp_rx_h_80211_hdr(ar->ab, rx_desc);
|
||||
ath11k_warn(ar->ab, "invalid msdu leng %u", msdu_len);
|
||||
- if (hdr_status)
|
||||
- ath11k_dbg_dump(ar->ab, ATH11K_DBG_DATA, NULL, "", hdr_status,
|
||||
- sizeof(struct ieee80211_hdr));
|
||||
+ ath11k_dbg_dump(ar->ab, ATH11K_DBG_DATA, NULL, "", hdr_status,
|
||||
+ sizeof(struct ieee80211_hdr));
|
||||
ath11k_dbg_dump(ar->ab, ATH11K_DBG_DATA, NULL, "", rx_desc,
|
||||
sizeof(struct hal_rx_desc));
|
||||
dev_kfree_skb_any(msdu);
|
||||
@@ -5451,47 +5313,6 @@ void ath11k_dp_rx_pdev_free(struct ath11
|
||||
ath11k_dp_rxdma_pdev_buf_free(ar);
|
||||
}
|
||||
|
||||
-#ifdef CPTCFG_ATH11K_MEM_PROFILE_512M
|
||||
-static int ath11k_dp_rxdma_ring_sel_config(struct ath11k *ar)
|
||||
-{
|
||||
- struct ath11k_pdev_dp *dp = &ar->dp;
|
||||
- struct htt_rx_ring_tlv_filter tlv_filter = {0};
|
||||
- u32 ring_id;
|
||||
- int ret;
|
||||
- u32 hal_rx_desc_sz = ar->ab->hw_params.hal_desc_sz;
|
||||
-
|
||||
- ring_id = dp->rx_refill_buf_ring.refill_buf_ring.ring_id;
|
||||
-
|
||||
- tlv_filter.rx_filter = HTT_RX_RXDMA_FILTER_TLV_FLAGS_BUF_RING;
|
||||
- tlv_filter.pkt_filter_flags2 = HTT_RX_FP_CTRL_PKT_FILTER_TLV_FLAGS2_BAR;
|
||||
- tlv_filter.pkt_filter_flags3 = HTT_RX_FP_DATA_PKT_FILTER_TLV_FLASG3_MCAST |
|
||||
- HTT_RX_FP_DATA_PKT_FILTER_TLV_FLASG3_UCAST;
|
||||
- tlv_filter.offset_valid = true;
|
||||
- tlv_filter.rx_packet_offset = hal_rx_desc_sz;
|
||||
- tlv_filter.rx_header_offset = 0;
|
||||
-
|
||||
- ath11k_dp_get_rx_header_offset(ar->ab, &tlv_filter);
|
||||
-
|
||||
- if (!ar->ab->nss.enabled)
|
||||
- ret = ath11k_dp_tx_htt_rx_filter_setup(ar->ab, ring_id, dp->mac_id,
|
||||
- HAL_RXDMA_BUF,
|
||||
- DP_RXDMA_REFILL_RING_SIZE,
|
||||
- &tlv_filter);
|
||||
- else
|
||||
- ret = ath11k_dp_tx_htt_rx_filter_setup(ar->ab, ring_id, dp->mac_id,
|
||||
- HAL_RXDMA_BUF,
|
||||
- DP_RXDMA_NSS_REFILL_RING_SIZE,
|
||||
- &tlv_filter);
|
||||
-
|
||||
- return ret;
|
||||
-}
|
||||
-#else
|
||||
-static int ath11k_dp_rxdma_ring_sel_config(struct ath11k *ar)
|
||||
-{
|
||||
- return 0;
|
||||
-}
|
||||
-#endif
|
||||
-
|
||||
int ath11k_dp_rx_pdev_alloc(struct ath11k_base *ab, int mac_id)
|
||||
{
|
||||
struct ath11k *ar = ab->pdevs[mac_id].ar;
|
||||
@@ -5585,12 +5406,6 @@ config_refill_ring:
|
||||
}
|
||||
}
|
||||
|
||||
- ret = ath11k_dp_rxdma_ring_sel_config(ar);
|
||||
- if (ret) {
|
||||
- ath11k_warn(ab, "failed to setup rxdma ring selection config\n");
|
||||
- return ret;
|
||||
- }
|
||||
-
|
||||
return 0;
|
||||
}
|
||||
|
||||
--- a/drivers/net/wireless/ath/ath11k/dp_tx.c
|
||||
+++ b/drivers/net/wireless/ath/ath11k/dp_tx.c
|
||||
@@ -1283,8 +1283,6 @@ int ath11k_dp_tx_htt_rx_filter_setup(str
|
||||
!!(params.flags & HAL_SRNG_FLAGS_MSI_SWAP));
|
||||
cmd->info0 |= FIELD_PREP(HTT_RX_RING_SELECTION_CFG_CMD_INFO0_PS,
|
||||
!!(params.flags & HAL_SRNG_FLAGS_DATA_TLV_SWAP));
|
||||
- cmd->info0 |= FIELD_PREP(HTT_RX_RING_SELECTION_CFG_CMD_OFFSET_VALID,
|
||||
- tlv_filter->offset_valid);
|
||||
|
||||
cmd->info1 = FIELD_PREP(HTT_RX_RING_SELECTION_CFG_CMD_INFO1_BUF_SIZE,
|
||||
rx_buf_size);
|
||||
@@ -1294,26 +1292,6 @@ int ath11k_dp_tx_htt_rx_filter_setup(str
|
||||
cmd->pkt_type_en_flags3 = tlv_filter->pkt_filter_flags3;
|
||||
cmd->rx_filter_tlv = tlv_filter->rx_filter;
|
||||
|
||||
- if (tlv_filter->offset_valid) {
|
||||
- cmd->rx_packet_offset = FIELD_PREP(HTT_RX_RING_SELECTION_CFG_RX_PACKET_OFFSET,
|
||||
- tlv_filter->rx_packet_offset);
|
||||
- cmd->rx_packet_offset |= FIELD_PREP(HTT_RX_RING_SELECTION_CFG_RX_HEADER_OFFSET,
|
||||
- tlv_filter->rx_header_offset);
|
||||
-
|
||||
- cmd->rx_mpdu_offset = FIELD_PREP(HTT_RX_RING_SELECTION_CFG_RX_MPDU_END_OFFSET,
|
||||
- tlv_filter->rx_mpdu_end_offset);
|
||||
- cmd->rx_mpdu_offset |= FIELD_PREP(HTT_RX_RING_SELECTION_CFG_RX_MPDU_START_OFFSET,
|
||||
- tlv_filter->rx_mpdu_start_offset);
|
||||
-
|
||||
- cmd->rx_msdu_offset = FIELD_PREP(HTT_RX_RING_SELECTION_CFG_RX_MSDU_END_OFFSET,
|
||||
- tlv_filter->rx_msdu_end_offset);
|
||||
- cmd->rx_msdu_offset |= FIELD_PREP(HTT_RX_RING_SELECTION_CFG_RX_MSDU_START_OFFSET,
|
||||
- tlv_filter->rx_msdu_start_offset);
|
||||
-
|
||||
- cmd->rx_attn_offset = FIELD_PREP(HTT_RX_RING_SELECTION_CFG_RX_ATTENTION_OFFSET,
|
||||
- tlv_filter->rx_attn_offset);
|
||||
- }
|
||||
-
|
||||
ret = ath11k_htc_send(&ab->htc, ab->dp.eid, skb);
|
||||
if (ret)
|
||||
goto err_free;
|
||||
@@ -1392,7 +1370,6 @@ int ath11k_dp_tx_htt_monitor_mode_ring_c
|
||||
}
|
||||
|
||||
ring_id = dp->rxdma_mon_buf_ring.refill_buf_ring.ring_id;
|
||||
- tlv_filter.offset_valid = false;
|
||||
|
||||
if (!reset) {
|
||||
tlv_filter.rx_filter = HTT_RX_MON_FILTER_TLV_FLAGS_MON_BUF_RING;
|
||||
--- a/drivers/net/wireless/ath/ath11k/hw.c
|
||||
+++ b/drivers/net/wireless/ath/ath11k/hw.c
|
||||
@@ -260,11 +260,7 @@ static u8 ath11k_hw_ipq8074_rx_desc_get_
|
||||
|
||||
static u8 *ath11k_hw_ipq8074_rx_desc_get_hdr_status(struct hal_rx_desc *desc)
|
||||
{
|
||||
-#ifndef CPTCFG_ATH11K_MEM_PROFILE_512M
|
||||
return desc->u.ipq8074.hdr_status;
|
||||
-#else
|
||||
- return NULL;
|
||||
-#endif
|
||||
}
|
||||
|
||||
static bool ath11k_hw_ipq8074_rx_desc_encrypt_valid(struct hal_rx_desc *desc)
|
||||
@@ -409,132 +405,26 @@ static void ath11k_hw_ipq8074_rx_desc_se
|
||||
desc->u.ipq8074.msdu_start.info1 = __cpu_to_le32(info);
|
||||
}
|
||||
|
||||
-static
|
||||
-struct rx_attention *ath11k_hw_ipq8074_rx_desc_get_attention(struct hal_rx_desc *desc)
|
||||
-{
|
||||
- return &desc->u.ipq8074.attention;
|
||||
-}
|
||||
-
|
||||
-static u8 *ath11k_hw_ipq8074_rx_desc_get_msdu_payload(struct hal_rx_desc *desc)
|
||||
-{
|
||||
- return &desc->u.ipq8074.msdu_payload[0];
|
||||
-}
|
||||
-
|
||||
-#ifdef CPTCFG_ATH11K_MEM_PROFILE_512M
|
||||
-static void ath11k_hw_ipq8074_rx_desc_get_offset(struct htt_rx_ring_tlv_filter *tlv_filter)
|
||||
-{
|
||||
- tlv_filter->rx_mpdu_end_offset = __le16_to_cpu(offsetof
|
||||
- (struct hal_rx_desc_ipq8074, mpdu_end_tag));
|
||||
- tlv_filter->rx_mpdu_start_offset = __le16_to_cpu(offsetof
|
||||
- (struct hal_rx_desc_ipq8074, mpdu_start_tag));
|
||||
- tlv_filter->rx_msdu_end_offset = __le16_to_cpu(offsetof
|
||||
- (struct hal_rx_desc_ipq8074, msdu_end_tag));
|
||||
- tlv_filter->rx_msdu_start_offset = __le16_to_cpu(offsetof
|
||||
- (struct hal_rx_desc_ipq8074, msdu_start_tag));
|
||||
- tlv_filter->rx_attn_offset = __le16_to_cpu(offsetof
|
||||
- (struct hal_rx_desc_ipq8074, rx_attn_tag));
|
||||
-}
|
||||
-#endif
|
||||
-
|
||||
-static u16 ath11k_hw_ipq8074_rx_desc_get_mpdu_frame_ctl(struct hal_rx_desc *desc)
|
||||
-{
|
||||
- return __le16_to_cpu(desc->u.ipq8074.mpdu_start.frame_ctrl);
|
||||
-}
|
||||
-
|
||||
static bool ath11k_hw_ipq8074_rx_desc_mac_addr2_valid(struct hal_rx_desc *desc)
|
||||
{
|
||||
return __le32_to_cpu(desc->u.ipq8074.mpdu_start.info1) &
|
||||
RX_MPDU_START_INFO1_MAC_ADDR2_VALID;
|
||||
}
|
||||
|
||||
-static u8* ath11k_hw_ipq8074_rx_desc_mpdu_start_addr2(struct hal_rx_desc *desc)
|
||||
+static u8 *ath11k_hw_ipq8074_rx_desc_mpdu_start_addr2(struct hal_rx_desc *desc)
|
||||
{
|
||||
return desc->u.ipq8074.mpdu_start.addr2;
|
||||
}
|
||||
|
||||
-static bool ath11k_hw_ipq8074_rx_desc_dot11_hdr_fields_valid(struct hal_rx_desc *desc)
|
||||
-{
|
||||
- if ((ath11k_hw_ipq8074_rx_desc_get_mpdu_seq_ctl_vld(desc) &&
|
||||
- ath11k_hw_ipq8074_rx_desc_get_mpdu_fc_valid(desc) &&
|
||||
- __le32_to_cpu(desc->u.ipq8074.mpdu_start.info1) &
|
||||
- RX_MPDU_START_INFO1_MAC_ADDR1_VALID &&
|
||||
- ath11k_hw_ipq8074_rx_desc_mac_addr2_valid(desc) &&
|
||||
- __le32_to_cpu(desc->u.ipq8074.mpdu_start.info1) &
|
||||
- RX_MPDU_START_INFO1_MAC_ADDR3_VALID &&
|
||||
- FIELD_GET((RX_MPDU_START_INFO1_MPDU_DUR_VALID),
|
||||
- __le32_to_cpu(desc->u.ipq8074.mpdu_start.info1)))) {
|
||||
- return true;
|
||||
- }
|
||||
- return false;
|
||||
-}
|
||||
-
|
||||
-static void ath11k_hw_ipq8074_rx_desc_get_dot11_hdr(struct hal_rx_desc *desc,
|
||||
- struct ieee80211_hdr *hdr)
|
||||
-{
|
||||
- hdr->frame_control = __le16_to_cpu(desc->u.ipq8074.mpdu_start.frame_ctrl);
|
||||
- hdr->duration_id = __le16_to_cpu(desc->u.ipq8074.mpdu_start.duration);
|
||||
- ether_addr_copy(hdr->addr1, desc->u.ipq8074.mpdu_start.addr1);
|
||||
- ether_addr_copy(hdr->addr2, desc->u.ipq8074.mpdu_start.addr2);
|
||||
- ether_addr_copy(hdr->addr3, desc->u.ipq8074.mpdu_start.addr3);
|
||||
- if (__le32_to_cpu(desc->u.ipq8074.mpdu_start.info1) &
|
||||
- RX_MPDU_START_INFO1_MAC_ADDR4_VALID) {
|
||||
- ether_addr_copy(hdr->addr4, desc->u.ipq8074.mpdu_start.addr4);
|
||||
- }
|
||||
- hdr->seq_ctrl = __le16_to_cpu(desc->u.ipq8074.mpdu_start.seq_ctrl);
|
||||
-}
|
||||
-
|
||||
-static void ath11k_hw_ipq8074_rx_desc_get_crypto_hdr(struct hal_rx_desc *desc,
|
||||
- u8 *crypto_hdr,
|
||||
- enum hal_encrypt_type enctype)
|
||||
-{
|
||||
- unsigned int key_id;
|
||||
-
|
||||
- switch (enctype) {
|
||||
- case HAL_ENCRYPT_TYPE_OPEN:
|
||||
- return;
|
||||
- case HAL_ENCRYPT_TYPE_TKIP_NO_MIC:
|
||||
- case HAL_ENCRYPT_TYPE_TKIP_MIC:
|
||||
- crypto_hdr[0] =
|
||||
- HAL_RX_MPDU_INFO_PN_GET_BYTE2(desc->u.ipq8074.mpdu_start.pn[0]);
|
||||
- crypto_hdr[1] = 0;
|
||||
- crypto_hdr[2] =
|
||||
- HAL_RX_MPDU_INFO_PN_GET_BYTE1(desc->u.ipq8074.mpdu_start.pn[0]);
|
||||
- break;
|
||||
- case HAL_ENCRYPT_TYPE_CCMP_128:
|
||||
- case HAL_ENCRYPT_TYPE_CCMP_256:
|
||||
- case HAL_ENCRYPT_TYPE_GCMP_128:
|
||||
- case HAL_ENCRYPT_TYPE_AES_GCMP_256:
|
||||
- crypto_hdr[0] =
|
||||
- HAL_RX_MPDU_INFO_PN_GET_BYTE1(desc->u.ipq8074.mpdu_start.pn[0]);
|
||||
- crypto_hdr[1] =
|
||||
- HAL_RX_MPDU_INFO_PN_GET_BYTE2(desc->u.ipq8074.mpdu_start.pn[0]);
|
||||
- crypto_hdr[2] = 0;
|
||||
- break;
|
||||
- case HAL_ENCRYPT_TYPE_WEP_40:
|
||||
- case HAL_ENCRYPT_TYPE_WEP_104:
|
||||
- case HAL_ENCRYPT_TYPE_WEP_128:
|
||||
- case HAL_ENCRYPT_TYPE_WAPI_GCM_SM4:
|
||||
- case HAL_ENCRYPT_TYPE_WAPI:
|
||||
- return;
|
||||
- }
|
||||
- key_id = FIELD_GET(RX_MPDU_START_INFO5_KEY_ID,
|
||||
- __le32_to_cpu(desc->u.ipq8074.mpdu_start.info5));
|
||||
- crypto_hdr[3] = 0x20 | (key_id << 6);
|
||||
- crypto_hdr[4] = HAL_RX_MPDU_INFO_PN_GET_BYTE3(desc->u.ipq8074.mpdu_start.pn[0]);
|
||||
- crypto_hdr[5] = HAL_RX_MPDU_INFO_PN_GET_BYTE4(desc->u.ipq8074.mpdu_start.pn[0]);
|
||||
- crypto_hdr[6] = HAL_RX_MPDU_INFO_PN_GET_BYTE1(desc->u.ipq8074.mpdu_start.pn[1]);
|
||||
- crypto_hdr[7] = HAL_RX_MPDU_INFO_PN_GET_BYTE2(desc->u.ipq8074.mpdu_start.pn[1]);
|
||||
-}
|
||||
-
|
||||
-static bool ath11k_hw_qcn9074_rx_desc_mac_addr2_valid(struct hal_rx_desc *desc)
|
||||
+static
|
||||
+struct rx_attention *ath11k_hw_ipq8074_rx_desc_get_attention(struct hal_rx_desc *desc)
|
||||
{
|
||||
- return __le32_to_cpu(desc->u.qcn9074.mpdu_start.info11) &
|
||||
- RX_MPDU_START_INFO11_MAC_ADDR2_VALID;
|
||||
+ return &desc->u.ipq8074.attention;
|
||||
}
|
||||
|
||||
-static u8* ath11k_hw_qcn9074_rx_desc_mpdu_start_addr2(struct hal_rx_desc *desc)
|
||||
+static u8 *ath11k_hw_ipq8074_rx_desc_get_msdu_payload(struct hal_rx_desc *desc)
|
||||
{
|
||||
- return desc->u.qcn9074.mpdu_start.addr2;
|
||||
+ return &desc->u.ipq8074.msdu_payload[0];
|
||||
}
|
||||
|
||||
static bool ath11k_hw_qcn9074_rx_desc_get_first_msdu(struct hal_rx_desc *desc)
|
||||
@@ -557,11 +447,7 @@ static u8 ath11k_hw_qcn9074_rx_desc_get_
|
||||
|
||||
static u8 *ath11k_hw_qcn9074_rx_desc_get_hdr_status(struct hal_rx_desc *desc)
|
||||
{
|
||||
-#ifndef CPTCFG_ATH11K_MEM_PROFILE_512M
|
||||
return desc->u.qcn9074.hdr_status;
|
||||
-#else
|
||||
- return NULL;
|
||||
-#endif
|
||||
}
|
||||
|
||||
static bool ath11k_hw_qcn9074_rx_desc_encrypt_valid(struct hal_rx_desc *desc)
|
||||
@@ -748,11 +634,7 @@ static u8 ath11k_hw_wcn6855_rx_desc_get_
|
||||
|
||||
static u8 *ath11k_hw_wcn6855_rx_desc_get_hdr_status(struct hal_rx_desc *desc)
|
||||
{
|
||||
-#ifndef CPTCFG_ATH11K_MEM_PROFILE_512M
|
||||
return desc->u.wcn6855.hdr_status;
|
||||
-#else
|
||||
- return NULL;
|
||||
-#endif
|
||||
}
|
||||
|
||||
static bool ath11k_hw_wcn6855_rx_desc_encrypt_valid(struct hal_rx_desc *desc)
|
||||
@@ -902,96 +784,6 @@ static u8 *ath11k_hw_wcn6855_rx_desc_mpd
|
||||
{
|
||||
return desc->u.wcn6855.mpdu_start.addr2;
|
||||
}
|
||||
-#ifdef CPTCFG_ATH11K_MEM_PROFILE_512M
|
||||
-static void ath11k_hw_qcn9074_rx_desc_get_offset(struct htt_rx_ring_tlv_filter *tlv_filter)
|
||||
-{
|
||||
- tlv_filter->rx_mpdu_end_offset = __le16_to_cpu(offsetof
|
||||
- (struct hal_rx_desc_qcn9074, mpdu_end_tag));
|
||||
- tlv_filter->rx_mpdu_start_offset = __le16_to_cpu(offsetof
|
||||
- (struct hal_rx_desc_qcn9074, mpdu_start_tag));
|
||||
- tlv_filter->rx_msdu_end_offset = __le16_to_cpu(offsetof
|
||||
- (struct hal_rx_desc_qcn9074, msdu_end_tag));
|
||||
- tlv_filter->rx_msdu_start_offset = __le16_to_cpu(offsetof
|
||||
- (struct hal_rx_desc_qcn9074, msdu_start_tag));
|
||||
- tlv_filter->rx_attn_offset = __le16_to_cpu(offsetof
|
||||
- (struct hal_rx_desc_qcn9074, rx_attn_tag));
|
||||
-}
|
||||
-#endif
|
||||
-
|
||||
-static u16 ath11k_hw_qcn9074_rx_desc_get_mpdu_frame_ctl(struct hal_rx_desc *desc)
|
||||
-{
|
||||
- return __le16_to_cpu(desc->u.qcn9074.mpdu_start.frame_ctrl);
|
||||
-}
|
||||
-
|
||||
-static bool ath11k_hw_qcn9074_rx_desc_dot11_hdr_fields_valid(struct hal_rx_desc *desc)
|
||||
-{
|
||||
- if ((ath11k_hw_qcn9074_rx_desc_get_mpdu_seq_ctl_vld(desc) &&
|
||||
- ath11k_hw_qcn9074_rx_desc_get_mpdu_fc_valid(desc) &&
|
||||
- (__le32_to_cpu(desc->u.qcn9074.mpdu_start.info11) &
|
||||
- RX_MPDU_START_INFO11_MAC_ADDR1_VALID) &&
|
||||
- ath11k_hw_qcn9074_rx_desc_mac_addr2_valid(desc) &&
|
||||
- (__le32_to_cpu(desc->u.qcn9074.mpdu_start.info11) &
|
||||
- RX_MPDU_START_INFO11_MAC_ADDR3_VALID) &&
|
||||
- FIELD_GET((RX_MPDU_START_INFO11_MPDU_DUR_VALID),
|
||||
- __le32_to_cpu(desc->u.qcn9074.mpdu_start.info11)))) {
|
||||
- return true;
|
||||
- }
|
||||
- return false;
|
||||
-}
|
||||
-
|
||||
-static void ath11k_hw_qcn9074_rx_desc_get_dot11_hdr(struct hal_rx_desc *desc,
|
||||
- struct ieee80211_hdr *hdr)
|
||||
-{
|
||||
- hdr->frame_control = __le16_to_cpu(desc->u.qcn9074.mpdu_start.frame_ctrl);
|
||||
- hdr->duration_id = __le16_to_cpu(desc->u.qcn9074.mpdu_start.duration);
|
||||
- ether_addr_copy(hdr->addr1, desc->u.qcn9074.mpdu_start.addr1);
|
||||
- ether_addr_copy(hdr->addr2, desc->u.qcn9074.mpdu_start.addr2);
|
||||
- ether_addr_copy(hdr->addr3, desc->u.qcn9074.mpdu_start.addr3);
|
||||
- if (__le32_to_cpu(desc->u.qcn9074.mpdu_start.info11) &
|
||||
- RX_MPDU_START_INFO11_MAC_ADDR4_VALID) {
|
||||
- ether_addr_copy(hdr->addr4, desc->u.qcn9074.mpdu_start.addr4);
|
||||
- }
|
||||
- hdr->seq_ctrl = __le16_to_cpu(desc->u.qcn9074.mpdu_start.seq_ctrl);
|
||||
-}
|
||||
-
|
||||
-static void ath11k_hw_qcn9074_rx_desc_get_crypto_hdr(struct hal_rx_desc *desc,
|
||||
- u8 *crypto_hdr,
|
||||
- enum hal_encrypt_type enctype)
|
||||
-{
|
||||
- unsigned int key_id;
|
||||
-
|
||||
- switch (enctype) {
|
||||
- case HAL_ENCRYPT_TYPE_OPEN:
|
||||
- return;
|
||||
- case HAL_ENCRYPT_TYPE_TKIP_NO_MIC:
|
||||
- case HAL_ENCRYPT_TYPE_TKIP_MIC:
|
||||
- crypto_hdr[0] = HAL_RX_MPDU_INFO_PN_GET_BYTE2(desc->u.qcn9074.mpdu_start.pn[0]);
|
||||
- crypto_hdr[1] = 0;
|
||||
- crypto_hdr[2] = HAL_RX_MPDU_INFO_PN_GET_BYTE1(desc->u.qcn9074.mpdu_start.pn[0]);
|
||||
- break;
|
||||
- case HAL_ENCRYPT_TYPE_CCMP_128:
|
||||
- case HAL_ENCRYPT_TYPE_CCMP_256:
|
||||
- case HAL_ENCRYPT_TYPE_GCMP_128:
|
||||
- case HAL_ENCRYPT_TYPE_AES_GCMP_256:
|
||||
- crypto_hdr[0] = HAL_RX_MPDU_INFO_PN_GET_BYTE1(desc->u.qcn9074.mpdu_start.pn[0]);
|
||||
- crypto_hdr[1] = HAL_RX_MPDU_INFO_PN_GET_BYTE2(desc->u.qcn9074.mpdu_start.pn[0]);
|
||||
- crypto_hdr[2] = 0;
|
||||
- break;
|
||||
- case HAL_ENCRYPT_TYPE_WEP_40:
|
||||
- case HAL_ENCRYPT_TYPE_WEP_104:
|
||||
- case HAL_ENCRYPT_TYPE_WEP_128:
|
||||
- case HAL_ENCRYPT_TYPE_WAPI_GCM_SM4:
|
||||
- case HAL_ENCRYPT_TYPE_WAPI:
|
||||
- return;
|
||||
- }
|
||||
- key_id = FIELD_GET(RX_MPDU_START_INFO12_KEY_ID,
|
||||
- __le32_to_cpu(desc->u.qcn9074.mpdu_start.info12));
|
||||
- crypto_hdr[3] = 0x20 | (key_id << 6);
|
||||
- crypto_hdr[4] = HAL_RX_MPDU_INFO_PN_GET_BYTE3(desc->u.qcn9074.mpdu_start.pn[0]);
|
||||
- crypto_hdr[5] = HAL_RX_MPDU_INFO_PN_GET_BYTE4(desc->u.qcn9074.mpdu_start.pn[0]);
|
||||
- crypto_hdr[6] = HAL_RX_MPDU_INFO_PN_GET_BYTE1(desc->u.qcn9074.mpdu_start.pn[1]);
|
||||
- crypto_hdr[7] = HAL_RX_MPDU_INFO_PN_GET_BYTE2(desc->u.qcn9074.mpdu_start.pn[1]);
|
||||
-}
|
||||
|
||||
static void ath11k_hw_wcn6855_reo_setup(struct ath11k_base *ab)
|
||||
{
|
||||
@@ -1196,13 +988,6 @@ const struct ath11k_hw_ops ipq8074_ops =
|
||||
.rx_desc_mpdu_start_addr2 = ath11k_hw_ipq8074_rx_desc_mpdu_start_addr2,
|
||||
.get_ring_selector = ath11k_hw_ipq8074_get_tcl_ring_selector,
|
||||
.rx_desc_get_hal_mpdu_len = ath11k_hw_ipq8074_rx_desc_get_hal_mpdu_len,
|
||||
-#ifdef CPTCFG_ATH11K_MEM_PROFILE_512M
|
||||
- .rx_desc_get_offset = ath11k_hw_ipq8074_rx_desc_get_offset,
|
||||
-#endif
|
||||
- .rx_desc_get_mpdu_frame_ctl = ath11k_hw_ipq8074_rx_desc_get_mpdu_frame_ctl,
|
||||
- .rx_desc_dot11_hdr_fields_valid = ath11k_hw_ipq8074_rx_desc_dot11_hdr_fields_valid,
|
||||
- .rx_desc_get_dot11_hdr = ath11k_hw_ipq8074_rx_desc_get_dot11_hdr,
|
||||
- .rx_desc_get_crypto_header = ath11k_hw_ipq8074_rx_desc_get_crypto_hdr,
|
||||
};
|
||||
|
||||
const struct ath11k_hw_ops ipq6018_ops = {
|
||||
@@ -1244,13 +1029,6 @@ const struct ath11k_hw_ops ipq6018_ops =
|
||||
.rx_desc_mpdu_start_addr2 = ath11k_hw_ipq8074_rx_desc_mpdu_start_addr2,
|
||||
.get_ring_selector = ath11k_hw_ipq8074_get_tcl_ring_selector,
|
||||
.rx_desc_get_hal_mpdu_len = ath11k_hw_ipq8074_rx_desc_get_hal_mpdu_len,
|
||||
-#ifdef CPTCFG_ATH11K_MEM_PROFILE_512M
|
||||
- .rx_desc_get_offset = ath11k_hw_ipq8074_rx_desc_get_offset,
|
||||
-#endif
|
||||
- .rx_desc_get_mpdu_frame_ctl = ath11k_hw_ipq8074_rx_desc_get_mpdu_frame_ctl,
|
||||
- .rx_desc_dot11_hdr_fields_valid = ath11k_hw_ipq8074_rx_desc_dot11_hdr_fields_valid,
|
||||
- .rx_desc_get_dot11_hdr = ath11k_hw_ipq8074_rx_desc_get_dot11_hdr,
|
||||
- .rx_desc_get_crypto_header = ath11k_hw_ipq8074_rx_desc_get_crypto_hdr,
|
||||
};
|
||||
|
||||
const struct ath11k_hw_ops qca6390_ops = {
|
||||
@@ -1293,13 +1071,6 @@ const struct ath11k_hw_ops qca6390_ops =
|
||||
.rx_desc_mpdu_start_addr2 = ath11k_hw_ipq8074_rx_desc_mpdu_start_addr2,
|
||||
.get_ring_selector = ath11k_hw_ipq8074_get_tcl_ring_selector,
|
||||
.rx_desc_get_hal_mpdu_len = ath11k_hw_ipq8074_rx_desc_get_hal_mpdu_len,
|
||||
-#ifdef CPTCFG_ATH11K_MEM_PROFILE_512M
|
||||
- .rx_desc_get_offset = ath11k_hw_ipq8074_rx_desc_get_offset,
|
||||
-#endif
|
||||
- .rx_desc_get_mpdu_frame_ctl = ath11k_hw_ipq8074_rx_desc_get_mpdu_frame_ctl,
|
||||
- .rx_desc_dot11_hdr_fields_valid = ath11k_hw_ipq8074_rx_desc_dot11_hdr_fields_valid,
|
||||
- .rx_desc_get_dot11_hdr = ath11k_hw_ipq8074_rx_desc_get_dot11_hdr,
|
||||
- .rx_desc_get_crypto_header = ath11k_hw_ipq8074_rx_desc_get_crypto_hdr,
|
||||
};
|
||||
|
||||
const struct ath11k_hw_ops qcn9074_ops = {
|
||||
@@ -1337,17 +1108,10 @@ const struct ath11k_hw_ops qcn9074_ops =
|
||||
.rx_desc_get_msdu_payload = ath11k_hw_qcn9074_rx_desc_get_msdu_payload,
|
||||
.reo_setup = ath11k_hw_ipq8074_reo_setup,
|
||||
.mpdu_info_get_peerid = ath11k_hw_qcn9074_mpdu_info_get_peerid,
|
||||
- .rx_desc_mac_addr2_valid = ath11k_hw_qcn9074_rx_desc_mac_addr2_valid,
|
||||
- .rx_desc_mpdu_start_addr2 = ath11k_hw_qcn9074_rx_desc_mpdu_start_addr2,
|
||||
+ .rx_desc_mac_addr2_valid = ath11k_hw_ipq9074_rx_desc_mac_addr2_valid,
|
||||
+ .rx_desc_mpdu_start_addr2 = ath11k_hw_ipq9074_rx_desc_mpdu_start_addr2,
|
||||
.get_ring_selector = ath11k_hw_ipq8074_get_tcl_ring_selector,
|
||||
.rx_desc_get_hal_mpdu_len = ath11k_hw_qcn9074_rx_desc_get_hal_mpdu_len,
|
||||
-#ifdef CPTCFG_ATH11K_MEM_PROFILE_512M
|
||||
- .rx_desc_get_offset = ath11k_hw_qcn9074_rx_desc_get_offset,
|
||||
-#endif
|
||||
- .rx_desc_get_mpdu_frame_ctl = ath11k_hw_qcn9074_rx_desc_get_mpdu_frame_ctl,
|
||||
- .rx_desc_dot11_hdr_fields_valid = ath11k_hw_qcn9074_rx_desc_dot11_hdr_fields_valid,
|
||||
- .rx_desc_get_dot11_hdr = ath11k_hw_qcn9074_rx_desc_get_dot11_hdr,
|
||||
- .rx_desc_get_crypto_header = ath11k_hw_qcn9074_rx_desc_get_crypto_hdr,
|
||||
};
|
||||
|
||||
const struct ath11k_hw_ops wcn6855_ops = {
|
||||
--- a/drivers/net/wireless/ath/ath11k/hw.h
|
||||
+++ b/drivers/net/wireless/ath/ath11k/hw.h
|
||||
@@ -22,11 +22,6 @@
|
||||
#define ATH11K_DP_RXDMA_MON_STATUS_RING_SIZE 512
|
||||
#define ATH11K_DP_RXDMA_MONITOR_BUF_RING_SIZE 128
|
||||
#define ATH11K_DP_RXDMA_MONITOR_DST_RING_SIZE 128
|
||||
-#define ATH11K_DP_RXDMA_REFILL_RING_SIZE 2048
|
||||
-/* 256b desc TLV + 4b(rounded) Pad + 30byte max nwifi header +
|
||||
- * 18byte mesh hdr + 8byte snap + 1500 eth payload
|
||||
- */
|
||||
-#define ATH11K_DP_RXDMA_NSS_REFILL_RING_SIZE 1816
|
||||
#else
|
||||
/* Num VDEVS per radio */
|
||||
#define TARGET_NUM_VDEVS(ab) (ab->hw_params.num_vdevs_peers[ab->qmi.target_mem_mode].num_vdevs)
|
||||
@@ -38,8 +33,6 @@
|
||||
#define ATH11K_DP_RXDMA_MON_STATUS_RING_SIZE 1024
|
||||
#define ATH11K_DP_RXDMA_MONITOR_BUF_RING_SIZE 4096
|
||||
#define ATH11K_DP_RXDMA_MONITOR_DST_RING_SIZE 2048
|
||||
-#define ATH11K_DP_RXDMA_REFILL_RING_SIZE 2048
|
||||
-#define ATH11K_DP_RXDMA_NSS_REFILL_RING_SIZE 2048
|
||||
#endif
|
||||
|
||||
/* Num of peers for Single Radio mode */
|
||||
@@ -136,9 +129,6 @@ enum ath11k_bus {
|
||||
struct hal_rx_desc;
|
||||
struct hal_tcl_data_cmd;
|
||||
|
||||
-struct htt_rx_ring_tlv_filter;
|
||||
-enum hal_encrypt_type;
|
||||
-
|
||||
struct ath11k_hw_ring_mask {
|
||||
u8 tx[ATH11K_EXT_IRQ_GRP_NUM_MAX];
|
||||
u8 rx_mon_status[ATH11K_EXT_IRQ_GRP_NUM_MAX];
|
||||
@@ -298,16 +288,6 @@ struct ath11k_hw_ops {
|
||||
u8* (*rx_desc_mpdu_start_addr2)(struct hal_rx_desc *desc);
|
||||
u32 (*get_ring_selector)(struct sk_buff *skb);
|
||||
u32 (*rx_desc_get_hal_mpdu_len)(struct hal_rx_mpdu_info *mpdu_info);
|
||||
-#ifdef CPTCFG_ATH11K_MEM_PROFILE_512M
|
||||
- void (*rx_desc_get_offset)(struct htt_rx_ring_tlv_filter *tlv_filter);
|
||||
-#endif
|
||||
- u16 (*rx_desc_get_mpdu_frame_ctl)(struct hal_rx_desc *desc);
|
||||
- bool (*rx_desc_dot11_hdr_fields_valid)(struct hal_rx_desc *desc);
|
||||
- void (*rx_desc_get_dot11_hdr)(struct hal_rx_desc *desc,
|
||||
- struct ieee80211_hdr *hdr);
|
||||
- void (*rx_desc_get_crypto_header)(struct hal_rx_desc *desc,
|
||||
- u8 *crypto_hdr,
|
||||
- enum hal_encrypt_type enctype);
|
||||
};
|
||||
|
||||
extern const struct ath11k_hw_ops ipq8074_ops;
|
||||
--- a/drivers/net/wireless/ath/ath11k/mac.c
|
||||
+++ b/drivers/net/wireless/ath/ath11k/mac.c
|
||||
@@ -6514,7 +6514,6 @@ static int ath11k_mac_config_mon_status_
|
||||
tlv_filter.rx_filter = ath11k_debugfs_rx_filter(ar);
|
||||
}
|
||||
|
||||
- tlv_filter.offset_valid = false;
|
||||
for (i = 0; i < ab->hw_params.num_rxdma_per_pdev; i++) {
|
||||
ring_id = ar->dp.rx_mon_status_refill_ring[i].refill_buf_ring.ring_id;
|
||||
ret = ath11k_dp_tx_htt_rx_filter_setup(ar->ab, ring_id,
|
||||
--- a/drivers/net/wireless/ath/ath11k/rx_desc.h
|
||||
+++ b/drivers/net/wireless/ath/ath11k/rx_desc.h
|
||||
@@ -1508,17 +1508,4 @@ struct hal_rx_desc {
|
||||
#define RU_484 18
|
||||
#define RU_996 37
|
||||
|
||||
-#define HAL_RX_MPDU_INFO_PN_GET_BYTE1(__val) \
|
||||
- FIELD_GET(GENMASK(7, 0), __le32_to_cpu(__val))
|
||||
-
|
||||
-#define HAL_RX_MPDU_INFO_PN_GET_BYTE2(__val) \
|
||||
- FIELD_GET(GENMASK(15, 8), __le32_to_cpu(__val))
|
||||
-
|
||||
-#define HAL_RX_MPDU_INFO_PN_GET_BYTE3(__val) \
|
||||
- FIELD_GET(GENMASK(23, 16), __le32_to_cpu(__val))
|
||||
-
|
||||
-#define HAL_RX_MPDU_INFO_PN_GET_BYTE4(__val) \
|
||||
- FIELD_GET(GENMASK(31, 24), __le32_to_cpu(__val))
|
||||
-
|
||||
-
|
||||
#endif /* ATH11K_RX_DESC_H */
|
||||
--- a/drivers/net/wireless/ath/ath11k/nss.c
|
||||
+++ b/drivers/net/wireless/ath/ath11k/nss.c
|
||||
@@ -4424,7 +4424,7 @@ static int ath11k_nss_init(struct ath11k
|
||||
|
||||
/* fill rx parameters to initialize rx context */
|
||||
wim->wrip.tlv_size = ab->hw_params.hal_desc_sz;
|
||||
- wim->wrip.rx_buf_len = DP_RXDMA_NSS_REFILL_RING_SIZE;
|
||||
+ wim->wrip.rx_buf_len = DP_RX_BUFFER_SIZE;
|
||||
if (of_property_read_bool(dev->of_node, "nss-radio-priority"))
|
||||
wim->flags |= WIFILI_MULTISOC_THREAD_MAP_ENABLE;
|
||||
|
||||
@@ -1,327 +0,0 @@
|
||||
reverted:
|
||||
--- a/drivers/net/wireless/ath/ath11k/Kconfig
|
||||
+++ b/drivers/net/wireless/ath/ath11k/Kconfig
|
||||
@@ -32,20 +32,6 @@ config ATH11K_NSS_MESH_SUPPORT
|
||||
|
||||
If unsure, say Y to enable NSS offload support.
|
||||
|
||||
-config ATH11K_MEM_PROFILE_512M
|
||||
- bool "ath11k enable 512MB memory profile"
|
||||
- depends on ATH11K
|
||||
- default n
|
||||
- ---help---
|
||||
- Enables 512MB memory profile for ath11k
|
||||
-
|
||||
-config ATH11K_MEM_PROFILE_256M
|
||||
- bool "ath11k enable 256MB memory profile"
|
||||
- depends on ATH11K
|
||||
- default n
|
||||
- ---help---
|
||||
- Enables 256MB memory profile for ath11k
|
||||
-
|
||||
config ATH11K_AHB
|
||||
tristate "Atheros ath11k AHB support"
|
||||
depends on m
|
||||
--- a/drivers/net/wireless/ath/ath11k/hw.h
|
||||
+++ b/drivers/net/wireless/ath/ath11k/hw.h
|
||||
@@ -11,29 +11,11 @@
|
||||
#include "wmi.h"
|
||||
|
||||
/* Target configuration defines */
|
||||
-#ifdef CPTCFG_ATH11K_MEM_PROFILE_512M
|
||||
|
||||
-#define TARGET_NUM_VDEVS(ab) 8
|
||||
-#define TARGET_NUM_PEERS_PDEV(ab) (128 + TARGET_NUM_VDEVS(ab))
|
||||
-/* Max num of stations (per radio) */
|
||||
-#define TARGET_NUM_STATIONS(ab) 128
|
||||
-#define ATH11K_QMI_TARGET_MEM_MODE ATH11K_QMI_TARGET_MEM_MODE_512M
|
||||
-#define ATH11K_DP_TX_COMP_RING_SIZE 8192
|
||||
-#define ATH11K_DP_RXDMA_MON_STATUS_RING_SIZE 512
|
||||
-#define ATH11K_DP_RXDMA_MONITOR_BUF_RING_SIZE 128
|
||||
-#define ATH11K_DP_RXDMA_MONITOR_DST_RING_SIZE 128
|
||||
-#else
|
||||
/* Num VDEVS per radio */
|
||||
-#define TARGET_NUM_VDEVS(ab) (ab->hw_params.num_vdevs_peers[ab->qmi.target_mem_mode].num_vdevs)
|
||||
-#define TARGET_NUM_PEERS_PDEV(ab) (ab->hw_params.num_vdevs_peers[ab->qmi.target_mem_mode].num_peers + TARGET_NUM_VDEVS(ab))
|
||||
-/* Max num of stations (per radio) */
|
||||
-#define TARGET_NUM_STATIONS(ab) (ab->hw_params.num_vdevs_peers[ab->qmi.target_mem_mode].num_peers)
|
||||
-#define ATH11K_QMI_TARGET_MEM_MODE ATH11K_QMI_TARGET_MEM_MODE_DEFAULT
|
||||
-#define ATH11K_DP_TX_COMP_RING_SIZE 32768
|
||||
-#define ATH11K_DP_RXDMA_MON_STATUS_RING_SIZE 1024
|
||||
-#define ATH11K_DP_RXDMA_MONITOR_BUF_RING_SIZE 4096
|
||||
-#define ATH11K_DP_RXDMA_MONITOR_DST_RING_SIZE 2048
|
||||
-#endif
|
||||
+#define TARGET_NUM_VDEVS(ab) (ab->hw_params.num_vdevs)
|
||||
+
|
||||
+#define TARGET_NUM_PEERS_PDEV(ab) (ab->hw_params.num_peers + TARGET_NUM_VDEVS(ab))
|
||||
|
||||
/* Num of peers for Single Radio mode */
|
||||
#define TARGET_NUM_PEERS_SINGLE(ab) (TARGET_NUM_PEERS_PDEV(ab))
|
||||
@@ -44,6 +26,9 @@
|
||||
/* Num of peers for DBS_SBS */
|
||||
#define TARGET_NUM_PEERS_DBS_SBS(ab) (3 * TARGET_NUM_PEERS_PDEV(ab))
|
||||
|
||||
+/* Max num of stations (per radio) */
|
||||
+#define TARGET_NUM_STATIONS(ab) (ab->hw_params.num_peers)
|
||||
+
|
||||
#define TARGET_NUM_PEERS(ab, x) TARGET_NUM_PEERS_##x(ab)
|
||||
#define TARGET_NUM_PEER_KEYS 2
|
||||
#define TARGET_NUM_TIDS(ab, x) (2 * TARGET_NUM_PEERS(ab, x) + \
|
||||
@@ -241,7 +226,6 @@ struct ath11k_hw_params {
|
||||
u32 tx_ring_size;
|
||||
bool smp2p_wow_exit;
|
||||
bool support_fw_mac_sequence;
|
||||
- const struct ath11k_num_vdevs_peers *num_vdevs_peers;
|
||||
bool support_dual_stations;
|
||||
};
|
||||
|
||||
--- a/drivers/net/wireless/ath/ath11k/qmi.h
|
||||
+++ b/drivers/net/wireless/ath/ath11k/qmi.h
|
||||
@@ -29,12 +29,6 @@
|
||||
#define ATH11K_QMI_BDF_EXT_STR_LENGTH 0x20
|
||||
#define ATH11K_QMI_FW_MEM_REQ_SEGMENT_CNT 5
|
||||
|
||||
-#ifdef CPTCFG_ATH11K_MEM_PROFILE_512M
|
||||
-#define ATH11K_QMI_IPQ8074_M3_DUMP_ADDRESS 0x4E800000
|
||||
-#else
|
||||
-#define ATH11K_QMI_IPQ8074_M3_DUMP_ADDRESS 0x51000000
|
||||
-#endif
|
||||
-
|
||||
#define QMI_WLFW_REQUEST_MEM_IND_V01 0x0035
|
||||
#define QMI_WLFW_FW_MEM_READY_IND_V01 0x0037
|
||||
#define QMI_WLFW_COLD_BOOT_CAL_DONE_IND_V01 0x003E
|
||||
@@ -48,11 +42,6 @@
|
||||
#define ATH11K_QMI_DEVICE_BAR_SIZE 0x200000
|
||||
|
||||
struct ath11k_base;
|
||||
-enum ath11k_target_mem_mode {
|
||||
- ATH11K_QMI_TARGET_MEM_MODE_DEFAULT = 0,
|
||||
- ATH11K_QMI_TARGET_MEM_MODE_512M,
|
||||
- ATH11K_QMI_TARGET_MEM_MODE_256M,
|
||||
-};
|
||||
|
||||
enum ath11k_qmi_file_type {
|
||||
ATH11K_QMI_FILE_TYPE_BDF_GOLDEN,
|
||||
--- a/local-symbols
|
||||
+++ b/local-symbols
|
||||
@@ -167,8 +167,6 @@ ATH11K_AHB=
|
||||
ATH11K_PCI=
|
||||
ATH11K_NSS_SUPPORT=
|
||||
ATH11K_NSS_MESH_SUPPORT=
|
||||
-ATH11K_MEM_PROFILE_256M=
|
||||
-ATH11K_MEM_PROFILE_512M=
|
||||
ATH11K_DEBUG=
|
||||
ATH11K_DEBUGFS=
|
||||
ATH11K_DEBUGFS_STA=
|
||||
--- a/drivers/net/wireless/ath/ath11k/core.h
|
||||
+++ b/drivers/net/wireless/ath/ath11k/core.h
|
||||
@@ -985,11 +985,6 @@ struct ath11k_msi_config {
|
||||
u16 hw_rev;
|
||||
};
|
||||
|
||||
-struct ath11k_num_vdevs_peers {
|
||||
- u32 num_vdevs;
|
||||
- u32 num_peers;
|
||||
-};
|
||||
-
|
||||
/* Master structure to hold the hw data which may be used in core module */
|
||||
struct ath11k_base {
|
||||
enum ath11k_hw_rev hw_rev;
|
||||
@@ -1135,8 +1130,6 @@ struct ath11k_base {
|
||||
DECLARE_BITMAP(fw_features, ATH11K_FW_FEATURE_COUNT);
|
||||
} fw;
|
||||
|
||||
- atomic_t num_max_allowed;
|
||||
-
|
||||
#ifdef CPTCFG_NL80211_TESTMODE
|
||||
struct {
|
||||
u32 data_pos;
|
||||
--- a/drivers/net/wireless/ath/ath11k/dp.h
|
||||
+++ b/drivers/net/wireless/ath/ath11k/dp.h
|
||||
@@ -93,7 +93,7 @@ struct idr_entry {
|
||||
void *buf;
|
||||
};
|
||||
|
||||
-#define DP_TX_IDR_SIZE ATH11K_DP_TX_COMP_RING_SIZE
|
||||
+#define DP_TX_IDR_SIZE 32768
|
||||
|
||||
struct dp_tx_ring {
|
||||
u8 tcl_data_ring_id;
|
||||
@@ -225,8 +225,7 @@ struct ath11k_pdev_dp {
|
||||
#define DP_WBM_RELEASE_RING_SIZE 64
|
||||
#define DP_TCL_DATA_RING_SIZE 512
|
||||
#define DP_TCL_DATA_RING_SIZE_WCN6750 2048
|
||||
-#define DP_TX_COMP_RING_SIZE ATH11K_DP_TX_COMP_RING_SIZE
|
||||
-#define DP_TX_COMP_MAX_ALLOWED DP_TX_COMP_RING_SIZE
|
||||
+#define DP_TX_COMP_RING_SIZE 32768
|
||||
#define DP_TCL_CMD_RING_SIZE 32
|
||||
#define DP_TCL_STATUS_RING_SIZE 32
|
||||
#define DP_REO_DST_RING_MAX 4
|
||||
@@ -239,9 +238,9 @@ struct ath11k_pdev_dp {
|
||||
#define DP_RXDMA_BUF_RING_SIZE 4096
|
||||
#define DP_RXDMA_REFILL_RING_SIZE 2048
|
||||
#define DP_RXDMA_ERR_DST_RING_SIZE 1024
|
||||
-#define DP_RXDMA_MON_STATUS_RING_SIZE ATH11K_DP_RXDMA_MON_STATUS_RING_SIZE
|
||||
-#define DP_RXDMA_MONITOR_BUF_RING_SIZE ATH11K_DP_RXDMA_MONITOR_BUF_RING_SIZE
|
||||
-#define DP_RXDMA_MONITOR_DST_RING_SIZE ATH11K_DP_RXDMA_MONITOR_BUF_RING_SIZE
|
||||
+#define DP_RXDMA_MON_STATUS_RING_SIZE 1024
|
||||
+#define DP_RXDMA_MONITOR_BUF_RING_SIZE 4096
|
||||
+#define DP_RXDMA_MONITOR_DST_RING_SIZE 2048
|
||||
#define DP_RXDMA_MONITOR_DESC_RING_SIZE 4096
|
||||
|
||||
#define DP_RX_RELEASE_RING_NUM 3
|
||||
--- a/drivers/net/wireless/ath/ath11k/dp_tx.c
|
||||
+++ b/drivers/net/wireless/ath/ath11k/dp_tx.c
|
||||
@@ -132,12 +132,6 @@ int ath11k_dp_tx(struct ath11k *ar, stru
|
||||
|
||||
max_tx_ring = ab->hw_params.max_tx_ring;
|
||||
|
||||
-#ifdef CPTCFG_ATH11K_MEM_PROFILE_512M
|
||||
- if (unlikely(atomic_read(&ab->num_max_allowed) > DP_TX_COMP_MAX_ALLOWED)) {
|
||||
- atomic_inc(&ab->soc_stats.tx_err.max_fail);
|
||||
- return -ENOSPC;
|
||||
- }
|
||||
-#endif
|
||||
ring_selector = smp_processor_id();;
|
||||
pool_id = ring_selector;
|
||||
|
||||
@@ -327,7 +321,6 @@ tcl_ring_sel:
|
||||
sizeof(struct hal_tlv_hdr), &ti);
|
||||
|
||||
atomic_inc(&ar->dp.num_tx_pending);
|
||||
- atomic_inc(&ab->num_max_allowed);
|
||||
ath11k_hal_srng_access_end(ab, tcl_ring);
|
||||
|
||||
ath11k_dp_shadow_start_timer(ab, tcl_ring, &dp->tx_ring_timer[ti.buf_id]);
|
||||
@@ -882,12 +875,6 @@ void ath11k_dp_tx_completion_handler(str
|
||||
|
||||
spin_unlock_bh(&status_ring->lock);
|
||||
|
||||
- if (atomic_sub_return(count, &ab->num_max_allowed) < 0) {
|
||||
- ath11k_warn(ab, "tx completion mismatch count %d ring id %d max_num %d\n",
|
||||
- count, tx_ring->tcl_data_ring_id,
|
||||
- atomic_read(&ab->num_max_allowed));
|
||||
- }
|
||||
-
|
||||
while (count--) {
|
||||
msdu=NULL;
|
||||
tx_status = &tx_ring->tx_status[i++];
|
||||
--- a/drivers/net/wireless/ath/ath11k/core.c
|
||||
+++ b/drivers/net/wireless/ath/ath11k/core.c
|
||||
@@ -43,8 +43,6 @@ bool ath11k_ftm_mode;
|
||||
module_param_named(ftm_mode, ath11k_ftm_mode, bool, 0444);
|
||||
MODULE_PARM_DESC(ftm_mode, "Boots up in factory test mode");
|
||||
|
||||
-static const struct ath11k_num_vdevs_peers ath11k_vdevs_peers[];
|
||||
-
|
||||
static struct ath11k_hw_params ath11k_hw_params[] = {
|
||||
{
|
||||
.hw_rev = ATH11K_HW_IPQ8074,
|
||||
@@ -130,7 +128,6 @@ static struct ath11k_hw_params ath11k_hw
|
||||
.tcl_ring_retry = true,
|
||||
.tx_ring_size = DP_TCL_DATA_RING_SIZE,
|
||||
.smp2p_wow_exit = false,
|
||||
- .num_vdevs_peers = ath11k_vdevs_peers,
|
||||
.support_dual_stations = false,
|
||||
},
|
||||
{
|
||||
@@ -182,7 +179,7 @@ static struct ath11k_hw_params ath11k_hw
|
||||
.coldboot_cal_mm = false,
|
||||
.coldboot_cal_ftm = false,
|
||||
.cbcal_restart_fw = true,
|
||||
- .fw_mem_mode = ATH11K_QMI_TARGET_MEM_MODE,
|
||||
+ .fw_mem_mode = 0,
|
||||
.num_vdevs = 16 + 1,
|
||||
.num_peers = 512,
|
||||
.supports_suspend = false,
|
||||
@@ -269,7 +266,7 @@ static struct ath11k_hw_params ath11k_hw
|
||||
.coldboot_cal_mm = false,
|
||||
.coldboot_cal_ftm = false,
|
||||
.cbcal_restart_fw = false,
|
||||
- .fw_mem_mode = ATH11K_QMI_TARGET_MEM_MODE,
|
||||
+ .fw_mem_mode = 0,
|
||||
.num_vdevs = 2 + 1,
|
||||
.num_peers = 512,
|
||||
.supports_suspend = true,
|
||||
@@ -442,7 +439,7 @@ static struct ath11k_hw_params ath11k_hw
|
||||
.coldboot_cal_mm = false,
|
||||
.coldboot_cal_ftm = false,
|
||||
.cbcal_restart_fw = false,
|
||||
- .fw_mem_mode = ATH11K_QMI_TARGET_MEM_MODE,
|
||||
+ .fw_mem_mode = 0,
|
||||
.num_vdevs = 2 + 1,
|
||||
.num_peers = 512,
|
||||
.supports_suspend = true,
|
||||
@@ -478,7 +475,6 @@ static struct ath11k_hw_params ath11k_hw
|
||||
.tx_ring_size = DP_TCL_DATA_RING_SIZE,
|
||||
.smp2p_wow_exit = false,
|
||||
.support_fw_mac_sequence = true,
|
||||
- .num_vdevs_peers = ath11k_vdevs_peers,
|
||||
.support_dual_stations = true,
|
||||
},
|
||||
{
|
||||
@@ -530,7 +526,7 @@ static struct ath11k_hw_params ath11k_hw
|
||||
.coldboot_cal_mm = false,
|
||||
.coldboot_cal_ftm = false,
|
||||
.cbcal_restart_fw = false,
|
||||
- .fw_mem_mode = ATH11K_QMI_TARGET_MEM_MODE,
|
||||
+ .fw_mem_mode = 0,
|
||||
.num_vdevs = 2 + 1,
|
||||
.num_peers = 512,
|
||||
.supports_suspend = true,
|
||||
@@ -566,7 +562,6 @@ static struct ath11k_hw_params ath11k_hw
|
||||
.tx_ring_size = DP_TCL_DATA_RING_SIZE,
|
||||
.smp2p_wow_exit = false,
|
||||
.support_fw_mac_sequence = true,
|
||||
- .num_vdevs_peers = ath11k_vdevs_peers,
|
||||
.support_dual_stations = true,
|
||||
},
|
||||
{
|
||||
@@ -616,7 +611,7 @@ static struct ath11k_hw_params ath11k_hw
|
||||
.coldboot_cal_mm = true,
|
||||
.coldboot_cal_ftm = true,
|
||||
.cbcal_restart_fw = false,
|
||||
- .fw_mem_mode = ATH11K_QMI_TARGET_MEM_MODE,
|
||||
+ .fw_mem_mode = 0,
|
||||
.num_vdevs = 3,
|
||||
.num_peers = 512,
|
||||
.supports_suspend = false,
|
||||
@@ -696,7 +691,7 @@ static struct ath11k_hw_params ath11k_hw
|
||||
.supports_monitor = false,
|
||||
.supports_sta_ps = false,
|
||||
.supports_shadow_regs = false,
|
||||
- .fw_mem_mode = ATH11K_QMI_TARGET_MEM_MODE,
|
||||
+ .fw_mem_mode = 0,
|
||||
.num_vdevs = 16 + 1,
|
||||
.num_peers = 512,
|
||||
.supports_regdb = false,
|
||||
@@ -731,7 +726,6 @@ static struct ath11k_hw_params ath11k_hw
|
||||
.tx_ring_size = DP_TCL_DATA_RING_SIZE,
|
||||
.smp2p_wow_exit = false,
|
||||
.support_fw_mac_sequence = false,
|
||||
- .num_vdevs_peers = ath11k_vdevs_peers,
|
||||
.support_dual_stations = false,
|
||||
},
|
||||
{
|
||||
@@ -825,21 +819,6 @@ static struct ath11k_hw_params ath11k_hw
|
||||
},
|
||||
};
|
||||
|
||||
-static const struct ath11k_num_vdevs_peers ath11k_vdevs_peers[] = {
|
||||
- {
|
||||
- .num_vdevs = (16 + 1),
|
||||
- .num_peers = 512,
|
||||
- },
|
||||
- {
|
||||
- .num_vdevs = (8 + 1),
|
||||
- .num_peers = 128,
|
||||
- },
|
||||
- {
|
||||
- .num_vdevs = 8,
|
||||
- .num_peers = 128,
|
||||
- },
|
||||
-};
|
||||
-
|
||||
static inline struct ath11k_pdev *ath11k_core_get_single_pdev(struct ath11k_base *ab)
|
||||
{
|
||||
WARN_ON(!ab->hw_params.single_pdev_only);
|
||||
Reference in New Issue
Block a user