porting 0002-FE-Modify-DTS-with-Kernel-and-uboot.patch

Signed-off-by: YenLin Pan <YenLin.Pan@zyxel.com.tw>
This commit is contained in:
YenLin Pan
2025-07-03 16:18:18 +08:00
parent 684126a3c8
commit 0f114096a1

View File

@@ -17,7 +17,7 @@
/ { / {
model = "Qualcomm Technologies, Inc. IPQ5332/RDP442/AP-MI01.3"; model = "Qualcomm Technologies, Inc. IPQ5332/RDP442/AP-MI01.3";
compatible = "zyxel,nwa130be", qcom,ipq5332-ap-mi01.3", "qcom,ipq5332-rdp442", "qcom,ipq5332"; compatible = "zyxel,nwa50be", "qcom,ipq5332-ap-mi01.3", "qcom,ipq5332-rdp442", "qcom,ipq5332";
#ifdef __IPQ_MEM_PROFILE_512_MB__ #ifdef __IPQ_MEM_PROFILE_512_MB__
@@ -321,90 +321,43 @@
soc@0 { soc@0 {
mdio:mdio@90000 { mdio:mdio@90000 {
pinctrl-0 = <&mdio1_pins &mdio0_pins>; pinctrl-0 = <&mdio1_pins>;
pinctrl-names = "default"; pinctrl-names = "default";
/*gpio51 for manhattan reset*/ /*gpio22 is for wan napa, gpio51 for lan napa*/
phy-reset-gpio = <&tlmm 51 GPIO_ACTIVE_LOW>; phy-reset-gpio = <&tlmm 51 GPIO_ACTIVE_LOW>;
phyaddr_fixup = <0xC90F018>;
uniphyaddr_fixup = <0xC90F014>;
mdio_clk_fixup; /* MDIO clock sequence fix up flag */
status = "okay"; status = "okay";
phy0: ethernet-phy@0 {
reg = <1>;
fixup;
};
phy1: ethernet-phy@1 {
reg = <2>;
fixup;
};
phy2: ethernet-phy@2 { phy2: ethernet-phy@2 {
reg = <3>; reg = <28>;
fixup;
};
phy3: ethernet-phy@3 {
reg = <4>;
fixup;
};
switch0@10 {
compatible = "qca,qca8386";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x10>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
label = "cpu";
ethernet = <&gmac2>;
dsa-tag-protocol = "qca_4b";
};
port@1 {
reg = <1>;
label = "lan1";
phy-handle = <&phy0>;
phy-mode = "usxgmii";
};
port@2 {
reg = <2>;
label = "lan2";
phy-handle = <&phy1>;
phy-mode = "usxgmii";
};
port@3 {
reg = <3>;
label = "lan3";
phy-handle = <&phy2>;
phy-mode = "usxgmii";
};
port@4 {
reg = <4>;
label = "lan4";
phy-handle = <&phy3>;
phy-mode = "usxgmii";
};
};
}; };
}; };
leds { leds {
compatible = "gpio-leds"; compatible = "gpio-leds";
pinctrl-0 = <&gpio_leds_default>; pinctrl-0 = <&led_pins>;
pinctrl-names = "default"; pinctrl-names = "default";
led_blue{
led-0 { label = "led_blue";
color = <LED_COLOR_ID_GREEN>; gpio = <&tlmm 22 GPIO_ACTIVE_HIGH>;
function = LED_FUNCTION_WLAN; linux,default-trigger = "led_blue";
gpios = <&tlmm 36 GPIO_ACTIVE_HIGH>; default-state = "off";
linux,default-trigger = "phy0tx"; };
led_green {
label = "led_green";
gpio = <&tlmm 45 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "led_green";
default-state = "on";
};
led_white {
label = "led_white";
gpio = <&tlmm 43 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "led_white";
default-state = "off";
};
led_red {
label = "led_red";
gpio = <&tlmm 44 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "led_red";
default-state = "off"; default-state = "off";
}; };
}; };
@@ -416,106 +369,27 @@
status = "okay"; status = "okay";
button@1 { button@1 {
label = "wps"; label = "reset";
linux,code = <KEY_WPS_BUTTON>; linux,code = <KEY_RESTART>;
gpios = <&tlmm 35 GPIO_ACTIVE_LOW>; gpios = <&tlmm 29 GPIO_ACTIVE_LOW>;
linux,input-type = <1>; linux,input-type = <1>;
debounce-interval = <60>; debounce-interval = <60>;
}; };
}; };
ess-instance { ess-instance {
num_devices = <0x2>;
ess-switch@3a000000 { ess-switch@3a000000 {
pinctrl-0 = <&sfp_pins>;
pinctrl-names = "default";
switch_cpu_bmp = <0x1>; /* cpu port bitmap */ switch_cpu_bmp = <0x1>; /* cpu port bitmap */
switch_lan_bmp = <0x2>; /* lan port bitmap */ switch_lan_bmp = <0x4>; /* lan port bitmap */
switch_wan_bmp = <0x4>; /* wan port bitmap */
switch_mac_mode = <0xc>; /* mac mode for uniphy instance0*/
switch_mac_mode1 = <0xe>; /* mac mode for uniphy instance1*/
switch_mac_mode2 = <0xff>; /* mac mode for uniphy instance2*/
qcom,port_phyinfo {
port@0 {
port_id = <1>;
forced-speed = <2500>;
forced-duplex = <1>;
};
port@1 {
port_id = <2>;
phy_address = <30>;
media-type = "sfp"; /* fiber mode */
};
};
};
ess-switch1@1 {
compatible = "qcom,ess-switch-qca8386";
device_id = <1>;
switch_access_mode = "mdio";
mdio-bus = <&mdio>;
switch_mac_mode = <0xc>; /* mac mode for uniphy instance0 */
switch_mac_mode1 = <0xff>; /* mac mode1 for uniphy instance1 */
switch_cpu_bmp = <0x1>; /* cpu port bitmap */
switch_lan_bmp = <0x1e>; /* lan port bitmap */
switch_wan_bmp = <0x0>; /* wan port bitmap */ switch_wan_bmp = <0x0>; /* wan port bitmap */
link-polling-required = <0>; switch_mac_mode = <0xf>; /* mac mode for uniphy instance0*/
fdb_sync = "interrupt"; switch_mac_mode1 = <0xff>; /* mac mode for uniphy instance1*/
link-intr-gpio = <&tlmm 23 GPIO_ACTIVE_HIGH>; switch_mac_mode2 = <0xff>; /* mac mode for uniphy instance2*/
qcom,port_phyinfo { qcom,port_phyinfo {
port@0 { port@0 {
port_id = <0>;
forced-speed = <2500>;
forced-duplex = <1>;
};
port@1 {
port_id = <1>;
phy_address = <1>;
};
port@2 {
port_id = <2>; port_id = <2>;
phy_address = <2>; phy_address = <28>;
}; };
port@3 {
port_id = <3>;
phy_address = <3>;
};
port@4 {
port_id = <4>;
phy_address = <4>;
};
};
led_source@2 {
source = <2>;
mode = "normal";
speed = "all";
blink_en = "enable";
active = "high";
};
led_source@5 {
source = <5>;
mode = "normal";
speed = "all";
blink_en = "enable";
active = "high";
};
led_source@8 {
source = <8>;
mode = "normal";
speed = "all";
blink_en = "enable";
active = "high";
};
led_source@11 {
source = <11>;
mode = "normal";
speed = "all";
blink_en = "enable";
active = "high";
}; };
}; };
}; };
@@ -528,22 +402,15 @@
qcom,mactype = <1>; qcom,mactype = <1>;
local-mac-address = [000000000000]; local-mac-address = [000000000000];
mdio-bus = <&mdio>; mdio-bus = <&mdio>;
qcom,phy-mdio-addr = <30>; qcom,phy-mdio-addr = <28>;
qcom,link-poll = <1>; qcom,link-poll = <1>;
phy-mode = "sgmii"; phy-mode = "sgmii";
}; };
gmac2:dp2 { nss-macsec0 {
device_type = "network"; compatible = "qcom,nss-macsec";
compatible = "qcom,nss-dp"; phy_addr = <28>;
qcom,id = <1>; mdiobus = <&mdio>;
reg = <0x3a500000 0x4000>;
qcom,mactype = <1>;
local-mac-address = [000000000000];
phy-mode = "sgmii";
qcom,mht-dev = <1>;
qcom,is_switch_connected = <1>;
qcom,ppe-offload-disabled = <1>;
}; };
/* EDMA host driver configuration for the board */ /* EDMA host driver configuration for the board */
@@ -732,7 +599,7 @@
clock-frequency = <400000>; clock-frequency = <400000>;
pinctrl-0 = <&i2c_1_pins>; pinctrl-0 = <&i2c_1_pins>;
pinctrl-names = "default"; pinctrl-names = "default";
status = "okay"; status = "disabled";
}; };
&blsp1_spi0 { &blsp1_spi0 {
@@ -764,10 +631,6 @@
clock-frequency = <32000>; clock-frequency = <32000>;
}; };
&xo {
clock-frequency = <24000000>;
};
&qpic_bam { &qpic_bam {
status = "okay"; status = "okay";
}; };
@@ -791,6 +654,37 @@
/* PINCTRL */ /* PINCTRL */
&tlmm { &tlmm {
led_pins: led_pins {
led_blue {
pins = "gpio22";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
led_green {
pins = "gpio45";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
led_white {
pins = "gpio43";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
led_red {
pins = "gpio44";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
};
qspi_default_state: qspi-default-state { qspi_default_state: qspi-default-state {
qspi_clock { qspi_clock {
pins = "gpio13"; pins = "gpio13";
@@ -828,13 +722,6 @@
bias-pull-up; bias-pull-up;
}; };
gpio_leds_default: gpio-leds-default-state {
pins = "gpio36";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
button_pins: button-state { button_pins: button-state {
pins = "gpio35"; pins = "gpio35";
function = "gpio"; function = "gpio";
@@ -885,18 +772,18 @@
bias-pull-up; bias-pull-up;
}; };
sfp_pins: sfp-state { mdio1_pins: mdio1-state {
sfp_rx { mux_0 {
pins = "gpio45"; pins = "gpio27";
function = "rx1"; function = "mdc1";
bias-disable; drive-strength = <2>;
bias-pull-up;
}; };
sfp_tx { mux_1 {
pins = "gpio24"; pins = "gpio28";
function = "gpio"; function = "mdio1";
drive-strength = <8>; drive-strength = <2>;
bias-pull-down; bias-pull-up;
output-low;
}; };
}; };
}; };
@@ -940,7 +827,7 @@
qcom,tgt-mem-mode = <0>; qcom,tgt-mem-mode = <0>;
qcom,caldb-size = <0x500000>; qcom,caldb-size = <0x500000>;
#endif #endif
qcom,board_id = <0x13>; qcom,board_id = <0x12>;
#if defined(__CNSS2__) #if defined(__CNSS2__)
mem-region = <&q6_ipq5332_data>; mem-region = <&q6_ipq5332_data>;
#else #else
@@ -992,7 +879,7 @@
#else #else
qcom,tgt-mem-mode = <0>; qcom,tgt-mem-mode = <0>;
#endif #endif
qcom,board_id = <0x0b0>; qcom,board_id = <0x070>;
#if defined(__CNSS2__) #if defined(__CNSS2__)
mem-region = <&q6_qcn6432_data_2>; mem-region = <&q6_qcn6432_data_2>;
#else #else